// File: jkingan[P]ladyheather/heathgps.cpp
// Function: show_x72_status(int, int, int)
int show_x72_status(int row,int col, int max_row)
{
int color;

   if(have_x72_creg) {
      if(x72_creg & 0x0008) vidstr(row,col, YELLOW, "PPS OUT: OFF  ");
      else                  vidstr(row,col, GREEN,  "PPS OUT: ON   ");
      if(++row > max_row) return row;

      if(x72_fw_discipline()) {
         if((last_x72_dmode != 1) && (last_x72_dmode != 2)) {
            vidstr(row,col, GREEN, "PPS IN:  UNKN ");
         }
         else if(x72_creg & 0x1000) {  // PPS input detected - fw discipline units only
            vidstr(row,col, GREEN,  "PPS IN:  SEEN ");
         }
         else {
            vidstr(row,col, YELLOW, "PPS IN:  NONE ");
         }
         if(++row > max_row) return row;

         if(user_set_x72_dmode && last_x72_dmode && (last_x72_dmode != 3)) {
            if(x72_creg & 0x0800) {  // PPS out locked to PPS in - fw discipline units only
               vidstr(row,col, GREEN,  "PPS OUT: LOCKED");
            }
            else if(x72_creg & 0x1000) {  // PPS input detected - fw discipline units only
               vidstr(row,col, YELLOW, "PPS OUT: UNLOCK");
            }
            else {
               vidstr(row,col, GREEN,  "PPS OUT: UNLOCK");
            }
            if(++row > max_row) return row;
         }
         else {
            vidstr(row,col, GREEN,  "PPS OUT: UNKN  ");
            if(++row > max_row) return row;
         }
      }

      if(x72_creg & 0x0004) vidstr(row,col, YELLOW, "FXO OUT: OFF  ");
      else                  vidstr(row,col, GREEN,  "FXO OUT: ON   ");
      if(++row > max_row) return row;

      if(x72_creg & 0x0010) vidstr(row,col, YELLOW, "ACMOS:   OFF  ");
      else                  vidstr(row,col, GREEN,  "ACMOS:   ON   ");
      if(++row > max_row) return row;

      if(x72_sine_level == 0) {
         vidstr(row,col, YELLOW, "Sine:    OFF  ");
      }
      else {
         sprintf(out,            "Sine ON: %d%%  ", x72_sine_level);
         vidstr(row,col, GREEN,  out);
      }
      if(++row > max_row) return row;


      if(x72_creg & 0x0002) vidstr(row,col, RED,    "Rb lock: OFF  ");
      else                  vidstr(row,col, GREEN,  "Rb lock: OK   ");
      if(++row > max_row) return row;

      if(x72_creg & 0x0400) vidstr(row,col, RED,    "Service: FAULT");
      else                  vidstr(row,col, GREEN,  "Service: OK   ");
      if(++row > max_row) return row;

      if(have_x72_srvc) {
         if(x72_srvc) vidstr(row,col, GREEN,  "SVC pol: HIGH ");
         else         vidstr(row,col, GREEN,  "SVC pol: LOW  ");
         if(++row > max_row) return row;
      }
      else {
         vidstr(row,col, GREEN,  "SVC pol: UNKN ");
         if(++row > max_row) return row;
      }

      if(x72_creg & 0x2000) {
         vidstr(row,col, GREEN,  "EFC INP: ON   ");
         if(++row > max_row) return row;
      }
      else if(have_x72_efc) {
         if(x72_efc) vidstr(row,col, GREEN,  "EFC inp: ON   ");
         else        vidstr(row,col, GREEN,  "EFC inp: OFF  ");
         if(++row > max_row) return row;
      }
      else {
         vidstr(row,col, GREEN,  "EFC inp: UNKN ");
         if(++row > max_row) return row;
      }

      if(have_x72_state) {
         color = YELLOW;
         if(x72_state == X72_STATE_DISCIPLINE) color = GREEN;
         else if(x72_state == X72_STATE_PIDCALC) color = GREEN;
         else if(x72_state == X72_STATE_PIDUPDATE) color = GREEN;
         else if(x72_state == X72_STATE_START0) color = GREEN;

         sprintf(out, "D State: %-3d  ", x72_state);
         if(color != GREEN)    vidstr(row,col, color, out);
         else if(x72_user_dis) vidstr(row,col, OSC_PID_COLOR, out);
         else                  vidstr(row,col, color,  out);
         if(++row > max_row) return row;
      }
      else {
         sprintf(out, "D State: UNKN ");
         vidstr(row,col, GREEN,  out);
         if(++row > max_row) return row;
      }


      if(x72_creg & 0x0001) vidstr(row,col, YELLOW, "L boost: ON   ");
      else                  vidstr(row,col, GREEN,  "L boost: OFF  ");
      if(++row > max_row) return row;

      if(x72_creg & 0x0020) vidstr(row,col, YELLOW, "C boost: ON   ");
      else                  vidstr(row,col, GREEN,  "C boost: OFF  ");
      if(++row > max_row) return row;
   }

   return row;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movl %edi, -0x8(%rbp)
movl %esi, -0xc(%rbp)
movl %edx, -0x10(%rbp)
leaq 0x1806b8(%rip), %rax    # 0x279e50
cmpl $0x0, (%rax)
je 0xf9ed7
leaq 0x180810(%rip), %rax    # 0x279fb8
movl (%rax), %eax
andl $0x8, %eax
cmpl $0x0, %eax
je 0xf97cb
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xe, %edx
leaq 0x92994(%rip), %rcx     # 0x18c158
callq 0x10ee0
jmp 0xf97e2
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x9298a(%rip), %rcx     # 0x18c167
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf97fb
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
callq 0x94230
cmpl $0x0, %eax
je 0xf9988
leaq 0x1808f0(%rip), %rax    # 0x27a100
cmpl $0x1, (%rax)
je 0xf983a
leaq 0x1808e4(%rip), %rax    # 0x27a100
cmpl $0x2, (%rax)
je 0xf983a
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x92943(%rip), %rcx     # 0x18c176
callq 0x10ee0
jmp 0xf987f
leaq 0x180777(%rip), %rax    # 0x279fb8
movl (%rax), %eax
andl $0x1000, %eax           # imm = 0x1000
cmpl $0x0, %eax
je 0xf9866
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x92926(%rip), %rcx     # 0x18c185
callq 0x10ee0
jmp 0xf987d
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xe, %edx
leaq 0x9291c(%rip), %rcx     # 0x18c194
callq 0x10ee0
jmp 0xf987f
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9898
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
leaq 0x180845(%rip), %rax    # 0x27a0e4
cmpl $0x0, (%rax)
je 0xf9954
leaq 0x180851(%rip), %rax    # 0x27a100
cmpl $0x0, (%rax)
je 0xf9954
leaq 0x180841(%rip), %rax    # 0x27a100
cmpl $0x3, (%rax)
je 0xf9954
leaq 0x1806e9(%rip), %rax    # 0x279fb8
movl (%rax), %eax
andl $0x800, %eax            # imm = 0x800
cmpl $0x0, %eax
je 0xf98f4
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x928b6(%rip), %rcx     # 0x18c1a3
callq 0x10ee0
jmp 0xf9939
leaq 0x1806bd(%rip), %rax    # 0x279fb8
movl (%rax), %eax
andl $0x1000, %eax           # imm = 0x1000
cmpl $0x0, %eax
je 0xf9920
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xe, %edx
leaq 0x9289a(%rip), %rcx     # 0x18c1b3
callq 0x10ee0
jmp 0xf9937
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x92881(%rip), %rcx     # 0x18c1b3
callq 0x10ee0
jmp 0xf9939
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9952
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
jmp 0xf9986
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x9285d(%rip), %rcx     # 0x18c1c3
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9984
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
jmp 0xf9986
jmp 0xf9988
leaq 0x180629(%rip), %rax    # 0x279fb8
movl (%rax), %eax
andl $0x4, %eax
cmpl $0x0, %eax
je 0xf99b2
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xe, %edx
leaq 0x92828(%rip), %rcx     # 0x18c1d3
callq 0x10ee0
jmp 0xf99c9
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x9281e(%rip), %rcx     # 0x18c1e2
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf99e2
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
leaq 0x1805cf(%rip), %rax    # 0x279fb8
movl (%rax), %eax
andl $0x10, %eax
cmpl $0x0, %eax
je 0xf9a0c
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xe, %edx
leaq 0x927ec(%rip), %rcx     # 0x18c1f1
callq 0x10ee0
jmp 0xf9a23
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x927e2(%rip), %rcx     # 0x18c200
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9a3c
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
leaq 0x180595(%rip), %rax    # 0x279fd8
cmpl $0x0, (%rax)
jne 0xf9a61
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xe, %edx
leaq 0x927b5(%rip), %rcx     # 0x18c20f
callq 0x10ee0
jmp 0xf9a96
leaq 0x180570(%rip), %rax    # 0x279fd8
movl (%rax), %edx
leaq 0x2a198f(%rip), %rdi    # 0x39b400
leaq 0x927a6(%rip), %rsi     # 0x18c21e
movb $0x0, %al
callq 0x9060
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x2a196f(%rip), %rcx    # 0x39b400
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9aaf
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
leaq 0x180502(%rip), %rax    # 0x279fb8
movl (%rax), %eax
andl $0x2, %eax
cmpl $0x0, %eax
je 0xf9ad9
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xc, %edx
leaq 0x9275c(%rip), %rcx     # 0x18c22e
callq 0x10ee0
jmp 0xf9af0
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x92752(%rip), %rcx     # 0x18c23d
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9b09
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
leaq 0x1804a8(%rip), %rax    # 0x279fb8
movl (%rax), %eax
andl $0x400, %eax            # imm = 0x400
cmpl $0x0, %eax
je 0xf9b35
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xc, %edx
leaq 0x9271e(%rip), %rcx     # 0x18c24c
callq 0x10ee0
jmp 0xf9b4c
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x92714(%rip), %rcx     # 0x18c25b
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9b65
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
leaq 0x18037c(%rip), %rax    # 0x279ee8
cmpl $0x0, (%rax)
je 0xf9bc8
leaq 0x1803a4(%rip), %rax    # 0x279f1c
cmpl $0x0, (%rax)
je 0xf9b96
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x926db(%rip), %rcx     # 0x18c26a
callq 0x10ee0
jmp 0xf9bad
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x926d1(%rip), %rcx     # 0x18c279
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9bc6
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
jmp 0xf9bfa
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x926ae(%rip), %rcx     # 0x18c288
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9bf8
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
jmp 0xf9bfa
leaq 0x1803b7(%rip), %rax    # 0x279fb8
movl (%rax), %eax
andl $0x2000, %eax           # imm = 0x2000
cmpl $0x0, %eax
je 0xf9c42
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x92678(%rip), %rcx     # 0x18c297
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9c3d
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
jmp 0xf9cd9
leaq 0x18029b(%rip), %rax    # 0x279ee4
cmpl $0x0, (%rax)
je 0xf9ca5
leaq 0x1802c3(%rip), %rax    # 0x279f18
cmpl $0x0, (%rax)
je 0xf9c73
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x9263a(%rip), %rcx     # 0x18c2a6
callq 0x10ee0
jmp 0xf9c8a
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x92630(%rip), %rcx     # 0x18c2b5
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9ca3
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
jmp 0xf9cd7
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x9260d(%rip), %rcx     # 0x18c2c4
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9cd5
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
jmp 0xf9cd7
jmp 0xf9cd9
leaq 0x1801d4(%rip), %rax    # 0x279eb4
cmpl $0x0, (%rax)
je 0xf9de0
movl $0xe, -0x14(%rbp)
leaq 0x1802e9(%rip), %rax    # 0x279fe0
cmpl $0x6, (%rax)
jne 0xf9d05
movl $0xa, -0x14(%rbp)
jmp 0xf9d48
leaq 0x1802d4(%rip), %rax    # 0x279fe0
cmpl $0x7, (%rax)
jne 0xf9d1a
movl $0xa, -0x14(%rbp)
jmp 0xf9d46
leaq 0x1802bf(%rip), %rax    # 0x279fe0
cmpl $0x8, (%rax)
jne 0xf9d2f
movl $0xa, -0x14(%rbp)
jmp 0xf9d44
leaq 0x1802aa(%rip), %rax    # 0x279fe0
cmpl $0x0, (%rax)
jne 0xf9d42
movl $0xa, -0x14(%rbp)
jmp 0xf9d44
jmp 0xf9d46
jmp 0xf9d48
leaq 0x180291(%rip), %rax    # 0x279fe0
movl (%rax), %edx
leaq 0x2a16a8(%rip), %rdi    # 0x39b400
leaq 0x92574(%rip), %rsi     # 0x18c2d3
movb $0x0, %al
callq 0x9060
cmpl $0xa, -0x14(%rbp)
je 0xf9d86
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl -0x14(%rbp), %eax
leaq 0x2a1684(%rip), %rcx    # 0x39b400
movzbl %al, %edx
callq 0x10ee0
jmp 0xf9dc5
leaq 0x180343(%rip), %rax    # 0x27a0d0
cmpl $0x0, (%rax)
je 0xf9dab
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xb, %edx
leaq 0x2a165c(%rip), %rcx    # 0x39b400
callq 0x10ee0
jmp 0xf9dc3
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl -0x14(%rbp), %eax
leaq 0x2a1645(%rip), %rcx    # 0x39b400
movzbl %al, %edx
callq 0x10ee0
jmp 0xf9dc5
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9dde
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
jmp 0xf9e27
leaq 0x2a1619(%rip), %rdi    # 0x39b400
leaq 0x924f5(%rip), %rsi     # 0x18c2e3
movb $0x0, %al
callq 0x9060
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x2a15f9(%rip), %rcx    # 0x39b400
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9e25
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
jmp 0xf9e27
leaq 0x18018a(%rip), %rax    # 0x279fb8
movl (%rax), %eax
andl $0x1, %eax
cmpl $0x0, %eax
je 0xf9e51
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xe, %edx
leaq 0x924a8(%rip), %rcx     # 0x18c2f2
callq 0x10ee0
jmp 0xf9e68
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x9249e(%rip), %rcx     # 0x18c301
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9e7e
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
leaq 0x180133(%rip), %rax    # 0x279fb8
movl (%rax), %eax
andl $0x20, %eax
cmpl $0x0, %eax
je 0xf9ea8
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xe, %edx
leaq 0x9246f(%rip), %rcx     # 0x18c310
callq 0x10ee0
jmp 0xf9ebf
movl -0x8(%rbp), %edi
movl -0xc(%rbp), %esi
movl $0xa, %edx
leaq 0x92465(%rip), %rcx     # 0x18c31f
callq 0x10ee0
movl -0x8(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x8(%rbp)
cmpl -0x10(%rbp), %eax
jle 0xf9ed5
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xf9edd
jmp 0xf9ed7
movl -0x8(%rbp), %eax
movl %eax, -0x4(%rbp)
movl -0x4(%rbp), %eax
addq $0x20, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)