// File: /workspace/github_cpp_makefile_star2_O3/ys1998[P]spsim/src/alu.cpp
// Function: ALU1::operate()
void ALU1::operate(void){
	int funct = std::get<1>(i.type());
	int opcode = std::get<0>(i.type());
	if(funct == FUNCT["add"]){
		res = in1 + in2;
	}else if(funct == FUNCT["sub"]){
		res = in1 - in2;
	}else if(opcode != 0){
		if ((opcode == OPCODE["beq"]) || (opcode == OPCODE["bne"]))	{	
			if(opcode == OPCODE["beq"]){
				res = (in1 == in2);
			}else if(opcode == OPCODE["bne"]){
				res = (in1 != in2);
			}
			// Branch prediction update
			int possible_jump_address = i.get_pc() + 1 + i.get_immediate();
			*(predict_addr + i.get_pc() % BRANCH_PREDICT_SLOTS) = possible_jump_address;
			
			if(res == 1){
				*(predict + i.get_pc() % BRANCH_PREDICT_SLOTS) += 1;
				if(*(predict + i.get_pc() % BRANCH_PREDICT_SLOTS) == STRONGLY_TAKEN + 1)
					*(predict + i.get_pc() % BRANCH_PREDICT_SLOTS) = STRONGLY_TAKEN;
			}else{
				*(predict + i.get_pc() % BRANCH_PREDICT_SLOTS) -= 1;
				if(*(predict + i.get_pc() % BRANCH_PREDICT_SLOTS) == STRONGLY_NOT_TAKEN - 1)
					*(predict + i.get_pc() % BRANCH_PREDICT_SLOTS) = STRONGLY_NOT_TAKEN;
			}
			
			if (res != i.predicted || ((res == 1) && (possible_jump_address != i.jumpAddressPred))){
				//	case of misprediction
				if(res == 0) possible_jump_address = i.get_pc()+1;
				// flush second ALU
				a->flush(i.get_id());
				a3->flush(i.get_id());
				// flush other entities
				f->flush(i.get_id(), possible_jump_address);
			}
				
		}	
	} 
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x40, %rsp
movq %rdi, %rbx
leaq 0x8(%rdi), %r14
movq %rsp, %r15
movq %r15, %rdi
movq %r14, %rsi
callq 0xa8b8
movl (%r15), %r12d
movq %rsp, %r15
movq %r15, %rdi
movq %r14, %rsi
callq 0xa8b8
movl 0x4(%r15), %ebp
leaq 0x10(%rsp), %r14
movq %r14, -0x10(%r14)
leaq 0x1263a(%rip), %rsi     # 0x16004
leaq 0x12636(%rip), %rdx     # 0x16007
movq %rsp, %rdi
callq 0x530a
leaq 0x18860(%rip), %rdi     # 0x1c240
movq %rsp, %rsi
callq 0x5136
movl (%rax), %r15d
movq (%rsp), %rdi
cmpq %r14, %rdi
je 0x3a01
movq 0x10(%rsp), %rsi
incq %rsi
callq 0x3200
cmpl %r15d, %r12d
jne 0x3a14
movl 0xb8(%rbx), %eax
addl 0xb4(%rbx), %eax
jmp 0x3a66
movq %rsp, %rdi
movq %r14, (%rdi)
leaq 0x125e7(%rip), %rsi     # 0x16008
leaq 0x125e3(%rip), %rdx     # 0x1600b
callq 0x530a
leaq 0x1880c(%rip), %rdi     # 0x1c240
movq %rsp, %rsi
callq 0x5136
movl (%rax), %r15d
movq (%rsp), %rdi
cmpq %r14, %rdi
je 0x3a55
movq 0x10(%rsp), %rsi
incq %rsi
callq 0x3200
cmpl %r15d, %r12d
jne 0x3a79
movl 0xb4(%rbx), %eax
subl 0xb8(%rbx), %eax
movl %eax, 0xbc(%rbx)
addq $0x40, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
testl %ebp, %ebp
je 0x3a6c
movq %rsp, %rdi
movq %r14, (%rdi)
leaq 0x12582(%rip), %rsi     # 0x1600c
leaq 0x1257e(%rip), %rdx     # 0x1600f
callq 0x530a
leaq 0x18773(%rip), %rdi     # 0x1c210
movq %rsp, %rsi
callq 0x5136
movb $0x1, %r15b
cmpl (%rax), %ebp
je 0x3afc
leaq 0x30(%rsp), %r12
movq %r12, -0x10(%r12)
leaq 0x12553(%rip), %rsi     # 0x16010
leaq 0x1254f(%rip), %rdx     # 0x16013
leaq 0x20(%rsp), %rdi
callq 0x530a
leaq 0x1873b(%rip), %rdi     # 0x1c210
leaq 0x20(%rsp), %rsi
callq 0x5136
cmpl (%rax), %ebp
sete %r15b
movq 0x20(%rsp), %rdi
cmpq %r12, %rdi
je 0x3afc
movq 0x30(%rsp), %rsi
incq %rsi
callq 0x3200
movq (%rsp), %rdi
cmpq %r14, %rdi
je 0x3b12
movq 0x10(%rsp), %rsi
incq %rsi
callq 0x3200
testb %r15b, %r15b
je 0x3a6c
movq %rsp, %rdi
movq %r14, (%rdi)
leaq 0x124e4(%rip), %rsi     # 0x1600c
leaq 0x124e0(%rip), %rdx     # 0x1600f
callq 0x530a
leaq 0x186d5(%rip), %rdi     # 0x1c210
movq %rsp, %rsi
callq 0x5136
movl (%rax), %r15d
movq (%rsp), %rdi
cmpq %r14, %rdi
je 0x3b5c
movq 0x10(%rsp), %rsi
incq %rsi
callq 0x3200
cmpl %r15d, %ebp
jne 0x3b72
movl 0xb4(%rbx), %eax
cmpl 0xb8(%rbx), %eax
sete %al
jmp 0x3bc7
movq %rsp, %rdi
movq %r14, (%rdi)
leaq 0x12491(%rip), %rsi     # 0x16010
leaq 0x1248d(%rip), %rdx     # 0x16013
callq 0x530a
leaq 0x1867e(%rip), %rdi     # 0x1c210
movq %rsp, %rsi
callq 0x5136
movl (%rax), %r15d
movq (%rsp), %rdi
cmpq %r14, %rdi
je 0x3bb3
movq 0x10(%rsp), %rsi
incq %rsi
callq 0x3200
cmpl %r15d, %ebp
jne 0x3bd0
movl 0xb4(%rbx), %eax
cmpl 0xb8(%rbx), %eax
setne %al
movzbl %al, %eax
movl %eax, 0xbc(%rbx)
movl 0xc(%rbx), %eax
movl 0x38(%rbx), %ecx
leal (%rax,%rcx), %ebp
incl %ebp
movq 0x100(%rbx), %rcx
leal 0x1f(%rax), %edx
testl %eax, %eax
cmovnsl %eax, %edx
andl $-0x20, %edx
subl %edx, %eax
cltq
movl %ebp, (%rcx,%rax,4)
movl 0xc(%rbx), %ecx
leal 0x1f(%rcx), %eax
testl %ecx, %ecx
cmovnsl %ecx, %eax
andl $-0x20, %eax
subl %eax, %ecx
cmpl $0x1, 0xbc(%rbx)
movq 0xf8(%rbx), %rax
movslq %ecx, %rcx
movl (%rax,%rcx,4), %edx
jne 0x3c41
incl %edx
movl %edx, (%rax,%rcx,4)
movl 0xc(%rbx), %ecx
leal 0x1f(%rcx), %edx
testl %ecx, %ecx
cmovnsl %ecx, %edx
andl $-0x20, %edx
subl %edx, %ecx
movslq %ecx, %rcx
cmpl $0x4, (%rax,%rcx,4)
jne 0x3c66
movl $0x3, (%rax,%rcx,4)
jmp 0x3c66
decl %edx
movl %edx, (%rax,%rcx,4)
movl 0xc(%rbx), %ecx
leal 0x1f(%rcx), %edx
testl %ecx, %ecx
cmovnsl %ecx, %edx
andl $-0x20, %edx
subl %edx, %ecx
movslq %ecx, %rcx
cmpl $-0x1, (%rax,%rcx,4)
jne 0x3c66
movl $0x0, (%rax,%rcx,4)
movl 0xbc(%rbx), %eax
cmpl 0x78(%rbx), %eax
jne 0x3c84
cmpl $0x1, %eax
jne 0x3a6c
cmpl 0x7c(%rbx), %ebp
jne 0x3c8d
jmp 0x3a6c
testl %eax, %eax
jne 0x3c8d
movl 0xc(%rbx), %ebp
incl %ebp
movq 0xe0(%rbx), %rdi
movl 0x8(%rbx), %esi
movq (%rdi), %rax
callq *0x10(%rax)
movq 0xe8(%rbx), %rdi
movl 0x8(%rbx), %esi
movq (%rdi), %rax
callq *0x10(%rax)
movq 0xf0(%rbx), %rdi
movl 0x8(%rbx), %esi
movl %ebp, %edx
callq 0x74b4
jmp 0x3a6c
jmp 0x3cf1
jmp 0x3d0c
jmp 0x3cf1
jmp 0x3d0c
movq %rax, %rbx
movq 0x20(%rsp), %rdi
cmpq %r12, %rdi
je 0x3cf4
movq 0x30(%rsp), %rsi
incq %rsi
callq 0x3200
jmp 0x3cf4
jmp 0x3cf1
jmp 0x3cf1
jmp 0x3d0c
jmp 0x3cf1
jmp 0x3d0c
movq %rax, %rbx
movq (%rsp), %rdi
cmpq %r14, %rdi
je 0x3d0f
movq 0x10(%rsp), %rsi
incq %rsi
callq 0x3200
jmp 0x3d0f
movq %rax, %rbx
movq %rbx, %rdi
callq 0x3340
nop