// File: /workspace/github_c_makefile_star2_O0/mmcco[P]sljit/sljit_src/sljitNativeX86_common.c
// Function: emit_shift_with_flags
static int emit_shift_with_flags(struct sljit_compiler *compiler,
	u_char mode, int set_flags,
	int dst, long dstw,
	int src1, long src1w,
	int src2, long src2w)
{
	/* The CPU does not set flags if the shift count is 0. */
	if (src2 & SLJIT_IMM) {
#if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
		if ((src2w & 0x3f) != 0 || (compiler->mode32 && (src2w & 0x1f) != 0))
			return emit_shift(compiler, mode, dst, dstw, src1, src1w, src2, src2w);
#else
		if ((src2w & 0x1f) != 0)
			return emit_shift(compiler, mode, dst, dstw, src1, src1w, src2, src2w);
#endif
		if (!set_flags)
			return emit_mov(compiler, dst, dstw, src1, src1w);
		/* OR dst, src, 0 */
		return emit_cum_binary(compiler, OR_r_rm, OR_rm_r, OR, OR_EAX_i32,
			dst, dstw, src1, src1w, SLJIT_IMM, 0);
	}

	if (!set_flags)
		return emit_shift(compiler, mode, dst, dstw, src1, src1w, src2, src2w);

	if (!FAST_IS_REG(dst))
		FAIL_IF(emit_cmp_binary(compiler, src1, src1w, SLJIT_IMM, 0));

	FAIL_IF(emit_shift(compiler,mode, dst, dstw, src1, src1w, src2, src2w));

	if (FAST_IS_REG(dst))
		return emit_cmp_binary(compiler, dst, dstw, SLJIT_IMM, 0);
	return SLJIT_SUCCESS;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %rbx
subq $0x58, %rsp
movb %sil, %al
movq 0x20(%rbp), %rsi
movl 0x18(%rbp), %esi
movq 0x10(%rbp), %rsi
movq %rdi, -0x18(%rbp)
movb %al, -0x19(%rbp)
movl %edx, -0x20(%rbp)
movl %ecx, -0x24(%rbp)
movq %r8, -0x30(%rbp)
movl %r9d, -0x34(%rbp)
movl 0x18(%rbp), %eax
andl $0x40, %eax
cmpl $0x0, %eax
je 0x236d6
movq 0x20(%rbp), %rax
andq $0x3f, %rax
cmpq $0x0, %rax
jne 0x23621
movq -0x18(%rbp), %rax
cmpl $0x0, 0x70(%rax)
je 0x2365a
movq 0x20(%rbp), %rax
andq $0x1f, %rax
cmpq $0x0, %rax
je 0x2365a
movq -0x18(%rbp), %rdi
movb -0x19(%rbp), %sil
movl -0x24(%rbp), %edx
movq -0x30(%rbp), %rcx
movl -0x34(%rbp), %r8d
movq 0x10(%rbp), %r9
movl 0x18(%rbp), %r10d
movq 0x20(%rbp), %rax
movzbl %sil, %esi
movl %r10d, (%rsp)
movq %rax, 0x8(%rsp)
callq 0x2c4a0
movl %eax, -0xc(%rbp)
jmp 0x237bc
cmpl $0x0, -0x20(%rbp)
jne 0x2367f
movq -0x18(%rbp), %rdi
movl -0x24(%rbp), %esi
movq -0x30(%rbp), %rdx
movl -0x34(%rbp), %ecx
movq 0x10(%rbp), %r8
callq 0x1d0a0
movl %eax, -0xc(%rbp)
jmp 0x237bc
movq -0x18(%rbp), %rdi
movl -0x24(%rbp), %r9d
movq -0x30(%rbp), %r11
movl -0x34(%rbp), %r10d
movq 0x10(%rbp), %rax
movl $0xb, %esi
movl $0x9, %edx
movl $0x8, %ecx
movl $0xd, %r8d
xorl %ebx, %ebx
movq %r11, (%rsp)
movl %r10d, 0x8(%rsp)
movq %rax, 0x10(%rsp)
movl $0x40, 0x18(%rsp)
movq $0x0, 0x20(%rsp)
callq 0x213c0
movl %eax, -0xc(%rbp)
jmp 0x237bc
cmpl $0x0, -0x20(%rbp)
jne 0x23715
movq -0x18(%rbp), %rdi
movb -0x19(%rbp), %sil
movl -0x24(%rbp), %edx
movq -0x30(%rbp), %rcx
movl -0x34(%rbp), %r8d
movq 0x10(%rbp), %r9
movl 0x18(%rbp), %r10d
movq 0x20(%rbp), %rax
movzbl %sil, %esi
movl %r10d, (%rsp)
movq %rax, 0x8(%rsp)
callq 0x2c4a0
movl %eax, -0xc(%rbp)
jmp 0x237bc
cmpl $0x3f, -0x24(%rbp)
jle 0x2374b
jmp 0x2371d
movq -0x18(%rbp), %rdi
movl -0x34(%rbp), %esi
movq 0x10(%rbp), %rdx
movl $0x40, %ecx
xorl %eax, %eax
movl %eax, %r8d
callq 0x21e90
cmpl $0x0, %eax
je 0x23747
movq -0x18(%rbp), %rax
movl (%rax), %eax
movl %eax, -0xc(%rbp)
jmp 0x237bc
jmp 0x23749
jmp 0x2374b
jmp 0x2374d
movq -0x18(%rbp), %rdi
movb -0x19(%rbp), %sil
movl -0x24(%rbp), %edx
movq -0x30(%rbp), %rcx
movl -0x34(%rbp), %r8d
movq 0x10(%rbp), %r9
movl 0x18(%rbp), %r10d
movq 0x20(%rbp), %rax
movzbl %sil, %esi
movl %r10d, (%rsp)
movq %rax, 0x8(%rsp)
callq 0x2c4a0
cmpl $0x0, %eax
je 0x2378e
movq -0x18(%rbp), %rax
movl (%rax), %eax
movl %eax, -0xc(%rbp)
jmp 0x237bc
jmp 0x23790
cmpl $0x3f, -0x24(%rbp)
jg 0x237b5
movq -0x18(%rbp), %rdi
movl -0x24(%rbp), %esi
movq -0x30(%rbp), %rdx
movl $0x40, %ecx
xorl %eax, %eax
movl %eax, %r8d
callq 0x21e90
movl %eax, -0xc(%rbp)
jmp 0x237bc
movl $0x0, -0xc(%rbp)
movl -0xc(%rbp), %eax
addq $0x58, %rsp
popq %rbx
popq %rbp
retq
nopw %cs:(%rax,%rax)