// File: /workspace/github_cpp_makefile_star2_O2/CMU-SAFARI[P]ramulator/src/Cache.cpp
// Function: ramulator::Cache::send(ramulator::Request)
bool Cache::send(Request req) {
  debug("level %d req.addr %lx req.type %d, index %d, tag %ld",
      int(level), req.addr, int(req.type), get_index(req.addr),
      get_tag(req.addr));

  cache_total_access++;
  if (req.type == Request::Type::WRITE) {
    cache_write_access++;
  } else {
    assert(req.type == Request::Type::READ);
    cache_read_access++;
  }
  // If there isn't a set, create it.
  auto& lines = get_lines(req.addr);
  std::list<Line>::iterator line;

  if (is_hit(lines, req.addr, &line)) {
    lines.push_back(Line(req.addr, get_tag(req.addr), false,
        line->dirty || (req.type == Request::Type::WRITE)));
    lines.erase(line);
    cachesys->hit_list.push_back(
        make_pair(cachesys->clk + latency[int(level)], req));

    debug("hit, update timestamp %ld", cachesys->clk);
    debug("hit finish time %ld",
        cachesys->clk + latency[int(level)]);

    return true;

  } else {
    debug("miss @level %d", int(level));
    cache_total_miss++;
    if (req.type == Request::Type::WRITE) {
      cache_write_miss++;
    } else {
      assert(req.type == Request::Type::READ);
      cache_read_miss++;
    }

    // The dirty bit will be set if this is a write request and @L1
    bool dirty = (req.type == Request::Type::WRITE);

    // Modify the type of the request to lower level
    if (req.type == Request::Type::WRITE) {
      req.type = Request::Type::READ;
    }

    // Look it up in MSHR entries
    assert(req.type == Request::Type::READ);
    auto mshr = hit_mshr(req.addr);
    if (mshr != mshr_entries.end()) {
      debug("hit mshr");
      cache_mshr_hit++;
      mshr->second->dirty = dirty || mshr->second->dirty;
      return true;
    }

    // All requests come to this stage will be READ, so they
    // should be recorded in MSHR entries.
    if (mshr_entries.size() == mshr_entry_num) {
      // When no MSHR entries available, the miss request
      // is stalling.
      cache_mshr_unavailable++;
      debug("no mshr entry available");
      return false;
    }

    // Check whether there is a line available
    if (all_sets_locked(lines)) {
      cache_set_unavailable++;
      return false;
    }

    auto newline = allocate_line(lines, req.addr);
    if (newline == lines.end()) {
      return false;
    }

    newline->dirty = dirty;

    // Add to MSHR entries
    mshr_entries.push_back(make_pair(req.addr, newline));

    // Send the request to next level;
    if (!is_last_level) {
      if(!lower_cache->send(req)) {
        retry_list.push_back(req);
      }
    } else {
      cachesys->wait_list.push_back(
          make_pair(cachesys->clk + latency[int(level)], req));
    }
    return true;
  }
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xd8, %rsp
movq %rdi, %r14
movsd 0x400(%rdi), %xmm0
addsd 0x3634a(%rip), %xmm0    # 0xd1078
movq %rsi, %rbx
movsd %xmm0, 0x400(%rdi)
movl 0x2c(%rsi), %ecx
testl %ecx, %ecx
je 0x9ad67
movl $0x368, %eax            # imm = 0x368
cmpl $0x1, %ecx
je 0x9ad6c
leaq 0x41918(%rip), %rdi     # 0xdc669
leaq 0x41697(%rip), %rsi     # 0xdc3ef
leaq 0x4192a(%rip), %rcx     # 0xdc689
pushq $0x70
popq %rdx
callq 0xb210
movl $0x2d0, %eax            # imm = 0x2D0
movsd (%r14,%rax), %xmm0
addsd 0x362fe(%rip), %xmm0    # 0xd1078
movsd %xmm0, (%r14,%rax)
movq 0x8(%rbx), %rsi
movq %r14, %rdi
callq 0x9b894
movq %rax, %r15
leaq 0x8(%rsp), %rcx
andq $0x0, (%rcx)
movq 0x8(%rbx), %rdx
movq %r14, %rdi
movq %rax, %rsi
callq 0x9b07e
testb %al, %al
je 0x9ae51
movq 0x8(%rbx), %rax
movb 0x684(%r14), %cl
movq %rax, %rdx
sarq %cl, %rdx
movq 0x8(%rsp), %r12
movb $0x1, %cl
cmpb $0x0, 0x21(%r12)
jne 0x9add6
cmpl $0x1, 0x2c(%rbx)
sete %cl
leaq 0x10(%rsp), %r13
movq %rax, (%r13)
movq %rdx, 0x8(%r13)
movb $0x0, 0x10(%r13)
movb %cl, 0x11(%r13)
movq %r15, %rdi
movq %r13, %rsi
callq 0x9b97a
movq %r15, %rdi
movq %r12, %rsi
callq 0x9b986
movq 0x630(%r14), %r15
movslq 0x5f0(%r14), %rax
movslq 0x618(%r14,%rax,4), %rax
addq 0x50(%r15), %rax
addq $0x18, %r15
movq %rax, (%r13)
leaq 0x18(%rsp), %r14
movq %r14, %rdi
movq %rbx, %rsi
callq 0x2000a
leaq 0x10(%rsp), %rsi
movq %r15, %rdi
callq 0x9b994
movq %r14, %rdi
callq 0x1cc14
movb $0x1, %bpl
jmp 0x9afe1
movsd 0x1a0(%r14), %xmm0
addsd 0x36216(%rip), %xmm0    # 0xd1078
movsd %xmm0, 0x1a0(%r14)
movl 0x2c(%rbx), %eax
testl %eax, %eax
je 0x9ae9e
cmpl $0x1, %eax
jne 0x9b040
movsd 0x108(%r14), %xmm0
addsd 0x361ec(%rip), %xmm0    # 0xd1078
movsd %xmm0, 0x108(%r14)
andl $0x0, 0x2c(%rbx)
movb $0x1, %r12b
jmp 0x9aeb5
movsd 0x70(%r14), %xmm0
addsd 0x361cc(%rip), %xmm0    # 0xd1078
movsd %xmm0, 0x70(%r14)
xorl %r12d, %r12d
movq 0x8(%rbx), %rsi
movq %r14, %rdi
callq 0x9b9a0
cmpq 0x698(%r14), %rax
je 0x9aefd
movsd 0x498(%r14), %xmm0
addsd 0x3619d(%rip), %xmm0    # 0xd1078
movsd %xmm0, 0x498(%r14)
movq 0x8(%rax), %rax
movb $0x1, %bpl
movb $0x1, %cl
testb %r12b, %r12b
jne 0x9aef5
movb 0x21(%rax), %cl
movb %cl, 0x21(%rax)
jmp 0x9afe1
movq 0x690(%r14), %rcx
subq %rcx, %rax
sarq $0x4, %rax
movl 0x688(%r14), %ecx
cmpq %rcx, %rax
jne 0x9af36
movsd 0x530(%r14), %xmm0
addsd 0x36150(%rip), %xmm0    # 0xd1078
movsd %xmm0, 0x530(%r14)
jmp 0x9afdf
movq %r14, %rdi
movq %r15, %rsi
callq 0x9b9ba
testb %al, %al
je 0x9af61
movsd 0x5c8(%r14), %xmm0
addsd 0x36122(%rip), %xmm0    # 0xd1078
movsd %xmm0, 0x5c8(%r14)
jmp 0x9afdf
movq 0x8(%rbx), %rdx
movq %r14, %rdi
movq %r15, %rsi
callq 0x9b0aa
cmpq %r15, %rax
je 0x9afdf
leaq 0x690(%r14), %rdi
movb %r12b, 0x21(%rax)
movq 0x8(%rbx), %rcx
leaq 0x10(%rsp), %rsi
movq %rcx, (%rsi)
movq %rax, 0x8(%rsi)
callq 0x9c194
cmpb $0x0, 0x661(%r14)
je 0x9aff5
movq 0x630(%r14), %r15
movslq 0x5f0(%r14), %rax
movslq 0x618(%r14,%rax,4), %rax
addq 0x50(%r15), %rax
leaq 0x18(%rsp), %r14
movq %rax, -0x8(%r14)
movq %r14, %rdi
movq %rbx, %rsi
callq 0x2000a
leaq 0x10(%rsp), %rsi
movq %r15, %rdi
callq 0x9b994
jmp 0x9ae41
xorl %ebp, %ebp
movl %ebp, %eax
addq $0xd8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x658(%r14), %r15
leaq 0x78(%rsp), %r12
movq %r12, %rdi
movq %rbx, %rsi
callq 0x2000a
movq %r15, %rdi
movq %r12, %rsi
callq 0x9ad0a
movl %eax, %r15d
leaq 0x78(%rsp), %rdi
callq 0x1cc14
movb $0x1, %bpl
testb %r15b, %r15b
jne 0x9afe1
addq $0x6a8, %r14            # imm = 0x6A8
movq %r14, %rdi
movq %rbx, %rsi
callq 0x1fb18
jmp 0x9afe1
leaq 0x41622(%rip), %rdi     # 0xdc669
leaq 0x413a1(%rip), %rsi     # 0xdc3ef
leaq 0x41634(%rip), %rcx     # 0xdc689
movl $0x8a, %edx
callq 0xb210
movq %rax, %rbx
leaq 0x78(%rsp), %rdi
jmp 0x9b071
jmp 0x9b06b
movq %rax, %rbx
movq %r14, %rdi
callq 0x1cc14
movq %rbx, %rdi
callq 0xb4d0