// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_proc.c
// Function: output_proc_tree
int output_proc_tree(FILE *fp)
{
	PROC_TREE *now_proc_tree;
	PROC_TREE *next_proc_tree;

	printf(" -> Output Verilog HDL: module = %s\n", sep_p(module_name));

	// モジュールヘッダの生成
	fprintf(fp,"/*\n");
	fprintf(fp," * Copyright (C)2005-2015 AQUAXIS TECHNOLOGY.\n");
	fprintf(fp," *  Don't remove this header.\n");
	fprintf(fp," * When you use this source, there is a need to inherit this header.\n");
	fprintf(fp," *\n");
	fprintf(fp," * This software is released under the MIT License.\n");
	fprintf(fp," * http://opensource.org/licenses/mit-license.php\n");
	fprintf(fp," *\n");
	fprintf(fp," * For further information please contact.\n");
	fprintf(fp," *  URI:    http://www.aquaxis.com/\n");
	fprintf(fp," *  E-Mail: info(at)aquaxis.com\n");
	fprintf(fp," */\n");

	fprintf(fp,"module %s(\n", sep_p(module_name));
	fprintf(fp,"\tinput __func_clock,\n");
	fprintf(fp,"\tinput __func_reset,\n");
	fprintf(fp,"\tinput __func_start,\n");
	fprintf(fp,"\toutput reg __func_done,\n");
	fprintf(fp,"\toutput reg __func_ready,\n\n");

	if(is_module_gm_if){
		fprintf(fp,"\t// Global Memory\n");
		fprintf(fp,"\tinput [31:0] __gm_base,\n");
		fprintf(fp,"\toutput reg __gm_req,\n");
		fprintf(fp,"\toutput reg __gm_rnw,\n");
		fprintf(fp,"\tinput __gm_done,\n");
		fprintf(fp,"\toutput reg [31:0] __gm_adrs,\n");
		fprintf(fp,"\toutput reg [1:0] __gm_leng,\n");
		fprintf(fp,"\tinput [31:0] __gm_di,\n");
		fprintf(fp,"\toutput reg [31:0] __gm_do,\n\n");
	}

	fprintf(fp,"\t// Memory Singal\n");
	output_memory_tree(fp, 0);	// 引数の出力

	fprintf(fp,"\t// Call Singal\n");
	output_call_signal_tree(fp);

	fprintf(fp,"\t// Result Singal\n");
	output_memory_tree(fp ,1);	// returnの出力

	fprintf(fp,");\n\n");

	// reg,wire宣言
	output_signal_tree(fp);	// 信号定義の出力

	// WIRE接続(assign文)の出力
	if(verilog_wire != NULL){
		fprintf(fp,"%s", verilog_wire);
	}
	output_memory_tree(fp, 2);	// 宣言の出力

	// ステートマシンの宣言出力
	if(verilog_state != NULL){
		fprintf(fp,"%s", verilog_state);
	}

	output_verilog_sdiv(fp);

    now_proc_tree = proc_tree_top;

	// ステートマシンの生成
	fprintf(fp,"always @(posedge __func_clock or negedge __func_reset) begin\n");
	fprintf(fp,"\tif(!__func_reset) begin\n");
	fprintf(fp,"\t\t__state <= __state_start_req;\n");
	fprintf(fp,"\t\t__func_ready <= 1;\n");
	fprintf(fp,"\t\t__func_done <= 0;\n");
	// 初期化を入れる
	fprintf(fp,"\tend else begin\n");
	fprintf(fp,"\tcase(__state)\n");

	fprintf(fp,"\t\t__state_start_req: begin\n");
	fprintf(fp,"\t\t\t__state <= __state_start_wait;\n");
	fprintf(fp,"\t\tend\n");

	fprintf(fp,"\t\t__state_start_wait: begin\n");
	fprintf(fp,"\t\t\tif(__func_start) begin\n");
	fprintf(fp,"\t\t\t\t__state <= __state_start_exec;\n");
	fprintf(fp,"\t\t\t\t__func_ready <= 0;\n");
	fprintf(fp,"\t\t\t\t__func_done <= 0;\n");
	output_memory_tree(fp, 3);	// procの出力
	fprintf(fp,"\t\t\tend\n");
	fprintf(fp,"\t\tend\n");

	fprintf(fp,"\t\t__state_start_exec: begin\n");
	if(now_proc_tree->seq_req.ena){
		fprintf(fp,"\t\t\t__state <= __state_1_req;\n");
	}else if(now_proc_tree->seq_wait.ena){
		fprintf(fp,"\t\t\t__state <= __state_1_wait;\n");
	}else{
		fprintf(fp,"\t\t\t__state <= __state_1_exec;\n");
	}
	fprintf(fp,"\t__label_pre <= __label_0;\n");
	fprintf(fp,"\t\tend\n");

    while(now_proc_tree != NULL){
		if(now_proc_tree->seq_req.ena){
			fprintf(fp, "\t\t__state_%d_req: begin\n", now_proc_tree->stage);
			fprintf(fp, "%s", now_proc_tree->seq_req.state);
			if(now_proc_tree->seq_req.body != NULL )		fprintf(fp, "%s", now_proc_tree->seq_req.body);
			fprintf(fp, "\t\tend\n");
		}

		if(now_proc_tree->seq_wait.ena){
			fprintf(fp, "\t\t__state_%d_wait: begin\n", now_proc_tree->stage);
			fprintf(fp, "%s", now_proc_tree->seq_wait.state);
			if(now_proc_tree->seq_wait.body != NULL )		fprintf(fp, "%s", now_proc_tree->seq_wait.body);
			fprintf(fp, "\t\tend\n");
		}

		{
			fprintf(fp, "\t\t__state_%d_exec: begin\n", now_proc_tree->stage);
			if(now_proc_tree->seq_exec.state != NULL){
				if(strlen(now_proc_tree->seq_exec.state) > 0){
					fprintf(fp, "%s\n", now_proc_tree->seq_exec.state);
				}
			}else{
		        next_proc_tree = now_proc_tree->next_ptr;
		        if(next_proc_tree != NULL){
					if(next_proc_tree->seq_req.ena){
						fprintf(fp, "\t\t\t__state <= __state_%d_req;\n", now_proc_tree->stage + 1);
					}else if(next_proc_tree->seq_wait.ena){
						fprintf(fp, "\t\t\t__state <= __state_%d_wait;\n", now_proc_tree->stage + 1);
					}else{
						fprintf(fp, "\t\t\t__state <= __state_%d_exec;\n", now_proc_tree->stage + 1);
					}
				}
			}
			if(now_proc_tree->seq_exec.body != NULL )	fprintf(fp, "%s", now_proc_tree->seq_exec.body);
			fprintf(fp, "\t\tend\n");
		}
        now_proc_tree = now_proc_tree->next_ptr;
    }

	fprintf(fp,"\t\t__state_fin_exec: begin\n");
	fprintf(fp,"\t\t\t__state <= __state_start_req;\n");
	fprintf(fp,"\t\t\t__func_ready <= 1;\n");
	fprintf(fp,"\t\t\t__func_done <= 1;\n");
	fprintf(fp,"\t\tend\n");

	fprintf(fp,"\tendcase\n");
	fprintf(fp,"\tend\n");
	fprintf(fp,"end\n");

	fprintf(fp,"endmodule\n");

    return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
leaq 0xcef6(%rip), %r15      # 0x14158
movq (%r15), %rsi
movzbl (%rsi), %eax
cmpl $0x40, %eax
je 0x7272
cmpl $0x25, %eax
jne 0x7275
incq %rsi
leaq 0x7863(%rip), %rdi      # 0xeadf
xorl %eax, %eax
callq 0x10b0
leaq 0x787a(%rip), %rdi      # 0xeb04
movl $0x3, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x7865(%rip), %rdi      # 0xeb08
movl $0x2e, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x787b(%rip), %rdi      # 0xeb37
movl $0x1e, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x7881(%rip), %rdi      # 0xeb56
movl $0x45, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x78ae(%rip), %r14      # 0xeb9c
movl $0x3, %esi
movl $0x1, %edx
movq %r14, %rdi
movq %rbx, %rcx
callq 0x11d0
leaq 0x7896(%rip), %rdi      # 0xeba0
movl $0x34, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x78b2(%rip), %rdi      # 0xebd5
movl $0x32, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
movl $0x3, %esi
movl $0x1, %edx
movq %r14, %rdi
movq %rbx, %rcx
callq 0x11d0
leaq 0x78b7(%rip), %rdi      # 0xec08
movl $0x2b, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x78ca(%rip), %rdi      # 0xec34
movl $0x24, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x78d6(%rip), %rdi      # 0xec59
movl $0x20, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x78de(%rip), %rdi      # 0xec7a
movl $0x4, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
movq (%r15), %rdx
movzbl (%rdx), %eax
cmpl $0x40, %eax
je 0x73be
cmpl $0x25, %eax
jne 0x73c1
incq %rdx
leaq 0x78b7(%rip), %rsi      # 0xec7f
movq %rbx, %rdi
xorl %eax, %eax
callq 0x1120
leaq 0x78b2(%rip), %rdi      # 0xec8b
movl $0x15, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x78af(%rip), %rdi      # 0xeca1
movl $0x15, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x78ac(%rip), %rdi      # 0xecb7
movl $0x15, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x78a9(%rip), %rdi      # 0xeccd
movl $0x19, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x78aa(%rip), %rdi      # 0xece7
movl $0x1b, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
cmpl $0x0, 0xd15a(%rip)      # 0x145b0
je 0x753d
leaq 0x78a0(%rip), %rdi      # 0xed03
movl $0x12, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x789a(%rip), %rdi      # 0xed16
movl $0x19, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x789b(%rip), %rdi      # 0xed30
movl $0x16, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x7899(%rip), %rdi      # 0xed47
movl $0x16, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x7897(%rip), %rdi      # 0xed5e
movl $0x12, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x7891(%rip), %rdi      # 0xed71
movl $0x1e, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x7897(%rip), %rdi      # 0xed90
movl $0x1d, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x789c(%rip), %rdi      # 0xedae
movl $0x17, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x789b(%rip), %rdi      # 0xedc6
movl $0x1d, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x78a0(%rip), %rdi      # 0xede4
movl $0x12, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
movq %rbx, %rdi
xorl %esi, %esi
callq 0x599b
leaq 0x7890(%rip), %rdi      # 0xedf7
movl $0x10, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
movq %rbx, %rdi
callq 0x53fc
leaq 0x7880(%rip), %rdi      # 0xee08
movl $0x12, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
movq %rbx, %rdi
movl $0x1, %esi
callq 0x599b
leaq 0x786d(%rip), %rdi      # 0xee1b
movl $0x4, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
movq %rbx, %rdi
callq 0x9dcc
movq 0xcfc9(%rip), %rdi      # 0x14598
testq %rdi, %rdi
je 0x75dc
movq %rbx, %rsi
callq 0x10c0
movq %rbx, %rdi
movl $0x2, %esi
callq 0x599b
movq 0xcfb8(%rip), %rdi      # 0x145a8
testq %rdi, %rdi
je 0x75fd
movq %rbx, %rsi
callq 0x10c0
movq %rbx, %rdi
callq 0x7aa4
movq 0xcf84(%rip), %r15      # 0x14590
leaq 0x780d(%rip), %rdi      # 0xee20
movl $0x3d, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x7832(%rip), %rdi      # 0xee5e
movl $0x19, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x7a7b(%rip), %rdi      # 0xf0c0
movl $0x20, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x7a84(%rip), %rdi      # 0xf0e2
movl $0x15, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x78d7(%rip), %rdi      # 0xef4e
movl $0x14, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x77e8(%rip), %rdi      # 0xee78
movl $0x10, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x77e0(%rip), %rdi      # 0xee89
movl $0xf, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x77d7(%rip), %rdi      # 0xee99
movl $0x1b, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x77da(%rip), %rdi      # 0xeeb5
movl $0x22, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x7bb0(%rip), %r14      # 0xf2a4
movl $0x6, %esi
movl $0x1, %edx
movq %r14, %rdi
movq %rbx, %rcx
callq 0x11d0
leaq 0x77c8(%rip), %rdi      # 0xeed8
movl $0x1c, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x77cc(%rip), %rdi      # 0xeef5
movl $0x1a, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x77ce(%rip), %rdi      # 0xef10
movl $0x23, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x77d9(%rip), %rdi      # 0xef34
movl $0x17, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x77d8(%rip), %rdi      # 0xef4c
movl $0x16, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
movq %rbx, %rdi
movl $0x3, %esi
callq 0x599b
leaq 0x7b09(%rip), %rdi      # 0xf2a3
movl $0x7, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
movl $0x6, %esi
movl $0x1, %edx
movq %r14, %rdi
movq %rbx, %rcx
callq 0x11d0
leaq 0x779b(%rip), %rdi      # 0xef63
movl $0x1c, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
cmpl $0x0, 0x18(%r15)
je 0x77ef
leaq 0x7798(%rip), %rdi      # 0xef80
movl $0x1d, %esi
jmp 0x780b
cmpl $0x0, 0x38(%r15)
je 0x77ff
leaq 0x77a1(%rip), %rdi      # 0xef9e
jmp 0x7806
leaq 0x77b7(%rip), %rdi      # 0xefbd
movl $0x1e, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x77bd(%rip), %rdi      # 0xefdc
movl $0x1b, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x7a6c(%rip), %rdi      # 0xf2a4
movl $0x6, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
testq %r15, %r15
je 0x79b2
leaq 0x77d1(%rip), %r14      # 0xf02b
leaq 0x7a43(%rip), %rbp      # 0xf2a4
leaq 0x77a9(%rip), %r12      # 0xf011
leaq 0x7789(%rip), %r13      # 0xeff8
cmpl $0x0, 0x18(%r15)
je 0x78b9
movl 0x10(%r15), %edx
movq %rbx, %rdi
movq %r13, %rsi
xorl %eax, %eax
callq 0x1120
movq 0x20(%r15), %rdi
movq %rbx, %rsi
callq 0x10c0
movq 0x30(%r15), %rdi
testq %rdi, %rdi
je 0x78a4
movq %rbx, %rsi
callq 0x10c0
movl $0x6, %esi
movl $0x1, %edx
movq %rbp, %rdi
movq %rbx, %rcx
callq 0x11d0
cmpl $0x0, 0x38(%r15)
je 0x7903
movl 0x10(%r15), %edx
movq %rbx, %rdi
movq %r12, %rsi
xorl %eax, %eax
callq 0x1120
movq 0x40(%r15), %rdi
movq %rbx, %rsi
callq 0x10c0
movq 0x50(%r15), %rdi
testq %rdi, %rdi
je 0x78ee
movq %rbx, %rsi
callq 0x10c0
movl $0x6, %esi
movl $0x1, %edx
movq %rbp, %rdi
movq %rbx, %rcx
callq 0x11d0
movl 0x10(%r15), %edx
movq %rbx, %rdi
movq %r14, %rsi
xorl %eax, %eax
callq 0x1120
movq 0x60(%r15), %rdx
testq %rdx, %rdx
je 0x7935
cmpb $0x0, (%rdx)
je 0x797f
movq %rbx, %rdi
leaq 0x71a6(%rip), %rsi      # 0xead2
xorl %eax, %eax
callq 0x1120
jmp 0x797f
movq 0x8(%r15), %rax
testq %rax, %rax
je 0x797f
cmpl $0x0, 0x18(%rax)
je 0x7956
movl 0x10(%r15), %edx
incl %edx
movq %rbx, %rdi
leaq 0x76f1(%rip), %rsi      # 0xf045
jmp 0x7978
movl 0x10(%r15), %edx
incl %edx
cmpl $0x0, 0x38(%rax)
je 0x796e
movq %rbx, %rdi
leaq 0x76f8(%rip), %rsi      # 0xf064
jmp 0x7978
movq %rbx, %rdi
leaq 0x770c(%rip), %rsi      # 0xf084
xorl %eax, %eax
callq 0x1120
movq 0x70(%r15), %rdi
testq %rdi, %rdi
je 0x7990
movq %rbx, %rsi
callq 0x10c0
movl $0x6, %esi
movl $0x1, %edx
movq %rbp, %rdi
movq %rbx, %rcx
callq 0x11d0
movq 0x8(%r15), %r15
testq %r15, %r15
jne 0x786f
leaq 0x76eb(%rip), %rdi      # 0xf0a4
movl $0x1a, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x76ed(%rip), %rdi      # 0xf0bf
movl $0x21, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x76f6(%rip), %rdi      # 0xf0e1
movl $0x16, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x76f4(%rip), %rdi      # 0xf0f8
movl $0x15, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x7887(%rip), %rdi      # 0xf2a4
movl $0x6, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x7931(%rip), %rdi      # 0xf367
movl $0x9, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x7856(%rip), %rdi      # 0xf2a5
movl $0x5, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x783e(%rip), %rdi      # 0xf2a6
movl $0x4, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
leaq 0x768d(%rip), %rdi      # 0xf10e
movl $0xa, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq