// File: /workspace/github_cpp_makefile_star2_O3/j-faria[P]kima/eigen/Eigen/src/Core/util/Memory.h
// Function: Eigen::internal::queryCacheSizes(int&, int&, int&)
inline void queryCacheSizes(int& l1, int& l2, int& l3)
{
  #ifdef EIGEN_CPUID
  int abcd[4];
  const int GenuineIntel[] = {0x756e6547, 0x49656e69, 0x6c65746e};
  const int AuthenticAMD[] = {0x68747541, 0x69746e65, 0x444d4163};
  const int AMDisbetter_[] = {0x69444d41, 0x74656273, 0x21726574}; // "AMDisbetter!"

  // identify the CPU vendor
  EIGEN_CPUID(abcd,0x0,0);
  int max_std_funcs = abcd[1];
  if(cpuid_is_vendor(abcd,GenuineIntel))
    queryCacheSizes_intel(l1,l2,l3,max_std_funcs);
  else if(cpuid_is_vendor(abcd,AuthenticAMD) || cpuid_is_vendor(abcd,AMDisbetter_))
    queryCacheSizes_amd(l1,l2,l3);
  else
    // by default let's use Intel's API
    queryCacheSizes_intel(l1,l2,l3,max_std_funcs);

  // here is the list of other vendors:
//   ||cpuid_is_vendor(abcd,"VIA VIA VIA ")
//   ||cpuid_is_vendor(abcd,"CyrixInstead")
//   ||cpuid_is_vendor(abcd,"CentaurHauls")
//   ||cpuid_is_vendor(abcd,"GenuineTMx86")
//   ||cpuid_is_vendor(abcd,"TransmetaCPU")
//   ||cpuid_is_vendor(abcd,"RiseRiseRise")
//   ||cpuid_is_vendor(abcd,"Geode by NSC")
//   ||cpuid_is_vendor(abcd,"SiS SiS SiS ")
//   ||cpuid_is_vendor(abcd,"UMC UMC UMC ")
//   ||cpuid_is_vendor(abcd,"NexGenDriven")
  #else
  l1 = l2 = l3 = -1;
  #endif
}

// Assembly:
pushq %rbx
movq %rdx, %r8
xorl %eax, %eax
xorl %ecx, %ecx
xchgq %rbx, %r9
cpuid
xchgq %rbx, %r9
cmpl $0x68747541, %r9d       # imm = 0x68747541
je 0x1b85a
cmpl $0x69444d41, %r9d       # imm = 0x69444D41
je 0x1b84c
cmpl $0x756e6547, %r9d       # imm = 0x756E6547
jne 0x1b8ae
xorl $0x49656e69, %edx       # imm = 0x49656E69
xorl $0x6c65746e, %ecx       # imm = 0x6C65746E
orl %edx, %ecx
jne 0x1b8b8
xorl %r9d, %r9d
movl %r9d, (%r8)
movl %r9d, (%rsi)
movl %r9d, (%rdi)
movl %r9d, %ecx
movl $0x4, %eax
xchgq %rbx, %r10
cpuid
xchgq %rbx, %r10
movl %eax, %edx
andl $0xd, %edx
cmpl $0x1, %edx
jne 0x1b82e
movl %eax, %r11d
shrl $0x5, %r11d
andl $0x7, %r11d
movq %rdi, %rdx
cmpl $0x1, %r11d
je 0x1b7fc
cmpl $0x3, %r11d
je 0x1b7f9
movq %rsi, %rdx
cmpl $0x2, %r11d
je 0x1b7fc
jmp 0x1b82e
movq %r8, %rdx
movl %r10d, %r11d
shrl $0x16, %r11d
movl %r10d, %ebx
shrl $0xc, %ebx
andl $0x3ff, %ebx            # imm = 0x3FF
andl $0xfff, %r10d           # imm = 0xFFF
incl %r11d
incl %ebx
incl %r10d
imull %ebx, %r10d
incl %ecx
imull %r11d, %ecx
imull %r10d, %ecx
movl %ecx, (%rdx)
testb $0xf, %al
je 0x1b94d
leal 0x1(%r9), %eax
cmpl $0xf, %r9d
movl %eax, %r9d
jb 0x1b7ba
jmp 0x1b94d
xorl $0x74656273, %edx       # imm = 0x74656273
xorl $0x21726574, %ecx       # imm = 0x21726574
jmp 0x1b866
xorl $0x69746e65, %edx       # imm = 0x69746E65
xorl $0x444d4163, %ecx       # imm = 0x444D4163
orl %edx, %ecx
jne 0x1b8b8
movl $0x80000005, %eax       # imm = 0x80000005
xorl %ecx, %ecx
xchgq %rbx, %r9
cpuid
xchgq %rbx, %r9
sarl $0xe, %ecx
movl $0xfffffc00, %r9d       # imm = 0xFFFFFC00
andl %r9d, %ecx
movl %ecx, (%rdi)
xorl %ecx, %ecx
movl $0x80000006, %eax       # imm = 0x80000006
xchgq %rbx, %rdi
cpuid
xchgq %rbx, %rdi
sarl $0x6, %ecx
andl %r9d, %ecx
movl %ecx, (%rsi)
addl %edx, %edx
andl $0x1ff80000, %edx       # imm = 0x1FF80000
movl %edx, (%r8)
jmp 0x1b94d
cmpl $0x4, %r9d
jl 0x1b94f
xorl %r9d, %r9d
movl %r9d, (%r8)
movl %r9d, (%rsi)
movl %r9d, (%rdi)
movl $0x4, %eax
movl %r9d, %ecx
xchgq %rbx, %r10
cpuid
xchgq %rbx, %r10
movl %eax, %edx
andl $0xd, %edx
cmpl $0x1, %edx
jne 0x1b938
movl %eax, %r11d
shrl $0x5, %r11d
andl $0x7, %r11d
movq %rdi, %rdx
cmpl $0x1, %r11d
je 0x1b906
cmpl $0x3, %r11d
je 0x1b903
movq %rsi, %rdx
cmpl $0x2, %r11d
je 0x1b906
jmp 0x1b938
movq %r8, %rdx
movl %r10d, %r11d
shrl $0x16, %r11d
movl %r10d, %ebx
shrl $0xc, %ebx
andl $0x3ff, %ebx            # imm = 0x3FF
andl $0xfff, %r10d           # imm = 0xFFF
incl %r11d
incl %ebx
incl %r10d
imull %ebx, %r10d
incl %ecx
imull %r11d, %ecx
imull %r10d, %ecx
movl %ecx, (%rdx)
testb $0xf, %al
je 0x1b94d
leal 0x1(%r9), %eax
cmpl $0xf, %r9d
movl %eax, %r9d
jb 0x1b8c4
popq %rbx
retq
movq %r8, %rdx
popq %rbx
jmp 0x1b958