// File: /workspace/github_c_makefile_star2_O2/xiane[P]libvphevcodec/AML_HEVCEncoder.cpp
// Function: PrintVpuStatus(unsigned int)
void PrintVpuStatus(u32 coreIdx) {
    if (1) {
        int rd, wr;
        Uint32 reg_val, num;
        Uint32 index;
        Uint32 vcpu_reg[31] = { 0, };

        VLOG(ERR, "------------------------------------------------------------------------------- ");
        VLOG(ERR, "------                            VCPU STATUS(ENC)                        ----- ");
        VLOG(ERR, "------------------------------------------------------------------------------- ");
        rd = VpuReadReg(coreIdx, W4_BS_RD_PTR);
        wr = VpuReadReg(coreIdx, W4_BS_WR_PTR);
        VLOG(ERR, "RD_PTR: 0x%08x WR_PTR: 0x%08x BS_OPT: 0x%08x BS_PARAM: 0x%08x\n",
                        rd, wr, VpuReadReg(coreIdx, W4_BS_OPTION), VpuReadReg(coreIdx, W4_BS_PARAM));

        // --------- VCPU register Dump
        VLOG(ERR, "[+] VCPU REG Dump\n");
        for (index = 0; index < 25; index++) {
            VpuWriteReg(coreIdx, W4_VPU_PDBG_IDX_REG, (1 << 9) | (index & 0xff));
            vcpu_reg[index] = VpuReadReg(coreIdx, W4_VPU_PDBG_RDATA_REG);

            if (index < 16) {
                VLOG(ERR, "0x%08x\t", vcpu_reg[index]);
                if ((index % 4) == 3)
                    VLOG(ERR, " ");
            } else {
                switch (index) {
                    case 16:
                        VLOG(ERR, "CR0: 0x%08x\t", vcpu_reg[index]);
                        break;
                    case 17:
                        VLOG(ERR, "CR1: 0x%08x\n", vcpu_reg[index]);
                        break;
                    case 18:
                        VLOG(ERR, "ML:  0x%08x\t", vcpu_reg[index]);
                        break;
                    case 19:
                        VLOG(ERR, "MH:  0x%08x\n", vcpu_reg[index]);
                        break;
                    case 21:
                        VLOG(ERR, "LR:  0x%08x\n", vcpu_reg[index]);
                        break;
                    case 22:
                        VLOG(ERR, "PC:  0x%08x\n", vcpu_reg[index]);
                        break;
                    case 23:
                        VLOG(ERR, "SR:  0x%08x\n", vcpu_reg[index]);
                        break;
                    case 24:
                        VLOG(ERR, "SSP: 0x%08x\n", vcpu_reg[index]);
                        break;
                }
            }
        }
        VLOG(ERR, "[-] VCPU REG Dump\n");
        VLOG(ERR, "vce run flag = %d\n", VpuReadReg(coreIdx, 0x1E8));
        // --------- BIT register Dump
        VLOG(ERR, "[+] BPU REG Dump\n");
        for (index = 0; index < 30; index++) {
            unsigned int temp;
            temp = FIORead(coreIdx, (W4_REG_BASE + 0x8000 + 0x18));
            VLOG(ERR, "BITPC = 0x%08x\n", temp);
            if (temp == 0xffffffff)
                return;
        }

        // --------- BIT HEVC Status Dump
        VLOG(ERR, "[-] BPU REG Dump\n");

        VLOG(ERR, "DBG_FIFO_VALID   [%08x] ", FIORead(coreIdx, (W4_REG_BASE + 0x8000 + 0x6C)));

        //SDMA debug information
        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x13c);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        reg_val = FIORead(0, (W4_REG_BASE + 0x8000 + 0x78));
        VLOG(ERR, "SDMA_DBG_INFO    [%08x] ", reg_val);
        VLOG(ERR, "\t- [   28] need_more_update  : 0x%x  ", (reg_val >> 28) & 0x1);
        VLOG(ERR, "\t- [27:25] tr_init_fsm       : 0x%x  ", (reg_val >> 25) & 0x7);
        VLOG(ERR, "\t- [24:18] remain_trans_size : 0x%x  ", (reg_val >> 18) & 0x7F);
        VLOG(ERR, "\t- [17:13] wdata_out_cnt     : 0x%x  ", (reg_val >> 13) & 0x1F);
        VLOG(ERR, "\t- [12:10] wdma_wd_fsm       : 0x%x  ", (reg_val >> 10) & 0x1F);
        VLOG(ERR, "\t- [ 9: 7] wdma_wa_fsm       : 0x%x ", (reg_val >> 7) & 0x7);
        if (((reg_val >> 7) & 0x7) == 3) {
            VLOG(ERR, "-->WDMA_WAIT_ADDR   ");
        } else {
            VLOG(ERR, " ");
        }
        VLOG(ERR, "\t- [ 6: 5] sdma_init_fsm     : 0x%x  ", (reg_val >> 5) & 0x3);
        VLOG(ERR, "\t- [ 4: 1] save_fsm          : 0x%x  ", (reg_val >> 1) & 0xF);
        VLOG(ERR, "\t- [    0] unalign_written   : 0x%x  ", (reg_val >> 0) & 0x1);

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x13b);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        reg_val = FIORead(0, (W4_REG_BASE + 0x8000 + 0x78));
        VLOG(ERR, "SDMA_NAL_MEM_INF [%08x] ", reg_val);
        VLOG(ERR, "\t- [ 7: 1] nal_mem_empty_room : 0x%x  ", (reg_val >> 1) & 0x3F);
        VLOG(ERR, "\t- [    0] ge_wnbuf_size      : 0x%x  ", (reg_val >> 0) & 0x1);

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x131);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        reg_val = FIORead(0, (W4_REG_BASE + 0x8000 + 0x78));
        VLOG(ERR, "SDMA_IRQ   [%08x]: [1]sdma_irq : 0x%x, [2]enable_sdma_irq : 0x%x\n", reg_val, (reg_val >> 1) & 0x1, (reg_val & 0x1));

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x134);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        VLOG(ERR, "SDMA_BS_BASE_ADDR [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x78)));

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x135);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        VLOG(ERR, "SDMA_NAL_STR_ADDR [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x78)));

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x136);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        VLOG(ERR, "SDMA_IRQ_ADDR     [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x78)));

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x137);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        VLOG(ERR, "SDMA_BS_END_ADDR [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x78)));

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x13A);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        VLOG(ERR, "SDMA_CUR_ADDR    [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x78)));

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x139);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        reg_val = FIORead(0, (W4_REG_BASE + 0x8000 + 0x78));
        VLOG(ERR, "SDMA_STATUS      [%08x] ", reg_val);
        VLOG(ERR, "\t- [2] all_wresp_done : 0x%x  ", (reg_val >> 2) & 0x1);
        VLOG(ERR, "\t- [1] sdma_init_busy : 0x%x  ", (reg_val >> 1) & 0x1);
        VLOG(ERR, "\t- [0] save_busy      : 0x%x  ", (reg_val >> 0) & 0x1);

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x164);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        reg_val = FIORead(0, (W4_REG_BASE + 0x8000 + 0x78));
        VLOG(ERR, "SHU_DBG        [%08x] : shu_unaligned_num (0x%x) ", reg_val, reg_val);

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x169);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        VLOG(ERR, "SHU_NBUF_WPTR    [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x78)));

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x16A);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        VLOG(ERR, "SHU_NBUF_RPTR    [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x78)));

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x16C);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        reg_val = FIORead(0, (W4_REG_BASE + 0x8000 + 0x78));
        VLOG(ERR, "SHU_NBUF_INFO    [%08x] ", reg_val);
        VLOG(ERR, "\t- [5:1] nbuf_remain_byte : 0x%x  ", (reg_val >> 1) & 0x1F);
        VLOG(ERR, "\t- [  0] nbuf_wptr_wrap   : 0x%x  ", (reg_val >> 0) & 0x1);

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x184);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        VLOG(ERR, "CTU_LAST_ENC_POS [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x78)));

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x187);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        VLOG(ERR, "CTU_POS_IN_PIC   [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x78)));

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x110);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        VLOG(ERR, "MIB_EXTADDR      [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x78)));

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x111);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        VLOG(ERR, "MIB_INTADDR      [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x78)));

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x113);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        VLOG(ERR, "MIB_CMD        [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x78)));

        FIOWrite(0, (W4_REG_BASE + 0x8000 + 0x74), (1 << 20) | (1 << 16) | 0x114);
        while ((FIORead(0,(W4_REG_BASE + 0x8000 + 0x7c)) & 0x1) == 0)
            ;
        VLOG(ERR, "MIB_BUSY     [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x78)));

        VLOG(ERR, "DBG_BPU_ENC_NB0    [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x40)));
        VLOG(ERR, "DBG_BPU_CTU_CTRL0  [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x44)));
        VLOG(ERR, "DBG_BPU_CAB_FSM0 [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x48)));
        VLOG(ERR, "DBG_BPU_BIN_GEN0 [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x4C)));
        VLOG(ERR, "DBG_BPU_CAB_MBAE0  [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x50)));
        VLOG(ERR, "DBG_BPU_BUS_BUSY [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x68)));
        VLOG(ERR, "DBG_FIFO_VALID   [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x6C)));
        VLOG(ERR, "DBG_BPU_CTU_CTRL1  [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x54)));
        VLOG(ERR, "DBG_BPU_CTU_CTRL2  [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x58)));
        VLOG(ERR, "DBG_BPU_CTU_CTRL3  [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x5C)));

        for (index = 0x80; index < 0xA0; index += 4) {
            reg_val = FIORead(0, (W4_REG_BASE + 0x8000 + index));
            num = (index - 0x80) / 2;
            VLOG(ERR, "DBG_BIT_STACK    [%08x] : Stack%02d (0x%04x), Stack%02d(0x%04x)  ", reg_val, num, reg_val >> 16, num + 1, reg_val & 0xffff);
        }

        reg_val = FIORead(0, (W4_REG_BASE + 0x8000 + 0xA0));
        VLOG(ERR, "DGB_BIT_CORE_INFO  [%08x] : pc_ctrl_id (0x%04x), pfu_reg_pc(0x%04x) ", reg_val, reg_val >> 16, reg_val & 0xffff);
        reg_val = FIORead(0, (W4_REG_BASE + 0x8000 + 0xA4));
        VLOG(ERR, "DGB_BIT_CORE_INFO  [%08x] : ACC0 (0x%08x) ", reg_val, reg_val);
        reg_val = FIORead(0, (W4_REG_BASE + 0x8000 + 0xA8));
        VLOG(ERR, "DGB_BIT_CORE_INFO  [%08x] : ACC1 (0x%08x) ", reg_val, reg_val);

        reg_val = FIORead(0, (W4_REG_BASE + 0x8000 + 0xAC));
        VLOG(ERR, "DGB_BIT_CORE_INFO  [%08x] : pfu_ibuff_id(0x%04x), pfu_ibuff_op(0x%04x) ", reg_val, reg_val >> 16, reg_val & 0xffff);

        for (num = 0; num < 5; num += 1) {
            reg_val = FIORead(0, (W4_REG_BASE + 0x8000 + 0xB0));
            VLOG(ERR, "DGB_BIT_CORE_INFO  [%08x] : core_pram_rd_en(0x%04x), core_pram_rd_addr(0x%04x) ", reg_val, reg_val >> 16, reg_val & 0xffff);
        }

        VLOG(ERR, "SAO_LUMA_OFFSET  [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0xB4)));
        VLOG(ERR, "SAO_CB_OFFSET  [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0xB8)));
        VLOG(ERR, "SAO_CR_OFFSET  [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0xBC)));

        VLOG(ERR, "GDI_NO_MORE_REQ    [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x8f0)));
        VLOG(ERR, "GDI_EMPTY_FLAG   [%08x] ", FIORead(0,(W4_REG_BASE + 0x8000 + 0x8f4)));

        // --------- VCE register Dump
        VLOG(ERR, "[+] VCE REG Dump\n");
        for (index = 0; index < 0xC4; index += 8) {
            VLOG(ERR, "VCE REG[0x%08x] -> 0x%08x \tVCE REG[0x%08x] -> 0x%08x  ", index, ReadRegVCE(0, 0, 0x0b00 + index), index + 4, ReadRegVCE(0, 0, 0x0b00 + index + 4));
        }
        WriteRegVCE(0, 0, 0x0bc8, 0);

        VLOG(ERR, "DEBUG----------- common ------------------------------- ");
        VLOG(ERR, "DEBUG1 REG[0x%08x] -> 0x%08x\n", 0xcc, ReadRegVCE(0, 0, 0x0bcc));
        VLOG(ERR, "DEBUG2 REG[0x%08x] -> 0x%08x\n", 0xd0, ReadRegVCE(0, 0, 0x0bd0));
        VLOG(ERR, "DEBUG----------- common ------------------------------- ");
        VLOG(ERR, "DEBUG----------- common ------------------------------- ");
        {
            reg_val = ReadRegVCE(0, 0, 0x0bcc);
        }
        VLOG(ERR, "DEBUG1 REG[0x%08x] -> 0x%08x ; SFU %d , LF %d , RDO %d IMD %d FME %d IME %d\n",
                0xcc, ReadRegVCE(0, 0, 0x0bcc),
                ((reg_val >> 5) & 0x1),
                ((reg_val >> 4) & 0x1),
                ((reg_val >> 3) & 0x1),
                ((reg_val >> 2) & 0x1),
                ((reg_val >> 1) & 0x1),
                ((reg_val >> 0) & 0x1));
        //VLOG(ERR,"DEBUG1 REG[0x%08x] -> 0x%08x\n", 0xcc, ReadRegVCE(0, 0, 0x0bcc));
        //VLOG(ERR,"DEBUG2 REG[0x%08x] -> 0x%08x\n", 0xd0, ReadRegVCE(0, 0, 0x0bd0));

        VLOG(ERR, "DEBUG----------- MODE 0 : DCI dequeue/queue counts ---------------------- ");
        WriteRegVCE(0, 0, 0x0bc8, 0); //mode 0 select
        VLOG(ERR, "DCI TUH  READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0bd4) >> 16), (ReadRegVCE(0, 0, 0x0bd4) & 0xffff));
        VLOG(ERR, "DCI CU   READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0bd8) >> 16), (ReadRegVCE(0, 0, 0x0bd8) & 0xffff));
        VLOG(ERR, "DCI CTU  READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0bdc) >> 16), (ReadRegVCE(0, 0, 0x0bdc) & 0xffff));
        VLOG(ERR, "DCI COEF READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0be0) >> 16), (ReadRegVCE(0, 0, 0x0be0) & 0xffff));
        VLOG(ERR, "DCI Full/Empty Info : %08x  ", ReadRegVCE(0, 0, 0x0be4));
        VLOG(ERR, "MODE0 RESERVED : %08x  ", ReadRegVCE(0, 0, 0x0be8));
        VLOG(ERR, "MODE0 RESERVED : %08x  ", ReadRegVCE(0, 0, 0x0bec));

        VLOG(ERR, "DEBUG----------- MODE 1 ---RDO debug --------------------- ");
        WriteRegVCE(0, 0, 0x0bc8, 1); //mode 1 select
        VLOG(ERR, "RDO_DBG1 : %08x  ", ReadRegVCE(0, 0, 0x0bd4));
        VLOG(ERR, "RDO_DBG2 : %08x  ", ReadRegVCE(0, 0, 0x0bd8));
        VLOG(ERR, "RDO_DBG3 : %08x  ", ReadRegVCE(0, 0, 0x0bdc));
        VLOG(ERR, "RDO_DBG4 : %08x  ", ReadRegVCE(0, 0, 0x0be0));
        VLOG(ERR, "RDO_DBG5 : %08x  ", ReadRegVCE(0, 0, 0x0be4));
        VLOG(ERR, "RDO_DBG6 : %08x  ", ReadRegVCE(0, 0, 0x0be8));
        VLOG(ERR, "MODE1 RESERVED : %08x  ", ReadRegVCE(0, 0, 0x0bec));

        VLOG(ERR, "DEBUG----------- MODE 2 ---LF debug ---------------------------- ");
        WriteRegVCE(0, 0, 0x0bc8, 2); //mode 2 select
        reg_val = ReadRegVCE(0, 0, 0x0bd4);
        VLOG(ERR, "LF : %08x  ", reg_val);
        VLOG(ERR, "\t- cur_enc_main_state   : 0x%x  ", (reg_val >> 27) & 0x1F);
        VLOG(ERR, "\t- i_sao_para_valie     : 0x%x  ", (reg_val >> 26) & 0x1);
        VLOG(ERR, "\t- i_sao_fetch_done     : 0x%x  ", (reg_val >> 25) & 0x1);
        VLOG(ERR, "\t- i_global_encode_en   : 0x%x  ", (reg_val >> 24) & 0x1);
        VLOG(ERR, "\t- i_bs_valid           : 0x%x  ", (reg_val >> 23) & 0x1);
        VLOG(ERR, "\t- i_rec_buf_rdo_ready  : 0x%x  ", (reg_val >> 22) & 0x1);
        VLOG(ERR, "\t- o_rec_buf_dbk_hold   : 0x%x  ", (reg_val >> 21) & 0x1);
        VLOG(ERR, "\t- cur_main_state       : 0x%x  ", (reg_val >> 16) & 0x1F);
        VLOG(ERR, "\t- r_lf_pic_dbk_disable : 0x%x  ", (reg_val >> 15) & 0x1);
        VLOG(ERR, "\t- r_lf_pic_sao_disable : 0x%x  ", (reg_val >> 14) & 0x1);
        VLOG(ERR, "\t- para_load_done       : 0x%x  ", (reg_val >> 13) & 0x1);
        VLOG(ERR, "\t- i_rdma_ack_wait      : 0x%x  ", (reg_val >> 12) & 0x1);
        VLOG(ERR, "\t- i_sao_intl_col_done  : 0x%x  ", (reg_val >> 11) & 0x1);
        VLOG(ERR, "\t- i_sao_outbuf_full    : 0x%x  ", (reg_val >> 10) & 0x1);
        VLOG(ERR, "\t- lf_sub_done          : 0x%x  ", (reg_val >> 9) & 0x1);
        VLOG(ERR, "\t- i_wdma_ack_wait      : 0x%x  ", (reg_val >> 8) & 0x1);
        VLOG(ERR, "\t- lf_all_sub_done      : 0x%x  ", (reg_val >> 6) & 0x1);
        VLOG(ERR, "\t- cur_ycbcr            : 0x%x  ", (reg_val >> 5) & 0x3);
        VLOG(ERR, "\t- sub8x8_done          : 0x%x  ", (reg_val >> 0) & 0xF);
        VLOG(ERR, "MODE2 RESERVED : %08x  ", ReadRegVCE(0, 0, 0x0bd4));
        VLOG(ERR, "MODE2 RESERVED : %08x  ", ReadRegVCE(0, 0, 0x0bd8));
        VLOG(ERR, "MODE2 RESERVED : %08x  ", ReadRegVCE(0, 0, 0x0bdc));
        VLOG(ERR, "MODE2 RESERVED : %08x  ", ReadRegVCE(0, 0, 0x0be0));
        VLOG(ERR, "MODE2 RESERVED : %08x  ", ReadRegVCE(0, 0, 0x0be4));
        VLOG(ERR, "MODE2 RESERVED : %08x  ", ReadRegVCE(0, 0, 0x0be8));
        VLOG(ERR, "MODE2 RESERVED : %08x  ", ReadRegVCE(0, 0, 0x0bec));

        VLOG(ERR, "DEBUG----------- MODE 3 --------SFU-------------------- ");
        WriteRegVCE(0, 0, 0x0bc8, 3); //mode 3 select
        VLOG(ERR, "SFU 0 : %08x  ", (ReadRegVCE(0, 0, 0x0bd4)));
        VLOG(ERR, "SFU 1 : %08x  ", (ReadRegVCE(0, 0, 0x0bd8)));
        VLOG(ERR, "SFU 2 : %08x  ", (ReadRegVCE(0, 0, 0x0bdc)));
        VLOG(ERR, "SFU 3 : %08x  ", (ReadRegVCE(0, 0, 0x0be0)));

        VLOG(ERR, "DEBUG----------- MODE 4 --------DCI read/write cnt-------------------- ");
        WriteRegVCE(0, 0, 0x0bc8, 4);
        VLOG(ERR, "DCI TUH  READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0bd4) >> 16), (ReadRegVCE(0, 0, 0x0bd4) & 0xffff));
        VLOG(ERR, "DCI CU   READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0bd8) >> 16), (ReadRegVCE(0, 0, 0x0bd8) & 0xffff));
        VLOG(ERR, "DCI CTU  READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0bdc) >> 16), (ReadRegVCE(0, 0, 0x0bdc) & 0xffff));
        VLOG(ERR, "DCI COEF READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0be0) >> 16), (ReadRegVCE(0, 0, 0x0be0) & 0xffff));

        VLOG(ERR, "DEBUG----------- MODE 5 --------DCI last read data-------------------- ");
        WriteRegVCE(0, 0, 0x0bc8, 5);
        VLOG(ERR, "DCI TUH    last read data : %08x  ", ReadRegVCE(0, 0, 0x0bd4));
        VLOG(ERR, "DCI CTU    last read data : %08x  ", ReadRegVCE(0, 0, 0x0bd8));
        VLOG(ERR, "DCI CU     last read data : %08x  ", ReadRegVCE(0, 0, 0x0bdc));
        VLOG(ERR, "DCI COEF_H last read data : %08x  ", ReadRegVCE(0, 0, 0x0be0));
        VLOG(ERR, "DCI COEF_L last read data : %08x  ", ReadRegVCE(0, 0, 0x0be4));
        VLOG(ERR, "DCI INFO 0               : %08x  ", ReadRegVCE(0, 0, 0x0be8));
        VLOG(ERR, "DCI INFO 1               : %08x  ", ReadRegVCE(0, 0, 0x0beC));

        VLOG(ERR, "DEBUG----------- MODE 6 --------DCI   Big buffer read/write cnt-------------------- ");
        WriteRegVCE(0, 0, 0x0bc8, 6);
        VLOG(ERR, "DCI TUH  READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0bd4) >> 16), (ReadRegVCE(0, 0, 0x0bd4) & 0xffff));
        VLOG(ERR, "DCI CU   READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0bd8) >> 16), (ReadRegVCE(0, 0, 0x0bd8) & 0xffff));
        VLOG(ERR, "DCI COEF READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0bdc) >> 16), (ReadRegVCE(0, 0, 0x0bdc) & 0xffff));
        VLOG(ERR, "DEBUG----------- MODE 6 --------DCI Small buffer read/write cnt-------------------- ");
        VLOG(ERR, "DCI TUH  READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0be0) >> 16), (ReadRegVCE(0, 0, 0x0be0) & 0xffff));
        VLOG(ERR, "DCI CU   READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0be4) >> 16), (ReadRegVCE(0, 0, 0x0be4) & 0xffff));
        VLOG(ERR, "DCI CTU  READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0be8) >> 16), (ReadRegVCE(0, 0, 0x0be8) & 0xffff));
        VLOG(ERR, "DCI COEF READ: %08x, WRITE : %08x  ", (ReadRegVCE(0, 0, 0x0bec) >> 16), (ReadRegVCE(0, 0, 0x0bec) & 0xffff));

        VLOG(ERR, "DEBUG----------- MODE 7 --------DCI   Big buffer read/write address--------------------");
        WriteRegVCE(0, 0, 0x0bc8, 7);
        VLOG(ERR, "DCI TUH  READ: %08x, WRITE : %08x", (ReadRegVCE(0, 0, 0x0bd4) >> 16), (ReadRegVCE(0, 0, 0x0bd4) & 0xffff));
        VLOG(ERR, "DCI CU   READ: %08x, WRITE : %08x", (ReadRegVCE(0, 0, 0x0bd8) >> 16), (ReadRegVCE(0, 0, 0x0bd8) & 0xffff));
        VLOG(ERR, "DCI COEF READ: %08x, WRITE : %08x", (ReadRegVCE(0, 0, 0x0bdc) >> 16), (ReadRegVCE(0, 0, 0x0bdc) & 0xffff));
        VLOG(ERR, "DEBUG----------- MODE 7 --------DCI Small buffer read/write address--------------------");
        VLOG(ERR, "DCI TUH  READ: %08x, WRITE : %08x", (ReadRegVCE(0, 0, 0x0be0) >> 16), (ReadRegVCE(0, 0, 0x0be0) & 0xffff));
        VLOG(ERR, "DCI CU   READ: %08x, WRITE : %08x", (ReadRegVCE(0, 0, 0x0be4) >> 16), (ReadRegVCE(0, 0, 0x0be4) & 0xffff));
        VLOG(ERR, "DCI CTU  READ: %08x, WRITE : %08x", (ReadRegVCE(0, 0, 0x0be8) >> 16), (ReadRegVCE(0, 0, 0x0be8) & 0xffff));
        VLOG(ERR, "DCI COEF READ: %08x, WRITE : %08x", (ReadRegVCE(0, 0, 0x0bec) >> 16), (ReadRegVCE(0, 0, 0x0bec) & 0xffff));

        VLOG(ERR, "DEBUG----------- Others --------------------");
        VLOG(ERR, "DEBUG10 : %08x", (ReadRegVCE(0, 0, 0x0bf0)));
        VLOG(ERR, "DEBUG11 : %08x", (ReadRegVCE(0, 0, 0x0bf4)));
        VLOG(ERR, "DEBUG12 : %08x", (ReadRegVCE(0, 0, 0x0bf8)));
        VLOG(ERR, "-------------------------------------------------------------------------------");
    }
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %edi, %ebx
leaq 0x283ad(%rip), %r14     # 0x2a9dd
movq %r14, %rdi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rbp
movl %ebp, %edi
callq 0x2230
leaq 0x283e3(%rip), %rdi     # 0x2aa2e
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
movq %r14, %rdi
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
movl %ebx, %edi
movl $0x130, %esi            # imm = 0x130
callq 0x2210
movl %eax, %r14d
movl %ebx, %edi
movl $0x134, %esi            # imm = 0x134
callq 0x2210
movl %eax, %r15d
movl %ebx, %edi
movl $0x12c, %esi            # imm = 0x12C
callq 0x2210
movl %eax, %r12d
movl %ebx, %edi
movl $0x128, %esi            # imm = 0x128
callq 0x2210
leaq 0x283d5(%rip), %rdi     # 0x2aa7f
movl %r14d, %esi
movl %r15d, %edx
movl %r12d, %ecx
movl %eax, %r8d
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
leaq 0x298e0(%rip), %rdi     # 0x2bfab
callq 0x2290
movl %ebp, %edi
callq 0x2230
pushq $0x14
popq %r14
pushq $0x1c
popq %r15
leaq 0x591a(%rip), %r13      # 0x8000
xorl %r12d, %r12d
cmpl $0x19, %r12d
je 0x27b1
leal 0x200(%r12), %edx
movl %ebx, %edi
movl %r14d, %esi
callq 0x2160
movl %ebx, %edi
movl %r15d, %esi
callq 0x2210
cmpl $0xf, %r12d
ja 0x273f
leaq 0x283c1(%rip), %rdi     # 0x2aadd
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
movl %r12d, %eax
notl %eax
testb $0x3, %al
jne 0x27a9
pushq $0x20
popq %rdi
callq 0x2230
jmp 0x27a2
leal -0x10(%r12), %ecx
cmpl $0x8, %ecx
ja 0x27a9
movslq (%r13,%rcx,4), %rcx
addq %r13, %rcx
jmpq *%rcx
leaq 0x28364(%rip), %rdi     # 0x2aabe
jmp 0x2799
leaq 0x2839c(%rip), %rdi     # 0x2aaff
jmp 0x2799
leaq 0x2835f(%rip), %rdi     # 0x2aacb
jmp 0x2799
leaq 0x28397(%rip), %rdi     # 0x2ab0c
jmp 0x2799
leaq 0x2839b(%rip), %rdi     # 0x2ab19
jmp 0x2799
leaq 0x28351(%rip), %rdi     # 0x2aad8
jmp 0x2799
leaq 0x28355(%rip), %rdi     # 0x2aae5
jmp 0x2799
leaq 0x28359(%rip), %rdi     # 0x2aaf2
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
incl %r12d
jmp 0x26e9
leaq 0x29805(%rip), %rdi     # 0x2bfbd
callq 0x2290
pushq $0xa
popq %rbp
movl %ebp, %edi
callq 0x2230
movl %ebx, %edi
movl $0x1e8, %esi            # imm = 0x1E8
callq 0x2210
leaq 0x2834c(%rip), %rdi     # 0x2ab26
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
leaq 0x297de(%rip), %rdi     # 0x2bfcf
callq 0x2290
movl %ebp, %edi
callq 0x2230
pushq $0x1f
popq %r12
leaq 0x28331(%rip), %r14     # 0x2ab39
decl %r12d
je 0x2844
movl %ebx, %edi
movl $0x8018, %esi           # imm = 0x8018
callq 0x2030
movl %eax, %r15d
movq %r14, %rdi
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
cmpl $-0x1, %r15d
jne 0x2808
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0x29795(%rip), %rdi     # 0x2bfe0
callq 0x2290
pushq $0xa
popq %rbp
movl %ebp, %edi
callq 0x2230
movl %ebx, %edi
movl $0x806c, %esi           # imm = 0x806C
callq 0x2030
leaq 0x282dc(%rip), %rdi     # 0x2ab49
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x11013c, %edx         # imm = 0x11013C
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x288e
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
movl %eax, %ebx
leaq 0x282af(%rip), %rdi     # 0x2ab62
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rbp
movl %ebp, %edi
callq 0x2230
movl %ebx, %esi
shrl $0x1c, %esi
andl $0x1, %esi
leaq 0x282a6(%rip), %rdi     # 0x2ab7b
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
movl %ebx, %esi
shrl $0x19, %esi
andl $0x7, %esi
leaq 0x282af(%rip), %rdi     # 0x2aba1
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
movl %ebx, %esi
shrl $0x12, %esi
andl $0x7f, %esi
leaq 0x282b8(%rip), %rdi     # 0x2abc7
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
movl %ebx, %esi
shrl $0xd, %esi
andl $0x1f, %esi
leaq 0x282c1(%rip), %rdi     # 0x2abed
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
movl %ebx, %esi
shrl $0xa, %esi
andl $0x1f, %esi
leaq 0x282ca(%rip), %rdi     # 0x2ac13
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
movl %ebx, %r14d
shrl $0x7, %r14d
andl $0x7, %r14d
leaq 0x282d0(%rip), %rdi     # 0x2ac39
movl %r14d, %esi
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
cmpl $0x3, %r14d
jne 0x2990
leaq 0x282d7(%rip), %rdi     # 0x2ac5e
xorl %eax, %eax
callq 0x2050
jmp 0x2998
pushq $0x20
popq %rdi
callq 0x2230
pushq $0xa
popq %rbp
movl %ebp, %edi
callq 0x2230
movl %ebx, %esi
shrl $0x5, %esi
andl $0x3, %esi
leaq 0x282c2(%rip), %rdi     # 0x2ac73
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
movl %ebx, %esi
shrl %esi
andl $0xf, %esi
leaq 0x282cc(%rip), %rdi     # 0x2ac99
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
andl $0x1, %ebx
leaq 0x282da(%rip), %rdi     # 0x2acbf
movl %ebx, %esi
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x11013b, %edx         # imm = 0x11013B
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2a06
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
movl %eax, %ebx
leaq 0x282ba(%rip), %rdi     # 0x2ace5
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rbp
movl %ebp, %edi
callq 0x2230
movl %ebx, %esi
shrl %esi
andl $0x3f, %esi
leaq 0x282b2(%rip), %rdi     # 0x2acfe
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
andl $0x1, %ebx
leaq 0x282c1(%rip), %rdi     # 0x2ad25
movl %ebx, %esi
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x110131, %edx         # imm = 0x110131
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2a85
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
movl %eax, %edx
shrl %edx
andl $0x1, %edx
movl %eax, %ecx
andl $0x1, %ecx
leaq 0x28298(%rip), %rdi     # 0x2ad4c
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rdi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x110134, %edx         # imm = 0x110134
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2ad6
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
leaq 0x28295(%rip), %rdi     # 0x2ad8e
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rdi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x110135, %edx         # imm = 0x110135
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2b1b
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
leaq 0x2826a(%rip), %rdi     # 0x2ada8
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rdi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x110136, %edx         # imm = 0x110136
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2b60
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
leaq 0x2823f(%rip), %rdi     # 0x2adc2
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rdi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x110137, %edx         # imm = 0x110137
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2ba5
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
leaq 0x28214(%rip), %rdi     # 0x2addc
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rdi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x11013a, %edx         # imm = 0x11013A
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2bea
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
leaq 0x281e8(%rip), %rdi     # 0x2adf5
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rdi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x110139, %edx         # imm = 0x110139
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2c2f
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
movl %eax, %ebx
leaq 0x281ba(%rip), %rdi     # 0x2ae0e
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rbp
movl %ebp, %edi
callq 0x2230
movl %ebx, %esi
shrl $0x2, %esi
andl $0x1, %esi
leaq 0x281b1(%rip), %rdi     # 0x2ae27
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
movl %ebx, %esi
shrl %esi
andl $0x1, %esi
leaq 0x281b4(%rip), %rdi     # 0x2ae46
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
andl $0x1, %ebx
leaq 0x281bb(%rip), %rdi     # 0x2ae65
movl %ebx, %esi
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x110164, %edx         # imm = 0x110164
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2ccb
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
leaq 0x28196(%rip), %rdi     # 0x2ae84
movl %eax, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rdi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x110169, %edx         # imm = 0x110169
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2d12
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
leaq 0x28181(%rip), %rdi     # 0x2aeb6
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rdi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x11016a, %edx         # imm = 0x11016A
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2d57
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
leaq 0x28155(%rip), %rdi     # 0x2aecf
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rdi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x11016c, %edx         # imm = 0x11016C
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2d9c
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
movl %eax, %ebx
leaq 0x28127(%rip), %rdi     # 0x2aee8
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rbp
movl %ebp, %edi
callq 0x2230
movl %ebx, %esi
shrl %esi
andl $0x1f, %esi
leaq 0x2811f(%rip), %rdi     # 0x2af01
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
andl $0x1, %ebx
leaq 0x2812a(%rip), %rdi     # 0x2af24
movl %ebx, %esi
xorl %eax, %eax
callq 0x2050
movl %ebp, %edi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x110184, %edx         # imm = 0x110184
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2e1b
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
leaq 0x28109(%rip), %rdi     # 0x2af47
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rdi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x110187, %edx         # imm = 0x110187
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2e60
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
leaq 0x280dd(%rip), %rdi     # 0x2af60
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rdi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x110110, %edx         # imm = 0x110110
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2ea5
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
leaq 0x280b1(%rip), %rdi     # 0x2af79
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rdi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x110111, %edx         # imm = 0x110111
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2eea
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
leaq 0x28085(%rip), %rdi     # 0x2af92
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rdi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x110113, %edx         # imm = 0x110113
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2f2f
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
leaq 0x28059(%rip), %rdi     # 0x2afab
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rdi
callq 0x2230
xorl %edi, %edi
movl $0x8074, %esi           # imm = 0x8074
movl $0x110114, %edx         # imm = 0x110114
callq 0x2070
xorl %edi, %edi
movl $0x807c, %esi           # imm = 0x807C
callq 0x2030
testb $0x1, %al
je 0x2f74
xorl %edi, %edi
movl $0x8078, %esi           # imm = 0x8078
callq 0x2030
leaq 0x2802b(%rip), %rdi     # 0x2afc2
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rbx
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x8040, %esi           # imm = 0x8040
callq 0x2030
leaq 0x2801a(%rip), %rdi     # 0x2afd7
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x8044, %esi           # imm = 0x8044
callq 0x2030
leaq 0x28012(%rip), %rdi     # 0x2aff2
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x8048, %esi           # imm = 0x8048
callq 0x2030
leaq 0x2800a(%rip), %rdi     # 0x2b00d
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x804c, %esi           # imm = 0x804C
callq 0x2030
leaq 0x28000(%rip), %rdi     # 0x2b026
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x8050, %esi           # imm = 0x8050
callq 0x2030
leaq 0x27ff6(%rip), %rdi     # 0x2b03f
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x8068, %esi           # imm = 0x8068
callq 0x2030
leaq 0x27fee(%rip), %rdi     # 0x2b05a
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x806c, %esi           # imm = 0x806C
callq 0x2030
leaq 0x27aba(%rip), %rdi     # 0x2ab49
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x8054, %esi           # imm = 0x8054
callq 0x2030
leaq 0x27fc1(%rip), %rdi     # 0x2b073
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x8058, %esi           # imm = 0x8058
callq 0x2030
leaq 0x27fb9(%rip), %rdi     # 0x2b08e
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x805c, %esi           # imm = 0x805C
callq 0x2030
leaq 0x27fb1(%rip), %rdi     # 0x2b0a9
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl $0x80, %r12d
pushq $0x1
popq %r14
leaq 0x27fab(%rip), %r15     # 0x2b0c4
cmpl $0x9f, %r12d
ja 0x315e
leal 0x8000(%r12), %esi
xorl %edi, %edi
callq 0x2030
leal -0x1(%r14), %edx
movl %eax, %ecx
shrl $0x10, %ecx
movzwl %ax, %r9d
movq %r15, %rdi
movl %eax, %esi
movl %r14d, %r8d
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
addl $0x2, %r14d
addl $0x4, %r12d
jmp 0x3119
xorl %edi, %edi
movl $0x80a0, %esi           # imm = 0x80A0
callq 0x2030
movl %eax, %edx
shrl $0x10, %edx
movl $0xffff, %ebp           # imm = 0xFFFF
movl %eax, %ecx
andl %ebp, %ecx
leaq 0x27f87(%rip), %rdi     # 0x2b106
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rbx
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x80a4, %esi           # imm = 0x80A4
callq 0x2030
leaq 0x27fa6(%rip), %rdi     # 0x2b14b
movl %eax, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x80a8, %esi           # imm = 0x80A8
callq 0x2030
leaq 0x27fac(%rip), %rdi     # 0x2b176
movl %eax, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x80ac, %esi           # imm = 0x80AC
callq 0x2030
movl %eax, %edx
shrl $0x10, %edx
andl %eax, %ebp
leaq 0x27fab(%rip), %rdi     # 0x2b1a1
movl %eax, %esi
movl %ebp, %ecx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
pushq $0x5
popq %rbp
leaq 0x27fd7(%rip), %r14     # 0x2b1e9
xorl %edi, %edi
subl $0x1, %ebp
jb 0x3240
movl $0x80b0, %esi           # imm = 0x80B0
callq 0x2030
movl %eax, %edx
shrl $0x10, %edx
movzwl %ax, %ecx
movq %r14, %rdi
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
jmp 0x3212
movl $0x80b4, %esi           # imm = 0x80B4
callq 0x2030
leaq 0x27fe8(%rip), %rdi     # 0x2b239
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rbx
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x80b8, %esi           # imm = 0x80B8
callq 0x2030
leaq 0x27fdb(%rip), %rdi     # 0x2b252
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x80bc, %esi           # imm = 0x80BC
callq 0x2030
leaq 0x27fcf(%rip), %rdi     # 0x2b269
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x88f0, %esi           # imm = 0x88F0
callq 0x2030
leaq 0x27fc3(%rip), %rdi     # 0x2b280
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
movl $0x88f4, %esi           # imm = 0x88F4
callq 0x2030
leaq 0x27fbb(%rip), %rdi     # 0x2b29b
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
leaq 0x28cfa(%rip), %rdi     # 0x2bff1
callq 0x2290
movl %ebx, %edi
callq 0x2230
leaq 0x27faa(%rip), %r14     # 0x2b2b4
xorl %r15d, %r15d
cmpl $0xc3, %r15d
ja 0x335b
leal 0xb00(%r15), %edx
xorl %edi, %edi
xorl %esi, %esi
callq 0x20a0
movl %eax, %ebp
leal 0xb04(%r15), %edx
xorl %edi, %edi
xorl %esi, %esi
callq 0x20a0
leal 0x4(%r15), %ecx
movq %r14, %rdi
movl %r15d, %esi
movl %ebp, %edx
movl %eax, %r8d
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
addl $0x8, %r15d
jmp 0x330d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbc8, %edx            # imm = 0xBC8
xorl %ecx, %ecx
callq 0x2320
leaq 0x27f79(%rip), %r14     # 0x2b2eb
movq %r14, %rdi
xorl %eax, %eax
callq 0x2050
pushq $0xa
popq %rbx
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbcc, %edx            # imm = 0xBCC
callq 0x20a0
leaq 0x27f89(%rip), %rdi     # 0x2b324
movl $0xcc, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd0, %edx            # imm = 0xBD0
callq 0x20a0
leaq 0x27f7d(%rip), %rdi     # 0x2b342
movl $0xd0, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movq %r14, %rdi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movq %r14, %rdi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbcc, %edx            # imm = 0xBCC
callq 0x20a0
movl %eax, %r14d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbcc, %edx            # imm = 0xBCC
callq 0x20a0
movl %r14d, %ecx
shrl $0x5, %ecx
andl $0x1, %ecx
movl %r14d, %r8d
shrl $0x4, %r8d
andl $0x1, %r8d
movl %r14d, %r9d
shrl $0x3, %r9d
andl $0x1, %r9d
movl %r14d, %r10d
shrl $0x2, %r10d
andl $0x1, %r10d
movl %r14d, %r11d
shrl %r11d
andl $0x1, %r11d
andl $0x1, %r14d
subq $0x8, %rsp
leaq 0x27f02(%rip), %rdi     # 0x2b360
movl $0xcc, %esi
movl %eax, %edx
xorl %eax, %eax
pushq %r14
pushq %r11
pushq %r10
callq 0x2050
addq $0x20, %rsp
movl %ebx, %edi
callq 0x2230
leaq 0x27f29(%rip), %rdi     # 0x2b3ad
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbc8, %edx            # imm = 0xBC8
xorl %ecx, %ecx
callq 0x2320
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd4, %edx            # imm = 0xBD4
callq 0x20a0
movl %eax, %r15d
shrl $0x10, %r15d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd4, %edx            # imm = 0xBD4
callq 0x20a0
movl $0xffff, %ebp           # imm = 0xFFFF
andl %ebp, %eax
leaq 0x27f25(%rip), %r14     # 0x2b3f8
movq %r14, %rdi
movl %r15d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd8, %edx            # imm = 0xBD8
callq 0x20a0
movl %eax, %r12d
shrl $0x10, %r12d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd8, %edx            # imm = 0xBD8
callq 0x20a0
andl %ebp, %eax
leaq 0x27f07(%rip), %r15     # 0x2b41c
movq %r15, %rdi
movl %r12d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbdc, %edx            # imm = 0xBDC
callq 0x20a0
movl %eax, %r12d
shrl $0x10, %r12d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbdc, %edx            # imm = 0xBDC
callq 0x20a0
andl %ebp, %eax
leaq 0x27ee9(%rip), %rdi     # 0x2b440
movl %r12d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe0, %edx            # imm = 0xBE0
callq 0x20a0
movl %eax, %r12d
shrl $0x10, %r12d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe0, %edx            # imm = 0xBE0
callq 0x20a0
andl %ebp, %eax
leaq 0x27ece(%rip), %r13     # 0x2b464
movq %r13, %rdi
movl %r12d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe4, %edx            # imm = 0xBE4
callq 0x20a0
leaq 0x27ec7(%rip), %rdi     # 0x2b488
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe8, %edx            # imm = 0xBE8
callq 0x20a0
leaq 0x27ebf(%rip), %r12     # 0x2b4a5
movq %r12, %rdi
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbec, %edx            # imm = 0xBEC
callq 0x20a0
movq %r12, %rdi
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
leaq 0x27e9c(%rip), %rdi     # 0x2b4bd
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
pushq $0x1
popq %rcx
xorl %edi, %edi
xorl %esi, %esi
movl $0xbc8, %edx            # imm = 0xBC8
callq 0x2320
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd4, %edx            # imm = 0xBD4
callq 0x20a0
leaq 0x27ea4(%rip), %rdi     # 0x2b4f9
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd8, %edx            # imm = 0xBD8
callq 0x20a0
leaq 0x27e91(%rip), %rdi     # 0x2b50b
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbdc, %edx            # imm = 0xBDC
callq 0x20a0
leaq 0x27e7e(%rip), %rdi     # 0x2b51d
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe0, %edx            # imm = 0xBE0
callq 0x20a0
leaq 0x27e6b(%rip), %rdi     # 0x2b52f
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe4, %edx            # imm = 0xBE4
callq 0x20a0
leaq 0x27e58(%rip), %rdi     # 0x2b541
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe8, %edx            # imm = 0xBE8
callq 0x20a0
leaq 0x27e45(%rip), %rdi     # 0x2b553
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbec, %edx            # imm = 0xBEC
callq 0x20a0
leaq 0x27e32(%rip), %rdi     # 0x2b565
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
leaq 0x27e33(%rip), %rdi     # 0x2b57d
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
pushq $0x2
popq %rcx
xorl %edi, %edi
xorl %esi, %esi
movl $0xbc8, %edx            # imm = 0xBC8
callq 0x2320
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd4, %edx            # imm = 0xBD4
callq 0x20a0
movl %eax, %r12d
leaq 0x27e3e(%rip), %rdi     # 0x2b5bf
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0x1b, %esi
leaq 0x27e2d(%rip), %rdi     # 0x2b5cb
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0x1a, %esi
andl $0x1, %esi
leaq 0x27e30(%rip), %rdi     # 0x2b5ec
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0x19, %esi
andl $0x1, %esi
leaq 0x27e33(%rip), %rdi     # 0x2b60d
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0x18, %esi
andl $0x1, %esi
leaq 0x27e36(%rip), %rdi     # 0x2b62e
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0x17, %esi
andl $0x1, %esi
leaq 0x27e39(%rip), %rdi     # 0x2b64f
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0x16, %esi
andl $0x1, %esi
leaq 0x27e3c(%rip), %rdi     # 0x2b670
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0x15, %esi
andl $0x1, %esi
leaq 0x27e3f(%rip), %rdi     # 0x2b691
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0x10, %esi
andl $0x1f, %esi
leaq 0x27e42(%rip), %rdi     # 0x2b6b2
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0xf, %esi
andl $0x1, %esi
leaq 0x27e45(%rip), %rdi     # 0x2b6d3
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0xe, %esi
andl $0x1, %esi
leaq 0x27e48(%rip), %rdi     # 0x2b6f4
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0xd, %esi
andl $0x1, %esi
leaq 0x27e4b(%rip), %rdi     # 0x2b715
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0xc, %esi
andl $0x1, %esi
leaq 0x27e4e(%rip), %rdi     # 0x2b736
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0xb, %esi
andl $0x1, %esi
leaq 0x27e51(%rip), %rdi     # 0x2b757
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0xa, %esi
andl $0x1, %esi
leaq 0x27e54(%rip), %rdi     # 0x2b778
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0x9, %esi
andl $0x1, %esi
leaq 0x27e57(%rip), %rdi     # 0x2b799
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0x8, %esi
andl $0x1, %esi
leaq 0x27e5a(%rip), %rdi     # 0x2b7ba
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0x6, %esi
andl $0x1, %esi
leaq 0x27e5d(%rip), %rdi     # 0x2b7db
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
movl %r12d, %esi
shrl $0x5, %esi
andl $0x3, %esi
leaq 0x27e60(%rip), %rdi     # 0x2b7fc
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
andl $0xf, %r12d
leaq 0x27e68(%rip), %rdi     # 0x2b81d
movl %r12d, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd4, %edx            # imm = 0xBD4
callq 0x20a0
leaq 0x27e63(%rip), %r12     # 0x2b83e
movq %r12, %rdi
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd8, %edx            # imm = 0xBD8
callq 0x20a0
movq %r12, %rdi
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbdc, %edx            # imm = 0xBDC
callq 0x20a0
movq %r12, %rdi
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe0, %edx            # imm = 0xBE0
callq 0x20a0
movq %r12, %rdi
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe4, %edx            # imm = 0xBE4
callq 0x20a0
movq %r12, %rdi
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe8, %edx            # imm = 0xBE8
callq 0x20a0
movq %r12, %rdi
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbec, %edx            # imm = 0xBEC
callq 0x20a0
movq %r12, %rdi
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
leaq 0x27d9b(%rip), %rdi     # 0x2b856
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
pushq $0x3
popq %rcx
xorl %edi, %edi
xorl %esi, %esi
movl $0xbc8, %edx            # imm = 0xBC8
callq 0x2320
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd4, %edx            # imm = 0xBD4
callq 0x20a0
leaq 0x27da0(%rip), %rdi     # 0x2b88f
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd8, %edx            # imm = 0xBD8
callq 0x20a0
leaq 0x27d8a(%rip), %rdi     # 0x2b89e
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbdc, %edx            # imm = 0xBDC
callq 0x20a0
leaq 0x27d74(%rip), %rdi     # 0x2b8ad
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe0, %edx            # imm = 0xBE0
callq 0x20a0
leaq 0x27d5e(%rip), %rdi     # 0x2b8bc
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
leaq 0x27d56(%rip), %rdi     # 0x2b8cb
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
pushq $0x4
popq %rcx
xorl %edi, %edi
xorl %esi, %esi
movl $0xbc8, %edx            # imm = 0xBC8
callq 0x2320
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd4, %edx            # imm = 0xBD4
callq 0x20a0
movl %eax, %r12d
shrl $0x10, %r12d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd4, %edx            # imm = 0xBD4
callq 0x20a0
andl %ebp, %eax
movq %r14, %rdi
movl %r12d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd8, %edx            # imm = 0xBD8
callq 0x20a0
movl %eax, %r12d
shrl $0x10, %r12d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd8, %edx            # imm = 0xBD8
callq 0x20a0
andl %ebp, %eax
movq %r15, %rdi
movl %r12d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbdc, %edx            # imm = 0xBDC
callq 0x20a0
movl %eax, %r12d
shrl $0x10, %r12d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbdc, %edx            # imm = 0xBDC
callq 0x20a0
andl %ebp, %eax
leaq 0x2780a(%rip), %rdi     # 0x2b440
movl %r12d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe0, %edx            # imm = 0xBE0
callq 0x20a0
movl %eax, %r12d
shrl $0x10, %r12d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe0, %edx            # imm = 0xBE0
callq 0x20a0
andl %ebp, %eax
movq %r13, %rdi
movl %r12d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
leaq 0x27c88(%rip), %rdi     # 0x2b913
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
pushq $0x5
popq %rcx
xorl %edi, %edi
xorl %esi, %esi
movl $0xbc8, %edx            # imm = 0xBC8
callq 0x2320
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd4, %edx            # imm = 0xBD4
callq 0x20a0
leaq 0x27c9c(%rip), %rdi     # 0x2b95b
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd8, %edx            # imm = 0xBD8
callq 0x20a0
leaq 0x27c9a(%rip), %rdi     # 0x2b97e
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbdc, %edx            # imm = 0xBDC
callq 0x20a0
leaq 0x27c98(%rip), %rdi     # 0x2b9a1
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe0, %edx            # imm = 0xBE0
callq 0x20a0
leaq 0x27c96(%rip), %rdi     # 0x2b9c4
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe4, %edx            # imm = 0xBE4
callq 0x20a0
leaq 0x27c94(%rip), %rdi     # 0x2b9e7
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe8, %edx            # imm = 0xBE8
callq 0x20a0
leaq 0x27c92(%rip), %rdi     # 0x2ba0a
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbec, %edx            # imm = 0xBEC
callq 0x20a0
leaq 0x27c8f(%rip), %rdi     # 0x2ba2c
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
leaq 0x27c9a(%rip), %rdi     # 0x2ba4e
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
pushq $0x6
popq %rcx
xorl %edi, %edi
xorl %esi, %esi
movl $0xbc8, %edx            # imm = 0xBC8
callq 0x2320
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd4, %edx            # imm = 0xBD4
callq 0x20a0
movl %eax, %r12d
shrl $0x10, %r12d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd4, %edx            # imm = 0xBD4
callq 0x20a0
andl %ebp, %eax
movq %r14, %rdi
movl %r12d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd8, %edx            # imm = 0xBD8
callq 0x20a0
movl %eax, %r12d
shrl $0x10, %r12d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd8, %edx            # imm = 0xBD8
callq 0x20a0
andl %ebp, %eax
movq %r15, %rdi
movl %r12d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbdc, %edx            # imm = 0xBDC
callq 0x20a0
movl %eax, %r12d
shrl $0x10, %r12d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbdc, %edx            # imm = 0xBDC
callq 0x20a0
andl %ebp, %eax
movq %r13, %rdi
movl %r12d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
leaq 0x27c18(%rip), %rdi     # 0x2baa3
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe0, %edx            # imm = 0xBE0
callq 0x20a0
movl %eax, %r12d
shrl $0x10, %r12d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe0, %edx            # imm = 0xBE0
callq 0x20a0
andl %ebp, %eax
movq %r14, %rdi
movl %r12d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe4, %edx            # imm = 0xBE4
callq 0x20a0
movl %eax, %r14d
shrl $0x10, %r14d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe4, %edx            # imm = 0xBE4
callq 0x20a0
andl %ebp, %eax
movq %r15, %rdi
movl %r14d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe8, %edx            # imm = 0xBE8
callq 0x20a0
movl %eax, %r14d
shrl $0x10, %r14d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe8, %edx            # imm = 0xBE8
callq 0x20a0
andl %ebp, %eax
leaq 0x27505(%rip), %rdi     # 0x2b440
movl %r14d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbec, %edx            # imm = 0xBEC
callq 0x20a0
movl %eax, %r14d
shrl $0x10, %r14d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbec, %edx            # imm = 0xBEC
callq 0x20a0
andl %ebp, %eax
movq %r13, %rdi
movl %r14d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
leaq 0x27b68(%rip), %rdi     # 0x2baf8
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
pushq $0x7
popq %rcx
xorl %edi, %edi
xorl %esi, %esi
movl $0xbc8, %edx            # imm = 0xBC8
callq 0x2320
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd4, %edx            # imm = 0xBD4
callq 0x20a0
movl %eax, %r14d
shrl $0x10, %r14d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd4, %edx            # imm = 0xBD4
callq 0x20a0
andl %ebp, %eax
leaq 0x27b75(%rip), %r15     # 0x2bb50
movq %r15, %rdi
movl %r14d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd8, %edx            # imm = 0xBD8
callq 0x20a0
movl %eax, %r14d
shrl $0x10, %r14d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbd8, %edx            # imm = 0xBD8
callq 0x20a0
andl %ebp, %eax
leaq 0x27b55(%rip), %r12     # 0x2bb72
movq %r12, %rdi
movl %r14d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbdc, %edx            # imm = 0xBDC
callq 0x20a0
movl %eax, %r13d
shrl $0x10, %r13d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbdc, %edx            # imm = 0xBDC
callq 0x20a0
andl %ebp, %eax
leaq 0x27b35(%rip), %r14     # 0x2bb94
movq %r14, %rdi
movl %r13d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
leaq 0x27b3a(%rip), %rdi     # 0x2bbb6
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe0, %edx            # imm = 0xBE0
callq 0x20a0
movl %eax, %r13d
shrl $0x10, %r13d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe0, %edx            # imm = 0xBE0
callq 0x20a0
andl %ebp, %eax
movq %r15, %rdi
movl %r13d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe4, %edx            # imm = 0xBE4
callq 0x20a0
movl %eax, %r15d
shrl $0x10, %r15d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe4, %edx            # imm = 0xBE4
callq 0x20a0
andl %ebp, %eax
movq %r12, %rdi
movl %r15d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe8, %edx            # imm = 0xBE8
callq 0x20a0
movl %eax, %r15d
shrl $0x10, %r15d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbe8, %edx            # imm = 0xBE8
callq 0x20a0
andl %ebp, %eax
leaq 0x27ae2(%rip), %rdi     # 0x2bc0e
movl %r15d, %esi
movl %eax, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbec, %edx            # imm = 0xBEC
callq 0x20a0
movl %eax, %r15d
shrl $0x10, %r15d
xorl %edi, %edi
xorl %esi, %esi
movl $0xbec, %edx            # imm = 0xBEC
callq 0x20a0
andl %eax, %ebp
movq %r14, %rdi
movl %r15d, %esi
movl %ebp, %edx
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
leaq 0x27aaf(%rip), %rdi     # 0x2bc30
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbf0, %edx            # imm = 0xBF0
callq 0x20a0
leaq 0x27ab9(%rip), %rdi     # 0x2bc5d
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbf4, %edx            # imm = 0xBF4
callq 0x20a0
leaq 0x27aa3(%rip), %rdi     # 0x2bc6c
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
xorl %edi, %edi
xorl %esi, %esi
movl $0xbf8, %edx            # imm = 0xBF8
callq 0x20a0
leaq 0x27a8d(%rip), %rdi     # 0x2bc7b
movl %eax, %esi
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
callq 0x2230
leaq 0x27a85(%rip), %rdi     # 0x2bc8a
xorl %eax, %eax
callq 0x2050
movl %ebx, %edi
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x2230