// File: /workspace/github_cpp_makefile_star2_O2/martinferianc[P]CPUSimulator-EIE2/src/mips_cpu_execute.cpp
// Function: mips_execute_R_X(mips_cpu_impl*, unsigned int&, unsigned int&, unsigned int const*, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>&, unsigned int&, unsigned int&)
mips_error mips_execute_R_X(mips_cpu_h state, uint32_t& hi, uint32_t& lo, const uint32_t* instruction_data, const string& op, string& instruction, uint32_t& pcN, uint32_t& pc){

	stringstream ss;

	mips_error err = mips_ExceptionInvalidInstruction;;
	uint32_t* source1 = new uint32_t;
	uint32_t* source2 = new uint32_t;
	uint32_t destination = instruction_data[3];
	uint32_t shift = instruction_data[4];

	err = mips_cpu_get_register(state, (unsigned)instruction_data[1], source1);
	if (err==mips_Success)
		err = mips_cpu_get_register(state, (unsigned)instruction_data[2], source2);
	if (err!=mips_Success)
		return mips_ExceptionAccessViolation;

	if (op.compare("ADDU")==0)
		err = mips_cpu_set_register(state, destination, *source1 + *source2);

	if (op.compare("SRL")==0)
		err = mips_cpu_set_register(state, destination, uint32_t(*source2) >> shift);

	if (op.compare("SRA")==0)
		err = mips_cpu_set_register(state, destination, int32_t(*source2) >> shift);

	if (op.compare("SRAV")==0)
		err = mips_cpu_set_register(state, destination, int32_t(*source2) >> (*source1 & 0x1F));

	if (op.compare("SRLV")==0)
		err = mips_cpu_set_register(state, destination, uint32_t(*source2) >> (*source1 & 0x1F));

	if (op.compare("SLL")==0)
		err = mips_cpu_set_register(state, destination, *source2 << shift);

	if (op.compare("SLLV")==0)
		err = mips_cpu_set_register(state, destination, *source2 << (*source1 & 0x1F));

	if (op.compare("SUBU")==0)
		err = mips_cpu_set_register(state, destination, *source1 - *source2);

	if (op.compare("SUB")==0){
		if (!subtraction_overflow(*source1,*source2))
			err = mips_cpu_set_register(state, destination, int32_t(*source1) - int32_t(*source2));
		else
			err = mips_ExceptionArithmeticOverflow;
	}

	if (op.compare("AND")==0)
		err = mips_cpu_set_register(state, destination, *source1 & *source2);

	if (op.compare("OR")==0)
		err = mips_cpu_set_register(state, destination, *source1 | *source2);

	if (op.compare("XOR")==0)
		err = mips_cpu_set_register(state, destination, uint32_t(*source1 ^ *source2));

	if(op.compare("SLT")==0)
		err = mips_cpu_set_register(state, destination, int((int32_t(*source1) < int32_t(*source2))));

	if (op.compare("SLTU")==0)
		err = mips_cpu_set_register(state, destination, int(*source1 < *source2));

	if (op.compare("ADD")==0){
		if (!addition_overflow(*source1 ,*source2))
			err = mips_cpu_set_register(state, destination, *source1 + *source2);
		else
			err = mips_ExceptionArithmeticOverflow;
	}
	if (op.compare("MFLO")==0)
		err = mips_cpu_set_register(state, destination, lo);

	if (op.compare("MTLO")==0){
		lo = *source1;
		err = mips_Success;
	}
	if (op.compare("MFHI")==0)
		err = mips_cpu_set_register(state, destination, hi);

	if (op.compare("MTHI")==0){
		hi = *source1;
		err = mips_Success;
	}
	if (op.compare("MULT")==0){
		int64_t result =  int64_t(*source1) * int64_t(*source2);
		lo = uint32_t(result & 0xFFFFFFFF);
		hi = int32_t((result & 0xFFFFFFFF00000000) >> 32);
		err = mips_Success;
	}
	if (op.compare("MULTU")==0){
		uint64_t result =  uint64_t(*source1) * uint64_t(*source2);
		lo = uint32_t(result & 0xFFFFFFFF);
		hi = (uint32_t(result >> 32 ) & 0xFFFFFFFF);
		err = mips_Success;
	}

	if (op.compare("DIV")==0){
		if (*source2!=0) {
			lo = (int32_t(*source1) / int32_t(*source2));
			hi = (int32_t(*source1) % int32_t(*source2));
			err = mips_Success;
		} else {
			err = mips_ExceptionInvalidInstruction;
		}
	}

	if (op.compare("DIVU")==0){
		if (*source2!=0){
			lo = (uint32_t(*source1) / uint32_t(*source2));
			hi = (uint32_t(*source1) % uint32_t(*source2));
			err = mips_Success;
		} else {
			err = mips_ExceptionInvalidInstruction;
		}
	}

	if (op.compare("JR")==0){
		pc = pcN;
		pcN = *source1;
		err = mips_ExceptionBreak;
	}

	if (op.compare("JALR")==0){
		mips_cpu_set_register(state, destination, pc + 8 );
		pc = pcN;
		pcN = *source1;
		err = mips_ExceptionBreak;
	}


	//COUT OUTPUT
	if ((err==mips_Success) || (err == mips_ExceptionBreak)) {
		if ((op.compare("MTHI")==0) || (op.compare("MTLO")==0) || (op.compare("JR")==0))
		ss <<op<<" R["<<instruction_data[1]<<"]";
		if (op.compare("JALR")==0)
		ss <<op<<" R["<<instruction_data[3]<<"] , R["<<instruction_data[1]<<"]";
		if ((op.compare("MFHI")==0) || (op.compare("MFLO")==0))
		ss <<op<<" R["<<instruction_data[3]<<"]";
		if ((op.compare("SLL")==0)  || (op.compare("SRL")==0) || (op.compare("SRA")==0))
		ss <<op<<" R["<<instruction_data[3]<<"] , R["<<instruction_data[2]<<"], #"<<instruction_data[4];
		if ((op.compare("SLLV")==0) || (op.compare("SRAV")==0) || (op.compare("SRLV")==0))
		ss <<op<<" R["<<instruction_data[3]<<"] , R["<<instruction_data[2]<<"] , R["<<instruction_data[1]<<"]";
		if ((op.compare("SLT")==0) || (op.compare("SLTU")==0))
		ss <<op<<" R["<<instruction_data[3]<<"] , R["<<instruction_data[1]<<"] , R["<<instruction_data[2]<<"]";
		if ((op.compare("MULT")==0) || (op.compare("MULTU")==0) || (op.compare("DIV")==0) || (op.compare("DIVU")==0))
		ss <<op<<" R["<<instruction_data[1]<<"] , R["<<instruction_data[2]<<"]";
		if (ss.str().empty())
		ss <<op<<" R["<<instruction_data[3]<<"] , R["<<instruction_data[1]<<"] , R["<<instruction_data[2]<<"]";
		instruction = ss.str();
	} else
		instruction = "Invalid instruction";


	delete source1; delete source2;
	return err;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x1d8, %rsp            # imm = 0x1D8
movq %r9, %rbx
movq %r8, %r13
movq %rcx, %r12
movq %rdx, 0x18(%rsp)
movq %rsi, 0x28(%rsp)
movq %rdi, %r14
leaq 0x50(%rsp), %rdi
callq 0x3140
pushq $0x4
popq %rdi
callq 0x31d0
movq %rax, 0x8(%rsp)
movq %rbx, 0x20(%rsp)
pushq $0x4
popq %rdi
callq 0x31d0
movq %rax, 0x10(%rsp)
movl 0x4(%r12), %esi
movl 0xc(%r12), %r15d
movl 0x10(%r12), %ebx
movq %r14, %rdi
movq 0x8(%rsp), %rdx
callq 0x4864
movl $0x2004, %ebp           # imm = 0x2004
testl %eax, %eax
jne 0x6784
movl 0x8(%r12), %esi
movq %r14, %rdi
movq 0x10(%rsp), %rdx
callq 0x4864
testl %eax, %eax
jne 0x6784
leaq 0x3787(%rip), %rsi      # 0x9594
movq %r13, %rdi
callq 0x3090
xorl %ebp, %ebp
testl %eax, %eax
jne 0x5e36
movq 0x10(%rsp), %rax
movl (%rax), %edx
movq 0x8(%rsp), %rax
addl (%rax), %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x3b7d(%rip), %rsi      # 0x99ba
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x5e61
movq 0x10(%rsp), %rax
movl (%rax), %edx
movl %ebx, %ecx
shrl %cl, %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x3b12(%rip), %rsi      # 0x997a
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x5e8c
movq 0x10(%rsp), %rax
movl (%rax), %edx
movl %ebx, %ecx
sarl %cl, %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x3b02(%rip), %rsi      # 0x9995
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x5ebc
movq 0x10(%rsp), %rax
movl (%rax), %edx
movq 0x8(%rsp), %rax
movb (%rax), %cl
sarl %cl, %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x3b0f(%rip), %rsi      # 0x99d2
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x5eec
movq 0x10(%rsp), %rax
movl (%rax), %edx
movq 0x8(%rsp), %rax
movb (%rax), %cl
shrl %cl, %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x39bf(%rip), %rsi      # 0x98b2
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x5f17
movq 0x10(%rsp), %rax
movl (%rax), %edx
movl %ebx, %ecx
shll %cl, %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x39ab(%rip), %rsi      # 0x98c9
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x5f47
movq 0x10(%rsp), %rax
movl (%rax), %edx
movq 0x8(%rsp), %rax
movb (%rax), %cl
shll %cl, %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x3ab3(%rip), %rsi      # 0x9a01
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x5f75
movq 0x8(%rsp), %rax
movl (%rax), %edx
movq 0x10(%rsp), %rax
subl (%rax), %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x3a78(%rip), %rsi      # 0x99f4
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x5fbf
movq 0x8(%rsp), %rax
movl (%rax), %edi
movq 0x10(%rsp), %rax
movl (%rax), %esi
callq 0x7422
movl $0x2006, %ebp           # imm = 0x2006
testb %al, %al
jne 0x5fbf
movq 0x8(%rsp), %rax
movl (%rax), %edx
movq 0x10(%rsp), %rax
subl (%rax), %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x35ee(%rip), %rsi      # 0x95b4
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x5fed
movq 0x10(%rsp), %rax
movl (%rax), %edx
movq 0x8(%rsp), %rax
andl (%rax), %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x3a33(%rip), %rsi      # 0x9a27
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x601b
movq 0x10(%rsp), %rax
movl (%rax), %edx
movq 0x8(%rsp), %rax
orl (%rax), %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x3a04(%rip), %rsi      # 0x9a26
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x6049
movq 0x10(%rsp), %rax
movl (%rax), %edx
movq 0x8(%rsp), %rax
xorl (%rax), %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x389a(%rip), %rsi      # 0x98ea
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x607c
movq 0x8(%rsp), %rax
movl (%rax), %eax
xorl %edx, %edx
movq 0x10(%rsp), %rcx
cmpl (%rcx), %eax
setl %dl
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x38d8(%rip), %rsi      # 0x995b
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x60af
movq 0x8(%rsp), %rax
movl (%rax), %eax
xorl %edx, %edx
movq 0x10(%rsp), %rcx
cmpl (%rcx), %eax
setb %dl
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x3478(%rip), %rsi      # 0x952e
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x60f9
movq 0x8(%rsp), %rax
movl (%rax), %edi
movq 0x10(%rsp), %rax
movl (%rax), %esi
callq 0x7456
movl $0x2006, %ebp           # imm = 0x2006
testb %al, %al
jne 0x60f9
movq 0x10(%rsp), %rax
movl (%rax), %edx
movq 0x8(%rsp), %rax
addl (%rax), %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x3719(%rip), %rsi      # 0x9819
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x6120
movq 0x18(%rsp), %rax
movl (%rax), %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
leaq 0x3714(%rip), %rsi      # 0x983b
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x6143
movq 0x8(%rsp), %rax
movl (%rax), %eax
movq 0x18(%rsp), %rcx
movl %eax, (%rcx)
xorl %ebp, %ebp
leaq 0x36bd(%rip), %rsi      # 0x9807
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
movq 0x28(%rsp), %rbx
jne 0x616f
movl (%rbx), %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl %eax, %ebp
movq 0x28(%rsp), %rbx
leaq 0x36b5(%rip), %rsi      # 0x982b
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x618d
movq 0x8(%rsp), %rax
movl (%rax), %eax
movl %eax, (%rbx)
xorl %ebp, %ebp
leaq 0x36b7(%rip), %rsi      # 0x984b
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x61c1
movq 0x8(%rsp), %rax
movl (%rax), %eax
movq 0x10(%rsp), %rcx
movl (%rcx), %ecx
imulq %rax, %rcx
movq 0x18(%rsp), %rax
movl %ecx, (%rax)
shrq $0x20, %rcx
movl %ecx, (%rbx)
xorl %ebp, %ebp
leaq 0x3691(%rip), %rsi      # 0x9859
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x61f5
movq 0x8(%rsp), %rax
movl (%rax), %eax
movq 0x10(%rsp), %rcx
movl (%rcx), %ecx
imulq %rax, %rcx
movq 0x18(%rsp), %rax
movl %ecx, (%rax)
shrq $0x20, %rcx
movl %ecx, (%rbx)
xorl %ebp, %ebp
leaq 0x3506(%rip), %rsi      # 0x9702
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x622f
movq 0x10(%rsp), %rax
movl (%rax), %ecx
testl %ecx, %ecx
je 0x622a
movq 0x8(%rsp), %rax
movl (%rax), %eax
cltd
idivl %ecx
movq 0x18(%rsp), %rcx
movl %eax, (%rcx)
movl %edx, (%rbx)
xorl %ebp, %ebp
jmp 0x622f
movl $0x2005, %ebp           # imm = 0x2005
leaq 0x34d7(%rip), %rsi      # 0x970d
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x626a
movq 0x10(%rsp), %rax
movl (%rax), %ecx
testl %ecx, %ecx
je 0x6265
movq 0x8(%rsp), %rax
movl (%rax), %eax
xorl %edx, %edx
divl %ecx
xorl %ebp, %ebp
movq 0x18(%rsp), %rcx
movl %eax, (%rcx)
movl %edx, (%rbx)
jmp 0x626a
movl $0x2005, %ebp           # imm = 0x2005
movq 0x210(%rsp), %rbx
leaq 0x34de(%rip), %rsi      # 0x9757
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x629f
movl (%rbx), %eax
movq 0x218(%rsp), %rcx
movl %eax, (%rcx)
movq 0x8(%rsp), %rax
movl (%rax), %eax
movl %eax, (%rbx)
movl $0x2000, %ebp           # imm = 0x2000
leaq 0x3495(%rip), %rsi      # 0x973b
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
je 0x62d0
testl $0xffffdfff, %ebp       # imm = 0xFFFFDFFF
je 0x62fc
leaq 0x3a17(%rip), %rsi      # 0x9cd8
movq 0x20(%rsp), %rdi
callq 0x3360
jmp 0x6767
movq 0x218(%rsp), %rbp
movl (%rbp), %edx
addl $0x8, %edx
movq %r14, %rdi
movl %r15d, %esi
callq 0x4884
movl (%rbx), %eax
movl %eax, (%rbp)
movq 0x8(%rsp), %rax
movl (%rax), %eax
movl %eax, (%rbx)
movl $0x2000, %ebp           # imm = 0x2000
leaq 0x3528(%rip), %rsi      # 0x982b
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
je 0x6335
leaq 0x3525(%rip), %rsi      # 0x983b
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
je 0x6335
leaq 0x342e(%rip), %rsi      # 0x9757
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x636d
leaq 0x60(%rsp), %rdi
movq %r13, %rsi
callq 0x31b0
leaq 0x3986(%rip), %rsi      # 0x9ccf
movq %rax, %rdi
callq 0x31c0
movl 0x4(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x3787(%rip), %rsi      # 0x9aec
movq %rax, %rdi
callq 0x31c0
leaq 0x33c7(%rip), %rsi      # 0x973b
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x63d4
leaq 0x60(%rsp), %rdi
movq %r13, %rsi
callq 0x31b0
leaq 0x393b(%rip), %rsi      # 0x9ccf
movq %rax, %rdi
callq 0x31c0
movl 0xc(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x391c(%rip), %rsi      # 0x9ccc
movq %rax, %rdi
callq 0x31c0
movl 0x4(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x3720(%rip), %rsi      # 0x9aec
movq %rax, %rdi
callq 0x31c0
leaq 0x342c(%rip), %rsi      # 0x9807
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
je 0x63fa
leaq 0x342b(%rip), %rsi      # 0x9819
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x6432
leaq 0x60(%rsp), %rdi
movq %r13, %rsi
callq 0x31b0
leaq 0x38c1(%rip), %rsi      # 0x9ccf
movq %rax, %rdi
callq 0x31c0
movl 0xc(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x36c2(%rip), %rsi      # 0x9aec
movq %rax, %rdi
callq 0x31c0
leaq 0x3479(%rip), %rsi      # 0x98b2
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
je 0x646b
leaq 0x356e(%rip), %rsi      # 0x99ba
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
je 0x646b
leaq 0x351b(%rip), %rsi      # 0x997a
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x64cc
leaq 0x60(%rsp), %rdi
movq %r13, %rsi
callq 0x31b0
leaq 0x3850(%rip), %rsi      # 0x9ccf
movq %rax, %rdi
callq 0x31c0
movl 0xc(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x3831(%rip), %rsi      # 0x9ccc
movq %rax, %rdi
callq 0x31c0
movl 0x8(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x381c(%rip), %rsi      # 0x9cd3
movq %rax, %rdi
callq 0x31c0
movl 0x10(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x33f6(%rip), %rsi      # 0x98c9
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
je 0x6505
leaq 0x34af(%rip), %rsi      # 0x9995
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
je 0x6505
leaq 0x34d9(%rip), %rsi      # 0x99d2
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x6575
leaq 0x60(%rsp), %rdi
movq %r13, %rsi
callq 0x31b0
leaq 0x37b6(%rip), %rsi      # 0x9ccf
movq %rax, %rdi
callq 0x31c0
movl 0xc(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x3797(%rip), %rsi      # 0x9ccc
movq %rax, %rdi
callq 0x31c0
movl 0x8(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x377b(%rip), %rsi      # 0x9ccc
movq %rax, %rdi
callq 0x31c0
movl 0x4(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x357f(%rip), %rsi      # 0x9aec
movq %rax, %rdi
callq 0x31c0
leaq 0x336e(%rip), %rsi      # 0x98ea
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
je 0x659b
leaq 0x33cc(%rip), %rsi      # 0x995b
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x660b
leaq 0x60(%rsp), %rdi
movq %r13, %rsi
callq 0x31b0
leaq 0x3720(%rip), %rsi      # 0x9ccf
movq %rax, %rdi
callq 0x31c0
movl 0xc(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x3701(%rip), %rsi      # 0x9ccc
movq %rax, %rdi
callq 0x31c0
movl 0x4(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x36e5(%rip), %rsi      # 0x9ccc
movq %rax, %rdi
callq 0x31c0
movl 0x8(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x34e9(%rip), %rsi      # 0x9aec
movq %rax, %rdi
callq 0x31c0
leaq 0x3239(%rip), %rsi      # 0x984b
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
je 0x6657
leaq 0x3234(%rip), %rsi      # 0x9859
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
je 0x6657
leaq 0x30ca(%rip), %rsi      # 0x9702
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
je 0x6657
leaq 0x30c2(%rip), %rsi      # 0x970d
movq %r13, %rdi
callq 0x3090
testl %eax, %eax
jne 0x66ab
leaq 0x60(%rsp), %rdi
movq %r13, %rsi
callq 0x31b0
leaq 0x3664(%rip), %rsi      # 0x9ccf
movq %rax, %rdi
callq 0x31c0
movl 0x4(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x3645(%rip), %rsi      # 0x9ccc
movq %rax, %rdi
callq 0x31c0
movl 0x8(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x3449(%rip), %rsi      # 0x9aec
movq %rax, %rdi
callq 0x31c0
leaq 0x68(%rsp), %rbx
leaq 0x30(%rsp), %rdi
movq %rbx, %rsi
callq 0x32f0
leaq 0x30(%rsp), %rdi
movq 0x8(%rdi), %r14
callq 0x30d0
testq %r14, %r14
jne 0x6740
leaq 0x60(%rsp), %rdi
movq %r13, %rsi
callq 0x31b0
leaq 0x35eb(%rip), %rsi      # 0x9ccf
movq %rax, %rdi
callq 0x31c0
movl 0xc(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x35cc(%rip), %rsi      # 0x9ccc
movq %rax, %rdi
callq 0x31c0
movl 0x4(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x35b0(%rip), %rsi      # 0x9ccc
movq %rax, %rdi
callq 0x31c0
movl 0x8(%r12), %esi
movq %rax, %rdi
callq 0x3120
leaq 0x33b4(%rip), %rsi      # 0x9aec
movq %rax, %rdi
callq 0x31c0
leaq 0x30(%rsp), %rdi
movq %rbx, %rsi
callq 0x32f0
leaq 0x30(%rsp), %rbx
movq 0x20(%rsp), %rdi
movq %rbx, %rsi
callq 0x3240
movq %rbx, %rdi
callq 0x30d0
pushq $0x4
popq %rbx
movq 0x8(%rsp), %rdi
movq %rbx, %rsi
callq 0x31e0
movq 0x10(%rsp), %rdi
movq %rbx, %rsi
callq 0x31e0
leaq 0x50(%rsp), %rdi
callq 0x3160
movl %ebp, %eax
addq $0x1d8, %rsp            # imm = 0x1D8
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
jmp 0x67aa
jmp 0x67aa
jmp 0x67aa
jmp 0x67aa
movq %rax, %rbx
leaq 0x50(%rsp), %rdi
callq 0x3160
movq %rbx, %rdi
callq 0x3330