LLM4Binary/decompile-bench-makefile huggingface dataset:
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_to_int32
int32 float128_to_int32(float128 a, float_status *status)
{
    flag aSign;
    int32 aExp, shiftCount;
    uint64_t aSig0, aSig1;

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) aSign = 0;
    if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
    aSig0 |= ( aSig1 != 0 );
    shiftCount = 0x4028 - aExp;
    if ( 0 < shiftCount ) shift64RightJamming( aSig0, shiftCount, &aSig0 );
    return roundAndPackInt32(aSign, aSig0, status);

}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
movabsq $0xffffffffffff, %rax   # imm = 0xFFFFFFFFFFFF
movq %rsi, %rbp
andq %rax, %rbp
movq %rsi, %r13
shrq $0x30, %r13
andl $0x7fff, %r13d          # imm = 0x7FFF
leaq 0x1(%rbp,%rax), %rax
cmoveq %rbp, %rax
xorl %esi, %esi
testq %rdi, %rdi
setne %sil
orq %rax, %rsi
movq %rsi, (%rsp)
cmpl $0x4027, %r13d          # imm = 0x4027
ja 0x102df
movl $0x4028, %eax           # imm = 0x4028
subl %r13d, %eax
movq %rsp, %r12
movq %rsi, %rdi
movq %rax, %rsi
movq %r12, %rdx
callq 0x93e7
movq (%r12), %rsi
shrq $0x3f, %r14
xorl %edi, %edi
orq %r15, %rbp
cmovel %r14d, %edi
cmpl $0x7fff, %r13d          # imm = 0x7FFF
cmovnel %r14d, %edi
movq %rbx, %rdx
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x9a4b
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_to_int32_round_to_zero
int32 float128_to_int32_round_to_zero(float128 a, float_status *status)
{
    flag aSign;
    int32 aExp, shiftCount;
    uint64_t aSig0, aSig1, savedASig;
    int32_t z;

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    aSig0 |= ( aSig1 != 0 );
    if ( 0x401E < aExp ) {
        if ( ( aExp == 0x7FFF ) && aSig0 ) aSign = 0;
        goto invalid;
    }
    else if ( aExp < 0x3FFF ) {
        if (aExp || aSig0) {
            status->float_exception_flags |= float_flag_inexact;
        }
        return 0;
    }
    aSig0 |= LIT64( 0x0001000000000000 );
    shiftCount = 0x402F - aExp;
    savedASig = aSig0;
    aSig0 >>= shiftCount;
    z = aSig0;
    if ( aSign ) z = - z;
    if ( ( z < 0 ) ^ aSign ) {
 invalid:
        float_raise(float_flag_invalid, status);
        return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
    }
    if ( ( aSig0<<shiftCount ) != savedASig ) {
        status->float_exception_flags |= float_flag_inexact;
    }
    return z;

}

// Assembly:
movabsq $0xffffffffffff, %rcx   # imm = 0xFFFFFFFFFFFF
movq %rsi, %r10
andq %rcx, %r10
movq %rsi, %rax
shrq $0x30, %rax
andl $0x7fff, %eax           # imm = 0x7FFF
movq %rsi, %r8
shrq $0x3f, %r8
xorl %r9d, %r9d
testq %rdi, %rdi
setne %r9b
orq %r10, %r9
cmpl $0x401f, %eax           # imm = 0x401F
jb 0x1036c
movzbl %r8b, %ecx
xorl %esi, %esi
testq %r9, %r9
cmovel %ecx, %esi
cmpl $0x7fff, %eax           # imm = 0x7FFF
cmovnel %ecx, %esi
movl %esi, %r8d
orb $0x1, 0x2(%rdx)
cmpb $0x1, %r8b
movl $0x80000000, %eax       # imm = 0x80000000
sbbl $0x0, %eax
retq
cmpl $0x3ffe, %eax           # imm = 0x3FFE
ja 0x1038c
testl %eax, %eax
setne %al
testq %r9, %r9
setne %cl
orb %al, %cl
xorl %eax, %eax
cmpb $0x1, %cl
jne 0x1038b
orb $0x20, 0x2(%rdx)
retq
leaq (%rcx,%r9), %rdi
incq %rdi
movl $0x402f, %ecx           # imm = 0x402F
subl %eax, %ecx
movq %rdi, %r9
shrq %cl, %r9
movl %r9d, %eax
negl %eax
testq %rsi, %rsi
cmovnsl %r9d, %eax
movl %eax, %esi
shrl $0x1f, %esi
cmpl %r8d, %esi
jne 0x1035b
shlq %cl, %r9
cmpq %rdi, %r9
jne 0x10387
jmp 0x1038b
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_to_int64
int64 float128_to_int64(float128 a, float_status *status)
{
    flag aSign;
    int32 aExp, shiftCount;
    uint64_t aSig0, aSig1;

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
    shiftCount = 0x402F - aExp;
    if ( shiftCount <= 0 ) {
        if ( 0x403E < aExp ) {
            float_raise(float_flag_invalid, status);
            if (    ! aSign
                 || (    ( aExp == 0x7FFF )
                      && ( aSig1 || ( aSig0 != LIT64( 0x0001000000000000 ) ) )
                    )
               ) {
                return LIT64( 0x7FFFFFFFFFFFFFFF );
            }
            return (int64_t) LIT64( 0x8000000000000000 );
        }
        shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 );
    }
    else {
        shift64ExtraRightJamming( aSig0, aSig1, shiftCount, &aSig0, &aSig1 );
    }
    return roundAndPackInt64(aSign, aSig0, aSig1, status);

}

// Assembly:
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r8
movabsq $0xffffffffffff, %rax   # imm = 0xFFFFFFFFFFFF
movq %rdi, 0x10(%rsp)
movq %rsi, %rdi
andq %rax, %rdi
movq %rdi, 0x8(%rsp)
movq %rsi, %rcx
shrq $0x30, %rcx
andl $0x7fff, %ecx           # imm = 0x7FFF
je 0x10450
leaq (%rax,%rdi), %rsi
incq %rsi
movq %rsi, 0x8(%rsp)
cmpl $0x402f, %ecx           # imm = 0x402F
jb 0x1044d
cmpl $0x403f, %ecx           # imm = 0x403F
jb 0x10491
movabsq $0x7fffffffffffffff, %rax # imm = 0x7FFFFFFFFFFFFFFF
orb $0x1, 0x2(%rbx)
testq %r14, %r14
jns 0x10441
leaq 0x1(%rax), %rdx
orq %r8, %rdi
cmoveq %rdx, %rax
cmpl $0x7fff, %ecx           # imm = 0x7FFF
cmovneq %rdx, %rax
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq
movq %rsi, %rdi
movl $0x402f, %edx           # imm = 0x402F
subl %ecx, %edx
leaq 0x8(%rsp), %r15
leaq 0x10(%rsp), %r12
movq %r8, %rsi
movq %r15, %rcx
movq %r12, %r8
callq 0x9cb8
movq (%r15), %rsi
movq (%r12), %rdx
shrq $0x3f, %r14
movzbl %r14b, %edi
movq %rbx, %rcx
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
jmp 0x9d0f
addl $0xffffbfd1, %ecx       # imm = 0xFFFFBFD1
movq %r8, %rdx
shlq %cl, %rdx
testl %ecx, %ecx
je 0x10476
movl %ecx, %ecx
shlq %cl, %rsi
negb %cl
shrq %cl, %r8
orq %r8, %rsi
jmp 0x10476
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_to_float32
float32 float128_to_float32(float128 a, float_status *status)
{
    flag aSign;
    int32 aExp;
    uint64_t aSig0, aSig1;
    uint32_t zSig;

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 ) {
            return commonNaNToFloat32(float128ToCommonNaN(a, status), status);
        }
        return packFloat32( aSign, 0xFF, 0 );
    }
    aSig0 |= ( aSig1 != 0 );
    shift64RightJamming( aSig0, 18, &aSig0 );
    zSig = aSig0;
    if ( aExp || zSig ) {
        zSig |= 0x40000000;
        aExp -= 0x3F81;
    }
    return roundAndPackFloat32(aSign, aExp, zSig, status);

}

// Assembly:
pushq %r14
pushq %rbx
subq $0x18, %rsp
movq %rdx, %rbx
movq %rsi, %rcx
movq %rdi, %rsi
movabsq $0xffffffffffff, %r8    # imm = 0xFFFFFFFFFFFF
andq %rcx, %r8
movq %rcx, %rdi
shrq $0x30, %rdi
movl $0x7fff, %edx           # imm = 0x7FFF
andl %edx, %edi
movq %rcx, %rax
shrq $0x3f, %rax
cmpl %edx, %edi
jne 0x10638
orq %rsi, %r8
je 0x10692
movq %rsp, %r14
movq %r14, %rdi
movq %rcx, %rdx
movq %rbx, %rcx
callq 0x106a2
movq 0x8(%r14), %rax
shrq $0x29, %rax
movl (%r14), %ecx
shll $0x1f, %ecx
testq %rax, %rax
leal 0x7f800000(%rcx,%rax), %eax
movl $0x7fc00000, %ecx       # imm = 0x7FC00000
cmovel %ecx, %eax
cmpb $0x0, 0x6(%rbx)
cmovnel %ecx, %eax
jmp 0x1069a
xorl %r9d, %r9d
testq %rsi, %rsi
setne %r9b
shrq $0x12, %r8
andl $0x3ffff, %ecx          # imm = 0x3FFFF
xorl %edx, %edx
orq %r9, %rcx
setne %dl
orq %r8, %rdx
testl %edi, %edi
setne %cl
testq %rdx, %rdx
setne %r8b
orb %cl, %r8b
orl $0x40000000, %edx       # imm = 0x40000000
addl $0xffffc07f, %edi       # imm = 0xFFFFC07F
movslq %edi, %rsi
xorl %ecx, %ecx
testb %r8b, %r8b
cmoveq %rcx, %rsi
cmovel %ecx, %edx
movl %eax, %edi
movq %rbx, %rcx
addq $0x18, %rsp
popq %rbx
popq %r14
jmp 0x9421
shll $0x1f, %eax
orl $0x7f800000, %eax       # imm = 0x7F800000
addq $0x18, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/./softfloat-specialize.h
// Function: float128ToCommonNaN
static commonNaNT float128ToCommonNaN(float128 a, float_status *status)
{
    commonNaNT z;

    if (float128_is_signaling_nan(a)) {
        float_raise(float_flag_invalid, status);
    }
    z.sign = a.high>>63;
    shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
    return z;
}

// Assembly:
movq %rdi, %rax
movabsq $0x7fff800000000000, %rdi # imm = 0x7FFF800000000000
andq %rdx, %rdi
movabsq $0x7fff000000000000, %r8 # imm = 0x7FFF000000000000
cmpq %r8, %rdi
jne 0x106d7
movabsq $0x7fffffffffff, %rdi   # imm = 0x7FFFFFFFFFFF
andq %rdx, %rdi
orq %rsi, %rdi
je 0x106d7
orb $0x1, 0x2(%rcx)
movq %rdx, %rcx
shrq $0x3f, %rcx
movb %cl, (%rax)
shldq $0x10, %rsi, %rdx
shlq $0x10, %rsi
movq %rsi, 0x10(%rax)
movq %rdx, 0x8(%rax)
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_to_float64
float64 float128_to_float64(float128 a, float_status *status)
{
    flag aSign;
    int32 aExp;
    uint64_t aSig0, aSig1;

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 ) {
            return commonNaNToFloat64(float128ToCommonNaN(a, status), status);
        }
        return packFloat64( aSign, 0x7FF, 0 );
    }
    shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );
    aSig0 |= ( aSig1 != 0 );
    if ( aExp || aSig0 ) {
        aSig0 |= LIT64( 0x4000000000000000 );
        aExp -= 0x3C01;
    }
    return roundAndPackFloat64(aSign, aExp, aSig0, status);

}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
subq $0x20, %rsp
movq %rdx, %rbx
movq %rsi, %rax
movq %rdi, %rsi
movabsq $0xffffffffffff, %rdi   # imm = 0xFFFFFFFFFFFF
andq %rax, %rdi
movq %rax, %rcx
shrq $0x30, %rcx
movl $0x7fff, %edx           # imm = 0x7FFF
andl %edx, %ecx
cmpl %edx, %ecx
jne 0x10780
movabsq $0x7ff0000000000000, %r15 # imm = 0x7FF0000000000000
orq %rsi, %rdi
je 0x107d3
leaq 0x8(%rsp), %r14
movq %r14, %rdi
movq %rax, %rdx
movq %rbx, %rcx
callq 0x106a2
movq 0x8(%r14), %rcx
movq %rcx, %rdx
shrq $0xc, %rdx
movl (%r14), %eax
shlq $0x3f, %rax
orq %rdx, %rax
orq %r15, %rax
cmpq $0x1000, %rcx           # imm = 0x1000
movabsq $0x7ff8000000000000, %rcx # imm = 0x7FF8000000000000
cmovbq %rcx, %rax
cmpb $0x0, 0x6(%rbx)
cmovneq %rcx, %rax
jmp 0x107e3
shrq $0x3f, %rax
shldq $0xe, %rsi, %rdi
xorl %edx, %edx
shlq $0xe, %rsi
setne %dl
orq %rdi, %rdx
testl %ecx, %ecx
setne %sil
testq %rdx, %rdx
setne %dil
orb %sil, %dil
btsq $0x3e, %rdx
addl $0xffffc3ff, %ecx       # imm = 0xFFFFC3FF
movslq %ecx, %rsi
xorl %ecx, %ecx
testb %dil, %dil
cmoveq %rcx, %rdx
cmoveq %rcx, %rsi
movl %eax, %edi
movq %rbx, %rcx
addq $0x20, %rsp
popq %rbx
popq %r14
popq %r15
jmp 0x973e
movabsq $-0x8000000000000000, %rcx # imm = 0x8000000000000000
andq %rcx, %rax
orq %r15, %rax
addq $0x20, %rsp
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_to_floatx80
floatx80 float128_to_floatx80(float128 a, float_status *status)
{
    flag aSign;
    int32 aExp;
    uint64_t aSig0, aSig1;

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp == 0x7FFF ) {
        if ( aSig0 | aSig1 ) {
            return commonNaNToFloatx80(float128ToCommonNaN(a, status), status);
        }
        return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
    }
    if ( aExp == 0 ) {
        if ( ( aSig0 | aSig1 ) == 0 ) return packFloatx80( aSign, 0, 0 );
        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
    }
    else {
        aSig0 |= LIT64( 0x0001000000000000 );
    }
    shortShift128Left( aSig0, aSig1, 15, &aSig0, &aSig1 );
    return roundAndPackFloatx80(80, aSign, aExp, aSig0, aSig1, status);

}

// Assembly:
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x30, %rsp
movq %rdx, %r14
movq %rdi, %r8
movabsq $0xffffffffffff, %rcx   # imm = 0xFFFFFFFFFFFF
movq %rdi, 0x8(%rsp)
movq %rsi, %rdi
andq %rcx, %rdi
movq %rdi, 0x10(%rsp)
movq %rsi, %rdx
shrq $0x30, %rdx
movq %rsi, %rbx
shrq $0x3f, %rbx
andl $0x7fff, %edx           # imm = 0x7FFF
movl %edx, 0x4(%rsp)
je 0x108a1
cmpl $0x7fff, %edx           # imm = 0x7FFF
jne 0x108d6
orq %r8, %rdi
je 0x10900
movq %rsi, %rax
movabsq $-0x4000000000000000, %r15 # imm = 0xC000000000000000
leaq 0x18(%rsp), %rdi
movq %r8, %rsi
movq %rax, %rdx
movq %r14, %rcx
callq 0x106a2
movw $0xffff, %bx            # imm = 0xFFFF
cmpb $0x0, 0x6(%r14)
jne 0x1091b
movq 0x20(%rsp), %rax
cmpq $0x2, %rax
jb 0x1091b
shrq %rax
btsq $0x3f, %rax
movl 0x18(%rsp), %ebx
shll $0xf, %ebx
orl $0x7fff, %ebx           # imm = 0x7FFF
movq %rax, %r15
jmp 0x1091b
movq %rdi, %rax
orq %r8, %rax
je 0x10915
leaq 0x4(%rsp), %r15
leaq 0x10(%rsp), %r12
leaq 0x8(%rsp), %r13
movq %r8, %rsi
movq %r15, %rdx
movq %r12, %rcx
movq %r13, %r8
callq 0x1092e
movq (%r12), %rcx
movq (%r13), %r8
movl (%r15), %edx
jmp 0x108dc
addq %rdi, %rcx
incq %rcx
shldq $0xf, %r8, %rcx
shlq $0xf, %r8
movzbl %bl, %esi
pushq $0x50
popq %rdi
movq %r14, %r9
addq $0x30, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
jmp 0xf265
shll $0xf, %ebx
orl $0x7fff, %ebx           # imm = 0x7FFF
movabsq $-0x8000000000000000, %r15 # imm = 0x8000000000000000
jmp 0x1091b
shll $0xf, %ebx
xorl %r15d, %r15d
movq %r15, %rax
movl %ebx, %edx
addq $0x30, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: normalizeFloat128Subnormal
static void
 normalizeFloat128Subnormal(
     uint64_t aSig0,
     uint64_t aSig1,
     int32 *zExpPtr,
     uint64_t *zSig0Ptr,
     uint64_t *zSig1Ptr
 )
{
    int8 shiftCount;

    if ( aSig0 == 0 ) {
        shiftCount = countLeadingZeros64( aSig1 ) - 15;
        if ( shiftCount < 0 ) {
            *zSig0Ptr = aSig1>>( - shiftCount );
            *zSig1Ptr = aSig1<<( shiftCount & 63 );
        }
        else {
            *zSig0Ptr = aSig1<<shiftCount;
            *zSig1Ptr = 0;
        }
        *zExpPtr = - shiftCount - 63;
    }
    else {
        shiftCount = countLeadingZeros64( aSig0 ) - 15;
        shortShift128Left( aSig0, aSig1, shiftCount, zSig0Ptr, zSig1Ptr );
        *zExpPtr = 1 - shiftCount;
    }

}

// Assembly:
movq %rcx, %rax
testq %rdi, %rdi
je 0x10974
bsrq %rdi, %r10
xorl $0x3f, %r10d
addb $-0xf, %r10b
movsbq %r10b, %r9
movq %rsi, %r11
movl %r9d, %ecx
shlq %cl, %r11
movq %r11, (%r8)
testb %r9b, %r9b
je 0x10969
movl %r10d, %ecx
shlq %cl, %rdi
negb %r10b
movl %r10d, %ecx
shrq %cl, %rsi
orq %rsi, %rdi
movq %rdi, (%rax)
pushq $0x1
popq %rax
subl %r9d, %eax
jmp 0x109be
testq %rsi, %rsi
je 0x10983
bsrq %rsi, %rdi
xorq $0x3f, %rdi
jmp 0x10986
pushq $0x40
popq %rdi
addb $-0xf, %dil
movsbl %dil, %r9d
movq %rsi, %rcx
shrq $0x31, %rcx
je 0x109a8
movl %edi, %ecx
negb %cl
movq %rsi, %r10
shrq %cl, %r10
movl %edi, %ecx
shlq %cl, %rsi
jmp 0x109b2
movl %edi, %ecx
shlq %cl, %rsi
movq %rsi, %r10
xorl %esi, %esi
movq %r10, (%rax)
movq %rsi, (%r8)
pushq $-0x3f
popq %rax
subl %r9d, %eax
movl %eax, (%rdx)
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/./softfloat-specialize.h
// Function: propagateFloat128NaN
static float128 propagateFloat128NaN(float128 a, float128 b,
                                     float_status *status)
{
    flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
    flag aIsLargerSignificand;

    aIsQuietNaN = float128_is_quiet_nan( a );
    aIsSignalingNaN = float128_is_signaling_nan( a );
    bIsQuietNaN = float128_is_quiet_nan( b );
    bIsSignalingNaN = float128_is_signaling_nan( b );

    if (aIsSignalingNaN | bIsSignalingNaN) {
        float_raise(float_flag_invalid, status);
    }

    if (status->default_nan_mode) {
        a.low = float128_default_nan_low;
        a.high = float128_default_nan_high;
        return a;
    }

    if (lt128(a.high<<1, a.low, b.high<<1, b.low)) {
        aIsLargerSignificand = 0;
    } else if (lt128(b.high<<1, b.low, a.high<<1, a.low)) {
        aIsLargerSignificand = 1;
    } else {
        aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
    }

    if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
                aIsLargerSignificand)) {
        return float128_maybe_silence_nan(b);
    } else {
        return float128_maybe_silence_nan(a);
    }
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rcx, %rbx
movq %rdx, %r15
movq %rsi, %r14
movq %rdi, %r12
movabsq $0x7fff800000000000, %rdx # imm = 0x7FFF800000000000
leaq (%rsi,%rsi), %rcx
movq %rcx, %rax
shrq $0x30, %rax
movl $0xffff, %r9d           # imm = 0xFFFF
cmpl %r9d, %eax
setae 0x7(%rsp)
movabsq $0xffffffffffff, %r10   # imm = 0xFFFFFFFFFFFF
andq %r10, %rsi
orq %rdi, %rsi
setne %r11b
movq %r14, %rsi
andq %rdx, %rsi
movabsq $0x7fff000000000000, %r13 # imm = 0x7FFF000000000000
cmpq %r13, %rsi
sete %dil
movabsq $0x7fffffffffff, %rax   # imm = 0x7FFFFFFFFFFF
movq %r14, %rsi
andq %rax, %rsi
orq %r12, %rsi
setne %sil
andb %dil, %sil
leaq (%rbx,%rbx), %rdi
movq %rdi, %rbp
shrq $0x30, %rbp
cmpl %r9d, %ebp
setae %r9b
andq %rbx, %r10
orq %r15, %r10
setne %bpl
movq %rbx, %r10
andq %rdx, %r10
cmpq %r13, %r10
sete %r13b
andq %rbx, %rax
orq %r15, %rax
setne %r10b
andb %r13b, %r10b
movl %esi, %eax
orb %r10b, %al
cmpb $0x1, %al
jne 0x10d64
orb $0x1, 0x2(%r8)
cmpb $0x0, 0x6(%r8)
je 0x10d6f
xorl %eax, %eax
jmp 0x10de3
movb 0x7(%rsp), %al
andb %r11b, %al
andb %bpl, %r9b
cmpq %rdi, %rcx
sete %dl
cmpq %r15, %r12
setb %r11b
xorl %r8d, %r8d
cmpq %rdi, %rcx
jb 0x10db4
andb %dl, %r11b
jne 0x10db4
cmpq %rdi, %rcx
sete %dl
cmpq %r12, %r15
setb %r11b
movb $0x1, %r8b
cmpq %rcx, %rdi
jb 0x10db4
andb %dl, %r11b
jne 0x10db4
cmpq %rbx, %r14
setb %r8b
movzbl %al, %edi
movzbl %sil, %esi
movzbl %r9b, %edx
movzbl %r10b, %ecx
movzbl %r8b, %r8d
callq 0x1336a
testl %eax, %eax
je 0x10dd8
movq %r15, %rdi
movq %rbx, %rsi
jmp 0x10dde
movq %r12, %rdi
movq %r14, %rsi
callq 0x91a8
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/./softfloat-macros.h
// Function: shift128ExtraRightJamming
static inline void
 shift128ExtraRightJamming(
     uint64_t a0,
     uint64_t a1,
     uint64_t a2,
     int_fast16_t count,
     uint64_t *z0Ptr,
     uint64_t *z1Ptr,
     uint64_t *z2Ptr
 )
{
    uint64_t z0, z1, z2;
    int8 negCount = ( - count ) & 63;

    if ( count == 0 ) {
        z2 = a2;
        z1 = a1;
        z0 = a0;
    }
    else {
        if ( count < 64 ) {
            z2 = a1<<negCount;
            z1 = ( a0<<negCount ) | ( a1>>count );
            z0 = a0>>count;
        }
        else {
            if ( count == 64 ) {
                z2 = a1;
                z1 = a0;
            }
            else {
                a2 |= a1;
                if ( count < 128 ) {
                    z2 = a0<<negCount;
                    z1 = a0>>( count & 63 );
                }
                else {
                    z2 = ( count == 128 ) ? a0 : ( a0 != 0 );
                    z1 = 0;
                }
            }
            z0 = 0;
        }
        z2 |= ( a2 != 0 );
    }
    *z2Ptr = z2;
    *z1Ptr = z1;
    *z0Ptr = z0;

}

// Assembly:
pushq %rbx
movq 0x10(%rsp), %r10
testq %rcx, %rcx
je 0x115f1
movq %rcx, %rax
negb %cl
andb $0x3f, %cl
cmpq $0x3f, %rax
jg 0x115a8
movq %rsi, %r11
shlq %cl, %r11
movq %rdi, %rbx
shlq %cl, %rbx
movl %eax, %ecx
shrq %cl, %rsi
shrq %cl, %rdi
orq %rbx, %rsi
movq %rdi, %rax
movq %rsi, %rdi
movq %r11, %rsi
jmp 0x115dd
cmpq $0x40, %rax
je 0x115c2
orq %rsi, %rdx
cmpq $0x7f, %rax
ja 0x115c6
movq %rdi, %rsi
shlq %cl, %rsi
movl %eax, %ecx
shrq %cl, %rdi
xorl %eax, %eax
jmp 0x115dd
xorl %esi, %esi
testq %rdi, %rdi
setne %sil
cmpq $0x80, %rax
cmoveq %rdi, %rsi
xorl %eax, %eax
xorl %edi, %edi
xorl %ecx, %ecx
testq %rdx, %rdx
setne %cl
orq %rsi, %rcx
movq %rdi, %rsi
movq %rax, %rdi
movq %rcx, %rdx
movq %rdx, (%r10)
movq %rsi, (%r9)
movq %rdi, (%r8)
popq %rbx
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/./softfloat-macros.h
// Function: mul128By64To192
static inline void
 mul128By64To192(
     uint64_t a0,
     uint64_t a1,
     uint64_t b,
     uint64_t *z0Ptr,
     uint64_t *z1Ptr,
     uint64_t *z2Ptr
 )
{
    uint64_t z0, z1, z2, more1;

    mul64To128( a1, b, &z1, &z2 );
    mul64To128( a0, b, &z0, &more1 );
    add128( z0, more1, 0, z1, &z0, &z1 );
    *z2Ptr = z2;
    *z1Ptr = z1;
    *z0Ptr = z0;

}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movq %r9, %r15
movq %r8, %r14
movq %rcx, (%rsp)
movq %rdx, %r12
movq %rdi, %r13
leaq 0x10(%rsp), %rdx
leaq 0x8(%rsp), %rcx
movq %rsi, %rdi
movq %r12, %rsi
callq 0xd0a6
leaq 0x20(%rsp), %rbp
leaq 0x18(%rsp), %rbx
movq %r13, %rdi
movq %r12, %rsi
movq %rbp, %rdx
movq %rbx, %rcx
callq 0xd0a6
movq (%rbp), %rax
leaq 0x10(%rsp), %rcx
movq (%rcx), %rcx
addq (%rbx), %rcx
adcq $0x0, %rax
leaq 0x8(%rsp), %rdx
movq (%rdx), %rdx
movq %rdx, (%r15)
movq %rcx, (%r14)
movq (%rsp), %rcx
movq %rax, (%rcx)
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_eq
int float128_eq(float128 a, float128 b, float_status *status)
{

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
        float_raise(float_flag_invalid, status);
        return 0;
    }
    return
           ( a.low == b.low )
        && (    ( a.high == b.high )
             || (    ( a.low == 0 )
                  && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
           );

}

// Assembly:
movabsq $0x7fff000000000000, %r9 # imm = 0x7FFF000000000000
movq %rsi, %r10
notq %r10
movabsq $0xffffffffffff, %rax   # imm = 0xFFFFFFFFFFFF
testq %r9, %r10
jne 0x12242
movq %rsi, %r10
andq %rax, %r10
orq %rdi, %r10
jne 0x12255
movq %rcx, %r10
notq %r10
testq %r10, %r9
jne 0x1225d
andq %rcx, %rax
orq %rdx, %rax
je 0x1225d
orb $0x1, 0x2(%r8)
xorl %eax, %eax
retq
xorl %eax, %eax
cmpq %rdx, %rdi
jne 0x12272
cmpq %rcx, %rsi
jne 0x1226d
pushq $0x1
popq %rax
retq
testq %rdi, %rdi
je 0x12273
retq
orq %rsi, %rcx
shlq %rcx
xorl %eax, %eax
testq %rcx, %rcx
sete %al
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_le
int float128_le(float128 a, float128 b, float_status *status)
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
        float_raise(float_flag_invalid, status);
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
            || (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
                 == 0 );
    }
    return
          aSign ? le128( b.high, b.low, a.high, a.low )
        : le128( a.high, a.low, b.high, b.low );

}

// Assembly:
movabsq $0x7fff000000000000, %r9 # imm = 0x7FFF000000000000
movq %rsi, %r10
notq %r10
movabsq $0xffffffffffff, %rax   # imm = 0xFFFFFFFFFFFF
testq %r9, %r10
jne 0x122ac
movq %rsi, %r10
andq %rax, %r10
orq %rdi, %r10
jne 0x122bf
movq %rcx, %r10
notq %r10
testq %r10, %r9
jne 0x122c8
andq %rcx, %rax
orq %rdx, %rax
je 0x122c8
orb $0x1, 0x2(%r8)
xorl %eax, %eax
jmp 0x1230f
movq %rcx, %rax
xorq %rsi, %rax
js 0x122e4
testq %rsi, %rsi
js 0x122fa
cmpq %rcx, %rsi
setb %cl
sete %sil
cmpq %rdx, %rdi
jmp 0x12307
testq %rsi, %rsi
js 0x12313
orq %rsi, %rcx
addq %rcx, %rcx
orq %rdi, %rcx
orq %rdx, %rcx
sete %al
jmp 0x1230f
cmpq %rsi, %rcx
setb %cl
sete %sil
cmpq %rdi, %rdx
setbe %al
andb %sil, %al
orb %cl, %al
movzbl %al, %eax
retq
movb $0x1, %al
jmp 0x1230f
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_lt
int float128_lt(float128 a, float128 b, float_status *status)
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
        float_raise(float_flag_invalid, status);
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
            && (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
                 != 0 );
    }
    return
          aSign ? lt128( b.high, b.low, a.high, a.low )
        : lt128( a.high, a.low, b.high, b.low );

}

// Assembly:
movabsq $0x7fff000000000000, %r9 # imm = 0x7FFF000000000000
movq %rsi, %r10
notq %r10
movabsq $0xffffffffffff, %rax   # imm = 0xFFFFFFFFFFFF
testq %r9, %r10
jne 0x12341
movq %rsi, %r10
andq %rax, %r10
orq %rdi, %r10
jne 0x12354
movq %rcx, %r10
notq %r10
testq %r10, %r9
jne 0x1235d
andq %rcx, %rax
orq %rdx, %rax
je 0x1235d
orb $0x1, 0x2(%r8)
xorl %eax, %eax
jmp 0x123a4
movq %rcx, %rax
xorq %rsi, %rax
js 0x12379
testq %rsi, %rsi
js 0x1238f
cmpq %rcx, %rsi
setb %cl
sete %sil
cmpq %rdx, %rdi
jmp 0x1239c
testq %rsi, %rsi
jns 0x12359
orq %rsi, %rcx
addq %rcx, %rcx
orq %rdi, %rcx
orq %rdx, %rcx
setne %al
jmp 0x123a4
cmpq %rsi, %rcx
setb %cl
sete %sil
cmpq %rdi, %rdx
setb %al
andb %sil, %al
orb %cl, %al
movzbl %al, %eax
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_unordered
int float128_unordered(float128 a, float128 b, float_status *status)
{
    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
        float_raise(float_flag_invalid, status);
        return 1;
    }
    return 0;
}

// Assembly:
movabsq $0x7fff000000000000, %r9 # imm = 0x7FFF000000000000
movq %rsi, %rax
notq %rax
movabsq $0xffffffffffff, %r10   # imm = 0xFFFFFFFFFFFF
testq %r9, %rax
jne 0x123cf
andq %r10, %rsi
orq %rdi, %rsi
jne 0x123e4
movq %rcx, %rsi
notq %rsi
xorl %eax, %eax
testq %rsi, %r9
jne 0x123ec
andq %r10, %rcx
orq %rdx, %rcx
je 0x123ec
orb $0x1, 0x2(%r8)
pushq $0x1
popq %rax
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_eq_quiet
int float128_eq_quiet(float128 a, float128 b, float_status *status)
{

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
        if (    float128_is_signaling_nan( a )
             || float128_is_signaling_nan( b ) ) {
            float_raise(float_flag_invalid, status);
        }
        return 0;
    }
    return
           ( a.low == b.low )
        && (    ( a.high == b.high )
             || (    ( a.low == 0 )
                  && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
           );

}

// Assembly:
movabsq $0x7fff000000000000, %r9 # imm = 0x7FFF000000000000
movq %rsi, %r10
notq %r10
movabsq $0xffffffffffff, %rax   # imm = 0xFFFFFFFFFFFF
testq %r9, %r10
jne 0x12417
movq %rsi, %r10
andq %rax, %r10
orq %rdi, %r10
jne 0x1242a
movq %rcx, %r10
notq %r10
testq %r10, %r9
jne 0x1246b
andq %rcx, %rax
orq %rdx, %rax
je 0x1246b
movabsq $0x7fff800000000000, %r11 # imm = 0x7FFF800000000000
movabsq $0x7fffffffffff, %r10   # imm = 0x7FFFFFFFFFFF
movq %rsi, %rax
andq %r11, %rax
cmpq %r9, %rax
jne 0x12451
andq %r10, %rsi
orq %rdi, %rsi
jne 0x12463
andq %rcx, %r11
xorl %eax, %eax
cmpq %r9, %r11
jne 0x12480
andq %r10, %rcx
orq %rdx, %rcx
je 0x12480
orb $0x1, 0x2(%r8)
xorl %eax, %eax
retq
xorl %eax, %eax
cmpq %rdx, %rdi
jne 0x12480
cmpq %rcx, %rsi
jne 0x1247b
pushq $0x1
popq %rax
retq
testq %rdi, %rdi
je 0x12481
retq
orq %rsi, %rcx
shlq %rcx
xorl %eax, %eax
testq %rcx, %rcx
sete %al
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_le_quiet
int float128_le_quiet(float128 a, float128 b, float_status *status)
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
        if (    float128_is_signaling_nan( a )
             || float128_is_signaling_nan( b ) ) {
            float_raise(float_flag_invalid, status);
        }
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
            || (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
                 == 0 );
    }
    return
          aSign ? le128( b.high, b.low, a.high, a.low )
        : le128( a.high, a.low, b.high, b.low );

}

// Assembly:
movabsq $0x7fff000000000000, %rax # imm = 0x7FFF000000000000
movq %rsi, %r10
notq %r10
movabsq $0xffffffffffff, %r9    # imm = 0xFFFFFFFFFFFF
testq %rax, %r10
jne 0x124ba
movq %rsi, %r10
andq %r9, %r10
orq %rdi, %r10
jne 0x124cd
movq %rcx, %r10
notq %r10
testq %r10, %rax
jne 0x1250f
andq %rcx, %r9
orq %rdx, %r9
je 0x1250f
movabsq $0x7fff800000000000, %r10 # imm = 0x7FFF800000000000
movabsq $0x7fffffffffff, %r9    # imm = 0x7FFFFFFFFFFF
movq %rsi, %r11
andq %r10, %r11
cmpq %rax, %r11
jne 0x124f4
andq %r9, %rsi
orq %rdi, %rsi
jne 0x12506
andq %rcx, %r10
xorl %esi, %esi
cmpq %rax, %r10
jne 0x12557
andq %r9, %rcx
orq %rdx, %rcx
je 0x12557
orb $0x1, 0x2(%r8)
xorl %esi, %esi
jmp 0x12557
movq %rcx, %rax
xorq %rsi, %rax
js 0x1252a
testq %rsi, %rsi
js 0x12541
cmpq %rcx, %rsi
setb %al
sete %cl
cmpq %rdx, %rdi
jmp 0x1254d
testq %rsi, %rsi
js 0x1255c
orq %rsi, %rcx
addq %rcx, %rcx
orq %rdi, %rcx
orq %rdx, %rcx
sete %sil
jmp 0x12557
cmpq %rsi, %rcx
setb %al
sete %cl
cmpq %rdi, %rdx
setbe %sil
andb %cl, %sil
orb %al, %sil
movzbl %sil, %eax
retq
movb $0x1, %sil
jmp 0x12557
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_lt_quiet
int float128_lt_quiet(float128 a, float128 b, float_status *status)
{
    flag aSign, bSign;

    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
        if (    float128_is_signaling_nan( a )
             || float128_is_signaling_nan( b ) ) {
            float_raise(float_flag_invalid, status);
        }
        return 0;
    }
    aSign = extractFloat128Sign( a );
    bSign = extractFloat128Sign( b );
    if ( aSign != bSign ) {
        return
               aSign
            && (    ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
                 != 0 );
    }
    return
          aSign ? lt128( b.high, b.low, a.high, a.low )
        : lt128( a.high, a.low, b.high, b.low );

}

// Assembly:
movabsq $0x7fff000000000000, %rax # imm = 0x7FFF000000000000
movq %rsi, %r10
notq %r10
movabsq $0xffffffffffff, %r9    # imm = 0xFFFFFFFFFFFF
testq %rax, %r10
jne 0x1258b
movq %rsi, %r10
andq %r9, %r10
orq %rdi, %r10
jne 0x1259e
movq %rcx, %r10
notq %r10
testq %r10, %rax
jne 0x125de
andq %rcx, %r9
orq %rdx, %r9
je 0x125de
movabsq $0x7fff800000000000, %r10 # imm = 0x7FFF800000000000
movabsq $0x7fffffffffff, %r9    # imm = 0x7FFFFFFFFFFF
movq %rsi, %r11
andq %r10, %r11
cmpq %rax, %r11
jne 0x125c5
andq %r9, %rsi
orq %rdi, %rsi
jne 0x125d7
andq %rcx, %r10
xorl %esi, %esi
cmpq %rax, %r10
jne 0x12618
andq %r9, %rcx
orq %rdx, %rcx
je 0x12618
orb $0x1, 0x2(%r8)
jmp 0x125fe
movq %rcx, %rax
xorq %rsi, %rax
js 0x125f9
testq %rsi, %rsi
js 0x12602
cmpq %rcx, %rsi
setb %al
sete %cl
cmpq %rdx, %rdi
jmp 0x1260e
testq %rsi, %rsi
js 0x1261d
xorl %esi, %esi
jmp 0x12618
cmpq %rsi, %rcx
setb %al
sete %cl
cmpq %rdi, %rdx
setb %sil
andb %cl, %sil
orb %al, %sil
movzbl %sil, %eax
retq
orq %rsi, %rcx
addq %rcx, %rcx
orq %rdi, %rcx
orq %rdx, %rcx
setne %sil
jmp 0x12618
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_unordered_quiet
int float128_unordered_quiet(float128 a, float128 b, float_status *status)
{
    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
         || (    ( extractFloat128Exp( b ) == 0x7FFF )
              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
       ) {
        if (    float128_is_signaling_nan( a )
             || float128_is_signaling_nan( b ) ) {
            float_raise(float_flag_invalid, status);
        }
        return 1;
    }
    return 0;
}

// Assembly:
movabsq $0x7fff000000000000, %r9 # imm = 0x7FFF000000000000
movq %rsi, %rax
notq %rax
movabsq $0xffffffffffff, %r10   # imm = 0xFFFFFFFFFFFF
testq %r9, %rax
jne 0x12659
movq %rsi, %rax
andq %r10, %rax
orq %rdi, %rax
jne 0x1266e
movq %rcx, %r11
notq %r11
xorl %eax, %eax
testq %r11, %r9
jne 0x126b1
andq %rcx, %r10
orq %rdx, %r10
je 0x126b1
pushq %rbx
movabsq $0x7fff800000000000, %r11 # imm = 0x7FFF800000000000
movabsq $0x7fffffffffff, %r10   # imm = 0x7FFFFFFFFFFF
movq %rsi, %rbx
andq %r11, %rbx
movl $0x1, %eax
cmpq %r9, %rbx
popq %rbx
jne 0x1269c
andq %r10, %rsi
orq %rdi, %rsi
jne 0x126ac
andq %rcx, %r11
cmpq %r9, %r11
jne 0x126b1
andq %r10, %rcx
orq %rdx, %rcx
je 0x126b1
orb $0x1, 0x2(%r8)
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float32_to_uint32
uint32 float32_to_uint32(float32 a, float_status *status)
{
    int64_t v;
    uint32 res;
    int old_exc_flags = get_float_exception_flags(status);

    v = float32_to_int64(a, status);
    if (v < 0) {
        res = 0;
    } else if (v > 0xffffffff) {
        res = 0xffffffff;
    } else {
        return v;
    }
    set_float_exception_flags(old_exc_flags, status);
    float_raise(float_flag_invalid, status);
    return res;
}

// Assembly:
pushq %rbp
pushq %rbx
pushq %rax
movq %rsi, %rbx
movb 0x2(%rsi), %bpl
callq 0x9c10
testq %rax, %rax
js 0x126e2
movq %rax, %rcx
shrq $0x20, %rcx
je 0x126ec
pushq $-0x1
popq %rax
jmp 0x126e4
xorl %eax, %eax
orb $0x1, %bpl
movb %bpl, 0x2(%rbx)
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float32_to_int16
int_fast16_t float32_to_int16(float32 a, float_status *status)
{
    int32_t v;
    int_fast16_t res;
    int old_exc_flags = get_float_exception_flags(status);

    v = float32_to_int32(a, status);
    if (v < -0x8000) {
        res = -0x8000;
    } else if (v > 0x7fff) {
        res = 0x7fff;
    } else {
        return v;
    }

    set_float_exception_flags(old_exc_flags, status);
    float_raise(float_flag_invalid, status);
    return res;
}

// Assembly:
pushq %rbp
pushq %rbx
pushq %rax
movq %rsi, %rbx
movb 0x2(%rsi), %bpl
callq 0x99bd
movl %eax, %ecx
movq $-0x8000, %rax          # imm = 0x8000
cmpl $0xffff8000, %ecx       # imm = 0xFFFF8000
jl 0x12753
movl $0x7fff, %eax           # imm = 0x7FFF
cmpl $0x7fff, %ecx           # imm = 0x7FFF
jle 0x1275d
orb $0x1, %bpl
movb %bpl, 0x2(%rbx)
jmp 0x12760
movslq %ecx, %rax
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float32_to_uint16
uint_fast16_t float32_to_uint16(float32 a, float_status *status)
{
    int32_t v;
    uint_fast16_t res;
    int old_exc_flags = get_float_exception_flags(status);

    v = float32_to_int32(a, status);
    if (v < 0) {
        res = 0;
    } else if (v > 0xffff) {
        res = 0xffff;
    } else {
        return v;
    }

    set_float_exception_flags(old_exc_flags, status);
    float_raise(float_flag_invalid, status);
    return res;
}

// Assembly:
pushq %rbp
pushq %rbx
pushq %rax
movq %rsi, %rbx
movb 0x2(%rsi), %bpl
callq 0x99bd
testl %eax, %eax
js 0x1278d
movl %eax, %ecx
movl $0xffff, %eax           # imm = 0xFFFF
cmpl $0xffff, %ecx           # imm = 0xFFFF
ja 0x1278f
movl %ecx, %eax
jmp 0x12797
xorl %eax, %eax
orb $0x1, %bpl
movb %bpl, 0x2(%rbx)
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float32_to_uint16_round_to_zero
uint_fast16_t float32_to_uint16_round_to_zero(float32 a, float_status *status)
{
    int64_t v;
    uint_fast16_t res;
    int old_exc_flags = get_float_exception_flags(status);

    v = float32_to_int64_round_to_zero(a, status);
    if (v < 0) {
        res = 0;
    } else if (v > 0xffff) {
        res = 0xffff;
    } else {
        return v;
    }
    set_float_exception_flags(old_exc_flags, status);
    float_raise(float_flag_invalid, status);
    return res;
}

// Assembly:
pushq %rbp
pushq %rbx
pushq %rax
movq %rsi, %rbx
movb 0x2(%rsi), %bpl
callq 0x9f30
testq %rax, %rax
js 0x127c1
movl $0xffff, %ecx           # imm = 0xFFFF
cmpq $0x10000, %rax          # imm = 0x10000
jae 0x127c3
jmp 0x127ce
xorl %ecx, %ecx
orb $0x1, %bpl
movb %bpl, 0x2(%rbx)
movq %rcx, %rax
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_uint32
uint32 float64_to_uint32(float64 a, float_status *status)
{
    uint64_t v;
    uint32 res;
    int old_exc_flags = get_float_exception_flags(status);

    v = float64_to_uint64(a, status);
    if (v > 0xffffffff) {
        res = 0xffffffff;
    } else {
        return v;
    }
    set_float_exception_flags(old_exc_flags, status);
    float_raise(float_flag_invalid, status);
    return res;
}

// Assembly:
pushq %rbp
pushq %rbx
pushq %rax
movq %rsi, %rbx
movb 0x2(%rsi), %bpl
callq 0x127ff
movq %rax, %rcx
shrq $0x20, %rcx
je 0x127f8
orb $0x1, %bpl
movb %bpl, 0x2(%rbx)
pushq $-0x1
popq %rax
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_uint64
uint64_t float64_to_uint64(float64 a, float_status *status)
{
    flag aSign;
    int_fast16_t aExp, shiftCount;
    uint64_t aSig, aSigExtra;
    a = float64_squash_input_denormal(a, status);

    aSig = extractFloat64Frac(a);
    aExp = extractFloat64Exp(a);
    aSign = extractFloat64Sign(a);
    if (aSign && (aExp > 1022)) {
        float_raise(float_flag_invalid, status);
        if (float64_is_any_nan(a)) {
            return LIT64(0xFFFFFFFFFFFFFFFF);
        } else {
            return 0;
        }
    }
    if (aExp) {
        aSig |= LIT64(0x0010000000000000);
    }
    shiftCount = 0x433 - aExp;
    if (shiftCount <= 0) {
        if (0x43E < aExp) {
            float_raise(float_flag_invalid, status);
            return LIT64(0xFFFFFFFFFFFFFFFF);
        }
        aSigExtra = 0;
        aSig <<= -shiftCount;
    } else {
        shift64ExtraRightJamming(aSig, 0, shiftCount, &aSig, &aSigExtra);
    }
    return roundAndPackUint64(aSign, aSig, aSigExtra, status);
}

// Assembly:
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rsi, %rbx
movabsq $0xfffffffffffff, %r15  # imm = 0xFFFFFFFFFFFFF
callq 0x920d
movq %rax, %r14
movq %rax, %rsi
andq %r15, %rsi
movq %rsi, 0x8(%rsp)
movq %rax, %rcx
shrq $0x34, %rcx
andl $0x7ff, %ecx            # imm = 0x7FF
testq %rax, %rax
setns %al
cmpq $0x3ff, %rcx            # imm = 0x3FF
setb %dl
orb %al, %dl
jne 0x12875
orb $0x1, 0x2(%rbx)
btrq $0x3f, %r14
movabsq $0x7ff0000000000000, %rcx # imm = 0x7FF0000000000000
xorl %eax, %eax
cmpq %rcx, %r14
seta %al
negq %rax
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq
testq %rcx, %rcx
je 0x1289f
addq %r15, %rsi
incq %rsi
movq %rsi, 0x8(%rsp)
cmpq $0x433, %rcx            # imm = 0x433
jb 0x1289f
cmpl $0x43f, %ecx            # imm = 0x43F
jb 0x128e3
orb $0x1, 0x2(%rbx)
pushq $-0x1
popq %rax
jmp 0x12869
movl $0x433, %edx            # imm = 0x433
subq %rcx, %rdx
leaq 0x8(%rsp), %r15
leaq 0x10(%rsp), %r12
movq %rsi, %rdi
xorl %esi, %esi
movq %r15, %rcx
movq %r12, %r8
callq 0x9cb8
movq (%r15), %rsi
movq (%r12), %rdx
shrq $0x3f, %r14
movzbl %r14b, %edi
movq %rbx, %rcx
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
jmp 0x9e7c
addq $-0x433, %rcx           # imm = 0xFBCD
shlq %cl, %rsi
xorl %edx, %edx
jmp 0x128c8
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_uint32_round_to_zero
uint32 float64_to_uint32_round_to_zero(float64 a, float_status *status)
{
    uint64_t v;
    uint32 res;
    int old_exc_flags = get_float_exception_flags(status);

    v = float64_to_uint64_round_to_zero(a, status);
    if (v > 0xffffffff) {
        res = 0xffffffff;
    } else {
        return v;
    }
    set_float_exception_flags(old_exc_flags, status);
    float_raise(float_flag_invalid, status);
    return res;
}

// Assembly:
pushq %rbp
pushq %rbx
pushq %rax
movq %rsi, %rbx
movb 0x2(%rsi), %bpl
callq 0x1291b
movq %rax, %rcx
shrq $0x20, %rcx
je 0x12914
orb $0x1, %bpl
movb %bpl, 0x2(%rbx)
pushq $-0x1
popq %rax
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_uint64_round_to_zero
uint64_t float64_to_uint64_round_to_zero(float64 a, float_status *status)
{
    signed char current_rounding_mode = status->float_rounding_mode;
    set_float_rounding_mode(float_round_to_zero, status);
    int64_t v = float64_to_uint64(a, status);
    set_float_rounding_mode(current_rounding_mode, status);
    return v;
}

// Assembly:
pushq %rbp
pushq %rbx
pushq %rax
movq %rsi, %rbx
movb 0x1(%rsi), %bpl
movb $0x3, 0x1(%rsi)
callq 0x127ff
movb %bpl, 0x1(%rbx)
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_int16
int_fast16_t float64_to_int16(float64 a, float_status *status)
{
    int64_t v;
    int_fast16_t res;
    int old_exc_flags = get_float_exception_flags(status);

    v = float64_to_int32(a, status);
    if (v < -0x8000) {
        res = -0x8000;
    } else if (v > 0x7fff) {
        res = 0x7fff;
    } else {
        return v;
    }

    set_float_exception_flags(old_exc_flags, status);
    float_raise(float_flag_invalid, status);
    return res;
}

// Assembly:
pushq %rbp
pushq %rbx
pushq %rax
movq %rsi, %rbx
movb 0x2(%rsi), %bpl
callq 0xbf3a
movl %eax, %ecx
movq $-0x8000, %rax          # imm = 0x8000
cmpl $0xffff8000, %ecx       # imm = 0xFFFF8000
jl 0x12966
movl $0x7fff, %eax           # imm = 0x7FFF
cmpl $0x8000, %ecx           # imm = 0x8000
jl 0x12970
orb $0x1, %bpl
movb %bpl, 0x2(%rbx)
jmp 0x12973
movslq %ecx, %rax
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_uint16
uint_fast16_t float64_to_uint16(float64 a, float_status *status)
{
    int64_t v;
    uint_fast16_t res;
    int old_exc_flags = get_float_exception_flags(status);

    v = float64_to_int32(a, status);
    if (v < 0) {
        res = 0;
    } else if (v > 0xffff) {
        res = 0xffff;
    } else {
        return v;
    }

    set_float_exception_flags(old_exc_flags, status);
    float_raise(float_flag_invalid, status);
    return res;
}

// Assembly:
pushq %rbp
pushq %rbx
pushq %rax
movq %rsi, %rbx
movb 0x2(%rsi), %bpl
callq 0xbf3a
testl %eax, %eax
js 0x129a0
movl %eax, %ecx
movl $0xffff, %eax           # imm = 0xFFFF
cmpl $0x10000, %ecx          # imm = 0x10000
jae 0x129a2
movl %ecx, %eax
jmp 0x129aa
xorl %eax, %eax
orb $0x1, %bpl
movb %bpl, 0x2(%rbx)
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_uint16_round_to_zero
uint_fast16_t float64_to_uint16_round_to_zero(float64 a, float_status *status)
{
    int64_t v;
    uint_fast16_t res;
    int old_exc_flags = get_float_exception_flags(status);

    v = float64_to_int64_round_to_zero(a, status);
    if (v < 0) {
        res = 0;
    } else if (v > 0xffff) {
        res = 0xffff;
    } else {
        return v;
    }
    set_float_exception_flags(old_exc_flags, status);
    float_raise(float_flag_invalid, status);
    return res;
}

// Assembly:
pushq %rbp
pushq %rbx
pushq %rax
movq %rsi, %rbx
movb 0x2(%rsi), %bpl
callq 0xc214
testq %rax, %rax
js 0x129d4
movl $0xffff, %ecx           # imm = 0xFFFF
cmpq $0x10000, %rax          # imm = 0x10000
jae 0x129d6
jmp 0x129e1
xorl %ecx, %ecx
orb $0x1, %bpl
movb %bpl, 0x2(%rbx)
movq %rcx, %rax
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: floatx80_compare_internal
static inline int floatx80_compare_internal(floatx80 a, floatx80 b,
                                            int is_quiet, float_status *status)
{
    flag aSign, bSign;

    if (( ( extractFloatx80Exp( a ) == 0x7fff ) &&
          ( extractFloatx80Frac( a )<<1 ) ) ||
        ( ( extractFloatx80Exp( b ) == 0x7fff ) &&
          ( extractFloatx80Frac( b )<<1 ) )) {
        if (!is_quiet ||
            floatx80_is_signaling_nan( a ) ||
            floatx80_is_signaling_nan( b ) ) {
            float_raise(float_flag_invalid, status);
        }
        return float_relation_unordered;
    }
    aSign = extractFloatx80Sign( a );
    bSign = extractFloatx80Sign( b );
    if ( aSign != bSign ) {

        if ( ( ( (uint16_t) ( ( a.high | b.high ) << 1 ) ) == 0) &&
             ( ( a.low | b.low ) == 0 ) ) {
            /* zero case */
            return float_relation_equal;
        } else {
            return 1 - (2 * aSign);
        }
    } else {
        if (a.low == b.low && a.high == b.high) {
            return float_relation_equal;
        } else {
            return 1 - 2 * (aSign ^ ( lt128( a.high, a.low, b.high, b.low ) ));
        }
    }
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %r9, %r14
movl %ecx, %ebp
movq %rdx, %rbx
movl %esi, %eax
notl %eax
testw $0x7fff, %ax            # imm = 0x7FFF
setne %al
leaq (,%rdi,2), %rcx
testq %rcx, %rcx
sete %cl
orb %al, %cl
cmpb $0x1, %cl
jne 0x12c84
movabsq $0x7fffffffffffffff, %rax # imm = 0x7FFFFFFFFFFFFFFF
movl %ebp, %ecx
notl %ecx
testw $0x7fff, %cx            # imm = 0x7FFF
setne %cl
testq %rax, %rbx
sete %al
orb %cl, %al
je 0x12c84
movzwl %si, %eax
shrl $0xf, %eax
movzwl %bp, %ecx
shrl $0xf, %ecx
cmpw %cx, %ax
jne 0x12cb7
cmpq %rbx, %rdi
sete %cl
cmpw %bp, %si
sete %dl
testb %dl, %cl
jne 0x12ccb
cmpw %bp, %si
sete %cl
setb %dl
cmpq %rbx, %rdi
setb %sil
andb %cl, %sil
orb %dl, %sil
xorb %al, %sil
addb %sil, %sil
movzbl %sil, %eax
jmp 0x12cd5
pushq $0x2
popq %r15
testl %r8d, %r8d
je 0x12ca4
callq 0x90e5
testl %eax, %eax
jne 0x12ca4
movq %rbx, %rdi
movl %ebp, %esi
callq 0x90e5
testl %eax, %eax
je 0x12ca9
orb $0x1, 0x2(%r14)
movl %r15d, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
orl %esi, %ebp
testw $0x7fff, %bp            # imm = 0x7FFF
sete %cl
orq %rdi, %rbx
sete %dl
testb %dl, %cl
je 0x12cd0
xorl %r15d, %r15d
jmp 0x12ca9
addb %al, %al
movzbl %al, %eax
pushq $0x1
popq %r15
subl %eax, %r15d
jmp 0x12ca9