// File: /workspace/github_c_makefile_star2_O1/intel[P]pf-bb-config/fpga_5gnr/fpga_5gnr_cfg_parser.c
// Function: fpga_handler
static int
fpga_handler(void *user, const char *section,
	     const char *name, const char *value)
{
	struct fpga_5gnr_fec_conf *fpga_conf =
			(struct fpga_5gnr_fec_conf *) user;
	int ret = 1;

	if (!strcmp(section, MODE) && !strcmp(name, PFMODE)) {
		if (!strcmp(value, ZERO))
			fpga_conf->pf_mode_en = false;
		else if (!strcmp(value, ONE))
			fpga_conf->pf_mode_en = true;
		else
			ret = 0;
	} else if (!strcmp(section, UL) && !strcmp(name, BANDWIDTH)) {
		ret = parse_number8(value, &fpga_conf->ul_bandwidth);
	} else if (!strcmp(section, DL) && !strcmp(name, BANDWIDTH)) {
		ret = parse_number8(value, &fpga_conf->dl_bandwidth);
	} else if (!strcmp(section, UL) && !strcmp(name, LOAD_BALANCE)) {
		ret = parse_number8(value, &fpga_conf->ul_load_balance);
	} else if (!strcmp(section, DL) && !strcmp(name, LOAD_BALANCE)) {
		ret = parse_number8(value, &fpga_conf->dl_load_balance);
	} else if (!strcmp(section, UL) && !strcmp(name, QUEUE_MAP)) {
		ret = parse_array8(value, fpga_conf->vf_ul_queues_number);
	} else if (!strcmp(section, DL) && !strcmp(name, QUEUE_MAP)) {
		ret = parse_array8(value, fpga_conf->vf_dl_queues_number);
	} else {
		printf("ERROR: Section (%s) or name (%s) is not valid.\n",
		       section, name);
		return 0;
	}
	if (ret != 1)
		printf("Error: Conversion of value (%s) failed.\n", value);

	return ret;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rcx, %rbx
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %r14
leaq 0xaddc(%rip), %rsi      # 0x1bbd3
movq %r12, %rdi
callq 0xd200
testl %eax, %eax
jne 0x10e1a
leaq 0xadce(%rip), %rsi      # 0x1bbd8
movq %r15, %rdi
callq 0xd200
testl %eax, %eax
je 0x10ef5
leaq 0xb0f3(%rip), %rsi      # 0x1bf14
movq %r12, %rdi
callq 0xd200
movl %eax, %ebp
testl %eax, %eax
jne 0x10e46
leaq 0xb236(%rip), %rsi      # 0x1c06c
movq %r15, %rdi
callq 0xd200
testl %eax, %eax
je 0x10f23
leaq 0xb0ca(%rip), %rsi      # 0x1bf17
movq %r12, %rdi
callq 0xd200
movl %eax, %r13d
testl %eax, %eax
jne 0x10e73
leaq 0xb209(%rip), %rsi      # 0x1c06c
movq %r15, %rdi
callq 0xd200
testl %eax, %eax
je 0x10f29
testl %ebp, %ebp
jne 0x10e8e
leaq 0xb1f8(%rip), %rsi      # 0x1c076
movq %r15, %rdi
callq 0xd200
testl %eax, %eax
je 0x10f2f
testl %r13d, %r13d
jne 0x10eaa
leaq 0xb1dc(%rip), %rsi      # 0x1c076
movq %r15, %rdi
callq 0xd200
testl %eax, %eax
je 0x10f35
testl %ebp, %ebp
jne 0x10ec5
leaq 0xb1ce(%rip), %rsi      # 0x1c083
movq %r15, %rdi
callq 0xd200
testl %eax, %eax
je 0x10f46
testl %r13d, %r13d
jne 0x10edd
leaq 0xb1b2(%rip), %rsi      # 0x1c083
movq %r15, %rdi
callq 0xd200
testl %eax, %eax
je 0x10f4b
leaq 0xb1b7(%rip), %rdi      # 0x1c09b
xorl %ebp, %ebp
movq %r12, %rsi
movq %r15, %rdx
xorl %eax, %eax
callq 0xd150
jmp 0x10f72
leaq 0xa10d(%rip), %rsi      # 0x1b009
movq %rbx, %rdi
callq 0xd200
testl %eax, %eax
je 0x10f83
leaq 0xa128(%rip), %rsi      # 0x1b037
movq %rbx, %rdi
callq 0xd200
xorl %ebp, %ebp
testl %eax, %eax
jne 0x10f5c
movb $0x1, (%r14)
jmp 0x10f87
addq $0x11, %r14
jmp 0x10f39
addq $0x12, %r14
jmp 0x10f39
addq $0x13, %r14
jmp 0x10f39
addq $0x14, %r14
movq %rbx, %rdi
movq %r14, %rsi
callq 0x10f8e
jmp 0x10f5a
incq %r14
jmp 0x10f4f
addq $0x9, %r14
movq %rbx, %rdi
movq %r14, %rsi
callq 0x10fe2
movl %eax, %ebp
cmpl $0x1, %ebp
je 0x10f72
leaq 0xb163(%rip), %rdi      # 0x1c0cb
movq %rbx, %rsi
xorl %eax, %eax
callq 0xd150
movl %ebp, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movb $0x0, (%r14)
movl $0x1, %ebp
jmp 0x10f5c