// File: /workspace/github_c_makefile_star2_O0/markdryan[P]subtilis/arch/arm32/vfp_alloc.c
// Function: prv_alloc_vfp_data_instr
static void prv_alloc_vfp_data_instr(void *user_data, subtilis_arm_op_t *op,
				     subtilis_arm_instr_type_t type,
				     subtilis_vfp_data_instr_t *instr,
				     subtilis_error_t *err)
{
	size_t vreg_op1;
	int dist_op1;
	size_t vreg_op2;
	int dist_op2;
	size_t vreg_dest;
	int dist_dest;
	subtilis_arm_reg_ud_t *ud = user_data;

	switch (type) {
	case SUBTILIS_VFP_INSTR_FMACS:
	case SUBTILIS_VFP_INSTR_FNMACS:
	case SUBTILIS_VFP_INSTR_FMSCS:
	case SUBTILIS_VFP_INSTR_FNMSCS:
	case SUBTILIS_VFP_INSTR_FMULS:
	case SUBTILIS_VFP_INSTR_FNMULS:
	case SUBTILIS_VFP_INSTR_FADDS:
	case SUBTILIS_VFP_INSTR_FSUBS:
	case SUBTILIS_VFP_INSTR_FDIVS:
		subtilis_error_set_assertion_failed(err);
		return;
	default:
		break;
	}

	vreg_op1 = instr->op1;
	(void)subtilis_arm_reg_alloc_ensure(ud, op, ud->int_regs, ud->real_regs,
					    &instr->op1, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;

	vreg_op2 = instr->op2;
	(void)subtilis_arm_reg_alloc_ensure(ud, op, ud->int_regs, ud->real_regs,
					    &instr->op2, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;

	dist_op2 = subtilis_arm_reg_alloc_calculate_dist(
	    ud, vreg_op2, op, &ud->real_regs->dist_walker, ud->real_regs);
	if (dist_op2 == -1)
		ud->real_regs->phys_to_virt[instr->op2] = INT_MAX;

	dist_op1 = subtilis_arm_reg_alloc_calculate_dist(
	    ud, vreg_op1, op, &ud->real_regs->dist_walker, ud->real_regs);
	if (dist_op1 == -1)
		ud->real_regs->phys_to_virt[instr->op1] = INT_MAX;

	/*
	 * Special case here for FMA.  We need to ensure the destination
	 * register not allocate it as it is read from as well as written to.
	 */

	switch (type) {
	case SUBTILIS_VFP_INSTR_FMACD:
	case SUBTILIS_VFP_INSTR_FNMACD:
	case SUBTILIS_VFP_INSTR_FMSCD:
	case SUBTILIS_VFP_INSTR_FNMSCD:
		vreg_dest = instr->dest;
		(void)subtilis_arm_reg_alloc_ensure(
		    ud, op, ud->int_regs, ud->real_regs, &instr->dest, err);
		if (err->type != SUBTILIS_ERROR_OK)
			return;
		dist_dest = subtilis_arm_reg_alloc_calculate_dist(
		    ud, vreg_dest, op, &ud->real_regs->dist_walker,
		    ud->real_regs);
		if (dist_dest == -1)
			ud->real_regs->phys_to_virt[instr->dest] = INT_MAX;
		ud->real_regs->next[instr->dest] = dist_dest;
		break;
	default:
		subtilis_arm_reg_alloc_alloc_fp_dest(ud, op, &instr->dest, err);
		if (err->type != SUBTILIS_ERROR_OK)
			return;
		break;
	}
	ud->real_regs->next[instr->op1] = dist_op1;
	ud->real_regs->next[instr->op2] = dist_op2;

	ud->instr_count++;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x70, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movl %edx, -0x14(%rbp)
movq %rcx, -0x20(%rbp)
movq %r8, -0x28(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x60(%rbp)
movl -0x14(%rbp), %eax
movl %eax, -0x64(%rbp)
subl $0x5f, %eax
je 0xa1260
jmp 0xa1210
movl -0x64(%rbp), %eax
subl $0x61, %eax
je 0xa1260
jmp 0xa121a
movl -0x64(%rbp), %eax
subl $0x63, %eax
je 0xa1260
jmp 0xa1224
movl -0x64(%rbp), %eax
subl $0x65, %eax
je 0xa1260
jmp 0xa122e
movl -0x64(%rbp), %eax
subl $0x67, %eax
je 0xa1260
jmp 0xa1238
movl -0x64(%rbp), %eax
subl $0x69, %eax
je 0xa1260
jmp 0xa1242
movl -0x64(%rbp), %eax
subl $0x6b, %eax
je 0xa1260
jmp 0xa124c
movl -0x64(%rbp), %eax
subl $0x6d, %eax
je 0xa1260
jmp 0xa1256
movl -0x64(%rbp), %eax
subl $0x6f, %eax
jne 0xa127f
jmp 0xa1260
movq -0x28(%rbp), %rdi
movl $0xf, %esi
leaq 0xd216(%rip), %rdx      # 0xae486
movl $0x16c, %ecx            # imm = 0x16C
callq 0x148f0
jmp 0xa14e6
jmp 0xa1281
movq -0x20(%rbp), %rax
movq 0x10(%rax), %rax
movq %rax, -0x30(%rbp)
movq -0x60(%rbp), %rdi
movq -0x10(%rbp), %rsi
movq -0x60(%rbp), %rax
movq 0x8(%rax), %rdx
movq -0x60(%rbp), %rax
movq 0x10(%rax), %rcx
movq -0x20(%rbp), %r8
addq $0x10, %r8
movq -0x28(%rbp), %r9
callq 0x764c0
movq -0x28(%rbp), %rax
cmpl $0x0, (%rax)
je 0xa12c4
jmp 0xa14e6
movq -0x20(%rbp), %rax
movq 0x18(%rax), %rax
movq %rax, -0x40(%rbp)
movq -0x60(%rbp), %rdi
movq -0x10(%rbp), %rsi
movq -0x60(%rbp), %rax
movq 0x8(%rax), %rdx
movq -0x60(%rbp), %rax
movq 0x10(%rax), %rcx
movq -0x20(%rbp), %r8
addq $0x18, %r8
movq -0x28(%rbp), %r9
callq 0x764c0
movq -0x28(%rbp), %rax
cmpl $0x0, (%rax)
je 0xa1307
jmp 0xa14e6
movq -0x60(%rbp), %rdi
movq -0x40(%rbp), %rsi
movq -0x10(%rbp), %rdx
movq -0x60(%rbp), %rax
movq 0x10(%rax), %rcx
addq $0x90, %rcx
movq -0x60(%rbp), %rax
movq 0x10(%rax), %r8
callq 0x76020
movl %eax, -0x44(%rbp)
cmpl $-0x1, -0x44(%rbp)
jne 0xa1354
movq -0x60(%rbp), %rax
movq 0x10(%rax), %rax
movq 0x8(%rax), %rax
movq -0x20(%rbp), %rcx
movq 0x18(%rcx), %rcx
movq $0x7fffffff, (%rax,%rcx,8) # imm = 0x7FFFFFFF
movq -0x60(%rbp), %rdi
movq -0x30(%rbp), %rsi
movq -0x10(%rbp), %rdx
movq -0x60(%rbp), %rax
movq 0x10(%rax), %rcx
addq $0x90, %rcx
movq -0x60(%rbp), %rax
movq 0x10(%rax), %r8
callq 0x76020
movl %eax, -0x34(%rbp)
cmpl $-0x1, -0x34(%rbp)
jne 0xa13a1
movq -0x60(%rbp), %rax
movq 0x10(%rax), %rax
movq 0x8(%rax), %rax
movq -0x20(%rbp), %rcx
movq 0x10(%rcx), %rcx
movq $0x7fffffff, (%rax,%rcx,8) # imm = 0x7FFFFFFF
movl -0x14(%rbp), %eax
movl %eax, -0x68(%rbp)
subl $0x60, %eax
je 0xa13d0
jmp 0xa13ae
movl -0x68(%rbp), %eax
subl $0x62, %eax
je 0xa13d0
jmp 0xa13b8
movl -0x68(%rbp), %eax
subl $0x64, %eax
je 0xa13d0
jmp 0xa13c2
movl -0x68(%rbp), %eax
subl $0x66, %eax
jne 0xa147c
jmp 0xa13d0
movq -0x20(%rbp), %rax
movq 0x8(%rax), %rax
movq %rax, -0x50(%rbp)
movq -0x60(%rbp), %rdi
movq -0x10(%rbp), %rsi
movq -0x60(%rbp), %rax
movq 0x8(%rax), %rdx
movq -0x60(%rbp), %rax
movq 0x10(%rax), %rcx
movq -0x20(%rbp), %r8
addq $0x8, %r8
movq -0x28(%rbp), %r9
callq 0x764c0
movq -0x28(%rbp), %rax
cmpl $0x0, (%rax)
je 0xa1413
jmp 0xa14e6
movq -0x60(%rbp), %rdi
movq -0x50(%rbp), %rsi
movq -0x10(%rbp), %rdx
movq -0x60(%rbp), %rax
movq 0x10(%rax), %rcx
addq $0x90, %rcx
movq -0x60(%rbp), %rax
movq 0x10(%rax), %r8
callq 0x76020
movl %eax, -0x54(%rbp)
cmpl $-0x1, -0x54(%rbp)
jne 0xa1460
movq -0x60(%rbp), %rax
movq 0x10(%rax), %rax
movq 0x8(%rax), %rax
movq -0x20(%rbp), %rcx
movq 0x8(%rcx), %rcx
movq $0x7fffffff, (%rax,%rcx,8) # imm = 0x7FFFFFFF
movl -0x54(%rbp), %edx
movq -0x60(%rbp), %rax
movq 0x10(%rax), %rax
movq 0x10(%rax), %rax
movq -0x20(%rbp), %rcx
movq 0x8(%rcx), %rcx
movl %edx, (%rax,%rcx,4)
jmp 0xa14a2
movq -0x60(%rbp), %rdi
movq -0x10(%rbp), %rsi
movq -0x20(%rbp), %rdx
addq $0x8, %rdx
movq -0x28(%rbp), %rcx
callq 0x76940
movq -0x28(%rbp), %rax
cmpl $0x0, (%rax)
je 0xa14a0
jmp 0xa14e6
jmp 0xa14a2
movl -0x34(%rbp), %edx
movq -0x60(%rbp), %rax
movq 0x10(%rax), %rax
movq 0x10(%rax), %rax
movq -0x20(%rbp), %rcx
movq 0x10(%rcx), %rcx
movl %edx, (%rax,%rcx,4)
movl -0x44(%rbp), %edx
movq -0x60(%rbp), %rax
movq 0x10(%rax), %rax
movq 0x10(%rax), %rax
movq -0x20(%rbp), %rcx
movq 0x18(%rcx), %rcx
movl %edx, (%rax,%rcx,4)
movq -0x60(%rbp), %rax
movq 0x20(%rax), %rcx
addq $0x1, %rcx
movq %rcx, 0x20(%rax)
addq $0x70, %rsp
popq %rbp
retq
nopl (%rax)