// File: /workspace/github_c_makefile_star2_O2/nh13[P]ksw/src/parasail/src/nw_stats_diag_avx2_256_16.c
// Function: arr_store_rowcol
static inline void arr_store_rowcol(
        int *row,
        int *col,
        __m256i vWH,
        int32_t i,
        int32_t s1Len,
        int32_t j,
        int32_t s2Len)
{
    if (i+0 == s1Len-1 && 0 <= j-0 && j-0 < s2Len) {
        row[j-0] = (int16_t)_mm256_extract_epi16_rpl(vWH, 15);
    }
    if (j-0 == s2Len-1 && 0 <= i+0 && i+0 < s1Len) {
        col[(i+0)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 15);
    }
    if (i+1 == s1Len-1 && 0 <= j-1 && j-1 < s2Len) {
        row[j-1] = (int16_t)_mm256_extract_epi16_rpl(vWH, 14);
    }
    if (j-1 == s2Len-1 && 0 <= i+1 && i+1 < s1Len) {
        col[(i+1)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 14);
    }
    if (i+2 == s1Len-1 && 0 <= j-2 && j-2 < s2Len) {
        row[j-2] = (int16_t)_mm256_extract_epi16_rpl(vWH, 13);
    }
    if (j-2 == s2Len-1 && 0 <= i+2 && i+2 < s1Len) {
        col[(i+2)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 13);
    }
    if (i+3 == s1Len-1 && 0 <= j-3 && j-3 < s2Len) {
        row[j-3] = (int16_t)_mm256_extract_epi16_rpl(vWH, 12);
    }
    if (j-3 == s2Len-1 && 0 <= i+3 && i+3 < s1Len) {
        col[(i+3)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 12);
    }
    if (i+4 == s1Len-1 && 0 <= j-4 && j-4 < s2Len) {
        row[j-4] = (int16_t)_mm256_extract_epi16_rpl(vWH, 11);
    }
    if (j-4 == s2Len-1 && 0 <= i+4 && i+4 < s1Len) {
        col[(i+4)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 11);
    }
    if (i+5 == s1Len-1 && 0 <= j-5 && j-5 < s2Len) {
        row[j-5] = (int16_t)_mm256_extract_epi16_rpl(vWH, 10);
    }
    if (j-5 == s2Len-1 && 0 <= i+5 && i+5 < s1Len) {
        col[(i+5)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 10);
    }
    if (i+6 == s1Len-1 && 0 <= j-6 && j-6 < s2Len) {
        row[j-6] = (int16_t)_mm256_extract_epi16_rpl(vWH, 9);
    }
    if (j-6 == s2Len-1 && 0 <= i+6 && i+6 < s1Len) {
        col[(i+6)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 9);
    }
    if (i+7 == s1Len-1 && 0 <= j-7 && j-7 < s2Len) {
        row[j-7] = (int16_t)_mm256_extract_epi16_rpl(vWH, 8);
    }
    if (j-7 == s2Len-1 && 0 <= i+7 && i+7 < s1Len) {
        col[(i+7)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 8);
    }
    if (i+8 == s1Len-1 && 0 <= j-8 && j-8 < s2Len) {
        row[j-8] = (int16_t)_mm256_extract_epi16_rpl(vWH, 7);
    }
    if (j-8 == s2Len-1 && 0 <= i+8 && i+8 < s1Len) {
        col[(i+8)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 7);
    }
    if (i+9 == s1Len-1 && 0 <= j-9 && j-9 < s2Len) {
        row[j-9] = (int16_t)_mm256_extract_epi16_rpl(vWH, 6);
    }
    if (j-9 == s2Len-1 && 0 <= i+9 && i+9 < s1Len) {
        col[(i+9)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 6);
    }
    if (i+10 == s1Len-1 && 0 <= j-10 && j-10 < s2Len) {
        row[j-10] = (int16_t)_mm256_extract_epi16_rpl(vWH, 5);
    }
    if (j-10 == s2Len-1 && 0 <= i+10 && i+10 < s1Len) {
        col[(i+10)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 5);
    }
    if (i+11 == s1Len-1 && 0 <= j-11 && j-11 < s2Len) {
        row[j-11] = (int16_t)_mm256_extract_epi16_rpl(vWH, 4);
    }
    if (j-11 == s2Len-1 && 0 <= i+11 && i+11 < s1Len) {
        col[(i+11)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 4);
    }
    if (i+12 == s1Len-1 && 0 <= j-12 && j-12 < s2Len) {
        row[j-12] = (int16_t)_mm256_extract_epi16_rpl(vWH, 3);
    }
    if (j-12 == s2Len-1 && 0 <= i+12 && i+12 < s1Len) {
        col[(i+12)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 3);
    }
    if (i+13 == s1Len-1 && 0 <= j-13 && j-13 < s2Len) {
        row[j-13] = (int16_t)_mm256_extract_epi16_rpl(vWH, 2);
    }
    if (j-13 == s2Len-1 && 0 <= i+13 && i+13 < s1Len) {
        col[(i+13)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 2);
    }
    if (i+14 == s1Len-1 && 0 <= j-14 && j-14 < s2Len) {
        row[j-14] = (int16_t)_mm256_extract_epi16_rpl(vWH, 1);
    }
    if (j-14 == s2Len-1 && 0 <= i+14 && i+14 < s1Len) {
        col[(i+14)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 1);
    }
    if (i+15 == s1Len-1 && 0 <= j-15 && j-15 < s2Len) {
        row[j-15] = (int16_t)_mm256_extract_epi16_rpl(vWH, 0);
    }
    if (j-15 == s2Len-1 && 0 <= i+15 && i+15 < s1Len) {
        col[(i+15)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 0);
    }
}

// Assembly:
pushq %rbp
pushq %r14
pushq %rbx
leal -0x1(%rcx), %eax
cmpl %edx, %eax
setne %r10b
testl %r8d, %r8d
sets %r11b
cmpl %r9d, %r8d
setge %bl
orb %r11b, %bl
orb %r10b, %bl
vextracti128 $0x1, %ymm0, %xmm1
movl %r8d, %r10d
jne 0x52a5a7
vpextrw $0x7, %xmm1, %r11d
movswl %r11w, %r11d
movl %r11d, (%rdi,%r10,4)
cmpl %ecx, %edx
jge 0x52a5c7
testl %edx, %edx
js 0x52a5c7
leal -0x1(%r9), %r11d
cmpl %r8d, %r11d
jne 0x52a5c7
vpextrw $0x7, %xmm1, %r11d
movswl %r11w, %r11d
movl %edx, %ebx
movl %r11d, (%rsi,%rbx,4)
leal 0x1(%rdx), %r11d
cmpl %eax, %r11d
setne %bl
testl %r8d, %r8d
setle %bpl
cmpl %r9d, %r8d
setg %r14b
orb %bpl, %r14b
orb %bl, %r14b
jne 0x52a5f4
vpextrw $0x6, %xmm1, %ebx
movswl %bx, %ebx
movl %ebx, -0x4(%rdi,%r10,4)
cmpl %ecx, %r11d
jge 0x52a613
cmpl $-0x1, %edx
jl 0x52a613
cmpl %r9d, %r8d
jne 0x52a613
vpextrw $0x6, %xmm1, %r10d
movswl %r10w, %r10d
movl %r11d, %r11d
movl %r10d, (%rsi,%r11,4)
leal 0x2(%rdx), %r10d
cmpl %eax, %r10d
jne 0x52a646
leal -0x2(%r8), %r11d
cmpl $0x2, %r8d
setge %bl
cmpl %r9d, %r11d
setl %bpl
andb %bl, %bpl
cmpb $0x1, %bpl
jne 0x52a646
vpextrw $0x5, %xmm1, %ebx
movswl %bx, %ebx
movl %r11d, %r11d
movl %ebx, (%rdi,%r11,4)
cmpl %ecx, %r10d
jge 0x52a669
cmpl $-0x2, %edx
jl 0x52a669
leal -0x1(%r8), %r11d
cmpl %r9d, %r11d
jne 0x52a669
vpextrw $0x5, %xmm1, %r11d
movswl %r11w, %r11d
movl %r10d, %r10d
movl %r11d, (%rsi,%r10,4)
leal 0x3(%rdx), %r10d
cmpl %eax, %r10d
jne 0x52a69c
leal -0x3(%r8), %r11d
cmpl $0x3, %r8d
setge %bl
cmpl %r9d, %r11d
setl %bpl
andb %bl, %bpl
cmpb $0x1, %bpl
jne 0x52a69c
vpextrw $0x4, %xmm1, %ebx
movswl %bx, %ebx
movl %r11d, %r11d
movl %ebx, (%rdi,%r11,4)
cmpl %ecx, %r10d
jge 0x52a6bf
cmpl $-0x3, %edx
jl 0x52a6bf
leal -0x2(%r8), %r11d
cmpl %r9d, %r11d
jne 0x52a6bf
vpextrw $0x4, %xmm1, %r11d
movswl %r11w, %r11d
movl %r10d, %r10d
movl %r11d, (%rsi,%r10,4)
leal 0x4(%rdx), %r10d
cmpl %eax, %r10d
jne 0x52a6f2
leal -0x4(%r8), %r11d
cmpl $0x4, %r8d
setge %bl
cmpl %r9d, %r11d
setl %bpl
andb %bl, %bpl
cmpb $0x1, %bpl
jne 0x52a6f2
vpextrw $0x3, %xmm1, %ebx
movswl %bx, %ebx
movl %r11d, %r11d
movl %ebx, (%rdi,%r11,4)
cmpl %ecx, %r10d
jge 0x52a715
cmpl $-0x4, %edx
jl 0x52a715
leal -0x3(%r8), %r11d
cmpl %r9d, %r11d
jne 0x52a715
vpextrw $0x3, %xmm1, %r11d
movswl %r11w, %r11d
movl %r10d, %r10d
movl %r11d, (%rsi,%r10,4)
leal 0x5(%rdx), %r10d
cmpl %eax, %r10d
jne 0x52a748
leal -0x5(%r8), %r11d
cmpl $0x5, %r8d
setge %bl
cmpl %r9d, %r11d
setl %bpl
andb %bl, %bpl
cmpb $0x1, %bpl
jne 0x52a748
vpextrw $0x2, %xmm1, %ebx
movswl %bx, %ebx
movl %r11d, %r11d
movl %ebx, (%rdi,%r11,4)
cmpl %ecx, %r10d
jge 0x52a76b
cmpl $-0x5, %edx
jl 0x52a76b
leal -0x4(%r8), %r11d
cmpl %r9d, %r11d
jne 0x52a76b
vpextrw $0x2, %xmm1, %r11d
movswl %r11w, %r11d
movl %r10d, %r10d
movl %r11d, (%rsi,%r10,4)
leal 0x6(%rdx), %r10d
cmpl %eax, %r10d
jne 0x52a79e
leal -0x6(%r8), %r11d
cmpl $0x6, %r8d
setge %bl
cmpl %r9d, %r11d
setl %bpl
andb %bl, %bpl
cmpb $0x1, %bpl
jne 0x52a79e
vpextrw $0x1, %xmm1, %ebx
movswl %bx, %ebx
movl %r11d, %r11d
movl %ebx, (%rdi,%r11,4)
cmpl %ecx, %r10d
jge 0x52a7c1
cmpl $-0x6, %edx
jl 0x52a7c1
leal -0x5(%r8), %r11d
cmpl %r9d, %r11d
jne 0x52a7c1
vpextrw $0x1, %xmm1, %r11d
movswl %r11w, %r11d
movl %r10d, %r10d
movl %r11d, (%rsi,%r10,4)
leal 0x7(%rdx), %r10d
cmpl %eax, %r10d
jne 0x52a7f3
leal -0x7(%r8), %r11d
cmpl $0x7, %r8d
setge %bl
cmpl %r9d, %r11d
setl %bpl
andb %bl, %bpl
cmpb $0x1, %bpl
jne 0x52a7f3
vmovd %xmm1, %ebx
movswl %bx, %ebx
movl %r11d, %r11d
movl %ebx, (%rdi,%r11,4)
cmpl %ecx, %r10d
jge 0x52a816
cmpl $-0x7, %edx
jl 0x52a816
leal -0x6(%r8), %r11d
cmpl %r9d, %r11d
jne 0x52a816
vmovd %xmm1, %r11d
movswl %r11w, %r11d
movl %r10d, %r10d
movl %r11d, (%rsi,%r10,4)
leal 0x8(%rdx), %r10d
cmpl %eax, %r10d
jne 0x52a849
leal -0x8(%r8), %r11d
cmpl $0x8, %r8d
setge %bl
cmpl %r9d, %r11d
setl %bpl
andb %bl, %bpl
cmpb $0x1, %bpl
jne 0x52a849
vpextrw $0x7, %xmm0, %ebx
movswl %bx, %ebx
movl %r11d, %r11d
movl %ebx, (%rdi,%r11,4)
cmpl %ecx, %r10d
jge 0x52a86c
cmpl $-0x8, %edx
jl 0x52a86c
leal -0x7(%r8), %r11d
cmpl %r9d, %r11d
jne 0x52a86c
vpextrw $0x7, %xmm0, %r11d
movswl %r11w, %r11d
movl %r10d, %r10d
movl %r11d, (%rsi,%r10,4)
leal 0x9(%rdx), %r10d
cmpl %eax, %r10d
jne 0x52a89f
leal -0x9(%r8), %r11d
cmpl $0x9, %r8d
setge %bl
cmpl %r9d, %r11d
setl %bpl
andb %bl, %bpl
cmpb $0x1, %bpl
jne 0x52a89f
vpextrw $0x6, %xmm0, %ebx
movswl %bx, %ebx
movl %r11d, %r11d
movl %ebx, (%rdi,%r11,4)
cmpl %ecx, %r10d
jge 0x52a8c2
cmpl $-0x9, %edx
jl 0x52a8c2
leal -0x8(%r8), %r11d
cmpl %r9d, %r11d
jne 0x52a8c2
vpextrw $0x6, %xmm0, %r11d
movswl %r11w, %r11d
movl %r10d, %r10d
movl %r11d, (%rsi,%r10,4)
leal 0xa(%rdx), %r10d
cmpl %eax, %r10d
jne 0x52a8f5
leal -0xa(%r8), %r11d
cmpl $0xa, %r8d
setge %bl
cmpl %r9d, %r11d
setl %bpl
andb %bl, %bpl
cmpb $0x1, %bpl
jne 0x52a8f5
vpextrw $0x5, %xmm0, %ebx
movswl %bx, %ebx
movl %r11d, %r11d
movl %ebx, (%rdi,%r11,4)
cmpl %ecx, %r10d
jge 0x52a918
cmpl $-0xa, %edx
jl 0x52a918
leal -0x9(%r8), %r11d
cmpl %r9d, %r11d
jne 0x52a918
vpextrw $0x5, %xmm0, %r11d
movswl %r11w, %r11d
movl %r10d, %r10d
movl %r11d, (%rsi,%r10,4)
leal 0xb(%rdx), %r10d
cmpl %eax, %r10d
jne 0x52a94b
leal -0xb(%r8), %r11d
cmpl $0xb, %r8d
setge %bl
cmpl %r9d, %r11d
setl %bpl
andb %bl, %bpl
cmpb $0x1, %bpl
jne 0x52a94b
vpextrw $0x4, %xmm0, %ebx
movswl %bx, %ebx
movl %r11d, %r11d
movl %ebx, (%rdi,%r11,4)
cmpl %ecx, %r10d
jge 0x52a96e
cmpl $-0xb, %edx
jl 0x52a96e
leal -0xa(%r8), %r11d
cmpl %r9d, %r11d
jne 0x52a96e
vpextrw $0x4, %xmm0, %r11d
movswl %r11w, %r11d
movl %r10d, %r10d
movl %r11d, (%rsi,%r10,4)
leal 0xc(%rdx), %r10d
cmpl %eax, %r10d
jne 0x52a9a1
leal -0xc(%r8), %r11d
cmpl $0xc, %r8d
setge %bl
cmpl %r9d, %r11d
setl %bpl
andb %bl, %bpl
cmpb $0x1, %bpl
jne 0x52a9a1
vpextrw $0x3, %xmm0, %ebx
movswl %bx, %ebx
movl %r11d, %r11d
movl %ebx, (%rdi,%r11,4)
cmpl %ecx, %r10d
jge 0x52a9c4
cmpl $-0xc, %edx
jl 0x52a9c4
leal -0xb(%r8), %r11d
cmpl %r9d, %r11d
jne 0x52a9c4
vpextrw $0x3, %xmm0, %r11d
movswl %r11w, %r11d
movl %r10d, %r10d
movl %r11d, (%rsi,%r10,4)
leal 0xd(%rdx), %r10d
cmpl %eax, %r10d
jne 0x52a9f7
leal -0xd(%r8), %r11d
cmpl $0xd, %r8d
setge %bl
cmpl %r9d, %r11d
setl %bpl
andb %bl, %bpl
cmpb $0x1, %bpl
jne 0x52a9f7
vpextrw $0x2, %xmm0, %ebx
movswl %bx, %ebx
movl %r11d, %r11d
movl %ebx, (%rdi,%r11,4)
cmpl %ecx, %r10d
jge 0x52aa1a
cmpl $-0xd, %edx
jl 0x52aa1a
leal -0xc(%r8), %r11d
cmpl %r9d, %r11d
jne 0x52aa1a
vpextrw $0x2, %xmm0, %r11d
movswl %r11w, %r11d
movl %r10d, %r10d
movl %r11d, (%rsi,%r10,4)
leal 0xe(%rdx), %r10d
cmpl %eax, %r10d
jne 0x52aa4d
leal -0xe(%r8), %r11d
cmpl $0xe, %r8d
setge %bl
cmpl %r9d, %r11d
setl %bpl
andb %bl, %bpl
cmpb $0x1, %bpl
jne 0x52aa4d
vpextrw $0x1, %xmm0, %ebx
movswl %bx, %ebx
movl %r11d, %r11d
movl %ebx, (%rdi,%r11,4)
cmpl %ecx, %r10d
jge 0x52aa70
cmpl $-0xe, %edx
jl 0x52aa70
leal -0xd(%r8), %r11d
cmpl %r9d, %r11d
jne 0x52aa70
vpextrw $0x1, %xmm0, %r11d
movswl %r11w, %r11d
movl %r10d, %r10d
movl %r11d, (%rsi,%r10,4)
leal 0xf(%rdx), %r10d
cmpl %eax, %r10d
jne 0x52aaa2
leal -0xf(%r8), %eax
cmpl $0xf, %r8d
setge %r11b
cmpl %r9d, %eax
setl %bl
andb %r11b, %bl
cmpb $0x1, %bl
jne 0x52aaa2
vmovd %xmm0, %r11d
movswl %r11w, %r11d
movl %eax, %eax
movl %r11d, (%rdi,%rax,4)
cmpl %ecx, %r10d
jge 0x52aac0
cmpl $-0xf, %edx
jl 0x52aac0
addl $-0xe, %r8d
cmpl %r9d, %r8d
jne 0x52aac0
vmovd %xmm0, %eax
cwtl
movl %r10d, %ecx
movl %eax, (%rsi,%rcx,4)
popq %rbx
popq %r14
popq %rbp
vzeroupper
retq