// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_top.c
// Function: create_top_module
int create_top_module()
{
	MODULE_TREE *now_module_tree = NULL;
	MEMORY_TREE *now_memory_tree = NULL;
	CALL_TREE *now_call_tree = NULL;
	CALL_SIGNAL_TREE *now_call_signal_tree = NULL;
	char *module_name;
	char *call_signal_name;
	int args_num;
	char *label;
	char *verilog_signal;
	char *verilog_wire;
	char *verilog_module;
	int inout;

	printf("[Create top Module]\n");

	call_signal_name	= calloc(STR_MAX, 1);
	label				= calloc(STR_MAX, 1);
	verilog_signal		= calloc(STR_MAX, 1);
	verilog_wire		= calloc(STR_MAX, 1);
	verilog_module		= calloc(STR_MAX, 1);

    now_module_tree = module_tree_top;
    while(now_module_tree != NULL){
		// 初期化
		args_num = 0;
		module_name = calloc(strlen(now_module_tree->module_name)+1,1);
		strcpy(module_name, convname(sep_p(now_module_tree->module_name)));

		// モジュール宣言
		sprintf(verilog_module, "%s u_%s(\n", module_name, module_name);
		register_top_module_decl(verilog_module);

		// 制御信号の生成
		sprintf(verilog_module, "\t// system signals\n");
		register_top_module_decl(verilog_module);
		{
			sprintf(verilog_module, "\t.__func_clock(system_clock),\n");
			register_top_module_decl(verilog_module);
			sprintf(verilog_module, "\t.__func_reset(system_reset),\n");
			register_top_module_decl(verilog_module);
			// __func_start(in)
			sprintf(label, "__func_start");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_CTRL, SIG_IN, 0, NULL, 0, verilog_signal, verilog_wire);
			// ToDo: 接続されるべき信号を検索してWired OR宣言を生成する。
			// __func_done(out)
			sprintf(label, "__func_done");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_CTRL, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __func_ready(out)
			sprintf(label, "__func_ready");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_CTRL, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
		}

		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// メモリバスの生成
		sprintf(verilog_module, "\t// memory bus\n");
		register_top_module_decl(verilog_module);
		if(now_module_tree->is_module_gm_if){
			use_gm_if = 1;

			// __gm_base(in)
			sprintf(label, "__gm_base");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [31:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_IN, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_req(out)
			sprintf(label, "__gm_req");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_rnw(out)
			sprintf(label, "__gm_rnw");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_done(in)
			sprintf(label, "__gm_done");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_IN, 0, NULL, 0, verilog_signal, verilog_wire);
			// ToDo: 接続されるべき信号を検索してWired OR宣言を生成する。
			// __gm_adrs(out)
			sprintf(label, "__gm_adrs");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [31:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_leng(out)
			sprintf(label, "__gm_leng");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [1:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_di(in)
			sprintf(label, "__gm_di");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [31:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_IN, 0, NULL, 0, verilog_signal, verilog_wire);
			// ToDo: 接続されるべき信号を検索してWired OR宣言を生成する。
			// __gm_do(out)
			sprintf(label, "__gm_do");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [31:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
		}

		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// メモリアドレスの生成
		sprintf(verilog_module, "\t// base address\n");
		register_top_module_decl(verilog_module);
		{
			now_memory_tree = now_module_tree->memory_tree_ptr;
			while(now_memory_tree != NULL){
				if(now_memory_tree->flag == MEMORY_FLAG_GLOBAL){
					sprintf(label, "%s", convname(sep_p(now_memory_tree->label)));
//					sprintf(verilog_signal, "%s%s", module_name, label);
					sprintf(verilog_module, "\t.__base_%s(__base_%s),\n", label, label);
					register_top_module_decl(verilog_module);
//					sprintf(verilog_wire, "wire [31:0] %s", module_name);
//					register_top_signal_tree(label, verilog_signal, 0, 0, verilog_wire);
				}
				now_memory_tree = now_memory_tree->next_ptr;
			}
		}
		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// 引数の生成
		sprintf(verilog_module, "\t// arguments\n");
		register_top_module_decl(verilog_module);
		args_num = 0;
		{
			now_memory_tree = now_module_tree->memory_tree_ptr;
			while(now_memory_tree != NULL){
				if(now_memory_tree->flag == MEMORY_FLAG_REGISTER){
					sprintf(label, "__args_%s", convname(sep_p(now_memory_tree->label)));
					sprintf(verilog_signal, "%s%s", module_name, label);
					sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
					register_top_module_decl(verilog_module);
//					sprintf(verilog_wire, "wire [31:0] %s", verilog_signal);
//					register_top_signal_tree(label, module_name, label, 0, 0, 0, verilog_signal, verilog_wire);

					if(now_memory_tree->size > 0){
						sprintf(verilog_wire, "wire [%d:0] %s;", now_memory_tree->size*8-1, verilog_signal);
					}else{
						sprintf(verilog_wire, "wire %s;", verilog_signal);
					}
					register_top_signal_tree(label, module_name, convname(sep_p(now_memory_tree->label)), FLAG_ARGS, SIG_IN, now_memory_tree->size, NULL, args_num, verilog_signal, verilog_wire);
					// ToDo: 接続されるべき信号を検索してWired OR宣言を生成する。
					args_num ++;
				}
				now_memory_tree = now_memory_tree->next_ptr;
			}
		}
		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// CALL命令の生成
		sprintf(verilog_module, "\t// call instruction\n");
		register_top_module_decl(verilog_module);
		{
			now_call_tree = now_module_tree->call_tree_ptr;
			while(now_call_tree != NULL){
				now_call_signal_tree = now_call_tree->signal_top_ptr;
				while(now_call_signal_tree != NULL){
					if(
						!strcmp(now_call_signal_tree->signal_name, "req") ||
						!strcmp(now_call_signal_tree->signal_name, "ready") ||
						!strcmp(now_call_signal_tree->signal_name, "done") ||
						!strcmp(now_call_signal_tree->signal_name, "result")
					){
						sprintf(label, "__call_%s_%s", convname(sep_p(now_call_tree->call_name)), now_call_signal_tree->signal_name);
					}else{
						sprintf(label, "__call_%s_%s_%d", convname(sep_p(now_call_tree->call_name)), now_call_signal_tree->signal_name, now_call_signal_tree->num);
					}
					sprintf(verilog_signal, "%s%s", module_name, label);
					sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
					register_top_module_decl(verilog_module);
					if(now_call_signal_tree->size > 0){
						sprintf(verilog_wire, "wire [%d:0] %s;", now_call_signal_tree->size-1, verilog_signal);
					}else{
						sprintf(verilog_wire, "wire %s;", verilog_signal);
					}
					if(
						!strcmp(now_call_signal_tree->signal_name, "done") ||
						!strcmp(now_call_signal_tree->signal_name, "ready") ||
						!strcmp(now_call_signal_tree->signal_name, "result")
					){
						inout = SIG_IN;
					}else{
						inout = SIG_OUT;
					}
					register_top_signal_tree(label, module_name, now_call_signal_tree->signal_name, FLAG_CALL, inout, 0, convname(sep_p(now_call_tree->call_name)), now_call_signal_tree->num, verilog_signal, verilog_wire);
					now_call_signal_tree = now_call_signal_tree->next_ptr;
				}
				sprintf(verilog_module, "\n");
				now_call_tree = now_call_tree->next_ptr;
			}
		}

		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// 戻り値の生成
		sprintf(verilog_module, "\t// return value\n");
		register_top_module_decl(verilog_module);

		{
			now_memory_tree = now_module_tree->memory_tree_ptr;
			while(now_memory_tree != NULL){
				if(now_memory_tree->flag == MEMORY_FLAG_RETURN){
					if(strcmp(now_memory_tree->type, "void")){
						sprintf(verilog_signal, "%s__func_result", module_name);
						sprintf(verilog_module, "\t.%s(%s)\n", "__func_result", verilog_signal);
						register_top_module_decl(verilog_module);

						if(now_memory_tree->size > 0){
							sprintf(verilog_wire, "wire [%d:0] %s;", now_memory_tree->size*8-1,verilog_signal);
						}else{
							sprintf(verilog_wire, "wire %s;", verilog_signal);
						}

						register_top_signal_tree("__func_result", module_name, verilog_signal, FLAG_RETURN, SIG_OUT, now_memory_tree->size, verilog_signal, 0, verilog_signal, verilog_wire);
					}
				}
				now_memory_tree = now_memory_tree->next_ptr;
			}
		}

//		sprintf(verilog_module, "\n");
//		register_top_module_decl(verilog_module);
//		sprintf(verilog_module, "\t.__dummy()\n");
//		register_top_module_decl(verilog_module);
		sprintf(verilog_module, ");\n");
		register_top_module_decl(verilog_module);

        now_module_tree = now_module_tree->next_ptr;

        free(module_name);
    }

    free(call_signal_name);
    free(verilog_signal);

	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x38, %rsp
leaq 0x548e(%rip), %rdi      # 0x10019
callq 0x1070
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x1100
movq %rax, %rbx
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x1100
movq %rax, %r14
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x1100
movq %rax, %rbp
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x1100
movq %rax, %r13
leaq 0x99a1(%rip), %rax      # 0x14580
movq (%rax), %r12
testq %r12, %r12
je 0xb816
movq %rbp, 0x28(%rsp)
movq %r13, 0x18(%rsp)
movq %r14, 0x20(%rsp)
movq 0x10(%r12), %r15
movq %r15, %rdi
callq 0x1090
leaq 0x1(%rax), %rdi
movl $0x1, %esi
callq 0x1100
movq %rax, 0x8(%rsp)
movzbl (%r15), %eax
cmpl $0x40, %eax
movq %r12, 0x10(%rsp)
je 0xac2d
cmpl $0x25, %eax
jne 0xac30
incq %r15
movq %r15, %rdi
callq 0x13b8
movq 0x8(%rsp), %r12
movq %r12, %rdi
movq %rax, %rsi
callq 0x1060
movq %r13, %rdi
leaq 0x5029(%rip), %rsi      # 0xfc7b
movq %r12, %rdx
movq %r12, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movups 0x5017(%rip), %xmm0     # 0xfc85
movups %xmm0, (%r13)
movl $0xa736c, 0x10(%r13)    # imm = 0xA736C
movq %r13, %rdi
callq 0x9f78
movups 0x500f(%rip), %xmm0     # 0xfc99
movups %xmm0, (%r13)
movups 0x5012(%rip), %xmm0     # 0xfca8
movups %xmm0, 0xf(%r13)
movq %r13, %rdi
callq 0x9f78
movups 0x500e(%rip), %xmm0     # 0xfcb8
movups %xmm0, (%r13)
movups 0x5011(%rip), %xmm0     # 0xfcc7
movups %xmm0, 0xf(%r13)
movq %r13, %rdi
callq 0x9f78
movabsq $0x735f636e75665f5f, %rax # imm = 0x735F636E75665F5F
movq %rax, (%rbx)
movabsq $0x74726174735f63, %rax # imm = 0x74726174735F63
movq %rax, 0x5(%rbx)
movq %r14, %rdi
leaq 0x3566(%rip), %rsi      # 0xe24e
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
leaq 0x4fd8(%rip), %rsi      # 0xfcd7
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movq %rbp, %rdi
leaq 0x4fc4(%rip), %rsi      # 0xfce2
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
xorl %r15d, %r15d
pushq %r15
pushq %r15
callq 0xa0fc
addq $0x20, %rsp
movabsq $0x645f636e75665f5f, %rax # imm = 0x645F636E75665F5F
movq %rax, (%rbx)
movl $0x656e6f, 0x8(%rbx)    # imm = 0x656E6F
movq %r14, %rdi
leaq 0x34e1(%rip), %rsi      # 0xe24e
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
leaq 0x4f53(%rip), %rsi      # 0xfcd7
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movq %rbp, %rdi
leaq 0x4f3f(%rip), %rsi      # 0xfce2
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x1, %ecx
movl $0x1, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa0fc
addq $0x20, %rsp
movabsq $0x725f636e75665f5f, %rax # imm = 0x725F636E75665F5F
movq %rax, (%rbx)
movabsq $0x79646165725f63, %rax # imm = 0x79646165725F63
movq %rax, 0x5(%rbx)
movq %r14, %rdi
leaq 0x3455(%rip), %rsi      # 0xe24e
xorl %r15d, %r15d
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
leaq 0x4ec4(%rip), %rsi      # 0xfcd7
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movq %rbp, %rdi
leaq 0x4eb0(%rip), %rsi      # 0xfce2
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x1, %ecx
movl $0x1, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa0fc
addq $0x20, %rsp
movw $0xa, (%r13)
movq %r13, %rdi
callq 0x9f78
movups 0x4e8b(%rip), %xmm0     # 0xfd04
movups %xmm0, (%r13)
movq %r13, %rdi
callq 0x9f78
movq 0x10(%rsp), %rax
cmpl %r15d, 0x28(%rax)
je 0xb2aa
movl $0x1, 0x972d(%rip)      # 0x145cc
movw $0x65, %ax
movw %ax, 0x8(%rbx)
movabsq $0x7361625f6d675f5f, %rax # imm = 0x7361625F6D675F5F
movq %rax, (%rbx)
movq %r14, %rdi
leaq 0x3390(%rip), %rsi      # 0xe24e
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
leaq 0x4e02(%rip), %rsi      # 0xfcd7
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movq %rbp, %rdi
leaq 0x4e20(%rip), %rsi      # 0xfd14
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa0fc
addq $0x20, %rsp
movabsq $0x7165725f6d675f5f, %rax # imm = 0x7165725F6D675F5F
movq %rax, (%rbx)
movb %r15b, 0x8(%rbx)
movq %r14, %rdi
leaq 0x3311(%rip), %rsi      # 0xe24e
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
leaq 0x4d83(%rip), %rsi      # 0xfcd7
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movq %rbp, %rdi
leaq 0x4d6f(%rip), %rsi      # 0xfce2
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
movl $0x1, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa0fc
addq $0x20, %rsp
movabsq $0x776e725f6d675f5f, %rax # imm = 0x776E725F6D675F5F
movq %rax, (%rbx)
movb %r15b, 0x8(%rbx)
movq %r14, %rdi
leaq 0x328f(%rip), %rsi      # 0xe24e
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
leaq 0x4d01(%rip), %rsi      # 0xfcd7
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movq %rbp, %rdi
leaq 0x4ced(%rip), %rsi      # 0xfce2
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
movl $0x1, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa0fc
addq $0x20, %rsp
movabsq $0x6e6f645f6d675f5f, %rax # imm = 0x6E6F645F6D675F5F
movq %rax, (%rbx)
movw $0x65, %ax
movw %ax, 0x8(%rbx)
movq %r14, %rdi
leaq 0x3209(%rip), %rsi      # 0xe24e
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
leaq 0x4c7b(%rip), %rsi      # 0xfcd7
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movq %rbp, %rdi
leaq 0x4c67(%rip), %rsi      # 0xfce2
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa0fc
addq $0x20, %rsp
movabsq $0x7264615f6d675f5f, %rax # imm = 0x7264615F6D675F5F
movq %rax, (%rbx)
movw $0x73, 0x8(%rbx)
movq %r14, %rdi
leaq 0x3188(%rip), %rsi      # 0xe24e
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
leaq 0x4bfa(%rip), %rsi      # 0xfcd7
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movq %rbp, %rdi
leaq 0x4c18(%rip), %rsi      # 0xfd14
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
movl $0x1, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa0fc
addq $0x20, %rsp
movabsq $0x6e656c5f6d675f5f, %rax # imm = 0x6E656C5F6D675F5F
movq %rax, (%rbx)
movw $0x67, 0x8(%rbx)
movq %r14, %rdi
leaq 0x3104(%rip), %rsi      # 0xe24e
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
leaq 0x4b76(%rip), %rsi      # 0xfcd7
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movq %rbp, %rdi
leaq 0x4bca(%rip), %rsi      # 0xfd4a
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
movl $0x1, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa0fc
addq $0x20, %rsp
movabsq $0x69645f6d675f5f, %rax # imm = 0x69645F6D675F5F
movq %rax, (%rbx)
movq %r14, %rdi
leaq 0x3086(%rip), %rsi      # 0xe24e
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
leaq 0x4af8(%rip), %rsi      # 0xfcd7
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movq %rbp, %rdi
leaq 0x4b16(%rip), %rsi      # 0xfd14
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa0fc
addq $0x20, %rsp
movabsq $0x6f645f6d675f5f, %rax # imm = 0x6F645F6D675F5F
movq %rax, (%rbx)
movq %r14, %rdi
leaq 0x300b(%rip), %rsi      # 0xe24e
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
leaq 0x4a7d(%rip), %rsi      # 0xfcd7
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movq %rbp, %rdi
leaq 0x4a9b(%rip), %rsi      # 0xfd14
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
movl $0x1, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa0fc
addq $0x20, %rsp
movw $0xa, %r15w
movw %r15w, (%r13)
movq %r13, %rdi
callq 0x9f78
movw %r15w, 0x10(%r13)
movups 0x4a91(%rip), %xmm0     # 0xfd59
movups %xmm0, (%r13)
movq %r13, %rdi
callq 0x9f78
movq 0x10(%rsp), %r12
movq 0x18(%r12), %r15
testq %r15, %r15
je 0xb334
cmpl $0x1, 0x10(%r15)
jne 0xb32e
movq 0x18(%r15), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xb2fc
cmpl $0x25, %eax
jne 0xb2ff
incq %rdi
callq 0x13b8
movq %rbx, %rdi
movq %rax, %rsi
callq 0x1060
movq %r13, %rdi
leaq 0x4a52(%rip), %rsi      # 0xfd6b
movq %rbx, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movq 0x8(%r15), %r15
jmp 0xb2df
movw $0xa, (%r13)
movq %r13, %rdi
callq 0x9f78
movabsq $0x75677261202f2f09, %rax # imm = 0x75677261202F2F09
movq %rax, (%r13)
movabsq $0xa73746e656d75, %rax  # imm = 0xA73746E656D75
movq %rax, 0x7(%r13)
movq %r13, %rdi
callq 0x9f78
movq 0x18(%r12), %r15
testq %r15, %r15
je 0xb471
xorl %r12d, %r12d
cmpl $0x4, 0x10(%r15)
jne 0xb464
movq 0x18(%r15), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xb394
cmpl $0x25, %eax
jne 0xb397
incq %rdi
callq 0x13b8
movq %rbx, %rdi
leaq 0x49ed(%rip), %rsi      # 0xfd93
movq %rax, %rdx
xorl %eax, %eax
callq 0x11b0
movq %r14, %rdi
leaq 0x2e94(%rip), %rsi      # 0xe24e
movq 0x8(%rsp), %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
leaq 0x4904(%rip), %rsi      # 0xfcd7
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movl 0x44(%r15), %eax
testl %eax, %eax
jle 0xb40d
leal -0x1(,%rax,8), %edx
movq %rbp, %rdi
leaq 0x499c(%rip), %rsi      # 0xfd9d
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
jmp 0xb421
movq %rbp, %rdi
leaq 0x48cb(%rip), %rsi      # 0xfce2
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
movq 0x18(%r15), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xb432
cmpl $0x25, %eax
jne 0xb435
incq %rdi
callq 0x13b8
movl 0x44(%r15), %r9d
movq %rbx, %rdi
movq 0x8(%rsp), %rsi
movq %rax, %rdx
movl $0x3, %ecx
xorl %r8d, %r8d
pushq %rbp
pushq %r14
pushq %r12
pushq $0x0
callq 0xa0fc
addq $0x20, %rsp
incl %r12d
movq 0x8(%r15), %r15
testq %r15, %r15
jne 0xb378
movw $0xa, (%r13)
movq %r13, %rdi
callq 0x9f78
movabsq $0xa6e6f69746375, %rax  # imm = 0xA6E6F69746375
movq %rax, 0xe(%r13)
movups 0x4918(%rip), %xmm0     # 0xfdad
movups %xmm0, (%r13)
movq %r13, %rdi
callq 0x9f78
movq 0x10(%rsp), %rax
movq 0x20(%rax), %r14
testq %r14, %r14
leaq 0x4822(%rip), %r13      # 0xfcd7
je 0xb6d6
movq 0x20(%r14), %r12
testq %r12, %r12
je 0xb6bf
movq %r14, 0x30(%rsp)
movq 0x10(%r12), %r15
movq %r15, %rdi
leaq 0x484d(%rip), %rsi      # 0xfd29
callq 0x1110
testl %eax, %eax
je 0xb55e
movq %r15, %rdi
leaq 0x480f(%rip), %rsi      # 0xfcfe
callq 0x1110
testl %eax, %eax
je 0xb55e
movq %r15, %rdi
leaq 0x47f0(%rip), %rsi      # 0xfcf2
callq 0x1110
testl %eax, %eax
je 0xb55e
movq %r15, %rdi
leaq 0x48c9(%rip), %rsi      # 0xfdde
callq 0x1110
testl %eax, %eax
je 0xb55e
movq 0x10(%r14), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xb52f
cmpl $0x25, %eax
jne 0xb532
incq %rdi
leaq 0x2d15(%rip), %r15      # 0xe24e
callq 0x13b8
movq 0x10(%r12), %rcx
movl 0x28(%r12), %r8d
movq %rbx, %rdi
leaq 0x459a(%rip), %rsi      # 0xfaec
movq %rax, %rdx
xorl %eax, %eax
callq 0x11b0
jmp 0xb597
movq 0x10(%r14), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xb56f
cmpl $0x25, %eax
jne 0xb572
incq %rdi
leaq 0x2cd5(%rip), %r15      # 0xe24e
callq 0x13b8
movq 0x10(%r12), %rcx
movq %rbx, %rdi
leaq 0x30c8(%rip), %rsi      # 0xe655
movq %rax, %rdx
xorl %eax, %eax
callq 0x11b0
movq 0x20(%rsp), %r14
movq %r14, %rdi
movq %r15, %rsi
movq 0x8(%rsp), %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq 0x18(%rsp), %r15
movq %r15, %rdi
movq %r13, %rsi
movq %rbx, %r13
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r15, %rdi
callq 0x9f78
movl 0x24(%r12), %edx
testl %edx, %edx
jle 0xb5f5
decl %edx
movq %rbp, %rdi
leaq 0x47b4(%rip), %rsi      # 0xfd9d
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
jmp 0xb609
movq %rbp, %rdi
leaq 0x46e3(%rip), %rsi      # 0xfce2
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
movq 0x10(%r12), %rbp
movq %rbp, %rdi
leaq 0x46da(%rip), %rsi      # 0xfcf2
callq 0x1110
xorl %r15d, %r15d
testl %eax, %eax
movq %r13, %rbx
movq 0x30(%rsp), %r14
je 0xb660
movq %rbp, %rdi
leaq 0x46c8(%rip), %rsi      # 0xfcfe
callq 0x1110
testl %eax, %eax
leaq 0x4693(%rip), %r13      # 0xfcd7
je 0xb667
movq %rbp, %rdi
leaq 0x478e(%rip), %rsi      # 0xfdde
callq 0x1110
xorl %r15d, %r15d
testl %eax, %eax
setne %r15b
jmp 0xb667
leaq 0x4670(%rip), %r13      # 0xfcd7
movq 0x10(%r14), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xb678
cmpl $0x25, %eax
jne 0xb67b
incq %rdi
callq 0x13b8
movl 0x28(%r12), %r10d
movq %rbx, %rdi
movq 0x8(%rsp), %rsi
movq %rbp, %rdx
movl $0x5, %ecx
movl %r15d, %r8d
xorl %r9d, %r9d
movq 0x28(%rsp), %rbp
pushq %rbp
pushq 0x28(%rsp)
pushq %r10
pushq %rax
callq 0xa0fc
addq $0x20, %rsp
movq 0x8(%r12), %r12
testq %r12, %r12
jne 0xb4cd
movq 0x18(%rsp), %rax
movw $0xa, (%rax)
movq 0x8(%r14), %r14
testq %r14, %r14
jne 0xb4bb
movq 0x18(%rsp), %r13
movw $0xa, %r14w
movw %r14w, (%r13)
movq %r13, %rdi
callq 0x9f78
movw %r14w, 0x10(%r13)
movups 0x46ca(%rip), %xmm0     # 0xfdc3
movups %xmm0, (%r13)
movq %r13, %rdi
callq 0x9f78
movq 0x10(%rsp), %r12
movq 0x18(%r12), %r15
testq %r15, %r15
movq 0x20(%rsp), %r14
je 0xb7ee
cmpl $0x5, 0x10(%r15)
jne 0xb7e1
movq 0x20(%r15), %rdi
leaq 0x28d0(%rip), %rsi      # 0xe004
callq 0x1110
testl %eax, %eax
je 0xb7e1
movq %r14, %rdi
leaq 0x468a(%rip), %rsi      # 0xfdd5
movq 0x8(%rsp), %rdx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
leaq 0x4684(%rip), %rsi      # 0xfde5
leaq 0x466f(%rip), %rdx      # 0xfdd7
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x9f78
movl 0x44(%r15), %eax
testl %eax, %eax
jle 0xb79f
leal -0x1(,%rax,8), %edx
movq %rbp, %rdi
leaq 0x460a(%rip), %rsi      # 0xfd9d
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
jmp 0xb7b3
movq %rbp, %rdi
leaq 0x4539(%rip), %rsi      # 0xfce2
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
movl 0x44(%r15), %r9d
leaq 0x4619(%rip), %rdi      # 0xfdd7
movq 0x8(%rsp), %rsi
movq %r14, %rdx
movl $0x6, %ecx
movl $0x1, %r8d
pushq %rbp
pushq %r14
pushq $0x0
pushq %r14
callq 0xa0fc
addq $0x20, %rsp
movq 0x8(%r15), %r15
testq %r15, %r15
jne 0xb71e
movl $0xa3b29, (%r13)        # imm = 0xA3B29
movq %r13, %rdi
callq 0x9f78
movq 0x8(%r12), %r12
movq 0x8(%rsp), %rdi
callq 0x1030
testq %r12, %r12
jne 0xabfa
movq %r14, %rdi
callq 0x1030
xorl %eax, %eax
addq $0x38, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq