// File: /workspace/github_c_makefile_star2_O0/hamsternz[P]emulate-risc-v/memorymap.c
// Function: memorymap_write
int memorymap_write(uint32_t address, uint32_t width, uint32_t value) {
   /* Read the memory region */
   switch(address & 3) {
     case 0:
       switch(width) {
	 case 0xFFFFFFFF:
	 case 0xF:
	 case 4:
           if(!memorymap_aligned_write(address+0, 0xF, value))  return 0;
	   return 1;
	 case 0xFFFF:
	 case 0x3:
	 case 2:
           if(!memorymap_aligned_write(address+0, 0x3, value))  return 0;
	   return 1;
	 case 0xFF:
	 case 1:
           if(!memorymap_aligned_write(address+0, 0x1, value))  return 0;
	   return 1;
       }
       break;
     case 1:
       switch(width) {
	 case 0xFFFFFFFF:
	 case 0xF:
	 case 4:
           if(!memorymap_aligned_write(address-1, 0xE, value<<8 ))  return 0;
           if(!memorymap_aligned_write(address+3, 0x1, value>>24))  return 0;
	   return 1;
	 case 0xFFFF:
	 case 3:
	 case 2:
           if(!memorymap_aligned_write(address-1, 0x6, value<<8 ))  return 0;
	   return 1;
	 case 0xFF:
	 case 1:
           if(!memorymap_aligned_write(address-1, 0x2, value<<8 ))  return 0;
	   return 1;
       }
       break;
     case 2:
       switch(width) {
	 case 0xFFFFFFFF:
	 case 0xF:
	 case 4:
           if(!memorymap_aligned_write(address-2, 0xC, value<<16))  return 0;
           if(!memorymap_aligned_write(address+2, 0x3, value>>16))  return 0;
	   return 1;
	 case 0xFFFF:
	 case 3:
	 case 2:
           if(!memorymap_aligned_write(address-2, 0xC, value<<16))  return 0;
	   return 1;
	 case 0xFF:
	 case 1:
           if(!memorymap_aligned_write(address-2, 0x4, value<<16))  return 0;
	   return 1;
       }
       break;
     default:
       switch(width) {
	 case 0xFFFFFFFF:
	 case 0xF:
	 case 4:
           if(!memorymap_aligned_write(address-3, 0x8, value<<24))  return 0;
           if(!memorymap_aligned_write(address+1, 0x7, value>>8 ))  return 0;
	   return 1;
	 case 0xFFFF:
	 case 3:
	 case 2:
           if(!memorymap_aligned_write(address-3, 0x8, value<<24))  return 0;
           if(!memorymap_aligned_write(address+1, 0x1, value>>8 ))  return 0;
	   return 1;
	 case 0xFF:
	 case 1:
           if(!memorymap_aligned_write(address-3, 0x8, value<<24))  return 0;
	   return 1;
       }
       break;
   }
   display_log("Invalid write at address 0x%08x width %i value 0x%08x");
   return 0;
}

// Assembly:
subq $0x28, %rsp
movl %edi, 0x20(%rsp)
movl %esi, 0x1c(%rsp)
movl %edx, 0x18(%rsp)
movl 0x20(%rsp), %eax
andl $0x3, %eax
movl %eax, 0x14(%rsp)
je 0x4a40
jmp 0x4a1f
movl 0x14(%rsp), %eax
subl $0x1, %eax
je 0x4b40
jmp 0x4a2e
movl 0x14(%rsp), %eax
subl $0x2, %eax
je 0x4c7b
jmp 0x4db6
movl 0x1c(%rsp), %eax
movl %eax, 0x10(%rsp)
subl $-0x1, %eax
je 0x4a9f
jmp 0x4a4f
movl 0x10(%rsp), %eax
subl $0x1, %eax
je 0x4b07
jmp 0x4a5e
movl 0x10(%rsp), %eax
addl $-0x2, %eax
subl $0x2, %eax
jb 0x4ad3
jmp 0x4a6c
movl 0x10(%rsp), %eax
subl $0x4, %eax
je 0x4a9f
jmp 0x4a77
movl 0x10(%rsp), %eax
subl $0xf, %eax
je 0x4a9f
jmp 0x4a82
movl 0x10(%rsp), %eax
subl $0xff, %eax
je 0x4b07
jmp 0x4a8f
movl 0x10(%rsp), %eax
subl $0xffff, %eax           # imm = 0xFFFF
je 0x4ad3
jmp 0x4b3b
movl 0x20(%rsp), %edi
addl $0x0, %edi
movl 0x18(%rsp), %edx
movl $0xf, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4ac6
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl $0x1, 0x24(%rsp)
jmp 0x4f1d
movl 0x20(%rsp), %edi
addl $0x0, %edi
movl 0x18(%rsp), %edx
movl $0x3, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4afa
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl $0x1, 0x24(%rsp)
jmp 0x4f1d
movl 0x20(%rsp), %edi
addl $0x0, %edi
movl 0x18(%rsp), %edx
movl $0x1, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4b2e
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl $0x1, 0x24(%rsp)
jmp 0x4f1d
jmp 0x4f09
movl 0x1c(%rsp), %eax
movl %eax, 0xc(%rsp)
subl $-0x1, %eax
je 0x4ba7
jmp 0x4b4f
movl 0xc(%rsp), %eax
subl $0x1, %eax
je 0x4c3f
jmp 0x4b5e
movl 0xc(%rsp), %eax
addl $-0x2, %eax
subl $0x2, %eax
jb 0x4c08
jmp 0x4b70
movl 0xc(%rsp), %eax
subl $0x4, %eax
je 0x4ba7
jmp 0x4b7b
movl 0xc(%rsp), %eax
subl $0xf, %eax
je 0x4ba7
jmp 0x4b86
movl 0xc(%rsp), %eax
subl $0xff, %eax
je 0x4c3f
jmp 0x4b97
movl 0xc(%rsp), %eax
subl $0xffff, %eax           # imm = 0xFFFF
je 0x4c08
jmp 0x4c76
movl 0x20(%rsp), %edi
subl $0x1, %edi
movl 0x18(%rsp), %edx
shll $0x8, %edx
movl $0xe, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4bd1
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl 0x20(%rsp), %edi
addl $0x3, %edi
movl 0x18(%rsp), %edx
shrl $0x18, %edx
movl $0x1, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4bfb
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl $0x1, 0x24(%rsp)
jmp 0x4f1d
movl 0x20(%rsp), %edi
subl $0x1, %edi
movl 0x18(%rsp), %edx
shll $0x8, %edx
movl $0x6, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4c32
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl $0x1, 0x24(%rsp)
jmp 0x4f1d
movl 0x20(%rsp), %edi
subl $0x1, %edi
movl 0x18(%rsp), %edx
shll $0x8, %edx
movl $0x2, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4c69
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl $0x1, 0x24(%rsp)
jmp 0x4f1d
jmp 0x4f09
movl 0x1c(%rsp), %eax
movl %eax, 0x8(%rsp)
subl $-0x1, %eax
je 0x4ce2
jmp 0x4c8a
movl 0x8(%rsp), %eax
subl $0x1, %eax
je 0x4d7a
jmp 0x4c99
movl 0x8(%rsp), %eax
addl $-0x2, %eax
subl $0x2, %eax
jb 0x4d43
jmp 0x4cab
movl 0x8(%rsp), %eax
subl $0x4, %eax
je 0x4ce2
jmp 0x4cb6
movl 0x8(%rsp), %eax
subl $0xf, %eax
je 0x4ce2
jmp 0x4cc1
movl 0x8(%rsp), %eax
subl $0xff, %eax
je 0x4d7a
jmp 0x4cd2
movl 0x8(%rsp), %eax
subl $0xffff, %eax           # imm = 0xFFFF
je 0x4d43
jmp 0x4db1
movl 0x20(%rsp), %edi
subl $0x2, %edi
movl 0x18(%rsp), %edx
shll $0x10, %edx
movl $0xc, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4d0c
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl 0x20(%rsp), %edi
addl $0x2, %edi
movl 0x18(%rsp), %edx
shrl $0x10, %edx
movl $0x3, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4d36
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl $0x1, 0x24(%rsp)
jmp 0x4f1d
movl 0x20(%rsp), %edi
subl $0x2, %edi
movl 0x18(%rsp), %edx
shll $0x10, %edx
movl $0xc, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4d6d
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl $0x1, 0x24(%rsp)
jmp 0x4f1d
movl 0x20(%rsp), %edi
subl $0x2, %edi
movl 0x18(%rsp), %edx
shll $0x10, %edx
movl $0x4, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4da4
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl $0x1, 0x24(%rsp)
jmp 0x4f1d
jmp 0x4f09
movl 0x1c(%rsp), %eax
movl %eax, 0x4(%rsp)
subl $-0x1, %eax
je 0x4e1d
jmp 0x4dc5
movl 0x4(%rsp), %eax
subl $0x1, %eax
je 0x4ed6
jmp 0x4dd4
movl 0x4(%rsp), %eax
addl $-0x2, %eax
subl $0x2, %eax
jb 0x4e7e
jmp 0x4de6
movl 0x4(%rsp), %eax
subl $0x4, %eax
je 0x4e1d
jmp 0x4df1
movl 0x4(%rsp), %eax
subl $0xf, %eax
je 0x4e1d
jmp 0x4dfc
movl 0x4(%rsp), %eax
subl $0xff, %eax
je 0x4ed6
jmp 0x4e0d
movl 0x4(%rsp), %eax
subl $0xffff, %eax           # imm = 0xFFFF
je 0x4e7e
jmp 0x4f07
movl 0x20(%rsp), %edi
subl $0x3, %edi
movl 0x18(%rsp), %edx
shll $0x18, %edx
movl $0x8, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4e47
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl 0x20(%rsp), %edi
addl $0x1, %edi
movl 0x18(%rsp), %edx
shrl $0x8, %edx
movl $0x7, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4e71
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl $0x1, 0x24(%rsp)
jmp 0x4f1d
movl 0x20(%rsp), %edi
subl $0x3, %edi
movl 0x18(%rsp), %edx
shll $0x18, %edx
movl $0x8, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4ea5
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl 0x20(%rsp), %edi
addl $0x1, %edi
movl 0x18(%rsp), %edx
shrl $0x8, %edx
movl $0x1, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4ecc
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl $0x1, 0x24(%rsp)
jmp 0x4f1d
movl 0x20(%rsp), %edi
subl $0x3, %edi
movl 0x18(%rsp), %edx
shll $0x18, %edx
movl $0x8, %esi
callq 0x4240
cmpl $0x0, %eax
jne 0x4efd
movl $0x0, 0x24(%rsp)
jmp 0x4f1d
movl $0x1, 0x24(%rsp)
jmp 0x4f1d
jmp 0x4f09
leaq 0x5fbe(%rip), %rdi      # 0xaece
callq 0x6b20
movl $0x0, 0x24(%rsp)
movl 0x24(%rsp), %eax
addq $0x28, %rsp
retq
nopw %cs:(%rax,%rax)