// File: /workspace/github_c_makefile_star2_O3/markdryan[P]subtilis/arch/arm32/arm_encode.c
// Function: prv_encode_vfp_cmp_instr
static void prv_encode_vfp_cmp_instr(void *user_data, subtilis_arm_op_t *op,
				     subtilis_arm_instr_type_t type,
				     subtilis_vfp_cmp_instr_t *instr,
				     subtilis_error_t *err)
{
	uint32_t word = 0;
	bool float32 = false;
	bool two_ops = false;
	subtilis_arm_encode_ud_t *ud = user_data;

	prv_check_pool(ud, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;

	switch (type) {
	case SUBTILIS_VFP_INSTR_FCMPS:
		two_ops = true;
		float32 = true;
		word |= 0xeb40a40;
		break;
	case SUBTILIS_VFP_INSTR_FCMPD:
		two_ops = true;
		word |= 0xeb40b40;
		break;
	case SUBTILIS_VFP_INSTR_FCMPES:
		two_ops = true;
		float32 = true;
		word |= 0xeb40ac0;
		break;
	case SUBTILIS_VFP_INSTR_FCMPED:
		two_ops = true;
		word |= 0xeb40bc0;
		break;
	case SUBTILIS_VFP_INSTR_FCMPZS:
		float32 = true;
		word |= 0xeb50a40;
		break;
	case SUBTILIS_VFP_INSTR_FCMPZD:
		word |= 0xeb50b40;
		break;
	case SUBTILIS_VFP_INSTR_FCMPEZS:
		two_ops = true;
		word |= 0xeb50ac0;
		break;
	case SUBTILIS_VFP_INSTR_FCMPEZD:
		word |= 0xeb50bc0;
		break;
	default:
		subtilis_error_set_assertion_failed(err);
		return;
	}

	word |= instr->ccode << 28;

	if (float32) {
		if (two_ops) {
			word |= (instr->op2 >> 1) & 0xf;
			word |= (instr->op2 & 1) << 5;
		}

		word |= ((instr->op1 >> 1) & 0xf) << 12;
		word |= (instr->op1 & 1) << 22;
	} else {
		if (two_ops)
			word |= instr->op2 & 0xf;
		word |= (instr->op1 & 0xf) << 12;
	}

	prv_ensure_code(ud, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;

	prv_add_word(ud, word, err);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movq %r8, %rbx
movq %rcx, %r15
movl %edx, %r12d
movq %rdi, %r14
xorl %esi, %esi
movq %r8, %rdx
callq 0x59e32
cmpl $0x0, (%rbx)
jne 0x5936c
addl $-0x71, %r12d
cmpl $0x7, %r12d
ja 0x593a4
leaq 0x1ca86(%rip), %rax     # 0x75d40
movslq (%rax,%r12,4), %rcx
addq %rax, %rcx
jmpq *%rcx
movl $0xeb40a40, %ecx        # imm = 0xEB40A40
jmp 0x592dc
movl (%r15), %eax
shll $0x1c, %eax
orl $0xeb50a40, %eax        # imm = 0xEB50A40
jmp 0x592f9
movl $0xeb40ac0, %ecx        # imm = 0xEB40AC0
movl (%r15), %edx
movl 0x10(%r15), %eax
shll $0x1c, %edx
orl %ecx, %edx
movl %eax, %ecx
shrl %ecx
andl $0xf, %ecx
shll $0x5, %eax
andl $0x20, %eax
orl %ecx, %eax
orl %edx, %eax
movl 0x8(%r15), %ebp
movl %ebp, %ecx
andl $0x1e, %ecx
shll $0xb, %ecx
orl %eax, %ecx
andl $0x1, %ebp
shll $0x16, %ebp
orl %ecx, %ebp
jmp 0x59357
movl $0xeb40bc0, %ecx        # imm = 0xEB40BC0
jmp 0x5933a
movl $0xeb50bc0, %ecx        # imm = 0xEB50BC0
jmp 0x5932b
movl $0xeb40b40, %ecx        # imm = 0xEB40B40
jmp 0x5933a
movl $0xeb50b40, %ecx        # imm = 0xEB50B40
movl (%r15), %eax
shll $0x1c, %eax
orl %ecx, %eax
jmp 0x5934b
movl $0xeb50ac0, %ecx        # imm = 0xEB50AC0
movl (%r15), %edx
movl 0x10(%r15), %eax
shll $0x1c, %edx
orl %ecx, %edx
andl $0xf, %eax
orl %edx, %eax
movl 0x8(%r15), %ecx
shll $0xc, %ecx
movzwl %cx, %ebp
orl %eax, %ebp
movl $0x4, %esi
movq %r14, %rdi
movq %rbx, %rdx
callq 0x5758f
cmpl $0x0, (%rbx)
je 0x59375
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
movq 0x30(%r14), %rax
testb $0x3, %al
je 0x59393
leaq 0x1cafc(%rip), %rdx     # 0x75e80
movq %rbx, %rdi
movl $0x5d, %esi
movl $0xfb, %ecx
jmp 0x593b8
movq 0x28(%r14), %rcx
movl %ebp, (%rcx,%rax)
addq $0x4, %rax
movq %rax, 0x30(%r14)
jmp 0x5936c
leaq 0x1cad5(%rip), %rdx     # 0x75e80
movq %rbx, %rdi
movl $0xf, %esi
movl $0x7cb, %ecx            # imm = 0x7CB
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
jmp 0x145a4