// File: /workspace/github_c_makefile_star2_O1/dwelch67[P]lc3/lc3sim.c
// Function: sim
int sim ( void )
{
    unsigned short inst;
    unsigned short test;
    while(1)
    {
        inst=mem[pc]; pc=(pc+1)&MEMMASK;
        switch((inst>>12)&0xF)
        {
            case 0x0: //br
            {
                test=(psr&7)&((inst>>9)&7);
                if(test)
                {
                    pc=pc+sext9(inst&0x1FF);
                }
                break;
            }
            case 0x1: //add
            {
                if(inst&0x20)
                {
                    reg[(inst>>9)&7]=reg[(inst>>6)&7]+sext5(inst&0x1F);
                }
                else
                {
                    reg[(inst>>9)&7]=reg[(inst>>6)&7]+reg[(inst>>0)&7];
                }
                docc(reg[(inst>>9)&7]);
                break;
            }
            case 0x2: //ld
            {
                reg[(inst>>9)&7]=mem[pc+sext9(inst&0x1FF)];
                docc(reg[(inst>>9)&7]);
                break;
            }
            case 0x3: //st
            {
                mem[pc+sext9(inst&0x1FF)]=reg[(inst>>9)&7];
                break;
            }
            case 0x4: //jsr/jsrr
            {
                reg[7]=pc;
                if(inst&0x0800)
                {
                    pc=pc+sext11(inst&0x07FF);
                }
                else
                {
                    pc=reg[(inst>>6)&7];
                }
                break;
            }
            case 0x5: //and
            {
                if(inst&0x20)
                {
                    reg[(inst>>9)&7]=reg[(inst>>6)&7]&sext5(inst&0x1F);
                }
                else
                {
                    reg[(inst>>9)&7]=reg[(inst>>6)&7]&reg[(inst>>0)&7];
                }
                docc(reg[(inst>>9)&7]);
                break;
            }
            case 0x6: //ldr
            {
                reg[(inst>>9)&7]=mem[reg[(inst>>6)&7]+sext6(inst&0x3F)];
                docc(reg[(inst>>9)&7]);
                break;
            }
            case 0x7: //str
            {
                mem[reg[(inst>>6)&7]+sext6(inst&0x3F)]=reg[(inst>>9)&7];
                break;
            }
            case 0x8: //rti
            {
                if(psr&0x8000)
                {
                    printf("exception\n");
                    exit(1);
                }
                else
                {
                    pc=mem[reg[6]++];
                    psr=mem[reg[6]++];
                }
                break;
            }
            case 0x9: //not
            {
                reg[(inst>>9)&7]=~reg[(inst>>6)&7];
                docc(reg[(inst>>9)&7]);
                break;
            }
            case 0xA: //ldi
            {
                reg[(inst>>9)&7]=mem[mem[pc+sext9(inst&0x1FF)]];
                docc(reg[(inst>>9)&7]);
                break;
            }
            case 0xB: //sti
            {
                mem[mem[pc+sext9(inst&0x1FF)]]=reg[(inst>>9)&7];
                break;
            }
            case 0xC: //jmp/ret
            {
                pc=reg[(inst>>6)&7];
                break;
            }
            case 0xD: //undefined
            {
                printf("undefined instruction\n");
                exit(1);
                break;
            }
            case 0xE: //lea
            {
                reg[(inst>>9)&7]=pc+sext9(inst&0x1FF);
                docc(reg[(inst>>9)&7]);
                break;
            }
            case 0xF: //trap
            {
                if((inst&0xFF)==0x67)
                {
                    printf("show 0x%04X\n",reg[0]);
                }
                else
                if((inst&0xFF)==0x68)
                {
                    printf("psr 0x%04X\n",psr);
                }
                else
                if((inst&0xFF)==0x25)
                {
                    printf("halt\n");
                    return(0);
                }
                else
                {
                    reg[7]=pc;
                    pc=mem[inst&0xFF];
                }
                break;
            }
        }
    }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
leaq 0x2de4(%rip), %r15      # 0x40a0
leaq 0xd41(%rip), %r12       # 0x2004
leaq 0x22de6(%rip), %r13     # 0x240b0
leaq 0xd8f(%rip), %rbx       # 0x2060
leaq 0xd95(%rip), %r14       # 0x206d
movzwl 0x22dc1(%rip), %ecx     # 0x240a0
movzwl (%r15,%rcx,2), %eax
incl %ecx
movw %cx, 0x22db3(%rip)      # 0x240a0
movl %eax, %edx
shrl $0xc, %edx
movslq (%r12,%rdx,4), %rdx
addq %r12, %rdx
jmpq *%rdx
movl %eax, %edx
shrl $0x9, %edx
andw 0x2d89(%rip), %dx       # 0x4090
testb $0x7, %dl
je 0x12d8
movl %eax, %edx
andl $0x1ff, %edx            # imm = 0x1FF
shll $0x7, %eax
cwtl
sarl $0xf, %eax
andl $0xfffffe00, %eax       # imm = 0xFFFFFE00
jmp 0x1613
movl %eax, %edx
andl $0x1ff, %edx            # imm = 0x1FF
movl %eax, %esi
shll $0x7, %esi
movswl %si, %esi
sarl $0xf, %esi
andl $0xfffffe00, %esi       # imm = 0xFFFFFE00
orl %edx, %esi
shrl $0x8, %eax
andl $0xe, %eax
movzwl 0x2d43(%rip), %edx      # 0x4090
andl $0x8000, %edx           # imm = 0x8000
addw %cx, %si
movw %si, (%rax,%r13)
movw %dx, 0x2d2e(%rip)       # 0x4090
js 0x1699
je 0x16ca
orl $0x1, %edx
movw %dx, 0x2d18(%rip)       # 0x4090
jmp 0x12d8
movl %eax, %edx
andl $0x1ff, %edx            # imm = 0x1FF
movl %eax, %esi
shll $0x7, %esi
movswl %si, %esi
sarl $0xf, %esi
andl $0xfffffe00, %esi       # imm = 0xFFFFFE00
orl %edx, %esi
movzwl %si, %edx
movzwl %cx, %ecx
addl %edx, %ecx
movzwl (%r15,%rcx,2), %ecx
jmp 0x1449
movl %eax, %edx
shrl $0x8, %edx
andl $0xe, %edx
movzwl (%rdx,%r13), %edx
movl %eax, %esi
andl $0x1ff, %esi            # imm = 0x1FF
shll $0x7, %eax
cwtl
sarl $0xf, %eax
andl $0xfffffe00, %eax       # imm = 0xFFFFFE00
orl %esi, %eax
movzwl %ax, %eax
movzwl %cx, %ecx
addl %eax, %ecx
movzwl (%r15,%rcx,2), %eax
movw %dx, (%r15,%rax,2)
jmp 0x12d8
cmpw $0x0, 0x2ca4(%rip)      # 0x4090
js 0x16ff
movzwl 0x22cc3(%rip), %eax     # 0x240bc
leal 0x1(%rax), %ecx
movzwl (%r15,%rax,2), %edx
movw %dx, 0x22c98(%rip)      # 0x240a0
addl $0x2, %eax
movw %ax, 0x22caa(%rip)      # 0x240bc
movzwl %cx, %eax
movzwl (%r15,%rax,2), %eax
movw %ax, 0x2c6f(%rip)       # 0x4090
jmp 0x12d8
movl %eax, %edx
andl $0x1ff, %edx            # imm = 0x1FF
movl %eax, %esi
shll $0x7, %esi
movswl %si, %esi
sarl $0xf, %esi
andl $0xfffffe00, %esi       # imm = 0xFFFFFE00
orl %edx, %esi
movzwl %si, %edx
movzwl %cx, %ecx
addl %edx, %ecx
movzwl (%r15,%rcx,2), %ecx
jmp 0x14b1
movl %eax, %edx
shrl $0x8, %edx
andl $0xe, %edx
movzwl (%rdx,%r13), %edx
movl %eax, %esi
andl $0x1ff, %esi            # imm = 0x1FF
shll $0x7, %eax
cwtl
sarl $0xf, %eax
andl $0xfffffe00, %eax       # imm = 0xFFFFFE00
orl %esi, %eax
movzwl %ax, %eax
movzwl %cx, %ecx
addl %eax, %ecx
movw %dx, (%r15,%rcx,2)
jmp 0x12d8
movl %eax, %ecx
shrl $0x5, %ecx
andl $0xe, %ecx
movzwl (%rcx,%r13), %ecx
movl %eax, %edx
andl $0x3f, %edx
movl %eax, %esi
shll $0xa, %esi
movswl %si, %esi
sarl $0xf, %esi
andl $-0x40, %esi
orl %edx, %esi
movzwl %si, %edx
addl %ecx, %edx
movzwl (%r15,%rdx,2), %ecx
shrl $0x8, %eax
andl $0xe, %eax
movw %cx, (%rax,%r13)
jmp 0x1652
testb $0x20, %al
jne 0x15d9
movl %eax, %ecx
andl $0x7, %ecx
movzwl (%r13,%rcx,2), %ecx
jmp 0x15ee
movw %cx, 0x22bde(%rip)      # 0x240be
btl $0xb, %eax
jb 0x15ff
shrl $0x5, %eax
andl $0xe, %eax
movzwl (%rax,%r13), %eax
movw %ax, 0x22ba4(%rip)      # 0x240a0
jmp 0x12d8
movl %eax, %ecx
shrl $0x5, %ecx
andl $0xe, %ecx
movzwl (%rcx,%r13), %ecx
testb $0x20, %al
jne 0x1623
movl %eax, %edx
andl $0x7, %edx
andw (%r13,%rdx,2), %cx
jmp 0x163a
movl %eax, %ecx
shrl $0x5, %ecx
andl $0xe, %ecx
movzwl (%rcx,%r13), %ecx
movl %ecx, %edx
notl %edx
shrl $0x8, %eax
andl $0xe, %eax
movw %dx, (%rax,%r13)
movzwl 0x2b47(%rip), %eax      # 0x4090
andl $0x8000, %eax           # imm = 0x8000
movw %ax, 0x2b3b(%rip)       # 0x4090
testw %cx, %cx
jns 0x167b
cmpw $-0x1, %cx
jmp 0x166a
movl %eax, %ecx
shrl $0x8, %ecx
andl $0xe, %ecx
movzwl (%rcx,%r13), %ecx
movl %eax, %edx
shrl $0x5, %edx
andl $0xe, %edx
movzwl (%rdx,%r13), %edx
movl %eax, %esi
andl $0x3f, %esi
shll $0xa, %eax
cwtl
sarl $0xf, %eax
andl $-0x40, %eax
orl %esi, %eax
movzwl %ax, %eax
addl %edx, %eax
movw %cx, (%r15,%rax,2)
jmp 0x12d8
cmpb $0x67, %al
je 0x16b4
movzbl %al, %edx
cmpl $0x68, %edx
je 0x16a8
cmpl $0x25, %edx
je 0x16d9
movzbl %al, %eax
movw %cx, 0x22af6(%rip)      # 0x240be
movzwl (%r15,%rax,2), %eax
movw %ax, 0x22acc(%rip)      # 0x240a0
jmp 0x12d8
movl %eax, %edx
andl $0x1f, %edx
movl %eax, %ecx
shll $0xb, %ecx
movswl %cx, %ecx
sarl $0xf, %ecx
andl $-0x20, %ecx
orl %edx, %ecx
movl %eax, %edx
shrl $0x5, %edx
andl $0xe, %edx
movzwl (%rdx,%r13), %edx
addl %edx, %ecx
jmp 0x163a
movl %eax, %edx
andl $0x7ff, %edx            # imm = 0x7FF
shll $0x5, %eax
cwtl
sarl $0xf, %eax
andl $0xfffff800, %eax       # imm = 0xFFFFF800
addl %edx, %ecx
addl %eax, %ecx
movw %cx, 0x22a82(%rip)      # 0x240a0
jmp 0x12d8
movl %eax, %edx
andl $0x1f, %edx
movl %eax, %esi
shll $0xb, %esi
movswl %si, %esi
sarl $0xf, %esi
andl $-0x20, %esi
orl %edx, %esi
andl %esi, %ecx
movl %eax, %edx
shrl $0x8, %edx
andl $0xe, %edx
movw %cx, (%rdx,%r13)
shrl $0x8, %eax
andl $0xe, %eax
movzwl (%rax,%r13), %ecx
movzwl 0x2a37(%rip), %eax      # 0x4090
andl $0x8000, %eax           # imm = 0x8000
movw %ax, 0x2a2b(%rip)       # 0x4090
testw %cx, %cx
js 0x167b
je 0x168a
orl $0x1, %eax
movw %ax, 0x2a1a(%rip)       # 0x4090
jmp 0x12d8
orl $0x4, %eax
movw %ax, 0x2a0b(%rip)       # 0x4090
jmp 0x12d8
orl $0x2, %eax
movw %ax, 0x29fc(%rip)       # 0x4090
jmp 0x12d8
orl $0x4, %edx
movw %dx, 0x29ed(%rip)       # 0x4090
jmp 0x12d8
movzwl 0x29e1(%rip), %esi      # 0x4090
movq %r14, %rdi
jmp 0x16be
movzwl 0x229f5(%rip), %esi     # 0x240b0
movq %rbx, %rdi
xorl %eax, %eax
callq 0x1050
jmp 0x12d8
orl $0x2, %edx
movw %dx, 0x29bc(%rip)       # 0x4090
jmp 0x12d8
leaq 0x9ce(%rip), %rdi       # 0x20ae
callq 0x1030
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0x9b6(%rip), %rdi       # 0x20b3
jmp 0x1706
leaq 0x9c3(%rip), %rdi       # 0x20c9
callq 0x1030
movl $0x1, %edi
callq 0x10b0