// File: /workspace/github_cpp_makefile_star2_O2/jkingan[P]ladyheather/heathmsc.cpp
// Function: adevs_active(int)
int adevs_active(int check_enable)
{
int i;
static int last_ticc_i = 0;

   // NEW_RCVR

   // return true if we might have adevs to display
   //   0x01 : pps_offset available
   //   0x02 : osc_offset available
   //   0x04 : TICC channel C available
   //   0x08 : TICC channel D available
   //   0x80 : flags that bits 0x01 and 0x02 are guessed

   if(no_adev_flag) return 0;

   if(check_enable) {
      if     (pps_adev_period > 0.0) ;        // aaaallll
      else if(osc_adev_period > 0.0) ;
      else if(chc_adev_period > 0.0) ;
      else if(chd_adev_period > 0.0) ;
      else if(adev_period <= 0.0) {
         return 0;
      }
   }

   if(jitter_adev) return 0x03;

   i = 0;
   if(rcvr_type == TICC_RCVR) {
      if(have_pps_offset) i |= 0x01;
      if(have_osc_offset) i |= 0x02;
      if(have_chc_offset) i |= 0x04;
      if(have_chd_offset) i |= 0x08;
      if(mtie_q_count[CHA_MTIE]) i |= 0x01;
      if(mtie_q_count[CHB_MTIE]) i |= 0x02;
      if(mtie_q_count[CHC_MTIE]) i |= 0x04;
      if(mtie_q_count[CHD_MTIE]) i |= 0x08;
      if(sim_file && (i == 0)) return last_ticc_i;
      last_ticc_i = i;
      return i;
   }
   else if(TICC_USED) {
      if(ticc_mode == 'I') return 0x01;   // time interval
      if(ticc_mode == 'F') return 0x01;   // frequency counter
      return 0x03;   // aaaacccc
   }
   else {
      if(luxor) return 0;
      if(NO_ADEV_INFO) return 0;
   }

   if(rcvr_type == PRS_RCVR) ;   // SRO_RCVR?  LPFRS_RCVR  SA35_RCVR?
   else if(GPSDO) ;
   else if(!TIMING_RCVR) return 0;
///   else if(TIMING_RCVR) return 0;

   if(rcvr_type == BRANDY_RCVR) {
      if(have_pps_offset) return 0x01;
      else                return 0x01;
   }

   if(have_pps_offset && have_osc_offset) return 0x03;
   else if(have_pps_offset) return 0x01;
   else if(have_osc_offset) return 0x02;

   return 0x83;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
leaq 0x15fb76(%rip), %rax    # 0x226d34
xorl %ebx, %ebx
cmpl $0x0, (%rax)
jne 0xc7231
testl %edi, %edi
je 0xc721e
leaq 0x15fb30(%rip), %rax    # 0x226d00
movsd (%rax), %xmm1
xorpd %xmm0, %xmm0
ucomisd %xmm0, %xmm1
ja 0xc721e
leaq 0x15fb23(%rip), %rax    # 0x226d08
movsd (%rax), %xmm1
ucomisd %xmm0, %xmm1
ja 0xc721e
leaq 0x15fb1a(%rip), %rax    # 0x226d10
movsd (%rax), %xmm1
ucomisd %xmm0, %xmm1
ja 0xc721e
leaq 0x15fb11(%rip), %rax    # 0x226d18
movsd (%rax), %xmm1
ucomisd %xmm0, %xmm1
ja 0xc721e
leaq 0x15fae0(%rip), %rax    # 0x226cf8
ucomisd (%rax), %xmm0
jae 0xc7231
leaq 0x15fa9f(%rip), %rax    # 0x226cc4
pushq $0x3
popq %r14
cmpl $0x0, (%rax)
je 0xc723e
movl %r14d, %ebx
movl %ebx, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
leaq 0x13b68b(%rip), %r15    # 0x2028d0
cmpq $0x10000, (%r15)        # imm = 0x10000
jne 0xc72e8
leaq 0x22ffdf(%rip), %rax    # 0x2f7238
xorl %ecx, %ecx
cmpl $0x0, (%rax)
setne %cl
leaq 0x22ffcc(%rip), %rax    # 0x2f7234
leal 0x2(%rcx), %edx
cmpl $0x0, (%rax)
cmovel %ecx, %edx
leaq 0x22ffc4(%rip), %rax    # 0x2f723c
leal 0x4(%rdx), %ecx
cmpl $0x0, (%rax)
cmovel %edx, %ecx
leaq 0x22ffb8(%rip), %rax    # 0x2f7240
leal 0x8(%rcx), %edx
cmpl $0x0, (%rax)
cmovel %ecx, %edx
xorl %eax, %eax
cmpl $0x0, 0x377a76(%rip)    # 0x43ed10
setne %al
orl %edx, %eax
movl %eax, %ecx
orl $0x2, %ecx
cmpl $0x0, 0x377a69(%rip)    # 0x43ed14
cmovel %eax, %ecx
movl %ecx, %eax
orl $0x4, %eax
cmpl $0x0, 0x377a5e(%rip)    # 0x43ed18
cmovel %ecx, %eax
movl %eax, %ebx
orl $0x8, %ebx
cmpl $0x0, 0x377a53(%rip)    # 0x43ed1c
cmovel %eax, %ebx
leaq 0x1610ed(%rip), %rax    # 0x2283c0
cmpq $0x0, (%rax)
je 0xc7314
testl %ebx, %ebx
jne 0xc7314
movl 0x37811d(%rip), %ebx    # 0x43f400
jmp 0xc7231
callq 0x66b41
testl %eax, %eax
je 0xc731f
leaq 0x22fa14(%rip), %rax    # 0x2f6d0c
movl (%rax), %eax
xorl %ecx, %ecx
cmpl $0x46, %eax
setne %cl
cmpl $0x49, %eax
leal 0x1(%rcx,%rcx), %eax
pushq $0x1
popq %rbx
cmovnel %eax, %ebx
jmp 0xc7231
movl %ebx, 0x3780e6(%rip)    # 0x43f400
jmp 0xc7231
leaq 0x161c18(%rip), %rax    # 0x228f3e
cmpb $0x0, (%rax)
jne 0xc7231
movq (%r15), %rax
cmpq $0x1, %rax
sete %sil
leaq 0x13dc93(%rip), %rcx    # 0x204fd4
movl (%rcx), %ecx
cmpl $0x41, %ecx
sete %dl
andb %sil, %dl
jne 0xc7231
movabsq $0xcc0a0d4a2, %rsi      # imm = 0xCC0A0D4A2
testq %rsi, %rax
setne %sil
orb %dl, %sil
jne 0xc7231
cmpq $0x1000000, %rax        # imm = 0x1000000
je 0xc7407
cmpq $0x1, %rax
setne %sil
leaq 0x13b57d(%rip), %rdx    # 0x202904
movb (%rdx), %dl
testb %dl, %dl
setne %dil
orb %sil, %dil
cmpl $0x50, %ecx
sete %sil
orb %dil, %sil
jne 0xc73b0
leal -0x33(%rcx), %esi
cmpl $0xe, %esi
ja 0xc7407
movl $0x4009, %edi           # imm = 0x4009
btl %esi, %edi
jae 0xc7407
testb %dl, %dl
setne %dl
testl $0x540010, %eax         # imm = 0x540010
setne %sil
leaq 0x13dc0b(%rip), %rdi    # 0x204fd0
cmpl $0x0, (%rdi)
setne %dil
orb %sil, %dil
leaq 0x161b57(%rip), %rsi    # 0x228f2d
cmpb $0x0, (%rsi)
setne %sil
leaq 0x13dc54(%rip), %r8     # 0x205038
cmpl $0x0, (%r8)
setne %r8b
orb %sil, %r8b
orb %dil, %r8b
orb %dl, %r8b
je 0xc744a
cmpq $0x40000, %rax          # imm = 0x40000
jne 0xc7407
pushq $0x1
popq %rbx
jmp 0xc7231
leaq 0x22fe2a(%rip), %rax    # 0x2f7238
movl (%rax), %eax
testl %eax, %eax
setne %dl
leaq 0x22fe18(%rip), %rcx    # 0x2f7234
movl (%rcx), %ecx
testl %ecx, %ecx
setne %sil
movl %r14d, %ebx
testb %sil, %dl
jne 0xc7231
testl %ecx, %ecx
pushq $0x2
popq %rcx
movl $0x83, %edx
cmovnel %ecx, %edx
testl %eax, %eax
pushq $0x1
popq %rbx
cmovel %edx, %ebx
jmp 0xc7231
cmpl $0x50, %ecx
sete %dl
cmpl $0x41, %ecx
sete %cl
cmpq $0x1, %rax
sete %sil
testw $0x944, %ax             # imm = 0x944
jne 0xc73f7
orb %dl, %cl
andb %cl, %sil
je 0xc7231
jmp 0xc73f7