// File: /workspace/github_cpp_makefile_star2_O2/CMU-SAFARI[P]MQSim/src/ssd/Address_Mapping_Unit_Page_Level.cpp
// Function: SSD_Components::Address_Mapping_Unit_Page_Level::Remove_barrier_for_accessing_lpa(unsigned short, unsigned long)
inline void Address_Mapping_Unit_Page_Level::Remove_barrier_for_accessing_lpa(stream_id_type stream_id, LPA_type lpa)
	{
		auto itr = domains[stream_id]->Locked_LPAs.find(lpa);
		if (itr == domains[stream_id]->Locked_LPAs.end()) {
			PRINT_ERROR("Illegal operation: Unlocking an LPA that has not been locked!");
		}
		domains[stream_id]->Locked_LPAs.erase(itr);

		//If there are read requests waiting behind the barrier, then MQSim assumes they can be serviced with the actual page data that is accessed during GC execution
		auto read_tr = domains[stream_id]->Read_transactions_behind_LPA_barrier.find(lpa);
		while (read_tr != domains[stream_id]->Read_transactions_behind_LPA_barrier.end()) {
			handle_transaction_serviced_signal_from_PHY((*read_tr).second);
			delete (*read_tr).second;
			domains[stream_id]->Read_transactions_behind_LPA_barrier.erase(read_tr);
			read_tr = domains[stream_id]->Read_transactions_behind_LPA_barrier.find(lpa);
		}

		//If there are write requests waiting behind the barrier, then MQSim assumes they can be serviced with the actual page data that is accessed during GC execution. This may not be 100% true for all write requests, but, to avoid more complexity in the simulation, we accept this assumption.
		auto write_tr = domains[stream_id]->Write_transactions_behind_LPA_barrier.find(lpa);
		while (write_tr != domains[stream_id]->Write_transactions_behind_LPA_barrier.end()) {
			handle_transaction_serviced_signal_from_PHY((*write_tr).second);
			delete (*write_tr).second;
			domains[stream_id]->Write_transactions_behind_LPA_barrier.erase(write_tr);
			write_tr = domains[stream_id]->Write_transactions_behind_LPA_barrier.find(lpa);
		}
	}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %esi, %r14d
movq %rdi, %rbx
movq %rsp, %rsi
movq %rdx, (%rsi)
movq 0xa8(%rdi), %rax
leal (,%r14,8), %r15d
movl $0xe8, %edi
addq (%rax,%r15), %rdi
callq 0x275aa
movq 0xa8(%rbx), %rcx
movq (%rcx,%r15), %rdi
leaq 0xf0(%rdi), %rcx
cmpq %rcx, %rax
je 0x26c30
movl %r14d, %r12d
addq $0xe8, %rdi
movq %rax, %rsi
callq 0x27752
leal (,%r12,8), %r13d
movl $0x148, %ebp            # imm = 0x148
movq %rsp, %r14
movq 0xa8(%rbx), %rax
movq (%rax,%r13), %rdi
addq %rbp, %rdi
movq %r14, %rsi
callq 0x274f8
movq %rax, %r15
movq 0xa8(%rbx), %rax
movq (%rax,%r13), %rdi
leaq 0x150(%rdi), %rax
cmpq %rax, %r15
je 0x26bb1
movq 0x28(%r15), %rdi
callq 0x26100
movq 0x28(%r15), %rdi
callq 0x7340
movq 0xa8(%rbx), %rax
movq (%rax,%r12,8), %rdi
addq %rbp, %rdi
movq %r15, %rsi
callq 0x27e6c
jmp 0x26b57
movq %rsp, %r14
movl $0x180, %r13d           # imm = 0x180
addq $0x178, %rdi            # imm = 0x178
movq %r14, %rsi
callq 0x274f8
movq %rax, %r15
movq 0xa8(%rbx), %rax
movq (%rax,%r12,8), %rax
addq %r13, %rax
cmpq %rax, %r15
je 0x26c21
movq 0x28(%r15), %rdi
callq 0x26100
movq 0x28(%r15), %rdi
callq 0x7340
movq 0xa8(%rbx), %rax
leal (,%r12,8), %ebp
movq (%rax,%rbp), %rdi
movl $0x178, %eax            # imm = 0x178
addq %rax, %rdi
movq %r15, %rsi
callq 0x27e6c
movq 0xa8(%rbx), %rax
movq (%rax,%rbp), %rdi
jmp 0x26bba
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x3b3b9(%rip), %rbx     # 0x61ff0
leaq 0x1d94a(%rip), %rsi     # 0x44588
movq %rbx, %rdi
callq 0x7360
leaq 0x20057(%rip), %rsi     # 0x46ca4
movq %rbx, %rdi
callq 0x7360
movq %rax, %rdi
callq 0x71a0
movq 0x3b36c(%rip), %rdi     # 0x61fd0
callq 0x73d0
pushq $0x1
popq %rdi
callq 0x73e0
nop