// File: /workspace/github_c_makefile_star2_O1/nh13[P]ksw/src/parasail/src/nw_stats_diag_avx2_256_16.c
// Function: arr_store_si256
static inline void arr_store_si256(
        int *array,
        __m256i vWH,
        int32_t i,
        int32_t s1Len,
        int32_t j,
        int32_t s2Len)
{
    if (0 <= i+0 && i+0 < s1Len && 0 <= j-0 && j-0 < s2Len) {
        array[1LL*(i+0)*s2Len + (j-0)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 15);
    }
    if (0 <= i+1 && i+1 < s1Len && 0 <= j-1 && j-1 < s2Len) {
        array[1LL*(i+1)*s2Len + (j-1)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 14);
    }
    if (0 <= i+2 && i+2 < s1Len && 0 <= j-2 && j-2 < s2Len) {
        array[1LL*(i+2)*s2Len + (j-2)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 13);
    }
    if (0 <= i+3 && i+3 < s1Len && 0 <= j-3 && j-3 < s2Len) {
        array[1LL*(i+3)*s2Len + (j-3)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 12);
    }
    if (0 <= i+4 && i+4 < s1Len && 0 <= j-4 && j-4 < s2Len) {
        array[1LL*(i+4)*s2Len + (j-4)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 11);
    }
    if (0 <= i+5 && i+5 < s1Len && 0 <= j-5 && j-5 < s2Len) {
        array[1LL*(i+5)*s2Len + (j-5)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 10);
    }
    if (0 <= i+6 && i+6 < s1Len && 0 <= j-6 && j-6 < s2Len) {
        array[1LL*(i+6)*s2Len + (j-6)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 9);
    }
    if (0 <= i+7 && i+7 < s1Len && 0 <= j-7 && j-7 < s2Len) {
        array[1LL*(i+7)*s2Len + (j-7)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 8);
    }
    if (0 <= i+8 && i+8 < s1Len && 0 <= j-8 && j-8 < s2Len) {
        array[1LL*(i+8)*s2Len + (j-8)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 7);
    }
    if (0 <= i+9 && i+9 < s1Len && 0 <= j-9 && j-9 < s2Len) {
        array[1LL*(i+9)*s2Len + (j-9)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 6);
    }
    if (0 <= i+10 && i+10 < s1Len && 0 <= j-10 && j-10 < s2Len) {
        array[1LL*(i+10)*s2Len + (j-10)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 5);
    }
    if (0 <= i+11 && i+11 < s1Len && 0 <= j-11 && j-11 < s2Len) {
        array[1LL*(i+11)*s2Len + (j-11)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 4);
    }
    if (0 <= i+12 && i+12 < s1Len && 0 <= j-12 && j-12 < s2Len) {
        array[1LL*(i+12)*s2Len + (j-12)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 3);
    }
    if (0 <= i+13 && i+13 < s1Len && 0 <= j-13 && j-13 < s2Len) {
        array[1LL*(i+13)*s2Len + (j-13)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 2);
    }
    if (0 <= i+14 && i+14 < s1Len && 0 <= j-14 && j-14 < s2Len) {
        array[1LL*(i+14)*s2Len + (j-14)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 1);
    }
    if (0 <= i+15 && i+15 < s1Len && 0 <= j-15 && j-15 < s2Len) {
        array[1LL*(i+15)*s2Len + (j-15)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 0);
    }
}

// Assembly:
vextracti128 $0x1, %ymm0, %xmm1
movl %r8d, %eax
movl %ecx, %r9d
cmpl %r8d, %ecx
jge 0x50196e
cmpl %edx, %esi
jge 0x50196e
movl %ecx, %r10d
orl %esi, %r10d
js 0x50196e
vpextrw $0x7, %xmm1, %r10d
movswl %r10w, %r10d
movl %esi, %r11d
imulq %rax, %r11
leaq (%rdi,%r11,4), %r11
movl %r10d, (%r11,%r9,4)
pushq %rbp
pushq %rbx
leal 0x1(%rsi), %r10d
cmpl $-0x1, %esi
setl %r11b
cmpl %edx, %r10d
setge %bl
testl %ecx, %ecx
setle %bpl
orb %r11b, %bpl
orb %bl, %bpl
cmpl %r8d, %ecx
setg %r11b
orb %bpl, %r11b
jne 0x5019b2
vpextrw $0x6, %xmm1, %r11d
movswl %r11w, %r11d
movl %r10d, %r10d
imulq %rax, %r10
leaq (%rdi,%r10,4), %r10
movl %r11d, -0x4(%r10,%r9,4)
leal 0x2(%rsi), %r9d
cmpl $-0x2, %esi
setge %r10b
cmpl %edx, %r9d
setl %r11b
andb %r10b, %r11b
cmpb $0x1, %r11b
jne 0x501a01
leal -0x2(%rcx), %r10d
cmpl $0x2, %ecx
setge %r11b
cmpl %r8d, %r10d
setl %bl
andb %r11b, %bl
cmpb $0x1, %bl
jne 0x501a01
vpextrw $0x5, %xmm1, %r11d
movswl %r11w, %r11d
movl %r9d, %r9d
imulq %rax, %r9
movl %r10d, %r10d
leaq (%rdi,%r9,4), %r9
movl %r11d, (%r9,%r10,4)
leal 0x3(%rsi), %r9d
cmpl $-0x3, %esi
setge %r10b
cmpl %edx, %r9d
setl %r11b
andb %r10b, %r11b
cmpb $0x1, %r11b
jne 0x501a50
leal -0x3(%rcx), %r10d
cmpl $0x3, %ecx
setge %r11b
cmpl %r8d, %r10d
setl %bl
andb %r11b, %bl
cmpb $0x1, %bl
jne 0x501a50
vpextrw $0x4, %xmm1, %r11d
movswl %r11w, %r11d
movl %r9d, %r9d
imulq %rax, %r9
movl %r10d, %r10d
leaq (%rdi,%r9,4), %r9
movl %r11d, (%r9,%r10,4)
leal 0x4(%rsi), %r9d
cmpl $-0x4, %esi
setge %r10b
cmpl %edx, %r9d
setl %r11b
andb %r10b, %r11b
cmpb $0x1, %r11b
jne 0x501a9f
leal -0x4(%rcx), %r10d
cmpl $0x4, %ecx
setge %r11b
cmpl %r8d, %r10d
setl %bl
andb %r11b, %bl
cmpb $0x1, %bl
jne 0x501a9f
vpextrw $0x3, %xmm1, %r11d
movswl %r11w, %r11d
movl %r9d, %r9d
imulq %rax, %r9
movl %r10d, %r10d
leaq (%rdi,%r9,4), %r9
movl %r11d, (%r9,%r10,4)
leal 0x5(%rsi), %r9d
cmpl $-0x5, %esi
setge %r10b
cmpl %edx, %r9d
setl %r11b
andb %r10b, %r11b
cmpb $0x1, %r11b
jne 0x501aee
leal -0x5(%rcx), %r10d
cmpl $0x5, %ecx
setge %r11b
cmpl %r8d, %r10d
setl %bl
andb %r11b, %bl
cmpb $0x1, %bl
jne 0x501aee
vpextrw $0x2, %xmm1, %r11d
movswl %r11w, %r11d
movl %r9d, %r9d
imulq %rax, %r9
movl %r10d, %r10d
leaq (%rdi,%r9,4), %r9
movl %r11d, (%r9,%r10,4)
leal 0x6(%rsi), %r9d
cmpl $-0x6, %esi
setge %r10b
cmpl %edx, %r9d
setl %r11b
andb %r10b, %r11b
cmpb $0x1, %r11b
jne 0x501b3d
leal -0x6(%rcx), %r10d
cmpl $0x6, %ecx
setge %r11b
cmpl %r8d, %r10d
setl %bl
andb %r11b, %bl
cmpb $0x1, %bl
jne 0x501b3d
vpextrw $0x1, %xmm1, %r11d
movswl %r11w, %r11d
movl %r9d, %r9d
imulq %rax, %r9
movl %r10d, %r10d
leaq (%rdi,%r9,4), %r9
movl %r11d, (%r9,%r10,4)
leal 0x7(%rsi), %r9d
cmpl $-0x7, %esi
setge %r10b
cmpl %edx, %r9d
setl %r11b
andb %r10b, %r11b
cmpb $0x1, %r11b
jne 0x501b8c
leal -0x7(%rcx), %r10d
cmpl $0x7, %ecx
setge %r11b
cmpl %r8d, %r10d
setl %bl
andb %r11b, %bl
cmpb $0x1, %bl
jne 0x501b8c
vmovd %xmm1, %r11d
movswl %r11w, %r11d
movl %r9d, %r9d
imulq %rax, %r9
movl %r10d, %r10d
leaq (%rdi,%r9,4), %r9
movl %r11d, (%r9,%r10,4)
leal 0x8(%rsi), %r9d
cmpl $-0x8, %esi
setge %r10b
cmpl %edx, %r9d
setl %r11b
andb %r10b, %r11b
cmpb $0x1, %r11b
jne 0x501bdb
leal -0x8(%rcx), %r10d
cmpl $0x8, %ecx
setge %r11b
cmpl %r8d, %r10d
setl %bl
andb %r11b, %bl
cmpb $0x1, %bl
jne 0x501bdb
vpextrw $0x7, %xmm0, %r11d
movswl %r11w, %r11d
movl %r9d, %r9d
imulq %rax, %r9
movl %r10d, %r10d
leaq (%rdi,%r9,4), %r9
movl %r11d, (%r9,%r10,4)
leal 0x9(%rsi), %r9d
cmpl $-0x9, %esi
setge %r10b
cmpl %edx, %r9d
setl %r11b
andb %r10b, %r11b
cmpb $0x1, %r11b
jne 0x501c2a
leal -0x9(%rcx), %r10d
cmpl $0x9, %ecx
setge %r11b
cmpl %r8d, %r10d
setl %bl
andb %r11b, %bl
cmpb $0x1, %bl
jne 0x501c2a
vpextrw $0x6, %xmm0, %r11d
movswl %r11w, %r11d
movl %r9d, %r9d
imulq %rax, %r9
movl %r10d, %r10d
leaq (%rdi,%r9,4), %r9
movl %r11d, (%r9,%r10,4)
leal 0xa(%rsi), %r9d
cmpl $-0xa, %esi
setge %r10b
cmpl %edx, %r9d
setl %r11b
andb %r10b, %r11b
cmpb $0x1, %r11b
jne 0x501c79
leal -0xa(%rcx), %r10d
cmpl $0xa, %ecx
setge %r11b
cmpl %r8d, %r10d
setl %bl
andb %r11b, %bl
cmpb $0x1, %bl
jne 0x501c79
vpextrw $0x5, %xmm0, %r11d
movswl %r11w, %r11d
movl %r9d, %r9d
imulq %rax, %r9
movl %r10d, %r10d
leaq (%rdi,%r9,4), %r9
movl %r11d, (%r9,%r10,4)
leal 0xb(%rsi), %r9d
cmpl $-0xb, %esi
setge %r10b
cmpl %edx, %r9d
setl %r11b
andb %r10b, %r11b
cmpb $0x1, %r11b
jne 0x501cc8
leal -0xb(%rcx), %r10d
cmpl $0xb, %ecx
setge %r11b
cmpl %r8d, %r10d
setl %bl
andb %r11b, %bl
cmpb $0x1, %bl
jne 0x501cc8
vpextrw $0x4, %xmm0, %r11d
movswl %r11w, %r11d
movl %r9d, %r9d
imulq %rax, %r9
movl %r10d, %r10d
leaq (%rdi,%r9,4), %r9
movl %r11d, (%r9,%r10,4)
leal 0xc(%rsi), %r9d
cmpl $-0xc, %esi
setge %r10b
cmpl %edx, %r9d
setl %r11b
andb %r10b, %r11b
cmpb $0x1, %r11b
jne 0x501d17
leal -0xc(%rcx), %r10d
cmpl $0xc, %ecx
setge %r11b
cmpl %r8d, %r10d
setl %bl
andb %r11b, %bl
cmpb $0x1, %bl
jne 0x501d17
vpextrw $0x3, %xmm0, %r11d
movswl %r11w, %r11d
movl %r9d, %r9d
imulq %rax, %r9
movl %r10d, %r10d
leaq (%rdi,%r9,4), %r9
movl %r11d, (%r9,%r10,4)
leal 0xd(%rsi), %r9d
cmpl $-0xd, %esi
setge %r10b
cmpl %edx, %r9d
setl %r11b
andb %r10b, %r11b
cmpb $0x1, %r11b
jne 0x501d66
leal -0xd(%rcx), %r10d
cmpl $0xd, %ecx
setge %r11b
cmpl %r8d, %r10d
setl %bl
andb %r11b, %bl
cmpb $0x1, %bl
jne 0x501d66
vpextrw $0x2, %xmm0, %r11d
movswl %r11w, %r11d
movl %r9d, %r9d
imulq %rax, %r9
movl %r10d, %r10d
leaq (%rdi,%r9,4), %r9
movl %r11d, (%r9,%r10,4)
leal 0xe(%rsi), %r9d
cmpl $-0xe, %esi
setge %r10b
cmpl %edx, %r9d
setl %r11b
andb %r10b, %r11b
cmpb $0x1, %r11b
jne 0x501db5
leal -0xe(%rcx), %r10d
cmpl $0xe, %ecx
setge %r11b
cmpl %r8d, %r10d
setl %bl
andb %r11b, %bl
cmpb $0x1, %bl
jne 0x501db5
vpextrw $0x1, %xmm0, %r11d
movswl %r11w, %r11d
movl %r9d, %r9d
imulq %rax, %r9
movl %r10d, %r10d
leaq (%rdi,%r9,4), %r9
movl %r11d, (%r9,%r10,4)
leal 0xf(%rsi), %r9d
cmpl $-0xf, %esi
setge %sil
cmpl %edx, %r9d
setl %dl
andb %sil, %dl
cmpb $0x1, %dl
popq %rbx
popq %rbp
jne 0x501e00
leal -0xf(%rcx), %edx
cmpl $0xf, %ecx
setge %cl
cmpl %r8d, %edx
setl %sil
andb %cl, %sil
cmpb $0x1, %sil
jne 0x501e00
vmovd %xmm0, %ecx
movswl %cx, %ecx
movl %r9d, %esi
imulq %rsi, %rax
movl %edx, %edx
leaq (%rdi,%rax,4), %rax
movl %ecx, (%rax,%rdx,4)
vzeroupper
retq