// File: /workspace/github_cpp_makefile_star2_O2/Sooryakiran[P]dotV/src/verilog.cpp
// Function: AND::AND(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>, std::vector<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>, std::allocator<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>>>, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
AND::AND(string name, vector<wire> input_wires, wire output_wire){
    this->name = name;
    this->inputs = input_wires;
    this->outputs.push_back(output_wire);
    this->transistors = AND_TRANSISTORS;
    this->definition = "module AND_GATE(a, b, c);\n"
                       "\t input a, b;\n"
                       "\t output c;\n"
                       "\t assign #" + to_string(AND_DELAY) + " c = a & b;\n"
                       "endmodule";
    this->generate = "AND_GATE " + this->name + " (" + this->inputs.at(0) + ", " + this->inputs.at(1) + ", " + this->outputs.at(0) + ");";
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x100, %rsp            # imm = 0x100
movq %rcx, %r12
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %rbx
callq 0xa690
movq %rbx, %rdi
movq %r15, %rsi
callq 0xa410
leaq 0x80(%rbx), %r15
movq %r15, %rdi
movq %r14, %rsi
callq 0xa810
leaq 0x98(%rbx), %r14
movq %r14, %rdi
movq %r12, %rsi
callq 0xa3e0
movl $0x6, 0x60(%rbx)
leaq -0x40(%rbp), %rdi
pushq $0x2
popq %rsi
callq 0xa9a0
leaq 0x12a9c(%rip), %rsi     # 0x1f1cc
leaq -0x60(%rbp), %rdi
leaq -0x40(%rbp), %rdx
callq 0xac40
leaq 0x12ac7(%rip), %rdx     # 0x1f20b
leaq -0x120(%rbp), %rdi
leaq -0x60(%rbp), %rsi
callq 0xa150
leaq 0x20(%rbx), %rdi
leaq -0x120(%rbp), %r12
movq %r12, %rsi
callq 0xa920
movq %r12, %rdi
callq 0xa370
leaq -0x60(%rbp), %rdi
callq 0xa370
leaq -0x40(%rbp), %rdi
callq 0xa370
leaq 0x12c08(%rip), %rsi     # 0x1f390
leaq -0x80(%rbp), %rdi
movq %rbx, %rdx
callq 0xa6c0
leaq 0x128d2(%rip), %rdx     # 0x1f06d
leaq -0xa0(%rbp), %rdi
leaq -0x80(%rbp), %rsi
callq 0xa150
movq %r15, %rdi
xorl %esi, %esi
callq 0xa200
leaq -0xc0(%rbp), %rdi
leaq -0xa0(%rbp), %rsi
movq %rax, %rdx
callq 0xaaf0
leaq 0x1289e(%rip), %rdx     # 0x1f070
leaq -0xe0(%rbp), %rdi
leaq -0xc0(%rbp), %rsi
callq 0xa150
pushq $0x1
popq %rsi
movq %r15, %rdi
callq 0xa200
leaq -0x100(%rbp), %rdi
leaq -0xe0(%rbp), %rsi
movq %rax, %rdx
callq 0xaaf0
leaq 0x12863(%rip), %rdx     # 0x1f070
leaq -0x40(%rbp), %rdi
leaq -0x100(%rbp), %rsi
callq 0xa150
movq %r14, %rdi
xorl %esi, %esi
callq 0xa200
leaq -0x60(%rbp), %rdi
leaq -0x40(%rbp), %rsi
movq %rax, %rdx
callq 0xaaf0
leaq 0x12ed3(%rip), %rdx     # 0x1f711
leaq -0x120(%rbp), %rdi
leaq -0x60(%rbp), %rsi
callq 0xa150
addq $0x40, %rbx
leaq -0x120(%rbp), %r14
movq %rbx, %rdi
movq %r14, %rsi
callq 0xa920
movq %r14, %rdi
callq 0xa370
leaq -0x60(%rbp), %rdi
callq 0xa370
leaq -0x40(%rbp), %rdi
callq 0xa370
leaq -0x100(%rbp), %rdi
callq 0xa370
leaq -0xe0(%rbp), %rdi
callq 0xa370
leaq -0xc0(%rbp), %rdi
callq 0xa370
leaq -0xa0(%rbp), %rdi
callq 0xa370
leaq -0x80(%rbp), %rdi
callq 0xa370
addq $0x100, %rsp            # imm = 0x100
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %r14
leaq -0x60(%rbp), %rdi
callq 0xa370
jmp 0xc902
movq %rax, %r14
jmp 0xc90b
movq %rax, %r14
jmp 0xc928
movq %rax, %r14
jmp 0xc945
jmp 0xc950
movq %rax, %r14
leaq -0x60(%rbp), %rdi
callq 0xa370
jmp 0xc8f7
movq %rax, %r14
leaq -0x40(%rbp), %rdi
jmp 0xc949
jmp 0xc950
movq %rax, %r14
leaq -0x40(%rbp), %rdi
callq 0xa370
leaq -0x100(%rbp), %rdi
callq 0xa370
jmp 0xc91c
movq %rax, %r14
leaq -0xe0(%rbp), %rdi
callq 0xa370
leaq -0xc0(%rbp), %rdi
callq 0xa370
jmp 0xc939
movq %rax, %r14
leaq -0xa0(%rbp), %rdi
callq 0xa370
leaq -0x80(%rbp), %rdi
callq 0xa370
jmp 0xc953
movq %rax, %r14
movq %rbx, %rdi
callq 0xa230
movq %r14, %rdi
callq 0xad00
nop