// File: /workspace/github_c_makefile_star2_O1/samtools[P]htslib/htscodecs/htscodecs/rANS_static32x16pr_avx2.c
// Function: rans_compress_O0_32x16_avx2
unsigned char *rans_compress_O0_32x16_avx2(unsigned char *in,
                                           unsigned int in_size,
                                           unsigned char *out,
                                           unsigned int *out_size) {
    unsigned char *cp, *out_end;
    RansEncSymbol syms[256];
    RansState ransN[NX] __attribute__((aligned(32)));
    uint8_t* ptr;
    uint32_t F[256+MAGIC] = {0};
    int i, j, tab_size = 0, x, z;
    // -20 for order/size/meta
    uint32_t bound = rans_compress_bound_4x16(in_size,0)-20;

    if (!out) {
        *out_size = bound;
        out = malloc(*out_size);
    }
    if (!out || bound > *out_size)
        return NULL;

    // If "out" isn't word aligned, tweak out_end/ptr to ensure it is.
    // We already added more round in bound to allow for this.
    if (((size_t)out)&1)
        bound--;
    ptr = out_end = out + bound;

    if (in_size == 0)
        goto empty;

    // Compute statistics
    if (hist8(in, in_size, F) < 0)
        return NULL;

    // Normalise so frequences sum to power of 2
    uint32_t fsum = in_size;
    uint32_t max_val = round2(fsum);
    if (max_val > TOTFREQ)
        max_val = TOTFREQ;

    if (normalise_freq(F, fsum, max_val) < 0)
        return NULL;
    fsum=max_val;

    cp = out;
    cp += encode_freq(cp, F);
    tab_size = cp-out;
    //write(2, out+4, cp-(out+4));

    if (normalise_freq(F, fsum, TOTFREQ) < 0)
        return NULL;

    // Encode statistics.
    for (x = j = 0; j < 256; j++) {
        if (F[j]) {
            RansEncSymbolInit(&syms[j], x, F[j], TF_SHIFT);
            x += F[j];
        }
    }

    for (z = 0; z < NX; z++)
      RansEncInit(&ransN[z]);

    z = i = in_size&(NX-1);
    while (z-- > 0)
      RansEncPutSymbol(&ransN[z], &ptr, &syms[in[in_size-(i-z)]]);

    uint16_t *ptr16 = (uint16_t *)ptr;

    LOAD(Rv, ransN);

    for (i=(in_size &~(NX-1)); i>0; i-=NX) {
        // We need to gather sym[curr_char][last_char] structs.
        // These hold 4 32-bit values, so are 128 bit each, and
        // are loaded from 32 distinct addresses.
        //
        // We load them into 32 128-bit lanes and then combine to get
        // 16 avx-256 registers.
        // These are now ABCD ABCD ABCD ABCD... orientation
        // We can then "gather" from these registers via a combination
        // of shuffle / permutes / and / or operations.  This is less
        // IO than repeating 4 sets of gathers/loads 32-times over.

        // DCBA holding 4 elements in a syms[] array
        // -> 4-way rotate via shuffles
        // [0] DCBA  11 10 01 00  E4
        // [1] CBAD  10 01 00 11  93
        // [2] BADC  01 00 11 10  4E
        // [3] ADCB  00 11 10 01  39
        //
        // Then AND to select relevant lanes and OR
        // [0] ......A0
        // [1] ....A1..
        // [2] ..A2....
        // [3] A3......  OR to get A3A2A1A0
        //
        // or:
        // [0] ....B0..
        // [1] ..B1....
        // [2] B2......
        // [3] ......B3  OR to get B2B1B0B3 and shuffle to B3B2B1B0

        __m256i sh[16];
        for (z = 0; z < 16; z+=4) {
            int Z = i - NX + z*2;

#define m128_to_256 _mm256_castsi128_si256
            __m256i t0, t1, t2, t3;
            __m128i *s0, *s1, *s2, *s3;
            s0 = (__m128i *)(&syms[in[Z+0]]);
            s1 = (__m128i *)(&syms[in[Z+4]]);
            s2 = (__m128i *)(&syms[in[Z+1]]);
            s3 = (__m128i *)(&syms[in[Z+5]]);

            // FIXME: try load instead of loadu, as 128-bit aligned.
            t0 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s0)), 0xE4);
            t1 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s1)), 0xE4);
            t2 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s2)), 0x93);
            t3 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s3)), 0x93);

            sh[z+0] = _mm256_permute2x128_si256(t0, t1, 0x20);
            sh[z+1] = _mm256_permute2x128_si256(t2, t3, 0x20);

            s0 = (__m128i *)(&syms[in[Z+2]]);
            s1 = (__m128i *)(&syms[in[Z+6]]);
            s2 = (__m128i *)(&syms[in[Z+3]]);
            s3 = (__m128i *)(&syms[in[Z+7]]);

            t0 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s0)), 0x4E);
            t1 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s1)), 0x4E);
            t2 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s2)), 0x39);
            t3 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s3)), 0x39);

            sh[z+2] = _mm256_permute2x128_si256(t0, t1, 0x20);
            sh[z+3] = _mm256_permute2x128_si256(t2, t3, 0x20);

            // potential to set xmax, rf, bias, and SD in-situ here, removing
            // the need to hold sh[] in regs.  Doing so doesn't seem to speed
            // things up though.
        }

        __m256i xA = _mm256_set_epi32(0,0,0,-1, 0,0,0,-1);
        __m256i xB = _mm256_set_epi32(0,0,-1,0, 0,0,-1,0);
        __m256i xC = _mm256_set_epi32(0,-1,0,0, 0,-1,0,0);
        __m256i xD = _mm256_set_epi32(-1,0,0,0, -1,0,0,0);

#define SYM_LOAD(x, A, B, C, D)                                         \
        _mm256_or_si256(_mm256_or_si256(_mm256_and_si256(sh[x+0], A),   \
                                        _mm256_and_si256(sh[x+1], B)),  \
                        _mm256_or_si256(_mm256_and_si256(sh[x+2], C),   \
                                        _mm256_and_si256(sh[x+3], D)))

        // Renorm:
        // if (x > x_max) {*--ptr16 = x & 0xffff; x >>= 16;}
        __m256i xmax1 = SYM_LOAD( 0, xA, xB, xC, xD);
        __m256i xmax2 = SYM_LOAD( 4, xA, xB, xC, xD);
        __m256i xmax3 = SYM_LOAD( 8, xA, xB, xC, xD);
        __m256i xmax4 = SYM_LOAD(12, xA, xB, xC, xD);

        __m256i cv1 = _mm256_cmpgt_epi32(Rv1, xmax1);
        __m256i cv2 = _mm256_cmpgt_epi32(Rv2, xmax2);
        __m256i cv3 = _mm256_cmpgt_epi32(Rv3, xmax3);
        __m256i cv4 = _mm256_cmpgt_epi32(Rv4, xmax4);

        // Store bottom 16-bits at ptr16
        unsigned int imask1 = _mm256_movemask_ps((__m256)cv1);
        unsigned int imask2 = _mm256_movemask_ps((__m256)cv2);
        unsigned int imask3 = _mm256_movemask_ps((__m256)cv3);
        unsigned int imask4 = _mm256_movemask_ps((__m256)cv4);

        __m256i idx1 = _mm256_load_si256((const __m256i*)permutec[imask1]);
        __m256i idx2 = _mm256_load_si256((const __m256i*)permutec[imask2]);
        __m256i idx3 = _mm256_load_si256((const __m256i*)permutec[imask3]);
        __m256i idx4 = _mm256_load_si256((const __m256i*)permutec[imask4]);

        // Permute; to gather together the rans states that need flushing
        __m256i V1, V2, V3, V4;
        V1 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv1, cv1), idx1);
        V2 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv2, cv2), idx2);
        V3 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv3, cv3), idx3);
        V4 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv4, cv4), idx4);
        
        // We only flush bottom 16 bits, to squash 32-bit states into 16 bit.
        V1 = _mm256_and_si256(V1, _mm256_set1_epi32(0xffff));
        V2 = _mm256_and_si256(V2, _mm256_set1_epi32(0xffff));
        V3 = _mm256_and_si256(V3, _mm256_set1_epi32(0xffff));
        V4 = _mm256_and_si256(V4, _mm256_set1_epi32(0xffff));
        __m256i V12 = _mm256_packus_epi32(V1, V2);
        __m256i V34 = _mm256_packus_epi32(V3, V4);

        // It's BAba order, want BbAa so shuffle.
        V12 = _mm256_permute4x64_epi64(V12, 0xd8);
        V34 = _mm256_permute4x64_epi64(V34, 0xd8);

        // Now we have bottom N 16-bit values in each V12/V34 to flush
        __m128i f =  _mm256_extractf128_si256(V34, 1);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask4);

        f =  _mm256_extractf128_si256(V34, 0);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask3);

        f =  _mm256_extractf128_si256(V12, 1);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask2);

        f =  _mm256_extractf128_si256(V12, 0);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask1);

        __m256i Rs;
        Rs = _mm256_srli_epi32(Rv1,16); Rv1 = _mm256_blendv_epi8(Rv1, Rs, cv1);
        Rs = _mm256_srli_epi32(Rv2,16); Rv2 = _mm256_blendv_epi8(Rv2, Rs, cv2);
        Rs = _mm256_srli_epi32(Rv3,16); Rv3 = _mm256_blendv_epi8(Rv3, Rs, cv3);
        Rs = _mm256_srli_epi32(Rv4,16); Rv4 = _mm256_blendv_epi8(Rv4, Rs, cv4);

        // Cannot trivially replace the multiply as mulhi_epu32 doesn't
        // exist (only mullo).
        // However we can use _mm256_mul_epu32 twice to get 64bit results
        // (half our lanes) and shift/or to get the answer.
        //
        // (AVX512 allows us to hold it all in 64-bit lanes and use mullo_epi64
        // plus a shift.  KNC has mulhi_epi32, but not sure if this is
        // available.)
        __m256i rfv1 = _mm256_shuffle_epi32(SYM_LOAD( 0, xB, xC, xD, xA),0x39);
        __m256i rfv2 = _mm256_shuffle_epi32(SYM_LOAD( 4, xB, xC, xD, xA),0x39);
        __m256i rfv3 = _mm256_shuffle_epi32(SYM_LOAD( 8, xB, xC, xD, xA),0x39);
        __m256i rfv4 = _mm256_shuffle_epi32(SYM_LOAD(12, xB, xC, xD, xA),0x39);

        rfv1 = _mm256_mulhi_epu32(Rv1, rfv1);
        rfv2 = _mm256_mulhi_epu32(Rv2, rfv2);
        rfv3 = _mm256_mulhi_epu32(Rv3, rfv3);
        rfv4 = _mm256_mulhi_epu32(Rv4, rfv4);

        __m256i SDv1 = _mm256_shuffle_epi32(SYM_LOAD( 0, xD, xA, xB, xC),0x93);
        __m256i SDv2 = _mm256_shuffle_epi32(SYM_LOAD( 4, xD, xA, xB, xC),0x93);
        __m256i SDv3 = _mm256_shuffle_epi32(SYM_LOAD( 8, xD, xA, xB, xC),0x93);
        __m256i SDv4 = _mm256_shuffle_epi32(SYM_LOAD(12, xD, xA, xB, xC),0x93);

        __m256i shiftv1 = _mm256_srli_epi32(SDv1, 16);
        __m256i shiftv2 = _mm256_srli_epi32(SDv2, 16);
        __m256i shiftv3 = _mm256_srli_epi32(SDv3, 16);
        __m256i shiftv4 = _mm256_srli_epi32(SDv4, 16);

        shiftv1 = _mm256_sub_epi32(shiftv1, _mm256_set1_epi32(32));
        shiftv2 = _mm256_sub_epi32(shiftv2, _mm256_set1_epi32(32));
        shiftv3 = _mm256_sub_epi32(shiftv3, _mm256_set1_epi32(32));
        shiftv4 = _mm256_sub_epi32(shiftv4, _mm256_set1_epi32(32));

        __m256i qv1 = _mm256_srlv_epi32(rfv1, shiftv1);
        __m256i qv2 = _mm256_srlv_epi32(rfv2, shiftv2);

        __m256i freqv1 = _mm256_and_si256(SDv1, _mm256_set1_epi32(0xffff));
        __m256i freqv2 = _mm256_and_si256(SDv2, _mm256_set1_epi32(0xffff));
        qv1 = _mm256_mullo_epi32(qv1, freqv1);
        qv2 = _mm256_mullo_epi32(qv2, freqv2);

        __m256i qv3 = _mm256_srlv_epi32(rfv3, shiftv3);
        __m256i qv4 = _mm256_srlv_epi32(rfv4, shiftv4);

        __m256i freqv3 = _mm256_and_si256(SDv3, _mm256_set1_epi32(0xffff));
        __m256i freqv4 = _mm256_and_si256(SDv4, _mm256_set1_epi32(0xffff));
        qv3 = _mm256_mullo_epi32(qv3, freqv3);
        qv4 = _mm256_mullo_epi32(qv4, freqv4);

        __m256i biasv1=_mm256_shuffle_epi32(SYM_LOAD( 0, xC, xD, xA, xB),0x4E);
        __m256i biasv2=_mm256_shuffle_epi32(SYM_LOAD( 4, xC, xD, xA, xB),0x4E);
        __m256i biasv3=_mm256_shuffle_epi32(SYM_LOAD( 8, xC, xD, xA, xB),0x4E);
        __m256i biasv4=_mm256_shuffle_epi32(SYM_LOAD(12, xC, xD, xA, xB),0x4E);

        qv1 = _mm256_add_epi32(qv1, biasv1);
        qv2 = _mm256_add_epi32(qv2, biasv2);
        qv3 = _mm256_add_epi32(qv3, biasv3);
        qv4 = _mm256_add_epi32(qv4, biasv4);

        Rv1 = _mm256_add_epi32(Rv1, qv1);
        Rv2 = _mm256_add_epi32(Rv2, qv2);
        Rv3 = _mm256_add_epi32(Rv3, qv3);
        Rv4 = _mm256_add_epi32(Rv4, qv4);
    }

    STORE(Rv, ransN);

    ptr = (uint8_t *)ptr16;
    for (z = NX-1; z >= 0; z--)
      RansEncFlush(&ransN[z], &ptr);

 empty:
    // Finalise block size and return it
    *out_size = (out_end - ptr) + tab_size;

//    cp = out;
//    *cp++ = (in_size>> 0) & 0xff;
//    *cp++ = (in_size>> 8) & 0xff;
//    *cp++ = (in_size>>16) & 0xff;
//    *cp++ = (in_size>>24) & 0xff;

    memmove(out + tab_size, ptr, out_end-ptr);

    return out;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
andq $-0x20, %rsp
subq $0x1f80, %rsp           # imm = 0x1F80
movq %rcx, 0x18(%rsp)
movq %rdx, %rbx
movl %esi, %r14d
movq %rdi, %r12
leaq 0x720(%rsp), %rdi
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
movq %r14, 0x20(%rsp)
movl %r14d, %edi
xorl %esi, %esi
callq 0x64798
movl %eax, %r15d
leal -0x14(%r15), %r14d
testq %rbx, %rbx
jne 0x69ebc
movq 0x18(%rsp), %rax
movl %r14d, (%rax)
movl %r14d, %edi
callq 0x4680
movq %rax, %rbx
testq %rbx, %rbx
je 0x69ecd
xorl %edi, %edi
movq 0x18(%rsp), %rax
cmpl (%rax), %r14d
jbe 0x69ee1
xorl %ebx, %ebx
movq %rbx, %rax
leaq -0x28(%rbp), %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
addl $-0x15, %r15d
testb $0x1, %bl
cmovel %r14d, %r15d
addq %rbx, %r15
movq %r15, %rsi
movq 0x20(%rsp), %r13
testl %r13d, %r13d
je 0x6aef0
cmpl $0x7a121, %r13d         # imm = 0x7A121
jb 0x6a003
movl $0x3006f, %edi          # imm = 0x3006F
movl $0x4, %esi
callq 0x8070d
xorl %ecx, %ecx
testq %rax, %rax
je 0x69ecd
movq 0x20(%rsp), %rsi
movl %esi, %edx
andl $-0x10, %edx
je 0x69fa0
movl %edx, %edx
xorl %ecx, %ecx
movzwl (%r12,%rcx), %esi
movzwl 0x2(%r12,%rcx), %edi
movzwl 0x4(%r12,%rcx), %r8d
movzwl 0x6(%r12,%rcx), %r9d
incl (%rax,%rsi,4)
incl 0x40094(%rax,%rdi,4)
incl 0x80128(%rax,%r8,4)
incl (%rax,%r9,4)
movzwl 0x8(%r12,%rcx), %esi
movzwl 0xa(%r12,%rcx), %edi
movzwl 0xc(%r12,%rcx), %r8d
movzwl 0xe(%r12,%rcx), %r9d
incl 0x40094(%rax,%rsi,4)
incl (%rax,%rdi,4)
incl 0x40094(%rax,%r8,4)
incl 0x80128(%rax,%r9,4)
addq $0x10, %rcx
cmpq %rdx, %rcx
jb 0x69f33
movq 0x20(%rsp), %rsi
cmpl %esi, %ecx
jae 0x69fbc
movl %ecx, %ecx
movl %esi, %edx
movzbl (%r12,%rcx), %esi
incq %rcx
incl 0x720(%rsp,%rsi,4)
cmpq %rcx, %rdx
jne 0x69fa8
xorl %ecx, %ecx
movl 0x40094(%rax,%rcx,4), %edx
addl (%rax,%rcx,4), %edx
addl 0x80128(%rax,%rcx,4), %edx
movzbl %cl, %esi
addl %edx, 0x720(%rsp,%rsi,4)
movl %ecx, %esi
shrl $0x8, %esi
addl %edx, 0x720(%rsp,%rsi,4)
incq %rcx
cmpq $0x10000, %rcx          # imm = 0x10000
jne 0x69fbe
movq %rax, %rdi
callq 0x80732
movq 0x20(%rsp), %rsi
jmp 0x6a10b
leaq 0xf60(%rsp), %rdi
xorl %r14d, %r14d
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
leaq 0x300(%rsp), %rdi
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
leaq 0xb40(%rsp), %rdi
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
movl %r13d, %eax
andl $0x7fff8, %eax          # imm = 0x7FFF8
movq %r13, %rsi
je 0x6a0c4
movl %eax, %eax
xorl %r14d, %r14d
movzbl (%r12,%r14), %ecx
incl 0x720(%rsp,%rcx,4)
movzbl 0x1(%r12,%r14), %ecx
incl 0xf60(%rsp,%rcx,4)
movzbl 0x2(%r12,%r14), %ecx
incl 0x300(%rsp,%rcx,4)
movzbl 0x3(%r12,%r14), %ecx
incl 0xb40(%rsp,%rcx,4)
movzbl 0x4(%r12,%r14), %ecx
incl 0x720(%rsp,%rcx,4)
movzbl 0x5(%r12,%r14), %ecx
incl 0xf60(%rsp,%rcx,4)
movzbl 0x6(%r12,%r14), %ecx
incl 0x300(%rsp,%rcx,4)
movzbl 0x7(%r12,%r14), %ecx
incl 0xb40(%rsp,%rcx,4)
addq $0x8, %r14
cmpq %rax, %r14
jb 0x6a054
cmpl %esi, %r14d
jae 0x6a0e2
movl %r14d, %eax
movl %esi, %ecx
movzbl (%r12,%rax), %edx
incq %rax
incl 0x720(%rsp,%rdx,4)
cmpq %rax, %rcx
jne 0x6a0ce
xorl %eax, %eax
movl 0x300(%rsp,%rax,4), %ecx
addl 0xf60(%rsp,%rax,4), %ecx
addl 0xb40(%rsp,%rax,4), %ecx
addl %ecx, 0x720(%rsp,%rax,4)
incq %rax
cmpq $0x100, %rax            # imm = 0x100
jne 0x6a0e4
leal -0x1(%rsi), %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x8, %eax
orl %ecx, %eax
movl %eax, %r9d
shrl $0x10, %r9d
orl %eax, %r9d
incl %r9d
movl $0x1000, %r8d           # imm = 0x1000
cmpl %r8d, %r9d
cmovbl %r9d, %r8d
movq %r8, %rcx
shlq $0x1f, %rcx
movb $0x1, %dil
movl $0x1, %r10d
movslq %esi, %r14
xorl %r11d, %r11d
movq %rcx, %rax
xorl %edx, %edx
divq %r14
movq %rax, %rsi
movl $0x40000000, %eax       # imm = 0x40000000
xorl %edx, %edx
idivl %r14d
cltq
addq %rsi, %rax
xorl %esi, %esi
xorl %edx, %edx
xorl %r14d, %r14d
movl 0x720(%rsp,%r11,4), %r13d
testq %r13, %r13
je 0x6a1b0
cmpl %r13d, %edx
cmovbl %r11d, %r14d
cmovbel %r13d, %edx
imulq %rax, %r13
shrq $0x1f, %r13
cmpl $0x2, %r13d
cmovbl %r10d, %r13d
movl %r13d, 0x720(%rsp,%r11,4)
addl %esi, %r13d
movl %r13d, %esi
incq %r11
cmpq $0x100, %r11            # imm = 0x100
jne 0x6a17a
movl %r8d, %edx
subl %esi, %edx
movslq %r14d, %rax
testl %edx, %edx
jg 0x6a258
jns 0x6a279
movl 0x720(%rsp,%rax,4), %r11d
movl %edx, %r14d
negl %r14d
cmpl %r14d, %r11d
jbe 0x6a1f7
movl %r11d, %r13d
shrl %r13d
cmpl %r14d, %r13d
setb %r14b
testb %r14b, %dil
je 0x6a268
testb $0x1, %dil
movl $0x0, %edi
jne 0x6a153
addl %r11d, %edx
movl $0x1, 0x720(%rsp,%rax,4)
decl %edx
je 0x6a279
xorl %ecx, %ecx
movl 0x720(%rsp,%rcx,4), %esi
cmpl $0x2, %esi
jb 0x6a246
movl %edx, %edi
negl %edi
movl $0x1, %r10d
subl %esi, %r10d
cmpl %edi, %esi
cmoval %edx, %r10d
addl %r10d, %esi
movl %esi, 0x720(%rsp,%rcx,4)
subl %r10d, %edx
cmpq $0xfe, %rcx
ja 0x6a279
incq %rcx
testl %edx, %edx
jne 0x6a21a
jmp 0x6a279
leaq (%rsp,%rax,4), %rcx
addq $0x720, %rcx            # imm = 0x720
movl (%rcx), %r11d
jmp 0x6a273
leaq (%rsp,%rax,4), %rcx
addq $0x720, %rcx            # imm = 0x720
addl %edx, %r11d
movl %r11d, (%rcx)
xorl %edx, %edx
cmpl $0x0, 0x720(%rsp,%rax,4)
je 0x69ecd
movl $0x1, %eax
xorl %ecx, %ecx
movq %rbx, %rdi
movq %rdi, %rsi
cmpl $0x0, 0x720(%rsp,%rcx,4)
je 0x6a2a6
testl %edx, %edx
je 0x6a2ba
decl %edx
movq %rsi, %rdi
incq %rcx
incq %rax
cmpq $0x100, %rcx            # imm = 0x100
jne 0x6a293
jmp 0x6a308
leaq 0x1(%rsi), %rdi
movb %cl, (%rsi)
xorl %edx, %edx
testq %rcx, %rcx
je 0x6a2a9
cmpl $0x0, 0x71c(%rsp,%rcx,4)
je 0x6a2a9
leal 0x1(%rcx), %edi
movl %edi, %edx
cmpq $0xfe, %rcx
ja 0x6a2fd
movq %rax, %rdx
cmpl $0x0, 0x720(%rsp,%rdx,4)
je 0x6a2fd
incq %rdx
cmpq $0x100, %rdx            # imm = 0x100
jne 0x6a2e2
movl $0x100, %edx            # imm = 0x100
subl %edi, %edx
movb %dl, 0x1(%rsi)
addq $0x2, %rsi
jmp 0x6a2a6
movb $0x0, (%rdi)
subl %ebx, %edi
incl %edi
movslq %edi, %rdi
addq %rbx, %rdi
xorl %eax, %eax
movl 0x720(%rsp,%rax,4), %ecx
testl %ecx, %ecx
je 0x6a3eb
cmpl $0x7f, %ecx
ja 0x6a337
movb %cl, (%rdi)
movl $0x1, %ecx
jmp 0x6a3e8
movl %ecx, %edx
cmpl $0x3fff, %ecx           # imm = 0x3FFF
ja 0x6a359
shrl $0x7, %edx
orb $-0x80, %dl
movb %dl, (%rdi)
andb $0x7f, %cl
movb %cl, 0x1(%rdi)
movl $0x2, %ecx
jmp 0x6a3e8
cmpl $0x1fffff, %ecx         # imm = 0x1FFFFF
ja 0x6a381
shrl $0xe, %edx
orb $-0x80, %dl
movb %dl, (%rdi)
movl %ecx, %edx
shrl $0x7, %edx
orb $-0x80, %dl
movb %dl, 0x1(%rdi)
andb $0x7f, %cl
movb %cl, 0x2(%rdi)
movl $0x3, %ecx
jmp 0x6a3e8
cmpl $0xfffffff, %ecx        # imm = 0xFFFFFFF
ja 0x6a3b4
shrl $0x15, %edx
orb $-0x80, %dl
movb %dl, (%rdi)
movl %ecx, %edx
shrl $0xe, %edx
orb $-0x80, %dl
movb %dl, 0x1(%rdi)
movl %ecx, %edx
shrl $0x7, %edx
orb $-0x80, %dl
movb %dl, 0x2(%rdi)
andb $0x7f, %cl
movb %cl, 0x3(%rdi)
movl $0x4, %ecx
jmp 0x6a3e8
shrl $0x1c, %edx
orb $-0x80, %dl
movb %dl, (%rdi)
movl %ecx, %edx
shrl $0x15, %edx
orb $-0x80, %dl
movb %dl, 0x1(%rdi)
movl %ecx, %edx
shrl $0xe, %edx
orb $-0x80, %dl
movb %dl, 0x2(%rdi)
movl %ecx, %edx
shrl $0x7, %edx
orb $-0x80, %dl
movb %dl, 0x3(%rdi)
andb $0x7f, %cl
movb %cl, 0x4(%rdi)
movl $0x5, %ecx
addq %rcx, %rdi
incq %rax
cmpq $0x100, %rax            # imm = 0x100
jne 0x6a317
testl %r9d, %r9d
je 0x6a552
movb $0x1, %r9b
movabsq $0x80000000000, %rcx    # imm = 0x80000000000
movl $0x1, %r10d
movslq %r8d, %r8
xorl %r11d, %r11d
movq %rcx, %rax
xorl %edx, %edx
divq %r8
movq %rax, %rsi
movl $0x40000000, %eax       # imm = 0x40000000
xorl %edx, %edx
idivl %r8d
movslq %eax, %rdx
addq %rsi, %rdx
xorl %r8d, %r8d
xorl %esi, %esi
xorl %eax, %eax
movl 0x720(%rsp,%r11,4), %r14d
testq %r14, %r14
je 0x6a474
cmpl %r14d, %esi
cmovbl %r11d, %eax
cmovbel %r14d, %esi
imulq %rdx, %r14
shrq $0x1f, %r14
cmpl $0x2, %r14d
cmovbl %r10d, %r14d
movl %r14d, 0x720(%rsp,%r11,4)
addl %r8d, %r14d
movl %r14d, %r8d
incq %r11
cmpq $0x100, %r11            # imm = 0x100
jne 0x6a43e
leal -0x1000(%r8), %r11d
movl $0x1000, %esi           # imm = 0x1000
subl %r8d, %esi
cltq
testl %esi, %esi
jg 0x6a526
jns 0x6a544
movl 0x720(%rsp,%rax,4), %edx
cmpl %r11d, %edx
jbe 0x6a4bd
movl %edx, %r14d
shrl %r14d
cmpl %r11d, %r14d
setb %r11b
testb %r11b, %r9b
je 0x6a535
testb $0x1, %r9b
movl $0x0, %r9d
jne 0x6a416
subl %r8d, %edx
movl $0x1, 0x720(%rsp,%rax,4)
addl $0xfff, %edx            # imm = 0xFFF
je 0x6a544
xorl %ecx, %ecx
movl 0x720(%rsp,%rcx,4), %esi
cmpl $0x2, %esi
jb 0x6a514
movl %edx, %r8d
negl %r8d
movl $0x1, %r9d
subl %esi, %r9d
cmpl %r8d, %esi
cmoval %edx, %r9d
addl %r9d, %esi
movl %esi, 0x720(%rsp,%rcx,4)
subl %r9d, %edx
cmpq $0xfe, %rcx
ja 0x6a544
incq %rcx
testl %edx, %edx
jne 0x6a4e5
jmp 0x6a544
leaq (%rsp,%rax,4), %rcx
addq $0x720, %rcx            # imm = 0x720
movl (%rcx), %edx
jmp 0x6a540
leaq (%rsp,%rax,4), %rcx
addq $0x720, %rcx            # imm = 0x720
addl %esi, %edx
movl %edx, (%rcx)
cmpl $0x0, 0x720(%rsp,%rax,4)
je 0x69ecd
subl %ebx, %edi
xorl %r8d, %r8d
xorl %r9d, %r9d
movl 0x720(%rsp,%r8,4), %r10d
testq %r10, %r10
je 0x6a61b
cmpl $0x1001, %r9d           # imm = 0x1001
jae 0x6af14
movl $0x1000, %eax           # imm = 0x1000
subl %r9d, %eax
cmpl %r10d, %eax
jb 0x6af33
movq %r8, %rax
shlq $0x4, %rax
leaq (%rsp,%rax), %r11
addq $0xf60, %r11            # imm = 0xF60
movl $0x1000, %eax           # imm = 0x1000
subl %r10d, %eax
movl %r10d, %ecx
shll $0x13, %ecx
decl %ecx
movl %ecx, (%r11)
movw %ax, 0xc(%r11)
cmpq $0x1, %r10
jne 0x6a5d1
movl $0xffffffff, 0x4(%r11)  # imm = 0xFFFFFFFF
movw $0x0, 0xe(%r11)
leal 0xfff(%r9), %eax
jmp 0x6a60b
movl $0x1e, %esi
leal -0x1e(%rsi), %ecx
movl $0x1, %eax
shll %cl, %eax
incl %esi
cmpl %r10d, %eax
jb 0x6a5d6
movl $0x1, %eax
movl %esi, %ecx
shlq %cl, %rax
addq %r10, %rax
decq %rax
xorl %edx, %edx
divq %r10
movl %eax, 0x4(%r11)
addl $-0x20, %esi
movw %si, 0xe(%r11)
movl %r9d, %eax
movl %eax, 0x8(%r11)
addw $0x20, 0xe(%r11)
addl %r9d, %r10d
movl %r10d, %r9d
incq %r8
cmpq $0x100, %r8             # imm = 0x100
jne 0x6a55a
xorl %eax, %eax
movl $0x8000, 0xb40(%rsp,%rax,4) # imm = 0x8000
incq %rax
cmpq $0x20, %rax
jne 0x6a62d
movq %r15, %rsi
testb $0x1f, 0x20(%rsp)
je 0x6a6db
movq 0x20(%rsp), %rdx
movl %edx, %eax
andl $0x1f, %eax
decq %rax
andl $-0x20, %edx
movq %r15, %rsi
leal (%rdx,%rax), %ecx
movzbl (%r12,%rcx), %r8d
shll $0x4, %r8d
movl 0xb40(%rsp,%rax,4), %r9d
xorl %ecx, %ecx
cmpl 0xf60(%rsp,%r8), %r9d
seta %cl
leal (%rcx,%rcx), %r10d
movw %r9w, -0x2(%rsi)
shll $0x4, %ecx
shrl %cl, %r9d
movl 0xf64(%rsp,%r8), %r11d
imulq %r9, %r11
movb 0xf6e(%rsp,%r8), %cl
shrq %cl, %r11
subq %r10, %rsi
addl 0xf68(%rsp,%r8), %r9d
movzwl 0xf6c(%rsp,%r8), %ecx
imull %r11d, %ecx
addl %r9d, %ecx
movl %ecx, 0xb40(%rsp,%rax,4)
leaq -0x1(%rax), %rcx
incq %rax
cmpq $0x1, %rax
movq %rcx, %rax
jg 0x6a662
vmovdqa 0xb40(%rsp), %ymm5
vmovdqa 0xb60(%rsp), %ymm2
vmovdqa 0xb80(%rsp), %ymm3
vmovdqa 0xba0(%rsp), %ymm4
movq 0x20(%rsp), %rax
andl $-0x20, %eax
jle 0x6aeb2
movl %eax, %ecx
leaq (%rcx,%r12), %rax
addq $-0x19, %rax
leaq 0x345a2(%rip), %r8      # 0x9ecc0
vpbroadcastd 0x34579(%rip), %ymm1 # 0x9eca0
vmovdqa %ymm1, 0xc0(%rsp)
vpxor %xmm15, %xmm15, %xmm15
leaq -0x20(%rcx), %r9
movq $-0x4, %r10
leaq 0x360(%rsp), %r11
movzbl 0x1(%rax,%r10,2), %r14d
shll $0x4, %r14d
movzbl 0x5(%rax,%r10,2), %r12d
shll $0x4, %r12d
movzbl 0x2(%rax,%r10,2), %r13d
shll $0x4, %r13d
movzbl 0x6(%rax,%r10,2), %edx
shll $0x4, %edx
vmovaps 0xf60(%rsp,%r14), %xmm1
vmovaps 0xf60(%rsp,%r12), %xmm6
vpermilps $0x93, 0xf60(%rsp,%r13), %xmm7 # xmm7 = mem[3,0,1,2]
vpermilps $0x93, 0xf60(%rsp,%rdx), %xmm8 # xmm8 = mem[3,0,1,2]
vmovaps %xmm6, -0x50(%r11)
vmovaps %xmm1, -0x60(%r11)
vmovaps %xmm8, -0x30(%r11)
vmovaps %xmm7, -0x40(%r11)
movzbl 0x3(%rax,%r10,2), %edx
shll $0x4, %edx
movzbl 0x7(%rax,%r10,2), %r14d
shll $0x4, %r14d
movzbl 0x4(%rax,%r10,2), %r12d
shll $0x4, %r12d
movzbl 0x8(%rax,%r10,2), %r13d
shll $0x4, %r13d
vpshufd $0x4e, 0xf60(%rsp,%rdx), %xmm1 # xmm1 = mem[2,3,0,1]
vpshufd $0x4e, 0xf60(%rsp,%r14), %xmm6 # xmm6 = mem[2,3,0,1]
vpshufd $0x39, 0xf60(%rsp,%r12), %xmm7 # xmm7 = mem[1,2,3,0]
vpshufd $0x39, 0xf60(%rsp,%r13), %xmm8 # xmm8 = mem[1,2,3,0]
vmovdqa %xmm6, -0x10(%r11)
vmovdqa %xmm1, -0x20(%r11)
vmovdqa %xmm8, 0x10(%r11)
vmovdqa %xmm7, (%r11)
addq $0x4, %r10
subq $-0x80, %r11
cmpq $0xc, %r10
jb 0x6a748
vpblendd $0x11, 0x300(%rsp), %ymm15, %ymm1 # ymm1 = mem[0],ymm15[1,2,3],mem[4],ymm15[5,6,7]
vpblendd $0x22, 0x320(%rsp), %ymm15, %ymm6 # ymm6 = ymm15[0],mem[1],ymm15[2,3,4],mem[5],ymm15[6,7]
vpor %ymm1, %ymm6, %ymm1
vpblendd $0x44, 0x340(%rsp), %ymm15, %ymm6 # ymm6 = ymm15[0,1],mem[2],ymm15[3,4,5],mem[6],ymm15[7]
vpor %ymm6, %ymm1, %ymm1
vpblendd $0x88, 0x360(%rsp), %ymm1, %ymm1 # ymm1 = ymm1[0,1,2],mem[3],ymm1[4,5,6],mem[7]
vpblendd $0x11, 0x380(%rsp), %ymm15, %ymm6 # ymm6 = mem[0],ymm15[1,2,3],mem[4],ymm15[5,6,7]
vpblendd $0x22, 0x3a0(%rsp), %ymm15, %ymm7 # ymm7 = ymm15[0],mem[1],ymm15[2,3,4],mem[5],ymm15[6,7]
vpblendd $0x44, 0x3c0(%rsp), %ymm15, %ymm8 # ymm8 = ymm15[0,1],mem[2],ymm15[3,4,5],mem[6],ymm15[7]
vpor %ymm6, %ymm7, %ymm6
vpor %ymm6, %ymm8, %ymm6
vpblendd $0x88, 0x3e0(%rsp), %ymm6, %ymm6 # ymm6 = ymm6[0,1,2],mem[3],ymm6[4,5,6],mem[7]
vpblendd $0x11, 0x400(%rsp), %ymm15, %ymm7 # ymm7 = mem[0],ymm15[1,2,3],mem[4],ymm15[5,6,7]
vpblendd $0x22, 0x420(%rsp), %ymm15, %ymm8 # ymm8 = ymm15[0],mem[1],ymm15[2,3,4],mem[5],ymm15[6,7]
vpor %ymm7, %ymm8, %ymm7
vpblendd $0x44, 0x440(%rsp), %ymm15, %ymm8 # ymm8 = ymm15[0,1],mem[2],ymm15[3,4,5],mem[6],ymm15[7]
vpor %ymm7, %ymm8, %ymm7
vpblendd $0x88, 0x460(%rsp), %ymm7, %ymm7 # ymm7 = ymm7[0,1,2],mem[3],ymm7[4,5,6],mem[7]
vpblendd $0x11, 0x480(%rsp), %ymm15, %ymm8 # ymm8 = mem[0],ymm15[1,2,3],mem[4],ymm15[5,6,7]
vpblendd $0x22, 0x4a0(%rsp), %ymm15, %ymm9 # ymm9 = ymm15[0],mem[1],ymm15[2,3,4],mem[5],ymm15[6,7]
vpblendd $0x44, 0x4c0(%rsp), %ymm15, %ymm10 # ymm10 = ymm15[0,1],mem[2],ymm15[3,4,5],mem[6],ymm15[7]
vpor %ymm8, %ymm9, %ymm8
vpor %ymm10, %ymm8, %ymm8
vpblendd $0x88, 0x4e0(%rsp), %ymm8, %ymm8 # ymm8 = ymm8[0,1,2],mem[3],ymm8[4,5,6],mem[7]
vpcmpgtd %ymm1, %ymm5, %ymm9
vmovmskps %ymm9, %r10d
vpcmpgtd %ymm6, %ymm2, %ymm6
vmovmskps %ymm6, %r12d
vpcmpgtd %ymm7, %ymm3, %ymm7
vmovmskps %ymm7, %r14d
vpcmpgtd %ymm8, %ymm4, %ymm8
vmovmskps %ymm8, %r11d
movl %r10d, %edx
shll $0x5, %edx
vmovdqa (%rdx,%r8), %ymm1
popcntl %r12d, %r13d
movl %r12d, %edx
shll $0x5, %edx
vmovdqa (%rdx,%r8), %ymm10
popcntl %r14d, %edx
shll $0x5, %r14d
vmovdqa (%r14,%r8), %ymm11
popcntl %r11d, %r14d
shll $0x5, %r11d
vmovdqa (%r11,%r8), %ymm12
vpand %ymm5, %ymm9, %ymm13
vpermd %ymm13, %ymm1, %ymm1
vpand %ymm2, %ymm6, %ymm13
vpermd %ymm13, %ymm10, %ymm10
vpand %ymm3, %ymm7, %ymm13
vpermd %ymm13, %ymm11, %ymm11
vpand %ymm4, %ymm8, %ymm13
vpermd %ymm13, %ymm12, %ymm12
vpblendw $0xaa, %ymm15, %ymm1, %ymm1 # ymm1 = ymm1[0],ymm15[1],ymm1[2],ymm15[3],ymm1[4],ymm15[5],ymm1[6],ymm15[7],ymm1[8],ymm15[9],ymm1[10],ymm15[11],ymm1[12],ymm15[13],ymm1[14],ymm15[15]
vpblendw $0xaa, %ymm15, %ymm10, %ymm10 # ymm10 = ymm10[0],ymm15[1],ymm10[2],ymm15[3],ymm10[4],ymm15[5],ymm10[6],ymm15[7],ymm10[8],ymm15[9],ymm10[10],ymm15[11],ymm10[12],ymm15[13],ymm10[14],ymm15[15]
vpackusdw %ymm10, %ymm1, %ymm1
vpblendw $0xaa, %ymm15, %ymm11, %ymm10 # ymm10 = ymm11[0],ymm15[1],ymm11[2],ymm15[3],ymm11[4],ymm15[5],ymm11[6],ymm15[7],ymm11[8],ymm15[9],ymm11[10],ymm15[11],ymm11[12],ymm15[13],ymm11[14],ymm15[15]
vpblendw $0xaa, %ymm15, %ymm12, %ymm11 # ymm11 = ymm12[0],ymm15[1],ymm12[2],ymm15[3],ymm12[4],ymm15[5],ymm12[6],ymm15[7],ymm12[8],ymm15[9],ymm12[10],ymm15[11],ymm12[12],ymm15[13],ymm12[14],ymm15[15]
vpackusdw %ymm11, %ymm10, %ymm10
vpermq $0xd8, %ymm10, %ymm10   # ymm10 = ymm10[0,2,1,3]
vextracti128 $0x1, %ymm10, -0x10(%rsi)
addl %r14d, %r14d
subq %r14, %rsi
vmovdqu %xmm10, -0x10(%rsi)
addl %edx, %edx
subq %rdx, %rsi
vpermq $0xd8, %ymm1, %ymm1     # ymm1 = ymm1[0,2,1,3]
vextracti128 $0x1, %ymm1, -0x10(%rsi)
addl %r13d, %r13d
subq %r13, %rsi
vpsrld $0x10, %ymm5, %ymm10
vblendvps %ymm9, %ymm10, %ymm5, %ymm0
vmovdqu %xmm1, -0x10(%rsi)
vpsrld $0x10, %ymm2, %ymm1
vblendvps %ymm6, %ymm1, %ymm2, %ymm9
vpsrld $0x10, %ymm3, %ymm1
vblendvps %ymm7, %ymm1, %ymm3, %ymm10
vpsrld $0x10, %ymm4, %ymm1
vblendvps %ymm8, %ymm1, %ymm4, %ymm11
vmovdqa 0x300(%rsp), %ymm2
vmovdqa %ymm2, 0x80(%rsp)
vmovdqa 0x340(%rsp), %ymm1
vmovdqa %ymm1, 0x20(%rsp)
vpshufd $0xff, %ymm1, %ymm1     # ymm1 = ymm1[3,3,3,3,7,7,7,7]
vpblendd $0x44, %ymm1, %ymm15, %ymm1 # ymm1 = ymm15[0,1],ymm1[2],ymm15[3,4,5],ymm1[6],ymm15[7]
vpshufd $0x55, %ymm2, %ymm2     # ymm2 = ymm2[1,1,1,1,5,5,5,5]
vpblendd $0x11, %ymm2, %ymm15, %ymm2 # ymm2 = ymm2[0],ymm15[1,2,3],ymm2[4],ymm15[5,6,7]
vpor %ymm1, %ymm2, %ymm1
vmovdqa 0x380(%rsp), %ymm3
vmovdqa %ymm3, 0x260(%rsp)
vmovdqa 0x3c0(%rsp), %ymm2
vmovdqa %ymm2, 0xa0(%rsp)
vpshufd $0xff, %ymm2, %ymm2     # ymm2 = ymm2[3,3,3,3,7,7,7,7]
vpblendd $0x44, %ymm2, %ymm15, %ymm2 # ymm2 = ymm15[0,1],ymm2[2],ymm15[3,4,5],ymm2[6],ymm15[7]
vpshufd $0x55, %ymm3, %ymm3     # ymm3 = ymm3[1,1,1,1,5,5,5,5]
vpblendd $0x11, %ymm3, %ymm15, %ymm3 # ymm3 = ymm3[0],ymm15[1,2,3],ymm3[4],ymm15[5,6,7]
vpor %ymm2, %ymm3, %ymm2
vmovdqa 0x400(%rsp), %ymm4
vmovdqa %ymm4, 0x240(%rsp)
vmovdqa 0x440(%rsp), %ymm3
vmovdqa %ymm3, 0x60(%rsp)
vpshufd $0xff, %ymm3, %ymm3     # ymm3 = ymm3[3,3,3,3,7,7,7,7]
vpblendd $0x44, %ymm3, %ymm15, %ymm3 # ymm3 = ymm15[0,1],ymm3[2],ymm15[3,4,5],ymm3[6],ymm15[7]
vpshufd $0x55, %ymm4, %ymm4     # ymm4 = ymm4[1,1,1,1,5,5,5,5]
vpblendd $0x11, %ymm4, %ymm15, %ymm4 # ymm4 = ymm4[0],ymm15[1,2,3],ymm4[4],ymm15[5,6,7]
vpor %ymm3, %ymm4, %ymm7
vmovdqa 0x480(%rsp), %ymm14
vmovdqa 0x4c0(%rsp), %ymm3
vmovdqa %ymm3, 0x40(%rsp)
vpshufd $0xff, %ymm3, %ymm3     # ymm3 = ymm3[3,3,3,3,7,7,7,7]
vpblendd $0x44, %ymm3, %ymm15, %ymm3 # ymm3 = ymm15[0,1],ymm3[2],ymm15[3,4,5],ymm3[6],ymm15[7]
vpshufd $0x55, %ymm14, %ymm4    # ymm4 = ymm14[1,1,1,1,5,5,5,5]
vmovdqa %ymm14, 0x1e0(%rsp)
vpblendd $0x11, %ymm4, %ymm15, %ymm4 # ymm4 = ymm4[0],ymm15[1,2,3],ymm4[4],ymm15[5,6,7]
vpor %ymm3, %ymm4, %ymm8
vmovdqa 0x320(%rsp), %ymm12
vmovdqa 0x360(%rsp), %ymm13
vpalignr $0x4, %ymm12, %ymm13, %ymm3 # ymm3 = ymm12[4,5,6,7,8,9,10,11,12,13,14,15],ymm13[0,1,2,3],ymm12[20,21,22,23,24,25,26,27,28,29,30,31],ymm13[16,17,18,19]
vmovdqa %ymm12, 0x1a0(%rsp)
vmovdqa %ymm13, 0x1c0(%rsp)
vpsrlq $0x20, %ymm3, %ymm3
vmovaps %ymm0, 0x2e0(%rsp)
vpsrlq $0x20, %ymm0, %ymm4
vpmuludq %ymm4, %ymm3, %ymm3
vpmuludq %ymm0, %ymm1, %ymm1
vpsrlq $0x20, %ymm1, %ymm1
vpblendd $0xaa, %ymm3, %ymm1, %ymm0 # ymm0 = ymm1[0],ymm3[1],ymm1[2],ymm3[3],ymm1[4],ymm3[5],ymm1[6],ymm3[7]
vmovdqa %ymm0, 0x220(%rsp)
vmovdqa 0x3a0(%rsp), %ymm4
vmovdqa 0x3e0(%rsp), %ymm6
vpalignr $0x4, %ymm4, %ymm6, %ymm1 # ymm1 = ymm4[4,5,6,7,8,9,10,11,12,13,14,15],ymm6[0,1,2,3],ymm4[20,21,22,23,24,25,26,27,28,29,30,31],ymm6[16,17,18,19]
vmovdqa %ymm4, 0x160(%rsp)
vpsrlq $0x20, %ymm1, %ymm1
vmovaps %ymm9, 0x2c0(%rsp)
vpsrlq $0x20, %ymm9, %ymm3
vpmuludq %ymm3, %ymm1, %ymm1
vpmuludq %ymm2, %ymm9, %ymm2
vpsrlq $0x20, %ymm2, %ymm2
vpblendd $0xaa, %ymm1, %ymm2, %ymm0 # ymm0 = ymm2[0],ymm1[1],ymm2[2],ymm1[3],ymm2[4],ymm1[5],ymm2[6],ymm1[7]
vmovdqa %ymm0, 0x200(%rsp)
vmovdqa 0x420(%rsp), %ymm0
vmovdqa 0x460(%rsp), %ymm5
vpalignr $0x4, %ymm0, %ymm5, %ymm1 # ymm1 = ymm0[4,5,6,7,8,9,10,11,12,13,14,15],ymm5[0,1,2,3],ymm0[20,21,22,23,24,25,26,27,28,29,30,31],ymm5[16,17,18,19]
vmovdqa %ymm0, 0x120(%rsp)
vmovdqa %ymm5, 0x180(%rsp)
vpsrlq $0x20, %ymm1, %ymm1
vmovaps %ymm10, 0x2a0(%rsp)
vpsrlq $0x20, %ymm10, %ymm2
vpmuludq %ymm2, %ymm1, %ymm1
vpmuludq %ymm7, %ymm10, %ymm2
vpsrlq $0x20, %ymm2, %ymm2
vpblendd $0xaa, %ymm1, %ymm2, %ymm1 # ymm1 = ymm2[0],ymm1[1],ymm2[2],ymm1[3],ymm2[4],ymm1[5],ymm2[6],ymm1[7]
vmovdqa %ymm1, 0x100(%rsp)
vmovdqa 0x4a0(%rsp), %ymm2
vmovdqa 0x4e0(%rsp), %ymm3
vpalignr $0x4, %ymm2, %ymm3, %ymm7 # ymm7 = ymm2[4,5,6,7,8,9,10,11,12,13,14,15],ymm3[0,1,2,3],ymm2[20,21,22,23,24,25,26,27,28,29,30,31],ymm3[16,17,18,19]
vmovdqa %ymm3, 0x140(%rsp)
vpsrlq $0x20, %ymm7, %ymm7
vmovaps %ymm11, 0x280(%rsp)
vpsrlq $0x20, %ymm11, %ymm10
vpmuludq %ymm7, %ymm10, %ymm7
vpmuludq %ymm11, %ymm8, %ymm8
vpsrlq $0x20, %ymm8, %ymm8
vpblendd $0xaa, %ymm7, %ymm8, %ymm1 # ymm1 = ymm8[0],ymm7[1],ymm8[2],ymm7[3],ymm8[4],ymm7[5],ymm8[6],ymm7[7]
vmovdqa %ymm1, 0xe0(%rsp)
vmovdqa 0x80(%rsp), %ymm1
vpsrldq $0xc, %ymm1, %ymm8      # ymm8 = ymm1[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm1[28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
vpsllq $0x20, %ymm12, %ymm10
vpor %ymm8, %ymm10, %ymm8
vpshufd $0x55, 0x20(%rsp), %ymm10 # ymm10 = mem[1,1,1,1,5,5,5,5]
vpblendd $0x44, %ymm10, %ymm8, %ymm8 # ymm8 = ymm8[0,1],ymm10[2],ymm8[3,4,5],ymm10[6],ymm8[7]
vpshufd $0xaa, %ymm13, %ymm10   # ymm10 = ymm13[2,2,2,2,6,6,6,6]
vpblendd $0x88, %ymm10, %ymm8, %ymm8 # ymm8 = ymm8[0,1,2],ymm10[3],ymm8[4,5,6],ymm10[7]
vmovdqa 0x260(%rsp), %ymm1
vpsrldq $0xc, %ymm1, %ymm10     # ymm10 = ymm1[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm1[28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
vpsllq $0x20, %ymm4, %ymm9
vpor %ymm10, %ymm9, %ymm9
vpshufd $0x55, 0xa0(%rsp), %ymm10 # ymm10 = mem[1,1,1,1,5,5,5,5]
vpblendd $0x44, %ymm10, %ymm9, %ymm9 # ymm9 = ymm9[0,1],ymm10[2],ymm9[3,4,5],ymm10[6],ymm9[7]
vpshufd $0xaa, %ymm6, %ymm10    # ymm10 = ymm6[2,2,2,2,6,6,6,6]
vpblendd $0x88, %ymm10, %ymm9, %ymm9 # ymm9 = ymm9[0,1,2],ymm10[3],ymm9[4,5,6],ymm10[7]
vmovdqa 0x240(%rsp), %ymm4
vpsrldq $0xc, %ymm4, %ymm10     # ymm10 = ymm4[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm4[28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
vpsllq $0x20, %ymm0, %ymm11
vpor %ymm10, %ymm11, %ymm10
vpshufd $0x55, 0x60(%rsp), %ymm11 # ymm11 = mem[1,1,1,1,5,5,5,5]
vpblendd $0x44, %ymm11, %ymm10, %ymm10 # ymm10 = ymm10[0,1],ymm11[2],ymm10[3,4,5],ymm11[6],ymm10[7]
vpshufd $0xaa, %ymm5, %ymm11    # ymm11 = ymm5[2,2,2,2,6,6,6,6]
vpblendd $0x88, %ymm11, %ymm10, %ymm10 # ymm10 = ymm10[0,1,2],ymm11[3],ymm10[4,5,6],ymm11[7]
vpsrldq $0xc, %ymm14, %ymm11    # ymm11 = ymm14[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm14[28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
vpsllq $0x20, %ymm2, %ymm12
vpor %ymm11, %ymm12, %ymm11
vpshufd $0x55, 0x40(%rsp), %ymm12 # ymm12 = mem[1,1,1,1,5,5,5,5]
vpblendd $0x44, %ymm12, %ymm11, %ymm11 # ymm11 = ymm11[0,1],ymm12[2],ymm11[3,4,5],ymm12[6],ymm11[7]
vpshufd $0xaa, %ymm3, %ymm12    # ymm12 = ymm3[2,2,2,2,6,6,6,6]
vpblendd $0x88, %ymm12, %ymm11, %ymm11 # ymm11 = ymm11[0,1,2],ymm12[3],ymm11[4,5,6],ymm12[7]
vpsrld $0x10, %ymm8, %ymm12
vmovdqa 0xc0(%rsp), %ymm0
vpaddd %ymm0, %ymm12, %ymm12
vmovdqa 0x220(%rsp), %ymm3
vpsrlvd %ymm12, %ymm3, %ymm12
vpsrld $0x10, %ymm9, %ymm13
vpaddd %ymm0, %ymm13, %ymm13
vmovdqa 0x200(%rsp), %ymm3
vpsrlvd %ymm13, %ymm3, %ymm13
vpsrld $0x10, %ymm10, %ymm7
vpaddd %ymm0, %ymm7, %ymm7
vmovdqa 0x100(%rsp), %ymm3
vpsrlvd %ymm7, %ymm3, %ymm7
vpsrld $0x10, %ymm11, %ymm14
vpaddd %ymm0, %ymm14, %ymm14
vmovdqa 0xe0(%rsp), %ymm0
vpsrlvd %ymm14, %ymm0, %ymm14
vpblendw $0xaa, %ymm15, %ymm8, %ymm8 # ymm8 = ymm8[0],ymm15[1],ymm8[2],ymm15[3],ymm8[4],ymm15[5],ymm8[6],ymm15[7],ymm8[8],ymm15[9],ymm8[10],ymm15[11],ymm8[12],ymm15[13],ymm8[14],ymm15[15]
vpmulld %ymm8, %ymm12, %ymm12
vpblendw $0xaa, %ymm15, %ymm9, %ymm8 # ymm8 = ymm9[0],ymm15[1],ymm9[2],ymm15[3],ymm9[4],ymm15[5],ymm9[6],ymm15[7],ymm9[8],ymm15[9],ymm9[10],ymm15[11],ymm9[12],ymm15[13],ymm9[14],ymm15[15]
vpmulld %ymm8, %ymm13, %ymm8
vpblendw $0xaa, %ymm15, %ymm10, %ymm9 # ymm9 = ymm10[0],ymm15[1],ymm10[2],ymm15[3],ymm10[4],ymm15[5],ymm10[6],ymm15[7],ymm10[8],ymm15[9],ymm10[10],ymm15[11],ymm10[12],ymm15[13],ymm10[14],ymm15[15]
vpmulld %ymm9, %ymm7, %ymm9
vpblendw $0xaa, %ymm15, %ymm11, %ymm7 # ymm7 = ymm11[0],ymm15[1],ymm11[2],ymm15[3],ymm11[4],ymm15[5],ymm11[6],ymm15[7],ymm11[8],ymm15[9],ymm11[10],ymm15[11],ymm11[12],ymm15[13],ymm11[14],ymm15[15]
vpmulld %ymm14, %ymm7, %ymm10
vmovdqa 0x80(%rsp), %ymm0
vpunpckhdq %ymm15, %ymm0, %ymm7 # ymm7 = ymm0[2],ymm15[2],ymm0[3],ymm15[3],ymm0[6],ymm15[6],ymm0[7],ymm15[7]
vpshufd $0xee, 0x1a0(%rsp), %ymm11 # ymm11 = mem[2,3,2,3,6,7,6,7]
vpblendd $0x22, %ymm11, %ymm15, %ymm11 # ymm11 = ymm15[0],ymm11[1],ymm15[2,3,4],ymm11[5],ymm15[6,7]
vpor %ymm7, %ymm11, %ymm7
vpunpcklqdq 0x20(%rsp), %ymm7, %ymm7 # ymm7 = ymm7[0],mem[0],ymm7[2],mem[2]
vpshufd $0x44, 0x1c0(%rsp), %ymm11 # ymm11 = mem[0,1,0,1,4,5,4,5]
vpblendd $0x88, %ymm11, %ymm7, %ymm7 # ymm7 = ymm7[0,1,2],ymm11[3],ymm7[4,5,6],ymm11[7]
vpunpckhdq %ymm15, %ymm1, %ymm11 # ymm11 = ymm1[2],ymm15[2],ymm1[3],ymm15[3],ymm1[6],ymm15[6],ymm1[7],ymm15[7]
vpshufd $0xee, 0x160(%rsp), %ymm5 # ymm5 = mem[2,3,2,3,6,7,6,7]
vpblendd $0x22, %ymm5, %ymm15, %ymm5 # ymm5 = ymm15[0],ymm5[1],ymm15[2,3,4],ymm5[5],ymm15[6,7]
vpor %ymm5, %ymm11, %ymm5
vpunpcklqdq 0xa0(%rsp), %ymm5, %ymm5 # ymm5 = ymm5[0],mem[0],ymm5[2],mem[2]
vpshufd $0x44, %ymm6, %ymm6     # ymm6 = ymm6[0,1,0,1,4,5,4,5]
vpblendd $0x88, %ymm6, %ymm5, %ymm6 # ymm6 = ymm5[0,1,2],ymm6[3],ymm5[4,5,6],ymm6[7]
vpunpckhdq %ymm15, %ymm4, %ymm5 # ymm5 = ymm4[2],ymm15[2],ymm4[3],ymm15[3],ymm4[6],ymm15[6],ymm4[7],ymm15[7]
vpshufd $0xee, 0x120(%rsp), %ymm3 # ymm3 = mem[2,3,2,3,6,7,6,7]
vpblendd $0x22, %ymm3, %ymm15, %ymm3 # ymm3 = ymm15[0],ymm3[1],ymm15[2,3,4],ymm3[5],ymm15[6,7]
vpor %ymm5, %ymm3, %ymm3
vpunpcklqdq 0x60(%rsp), %ymm3, %ymm3 # ymm3 = ymm3[0],mem[0],ymm3[2],mem[2]
vpshufd $0x44, 0x180(%rsp), %ymm4 # ymm4 = mem[0,1,0,1,4,5,4,5]
vpblendd $0x88, %ymm4, %ymm3, %ymm3 # ymm3 = ymm3[0,1,2],ymm4[3],ymm3[4,5,6],ymm4[7]
vmovdqa 0x1e0(%rsp), %ymm0
vpunpckhdq %ymm15, %ymm0, %ymm4 # ymm4 = ymm0[2],ymm15[2],ymm0[3],ymm15[3],ymm0[6],ymm15[6],ymm0[7],ymm15[7]
vpshufd $0xee, %ymm2, %ymm1     # ymm1 = ymm2[2,3,2,3,6,7,6,7]
vpblendd $0x22, %ymm1, %ymm15, %ymm1 # ymm1 = ymm15[0],ymm1[1],ymm15[2,3,4],ymm1[5],ymm15[6,7]
vpor %ymm4, %ymm1, %ymm1
vpunpcklqdq 0x40(%rsp), %ymm1, %ymm1 # ymm1 = ymm1[0],mem[0],ymm1[2],mem[2]
vpshufd $0x44, 0x140(%rsp), %ymm2 # ymm2 = mem[0,1,0,1,4,5,4,5]
vpblendd $0x88, %ymm2, %ymm1, %ymm1 # ymm1 = ymm1[0,1,2],ymm2[3],ymm1[4,5,6],ymm2[7]
vpaddd 0x2e0(%rsp), %ymm7, %ymm2
vpaddd %ymm2, %ymm12, %ymm5
vpaddd 0x2c0(%rsp), %ymm6, %ymm2
vpaddd %ymm2, %ymm8, %ymm2
vpaddd 0x2a0(%rsp), %ymm3, %ymm3
vpaddd %ymm3, %ymm9, %ymm3
vpaddd 0x280(%rsp), %ymm1, %ymm1
vpaddd %ymm1, %ymm10, %ymm4
popcntl %r10d, %edx
addl %edx, %edx
subq %rdx, %rsi
addq $-0x20, %rax
cmpq $0x20, %rcx
movq %r9, %rcx
jg 0x6a735
vmovdqa %ymm5, 0xb40(%rsp)
vmovdqa %ymm2, 0xb60(%rsp)
vmovdqa %ymm3, 0xb80(%rsp)
vmovdqa %ymm4, 0xba0(%rsp)
xorl %eax, %eax
movl 0xbbc(%rsp,%rax), %ecx
movl %ecx, -0x4(%rsi,%rax)
addq $-0x4, %rax
cmpq $-0x80, %rax
jne 0x6aed8
addq %rax, %rsi
subq %rsi, %r15
movslq %edi, %rdi
leal (%rdi,%r15), %eax
movq 0x18(%rsp), %rcx
movl %eax, (%rcx)
addq %rbx, %rdi
movq %r15, %rdx
vzeroupper
callq 0x4830
jmp 0x69ecf
leaq 0x33cfb(%rip), %rdi     # 0x9ec16
leaq 0x33c8e(%rip), %rsi     # 0x9ebb0
leaq 0x33ca7(%rip), %rcx     # 0x9ebd0
movl $0xcc, %edx
callq 0x42f0
leaq 0x33cf8(%rip), %rdi     # 0x9ec32
leaq 0x33c6f(%rip), %rsi     # 0x9ebb0
leaq 0x33c88(%rip), %rcx     # 0x9ebd0
movl $0xcd, %edx
callq 0x42f0