// File: /workspace/github_cpp_makefile_star2_O1/CMU-SAFARI[P]MQSim/src/ssd/GC_and_WL_Unit_Base.cpp
// Function: SSD_Components::GC_and_WL_Unit_Base::GC_and_WL_Unit_Base(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, SSD_Components::Address_Mapping_Unit_Base*, SSD_Components::Flash_Block_Manager_Base*, SSD_Components::TSU_Base*, SSD_Components::NVM_PHY_ONFI*, SSD_Components::GC_Block_Selection_Policy_Type, double, bool, double, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, bool, double, unsigned int, bool, bool, unsigned int, int)
GC_and_WL_Unit_Base::GC_and_WL_Unit_Base(const sim_object_id_type& id,
		Address_Mapping_Unit_Base* address_mapping_unit, Flash_Block_Manager_Base* block_manager, TSU_Base* tsu, NVM_PHY_ONFI* flash_controller,
		GC_Block_Selection_Policy_Type block_selection_policy, double gc_threshold, bool preemptible_gc_enabled, double gc_hard_threshold,
		unsigned int channel_count, unsigned int chip_no_per_channel, unsigned int die_no_per_chip, unsigned int plane_no_per_die,
		unsigned int block_no_per_plane, unsigned int page_no_per_block, unsigned int sector_no_per_page, 
		bool use_copyback, double rho, unsigned int max_ongoing_gc_reqs_per_plane, bool dynamic_wearleveling_enabled, bool static_wearleveling_enabled, unsigned int static_wearleveling_threshold, int seed) :
		Sim_Object(id), address_mapping_unit(address_mapping_unit), block_manager(block_manager), tsu(tsu), flash_controller(flash_controller), force_gc(false),
		block_selection_policy(block_selection_policy), gc_threshold(gc_threshold),	use_copyback(use_copyback), 
		preemptible_gc_enabled(preemptible_gc_enabled), gc_hard_threshold(gc_hard_threshold),
		random_generator(seed), max_ongoing_gc_reqs_per_plane(max_ongoing_gc_reqs_per_plane),
		channel_count(channel_count), chip_no_per_channel(chip_no_per_channel), die_no_per_chip(die_no_per_chip), plane_no_per_die(plane_no_per_die),
		block_no_per_plane(block_no_per_plane), pages_no_per_block(page_no_per_block), sector_no_per_page(sector_no_per_page),
		dynamic_wearleveling_enabled(dynamic_wearleveling_enabled), static_wearleveling_enabled(static_wearleveling_enabled), static_wearleveling_threshold(static_wearleveling_threshold)
	{
		_my_instance = this;
		block_pool_gc_threshold = (unsigned int)(gc_threshold * (double)block_no_per_plane);
		if (block_pool_gc_threshold < 1) {
			block_pool_gc_threshold = 1;
		}
		block_pool_gc_hard_threshold = (unsigned int)(gc_hard_threshold * (double)block_no_per_plane);
		if (block_pool_gc_hard_threshold < 1) {
			block_pool_gc_hard_threshold = 1;
		}
		random_pp_threshold = (unsigned int)(rho * pages_no_per_block);
		if (block_pool_gc_threshold < max_ongoing_gc_reqs_per_plane) {
			block_pool_gc_threshold = max_ongoing_gc_reqs_per_plane;
		}
	}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movsd %xmm2, 0x10(%rsp)
movsd %xmm1, 0x8(%rsp)
movsd %xmm0, (%rsp)
movq %r9, %r14
movq %r8, %r15
movq %rcx, %r12
movq %rdx, %r13
movq %rdi, %rbx
movl 0x50(%rsp), %ebp
callq 0x165ce
leaq 0x2edd2(%rip), %rax     # 0x6e500
movq %rax, (%rbx)
movl %ebp, 0x2c(%rbx)
movl 0xa0(%rsp), %ebp
movq %r13, 0x30(%rbx)
movq %r12, 0x38(%rbx)
movq %r15, 0x40(%rbx)
movq %r14, 0x48(%rbx)
movb $0x0, 0x50(%rbx)
movsd (%rsp), %xmm0
movsd %xmm0, 0x58(%rbx)
movb 0x98(%rsp), %al
movb %al, 0x64(%rbx)
movb 0xa8(%rsp), %al
movb %al, 0x65(%rbx)
movb 0xb0(%rsp), %al
movb %al, 0x66(%rbx)
movl 0xb8(%rsp), %eax
movl %eax, 0x68(%rbx)
movb 0x58(%rsp), %al
movb %al, 0x6c(%rbx)
movsd 0x8(%rsp), %xmm0
movsd %xmm0, 0x70(%rbx)
movl %ebp, 0x7c(%rbx)
leaq 0x88(%rbx), %rdi
movl 0xc0(%rsp), %esi
callq 0x53b58
leaq 0xa0(%rbx), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 0xe0(%rbx)
movups %xmm0, 0xd0(%rbx)
movups %xmm0, 0xc0(%rbx)
movups %xmm0, 0xb0(%rbx)
movups %xmm0, 0xa0(%rbx)
xorl %esi, %esi
callq 0x404b2
movl 0x90(%rsp), %ecx
movl 0x88(%rsp), %eax
movl 0x80(%rsp), %edx
movl 0x78(%rsp), %esi
movl 0x70(%rsp), %edi
movl 0x68(%rsp), %r8d
movl 0x60(%rsp), %r9d
movl %r9d, 0xf4(%rbx)
movl %r8d, 0xf8(%rbx)
movl %edi, 0xfc(%rbx)
movl %esi, 0x100(%rbx)
movl %edx, 0x104(%rbx)
movl %eax, 0x108(%rbx)
movl %ecx, 0x10c(%rbx)
movl %edx, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %rcx, %xmm0
movq %rbx, 0x2fe07(%rip)     # 0x6f648
movsd (%rsp), %xmm1
mulsd %xmm0, %xmm1
cvttsd2si %xmm1, %rcx
cmpl $0x2, %ecx
movl $0x1, %edx
cmovbl %edx, %ecx
movl %ecx, 0x60(%rbx)
movsd 0x8(%rsp), %xmm1
mulsd %xmm0, %xmm1
cvttsd2si %xmm1, %rsi
cmpl $0x2, %esi
cmovael %esi, %edx
movl %edx, 0x78(%rbx)
movl %eax, %eax
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
mulsd 0x10(%rsp), %xmm0
cvttsd2si %xmm0, %rax
movl %eax, 0xf0(%rbx)
cmpl %ebp, %ecx
jae 0x3f897
movl %ebp, 0x60(%rbx)
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %r14
leaq 0x2e1a8(%rip), %rax     # 0x6da58
movq %rax, (%rbx)
movq 0x8(%rbx), %rdi
addq $0x18, %rbx
cmpq %rbx, %rdi
je 0x3f8c5
callq 0x7370
movq %r14, %rdi
callq 0x7620
nop