// File: /workspace/github_c_makefile_star2_O0/samtools[P]htslib/htscodecs/htscodecs/rANS_static32x16pr_avx2.c
// Function: rans_compress_O1_32x16_avx2
unsigned char *rans_compress_O1_32x16_avx2(unsigned char *in, unsigned int in_size,
                                           unsigned char *out, unsigned int *out_size) {
    unsigned char *cp, *out_end, *out_free = NULL;
    unsigned int tab_size;
    uint32_t bound = rans_compress_bound_4x16(in_size,1)-20;
    int z;
    RansState ransN[NX] __attribute__((aligned(32)));

    if (in_size < NX) // force O0 instead
        return NULL;

    if (!out) {
        *out_size = bound;
        out = malloc(*out_size);
    }
    if (!out || bound > *out_size)
        return NULL;

    if (((size_t)out)&1)
        bound--;
    out_end = out + bound;

    RansEncSymbol (*syms)[256] = htscodecs_tls_alloc(256 * (sizeof(*syms)));
    if (!syms) {
        free(out_free);
        return NULL;
    }

    cp = out;
    int shift = encode_freq1(in, in_size, 32, syms, &cp); 
    if (shift < 0) {
        free(out_free);
        htscodecs_tls_free(syms);
        return NULL;
    }
    tab_size = cp - out;

    for (z = 0; z < NX; z++)
      RansEncInit(&ransN[z]);

    uint8_t* ptr = out_end;

    int iN[NX], isz4 = in_size/NX;
    for (z = 0; z < NX; z++)
        iN[z] = (z+1)*isz4-2;

    unsigned char lN[NX];
    for (z = 0; z < NX; z++)
        lN[z] = in[iN[z]+1];

    // Deal with the remainder
    z = NX-1;
    lN[z] = in[in_size-1];
    for (iN[z] = in_size-2; iN[z] > NX*isz4-2; iN[z]--) {
        unsigned char c = in[iN[z]];
        RansEncPutSymbol(&ransN[z], &ptr, &syms[c][lN[z]]);
        lN[z] = c;
    }

    uint16_t *ptr16 = (uint16_t *)ptr;

//       clang16      clang10      gcc7         gcc13
//       587 435 381  588 438 403  504 386 415  527 381 394
// simT  611 432 402  475 401 367  472 422 386  486 353 324

    LOAD(Rv, ransN);

    for (; iN[0] >= 0; ) {
        // We need to gather sym[curr_char][last_char] structs.
        // These hold 4 32-bit values, so are 128 bit each, and
        // are loaded from 32 distinct addresses.
        //
        // We load them into 32 128-bit lanes and then combine to get
        // 16 avx-256 registers.
        // These are now ABCD ABCD ABCD ABCD... orientation
        // Code we can then "gather" from these registers via a combination
        // of shuffle / permutes / and / or operations.  This is less
        // IO than repeating 4 sets of gathers/loads 32-times over.

        // DCBA holding 4 elements in a syms[] array
        // -> 4-way rotate via shuffles
        // [0] DCBA  11 10 01 00  E4
        // [1] CBAD  10 01 00 11  93
        // [2] BADC  01 00 11 10  4E
        // [3] ADCB  00 11 10 01  39
        //
        // Then AND to select relevant lanes and OR
        // [0] ......A0
        // [1] ....A1..
        // [2] ..A2....
        // [3] A3......  OR to get A3A2A1A0
        //
        // or:
        // [0] ....B0..
        // [1] ..B1....
        // [2] B2......
        // [3] ......B3  OR to get B2B1B0B3 and shuffle to B3B2B1B0

        __m256i xmaxv[4];
        __m256i rfv[4];
        __m256i SDv[4];
        __m256i biasv[4];

        const __m256i xA = _mm256_set_epi32(0,0,0,-1, 0,0,0,-1);
        const __m256i xB = _mm256_set_epi32(0,0,-1,0, 0,0,-1,0);
        const __m256i xC = _mm256_set_epi32(0,-1,0,0, 0,-1,0,0);
        const __m256i xD = _mm256_set_epi32(-1,0,0,0, -1,0,0,0);

        for (z = 0; z < 32; z += 8) {
#define m128_to_256 _mm256_castsi128_si256
            __m128i *s0 = (__m128i *)(&syms[in[iN[z+0]]][lN[z+0]]);
            __m128i *s1 = (__m128i *)(&syms[in[iN[z+4]]][lN[z+4]]);
            __m128i *s2 = (__m128i *)(&syms[in[iN[z+1]]][lN[z+1]]);
            __m128i *s3 = (__m128i *)(&syms[in[iN[z+5]]][lN[z+5]]);

            __m256i t0, t1, t2, t3;
            t0 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s0)), 0xE4);
            t1 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s1)), 0xE4);
            t2 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s2)), 0x93);
            t3 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s3)), 0x93);

            __m256i sh0 = _mm256_permute2x128_si256(t0, t1, 0x20);
            __m256i sh1 = _mm256_permute2x128_si256(t2, t3, 0x20);

            lN[z+0] = in[iN[z+0]];
            lN[z+4] = in[iN[z+4]];
            lN[z+1] = in[iN[z+1]];
            lN[z+5] = in[iN[z+5]];

            // Initialise first half of xmax, rf, SD and bias vectors
            __m128i *s4 = (__m128i *)(&syms[in[iN[z+2]]][lN[z+2]]);
            __m128i *s5 = (__m128i *)(&syms[in[iN[z+6]]][lN[z+6]]);
            __m128i *s6 = (__m128i *)(&syms[in[iN[z+3]]][lN[z+3]]);
            __m128i *s7 = (__m128i *)(&syms[in[iN[z+7]]][lN[z+7]]);

            __m256i t4, t5, t6, t7;
            t4 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s4)), 0x4E);
            t5 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s5)), 0x4E);
            t6 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s6)), 0x39);
            t7 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s7)), 0x39);

            __m256i sh2 = _mm256_permute2x128_si256(t4, t5, 0x20);
            __m256i sh3 = _mm256_permute2x128_si256(t6, t7, 0x20);

            lN[z+2] = in[iN[z+2]];
            lN[z+6] = in[iN[z+6]];
            lN[z+3] = in[iN[z+3]];
            lN[z+7] = in[iN[z+7]];

#define SH_LOAD(A, B, C, D)                                        \
            _mm256_or_si256(_mm256_or_si256(_mm256_and_si256(sh0, A), \
                                            _mm256_and_si256(sh1, B)),\
                            _mm256_or_si256(_mm256_and_si256(sh2, C), \
                                            _mm256_and_si256(sh3, D)))
            xmaxv[z/8] = SH_LOAD(xA, xB, xC, xD);
            rfv  [z/8] = SH_LOAD(xB, xC, xD, xA);
            SDv  [z/8] = SH_LOAD(xD, xA, xB, xC);
            biasv[z/8] = SH_LOAD(xC, xD, xA, xB);

            rfv  [z/8] = _mm256_shuffle_epi32(rfv  [z/8],  0x39);
            SDv  [z/8] = _mm256_shuffle_epi32(SDv  [z/8],  0x93);
            biasv[z/8] = _mm256_shuffle_epi32(biasv[z/8],0x4E);
        }

        // ------------------------------------------------------------
        //      for (z = NX-1; z >= 0; z--) {
        //          if (ransN[z] >= x_max[z]) {
        //              *--ptr16 = ransN[z] & 0xffff;
        //              ransN[z] >>= 16;
        //          }
        //      }
        __m256i cv1 = _mm256_cmpgt_epi32(Rv1, xmaxv[0]);
        __m256i cv2 = _mm256_cmpgt_epi32(Rv2, xmaxv[1]);
        __m256i cv3 = _mm256_cmpgt_epi32(Rv3, xmaxv[2]);
        __m256i cv4 = _mm256_cmpgt_epi32(Rv4, xmaxv[3]);

        // Store bottom 16-bits at ptr16
        //
        // for (z = NX-1; z >= 0; z--) {
        //     if (cond[z]) *--ptr16 = (uint16_t )(ransN[z] & 0xffff);
        // }
        unsigned int imask1 = _mm256_movemask_ps((__m256)cv1);
        unsigned int imask2 = _mm256_movemask_ps((__m256)cv2);
        unsigned int imask3 = _mm256_movemask_ps((__m256)cv3);
        unsigned int imask4 = _mm256_movemask_ps((__m256)cv4);

        __m256i idx1 = _mm256_load_si256((const __m256i*)permutec[imask1]);
        __m256i idx2 = _mm256_load_si256((const __m256i*)permutec[imask2]);
        __m256i idx3 = _mm256_load_si256((const __m256i*)permutec[imask3]);
        __m256i idx4 = _mm256_load_si256((const __m256i*)permutec[imask4]);

        // Permute; to gather together the rans states that need flushing
        __m256i V1, V2, V3, V4;
        V1 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv1, cv1), idx1);
        V2 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv2, cv2), idx2);
        V3 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv3, cv3), idx3);
        V4 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv4, cv4), idx4);

        // We only flush bottom 16 bits, to squash 32-bit states into 16 bit.
        V1 = _mm256_and_si256(V1, _mm256_set1_epi32(0xffff));
        V2 = _mm256_and_si256(V2, _mm256_set1_epi32(0xffff));
        V3 = _mm256_and_si256(V3, _mm256_set1_epi32(0xffff));
        V4 = _mm256_and_si256(V4, _mm256_set1_epi32(0xffff));
        __m256i V12 = _mm256_packus_epi32(V1, V2);
        __m256i V34 = _mm256_packus_epi32(V3, V4);

        // It's BAba order, want BbAa so shuffle.
        V12 = _mm256_permute4x64_epi64(V12, 0xd8);
        V34 = _mm256_permute4x64_epi64(V34, 0xd8);

        // Now we have bottom N 16-bit values in each V12/V34 to flush
        __m128i f =  _mm256_extractf128_si256(V34, 1);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask4);

        f =  _mm256_extractf128_si256(V34, 0);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask3);

        f =  _mm256_extractf128_si256(V12, 1);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask2);

        f =  _mm256_extractf128_si256(V12, 0);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask1);

        __m256i Rs1, Rs2, Rs3, Rs4;
        Rs1 = _mm256_srli_epi32(Rv1,16);
        Rs2 = _mm256_srli_epi32(Rv2,16);
        Rs3 = _mm256_srli_epi32(Rv3,16);
        Rs4 = _mm256_srli_epi32(Rv4,16);

        Rv1 = _mm256_blendv_epi8(Rv1, Rs1, cv1);
        Rv2 = _mm256_blendv_epi8(Rv2, Rs2, cv2);
        Rv3 = _mm256_blendv_epi8(Rv3, Rs3, cv3);
        Rv4 = _mm256_blendv_epi8(Rv4, Rs4, cv4);

        // ------------------------------------------------------------
        // uint32_t q = (uint32_t) (((uint64_t)ransN[z] *
        //                           rcp_freq[z]) >> rcp_shift[z]);
        // ransN[z] = ransN[z] + bias[z] + q * cmpl_freq[z];

        // Cannot trivially replace the multiply as mulhi_epu32 doesn't exist
        // (only mullo).  However we can use _mm256_mul_epu32 twice to get
        // 64bit results (half our lanes) and shift/or to get the answer.
        //
        // (AVX512 allows us to hold it all in 64-bit lanes and use mullo_epi64
        // plus a shift.  KNC has mulhi_epi32, but not sure if this is
        // available.)
        rfv[0] = _mm256_mulhi_epu32(Rv1, rfv[0]);
        rfv[1] = _mm256_mulhi_epu32(Rv2, rfv[1]);
        rfv[2] = _mm256_mulhi_epu32(Rv3, rfv[2]);
        rfv[3] = _mm256_mulhi_epu32(Rv4, rfv[3]);

        __m256i shiftv1 = _mm256_srli_epi32(SDv[0], 16);
        __m256i shiftv2 = _mm256_srli_epi32(SDv[1], 16);
        __m256i shiftv3 = _mm256_srli_epi32(SDv[2], 16);
        __m256i shiftv4 = _mm256_srli_epi32(SDv[3], 16);

        shiftv1 = _mm256_sub_epi32(shiftv1, _mm256_set1_epi32(32));
        shiftv2 = _mm256_sub_epi32(shiftv2, _mm256_set1_epi32(32));
        shiftv3 = _mm256_sub_epi32(shiftv3, _mm256_set1_epi32(32));
        shiftv4 = _mm256_sub_epi32(shiftv4, _mm256_set1_epi32(32));

        __m256i qv1 = _mm256_srlv_epi32(rfv[0], shiftv1);
        __m256i qv2 = _mm256_srlv_epi32(rfv[1], shiftv2);

        __m256i freqv1 = _mm256_and_si256(SDv[0], _mm256_set1_epi32(0xffff));
        __m256i freqv2 = _mm256_and_si256(SDv[1], _mm256_set1_epi32(0xffff));
        qv1 = _mm256_mullo_epi32(qv1, freqv1);
        qv2 = _mm256_mullo_epi32(qv2, freqv2);

        __m256i qv3 = _mm256_srlv_epi32(rfv[2], shiftv3);
        __m256i qv4 = _mm256_srlv_epi32(rfv[3], shiftv4);

        __m256i freqv3 = _mm256_and_si256(SDv[2], _mm256_set1_epi32(0xffff));
        __m256i freqv4 = _mm256_and_si256(SDv[3], _mm256_set1_epi32(0xffff));
        qv3 = _mm256_mullo_epi32(qv3, freqv3);
        qv4 = _mm256_mullo_epi32(qv4, freqv4);

        qv1 = _mm256_add_epi32(qv1, biasv[0]);
        qv2 = _mm256_add_epi32(qv2, biasv[1]);
        qv3 = _mm256_add_epi32(qv3, biasv[2]);
        qv4 = _mm256_add_epi32(qv4, biasv[3]);

        for (z = 0; z < NX; z++)
            iN[z]--;

        Rv1 = _mm256_add_epi32(Rv1, qv1);
        Rv2 = _mm256_add_epi32(Rv2, qv2);
        Rv3 = _mm256_add_epi32(Rv3, qv3);
        Rv4 = _mm256_add_epi32(Rv4, qv4);
    }

    STORE(Rv, ransN);

    ptr = (uint8_t *)ptr16;

    for (z = NX-1; z>=0; z--)
        RansEncPutSymbol(&ransN[z], &ptr, &syms[0][lN[z]]);

    for (z = NX-1; z>=0; z--)
        RansEncFlush(&ransN[z], &ptr);

    *out_size = (out_end - ptr) + tab_size;

    cp = out;
    memmove(out + tab_size, ptr, out_end-ptr);

    htscodecs_tls_free(syms);
    return out;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x2840, %rsp           # imm = 0x2840
movq %rdi, 0xab0(%rsp)
movl %esi, 0xaac(%rsp)
movq %rdx, 0xaa0(%rsp)
movq %rcx, 0xa98(%rsp)
movq $0x0, 0xa80(%rsp)
movl 0xaac(%rsp), %edi
movl $0x1, %esi
callq 0x8e2d0
subl $0x14, %eax
movl %eax, 0xa78(%rsp)
cmpl $0x20, 0xaac(%rsp)
jae 0x9c980
movq $0x0, 0xab8(%rsp)
jmp 0x9fb4f
cmpq $0x0, 0xaa0(%rsp)
jne 0x9c9b5
movl 0xa78(%rsp), %ecx
movq 0xa98(%rsp), %rax
movl %ecx, (%rax)
movq 0xa98(%rsp), %rax
movl (%rax), %eax
movl %eax, %edi
callq 0x4650
movq %rax, 0xaa0(%rsp)
cmpq $0x0, 0xaa0(%rsp)
je 0x9c9d3
movl 0xa78(%rsp), %eax
movq 0xa98(%rsp), %rcx
cmpl (%rcx), %eax
jbe 0x9c9e4
movq $0x0, 0xab8(%rsp)
jmp 0x9fb4f
movq 0xaa0(%rsp), %rax
andq $0x1, %rax
cmpq $0x0, %rax
je 0x9ca07
movl 0xa78(%rsp), %eax
addl $-0x1, %eax
movl %eax, 0xa78(%rsp)
movq 0xaa0(%rsp), %rax
movl 0xa78(%rsp), %ecx
addq %rcx, %rax
movq %rax, 0xa88(%rsp)
movl $0x100000, %edi         # imm = 0x100000
callq 0xce6a0
movq %rax, 0x9d8(%rsp)
cmpq $0x0, 0x9d8(%rsp)
jne 0x9ca5c
movq 0xa80(%rsp), %rdi
callq 0x45a0
movq $0x0, 0xab8(%rsp)
jmp 0x9fb4f
movq 0xaa0(%rsp), %rax
movq %rax, 0xa90(%rsp)
movq 0xab0(%rsp), %rdi
movl 0xaac(%rsp), %esi
movq 0x9d8(%rsp), %rcx
movl $0x20, %edx
leaq 0xa90(%rsp), %r8
callq 0x9fb60
movl %eax, 0x9d4(%rsp)
cmpl $0x0, 0x9d4(%rsp)
jge 0x9cad1
movq 0xa80(%rsp), %rdi
callq 0x45a0
movq 0x9d8(%rsp), %rdi
callq 0xce8f0
movq $0x0, 0xab8(%rsp)
jmp 0x9fb4f
movq 0xa90(%rsp), %rax
movq 0xaa0(%rsp), %rcx
subq %rcx, %rax
movl %eax, 0xa7c(%rsp)
movl $0x0, 0xa74(%rsp)
cmpl $0x20, 0xa74(%rsp)
jge 0x9cb2f
movslq 0xa74(%rsp), %rax
leaq 0x9e0(%rsp), %rdi
shlq $0x2, %rax
addq %rax, %rdi
callq 0x99e90
movl 0xa74(%rsp), %eax
addl $0x1, %eax
movl %eax, 0xa74(%rsp)
jmp 0x9caf6
movq 0xa88(%rsp), %rax
movq %rax, 0x9c8(%rsp)
movl 0xaac(%rsp), %eax
shrl $0x5, %eax
movl %eax, 0x93c(%rsp)
movl $0x0, 0xa74(%rsp)
cmpl $0x20, 0xa74(%rsp)
jge 0x9cb9c
movl 0xa74(%rsp), %ecx
addl $0x1, %ecx
imull 0x93c(%rsp), %ecx
subl $0x2, %ecx
movslq 0xa74(%rsp), %rax
movl %ecx, 0x940(%rsp,%rax,4)
movl 0xa74(%rsp), %eax
addl $0x1, %eax
movl %eax, 0xa74(%rsp)
jmp 0x9cb5b
movl $0x0, 0xa74(%rsp)
cmpl $0x20, 0xa74(%rsp)
jge 0x9cbf3
movq 0xab0(%rsp), %rax
movslq 0xa74(%rsp), %rcx
movl 0x940(%rsp,%rcx,4), %ecx
addl $0x1, %ecx
movslq %ecx, %rcx
movb (%rax,%rcx), %cl
movslq 0xa74(%rsp), %rax
movb %cl, 0x910(%rsp,%rax)
movl 0xa74(%rsp), %eax
addl $0x1, %eax
movl %eax, 0xa74(%rsp)
jmp 0x9cba7
movl $0x1f, 0xa74(%rsp)
movq 0xab0(%rsp), %rax
movl 0xaac(%rsp), %ecx
subl $0x1, %ecx
movl %ecx, %ecx
movb (%rax,%rcx), %cl
movslq 0xa74(%rsp), %rax
movb %cl, 0x910(%rsp,%rax)
movl 0xaac(%rsp), %ecx
subl $0x2, %ecx
movslq 0xa74(%rsp), %rax
movl %ecx, 0x940(%rsp,%rax,4)
movslq 0xa74(%rsp), %rax
movl 0x940(%rsp,%rax,4), %eax
movl 0x93c(%rsp), %ecx
shll $0x5, %ecx
subl $0x2, %ecx
cmpl %ecx, %eax
jle 0x9cd09
movq 0xab0(%rsp), %rax
movslq 0xa74(%rsp), %rcx
movslq 0x940(%rsp,%rcx,4), %rcx
movb (%rax,%rcx), %al
movb %al, 0x90f(%rsp)
movslq 0xa74(%rsp), %rax
leaq 0x9e0(%rsp), %rdi
shlq $0x2, %rax
addq %rax, %rdi
movq 0x9d8(%rsp), %rdx
movzbl 0x90f(%rsp), %eax
shlq $0xc, %rax
addq %rax, %rdx
movslq 0xa74(%rsp), %rax
movzbl 0x910(%rsp,%rax), %eax
shlq $0x4, %rax
addq %rax, %rdx
leaq 0x9c8(%rsp), %rsi
callq 0x99eb0
movb 0x90f(%rsp), %cl
movslq 0xa74(%rsp), %rax
movb %cl, 0x910(%rsp,%rax)
movslq 0xa74(%rsp), %rax
movl 0x940(%rsp,%rax,4), %ecx
addl $-0x1, %ecx
movl %ecx, 0x940(%rsp,%rax,4)
jmp 0x9cc3d
movq 0x9c8(%rsp), %rax
movq %rax, 0x900(%rsp)
leaq 0x9e0(%rsp), %rax
movq %rax, 0xaf8(%rsp)
movq 0xaf8(%rsp), %rax
vmovdqa (%rax), %ymm0
vmovdqa %ymm0, 0x8e0(%rsp)
leaq 0x9e0(%rsp), %rax
addq $0x20, %rax
movq %rax, 0xaf0(%rsp)
movq 0xaf0(%rsp), %rax
vmovdqa (%rax), %ymm0
vmovdqa %ymm0, 0x8c0(%rsp)
leaq 0x9e0(%rsp), %rax
addq $0x40, %rax
movq %rax, 0xae8(%rsp)
movq 0xae8(%rsp), %rax
vmovdqa (%rax), %ymm0
vmovdqa %ymm0, 0x8a0(%rsp)
leaq 0x9e0(%rsp), %rax
addq $0x60, %rax
movq %rax, 0xae0(%rsp)
movq 0xae0(%rsp), %rax
vmovdqa (%rax), %ymm0
vmovdqa %ymm0, 0x880(%rsp)
cmpl $0x0, 0x940(%rsp)
jl 0x9f90f
movl $0x0, 0xcbc(%rsp)
movl $0x0, 0xcb8(%rsp)
movl $0x0, 0xcb4(%rsp)
movl $0xffffffff, 0xcb0(%rsp) # imm = 0xFFFFFFFF
movl $0x0, 0xcac(%rsp)
movl $0x0, 0xca8(%rsp)
movl $0x0, 0xca4(%rsp)
movl $0xffffffff, 0xca0(%rsp) # imm = 0xFFFFFFFF
movl 0xca4(%rsp), %r8d
movl 0xca8(%rsp), %edi
movl 0xcac(%rsp), %esi
movl 0xcb4(%rsp), %edx
movl 0xcb8(%rsp), %ecx
movl 0xcbc(%rsp), %eax
vmovd 0xca0(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0xcb0(%rsp), %xmm1
vpinsrd $0x1, %edx, %xmm1, %xmm1
vpinsrd $0x2, %ecx, %xmm1, %xmm1
vpinsrd $0x3, %eax, %xmm1, %xmm1
vmovdqa %xmm1, 0xc90(%rsp)
vmovdqa %xmm0, 0xc80(%rsp)
vmovaps 0xc80(%rsp), %ymm0
vmovaps %ymm0, 0x660(%rsp)
movl $0x0, 0xc7c(%rsp)
movl $0x0, 0xc78(%rsp)
movl $0xffffffff, 0xc74(%rsp) # imm = 0xFFFFFFFF
movl $0x0, 0xc70(%rsp)
movl $0x0, 0xc6c(%rsp)
movl $0x0, 0xc68(%rsp)
movl $0xffffffff, 0xc64(%rsp) # imm = 0xFFFFFFFF
movl $0x0, 0xc60(%rsp)
movl 0xc64(%rsp), %r8d
movl 0xc68(%rsp), %edi
movl 0xc6c(%rsp), %esi
movl 0xc74(%rsp), %edx
movl 0xc78(%rsp), %ecx
movl 0xc7c(%rsp), %eax
vmovd 0xc60(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0xc70(%rsp), %xmm1
vpinsrd $0x1, %edx, %xmm1, %xmm1
vpinsrd $0x2, %ecx, %xmm1, %xmm1
vpinsrd $0x3, %eax, %xmm1, %xmm1
vmovdqa %xmm1, 0xc50(%rsp)
vmovdqa %xmm0, 0xc40(%rsp)
vmovaps 0xc40(%rsp), %ymm0
vmovaps %ymm0, 0x640(%rsp)
movl $0x0, 0xc3c(%rsp)
movl $0xffffffff, 0xc38(%rsp) # imm = 0xFFFFFFFF
movl $0x0, 0xc34(%rsp)
movl $0x0, 0xc30(%rsp)
movl $0x0, 0xc2c(%rsp)
movl $0xffffffff, 0xc28(%rsp) # imm = 0xFFFFFFFF
movl $0x0, 0xc24(%rsp)
movl $0x0, 0xc20(%rsp)
movl 0xc24(%rsp), %r8d
movl 0xc28(%rsp), %edi
movl 0xc2c(%rsp), %esi
movl 0xc34(%rsp), %edx
movl 0xc38(%rsp), %ecx
movl 0xc3c(%rsp), %eax
vmovd 0xc20(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0xc30(%rsp), %xmm1
vpinsrd $0x1, %edx, %xmm1, %xmm1
vpinsrd $0x2, %ecx, %xmm1, %xmm1
vpinsrd $0x3, %eax, %xmm1, %xmm1
vmovdqa %xmm1, 0xc10(%rsp)
vmovdqa %xmm0, 0xc00(%rsp)
vmovaps 0xc00(%rsp), %ymm0
vmovaps %ymm0, 0x620(%rsp)
movl $0xffffffff, 0xbfc(%rsp) # imm = 0xFFFFFFFF
movl $0x0, 0xbf8(%rsp)
movl $0x0, 0xbf4(%rsp)
movl $0x0, 0xbf0(%rsp)
movl $0xffffffff, 0xbec(%rsp) # imm = 0xFFFFFFFF
movl $0x0, 0xbe8(%rsp)
movl $0x0, 0xbe4(%rsp)
movl $0x0, 0xbe0(%rsp)
movl 0xbe4(%rsp), %edx
movl 0xbe8(%rsp), %ecx
movl 0xbec(%rsp), %eax
movl 0xbf4(%rsp), %r8d
movl 0xbf8(%rsp), %edi
movl 0xbfc(%rsp), %esi
vmovd 0xbf0(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm1
vmovd 0xbe0(%rsp), %xmm0
vpinsrd $0x1, %edx, %xmm0, %xmm0
vpinsrd $0x2, %ecx, %xmm0, %xmm0
vpinsrd $0x3, %eax, %xmm0, %xmm2
vmovaps %xmm2, %xmm0
vinserti128 $0x1, %xmm1, %ymm0, %ymm0
vmovdqa %ymm0, 0xbc0(%rsp)
vmovdqa 0xbc0(%rsp), %ymm0
vmovdqa %ymm0, 0x600(%rsp)
movl $0x0, 0xa74(%rsp)
cmpl $0x20, 0xa74(%rsp)
jge 0x9ddba
movq 0x9d8(%rsp), %rax
movq 0xab0(%rsp), %rdx
movslq 0xa74(%rsp), %rcx
movslq 0x940(%rsp,%rcx,4), %rsi
movzbl (%rdx,%rsi), %edx
shll $0xc, %edx
addq %rdx, %rax
movzbl 0x910(%rsp,%rcx), %ecx
shll $0x4, %ecx
addq %rcx, %rax
movq %rax, 0x5f8(%rsp)
movq 0x9d8(%rsp), %rax
movq 0xab0(%rsp), %rdx
movslq 0xa74(%rsp), %rcx
movslq 0x950(%rsp,%rcx,4), %rsi
movzbl (%rdx,%rsi), %edx
shll $0xc, %edx
addq %rdx, %rax
movzbl 0x914(%rsp,%rcx), %ecx
shll $0x4, %ecx
addq %rcx, %rax
movq %rax, 0x5f0(%rsp)
movq 0x9d8(%rsp), %rax
movq 0xab0(%rsp), %rdx
movslq 0xa74(%rsp), %rcx
movslq 0x944(%rsp,%rcx,4), %rsi
movzbl (%rdx,%rsi), %edx
shll $0xc, %edx
addq %rdx, %rax
movzbl 0x911(%rsp,%rcx), %ecx
shll $0x4, %ecx
addq %rcx, %rax
movq %rax, 0x5e8(%rsp)
movq 0x9d8(%rsp), %rax
movq 0xab0(%rsp), %rdx
movslq 0xa74(%rsp), %rcx
movslq 0x954(%rsp,%rcx,4), %rsi
movzbl (%rdx,%rsi), %edx
shll $0xc, %edx
addq %rdx, %rax
movzbl 0x915(%rsp,%rcx), %ecx
shll $0x4, %ecx
addq %rcx, %rax
movq %rax, 0x5e0(%rsp)
movq 0x5f8(%rsp), %rax
movq %rax, 0xbb8(%rsp)
movq 0xbb8(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0xb70(%rsp)
vmovdqa 0xb70(%rsp), %xmm0
vmovdqa %xmm1, 0x5d0(%rsp)
vmovdqa %xmm0, 0x5c0(%rsp)
movq 0x5f0(%rsp), %rax
movq %rax, 0xbb0(%rsp)
movq 0xbb0(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0xb60(%rsp)
vmovdqa 0xb60(%rsp), %xmm0
vmovdqa %xmm1, 0x5b0(%rsp)
vmovdqa %xmm0, 0x5a0(%rsp)
movq 0x5e8(%rsp), %rax
movq %rax, 0xba8(%rsp)
movq 0xba8(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0xb50(%rsp)
vmovdqa 0xb50(%rsp), %xmm0
vmovdqa %xmm0, %xmm0
vpshufd $0x93, %ymm0, %ymm0     # ymm0 = ymm0[3,0,1,2,7,4,5,6]
vmovaps %ymm0, 0x580(%rsp)
movq 0x5e0(%rsp), %rax
movq %rax, 0xba0(%rsp)
movq 0xba0(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0xb40(%rsp)
vmovdqa 0xb40(%rsp), %xmm0
vmovdqa %xmm0, %xmm0
vpshufd $0x93, %ymm0, %ymm0     # ymm0 = ymm0[3,0,1,2,7,4,5,6]
vmovaps %ymm0, 0x560(%rsp)
vmovaps 0x5c0(%rsp), %ymm0
vmovaps 0x5a0(%rsp), %ymm1
vperm2i128 $0x20, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0,1],ymm1[0,1]
vmovaps %ymm0, 0x540(%rsp)
vmovaps 0x580(%rsp), %ymm0
vmovaps 0x560(%rsp), %ymm1
vperm2i128 $0x20, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0,1],ymm1[0,1]
vmovaps %ymm0, 0x520(%rsp)
movq 0xab0(%rsp), %rcx
movslq 0xa74(%rsp), %rax
movslq 0x940(%rsp,%rax,4), %rdx
movb (%rcx,%rdx), %cl
movb %cl, 0x910(%rsp,%rax)
movq 0xab0(%rsp), %rcx
movslq 0xa74(%rsp), %rax
movslq 0x950(%rsp,%rax,4), %rdx
movb (%rcx,%rdx), %cl
movb %cl, 0x914(%rsp,%rax)
movq 0xab0(%rsp), %rcx
movslq 0xa74(%rsp), %rax
movslq 0x944(%rsp,%rax,4), %rdx
movb (%rcx,%rdx), %cl
movb %cl, 0x911(%rsp,%rax)
movq 0xab0(%rsp), %rcx
movslq 0xa74(%rsp), %rax
movslq 0x954(%rsp,%rax,4), %rdx
movb (%rcx,%rdx), %cl
movb %cl, 0x915(%rsp,%rax)
movq 0x9d8(%rsp), %rax
movq 0xab0(%rsp), %rdx
movslq 0xa74(%rsp), %rcx
movslq 0x948(%rsp,%rcx,4), %rsi
movzbl (%rdx,%rsi), %edx
shll $0xc, %edx
addq %rdx, %rax
movzbl 0x912(%rsp,%rcx), %ecx
shll $0x4, %ecx
addq %rcx, %rax
movq %rax, 0x518(%rsp)
movq 0x9d8(%rsp), %rax
movq 0xab0(%rsp), %rdx
movslq 0xa74(%rsp), %rcx
movslq 0x958(%rsp,%rcx,4), %rsi
movzbl (%rdx,%rsi), %edx
shll $0xc, %edx
addq %rdx, %rax
movzbl 0x916(%rsp,%rcx), %ecx
shll $0x4, %ecx
addq %rcx, %rax
movq %rax, 0x510(%rsp)
movq 0x9d8(%rsp), %rax
movq 0xab0(%rsp), %rdx
movslq 0xa74(%rsp), %rcx
movslq 0x94c(%rsp,%rcx,4), %rsi
movzbl (%rdx,%rsi), %edx
shll $0xc, %edx
addq %rdx, %rax
movzbl 0x913(%rsp,%rcx), %ecx
shll $0x4, %ecx
addq %rcx, %rax
movq %rax, 0x508(%rsp)
movq 0x9d8(%rsp), %rax
movq 0xab0(%rsp), %rdx
movslq 0xa74(%rsp), %rcx
movslq 0x95c(%rsp,%rcx,4), %rsi
movzbl (%rdx,%rsi), %edx
shll $0xc, %edx
addq %rdx, %rax
movzbl 0x917(%rsp,%rcx), %ecx
shll $0x4, %ecx
addq %rcx, %rax
movq %rax, 0x500(%rsp)
movq 0x518(%rsp), %rax
movq %rax, 0xb98(%rsp)
movq 0xb98(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0xb30(%rsp)
vmovdqa 0xb30(%rsp), %xmm0
vmovdqa %xmm0, %xmm0
vpshufd $0x4e, %ymm0, %ymm0     # ymm0 = ymm0[2,3,0,1,6,7,4,5]
vmovaps %ymm0, 0x4e0(%rsp)
movq 0x510(%rsp), %rax
movq %rax, 0xb90(%rsp)
movq 0xb90(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0xb20(%rsp)
vmovdqa 0xb20(%rsp), %xmm0
vmovdqa %xmm0, %xmm0
vpshufd $0x4e, %ymm0, %ymm0     # ymm0 = ymm0[2,3,0,1,6,7,4,5]
vmovaps %ymm0, 0x4c0(%rsp)
movq 0x508(%rsp), %rax
movq %rax, 0xb88(%rsp)
movq 0xb88(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0xb10(%rsp)
vmovdqa 0xb10(%rsp), %xmm0
vmovdqa %xmm0, %xmm0
vpshufd $0x39, %ymm0, %ymm0     # ymm0 = ymm0[1,2,3,0,5,6,7,4]
vmovaps %ymm0, 0x4a0(%rsp)
movq 0x500(%rsp), %rax
movq %rax, 0xb80(%rsp)
movq 0xb80(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0xb00(%rsp)
vmovdqa 0xb00(%rsp), %xmm0
vmovdqa %xmm0, %xmm0
vpshufd $0x39, %ymm0, %ymm0     # ymm0 = ymm0[1,2,3,0,5,6,7,4]
vmovaps %ymm0, 0x480(%rsp)
vmovaps 0x4e0(%rsp), %ymm0
vmovaps 0x4c0(%rsp), %ymm1
vperm2i128 $0x20, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0,1],ymm1[0,1]
vmovaps %ymm0, 0x460(%rsp)
vmovaps 0x4a0(%rsp), %ymm0
vmovaps 0x480(%rsp), %ymm1
vperm2i128 $0x20, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0,1],ymm1[0,1]
vmovaps %ymm0, 0x440(%rsp)
movq 0xab0(%rsp), %rcx
movslq 0xa74(%rsp), %rax
movslq 0x948(%rsp,%rax,4), %rdx
movb (%rcx,%rdx), %cl
movb %cl, 0x912(%rsp,%rax)
movq 0xab0(%rsp), %rcx
movslq 0xa74(%rsp), %rax
movslq 0x958(%rsp,%rax,4), %rdx
movb (%rcx,%rdx), %cl
movb %cl, 0x916(%rsp,%rax)
movq 0xab0(%rsp), %rcx
movslq 0xa74(%rsp), %rax
movslq 0x94c(%rsp,%rax,4), %rdx
movb (%rcx,%rdx), %cl
movb %cl, 0x913(%rsp,%rax)
movq 0xab0(%rsp), %rcx
movslq 0xa74(%rsp), %rax
movslq 0x95c(%rsp,%rax,4), %rdx
movb (%rcx,%rdx), %cl
movb %cl, 0x917(%rsp,%rax)
vmovaps 0x540(%rsp), %ymm1
vmovaps 0x660(%rsp), %ymm0
vmovaps %ymm1, 0x16a0(%rsp)
vmovaps %ymm0, 0x1680(%rsp)
vmovaps 0x16a0(%rsp), %ymm0
vmovaps 0x1680(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x520(%rsp), %ymm2
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm2, 0x1660(%rsp)
vmovaps %ymm0, 0x1640(%rsp)
vmovaps 0x1660(%rsp), %ymm0
vmovaps 0x1640(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0xfa0(%rsp)
vmovaps %ymm0, 0xf80(%rsp)
vmovaps 0xfa0(%rsp), %ymm0
vmovaps 0xf80(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x460(%rsp), %ymm2
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm2, 0x1620(%rsp)
vmovaps %ymm0, 0x1600(%rsp)
vmovaps 0x1620(%rsp), %ymm0
vmovaps 0x1600(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x440(%rsp), %ymm3
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm3, 0x15e0(%rsp)
vmovaps %ymm0, 0x15c0(%rsp)
vmovaps 0x15e0(%rsp), %ymm0
vmovaps 0x15c0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0xf60(%rsp)
vmovaps %ymm0, 0xf40(%rsp)
vmovaps 0xf60(%rsp), %ymm0
vmovaps 0xf40(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0xf20(%rsp)
vmovaps %ymm0, 0xf00(%rsp)
vmovaps 0xf20(%rsp), %ymm0
vmovaps 0xf00(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
movl 0xa74(%rsp), %eax
movl %eax, %ecx
addl $0x7, %ecx
testl %eax, %eax
cmovsl %ecx, %eax
sarl $0x3, %eax
cltq
shlq $0x5, %rax
vmovaps %ymm0, 0x800(%rsp,%rax)
vmovaps 0x540(%rsp), %ymm1
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm1, 0x15a0(%rsp)
vmovaps %ymm0, 0x1580(%rsp)
vmovaps 0x15a0(%rsp), %ymm0
vmovaps 0x1580(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x520(%rsp), %ymm2
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm2, 0x1560(%rsp)
vmovaps %ymm0, 0x1540(%rsp)
vmovaps 0x1560(%rsp), %ymm0
vmovaps 0x1540(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0xee0(%rsp)
vmovaps %ymm0, 0xec0(%rsp)
vmovaps 0xee0(%rsp), %ymm0
vmovaps 0xec0(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x460(%rsp), %ymm2
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm2, 0x1520(%rsp)
vmovaps %ymm0, 0x1500(%rsp)
vmovaps 0x1520(%rsp), %ymm0
vmovaps 0x1500(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x440(%rsp), %ymm3
vmovaps 0x660(%rsp), %ymm0
vmovaps %ymm3, 0x14e0(%rsp)
vmovaps %ymm0, 0x14c0(%rsp)
vmovaps 0x14e0(%rsp), %ymm0
vmovaps 0x14c0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0xea0(%rsp)
vmovaps %ymm0, 0xe80(%rsp)
vmovaps 0xea0(%rsp), %ymm0
vmovaps 0xe80(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0xe60(%rsp)
vmovaps %ymm0, 0xe40(%rsp)
vmovaps 0xe60(%rsp), %ymm0
vmovaps 0xe40(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
movl 0xa74(%rsp), %eax
movl %eax, %ecx
addl $0x7, %ecx
testl %eax, %eax
cmovsl %ecx, %eax
sarl $0x3, %eax
cltq
shlq $0x5, %rax
vmovaps %ymm0, 0x780(%rsp,%rax)
vmovaps 0x540(%rsp), %ymm1
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm1, 0x14a0(%rsp)
vmovaps %ymm0, 0x1480(%rsp)
vmovaps 0x14a0(%rsp), %ymm0
vmovaps 0x1480(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x520(%rsp), %ymm2
vmovaps 0x660(%rsp), %ymm0
vmovaps %ymm2, 0x1460(%rsp)
vmovaps %ymm0, 0x1440(%rsp)
vmovaps 0x1460(%rsp), %ymm0
vmovaps 0x1440(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0xe20(%rsp)
vmovaps %ymm0, 0xe00(%rsp)
vmovaps 0xe20(%rsp), %ymm0
vmovaps 0xe00(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x460(%rsp), %ymm2
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm2, 0x1420(%rsp)
vmovaps %ymm0, 0x1400(%rsp)
vmovaps 0x1420(%rsp), %ymm0
vmovaps 0x1400(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x440(%rsp), %ymm3
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm3, 0x13e0(%rsp)
vmovaps %ymm0, 0x13c0(%rsp)
vmovaps 0x13e0(%rsp), %ymm0
vmovaps 0x13c0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0xde0(%rsp)
vmovaps %ymm0, 0xdc0(%rsp)
vmovaps 0xde0(%rsp), %ymm0
vmovaps 0xdc0(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0xda0(%rsp)
vmovaps %ymm0, 0xd80(%rsp)
vmovaps 0xda0(%rsp), %ymm0
vmovaps 0xd80(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
movl 0xa74(%rsp), %eax
movl %eax, %ecx
addl $0x7, %ecx
testl %eax, %eax
cmovsl %ecx, %eax
sarl $0x3, %eax
cltq
shlq $0x5, %rax
vmovaps %ymm0, 0x700(%rsp,%rax)
vmovaps 0x540(%rsp), %ymm1
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm1, 0x13a0(%rsp)
vmovaps %ymm0, 0x1380(%rsp)
vmovaps 0x13a0(%rsp), %ymm0
vmovaps 0x1380(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x520(%rsp), %ymm2
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm2, 0x1360(%rsp)
vmovaps %ymm0, 0x1340(%rsp)
vmovaps 0x1360(%rsp), %ymm0
vmovaps 0x1340(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0xd60(%rsp)
vmovaps %ymm0, 0xd40(%rsp)
vmovaps 0xd60(%rsp), %ymm0
vmovaps 0xd40(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x460(%rsp), %ymm2
vmovaps 0x660(%rsp), %ymm0
vmovaps %ymm2, 0x1320(%rsp)
vmovaps %ymm0, 0x1300(%rsp)
vmovaps 0x1320(%rsp), %ymm0
vmovaps 0x1300(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x440(%rsp), %ymm3
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm3, 0x12e0(%rsp)
vmovaps %ymm0, 0x12c0(%rsp)
vmovaps 0x12e0(%rsp), %ymm0
vmovaps 0x12c0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0xd20(%rsp)
vmovaps %ymm0, 0xd00(%rsp)
vmovaps 0xd20(%rsp), %ymm0
vmovaps 0xd00(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0xce0(%rsp)
vmovaps %ymm0, 0xcc0(%rsp)
vmovaps 0xce0(%rsp), %ymm0
vmovaps 0xcc0(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
movl 0xa74(%rsp), %eax
movl %eax, %ecx
addl $0x7, %ecx
testl %eax, %eax
cmovsl %ecx, %eax
sarl $0x3, %eax
cltq
shlq $0x5, %rax
vmovaps %ymm0, 0x680(%rsp,%rax)
movl 0xa74(%rsp), %eax
movl %eax, %ecx
addl $0x7, %ecx
testl %eax, %eax
cmovsl %ecx, %eax
sarl $0x3, %eax
cltq
shlq $0x5, %rax
vmovaps 0x780(%rsp,%rax), %ymm0
vpshufd $0x39, %ymm0, %ymm0     # ymm0 = ymm0[1,2,3,0,5,6,7,4]
vmovaps %ymm0, 0x780(%rsp,%rax)
movl 0xa74(%rsp), %eax
movl %eax, %ecx
addl $0x7, %ecx
testl %eax, %eax
cmovsl %ecx, %eax
sarl $0x3, %eax
cltq
shlq $0x5, %rax
vmovaps 0x700(%rsp,%rax), %ymm0
vpshufd $0x93, %ymm0, %ymm0     # ymm0 = ymm0[3,0,1,2,7,4,5,6]
vmovaps %ymm0, 0x700(%rsp,%rax)
movl 0xa74(%rsp), %eax
movl %eax, %ecx
addl $0x7, %ecx
testl %eax, %eax
cmovsl %ecx, %eax
sarl $0x3, %eax
cltq
shlq $0x5, %rax
vmovaps 0x680(%rsp,%rax), %ymm0
vpshufd $0x4e, %ymm0, %ymm0     # ymm0 = ymm0[2,3,0,1,6,7,4,5]
movl 0xa74(%rsp), %eax
movl $0x8, %ecx
cltd
idivl %ecx
movslq %eax, %rcx
leaq 0x680(%rsp), %rax
shlq $0x5, %rcx
addq %rcx, %rax
vmovdqa %ymm0, (%rax)
movl 0xa74(%rsp), %eax
addl $0x8, %eax
movl %eax, 0xa74(%rsp)
jmp 0x9d147
vmovaps 0x8e0(%rsp), %ymm1
vmovaps 0x800(%rsp), %ymm0
vmovaps %ymm1, 0x17a0(%rsp)
vmovaps %ymm0, 0x1780(%rsp)
vmovaps 0x17a0(%rsp), %ymm0
vmovaps 0x1780(%rsp), %ymm1
vpcmpgtd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x420(%rsp)
vmovaps 0x8c0(%rsp), %ymm1
vmovaps 0x820(%rsp), %ymm0
vmovaps %ymm1, 0x1760(%rsp)
vmovaps %ymm0, 0x1740(%rsp)
vmovaps 0x1760(%rsp), %ymm0
vmovaps 0x1740(%rsp), %ymm1
vpcmpgtd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x400(%rsp)
vmovaps 0x8a0(%rsp), %ymm1
vmovaps 0x840(%rsp), %ymm0
vmovaps %ymm1, 0x1720(%rsp)
vmovaps %ymm0, 0x1700(%rsp)
vmovaps 0x1720(%rsp), %ymm0
vmovaps 0x1700(%rsp), %ymm1
vpcmpgtd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x3e0(%rsp)
vmovaps 0x880(%rsp), %ymm1
vmovaps 0x860(%rsp), %ymm0
vmovaps %ymm1, 0x16e0(%rsp)
vmovaps %ymm0, 0x16c0(%rsp)
vmovaps 0x16e0(%rsp), %ymm0
vmovaps 0x16c0(%rsp), %ymm1
vpcmpgtd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x3c0(%rsp)
vmovaps 0x420(%rsp), %ymm0
vmovaps %ymm0, 0x1820(%rsp)
vmovaps 0x1820(%rsp), %ymm0
vmovmskps %ymm0, %eax
movl %eax, 0x3bc(%rsp)
vmovaps 0x400(%rsp), %ymm0
vmovaps %ymm0, 0x1800(%rsp)
vmovaps 0x1800(%rsp), %ymm0
vmovmskps %ymm0, %eax
movl %eax, 0x3b8(%rsp)
vmovaps 0x3e0(%rsp), %ymm0
vmovaps %ymm0, 0x17e0(%rsp)
vmovaps 0x17e0(%rsp), %ymm0
vmovmskps %ymm0, %eax
movl %eax, 0x3b4(%rsp)
vmovaps 0x3c0(%rsp), %ymm0
vmovaps %ymm0, 0x17c0(%rsp)
vmovaps 0x17c0(%rsp), %ymm0
vmovmskps %ymm0, %eax
movl %eax, 0x3b0(%rsp)
movl 0x3bc(%rsp), %eax
movl %eax, %edx
shlq $0x5, %rdx
leaq 0x6fc6e(%rip), %rax     # 0x10dbe0
movq %rax, %rcx
addq %rdx, %rcx
movq %rcx, 0xad8(%rsp)
movq 0xad8(%rsp), %rcx
vmovaps (%rcx), %ymm0
vmovaps %ymm0, 0x380(%rsp)
movl 0x3b8(%rsp), %ecx
movl %ecx, %edx
shlq $0x5, %rdx
movq %rax, %rcx
addq %rdx, %rcx
movq %rcx, 0xad0(%rsp)
movq 0xad0(%rsp), %rcx
vmovaps (%rcx), %ymm0
vmovaps %ymm0, 0x360(%rsp)
movl 0x3b4(%rsp), %ecx
movl %ecx, %edx
shlq $0x5, %rdx
movq %rax, %rcx
addq %rdx, %rcx
movq %rcx, 0xac8(%rsp)
movq 0xac8(%rsp), %rcx
vmovaps (%rcx), %ymm0
vmovaps %ymm0, 0x340(%rsp)
movl 0x3b0(%rsp), %ecx
shlq $0x5, %rcx
addq %rcx, %rax
movq %rax, 0xac0(%rsp)
movq 0xac0(%rsp), %rax
vmovaps (%rax), %ymm0
vmovaps %ymm0, 0x320(%rsp)
vmovaps 0x8e0(%rsp), %ymm1
vmovaps 0x420(%rsp), %ymm0
vmovaps %ymm1, 0x12a0(%rsp)
vmovaps %ymm0, 0x1280(%rsp)
vmovaps 0x12a0(%rsp), %ymm0
vmovaps 0x1280(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x380(%rsp), %ymm0
vmovaps %ymm1, 0x1920(%rsp)
vmovaps %ymm0, 0x1900(%rsp)
vmovaps 0x1920(%rsp), %ymm1
vmovaps 0x1900(%rsp), %ymm0
vpermd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x300(%rsp)
vmovaps 0x8c0(%rsp), %ymm1
vmovaps 0x400(%rsp), %ymm0
vmovaps %ymm1, 0x1260(%rsp)
vmovaps %ymm0, 0x1240(%rsp)
vmovaps 0x1260(%rsp), %ymm0
vmovaps 0x1240(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x360(%rsp), %ymm0
vmovaps %ymm1, 0x18e0(%rsp)
vmovaps %ymm0, 0x18c0(%rsp)
vmovaps 0x18e0(%rsp), %ymm1
vmovaps 0x18c0(%rsp), %ymm0
vpermd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x2e0(%rsp)
vmovaps 0x8a0(%rsp), %ymm1
vmovaps 0x3e0(%rsp), %ymm0
vmovaps %ymm1, 0x1220(%rsp)
vmovaps %ymm0, 0x1200(%rsp)
vmovaps 0x1220(%rsp), %ymm0
vmovaps 0x1200(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x340(%rsp), %ymm0
vmovaps %ymm1, 0x18a0(%rsp)
vmovaps %ymm0, 0x1880(%rsp)
vmovaps 0x18a0(%rsp), %ymm1
vmovaps 0x1880(%rsp), %ymm0
vpermd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x2c0(%rsp)
vmovaps 0x880(%rsp), %ymm1
vmovaps 0x3c0(%rsp), %ymm0
vmovaps %ymm1, 0x11e0(%rsp)
vmovaps %ymm0, 0x11c0(%rsp)
vmovaps 0x11e0(%rsp), %ymm0
vmovaps 0x11c0(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x320(%rsp), %ymm0
vmovaps %ymm1, 0x1860(%rsp)
vmovaps %ymm0, 0x1840(%rsp)
vmovaps 0x1860(%rsp), %ymm1
vmovaps 0x1840(%rsp), %ymm0
vpermd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x2a0(%rsp)
vmovaps 0x300(%rsp), %ymm1
movl $0xffff, 0x1d7c(%rsp) # imm = 0xFFFF
movl 0x1d7c(%rsp), %eax
movl %eax, 0x10(%rsp)
movl %eax, 0x1dbc(%rsp)
movl %eax, 0x1db8(%rsp)
movl %eax, 0x1db4(%rsp)
movl %eax, 0x1db0(%rsp)
movl %eax, 0x1dac(%rsp)
movl %eax, 0x1da8(%rsp)
movl %eax, 0x1da4(%rsp)
movl %eax, 0x1da0(%rsp)
movl 0x1da4(%rsp), %r8d
movl 0x1da8(%rsp), %edi
movl 0x1dac(%rsp), %esi
movl 0x1db4(%rsp), %edx
movl 0x1db8(%rsp), %ecx
movl 0x1dbc(%rsp), %eax
vmovd 0x1da0(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x1db0(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x1d90(%rsp)
vmovdqa %xmm0, 0x1d80(%rsp)
vmovaps 0x1d80(%rsp), %ymm0
vmovaps %ymm1, 0x11a0(%rsp)
vmovaps %ymm0, 0x1180(%rsp)
vmovaps 0x11a0(%rsp), %ymm0
vmovaps 0x1180(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x300(%rsp)
vmovaps 0x2e0(%rsp), %ymm1
movl $0xffff, 0x1d1c(%rsp) # imm = 0xFFFF
movl 0x1d1c(%rsp), %eax
movl %eax, 0x14(%rsp)
movl %eax, 0x1d78(%rsp)
movl %eax, 0x1d74(%rsp)
movl %eax, 0x1d70(%rsp)
movl %eax, 0x1d6c(%rsp)
movl %eax, 0x1d68(%rsp)
movl %eax, 0x1d64(%rsp)
movl %eax, 0x1d60(%rsp)
movl %eax, 0x1d5c(%rsp)
movl 0x1d60(%rsp), %r8d
movl 0x1d64(%rsp), %edi
movl 0x1d68(%rsp), %esi
movl 0x1d70(%rsp), %edx
movl 0x1d74(%rsp), %ecx
movl 0x1d78(%rsp), %eax
vmovd 0x1d5c(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x1d6c(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x1d30(%rsp)
vmovdqa %xmm0, 0x1d20(%rsp)
vmovaps 0x1d20(%rsp), %ymm0
vmovaps %ymm1, 0x1160(%rsp)
vmovaps %ymm0, 0x1140(%rsp)
vmovaps 0x1160(%rsp), %ymm0
vmovaps 0x1140(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x2e0(%rsp)
vmovaps 0x2c0(%rsp), %ymm1
movl $0xffff, 0x1cbc(%rsp) # imm = 0xFFFF
movl 0x1cbc(%rsp), %eax
movl %eax, 0x18(%rsp)
movl %eax, 0x1d18(%rsp)
movl %eax, 0x1d14(%rsp)
movl %eax, 0x1d10(%rsp)
movl %eax, 0x1d0c(%rsp)
movl %eax, 0x1d08(%rsp)
movl %eax, 0x1d04(%rsp)
movl %eax, 0x1d00(%rsp)
movl %eax, 0x1cfc(%rsp)
movl 0x1d00(%rsp), %r8d
movl 0x1d04(%rsp), %edi
movl 0x1d08(%rsp), %esi
movl 0x1d10(%rsp), %edx
movl 0x1d14(%rsp), %ecx
movl 0x1d18(%rsp), %eax
vmovd 0x1cfc(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x1d0c(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x1cd0(%rsp)
vmovdqa %xmm0, 0x1cc0(%rsp)
vmovaps 0x1cc0(%rsp), %ymm0
vmovaps %ymm1, 0x1120(%rsp)
vmovaps %ymm0, 0x1100(%rsp)
vmovaps 0x1120(%rsp), %ymm0
vmovaps 0x1100(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x2c0(%rsp)
vmovaps 0x2a0(%rsp), %ymm1
movl $0xffff, 0x1c5c(%rsp) # imm = 0xFFFF
movl 0x1c5c(%rsp), %eax
movl %eax, 0x1c(%rsp)
movl %eax, 0x1cb8(%rsp)
movl %eax, 0x1cb4(%rsp)
movl %eax, 0x1cb0(%rsp)
movl %eax, 0x1cac(%rsp)
movl %eax, 0x1ca8(%rsp)
movl %eax, 0x1ca4(%rsp)
movl %eax, 0x1ca0(%rsp)
movl %eax, 0x1c9c(%rsp)
movl 0x1ca0(%rsp), %r8d
movl 0x1ca4(%rsp), %edi
movl 0x1ca8(%rsp), %esi
movl 0x1cb0(%rsp), %edx
movl 0x1cb4(%rsp), %ecx
movl 0x1cb8(%rsp), %eax
vmovd 0x1c9c(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x1cac(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x1c70(%rsp)
vmovdqa %xmm0, 0x1c60(%rsp)
vmovaps 0x1c60(%rsp), %ymm0
vmovaps %ymm1, 0x10e0(%rsp)
vmovaps %ymm0, 0x10c0(%rsp)
vmovaps 0x10e0(%rsp), %ymm0
vmovaps 0x10c0(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x2a0(%rsp)
vmovaps 0x300(%rsp), %ymm1
vmovaps 0x2e0(%rsp), %ymm0
vmovaps %ymm1, 0x1e20(%rsp)
vmovaps %ymm0, 0x1e00(%rsp)
vmovaps 0x1e20(%rsp), %ymm0
vmovaps 0x1e00(%rsp), %ymm1
vpackusdw %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x280(%rsp)
vmovaps 0x2c0(%rsp), %ymm1
vmovaps 0x2a0(%rsp), %ymm0
vmovaps %ymm1, 0x1de0(%rsp)
vmovaps %ymm0, 0x1dc0(%rsp)
vmovaps 0x1de0(%rsp), %ymm0
vmovaps 0x1dc0(%rsp), %ymm1
vpackusdw %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x260(%rsp)
vmovaps 0x280(%rsp), %ymm0
vpermq $0xd8, %ymm0, %ymm0     # ymm0 = ymm0[0,2,1,3]
vmovaps %ymm0, 0x280(%rsp)
vmovaps 0x260(%rsp), %ymm0
vpermq $0xd8, %ymm0, %ymm0     # ymm0 = ymm0[0,2,1,3]
vmovaps %ymm0, 0x260(%rsp)
vmovdqa 0x270(%rsp), %xmm0
vmovdqa %xmm0, 0x250(%rsp)
movq 0x900(%rsp), %rax
addq $-0x10, %rax
vmovdqa 0x250(%rsp), %xmm0
movq %rax, 0x1ec0(%rsp)
vmovdqa %xmm0, 0x1eb0(%rsp)
vmovdqa 0x1eb0(%rsp), %xmm0
movq 0x1ec0(%rsp), %rax
vmovdqu %xmm0, (%rax)
movl 0x3b0(%rsp), %eax
movl %eax, 0x1ed8(%rsp)
popcntl 0x1ed8(%rsp), %ecx
movq 0x900(%rsp), %rax
addl %ecx, %ecx
subq %rcx, %rax
movq %rax, 0x900(%rsp)
vmovdqa 0x260(%rsp), %xmm0
vmovdqa %xmm0, 0x250(%rsp)
movq 0x900(%rsp), %rax
addq $-0x10, %rax
vmovdqa 0x250(%rsp), %xmm0
movq %rax, 0x1ea8(%rsp)
vmovdqa %xmm0, 0x1e90(%rsp)
vmovdqa 0x1e90(%rsp), %xmm0
movq 0x1ea8(%rsp), %rax
vmovdqu %xmm0, (%rax)
movl 0x3b4(%rsp), %eax
movl %eax, 0x1ed4(%rsp)
popcntl 0x1ed4(%rsp), %ecx
movq 0x900(%rsp), %rax
addl %ecx, %ecx
subq %rcx, %rax
movq %rax, 0x900(%rsp)
vmovdqa 0x290(%rsp), %xmm0
vmovdqa %xmm0, 0x250(%rsp)
movq 0x900(%rsp), %rax
addq $-0x10, %rax
vmovdqa 0x250(%rsp), %xmm0
movq %rax, 0x1e88(%rsp)
vmovdqa %xmm0, 0x1e70(%rsp)
vmovdqa 0x1e70(%rsp), %xmm0
movq 0x1e88(%rsp), %rax
vmovdqu %xmm0, (%rax)
movl 0x3b8(%rsp), %eax
movl %eax, 0x1ed0(%rsp)
popcntl 0x1ed0(%rsp), %ecx
movq 0x900(%rsp), %rax
addl %ecx, %ecx
subq %rcx, %rax
movq %rax, 0x900(%rsp)
vmovdqa 0x280(%rsp), %xmm0
vmovdqa %xmm0, 0x250(%rsp)
movq 0x900(%rsp), %rax
addq $-0x10, %rax
vmovdqa 0x250(%rsp), %xmm0
movq %rax, 0x1e68(%rsp)
vmovdqa %xmm0, 0x1e50(%rsp)
vmovdqa 0x1e50(%rsp), %xmm0
movq 0x1e68(%rsp), %rax
vmovdqu %xmm0, (%rax)
movl 0x3bc(%rsp), %eax
movl %eax, 0x1ecc(%rsp)
popcntl 0x1ecc(%rsp), %ecx
movq 0x900(%rsp), %rax
addl %ecx, %ecx
subq %rcx, %rax
movq %rax, 0x900(%rsp)
vmovaps 0x8e0(%rsp), %ymm0
vmovaps %ymm0, 0x20a0(%rsp)
movl $0x10, 0x209c(%rsp)
vmovaps 0x20a0(%rsp), %ymm0
vmovd 0x209c(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x220(%rsp)
vmovaps 0x8c0(%rsp), %ymm0
vmovaps %ymm0, 0x2060(%rsp)
movl $0x10, 0x205c(%rsp)
vmovaps 0x2060(%rsp), %ymm0
vmovd 0x205c(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x200(%rsp)
vmovaps 0x8a0(%rsp), %ymm0
vmovaps %ymm0, 0x2020(%rsp)
movl $0x10, 0x201c(%rsp)
vmovaps 0x2020(%rsp), %ymm0
vmovd 0x201c(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x1e0(%rsp)
vmovaps 0x880(%rsp), %ymm0
vmovaps %ymm0, 0x1fe0(%rsp)
movl $0x10, 0x1fdc(%rsp)
vmovaps 0x1fe0(%rsp), %ymm0
vmovd 0x1fdc(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x1c0(%rsp)
vmovaps 0x8e0(%rsp), %ymm2
vmovaps 0x220(%rsp), %ymm1
vmovaps 0x420(%rsp), %ymm0
vmovaps %ymm2, 0x2220(%rsp)
vmovaps %ymm1, 0x2200(%rsp)
vmovaps %ymm0, 0x21e0(%rsp)
vmovaps 0x2220(%rsp), %ymm0
vmovaps 0x2200(%rsp), %ymm1
vmovaps 0x21e0(%rsp), %ymm2
vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x8e0(%rsp)
vmovaps 0x8c0(%rsp), %ymm2
vmovaps 0x200(%rsp), %ymm1
vmovaps 0x400(%rsp), %ymm0
vmovaps %ymm2, 0x21c0(%rsp)
vmovaps %ymm1, 0x21a0(%rsp)
vmovaps %ymm0, 0x2180(%rsp)
vmovaps 0x21c0(%rsp), %ymm0
vmovaps 0x21a0(%rsp), %ymm1
vmovaps 0x2180(%rsp), %ymm2
vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x8c0(%rsp)
vmovaps 0x8a0(%rsp), %ymm2
vmovaps 0x1e0(%rsp), %ymm1
vmovaps 0x3e0(%rsp), %ymm0
vmovaps %ymm2, 0x2160(%rsp)
vmovaps %ymm1, 0x2140(%rsp)
vmovaps %ymm0, 0x2120(%rsp)
vmovaps 0x2160(%rsp), %ymm0
vmovaps 0x2140(%rsp), %ymm1
vmovaps 0x2120(%rsp), %ymm2
vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x8a0(%rsp)
vmovaps 0x880(%rsp), %ymm2
vmovaps 0x1c0(%rsp), %ymm1
vmovaps 0x3c0(%rsp), %ymm0
vmovaps %ymm2, 0x2100(%rsp)
vmovaps %ymm1, 0x20e0(%rsp)
vmovaps %ymm0, 0x20c0(%rsp)
vmovaps 0x2100(%rsp), %ymm0
vmovaps 0x20e0(%rsp), %ymm1
vmovaps 0x20c0(%rsp), %ymm2
vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x880(%rsp)
vmovaps 0x8e0(%rsp), %ymm0
vmovaps 0x780(%rsp), %ymm1
callq 0x99f70
vmovaps %ymm0, 0x780(%rsp)
vmovaps 0x8c0(%rsp), %ymm0
vmovaps 0x7a0(%rsp), %ymm1
callq 0x99f70
vmovaps %ymm0, 0x7a0(%rsp)
vmovaps 0x8a0(%rsp), %ymm0
vmovaps 0x7c0(%rsp), %ymm1
callq 0x99f70
vmovaps %ymm0, 0x7c0(%rsp)
vmovaps 0x880(%rsp), %ymm0
vmovaps 0x7e0(%rsp), %ymm1
callq 0x99f70
vmovaps %ymm0, 0x7e0(%rsp)
vmovaps 0x700(%rsp), %ymm0
vmovaps %ymm0, 0x1fa0(%rsp)
movl $0x10, 0x1f9c(%rsp)
vmovaps 0x1fa0(%rsp), %ymm0
vmovd 0x1f9c(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x1a0(%rsp)
vmovaps 0x720(%rsp), %ymm0
vmovaps %ymm0, 0x1f60(%rsp)
movl $0x10, 0x1f5c(%rsp)
vmovaps 0x1f60(%rsp), %ymm0
vmovd 0x1f5c(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x180(%rsp)
vmovaps 0x740(%rsp), %ymm0
vmovaps %ymm0, 0x1f20(%rsp)
movl $0x10, 0x1f1c(%rsp)
vmovaps 0x1f20(%rsp), %ymm0
vmovd 0x1f1c(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x160(%rsp)
vmovaps 0x760(%rsp), %ymm0
vmovaps %ymm0, 0x1ee0(%rsp)
movl $0x10, 0x1edc(%rsp)
vmovaps 0x1ee0(%rsp), %ymm0
vmovd 0x1edc(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x140(%rsp)
vmovaps 0x1a0(%rsp), %ymm1
movl $0x20, 0x1bfc(%rsp)
movl 0x1bfc(%rsp), %eax
movl %eax, 0x20(%rsp)
movl %eax, 0x1c58(%rsp)
movl %eax, 0x1c54(%rsp)
movl %eax, 0x1c50(%rsp)
movl %eax, 0x1c4c(%rsp)
movl %eax, 0x1c48(%rsp)
movl %eax, 0x1c44(%rsp)
movl %eax, 0x1c40(%rsp)
movl %eax, 0x1c3c(%rsp)
movl 0x1c40(%rsp), %r8d
movl 0x1c44(%rsp), %edi
movl 0x1c48(%rsp), %esi
movl 0x1c50(%rsp), %edx
movl 0x1c54(%rsp), %ecx
movl 0x1c58(%rsp), %eax
vmovd 0x1c3c(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x1c4c(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x1c10(%rsp)
vmovdqa %xmm0, 0x1c00(%rsp)
vmovaps 0x1c00(%rsp), %ymm0
vmovaps %ymm1, 0x2320(%rsp)
vmovaps %ymm0, 0x2300(%rsp)
vmovaps 0x2320(%rsp), %ymm0
vmovaps 0x2300(%rsp), %ymm1
vpsubd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x1a0(%rsp)
vmovaps 0x180(%rsp), %ymm1
movl $0x20, 0x1b9c(%rsp)
movl 0x1b9c(%rsp), %eax
movl %eax, 0x24(%rsp)
movl %eax, 0x1bf8(%rsp)
movl %eax, 0x1bf4(%rsp)
movl %eax, 0x1bf0(%rsp)
movl %eax, 0x1bec(%rsp)
movl %eax, 0x1be8(%rsp)
movl %eax, 0x1be4(%rsp)
movl %eax, 0x1be0(%rsp)
movl %eax, 0x1bdc(%rsp)
movl 0x1be0(%rsp), %r8d
movl 0x1be4(%rsp), %edi
movl 0x1be8(%rsp), %esi
movl 0x1bf0(%rsp), %edx
movl 0x1bf4(%rsp), %ecx
movl 0x1bf8(%rsp), %eax
vmovd 0x1bdc(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x1bec(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x1bb0(%rsp)
vmovdqa %xmm0, 0x1ba0(%rsp)
vmovaps 0x1ba0(%rsp), %ymm0
vmovaps %ymm1, 0x22e0(%rsp)
vmovaps %ymm0, 0x22c0(%rsp)
vmovaps 0x22e0(%rsp), %ymm0
vmovaps 0x22c0(%rsp), %ymm1
vpsubd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x180(%rsp)
vmovaps 0x160(%rsp), %ymm1
movl $0x20, 0x1b3c(%rsp)
movl 0x1b3c(%rsp), %eax
movl %eax, 0x28(%rsp)
movl %eax, 0x1b98(%rsp)
movl %eax, 0x1b94(%rsp)
movl %eax, 0x1b90(%rsp)
movl %eax, 0x1b8c(%rsp)
movl %eax, 0x1b88(%rsp)
movl %eax, 0x1b84(%rsp)
movl %eax, 0x1b80(%rsp)
movl %eax, 0x1b7c(%rsp)
movl 0x1b80(%rsp), %r8d
movl 0x1b84(%rsp), %edi
movl 0x1b88(%rsp), %esi
movl 0x1b90(%rsp), %edx
movl 0x1b94(%rsp), %ecx
movl 0x1b98(%rsp), %eax
vmovd 0x1b7c(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x1b8c(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x1b50(%rsp)
vmovdqa %xmm0, 0x1b40(%rsp)
vmovaps 0x1b40(%rsp), %ymm0
vmovaps %ymm1, 0x22a0(%rsp)
vmovaps %ymm0, 0x2280(%rsp)
vmovaps 0x22a0(%rsp), %ymm0
vmovaps 0x2280(%rsp), %ymm1
vpsubd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x160(%rsp)
vmovaps 0x140(%rsp), %ymm1
movl $0x20, 0x1adc(%rsp)
movl 0x1adc(%rsp), %eax
movl %eax, 0x2c(%rsp)
movl %eax, 0x1b38(%rsp)
movl %eax, 0x1b34(%rsp)
movl %eax, 0x1b30(%rsp)
movl %eax, 0x1b2c(%rsp)
movl %eax, 0x1b28(%rsp)
movl %eax, 0x1b24(%rsp)
movl %eax, 0x1b20(%rsp)
movl %eax, 0x1b1c(%rsp)
movl 0x1b20(%rsp), %r8d
movl 0x1b24(%rsp), %edi
movl 0x1b28(%rsp), %esi
movl 0x1b30(%rsp), %edx
movl 0x1b34(%rsp), %ecx
movl 0x1b38(%rsp), %eax
vmovd 0x1b1c(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x1b2c(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x1af0(%rsp)
vmovdqa %xmm0, 0x1ae0(%rsp)
vmovaps 0x1ae0(%rsp), %ymm0
vmovaps %ymm1, 0x2260(%rsp)
vmovaps %ymm0, 0x2240(%rsp)
vmovaps 0x2260(%rsp), %ymm0
vmovaps 0x2240(%rsp), %ymm1
vpsubd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x140(%rsp)
vmovaps 0x780(%rsp), %ymm1
vmovaps 0x1a0(%rsp), %ymm0
vmovaps %ymm1, 0x2420(%rsp)
vmovaps %ymm0, 0x2400(%rsp)
vmovaps 0x2420(%rsp), %ymm0
vmovaps 0x2400(%rsp), %ymm1
vpsrlvd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x120(%rsp)
vmovaps 0x7a0(%rsp), %ymm1
vmovaps 0x180(%rsp), %ymm0
vmovaps %ymm1, 0x23e0(%rsp)
vmovaps %ymm0, 0x23c0(%rsp)
vmovaps 0x23e0(%rsp), %ymm0
vmovaps 0x23c0(%rsp), %ymm1
vpsrlvd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x100(%rsp)
vmovaps 0x700(%rsp), %ymm1
movl $0xffff, 0x1a7c(%rsp) # imm = 0xFFFF
movl 0x1a7c(%rsp), %eax
movl %eax, 0x30(%rsp)
movl %eax, 0x1ad8(%rsp)
movl %eax, 0x1ad4(%rsp)
movl %eax, 0x1ad0(%rsp)
movl %eax, 0x1acc(%rsp)
movl %eax, 0x1ac8(%rsp)
movl %eax, 0x1ac4(%rsp)
movl %eax, 0x1ac0(%rsp)
movl %eax, 0x1abc(%rsp)
movl 0x1ac0(%rsp), %r8d
movl 0x1ac4(%rsp), %edi
movl 0x1ac8(%rsp), %esi
movl 0x1ad0(%rsp), %edx
movl 0x1ad4(%rsp), %ecx
movl 0x1ad8(%rsp), %eax
vmovd 0x1abc(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x1acc(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x1a90(%rsp)
vmovdqa %xmm0, 0x1a80(%rsp)
vmovaps 0x1a80(%rsp), %ymm0
vmovaps %ymm1, 0x10a0(%rsp)
vmovaps %ymm0, 0x1080(%rsp)
vmovaps 0x10a0(%rsp), %ymm0
vmovaps 0x1080(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0xe0(%rsp)
vmovaps 0x720(%rsp), %ymm1
movl $0xffff, 0x1a1c(%rsp) # imm = 0xFFFF
movl 0x1a1c(%rsp), %eax
movl %eax, 0x34(%rsp)
movl %eax, 0x1a78(%rsp)
movl %eax, 0x1a74(%rsp)
movl %eax, 0x1a70(%rsp)
movl %eax, 0x1a6c(%rsp)
movl %eax, 0x1a68(%rsp)
movl %eax, 0x1a64(%rsp)
movl %eax, 0x1a60(%rsp)
movl %eax, 0x1a5c(%rsp)
movl 0x1a60(%rsp), %r8d
movl 0x1a64(%rsp), %edi
movl 0x1a68(%rsp), %esi
movl 0x1a70(%rsp), %edx
movl 0x1a74(%rsp), %ecx
movl 0x1a78(%rsp), %eax
vmovd 0x1a5c(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x1a6c(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x1a30(%rsp)
vmovdqa %xmm0, 0x1a20(%rsp)
vmovaps 0x1a20(%rsp), %ymm0
vmovaps %ymm1, 0x1060(%rsp)
vmovaps %ymm0, 0x1040(%rsp)
vmovaps 0x1060(%rsp), %ymm0
vmovaps 0x1040(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0xc0(%rsp)
vmovaps 0x120(%rsp), %ymm1
vmovaps 0xe0(%rsp), %ymm0
vmovaps %ymm1, 0x2520(%rsp)
vmovaps %ymm0, 0x2500(%rsp)
vmovaps 0x2520(%rsp), %ymm0
vmovaps 0x2500(%rsp), %ymm1
vpmulld %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x120(%rsp)
vmovaps 0x100(%rsp), %ymm1
vmovaps 0xc0(%rsp), %ymm0
vmovaps %ymm1, 0x24e0(%rsp)
vmovaps %ymm0, 0x24c0(%rsp)
vmovaps 0x24e0(%rsp), %ymm0
vmovaps 0x24c0(%rsp), %ymm1
vpmulld %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x100(%rsp)
vmovaps 0x7c0(%rsp), %ymm1
vmovaps 0x160(%rsp), %ymm0
vmovaps %ymm1, 0x23a0(%rsp)
vmovaps %ymm0, 0x2380(%rsp)
vmovaps 0x23a0(%rsp), %ymm0
vmovaps 0x2380(%rsp), %ymm1
vpsrlvd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0xa0(%rsp)
vmovaps 0x7e0(%rsp), %ymm1
vmovaps 0x140(%rsp), %ymm0
vmovaps %ymm1, 0x2360(%rsp)
vmovaps %ymm0, 0x2340(%rsp)
vmovaps 0x2360(%rsp), %ymm0
vmovaps 0x2340(%rsp), %ymm1
vpsrlvd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x80(%rsp)
vmovaps 0x740(%rsp), %ymm1
movl $0xffff, 0x19bc(%rsp) # imm = 0xFFFF
movl 0x19bc(%rsp), %eax
movl %eax, 0x38(%rsp)
movl %eax, 0x1a18(%rsp)
movl %eax, 0x1a14(%rsp)
movl %eax, 0x1a10(%rsp)
movl %eax, 0x1a0c(%rsp)
movl %eax, 0x1a08(%rsp)
movl %eax, 0x1a04(%rsp)
movl %eax, 0x1a00(%rsp)
movl %eax, 0x19fc(%rsp)
movl 0x1a00(%rsp), %r8d
movl 0x1a04(%rsp), %edi
movl 0x1a08(%rsp), %esi
movl 0x1a10(%rsp), %edx
movl 0x1a14(%rsp), %ecx
movl 0x1a18(%rsp), %eax
vmovd 0x19fc(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x1a0c(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x19d0(%rsp)
vmovdqa %xmm0, 0x19c0(%rsp)
vmovaps 0x19c0(%rsp), %ymm0
vmovaps %ymm1, 0x1020(%rsp)
vmovaps %ymm0, 0x1000(%rsp)
vmovaps 0x1020(%rsp), %ymm0
vmovaps 0x1000(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x60(%rsp)
vmovaps 0x760(%rsp), %ymm1
movl $0xffff, 0x195c(%rsp) # imm = 0xFFFF
movl 0x195c(%rsp), %eax
movl %eax, 0x3c(%rsp)
movl %eax, 0x19b8(%rsp)
movl %eax, 0x19b4(%rsp)
movl %eax, 0x19b0(%rsp)
movl %eax, 0x19ac(%rsp)
movl %eax, 0x19a8(%rsp)
movl %eax, 0x19a4(%rsp)
movl %eax, 0x19a0(%rsp)
movl %eax, 0x199c(%rsp)
movl 0x19a0(%rsp), %edx
movl 0x19a4(%rsp), %ecx
movl 0x19a8(%rsp), %eax
movl 0x19b0(%rsp), %r8d
movl 0x19b4(%rsp), %edi
movl 0x19b8(%rsp), %esi
vmovd 0x19ac(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm2
vmovd 0x199c(%rsp), %xmm0
vpinsrd $0x1, %edx, %xmm0, %xmm0
vpinsrd $0x2, %ecx, %xmm0, %xmm0
vpinsrd $0x3, %eax, %xmm0, %xmm3
vmovaps %xmm3, %xmm0
vinserti128 $0x1, %xmm2, %ymm0, %ymm0
vmovdqa %ymm0, 0x1960(%rsp)
vmovdqa 0x1960(%rsp), %ymm0
vmovdqa %ymm1, 0xfe0(%rsp)
vmovdqa %ymm0, 0xfc0(%rsp)
vmovdqa 0xfe0(%rsp), %ymm0
vpand 0xfc0(%rsp), %ymm0, %ymm0
vmovdqa %ymm0, 0x40(%rsp)
vmovdqa 0xa0(%rsp), %ymm1
vmovdqa 0x60(%rsp), %ymm0
vmovdqa %ymm1, 0x24a0(%rsp)
vmovdqa %ymm0, 0x2480(%rsp)
vmovdqa 0x24a0(%rsp), %ymm0
vmovdqa 0x2480(%rsp), %ymm1
vpmulld %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0xa0(%rsp)
vmovdqa 0x80(%rsp), %ymm1
vmovdqa 0x40(%rsp), %ymm0
vmovdqa %ymm1, 0x2460(%rsp)
vmovdqa %ymm0, 0x2440(%rsp)
vmovdqa 0x2460(%rsp), %ymm0
vmovdqa 0x2440(%rsp), %ymm1
vpmulld %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x80(%rsp)
vmovdqa 0x120(%rsp), %ymm1
vmovdqa 0x680(%rsp), %ymm0
vmovdqa %ymm1, 0x2720(%rsp)
vmovdqa %ymm0, 0x2700(%rsp)
vmovdqa 0x2720(%rsp), %ymm0
vmovdqa 0x2700(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x120(%rsp)
vmovdqa 0x100(%rsp), %ymm1
vmovdqa 0x6a0(%rsp), %ymm0
vmovdqa %ymm1, 0x26e0(%rsp)
vmovdqa %ymm0, 0x26c0(%rsp)
vmovdqa 0x26e0(%rsp), %ymm0
vmovdqa 0x26c0(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x100(%rsp)
vmovdqa 0xa0(%rsp), %ymm1
vmovdqa 0x6c0(%rsp), %ymm0
vmovdqa %ymm1, 0x26a0(%rsp)
vmovdqa %ymm0, 0x2680(%rsp)
vmovdqa 0x26a0(%rsp), %ymm0
vmovdqa 0x2680(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0xa0(%rsp)
vmovdqa 0x80(%rsp), %ymm1
vmovdqa 0x6e0(%rsp), %ymm0
vmovdqa %ymm1, 0x2660(%rsp)
vmovdqa %ymm0, 0x2640(%rsp)
vmovdqa 0x2660(%rsp), %ymm0
vmovdqa 0x2640(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x80(%rsp)
movl $0x0, 0xa74(%rsp)
cmpl $0x20, 0xa74(%rsp)
jge 0x9f7fe
movslq 0xa74(%rsp), %rax
movl 0x940(%rsp,%rax,4), %ecx
addl $-0x1, %ecx
movl %ecx, 0x940(%rsp,%rax,4)
movl 0xa74(%rsp), %eax
addl $0x1, %eax
movl %eax, 0xa74(%rsp)
jmp 0x9f7c8
vmovdqa 0x8e0(%rsp), %ymm1
vmovdqa 0x120(%rsp), %ymm0
vmovdqa %ymm1, 0x2620(%rsp)
vmovdqa %ymm0, 0x2600(%rsp)
vmovdqa 0x2620(%rsp), %ymm0
vmovdqa 0x2600(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x8e0(%rsp)
vmovdqa 0x8c0(%rsp), %ymm1
vmovdqa 0x100(%rsp), %ymm0
vmovdqa %ymm1, 0x25e0(%rsp)
vmovdqa %ymm0, 0x25c0(%rsp)
vmovdqa 0x25e0(%rsp), %ymm0
vmovdqa 0x25c0(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x8c0(%rsp)
vmovdqa 0x8a0(%rsp), %ymm1
vmovdqa 0xa0(%rsp), %ymm0
vmovdqa %ymm1, 0x25a0(%rsp)
vmovdqa %ymm0, 0x2580(%rsp)
vmovdqa 0x25a0(%rsp), %ymm0
vmovdqa 0x2580(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x8a0(%rsp)
vmovdqa 0x880(%rsp), %ymm1
vmovdqa 0x80(%rsp), %ymm0
vmovdqa %ymm1, 0x2560(%rsp)
vmovdqa %ymm0, 0x2540(%rsp)
vmovdqa 0x2560(%rsp), %ymm0
vmovdqa 0x2540(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x880(%rsp)
jmp 0x9cdb9
leaq 0x9e0(%rsp), %rax
vmovdqa 0x8e0(%rsp), %ymm0
movq %rax, 0x2828(%rsp)
vmovdqa %ymm0, 0x2800(%rsp)
vmovdqa 0x2800(%rsp), %ymm0
movq 0x2828(%rsp), %rax
vmovdqa %ymm0, (%rax)
leaq 0x9e0(%rsp), %rax
addq $0x20, %rax
vmovdqa 0x8c0(%rsp), %ymm0
movq %rax, 0x27f8(%rsp)
vmovdqa %ymm0, 0x27c0(%rsp)
vmovdqa 0x27c0(%rsp), %ymm0
movq 0x27f8(%rsp), %rax
vmovdqa %ymm0, (%rax)
leaq 0x9e0(%rsp), %rax
addq $0x40, %rax
vmovdqa 0x8a0(%rsp), %ymm0
movq %rax, 0x27b8(%rsp)
vmovdqa %ymm0, 0x2780(%rsp)
vmovdqa 0x2780(%rsp), %ymm0
movq 0x27b8(%rsp), %rax
vmovdqa %ymm0, (%rax)
leaq 0x9e0(%rsp), %rax
addq $0x60, %rax
vmovdqa 0x880(%rsp), %ymm0
movq %rax, 0x2778(%rsp)
vmovdqa %ymm0, 0x2740(%rsp)
vmovdqa 0x2740(%rsp), %ymm0
movq 0x2778(%rsp), %rax
vmovdqa %ymm0, (%rax)
movq 0x900(%rsp), %rax
movq %rax, 0x9c8(%rsp)
movl $0x1f, 0xa74(%rsp)
cmpl $0x0, 0xa74(%rsp)
jl 0x9fa75
movslq 0xa74(%rsp), %rax
leaq 0x9e0(%rsp), %rdi
shlq $0x2, %rax
addq %rax, %rdi
movq 0x9d8(%rsp), %rdx
movslq 0xa74(%rsp), %rax
movzbl 0x910(%rsp,%rax), %eax
shlq $0x4, %rax
addq %rax, %rdx
leaq 0x9c8(%rsp), %rsi
vzeroupper
callq 0x99eb0
movl 0xa74(%rsp), %eax
addl $-0x1, %eax
movl %eax, 0xa74(%rsp)
jmp 0x9fa12
movl $0x1f, 0xa74(%rsp)
cmpl $0x0, 0xa74(%rsp)
jl 0x9fac4
movslq 0xa74(%rsp), %rax
leaq 0x9e0(%rsp), %rdi
shlq $0x2, %rax
addq %rax, %rdi
leaq 0x9c8(%rsp), %rsi
vzeroupper
callq 0x9a0a0
movl 0xa74(%rsp), %eax
addl $-0x1, %eax
movl %eax, 0xa74(%rsp)
jmp 0x9fa80
movq 0xa88(%rsp), %rax
movq 0x9c8(%rsp), %rcx
subq %rcx, %rax
movl 0xa7c(%rsp), %ecx
addq %rcx, %rax
movl %eax, %ecx
movq 0xa98(%rsp), %rax
movl %ecx, (%rax)
movq 0xaa0(%rsp), %rax
movq %rax, 0xa90(%rsp)
movq 0xaa0(%rsp), %rdi
movl 0xa7c(%rsp), %eax
addq %rax, %rdi
movq 0x9c8(%rsp), %rsi
movq 0xa88(%rsp), %rdx
movq 0x9c8(%rsp), %rax
subq %rax, %rdx
vzeroupper
callq 0x4810
movq 0x9d8(%rsp), %rdi
callq 0xce8f0
movq 0xaa0(%rsp), %rax
movq %rax, 0xab8(%rsp)
movq 0xab8(%rsp), %rax
movq %rbp, %rsp
popq %rbp
retq
nopl (%rax)