// File: /workspace/github_c_makefile_star2_O0/tstword[P]MIPSAssemblerC/src/assembler.c
// Function: assemble_opcode_instruction
int assemble_opcode_instruction(struct instruction_node *instr) {
    struct opcode_entry *entry = (struct opcode_entry *)instr->mnemonic->attrptr;
    
    int assemble_status = 1; /* Assume instruction is assembled */

    switch(entry - opcode_table) {
        case MNEMONIC_ADDI:
        case MNEMONIC_ADDIU:
        case MNEMONIC_SLTI:
        case MNEMONIC_SLTIU: { /* ALU OP */
            struct operand_node *rt = instr->operand_list;
            struct operand_node *rs = instr->operand_list->next;
            struct operand_node *imm = instr->operand_list->next->next;
            int immediate = imm->value.integer; /* Temporary fix, still figuring out how to handle this generally */

            if(((immediate >> 15) & 0x1FFFF) != 0x1FFFF && ((immediate >> 15) & 0x1FFFF) != 0x00000) {
                /* 32-bit sign extended or unsigned value */
                write_instruction(CREATE_INSTRUCTION_I(0x0F, 0, 1, (immediate >> 16)));
                write_instruction(CREATE_INSTRUCTION_I(0x0D, 1, 1, immediate));
                write_instruction(CREATE_INSTRUCTION_R(0, rs->value.reg, 1, rt->value.reg, 0, entry->opcode + 0x18));
            }
            else {
                write_instruction(CREATE_INSTRUCTION_I(entry->opcode, rs->value.reg, rt->value.reg, imm->value.integer));
            }
            break;
        }

        case MNEMONIC_ANDI:
        case MNEMONIC_ORI:
        case MNEMONIC_XORI: { /* ALU OP */
            struct operand_node *rt = instr->operand_list;
            struct operand_node *rs = instr->operand_list->next;
            struct operand_node *imm = instr->operand_list->next->next;
            int immediate = imm->value.integer; /* Temporary fix, still figuring out how to handle this generally */

            if(((immediate >> 16) & 0xFFFF) != 0x0000) {
                /* 32-bit sign extended or unsigned value */
                write_instruction(CREATE_INSTRUCTION_I(0x0F, 0, 1, (immediate >> 16)));
                write_instruction(CREATE_INSTRUCTION_I(0x0D, 1, 1, immediate));
                write_instruction(CREATE_INSTRUCTION_R(0, rs->value.reg, 1, rt->value.reg, 0, entry->opcode + 0x18));
            }
            else {
                write_instruction(CREATE_INSTRUCTION_I(entry->opcode, rs->value.reg, rt->value.reg, imm->value.integer));
            }
            break;
        }

        case MNEMONIC_LUI: {
            struct operand_node *rd = instr->operand_list;
            struct operand_node *imm = instr->operand_list->next;
            uint32_t immediate = imm->value.integer;
            write_instruction(CREATE_INSTRUCTION_I(entry->opcode, 0, rd->value.reg, immediate));
            break;
        }

        case MNEMONIC_BGEZ:
        case MNEMONIC_BGEZAL:
        case MNEMONIC_BLTZ:
        case MNEMONIC_BLTZAL:
        case MNEMONIC_BGTZ:
        case MNEMONIC_BLEZ: {
            struct operand_node *rs = instr->operand_list;
            struct operand_node *label = instr->operand_list->next;
            /* Check if label has been defined */
            struct symbol_table_entry *sym_entry = get_symbol_table(cfg_assembler->symbol_table, label->identifier);
            if(sym_entry->status == SYMBOL_UNDEFINED) {
                insert_front(sym_entry->instr_list, (void *)instr);
                assemble_status = 0;
            }
            else {
                write_instruction(CREATE_INSTRUCTION_I(entry->opcode, rs->value.reg, entry->rt, get_branch_offset(sym_entry)));
            }   
            break;
        }

        case MNEMONIC_BNE:
        case MNEMONIC_BEQ: {
            struct operand_node *rs = instr->operand_list;
            struct operand_node *rt = instr->operand_list->next;
            struct operand_node *label = instr->operand_list->next->next;
            int rt_imm = rt->operand & OPERAND_IMMEDIATE;

            /* TO-DO: Determine a way to distinguish between positive and negative integers (32-bit) */

            /* Check if label has been defined */
            struct symbol_table_entry *sym_entry = get_symbol_table(cfg_assembler->symbol_table, label->identifier);
            if(sym_entry->status == SYMBOL_UNDEFINED) {
                assemble_status = 0;
                if(rt_imm) incr_segment_offset(0x4); /* Special Case: Immediate operand requies extra instruction */
                insert_front(sym_entry->instr_list, (void *)instr);
            }
            else {
                if(rt_imm) {
                    write_instruction(CREATE_INSTRUCTION_I(0x08, 0, 1, rt->value.integer));
                    write_instruction(CREATE_INSTRUCTION_I(entry->opcode, 1, rs->value.reg, get_branch_offset(sym_entry)));
                }
                else {
                    write_instruction(CREATE_INSTRUCTION_I(entry->opcode, rs->value.reg, rt->value.reg, get_branch_offset(sym_entry)));
                }
            }
            break;
        }

        case MNEMONIC_JMP:
        case MNEMONIC_JAL: {
            struct operand_node *label = instr->operand_list;
            /* Check if label has been defined */
            struct symbol_table_entry *sym_entry = get_symbol_table(cfg_assembler->symbol_table, label->identifier);
            if(sym_entry->status == SYMBOL_UNDEFINED) {
                insert_front(sym_entry->instr_list, (void *)instr);
                assemble_status = 0;
            }
            else {
                write_instruction(CREATE_INSTRUCTION_J(entry->opcode, (sym_entry->offset >> 2)));   
            }
            break;
        }
        

        case MNEMONIC_LB:
        case MNEMONIC_LBU:
        case MNEMONIC_LH:
        case MNEMONIC_LHU:
        case MNEMONIC_LW: 
        case MNEMONIC_SB: 
        case MNEMONIC_SH:
        case MNEMONIC_SW: {
            struct operand_node *rt = instr->operand_list;
            struct operand_node *addr = instr->operand_list->next;
            if(addr->operand == OPERAND_LABEL) {
                struct symbol_table_entry *sym_entry = get_symbol_table(cfg_assembler->symbol_table, addr->identifier);
                if(sym_entry->status == SYMBOL_UNDEFINED) {
                    insert_front(sym_entry->instr_list, (void *)instr);
                    incr_segment_offset(0x4); /* Special Case: Psuedo instruction requires 8 bytes */
                    assemble_status = 0;
                }
                else {
                    write_instruction(CREATE_INSTRUCTION_I(0x0F, 0, 1, (sym_entry->offset >> 16)));
                    write_instruction(CREATE_INSTRUCTION_I(entry->opcode, 1, rt->value.reg, sym_entry->offset));
                }
            } 
            else {
                write_instruction(CREATE_INSTRUCTION_I(entry->opcode, addr->value.reg, rt->value.reg, addr->value.integer));
            }
            break;
        }

        case MNEMONIC_MUL: {
            struct operand_node *rd = instr->operand_list;
            struct operand_node *rs = instr->operand_list->next;
            struct operand_node *rt = instr->operand_list->next->next;
            write_instruction(CREATE_INSTRUCTION_R(entry->opcode, rs->value.reg, rt->value.reg, rd->value.reg, 0, entry->funct));
            break;
        }
    }

    if(!assemble_status) incr_segment_offset(0x4);

    return assemble_status;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x110, %rsp            # imm = 0x110
movq %rdi, -0x8(%rbp)
movq -0x8(%rbp), %rax
movq (%rax), %rax
movq 0x10(%rax), %rax
movq %rax, -0x10(%rbp)
movl $0x1, -0x14(%rbp)
movq -0x10(%rbp), %rax
leaq 0x8500(%rip), %rcx      # 0xe0d0
subq %rcx, %rax
sarq $0x3, %rax
addq $-0xd, %rax
movq %rax, -0xf8(%rbp)
subq $0x38, %rax
ja 0x6312
movq -0xf8(%rbp), %rax
leaq 0x471a(%rip), %rcx      # 0xa314
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq %rax, -0x20(%rbp)
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq 0x10(%rax), %rax
movq %rax, -0x28(%rbp)
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq 0x10(%rax), %rax
movq 0x10(%rax), %rax
movq %rax, -0x30(%rbp)
movq -0x30(%rbp), %rax
movl 0x8(%rax), %eax
movl %eax, -0x34(%rbp)
movl -0x34(%rbp), %eax
sarl $0xf, %eax
andl $0x1ffff, %eax          # imm = 0x1FFFF
cmpl $0x1ffff, %eax          # imm = 0x1FFFF
je 0x5cca
movl -0x34(%rbp), %eax
sarl $0xf, %eax
andl $0x1ffff, %eax          # imm = 0x1FFFF
cmpl $0x0, %eax
je 0x5cca
movl -0x34(%rbp), %edi
sarl $0x10, %edi
andl $0xffff, %edi           # imm = 0xFFFF
orl $0x3c010000, %edi       # imm = 0x3C010000
callq 0x37c0
movl -0x34(%rbp), %edi
andl $0xffff, %edi           # imm = 0xFFFF
orl $0x34210000, %edi       # imm = 0x34210000
callq 0x37c0
movq -0x28(%rbp), %rax
movzbl 0xd(%rax), %edi
andl $0x1f, %edi
shll $0x15, %edi
orl $0x0, %edi
orl $0x10000, %edi          # imm = 0x10000
movq -0x20(%rbp), %rax
movzbl 0xd(%rax), %eax
andl $0x1f, %eax
shll $0xb, %eax
orl %eax, %edi
orl $0x0, %edi
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
addl $0x18, %eax
andl $0x3f, %eax
orl %eax, %edi
callq 0x37c0
jmp 0x5d0d
movq -0x10(%rbp), %rax
movzbl (%rax), %edi
andl $0x3f, %edi
shll $0x1a, %edi
orl $0x0, %edi
movq -0x28(%rbp), %rax
movzbl 0xd(%rax), %eax
andl $0x1f, %eax
shll $0x15, %eax
orl %eax, %edi
movq -0x20(%rbp), %rax
movzbl 0xd(%rax), %eax
andl $0x1f, %eax
shll $0x10, %eax
orl %eax, %edi
movq -0x30(%rbp), %rax
movl 0x8(%rax), %eax
andl $0xffff, %eax           # imm = 0xFFFF
orl %eax, %edi
callq 0x37c0
jmp 0x6312
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq %rax, -0x40(%rbp)
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq 0x10(%rax), %rax
movq %rax, -0x48(%rbp)
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq 0x10(%rax), %rax
movq 0x10(%rax), %rax
movq %rax, -0x50(%rbp)
movq -0x50(%rbp), %rax
movl 0x8(%rax), %eax
movl %eax, -0x54(%rbp)
movl -0x54(%rbp), %eax
sarl $0x10, %eax
andl $0xffff, %eax           # imm = 0xFFFF
cmpl $0x0, %eax
je 0x5dc7
movl -0x54(%rbp), %edi
sarl $0x10, %edi
andl $0xffff, %edi           # imm = 0xFFFF
orl $0x3c010000, %edi       # imm = 0x3C010000
callq 0x37c0
movl -0x54(%rbp), %edi
andl $0xffff, %edi           # imm = 0xFFFF
orl $0x34210000, %edi       # imm = 0x34210000
callq 0x37c0
movq -0x48(%rbp), %rax
movzbl 0xd(%rax), %edi
andl $0x1f, %edi
shll $0x15, %edi
orl $0x0, %edi
orl $0x10000, %edi          # imm = 0x10000
movq -0x40(%rbp), %rax
movzbl 0xd(%rax), %eax
andl $0x1f, %eax
shll $0xb, %eax
orl %eax, %edi
orl $0x0, %edi
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
addl $0x18, %eax
andl $0x3f, %eax
orl %eax, %edi
callq 0x37c0
jmp 0x5e0a
movq -0x10(%rbp), %rax
movzbl (%rax), %edi
andl $0x3f, %edi
shll $0x1a, %edi
orl $0x0, %edi
movq -0x48(%rbp), %rax
movzbl 0xd(%rax), %eax
andl $0x1f, %eax
shll $0x15, %eax
orl %eax, %edi
movq -0x40(%rbp), %rax
movzbl 0xd(%rax), %eax
andl $0x1f, %eax
shll $0x10, %eax
orl %eax, %edi
movq -0x50(%rbp), %rax
movl 0x8(%rax), %eax
andl $0xffff, %eax           # imm = 0xFFFF
orl %eax, %edi
callq 0x37c0
jmp 0x6312
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq %rax, -0x60(%rbp)
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq 0x10(%rax), %rax
movq %rax, -0x68(%rbp)
movq -0x68(%rbp), %rax
movl 0x8(%rax), %eax
movl %eax, -0x6c(%rbp)
movq -0x10(%rbp), %rax
movzbl (%rax), %edi
andl $0x3f, %edi
shll $0x1a, %edi
orl $0x0, %edi
orl $0x0, %edi
movq -0x60(%rbp), %rax
movzbl 0xd(%rax), %eax
andl $0x1f, %eax
shll $0x10, %eax
orl %eax, %edi
movl -0x6c(%rbp), %eax
andl $0xffff, %eax           # imm = 0xFFFF
orl %eax, %edi
callq 0x37c0
jmp 0x6312
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq %rax, -0x78(%rbp)
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq 0x10(%rax), %rax
movq %rax, -0x80(%rbp)
movq 0x9719(%rip), %rax      # 0xf5a8
movq 0x10(%rax), %rdi
movq -0x80(%rbp), %rax
movq 0x8(%rax), %rsi
callq 0x7ef0
movq %rax, -0x88(%rbp)
movq -0x88(%rbp), %rax
movzbl 0x8(%rax), %eax
cmpl $0x0, %eax
jne 0x5ed4
movq -0x88(%rbp), %rax
movq 0x18(%rax), %rdi
movq -0x8(%rbp), %rsi
callq 0x7210
movl $0x0, -0x14(%rbp)
jmp 0x5f28
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
andl $0x3f, %eax
shll $0x1a, %eax
orl $0x0, %eax
movq -0x78(%rbp), %rcx
movzbl 0xd(%rcx), %ecx
andl $0x1f, %ecx
shll $0x15, %ecx
orl %ecx, %eax
movq -0x10(%rbp), %rcx
movzbl 0x2(%rcx), %ecx
andl $0x1f, %ecx
shll $0x10, %ecx
orl %ecx, %eax
movl %eax, -0xfc(%rbp)
movq -0x88(%rbp), %rdi
callq 0x38d0
movl -0xfc(%rbp), %edi
andl $0xffff, %eax           # imm = 0xFFFF
orl %eax, %edi
callq 0x37c0
jmp 0x6312
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq %rax, -0x90(%rbp)
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq 0x10(%rax), %rax
movq %rax, -0x98(%rbp)
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq 0x10(%rax), %rax
movq 0x10(%rax), %rax
movq %rax, -0xa0(%rbp)
movq -0x98(%rbp), %rax
movzbl (%rax), %eax
andl $0x2, %eax
movl %eax, -0xa4(%rbp)
movq 0x9628(%rip), %rax      # 0xf5a8
movq 0x10(%rax), %rdi
movq -0xa0(%rbp), %rax
movq 0x8(%rax), %rsi
callq 0x7ef0
movq %rax, -0xb0(%rbp)
movq -0xb0(%rbp), %rax
movzbl 0x8(%rax), %eax
cmpl $0x0, %eax
jne 0x5fde
movl $0x0, -0x14(%rbp)
cmpl $0x0, -0xa4(%rbp)
je 0x5fc5
movl $0x4, %edi
callq 0x3490
movq -0xb0(%rbp), %rax
movq 0x18(%rax), %rdi
movq -0x8(%rbp), %rsi
callq 0x7210
jmp 0x60ac
cmpl $0x0, -0xa4(%rbp)
je 0x6050
movq -0x98(%rbp), %rax
movl 0x8(%rax), %edi
andl $0xffff, %edi           # imm = 0xFFFF
orl $0x20010000, %edi       # imm = 0x20010000
callq 0x37c0
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
andl $0x3f, %eax
shll $0x1a, %eax
orl $0x0, %eax
orl $0x200000, %eax         # imm = 0x200000
movq -0x90(%rbp), %rcx
movzbl 0xd(%rcx), %ecx
andl $0x1f, %ecx
shll $0x10, %ecx
orl %ecx, %eax
movl %eax, -0x100(%rbp)
movq -0xb0(%rbp), %rdi
callq 0x38d0
movl -0x100(%rbp), %edi
andl $0xffff, %eax           # imm = 0xFFFF
orl %eax, %edi
callq 0x37c0
jmp 0x60aa
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
andl $0x3f, %eax
shll $0x1a, %eax
orl $0x0, %eax
movq -0x90(%rbp), %rcx
movzbl 0xd(%rcx), %ecx
andl $0x1f, %ecx
shll $0x15, %ecx
orl %ecx, %eax
movq -0x98(%rbp), %rcx
movzbl 0xd(%rcx), %ecx
andl $0x1f, %ecx
shll $0x10, %ecx
orl %ecx, %eax
movl %eax, -0x104(%rbp)
movq -0xb0(%rbp), %rdi
callq 0x38d0
movl -0x104(%rbp), %edi
andl $0xffff, %eax           # imm = 0xFFFF
orl %eax, %edi
callq 0x37c0
jmp 0x60ac
jmp 0x6312
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq %rax, -0xb8(%rbp)
movq 0x94e1(%rip), %rax      # 0xf5a8
movq 0x10(%rax), %rdi
movq -0xb8(%rbp), %rax
movq 0x8(%rax), %rsi
callq 0x7ef0
movq %rax, -0xc0(%rbp)
movq -0xc0(%rbp), %rax
movzbl 0x8(%rax), %eax
cmpl $0x0, %eax
jne 0x610f
movq -0xc0(%rbp), %rax
movq 0x18(%rax), %rdi
movq -0x8(%rbp), %rsi
callq 0x7210
movl $0x0, -0x14(%rbp)
jmp 0x6138
movq -0x10(%rbp), %rax
movzbl (%rax), %edi
andl $0x3f, %edi
shll $0x1a, %edi
orl $0x0, %edi
movq -0xc0(%rbp), %rax
movl 0xc(%rax), %eax
shrl $0x2, %eax
andl $0x3ffffff, %eax        # imm = 0x3FFFFFF
orl %eax, %edi
callq 0x37c0
jmp 0x6312
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq %rax, -0xc8(%rbp)
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq 0x10(%rax), %rax
movq %rax, -0xd0(%rbp)
movq -0xd0(%rbp), %rax
movzbl (%rax), %eax
cmpl $0x1, %eax
jne 0x622a
movq 0x942f(%rip), %rax      # 0xf5a8
movq 0x10(%rax), %rdi
movq -0xd0(%rbp), %rax
movq 0x8(%rax), %rsi
callq 0x7ef0
movq %rax, -0xd8(%rbp)
movq -0xd8(%rbp), %rax
movzbl 0x8(%rax), %eax
cmpl $0x0, %eax
jne 0x61cb
movq -0xd8(%rbp), %rax
movq 0x18(%rax), %rdi
movq -0x8(%rbp), %rsi
callq 0x7210
movl $0x4, %edi
callq 0x3490
movl $0x0, -0x14(%rbp)
jmp 0x6228
movq -0xd8(%rbp), %rax
movl 0xc(%rax), %edi
shrl $0x10, %edi
andl $0xffff, %edi           # imm = 0xFFFF
orl $0x3c010000, %edi       # imm = 0x3C010000
callq 0x37c0
movq -0x10(%rbp), %rax
movzbl (%rax), %edi
andl $0x3f, %edi
shll $0x1a, %edi
orl $0x0, %edi
orl $0x200000, %edi         # imm = 0x200000
movq -0xc8(%rbp), %rax
movzbl 0xd(%rax), %eax
andl $0x1f, %eax
shll $0x10, %eax
orl %eax, %edi
movq -0xd8(%rbp), %rax
movl 0xc(%rax), %eax
andl $0xffff, %eax           # imm = 0xFFFF
orl %eax, %edi
callq 0x37c0
jmp 0x6276
movq -0x10(%rbp), %rax
movzbl (%rax), %edi
andl $0x3f, %edi
shll $0x1a, %edi
orl $0x0, %edi
movq -0xd0(%rbp), %rax
movzbl 0xd(%rax), %eax
andl $0x1f, %eax
shll $0x15, %eax
orl %eax, %edi
movq -0xc8(%rbp), %rax
movzbl 0xd(%rax), %eax
andl $0x1f, %eax
shll $0x10, %eax
orl %eax, %edi
movq -0xd0(%rbp), %rax
movl 0x8(%rax), %eax
andl $0xffff, %eax           # imm = 0xFFFF
orl %eax, %edi
callq 0x37c0
jmp 0x6312
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq %rax, -0xe0(%rbp)
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq 0x10(%rax), %rax
movq %rax, -0xe8(%rbp)
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rax
movq 0x10(%rax), %rax
movq 0x10(%rax), %rax
movq %rax, -0xf0(%rbp)
movq -0x10(%rbp), %rax
movzbl (%rax), %edi
andl $0x3f, %edi
shll $0x1a, %edi
orl $0x0, %edi
movq -0xe8(%rbp), %rax
movzbl 0xd(%rax), %eax
andl $0x1f, %eax
shll $0x15, %eax
orl %eax, %edi
movq -0xf0(%rbp), %rax
movzbl 0xd(%rax), %eax
andl $0x1f, %eax
shll $0x10, %eax
orl %eax, %edi
movq -0xe0(%rbp), %rax
movzbl 0xd(%rax), %eax
andl $0x1f, %eax
shll $0xb, %eax
orl %eax, %edi
orl $0x0, %edi
movq -0x10(%rbp), %rax
movzbl 0x1(%rax), %eax
andl $0x3f, %eax
orl %eax, %edi
callq 0x37c0
cmpl $0x0, -0x14(%rbp)
jne 0x6322
movl $0x4, %edi
callq 0x3490
movl -0x14(%rbp), %eax
addq $0x110, %rsp            # imm = 0x110
popq %rbp
retq
nop