// File: /workspace/github_c_makefile_star2_O3/lucvoo[P]sparse-dev/cse.c
// Function: insn_compare
static int insn_compare(const void *_i1, const void *_i2)
{
	const struct instruction *i1 = _i1;
	const struct instruction *i2 = _i2;
	int size1, size2;
	int diff;

	if (i1->opcode != i2->opcode)
		return i1->opcode < i2->opcode ? -1 : 1;

	switch (i1->opcode) {

	/* commutative binop */
	case OP_ADD:
	case OP_MUL:
	case OP_AND: case OP_OR:
	case OP_XOR:
	case OP_SET_EQ: case OP_SET_NE:
		if (i1->src1 == i2->src2 && i1->src2 == i2->src1)
			return 0;
		goto case_binops;

	case OP_SEL:
		if (i1->src3 != i2->src3)
			return i1->src3 < i2->src3 ? -1 : 1;
		/* Fall-through to binops */

	/* Binary arithmetic */
	case OP_SUB:
	case OP_DIVU: case OP_DIVS:
	case OP_MODU: case OP_MODS:
	case OP_SHL:
	case OP_LSR: case OP_ASR:

	/* Binary comparison */
	case OP_SET_LE: case OP_SET_GE:
	case OP_SET_LT: case OP_SET_GT:
	case OP_SET_B:  case OP_SET_A:
	case OP_SET_BE: case OP_SET_AE:

	/* floating-point arithmetic */
	case OP_FPCMP ... OP_FPCMP_END:
	case OP_FADD:
	case OP_FSUB:
	case OP_FMUL:
	case OP_FDIV:
	case_binops:
		if (i1->src2 != i2->src2)
			return i1->src2 < i2->src2 ? -1 : 1;
		/* Fall through to unops */

	/* Unary */
	case OP_NOT: case OP_NEG:
	case OP_FNEG:
	case OP_SYMADDR:
		if (i1->src1 != i2->src1)
			return i1->src1 < i2->src1 ? -1 : 1;
		break;

	case OP_LABEL:
		if (i1->bb_true != i2->bb_true)
			return i1->bb_true < i2->bb_true ? -1 : 1;
		break;

	case OP_SETVAL:
		if (i1->val != i2->val)
			return i1->val < i2->val ? -1 : 1;
		break;

	case OP_SETFVAL:
		diff = memcmp(&i1->fvalue, &i2->fvalue, sizeof(i1->fvalue));
		if (diff)
			return diff;
		break;

	/* Other */
	case OP_PHI:
		return phi_list_compare(i1->phi_list, i2->phi_list);

	case OP_SEXT: case OP_ZEXT:
	case OP_TRUNC:
	case OP_PTRCAST:
	case OP_UTPTR: case OP_PTRTU:
		if (i1->src != i2->src)
			return i1->src < i2->src ? -1 : 1;

		// Note: if it can be guaranted that identical ->src
		// implies identical orig_type->bit_size, then this
		// test and the hashing of the original size in
		// cse_collect() are not needed.
		// It must be generaly true but it isn't guaranted (yet).
		size1 = i1->orig_type->bit_size;
		size2 = i2->orig_type->bit_size;
		if (size1 != size2)
			return size1 < size2 ? -1 : 1;
		break;

	default:
		warning(i1->pos, "bad instruction on hash chain");
	}
	if (i1->size != i2->size)
		return i1->size < i2->size ? -1 : 1;
	return 0;
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movl (%rdi), %ecx
movl %ecx, %esi
andl $0x7f, %esi
movl (%rbx), %edx
movl %edx, %edi
andl $0x7f, %edi
cmpl %edi, %esi
jne 0x311ab
addl $-0x8, %esi
cmpl $0x41, %esi
ja 0x3127e
leaq 0x1869e(%rip), %rax     # 0x49818
movslq (%rax,%rsi,4), %rsi
addq %rax, %rsi
jmpq *%rsi
movq 0x38(%r14), %rsi
movq 0x38(%rbx), %rdi
cmpq %rdi, %rsi
jne 0x311d4
movq 0x30(%r14), %rsi
movq 0x30(%rbx), %rdi
cmpq %rdi, %rsi
jne 0x311d4
shrl $0x8, %ecx
shrl $0x8, %edx
cmpl %edx, %ecx
jne 0x311e6
xorl %eax, %eax
jmp 0x311de
xorl %eax, %eax
cmpl %edi, %esi
jmp 0x311d9
movq 0x30(%r14), %rax
cmpq 0x38(%rbx), %rax
jne 0x31183
movq 0x38(%r14), %rax
cmpq 0x30(%rbx), %rax
jne 0x31183
jmp 0x311a7
movq 0x30(%r14), %rsi
movq 0x30(%rbx), %rdi
cmpq %rdi, %rsi
je 0x311ec
xorl %eax, %eax
cmpq %rdi, %rsi
sbbl %eax, %eax
orl $0x1, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
xorl %eax, %eax
cmpl %edx, %ecx
jmp 0x311d9
movq 0x40(%r14), %rax
movq 0x40(%rbx), %rsi
movl 0x50(%rsi), %esi
cmpl %esi, 0x50(%rax)
je 0x3119d
setge %al
movzbl %al, %eax
leal -0x1(,%rax,2), %eax
jmp 0x311de
movq 0x38(%r14), %rdi
movq 0x38(%rbx), %rsi
addq $0x8, %rsp
popq %rbx
popq %r14
jmp 0x3129a
movq 0x38(%r14), %rsi
movq 0x38(%rbx), %rdi
jmp 0x31198
movq 0x30(%r14), %rsi
bswapq %rsi
movq 0x30(%rbx), %rdi
bswapq %rdi
cmpq %rdi, %rsi
jne 0x31251
movq 0x38(%r14), %rsi
movq 0x38(%rbx), %rdi
bswapq %rsi
bswapq %rdi
xorl %eax, %eax
cmpq %rdi, %rsi
je 0x3125b
xorl %eax, %eax
cmpq %rdi, %rsi
sbbl %eax, %eax
orl $0x1, %eax
testl %eax, %eax
jne 0x311de
jmp 0x3119d
movq 0x40(%r14), %rsi
movq 0x40(%rbx), %rdi
cmpq %rdi, %rsi
jne 0x311d4
jmp 0x31183
movq 0x10(%r14), %rdi
leaq 0x18697(%rip), %rsi     # 0x49920
xorl %eax, %eax
callq 0x118fc
movl (%r14), %ecx
movl (%rbx), %edx
jmp 0x3119d