// File: /workspace/github_cpp_makefile_star2_O2/jkingan[P]ladyheather/heathgps.cpp
// Function: show_x72_status(int, int, int)
int show_x72_status(int row,int col, int max_row)
{
int color;

   if(have_x72_creg) {
      if(x72_creg & 0x0008) vidstr(row,col, YELLOW, "PPS OUT: OFF  ");
      else                  vidstr(row,col, GREEN,  "PPS OUT: ON   ");
      if(++row > max_row) return row;

      if(x72_fw_discipline()) {
         if((last_x72_dmode != 1) && (last_x72_dmode != 2)) {
            vidstr(row,col, GREEN, "PPS IN:  UNKN ");
         }
         else if(x72_creg & 0x1000) {  // PPS input detected - fw discipline units only
            vidstr(row,col, GREEN,  "PPS IN:  SEEN ");
         }
         else {
            vidstr(row,col, YELLOW, "PPS IN:  NONE ");
         }
         if(++row > max_row) return row;

         if(user_set_x72_dmode && last_x72_dmode && (last_x72_dmode != 3)) {
            if(x72_creg & 0x0800) {  // PPS out locked to PPS in - fw discipline units only
               vidstr(row,col, GREEN,  "PPS OUT: LOCKED");
            }
            else if(x72_creg & 0x1000) {  // PPS input detected - fw discipline units only
               vidstr(row,col, YELLOW, "PPS OUT: UNLOCK");
            }
            else {
               vidstr(row,col, GREEN,  "PPS OUT: UNLOCK");
            }
            if(++row > max_row) return row;
         }
         else {
            vidstr(row,col, GREEN,  "PPS OUT: UNKN  ");
            if(++row > max_row) return row;
         }
      }

      if(x72_creg & 0x0004) vidstr(row,col, YELLOW, "FXO OUT: OFF  ");
      else                  vidstr(row,col, GREEN,  "FXO OUT: ON   ");
      if(++row > max_row) return row;

      if(x72_creg & 0x0010) vidstr(row,col, YELLOW, "ACMOS:   OFF  ");
      else                  vidstr(row,col, GREEN,  "ACMOS:   ON   ");
      if(++row > max_row) return row;

      if(x72_sine_level == 0) {
         vidstr(row,col, YELLOW, "Sine:    OFF  ");
      }
      else {
         sprintf(out,            "Sine ON: %d%%  ", x72_sine_level);
         vidstr(row,col, GREEN,  out);
      }
      if(++row > max_row) return row;


      if(x72_creg & 0x0002) vidstr(row,col, RED,    "Rb lock: OFF  ");
      else                  vidstr(row,col, GREEN,  "Rb lock: OK   ");
      if(++row > max_row) return row;

      if(x72_creg & 0x0400) vidstr(row,col, RED,    "Service: FAULT");
      else                  vidstr(row,col, GREEN,  "Service: OK   ");
      if(++row > max_row) return row;

      if(have_x72_srvc) {
         if(x72_srvc) vidstr(row,col, GREEN,  "SVC pol: HIGH ");
         else         vidstr(row,col, GREEN,  "SVC pol: LOW  ");
         if(++row > max_row) return row;
      }
      else {
         vidstr(row,col, GREEN,  "SVC pol: UNKN ");
         if(++row > max_row) return row;
      }

      if(x72_creg & 0x2000) {
         vidstr(row,col, GREEN,  "EFC INP: ON   ");
         if(++row > max_row) return row;
      }
      else if(have_x72_efc) {
         if(x72_efc) vidstr(row,col, GREEN,  "EFC inp: ON   ");
         else        vidstr(row,col, GREEN,  "EFC inp: OFF  ");
         if(++row > max_row) return row;
      }
      else {
         vidstr(row,col, GREEN,  "EFC inp: UNKN ");
         if(++row > max_row) return row;
      }

      if(have_x72_state) {
         color = YELLOW;
         if(x72_state == X72_STATE_DISCIPLINE) color = GREEN;
         else if(x72_state == X72_STATE_PIDCALC) color = GREEN;
         else if(x72_state == X72_STATE_PIDUPDATE) color = GREEN;
         else if(x72_state == X72_STATE_START0) color = GREEN;

         sprintf(out, "D State: %-3d  ", x72_state);
         if(color != GREEN)    vidstr(row,col, color, out);
         else if(x72_user_dis) vidstr(row,col, OSC_PID_COLOR, out);
         else                  vidstr(row,col, color,  out);
         if(++row > max_row) return row;
      }
      else {
         sprintf(out, "D State: UNKN ");
         vidstr(row,col, GREEN,  out);
         if(++row > max_row) return row;
      }


      if(x72_creg & 0x0001) vidstr(row,col, YELLOW, "L boost: ON   ");
      else                  vidstr(row,col, GREEN,  "L boost: OFF  ");
      if(++row > max_row) return row;

      if(x72_creg & 0x0020) vidstr(row,col, YELLOW, "C boost: ON   ");
      else                  vidstr(row,col, GREEN,  "C boost: OFF  ");
      if(++row > max_row) return row;
   }

   return row;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %edi, %r15d
leaq 0x15e30f(%rip), %rax    # 0x204c70
cmpl $0x0, (%rax)
je 0xa6d8e
movl %edx, %r14d
movl %esi, %ebx
leaq 0x15e462(%rip), %r13    # 0x204dd8
testb $0x8, (%r13)
jne 0xa6988
leaq 0x6c33c(%rip), %rcx     # 0x112cc0
pushq $0xa
jmp 0xa6991
leaq 0x6c322(%rip), %rcx     # 0x112cb1
pushq $0xe
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xa6d8b
callq 0x63a49
testl %eax, %eax
je 0xa6a94
leaq 0x15e563(%rip), %r13    # 0x204f20
movl (%r13), %eax
addl $-0x3, %eax
cmpl $-0x3, %eax
ja 0xa69d2
leaq 0x6c2ff(%rip), %rcx     # 0x112ccf
jmp 0xa69f1
leaq 0x15e3ff(%rip), %rax    # 0x204dd8
testb $0x10, 0x1(%rax)
jne 0xa69ea
leaq 0x6c307(%rip), %rcx     # 0x112ced
pushq $0xe
jmp 0xa69f3
leaq 0x6c2ed(%rip), %rcx     # 0x112cde
pushq $0xa
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x2(%r15), %edi
cmpl %r14d, %edi
jle 0xa6a0f
movl %edi, %r15d
jmp 0xa6d8e
leaq 0x15e4ee(%rip), %rax    # 0x204f04
cmpl $0x0, (%rax)
je 0xa6a4a
movl (%r13), %eax
testl %eax, %eax
je 0xa6a4a
cmpl $0x3, %eax
je 0xa6a4a
leaq 0x15e3a9(%rip), %r13    # 0x204dd8
movl (%r13), %eax
btl $0xb, %eax
jb 0xa6a73
leaq 0x6c2cc(%rip), %rcx     # 0x112d0c
btl $0xc, %eax
jae 0xa6a7a
pushq $0xe
jmp 0xa6a7c
leaq 0x6c2cb(%rip), %rcx     # 0x112d1c
pushq $0xa
popq %rdx
movl %ebx, %esi
callq 0xe2d2
addl $0x3, %r15d
movl %r15d, %r12d
cmpl %r14d, %r15d
leaq 0x15e36c(%rip), %r13    # 0x204dd8
jle 0xa6a94
jmp 0xa6d8e
leaq 0x6c282(%rip), %rcx     # 0x112cfc
pushq $0xa
popq %rdx
movl %ebx, %esi
callq 0xe2d2
addl $0x3, %r15d
movl %r15d, %r12d
cmpl %r14d, %r15d
jg 0xa6d8e
testb $0x4, (%r13)
jne 0xa6aa6
leaq 0x6c299(%rip), %rcx     # 0x112d3b
pushq $0xa
jmp 0xa6aaf
leaq 0x6c27f(%rip), %rcx     # 0x112d2c
pushq $0xe
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xa6d8e
testb $0x10, (%r13)
jne 0xa6ada
leaq 0x6c283(%rip), %rcx     # 0x112d59
pushq $0xa
jmp 0xa6ae3
leaq 0x6c269(%rip), %rcx     # 0x112d4a
pushq $0xe
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x2(%r12), %r15d
cmpl %r14d, %r15d
jg 0xa6d8e
leaq 0x15e2f5(%rip), %rax    # 0x204df8
movl (%rax), %edx
testl %edx, %edx
je 0xa6b2f
leaq 0x27f710(%rip), %rdi    # 0x326220
leaq 0x6c260(%rip), %rsi     # 0x112d77
xorl %eax, %eax
callq 0x9060
pushq $0xa
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
leaq 0x27f6f3(%rip), %rcx    # 0x326220
jmp 0xa6b3e
leaq 0x6c232(%rip), %rcx     # 0x112d68
pushq $0xe
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x3(%r12), %r15d
cmpl %r14d, %r15d
jg 0xa6d8e
testb $0x2, (%r13)
jne 0xa6b63
leaq 0x6c237(%rip), %rcx     # 0x112d96
pushq $0xa
jmp 0xa6b6c
leaq 0x6c21d(%rip), %rcx     # 0x112d87
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x4(%r12), %r15d
cmpl %r14d, %r15d
jg 0xa6d8e
testb $0x4, 0x1(%r13)
jne 0xa6b97
leaq 0x6c221(%rip), %rcx     # 0x112db4
pushq $0xa
jmp 0xa6ba0
leaq 0x6c207(%rip), %rcx     # 0x112da5
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x5(%r12), %r15d
cmpl %r14d, %r15d
jg 0xa6d8e
leaq 0x15e148(%rip), %rax    # 0x204d08
cmpl $0x0, (%rax)
je 0xa6be3
leaq 0x15e170(%rip), %rax    # 0x204d3c
cmpl $0x0, (%rax)
leaq 0x6c1fc(%rip), %rax     # 0x112dd2
leaq 0x6c1e6(%rip), %rcx     # 0x112dc3
cmoveq %rax, %rcx
jmp 0xa6bea
leaq 0x6c1f7(%rip), %rcx     # 0x112de1
pushq $0xa
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
addl $0x6, %r12d
movl %r12d, %r15d
cmpl %r14d, %r12d
jg 0xa6d8e
testb $0x20, 0x1(%r13)
jne 0xa6c38
leaq 0x15e0ef(%rip), %rax    # 0x204d04
cmpl $0x0, (%rax)
je 0xa6c41
leaq 0x15e117(%rip), %rax    # 0x204d38
cmpl $0x0, (%rax)
leaq 0x6c1e3(%rip), %rax     # 0x112e0e
leaq 0x6c1cd(%rip), %rcx     # 0x112dff
cmoveq %rax, %rcx
jmp 0xa6c48
leaq 0x6c1b1(%rip), %rcx     # 0x112df0
jmp 0xa6c48
leaq 0x6c1d5(%rip), %rcx     # 0x112e1d
pushq $0xa
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xa6d8e
leaq 0x15e06a(%rip), %rax    # 0x204cd4
cmpl $0x0, (%rax)
je 0xa6cf6
leaq 0x15e186(%rip), %rax    # 0x204e00
movl (%rax), %edx
cmpl $0x8, %edx
ja 0xa6da0
movl $0x1c1, %eax            # imm = 0x1C1
btl %edx, %eax
jae 0xa6da0
movb $0xa, %r12b
movb $0x1, %r13b
leaq 0x27f580(%rip), %rdi    # 0x326220
leaq 0x6c185(%rip), %rsi     # 0x112e2c
xorl %eax, %eax
callq 0x9060
leaq 0x15e23b(%rip), %rax    # 0x204ef0
cmpl $0x0, (%rax)
sete %al
xorb $0xb, %al
movzbl %r12b, %ecx
movzbl %al, %eax
testb %r13b, %r13b
cmovel %ecx, %eax
movzbl %al, %edx
movl %r15d, %edi
movl %ebx, %esi
leaq 0x27f547(%rip), %rcx    # 0x326220
callq 0xe2d2
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
movl %r12d, %r15d
leaq 0x15e0e9(%rip), %r13    # 0x204dd8
jl 0xa6d31
jmp 0xa6d8e
leaq 0x27f523(%rip), %rcx    # 0x326220
movabsq $0x204e4b4e55203a, %rax # imm = 0x204E4B4E55203A
movq %rax, 0x7(%rcx)
movabsq $0x3a65746174532044, %rax # imm = 0x3A65746174532044
movq %rax, (%rcx)
pushq $0xa
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
movl %r12d, %r15d
jge 0xa6d8e
testb $0x1, (%r13)
jne 0xa6d43
leaq 0x6c11b(%rip), %rcx     # 0x112e5a
pushq $0xa
jmp 0xa6d4c
leaq 0x6c101(%rip), %rcx     # 0x112e4b
pushq $0xe
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xa6d8e
testb $0x20, (%r13)
jne 0xa6d73
leaq 0x6c109(%rip), %rcx     # 0x112e78
pushq $0xa
jmp 0xa6d7c
leaq 0x6c0ef(%rip), %rcx     # 0x112e69
pushq $0xe
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
addl $0x2, %r12d
movl %r12d, %r15d
movl %r15d, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movb $0xe, %r12b
xorl %r13d, %r13d
jmp 0xa6c99