// File: /workspace/github_c_makefile_star2_O0/xiane[P]libvphevcodec/AML_HEVCEncoder.cpp
// Function: Wave4VpuEncEncPic(AMVHEVCEncHandle_s*, unsigned int, int, unsigned char*, unsigned int*, int*)
AMVEnc_Status Wave4VpuEncEncPic(AMVHEVCEncHandle *Handle, Uint32 idx, int end, unsigned char *buffer, unsigned int *buf_nal_size, int *nal_type) {
    int coreIdx = 0;
    Uint32 addr_report_buf = 0;    // [31:0]
    Uint32 report_buf_size = 0;    // [31:0]
    unsigned char report_endian = 0;    // [ 3:0]
    //Uint32 use_sec_axi = 0;    // [31:0]
    //Uint32 sec_axi_buf_size = 0x00012800;   // 74KB
    Uint32 rd_ptr, wr_ptr;
    //Uint32 src_num, fb_num, i, j;   // [31:0]
    Uint32 src_stride;
    Uint32 luma_stride, chroma_stride;
    Uint32 size_src_luma, size_src_chroma;
   // char *y = NULL;
    src_stride = wave420l_align32(Handle->enc_width);
    luma_stride = src_stride;
    chroma_stride = src_stride;

    // set frame buffers

    // calculate required buffer size
    size_src_luma = luma_stride * wave420l_align32(Handle->enc_height);

    size_src_chroma = luma_stride * (wave420l_align16(Handle->enc_height) / 2);

    // Bitstream Buffer Setting
    VpuWriteReg(Handle->instance_id, W4_BS_START_ADDR, Handle->bs_vb.phys_addr);
    VpuWriteReg(Handle->instance_id, W4_BS_SIZE, Handle->bs_vb.size - 0x8000);
    VpuWriteReg(Handle->instance_id, W4_BS_PARAM, 0xf);
    VpuWriteReg(Handle->instance_id, W4_BS_OPTION, 0);

    uint32_t current_idx = 0;
    current_idx |= (0 << 24); // [27:24] codec_std_aux
    current_idx |= (1 << 16); // [23:16] codec_std
    current_idx |= (Handle->instance_id << 0);  // [15: 0] Handle->instance_id
    VpuWriteReg(Handle->instance_id, W4_INST_INDEX, current_idx);

    // Work Buffer Setting
    VpuWriteReg(Handle->instance_id, W4_ADDR_WORK_BASE, Handle->work_vb.phys_addr);
    VpuWriteReg(Handle->instance_id, W4_WORK_SIZE, Handle->work_vb.size);
    VpuWriteReg(Handle->instance_id, W4_WORK_PARAM, 0);

    // Temp Buffer Setting
    VpuWriteReg(Handle->instance_id, W4_ADDR_TEMP_BASE, Handle->temp_vb.phys_addr);
    VpuWriteReg(Handle->instance_id, W4_TEMP_SIZE, Handle->temp_vb.size);
    VpuWriteReg(Handle->instance_id, W4_TEMP_PARAM, gol_endian);

    VpuWriteReg(Handle->instance_id, W4_BS_RD_PTR, Handle->bs_vb.phys_addr);
    VpuWriteReg(Handle->instance_id, W4_BS_WR_PTR, Handle->bs_vb.phys_addr);

    /* Secondary AXI */
    VpuWriteReg(Handle->instance_id, W4_ADDR_SEC_AXI, 0);
    VpuWriteReg(Handle->instance_id, W4_SEC_AXI_SIZE, 0);
    VpuWriteReg(Handle->instance_id, W4_USE_SEC_AXI, 0);

    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_ADDR_REPORT_BASE, addr_report_buf);
    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_REPORT_SIZE, report_buf_size);
    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_REPORT_PARAM, report_endian);

    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_CODE_OPTION, 3);
    if (Handle->idrPeriod == -1 || (Handle->src_pics[idx].op_flag & AMVEncFrameIO_FORCE_IDR_FLAG))
        VpuWriteReg(Handle->instance_id, W4_CMD_ENC_PIC_PARAM, (3 << 21) | (1 << 20));
    else
        VpuWriteReg(Handle->instance_id, W4_CMD_ENC_PIC_PARAM, 0);
    if (end)
        VpuWriteReg(Handle->instance_id, W4_CMD_ENC_SRC_PIC_IDX, 0xffffffff);
    else
        VpuWriteReg(Handle->instance_id, W4_CMD_ENC_SRC_PIC_IDX, idx);
    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_SRC_ADDR_Y, Handle->src_pics[idx].vb.phys_addr);
    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_SRC_ADDR_U, Handle->src_pics[idx].vb.phys_addr + size_src_luma);
    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_SRC_ADDR_V, Handle->src_pics[idx].vb.phys_addr + size_src_luma);
    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_SRC_STRIDE, (src_stride << 16) | src_stride);
    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_SRC_FORMAT, ((2 + Handle->mUvSwap) << 0) | (0 << 3) | (gol_endian << 6));

    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_SEI_USER_ADDR, 0);
    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_SEI_USER_INFO, 0);
    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_SRC_TIMESTAMP_LOW, 0);
    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_SRC_TIMESTAMP_HIGH, 0);
    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_LONGTERM_PIC, 0);
    // set ROI param
    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_ROI_PARAM, 0);

    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_ROI_ADDR_CTU_MAP, 0);

    VpuWriteReg(Handle->instance_id, W4_CMD_ENC_SUB_FRAME_SYNC_CONFIG, 0);

    VpuWriteReg(Handle->instance_id, W4_VPU_BUSY_STATUS, 1);
    VpuWriteReg(Handle->instance_id, W4_RET_SUCCESS, 0);  //for debug
    VpuWriteReg(Handle->instance_id, W4_CORE_INDEX, 0);
    VpuWriteReg(Handle->instance_id, W4_RET_FAIL_REASON, 0);  //for debug
    VpuWriteReg(Handle->instance_id, W4_COMMAND, ENC_PIC);
    VpuWriteReg(Handle->instance_id, W4_VPU_HOST_INT_REQ, 1);
    uint32_t status = VpuReadReg(Handle->instance_id, W4_VPU_BUSY_STATUS);
    VLOG(NONE, "W4_VPU_BUSY_STATUS :0x%x\n", status);
    if (vdi_wait_interrupt(Handle->instance_id, VPU_BUSY_CHECK_TIMEOUT) == -1) {
        VLOG(ERR, "Wave4VpuEncEncPic error time out\n");
        Wave4VpuReset(Handle, coreIdx, reset_mode);
        return AMVENC_TIMEOUT;
    }

    if (VpuReadReg(Handle->instance_id, W4_RET_SUCCESS) == 0) {
        uint32_t reasonCode = VpuReadReg(Handle->instance_id, W4_RET_FAIL_REASON);
        VLOG(ERR, "Wave4VpuEncEncPic failedREASON CODE(%08x)\n", reasonCode);
        Wave4VpuReset(Handle, coreIdx, reset_mode);
        return AMVENC_HARDWARE;
    }

    uint32_t result = VpuReadReg(Handle->instance_id, W4_RET_SUCCESS);
    VLOG(NONE, "W4_RET_SUCCESS %x\n", result );

    uint32_t nal_length;
    {
        rd_ptr = VpuReadReg(Handle->instance_id, W4_BS_RD_PTR);
        wr_ptr = VpuReadReg(Handle->instance_id, W4_BS_WR_PTR);

        nal_length = VpuReadReg(Handle->instance_id, W4_RET_ENC_PIC_BYTE);
        VLOG(NONE, "Wave4VpuEncEncPic, rd:0x%x, wr:0x%x, ret bytes: %d, buffer size:%d\n", rd_ptr, wr_ptr, nal_length, wr_ptr - rd_ptr);

        if (nal_length > Handle->mOutputBufferLen) {
            VLOG(ERR, "nal size %d bigger than output buffer %d!\n", nal_length, Handle->mOutputBufferLen);
            return AMVENC_OVERFLOW;
        }
        if (buf_nal_size != NULL)
            *buf_nal_size = nal_length;
        if (nal_length && (buffer!= NULL))
            vdi_read_memory(Handle->instance_id, rd_ptr, (unsigned char *)buffer, nal_length);
        else if (buffer == NULL)
            VLOG(DEBUG, "HEVC flushing input");
        VLOG(DEBUG, "Wave4VpuEncEncPic %d, ret bytes: %d, buffer size:%d", Handle->enc_counter, nal_length, wr_ptr - rd_ptr);
    }

    uint32_t type = Handle->src_pics[idx].type = VpuReadReg(Handle->instance_id, W4_RET_ENC_PIC_TYPE);
    if (nal_type != NULL) {
        if ((type& 0xff) == I_SLICE) {
            if (Handle->mNumInputFrames == 1)
                *nal_type = HEVC_IDR;
            else
                *nal_type = Handle->mEncParams->refresh_type;
        } else if ((type& 0xff) == P_SLICE || (type & 0xff) == B_SLICE)
           *nal_type = NON_IRAP;
    }

    VLOG(DEBUG, "Wave4VpuEncEncPic PIC type: 0x%x", type);

    //dumpCodedPicture(Handle, idx, buffer, nal_length);
    VpuWriteReg(Handle->instance_id, W4_BS_RD_PTR, wr_ptr);
    VpuWriteReg(Handle->instance_id, W4_RET_ENC_PIC_BYTE, 0);
    return AMVENC_SUCCESS;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x80, %rsp
movq %rdi, -0x10(%rbp)
movl %esi, -0x14(%rbp)
movl %edx, -0x18(%rbp)
movq %rcx, -0x20(%rbp)
movq %r8, -0x28(%rbp)
movq %r9, -0x30(%rbp)
movl $0x0, -0x34(%rbp)
movl $0x0, -0x38(%rbp)
movl $0x0, -0x3c(%rbp)
movb $0x0, -0x3d(%rbp)
movq -0x10(%rbp), %rax
movl 0xc(%rax), %eax
addl $0x1f, %eax
shrl $0x5, %eax
shll $0x5, %eax
movl %eax, -0x4c(%rbp)
movl -0x4c(%rbp), %eax
movl %eax, -0x50(%rbp)
movl -0x4c(%rbp), %eax
movl %eax, -0x54(%rbp)
movl -0x50(%rbp), %eax
movq -0x10(%rbp), %rcx
movl 0x10(%rcx), %ecx
addl $0x1f, %ecx
shrl $0x5, %ecx
shll $0x5, %ecx
imull %ecx, %eax
movl %eax, -0x58(%rbp)
movl -0x50(%rbp), %eax
movq -0x10(%rbp), %rcx
movl 0x10(%rcx), %ecx
addl $0xf, %ecx
shrl $0x4, %ecx
shll $0x4, %ecx
shrl %ecx
imull %ecx, %eax
movl %eax, -0x5c(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movq 0x88(%rax), %rax
movl %eax, %edx
movl $0x120, %esi            # imm = 0x120
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movl 0x80(%rax), %edx
subl $0x8000, %edx           # imm = 0x8000
movl $0x124, %esi            # imm = 0x124
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x128, %esi            # imm = 0x128
movl $0xf, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x12c, %esi            # imm = 0x12C
xorl %edx, %edx
callq 0x2160
movl $0x0, -0x60(%rbp)
movl -0x60(%rbp), %eax
orl $0x0, %eax
movl %eax, -0x60(%rbp)
movl -0x60(%rbp), %eax
orl $0x10000, %eax          # imm = 0x10000
movl %eax, -0x60(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %eax
shll $0x0, %eax
orl -0x60(%rbp), %eax
movl %eax, -0x60(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x60(%rbp), %edx
movl $0x108, %esi            # imm = 0x108
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movq 0x48(%rax), %rax
movl %eax, %edx
movl $0x138, %esi            # imm = 0x138
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movl 0x40(%rax), %edx
movl $0x13c, %esi            # imm = 0x13C
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x140, %esi            # imm = 0x140
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movq 0x68(%rax), %rax
movl %eax, %edx
movl $0x144, %esi            # imm = 0x144
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movl 0x60(%rax), %edx
movl $0x148, %esi            # imm = 0x148
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl 0x2b6da(%rip), %edx     # 0x331d8
movl $0x14c, %esi            # imm = 0x14C
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movq 0x88(%rax), %rax
movl %eax, %edx
movl $0x130, %esi            # imm = 0x130
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movq 0x88(%rax), %rax
movl %eax, %edx
movl $0x134, %esi            # imm = 0x134
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x150, %esi            # imm = 0x150
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x154, %esi            # imm = 0x154
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x158, %esi            # imm = 0x158
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x38(%rbp), %edx
movl $0x15c, %esi            # imm = 0x15C
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x3c(%rbp), %edx
movl $0x160, %esi            # imm = 0x160
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movzbl -0x3d(%rbp), %edx
movl $0x164, %esi            # imm = 0x164
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x168, %esi            # imm = 0x168
movl $0x3, %edx
callq 0x2160
movq -0x10(%rbp), %rax
cmpl $-0x1, 0x1c(%rax)
je 0x7bf0
movq -0x10(%rbp), %rax
addq $0xa0, %rax
movl -0x14(%rbp), %ecx
imulq $0x50, %rcx, %rcx
addq %rcx, %rax
movl 0x10(%rax), %eax
andl $0x1, %eax
cmpl $0x0, %eax
je 0x7c07
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x16c, %esi            # imm = 0x16C
movl $0x700000, %edx         # imm = 0x700000
callq 0x2160
jmp 0x7c19
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x16c, %esi            # imm = 0x16C
xorl %edx, %edx
callq 0x2160
cmpl $0x0, -0x18(%rbp)
je 0x7c36
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x170, %esi            # imm = 0x170
movl $0xffffffff, %edx       # imm = 0xFFFFFFFF
callq 0x2160
jmp 0x7c49
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x14(%rbp), %edx
movl $0x170, %esi            # imm = 0x170
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
addq $0xa0, %rax
movl -0x14(%rbp), %ecx
imulq $0x50, %rcx, %rcx
addq %rcx, %rax
movq 0x28(%rax), %rax
movl %eax, %edx
movl $0x174, %esi            # imm = 0x174
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
addq $0xa0, %rax
movl -0x14(%rbp), %ecx
imulq $0x50, %rcx, %rcx
addq %rcx, %rax
movq 0x28(%rax), %rax
movl -0x58(%rbp), %ecx
addq %rcx, %rax
movl %eax, %edx
movl $0x178, %esi            # imm = 0x178
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
addq $0xa0, %rax
movl -0x14(%rbp), %ecx
imulq $0x50, %rcx, %rcx
addq %rcx, %rax
movq 0x28(%rax), %rax
movl -0x58(%rbp), %ecx
addq %rcx, %rax
movl %eax, %edx
movl $0x17c, %esi            # imm = 0x17C
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x4c(%rbp), %edx
shll $0x10, %edx
orl -0x4c(%rbp), %edx
movl $0x180, %esi            # imm = 0x180
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movl 0x308(%rax), %edx
addl $0x2, %edx
shll $0x0, %edx
orl $0x0, %edx
movl 0x2b4cd(%rip), %eax     # 0x331d8
shll $0x6, %eax
orl %eax, %edx
movl $0x184, %esi            # imm = 0x184
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x188, %esi            # imm = 0x188
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x18c, %esi            # imm = 0x18C
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x190, %esi            # imm = 0x190
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x194, %esi            # imm = 0x194
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x198, %esi            # imm = 0x198
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x1a0, %esi            # imm = 0x1A0
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x1a4, %esi            # imm = 0x1A4
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x19c, %esi            # imm = 0x19C
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x70, %esi
movl $0x1, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x110, %esi            # imm = 0x110
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x104, %esi            # imm = 0x104
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x114, %esi            # imm = 0x114
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x100, %esi            # imm = 0x100
movl $0x8, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x38, %esi
movl $0x1, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x70, %esi
callq 0x2210
movl %eax, -0x64(%rbp)
jmp 0x7e34
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x1388, %esi           # imm = 0x1388
callq 0x2340
cmpl $-0x1, %eax
jne 0x7e85
jmp 0x7e4b
leaq 0x28416(%rip), %rdi     # 0x30268
movb $0x0, %al
callq 0x2050
leaq 0x28406(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movq -0x10(%rbp), %rdi
movl -0x34(%rbp), %esi
movl 0x2b36c(%rip), %edx     # 0x331e0
callq 0x2180
movl $0xffffffdc, -0x4(%rbp) # imm = 0xFFFFFFDC
jmp 0x808d
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x110, %esi            # imm = 0x110
callq 0x2210
cmpl $0x0, %eax
jne 0x7eea
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x114, %esi            # imm = 0x114
callq 0x2210
movl %eax, -0x68(%rbp)
movl -0x68(%rbp), %esi
leaq 0x283d3(%rip), %rdi     # 0x3028a
movb $0x0, %al
callq 0x2050
leaq 0x283a1(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movq -0x10(%rbp), %rdi
movl -0x34(%rbp), %esi
movl 0x2b307(%rip), %edx     # 0x331e0
callq 0x2180
movl $0xffffffdb, -0x4(%rbp) # imm = 0xFFFFFFDB
jmp 0x808d
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x110, %esi            # imm = 0x110
callq 0x2210
movl %eax, -0x6c(%rbp)
jmp 0x7eff
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x130, %esi            # imm = 0x130
callq 0x2210
movl %eax, -0x44(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x134, %esi            # imm = 0x134
callq 0x2210
movl %eax, -0x48(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x1c8, %esi            # imm = 0x1C8
callq 0x2210
movl %eax, -0x70(%rbp)
jmp 0x7f3a
movl -0x70(%rbp), %eax
movq -0x10(%rbp), %rcx
cmpl 0x300(%rcx), %eax
jbe 0x7f80
jmp 0x7f4b
movl -0x70(%rbp), %esi
movq -0x10(%rbp), %rax
movl 0x300(%rax), %edx
leaq 0x282de(%rip), %rdi     # 0x3023d
movb $0x0, %al
callq 0x2050
leaq 0x282f9(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl $0xffffffd9, -0x4(%rbp) # imm = 0xFFFFFFD9
jmp 0x808d
cmpq $0x0, -0x28(%rbp)
je 0x7f90
movl -0x70(%rbp), %ecx
movq -0x28(%rbp), %rax
movl %ecx, (%rax)
cmpl $0x0, -0x70(%rbp)
je 0x7fb4
cmpq $0x0, -0x20(%rbp)
je 0x7fb4
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x44(%rbp), %esi
movq -0x20(%rbp), %rdx
movl -0x70(%rbp), %ecx
callq 0x2110
jmp 0x7fc3
cmpq $0x0, -0x20(%rbp)
jne 0x7fc1
jmp 0x7fbd
jmp 0x7fbf
jmp 0x7fc1
jmp 0x7fc3
jmp 0x7fc5
jmp 0x7fc7
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x1e0, %esi            # imm = 0x1E0
callq 0x2210
movq -0x10(%rbp), %rcx
addq $0xa0, %rcx
movl -0x14(%rbp), %edx
imulq $0x50, %rdx, %rdx
addq %rdx, %rcx
movl %eax, 0x18(%rcx)
movl %eax, -0x74(%rbp)
cmpq $0x0, -0x30(%rbp)
je 0x805d
movl -0x74(%rbp), %eax
andl $0xff, %eax
cmpl $0x0, %eax
jne 0x8035
movq -0x10(%rbp), %rax
cmpl $0x1, 0x2f8(%rax)
jne 0x801f
movq -0x30(%rbp), %rax
movl $0x2, (%rax)
jmp 0x8033
movq -0x10(%rbp), %rax
movq 0x2e0(%rax), %rax
movl 0x5c(%rax), %ecx
movq -0x30(%rbp), %rax
movl %ecx, (%rax)
jmp 0x805b
movl -0x74(%rbp), %eax
andl $0xff, %eax
cmpl $0x1, %eax
je 0x804f
movl -0x74(%rbp), %eax
andl $0xff, %eax
cmpl $0x2, %eax
jne 0x8059
movq -0x30(%rbp), %rax
movl $0x0, (%rax)
jmp 0x805b
jmp 0x805d
jmp 0x805f
jmp 0x8061
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x48(%rbp), %edx
movl $0x130, %esi            # imm = 0x130
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x1c8, %esi            # imm = 0x1C8
xorl %edx, %edx
callq 0x2160
movl $0x1, -0x4(%rbp)
movl -0x4(%rbp), %eax
addq $0x80, %rsp
popq %rbp
retq
nopl (%rax)