// File: /workspace/github_cpp_makefile_star2_O1/sopanpatra160[P]OOO_Superscalar_Processor_Simulator/cache.cc
// Function: cache::write(unsigned int)
unsigned int cache::write(unsigned int addr){

	unsigned int addr_ev;
	num_w++;
	calc_tag_ind(addr);
		
	if(lev == 1){
		//#1 check for the element in all the blocks of that set	
		for (unsigned int j=0; j<a; j++){
			if((tag_store[ind][j]==tag) && (valid_store[ind][j]==1)){
				if(rp==2)
					lru_update(ind,j);
				else if(rp==3) 
					lfu_update_block(ind,j,1);
				if(wp==0){
					dirty_store[ind][j]=1;
				}
				return 1;
			}
		}
		if(vptr != NULL){
			unsigned int tag_vc = vptr->calc_tag(addr);
			unsigned int found_loc;
			unsigned int found_vc = 0;
			for (unsigned int j=0; j<vptr->a; j++){
				
				if((vptr->tag_store[0][j]==tag_vc) && (vptr->valid_store[0][j]==1)){
					found_vc = 1;
					found_loc = j;
				}
			}
			if(found_vc==1){
				num_swap++;
				swap(found_loc,1);
				return 1;
			}
		}

		num_miss_w++;
		
		//#2 MISS in L1 but invalid case
		for (unsigned int j=0; j<a; j++){
			if(valid_store[ind][j]==0){
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][j]=tag;
				valid_store[ind][j]=1;
				dirty_store[ind][j]=1;
				if(rp==2)
					lru_update(ind,j);
				else 
					lfu_update_block(ind,j,0);
				return 0;
			}
		}
		
		//#3 MISS IN L1 FOR ALL BITS VALID : EVICTION
		//LRU
		if(rp==2){
			ev_blk= lru_block2evict(ind);
		}
		//LFU policy
		else if(rp==3){
			ev_blk= lfu_block2evict(ind);
		}


		if(vptr != NULL){
			addr_ev = ev_blk_addr(ind,tag_store[ind][ev_blk]);
			vptr->insert_vc(addr_ev,dirty_store[ind][ev_blk]);
			if(next!=NULL)
				next->read(addr);
			tag_store[ind][ev_blk]=tag;
			dirty_store[ind][ev_blk]=1;
			

		}
		else if(vptr == NULL){
			if(dirty_store[ind][ev_blk]==0){
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][ev_blk]=tag;
				dirty_store[ind][ev_blk]=1;
			}
			else if(dirty_store[ind][ev_blk]==1){
				num_wb+=1;
				addr_ev = ev_blk_addr(ind,tag_store[ind][ev_blk]);
				if(next!=NULL)
					next->write(addr_ev);
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][ev_blk]=tag;
				dirty_store[ind][ev_blk]=1;
			}
		}

		if(rp==2){
			lru_update(ind,ev_blk);
		}
		else if(rp==3){
			lfu_update_set(ind,ev_blk);
			lfu_update_block(ind,ev_blk,0);
		}
		return 0;

	}	
		
	if(lev == 2){
		//#1 check for the element in all the blocks of that set
		for (unsigned int j=0; j<a; j++){
			if((tag_store[ind][j]==tag) && (valid_store[ind][j]==1)){

				if(rp==2)
					lru_update(ind,j);
				else if(rp==3) 
					lfu_update_block(ind,j,1);
				if(wp==0){
					dirty_store[ind][j]=1;
				}

				return 1;
			}
		}

		num_miss_w+=1;

		//#2 MISS in L1 but invalid case	
		for (unsigned int j=0; j<a; j++){
			if(valid_store[ind][j]==0){
				if(wp == 0){
					tag_store[ind][j]=tag;
					valid_store[ind][j]=1;
					dirty_store[ind][j]=1;
					if(rp==2)
						lru_update(ind,j);
					else 
						lfu_update_block(ind,j,0);
				}

				return 0;
			}
		}
		
		//#3 MISS IN L1 FOR ALL BITS VALID : EVICTION	
		//LRU policy
		if(rp==2){
			ev_blk= lru_block2evict(ind);
		}
		//LFU policy
		else if(rp==3){
			ev_blk= lfu_block2evict(ind);
		}

		//update dirty according to write policy
		//WB policy
		if(wp == 0){
			if(dirty_store[ind][ev_blk]==0){
				tag_store[ind][ev_blk]=tag;
				dirty_store[ind][ev_blk]=1;
				if(rp==2){
					lru_update(ind,ev_blk);
				}
				else if(rp==3){
					lfu_update_set(ind,ev_blk);
					lfu_update_block(ind,ev_blk,0);
				}
			}
			else if(dirty_store[ind][ev_blk]==1){
				num_wb+=1;
				tag_store[ind][ev_blk]=tag;
				if(rp==2){
					lru_update(ind,ev_blk);
				}
				else if(rp==3){
					lfu_update_set(ind,ev_blk);
					lfu_update_block(ind,ev_blk,0);
				}
			}
		}
		return 0;
	}
	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movq %rdi, %rbx
incl 0x88(%rdi)
movl %esi, %ebp
movl 0x58(%rdi), %eax
movl %eax, %ecx
shrl %cl, %esi
movl 0x24(%rdi), %edi
movl 0x60(%rbx), %ecx
addl %eax, %ecx
shll %cl, %esi
shrl %cl, %esi
movl %esi, 0x68(%rbx)
addl 0x5c(%rbx), %eax
movl %ebp, %edx
movl %eax, %ecx
shrl %cl, %edx
movl %edx, 0x64(%rbx)
cmpl $0x1, %edi
je 0x2348
cmpl $0x2, %edi
jne 0x2941
movl 0x18(%rbx), %edi
testq %rdi, %rdi
je 0x22ee
movl %esi, %ecx
movq 0x28(%rbx), %rax
movq 0x30(%rbx), %rsi
movq (%rax,%rcx,8), %r8
xorl %eax, %eax
cmpl %edx, (%r8,%rax,4)
jne 0x22e6
movq (%rsi,%rcx,8), %r9
cmpl $0x1, (%r9,%rax,4)
je 0x23df
incq %rax
cmpq %rax, %rdi
jne 0x22d1
incl 0x8c(%rbx)
movl 0x18(%rbx), %edi
movl $0x1, %r14d
testl %edi, %edi
setne %al
je 0x27ab
movq 0x30(%rbx), %rdx
movl 0x68(%rbx), %esi
movq (%rdx,%rsi,8), %r8
xorl %r14d, %r14d
cmpl $0x0, (%r8)
je 0x245f
leal -0x1(%rdi), %eax
xorl %r9d, %r9d
cmpl %r9d, %eax
je 0x254c
leaq 0x1(%r9), %rcx
cmpl $0x0, 0x4(%r8,%r9,4)
movq %rcx, %r9
jne 0x2326
cmpl %edi, %ecx
setb %al
jmp 0x2461
movl 0x18(%rbx), %edi
testq %rdi, %rdi
je 0x237d
movl %esi, %ecx
movq 0x28(%rbx), %rax
movq 0x30(%rbx), %rsi
movq (%rax,%rcx,8), %r8
xorl %eax, %eax
cmpl %edx, (%r8,%rax,4)
jne 0x2375
movq (%rsi,%rcx,8), %r9
cmpl $0x1, (%r9,%rax,4)
je 0x241a
incq %rax
cmpq %rax, %rdi
jne 0x2360
movq 0x8(%rbx), %rax
testq %rax, %rax
je 0x24fd
movl 0x5c(%rax), %ecx
addl 0x58(%rax), %ecx
movl %ebp, %edx
shrl %cl, %edx
movl 0x18(%rax), %edi
movl %edx, 0x64(%rax)
xorl %ecx, %ecx
testq %rdi, %rdi
je 0x24de
movq 0x28(%rax), %rsi
movq (%rsi), %r8
xorl %r9d, %r9d
cmpl %edx, (%r8,%r9,4)
jne 0x23cc
movq 0x30(%rax), %r10
movq (%r10), %r10
movl (%r10,%r9,4), %r10d
cmpl $0x1, %r10d
cmovel %r9d, %esi
cmovel %r10d, %ecx
incq %r9
cmpq %r9, %rdi
jne 0x23af
cmpl $0x1, %ecx
sete %cl
jmp 0x24de
movl 0x1c(%rbx), %edx
cmpl $0x3, %edx
je 0x2559
cmpl $0x2, %edx
jne 0x2564
movq 0x40(%rbx), %rdx
movq (%rdx,%rcx,8), %rcx
movl (%rcx,%rax,4), %edx
xorl %esi, %esi
movl (%rcx,%rsi,4), %edi
cmpl %edx, %edi
jae 0x240d
incl %edi
movl %edi, (%rcx,%rsi,4)
incq %rsi
movl 0x18(%rbx), %edi
cmpq %rdi, %rsi
jb 0x2401
jmp 0x2453
movl 0x1c(%rbx), %edx
cmpl $0x3, %edx
je 0x2559
cmpl $0x2, %edx
jne 0x2564
movq 0x40(%rbx), %rdx
movq (%rdx,%rcx,8), %rcx
movl (%rcx,%rax,4), %edx
xorl %esi, %esi
movl (%rcx,%rsi,4), %edi
cmpl %edx, %edi
jae 0x2448
incl %edi
movl %edi, (%rcx,%rsi,4)
incq %rsi
movl 0x18(%rbx), %edi
cmpq %rdi, %rsi
jb 0x243c
movl $0x0, (%rcx,%rax,4)
jmp 0x2564
xorl %ecx, %ecx
cmpl $0x0, 0x20(%rbx)
jne 0x27ab
movl 0x64(%rbx), %edi
movq 0x28(%rbx), %r8
movq (%r8,%rsi,8), %rsi
movl %edi, (%rsi,%rcx,4)
movl 0x68(%rbx), %esi
movq (%rdx,%rsi,8), %rdx
movl $0x1, %esi
movl %esi, (%rdx,%rcx,4)
movq 0x38(%rbx), %rdx
movl 0x68(%rbx), %edi
movq (%rdx,%rdi,8), %rdx
movl %esi, (%rdx,%rcx,4)
movl 0x68(%rbx), %edx
cmpl $0x2, 0x1c(%rbx)
jne 0x2797
movq 0x40(%rbx), %rsi
movq (%rsi,%rdx,8), %rdx
cmpl $0x0, 0x18(%rbx)
je 0x24d2
movl (%rdx,%rcx,4), %esi
xorl %edi, %edi
movl (%rdx,%rdi,4), %r8d
cmpl %esi, %r8d
jae 0x24c6
incl %r8d
movl %r8d, (%rdx,%rdi,4)
incq %rdi
movl 0x18(%rbx), %r8d
cmpq %r8, %rdi
jb 0x24b6
movl $0x0, (%rdx,%rcx,4)
jmp 0x27ab
testb %cl, %cl
je 0x24fd
incl 0x7c(%rbx)
movl $0x1, %r14d
movq %rbx, %rdi
movl $0x1, %edx
callq 0x1e52
jmp 0x2944
incl 0x8c(%rbx)
movl 0x18(%rbx), %eax
movl $0x1, %r14d
testl %eax, %eax
setne %r15b
je 0x262d
movq 0x30(%rbx), %rcx
movl 0x68(%rbx), %edx
movq (%rcx,%rdx,8), %rcx
cmpl $0x0, (%rcx)
je 0x258b
leal -0x1(%rax), %edx
xorl %esi, %esi
cmpl %esi, %edx
je 0x262a
leaq 0x1(%rsi), %r12
cmpl $0x0, 0x4(%rcx,%rsi,4)
movq %r12, %rsi
jne 0x252d
cmpl %eax, %r12d
setb %r15b
jmp 0x258e
xorl %eax, %eax
movl $0x1, %r14d
jmp 0x27ab
movq 0x48(%rbx), %rdx
movq (%rdx,%rcx,8), %rcx
incl (%rcx,%rax,4)
movl $0x1, %r14d
cmpl $0x0, 0x20(%rbx)
jne 0x2944
movq 0x38(%rbx), %rcx
movl 0x68(%rbx), %edx
movq (%rcx,%rdx,8), %rcx
movl $0x1, (%rcx,%rax,4)
jmp 0x2944
xorl %r12d, %r12d
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x259d
movl %ebp, %esi
callq 0x1702
movl 0x64(%rbx), %eax
movq 0x28(%rbx), %rcx
movl 0x68(%rbx), %edx
movq (%rcx,%rdx,8), %rcx
movl %eax, (%rcx,%r12,4)
movq 0x30(%rbx), %rax
movl 0x68(%rbx), %ecx
movq (%rax,%rcx,8), %rax
movl $0x1, %ecx
movl %ecx, (%rax,%r12,4)
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %edx
movq (%rax,%rdx,8), %rax
movl %ecx, (%rax,%r12,4)
movl 0x68(%rbx), %eax
cmpl $0x2, 0x1c(%rbx)
jne 0x2610
movq 0x40(%rbx), %rcx
movq (%rcx,%rax,8), %rax
cmpl $0x0, 0x18(%rbx)
je 0x2606
movl (%rax,%r12,4), %ecx
xorl %edx, %edx
movl (%rax,%rdx,4), %esi
cmpl %ecx, %esi
jae 0x25fb
incl %esi
movl %esi, (%rax,%rdx,4)
incq %rdx
movl 0x18(%rbx), %esi
cmpq %rsi, %rdx
jb 0x25ef
movl $0x0, (%rax,%r12,4)
jmp 0x2625
movq 0x48(%rbx), %rcx
movq 0x50(%rbx), %rdx
movl (%rdx,%rax,4), %edx
incl %edx
movq (%rcx,%rax,8), %rax
movl %edx, (%rax,%r12,4)
xorl %r14d, %r14d
jmp 0x262d
xorl %r15d, %r15d
testb %r15b, %r15b
jne 0x2944
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x2676
cmpl $0x2, %eax
jne 0x26ae
movl 0x18(%rbx), %ecx
testq %rcx, %rcx
je 0x26a9
movl 0x68(%rbx), %eax
movq 0x40(%rbx), %rdx
movq (%rdx,%rax,8), %rdx
xorl %esi, %esi
xorl %edi, %edi
movl %edi, %eax
movl (%rdx,%rax,4), %r8d
movl %esi, %eax
cmpl (%rdx,%rsi,4), %r8d
jb 0x266a
movl %edi, %eax
incq %rsi
movl %eax, %edi
cmpq %rsi, %rcx
jne 0x265a
jmp 0x26ab
movl 0x18(%rbx), %ecx
testq %rcx, %rcx
je 0x26a9
movl 0x68(%rbx), %eax
movq 0x48(%rbx), %rdx
movq (%rdx,%rax,8), %rdx
xorl %esi, %esi
xorl %edi, %edi
movl %edi, %eax
movl (%rdx,%rax,4), %r8d
movl %esi, %eax
cmpl (%rdx,%rsi,4), %r8d
ja 0x269d
movl %edi, %eax
incq %rsi
movl %eax, %edi
cmpq %rsi, %rcx
jne 0x268d
jmp 0x26ab
xorl %eax, %eax
movl %eax, 0x6c(%rbx)
movq 0x8(%rbx), %rdi
movl 0x6c(%rbx), %eax
testq %rdi, %rdi
je 0x2776
movl 0x68(%rbx), %edx
movq 0x28(%rbx), %rsi
movl 0x58(%rbx), %ecx
movl %edx, %r8d
shll %cl, %r8d
movq (%rsi,%rdx,8), %rsi
movl (%rsi,%rax,4), %esi
addl 0x5c(%rbx), %ecx
shll %cl, %esi
movq 0x38(%rbx), %rcx
movq (%rcx,%rdx,8), %rcx
orl %r8d, %esi
movl (%rcx,%rax,4), %edx
callq 0x208c
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x26fc
movl %ebp, %esi
callq 0x1702
movl 0x64(%rbx), %eax
movq 0x28(%rbx), %rcx
movl 0x68(%rbx), %edx
movq (%rcx,%rdx,8), %rcx
movl 0x6c(%rbx), %edx
movl %eax, (%rcx,%rdx,4)
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %ecx
movq (%rax,%rcx,8), %rax
movl 0x6c(%rbx), %ecx
movl $0x1, (%rax,%rcx,4)
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x2917
cmpl $0x2, %eax
jne 0x2941
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %eax
movq 0x40(%rbx), %rdx
movq (%rdx,%rcx,8), %rcx
cmpl $0x0, 0x18(%rbx)
je 0x276a
movl (%rcx,%rax,4), %edx
xorl %esi, %esi
movl (%rcx,%rsi,4), %edi
cmpl %edx, %edi
jae 0x275f
incl %edi
movl %edi, (%rcx,%rsi,4)
incq %rsi
movl 0x18(%rbx), %edi
cmpq %rdi, %rsi
jb 0x2753
movl $0x0, (%rcx,%rax,4)
jmp 0x2941
movq 0x38(%rbx), %rcx
movl 0x68(%rbx), %esi
movq (%rcx,%rsi,8), %rcx
movl (%rcx,%rax,4), %ecx
cmpl $0x1, %ecx
je 0x2950
testl %ecx, %ecx
je 0x26ed
jmp 0x2725
movq 0x48(%rbx), %rsi
movq 0x50(%rbx), %rdi
movl (%rdi,%rdx,4), %edi
incl %edi
movq (%rsi,%rdx,8), %rdx
movl %edi, (%rdx,%rcx,4)
testb %al, %al
jne 0x2944
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x27f3
cmpl $0x2, %eax
jne 0x282b
movl 0x18(%rbx), %ecx
testq %rcx, %rcx
je 0x2826
movl 0x68(%rbx), %eax
movq 0x40(%rbx), %rdx
movq (%rdx,%rax,8), %rdx
xorl %esi, %esi
xorl %edi, %edi
movl %edi, %eax
movl (%rdx,%rax,4), %r8d
movl %esi, %eax
cmpl (%rdx,%rsi,4), %r8d
jb 0x27e7
movl %edi, %eax
incq %rsi
movl %eax, %edi
cmpq %rsi, %rcx
jne 0x27d7
jmp 0x2828
movl 0x18(%rbx), %ecx
testq %rcx, %rcx
je 0x2826
movl 0x68(%rbx), %eax
movq 0x48(%rbx), %rdx
movq (%rdx,%rax,8), %rdx
xorl %esi, %esi
xorl %edi, %edi
movl %edi, %eax
movl (%rdx,%rax,4), %r8d
movl %esi, %eax
cmpl (%rdx,%rsi,4), %r8d
ja 0x281a
movl %edi, %eax
incq %rsi
movl %eax, %edi
cmpq %rsi, %rcx
jne 0x280a
jmp 0x2828
xorl %eax, %eax
movl %eax, 0x6c(%rbx)
cmpl $0x0, 0x20(%rbx)
jne 0x2941
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %ecx
movq (%rax,%rcx,8), %rsi
movl 0x6c(%rbx), %edx
movl (%rsi,%rdx,4), %esi
cmpl $0x1, %esi
je 0x28c0
testl %esi, %esi
jne 0x2941
movl 0x64(%rbx), %esi
movq 0x28(%rbx), %rdi
movq (%rdi,%rcx,8), %rcx
movl %esi, (%rcx,%rdx,4)
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %edx
movq (%rax,%rcx,8), %rax
movl $0x1, (%rax,%rdx,4)
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x2917
cmpl $0x2, %eax
jne 0x2941
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %eax
movq 0x40(%rbx), %rdx
movq (%rdx,%rcx,8), %rcx
cmpl $0x0, 0x18(%rbx)
je 0x276a
movl (%rcx,%rax,4), %edx
xorl %esi, %esi
movl (%rcx,%rsi,4), %edi
cmpl %edx, %edi
jae 0x28b0
incl %edi
movl %edi, (%rcx,%rsi,4)
incq %rsi
movl 0x18(%rbx), %edi
cmpq %rdi, %rsi
jb 0x28a4
jmp 0x276a
incl 0x74(%rbx)
movl 0x64(%rbx), %eax
movq 0x28(%rbx), %rsi
movq (%rsi,%rcx,8), %rcx
movl %eax, (%rcx,%rdx,4)
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x2917
cmpl $0x2, %eax
jne 0x2941
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %eax
movq 0x40(%rbx), %rdx
movq (%rdx,%rcx,8), %rcx
cmpl $0x0, 0x18(%rbx)
je 0x276a
movl (%rcx,%rax,4), %edx
xorl %esi, %esi
movl (%rcx,%rsi,4), %edi
cmpl %edx, %edi
jae 0x2907
incl %edi
movl %edi, (%rcx,%rsi,4)
incq %rsi
movl 0x18(%rbx), %edi
cmpq %rdi, %rsi
jb 0x28fb
jmp 0x276a
movl 0x68(%rbx), %eax
movl 0x6c(%rbx), %ecx
movq 0x48(%rbx), %rdx
movq 0x50(%rbx), %rsi
movq (%rdx,%rax,8), %rdi
movl (%rdi,%rcx,4), %ecx
movl %ecx, (%rsi,%rax,4)
movl 0x68(%rbx), %eax
movl 0x6c(%rbx), %ecx
movl (%rsi,%rax,4), %esi
incl %esi
movq (%rdx,%rax,8), %rax
movl %esi, (%rax,%rcx,4)
xorl %r14d, %r14d
movl %r14d, %eax
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
incl 0x74(%rbx)
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x26ed
movq 0x28(%rbx), %rcx
movq (%rcx,%rsi,8), %rcx
movl (%rcx,%rax,4), %edx
movl 0x58(%rbx), %eax
movl 0x5c(%rbx), %ecx
addl %eax, %ecx
shll %cl, %edx
movl %eax, %ecx
shll %cl, %esi
orl %edx, %esi
callq 0x2272
jmp 0x26ed