// File: /workspace/github_c_makefile_star2_O2/aap[P]pdp11/u_kb11a.c
// Function: update_state
void
update_state(KB11A *kb)
{
	// TODO: tv

	switch(kb->c.rbr.kmx){
	case 0:
		kb->k0mx = 1;
		kb->k1mx = sxt(kb->sv);
		break;
	case 1:
		kb->k0mx = 2;	// TODO: correct?
		kb->k1mx = kb->tv;
		break;
	case 2:
		kb->k0mx = kb->srccon;
		if(kb->c.sr & 0200) kb->k0mx |= 0177400;
		kb->k1mx = kb->c.br & 0377;
		break;
	case 3:
		kb->k0mx = kb->destcon;
		if(kb->c.br & 0200) kb->k0mx |= 0177400;
		kb->k1mx = sxt(kb->c.br) & 0173377;
		break;
	default: assert(0);
	}
	kb->k1mx &= ~1;

	switch(kb->c.rbr.amx){
	case 0: kb->amx = kb->c.dr; break;
	case 1: kb->amx = kb->c.pcb; break;
	case 2: kb->amx = kb->c.sr; break;
	case 3: kb->amx = kb->c.br; break;
	default: assert(0);
	}

	switch(kb->c.rbr.bmx){
	case 0: kb->bmx = kb->k0mx; break;
	case 1: kb->bmx = kb->k1mx; break;
	case 2: kb->bmx = kb->c.sr; break;
	case 3: kb->bmx = kb->c.br; break;
	default: assert(0);
	}

	switch(kb->c.rbr.bax){
	case 0: kb->bamx = kb->c.dr; break;
	case 1: kb->bamx = kb->c.pcb; break;
	case 2: kb->bamx = kb->c.sr; break;
	case 3: kb->bamx = 0; break;	// TODO: EALU
	default: assert(0);
	}

	int shf = kb->c.rbr.shf;
	switch(kb->c.rbr.alu){
	case 0: kb->alu = ~kb->amx&M16; break;
	case 1: kb->alu = kb->bmx; break;
	case 2: kb->alu = kb->amx; break;
	case 3: kb->alu = kb->amx + kb->bmx; break;
	case 4: kb->alu = kb->amx + (kb->amx&(~kb->bmx&M16)); break;
	case 5: kb->alu = kb->amx + kb->amx; break;
	case 6: kb->alu = kb->amx + (~kb->bmx&M16) + 1; break;
	case 7:
		// change shf
		assert(0 && "yikes, not implemented yet");
	default: assert(0);
	}

	switch(shf){
	case 0: kb->shfr = kb->alu<<8 | kb->alu>>8; break;
	case 1: kb->shfr = kb->c.pcb; break;
	case 2: kb->shfr = kb->alu; break;
	// TODO: this is wrong
	case 3: kb->shfr = kb->alu>>1;
assert(0); break;
	default: assert(0);
	}

	switch(kb->c.rbr.ibs){
	case 0: kb->intbus = 0; break;
	case 1: kb->intbus = kb->sw; break;
	case 2: kb->intbus = 0; break;
	case 3: kb->intbus = kb->c.ps; break;
	default: assert(0);
	}

	int wantunibus = kb->c.rbr.bsd==INTR_PAUSE;	// TODO: DDC STOP?
	int wantintbus = kb->c.rbr.ibs&1;	// TODO: SW, KT11, FP
	kb->sel_int = !wantunibus && wantintbus;
	// we don't have fast mem
	kb->sel_mem = !wantunibus && !wantintbus && 0;

	switch(kb->c.rbr.brx<<2 | kb->sel_int<<1 | kb->sel_mem){
	case 0: case 1: case 2: case 3: case 7:
		kb->brmx = kb->shfr;
		break;
	case 4: kb->brmx = kb->unibusd; break;
	case 5: kb->brmx = 0; break;	// membus, we don't have it
	case 6: kb->brmx = kb->intbus; break;
	default: assert(0);
	}
}

// Assembly:
pushq %rax
movl 0x70(%rdi), %eax
cmpq $0x3, %rax
ja 0x2983
leaq 0x198b(%rip), %rcx      # 0x4064
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movw $0x1, 0x20c(%rdi)
movl 0x250(%rdi), %eax
movzbl %al, %eax
xorl %ecx, %ecx
testb %al, %al
setns %cl
shll $0x8, %ecx
leal (%rcx,%rax), %edx
addl $0xffffff00, %edx       # imm = 0xFFFFFF00
movw $0x1, %cx
jmp 0x2784
movzbl 0x20a(%rdi), %ecx
movw %cx, 0x20c(%rdi)
testb $-0x80, 0x6(%rdi)
je 0x2731
movzwl %cx, %ecx
orl $0xff00, %ecx           # imm = 0xFF00
movw %cx, 0x20c(%rdi)
movzbl (%rdi), %edx
jmp 0x2784
movzbl 0x209(%rdi), %ecx
movw %cx, 0x20c(%rdi)
movzwl (%rdi), %edx
movzbl %dl, %eax
testb %dl, %dl
js 0x2768
xorl %edx, %edx
jmp 0x277c
movw $0x2, 0x20c(%rdi)
movzbl 0x20b(%rdi), %edx
movw $0x2, %cx
jmp 0x2784
movzwl %cx, %ecx
orl $0xff00, %ecx           # imm = 0xFF00
movw %cx, 0x20c(%rdi)
movw $0xf600, %dx            # imm = 0xF600
movzwl %ax, %eax
movswl %dx, %edx
orl %eax, %edx
andl $0xfffe, %edx           # imm = 0xFFFE
movw %dx, 0x20e(%rdi)
movl 0x68(%rdi), %eax
cmpq $0x3, %rax
ja 0x29a2
leaq 0x18cf(%rip), %rsi      # 0x4074
movslq (%rsi,%rax,4), %r8
addq %rsi, %r8
movq %rdi, %rax
jmpq *%r8
leaq 0x8(%rdi), %rax
jmp 0x27c2
leaq 0x4(%rdi), %rax
jmp 0x27c2
leaq 0x6(%rdi), %rax
movzwl (%rax), %eax
movw %ax, 0x210(%rdi)
movl 0x6c(%rdi), %esi
cmpq $0x3, %rsi
ja 0x29c1
leaq 0x18a4(%rip), %r8       # 0x4084
movslq (%r8,%rsi,4), %rsi
addq %r8, %rsi
jmpq *%rsi
movl %edx, %ecx
jmp 0x27f6
movzwl 0x6(%rdi), %ecx
jmp 0x27f6
movzwl (%rdi), %ecx
movw %cx, 0x212(%rdi)
movl 0x50(%rdi), %edx
cmpq $0x3, %rdx
ja 0x29e0
leaq 0x1883(%rip), %rsi      # 0x4094
movslq (%rsi,%rdx,4), %rdx
addq %rsi, %rdx
jmpq *%rdx
movzwl 0x8(%rdi), %edx
jmp 0x282e
movzwl 0x6(%rdi), %edx
jmp 0x282e
xorl %edx, %edx
jmp 0x282e
movzwl 0x4(%rdi), %edx
movw %dx, 0x214(%rdi)
movl 0x74(%rdi), %esi
cmpq $0x7, %rsi
ja 0x2a5c
movl 0x3c(%rdi), %edx
leaq 0x1858(%rip), %r8       # 0x40a4
movslq (%r8,%rsi,4), %rsi
addq %r8, %rsi
jmpq *%rsi
xorl $0xffff, %eax           # imm = 0xFFFF
jmp 0x287b
notl %ecx
andl %eax, %ecx
jmp 0x286a
movzwl %cx, %eax
jmp 0x287b
movzwl %cx, %ecx
addl %ecx, %eax
jmp 0x287b
addl %eax, %eax
jmp 0x287b
notl %ecx
movzwl %cx, %ecx
addl %ecx, %eax
incl %eax
movl %eax, 0x21c(%rdi)
cmpl $0x3, %edx
ja 0x2964
movl %edx, %ecx
leaq 0x1831(%rip), %rdx      # 0x40c4
movslq (%rdx,%rcx,4), %rcx
addq %rdx, %rcx
jmpq *%rcx
movl %eax, %ecx
shll $0x8, %ecx
shrl $0x8, %eax
orl %ecx, %eax
jmp 0x28ac
movzwl 0x4(%rdi), %eax
movw %ax, 0x216(%rdi)
movl 0x54(%rdi), %edx
cmpq $0x3, %rdx
ja 0x29ff
leaq 0x180d(%rip), %rcx      # 0x40d4
movslq (%rcx,%rdx,4), %rsi
addq %rcx, %rsi
jmpq *%rsi
xorl %ecx, %ecx
jmp 0x28e4
movzwl 0x254(%rdi), %ecx
jmp 0x28e4
movzwl 0x98(%rdi), %ecx
movw %cx, 0x24e(%rdi)
cmpl $0x1, 0x4c(%rdi)
movl 0x1c(%rdi), %esi
setne %r8b
andb %dl, %r8b
movzbl %r8b, %edx
movl %edx, 0x240(%rdi)
andl $0x0, 0x244(%rdi)
addl %edx, %edx
leal (%rdx,%rsi,4), %edx
cmpl $0x6, %edx
ja 0x2a1e
leaq 0x17c5(%rip), %rsi      # 0x40e4
movslq (%rsi,%rdx,4), %rdx
addq %rsi, %rdx
jmpq *%rdx
movzwl 0x24c(%rdi), %eax
jmp 0x2933
movl %ecx, %eax
movw %ax, 0x218(%rdi)
popq %rax
retq
shrl %eax
movw %ax, 0x216(%rdi)
leaq 0x1b10(%rip), %rdi      # 0x445c
leaq 0x1f7c(%rip), %rsi      # 0x48cf
leaq 0x1f7f(%rip), %rcx      # 0x48d9
movl $0x208, %edx            # imm = 0x208
callq 0x2050
leaq 0x1af1(%rip), %rdi      # 0x445c
leaq 0x1f5d(%rip), %rsi      # 0x48cf
leaq 0x1f60(%rip), %rcx      # 0x48d9
movl $0x209, %edx            # imm = 0x209
callq 0x2050
leaq 0x1ad2(%rip), %rdi      # 0x445c
leaq 0x1f3e(%rip), %rsi      # 0x48cf
leaq 0x1f41(%rip), %rcx      # 0x48d9
movl $0x1d7, %edx            # imm = 0x1D7
callq 0x2050
leaq 0x1ab3(%rip), %rdi      # 0x445c
leaq 0x1f1f(%rip), %rsi      # 0x48cf
leaq 0x1f22(%rip), %rcx      # 0x48d9
movl $0x1e0, %edx            # imm = 0x1E0
callq 0x2050
leaq 0x1a94(%rip), %rdi      # 0x445c
leaq 0x1f00(%rip), %rsi      # 0x48cf
leaq 0x1f03(%rip), %rcx      # 0x48d9
movl $0x1e8, %edx            # imm = 0x1E8
callq 0x2050
leaq 0x1a75(%rip), %rdi      # 0x445c
leaq 0x1ee1(%rip), %rsi      # 0x48cf
leaq 0x1ee4(%rip), %rcx      # 0x48d9
movl $0x1f0, %edx            # imm = 0x1F0
callq 0x2050
leaq 0x1a56(%rip), %rdi      # 0x445c
leaq 0x1ec2(%rip), %rsi      # 0x48cf
leaq 0x1ec5(%rip), %rcx      # 0x48d9
movl $0x211, %edx            # imm = 0x211
callq 0x2050
leaq 0x1a37(%rip), %rdi      # 0x445c
leaq 0x1ea3(%rip), %rsi      # 0x48cf
leaq 0x1ea6(%rip), %rcx      # 0x48d9
movl $0x221, %edx            # imm = 0x221
callq 0x2050
leaq 0x1eb0(%rip), %rdi      # 0x48f4
leaq 0x1e84(%rip), %rsi      # 0x48cf
leaq 0x1e87(%rip), %rcx      # 0x48d9
movl $0x1fe, %edx            # imm = 0x1FE
callq 0x2050
leaq 0x19f9(%rip), %rdi      # 0x445c
leaq 0x1e65(%rip), %rsi      # 0x48cf
leaq 0x1e68(%rip), %rcx      # 0x48d9
movl $0x1ff, %edx            # imm = 0x1FF
callq 0x2050