// File: akshayrajput[P]ARMV8_Simulator/./instructions.cpp
// Function: LSR(int, int, int, int, int)
void LSR(int sf, int sw,int op1, int op2, int  op3 )
{
	//op1 - RD , op2 - RN, op3 - immr
    if(sf)  //64 bit registers
    {
        if(sw == 0) //immediate
        {
            uint64_t op2_data = R[op2].getData();
            uint64_t dat;
            dat = op2_data >> (op3 % 64);
            R[op1].setData(dat);
        }
        
        else    //register
        {
            uint64_t op2_data = R[op2].getData();
            uint64_t op3_data = R[op3].getData();
            uint64_t dat;
            dat = op2_data >> (op3_data % 64);
            R[op1].setData(dat);
        }
    }
    
    else    //32 bit registers
    {
        if(sw == 0) //immediate
        {
            int op2_data = R[op2].getLowerData();
            int dat = op2_data >> (op3 % 32);
            R[op1].setLowerData(dat);
        }
        
        else    //register
        {
            int op2_data = R[op2].getLowerData();
            int op3_data = R[op3].getLowerData();
            int dat = op2_data >> (op3_data % 32);
            R[op1].setLowerData(dat);
        }
    }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x70, %rsp
movl %edi, -0x4(%rbp)
movl %esi, -0x8(%rbp)
movl %edx, -0xc(%rbp)
movl %ecx, -0x10(%rbp)
movl %r8d, -0x14(%rbp)
cmpl $0x0, -0x4(%rbp)
je 0x20f9
cmpl $0x0, -0x8(%rbp)
jne 0x2090
movslq -0x10(%rbp), %rax
leaq 0xc09d(%rip), %rdi      # 0xe0e0
shlq $0x3, %rax
addq %rax, %rdi
callq 0xa6c0
movq %rax, -0x20(%rbp)
movq -0x20(%rbp), %rax
movq %rax, -0x60(%rbp)
movl -0x14(%rbp), %eax
movl $0x40, %ecx
cltd
idivl %ecx
movq -0x60(%rbp), %rax
movl %edx, %ecx
shrq %cl, %rax
movq %rax, -0x28(%rbp)
movslq -0xc(%rbp), %rax
leaq 0xc062(%rip), %rdi      # 0xe0e0
shlq $0x3, %rax
addq %rax, %rdi
movq -0x28(%rbp), %rsi
callq 0xa710
jmp 0x20f4
movslq -0x10(%rbp), %rax
leaq 0xc045(%rip), %rdi      # 0xe0e0
shlq $0x3, %rax
addq %rax, %rdi
callq 0xa6c0
movq %rax, -0x30(%rbp)
movslq -0x14(%rbp), %rax
leaq 0xc02a(%rip), %rdi      # 0xe0e0
shlq $0x3, %rax
addq %rax, %rdi
callq 0xa6c0
movq %rax, -0x38(%rbp)
movq -0x30(%rbp), %rax
movq -0x38(%rbp), %rcx
andq $0x3f, %rcx
shrq %cl, %rax
movq %rax, -0x40(%rbp)
movslq -0xc(%rbp), %rax
leaq 0xbffc(%rip), %rdi      # 0xe0e0
shlq $0x3, %rax
addq %rax, %rdi
movq -0x40(%rbp), %rsi
callq 0xa710
jmp 0x21bb
cmpl $0x0, -0x8(%rbp)
jne 0x2150
movslq -0x10(%rbp), %rax
leaq 0xbfd6(%rip), %rdi      # 0xe0e0
shlq $0x3, %rax
addq %rax, %rdi
callq 0xa6e0
movl %eax, -0x44(%rbp)
movl -0x44(%rbp), %eax
movl %eax, -0x64(%rbp)
movl -0x14(%rbp), %eax
movl $0x20, %ecx
cltd
idivl %ecx
movl -0x64(%rbp), %eax
movl %edx, %ecx
sarl %cl, %eax
movl %eax, -0x48(%rbp)
movslq -0xc(%rbp), %rax
leaq 0xbfa1(%rip), %rdi      # 0xe0e0
shlq $0x3, %rax
addq %rax, %rdi
movl -0x48(%rbp), %esi
callq 0xa730
jmp 0x21b9
movslq -0x10(%rbp), %rax
leaq 0xbf85(%rip), %rdi      # 0xe0e0
shlq $0x3, %rax
addq %rax, %rdi
callq 0xa6e0
movl %eax, -0x4c(%rbp)
movslq -0x14(%rbp), %rax
leaq 0xbf6b(%rip), %rdi      # 0xe0e0
shlq $0x3, %rax
addq %rax, %rdi
callq 0xa6e0
movl %eax, -0x50(%rbp)
movl -0x4c(%rbp), %eax
movl %eax, -0x68(%rbp)
movl -0x50(%rbp), %eax
movl $0x20, %ecx
cltd
idivl %ecx
movl -0x68(%rbp), %eax
movl %edx, %ecx
sarl %cl, %eax
movl %eax, -0x54(%rbp)
movslq -0xc(%rbp), %rax
leaq 0xbf36(%rip), %rdi      # 0xe0e0
shlq $0x3, %rax
addq %rax, %rdi
movl -0x54(%rbp), %esi
callq 0xa730
jmp 0x21bb
addq $0x70, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)