// File: CMU-SAFARI[P]MQSim/src/ssd/TSU_Base.cpp
// Function: SSD_Components::TSU_Base::TSU_Base(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, SSD_Components::FTL*, SSD_Components::NVM_PHY_ONFI_NVDDR2*, SSD_Components::Flash_Scheduling_Type, unsigned int, unsigned int, unsigned int, unsigned int, bool, bool, unsigned long, unsigned long, unsigned long)
TSU_Base::TSU_Base(const sim_object_id_type& id, FTL* ftl, NVM_PHY_ONFI_NVDDR2* NVMController, Flash_Scheduling_Type Type,
		unsigned int ChannelCount, unsigned int chip_no_per_channel, unsigned int DieNoPerChip, unsigned int PlaneNoPerDie,
		bool EraseSuspensionEnabled, bool ProgramSuspensionEnabled,
		sim_time_type WriteReasonableSuspensionTimeForRead,
		sim_time_type EraseReasonableSuspensionTimeForRead,
		sim_time_type EraseReasonableSuspensionTimeForWrite)
		: Sim_Object(id), ftl(ftl), _NVMController(NVMController), type(Type),
		channel_count(ChannelCount), chip_no_per_channel(chip_no_per_channel), die_no_per_chip(DieNoPerChip), plane_no_per_die(PlaneNoPerDie),
		eraseSuspensionEnabled(EraseSuspensionEnabled), programSuspensionEnabled(ProgramSuspensionEnabled),
		writeReasonableSuspensionTimeForRead(WriteReasonableSuspensionTimeForRead), eraseReasonableSuspensionTimeForRead(EraseReasonableSuspensionTimeForRead),
		eraseReasonableSuspensionTimeForWrite(EraseReasonableSuspensionTimeForWrite), opened_scheduling_reqs(0)
	{
		_my_instance = this;
		Round_robin_turn_of_channel = new flash_chip_ID_type[channel_count];
		for (unsigned int channelID = 0; channelID < channel_count; channelID++) {
			Round_robin_turn_of_channel[channelID] = 0;
		}
	}

// Assembly:
subq $0x78, %rsp
movq %rcx, (%rsp)
movq %rdx, %rax
movq (%rsp), %rdx
movq %rax, 0x8(%rsp)
movq %rsi, %rax
movq 0x8(%rsp), %rsi
movq %rax, 0x10(%rsp)
movq %rdi, %r10
movq 0x10(%rsp), %rdi
movq 0xb8(%rsp), %rax
movq 0xb0(%rsp), %rax
movq 0xa8(%rsp), %rax
movb 0xa0(%rsp), %al
movb 0x98(%rsp), %cl
movl 0x90(%rsp), %r11d
movl 0x88(%rsp), %r11d
movl 0x80(%rsp), %r11d
movq %r10, 0x70(%rsp)
movq %rdi, 0x68(%rsp)
movq %rsi, 0x60(%rsp)
movq %rdx, 0x58(%rsp)
movl %r8d, 0x54(%rsp)
movl %r9d, 0x50(%rsp)
andb $0x1, %cl
movb %cl, 0x4f(%rsp)
andb $0x1, %al
movb %al, 0x4e(%rsp)
movq 0x70(%rsp), %rdi
movq %rdi, 0x28(%rsp)
movq 0x68(%rsp), %rsi
callq 0x1fd60
movq 0x28(%rsp), %rdi
leaq 0x3ec7e(%rip), %rax     # 0xd9bc0
movq %rax, (%rdi)
movq 0x60(%rsp), %rax
movq %rax, 0x30(%rdi)
movq 0x58(%rsp), %rax
movq %rax, 0x38(%rdi)
movl 0x54(%rsp), %eax
movl %eax, 0x40(%rdi)
movl 0x50(%rsp), %eax
movl %eax, 0x44(%rdi)
movl 0x80(%rsp), %eax
movl %eax, 0x48(%rdi)
movl 0x88(%rsp), %eax
movl %eax, 0x4c(%rdi)
movl 0x90(%rsp), %eax
movl %eax, 0x50(%rdi)
movb 0x4f(%rsp), %al
andb $0x1, %al
movb %al, 0x54(%rdi)
movb 0x4e(%rsp), %al
andb $0x1, %al
movb %al, 0x55(%rdi)
movq 0xa8(%rsp), %rax
movq %rax, 0x58(%rdi)
movq 0xb0(%rsp), %rax
movq %rax, 0x60(%rdi)
movq 0xb8(%rsp), %rax
movq %rax, 0x68(%rdi)
addq $0x78, %rdi
movq %rdi, 0x18(%rsp)
callq 0x7fbb0
movq 0x28(%rsp), %rdi
addq $0x90, %rdi
movq %rdi, 0x20(%rsp)
callq 0x7fbb0
movq 0x28(%rsp), %rax
movl $0x0, 0xa8(%rax)
movq %rax, 0x43c65(%rip)     # 0xdec58
movl 0x44(%rax), %eax
movl %eax, %edi
shlq $0x2, %rdi
callq 0x8030
movq %rax, 0x30(%rsp)
jmp 0x9b008
movq 0x28(%rsp), %rax
movq 0x30(%rsp), %rcx
movq %rcx, 0x70(%rax)
movl $0x0, 0x38(%rsp)
movq 0x28(%rsp), %rcx
movl 0x38(%rsp), %eax
cmpl 0x44(%rcx), %eax
jae 0x9b07b
movq 0x28(%rsp), %rax
movq 0x70(%rax), %rax
movl 0x38(%rsp), %ecx
movl $0x0, (%rax,%rcx,4)
movl 0x38(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x38(%rsp)
jmp 0x9b01e
movq 0x20(%rsp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x40(%rsp)
movl %eax, 0x3c(%rsp)
callq 0x800c0
movq 0x18(%rsp), %rdi
callq 0x800c0
movq 0x28(%rsp), %rdi
callq 0x1ff90
jmp 0x9b080
addq $0x78, %rsp
retq
movq 0x40(%rsp), %rdi
callq 0x8770
nopw (%rax,%rax)