// File: /workspace/github_cpp_makefile_star2_O3/dramninjasUMD[P]BOBSim/SimpleController.cpp
// Function: BOBSim::SimpleController::AddTransaction(BOBSim::Transaction*)
void SimpleController::AddTransaction(Transaction *trans)
{
	//map physical address to rank/bank/row/col
	AddressMapping(trans->address,mappedRank,mappedBank,mappedRow,mappedCol);

	if(GIVE_LOGIC_PRIORITY && trans->originatedFromLogicOp)
	{
		//if requests from logic ops have priority, put them at the front so they go first
		if(DEBUG_LOGIC) DEBUG("  == Simple Controller received transaction from logic op : "<<*trans);
		switch(trans->transactionType)
		{
		case DATA_READ:
			readCounter++;
			//create column read bus packet and add it to command queue
			commandQueue.push_front(new BusPacket(READ_P,trans->transactionID,mappedCol,mappedRow,mappedRank,mappedBank,trans->portID,trans->transactionSize/DRAM_BUS_WIDTH,trans->mappedChannel,trans->address,trans->originatedFromLogicOp));
			break;
		case DATA_WRITE:
			writeCounter++;
			//create column write bus packet and add it to command queue
			commandQueue.push_front(new BusPacket(WRITE_P,trans->transactionID,mappedCol,mappedRow,mappedRank,mappedBank,trans->portID,trans->transactionSize/DRAM_BUS_WIDTH,trans->mappedChannel,trans->address,trans->originatedFromLogicOp));
			delete trans;
			break;
		default:
			ERROR("== ERROR - Adding wrong transaction to simple controller : "<<*trans);
			abort();
			break;
		}
		//since we're pushing front, add the ACT after so it ends up being first
		commandQueue.push_front(new BusPacket(ACTIVATE, trans->transactionID,mappedCol,mappedRow,mappedRank,mappedBank,trans->portID,0,trans->mappedChannel,trans->address,trans->originatedFromLogicOp));
	}
	else
	{
		//create the row activate bus packet and add it to command queue
		commandQueue.push_back(new BusPacket(ACTIVATE, trans->transactionID,mappedCol,mappedRow,mappedRank,mappedBank,trans->portID,0,trans->mappedChannel,trans->address,trans->originatedFromLogicOp));

		switch(trans->transactionType)
		{
		case DATA_READ:
			readCounter++;
			//create column read bus packet and add it to command queue
			commandQueue.push_back(new BusPacket(READ_P,trans->transactionID,mappedCol,mappedRow,mappedRank,mappedBank,trans->portID,trans->transactionSize/DRAM_BUS_WIDTH,trans->mappedChannel,trans->address,trans->originatedFromLogicOp));
			break;
		case DATA_WRITE:
			writeCounter++;
			//create column write bus packet and add it to command queue
			commandQueue.push_back(new BusPacket(WRITE_P,trans->transactionID,mappedCol,mappedRow,mappedRank,mappedBank,trans->portID,trans->transactionSize/DRAM_BUS_WIDTH,trans->mappedChannel,trans->address,trans->originatedFromLogicOp));
			delete trans;
			break;
		default:
			ERROR("== ERROR - Adding wrong transaction to simple controller : "<<*trans);
			abort();
			break;
		}
	}

	waitingACTS++;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movq 0x8(%rsi), %rsi
callq 0x11d3e
cmpb $0x1, 0x30(%rbx)
jne 0x119b7
movl (%rbx), %eax
cmpl $0x1, %eax
je 0x11ab3
testl %eax, %eax
jne 0x11c61
incl 0xe4(%r14)
movl $0x38, %edi
callq 0x31d0
movq %rax, %r15
movl 0x18(%rbx), %edx
movl 0x184(%r14), %ecx
movl 0x180(%r14), %r8d
movl 0x178(%r14), %r9d
movl 0x17c(%r14), %eax
movl 0x1c(%rbx), %r10d
movl 0x14(%rbx), %r11d
shrl $0x4, %r11d
movl 0x10(%rbx), %r12d
movq %r15, %rdi
movl $0x1, %esi
pushq $0x1
pushq 0x8(%rbx)
pushq %r12
pushq %r11
pushq %r10
pushq %rax
callq 0xc4ec
addq $0x30, %rsp
movq %r15, (%rsp)
movq 0x38(%r14), %rax
cmpq 0x40(%r14), %rax
je 0x11bc4
movq %r15, -0x8(%rax)
addq $-0x8, 0x38(%r14)
jmp 0x11bd0
movl $0x38, %edi
callq 0x31d0
movq %rax, %r12
movl 0x18(%rbx), %edx
movl 0x184(%r14), %ecx
movl 0x180(%r14), %r8d
movl 0x178(%r14), %r9d
movl 0x17c(%r14), %eax
movl 0x1c(%rbx), %r10d
movl 0x10(%rbx), %r11d
xorl %r15d, %r15d
movq %r12, %rdi
movl $0x4, %esi
pushq %r15
pushq 0x8(%rbx)
pushq %r11
pushq %r15
pushq %r10
pushq %rax
callq 0xc4ec
addq $0x30, %rsp
leaq 0x28(%r14), %r15
movq %rsp, %rsi
movq %r12, (%rsi)
movq %r15, %rdi
callq 0x121a6
movl (%rbx), %eax
testl %eax, %eax
je 0x11b33
cmpl $0x1, %eax
jne 0x11c9c
incl 0xe8(%r14)
movl $0x38, %edi
callq 0x31d0
movq %rax, %r12
movl 0x18(%rbx), %edx
movl 0x184(%r14), %ecx
movl 0x180(%r14), %r8d
movl 0x178(%r14), %r9d
movl 0x17c(%r14), %eax
movl 0x1c(%rbx), %r10d
movl 0x14(%rbx), %r11d
shrl $0x4, %r11d
movl 0x10(%rbx), %r13d
movzbl 0x30(%rbx), %ebp
movq %r12, %rdi
movl $0x3, %esi
pushq %rbp
pushq 0x8(%rbx)
pushq %r13
pushq %r11
pushq %r10
pushq %rax
callq 0xc4ec
addq $0x30, %rsp
movq %rsp, %rsi
movq %r12, (%rsi)
movq %r15, %rdi
callq 0x121a6
movl $0x90, %esi
movq %rbx, %rdi
callq 0x31f0
jmp 0x11c4b
incl 0xe8(%r14)
movl $0x38, %edi
callq 0x31d0
movq %rax, %r15
movl 0x18(%rbx), %edx
movl 0x184(%r14), %ecx
movl 0x180(%r14), %r8d
movl 0x178(%r14), %r9d
movl 0x17c(%r14), %eax
movl 0x1c(%rbx), %r10d
movl 0x14(%rbx), %r11d
shrl $0x4, %r11d
movl 0x10(%rbx), %r12d
movq %r15, %rdi
movl $0x3, %esi
pushq $0x1
pushq 0x8(%rbx)
pushq %r12
pushq %r11
pushq %r10
pushq %rax
callq 0xc4ec
addq $0x30, %rsp
movq %r15, (%rsp)
movq 0x38(%r14), %rax
cmpq 0x40(%r14), %rax
je 0x11ba9
movq %r15, -0x8(%rax)
addq $-0x8, 0x38(%r14)
jmp 0x11bb5
incl 0xe4(%r14)
movl $0x38, %edi
callq 0x31d0
movq %rax, %r12
movl 0x18(%rbx), %edx
movl 0x184(%r14), %ecx
movl 0x180(%r14), %r8d
movl 0x178(%r14), %r9d
movl 0x17c(%r14), %eax
movl 0x1c(%rbx), %r10d
movl 0x14(%rbx), %r11d
shrl $0x4, %r11d
movl 0x10(%rbx), %r13d
movzbl 0x30(%rbx), %ebp
movq %r12, %rdi
movl $0x1, %esi
pushq %rbp
pushq 0x8(%rbx)
pushq %r13
pushq %r11
pushq %r10
pushq %rax
callq 0xc4ec
addq $0x30, %rsp
movq %rsp, %rsi
movq %r12, (%rsi)
movq %r15, %rdi
callq 0x121a6
jmp 0x11c4b
leaq 0x28(%r14), %rdi
movq %rsp, %rsi
callq 0x120e0
movl $0x90, %esi
movq %rbx, %rdi
callq 0x31f0
jmp 0x11bd0
leaq 0x28(%r14), %rdi
movq %rsp, %rsi
callq 0x120e0
movl $0x38, %edi
callq 0x31d0
movq %rax, %r15
movl 0x18(%rbx), %edx
movl 0x184(%r14), %ecx
movl 0x180(%r14), %r8d
movl 0x178(%r14), %r9d
movl 0x17c(%r14), %eax
movl 0x1c(%rbx), %r10d
movl 0x10(%rbx), %r11d
movzbl 0x30(%rbx), %r12d
movq %r15, %rdi
movl $0x4, %esi
pushq %r12
pushq 0x8(%rbx)
pushq %r11
pushq $0x0
pushq %r10
pushq %rax
callq 0xc4ec
addq $0x30, %rsp
movq %r15, (%rsp)
movq 0x38(%r14), %rax
cmpq 0x40(%r14), %rax
je 0x11c3f
movq %r15, -0x8(%rax)
addq $-0x8, 0x38(%r14)
jmp 0x11c4b
leaq 0x28(%r14), %rdi
movq %rsp, %rsi
callq 0x120e0
incl 0xf4(%r14)
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x7388(%rip), %rdi      # 0x18ff0
leaq 0x1559(%rip), %rsi      # 0x131c8
callq 0x31c0
leaq 0x2e05(%rip), %rsi      # 0x14a80
movq %rax, %rdi
callq 0x31c0
leaq 0x14e7(%rip), %rsi      # 0x13171
movq %rax, %rdi
callq 0x31c0
movq %rax, %rdi
movl $0x275, %esi            # imm = 0x275
jmp 0x11cd5
movq 0x734d(%rip), %rdi      # 0x18ff0
leaq 0x151e(%rip), %rsi      # 0x131c8
callq 0x31c0
leaq 0x2dca(%rip), %rsi      # 0x14a80
movq %rax, %rdi
callq 0x31c0
leaq 0x14ac(%rip), %rsi      # 0x13171
movq %rax, %rdi
callq 0x31c0
movq %rax, %rdi
movl $0x28f, %esi            # imm = 0x28F
callq 0x3330
leaq 0x14f8(%rip), %rsi      # 0x131d9
movq %rax, %rdi
callq 0x31c0
leaq 0x2e0f(%rip), %rsi      # 0x14aff
movq %rax, %rdi
callq 0x31c0
movq %rax, %rdi
movq %rbx, %rsi
callq 0x12307
movq %rax, %rdi
callq 0x30d0
callq 0x3100
jmp 0x11d25
jmp 0x11d25
jmp 0x11d18
jmp 0x11d18
movq %rax, %rbx
movl $0x38, %esi
movq %r15, %rdi
jmp 0x11d30
movq %rax, %rbx
movl $0x38, %esi
movq %r12, %rdi
callq 0x31f0
movq %rbx, %rdi
callq 0x3340
nop