// File: /workspace/github_cpp_makefile_star2_O1/CMU-SAFARI[P]ramulator/src/Scheduler.h
// Function: ramulator::Scheduler<ramulator::DDR3>::get_head(std::__cxx11::list<ramulator::Request, std::allocator<ramulator::Request>>&)
list<Request>::iterator get_head(list<Request>& q)
    {
        // TODO make the decision at compile time
        if (type != Type::FRFCFS_PriorHit) {
            //If queue is empty, return end of queue
            if (!q.size())
                return q.end();

            //Else return based on the policy
            auto head = q.begin();
            for (auto itr = next(q.begin(), 1); itr != q.end(); itr++)
                head = compare[int(type)](head, itr);

            return head;
        } 
        else { //Code to get around edge cases for FRFCFS_PriorHit
            
       //If queue is empty, return end of queue
            if (!q.size())
                return q.end();

       //Else return based on FRFCFS_PriorHit Scheduling Policy
            auto head = q.begin();
            for (auto itr = next(q.begin(), 1); itr != q.end(); itr++) {
                head = compare[int(Type::FRFCFS_PriorHit)](head, itr);
            }

            if (this->ctrl->is_ready(head) && this->ctrl->is_row_hit(head)) {
                return head;
            }

            // prepare a list of hit request
            vector<vector<int>> hit_reqs;
            for (auto itr = q.begin() ; itr != q.end() ; ++itr) {
                if (this->ctrl->is_row_hit(itr)) {
                    auto begin = itr->addr_vec.begin();
                    // TODO Here it assumes all DRAM standards use PRE to close a row
                    // It's better to make it more general.
                    auto end = begin + int(ctrl->channel->spec->scope[int(T::Command::PRE)]) + 1;
                    vector<int> rowgroup(begin, end); // bank or subarray
                    hit_reqs.push_back(rowgroup);
                }
            }
            // if we can't find proper request, we need to return q.end(),
            // so that no command will be scheduled
            head = q.end();
            for (auto itr = q.begin(); itr != q.end(); itr++) {
                bool violate_hit = false;
                if ((!this->ctrl->is_row_hit(itr)) && this->ctrl->is_row_open(itr)) {
                    // so the next instruction to be scheduled is PRE, might violate hit
                    auto begin = itr->addr_vec.begin();
                    // TODO Here it assumes all DRAM standards use PRE to close a row
                    // It's better to make it more general.
                    auto end = begin + int(ctrl->channel->spec->scope[int(T::Command::PRE)]) + 1;
                    vector<int> rowgroup(begin, end); // bank or subarray
                    for (const auto& hit_req_rowgroup : hit_reqs) {
                        if (rowgroup == hit_req_rowgroup) {
                            violate_hit = true;
                            break;
                        }  
                    }
                }
                if (violate_hit) {
                    continue;
                }
                // If it comes here, that means it won't violate any hit request
                if (head == q.end()) {
                    head = itr;
                } else {
                    head = compare[int(Type::FRFCFS)](head, itr);
                }
            }

            return head;
        }
    }

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
movq %rsi, %r14
movq %rdi, %r13
cmpl $0x3, 0x8(%rdi)
movq 0x10(%rsi), %rax
movq %rsi, 0x20(%rsp)
jne 0x28d87
testq %rax, %rax
je 0x28dd8
movq (%r14), %rbp
movq (%rbp), %rbx
cmpq %r14, %rbx
je 0x28add
leaq 0x78(%r13), %r15
movq %rsp, %r12
movq %rbp, 0x30(%rsp)
movq %rbx, (%rsp)
cmpq $0x0, 0x88(%r13)
je 0x28dfc
movq %r15, %rdi
leaq 0x30(%rsp), %rsi
movq %r12, %rdx
callq *0x90(%r13)
movq %rax, %rbp
movq (%rbx), %rbx
cmpq %r14, %rbx
jne 0x28aa9
movq (%r13), %rdi
movq %rbp, %rsi
callq 0x24454
testb %al, %al
je 0x28b1b
movq (%r13), %rax
movq 0x1098(%rax), %rdi
movq 0x390(%rdi), %rax
movslq 0x3c(%rbp), %rcx
movl 0x1c4(%rax,%rcx,4), %esi
movq 0x20(%rbp), %rdx
callq 0x24a20
testb %al, %al
jne 0x28dea
movq %r13, 0x18(%rsp)
xorps %xmm0, %xmm0
movaps %xmm0, 0x30(%rsp)
movq $0x0, 0x40(%rsp)
movq 0x20(%rsp), %r14
movq (%r14), %rbx
cmpq %r14, %rbx
je 0x28bdb
movq %rsp, %r15
leaq 0x28(%rsp), %r12
leaq 0x30(%rsp), %r13
movq 0x18(%rsp), %rax
movq (%rax), %rax
movq 0x1098(%rax), %rdi
movq 0x390(%rdi), %rax
movslq 0x3c(%rbx), %rcx
movl 0x1c4(%rax,%rcx,4), %esi
movq 0x20(%rbx), %rdx
callq 0x24a20
testb %al, %al
je 0x28bcf
movq 0x20(%rbx), %rsi
movq 0x18(%rsp), %rax
movq (%rax), %rax
movq 0x1098(%rax), %rax
movq 0x390(%rax), %rax
movslq 0x184(%rax), %rax
leaq 0x4(%rsi,%rax,4), %rdx
movq %r15, %rdi
movq %r12, %rcx
callq 0x299ba
movq %r13, %rdi
movq %r15, %rsi
callq 0x299fc
movq (%rsp), %rdi
testq %rdi, %rdi
je 0x28bcf
movq 0x10(%rsp), %rsi
subq %rdi, %rsi
callq 0xb2f0
movq (%rbx), %rbx
cmpq %r14, %rbx
jne 0x28b4f
movq (%r14), %r13
cmpq %r14, %r13
je 0x28ddd
movq 0x18(%rsp), %r12
leaq 0x38(%r12), %rbx
movq %rsp, %r15
movq %r14, %rax
movq %rbx, 0x58(%rsp)
movq %rax, 0x50(%rsp)
movq (%r12), %rax
movq 0x1098(%rax), %rdi
movq 0x390(%rdi), %rax
movslq 0x3c(%r13), %rcx
movl 0x1c4(%rax,%rcx,4), %esi
movq 0x20(%r13), %rdx
callq 0x24a20
testb %al, %al
jne 0x28d40
movq (%r12), %rax
movq 0x1098(%rax), %rdi
movq 0x390(%rdi), %rax
movslq 0x3c(%r13), %rcx
movl 0x1c4(%rax,%rcx,4), %esi
movq 0x20(%r13), %rdx
callq 0x2aa5e
testb %al, %al
je 0x28d40
movq 0x20(%r13), %rsi
movq (%r12), %rax
movq 0x1098(%rax), %rax
movq 0x390(%rax), %rax
movslq 0x184(%rax), %rax
leaq 0x4(%rsi,%rax,4), %rdx
movq %r15, %rdi
leaq 0x28(%rsp), %rcx
callq 0x299ba
movq 0x30(%rsp), %rbx
movq 0x38(%rsp), %r14
cmpq %r14, %rbx
je 0x28d0d
movq %r13, 0x60(%rsp)
movq (%rsp), %rbp
movq 0x8(%rsp), %r13
movq %r13, %r12
subq %rbp, %r12
addq $0x18, %rbx
xorl %r15d, %r15d
cmpq %rbp, %r13
sete %cl
movq -0x18(%rbx), %rsi
movq -0x10(%rbx), %rax
subq %rsi, %rax
cmpq %rax, %r12
sete %al
setne %dl
orb %cl, %dl
jne 0x28ce4
movq %rbp, %rdi
movq %r12, %rdx
callq 0xb300
testl %eax, %eax
sete %al
movzbl %r15b, %r15d
testb %al, %al
movl $0x1, %eax
cmovnel %eax, %r15d
jne 0x28d01
leaq 0x18(%rbx), %rax
cmpq %r14, %rbx
movq %rax, %rbx
jne 0x28cb6
movq 0x18(%rsp), %r12
movq 0x60(%rsp), %r13
jmp 0x28d10
xorl %r15d, %r15d
movq (%rsp), %rdi
testq %rdi, %rdi
movq 0x20(%rsp), %r14
je 0x28d2b
movq 0x10(%rsp), %rsi
subq %rdi, %rsi
callq 0xb2f0
testb $0x1, %r15b
movq 0x58(%rsp), %rbx
movq %rsp, %r15
je 0x28d40
movq 0x50(%rsp), %rbp
jmp 0x28d75
movq %r13, %rbp
movq 0x50(%rsp), %rax
cmpq %r14, %rax
je 0x28d75
movq %rax, (%rsp)
movq %r13, 0x28(%rsp)
cmpq $0x0, 0x48(%r12)
je 0x28e01
movq %rbx, %rdi
movq %r15, %rsi
leaq 0x28(%rsp), %rdx
callq *0x50(%r12)
movq %rax, %rbp
movq (%r13), %r13
movq %rbp, %rax
cmpq %r14, %r13
jne 0x28bfc
jmp 0x28de0
testq %rax, %rax
je 0x28dd8
movq (%r14), %rbp
movq (%rbp), %rbx
cmpq %r14, %rbx
je 0x28dea
leaq 0x18(%r13), %r14
leaq 0x30(%rsp), %r15
movq %rsp, %r12
movslq 0x8(%r13), %rdi
shlq $0x5, %rdi
movq %rbp, 0x30(%rsp)
movq %rbx, (%rsp)
cmpq $0x0, 0x10(%r14,%rdi)
je 0x28dfc
addq %r14, %rdi
movq %r15, %rsi
movq %r12, %rdx
callq *0x18(%rdi)
movq %rax, %rbp
movq (%rbx), %rbx
cmpq 0x20(%rsp), %rbx
jne 0x28da4
jmp 0x28dea
movq %r14, %rbp
jmp 0x28dea
movq %r14, %rbp
leaq 0x30(%rsp), %rdi
callq 0x24e4c
movq %rbp, %rax
addq $0x68, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
callq 0xb160
callq 0xb160
jmp 0x28e2b
jmp 0x28e2b
movq %rax, %rbx
movq (%rsp), %rdi
testq %rdi, %rdi
je 0x28e2e
movq 0x10(%rsp), %rsi
subq %rdi, %rsi
callq 0xb2f0
jmp 0x28e2e
jmp 0x28e2b
jmp 0x28e2b
jmp 0x28e2b
movq %rax, %rbx
leaq 0x30(%rsp), %rdi
callq 0x24e4c
movq %rbx, %rdi
callq 0xb510