// File: /workspace/github_c_makefile_star2_O2/samtools[P]htslib/htscodecs/htscodecs/rANS_static32x16pr_avx2.c
// Function: rans_compress_O0_32x16_avx2
unsigned char *rans_compress_O0_32x16_avx2(unsigned char *in,
                                           unsigned int in_size,
                                           unsigned char *out,
                                           unsigned int *out_size) {
    unsigned char *cp, *out_end;
    RansEncSymbol syms[256];
    RansState ransN[NX] __attribute__((aligned(32)));
    uint8_t* ptr;
    uint32_t F[256+MAGIC] = {0};
    int i, j, tab_size = 0, x, z;
    // -20 for order/size/meta
    uint32_t bound = rans_compress_bound_4x16(in_size,0)-20;

    if (!out) {
        *out_size = bound;
        out = malloc(*out_size);
    }
    if (!out || bound > *out_size)
        return NULL;

    // If "out" isn't word aligned, tweak out_end/ptr to ensure it is.
    // We already added more round in bound to allow for this.
    if (((size_t)out)&1)
        bound--;
    ptr = out_end = out + bound;

    if (in_size == 0)
        goto empty;

    // Compute statistics
    if (hist8(in, in_size, F) < 0)
        return NULL;

    // Normalise so frequences sum to power of 2
    uint32_t fsum = in_size;
    uint32_t max_val = round2(fsum);
    if (max_val > TOTFREQ)
        max_val = TOTFREQ;

    if (normalise_freq(F, fsum, max_val) < 0)
        return NULL;
    fsum=max_val;

    cp = out;
    cp += encode_freq(cp, F);
    tab_size = cp-out;
    //write(2, out+4, cp-(out+4));

    if (normalise_freq(F, fsum, TOTFREQ) < 0)
        return NULL;

    // Encode statistics.
    for (x = j = 0; j < 256; j++) {
        if (F[j]) {
            RansEncSymbolInit(&syms[j], x, F[j], TF_SHIFT);
            x += F[j];
        }
    }

    for (z = 0; z < NX; z++)
      RansEncInit(&ransN[z]);

    z = i = in_size&(NX-1);
    while (z-- > 0)
      RansEncPutSymbol(&ransN[z], &ptr, &syms[in[in_size-(i-z)]]);

    uint16_t *ptr16 = (uint16_t *)ptr;

    LOAD(Rv, ransN);

    for (i=(in_size &~(NX-1)); i>0; i-=NX) {
        // We need to gather sym[curr_char][last_char] structs.
        // These hold 4 32-bit values, so are 128 bit each, and
        // are loaded from 32 distinct addresses.
        //
        // We load them into 32 128-bit lanes and then combine to get
        // 16 avx-256 registers.
        // These are now ABCD ABCD ABCD ABCD... orientation
        // We can then "gather" from these registers via a combination
        // of shuffle / permutes / and / or operations.  This is less
        // IO than repeating 4 sets of gathers/loads 32-times over.

        // DCBA holding 4 elements in a syms[] array
        // -> 4-way rotate via shuffles
        // [0] DCBA  11 10 01 00  E4
        // [1] CBAD  10 01 00 11  93
        // [2] BADC  01 00 11 10  4E
        // [3] ADCB  00 11 10 01  39
        //
        // Then AND to select relevant lanes and OR
        // [0] ......A0
        // [1] ....A1..
        // [2] ..A2....
        // [3] A3......  OR to get A3A2A1A0
        //
        // or:
        // [0] ....B0..
        // [1] ..B1....
        // [2] B2......
        // [3] ......B3  OR to get B2B1B0B3 and shuffle to B3B2B1B0

        __m256i sh[16];
        for (z = 0; z < 16; z+=4) {
            int Z = i - NX + z*2;

#define m128_to_256 _mm256_castsi128_si256
            __m256i t0, t1, t2, t3;
            __m128i *s0, *s1, *s2, *s3;
            s0 = (__m128i *)(&syms[in[Z+0]]);
            s1 = (__m128i *)(&syms[in[Z+4]]);
            s2 = (__m128i *)(&syms[in[Z+1]]);
            s3 = (__m128i *)(&syms[in[Z+5]]);

            // FIXME: try load instead of loadu, as 128-bit aligned.
            t0 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s0)), 0xE4);
            t1 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s1)), 0xE4);
            t2 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s2)), 0x93);
            t3 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s3)), 0x93);

            sh[z+0] = _mm256_permute2x128_si256(t0, t1, 0x20);
            sh[z+1] = _mm256_permute2x128_si256(t2, t3, 0x20);

            s0 = (__m128i *)(&syms[in[Z+2]]);
            s1 = (__m128i *)(&syms[in[Z+6]]);
            s2 = (__m128i *)(&syms[in[Z+3]]);
            s3 = (__m128i *)(&syms[in[Z+7]]);

            t0 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s0)), 0x4E);
            t1 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s1)), 0x4E);
            t2 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s2)), 0x39);
            t3 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s3)), 0x39);

            sh[z+2] = _mm256_permute2x128_si256(t0, t1, 0x20);
            sh[z+3] = _mm256_permute2x128_si256(t2, t3, 0x20);

            // potential to set xmax, rf, bias, and SD in-situ here, removing
            // the need to hold sh[] in regs.  Doing so doesn't seem to speed
            // things up though.
        }

        __m256i xA = _mm256_set_epi32(0,0,0,-1, 0,0,0,-1);
        __m256i xB = _mm256_set_epi32(0,0,-1,0, 0,0,-1,0);
        __m256i xC = _mm256_set_epi32(0,-1,0,0, 0,-1,0,0);
        __m256i xD = _mm256_set_epi32(-1,0,0,0, -1,0,0,0);

#define SYM_LOAD(x, A, B, C, D)                                         \
        _mm256_or_si256(_mm256_or_si256(_mm256_and_si256(sh[x+0], A),   \
                                        _mm256_and_si256(sh[x+1], B)),  \
                        _mm256_or_si256(_mm256_and_si256(sh[x+2], C),   \
                                        _mm256_and_si256(sh[x+3], D)))

        // Renorm:
        // if (x > x_max) {*--ptr16 = x & 0xffff; x >>= 16;}
        __m256i xmax1 = SYM_LOAD( 0, xA, xB, xC, xD);
        __m256i xmax2 = SYM_LOAD( 4, xA, xB, xC, xD);
        __m256i xmax3 = SYM_LOAD( 8, xA, xB, xC, xD);
        __m256i xmax4 = SYM_LOAD(12, xA, xB, xC, xD);

        __m256i cv1 = _mm256_cmpgt_epi32(Rv1, xmax1);
        __m256i cv2 = _mm256_cmpgt_epi32(Rv2, xmax2);
        __m256i cv3 = _mm256_cmpgt_epi32(Rv3, xmax3);
        __m256i cv4 = _mm256_cmpgt_epi32(Rv4, xmax4);

        // Store bottom 16-bits at ptr16
        unsigned int imask1 = _mm256_movemask_ps((__m256)cv1);
        unsigned int imask2 = _mm256_movemask_ps((__m256)cv2);
        unsigned int imask3 = _mm256_movemask_ps((__m256)cv3);
        unsigned int imask4 = _mm256_movemask_ps((__m256)cv4);

        __m256i idx1 = _mm256_load_si256((const __m256i*)permutec[imask1]);
        __m256i idx2 = _mm256_load_si256((const __m256i*)permutec[imask2]);
        __m256i idx3 = _mm256_load_si256((const __m256i*)permutec[imask3]);
        __m256i idx4 = _mm256_load_si256((const __m256i*)permutec[imask4]);

        // Permute; to gather together the rans states that need flushing
        __m256i V1, V2, V3, V4;
        V1 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv1, cv1), idx1);
        V2 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv2, cv2), idx2);
        V3 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv3, cv3), idx3);
        V4 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv4, cv4), idx4);
        
        // We only flush bottom 16 bits, to squash 32-bit states into 16 bit.
        V1 = _mm256_and_si256(V1, _mm256_set1_epi32(0xffff));
        V2 = _mm256_and_si256(V2, _mm256_set1_epi32(0xffff));
        V3 = _mm256_and_si256(V3, _mm256_set1_epi32(0xffff));
        V4 = _mm256_and_si256(V4, _mm256_set1_epi32(0xffff));
        __m256i V12 = _mm256_packus_epi32(V1, V2);
        __m256i V34 = _mm256_packus_epi32(V3, V4);

        // It's BAba order, want BbAa so shuffle.
        V12 = _mm256_permute4x64_epi64(V12, 0xd8);
        V34 = _mm256_permute4x64_epi64(V34, 0xd8);

        // Now we have bottom N 16-bit values in each V12/V34 to flush
        __m128i f =  _mm256_extractf128_si256(V34, 1);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask4);

        f =  _mm256_extractf128_si256(V34, 0);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask3);

        f =  _mm256_extractf128_si256(V12, 1);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask2);

        f =  _mm256_extractf128_si256(V12, 0);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask1);

        __m256i Rs;
        Rs = _mm256_srli_epi32(Rv1,16); Rv1 = _mm256_blendv_epi8(Rv1, Rs, cv1);
        Rs = _mm256_srli_epi32(Rv2,16); Rv2 = _mm256_blendv_epi8(Rv2, Rs, cv2);
        Rs = _mm256_srli_epi32(Rv3,16); Rv3 = _mm256_blendv_epi8(Rv3, Rs, cv3);
        Rs = _mm256_srli_epi32(Rv4,16); Rv4 = _mm256_blendv_epi8(Rv4, Rs, cv4);

        // Cannot trivially replace the multiply as mulhi_epu32 doesn't
        // exist (only mullo).
        // However we can use _mm256_mul_epu32 twice to get 64bit results
        // (half our lanes) and shift/or to get the answer.
        //
        // (AVX512 allows us to hold it all in 64-bit lanes and use mullo_epi64
        // plus a shift.  KNC has mulhi_epi32, but not sure if this is
        // available.)
        __m256i rfv1 = _mm256_shuffle_epi32(SYM_LOAD( 0, xB, xC, xD, xA),0x39);
        __m256i rfv2 = _mm256_shuffle_epi32(SYM_LOAD( 4, xB, xC, xD, xA),0x39);
        __m256i rfv3 = _mm256_shuffle_epi32(SYM_LOAD( 8, xB, xC, xD, xA),0x39);
        __m256i rfv4 = _mm256_shuffle_epi32(SYM_LOAD(12, xB, xC, xD, xA),0x39);

        rfv1 = _mm256_mulhi_epu32(Rv1, rfv1);
        rfv2 = _mm256_mulhi_epu32(Rv2, rfv2);
        rfv3 = _mm256_mulhi_epu32(Rv3, rfv3);
        rfv4 = _mm256_mulhi_epu32(Rv4, rfv4);

        __m256i SDv1 = _mm256_shuffle_epi32(SYM_LOAD( 0, xD, xA, xB, xC),0x93);
        __m256i SDv2 = _mm256_shuffle_epi32(SYM_LOAD( 4, xD, xA, xB, xC),0x93);
        __m256i SDv3 = _mm256_shuffle_epi32(SYM_LOAD( 8, xD, xA, xB, xC),0x93);
        __m256i SDv4 = _mm256_shuffle_epi32(SYM_LOAD(12, xD, xA, xB, xC),0x93);

        __m256i shiftv1 = _mm256_srli_epi32(SDv1, 16);
        __m256i shiftv2 = _mm256_srli_epi32(SDv2, 16);
        __m256i shiftv3 = _mm256_srli_epi32(SDv3, 16);
        __m256i shiftv4 = _mm256_srli_epi32(SDv4, 16);

        shiftv1 = _mm256_sub_epi32(shiftv1, _mm256_set1_epi32(32));
        shiftv2 = _mm256_sub_epi32(shiftv2, _mm256_set1_epi32(32));
        shiftv3 = _mm256_sub_epi32(shiftv3, _mm256_set1_epi32(32));
        shiftv4 = _mm256_sub_epi32(shiftv4, _mm256_set1_epi32(32));

        __m256i qv1 = _mm256_srlv_epi32(rfv1, shiftv1);
        __m256i qv2 = _mm256_srlv_epi32(rfv2, shiftv2);

        __m256i freqv1 = _mm256_and_si256(SDv1, _mm256_set1_epi32(0xffff));
        __m256i freqv2 = _mm256_and_si256(SDv2, _mm256_set1_epi32(0xffff));
        qv1 = _mm256_mullo_epi32(qv1, freqv1);
        qv2 = _mm256_mullo_epi32(qv2, freqv2);

        __m256i qv3 = _mm256_srlv_epi32(rfv3, shiftv3);
        __m256i qv4 = _mm256_srlv_epi32(rfv4, shiftv4);

        __m256i freqv3 = _mm256_and_si256(SDv3, _mm256_set1_epi32(0xffff));
        __m256i freqv4 = _mm256_and_si256(SDv4, _mm256_set1_epi32(0xffff));
        qv3 = _mm256_mullo_epi32(qv3, freqv3);
        qv4 = _mm256_mullo_epi32(qv4, freqv4);

        __m256i biasv1=_mm256_shuffle_epi32(SYM_LOAD( 0, xC, xD, xA, xB),0x4E);
        __m256i biasv2=_mm256_shuffle_epi32(SYM_LOAD( 4, xC, xD, xA, xB),0x4E);
        __m256i biasv3=_mm256_shuffle_epi32(SYM_LOAD( 8, xC, xD, xA, xB),0x4E);
        __m256i biasv4=_mm256_shuffle_epi32(SYM_LOAD(12, xC, xD, xA, xB),0x4E);

        qv1 = _mm256_add_epi32(qv1, biasv1);
        qv2 = _mm256_add_epi32(qv2, biasv2);
        qv3 = _mm256_add_epi32(qv3, biasv3);
        qv4 = _mm256_add_epi32(qv4, biasv4);

        Rv1 = _mm256_add_epi32(Rv1, qv1);
        Rv2 = _mm256_add_epi32(Rv2, qv2);
        Rv3 = _mm256_add_epi32(Rv3, qv3);
        Rv4 = _mm256_add_epi32(Rv4, qv4);
    }

    STORE(Rv, ransN);

    ptr = (uint8_t *)ptr16;
    for (z = NX-1; z >= 0; z--)
      RansEncFlush(&ransN[z], &ptr);

 empty:
    // Finalise block size and return it
    *out_size = (out_end - ptr) + tab_size;

//    cp = out;
//    *cp++ = (in_size>> 0) & 0xff;
//    *cp++ = (in_size>> 8) & 0xff;
//    *cp++ = (in_size>>16) & 0xff;
//    *cp++ = (in_size>>24) & 0xff;

    memmove(out + tab_size, ptr, out_end-ptr);

    return out;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
andq $-0x20, %rsp
subq $0x1fa0, %rsp           # imm = 0x1FA0
movq %rcx, %r14
movq %rdx, %r15
movl %esi, %ebx
movq %rdi, %r13
leaq 0xb60(%rsp), %rdi
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
movq %rbx, 0x20(%rsp)
movl %ebx, %edi
xorl %esi, %esi
callq 0x4edbc
movl %eax, %edx
leal -0x14(%rdx), %ebx
testq %r15, %r15
je 0x52bc5
cmpl (%r14), %ebx
jbe 0x52be1
jmp 0x52efa
movl %ebx, (%r14)
movl %ebx, %edi
movq %rdx, %r15
callq 0x4680
movq %r15, %rdx
movq %rax, %r15
testq %rax, %rax
je 0x52efa
addl $-0x15, %edx
testb $0x1, %r15b
cmovel %ebx, %edx
addq %r15, %rdx
movq %rdx, 0x18(%rsp)
movq 0x20(%rsp), %r12
testl %r12d, %r12d
je 0x52cf6
movq %rdx, 0x50(%rsp)
movq %r14, 0x58(%rsp)
movl %r12d, %ebx
cmpl $0x7a121, %r12d         # imm = 0x7A121
jb 0x52d01
pushq $0x4
popq %rsi
movl $0x3006f, %edi          # imm = 0x3006F
callq 0x6426c
testq %rax, %rax
je 0x52efa
movq 0x20(%rsp), %rdx
andl $-0x10, %edx
xorl %ecx, %ecx
cmpq %rdx, %rcx
jae 0x52cb6
movzwl (%r13,%rcx), %esi
movzwl 0x2(%r13,%rcx), %edi
movzwl 0x4(%r13,%rcx), %r8d
movzwl 0x6(%r13,%rcx), %r9d
incl (%rax,%rsi,4)
incl 0x40094(%rax,%rdi,4)
incl 0x80128(%rax,%r8,4)
incl (%rax,%r9,4)
movzwl 0x8(%r13,%rcx), %esi
movzwl 0xa(%r13,%rcx), %edi
movzwl 0xc(%r13,%rcx), %r8d
movzwl 0xe(%r13,%rcx), %r9d
incl 0x40094(%rax,%rsi,4)
incl (%rax,%rdi,4)
incl 0x40094(%rax,%r8,4)
incl 0x80128(%rax,%r9,4)
addq $0x10, %rcx
jmp 0x52c3b
movzbl (%r13,%rcx), %edx
incq %rcx
incl 0xb60(%rsp,%rdx,4)
cmpq %rbx, %rcx
jb 0x52ca6
xorl %ecx, %ecx
cmpq $0x10000, %rcx          # imm = 0x10000
je 0x52e01
movl 0x40094(%rax,%rcx,4), %edx
addl (%rax,%rcx,4), %edx
addl 0x80128(%rax,%rcx,4), %edx
movzbl %cl, %esi
addl %edx, 0xb60(%rsp,%rsi,4)
movl %ecx, %esi
shrl $0x8, %esi
addl %edx, 0xb60(%rsp,%rsi,4)
incq %rcx
jmp 0x52cbd
xorl %r12d, %r12d
movq %rdx, %rsi
jmp 0x537c5
movq %r15, %r14
leaq 0xf80(%rsp), %rdi
xorl %r15d, %r15d
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
leaq 0x320(%rsp), %rdi
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
leaq 0x740(%rsp), %rdi
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
movl %r12d, %eax
andl $0x7fff8, %eax          # imm = 0x7FFF8
cmpq %rax, %r15
jae 0x52dce
movzbl (%r13,%r15), %ecx
incl 0xb60(%rsp,%rcx,4)
movzbl 0x1(%r13,%r15), %ecx
incl 0xf80(%rsp,%rcx,4)
movzbl 0x2(%r13,%r15), %ecx
incl 0x320(%rsp,%rcx,4)
movzbl 0x3(%r13,%r15), %ecx
incl 0x740(%rsp,%rcx,4)
movzbl 0x4(%r13,%r15), %ecx
incl 0xb60(%rsp,%rcx,4)
movzbl 0x5(%r13,%r15), %ecx
incl 0xf80(%rsp,%rcx,4)
movzbl 0x6(%r13,%r15), %ecx
incl 0x320(%rsp,%rcx,4)
movzbl 0x7(%r13,%r15), %ecx
incl 0x740(%rsp,%rcx,4)
addq $0x8, %r15
jmp 0x52d4b
movzbl (%r13,%r15), %eax
incq %r15
incl 0xb60(%rsp,%rax,4)
cmpq %rbx, %r15
jb 0x52dbe
xorl %eax, %eax
movq %r14, %r15
cmpq $0x100, %rax            # imm = 0x100
je 0x52e09
movl 0x320(%rsp,%rax,4), %ecx
addl 0xf80(%rsp,%rax,4), %ecx
addl 0x740(%rsp,%rax,4), %ecx
addl %ecx, 0xb60(%rsp,%rax,4)
incq %rax
jmp 0x52dd8
movq %rax, %rdi
callq 0x64291
movq 0x20(%rsp), %rsi
leal -0x1(%rsi), %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x8, %eax
orl %ecx, %eax
movl %eax, %ebx
shrl $0x10, %ebx
orl %eax, %ebx
incl %ebx
movl $0x1000, %eax           # imm = 0x1000
cmpl %eax, %ebx
cmovael %eax, %ebx
leaq 0xb60(%rsp), %rdi
movl %ebx, %edx
callq 0x537ee
testl %eax, %eax
js 0x52efa
leaq 0xb60(%rsp), %rsi
movq %r15, %rdi
callq 0x56483
movslq %eax, %r12
addq %r15, %r12
xorl %r14d, %r14d
cmpq $0x100, %r14            # imm = 0x100
je 0x52e96
movl 0xb60(%rsp,%r14,4), %esi
testl %esi, %esi
je 0x52e91
movq %r12, %rdi
callq 0x56501
movl %eax, %eax
addq %rax, %r12
incq %r14
jmp 0x52e6f
leaq 0xb60(%rsp), %rdi
movl %ebx, %esi
movl $0x1000, %edx           # imm = 0x1000
callq 0x537ee
xorl %ebx, %ebx
testl %eax, %eax
js 0x52efa
movq %r15, 0x48(%rsp)
subl %r15d, %r12d
movq %r12, 0x40(%rsp)
leaq 0xf80(%rsp), %r15
xorl %r14d, %r14d
cmpq $0x100, %r14            # imm = 0x100
je 0x52f02
movl 0xb60(%rsp,%r14,4), %r12d
testl %r12d, %r12d
je 0x52ef1
movq %r15, %rdi
movl %ebx, %esi
movl %r12d, %edx
pushq $0xc
popq %rcx
callq 0x53911
addl %r12d, %ebx
incq %r14
addq $0x10, %r15
jmp 0x52ec8
xorl %r15d, %r15d
jmp 0x537dc
xorl %eax, %eax
cmpq $0x20, %rax
je 0x52f1a
movl $0x8000, 0x740(%rsp,%rax,4) # imm = 0x8000
incq %rax
jmp 0x52f04
movq 0x20(%rsp), %rax
movl %eax, %ecx
andl $-0x20, %ecx
andl $0x1f, %eax
movq %rcx, 0x20(%rsp)
leal -0x20(%rcx), %r12d
orq $0x1f, %r12
leaq (%rsp,%rax,4), %rbx
addq $0x73c, %rbx            # imm = 0x73C
leaq 0x18(%rsp), %r15
testq %rax, %rax
jle 0x52f78
leaq -0x1(%rax), %r14
addl %r12d, %eax
movzbl (%r13,%rax), %eax
shll $0x4, %eax
leaq (%rsp,%rax), %rdx
addq $0xf80, %rdx            # imm = 0xF80
movq %rbx, %rdi
movq %r15, %rsi
callq 0x53a08
addq $-0x4, %rbx
movq %r14, %rax
jmp 0x52f44
movq 0x18(%rsp), %rsi
vmovdqa 0x740(%rsp), %ymm3
vmovdqa 0x760(%rsp), %ymm2
vmovdqa 0x780(%rsp), %ymm15
vmovdqa 0x7a0(%rsp), %ymm8
movslq 0x20(%rsp), %rax
leaq 0x380(%rsp), %rcx
leaq -0x19(%rax,%r13), %rdx
leaq 0x2ad66(%rip), %rdi     # 0x7dd20
vpbroadcastd 0x2acfd(%rip), %ymm0 # 0x7dcc0
vmovdqa %ymm0, 0x1c0(%rsp)
movq 0x48(%rsp), %r15
movq 0x40(%rsp), %r12
vpxor %xmm14, %xmm14, %xmm14
testq %rax, %rax
jle 0x5377c
addq $-0x20, %rax
movq %rcx, %r8
xorl %r9d, %r9d
cmpq $0xf, %r9
ja 0x530d6
movzbl -0x7(%rdx,%r9,2), %r10d
shll $0x4, %r10d
movzbl -0x3(%rdx,%r9,2), %r11d
shll $0x4, %r11d
movzbl -0x6(%rdx,%r9,2), %ebx
shll $0x4, %ebx
movzbl -0x2(%rdx,%r9,2), %r14d
shll $0x4, %r14d
vmovaps 0xf80(%rsp,%r10), %xmm0
vmovaps 0xf80(%rsp,%r11), %xmm1
vpermilps $0x93, 0xf80(%rsp,%rbx), %xmm4 # xmm4 = mem[3,0,1,2]
vpermilps $0x93, 0xf80(%rsp,%r14), %xmm5 # xmm5 = mem[3,0,1,2]
vmovaps %xmm1, -0x50(%r8)
vmovaps %xmm0, -0x60(%r8)
vmovaps %xmm5, -0x30(%r8)
vmovaps %xmm4, -0x40(%r8)
movzbl -0x5(%rdx,%r9,2), %r10d
shll $0x4, %r10d
movzbl -0x1(%rdx,%r9,2), %r11d
shll $0x4, %r11d
movzbl -0x4(%rdx,%r9,2), %ebx
shll $0x4, %ebx
movzbl (%rdx,%r9,2), %r14d
shll $0x4, %r14d
vpshufd $0x4e, 0xf80(%rsp,%r10), %xmm0 # xmm0 = mem[2,3,0,1]
vpshufd $0x4e, 0xf80(%rsp,%r11), %xmm1 # xmm1 = mem[2,3,0,1]
vpshufd $0x39, 0xf80(%rsp,%rbx), %xmm4 # xmm4 = mem[1,2,3,0]
vpshufd $0x39, 0xf80(%rsp,%r14), %xmm5 # xmm5 = mem[1,2,3,0]
vmovdqa %xmm1, -0x10(%r8)
vmovdqa %xmm0, -0x20(%r8)
vmovdqa %xmm5, 0x10(%r8)
vmovdqa %xmm4, (%r8)
addq $0x4, %r9
subq $-0x80, %r8
jmp 0x52fee
vmovdqa 0x320(%rsp), %ymm1
vmovdqa 0x340(%rsp), %ymm5
vmovdqa %ymm5, 0x1a0(%rsp)
vmovdqa 0x360(%rsp), %ymm4
vpblendd $0x11, %ymm1, %ymm14, %ymm0 # ymm0 = ymm1[0],ymm14[1,2,3],ymm1[4],ymm14[5,6,7]
vmovdqa %ymm1, %ymm12
vpblendd $0x22, %ymm5, %ymm14, %ymm1 # ymm1 = ymm14[0],ymm5[1],ymm14[2,3,4],ymm5[5],ymm14[6,7]
vpor %ymm0, %ymm1, %ymm0
vpblendd $0x44, %ymm4, %ymm14, %ymm1 # ymm1 = ymm14[0,1],ymm4[2],ymm14[3,4,5],ymm4[6],ymm14[7]
vmovdqa %ymm4, %ymm11
vpor %ymm1, %ymm0, %ymm0
vmovdqa 0x3a0(%rsp), %ymm1
vmovdqa %ymm1, 0x140(%rsp)
vpblendd $0x11, %ymm1, %ymm14, %ymm1 # ymm1 = ymm1[0],ymm14[1,2,3],ymm1[4],ymm14[5,6,7]
vmovdqa 0x3c0(%rsp), %ymm4
vmovdqa %ymm4, 0x300(%rsp)
vpblendd $0x22, %ymm4, %ymm14, %ymm4 # ymm4 = ymm14[0],ymm4[1],ymm14[2,3,4],ymm4[5],ymm14[6,7]
vpor %ymm1, %ymm4, %ymm1
vmovdqa 0x3e0(%rsp), %ymm4
vmovdqa %ymm4, 0x20(%rsp)
vpblendd $0x44, %ymm4, %ymm14, %ymm4 # ymm4 = ymm14[0,1],ymm4[2],ymm14[3,4,5],ymm4[6],ymm14[7]
vpor %ymm4, %ymm1, %ymm10
vmovdqa 0x420(%rsp), %ymm1
vmovdqa %ymm1, 0x120(%rsp)
vpblendd $0x11, %ymm1, %ymm14, %ymm1 # ymm1 = ymm1[0],ymm14[1,2,3],ymm1[4],ymm14[5,6,7]
vmovdqa 0x440(%rsp), %ymm4
vmovdqa %ymm4, 0x180(%rsp)
vpblendd $0x22, %ymm4, %ymm14, %ymm4 # ymm4 = ymm14[0],ymm4[1],ymm14[2,3,4],ymm4[5],ymm14[6,7]
vpor %ymm1, %ymm4, %ymm1
vmovdqa 0x460(%rsp), %ymm13
vpblendd $0x44, %ymm13, %ymm14, %ymm4 # ymm4 = ymm14[0,1],ymm13[2],ymm14[3,4,5],ymm13[6],ymm14[7]
vmovdqa %ymm13, 0x240(%rsp)
vpor %ymm4, %ymm1, %ymm5
vmovdqa 0x4a0(%rsp), %ymm1
vmovdqa %ymm1, 0x80(%rsp)
vpblendd $0x11, %ymm1, %ymm14, %ymm1 # ymm1 = ymm1[0],ymm14[1,2,3],ymm1[4],ymm14[5,6,7]
vmovdqa 0x4c0(%rsp), %ymm4
vmovdqa %ymm4, 0x160(%rsp)
vpblendd $0x22, %ymm4, %ymm14, %ymm4 # ymm4 = ymm14[0],ymm4[1],ymm14[2,3,4],ymm4[5],ymm14[6,7]
vpor %ymm1, %ymm4, %ymm1
vmovdqa 0x4e0(%rsp), %ymm9
vpblendd $0x44, %ymm9, %ymm14, %ymm4 # ymm4 = ymm14[0,1],ymm9[2],ymm14[3,4,5],ymm9[6],ymm14[7]
vmovdqa %ymm9, 0x260(%rsp)
vpor %ymm4, %ymm1, %ymm6
vmovdqa 0x380(%rsp), %ymm1
vmovdqa %ymm1, 0x60(%rsp)
vpblendd $0x88, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0,1,2],ymm1[3],ymm0[4,5,6],ymm1[7]
vpcmpgtd %ymm0, %ymm3, %ymm7
vmovmskps %ymm7, %r8d
vpsrld $0x10, %ymm3, %ymm0
vblendvps %ymm7, %ymm0, %ymm3, %ymm4
vpand %ymm3, %ymm7, %ymm0
movl %r8d, %r9d
shll $0x5, %r9d
vmovdqa (%r9,%rdi), %ymm1
vpermd %ymm0, %ymm1, %ymm0
vmovdqa 0x400(%rsp), %ymm1
vmovdqa %ymm1, 0xc0(%rsp)
vpblendd $0x88, %ymm1, %ymm10, %ymm1 # ymm1 = ymm10[0,1,2],ymm1[3],ymm10[4,5,6],ymm1[7]
vpcmpgtd %ymm1, %ymm2, %ymm1
vmovmskps %ymm1, %r9d
vpsrld $0x10, %ymm2, %ymm3
vblendvps %ymm1, %ymm3, %ymm2, %ymm3
vmovaps %ymm3, 0x100(%rsp)
vpand %ymm2, %ymm1, %ymm1
movl %r9d, %r10d
shll $0x5, %r10d
vmovdqa (%r10,%rdi), %ymm2
vpermd %ymm1, %ymm2, %ymm1
vmovdqa 0x480(%rsp), %ymm2
vmovdqa %ymm2, 0x2a0(%rsp)
vpblendd $0x88, %ymm2, %ymm5, %ymm2 # ymm2 = ymm5[0,1,2],ymm2[3],ymm5[4,5,6],ymm2[7]
vpcmpgtd %ymm2, %ymm15, %ymm2
vmovmskps %ymm2, %r10d
vpsrld $0x10, %ymm15, %ymm5
vblendvps %ymm2, %ymm5, %ymm15, %ymm5
vpand %ymm2, %ymm15, %ymm2
movl %r10d, %r11d
shll $0x5, %r11d
vmovdqa (%r11,%rdi), %ymm7
vpermd %ymm2, %ymm7, %ymm2
vmovdqa 0x500(%rsp), %ymm3
vmovdqa %ymm3, 0x280(%rsp)
vpblendd $0x88, %ymm3, %ymm6, %ymm6 # ymm6 = ymm6[0,1,2],ymm3[3],ymm6[4,5,6],ymm3[7]
vpcmpgtd %ymm6, %ymm8, %ymm7
vmovmskps %ymm7, %r11d
vpsrld $0x10, %ymm8, %ymm6
vblendvps %ymm7, %ymm6, %ymm8, %ymm3
vmovaps %ymm3, 0xe0(%rsp)
vpand %ymm7, %ymm8, %ymm7
movl %r11d, %ebx
shll $0x5, %ebx
vmovdqa (%rbx,%rdi), %ymm8
vpermd %ymm7, %ymm8, %ymm7
vpblendw $0xaa, %ymm14, %ymm0, %ymm0 # ymm0 = ymm0[0],ymm14[1],ymm0[2],ymm14[3],ymm0[4],ymm14[5],ymm0[6],ymm14[7],ymm0[8],ymm14[9],ymm0[10],ymm14[11],ymm0[12],ymm14[13],ymm0[14],ymm14[15]
vpblendw $0xaa, %ymm14, %ymm1, %ymm1 # ymm1 = ymm1[0],ymm14[1],ymm1[2],ymm14[3],ymm1[4],ymm14[5],ymm1[6],ymm14[7],ymm1[8],ymm14[9],ymm1[10],ymm14[11],ymm1[12],ymm14[13],ymm1[14],ymm14[15]
vpackusdw %ymm1, %ymm0, %ymm0
vpblendw $0xaa, %ymm14, %ymm2, %ymm1 # ymm1 = ymm2[0],ymm14[1],ymm2[2],ymm14[3],ymm2[4],ymm14[5],ymm2[6],ymm14[7],ymm2[8],ymm14[9],ymm2[10],ymm14[11],ymm2[12],ymm14[13],ymm2[14],ymm14[15]
vpblendw $0xaa, %ymm14, %ymm7, %ymm2 # ymm2 = ymm7[0],ymm14[1],ymm7[2],ymm14[3],ymm7[4],ymm14[5],ymm7[6],ymm14[7],ymm7[8],ymm14[9],ymm7[10],ymm14[11],ymm7[12],ymm14[13],ymm7[14],ymm14[15]
vpackusdw %ymm2, %ymm1, %ymm1
popcntl %r11d, %r11d
vpermq $0xd8, %ymm1, %ymm1     # ymm1 = ymm1[0,2,1,3]
vextracti128 $0x1, %ymm1, -0x10(%rsi)
addl %r11d, %r11d
subq %r11, %rsi
vmovdqu %xmm1, -0x10(%rsi)
popcntl %r10d, %r10d
popcntl %r9d, %r9d
addl %r10d, %r10d
subq %r10, %rsi
vpermq $0xd8, %ymm0, %ymm0     # ymm0 = ymm0[0,2,1,3]
vextracti128 $0x1, %ymm0, -0x10(%rsi)
addl %r9d, %r9d
subq %r9, %rsi
vmovdqu %xmm0, -0x10(%rsi)
vmovdqa %ymm11, 0xa0(%rsp)
vpshufd $0xff, %ymm11, %ymm0    # ymm0 = ymm11[3,3,3,3,7,7,7,7]
vpblendd $0x44, %ymm0, %ymm14, %ymm0 # ymm0 = ymm14[0,1],ymm0[2],ymm14[3,4,5],ymm0[6],ymm14[7]
vmovdqa %ymm12, 0x200(%rsp)
vpshufd $0x55, %ymm12, %ymm1    # ymm1 = ymm12[1,1,1,1,5,5,5,5]
vpblendd $0x11, %ymm1, %ymm14, %ymm1 # ymm1 = ymm1[0],ymm14[1,2,3],ymm1[4],ymm14[5,6,7]
vpor %ymm0, %ymm1, %ymm0
vpshufd $0xff, 0x20(%rsp), %ymm1 # ymm1 = mem[3,3,3,3,7,7,7,7]
vpblendd $0x44, %ymm1, %ymm14, %ymm1 # ymm1 = ymm14[0,1],ymm1[2],ymm14[3,4,5],ymm1[6],ymm14[7]
vmovdqa 0x140(%rsp), %ymm10
vpshufd $0x55, %ymm10, %ymm2    # ymm2 = ymm10[1,1,1,1,5,5,5,5]
vpblendd $0x11, %ymm2, %ymm14, %ymm2 # ymm2 = ymm2[0],ymm14[1,2,3],ymm2[4],ymm14[5,6,7]
vpor %ymm1, %ymm2, %ymm1
vpshufd $0xff, %ymm13, %ymm2    # ymm2 = ymm13[3,3,3,3,7,7,7,7]
vpblendd $0x44, %ymm2, %ymm14, %ymm2 # ymm2 = ymm14[0,1],ymm2[2],ymm14[3,4,5],ymm2[6],ymm14[7]
vmovdqa 0x120(%rsp), %ymm11
vpshufd $0x55, %ymm11, %ymm7    # ymm7 = ymm11[1,1,1,1,5,5,5,5]
vpblendd $0x11, %ymm7, %ymm14, %ymm7 # ymm7 = ymm7[0],ymm14[1,2,3],ymm7[4],ymm14[5,6,7]
vpor %ymm2, %ymm7, %ymm15
vpshufd $0xff, %ymm9, %ymm7     # ymm7 = ymm9[3,3,3,3,7,7,7,7]
vpblendd $0x44, %ymm7, %ymm14, %ymm7 # ymm7 = ymm14[0,1],ymm7[2],ymm14[3,4,5],ymm7[6],ymm14[7]
vpshufd $0x55, 0x80(%rsp), %ymm8 # ymm8 = mem[1,1,1,1,5,5,5,5]
vpblendd $0x11, %ymm8, %ymm14, %ymm8 # ymm8 = ymm8[0],ymm14[1,2,3],ymm8[4],ymm14[5,6,7]
vpor %ymm7, %ymm8, %ymm3
vmovdqa 0x1a0(%rsp), %ymm13
vmovdqa 0x60(%rsp), %ymm2
vpalignr $0x4, %ymm13, %ymm2, %ymm7 # ymm7 = ymm13[4,5,6,7,8,9,10,11,12,13,14,15],ymm2[0,1,2,3],ymm13[20,21,22,23,24,25,26,27,28,29,30,31],ymm2[16,17,18,19]
vpsrlq $0x20, %ymm7, %ymm7
vmovaps %ymm4, 0x2e0(%rsp)
vpsrlq $0x20, %ymm4, %ymm8
vpmuludq %ymm7, %ymm8, %ymm7
vpmuludq %ymm0, %ymm4, %ymm0
vpsrlq $0x20, %ymm0, %ymm0
vpblendd $0xaa, %ymm7, %ymm0, %ymm0 # ymm0 = ymm0[0],ymm7[1],ymm0[2],ymm7[3],ymm0[4],ymm7[5],ymm0[6],ymm7[7]
vmovdqa %ymm0, 0x220(%rsp)
vmovdqa 0x300(%rsp), %ymm9
vmovdqa 0xc0(%rsp), %ymm7
vpalignr $0x4, %ymm9, %ymm7, %ymm0 # ymm0 = ymm9[4,5,6,7,8,9,10,11,12,13,14,15],ymm7[0,1,2,3],ymm9[20,21,22,23,24,25,26,27,28,29,30,31],ymm7[16,17,18,19]
vpsrlq $0x20, %ymm0, %ymm0
vmovdqa 0x100(%rsp), %ymm2
vpsrlq $0x20, %ymm2, %ymm8
vpmuludq %ymm0, %ymm8, %ymm0
vpmuludq %ymm1, %ymm2, %ymm1
vpsrlq $0x20, %ymm1, %ymm1
vpblendd $0xaa, %ymm0, %ymm1, %ymm8 # ymm8 = ymm1[0],ymm0[1],ymm1[2],ymm0[3],ymm1[4],ymm0[5],ymm1[6],ymm0[7]
vmovdqa 0x180(%rsp), %ymm4
vmovdqa 0x2a0(%rsp), %ymm6
vpalignr $0x4, %ymm4, %ymm6, %ymm0 # ymm0 = ymm4[4,5,6,7,8,9,10,11,12,13,14,15],ymm6[0,1,2,3],ymm4[20,21,22,23,24,25,26,27,28,29,30,31],ymm6[16,17,18,19]
vpsrlq $0x20, %ymm0, %ymm2
vmovaps %ymm5, 0x2c0(%rsp)
vpsrlq $0x20, %ymm5, %ymm1
vpmuludq %ymm2, %ymm1, %ymm2
vpmuludq %ymm5, %ymm15, %ymm1
vpsrlq $0x20, %ymm1, %ymm1
vpblendd $0xaa, %ymm2, %ymm1, %ymm0 # ymm0 = ymm1[0],ymm2[1],ymm1[2],ymm2[3],ymm1[4],ymm2[5],ymm1[6],ymm2[7]
vmovdqa %ymm0, 0x1e0(%rsp)
vmovdqa 0x160(%rsp), %ymm15
vmovdqa 0x280(%rsp), %ymm5
vpalignr $0x4, %ymm15, %ymm5, %ymm0 # ymm0 = ymm15[4,5,6,7,8,9,10,11,12,13,14,15],ymm5[0,1,2,3],ymm15[20,21,22,23,24,25,26,27,28,29,30,31],ymm5[16,17,18,19]
vpsrlq $0x20, %ymm0, %ymm0
vmovdqa 0xe0(%rsp), %ymm2
vpsrlq $0x20, %ymm2, %ymm1
vpmuludq %ymm0, %ymm1, %ymm0
vpmuludq %ymm3, %ymm2, %ymm1
vpsrlq $0x20, %ymm1, %ymm1
vpblendd $0xaa, %ymm0, %ymm1, %ymm1 # ymm1 = ymm1[0],ymm0[1],ymm1[2],ymm0[3],ymm1[4],ymm0[5],ymm1[6],ymm0[7]
vpsrldq $0xc, %ymm12, %ymm0     # ymm0 = ymm12[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm12[28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
vpsllq $0x20, %ymm13, %ymm3
vpor %ymm0, %ymm3, %ymm0
vpshufd $0x55, 0xa0(%rsp), %ymm3 # ymm3 = mem[1,1,1,1,5,5,5,5]
vpblendd $0x44, %ymm3, %ymm0, %ymm0 # ymm0 = ymm0[0,1],ymm3[2],ymm0[3,4,5],ymm3[6],ymm0[7]
vpshufd $0xaa, 0x60(%rsp), %ymm3 # ymm3 = mem[2,2,2,2,6,6,6,6]
vpblendd $0x88, %ymm3, %ymm0, %ymm0 # ymm0 = ymm0[0,1,2],ymm3[3],ymm0[4,5,6],ymm3[7]
vpsrldq $0xc, %ymm10, %ymm3     # ymm3 = ymm10[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm10[28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
vpsllq $0x20, %ymm9, %ymm13
vpor %ymm3, %ymm13, %ymm3
vpshufd $0x55, 0x20(%rsp), %ymm13 # ymm13 = mem[1,1,1,1,5,5,5,5]
vpblendd $0x44, %ymm13, %ymm3, %ymm3 # ymm3 = ymm3[0,1],ymm13[2],ymm3[3,4,5],ymm13[6],ymm3[7]
vpshufd $0xaa, %ymm7, %ymm13    # ymm13 = ymm7[2,2,2,2,6,6,6,6]
vpblendd $0x88, %ymm13, %ymm3, %ymm3 # ymm3 = ymm3[0,1,2],ymm13[3],ymm3[4,5,6],ymm13[7]
vpsrldq $0xc, %ymm11, %ymm13    # ymm13 = ymm11[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm11[28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
vpsllq $0x20, %ymm4, %ymm12
vpor %ymm13, %ymm12, %ymm12
vmovdqa 0x240(%rsp), %ymm4
vpshufd $0x55, %ymm4, %ymm13    # ymm13 = ymm4[1,1,1,1,5,5,5,5]
vpblendd $0x44, %ymm13, %ymm12, %ymm12 # ymm12 = ymm12[0,1],ymm13[2],ymm12[3,4,5],ymm13[6],ymm12[7]
vpshufd $0xaa, %ymm6, %ymm13    # ymm13 = ymm6[2,2,2,2,6,6,6,6]
vpblendd $0x88, %ymm13, %ymm12, %ymm12 # ymm12 = ymm12[0,1,2],ymm13[3],ymm12[4,5,6],ymm13[7]
vmovdqa 0x80(%rsp), %ymm2
vpsrldq $0xc, %ymm2, %ymm13     # ymm13 = ymm2[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm2[28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
vpsllq $0x20, %ymm15, %ymm10
vpor %ymm13, %ymm10, %ymm10
vmovdqa 0x260(%rsp), %ymm15
vpshufd $0x55, %ymm15, %ymm13   # ymm13 = ymm15[1,1,1,1,5,5,5,5]
vpblendd $0x44, %ymm13, %ymm10, %ymm10 # ymm10 = ymm10[0,1],ymm13[2],ymm10[3,4,5],ymm13[6],ymm10[7]
vpshufd $0xaa, %ymm5, %ymm13    # ymm13 = ymm5[2,2,2,2,6,6,6,6]
vpblendd $0x88, %ymm13, %ymm10, %ymm10 # ymm10 = ymm10[0,1,2],ymm13[3],ymm10[4,5,6],ymm13[7]
vpsrld $0x10, %ymm0, %ymm13
vmovdqa 0x1c0(%rsp), %ymm11
vpaddd %ymm11, %ymm13, %ymm13
vmovdqa 0x220(%rsp), %ymm2
vpsrlvd %ymm13, %ymm2, %ymm7
vpsrld $0x10, %ymm3, %ymm13
vpaddd %ymm11, %ymm13, %ymm13
vpsrlvd %ymm13, %ymm8, %ymm8
vpsrld $0x10, %ymm12, %ymm13
vpaddd %ymm11, %ymm13, %ymm13
vmovdqa 0x1e0(%rsp), %ymm2
vpsrlvd %ymm13, %ymm2, %ymm2
vpsrld $0x10, %ymm10, %ymm13
vpaddd %ymm11, %ymm13, %ymm13
vpsrlvd %ymm13, %ymm1, %ymm13
vpblendw $0xaa, %ymm14, %ymm0, %ymm0 # ymm0 = ymm0[0],ymm14[1],ymm0[2],ymm14[3],ymm0[4],ymm14[5],ymm0[6],ymm14[7],ymm0[8],ymm14[9],ymm0[10],ymm14[11],ymm0[12],ymm14[13],ymm0[14],ymm14[15]
vpmulld %ymm0, %ymm7, %ymm0
vpblendw $0xaa, %ymm14, %ymm3, %ymm1 # ymm1 = ymm3[0],ymm14[1],ymm3[2],ymm14[3],ymm3[4],ymm14[5],ymm3[6],ymm14[7],ymm3[8],ymm14[9],ymm3[10],ymm14[11],ymm3[12],ymm14[13],ymm3[14],ymm14[15]
vpmulld %ymm1, %ymm8, %ymm1
vpblendw $0xaa, %ymm14, %ymm12, %ymm3 # ymm3 = ymm12[0],ymm14[1],ymm12[2],ymm14[3],ymm12[4],ymm14[5],ymm12[6],ymm14[7],ymm12[8],ymm14[9],ymm12[10],ymm14[11],ymm12[12],ymm14[13],ymm12[14],ymm14[15]
vpmulld %ymm3, %ymm2, %ymm7
vpblendw $0xaa, %ymm14, %ymm10, %ymm2 # ymm2 = ymm10[0],ymm14[1],ymm10[2],ymm14[3],ymm10[4],ymm14[5],ymm10[6],ymm14[7],ymm10[8],ymm14[9],ymm10[10],ymm14[11],ymm10[12],ymm14[13],ymm10[14],ymm14[15]
vpmulld %ymm2, %ymm13, %ymm8
vmovdqa 0x200(%rsp), %ymm2
vpunpckhdq %ymm14, %ymm2, %ymm2 # ymm2 = ymm2[2],ymm14[2],ymm2[3],ymm14[3],ymm2[6],ymm14[6],ymm2[7],ymm14[7]
vpshufd $0xee, 0x1a0(%rsp), %ymm3 # ymm3 = mem[2,3,2,3,6,7,6,7]
vpblendd $0x22, %ymm3, %ymm14, %ymm3 # ymm3 = ymm14[0],ymm3[1],ymm14[2,3,4],ymm3[5],ymm14[6,7]
vpor %ymm2, %ymm3, %ymm2
vpunpcklqdq 0xa0(%rsp), %ymm2, %ymm2 # ymm2 = ymm2[0],mem[0],ymm2[2],mem[2]
vpshufd $0x44, 0x60(%rsp), %ymm3 # ymm3 = mem[0,1,0,1,4,5,4,5]
vpblendd $0x88, %ymm3, %ymm2, %ymm2 # ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5,6],ymm3[7]
vmovdqa 0x140(%rsp), %ymm3
vpunpckhdq %ymm14, %ymm3, %ymm3 # ymm3 = ymm3[2],ymm14[2],ymm3[3],ymm14[3],ymm3[6],ymm14[6],ymm3[7],ymm14[7]
vpshufd $0xee, %ymm9, %ymm10    # ymm10 = ymm9[2,3,2,3,6,7,6,7]
vpblendd $0x22, %ymm10, %ymm14, %ymm10 # ymm10 = ymm14[0],ymm10[1],ymm14[2,3,4],ymm10[5],ymm14[6,7]
vpor %ymm3, %ymm10, %ymm3
vpunpcklqdq 0x20(%rsp), %ymm3, %ymm3 # ymm3 = ymm3[0],mem[0],ymm3[2],mem[2]
vpshufd $0x44, 0xc0(%rsp), %ymm9 # ymm9 = mem[0,1,0,1,4,5,4,5]
vpblendd $0x88, %ymm9, %ymm3, %ymm9 # ymm9 = ymm3[0,1,2],ymm9[3],ymm3[4,5,6],ymm9[7]
vmovdqa 0x120(%rsp), %ymm3
vpunpckhdq %ymm14, %ymm3, %ymm3 # ymm3 = ymm3[2],ymm14[2],ymm3[3],ymm14[3],ymm3[6],ymm14[6],ymm3[7],ymm14[7]
vpshufd $0xee, 0x180(%rsp), %ymm10 # ymm10 = mem[2,3,2,3,6,7,6,7]
vpblendd $0x22, %ymm10, %ymm14, %ymm10 # ymm10 = ymm14[0],ymm10[1],ymm14[2,3,4],ymm10[5],ymm14[6,7]
vpor %ymm3, %ymm10, %ymm3
vpunpcklqdq %ymm4, %ymm3, %ymm3 # ymm3 = ymm3[0],ymm4[0],ymm3[2],ymm4[2]
vpshufd $0x44, %ymm6, %ymm4     # ymm4 = ymm6[0,1,0,1,4,5,4,5]
vpblendd $0x88, %ymm4, %ymm3, %ymm4 # ymm4 = ymm3[0,1,2],ymm4[3],ymm3[4,5,6],ymm4[7]
vmovdqa 0x80(%rsp), %ymm3
vpunpckhdq %ymm14, %ymm3, %ymm3 # ymm3 = ymm3[2],ymm14[2],ymm3[3],ymm14[3],ymm3[6],ymm14[6],ymm3[7],ymm14[7]
vpshufd $0xee, 0x160(%rsp), %ymm10 # ymm10 = mem[2,3,2,3,6,7,6,7]
vpblendd $0x22, %ymm10, %ymm14, %ymm10 # ymm10 = ymm14[0],ymm10[1],ymm14[2,3,4],ymm10[5],ymm14[6,7]
vpor %ymm3, %ymm10, %ymm3
vpunpcklqdq %ymm15, %ymm3, %ymm3 # ymm3 = ymm3[0],ymm15[0],ymm3[2],ymm15[2]
vpshufd $0x44, %ymm5, %ymm10    # ymm10 = ymm5[0,1,0,1,4,5,4,5]
vpblendd $0x88, %ymm10, %ymm3, %ymm10 # ymm10 = ymm3[0,1,2],ymm10[3],ymm3[4,5,6],ymm10[7]
vpaddd 0x2e0(%rsp), %ymm2, %ymm2
vpaddd %ymm0, %ymm2, %ymm3
vpaddd 0x100(%rsp), %ymm9, %ymm0
vpaddd %ymm1, %ymm0, %ymm2
vpaddd 0x2c0(%rsp), %ymm4, %ymm0
vpaddd %ymm7, %ymm0, %ymm15
vpaddd 0xe0(%rsp), %ymm10, %ymm0
vpaddd %ymm0, %ymm8, %ymm8
popcntl %r8d, %r8d
addl %r8d, %r8d
subq %r8, %rsi
addq $-0x20, %rdx
jmp 0x52fdb
vmovdqa %ymm3, 0x740(%rsp)
vmovdqa %ymm2, 0x760(%rsp)
vmovdqa %ymm15, 0x780(%rsp)
vmovdqa %ymm8, 0x7a0(%rsp)
pushq $0x1f
popq %rax
movq 0x50(%rsp), %rdx
testl %eax, %eax
js 0x537c0
movl %eax, %ecx
movl 0x740(%rsp,%rcx,4), %ecx
movl %ecx, -0x4(%rsi)
addq $-0x4, %rsi
decl %eax
jmp 0x537a8
movq 0x58(%rsp), %r14
subq %rsi, %rdx
movslq %r12d, %rdi
leal (%rdi,%rdx), %eax
movl %eax, (%r14)
addq %r15, %rdi
vzeroupper
callq 0x4830
movq %r15, %rax
leaq -0x28(%rbp), %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq