LLM4Binary/decompile-bench-makefile huggingface dataset:
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_memmap.c
// Function: print_memmap_tree
int print_memmap_tree(FILE *fp)
{
	MEMMAP_TREE *now_memmap_tree;

	printf(" -> Output Memory Map\n");

	fprintf(fp, "======================================================================\n");
	fprintf(fp, "Memory Map\n");
	fprintf(fp, "======================================================================\n");
	fprintf(fp, "[GLOBAL/LOCAL]   [MEMORY NAME]                    [ADDRESS] [SIZE]\n");

    now_memmap_tree = memmap_tree_top;
    while(now_memmap_tree != NULL){
		if(now_memmap_tree->size > 0){
			fprintf(fp, "%-16s %-32s %08x  %8d\n", now_memmap_tree->module, now_memmap_tree->label, now_memmap_tree->adrs, now_memmap_tree->size);
		}
        now_memmap_tree = now_memmap_tree->next_ptr;
    }

	fprintf(fp, "======================================================================\n");

    return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
leaq 0x8f44(%rip), %rdi      # 0xe740
callq 0x1070
leaq 0x8e89(%rip), %r14      # 0xe691
movl $0x47, %esi
movl $0x1, %edx
movq %r14, %rdi
movq %rbx, %rcx
callq 0x11d0
leaq 0x8eb5(%rip), %rdi      # 0xe6d9
movl $0xb, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
movl $0x47, %esi
movl $0x1, %edx
movq %r14, %rdi
movq %rbx, %rcx
callq 0x11d0
leaq 0x8e93(%rip), %rdi      # 0xe6e5
movl $0x43, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
movq 0xed05(%rip), %r15      # 0x14570
testq %r15, %r15
je 0x58a2
leaq 0x8eb2(%rip), %r14      # 0xe729
movl 0x24(%r15), %r9d
testl %r9d, %r9d
je 0x5899
movq 0x10(%r15), %rdx
movq 0x18(%r15), %rcx
movl 0x20(%r15), %r8d
movq %rbx, %rdi
movq %r14, %rsi
xorl %eax, %eax
callq 0x1120
movq 0x8(%r15), %r15
testq %r15, %r15
jne 0x5877
leaq 0x8de8(%rip), %rdi      # 0xe691
movl $0x47, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
xorl %eax, %eax
popq %rbx
popq %r14
popq %r15
retq
nop
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_memory.c
// Function: clean_memory_tree
int clean_memory_tree(MEMORY_TREE *memory_tree_ptr)
{
	MEMORY_TREE *now_memory_tree;
	MEMORY_TREE *new_memory_tree;

    now_memory_tree = memory_tree_ptr;
    while(now_memory_tree != NULL){
        new_memory_tree = now_memory_tree->next_ptr;
        if(now_memory_tree->label != NULL)		free(now_memory_tree->label);
        if(now_memory_tree->verilog_args != NULL)	free(now_memory_tree->verilog_args);
        if(now_memory_tree->type != NULL)			free(now_memory_tree->type);
        free(now_memory_tree);
        now_memory_tree = new_memory_tree;
    }
    memory_tree_top = NULL;

	if(module_name != NULL){
		free(module_name);
		module_name = NULL;
	}

    return 0;
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
testq %rdi, %rdi
je 0x596b
movq %rdi, %rbx
movq 0x8(%rbx), %r14
movq 0x18(%rbx), %rdi
testq %rdi, %rdi
je 0x593f
callq 0x1030
movq 0x28(%rbx), %rdi
testq %rdi, %rdi
je 0x594d
callq 0x1030
movq 0x20(%rbx), %rdi
testq %rdi, %rdi
je 0x595b
callq 0x1030
movq %rbx, %rdi
callq 0x1030
movq %r14, %rbx
testq %r14, %r14
jne 0x592d
movq $0x0, 0xec02(%rip) # 0x14578
leaq 0xe7db(%rip), %rbx      # 0x14158
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x5991
callq 0x1030
movq $0x0, (%rbx)
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_memory.c
// Function: print_memory_tree
int print_memory_tree(MEMORY_TREE *now_memory_tree)
{
//	MEMORY_TREE *now_memory_tree;

	printf("  [Memory Tree List]\n");

    while(now_memory_tree != NULL){
		printf("  %s: ", now_memory_tree->label);
		printf("  type = %s, ", now_memory_tree->type);
		printf("  flag = %d, ", now_memory_tree->flag);
		printf("\n");
        now_memory_tree = now_memory_tree->next_ptr;
    }

    return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
leaq 0x8eb0(%rip), %rdi      # 0xe99f
callq 0x1070
testq %rbx, %rbx
je 0x5b4a
leaq 0x8ca7(%rip), %r14      # 0xe7a7
leaq 0x8ca7(%rip), %r15      # 0xe7ae
leaq 0x8cae(%rip), %r12      # 0xe7bc
movq 0x18(%rbx), %rsi
movq %r14, %rdi
xorl %eax, %eax
callq 0x10b0
movq 0x20(%rbx), %rsi
movq %r15, %rdi
xorl %eax, %eax
callq 0x10b0
movl 0x10(%rbx), %esi
movq %r12, %rdi
xorl %eax, %eax
callq 0x10b0
movl $0xa, %edi
callq 0x1040
movq 0x8(%rbx), %rbx
testq %rbx, %rbx
jne 0x5b0e
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_memory.c
// Function: create_array_size
int create_array_size()
{
	MEMORY_TREE *now_memory_tree;
	int size = 0;

    now_memory_tree = memory_tree_top;
    while(now_memory_tree != NULL){
		size = get_memory_size(now_memory_tree->label, NULL, NULL);

		if(size <= 0){
			size = 0;
		}

		if(now_memory_tree->flag == MEMORY_FLAG_GLOBAL){
			// グローバルメモリ
			register_memmap_tree("GLOBAL", now_memory_tree->label, size);
		}else if(now_memory_tree->flag == MEMORY_FLAG_LOCAL){
			// ローカルメモリ
			register_memmap_tree(module_name, now_memory_tree->label, size);
		}else if(now_memory_tree->flag == MEMORY_FLAG_POINTER){
			// ポインタ
			register_memmap_tree(module_name, now_memory_tree->label, 0);
		}

        now_memory_tree = now_memory_tree->next_ptr;
    }
	if(now_memory_tree == NULL) return MEMORY_FLAG_UNKNWON;

	return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq 0xd8c7(%rip), %r14      # 0x14578
testq %r14, %r14
je 0x6d1a
xorl %r15d, %r15d
leaq 0xd498(%rip), %r12      # 0x14158
leaq 0x7ad9(%rip), %rbx      # 0xe7a0
movq 0x18(%r14), %rdi
xorl %esi, %esi
xorl %edx, %edx
callq 0x6999
testl %eax, %eax
cmovlel %r15d, %eax
movl 0x10(%r14), %ecx
cmpl $0x3, %ecx
je 0x6d02
cmpl $0x2, %ecx
je 0x6cf6
cmpl $0x1, %ecx
jne 0x6d11
movq 0x18(%r14), %rsi
movq %rbx, %rdi
jmp 0x6cfe
movq (%r12), %rdi
movq 0x18(%r14), %rsi
movl %eax, %edx
jmp 0x6d0c
movq (%r12), %rdi
movq 0x18(%r14), %rsi
xorl %edx, %edx
callq 0x55d5
movq 0x8(%r14), %r14
testq %r14, %r14
jne 0x6cc7
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_memory.c
// Function: clean_module_tree
int clean_module_tree()
{
	MODULE_TREE *now_module_tree;
	MODULE_TREE *new_module_tree;

    now_module_tree = module_tree_top;
    while(now_module_tree != NULL){
        new_module_tree = now_module_tree->next_ptr;
        if(now_module_tree->module_name != NULL) free(now_module_tree->module_name);
        if(now_module_tree->memory_tree_ptr != NULL) clean_memory_tree(now_module_tree->memory_tree_ptr);
        if(now_module_tree->call_tree_ptr != NULL) clean_call_tree(now_module_tree->memory_tree_ptr);
        free(now_module_tree);
        now_module_tree = new_module_tree;
    }
    module_tree_top = NULL;
    return 0;
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq 0xd84d(%rip), %rbx      # 0x14580
testq %rbx, %rbx
je 0x6d7a
movq 0x8(%rbx), %r14
movq 0x10(%rbx), %rdi
testq %rdi, %rdi
je 0x6d4a
callq 0x1030
movq 0x18(%rbx), %rdi
testq %rdi, %rdi
je 0x6d58
callq 0x5921
cmpq $0x0, 0x20(%rbx)
je 0x6d6a
movq 0x18(%rbx), %rdi
xorl %eax, %eax
callq 0x50e8
movq %rbx, %rdi
callq 0x1030
movq %r14, %rbx
testq %r14, %r14
jne 0x6d38
movq $0x0, 0xd7fb(%rip) # 0x14580
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_memory.c
// Function: register_module_tree
int register_module_tree(char *module_name)
{
	MODULE_TREE *now_module_tree = NULL;
	MODULE_TREE *old_module_tree = NULL;

	// モジュールツリーに存在しなければ新規登録
	now_module_tree = module_tree_top;
	while(now_module_tree != NULL){
		old_module_tree = now_module_tree;
		now_module_tree = now_module_tree->next_ptr;
	}

	now_module_tree				= (MODULE_TREE *)calloc(sizeof(MODULE_TREE),1);
	now_module_tree->prev_ptr	= old_module_tree;
	now_module_tree->next_ptr	= NULL;

	if(module_tree_top == NULL){
		module_tree_top				= now_module_tree;
	}else{
		old_module_tree->next_ptr	= now_module_tree;
	}

	now_module_tree->module_name = calloc(strlen(module_name)+1,1);
	strcpy(now_module_tree->module_name, module_name);
	now_module_tree->memory_tree_ptr	= memory_tree_top;
	now_module_tree->call_tree_ptr		= call_tree_top;
	now_module_tree->is_module_gm_if	= is_module_gm_if;

	return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
leaq 0xd7dc(%rip), %rax      # 0x14580
xorl %ecx, %ecx
movq %rcx, %r15
movq (%rax), %rcx
leaq 0x8(%rcx), %rax
testq %rcx, %rcx
jne 0x6da6
movl $0x30, %edi
movl $0x1, %esi
callq 0x1100
movq %rax, %r14
movq %r15, (%rax)
movq $0x0, 0x8(%rax)
addq $0x8, %r15
cmpq $0x0, 0xd7a2(%rip)      # 0x14580
leaq 0xd79b(%rip), %rax      # 0x14580
cmoveq %rax, %r15
movq %r14, (%r15)
movq %rbx, %rdi
callq 0x1090
leaq 0x1(%rax), %rdi
movl $0x1, %esi
callq 0x1100
movq %rax, 0x10(%r14)
movq %rax, %rdi
movq %rbx, %rsi
callq 0x1060
movq 0xd760(%rip), %rax      # 0x14578
movq %rax, 0x18(%r14)
leaq 0xd73d(%rip), %rax      # 0x14560
movq (%rax), %rax
movq %rax, 0x20(%r14)
leaq 0xd77f(%rip), %rax      # 0x145b0
movl (%rax), %eax
movl %eax, 0x28(%r14)
xorl %eax, %eax
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_memory.c
// Function: print_module_tree
int print_module_tree(FILE *fp)
{
	MODULE_TREE *now_module_tree;

	printf(" -> Output Module List\n");

	fprintf(fp, "======================================================================\n");
	fprintf(fp, "Module List\n");
	fprintf(fp, "======================================================================\n");

    now_module_tree = module_tree_top;
    while(now_module_tree != NULL){
		fprintf(fp, "%s:\n", now_module_tree->module_name);
        now_module_tree = now_module_tree->next_ptr;
    }
	fprintf(fp, "======================================================================\n");
    return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
leaq 0x7b93(%rip), %rdi      # 0xe9e1
callq 0x1070
leaq 0x7837(%rip), %r14      # 0xe691
movl $0x47, %esi
movl $0x1, %edx
movq %r14, %rdi
movq %rbx, %rcx
callq 0x11d0
leaq 0x7afa(%rip), %rdi      # 0xe970
movl $0xc, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
movl $0x47, %esi
movl $0x1, %edx
movq %r14, %rdi
movq %rbx, %rcx
callq 0x11d0
movq 0xd6dc(%rip), %r15      # 0x14580
testq %r15, %r15
je 0x6eca
leaq 0x7acd(%rip), %r14      # 0xe97d
movq 0x10(%r15), %rdx
movq %rbx, %rdi
movq %r14, %rsi
xorl %eax, %eax
callq 0x1120
movq 0x8(%r15), %r15
testq %r15, %r15
jne 0x6eb0
leaq 0x77c0(%rip), %rdi      # 0xe691
movl $0x47, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
xorl %eax, %eax
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_proc.c
// Function: clean_proc_tree
int clean_proc_tree()
{
	PROC_TREE *now_proc_tree;
	PROC_TREE *new_proc_tree;

    now_proc_tree = proc_tree_top;
    while(now_proc_tree != NULL){
        new_proc_tree = now_proc_tree->next_ptr;
        if(now_proc_tree->seq_req.state != NULL)		free(now_proc_tree->seq_req.state);
        if(now_proc_tree->seq_req.condision != NULL)	free(now_proc_tree->seq_req.condision);
        if(now_proc_tree->seq_req.body != NULL)			free(now_proc_tree->seq_req.body);
        if(now_proc_tree->seq_wait.state != NULL)		free(now_proc_tree->seq_wait.state);
        if(now_proc_tree->seq_wait.condision != NULL)	free(now_proc_tree->seq_wait.condision);
        if(now_proc_tree->seq_wait.body != NULL)		free(now_proc_tree->seq_wait.body);
        if(now_proc_tree->seq_exec.state != NULL)		free(now_proc_tree->seq_exec.state);
        if(now_proc_tree->seq_exec.condision != NULL)	free(now_proc_tree->seq_exec.condision);
        if(now_proc_tree->seq_exec.body != NULL)		free(now_proc_tree->seq_exec.body);
        free(now_proc_tree);
        now_proc_tree = new_proc_tree;
    }
    proc_tree_top = NULL;

	if(verilog_wire != NULL){
		free(verilog_wire);
		verilog_wire = NULL;
	}
	if(verilog_module != NULL){
		free(verilog_module);
		verilog_module = NULL;
	}
	if(verilog_state != NULL){
		free(verilog_state);
		verilog_state = NULL;
	}

	is_module_gm_if = 0;

    return 0;
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq 0xd601(%rip), %rbx      # 0x14590
testq %rbx, %rbx
je 0x702e
movq 0x8(%rbx), %r14
movq 0x20(%rbx), %rdi
testq %rdi, %rdi
je 0x6faa
callq 0x1030
movq 0x28(%rbx), %rdi
testq %rdi, %rdi
je 0x6fb8
callq 0x1030
movq 0x30(%rbx), %rdi
testq %rdi, %rdi
je 0x6fc6
callq 0x1030
movq 0x40(%rbx), %rdi
testq %rdi, %rdi
je 0x6fd4
callq 0x1030
movq 0x48(%rbx), %rdi
testq %rdi, %rdi
je 0x6fe2
callq 0x1030
movq 0x50(%rbx), %rdi
testq %rdi, %rdi
je 0x6ff0
callq 0x1030
movq 0x60(%rbx), %rdi
testq %rdi, %rdi
je 0x6ffe
callq 0x1030
movq 0x68(%rbx), %rdi
testq %rdi, %rdi
je 0x700c
callq 0x1030
movq 0x70(%rbx), %rdi
testq %rdi, %rdi
je 0x701a
callq 0x1030
movq %rbx, %rdi
callq 0x1030
movq %r14, %rbx
testq %r14, %r14
jne 0x6f98
movq $0x0, 0xd557(%rip) # 0x14590
movq 0xd558(%rip), %rdi      # 0x14598
testq %rdi, %rdi
je 0x7055
callq 0x1030
movq $0x0, 0xd543(%rip) # 0x14598
movq 0xd544(%rip), %rdi      # 0x145a0
testq %rdi, %rdi
je 0x7071
callq 0x1030
movq $0x0, 0xd52f(%rip) # 0x145a0
movq 0xd530(%rip), %rdi      # 0x145a8
testq %rdi, %rdi
je 0x708d
callq 0x1030
movq $0x0, 0xd51b(%rip) # 0x145a8
movl $0x0, 0xd519(%rip)      # 0x145b0
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_proc.c
// Function: regalloc
char *regalloc(char *name)
{
	char *buf;
	int i;
	int ret;

	// 確保している容量は暫定です
	buf=calloc(strlen(name)+20,1);
	if(!strcmp(name, "false")){
		sprintf(buf, "(0)");
	}else if(!strcmp(name, "true")){
		sprintf(buf, "(1)");
	}else if(name[0] == '%'){
		ret = is_memmap_tree(module_name, name);
		if(ret){
			// ポインターで固定アドレスを解けた場合
			ret = get_adrs_memmap(module_name, name);
			sprintf(buf, "(%d)", ret);
		}else{
			// 変数
			sprintf(buf, "__sig_%s", &name[1]);
		}
	}else if(name[0] == '@'){
		// メモリ
		ret = is_memmap_tree(module_name, name);
		if(ret){
			// メモリで固定アドレスを解けた場合
			ret = get_adrs_memmap(module_name, name);
			sprintf(buf, "(%d)", ret);
		}else{
			sprintf(buf, "__sig_%s", &name[1]);
		}
	}else{
		sprintf(buf, "(%s)", name);
	}

	for(i=0;i<strlen(buf);i++){
		if(buf[i] == '.') buf[i] = '_';
	}

	return buf;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %r14
callq 0x1090
leaq 0x14(%rax), %rdi
movl $0x1, %esi
callq 0x1100
movq %rax, %rbx
leaq 0x746d(%rip), %rsi      # 0xf119
movq %r14, %rdi
callq 0x1110
testl %eax, %eax
je 0x7d0f
leaq 0x7460(%rip), %rsi      # 0xf11f
movq %r14, %rdi
callq 0x1110
testl %eax, %eax
je 0x7d17
movzbl (%r14), %eax
cmpl $0x40, %eax
je 0x7cd9
cmpl $0x25, %eax
jne 0x7d1f
leaq 0xc478(%rip), %r15      # 0x14158
movq (%r15), %rdi
movq %r14, %rsi
callq 0x56c8
testl %eax, %eax
je 0x7d28
movq (%r15), %rdi
movq %r14, %rsi
callq 0x5725
leaq 0x6c0d(%rip), %rsi      # 0xe90e
movq %rbx, %rdi
movl %eax, %edx
xorl %eax, %eax
callq 0x11b0
jmp 0x7d3f
movl $0x293028, (%rbx)       # imm = 0x293028
jmp 0x7d3f
movl $0x293128, (%rbx)       # imm = 0x293128
jmp 0x7d3f
leaq 0x7407(%rip), %rsi      # 0xf12d
jmp 0x7d32
incq %r14
leaq 0x73f2(%rip), %rsi      # 0xf124
movq %rbx, %rdi
movq %r14, %rdx
xorl %eax, %eax
callq 0x11b0
cmpb $0x0, (%rbx)
je 0x7d63
xorl %r14d, %r14d
cmpb $0x2e, (%rbx,%r14)
jne 0x7d53
movb $0x5f, (%rbx,%r14)
incq %r14
movq %rbx, %rdi
callq 0x1090
cmpq %r14, %rax
ja 0x7d47
movq %rbx, %rax
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_proc.c
// Function: labelalloc
char *labelalloc(char *name)
{
	char *buf;
	int i;

	if(name[0] == '%'){
		buf=calloc(strlen(name)+1+8,1);
		sprintf(buf, "__label_%s", &name[1]);
	}else{
		buf=calloc(strlen(name)+1+8,1);
		sprintf(buf, "__label_%s", name);
	}

	for(i=0;i<strlen(buf);i++){
		if(buf[i] == '.') buf[i] = '_';
	}

	return buf;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %r14
xorl %r15d, %r15d
cmpb $0x25, (%rdi)
sete %r15b
callq 0x1090
leaq 0x9(%rax), %rdi
movl $0x1, %esi
callq 0x1100
movq %rax, %rbx
addq %r14, %r15
leaq 0x7394(%rip), %rsi      # 0xf132
movq %rax, %rdi
movq %r15, %rdx
xorl %eax, %eax
callq 0x11b0
cmpb $0x0, (%rbx)
je 0x7dcf
xorl %r14d, %r14d
cmpb $0x2e, (%rbx,%r14)
jne 0x7dbf
movb $0x5f, (%rbx,%r14)
incq %r14
movq %rbx, %rdi
callq 0x1090
cmpq %r14, %rax
ja 0x7db3
movq %rbx, %rax
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_proc.c
// Function: create_verilog_call_result
int create_verilog_call_result(char *name, char *reg, char *type, char *buf, int is_call)
{
	char *temp;
	char *str;
	int width;

	temp = calloc(STR_MAX, 1);
	strcpy(buf, "");

		str = regalloc(reg);
		sprintf(temp, "\t\t\t%s <= __call_%s_result;\n", str, name);
		free(str);
		strcat(buf, temp);

		// インターフェースの作成
		if(!strcmp(type, "i8")){
			width = 8;
		}else if(!strcmp(type, "i16")){
			width = 16;
		}else if(
			!strcmp(type, "i32") ||
			!strcmp(type, "i8*") || !strcmp(type, "i16*") || !strcmp(type, "i32*")
		){
			width = 32;
		}else{
			// ポインタの場合はここに入る
			width = 32;
		}
		// call_sianal_treeへ登録
		if(!is_call) register_call_signal_tree(name, "result", 0, width, 0);

	free(temp);

	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %r8d, %ebp
movq %rcx, %r12
movq %rdx, %r15
movq %rsi, %r13
movq %rdi, %r14
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x1100
movq %rax, %rbx
movb $0x0, (%r12)
movq %r13, %rdi
callq 0x7c87
movq %rax, %r13
leaq 0x6d4b(%rip), %rsi      # 0xf16f
movq %rbx, %rdi
movq %rax, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r13, %rdi
callq 0x1030
movq %r12, %rdi
movq %rbx, %rsi
callq 0x11a0
leaq 0x5bbe(%rip), %rsi      # 0xe00c
movq %r15, %rdi
callq 0x1110
testl %eax, %eax
je 0x8478
leaq 0x5bae(%rip), %rsi      # 0xe00f
movq %r15, %rdi
callq 0x1110
xorl %ecx, %ecx
testl %eax, %eax
setne %cl
shll $0x4, %ecx
addl $0x10, %ecx
jmp 0x847d
movl $0x8, %ecx
testl %ebp, %ebp
jne 0x8495
leaq 0x7956(%rip), %rsi      # 0xfdde
movq %r14, %rdi
xorl %edx, %edx
xorl %r8d, %r8d
callq 0x5254
movq %rbx, %rdi
callq 0x1030
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_proc.c
// Function: get_getelement_type
int get_getelement_type(char *line, char *result)
{
	char *token;
	char *buf;

	token = calloc(STR_MAX, 1);
	buf = charalloc(line);

	get_token_llvm(buf, token);		// getelementptr
	get_token_llvm(buf, token);		// inbounds
	get_irtype_llvm(buf, token);	// Type
	strcpy(result, token);

	free(token);

	return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq %rsi, %rbx
movq %rdi, %r14
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x1100
movq %rax, %r15
movq %r14, %rdi
callq 0x1395
movq %rax, %r14
movq %rax, %rdi
movq %r15, %rsi
callq 0xcc26
movq %r14, %rdi
movq %r15, %rsi
callq 0xcc26
movq %r14, %rdi
movq %r15, %rsi
callq 0x201a
movq %rbx, %rdi
movq %r15, %rsi
callq 0x1060
movq %r15, %rdi
callq 0x1030
xorl %eax, %eax
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_proc.c
// Function: register_verilog
char * register_verilog(char *body, char *buf)
{
    char *temp = NULL;

	// Verilogコード登録
	if(body != NULL){
		temp = charalloc(body);
		free(body);
		body = calloc(strlen(temp) + strlen(buf) + 1, 1);
		sprintf(body, "%s%s", temp, buf);
		free(temp);
	}else{
		body = charalloc(buf);
	}

	return body;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq %rsi, %rbx
testq %rdi, %rdi
je 0x8581
movq %rdi, %r15
callq 0x1395
movq %rax, %r14
movq %r15, %rdi
callq 0x1030
movq %r14, %rdi
callq 0x1090
movq %rax, %r15
movq %rbx, %rdi
callq 0x1090
leaq (%r15,%rax), %rdi
incq %rdi
movl $0x1, %esi
callq 0x1100
movq %rax, %r15
leaq 0x5cee(%rip), %rsi      # 0xe24e
movq %rax, %rdi
movq %r14, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r14, %rdi
callq 0x1030
movq %r15, %rax
popq %rbx
popq %r14
popq %r15
retq
movq %rbx, %rdi
popq %rbx
popq %r14
popq %r15
jmp 0x1395
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_proc.c
// Function: create_verilog_label
int create_verilog_label()
{
	PARSER_TREE_IR *now_parser_tree_ir = parser_tree_ir_top;
    char *buf;
    char *str;
	int count = 1;

	buf = calloc(STR_MAX, 1);

	sprintf(buf, "localparam __label_0 = 0;\n");
	verilog_state = register_verilog(verilog_state, buf);

    while(now_parser_tree_ir != NULL){
		if(now_parser_tree_ir->flag == PARSER_IR_FLAG_LABEL){
			str = labelalloc(now_parser_tree_ir->label);
			sprintf(buf, "localparam %s = %d;\n", str, now_parser_tree_ir->stage);
			verilog_state = register_verilog(verilog_state, buf);
			free(str);
			count++;
		}
        now_parser_tree_ir = now_parser_tree_ir->next_ptr;
	}

	sprintf(buf, "integer __label_pre;\n");
	verilog_state = register_verilog(verilog_state, buf);
	sprintf(buf, "integer __label;\n");
	verilog_state = register_verilog(verilog_state, buf);

	free(buf);

	return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
leaq 0xa6ac(%rip), %rax      # 0x14140
movq (%rax), %r12
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x1100
movq %rax, %rbx
movups 0x5ce1(%rip), %xmm0     # 0xf791
movups %xmm0, (%rax)
movups 0x5ce2(%rip), %xmm0     # 0xf79c
movups %xmm0, 0xb(%rax)
movq 0xaae3(%rip), %rdi      # 0x145a8
movq %rax, %rsi
callq 0x8512
movq %rax, 0xaad4(%rip)      # 0x145a8
testq %r12, %r12
je 0x9b32
leaq 0x5ccc(%rip), %r14      # 0xf7ac
cmpl $0xe, 0x10(%r12)
jne 0x9b28
leaq 0x30(%r12), %rdi
callq 0x7d6c
movq %rax, %r15
movl 0x1c(%r12), %ecx
movq %rbx, %rdi
movq %r14, %rsi
movq %rax, %rdx
xorl %eax, %eax
callq 0x11b0
movq 0xaa97(%rip), %rdi      # 0x145a8
movq %rbx, %rsi
callq 0x8512
movq %rax, 0xaa88(%rip)      # 0x145a8
movq %r15, %rdi
callq 0x1030
movq 0x8(%r12), %r12
testq %r12, %r12
jne 0x9ae0
movups 0x5c88(%rip), %xmm0     # 0xf7c1
movups %xmm0, (%rbx)
movabsq $0xa3b6572705f6c, %rax  # imm = 0xA3B6572705F6C
movq %rax, 0xe(%rbx)
movq 0xaa57(%rip), %rdi      # 0x145a8
movq %rbx, %rsi
callq 0x8512
movq %rax, 0xaa48(%rip)      # 0x145a8
movups 0x5c70(%rip), %xmm0     # 0xf7d7
movups %xmm0, (%rbx)
movw $0xa, 0x10(%rbx)
movq %rax, %rdi
movq %rbx, %rsi
callq 0x8512
movq %rax, 0xaa26(%rip)      # 0x145a8
movq %rbx, %rdi
callq 0x1030
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_proc.c
// Function: output_verilog_return
int output_verilog_return(FILE *fp)
{
	PARSER_TREE_IR *now_parser_tree_ir = parser_tree_ir_top;

	int width;

    while(now_parser_tree_ir != NULL){
		if(now_parser_tree_ir->flag == PARSER_IR_FLAG_RETURN){
			if(strcmp(now_parser_tree_ir->ret.type, "void")){
				width = get_width(now_parser_tree_ir->ret.type);
				fprintf(fp, "\toutput reg [%d:0] __func_result,\n", (width-1));
			}
		}
        now_parser_tree_ir = now_parser_tree_ir->next_ptr;
	}

    return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
leaq 0xa598(%rip), %rax      # 0x14140
movq (%rax), %r13
testq %r13, %r13
je 0x9bff
movq %rdi, %rbx
leaq 0x444a(%rip), %r14      # 0xe004
leaq 0x5e40(%rip), %r15      # 0xfa01
cmpl $0x12, 0x10(%r13)
jne 0x9bf6
leaq 0x6434(%r13), %r12
movq %r12, %rdi
movq %r14, %rsi
callq 0x1110
testl %eax, %eax
je 0x9bf6
movq %r12, %rdi
callq 0x12ec
leal -0x1(%rax), %edx
movq %rbx, %rdi
movq %r15, %rsi
xorl %eax, %eax
callq 0x1120
movq 0x8(%r13), %r13
testq %r13, %r13
jne 0x9bc1
xorl %eax, %eax
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
retq
nop
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_signal.c
// Function: clean_signal_tree
int clean_signal_tree()
{
	SIGNAL_TREE *now_signal_tree;
	SIGNAL_TREE *new_signal_tree;

    now_signal_tree = signal_tree_top;
    while(now_signal_tree != NULL){
        new_signal_tree = now_signal_tree->next_ptr;
        if(now_signal_tree->label != NULL) free(now_signal_tree->label);
        if(now_signal_tree->verilog != NULL) free(now_signal_tree->verilog);
        free(now_signal_tree);
        now_signal_tree = new_signal_tree;
    }
    signal_tree_top = NULL;
    return 0;
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq 0xa9a1(%rip), %rbx      # 0x145b8
testq %rbx, %rbx
je 0x9c4c
movq 0x8(%rbx), %r14
movq 0x18(%rbx), %rdi
testq %rdi, %rdi
je 0x9c2e
callq 0x1030
movq 0x30(%rbx), %rdi
testq %rdi, %rdi
je 0x9c3c
callq 0x1030
movq %rbx, %rdi
callq 0x1030
movq %r14, %rbx
testq %r14, %r14
jne 0x9c1c
movq $0x0, 0xa961(%rip) # 0x145b8
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_signal.c
// Function: create_verilog_signal
int create_verilog_signal()
{
	SIGNAL_TREE *now_signal_tree;
	char *buf;
	char *str;

	buf = calloc(STR_MAX, 1);

    now_signal_tree = signal_tree_top;
    while(now_signal_tree != NULL){
		strcpy(buf ,"");
		if(
			(now_signal_tree->flag == SIGNAL_FLAG_REG) ||
			(now_signal_tree->flag == SIGNAL_FLAG_WIRE)
		){
			switch(now_signal_tree->flag){
				case SIGNAL_FLAG_REG:
					sprintf(buf, "reg ");
					break;
				case SIGNAL_FLAG_WIRE:
					sprintf(buf, "wire ");
					break;
				default:
					break;
			}
			if(now_signal_tree->width > 0){
				sprintf(buf, "%s[%d:0] ", buf, now_signal_tree->width-1);
			}
			str = regalloc(now_signal_tree->label);
			sprintf(buf, "%s%s;", buf, str);
			free(str);
			now_signal_tree->verilog = charalloc(buf);
		}

        now_signal_tree = now_signal_tree->next_ptr;
    }

    free(buf);

    return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x1100
movq %rax, %rbx
movq 0xa8a2(%rip), %r13      # 0x145b8
testq %r13, %r13
je 0x9db8
leaq 0x4923(%rip), %r14      # 0xe649
leaq 0x5d4d(%rip), %r15      # 0xfa7a
movb $0x0, (%rbx)
movl 0x10(%r13), %eax
leal -0x1(%rax), %ecx
cmpl $0x1, %ecx
ja 0x9dab
cmpl $0x2, %eax
je 0x9d52
cmpl $0x1, %eax
jne 0x9d5e
movb $0x0, 0x4(%rbx)
movl $0x20676572, (%rbx)     # imm = 0x20676572
jmp 0x9d5e
movw $0x20, 0x4(%rbx)
movl $0x65726977, (%rbx)     # imm = 0x65726977
movl 0x20(%r13), %ecx
testl %ecx, %ecx
jle 0x9d78
decl %ecx
movq %rbx, %rdi
movq %r14, %rsi
movq %rbx, %rdx
xorl %eax, %eax
callq 0x11b0
movq 0x18(%r13), %rdi
callq 0x7c87
movq %rax, %r12
movq %rbx, %rdi
movq %r15, %rsi
movq %rbx, %rdx
movq %rax, %rcx
xorl %eax, %eax
callq 0x11b0
movq %r12, %rdi
callq 0x1030
movq %rbx, %rdi
callq 0x1395
movq %rax, 0x30(%r13)
movq 0x8(%r13), %r13
testq %r13, %r13
jne 0x9d2d
movq %rbx, %rdi
callq 0x1030
xorl %eax, %eax
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_signal.c
// Function: output_signal_tree
int output_signal_tree(FILE *fp)
{
	SIGNAL_TREE *now_signal_tree;

    now_signal_tree = signal_tree_top;
    while(now_signal_tree != NULL){
		switch(now_signal_tree->flag){
			case SIGNAL_FLAG_REG:
			case SIGNAL_FLAG_WIRE:
				fprintf(fp, "%s\n", now_signal_tree->verilog);
				break;
			case SIGNAL_FLAG_RAM:
				/*
				 * RAMの直接的なVerilog HDLコードは存在しない。
				 */
				break;
			default:
				break;
		}

        now_signal_tree = now_signal_tree->next_ptr;
    }

    return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq 0xa7e0(%rip), %r15      # 0x145b8
testq %r15, %r15
je 0x9e0c
movq %rdi, %rbx
leaq 0x4ceb(%rip), %r14      # 0xead2
movl 0x10(%r15), %eax
decl %eax
cmpl $0x1, %eax
ja 0x9e03
movq 0x30(%r15), %rdx
movq %rbx, %rdi
movq %r14, %rsi
xorl %eax, %eax
callq 0x1120
movq 0x8(%r15), %r15
testq %r15, %r15
jne 0x9de7
xorl %eax, %eax
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_signal.c
// Function: print_signal_tree
int print_signal_tree(FILE *fp)
{
	SIGNAL_TREE *now_signal_tree;

    fprintf(fp,"==============================\n");
    fprintf(fp,"Print Signal\n");
    fprintf(fp,"==============================\n");
    now_signal_tree = signal_tree_top;
    while(now_signal_tree != NULL){
		fprintf(fp, "%s: ", now_signal_tree->label);
		switch(now_signal_tree->flag){
			case SIGNAL_FLAG_REG:
				fprintf(fp, "Reg, ");
				fprintf(fp, "width=%d,", now_signal_tree->width);
				fprintf(fp, "verilog=%s", now_signal_tree->verilog);
				break;
			case SIGNAL_FLAG_WIRE:
				fprintf(fp, "Wire, ");
				fprintf(fp, "width=%d,", now_signal_tree->width);
				fprintf(fp, "verilog=%s", now_signal_tree->verilog);
				break;
			case SIGNAL_FLAG_RAM:
				fprintf(fp, "RAM, ");
				fprintf(fp, "type=%s,", now_signal_tree->type);
				fprintf(fp, "verilog=%s", now_signal_tree->verilog);
				break;
			default:
				break;
		}
		fprintf(fp, "\n");

        now_signal_tree = now_signal_tree->next_ptr;
    }

    fprintf(fp,"==============================\n");

    return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
leaq 0x4890(%rip), %r14      # 0xe6b9
movl $0x1f, %esi
movl $0x1, %edx
movq %r14, %rdi
movq %rbx, %rcx
callq 0x11d0
leaq 0x5c3b(%rip), %rdi      # 0xfa80
movl $0xd, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
movl $0x1f, %esi
movl $0x1, %edx
movq %r14, %rdi
movq %rbx, %rcx
callq 0x11d0
movq 0xa745(%rip), %rbp      # 0x145b8
testq %rbp, %rbp
je 0x9f4e
leaq 0x4926(%rip), %r14      # 0xe7a9
leaq 0x5c14(%rip), %r13      # 0xfa9e
leaq 0x5c03(%rip), %r15      # 0xfa94
leaq 0x5bf6(%rip), %r12      # 0xfa8e
movq 0x18(%rbp), %rdx
movq %rbx, %rdi
movq %r14, %rsi
xorl %eax, %eax
callq 0x1120
movl 0x10(%rbp), %eax
cmpl $0x3, %eax
je 0x9ef5
cmpl $0x2, %eax
je 0x9eca
cmpl $0x1, %eax
jne 0x9f34
movl $0x5, %esi
movl $0x1, %edx
movq %r12, %rdi
jmp 0x9edb
movl $0x6, %esi
movl $0x1, %edx
leaq 0x5bce(%rip), %rdi      # 0xfaa9
movq %rbx, %rcx
callq 0x11d0
movl 0x20(%rbp), %edx
movq %rbx, %rdi
movq %r15, %rsi
xorl %eax, %eax
callq 0x1120
jmp 0x9f23
movl $0x5, %esi
movl $0x1, %edx
leaq 0x5baa(%rip), %rdi      # 0xfab0
movq %rbx, %rcx
callq 0x11d0
movq 0x28(%rbp), %rdx
movq %rbx, %rdi
leaq 0x5b9a(%rip), %rsi      # 0xfab6
xorl %eax, %eax
callq 0x1120
movq 0x30(%rbp), %rdx
movq %rbx, %rdi
movq %r13, %rsi
xorl %eax, %eax
callq 0x1120
movl $0xa, %edi
movq %rbx, %rsi
callq 0x10e0
movq 0x8(%rbp), %rbp
testq %rbp, %rbp
jne 0x9e98
leaq 0x4764(%rip), %rdi      # 0xe6b9
movl $0x1f, %esi
movl $0x1, %edx
movq %rbx, %rcx
callq 0x11d0
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_top.c
// Function: register_top_module_decl
int register_top_module_decl(char *line)
{
	char *temp = NULL;

	if(top_module_decl == NULL){
		top_module_decl = calloc(strlen(line)+1, 1);
		sprintf(top_module_decl, "%s", line);
	}else{
		temp = calloc(strlen(top_module_decl)+1, 1);
		strcpy(temp, top_module_decl);
		free(top_module_decl);
		top_module_decl = calloc(strlen(temp)+strlen(line)+1, 1);
		sprintf(top_module_decl, "%s%s", temp, line);
	}

	return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
movq 0xa649(%rip), %r15      # 0x145d0
testq %r15, %r15
je 0x9ffc
movq %r15, %rdi
callq 0x1090
leaq 0x1(%rax), %rdi
movl $0x1, %esi
callq 0x1100
movq %rax, %r14
movq %rax, %rdi
movq %r15, %rsi
callq 0x1060
movq %r15, %rdi
callq 0x1030
movq %r14, %rdi
callq 0x1090
movq %rax, %r15
movq %rbx, %rdi
callq 0x1090
leaq (%r15,%rax), %rdi
incq %rdi
movl $0x1, %esi
callq 0x1100
movq %rax, 0xa5ed(%rip)      # 0x145d0
leaq 0x4264(%rip), %rsi      # 0xe24e
movq %rax, %rdi
movq %r14, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
jmp 0xa024
movq %rbx, %rdi
callq 0x1090
leaq 0x1(%rax), %rdi
movl $0x1, %esi
callq 0x1100
movq %rax, 0xa5b7(%rip)      # 0x145d0
movq %rax, %rdi
movq %rbx, %rsi
callq 0x1060
xorl %eax, %eax
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_top.c
// Function: register_top_module_assign
int register_top_module_assign(char *line)
{
	char *temp = NULL;

	if(top_module_assign == NULL){
		top_module_assign = calloc(strlen(line)+1, 1);
		sprintf(top_module_assign, "%s", line);
	}else{
		temp = calloc(strlen(top_module_assign)+1, 1);
		strcpy(temp, top_module_assign);
		free(top_module_assign);
		top_module_assign = calloc(strlen(temp)+strlen(line)+1, 1);
		sprintf(top_module_assign, "%s%s", temp, line);
	}

	return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
movq 0xa59d(%rip), %r15      # 0x145d8
testq %r15, %r15
je 0xa0b0
movq %r15, %rdi
callq 0x1090
leaq 0x1(%rax), %rdi
movl $0x1, %esi
callq 0x1100
movq %rax, %r14
movq %rax, %rdi
movq %r15, %rsi
callq 0x1060
movq %r15, %rdi
callq 0x1030
movq %r14, %rdi
callq 0x1090
movq %rax, %r15
movq %rbx, %rdi
callq 0x1090
leaq (%r15,%rax), %rdi
incq %rdi
movl $0x1, %esi
callq 0x1100
movq %rax, 0xa541(%rip)      # 0x145d8
leaq 0x41b0(%rip), %rsi      # 0xe24e
movq %rax, %rdi
movq %r14, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11b0
jmp 0xa0d8
movq %rbx, %rdi
callq 0x1090
leaq 0x1(%rax), %rdi
movl $0x1, %esi
callq 0x1100
movq %rax, 0xa50b(%rip)      # 0x145d8
movq %rax, %rdi
movq %rbx, %rsi
callq 0x1060
xorl %eax, %eax
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_top.c
// Function: search_top_signal_call_args
char *search_top_signal_call_args(char *call_name, int args_num)
{
	TOP_SIGNAL_TREE *now_top_signal_tree = NULL;
	char *result = NULL;
	char *label = NULL;
	char *signal_name = NULL;
	char *verilog = NULL;

	result = calloc(STR_MAX, 1);
//printf("call_name: %s_%s(%d)\n", call_name, name, args_num);

	signal_name = calloc(STR_MAX, 1);
	label = calloc(STR_MAX, 1);

	sprintf(label, "__call_%s_%s_%d", call_name, "args", args_num);
	sprintf(signal_name, "%s", label);
//printf("call_name: %s\n", signal_name);

	now_top_signal_tree = top_signal_tree_top;
    while(now_top_signal_tree != NULL){
		if(now_top_signal_tree->flag == FLAG_CALL){
			if(!strcmp(now_top_signal_tree->label, label)){
				sprintf(result, "%s %s |", result, now_top_signal_tree->verilog_signal);
				now_top_signal_tree->used = 1;
//printf("    call_name: %s <> %s\n", now_top_signal_tree->label, label);
			}
		}
        now_top_signal_tree = now_top_signal_tree->next_ptr;
	}

	if(strlen(result) > 0){
		result[strlen(result)-1] = ';';
		verilog = calloc(strlen(result)+1, 1);
		strcpy(verilog, result);
//printf("    result: %s,%s\n", result, verilog);
	}

	free(result);

	return verilog;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movl %esi, %ebp
movq %rdi, %r15
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x1100
movq %rax, %rbx
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x1100
movq %rax, %r14
leaq 0x5831(%rip), %rsi      # 0xfaec
leaq 0x4ea8(%rip), %rcx      # 0xf16a
movq %rax, %rdi
movq %r15, %rdx
movl %ebp, %r8d
xorl %eax, %eax
callq 0x11b0
movq 0xa2e7(%rip), %r12      # 0x145c0
testq %r12, %r12
je 0xa326
leaq 0x5817(%rip), %r15      # 0xfafc
cmpl $0x5, 0x30(%r12)
jne 0xa31c
movq 0x10(%r12), %rdi
movq %r14, %rsi
callq 0x1110
testl %eax, %eax
jne 0xa31c
movq 0x50(%r12), %rcx
movq %rbx, %rdi
movq %r15, %rsi
movq %rbx, %rdx
xorl %eax, %eax
callq 0x11b0
movl $0x1, 0x20(%r12)
movq 0x8(%r12), %r12
testq %r12, %r12
jne 0xa2e5
movq %rbx, %rdi
callq 0x1090
testq %rax, %rax
je 0xa35e
movb $0x3b, -0x1(%rbx,%rax)
movq %rbx, %rdi
callq 0x1090
leaq 0x1(%rax), %rdi
movl $0x1, %esi
callq 0x1100
movq %rax, %r14
movq %rax, %rdi
movq %rbx, %rsi
callq 0x1060
jmp 0xa361
xorl %r14d, %r14d
movq %rbx, %rdi
callq 0x1030
movq %r14, %rax
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_top.c
// Function: create_top_wire
int create_top_wire(FILE *fp)
{
	TOP_SIGNAL_TREE *now_top_signal_tree;

	now_top_signal_tree = top_signal_tree_top;
    while(now_top_signal_tree != NULL){
		fprintf(fp, "%s\n", now_top_signal_tree->verilog_wire);
        now_top_signal_tree = now_top_signal_tree->next_ptr;
	}

	return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq 0x9c6f(%rip), %r15      # 0x145c0
testq %r15, %r15
je 0xa97a
movq %rdi, %rbx
leaq 0x4172(%rip), %r14      # 0xead2
movq 0x58(%r15), %rdx
movq %rbx, %rdi
movq %r14, %rsi
xorl %eax, %eax
callq 0x1120
movq 0x8(%r15), %r15
testq %r15, %r15
jne 0xa960
xorl %eax, %eax
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_top.c
// Function: create_top_nowire
int create_top_nowire(FILE *fp)
{
	TOP_SIGNAL_TREE *now_top_signal_tree;

	now_top_signal_tree = top_signal_tree_top;
    while(now_top_signal_tree != NULL){
		if(now_top_signal_tree->used == 0){
			if(now_top_signal_tree->flag == FLAG_ARGS){
				if(now_top_signal_tree->inout == SIG_IN){
					fprintf(fp, "\tinput ");
				}else{
					fprintf(fp, "\toutput ");
				}
				if(now_top_signal_tree->size > 0){
					fprintf(fp, "[%d:0] ", now_top_signal_tree->size*8-1);
				}
				fprintf(fp, "%s,\n", now_top_signal_tree->label);
			}else if(now_top_signal_tree->flag == FLAG_RETURN){
				fprintf(fp, "\toutput ");
				if(now_top_signal_tree->size > 0){
					fprintf(fp, "[%d:0] ", now_top_signal_tree->size*8-1);
				}
				fprintf(fp, "%s\n", now_top_signal_tree->label);
			}
		}
        now_top_signal_tree = now_top_signal_tree->next_ptr;
	}

	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq 0x9c2c(%rip), %rbp      # 0x145c0
testq %rbp, %rbp
je 0xaa57
movq %rdi, %rbx
leaq 0x52b1(%rip), %r14      # 0xfc58
leaq 0x3c9d(%rip), %r15      # 0xe64b
leaq 0x52c1(%rip), %r12      # 0xfc76
cmpl $0x0, 0x20(%rbp)
jne 0xaa4a
movl 0x30(%rbp), %eax
cmpl $0x6, %eax
je 0xa9e1
cmpl $0x3, %eax
jne 0xaa4a
cmpl $0x0, 0x1c(%rbp)
je 0xaa02
movl $0x8, %esi
movl $0x1, %edx
movq %r14, %rdi
jmp 0xaa13
movl $0x8, %esi
movl $0x1, %edx
movq %r14, %rdi
movq %rbx, %rcx
callq 0x11d0
movl 0x18(%rbp), %eax
leaq 0x40d2(%rip), %r13      # 0xead2
jmp 0xaa21
movl $0x7, %esi
movl $0x1, %edx
leaq 0x523d(%rip), %rdi      # 0xfc50
movq %rbx, %rcx
callq 0x11d0
movl 0x18(%rbp), %eax
movq %r12, %r13
testl %eax, %eax
jle 0xaa39
leal -0x1(,%rax,8), %edx
movq %rbx, %rdi
movq %r15, %rsi
xorl %eax, %eax
callq 0x1120
movq 0x10(%rbp), %rdx
movq %rbx, %rdi
movq %r13, %rsi
xorl %eax, %eax
callq 0x1120
movq 0x8(%rbp), %rbp
testq %rbp, %rbp
jne 0xa9b5
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_top.c
// Function: create_top_nofunc
int create_top_nofunc(FILE *fp)
{
	TOP_SIGNAL_TREE *now_top_signal_tree;

	now_top_signal_tree = top_signal_tree_top;
    while(now_top_signal_tree != NULL){
		if((now_top_signal_tree->used == 0) && (
			(now_top_signal_tree->flag == FLAG_CTRL) ||
			(now_top_signal_tree->flag == FLAG_ARGS) ||
			(now_top_signal_tree->flag == FLAG_RETURN)
			)
		){
			if(now_top_signal_tree->inout == SIG_IN){
				fprintf(fp, "assign %s = %s;\n", now_top_signal_tree->verilog_signal, now_top_signal_tree->label);
			}else{
				fprintf(fp, "assign %s = %s;\n", now_top_signal_tree->label, now_top_signal_tree->verilog_signal);
			}
		}
        now_top_signal_tree = now_top_signal_tree->next_ptr;
	}

	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq 0x9b4a(%rip), %r15      # 0x145c0
testq %r15, %r15
je 0xaad4
movq %rdi, %rbx
movl $0x4a, %ebp
leaq 0x4a79(%rip), %r14      # 0xf503
cmpl $0x0, 0x20(%r15)
jne 0xaacb
movl 0x30(%r15), %eax
cmpl $0x6, %eax
ja 0xaacb
btl %eax, %ebp
jae 0xaacb
xorl %eax, %eax
xorl %ecx, %ecx
cmpl $0x0, 0x1c(%r15)
setne %al
sete %cl
shll $0x6, %ecx
shll $0x6, %eax
movq 0x10(%r15,%rcx), %rdx
movq 0x10(%r15,%rax), %rcx
movq %rbx, %rdi
movq %r14, %rsi
xorl %eax, %eax
callq 0x1120
movq 0x8(%r15), %r15
testq %r15, %r15
jne 0xaa8a
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_ir_top.c
// Function: create_top_global
int create_top_global(FILE *fp)
{
	MODULE_TREE *now_module_tree = NULL;
	MEMORY_TREE *now_memory_tree = NULL;

	char *label;
	label				= calloc(STR_MAX, 1);

    now_module_tree = module_tree_top;
    while(now_module_tree != NULL){
			now_memory_tree = now_module_tree->memory_tree_ptr;
			while(now_memory_tree != NULL){
				if(now_memory_tree->flag == MEMORY_FLAG_GLOBAL){
					sprintf(label, "%s", convname(sep_p(now_memory_tree->label)));
					fprintf(fp, "\tinput [31:0] __base_%s,\n", label);
				}
				now_memory_tree = now_memory_tree->next_ptr;
			}
        now_module_tree = now_module_tree->next_ptr;
	}

	return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %rdi, %rbx
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x1100
movq %rax, %r14
leaq 0x9a7a(%rip), %rax      # 0x14580
movq (%rax), %r12
testq %r12, %r12
je 0xab6a
leaq 0x514c(%rip), %r15      # 0xfc61
movq 0x18(%r12), %r13
testq %r13, %r13
je 0xab60
cmpl $0x1, 0x10(%r13)
jne 0xab5a
movq 0x18(%r13), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xab37
cmpl $0x25, %eax
jne 0xab3a
incq %rdi
callq 0x13b8
movq %r14, %rdi
movq %rax, %rsi
callq 0x1060
movq %rbx, %rdi
movq %r15, %rsi
movq %r14, %rdx
xorl %eax, %eax
callq 0x1120
movq 0x8(%r13), %r13
jmp 0xab1a
movq 0x8(%r12), %r12
testq %r12, %r12
jne 0xab15
xorl %eax, %eax
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_struct.c
// Function: clean_struct_tree
int clean_struct_tree()
{
	STRUCT_TREE *now_struct_tree;
	STRUCT_TREE *new_struct_tree;

    now_struct_tree = struct_tree_top;
    while(now_struct_tree != NULL){
        new_struct_tree = now_struct_tree->next_ptr;
        if(now_struct_tree->label != NULL) free(now_struct_tree->label);
        if(now_struct_tree->argument != NULL) free(now_struct_tree->argument);
        free(now_struct_tree);
        now_struct_tree = new_struct_tree;
    }
    struct_tree_top = NULL;
    return 0;
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq 0x8919(%rip), %rbx      # 0x145e0
testq %rbx, %rbx
je 0xbcfc
movq 0x8(%rbx), %r14
movq 0x10(%rbx), %rdi
testq %rdi, %rdi
je 0xbcde
callq 0x1030
movq 0x18(%rbx), %rdi
testq %rdi, %rdi
je 0xbcec
callq 0x1030
movq %rbx, %rdi
callq 0x1030
movq %r14, %rbx
testq %r14, %r14
jne 0xbccc
movq $0x0, 0x88d9(%rip) # 0x145e0
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_struct.c
// Function: register_struct_tree
int register_struct_tree(char *label, char *argument)
{
	STRUCT_TREE *now_struct_tree = NULL;
	STRUCT_TREE *old_struct_tree = NULL;

	now_struct_tree = struct_tree_top;
	while(now_struct_tree != NULL){
		old_struct_tree = now_struct_tree;
		now_struct_tree = now_struct_tree->next_ptr;
	}

	now_struct_tree				= (STRUCT_TREE *)calloc(sizeof(STRUCT_TREE),1);
	now_struct_tree->prev_ptr	= old_struct_tree;
	now_struct_tree->next_ptr	= NULL;

	if(struct_tree_top == NULL){
		struct_tree_top				= now_struct_tree;
	}else{
		old_struct_tree->next_ptr	= now_struct_tree;
	}


	now_struct_tree->label = charalloc(label);
	now_struct_tree->argument = charalloc(argument);
	return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x88ba(%rip), %rax      # 0x145e0
xorl %ecx, %ecx
movq %rcx, %r12
movq (%rax), %rcx
leaq 0x8(%rcx), %rax
testq %rcx, %rcx
jne 0xbd28
movl $0x28, %edi
movl $0x1, %esi
callq 0x1100
movq %rax, %r15
movq %r12, (%rax)
movq $0x0, 0x8(%rax)
addq $0x8, %r12
cmpq $0x0, 0x8880(%rip)      # 0x145e0
leaq 0x8879(%rip), %rax      # 0x145e0
cmoveq %rax, %r12
movq %r15, (%r12)
movq %r14, %rdi
callq 0x1395
movq %rax, 0x10(%r15)
movq %rbx, %rdi
callq 0x1395
movq %rax, 0x18(%r15)
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_struct.c
// Function: parser_struct_tree
int parser_struct_tree()
{
	PARSER_TREE_IR *now_parser_tree_ir;

    printf("[Parsing struct type for LLCM-IR]\n");

    now_parser_tree_ir = parser_tree_ir_top;
    while(now_parser_tree_ir != NULL){
		if(now_parser_tree_ir->flag == PARSER_IR_FLAG_TYPE){
			register_struct_tree(now_parser_tree_ir->label, now_parser_tree_ir->type.name);
		}
        now_parser_tree_ir = now_parser_tree_ir->next_ptr;
    }

    return 0;
}

// Assembly:
pushq %rbx
leaq 0x4290(%rip), %rdi      # 0x1002d
callq 0x1070
leaq 0x8397(%rip), %rax      # 0x14140
movq (%rax), %rbx
testq %rbx, %rbx
je 0xbdcd
cmpl $0x4, 0x10(%rbx)
jne 0xbdc7
leaq 0x30(%rbx), %rdi
leaq 0x1830(%rbx), %rsi
callq 0xbd11
movq 0x8(%rbx), %rbx
jmp 0xbdac
xorl %eax, %eax
popq %rbx
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/parser_struct.c
// Function: get_struct_argument
int get_struct_argument(char *label, char *argument)
{
	STRUCT_TREE *now_struct_tree;

	strcpy(argument, "");

    now_struct_tree = struct_tree_top;
    while(now_struct_tree != NULL){
		if(!strcmp(now_struct_tree->label, label)){
			strcpy(argument, now_struct_tree->argument);
			break;
		}
		now_struct_tree = now_struct_tree->next_ptr;
    }

	return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movb $0x0, (%rsi)
movq 0x8800(%rip), %r15      # 0x145e0
testq %r15, %r15
je 0xbe12
movq %rsi, %rbx
movq %rdi, %r14
movq 0x10(%r15), %rdi
movq %r14, %rsi
callq 0x1110
testl %eax, %eax
je 0xbe06
movq 0x8(%r15), %r15
testq %r15, %r15
jne 0xbdeb
jmp 0xbe12
movq 0x18(%r15), %rsi
movq %rbx, %rdi
callq 0x1060
xorl %eax, %eax
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/synverll.c
// Function: split_c_source
int split_c_source(char *filename)
{
    int function_count;
	int i;
	char *llvm_command;

	printf("[C Source Parser Start]\n");

    read_file(filename);								// ファイルの読み込みとトークン取得
    set_token_order_current(get_token_order_top());	// トークンのポインタをトップへ戻す

    parser_c_source();									// 構文解析
    function_count = create_proc_source();				// Processの処理
    create_header_source();								// Lineの処理

	// トークンオーダーをクリーンナップする
	clean_token_order();

	printf(" -> Function Count: %d\n", function_count);

	/*
	 * 分離したCソースコードをLLVMでコンパイルする
	 */
	printf("[LLVM Compile Start]\n");
	llvm_command = malloc(256);

	for(i = 0; i < function_count; i++){
		sprintf(llvm_command, "clang -S -m32 -O3 -emit-llvm __%03d.c", i);
		system(llvm_command);
	}

	free(llvm_command);

	return function_count;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
leaq 0x42a4(%rip), %rdi      # 0x1010d
callq 0x1070
movq %rbx, %rdi
callq 0xcb42
xorl %eax, %eax
callq 0xcb0e
movq %rax, %rdi
callq 0xcb1e
xorl %eax, %eax
callq 0x1a8f
xorl %eax, %eax
callq 0x14cf
movl %eax, %ebx
xorl %eax, %eax
callq 0x15ee
xorl %eax, %eax
callq 0xca8e
leaq 0x41a5(%rip), %rdi      # 0x1004f
movl %ebx, %esi
xorl %eax, %eax
callq 0x10b0
leaq 0x426b(%rip), %rdi      # 0x10125
callq 0x1070
movl $0x100, %edi            # imm = 0x100
callq 0x1140
movq %rax, %r14
testl %ebx, %ebx
jle 0xbef6
leaq 0x4190(%rip), %r15      # 0x10067
xorl %ebp, %ebp
movq %r14, %rdi
movq %r15, %rsi
movl %ebp, %edx
xorl %eax, %eax
callq 0x11b0
movq %r14, %rdi
callq 0x10a0
incl %ebp
cmpl %ebp, %ebx
jne 0xbed9
movq %r14, %rdi
callq 0x1030
movl %ebx, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O1/aquaxis[P]synverll/src/synverll.c
// Function: help
void help()
{
    printf("Synverll Rev %d.%02d\n", REVISION_MAIN, REVISION_MANOR);
    printf(" Synthesis for Verilog HDL using LLVM\n");
    printf(" C Source to Verilog-HDL Convertor\n");
    printf(" Hidemi Ishihara <hidemi(at)aquaxis.com>\n");
    printf("\n");
    printf("Usage:\n");
//    printf(" synverll C_SOURCE_FILENAME TOP_MODULE_NAME\n");
    printf(" synverll [-d] C_SOURCE_FILENAME\n");
    printf("  -d: Debug Mode(output a debug file)\n");
}

// Assembly:
pushq %rax
leaq 0x3daf(%rip), %rdi      # 0x100db
movl $0x1, %esi
xorl %edx, %edx
xorl %eax, %eax
callq 0x10b0
leaq 0x3e2a(%rip), %rdi      # 0x1016b
callq 0x1070
leaq 0x3e44(%rip), %rdi      # 0x10191
callq 0x1070
leaq 0x3e5b(%rip), %rdi      # 0x101b4
callq 0x1070
movl $0xa, %edi
callq 0x1040
leaq 0x3e6e(%rip), %rdi      # 0x101dd
callq 0x1070
leaq 0x3e69(%rip), %rdi      # 0x101e4
callq 0x1070
leaq 0x3e7e(%rip), %rdi      # 0x10205
popq %rax
jmp 0x1070