// File: jstaursky[P]hutch/src/Sleigh/pcodecompile.cc
// Function: PcodeCompile::fillinZero(OpTpl*, std::vector<OpTpl*, std::allocator<OpTpl*>> const&)
void PcodeCompile::fillinZero(OpTpl *op,const vector<OpTpl *> &ops)

{				// Try to get rid of zero size varnodes in op
  // Right now this is written assuming operands for the constructor are
  // are built before any other pcode in the constructor is generated

  int4 inputsize,i;

  switch(op->getOpcode()) {
  case CPUI_COPY:			// Instructions where all inputs and output are same size
  case CPUI_INT_ADD:
  case CPUI_INT_SUB:
  case CPUI_INT_2COMP:
  case CPUI_INT_NEGATE:
  case CPUI_INT_XOR:
  case CPUI_INT_AND:
  case CPUI_INT_OR:
  case CPUI_INT_MULT:
  case CPUI_INT_DIV:
  case CPUI_INT_SDIV:
  case CPUI_INT_REM:
  case CPUI_INT_SREM:
  case CPUI_FLOAT_ADD:
  case CPUI_FLOAT_DIV:
  case CPUI_FLOAT_MULT:
  case CPUI_FLOAT_SUB:
  case CPUI_FLOAT_NEG:
  case CPUI_FLOAT_ABS:
  case CPUI_FLOAT_SQRT:
  case CPUI_FLOAT_CEIL:
  case CPUI_FLOAT_FLOOR:
  case CPUI_FLOAT_ROUND:
    if ((op->getOut()!=(VarnodeTpl *)0)&&(op->getOut()->isZeroSize()))
      matchSize(-1,op,false,ops);
    inputsize = op->numInput();
    for(i=0;i<inputsize;++i)
      if (op->getIn(i)->isZeroSize())
	matchSize(i,op,false,ops);
    break;
  case CPUI_INT_EQUAL:		// Instructions with bool output
  case CPUI_INT_NOTEQUAL:
  case CPUI_INT_SLESS:
  case CPUI_INT_SLESSEQUAL:
  case CPUI_INT_LESS:
  case CPUI_INT_LESSEQUAL:
  case CPUI_INT_CARRY:
  case CPUI_INT_SCARRY:
  case CPUI_INT_SBORROW:
  case CPUI_FLOAT_EQUAL:
  case CPUI_FLOAT_NOTEQUAL:
  case CPUI_FLOAT_LESS:
  case CPUI_FLOAT_LESSEQUAL:
  case CPUI_FLOAT_NAN:
  case CPUI_BOOL_NEGATE:
  case CPUI_BOOL_XOR:
  case CPUI_BOOL_AND:
  case CPUI_BOOL_OR:
    if (op->getOut()->isZeroSize())
      force_size(op->getOut(),ConstTpl(ConstTpl::real,1),ops);
    inputsize = op->numInput();
    for(i=0;i<inputsize;++i)
      if (op->getIn(i)->isZeroSize())
	matchSize(i,op,true,ops);
    break;
    // The shift amount does not necessarily have to be the same size
    // But if no size is specified, assume it is the same size
  case CPUI_INT_LEFT:
  case CPUI_INT_RIGHT:
  case CPUI_INT_SRIGHT:
    if (op->getOut()->isZeroSize()) {
      if (!op->getIn(0)->isZeroSize())
	force_size(op->getOut(),op->getIn(0)->getSize(),ops);
    }
    else if (op->getIn(0)->isZeroSize())
      force_size(op->getIn(0),op->getOut()->getSize(),ops);
    // fallthru to subpiece constant check
  case CPUI_SUBPIECE:
    if (op->getIn(1)->isZeroSize())
      force_size(op->getIn(1),ConstTpl(ConstTpl::real,4),ops);
    break;
  case CPUI_CPOOLREF:
    if (op->getOut()->isZeroSize() && (!op->getIn(0)->isZeroSize()))
      force_size(op->getOut(),op->getIn(0)->getSize(),ops);
    if (op->getIn(0)->isZeroSize() && (!op->getOut()->isZeroSize()))
      force_size(op->getIn(0),op->getOut()->getSize(),ops);
    for(i=1;i<op->numInput();++i) {
      if (op->getIn(i)->isZeroSize())
	force_size(op->getIn(i),ConstTpl(ConstTpl::real,sizeof(uintb)),ops);
    }
    break;
  default:
    break;
  }
}

// Assembly:
subq $0xc8, %rsp
movq %rdi, 0xc0(%rsp)
movq %rsi, 0xb8(%rsp)
movq 0xc0(%rsp), %rdi
callq 0xe2420
decl %eax
movl %eax, %ecx
movq %rcx, 0x48(%rsp)
subl $0x43, %eax
ja 0x10dba0
movq 0x48(%rsp), %rax
leaq 0x7a6ca(%rip), %rcx     # 0x187ddc
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movq 0xc0(%rsp), %rdi
callq 0xdab40
cmpq $0x0, %rax
je 0x10d765
movq 0xc0(%rsp), %rdi
callq 0xdab40
movq %rax, %rdi
callq 0xdd230
testb $0x1, %al
jne 0x10d749
jmp 0x10d765
movq 0xc0(%rsp), %rsi
movq 0xb8(%rsp), %rcx
movl $0xffffffff, %edi       # imm = 0xFFFFFFFF
xorl %edx, %edx
callq 0xda7a0
movq 0xc0(%rsp), %rdi
callq 0xdf850
movl %eax, 0xb4(%rsp)
movl $0x0, 0xb0(%rsp)
movl 0xb0(%rsp), %eax
cmpl 0xb4(%rsp), %eax
jge 0x10d7e9
movq 0xc0(%rsp), %rdi
movl 0xb0(%rsp), %esi
callq 0xd3b80
movq %rax, %rdi
callq 0xdd230
testb $0x1, %al
jne 0x10d7b6
jmp 0x10d7d4
movl 0xb0(%rsp), %edi
movq 0xc0(%rsp), %rsi
movq 0xb8(%rsp), %rcx
xorl %edx, %edx
callq 0xda7a0
jmp 0x10d7d6
movl 0xb0(%rsp), %eax
addl $0x1, %eax
movl %eax, 0xb0(%rsp)
jmp 0x10d784
jmp 0x10dba2
movq 0xc0(%rsp), %rdi
callq 0xdab40
movq %rax, %rdi
callq 0xdd230
testb $0x1, %al
jne 0x10d809
jmp 0x10d849
movq 0xc0(%rsp), %rdi
callq 0xdab40
movq %rax, 0x40(%rsp)
leaq 0x90(%rsp), %rdi
xorl %esi, %esi
movl $0x1, %edx
callq 0xd9880
movq 0x40(%rsp), %rdi
movq 0xb8(%rsp), %rdx
leaq 0x90(%rsp), %rsi
callq 0xcf5c0
movq 0xc0(%rsp), %rdi
callq 0xdf850
movl %eax, 0xb4(%rsp)
movl $0x0, 0xb0(%rsp)
movl 0xb0(%rsp), %eax
cmpl 0xb4(%rsp), %eax
jge 0x10d8d0
movq 0xc0(%rsp), %rdi
movl 0xb0(%rsp), %esi
callq 0xd3b80
movq %rax, %rdi
callq 0xdd230
testb $0x1, %al
jne 0x10d89a
jmp 0x10d8bb
movl 0xb0(%rsp), %edi
movq 0xc0(%rsp), %rsi
movq 0xb8(%rsp), %rcx
movl $0x1, %edx
callq 0xda7a0
jmp 0x10d8bd
movl 0xb0(%rsp), %eax
addl $0x1, %eax
movl %eax, 0xb0(%rsp)
jmp 0x10d868
jmp 0x10dba2
movq 0xc0(%rsp), %rdi
callq 0xdab40
movq %rax, %rdi
callq 0xdd230
testb $0x1, %al
jne 0x10d8f0
jmp 0x10d94b
movq 0xc0(%rsp), %rdi
xorl %esi, %esi
callq 0xd3b80
movq %rax, %rdi
callq 0xdd230
testb $0x1, %al
jne 0x10d949
movq 0xc0(%rsp), %rdi
callq 0xdab40
movq %rax, 0x38(%rsp)
movq 0xc0(%rsp), %rdi
xorl %esi, %esi
callq 0xd3b80
movq %rax, %rdi
callq 0xd4930
movq 0x38(%rsp), %rdi
movq %rax, %rsi
movq 0xb8(%rsp), %rdx
callq 0xcf5c0
jmp 0x10d9a8
movq 0xc0(%rsp), %rdi
xorl %esi, %esi
callq 0xd3b80
movq %rax, %rdi
callq 0xdd230
testb $0x1, %al
jne 0x10d968
jmp 0x10d9a6
movq 0xc0(%rsp), %rdi
xorl %esi, %esi
callq 0xd3b80
movq %rax, 0x30(%rsp)
movq 0xc0(%rsp), %rdi
callq 0xdab40
movq %rax, %rdi
callq 0xd4930
movq 0x30(%rsp), %rdi
movq %rax, %rsi
movq 0xb8(%rsp), %rdx
callq 0xcf5c0
jmp 0x10d9a8
jmp 0x10d9aa
movq 0xc0(%rsp), %rdi
movl $0x1, %esi
callq 0xd3b80
movq %rax, %rdi
callq 0xdd230
testb $0x1, %al
jne 0x10d9ca
jmp 0x10da09
movq 0xc0(%rsp), %rdi
movl $0x1, %esi
callq 0xd3b80
movq %rax, 0x28(%rsp)
leaq 0x70(%rsp), %rdi
xorl %esi, %esi
movl $0x4, %edx
callq 0xd9880
movq 0x28(%rsp), %rdi
movq 0xb8(%rsp), %rdx
leaq 0x70(%rsp), %rsi
callq 0xcf5c0
jmp 0x10dba2
movq 0xc0(%rsp), %rdi
callq 0xdab40
movq %rax, %rdi
callq 0xdd230
testb $0x1, %al
jne 0x10da29
jmp 0x10da82
movq 0xc0(%rsp), %rdi
xorl %esi, %esi
callq 0xd3b80
movq %rax, %rdi
callq 0xdd230
testb $0x1, %al
jne 0x10da82
movq 0xc0(%rsp), %rdi
callq 0xdab40
movq %rax, 0x20(%rsp)
movq 0xc0(%rsp), %rdi
xorl %esi, %esi
callq 0xd3b80
movq %rax, %rdi
callq 0xd4930
movq 0x20(%rsp), %rdi
movq %rax, %rsi
movq 0xb8(%rsp), %rdx
callq 0xcf5c0
movq 0xc0(%rsp), %rdi
xorl %esi, %esi
callq 0xd3b80
movq %rax, %rdi
callq 0xdd230
testb $0x1, %al
jne 0x10da9f
jmp 0x10daf6
movq 0xc0(%rsp), %rdi
callq 0xdab40
movq %rax, %rdi
callq 0xdd230
testb $0x1, %al
jne 0x10daf6
movq 0xc0(%rsp), %rdi
xorl %esi, %esi
callq 0xd3b80
movq %rax, 0x18(%rsp)
movq 0xc0(%rsp), %rdi
callq 0xdab40
movq %rax, %rdi
callq 0xd4930
movq 0x18(%rsp), %rdi
movq %rax, %rsi
movq 0xb8(%rsp), %rdx
callq 0xcf5c0
movl $0x1, 0xb0(%rsp)
movl 0xb0(%rsp), %eax
movl %eax, 0x14(%rsp)
movq 0xc0(%rsp), %rdi
callq 0xdf850
movl %eax, %ecx
movl 0x14(%rsp), %eax
cmpl %ecx, %eax
jge 0x10db9e
movq 0xc0(%rsp), %rdi
movl 0xb0(%rsp), %esi
callq 0xd3b80
movq %rax, %rdi
callq 0xdd230
testb $0x1, %al
jne 0x10db45
jmp 0x10db86
movq 0xc0(%rsp), %rdi
movl 0xb0(%rsp), %esi
callq 0xd3b80
movq %rax, 0x8(%rsp)
leaq 0x50(%rsp), %rdi
xorl %esi, %esi
movl $0x8, %edx
callq 0xd9880
movq 0x8(%rsp), %rdi
movq 0xb8(%rsp), %rdx
leaq 0x50(%rsp), %rsi
callq 0xcf5c0
jmp 0x10db88
movl 0xb0(%rsp), %eax
addl $0x1, %eax
movl %eax, 0xb0(%rsp)
jmp 0x10db01
jmp 0x10dba2
jmp 0x10dba2
addq $0xc8, %rsp
retq
nopw (%rax,%rax)