// File: FreeSlave[P]vhlt/hlrad/compress.h
// Function: vector_decompress(vector_type, void const*, float*, float*, float*)
inline void vector_decompress
	(vector_type t, const void *s, float *f1, float *f2, float *f3)
{
	const unsigned int *m = (const unsigned int *)s;
	unsigned int *p1 = (unsigned int *)f1;
	unsigned int *p2 = (unsigned int *)f2;
	unsigned int *p3 = (unsigned int *)f3;
	switch (t)
	{
	case VECTOR96:
		*p1 = m[0];
		*p2 = m[1];
		*p3 = m[2];
		break;
	case VECTOR48:
		if (bitget (m[0], 0, 16) == 0)
			*p1 = 0;
		else
			*p1
				= bitput (1, 11, 12)
				| bitput (bitget (m[0], 0, 16), 12, 28)
				| bitput (3, 28, 32)
				;
		if (bitget (m[0], 16, 32) == 0)
			*p2 = 0;
		else
			*p2
				= bitput (1, 11, 12)
				| bitput (bitget (m[0], 16, 32), 12, 28)
				| bitput (3, 28, 32)
				;
		if (bitget (m[1], 0, 16) == 0)
			*p3 = 0;
		else
			*p3
				= bitput (1, 11, 12)
				| bitput (bitget (m[1], 0, 16), 12, 28)
				| bitput (3, 28, 32)
				;
		break;
	case VECTOR32: case VECTOR24:
		float f;
		if (t == VECTOR32)
		{
			*p1
				= bitput (1, 13, 14)
				| bitput (bitget (m[0], 0, 9), 14, 23)
				| bitput (bitget (m[0], 27, 32), 23, 28)
				| bitput (3, 28, 32)
				;
			*p2
				= bitput (1, 13, 14)
				| bitput (bitget (m[0], 9, 18), 14, 23)
				| bitput (bitget (m[0], 27, 32), 23, 28)
				| bitput (3, 28, 32)
				;
			*p3
				= bitput (1, 13, 14)
				| bitput (bitget (m[0], 18, 27), 14, 23)
				| bitput (bitget (m[0], 27, 32), 23, 28)
				| bitput (3, 28, 32)
				;
			*((unsigned int *)&f)
				= bitput (bitget (m[0], 27, 32), 23, 28)
				| bitput (3, 28, 32)
				;
		}
		else
		{
			*p1
				= bitput (1, 16, 17)
				| bitput (bitget (m[0], 0, 6), 17, 23)
				| bitput (bitget (m[0], 18, 23), 23, 28)
				| bitput (3, 28, 32)
				;
			*p2
				= bitput (1, 16, 17)
				| bitput (bitget (m[0], 6, 12), 17, 23)
				| bitput (bitget (m[0], 18, 23), 23, 28)
				| bitput (3, 28, 32)
				;
			*p3
				= bitput (1, 16, 17)
				| bitput (bitget (m[0], 12, 18), 17, 23)
				| bitput (bitget (m[0], 18, 23), 23, 28)
				| bitput (3, 28, 32)
				;
			*((unsigned int *)&f)
				= bitput (bitget (m[0], 18, 23), 23, 28)
				| bitput (3, 28, 32)
				;
		}
		*f1 = (*f1-f) * 2.f;
		*f2 = (*f2-f) * 2.f;
		*f3 = (*f3-f) * 2.f;
		break;
	default:
		;
	}
}

// Assembly:
subq $0xb8, %rsp
movl %edi, 0xb4(%rsp)
movq %rsi, 0xa8(%rsp)
movq %rdx, 0xa0(%rsp)
movq %rcx, 0x98(%rsp)
movq %r8, 0x90(%rsp)
movq 0xa8(%rsp), %rax
movq %rax, 0x88(%rsp)
movq 0xa0(%rsp), %rax
movq %rax, 0x80(%rsp)
movq 0x98(%rsp), %rax
movq %rax, 0x78(%rsp)
movq 0x90(%rsp), %rax
movq %rax, 0x70(%rsp)
movl 0xb4(%rsp), %eax
movl %eax, 0x68(%rsp)
testl %eax, %eax
je 0x12ad9
jmp 0x12ab9
movl 0x68(%rsp), %eax
subl $0x1, %eax
je 0x12b16
jmp 0x12ac4
movl 0x68(%rsp), %eax
addl $-0x2, %eax
subl $0x2, %eax
jb 0x12ce5
jmp 0x131f0
movq 0x88(%rsp), %rax
movl (%rax), %ecx
movq 0x80(%rsp), %rax
movl %ecx, (%rax)
movq 0x88(%rsp), %rax
movl 0x4(%rax), %ecx
movq 0x78(%rsp), %rax
movl %ecx, (%rax)
movq 0x88(%rsp), %rax
movl 0x8(%rax), %ecx
movq 0x70(%rsp), %rax
movl %ecx, (%rax)
jmp 0x131f2
movq 0x88(%rsp), %rax
movl (%rax), %edi
xorl %esi, %esi
movl $0x10, %edx
callq 0x13280
cmpl $0x0, %eax
jne 0x12b41
movq 0x80(%rsp), %rax
movl $0x0, (%rax)
jmp 0x12bb0
movl $0x1, %edi
movl $0xb, %esi
movl $0xc, %edx
callq 0x132d0
movl %eax, 0x60(%rsp)
movq 0x88(%rsp), %rax
movl (%rax), %edi
xorl %esi, %esi
movl $0x10, %edx
callq 0x13280
movl %eax, %edi
movl $0xc, %esi
movl $0x1c, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x60(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x64(%rsp)
movl $0x3, %edi
movl $0x1c, %esi
movl $0x20, %edx
callq 0x132d0
movl 0x64(%rsp), %ecx
orl %eax, %ecx
movq 0x80(%rsp), %rax
movl %ecx, (%rax)
movq 0x88(%rsp), %rax
movl (%rax), %edi
movl $0x10, %esi
movl $0x20, %edx
callq 0x13280
cmpl $0x0, %eax
jne 0x12bdb
movq 0x78(%rsp), %rax
movl $0x0, (%rax)
jmp 0x12c4a
movl $0x1, %edi
movl $0xb, %esi
movl $0xc, %edx
callq 0x132d0
movl %eax, 0x58(%rsp)
movq 0x88(%rsp), %rax
movl (%rax), %edi
movl $0x10, %esi
movl $0x20, %edx
callq 0x13280
movl %eax, %edi
movl $0xc, %esi
movl $0x1c, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x58(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x5c(%rsp)
movl $0x3, %edi
movl $0x1c, %esi
movl $0x20, %edx
callq 0x132d0
movl 0x5c(%rsp), %ecx
orl %eax, %ecx
movq 0x78(%rsp), %rax
movl %ecx, (%rax)
movq 0x88(%rsp), %rax
movl 0x4(%rax), %edi
xorl %esi, %esi
movl $0x10, %edx
callq 0x13280
cmpl $0x0, %eax
jne 0x12c73
movq 0x70(%rsp), %rax
movl $0x0, (%rax)
jmp 0x12ce0
movl $0x1, %edi
movl $0xb, %esi
movl $0xc, %edx
callq 0x132d0
movl %eax, 0x50(%rsp)
movq 0x88(%rsp), %rax
movl 0x4(%rax), %edi
xorl %esi, %esi
movl $0x10, %edx
callq 0x13280
movl %eax, %edi
movl $0xc, %esi
movl $0x1c, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x50(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x54(%rsp)
movl $0x3, %edi
movl $0x1c, %esi
movl $0x20, %edx
callq 0x132d0
movl 0x54(%rsp), %ecx
orl %eax, %ecx
movq 0x70(%rsp), %rax
movl %ecx, (%rax)
jmp 0x131f2
cmpl $0x2, 0xb4(%rsp)
jne 0x12f35
movl $0x1, %edi
movl $0xd, %esi
movl $0xe, %edx
callq 0x132d0
movl %eax, 0x28(%rsp)
movq 0x88(%rsp), %rax
movl (%rax), %edi
xorl %esi, %esi
movl $0x9, %edx
callq 0x13280
movl %eax, %edi
movl $0xe, %esi
movl $0x17, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x28(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x2c(%rsp)
movq 0x88(%rsp), %rax
movl (%rax), %edi
movl $0x1b, %esi
movl $0x20, %edx
callq 0x13280
movl %eax, %edi
movl $0x17, %esi
movl $0x1c, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x2c(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x30(%rsp)
movl $0x3, %edi
movl $0x1c, %esi
movl $0x20, %edx
callq 0x132d0
movl 0x30(%rsp), %ecx
orl %eax, %ecx
movq 0x80(%rsp), %rax
movl %ecx, (%rax)
movl $0x1, %edi
movl $0xd, %esi
movl $0xe, %edx
callq 0x132d0
movl %eax, 0x34(%rsp)
movq 0x88(%rsp), %rax
movl (%rax), %edi
movl $0x9, %esi
movl $0x12, %edx
callq 0x13280
movl %eax, %edi
movl $0xe, %esi
movl $0x17, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x34(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x38(%rsp)
movq 0x88(%rsp), %rax
movl (%rax), %edi
movl $0x1b, %esi
movl $0x20, %edx
callq 0x13280
movl %eax, %edi
movl $0x17, %esi
movl $0x1c, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x38(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x3c(%rsp)
movl $0x3, %edi
movl $0x1c, %esi
movl $0x20, %edx
callq 0x132d0
movl 0x3c(%rsp), %ecx
orl %eax, %ecx
movq 0x78(%rsp), %rax
movl %ecx, (%rax)
movl $0x1, %edi
movl $0xd, %esi
movl $0xe, %edx
callq 0x132d0
movl %eax, 0x40(%rsp)
movq 0x88(%rsp), %rax
movl (%rax), %edi
movl $0x12, %esi
movl $0x1b, %edx
callq 0x13280
movl %eax, %edi
movl $0xe, %esi
movl $0x17, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x40(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x44(%rsp)
movq 0x88(%rsp), %rax
movl (%rax), %edi
movl $0x1b, %esi
movl $0x20, %edx
callq 0x13280
movl %eax, %edi
movl $0x17, %esi
movl $0x1c, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x44(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x48(%rsp)
movl $0x3, %edi
movl $0x1c, %esi
movl $0x20, %edx
callq 0x132d0
movl 0x48(%rsp), %ecx
orl %eax, %ecx
movq 0x70(%rsp), %rax
movl %ecx, (%rax)
movq 0x88(%rsp), %rax
movl (%rax), %edi
movl $0x1b, %esi
movl $0x20, %edx
callq 0x13280
movl %eax, %edi
movl $0x17, %esi
movl $0x1c, %edx
callq 0x132d0
movl %eax, 0x4c(%rsp)
movl $0x3, %edi
movl $0x1c, %esi
movl $0x20, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x4c(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x6c(%rsp)
jmp 0x13170
movl $0x1, %edi
movl $0x10, %esi
movl $0x11, %edx
callq 0x132d0
movl %eax, (%rsp)
movq 0x88(%rsp), %rax
movl (%rax), %edi
xorl %esi, %esi
movl $0x6, %edx
callq 0x13280
movl %eax, %edi
movl $0x11, %esi
movl $0x17, %edx
callq 0x132d0
movl %eax, %ecx
movl (%rsp), %eax
orl %ecx, %eax
movl %eax, 0x4(%rsp)
movq 0x88(%rsp), %rax
movl (%rax), %edi
movl $0x12, %esi
movl $0x17, %edx
callq 0x13280
movl %eax, %edi
movl $0x17, %esi
movl $0x1c, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x4(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x8(%rsp)
movl $0x3, %edi
movl $0x1c, %esi
movl $0x20, %edx
callq 0x132d0
movl 0x8(%rsp), %ecx
orl %eax, %ecx
movq 0x80(%rsp), %rax
movl %ecx, (%rax)
movl $0x1, %edi
movl $0x10, %esi
movl $0x11, %edx
callq 0x132d0
movl %eax, 0xc(%rsp)
movq 0x88(%rsp), %rax
movl (%rax), %edi
movl $0x6, %esi
movl $0xc, %edx
callq 0x13280
movl %eax, %edi
movl $0x11, %esi
movl $0x17, %edx
callq 0x132d0
movl %eax, %ecx
movl 0xc(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x10(%rsp)
movq 0x88(%rsp), %rax
movl (%rax), %edi
movl $0x12, %esi
movl $0x17, %edx
callq 0x13280
movl %eax, %edi
movl $0x17, %esi
movl $0x1c, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x10(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x14(%rsp)
movl $0x3, %edi
movl $0x1c, %esi
movl $0x20, %edx
callq 0x132d0
movl 0x14(%rsp), %ecx
orl %eax, %ecx
movq 0x78(%rsp), %rax
movl %ecx, (%rax)
movl $0x1, %edi
movl $0x10, %esi
movl $0x11, %edx
callq 0x132d0
movl %eax, 0x18(%rsp)
movq 0x88(%rsp), %rax
movl (%rax), %edi
movl $0xc, %esi
movl $0x12, %edx
callq 0x13280
movl %eax, %edi
movl $0x11, %esi
movl $0x17, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x18(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x1c(%rsp)
movq 0x88(%rsp), %rax
movl (%rax), %edi
movl $0x12, %esi
movl $0x17, %edx
callq 0x13280
movl %eax, %edi
movl $0x17, %esi
movl $0x1c, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x1c(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x20(%rsp)
movl $0x3, %edi
movl $0x1c, %esi
movl $0x20, %edx
callq 0x132d0
movl 0x20(%rsp), %ecx
orl %eax, %ecx
movq 0x70(%rsp), %rax
movl %ecx, (%rax)
movq 0x88(%rsp), %rax
movl (%rax), %edi
movl $0x12, %esi
movl $0x17, %edx
callq 0x13280
movl %eax, %edi
movl $0x17, %esi
movl $0x1c, %edx
callq 0x132d0
movl %eax, 0x24(%rsp)
movl $0x3, %edi
movl $0x1c, %esi
movl $0x20, %edx
callq 0x132d0
movl %eax, %ecx
movl 0x24(%rsp), %eax
orl %ecx, %eax
movl %eax, 0x6c(%rsp)
movq 0xa0(%rsp), %rax
movss (%rax), %xmm0
subss 0x6c(%rsp), %xmm0
movss 0x56ebe(%rip), %xmm1    # 0x6a048
mulss %xmm1, %xmm0
movq 0xa0(%rsp), %rax
movss %xmm0, (%rax)
movq 0x98(%rsp), %rax
movss (%rax), %xmm0
subss 0x6c(%rsp), %xmm0
movss 0x56e94(%rip), %xmm1    # 0x6a048
mulss %xmm1, %xmm0
movq 0x98(%rsp), %rax
movss %xmm0, (%rax)
movq 0x90(%rsp), %rax
movss (%rax), %xmm0
subss 0x6c(%rsp), %xmm0
movss 0x56e6a(%rip), %xmm1    # 0x6a048
mulss %xmm1, %xmm0
movq 0x90(%rsp), %rax
movss %xmm0, (%rax)
jmp 0x131f2
jmp 0x131f2
addq $0xb8, %rsp
retq
nopw (%rax,%rax)