// File: /workspace/github_c_makefile_star2_O0/markdryan[P]subtilis/arch/arm32/arm_encode.c
// Function: prv_encode_simd_instr
static void prv_encode_simd_instr(void *user_data, subtilis_arm_op_t *op,
				  subtilis_arm_instr_type_t type,
				  subtilis_arm_reg_only_instr_t *instr,
				  subtilis_error_t *err)
{
	uint32_t word;
	subtilis_arm_encode_ud_t *ud = user_data;
	const uint32_t opcodes[] = {
	    0x06200010, // SUBTILIS_ARM_SIMD_QADD16
	    0x06200090, // SUBTILIS_ARM_SIMD_QADD8
	    0x06200030, // SUBTILIS_ARM_SIMD_QADDSUBX
	    0x06200070, // SUBTILIS_ARM_SIMD_QSUB16
	    0x062000f0, // SUBTILIS_ARM_SIMD_QSUB8
	    0x06200050, // SUBTILIS_ARM_SIMD_QSUBADDX,
	    0x06100010, // SUBTILIS_ARM_SIMD_SADD16
	    0x06100090, // SUBTILIS_ARM_SIMD_SADD8
	    0x06100030, // SUBTILIS_ARM_SIMD_SADDSUBX,
	    0x06100070, // SUBTILIS_ARM_SIMD_SSUB16
	    0x061000f0, // SUBTILIS_ARM_SIMD_SSUB8,
	    0x06100050, // SUBTILIS_ARM_SIMD_SSUBADDX
	    0x06300010, // SUBTILIS_ARM_SIMD_SHADD16
	    0x06300090, // SUBTILIS_ARM_SIMD_SHADD8
	    0x06300030, // SUBTILIS_ARM_SIMD_SHADDSUBX,
	    0x06300070, // SUBTILIS_ARM_SIMD_SHSUB16,
	    0x063000f0, // SUBTILIS_ARM_SIMD_SHSUB8,
	    0x06300050, // SUBTILIS_ARM_SIMD_SHSUBADDX,
	    0x06500010, // SUBTILIS_ARM_SIMD_UADD16,
	    0x06500090, // SUBTILIS_ARM_SIMD_UADD8,
	    0x06500030, // SUBTILIS_ARM_SIMD_UADDSUBX,
	    0x06500070, // SUBTILIS_ARM_SIMD_USUB16,
	    0x065000f0, // SUBTILIS_ARM_SIMD_USUB8,
	    0x06500050, // SUBTILIS_ARM_SIMD_USUBADDX,
	    0x06700010, // SUBTILIS_ARM_SIMD_UHADD16,
	    0x06700090, // SUBTILIS_ARM_SIMD_UHADD8,
	    0x06700030, // SUBTILIS_ARM_SIMD_UHADDSUBX,
	    0x06700070, // SUBTILIS_ARM_SIMD_UHSUB16,
	    0x067000f0, // SUBTILIS_ARM_SIMD_UHSUB8,
	    0x06700050, // SUBTILIS_ARM_SIMD_UHSUBADDX,
	    0x06600010, // SUBTILIS_ARM_SIMD_UQADD16,
	    0x06600090, // SUBTILIS_ARM_SIMD_UQADD8,
	    0x06600030, // SUBTILIS_ARM_SIMD_UQADDSUBX,
	    0x06600070, // SUBTILIS_ARM_SIMD_UQSUB16,
	    0x066000f0, // SUBTILIS_ARM_SIMD_UQSUB8,
	    0x06600050, // SUBTILIS_ARM_SIMD_UQSUBADDX,
	};
	size_t index = type - SUBTILIS_ARM_SIMD_QADD16;

	if (type > SUBTILIS_ARM_SIMD_UQSUBADDX) {
		subtilis_error_set_assertion_failed(err);
		return;
	}

	prv_check_pool(ud, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;

	word = opcodes[index];
	word |= instr->ccode << 28;
	word |= (instr->dest & 0xf) << 12;
	word |= (instr->op1 & 0xf) << 16;
	word |= (instr->op2 & 0xf);

	prv_ensure_code(ud, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;
	prv_add_word(ud, word, err);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0xe0, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movl %edx, -0x14(%rbp)
movq %rcx, -0x20(%rbp)
movq %r8, -0x28(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x38(%rbp)
leaq -0xd0(%rbp), %rdi
leaq 0x2bc0c(%rip), %rsi     # 0xacda0
movl $0x90, %edx
callq 0x12190
movl -0x14(%rbp), %eax
subl $0x85, %eax
movl %eax, %eax
movq %rax, -0xd8(%rbp)
cmpl $0xa8, -0x14(%rbp)
jbe 0x811d7
movq -0x28(%rbp), %rdi
movl $0xf, %esi
leaq 0x2bc68(%rip), %rdx     # 0xace30
movl $0x8be, %ecx            # imm = 0x8BE
callq 0x158e0
jmp 0x81281
movq -0x38(%rbp), %rdi
movq -0x28(%rbp), %rsi
callq 0x819a0
movq -0x28(%rbp), %rax
cmpl $0x0, (%rax)
je 0x811f2
jmp 0x81281
movq -0xd8(%rbp), %rax
movl -0xd0(%rbp,%rax,4), %eax
movl %eax, -0x2c(%rbp)
movq -0x20(%rbp), %rax
movl (%rax), %eax
shll $0x1c, %eax
orl -0x2c(%rbp), %eax
movl %eax, -0x2c(%rbp)
movq -0x20(%rbp), %rax
movq 0x8(%rax), %rcx
andq $0xf, %rcx
shlq $0xc, %rcx
movl -0x2c(%rbp), %eax
orq %rcx, %rax
movl %eax, -0x2c(%rbp)
movq -0x20(%rbp), %rax
movq 0x10(%rax), %rcx
andq $0xf, %rcx
shlq $0x10, %rcx
movl -0x2c(%rbp), %eax
orq %rcx, %rax
movl %eax, -0x2c(%rbp)
movq -0x20(%rbp), %rax
movq 0x18(%rax), %rcx
andq $0xf, %rcx
movl -0x2c(%rbp), %eax
orq %rcx, %rax
movl %eax, -0x2c(%rbp)
movq -0x38(%rbp), %rdi
movq -0x28(%rbp), %rsi
callq 0x81b90
movq -0x28(%rbp), %rax
cmpl $0x0, (%rax)
je 0x81271
jmp 0x81281
movq -0x38(%rbp), %rdi
movl -0x2c(%rbp), %esi
movq -0x28(%rbp), %rdx
callq 0x81bc0
addq $0xe0, %rsp
popq %rbp
retq
nopw (%rax,%rax)