// File: /workspace/github_c_makefile_star2_O1/deplinenoise[P]vlink/t_elf32ppcbe.c
// Function: ppc32_reloc_vlink2elf
static uint8_t ppc32_reloc_vlink2elf(struct Reloc *r)
/* Try to map vlink-internal representation to a valid ELF reloc type */
{
  lword m32 = 0xffffffff;
  struct RelocInsert *ri;
  uint8_t rt = R_NONE;

  if (ri = r->insert) {
    int pos = (int)ri->bpos;
    int size = (int)ri->bsiz;
    lword mask = ri->mask;
    struct RelocInsert *ri2 = ri->next;
    int f = 0;  /* field type */

    r->offset += (unsigned long)pos >> 3;
    pos &= 7;
    ri->bpos = (uint16_t)pos;

    if (pos==0 && (size==16 || size==32) && mask==-1 && ri2==NULL) {
      f = FSTD;
    }
    else if (pos==6 && size==24 && (mask&0x3ffffff)==0x3fffffc && ri2==NULL) {
      f = FB24;
    }
    else if (pos==0 && size==16 && (mask&m32)==0xffff && ri2==NULL) {
      f = FLO;
    }
    else if (pos==0 && size==16 && (mask&m32)==0xffff0000 && ri2==NULL) {
      f = FHI;
    }
    else if (pos==0 && size==16 && (mask&m32)==0xffff0000 && ri2!=NULL) {
      if (ri2->bpos==0 && ri2->bsiz==16 &&
          (ri2->mask&m32)==0x8000 && ri2->next==NULL)
        f = FHA;
    }
    else if (pos==0 && size==14 && (mask&0xffff)==0xfffc && ri2==NULL) {
      f = FB14;
      r->offset -= 2;
      ri->bpos += 16;
    }
    else if (pos==0 && size==30 && ri2==NULL) {
      f = FW30;
    }
    else
      f = 0;  /* no usable insert-field description found */

    switch (r->rtype) {

      case R_ABS:
        switch (f) {
          case FSTD: rt = size==32 ? R_PPC_ADDR32 : R_PPC_ADDR16; break;
          case FLO: rt = R_PPC_ADDR16_LO; break;
          case FHI: rt = R_PPC_ADDR16_HI; break;
          case FHA: rt = R_PPC_ADDR16_HA; break;
          case FB24: rt = R_PPC_ADDR24; break;
          case FB14: rt = R_PPC_ADDR14; break;
          case FW30: rt = R_PPC_ADDR30; break;
        }
        break;

      case R_PC:
        switch (f) {
          case FSTD:
            if (size == 32) {
              rt = R_PPC_REL32;
            }
            else if ((r->addend & 3) == 0) {
              r->offset -= 2;
              ri->bpos += 16;
              rt = R_PPC_REL14;
            }
            break;
          case FB24: rt = R_PPC_REL24; break;
          case FB14: rt = R_PPC_REL14; break;  /* @@@ BRTAKEN/BRNTAKEN */
        }
        break;

      case R_GOT:
        switch (f) {
          case FSTD:
            if (size == 16)
              rt = R_PPC_GOT16;
            break;
          case FLO: rt = R_PPC_GOT16_LO; break;
          case FHI: rt = R_PPC_GOT16_HI; break;
          case FHA: rt = R_PPC_GOT16_HA; break;
        }
        break;

      case R_PLT:
        switch (f) {
          case FSTD:
            if (size == 32)
              rt = R_PPC_PLT32;
            break;
          case FLO: rt = R_PPC_PLT16_LO; break;
          case FHI: rt = R_PPC_PLT16_HI; break;
          case FHA: rt = R_PPC_PLT16_HA; break;
        }
        break;

      case R_PLTPC:
        switch (f) {
          case FSTD:
            if (size == 32)
              rt = R_PPC_PLTREL32;
            break;
          case FB24: rt = R_PPC_PLTREL24; break;
        }
        break;

      case R_SECOFF:
        switch (f) {
          case FSTD:
            if (size == 16)
              rt = R_PPC_SECTOFF;
            break;
          case FLO: rt = R_PPC_SECTOFF_LO; break;
          case FHI: rt = R_PPC_SECTOFF_HI; break;
          case FHA: rt = R_PPC_SECTOFF_HA; break;
        }
        break;
      
      case R_COPY:
        rt = R_PPC_COPY;
        break;
      
      case R_GLOBDAT:
        rt = R_PPC_GLOB_DAT;
        break;
      
      case R_JMPSLOT:
        rt = R_PPC_JMP_SLOT;
        break;
      
      case R_LOADREL:
        rt = R_PPC_RELATIVE;
        break;
      
      case R_LOCALPC:
        if (f == FB24)
          rt = R_PPC_LOCAL24PC;
        break;

      case R_SD:
        if (f==FSTD && size==16)
          rt = R_PPC_SDAREL16;
        break;

       case R_UABS:
         rt = size==32 ? R_PPC_UADDR32 : R_PPC_UADDR16;
         break;

      /* Embedded and OS-specific relocs */

      case R_SD2:
        if (f==FSTD && size==16)
          rt = R_PPC_EMB_SDA2REL;
        break;

      case R_SD21:
        if (f==FSTD && size==16) {
          r->offset -= 2;
          ri->bpos += 16;
          rt = R_PPC_EMB_SDA21;
        }
        break;

      case R_MOSDREL:
        switch (f) {
          case FSTD:
            if (size == 16)
              rt = R_PPC_MORPHOS_DREL;
            break;
          case FLO: rt = R_PPC_MORPHOS_DREL_LO; break;
          case FHI: rt = R_PPC_MORPHOS_DREL_HI; break;
          case FHA: rt = R_PPC_MORPHOS_DREL_HA; break;
        }
        break;

      case R_AOSBREL:
        switch (f) {
          case FSTD:
            if (size == 16)
              rt = R_PPC_AMIGAOS_BREL;
            break;
          case FLO: rt = R_PPC_AMIGAOS_BREL_LO; break;
          case FHI: rt = R_PPC_AMIGAOS_BREL_HI; break;
          case FHA: rt = R_PPC_AMIGAOS_BREL_HA; break;
        }
        break;
    }
  }

  return (rt);
}

// Assembly:
movq 0x30(%rdi), %rdx
testq %rdx, %rdx
je 0x1a1ae
movzwl 0x8(%rdx), %r8d
movzwl 0xa(%rdx), %ecx
movq 0x10(%rdx), %r9
movl %r8d, %esi
shrl $0x3, %esi
addq 0x20(%rdi), %rsi
movq (%rdx), %rax
movq %rsi, 0x20(%rdi)
andw $0x7, %r8w
movw %r8w, 0x8(%rdx)
jne 0x19eb5
leal -0x10(%rcx), %r10d
testl $0xffef, %r10d          # imm = 0xFFEF
sete %r10b
cmpq $-0x1, %r9
sete %r11b
andb %r10b, %r11b
testq %rax, %rax
sete %r10b
testb %r10b, %r11b
je 0x19eb5
movl $0x1, %esi
movb $0x1, %r9b
jmp 0x19feb
movzwl %r8w, %r10d
xorl $0x6, %r10d
movl %ecx, %r11d
xorl $0x18, %r11d
orw %r10w, %r11w
jne 0x19ef0
movl %r9d, %r10d
andl $0x3ffffff, %r10d       # imm = 0x3FFFFFF
xorq $0x3fffffc, %r10        # imm = 0x3FFFFFC
orq %rax, %r10
jne 0x19ef0
movl $0x5, %esi
movb $0x17, %r8b
xorl %r9d, %r9d
jmp 0x19fee
movl %ecx, %r10d
xorl $0x10, %r10d
orw %r8w, %r10w
jne 0x19f98
movl %r9d, %r10d
movq %r10, %r11
xorq $0xffff, %r11           # imm = 0xFFFF
orq %rax, %r11
jne 0x19f1d
movl $0x2, %esi
jmp 0x19fc8
movl $0xffff0000, %r11d      # imm = 0xFFFF0000
xorq %r10, %r11
orq %rax, %r11
jne 0x19f35
movl $0x3, %esi
jmp 0x19fc8
cmpl $0xffff0000, %r10d      # imm = 0xFFFF0000
sete %r10b
testq %rax, %rax
setne %r11b
andb %r10b, %r11b
cmpb $0x1, %r11b
jne 0x19f98
xorl %r9d, %r9d
cmpw $0x0, 0x8(%rax)
movl $0x0, %r8d
movl $0x0, %esi
jne 0x19fee
xorl %r9d, %r9d
cmpw $0x10, 0xa(%rax)
movl $0x0, %esi
jne 0x19fee
xorl %r9d, %r9d
cmpl $0x8000, 0x10(%rax)     # imm = 0x8000
movl $0x0, %esi
jne 0x19fee
xorl %esi, %esi
cmpq $0x0, (%rax)
sete %sil
shll $0x2, %esi
jmp 0x19fc8
movl %ecx, %r10d
xorl $0xe, %r10d
orw %r8w, %r10w
jne 0x19fcd
movzwl %r9w, %r9d
xorq $0xfffc, %r9            # imm = 0xFFFC
orq %rax, %r9
jne 0x19fcd
addq $-0x2, %rsi
movq %rsi, 0x20(%rdi)
movw $0x10, 0x8(%rdx)
movl $0x6, %esi
xorl %r9d, %r9d
jmp 0x19feb
movl %ecx, %r10d
xorl $0x1e, %r10d
xorl %r9d, %r9d
testq %rax, %rax
movl $0x7, %esi
cmovnel %r9d, %esi
orw %r10w, %r8w
cmovnel %r9d, %esi
xorl %r8d, %r8d
movzbl 0x38(%rdi), %r10d
xorl %eax, %eax
decl %r10d
cmpl $0x22, %r10d
ja 0x1a041
leaq 0x9ae3(%rip), %r11      # 0x23ae8
movslq (%r11,%r10,4), %r10
addq %r11, %r10
jmpq *%r10
movl %esi, %eax
leaq 0x9bac(%rip), %rdx      # 0x23bc4
movslq (%rdx,%rax,4), %rax
addq %rdx, %rax
jmpq *%rax
cmpw $0x20, %cx
setne %al
addb %al, %al
incb %al
retq
xorl %edx, %edx
cmpw $0x10, %cx
movl $0x6c, %eax
cmovnel %edx, %eax
testb %r9b, %r9b
cmovel %edx, %eax
retq
movb $0x13, %al
retq
decl %esi
cmpl $0x3, %esi
ja 0x1a1ae
leaq 0x9b4d(%rip), %rax      # 0x23ba4
movslq (%rax,%rsi,4), %rdx
addq %rax, %rdx
jmpq *%rdx
xorl %edx, %edx
cmpw $0x20, %cx
movl $0x1b, %eax
jmp 0x1a1aa
decl %esi
cmpl $0x3, %esi
ja 0x1a1ae
leaq 0x9b12(%rip), %rax      # 0x23b94
movslq (%rax,%rsi,4), %rdx
addq %rax, %rdx
jmpq *%rdx
xorl %edx, %edx
cmpw $0x10, %cx
movl $0x21, %eax
jmp 0x1a1aa
cmpl $0x6, %esi
je 0x1a0ce
cmpl $0x5, %esi
je 0x1a1b4
cmpl $0x1, %esi
jne 0x1a1ae
movb $0x1a, %al
cmpw $0x20, %cx
je 0x1a041
testb $0x3, 0x28(%rdi)
jne 0x1a1ae
addq $-0x2, 0x20(%rdi)
addw $0x10, 0x8(%rdx)
movb $0xb, %al
retq
cmpl $0x5, %esi
je 0x1a1b1
cmpl $0x1, %esi
jne 0x1a1ae
xorl %edx, %edx
cmpw $0x20, %cx
movl $0x1c, %eax
jmp 0x1a1aa
movb $0x15, %al
retq
movb $0x14, %al
retq
decl %esi
cmpl $0x3, %esi
ja 0x1a1ae
leaq 0x9aa9(%rip), %rax      # 0x23bb4
movslq (%rax,%rsi,4), %rdx
addq %rax, %rdx
jmpq *%rdx
xorl %edx, %edx
cmpw $0x10, %cx
movl $0xe, %eax
jmp 0x1a1aa
cmpw $0x10, %cx
sete %al
andb %al, %r9b
shlb $0x5, %r9b
movl %r9d, %eax
retq
cmpw $0x20, %cx
sete %al
xorb $0x19, %al
retq
cmpw $0x10, %cx
sete %al
andb %al, %r9b
cmpb $0x1, %r9b
jne 0x1a1ae
addq $-0x2, 0x20(%rdi)
addw $0x10, 0x8(%rdx)
movb $0x6d, %al
retq
decl %esi
cmpl $0x3, %esi
ja 0x1a1ae
leaq 0x9a19(%rip), %rax      # 0x23b84
movslq (%rax,%rsi,4), %rdx
addq %rax, %rdx
jmpq *%rdx
xorl %edx, %edx
cmpw $0x10, %cx
movl $0xc8, %eax
jmp 0x1a1aa
movb $0x16, %al
retq
movl %r8d, %eax
retq
decl %esi
cmpl $0x3, %esi
ja 0x1a1ae
leaq 0x99de(%rip), %rax      # 0x23b74
movslq (%rax,%rsi,4), %rdx
addq %rax, %rdx
jmpq *%rdx
xorl %edx, %edx
cmpw $0x10, %cx
movl $0xd2, %eax
cmovnel %edx, %eax
retq
xorl %eax, %eax
retq
movb $0x12, %al
retq
movb $0xa, %al
retq
movb $0x1e, %al
retq
movb $0x23, %al
retq
movb $0x1f, %al
retq
movb $0x24, %al
retq
movb $0x1d, %al
retq
movb $0x22, %al
retq
movb $0x10, %al
retq
movb $0x11, %al
retq
movb $-0x36, %al
retq
movb $0xf, %al
retq
movb $-0x35, %al
retq
movb $-0x37, %al
retq
movb $-0x2c, %al
retq
movb $-0x2b, %al
retq
movb $-0x2d, %al
retq
movb $0x6, %al
retq
movb $0x4, %al
retq
movb $0x5, %al
retq
movb $0x25, %al
retq
movb $0x2, %al
retq
movb $0x7, %al
retq