// File: /workspace/github_c_makefile_star2_O1/mbitsnbites[P]SoftFP/softfloat.c
// Function: roundAndPackFloat128
static float128 roundAndPackFloat128(flag zSign, int32 zExp,
                                     uint64_t zSig0, uint64_t zSig1,
                                     uint64_t zSig2, float_status *status)
{
    int8 roundingMode;
    flag roundNearestEven, increment, isTiny;

    roundingMode = status->float_rounding_mode;
    roundNearestEven = ( roundingMode == float_round_nearest_even );
    switch (roundingMode) {
    case float_round_nearest_even:
    case float_round_ties_away:
        increment = ((int64_t)zSig2 < 0);
        break;
    case float_round_to_zero:
        increment = 0;
        break;
    case float_round_up:
        increment = !zSign && zSig2;
        break;
    case float_round_down:
        increment = zSign && zSig2;
        break;
    default:
        abort();
    }
    if ( 0x7FFD <= (uint32_t) zExp ) {
        if (    ( 0x7FFD < zExp )
             || (    ( zExp == 0x7FFD )
                  && eq128(
                         LIT64( 0x0001FFFFFFFFFFFF ),
                         LIT64( 0xFFFFFFFFFFFFFFFF ),
                         zSig0,
                         zSig1
                     )
                  && increment
                )
           ) {
            float_raise(float_flag_overflow | float_flag_inexact, status);
            if (    ( roundingMode == float_round_to_zero )
                 || ( zSign && ( roundingMode == float_round_up ) )
                 || ( ! zSign && ( roundingMode == float_round_down ) )
               ) {
                return
                    packFloat128(
                        zSign,
                        0x7FFE,
                        LIT64( 0x0000FFFFFFFFFFFF ),
                        LIT64( 0xFFFFFFFFFFFFFFFF )
                    );
            }
            return packFloat128( zSign, 0x7FFF, 0, 0 );
        }
        if ( zExp < 0 ) {
            if (status->flush_to_zero) {
                float_raise(float_flag_output_denormal, status);
                return packFloat128(zSign, 0, 0, 0);
            }
            isTiny =
                   (status->float_detect_tininess
                    == float_tininess_before_rounding)
                || ( zExp < -1 )
                || ! increment
                || lt128(
                       zSig0,
                       zSig1,
                       LIT64( 0x0001FFFFFFFFFFFF ),
                       LIT64( 0xFFFFFFFFFFFFFFFF )
                   );
            shift128ExtraRightJamming(
                zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );
            zExp = 0;
            if (isTiny && zSig2) {
                float_raise(float_flag_underflow, status);
            }
            switch (roundingMode) {
            case float_round_nearest_even:
            case float_round_ties_away:
                increment = ((int64_t)zSig2 < 0);
                break;
            case float_round_to_zero:
                increment = 0;
                break;
            case float_round_up:
                increment = !zSign && zSig2;
                break;
            case float_round_down:
                increment = zSign && zSig2;
                break;
            default:
                abort();
            }
        }
    }
    if (zSig2) {
        status->float_exception_flags |= float_flag_inexact;
    }
    if ( increment ) {
        add128( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );
        zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );
    }
    else {
        if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;
    }
    return packFloat128( zSign, zExp, zSig0, zSig1 );

}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movzbl 0x1(%r9), %r11d
cmpq $0x4, %r11
ja 0x12fd8
movq %rcx, %rax
leaq 0x3b50(%rip), %rcx      # 0x168e8
movslq (%rcx,%r11,4), %r10
addq %rcx, %r10
jmpq *%r10
movq %r8, %r10
shrq $0x3f, %r10
jmp 0x12dc8
xorl %r10d, %r10d
jmp 0x12dc8
testb %dil, %dil
setne %cl
jmp 0x12dbe
testb %dil, %dil
sete %cl
testq %r8, %r8
setne %r10b
andb %cl, %r10b
cmpl $0x7ffd, %esi           # imm = 0x7FFD
jb 0x12e39
jle 0x12e19
movabsq $0x7ffeffffffffffff, %rax # imm = 0x7FFEFFFFFFFFFFFF
orb $0x28, 0x2(%r9)
cmpl $0x3, %r11d
je 0x12e05
testb %dil, %dil
setne %cl
cmpl $0x2, %r11d
sete %dl
testb %dl, %cl
jne 0x12e05
xorb $0x1, %r11b
orb %dil, %r11b
jne 0x12eb8
movzbl %dil, %esi
shlq $0x3f, %rsi
orq %rax, %rsi
movq $-0x1, %rdx
jmp 0x12e92
jne 0x12e35
movabsq $0x1ffffffffffff, %rcx  # imm = 0x1FFFFFFFFFFFF
cmpq %rcx, %rdx
jne 0x12e35
cmpq $-0x1, %rax
jne 0x12e35
testb %r10b, %r10b
jne 0x12dd2
testl %esi, %esi
js 0x12ea0
movq %rdx, %rcx
movq %rax, %rdx
testq %r8, %r8
je 0x12e49
orb $0x20, 0x2(%r9)
testb %r10b, %r10b
je 0x12e75
testl %r11d, %r11d
sete %al
addq $0x1, %rdx
adcq $0x0, %rcx
shlq %r8
testq %r8, %r8
sete %r8b
andb %al, %r8b
movzbl %r8b, %eax
notq %rax
andq %rax, %rdx
jmp 0x12e80
xorl %eax, %eax
movq %rdx, %r8
orq %rcx, %r8
cmovel %eax, %esi
movzbl %dil, %eax
shlq $0x3f, %rax
shlq $0x30, %rsi
addq %rax, %rsi
addq %rcx, %rsi
movq %rdx, %rax
movq %rsi, %rdx
addq $0x8, %rsp
popq %rbx
popq %r14
retq
cmpb $0x0, 0x4(%r9)
je 0x12ecd
orb $-0x80, 0x2(%r9)
movzbl %dil, %esi
shlq $0x3f, %rsi
xorl %edx, %edx
jmp 0x12e92
movzbl %dil, %ecx
shlq $0x3f, %rcx
incq %rax
orq %rcx, %rax
xorl %edx, %edx
movq %rax, %rsi
jmp 0x12e92
movb $0x1, %bl
cmpl $-0x1, %esi
jne 0x12eff
cmpb $0x1, (%r9)
je 0x12eff
testb %r10b, %r10b
je 0x12eff
movabsq $0x1ffffffffffff, %rcx  # imm = 0x1FFFFFFFFFFFF
cmpq %rcx, %rdx
setb %cl
sete %r10b
cmpq $-0x1, %rax
setne %bl
andb %r10b, %bl
orb %cl, %bl
movl %esi, %r10d
negl %r10d
movl %esi, %ecx
andb $0x3f, %cl
cmpl $0x3f, %r10d
ja 0x12f33
movq %rax, %rsi
shlq %cl, %rsi
movq %rdx, %r14
shlq %cl, %r14
movl %r10d, %ecx
shrq %cl, %rax
shrq %cl, %rdx
orq %r14, %rax
movq %rdx, %rcx
movq %rax, %rdx
movq %rsi, %rax
jmp 0x12f64
cmpl $-0x40, %esi
je 0x12f4d
orq %rax, %r8
cmpl $0x7f, %r10d
ja 0x12f51
movq %rdx, %rax
shlq %cl, %rax
movl %r10d, %ecx
shrq %cl, %rdx
xorl %ecx, %ecx
jmp 0x12f64
xorl %eax, %eax
testq %rdx, %rdx
setne %al
cmpl $-0x80, %esi
cmoveq %rdx, %rax
xorl %ecx, %ecx
xorl %edx, %edx
xorl %esi, %esi
testq %r8, %r8
setne %sil
movq %rsi, %r8
orq %rax, %r8
setne %sil
andb %sil, %bl
cmpb $0x1, %bl
jne 0x12f84
orb $0x10, 0x2(%r9)
cmpl $0x4, %r11d
ja 0x12fd8
xorl %esi, %esi
movl %r11d, %r10d
leaq 0x3966(%rip), %rbx      # 0x168fc
movslq (%rbx,%r10,4), %r10
addq %rbx, %r10
jmpq *%r10
shrq $0x3f, %rax
movl %eax, %r10d
jmp 0x12e3f
xorl %r10d, %r10d
jmp 0x12e3f
testq %r8, %r8
setne %al
testb %dil, %dil
setne %r10b
jmp 0x12fd0
testq %r8, %r8
setne %al
testb %dil, %dil
sete %r10b
andb %al, %r10b
jmp 0x12e3f
callq 0x1040