// File: /workspace/github_c_makefile_star2_O0/nh13[P]ksw/src/parasail/src/nw_diag_avx2_256_16.c
// Function: arr_store_rowcol
static inline void arr_store_rowcol(
        int *row,
        int *col,
        __m256i vWH,
        int32_t i,
        int32_t s1Len,
        int32_t j,
        int32_t s2Len)
{
    if (i+0 == s1Len-1 && 0 <= j-0 && j-0 < s2Len) {
        row[j-0] = (int16_t)_mm256_extract_epi16_rpl(vWH, 15);
    }
    if (j-0 == s2Len-1 && 0 <= i+0 && i+0 < s1Len) {
        col[(i+0)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 15);
    }
    if (i+1 == s1Len-1 && 0 <= j-1 && j-1 < s2Len) {
        row[j-1] = (int16_t)_mm256_extract_epi16_rpl(vWH, 14);
    }
    if (j-1 == s2Len-1 && 0 <= i+1 && i+1 < s1Len) {
        col[(i+1)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 14);
    }
    if (i+2 == s1Len-1 && 0 <= j-2 && j-2 < s2Len) {
        row[j-2] = (int16_t)_mm256_extract_epi16_rpl(vWH, 13);
    }
    if (j-2 == s2Len-1 && 0 <= i+2 && i+2 < s1Len) {
        col[(i+2)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 13);
    }
    if (i+3 == s1Len-1 && 0 <= j-3 && j-3 < s2Len) {
        row[j-3] = (int16_t)_mm256_extract_epi16_rpl(vWH, 12);
    }
    if (j-3 == s2Len-1 && 0 <= i+3 && i+3 < s1Len) {
        col[(i+3)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 12);
    }
    if (i+4 == s1Len-1 && 0 <= j-4 && j-4 < s2Len) {
        row[j-4] = (int16_t)_mm256_extract_epi16_rpl(vWH, 11);
    }
    if (j-4 == s2Len-1 && 0 <= i+4 && i+4 < s1Len) {
        col[(i+4)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 11);
    }
    if (i+5 == s1Len-1 && 0 <= j-5 && j-5 < s2Len) {
        row[j-5] = (int16_t)_mm256_extract_epi16_rpl(vWH, 10);
    }
    if (j-5 == s2Len-1 && 0 <= i+5 && i+5 < s1Len) {
        col[(i+5)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 10);
    }
    if (i+6 == s1Len-1 && 0 <= j-6 && j-6 < s2Len) {
        row[j-6] = (int16_t)_mm256_extract_epi16_rpl(vWH, 9);
    }
    if (j-6 == s2Len-1 && 0 <= i+6 && i+6 < s1Len) {
        col[(i+6)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 9);
    }
    if (i+7 == s1Len-1 && 0 <= j-7 && j-7 < s2Len) {
        row[j-7] = (int16_t)_mm256_extract_epi16_rpl(vWH, 8);
    }
    if (j-7 == s2Len-1 && 0 <= i+7 && i+7 < s1Len) {
        col[(i+7)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 8);
    }
    if (i+8 == s1Len-1 && 0 <= j-8 && j-8 < s2Len) {
        row[j-8] = (int16_t)_mm256_extract_epi16_rpl(vWH, 7);
    }
    if (j-8 == s2Len-1 && 0 <= i+8 && i+8 < s1Len) {
        col[(i+8)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 7);
    }
    if (i+9 == s1Len-1 && 0 <= j-9 && j-9 < s2Len) {
        row[j-9] = (int16_t)_mm256_extract_epi16_rpl(vWH, 6);
    }
    if (j-9 == s2Len-1 && 0 <= i+9 && i+9 < s1Len) {
        col[(i+9)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 6);
    }
    if (i+10 == s1Len-1 && 0 <= j-10 && j-10 < s2Len) {
        row[j-10] = (int16_t)_mm256_extract_epi16_rpl(vWH, 5);
    }
    if (j-10 == s2Len-1 && 0 <= i+10 && i+10 < s1Len) {
        col[(i+10)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 5);
    }
    if (i+11 == s1Len-1 && 0 <= j-11 && j-11 < s2Len) {
        row[j-11] = (int16_t)_mm256_extract_epi16_rpl(vWH, 4);
    }
    if (j-11 == s2Len-1 && 0 <= i+11 && i+11 < s1Len) {
        col[(i+11)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 4);
    }
    if (i+12 == s1Len-1 && 0 <= j-12 && j-12 < s2Len) {
        row[j-12] = (int16_t)_mm256_extract_epi16_rpl(vWH, 3);
    }
    if (j-12 == s2Len-1 && 0 <= i+12 && i+12 < s1Len) {
        col[(i+12)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 3);
    }
    if (i+13 == s1Len-1 && 0 <= j-13 && j-13 < s2Len) {
        row[j-13] = (int16_t)_mm256_extract_epi16_rpl(vWH, 2);
    }
    if (j-13 == s2Len-1 && 0 <= i+13 && i+13 < s1Len) {
        col[(i+13)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 2);
    }
    if (i+14 == s1Len-1 && 0 <= j-14 && j-14 < s2Len) {
        row[j-14] = (int16_t)_mm256_extract_epi16_rpl(vWH, 1);
    }
    if (j-14 == s2Len-1 && 0 <= i+14 && i+14 < s1Len) {
        col[(i+14)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 1);
    }
    if (i+15 == s1Len-1 && 0 <= j-15 && j-15 < s2Len) {
        row[j-15] = (int16_t)_mm256_extract_epi16_rpl(vWH, 0);
    }
    if (j-15 == s2Len-1 && 0 <= i+15 && i+15 < s1Len) {
        col[(i+15)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 0);
    }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x60, %rsp
movq %rdi, 0x48(%rsp)
movq %rsi, 0x40(%rsp)
vmovdqa %ymm0, 0x20(%rsp)
movl %edx, 0x1c(%rsp)
movl %ecx, 0x18(%rsp)
movl %r8d, 0x14(%rsp)
movl %r9d, 0x10(%rsp)
movl 0x1c(%rsp), %eax
addl $0x0, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf777d
movl 0x14(%rsp), %ecx
subl $0x0, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf777d
movl 0x14(%rsp), %eax
subl $0x0, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf777d
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x7, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0x0, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0x0, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf77cc
movl 0x1c(%rsp), %ecx
addl $0x0, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf77cc
movl 0x1c(%rsp), %eax
addl $0x0, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf77cc
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x7, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x0, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0x1, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf781b
movl 0x14(%rsp), %ecx
subl $0x1, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf781b
movl 0x14(%rsp), %eax
subl $0x1, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf781b
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x6, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0x1, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0x1, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf786a
movl 0x1c(%rsp), %ecx
addl $0x1, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf786a
movl 0x1c(%rsp), %eax
addl $0x1, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf786a
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x6, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x1, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0x2, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf78b9
movl 0x14(%rsp), %ecx
subl $0x2, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf78b9
movl 0x14(%rsp), %eax
subl $0x2, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf78b9
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x5, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0x2, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0x2, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7908
movl 0x1c(%rsp), %ecx
addl $0x2, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7908
movl 0x1c(%rsp), %eax
addl $0x2, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf7908
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x5, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x2, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0x3, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7957
movl 0x14(%rsp), %ecx
subl $0x3, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7957
movl 0x14(%rsp), %eax
subl $0x3, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf7957
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x4, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0x3, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0x3, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf79a6
movl 0x1c(%rsp), %ecx
addl $0x3, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf79a6
movl 0x1c(%rsp), %eax
addl $0x3, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf79a6
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x4, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x3, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0x4, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf79f5
movl 0x14(%rsp), %ecx
subl $0x4, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf79f5
movl 0x14(%rsp), %eax
subl $0x4, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf79f5
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x3, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0x4, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0x4, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7a44
movl 0x1c(%rsp), %ecx
addl $0x4, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7a44
movl 0x1c(%rsp), %eax
addl $0x4, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf7a44
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x3, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x4, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0x5, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7a93
movl 0x14(%rsp), %ecx
subl $0x5, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7a93
movl 0x14(%rsp), %eax
subl $0x5, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf7a93
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x2, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0x5, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0x5, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7ae2
movl 0x1c(%rsp), %ecx
addl $0x5, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7ae2
movl 0x1c(%rsp), %eax
addl $0x5, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf7ae2
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x2, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x5, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0x6, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7b31
movl 0x14(%rsp), %ecx
subl $0x6, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7b31
movl 0x14(%rsp), %eax
subl $0x6, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf7b31
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x1, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0x6, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0x6, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7b80
movl 0x1c(%rsp), %ecx
addl $0x6, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7b80
movl 0x1c(%rsp), %eax
addl $0x6, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf7b80
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x1, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x6, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0x7, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7bc8
movl 0x14(%rsp), %ecx
subl $0x7, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7bc8
movl 0x14(%rsp), %eax
subl $0x7, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf7bc8
movl 0x30(%rsp), %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0x7, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0x7, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7c10
movl 0x1c(%rsp), %ecx
addl $0x7, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7c10
movl 0x1c(%rsp), %eax
addl $0x7, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf7c10
movl 0x30(%rsp), %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x7, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0x8, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7c5f
movl 0x14(%rsp), %ecx
subl $0x8, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7c5f
movl 0x14(%rsp), %eax
subl $0x8, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf7c5f
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x7, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0x8, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0x8, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7cae
movl 0x1c(%rsp), %ecx
addl $0x8, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7cae
movl 0x1c(%rsp), %eax
addl $0x8, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf7cae
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x7, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x8, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0x9, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7cfd
movl 0x14(%rsp), %ecx
subl $0x9, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7cfd
movl 0x14(%rsp), %eax
subl $0x9, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf7cfd
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x6, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0x9, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0x9, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7d4c
movl 0x1c(%rsp), %ecx
addl $0x9, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7d4c
movl 0x1c(%rsp), %eax
addl $0x9, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf7d4c
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x6, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x9, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0xa, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7d9b
movl 0x14(%rsp), %ecx
subl $0xa, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7d9b
movl 0x14(%rsp), %eax
subl $0xa, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf7d9b
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x5, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0xa, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0xa, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7dea
movl 0x1c(%rsp), %ecx
addl $0xa, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7dea
movl 0x1c(%rsp), %eax
addl $0xa, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf7dea
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x5, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0xa, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0xb, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7e39
movl 0x14(%rsp), %ecx
subl $0xb, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7e39
movl 0x14(%rsp), %eax
subl $0xb, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf7e39
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x4, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0xb, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0xb, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7e88
movl 0x1c(%rsp), %ecx
addl $0xb, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7e88
movl 0x1c(%rsp), %eax
addl $0xb, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf7e88
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x4, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0xb, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0xc, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7ed7
movl 0x14(%rsp), %ecx
subl $0xc, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7ed7
movl 0x14(%rsp), %eax
subl $0xc, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf7ed7
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x3, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0xc, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0xc, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7f26
movl 0x1c(%rsp), %ecx
addl $0xc, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7f26
movl 0x1c(%rsp), %eax
addl $0xc, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf7f26
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x3, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0xc, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0xd, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7f75
movl 0x14(%rsp), %ecx
subl $0xd, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7f75
movl 0x14(%rsp), %eax
subl $0xd, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf7f75
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x2, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0xd, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0xd, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf7fc4
movl 0x1c(%rsp), %ecx
addl $0xd, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf7fc4
movl 0x1c(%rsp), %eax
addl $0xd, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf7fc4
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x2, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0xd, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0xe, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf8013
movl 0x14(%rsp), %ecx
subl $0xe, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf8013
movl 0x14(%rsp), %eax
subl $0xe, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf8013
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x1, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0xe, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0xe, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf8062
movl 0x1c(%rsp), %ecx
addl $0xe, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf8062
movl 0x1c(%rsp), %eax
addl $0xe, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf8062
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x1, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0xe, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %eax
addl $0xf, %eax
movl 0x18(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf80aa
movl 0x14(%rsp), %ecx
subl $0xf, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf80aa
movl 0x14(%rsp), %eax
subl $0xf, %eax
cmpl 0x10(%rsp), %eax
jge 0xaf80aa
movl 0x20(%rsp), %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x14(%rsp), %ecx
subl $0xf, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x14(%rsp), %eax
subl $0xf, %eax
movl 0x10(%rsp), %ecx
subl $0x1, %ecx
cmpl %ecx, %eax
jne 0xaf80f2
movl 0x1c(%rsp), %ecx
addl $0xf, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0xaf80f2
movl 0x1c(%rsp), %eax
addl $0xf, %eax
cmpl 0x18(%rsp), %eax
jge 0xaf80f2
movl 0x20(%rsp), %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x40(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0xf, %ecx
movslq %ecx, %rcx
movl %edx, (%rax,%rcx,4)
movq %rbp, %rsp
popq %rbp
vzeroupper
retq
nopw (%rax,%rax)