// File: /workspace/github_cpp_makefile_star2_O3/luooofan[P]hblzbd_compiler/src/Pass/generate_arm_from_ssa.cpp
// Function: GenerateArmFromSSA::ConvertDiv2Shift(ArmBasicBlock*, arm::Reg*, Value*, int)
bool GenerateArmFromSSA::ConvertDiv2Shift(ArmBasicBlock* armbb, Reg* rd, Value* val, int imm) {
  // 如果除数是0 应该生成报错
  if (0 == imm) {
    MyAssert(0);
  }
  auto eval_n = [](int imm) {
    int n = 0;
    while (imm > 1) {
      imm >>= 1;
      ++n;
    }
    return n;
  };
  auto cal = [](int b) {
    if (b < 0) b = -b;
    long long k = std::log2(b);
    long long m = (1.0 * (1ll << (k + 32)) / b + 1);
    return std::make_pair(k, m);
  };
  // 如果除数是2的幂次方 生成一条mov rd rm A(L)SR n的指令 允许1-32位
  // FIXME: 这样做并不适用于被除数是负数的情况
  // if (0 == (imm & (imm - 1))) {
  //   std::cout << "Warning Div" << std::endl;
  //   auto op2 = new Operand2(ResolveValue2Reg(armbb, val), new Shift(Shift::OpCode::ASR, eval_n(imm)));
  //   new Move(rd, op2, armbb);
  //   return true;
  // }
  // 考虑负数情况
  if (0 == (imm & (imm - 1))) {
    // 1. asr vreg, rn, #31;  i.e. mov vreg, rn, ASR #31;
    auto vreg = NewVirtualReg();
    auto rn = ResolveValue2Reg(armbb, val);
    new Move(vreg, new Operand2(rn, new Shift(Shift::OpCode::ASR, 31)), armbb);
    // 2. add vreg2, rn, vreg, lsr #(32-n);
    auto vreg2 = NewVirtualReg();
    auto n = eval_n(imm);
    auto op2 = new Operand2(vreg, new Shift(Shift::OpCode::LSR, 32 - n));
    new BinaryInst(BinaryInst::OpCode::ADD, vreg2, rn, op2, armbb);
    // 3. asr rd, vreg2, #n;  i.e. mov rd, vreg2, ASR #n;
    new Move(rd, new Operand2(vreg2, new Shift(Shift::OpCode::ASR, n)), armbb);
    return true;
  }
  // 除其他常数优化
  // a/b的情况下，b为常数
  // (sub t0 0 a)   // b<0则有，b>0则无
  // smmul t1 t0/a m // t0和a看有无上一句
  // mov t2 t1 asr k
  // add t2 t2 t1 lsr 31
  else {
    return false;
    auto [k, m] = cal(imm);
    std::cout << "除常数优化" << imm << " " << k << " " << m << std::endl;
    if (imm == 30) {
      k = 4;
      m = 2290649225;
    } else if (imm == 998244353) {
      k = 26;
      m = 288737297;
    } else {
      return false;
    }
    Reg* vreg0;
    if (imm < 0) {
      vreg0 = NewVirtualReg();
      new BinaryInst(BinaryInst::OpCode::RSB, vreg0, ResolveValue2Reg(armbb, val), new Operand2(0), armbb);
    } else {
      vreg0 = ResolveValue2Reg(armbb, val);
    }
    auto vreg1 = NewVirtualReg();
    new BinaryInst(BinaryInst::OpCode::SMMUL, vreg1, vreg0, ResolveImm2Operand2(armbb, m), armbb);
    auto vreg3 = NewVirtualReg();
    if (imm == 30) {
      new BinaryInst(BinaryInst::OpCode::ADD, vreg3, vreg0, new Operand2(vreg1), armbb);
    }
    auto vreg2 = NewVirtualReg();
    if (imm == 30) {
      new Move(vreg2, new Operand2(vreg3, new Shift(Shift::OpCode::ASR, k)), armbb);
    } else {
      new Move(vreg2, new Operand2(vreg1, new Shift(Shift::OpCode::ASR, k)), armbb);
    }
    new BinaryInst(BinaryInst::OpCode::ADD, rd, vreg2, new Operand2(vreg1, new Shift(Shift::OpCode::LSR, 31)), armbb);
    return true;
  }
  return false;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movq %rsi, (%rsp)
testl %r8d, %r8d
je 0x4cfde
movl %r8d, %ebp
movq %rcx, %r15
movl %r8d, %eax
shrl %eax
andl $0x55555555, %eax       # imm = 0x55555555
movl %r8d, %ecx
subl %eax, %ecx
movl $0x33333333, %eax       # imm = 0x33333333
movl %ecx, %esi
andl %eax, %esi
shrl $0x2, %ecx
andl %eax, %ecx
addl %esi, %ecx
movl %ecx, %eax
shrl $0x4, %eax
addl %ecx, %eax
andl $0xf0f0f0f, %eax        # imm = 0xF0F0F0F
imull $0x1010101, %eax, %eax  # imm = 0x1010101
shrl $0x18, %eax
movl %eax, 0xc(%rsp)
cmpl $0x1, %eax
ja 0x4cfc7
movq %rdi, %rbx
movq %rdx, 0x20(%rsp)
movl $0x40, %edi
callq 0x8290
movq %rax, %r12
movl 0x50(%rbx), %eax
leal 0x1(%rax), %ecx
movl %ecx, 0x50(%rbx)
leaq 0x30(%r12), %rcx
movq %rcx, (%r12)
movq $0x1, 0x8(%r12)
xorps %xmm0, %xmm0
movups %xmm0, 0x10(%r12)
movl $0x3f800000, 0x20(%r12) # imm = 0x3F800000
movups %xmm0, 0x28(%r12)
movl %eax, 0x38(%r12)
movq %rbx, %rdi
movq (%rsp), %rsi
movq %r15, %rdx
callq 0x4ca18
movq %rax, %r14
movl $0x28, %edi
callq 0x8290
movq %rax, %r13
movl $0x18, %edi
callq 0x8290
movq %rax, %r15
movl $0x18, %edi
callq 0x8290
xorl %ecx, %ecx
movl %ecx, (%rax)
movb $0x1, 0x4(%rax)
movl $0x1f, 0x8(%rax)
movq $0x0, 0x10(%rax)
movb $0x0, (%r15)
movl %ecx, 0x4(%r15)
movq %r14, 0x8(%r15)
movq %rax, 0x10(%r15)
movq %r13, %rdi
movq (%rsp), %rsi
movl $0x1, %edx
callq 0xa41e
leaq 0x406be(%rip), %rax     # 0x8d4f0
leaq 0x10(%rax), %rcx
movq %rcx, 0x10(%rsp)
movq %rcx, (%r13)
movw $0x0, 0x14(%r13)
movq %r12, 0x18(%r13)
movq %r15, 0x20(%r13)
movq 0x28(%rax), %r15
movq %r13, %rdi
callq *%r15
movq %r14, 0x18(%rsp)
movl $0x40, %edi
callq 0x8290
movq %rax, %r13
movl 0x50(%rbx), %eax
leal 0x1(%rax), %ecx
movl %ecx, 0x50(%rbx)
leaq 0x30(%r13), %rcx
movq %rcx, (%r13)
movq $0x1, 0x8(%r13)
xorps %xmm0, %xmm0
movups %xmm0, 0x10(%r13)
movl $0x3f800000, 0x20(%r13) # imm = 0x3F800000
movups %xmm0, 0x28(%r13)
movl %eax, 0x38(%r13)
xorl %r14d, %r14d
cmpl $0x2, %ebp
jl 0x4ceb5
xorl %r14d, %r14d
movl %ebp, %eax
shrl %eax
incl %r14d
cmpl $0x3, %ebp
movl %eax, %ebp
ja 0x4cea9
movq %r15, %rbp
movl $0x18, %edi
callq 0x8290
movq %rax, %rbx
movl $0x18, %edi
callq 0x8290
movl $0x20, %ecx
subl %r14d, %ecx
movl $0x2, (%rax)
movb $0x1, 0x4(%rax)
movl %ecx, 0x8(%rax)
movq $0x0, 0x10(%rax)
movb $0x0, (%rbx)
movl $0x0, 0x4(%rbx)
movq %r12, 0x8(%rbx)
movq %rax, 0x10(%rbx)
movl $0x38, %edi
callq 0x8290
movq %rax, %r15
movq %rax, %rdi
movq (%rsp), %rsi
movl $0x1, %edx
callq 0xa41e
leaq 0x4056d(%rip), %rax     # 0x8d490
leaq 0x10(%rax), %rcx
movq %rcx, (%r15)
movl $0x0, 0x14(%r15)
movb $0x0, 0x18(%r15)
movq %r13, 0x20(%r15)
movq 0x18(%rsp), %rcx
movq %rcx, 0x28(%r15)
movq %rbx, 0x30(%r15)
movq %r15, %rdi
callq *0x28(%rax)
movl $0x28, %edi
callq 0x8290
movq %rax, %rbx
movl $0x18, %edi
callq 0x8290
movq 0x20(%rsp), %r12
movq %rax, %r15
movl $0x18, %edi
callq 0x8290
xorl %ecx, %ecx
movl %ecx, (%rax)
movb $0x1, 0x4(%rax)
movl %r14d, 0x8(%rax)
movq $0x0, 0x10(%rax)
movb $0x0, (%r15)
movl %ecx, 0x4(%r15)
movq %r13, 0x8(%r15)
movq %rax, 0x10(%r15)
movq %rbx, %rdi
movq (%rsp), %rsi
movl $0x1, %edx
callq 0xa41e
movq 0x10(%rsp), %rax
movq %rax, (%rbx)
movw $0x0, 0x14(%rbx)
movq %r12, 0x18(%rbx)
movq %r15, 0x20(%rbx)
movq %rbx, %rdi
callq *%rbp
cmpl $0x2, 0xc(%rsp)
setb %al
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x42003(%rip), %rdi     # 0x8efe8
leaq 0x2117c(%rip), %rsi     # 0x6e168
callq 0x8280
leaq 0x2489c(%rip), %rsi     # 0x71894
movq %rax, %rdi
callq 0x8280
leaq 0x223b9(%rip), %rsi     # 0x6f3c0
movq %rax, %rdi
callq 0x8280
movq %rax, %rdi
movl $0xa0, %esi
callq 0x8520
movq %rax, %rdi
callq 0x8180
movl $0xff, %edi
callq 0x8380
movq %rax, %r14
movl $0x18, %esi
movq %r15, %rdi
callq 0x82a0
jmp 0x4d06c
movq %rax, %r14
movl $0x18, %esi
jmp 0x4d071
movq %rax, %r14
movl $0x18, %esi
movq %r15, %rdi
callq 0x82a0
jmp 0x4d079
movq %rax, %r14
movl $0x38, %esi
movq %r15, %rdi
jmp 0x4d081
movq %rax, %r14
movl $0x28, %esi
movq %rbx, %rdi
jmp 0x4d081
movq %rax, %r14
movl $0x28, %esi
movq %r13, %rdi
callq 0x82a0
movq %r14, %rdi
callq 0x8540