// File: /workspace/github_c_makefile_star2_O2/nh13[P]ksw/src/parasail/src/nw_stats_diag_sse2_128_8.c
// Function: arr_store_rowcol
static inline void arr_store_rowcol(
        int *row,
        int *col,
        __m128i vWH,
        int32_t i,
        int32_t s1Len,
        int32_t j,
        int32_t s2Len)
{
    if (i+0 == s1Len-1 && 0 <= j-0 && j-0 < s2Len) {
        row[j-0] = (int8_t)_mm_extract_epi8_rpl(vWH, 15);
    }
    if (j-0 == s2Len-1 && 0 <= i+0 && i+0 < s1Len) {
        col[(i+0)] = (int8_t)_mm_extract_epi8_rpl(vWH, 15);
    }
    if (i+1 == s1Len-1 && 0 <= j-1 && j-1 < s2Len) {
        row[j-1] = (int8_t)_mm_extract_epi8_rpl(vWH, 14);
    }
    if (j-1 == s2Len-1 && 0 <= i+1 && i+1 < s1Len) {
        col[(i+1)] = (int8_t)_mm_extract_epi8_rpl(vWH, 14);
    }
    if (i+2 == s1Len-1 && 0 <= j-2 && j-2 < s2Len) {
        row[j-2] = (int8_t)_mm_extract_epi8_rpl(vWH, 13);
    }
    if (j-2 == s2Len-1 && 0 <= i+2 && i+2 < s1Len) {
        col[(i+2)] = (int8_t)_mm_extract_epi8_rpl(vWH, 13);
    }
    if (i+3 == s1Len-1 && 0 <= j-3 && j-3 < s2Len) {
        row[j-3] = (int8_t)_mm_extract_epi8_rpl(vWH, 12);
    }
    if (j-3 == s2Len-1 && 0 <= i+3 && i+3 < s1Len) {
        col[(i+3)] = (int8_t)_mm_extract_epi8_rpl(vWH, 12);
    }
    if (i+4 == s1Len-1 && 0 <= j-4 && j-4 < s2Len) {
        row[j-4] = (int8_t)_mm_extract_epi8_rpl(vWH, 11);
    }
    if (j-4 == s2Len-1 && 0 <= i+4 && i+4 < s1Len) {
        col[(i+4)] = (int8_t)_mm_extract_epi8_rpl(vWH, 11);
    }
    if (i+5 == s1Len-1 && 0 <= j-5 && j-5 < s2Len) {
        row[j-5] = (int8_t)_mm_extract_epi8_rpl(vWH, 10);
    }
    if (j-5 == s2Len-1 && 0 <= i+5 && i+5 < s1Len) {
        col[(i+5)] = (int8_t)_mm_extract_epi8_rpl(vWH, 10);
    }
    if (i+6 == s1Len-1 && 0 <= j-6 && j-6 < s2Len) {
        row[j-6] = (int8_t)_mm_extract_epi8_rpl(vWH, 9);
    }
    if (j-6 == s2Len-1 && 0 <= i+6 && i+6 < s1Len) {
        col[(i+6)] = (int8_t)_mm_extract_epi8_rpl(vWH, 9);
    }
    if (i+7 == s1Len-1 && 0 <= j-7 && j-7 < s2Len) {
        row[j-7] = (int8_t)_mm_extract_epi8_rpl(vWH, 8);
    }
    if (j-7 == s2Len-1 && 0 <= i+7 && i+7 < s1Len) {
        col[(i+7)] = (int8_t)_mm_extract_epi8_rpl(vWH, 8);
    }
    if (i+8 == s1Len-1 && 0 <= j-8 && j-8 < s2Len) {
        row[j-8] = (int8_t)_mm_extract_epi8_rpl(vWH, 7);
    }
    if (j-8 == s2Len-1 && 0 <= i+8 && i+8 < s1Len) {
        col[(i+8)] = (int8_t)_mm_extract_epi8_rpl(vWH, 7);
    }
    if (i+9 == s1Len-1 && 0 <= j-9 && j-9 < s2Len) {
        row[j-9] = (int8_t)_mm_extract_epi8_rpl(vWH, 6);
    }
    if (j-9 == s2Len-1 && 0 <= i+9 && i+9 < s1Len) {
        col[(i+9)] = (int8_t)_mm_extract_epi8_rpl(vWH, 6);
    }
    if (i+10 == s1Len-1 && 0 <= j-10 && j-10 < s2Len) {
        row[j-10] = (int8_t)_mm_extract_epi8_rpl(vWH, 5);
    }
    if (j-10 == s2Len-1 && 0 <= i+10 && i+10 < s1Len) {
        col[(i+10)] = (int8_t)_mm_extract_epi8_rpl(vWH, 5);
    }
    if (i+11 == s1Len-1 && 0 <= j-11 && j-11 < s2Len) {
        row[j-11] = (int8_t)_mm_extract_epi8_rpl(vWH, 4);
    }
    if (j-11 == s2Len-1 && 0 <= i+11 && i+11 < s1Len) {
        col[(i+11)] = (int8_t)_mm_extract_epi8_rpl(vWH, 4);
    }
    if (i+12 == s1Len-1 && 0 <= j-12 && j-12 < s2Len) {
        row[j-12] = (int8_t)_mm_extract_epi8_rpl(vWH, 3);
    }
    if (j-12 == s2Len-1 && 0 <= i+12 && i+12 < s1Len) {
        col[(i+12)] = (int8_t)_mm_extract_epi8_rpl(vWH, 3);
    }
    if (i+13 == s1Len-1 && 0 <= j-13 && j-13 < s2Len) {
        row[j-13] = (int8_t)_mm_extract_epi8_rpl(vWH, 2);
    }
    if (j-13 == s2Len-1 && 0 <= i+13 && i+13 < s1Len) {
        col[(i+13)] = (int8_t)_mm_extract_epi8_rpl(vWH, 2);
    }
    if (i+14 == s1Len-1 && 0 <= j-14 && j-14 < s2Len) {
        row[j-14] = (int8_t)_mm_extract_epi8_rpl(vWH, 1);
    }
    if (j-14 == s2Len-1 && 0 <= i+14 && i+14 < s1Len) {
        col[(i+14)] = (int8_t)_mm_extract_epi8_rpl(vWH, 1);
    }
    if (i+15 == s1Len-1 && 0 <= j-15 && j-15 < s2Len) {
        row[j-15] = (int8_t)_mm_extract_epi8_rpl(vWH, 0);
    }
    if (j-15 == s2Len-1 && 0 <= i+15 && i+15 < s1Len) {
        col[(i+15)] = (int8_t)_mm_extract_epi8_rpl(vWH, 0);
    }
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
leal -0x1(%rcx), %eax
cmpl %edx, %eax
setne %r10b
testl %r8d, %r8d
sets %r11b
cmpl %r9d, %r8d
setge %bl
orb %r11b, %bl
orb %r10b, %bl
pextrw $0x7, %xmm0, %r10d
movl %r8d, %r11d
jne 0x32affe
movl %r10d, %ebx
shrl $0x8, %ebx
movsbl %bl, %ebx
movl %ebx, (%rdi,%r11,4)
cmpl %ecx, %edx
jge 0x32b01f
testl %edx, %edx
js 0x32b01f
leal -0x1(%r9), %ebx
cmpl %r8d, %ebx
jne 0x32b01f
movl %r10d, %ebx
shrl $0x8, %ebx
movsbl %bl, %ebx
movl %edx, %r14d
movl %ebx, (%rsi,%r14,4)
leal 0x1(%rdx), %ebx
cmpl %eax, %ebx
setne %bpl
testl %r8d, %r8d
setle %r14b
cmpl %r9d, %r8d
setg %r15b
orb %r14b, %r15b
orb %bpl, %r15b
jne 0x32b047
movsbl %r10b, %ebp
movl %ebp, -0x4(%rdi,%r11,4)
cmpl %ecx, %ebx
jge 0x32b060
cmpl $-0x1, %edx
jl 0x32b060
cmpl %r9d, %r8d
jne 0x32b060
movsbl %r10b, %r10d
movl %ebx, %r11d
movl %r10d, (%rsi,%r11,4)
leal 0x2(%rdx), %r11d
pextrw $0x6, %xmm0, %r10d
cmpl %eax, %r11d
jne 0x32b09a
leal -0x2(%r8), %ebx
cmpl $0x2, %r8d
setge %bpl
cmpl %r9d, %ebx
setl %r14b
andb %bpl, %r14b
cmpb $0x1, %r14b
jne 0x32b09a
movl %r10d, %ebp
shrl $0x8, %ebp
movsbl %bpl, %ebp
movl %ebx, %ebx
movl %ebp, (%rdi,%rbx,4)
cmpl %ecx, %r11d
jge 0x32b0bd
cmpl $-0x2, %edx
jl 0x32b0bd
leal -0x1(%r8), %ebx
cmpl %r9d, %ebx
jne 0x32b0bd
movl %r10d, %ebx
shrl $0x8, %ebx
movsbl %bl, %ebx
movl %r11d, %r11d
movl %ebx, (%rsi,%r11,4)
leal 0x3(%rdx), %r11d
cmpl %eax, %r11d
jne 0x32b0eb
leal -0x3(%r8), %ebx
cmpl $0x3, %r8d
setge %bpl
cmpl %r9d, %ebx
setl %r14b
andb %bpl, %r14b
cmpb $0x1, %r14b
jne 0x32b0eb
movsbl %r10b, %ebp
movl %ebx, %ebx
movl %ebp, (%rdi,%rbx,4)
cmpl %ecx, %r11d
jge 0x32b109
cmpl $-0x3, %edx
jl 0x32b109
leal -0x2(%r8), %ebx
cmpl %r9d, %ebx
jne 0x32b109
movsbl %r10b, %r10d
movl %r11d, %r11d
movl %r10d, (%rsi,%r11,4)
leal 0x4(%rdx), %r11d
pextrw $0x5, %xmm0, %r10d
cmpl %eax, %r11d
jne 0x32b143
leal -0x4(%r8), %ebx
cmpl $0x4, %r8d
setge %bpl
cmpl %r9d, %ebx
setl %r14b
andb %bpl, %r14b
cmpb $0x1, %r14b
jne 0x32b143
movl %r10d, %ebp
shrl $0x8, %ebp
movsbl %bpl, %ebp
movl %ebx, %ebx
movl %ebp, (%rdi,%rbx,4)
cmpl %ecx, %r11d
jge 0x32b166
cmpl $-0x4, %edx
jl 0x32b166
leal -0x3(%r8), %ebx
cmpl %r9d, %ebx
jne 0x32b166
movl %r10d, %ebx
shrl $0x8, %ebx
movsbl %bl, %ebx
movl %r11d, %r11d
movl %ebx, (%rsi,%r11,4)
leal 0x5(%rdx), %r11d
cmpl %eax, %r11d
jne 0x32b194
leal -0x5(%r8), %ebx
cmpl $0x5, %r8d
setge %bpl
cmpl %r9d, %ebx
setl %r14b
andb %bpl, %r14b
cmpb $0x1, %r14b
jne 0x32b194
movsbl %r10b, %ebp
movl %ebx, %ebx
movl %ebp, (%rdi,%rbx,4)
cmpl %ecx, %r11d
jge 0x32b1b2
cmpl $-0x5, %edx
jl 0x32b1b2
leal -0x4(%r8), %ebx
cmpl %r9d, %ebx
jne 0x32b1b2
movsbl %r10b, %r10d
movl %r11d, %r11d
movl %r10d, (%rsi,%r11,4)
leal 0x6(%rdx), %r11d
pextrw $0x4, %xmm0, %r10d
cmpl %eax, %r11d
jne 0x32b1ec
leal -0x6(%r8), %ebx
cmpl $0x6, %r8d
setge %bpl
cmpl %r9d, %ebx
setl %r14b
andb %bpl, %r14b
cmpb $0x1, %r14b
jne 0x32b1ec
movl %r10d, %ebp
shrl $0x8, %ebp
movsbl %bpl, %ebp
movl %ebx, %ebx
movl %ebp, (%rdi,%rbx,4)
cmpl %ecx, %r11d
jge 0x32b20f
cmpl $-0x6, %edx
jl 0x32b20f
leal -0x5(%r8), %ebx
cmpl %r9d, %ebx
jne 0x32b20f
movl %r10d, %ebx
shrl $0x8, %ebx
movsbl %bl, %ebx
movl %r11d, %r11d
movl %ebx, (%rsi,%r11,4)
leal 0x7(%rdx), %r11d
cmpl %eax, %r11d
jne 0x32b23d
leal -0x7(%r8), %ebx
cmpl $0x7, %r8d
setge %bpl
cmpl %r9d, %ebx
setl %r14b
andb %bpl, %r14b
cmpb $0x1, %r14b
jne 0x32b23d
movsbl %r10b, %ebp
movl %ebx, %ebx
movl %ebp, (%rdi,%rbx,4)
cmpl %ecx, %r11d
jge 0x32b25b
cmpl $-0x7, %edx
jl 0x32b25b
leal -0x6(%r8), %ebx
cmpl %r9d, %ebx
jne 0x32b25b
movsbl %r10b, %r10d
movl %r11d, %r11d
movl %r10d, (%rsi,%r11,4)
leal 0x8(%rdx), %r11d
pextrw $0x3, %xmm0, %r10d
cmpl %eax, %r11d
jne 0x32b295
leal -0x8(%r8), %ebx
cmpl $0x8, %r8d
setge %bpl
cmpl %r9d, %ebx
setl %r14b
andb %bpl, %r14b
cmpb $0x1, %r14b
jne 0x32b295
movl %r10d, %ebp
shrl $0x8, %ebp
movsbl %bpl, %ebp
movl %ebx, %ebx
movl %ebp, (%rdi,%rbx,4)
cmpl %ecx, %r11d
jge 0x32b2b8
cmpl $-0x8, %edx
jl 0x32b2b8
leal -0x7(%r8), %ebx
cmpl %r9d, %ebx
jne 0x32b2b8
movl %r10d, %ebx
shrl $0x8, %ebx
movsbl %bl, %ebx
movl %r11d, %r11d
movl %ebx, (%rsi,%r11,4)
leal 0x9(%rdx), %r11d
cmpl %eax, %r11d
jne 0x32b2e6
leal -0x9(%r8), %ebx
cmpl $0x9, %r8d
setge %bpl
cmpl %r9d, %ebx
setl %r14b
andb %bpl, %r14b
cmpb $0x1, %r14b
jne 0x32b2e6
movsbl %r10b, %ebp
movl %ebx, %ebx
movl %ebp, (%rdi,%rbx,4)
cmpl %ecx, %r11d
jge 0x32b304
cmpl $-0x9, %edx
jl 0x32b304
leal -0x8(%r8), %ebx
cmpl %r9d, %ebx
jne 0x32b304
movsbl %r10b, %r10d
movl %r11d, %r11d
movl %r10d, (%rsi,%r11,4)
leal 0xa(%rdx), %r11d
pextrw $0x2, %xmm0, %r10d
cmpl %eax, %r11d
jne 0x32b33e
leal -0xa(%r8), %ebx
cmpl $0xa, %r8d
setge %bpl
cmpl %r9d, %ebx
setl %r14b
andb %bpl, %r14b
cmpb $0x1, %r14b
jne 0x32b33e
movl %r10d, %ebp
shrl $0x8, %ebp
movsbl %bpl, %ebp
movl %ebx, %ebx
movl %ebp, (%rdi,%rbx,4)
cmpl %ecx, %r11d
jge 0x32b361
cmpl $-0xa, %edx
jl 0x32b361
leal -0x9(%r8), %ebx
cmpl %r9d, %ebx
jne 0x32b361
movl %r10d, %ebx
shrl $0x8, %ebx
movsbl %bl, %ebx
movl %r11d, %r11d
movl %ebx, (%rsi,%r11,4)
leal 0xb(%rdx), %r11d
cmpl %eax, %r11d
jne 0x32b38f
leal -0xb(%r8), %ebx
cmpl $0xb, %r8d
setge %bpl
cmpl %r9d, %ebx
setl %r14b
andb %bpl, %r14b
cmpb $0x1, %r14b
jne 0x32b38f
movsbl %r10b, %ebp
movl %ebx, %ebx
movl %ebp, (%rdi,%rbx,4)
cmpl %ecx, %r11d
jge 0x32b3ad
cmpl $-0xb, %edx
jl 0x32b3ad
leal -0xa(%r8), %ebx
cmpl %r9d, %ebx
jne 0x32b3ad
movsbl %r10b, %r10d
movl %r11d, %r11d
movl %r10d, (%rsi,%r11,4)
leal 0xc(%rdx), %r11d
movd %xmm0, %r10d
cmpl %eax, %r11d
jne 0x32b3e2
leal -0xc(%r8), %ebx
cmpl $0xc, %r8d
setge %bpl
cmpl %r9d, %ebx
setl %r14b
andb %bpl, %r14b
cmpb $0x1, %r14b
jne 0x32b3e2
movl %r10d, %ebp
sarl $0x18, %ebp
movl %ebx, %ebx
movl %ebp, (%rdi,%rbx,4)
cmpl %ecx, %r11d
jge 0x32b402
cmpl $-0xc, %edx
jl 0x32b402
leal -0xb(%r8), %ebx
cmpl %r9d, %ebx
jne 0x32b402
movl %r10d, %ebx
sarl $0x18, %ebx
movl %r11d, %r11d
movl %ebx, (%rsi,%r11,4)
leal 0xd(%rdx), %r11d
cmpl %eax, %r11d
jne 0x32b436
leal -0xd(%r8), %ebx
cmpl $0xd, %r8d
setge %bpl
cmpl %r9d, %ebx
setl %r14b
andb %bpl, %r14b
cmpb $0x1, %r14b
jne 0x32b436
movl %r10d, %ebp
shrl $0x10, %ebp
movsbl %bpl, %ebp
movl %ebx, %ebx
movl %ebp, (%rdi,%rbx,4)
cmpl %ecx, %r11d
jge 0x32b459
cmpl $-0xd, %edx
jl 0x32b459
leal -0xc(%r8), %ebx
cmpl %r9d, %ebx
jne 0x32b459
movl %r10d, %ebx
shrl $0x10, %ebx
movsbl %bl, %ebx
movl %r11d, %r11d
movl %ebx, (%rsi,%r11,4)
leal 0xe(%rdx), %r11d
cmpl %eax, %r11d
jne 0x32b48d
leal -0xe(%r8), %ebx
cmpl $0xe, %r8d
setge %bpl
cmpl %r9d, %ebx
setl %r14b
andb %bpl, %r14b
cmpb $0x1, %r14b
jne 0x32b48d
movl %r10d, %ebp
shrl $0x8, %ebp
movsbl %bpl, %ebp
movl %ebx, %ebx
movl %ebp, (%rdi,%rbx,4)
cmpl %ecx, %r11d
jge 0x32b4b0
cmpl $-0xe, %edx
jl 0x32b4b0
leal -0xd(%r8), %ebx
cmpl %r9d, %ebx
jne 0x32b4b0
movl %r10d, %ebx
shrl $0x8, %ebx
movsbl %bl, %ebx
movl %r11d, %r11d
movl %ebx, (%rsi,%r11,4)
leal 0xf(%rdx), %r11d
cmpl %eax, %r11d
jne 0x32b4dd
leal -0xf(%r8), %eax
cmpl $0xf, %r8d
setge %bl
cmpl %r9d, %eax
setl %bpl
andb %bl, %bpl
cmpb $0x1, %bpl
jne 0x32b4dd
movsbl %r10b, %ebx
movl %eax, %eax
movl %ebx, (%rdi,%rax,4)
cmpl %ecx, %r11d
jge 0x32b4fa
cmpl $-0xf, %edx
jl 0x32b4fa
addl $-0xe, %r8d
cmpl %r9d, %r8d
jne 0x32b4fa
movsbl %r10b, %eax
movl %r11d, %ecx
movl %eax, (%rsi,%rcx,4)
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
nopl (%rax)