LLM4Binary/decompile-bench-makefile huggingface dataset:
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Level.cc
// Function: Level::printResults(std::ostream&)
void
Level::printResults(std::ostream& out)
{
	out << "************************************************" << endl;
//	out << "Core n°" << m_IDcore << endl;
	if(m_isUnified)
		m_dcache->printResults(out);
	else
	{
//		out << "Data Cache " << endl;
		m_dcache->printResults(out);
		out << "******" << endl;
//		out << "Instruction Cache " << endl;
		m_icache->printResults(out);
	}
}

// Assembly:
pushq %rbp
pushq %r14
pushq %rbx
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x171c4(%rip), %rsi     # 0x35f6d
movl $0x30, %edx
movq %rbx, %rdi
callq 0x5350
movq (%rbx), %rax
movq -0x18(%rax), %rdi
addq %rbx, %rdi
movl $0xa, %esi
callq 0x52b0
movsbl %al, %esi
movq %rbx, %rdi
callq 0x5030
movq %rax, %rdi
callq 0x51f0
movq (%r14), %rdi
movb 0x20(%r14), %bpl
movq %rbx, %rsi
callq 0x1bdee
testb %bpl, %bpl
je 0x1edf6
popq %rbx
popq %r14
popq %rbp
retq
leaq 0x1719a(%rip), %rsi     # 0x35f97
movl $0x6, %edx
movq %rbx, %rdi
callq 0x5350
movq (%rbx), %rax
movq -0x18(%rax), %rdi
addq %rbx, %rdi
movl $0xa, %esi
callq 0x52b0
movsbl %al, %esi
movq %rbx, %rdi
callq 0x5030
movq %rax, %rdi
callq 0x51f0
movq 0x8(%r14), %rdi
movq %rbx, %rsi
popq %rbx
popq %r14
popq %rbp
jmp 0x1bdee
nop
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Level.cc
// Function: Level::printConfig(std::ostream&)
void
Level::printConfig(std::ostream& out)
{
	out << "************************************************" << endl;
//	out << "Core n°" << m_IDcore << endl;
	if(m_isUnified)
		m_dcache->printConfig(out);
	else
	{
//		out << "Data Cache " << endl;
		m_dcache->printConfig(out);
		out << "******" << endl;
//		out << "Instruction Cache " << endl;
		m_icache->printConfig(out);
	}
}

// Assembly:
pushq %rbp
pushq %r14
pushq %rbx
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x1711a(%rip), %rsi     # 0x35f6d
movl $0x30, %edx
movq %rbx, %rdi
callq 0x5350
movq (%rbx), %rax
movq -0x18(%rax), %rdi
addq %rbx, %rdi
movl $0xa, %esi
callq 0x52b0
movsbl %al, %esi
movq %rbx, %rdi
callq 0x5030
movq %rax, %rdi
callq 0x51f0
movq (%r14), %rdi
movb 0x20(%r14), %bpl
movq %rbx, %rsi
callq 0x1cc1c
testb %bpl, %bpl
je 0x1eea0
popq %rbx
popq %r14
popq %rbp
retq
leaq 0x170f0(%rip), %rsi     # 0x35f97
movl $0x6, %edx
movq %rbx, %rdi
callq 0x5350
movq (%rbx), %rax
movq -0x18(%rax), %rdi
addq %rbx, %rdi
movl $0xa, %esi
callq 0x52b0
movsbl %al, %esi
movq %rbx, %rdi
callq 0x5030
movq %rax, %rdi
callq 0x51f0
movq 0x8(%r14), %rdi
movq %rbx, %rsi
popq %rbx
popq %r14
popq %rbp
jmp 0x1cc1c
nop
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/MemoryTrace.cc
// Function: MemoryTrace::MemoryTrace(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
MemoryTrace::MemoryTrace(string trace) : m_trace(trace), m_isOpen(false)
{
	/*m_isOpen = false;

	if(!m_isOpen){
		cout << "Error -- Trace " << trace << " cannot be opened" << endl;
		exit(0);
	}*/
}

// Assembly:
pushq %rbx
movq %rdi, %rbx
leaq 0x25869(%rip), %rax     # 0x447a0
movq %rax, (%rdi)
addq $0x8, %rdi
leaq 0x18(%rbx), %rax
movq %rax, 0x8(%rbx)
movq (%rsi), %rax
movq 0x8(%rsi), %rdx
addq %rax, %rdx
movq %rax, %rsi
callq 0xcc1c
movb $0x0, 0x28(%rbx)
popq %rbx
retq
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/MemoryTrace.cc
// Function: CompressedTrace::open()
bool
CompressedTrace::open()
{
	m_compressedTrace = gzopen(m_trace.c_str() , "rb8");
	if(!m_compressedTrace)
		cout << "The trace " << m_trace << " cannot be opened" << endl;
	else
		m_isOpen = true;

	return m_isOpen;
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq 0x8(%rdi), %rdi
leaq 0x16ec5(%rip), %rsi     # 0x3602d
callq 0x5470
movq %rax, 0x30(%rbx)
testq %rax, %rax
je 0x1f17c
movb $0x1, 0x28(%rbx)
jmp 0x1f1e5
movq 0x25e4d(%rip), %r14     # 0x44fd0
leaq 0x16ea7(%rip), %rsi     # 0x36031
movl $0xa, %edx
movq %r14, %rdi
callq 0x5350
movq 0x8(%rbx), %rsi
movq 0x10(%rbx), %rdx
movq %r14, %rdi
callq 0x5350
movq %rax, %r14
leaq 0x16e8b(%rip), %rsi     # 0x3603c
movl $0x11, %edx
movq %rax, %rdi
callq 0x5350
movq (%r14), %rax
movq -0x18(%rax), %rdi
addq %r14, %rdi
movl $0xa, %esi
callq 0x52b0
movsbl %al, %esi
movq %r14, %rdi
callq 0x5030
movq %rax, %rdi
callq 0x51f0
movb 0x28(%rbx), %al
addq $0x8, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/MemoryTrace.cc
// Function: TextTrace::open()
bool
TextTrace::open()
{
	m_textTrace.open(m_trace);
	if(!m_textTrace)
		cout << "The trace " << m_trace << " cannot be opened" << endl;
	else
		m_isOpen = true;


	return m_isOpen;
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
addq $0x30, %rdi
leaq 0x8(%rbx), %rsi
movl $0x8, %edx
callq 0x5280
movq 0x30(%rbx), %rax
movq -0x18(%rax), %rax
testb $0x5, 0x50(%rbx,%rax)
je 0x1f645
movq 0x259ef(%rip), %r14     # 0x44fd0
leaq 0x16a49(%rip), %rsi     # 0x36031
movl $0xa, %edx
movq %r14, %rdi
callq 0x5350
movq 0x8(%rbx), %rsi
movq 0x10(%rbx), %rdx
movq %r14, %rdi
callq 0x5350
movq %rax, %r14
leaq 0x16a2d(%rip), %rsi     # 0x3603c
movl $0x11, %edx
movq %rax, %rdi
callq 0x5350
movq (%r14), %rax
movq -0x18(%rax), %rdi
addq %r14, %rdi
movl $0xa, %esi
callq 0x52b0
movsbl %al, %esi
movq %r14, %rdi
callq 0x5030
movq %rax, %rdi
callq 0x51f0
jmp 0x1f649
movb $0x1, 0x28(%rbx)
movb 0x28(%rbx), %al
addq $0x8, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/MemoryTrace.cc
// Function: initTrace(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
MemoryTrace* initTrace(std::string trace_name)
{
	std::vector<std::string> split_line;
	std::string ext = split(trace_name , '.').back();	
	if(ext.size() == 3 && ext == "txt")
		return new TextTrace(trace_name);
	else
		return new CompressedTrace(trace_name);		

}

// Assembly:
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0xb8, %rsp
movq %rdi, %r14
xorps %xmm0, %xmm0
movaps %xmm0, 0x20(%rsp)
movq $0x0, 0x30(%rsp)
leaq 0xa8(%rsp), %rbx
movq %rbx, -0x10(%rbx)
movq (%rdi), %rsi
movq 0x8(%rdi), %rdx
addq %rsi, %rdx
leaq 0x98(%rsp), %rdi
callq 0xcc1c
leaq 0x40(%rsp), %rdi
leaq 0x98(%rsp), %rsi
movl $0x2e, %edx
callq 0x2e5ac
movq 0x48(%rsp), %rax
leaq 0x10(%rsp), %r15
movq %r15, -0x10(%r15)
movq -0x20(%rax), %rsi
movq -0x18(%rax), %rdx
addq %rsi, %rdx
movq %rsp, %rdi
callq 0xcc1c
leaq 0x40(%rsp), %rdi
callq 0xc830
movq 0x98(%rsp), %rdi
cmpq %rbx, %rdi
je 0x1f6f6
callq 0x52a0
cmpq $0x3, 0x8(%rsp)
jne 0x1f711
leaq 0x1500a(%rip), %rsi     # 0x3470f
movq %rsp, %rdi
callq 0x50f0
testl %eax, %eax
je 0x1f782
movl $0x38, %edi
callq 0x52e0
movq %rax, %rbx
leaq 0x68(%rsp), %r12
movq %r12, -0x10(%r12)
movq (%r14), %rsi
movq 0x8(%r14), %rdx
addq %rsi, %rdx
leaq 0x58(%rsp), %rdi
callq 0xcc1c
leaq 0x58(%rsp), %rsi
movq %rbx, %rdi
callq 0x1f906
movq 0x58(%rsp), %rdi
cmpq %r12, %rdi
je 0x1f758
callq 0x52a0
movq (%rsp), %rdi
cmpq %r15, %rdi
je 0x1f766
callq 0x52a0
leaq 0x20(%rsp), %rdi
callq 0xc830
movq %rbx, %rax
addq $0xb8, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq
movl $0x238, %edi            # imm = 0x238
callq 0x52e0
movq %rax, %rbx
leaq 0x88(%rsp), %r12
movq %r12, -0x10(%r12)
movq (%r14), %rsi
movq 0x8(%r14), %rdx
addq %rsi, %rdx
leaq 0x78(%rsp), %rdi
callq 0xcc1c
leaq 0x78(%rsp), %rsi
movq %rbx, %rdi
callq 0x1f83a
movq 0x78(%rsp), %rdi
jmp 0x1f74e
movq %rax, %r14
movq 0x78(%rsp), %rdi
jmp 0x1f7d8
jmp 0x1f7e4
movq %rax, %r14
movq 0x58(%rsp), %rdi
cmpq %r12, %rdi
je 0x1f7e7
callq 0x52a0
jmp 0x1f7e7
movq %rax, %r14
movq %rbx, %rdi
callq 0x52a0
jmp 0x1f7f4
movq %rax, %r14
movq (%rsp), %rdi
cmpq %r15, %rdi
jne 0x1f81e
jmp 0x1f828
movq %rax, %r14
leaq 0x40(%rsp), %rdi
callq 0xc830
jmp 0x1f811
movq %rax, %r14
movq 0x98(%rsp), %rdi
cmpq %rbx, %rdi
je 0x1f828
callq 0x52a0
jmp 0x1f828
movq %rax, %r14
leaq 0x20(%rsp), %rdi
callq 0xc830
movq %r14, %rdi
callq 0x55a0
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/PHC.cc
// Function: PHCPredictor::allocateInNVM(unsigned long, Access)
allocDecision
PHCPredictor::allocateInNVM(uint64_t set, Access element)
{
//	if(element.isInstFetch())
//		return ALLOCATE_IN_NVM;
	
	update_globalPChistory(element.m_pc);
	stats_nbMiss++;
	miss_counter++;
	if(miss_counter > 255)
		miss_counter = 255;
	
	// All the set is a learning/sampled set independantly of its way or SRAM/NVM alloc
	//bool isLearning = m_tableSRAM[set][0]->isLearning; 

	int sum_pred = 0;
	for(unsigned i = 0 ; i < m_features.size() ; i++)
	{
		int hash = m_features_hash[i](element.block_addr , element.m_pc);
		sum_pred += m_features[i]->getAllocationPrediction(hash, true);
	}
	if( abs(sum_pred) < simu_parameters.perceptron_allocation_threshold )
	{
		stats_prediction_preemptive++;
		if( element.isWrite() )
			return ALLOCATE_IN_SRAM;
		else 
			return ALLOCATE_IN_NVM;
	}
	else
	{
		stats_prediction_confident++;
		if( sum_pred < simu_parameters.perceptron_allocation_threshold )
			return ALLOCATE_IN_SRAM;
		else
			return ALLOCATE_IN_NVM;
	}

}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
leaq 0x40(%rsp), %r15
movq 0x10(%r15), %r14
movq %r14, %rsi
callq 0x20fd4
incq 0x368(%rbx)
leaq 0x2529b(%rip), %rax     # 0x461a0
movl (%rax), %ecx
movl $0xfe, %edx
cmpl %edx, %ecx
cmovll %ecx, %edx
incl %edx
movl %edx, (%rax)
movq 0x278(%rbx), %rax
cmpq 0x270(%rbx), %rax
je 0x20f7d
movq 0x30(%r15), %r15
xorl %r12d, %r12d
movl $0x1, %r13d
xorl %ebp, %ebp
movq 0x288(%rbx), %rax
movq %r15, %rdi
movq %r14, %rsi
callq *(%rax,%r12,8)
movq 0x270(%rbx), %rcx
movq (%rcx,%r12,8), %rdi
movl %eax, %esi
movl $0x1, %edx
callq 0x14a60
addl %eax, %ebp
movq 0x278(%rbx), %rax
subq 0x270(%rbx), %rax
movl %r13d, %r12d
sarq $0x3, %rax
incl %r13d
cmpq %r12, %rax
ja 0x20f34
jmp 0x20f7f
xorl %ebp, %ebp
movl %ebp, %ecx
negl %ecx
cmovsl %ebp, %ecx
leaq 0x24fc3(%rip), %rax     # 0x45f50
movl 0x1c0(%rax), %eax
cmpl %eax, %ecx
jge 0x20fb6
incq 0x3e0(%rbx)
leaq 0x40(%rsp), %rax
movl 0x1c(%rax), %eax
cmpl $0x3, %eax
setne %cl
cmpl $0x6, %eax
setne %al
andb %cl, %al
jmp 0x20fc2
incq 0x3d8(%rbx)
cmpl %eax, %ebp
setge %al
movzbl %al, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/PHC.cc
// Function: PHCPredictor::update_globalPChistory(unsigned long)
void
PHCPredictor::update_globalPChistory(uint64_t pc)
{	
	m_global_PChistory.push_front(pc);
	if( m_global_PChistory.size() == 11)
		m_global_PChistory.pop_back();
	
	if(!m_need_callee_file)
		return;
	
	if(m_callee_map.count(pc) != 0)
	{
		m_callee_PChistory.push_front(pc);
		if( m_callee_PChistory.size() == 11)
			m_callee_PChistory.pop_back();
	}
}

// Assembly:
pushq %rbx
subq $0x10, %rsp
movq %rdi, %rbx
movq %rsi, 0x8(%rsp)
movq 0x24b38(%rip), %rax     # 0x45b20
cmpq 0x24b39(%rip), %rax     # 0x45b28
je 0x21002
movq %rsi, -0x8(%rax)
addq $-0x8, %rax
movq %rax, 0x24b20(%rip)     # 0x45b20
jmp 0x21013
leaq 0x24b07(%rip), %rdi     # 0x45b10
leaq 0x8(%rsp), %rsi
callq 0x231a2
movq 0x24b3e(%rip), %rax     # 0x45b58
movq %rax, %rcx
subq 0x24b14(%rip), %rcx     # 0x45b38
shrq $0x3, %rcx
cmpq $0x1, %rax
adcq $-0x1, %rcx
shlq $0x6, %rcx
movq 0x24b05(%rip), %rax     # 0x45b40
subq 0x24b06(%rip), %rax     # 0x45b48
sarq $0x3, %rax
movq 0x24ae3(%rip), %rdx     # 0x45b30
subq 0x24acc(%rip), %rdx     # 0x45b20
sarq $0x3, %rdx
addq %rax, %rdx
addq %rcx, %rdx
cmpq $0xb, %rdx
jne 0x21070
leaq 0x24aa5(%rip), %rdi     # 0x45b10
callq 0x22d20
cmpb $0x1, 0x2e0(%rbx)
jne 0x21168
movq 0x2f8(%rbx), %rcx
addq $0x2f0, %rbx            # imm = 0x2F0
movq %rbx, %rax
testq %rcx, %rcx
je 0x210b3
movq 0x8(%rsp), %rdx
movq %rbx, %rax
xorl %esi, %esi
cmpq %rdx, 0x20(%rcx)
setb %sil
cmovaeq %rcx, %rax
movq 0x10(%rcx,%rsi,8), %rcx
testq %rcx, %rcx
jne 0x2109b
movq %rbx, %rcx
cmpq %rbx, %rax
je 0x210cb
movq 0x8(%rsp), %rcx
cmpq 0x20(%rax), %rcx
cmovbq %rbx, %rax
movq %rax, %rcx
cmpq %rbx, %rcx
je 0x21168
movq 0x24a95(%rip), %rax     # 0x45b70
cmpq 0x24a96(%rip), %rax     # 0x45b78
je 0x210fa
movq 0x8(%rsp), %rcx
movq %rcx, -0x8(%rax)
addq $-0x8, %rax
movq %rax, 0x24a78(%rip)     # 0x45b70
jmp 0x2110b
leaq 0x24a5f(%rip), %rdi     # 0x45b60
leaq 0x8(%rsp), %rsi
callq 0x231a2
movq 0x24a96(%rip), %rax     # 0x45ba8
movq %rax, %rcx
subq 0x24a6c(%rip), %rcx     # 0x45b88
shrq $0x3, %rcx
cmpq $0x1, %rax
adcq $-0x1, %rcx
shlq $0x6, %rcx
movq 0x24a5d(%rip), %rax     # 0x45b90
subq 0x24a5e(%rip), %rax     # 0x45b98
sarq $0x3, %rax
movq 0x24a3b(%rip), %rdx     # 0x45b80
subq 0x24a24(%rip), %rdx     # 0x45b70
sarq $0x3, %rdx
addq %rax, %rdx
addq %rcx, %rdx
cmpq $0xb, %rdx
jne 0x21168
leaq 0x249fd(%rip), %rdi     # 0x45b60
callq 0x22d20
addq $0x10, %rsp
popq %rbx
retq
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/PHC.cc
// Function: PHCPredictor::updatePolicy(unsigned long, unsigned long, bool, Access, bool)
void
PHCPredictor::updatePolicy(uint64_t set, uint64_t index, bool inNVM, Access element, bool isWBrequest)
{
	update_globalPChistory(element.m_pc);
	
	stats_update++;
	
	CacheEntry *entry = get_entry(set , index , inNVM);
	entry->policyInfo = m_cpt++;


	RD_TYPE rd_type = classifyRD( set , index , inNVM );
	stats_access_class[rd_type][element.isWrite()]++;

	if(entry->isLearning)
	{
		entry->cost_value += m_costAccess[element.isWrite()][rd_type];
//		cout << "UpdatePolicy Learning Cache line 0x" << std::hex << element.block_addr
//			<< std::dec << " Cost Value " << entry->cost_value << endl;

	}

	stats_nbHits++;
	miss_counter--;
	if(miss_counter < 0)
		miss_counter = 0;

	Predictor::updatePolicy(set , index , inNVM , element , isWBrequest);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %r8d, %ebp
movl %ecx, %r15d
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r12
movq 0x50(%rsp), %rsi
callq 0x20fd4
incq 0x3a8(%r12)
movl %r15d, %eax
movq 0x8(%r12,%rax,8), %rax
movq (%rax), %rax
leaq (%r14,%r14,2), %rcx
movq (%rax,%rcx,8), %rax
movq (%rax,%rbx,8), %r13
movq 0x2d8(%r12), %rax
leaq 0x1(%rax), %rcx
movq %rcx, 0x2d8(%r12)
movl %eax, 0x38(%r13)
movq %r12, %rdi
movl %r14d, %esi
movl %ebx, %edx
movl %r15d, %ecx
callq 0x21292
movl %eax, %eax
movq 0x430(%r12), %rdx
leaq (%rax,%rax,2), %rsi
movl 0x5c(%rsp), %ecx
cmpl $0x3, %ecx
sete %dil
cmpl $0x6, %ecx
sete %cl
orb %dil, %cl
movzbl %cl, %ecx
movq (%rdx,%rsi,8), %rdx
incl (%rdx,%rcx,4)
cmpb $0x1, 0x148(%r13)
jne 0x21236
movq 0x2b8(%r12), %rdx
leaq (%rcx,%rcx,2), %rcx
movq (%rdx,%rcx,8), %rcx
cvtsi2sdl (%rcx,%rax,4), %xmm0
addsd 0x130(%r13), %xmm0
movsd %xmm0, 0x130(%r13)
incq 0x370(%r12)
leaq 0x24f5b(%rip), %rax     # 0x461a0
movl (%rax), %ecx
cmpl $0x2, %ecx
movl $0x1, %edx
cmovgel %ecx, %edx
decl %edx
movl %edx, (%rax)
movzbl %r15b, %ecx
movzbl %bpl, %r8d
movq %r12, %rdi
movq %r14, %rsi
movq %rbx, %rdx
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x275be
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/PHC.cc
// Function: PHCPredictor::classifyRD(int, int, bool)
RD_TYPE
PHCPredictor::classifyRD(int set , int index, bool inNVM)
{
	vector<CacheEntry*> line;
	int64_t ref_rd = 0;
	if(inNVM)
	{
		ref_rd = m_tableNVM[set][index]->policyInfo;
		line = m_tableNVM[set];
	}
	else
	{
		line = m_tableSRAM[set];
		ref_rd = m_tableSRAM[set][index]->policyInfo;
	}
	
	int position = 0;
	/* Determine the position of the cache line in the LRU stack */
	for(unsigned i = 0 ; i < line.size() ; i ++)
	{
		if(line[i]->policyInfo < ref_rd && line[i]->isValid)
			position++;
	}	

	if(simu_parameters.nvm_assoc > simu_parameters.sram_assoc)
	{
		if(position < simu_parameters.mediumrd_def)
			return RD_SHORT;
		else
			return RD_MEDIUM;	
	}
	else
	{
		if(position < simu_parameters.mediumrd_def)
			return RD_SHORT;
		else
			return RD_MEDIUM;
	}
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
subq $0x18, %rsp
movl %edx, %ebx
movq %rdi, %r14
xorps %xmm0, %xmm0
movaps %xmm0, (%rsp)
movq $0x0, 0x10(%rsp)
movslq %esi, %rax
testl %ecx, %ecx
je 0x212de
movq 0x10(%r14), %rcx
movq (%rcx), %rcx
leaq (%rax,%rax,2), %rax
leaq (%rcx,%rax,8), %rsi
movslq %ebx, %rax
movq (%rsi), %rcx
movq (%rcx,%rax,8), %rax
movl 0x38(%rax), %ebx
movq %rsp, %rdi
callq 0xc8b8
jmp 0x2130e
movq 0x8(%r14), %rcx
leaq (%rax,%rax,2), %r15
leaq (,%r15,8), %rsi
addq (%rcx), %rsi
movq %rsp, %rdi
callq 0xc8b8
movq 0x8(%r14), %rax
movq (%rax), %rax
movslq %ebx, %rcx
movq (%rax,%r15,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x38(%rax), %ebx
movq (%rsp), %rdi
movq 0x8(%rsp), %rax
subq %rdi, %rax
je 0x2133e
sarq $0x3, %rax
xorl %ecx, %ecx
xorl %ebp, %ebp
movq (%rdi,%rcx,8), %rdx
cmpl %ebx, 0x38(%rdx)
jge 0x21332
movzbl (%rdx), %edx
addl %edx, %ebp
incq %rcx
movl %ecx, %edx
cmpq %rdx, %rax
ja 0x21324
jmp 0x21340
xorl %ebp, %ebp
leaq 0x24c09(%rip), %rax     # 0x45f50
movl 0x1fc(%rax), %ebx
testq %rdi, %rdi
je 0x21357
callq 0x52a0
xorl %eax, %eax
cmpl %ebx, %ebp
setge %al
addq $0x18, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
movq (%rsp), %rdi
testq %rdi, %rdi
je 0x2137a
callq 0x52a0
movq %rbx, %rdi
callq 0x55a0
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/PHC.cc
// Function: PHCPredictor::finishSimu()
void 
PHCPredictor::finishSimu()
{
	
	if(simu_parameters.perceptron_drawFeatureMaps)
	{
		drawFeatureMaps();
	}
	
	for(auto feature : m_features)
		feature->finishSimu();
	
	Predictor::finishSimu();
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
leaq 0x235c8(%rip), %rax     # 0x45f50
cmpb $0x1, 0x1cc(%rax)
jne 0x22999
movq %rbx, %rdi
callq 0x229c2
movq 0x270(%rbx), %r14
movq 0x278(%rbx), %rbx
cmpq %rbx, %r14
je 0x229ba
movq (%r14), %rdi
callq 0x14d7e
addq $0x8, %r14
jmp 0x229a7
addq $0x8, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Perceptron.cc
// Function: PerceptronPredictor::evictPolicy(int, bool)
int PerceptronPredictor::evictPolicy(int set, bool inNVM)
{
	int assoc_victim = -1;
	assert(m_replacementPolicyNVM_ptr != NULL);
	assert(m_replacementPolicySRAM_ptr != NULL);

	CacheEntry* current = NULL;
	if(inNVM)
	{	
		assoc_victim = m_replacementPolicyNVM_ptr->evictPolicy(set);
		current = m_tableNVM[set][assoc_victim];
	}
	else
	{
		assoc_victim = m_replacementPolicySRAM_ptr->evictPolicy(set);
		current = m_tableSRAM[set][assoc_victim];		
	}

	if(current->isValid && current->isLearning)
	{
		for(unsigned i =  0 ; i < m_BP_features.size() ; i++)
		{
			if(current->predictedReused[i] || current->perceptron_BPpred[i] < simu_parameters.perceptron_bypass_learning)
			{
				int hash = m_BP_features_hash[i](current->address , current->m_pc);
 				m_BP_features[i]->increaseConfidence(hash);
			}
		}
		
		if(current->nbWrite == 0 && current->nbRead == 0)
			stats_nbDeadLine[stats_nbDeadLine.size()-1]++;
	}
	
	evictRecording(set , assoc_victim , inNVM);	
	return assoc_victim;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq 0x60(%rdi), %rax
testq %rax, %rax
je 0x250d3
movq %rdi, %r14
movq 0x68(%rdi), %rdi
testq %rdi, %rdi
je 0x250f2
movl %esi, %ebx
movslq %esi, %r12
testb %dl, %dl
cmovneq %rax, %rdi
movzbl %dl, %r15d
movq (%rdi), %rax
movl %r12d, %esi
callq *0x20(%rax)
movl %eax, %ebp
movq 0x8(%r14,%r15,8), %rax
movq (%rax), %rax
leaq (%r12,%r12,2), %rcx
movslq %ebp, %rdx
movq (%rax,%rcx,8), %rax
movq (%rax,%rdx,8), %r12
cmpb $0x1, (%r12)
jne 0x250b3
cmpb $0x1, 0x148(%r12)
jne 0x250b3
movl %ebx, 0x4(%rsp)
movq 0x2c0(%r14), %rax
cmpq 0x2b8(%r14), %rax
je 0x2508e
movl $0x1, %r13d
xorl %ebx, %ebx
movq 0xa8(%r12), %rax
movq %rbx, %rcx
shrq $0x6, %rcx
movq (%rax,%rcx,8), %rax
btq %rbx, %rax
jb 0x2504b
movq 0x48(%r12), %rax
movl (%rax,%rbx,4), %eax
leaq 0x20f0d(%rip), %rcx     # 0x45f50
cmpl 0x1bc(%rcx), %eax
jge 0x25071
movq 0x2d0(%r14), %rax
movq 0x8(%r12), %rdi
movq 0x10(%r12), %rsi
callq *(%rax,%rbx,8)
movq 0x2b8(%r14), %rcx
movq (%rcx,%rbx,8), %rdi
movl %eax, %esi
callq 0x14b60
movq 0x2c0(%r14), %rax
subq 0x2b8(%r14), %rax
movl %r13d, %ebx
sarq $0x3, %rax
incl %r13d
cmpq %rbx, %rax
ja 0x2501b
cmpl $0x0, 0x11c(%r12)
movl 0x4(%rsp), %ebx
jne 0x250b3
cmpl $0x0, 0x120(%r12)
jne 0x250b3
movq 0x370(%r14), %rax
incq -0x8(%rax)
movq %r14, %rdi
movl %ebx, %esi
movl %ebp, %edx
movl %r15d, %ecx
callq 0x2671a
movl %ebp, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0xf0c7(%rip), %rdi      # 0x341a1
leaq 0x113e7(%rip), %rsi     # 0x364c8
leaq 0x1141f(%rip), %rcx     # 0x36507
movl $0x17f, %edx            # imm = 0x17F
callq 0x51d0
leaq 0xf101(%rip), %rdi      # 0x341fa
leaq 0x113c8(%rip), %rsi     # 0x364c8
leaq 0x11400(%rip), %rcx     # 0x36507
movl $0x180, %edx            # imm = 0x180
callq 0x51d0
nop
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::insertionPolicy(unsigned long, unsigned long, bool, Access)
void
Predictor::insertionPolicy(uint64_t set, uint64_t index, bool inNVM, Access element)
{
	CacheEntry* entry = inNVM ? m_tableNVM[set][index] : m_tableSRAM[set][index];
	uint64_t block_addr = bitRemove(element.m_address , 0 , log2(BLOCK_SIZE));
	updateFUcaches(block_addr , inNVM);
	updateCachePressure();


	//Update the missing tag as a new cache line is brough into the cache 
	//Has to remove the MT entry if it exists there 
	//DPRINTF("Predictor::insertRecord Begin ");	
	if(m_trackError)
	{
		if( simu_parameters.enableFullSRAMtraffic )
		{
			//insertIntoSRAMMT(set , inNVM, element );
		}
		else
		{
			if(inNVM)
			{
				for(unsigned i = 0 ; i < m_SRAM_missing_tags[set].size(); i++)
				{
					if(m_SRAM_missing_tags[set][i]->addr == entry->address)
						m_SRAM_missing_tags[set][i]->isValid = false;
				}		
			}		
		}	
		updateBypassTag( entry , set, inNVM);
	}	
	//DPRINTF("Predictor::insertRecord Begin ");

}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movl %ecx, %ebp
movq %rsi, %rbx
movq %rdi, %r14
movl %ecx, %eax
movq 0x8(%rdi,%rax,8), %rax
movq (%rax), %rax
leaq (%rsi,%rsi,2), %r12
movq (%rax,%r12,8), %rax
movq (%rax,%rdx,8), %r15
movq 0x30(%rsp), %rdi
xorl %esi, %esi
movl $0x6, %edx
callq 0x2e70a
movq %r14, %rdi
movq %rax, %rsi
movl %ebp, %edx
callq 0x26956
movq %r14, %rdi
callq 0x26e4a
cmpb $0x1, 0x80(%r14)
jne 0x2694c
testb %bpl, %bpl
je 0x26933
leaq 0x1f65c(%rip), %rax     # 0x45f50
cmpb $0x0, 0xdc(%rax)
jne 0x26933
movq 0x88(%r14), %rcx
movq (%rcx,%r12,8), %rax
movq 0x8(%rcx,%r12,8), %rcx
subq %rax, %rcx
je 0x26933
sarq $0x3, %rcx
movq 0x8(%r15), %rdx
xorl %esi, %esi
movq (%rax,%rsi,8), %rdi
cmpq %rdx, (%rdi)
jne 0x26929
movb $0x0, 0x14(%rdi)
incq %rsi
movl %esi, %edi
cmpq %rdi, %rcx
ja 0x2691c
movzbl %bpl, %ecx
movq %r14, %rdi
movq %r15, %rsi
movl %ebx, %edx
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
jmp 0x26f26
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
nop
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::updateCachePressure()
void
Predictor::updateCachePressure()
{
	if(!m_trackError || !simu_parameters.enableDatasetSpilling)
		return;
		
	if( (cpt_time - stats_beginTimeFrame) > simu_parameters.MT_timeframe)
	{
		for(int i = 0 ; i < m_nb_set ; i++)
		{
			m_isNVMbusy[i] = (m_NVM_MT_counters[i] > simu_parameters.MT_counter_th) ? true : false;		
			m_isSRAMbusy[i] = (m_SRAM_MT_counters[i] > simu_parameters.MT_counter_th) ? true : false;
		
			m_NVM_MT_counters[i] = 0;
			m_SRAM_MT_counters[i] = 0;
		}

		if(simu_parameters.printDebug)
		{
			//stats_SRAMpressure.push_back(m_isSRAMbusy);
		}

		stats_beginTimeFrame = cpt_time;	
	}
}

// Assembly:
cmpb $0x1, 0x80(%rdi)
jne 0x26f25
leaq 0x1f0f2(%rip), %rcx     # 0x45f50
cmpb $0x1, 0x158(%rcx)
jne 0x26f25
leaq 0x1f0a6(%rip), %rax     # 0x45f18
movq (%rax), %rdx
subq 0x268(%rdi), %rdx
cmpq 0xd0(%rcx), %rdx
jbe 0x26f25
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movslq 0x18(%rdi), %rdx
testq %rdx, %rdx
jle 0x26f14
movq 0xb8(%rdi), %rsi
movq 0xd0(%rdi), %r8
movl 0xc8(%rcx), %r9d
movq 0x110(%rdi), %r10
movq 0xe8(%rdi), %r11
xorl %ebx, %ebx
xorl %ecx, %ecx
movl $0x1, %r14d
shlq %cl, %r14
movq %rcx, %r15
shrq $0x6, %r15
cmpq %r9, (%r8,%rcx,8)
jbe 0x26edf
movq (%r10,%r15,8), %r12
orq %r14, %r12
jmp 0x26ee9
movq %r14, %r12
notq %r12
andq (%r10,%r15,8), %r12
movq %r12, (%r10,%r15,8)
cmpq %r9, (%rsi,%rcx,8)
jbe 0x26ef9
orq (%r11,%r15,8), %r14
jmp 0x26f00
notq %r14
andq (%r11,%r15,8), %r14
movq %r14, (%r11,%r15,8)
movq %rbx, (%r8,%rcx,8)
movq %rbx, (%rsi,%rcx,8)
incq %rcx
cmpq %rcx, %rdx
jne 0x26ec0
movq (%rax), %rax
movq %rax, 0x268(%rdi)
popq %rbx
popq %r12
popq %r14
popq %r15
retq
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::updateBypassTag(CacheEntry*, int, bool)
void
Predictor::updateBypassTag(CacheEntry* entry, int set, bool inNVM)
{
	uint64_t block_addr = entry->address;
	//DPRINTF(DebugCache, "Predictor::recordAllocationDecision Set %d, block_addr = 0x%lx\n ", set, block_addr);

	//Look if the entry already exists, if yes => BP Error, if No insert it
	for(unsigned i = 0 ; i < BP_missing_tags[set].size() ; i++)
	{	
		if(BP_missing_tags[set][i]->addr == block_addr)
		{
			BP_missing_tags[set][i]->last_time_touched = m_cpt_bypassTag++;
			return;		
		}
	}
	//DPRINTF(DebugCache, "Predictor::recordAllocationDecision Didn't find the entry in the BP Missing Tags\n");
	int index_oldest =0;
	uint64_t oldest = BP_missing_tags[set][0]->last_time_touched;
	for(unsigned i = 0 ; i < BP_missing_tags[set].size() ; i++)
	{
		if(!BP_missing_tags[set][i]->isValid)		
		{
			index_oldest= i;
			break;
		}
	
		if(BP_missing_tags[set][i]->last_time_touched < oldest)
		{
			index_oldest = i;
			oldest = BP_missing_tags[set][i]->last_time_touched;
		}
	}
	//DPRINTF(DebugCache, "Predictor::Insertion of the new entry at assoc %d\n", index_oldest);
	
	BP_missing_tags[set][index_oldest]->last_time_touched = m_cpt_bypassTag++;
	BP_missing_tags[set][index_oldest]->addr = block_addr;
	BP_missing_tags[set][index_oldest]->isValid = true;		
	BP_missing_tags[set][index_oldest]->allocSite = inNVM;
	BP_missing_tags[set][index_oldest]->missPC = entry->missPC;
	
	
	/*
	if(m_policy == "Cerebron")
	{
		for(int i = 0 ; i < simu_parameters.PHC_features.size() ; i++)
		{		
			BP_missing_tags[set][index_oldest]->features_hash[i] = entry->PHC_allocation_pred[i].first;
			
		}
	}*/
		
}

// Assembly:
pushq %rbx
movslq %edx, %rax
movq 0x140(%rdi), %rdx
leaq (%rax,%rax,2), %r8
movq (%rdx,%r8,8), %rax
movq 0x8(%rdx,%r8,8), %r10
movq %r10, %r8
subq %rax, %r8
sarq $0x3, %r8
movq 0x8(%rsi), %rdx
cmpq %rax, %r10
je 0x26f6e
movl $0x1, %r9d
xorl %r11d, %r11d
movq (%rax,%r11,8), %r11
cmpq %rdx, (%r11)
je 0x26fa3
movl %r9d, %r11d
incl %r9d
cmpq %r11, %r8
ja 0x26f5a
xorl %r9d, %r9d
cmpq %rax, %r10
je 0x26fbb
movq (%rax), %r10
movq 0x8(%r10), %r10
xorl %r11d, %r11d
movq (%rax,%r9,8), %rbx
cmpb $0x1, 0x14(%rbx)
jne 0x26fb5
movq 0x8(%rbx), %rbx
cmpq %r10, %rbx
cmovbl %r9d, %r11d
cmovbq %rbx, %r10
incl %r9d
cmpq %r9, %r8
ja 0x26f80
jmp 0x26fb8
movq 0x38(%rdi), %rax
leaq 0x1(%rax), %rcx
movq %rcx, 0x38(%rdi)
movq %rax, 0x8(%r11)
jmp 0x26fe1
movl %r9d, %r11d
movslq %r11d, %r9
movq 0x38(%rdi), %r8
leaq 0x1(%r8), %r10
movq %r10, 0x38(%rdi)
movq (%rax,%r9,8), %rax
movq %r8, 0x8(%rax)
movq %rdx, (%rax)
movb $0x1, 0x14(%rax)
movb %cl, 0x16(%rax)
movq 0x20(%rsi), %rcx
movq %rcx, 0x18(%rax)
popq %rbx
retq
nop
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::missingTagCostValue(unsigned long, int)
int 
Predictor::missingTagCostValue(uint64_t block_addr, int set)
{
	for(unsigned i = 0 ; i < m_SRAM_missing_tags[set].size() ; i++)
	{
		if(m_SRAM_missing_tags[set][i]->addr == block_addr && m_SRAM_missing_tags[set][i]->isValid)
		{
			return m_SRAM_missing_tags[set][i]->cost_value;
		}
	}	
	return 0;
}

// Assembly:
movslq %edx, %rax
movq 0x88(%rdi), %rcx
leaq (%rax,%rax,2), %rdx
movq (%rcx,%rdx,8), %rax
movq 0x8(%rcx,%rdx,8), %rcx
subq %rax, %rcx
je 0x27023
sarq $0x3, %rcx
movl $0x1, %edx
xorl %edi, %edi
movq (%rax,%rdi,8), %rdi
cmpq %rsi, (%rdi)
jne 0x2701a
cmpb $0x1, 0x14(%rdi)
je 0x27026
movl %edx, %edi
incl %edx
cmpq %rdi, %rcx
ja 0x2700b
xorl %eax, %eax
retq
movl 0x10(%rdi), %eax
retq
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::missingTagMissPC(unsigned long, int)
uint64_t 
Predictor::missingTagMissPC(uint64_t block_addr, int set)
{
	assert( m_policy == "Cerebron" || m_policy == "SimplePerceptron");
	
	for(unsigned i = 0 ; i < m_SRAM_missing_tags[set].size() ; i++)
	{
		if(m_SRAM_missing_tags[set][i]->addr == block_addr && m_SRAM_missing_tags[set][i]->isValid)
		{
			return m_SRAM_missing_tags[set][i]->missPC;
		}
	}
	
	//Sanity check , shouldn't go there 
	assert(false);

	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %edx, %ebp
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x40(%rdi), %r15
leaq 0xe7db(%rip), %rsi      # 0x3581f
movq %r15, %rdi
callq 0x50f0
testl %eax, %eax
je 0x27067
leaq 0xe7d1(%rip), %rsi      # 0x35828
movq %r15, %rdi
callq 0x50f0
testl %eax, %eax
jne 0x270e8
movslq %ebp, %rax
movq 0x88(%r14), %rdx
leaq (%rax,%rax,2), %rax
movq (%rdx,%rax,8), %rcx
movq 0x8(%rdx,%rax,8), %rdx
subq %rcx, %rdx
setne %sil
je 0x270b2
sarq $0x3, %rdx
movl $0x1, %edi
xorl %r8d, %r8d
movq (%rcx,%r8,8), %rax
cmpq %rbx, (%rax)
jne 0x270a2
cmpb $0x1, 0x14(%rax)
je 0x270b4
movl %edi, %r8d
incl %edi
cmpq %r8, %rdx
seta %sil
ja 0x27093
jmp 0x270b8
jmp 0x270b8
movq 0x18(%rax), %rax
testb $0x1, %sil
je 0x270c9
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
leaq 0xe442(%rip), %rdi      # 0x35512
leaq 0xf6bc(%rip), %rsi      # 0x36793
leaq 0xf6c6(%rip), %rcx      # 0x367a4
movl $0x168, %edx            # imm = 0x168
callq 0x51d0
leaq 0xf66b(%rip), %rdi      # 0x3675a
leaq 0xf69d(%rip), %rsi      # 0x36793
leaq 0xf6a7(%rip), %rcx      # 0x367a4
movl $0x15d, %edx            # imm = 0x15D
callq 0x51d0
nop
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::missingTagFeaturesHash(unsigned long, int)
vector<int>
Predictor::missingTagFeaturesHash(uint64_t block_addr, int set)
{
	if( m_policy == "Cerebron")
	{
		for(unsigned i = 0 ; i < m_SRAM_missing_tags[set].size() ; i++)
		{
			if(m_SRAM_missing_tags[set][i]->addr == block_addr && m_SRAM_missing_tags[set][i]->isValid)
			{
				return m_SRAM_missing_tags[set][i]->features_hash;
			}
		}	
	}
	return vector<int>();
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %ecx, %ebp
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %rbx
leaq 0x40(%rsi), %rdi
leaq 0xe6fa(%rip), %rsi      # 0x3581f
callq 0x50f0
testl %eax, %eax
je 0x2714a
xorps %xmm0, %xmm0
movups %xmm0, (%rbx)
movq $0x0, 0x10(%rbx)
movq %rbx, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
movslq %ebp, %rax
movq 0x88(%r15), %rcx
leaq (%rax,%rax,2), %rdx
movq (%rcx,%rdx,8), %rax
movq 0x8(%rcx,%rdx,8), %rcx
subq %rax, %rcx
setne %bpl
je 0x2712e
sarq $0x3, %rcx
movl $0x1, %edx
xorl %esi, %esi
movq (%rax,%rsi,8), %rsi
cmpq %r14, (%rsi)
jne 0x27184
cmpb $0x1, 0x14(%rsi)
je 0x27193
movl %edx, %esi
incl %edx
cmpq %rsi, %rcx
seta %bpl
ja 0x27175
jmp 0x2712e
addq $0x20, %rsi
movq %rbx, %rdi
callq 0xcde4
testb $0x1, %bpl
je 0x2712e
jmp 0x2713c
nop
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::checkBypassTag(unsigned long, int)
bool
Predictor::checkBypassTag(uint64_t block_addr , int set)
{	
	for(unsigned i = 0 ; i < BP_missing_tags[set].size() ; i++)
	{	
		if(BP_missing_tags[set][i]->addr == block_addr)
			return true;
	}
	return false;
}

// Assembly:
movslq %edx, %rax
movq 0x140(%rdi), %rdx
leaq (%rax,%rax,2), %rax
movq (%rdx,%rax,8), %rcx
movq 0x8(%rdx,%rax,8), %rdx
subq %rcx, %rdx
setne %al
je 0x271ed
movq (%rcx), %rdi
cmpq %rsi, (%rdi)
je 0x271ed
sarq $0x3, %rdx
movl $0x1, %edi
movl %edi, %edi
cmpq %rdi, %rdx
seta %al
jbe 0x271ed
movq (%rcx,%rdi,8), %r8
incl %edi
cmpq %rsi, (%r8)
jne 0x271d8
retq
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::hitInSRAMMissingTags(unsigned long, int)
bool 
Predictor::hitInSRAMMissingTags(uint64_t block_addr, int id_set)
{
	/* Check if the block is in the missing tag array */ 
	if(m_trackError && !m_isWarmup){
		//An error in the SRAM part is a block that miss in the SRAM array 
		//but not in the MT array
		for(unsigned i = 0 ; i < m_SRAM_missing_tags[id_set].size() ; i++)
		{
			if(m_SRAM_missing_tags[id_set][i]->addr == block_addr && m_SRAM_missing_tags[id_set][i]->isValid)
			{
				////DPRINTF("BasePredictor::checkMissingTags Found SRAM error as %#lx is present in MT tag %i \n", block_addr ,i);  
				return true;
			}
		}	
	}
	return false;
}

// Assembly:
cmpb $0x1, 0x80(%rdi)
jne 0x2742d
cmpb $0x0, 0x81(%rdi)
jne 0x2742d
movslq %edx, %rax
movq 0x88(%rdi), %rcx
leaq (%rax,%rax,2), %rdx
movq (%rcx,%rdx,8), %rax
movq 0x8(%rcx,%rdx,8), %rcx
subq %rax, %rcx
setne %dl
je 0x2742d
sarq $0x3, %rcx
movl $0x1, %edi
xorl %r8d, %r8d
movq (%rax,%r8,8), %r8
cmpq %rsi, (%r8)
jne 0x27417
cmpb $0x0, 0x14(%r8)
jne 0x27426
movl %edi, %r8d
incl %edi
cmpq %r8, %rcx
seta %dl
ja 0x27407
jmp 0x2742d
movb $0x1, %al
testb $0x1, %dl
jne 0x2742f
xorl %eax, %eax
retq
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::hitInNVMMissingTags(unsigned long, int)
bool 
Predictor::hitInNVMMissingTags(uint64_t block_addr, int id_set)
{
	/* Check if the block is in the missing tag array */ 
	if(m_trackError && !m_isWarmup){
		//An error in the NVM part is a block that miss in the NVM array 
		//but not in the MT array
		for(unsigned i = 0 ; i < m_NVM_missing_tags[id_set].size() ; i++)
		{
			if(m_NVM_missing_tags[id_set][i]->addr == block_addr && m_NVM_missing_tags[id_set][i]->isValid)
			{
				return true;
			}
		}	
	}
	return false;
}

// Assembly:
cmpb $0x1, 0x80(%rdi)
jne 0x27493
cmpb $0x0, 0x81(%rdi)
jne 0x27493
movslq %edx, %rax
movq 0xa0(%rdi), %rcx
leaq (%rax,%rax,2), %rdx
movq (%rcx,%rdx,8), %rax
movq 0x8(%rcx,%rdx,8), %rcx
subq %rax, %rcx
setne %dl
je 0x27493
sarq $0x3, %rcx
movl $0x1, %edi
xorl %r8d, %r8d
movq (%rax,%r8,8), %r8
cmpq %rsi, (%r8)
jne 0x2747d
cmpb $0x0, 0x14(%r8)
jne 0x2748c
movl %edi, %r8d
incl %edi
cmpq %r8, %rcx
seta %dl
ja 0x2746d
jmp 0x27493
movb $0x1, %al
testb $0x1, %dl
jne 0x27495
xorl %eax, %eax
retq
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::openNewTimeFrame()
void
Predictor::openNewTimeFrame()
{
	if(m_isWarmup)
		return;
		
	//DPRINTF("BasePredictor::openNewTimeFrame New Time Frame Start\n");  
	stats_NVM_errors.push_back(0);
	stats_SRAM_errors.push_back(0);
	stats_BP_errors.push_back(0);
	stats_MigrationErrors.push_back(0);
	stats_nbLLCaccessPerFrame = 0;

}

// Assembly:
cmpb $0x0, 0x81(%rdi)
jne 0x275a8
pushq %rbx
subq $0x10, %rsp
movq %rdi, %rbx
movl $0x0, 0xc(%rsp)
movq 0x1e8(%rdi), %rsi
cmpq 0x1f0(%rdi), %rsi
je 0x274d6
movl $0x0, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x1e8(%rbx)
jmp 0x274e7
leaq 0x1e0(%rbx), %rdi
leaq 0xc(%rsp), %rdx
callq 0x12568
movl $0x0, 0xc(%rsp)
movq 0x200(%rbx), %rsi
cmpq 0x208(%rbx), %rsi
je 0x27512
movl $0x0, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x200(%rbx)
jmp 0x27523
leaq 0x1f8(%rbx), %rdi
leaq 0xc(%rsp), %rdx
callq 0x12568
movl $0x0, 0xc(%rsp)
movq 0x218(%rbx), %rsi
cmpq 0x220(%rbx), %rsi
je 0x2754e
movl $0x0, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x218(%rbx)
jmp 0x2755f
leaq 0x210(%rbx), %rdi
leaq 0xc(%rsp), %rdx
callq 0x12568
movl $0x0, 0xc(%rsp)
movq 0x230(%rbx), %rsi
cmpq 0x238(%rbx), %rsi
je 0x2758a
movl $0x0, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x230(%rbx)
jmp 0x2759b
leaq 0x228(%rbx), %rdi
leaq 0xc(%rsp), %rdx
callq 0x12568
movq $0x0, 0x78(%rbx)
addq $0x10, %rsp
popq %rbx
retq
nop
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::updatePolicy(unsigned long, unsigned long, bool, Access, bool)
void
Predictor::updatePolicy(uint64_t set, uint64_t index, bool inNVM, Access element , bool isWBrequest = false)
{	
	updateCachePressure();
	
	uint64_t block_addr = bitRemove(element.m_address , 0 , log2(BLOCK_SIZE));
	updateFUcaches(block_addr , inNVM);

	if(m_trackError)
	{
		CacheEntry* current = inNVM ? m_tableNVM[set][index] : m_tableSRAM[set][index];
		updateBypassTag( current , set , inNVM);
	}

	if(!m_isWarmup)
	{	
		stats_nbLLCaccessPerFrame++;
		//An error in the NVM side is when handling a write 
		if(inNVM && element.isWrite()){
			stats_NVM_errors[stats_NVM_errors.size()-1]++;

			if(isWBrequest)
				stats_WBerrors++;
			else
				stats_COREerrors++;
		}
	}
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movl %r8d, %ebx
movl %ecx, %ebp
movq %rdx, %r12
movq %rsi, %r15
movq %rdi, %r14
callq 0x26e4a
movq 0x30(%rsp), %rdi
xorl %esi, %esi
movl $0x6, %edx
callq 0x2e70a
movq %r14, %rdi
movq %rax, %rsi
movl %ebp, %edx
callq 0x26956
cmpb $0x1, 0x80(%r14)
jne 0x27624
movzbl %bpl, %ecx
movq 0x8(%r14,%rcx,8), %rax
movq (%rax), %rax
leaq (%r15,%r15,2), %rdx
movq (%rax,%rdx,8), %rax
movq (%rax,%r12,8), %rsi
movq %r14, %rdi
movl %r15d, %edx
callq 0x26f26
cmpb $0x0, 0x81(%r14)
jne 0x27661
incq 0x78(%r14)
testb %bpl, %bpl
je 0x27661
leaq 0x30(%rsp), %rax
movl 0x1c(%rax), %eax
cmpl $0x6, %eax
je 0x27649
cmpl $0x3, %eax
jne 0x27661
movq 0x1e8(%r14), %rax
incl -0x4(%rax)
xorb $0x1, %bl
movzbl %bl, %eax
incq 0x258(%r14,%rax,8)
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::printBParray(int, std::basic_ofstream<char, std::char_traits<char>>&)
void
Predictor::printBParray(int set , ofstream& out)
{
	for(unsigned i = 0 ; i < BP_missing_tags[set].size() ; i++)
	{
		if(BP_missing_tags[set][i]->isValid)
		{
			string alloc_site = BP_missing_tags[set][i]->allocSite ? "NVM" : "SRAM";
			out << "Index " << i << " - Addr = " << std::hex << BP_missing_tags[set][i]->addr \
			<< std::dec << " - Time = " << BP_missing_tags[set][i]->last_time_touched << " - Allocation = " << alloc_site << endl;		
		}
	}
	
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movslq %esi, %rcx
movq 0x140(%rdi), %rax
leaq (%rcx,%rcx,2), %rbp
movq (%rax,%rbp,8), %rcx
cmpq %rcx, 0x8(%rax,%rbp,8)
je 0x27834
movq %rdx, %rbx
movq %rdi, %r14
leaq (%rax,%rbp,8), %rax
movl $0x1, %r15d
xorl %r12d, %r12d
movq (%rcx,%r12,8), %rcx
cmpb $0x1, 0x14(%rcx)
jne 0x2780c
movq (%rax), %rax
movq (%rax,%r12,8), %rax
movzbl 0x16(%rax), %eax
testq %rax, %rax
leaq 0xd14a(%rip), %rsi      # 0x34815
leaq 0xd13a(%rip), %rcx      # 0x3480c
cmovneq %rcx, %rsi
leaq 0x18(%rsp), %rcx
movq %rcx, 0x8(%rsp)
movq %rsi, %rdx
subq %rax, %rdx
addq $0x4, %rdx
leaq 0x8(%rsp), %rdi
callq 0xccac
movl $0x6, %edx
movq %rbx, %rdi
leaq 0xf147(%rip), %rsi      # 0x3684a
callq 0x5350
movq %rbx, %rdi
movq %r12, %rsi
callq 0x51e0
movq %rax, %r13
movl $0xa, %edx
movq %rax, %rdi
leaq 0xf12c(%rip), %rsi      # 0x36851
callq 0x5350
movq (%r13), %rax
movq -0x18(%rax), %rax
movl 0x18(%r13,%rax), %ecx
andl $-0x4b, %ecx
orl $0x8, %ecx
movl %ecx, 0x18(%r13,%rax)
movq 0x140(%r14), %rax
movq (%rax,%rbp,8), %rax
movq (%rax,%r12,8), %rax
movq (%rax), %rsi
movq %r13, %rdi
callq 0x51e0
movq %rax, %r13
movq (%rax), %rax
movq -0x18(%rax), %rax
movl 0x18(%r13,%rax), %ecx
andl $-0x4b, %ecx
orl $0x2, %ecx
movl %ecx, 0x18(%r13,%rax)
movl $0xa, %edx
movq %r13, %rdi
leaq 0xf0d7(%rip), %rsi      # 0x3685c
callq 0x5350
movq 0x140(%r14), %rax
movq (%rax,%rbp,8), %rax
movq (%rax,%r12,8), %rax
movq 0x8(%rax), %rsi
movq %r13, %rdi
callq 0x51e0
movq %rax, %r12
movl $0x10, %edx
movq %rax, %rdi
leaq 0xf0b0(%rip), %rsi      # 0x36867
callq 0x5350
movq 0x8(%rsp), %rsi
movq 0x10(%rsp), %rdx
movq %r12, %rdi
callq 0x5350
movq %rax, %r12
movq (%rax), %rax
movq -0x18(%rax), %rdi
addq %r12, %rdi
movl $0xa, %esi
callq 0x52b0
movsbl %al, %esi
movq %r12, %rdi
callq 0x5030
movq %rax, %rdi
callq 0x51f0
movq 0x8(%rsp), %rdi
leaq 0x18(%rsp), %rax
cmpq %rax, %rdi
je 0x2780c
callq 0x52a0
movl %r15d, %r12d
movq 0x140(%r14), %rax
leaq (%rax,%rbp,8), %rax
movq (%rax), %rcx
movq 0x8(%rax), %rdx
subq %rcx, %rdx
sarq $0x3, %rdx
incl %r15d
cmpq %r12, %rdx
ja 0x276a8
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
movq 0x8(%rsp), %rdi
leaq 0x18(%rsp), %rax
cmpq %rax, %rdi
je 0x2785a
callq 0x52a0
movq %rbx, %rdi
callq 0x55a0
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::getMissPCfromBPtags(unsigned long, int)
uint64_t 
Predictor::getMissPCfromBPtags(uint64_t block_addr , int set)
{
	for(unsigned i = 0 ; i < BP_missing_tags[set].size(); i++)
	{
		if( block_addr == BP_missing_tags[set][i]->addr && BP_missing_tags[set][i]->isValid)
			return BP_missing_tags[set][i]->missPC;
	}
	assert(false);
	return 0;
}

// Assembly:
pushq %rax
movslq %edx, %rax
movq 0x140(%rdi), %rdx
leaq (%rax,%rax,2), %rax
movq (%rdx,%rax,8), %rcx
movq 0x8(%rdx,%rax,8), %rdx
subq %rcx, %rdx
setne %dil
je 0x27990
sarq $0x3, %rdx
movl $0x1, %r8d
xorl %r9d, %r9d
movq (%rcx,%r9,8), %rax
cmpq %rsi, (%rax)
jne 0x2797f
cmpb $0x1, 0x14(%rax)
je 0x27992
movl %r8d, %r9d
incl %r8d
cmpq %r9, %rdx
seta %dil
ja 0x27970
jmp 0x27996
jmp 0x27996
movq 0x18(%rax), %rax
testb $0x1, %dil
je 0x2799e
popq %rcx
retq
leaq 0xdb6d(%rip), %rdi      # 0x35512
leaq 0xede7(%rip), %rsi      # 0x36793
leaq 0xeec5(%rip), %rcx      # 0x36878
movl $0x2e3, %edx            # imm = 0x2E3
callq 0x51d0
nop
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::getAllocSitefromBPtags(unsigned long, int)
bool 
Predictor::getAllocSitefromBPtags( uint64_t addr , int set)
{
	for(unsigned i = 0 ; i < BP_missing_tags[set].size(); i++)
	{
		if( addr == BP_missing_tags[set][i]->addr && BP_missing_tags[set][i]->isValid)
			return BP_missing_tags[set][i]->allocSite;
	}
	assert(false);
	return false;
}

// Assembly:
pushq %rax
movslq %edx, %rax
movq 0x140(%rdi), %rdx
leaq (%rax,%rax,2), %rax
movq (%rdx,%rax,8), %rcx
movq 0x8(%rdx,%rax,8), %rdx
subq %rcx, %rdx
setne %dil
je 0x27a0c
sarq $0x3, %rdx
movl $0x1, %r8d
xorl %r9d, %r9d
movq (%rcx,%r9,8), %rax
cmpq %rsi, (%rax)
jne 0x279fb
cmpb $0x1, 0x14(%rax)
je 0x27a0e
movl %r8d, %r9d
incl %r8d
cmpq %r9, %rdx
seta %dil
ja 0x279ec
jmp 0x27a11
jmp 0x27a11
movb 0x16(%rax), %al
testb $0x1, %dil
je 0x27a1b
andb $0x1, %al
popq %rcx
retq
leaq 0xdaf0(%rip), %rdi      # 0x35512
leaq 0xed6a(%rip), %rsi      # 0x36793
leaq 0xee7f(%rip), %rcx      # 0x368af
movl $0x2ef, %edx            # imm = 0x2EF
callq 0x51d0
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::getHitPerDataArray(unsigned long, int, bool)
bool
Predictor::getHitPerDataArray(uint64_t block_addr, int set , bool inNVM)
{
	uint64_t ref_time = 0;
	bool find = false;
	for(unsigned i = 0 ; i < BP_missing_tags[set].size() && !find; i++)
	{
		if( block_addr == BP_missing_tags[set][i]->addr && BP_missing_tags[set][i]->isValid)
		{
			ref_time = BP_missing_tags[set][i]->last_time_touched;
			find = true;		
		}
	}
	
	if(!find)
		return false;
	
	/*string str_inNVM = inNVM ? "TRUE" : "FALSE";
	cout << "*** Call getHitPerDataArray with inNVM =" << str_inNVM << endl;
	cout << "Block is " << std::hex << block_addr << ", ref_time = " << ref_time << endl;
	for(unsigned i = 0 ; i < BP_missing_tags[set].size() ; i++)
	{
		if(BP_missing_tags[set][i]->isValid)
		{
			string alloc_site = BP_missing_tags[set][i]->allocSite ? "NVM" : "SRAM";
			cout << "Index " << i << " - Addr = " << std::hex << BP_missing_tags[set][i]->addr \
			<< std::dec << " - Time = " << BP_missing_tags[set][i]->last_time_touched << " - Allocation = " << alloc_site << endl;		
		}
	}
	*/
	int pos = 0;
	
	for(unsigned i = 0 ; i < BP_missing_tags[set].size() ; i++)
	{
		if( BP_missing_tags[set][i]->isValid && \
			BP_missing_tags[set][i]->allocSite == inNVM && \
			ref_time < BP_missing_tags[set][i]->last_time_touched)
		{
			pos++;
		}
	}

	//cout << "pos = " << pos << endl;
	if(inNVM)
		return pos < simu_parameters.nvm_assoc ? true : false;
	else
		return pos < simu_parameters.sram_assoc ? true : false;
}

// Assembly:
movslq %edx, %rax
movq 0x140(%rdi), %rdi
leaq (%rax,%rax,2), %rax
movq (%rdi,%rax,8), %rdx
movq 0x8(%rdi,%rax,8), %r9
movq %r9, %rdi
subq %rdx, %rdi
sarq $0x3, %rdi
cmpq %rdx, %r9
je 0x27a97
movl $0x1, %eax
xorl %r11d, %r11d
xorl %r10d, %r10d
xorl %r8d, %r8d
movq (%rdx,%r11,8), %r11
cmpq %rsi, (%r11)
jne 0x27a85
cmpb $0x1, 0x14(%r11)
jne 0x27a85
movq 0x8(%r11), %r8
movb $0x1, %r10b
movl %eax, %r11d
cmpq %r11, %rdi
jbe 0x27a9d
incl %eax
testb $0x1, %r10b
je 0x27a6e
jmp 0x27a9d
xorl %r8d, %r8d
xorl %r10d, %r10d
xorl %eax, %eax
testb $0x1, %r10b
je 0x27ae2
cmpq %rdx, %r9
je 0x27ad1
xorl %esi, %esi
xorl %eax, %eax
movq (%rdx,%rsi,8), %r9
cmpb $0x1, 0x14(%r9)
jne 0x27ac6
cmpb %cl, 0x16(%r9)
jne 0x27ac6
cmpq 0x8(%r9), %r8
adcl $0x0, %eax
incq %rsi
movl %esi, %r9d
cmpq %r9, %rdi
ja 0x27aae
leaq 0x1e478(%rip), %rdx     # 0x45f50
movzbl %cl, %ecx
cmpl 0x38(%rdx,%rcx,8), %eax
setl %al
retq
nop
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Predictor.hh
// Function: MissingTagEntry::initFeaturesHash(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
void initFeaturesHash(std::string policy)
		{
			if( policy == "Cerebron")	
				features_hash = std::vector<int>( simu_parameters.PHC_features.size() , 0);
			//else if (policy == "SimplePerceptron")
			//	features_hash = std::vector<int>( simu_parameters.simple_perceptron_features.size() , 0);
		}

// Assembly:
pushq %r14
pushq %rbx
subq $0x28, %rsp
movq %rsi, %rax
movq %rdi, %rbx
leaq 0xcf93(%rip), %rsi      # 0x3581f
movq %rax, %rdi
callq 0x50f0
testl %eax, %eax
jne 0x28916
leaq 0x1d6b1(%rip), %rax     # 0x45f50
movq 0x1d8(%rax), %rsi
subq 0x1d0(%rax), %rsi
sarq $0x5, %rsi
leaq 0xc(%rsp), %rdx
movl $0x0, (%rdx)
leaq 0x10(%rsp), %r14
leaq 0xb(%rsp), %rcx
movq %r14, %rdi
callq 0x15482
movq 0x20(%rbx), %rdi
movaps (%r14), %xmm0
movq 0x10(%r14), %rax
movq %rdi, (%r14)
movups 0x28(%rbx), %xmm1
movups %xmm0, 0x20(%rbx)
movq %rax, 0x30(%rbx)
movups %xmm1, 0x8(%r14)
xorps %xmm0, %xmm0
movaps %xmm0, (%r14)
movq $0x0, 0x10(%r14)
testq %rdi, %rdi
je 0x28907
callq 0x52a0
movq 0x10(%rsp), %rdi
testq %rdi, %rdi
je 0x28916
callq 0x52a0
addq $0x28, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/Prefetcher.cc
// Function: SimplePrefetcher::SimplePrefetcher(int, int, bool)
void
SimplePrefetcher::generatePrefetch(uint64_t address, bool isHit, bool isInst)
{
/*	//DPRINTF("SimplePrefetcher::generatePrefetch");
	vector<uint64_t> prefetch_addresses = getNextAddress(address);
	
	for(auto p : prefetch_addresses)
	{
		Access request;
		request.m_address = p;
		request.m_type = isInst ? MemCmd::DATA_PREFETCH : MemCmd::INST_PREFETCH;
		prefetchAddress(request);
	}
*/
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movl %esi, 0x8(%rdi)
movl %edx, 0x10(%rdi)
movb %cl, 0x14(%rdi)
leaq 0x1b888(%rip), %rax     # 0x44af8
movq %rax, (%rdi)
leaq 0x18(%rdi), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 0x18(%rdi)
movq $0x0, 0x28(%rdi)
movslq %edx, %rsi
movq %rbx, %rdi
callq 0x29590
addq $0x8, %rsp
popq %rbx
popq %r14
retq
movq %rax, %r14
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x292a9
callq 0x52a0
movq %r14, %rdi
callq 0x55a0
nop
// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/ReplacementPolicy.cc
// Function: LRUPolicy::evictPolicy(int)
int
LRUPolicy::evictPolicy(int set)
{
	int smallest_time = m_cache_entries[set][0]->policyInfo , smallest_index = 0;

	for(int i = 0 ; i < m_assoc ; i++){
		if(!m_cache_entries[set][i]->isValid) 
			return i;
	}
	
	for(int i = 0 ; i < m_assoc ; i++){
		if(m_cache_entries[set][i]->policyInfo < smallest_time){
			smallest_time =  m_cache_entries[set][i]->policyInfo;
			smallest_index = i;
		}
	}
	return smallest_index;
}

// Assembly:
movslq %esi, %rax
movq 0x8(%rdi), %rcx
leaq (%rax,%rax,2), %rax
movq (%rcx,%rax,8), %rcx
movq (%rcx), %rax
movl 0x38(%rax), %edx
movslq 0x24(%rdi), %rsi
testq %rsi, %rsi
jle 0x29845
xorl %eax, %eax
movq (%rcx,%rax,8), %rdi
cmpb $0x1, (%rdi)
jne 0x29867
incq %rax
cmpq %rax, %rsi
jne 0x29834
testl %esi, %esi
jle 0x29868
xorl %edi, %edi
xorl %eax, %eax
movq (%rcx,%rdi,8), %r8
movl 0x38(%r8), %r8d
cmpl %edx, %r8d
cmovll %r8d, %edx
cmovll %edi, %eax
incq %rdi
cmpq %rdi, %rsi
jne 0x2984d
retq
xorl %eax, %eax
retq
nop