// File: /workspace/github_cpp_makefile_star2_O3/jkingan[P]ladyheather/heathgps.cpp
// Function: show_ticc_config(int)
int show_ticc_config(int row)
{
int col;
int i;
int max_row;

   if(text_mode && first_key) return row;
   if(zoom_screen) return row;
   if(luxor) return row;
   if(rcvr_type == NO_RCVR) return row;
   if(rcvr_type == TIDE_RCVR) return row;

   max_row = queue_row;
   row = MINOR_ROW;
   col = MINOR_COL;
   if(!have_critical_alarms) row = CRIT_ROW;

   for(i=row; i<max_row; i++) {  // clear out old info
      sprintf(out, "                 ");
      vidstr(i,col, WHITE, out);
   }

   if(ticc_type == LARS_TICC) {
      sprintf(out,    "Lars config:     ");
   }
   else if(ticc_type != TAPR_TICC) {
      sprintf(out,    "Counter config:  ");
   }
   else if(user_set_ticc_mode) {
      sprintf(out,    "TICC config not available");
   }
   else {
      sprintf(out,    "TICC Config:     ");
   }

   vidstr(row,col, WHITE, out);
   ++row;
   if(osc_params && all_adevs) {
      if(first_key == 0) {
         vidstr(row,col, YELLOW, "Press key for normal display");
      }
      else {
         vidstr(row,col, YELLOW, "                            ");
      }
   }

   if(have_ticc_edges & 0x01) {
      sprintf(out,      "chA edge:  %c", edge_a);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_edges & 0x02) {
      sprintf(out,      "chB edge:  %c", edge_b);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_edges & 0x04) {
      sprintf(out,      "chC edge:  %c", edge_c);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_edges & 0x08) {
      sprintf(out,      "chD edge:  %c", edge_d);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }

   if(have_ticc_fudge & 0x01) {
      sprintf(out,      "chA Fudge: %g ps", fudge_a);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_fudge & 0x02) {
      sprintf(out,      "chB Fudge: %g ps", fudge_b);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_fudge & 0x04) {
      sprintf(out,      "chC Fudge: %g ps", fudge_c);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_fudge & 0x08) {
      sprintf(out,      "chD Fudge: %g ps", fudge_d);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }

   if(have_ticc_time2 & 0x01) {
      sprintf(out,      "chA TIME2: %d", time2_a);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_time2 & 0x02) {
      sprintf(out,      "chB TIME2: %d", time2_b);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_time2 & 0x04) {
      sprintf(out,      "chC TIME2: %d", time2_c);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_time2 & 0x08) {
      sprintf(out,      "chD TIME2: %d", time2_d);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }

   if(have_ticc_dilat & 0x01) {
      sprintf(out,      "chA Dilat: %d", dilat_a);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_dilat & 0x02) {
      sprintf(out,      "chB Dilat: %d", dilat_b);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_dilat & 0x04) {
      sprintf(out,      "chC Dilat: %d", dilat_c);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_dilat & 0x08) {
      sprintf(out,      "chD Dilat: %d", dilat_d);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }

   if(have_ticc_timeout) {
      sprintf(out,      "Timeout:   %d", ticc_timeout);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_syncmode) {
      sprintf(out,      "Sync mode: %c", ticc_syncmode);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_cal) {
      sprintf(out,      "Cal periods: %d", ticc_cal);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_speed) {
      sprintf(out,      "Clock: %.3f MHz", ticc_speed);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }
   if(have_ticc_coarse) {
      sprintf(out,      "Coarse: %.1f us", ticc_coarse);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }


   sprintf(out,         "chA NomF: %g Hz", nominal_cha_freq);
   if(++row >= max_row) return row;
   vidstr(row,col, WHITE, out);

   if(ticc_mode == 'I') {
      sprintf(out,      "chA wrap: %g sec", cha_phase_wrap_interval);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }

   if(two_ticc_mode()) {
      sprintf(out,      "chB nomF: %g Hz", nominal_chb_freq);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);

      if(ticc_mode == 'I') {
         sprintf(out,      "chB wrap: %g sec", chb_phase_wrap_interval);
         if(++row >= max_row) return row;
         vidstr(row,col, WHITE, out);
      }
   }

   if(ticc_type == LARS_TICC) {
      sprintf(out,      "OSC gain: %g Hz/V", lars_gain);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);

      sprintf(out,      "DACinitv: %g     ", lars_initv);
      if(++row >= max_row) return row;
      vidstr(row,col, WHITE, out);
   }

   return row;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
leaq 0x16840b(%rip), %rax    # 0x2187d8
cmpl $0x0, (%rax)
sete %al
leaq 0x18eb7e(%rip), %rbx    # 0x23ef58
cmpl $0x0, (%rbx)
movl %edi, %r15d
sete %cl
orb %al, %cl
cmpb $0x1, %cl
jne 0xb0cf2
leaq 0x25c3b3(%rip), %rax    # 0x30c7a8
cmpb $0x0, (%rax)
jne 0xb0cf2
leaq 0x18eb39(%rip), %rax    # 0x23ef3e
cmpb $0x0, (%rax)
jne 0xb0cf2
leaq 0x1684bb(%rip), %rax    # 0x2188d0
movq (%rax), %rax
cmpq $0x400, %rax            # imm = 0x400
je 0xb0cf2
cmpq $0x800000, %rax         # imm = 0x800000
je 0xb0cf2
leaq 0x168399(%rip), %rax    # 0x2187d0
movl (%rax), %r13d
leaq 0x16835b(%rip), %rax    # 0x21879c
movl (%rax), %esi
leaq 0x25ce5e(%rip), %rax    # 0x30d2a8
movl (%rax), %eax
testl %eax, %eax
movl $0x6, %r15d
cmovel %eax, %r15d
cmpl %r13d, %r15d
movl %esi, -0x2c(%rbp)
jge 0xb049a
leaq 0x28bdb9(%rip), %r14    # 0x33c220
movl %r15d, %r12d
movups 0x836e3(%rip), %xmm0    # 0x133b54
movaps %xmm0, (%r14)
movw $0x20, 0x10(%r14)
movl %r12d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
movq %r14, %rcx
callq 0xe787
movl -0x2c(%rbp), %esi
incl %r12d
cmpl %r12d, %r13d
jne 0xb046a
movl %r13d, %r12d
leaq 0x168464(%rip), %r13    # 0x218908
movl (%r13), %eax
cmpl $0x54, %eax
je 0xb04bb
cmpl $0x4c, %eax
jne 0xb04e5
movups 0x782c5(%rip), %xmm0    # 0x12877e
jmp 0xb04f5
leaq 0x25c852(%rip), %rax    # 0x30cd14
cmpl $0x0, (%rax)
je 0xb04ee
movups 0x782de(%rip), %xmm0    # 0x1287ac
leaq 0x28bd4b(%rip), %rax    # 0x33c220
movups %xmm0, 0xa(%rax)
movups 0x782c2(%rip), %xmm0    # 0x1287a2
movaps %xmm0, (%rax)
jmp 0xb0505
movups 0x782a4(%rip), %xmm0    # 0x128790
jmp 0xb04f5
movups 0x782c7(%rip), %xmm0    # 0x1287bc
leaq 0x28bd24(%rip), %rax    # 0x33c220
movaps %xmm0, (%rax)
movw $0x20, 0x10(%rax)
leaq 0x28bd14(%rip), %rcx    # 0x33c220
movl %r15d, %edi
movl $0xf, %edx
callq 0xe787
movl %r15d, %r14d
orl $0x1, %r14d
leaq 0x25cbc5(%rip), %rax    # 0x30d0ec
cmpb $0x0, (%rax)
je 0xb055d
leaq 0x18c80b(%rip), %rax    # 0x23cd3e
cmpb $0x0, (%rax)
je 0xb055d
cmpl $0x0, (%rbx)
leaq 0x7828c(%rip), %rax     # 0x1287ce
leaq 0x83600(%rip), %rcx     # 0x133b49
cmoveq %rax, %rcx
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xe, %edx
callq 0xe787
leaq 0x25c820(%rip), %rbx    # 0x30cd84
movl (%rbx), %eax
testb $0x1, %al
je 0xb05b1
leaq 0x25c803(%rip), %rax    # 0x30cd74
movl (%rax), %edx
leaq 0x28bca6(%rip), %rdi    # 0x33c220
leaq 0x7826a(%rip), %rsi     # 0x1287eb
xorl %eax, %eax
callq 0x9060
addl $0x2, %r15d
cmpl %r12d, %r15d
jge 0xb0cf2
leaq 0x28bc84(%rip), %rcx    # 0x33c220
movl %r15d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
movl (%rbx), %eax
movl %r15d, %r14d
testb $0x2, %al
jne 0xb05ba
movl %r12d, %r15d
jmp 0xb0600
leaq 0x25c7b7(%rip), %rax    # 0x30cd78
movl (%rax), %edx
leaq 0x28bc56(%rip), %rdi    # 0x33c220
leaq 0x78228(%rip), %rsi     # 0x1287f9
xorl %eax, %eax
callq 0x9060
incl %r14d
cmpl %r12d, %r14d
jge 0xb0cef
movl %r12d, %r15d
leaq 0x28bc32(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
movl (%rbx), %eax
testb $0x4, %al
je 0xb0647
leaq 0x25c771(%rip), %rax    # 0x30cd7c
movl (%rax), %edx
leaq 0x28bc0c(%rip), %rdi    # 0x33c220
leaq 0x781ec(%rip), %rsi     # 0x128807
xorl %eax, %eax
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28bbeb(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
movl (%rbx), %eax
testb $0x8, %al
je 0xb068c
leaq 0x25c72e(%rip), %rax    # 0x30cd80
movl (%rax), %edx
leaq 0x28bbc5(%rip), %rdi    # 0x33c220
leaq 0x781b3(%rip), %rsi     # 0x128815
xorl %eax, %eax
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28bba4(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
leaq 0x25c6dd(%rip), %rbx    # 0x30cd70
movl (%rbx), %eax
testb $0x1, %al
je 0xb06de
leaq 0x25c6b0(%rip), %rax    # 0x30cd50
movsd (%rax), %xmm0
leaq 0x28bb75(%rip), %rdi    # 0x33c220
leaq 0x78171(%rip), %rsi     # 0x128823
movb $0x1, %al
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28bb54(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
movl (%rbx), %eax
testb $0x2, %al
je 0xb0727
leaq 0x25c66f(%rip), %rax    # 0x30cd58
movsd (%rax), %xmm0
leaq 0x28bb2c(%rip), %rdi    # 0x33c220
leaq 0x78139(%rip), %rsi     # 0x128834
movb $0x1, %al
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28bb0b(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
movl (%rbx), %eax
testb $0x4, %al
je 0xb0770
leaq 0x25c62e(%rip), %rax    # 0x30cd60
movsd (%rax), %xmm0
leaq 0x28bae3(%rip), %rdi    # 0x33c220
leaq 0x78101(%rip), %rsi     # 0x128845
movb $0x1, %al
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28bac2(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
movl (%rbx), %eax
testb $0x8, %al
je 0xb07b7
leaq 0x25c5ed(%rip), %rax    # 0x30cd68
movsd (%rax), %xmm0
leaq 0x28ba9a(%rip), %rdi    # 0x33c220
leaq 0x780c9(%rip), %rsi     # 0x128856
movb $0x1, %al
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28ba79(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
leaq 0x25c5da(%rip), %rbx    # 0x30cd98
movl (%rbx), %eax
testb $0x1, %al
je 0xb0807
leaq 0x25c5bd(%rip), %rax    # 0x30cd88
movl (%rax), %edx
leaq 0x28ba4c(%rip), %rdi    # 0x33c220
leaq 0x7808c(%rip), %rsi     # 0x128867
xorl %eax, %eax
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28ba2b(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
movl (%rbx), %eax
testb $0x2, %al
je 0xb084e
leaq 0x25c57a(%rip), %rax    # 0x30cd8c
movl (%rax), %edx
leaq 0x28ba05(%rip), %rdi    # 0x33c220
leaq 0x78053(%rip), %rsi     # 0x128875
xorl %eax, %eax
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28b9e4(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
movl (%rbx), %eax
testb $0x4, %al
je 0xb0895
leaq 0x25c537(%rip), %rax    # 0x30cd90
movl (%rax), %edx
leaq 0x28b9be(%rip), %rdi    # 0x33c220
leaq 0x7801a(%rip), %rsi     # 0x128883
xorl %eax, %eax
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28b99d(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
movl (%rbx), %eax
testb $0x8, %al
je 0xb08da
leaq 0x25c4f4(%rip), %rax    # 0x30cd94
movl (%rax), %edx
leaq 0x28b977(%rip), %rdi    # 0x33c220
leaq 0x77fe1(%rip), %rsi     # 0x128891
xorl %eax, %eax
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28b956(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
leaq 0x25c4cb(%rip), %rbx    # 0x30cdac
movl (%rbx), %eax
testb $0x1, %al
je 0xb092a
leaq 0x25c4ae(%rip), %rax    # 0x30cd9c
movl (%rax), %edx
leaq 0x28b929(%rip), %rdi    # 0x33c220
leaq 0x77fa1(%rip), %rsi     # 0x12889f
xorl %eax, %eax
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28b908(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
movl (%rbx), %eax
testb $0x2, %al
je 0xb0971
leaq 0x25c46b(%rip), %rax    # 0x30cda0
movl (%rax), %edx
leaq 0x28b8e2(%rip), %rdi    # 0x33c220
leaq 0x77f68(%rip), %rsi     # 0x1288ad
xorl %eax, %eax
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28b8c1(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
movl (%rbx), %eax
testb $0x4, %al
je 0xb09b8
leaq 0x25c428(%rip), %rax    # 0x30cda4
movl (%rax), %edx
leaq 0x28b89b(%rip), %rdi    # 0x33c220
leaq 0x77f2f(%rip), %rsi     # 0x1288bb
xorl %eax, %eax
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28b87a(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
movl (%rbx), %eax
testb $0x8, %al
je 0xb09fd
leaq 0x25c3e5(%rip), %rax    # 0x30cda8
movl (%rax), %edx
leaq 0x28b854(%rip), %rdi    # 0x33c220
leaq 0x77ef6(%rip), %rsi     # 0x1288c9
xorl %eax, %eax
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28b833(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
leaq 0x25c328(%rip), %rax    # 0x30cd2c
cmpl $0x0, (%rax)
je 0xb0a4a
leaq 0x25c318(%rip), %rax    # 0x30cd28
movl (%rax), %edx
leaq 0x28b807(%rip), %rdi    # 0x33c220
leaq 0x77eb7(%rip), %rsi     # 0x1288d7
xorl %eax, %eax
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28b7e6(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
leaq 0x25c2cb(%rip), %rax    # 0x30cd1c
cmpl $0x0, (%rax)
je 0xb0a97
leaq 0x25c2bb(%rip), %rax    # 0x30cd18
movl (%rax), %edx
leaq 0x28b7ba(%rip), %rdi    # 0x33c220
leaq 0x77e78(%rip), %rsi     # 0x1288e5
xorl %eax, %eax
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28b799(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
leaq 0x25c286(%rip), %rax    # 0x30cd24
cmpl $0x0, (%rax)
je 0xb0ae4
leaq 0x25c276(%rip), %rax    # 0x30cd20
movl (%rax), %edx
leaq 0x28b76d(%rip), %rdi    # 0x33c220
leaq 0x77e39(%rip), %rsi     # 0x1288f3
xorl %eax, %eax
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28b74c(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
leaq 0x25c24d(%rip), %rax    # 0x30cd38
cmpl $0x0, (%rax)
je 0xb0b33
leaq 0x25c239(%rip), %rax    # 0x30cd30
movsd (%rax), %xmm0
leaq 0x28b71e(%rip), %rdi    # 0x33c220
leaq 0x77dfa(%rip), %rsi     # 0x128903
movb $0x1, %al
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28b6fd(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
leaq 0x25c20e(%rip), %rax    # 0x30cd48
cmpl $0x0, (%rax)
je 0xb0b82
leaq 0x25c1fa(%rip), %rax    # 0x30cd40
movsd (%rax), %xmm0
leaq 0x28b6cf(%rip), %rdi    # 0x33c220
leaq 0x77dbb(%rip), %rsi     # 0x128913
movb $0x1, %al
callq 0x9060
incl %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28b6ae(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
leaq 0x25bddf(%rip), %rax    # 0x30c968
movsd (%rax), %xmm0
leaq 0x28b68c(%rip), %rdi    # 0x33c220
leaq 0x77d88(%rip), %rsi     # 0x128923
movb $0x1, %al
callq 0x9060
leal 0x1(%r14), %edi
cmpl %r15d, %edi
jge 0xb0d04
leaq 0x28b66a(%rip), %rcx    # 0x33c220
movq %rdi, %rbx
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
leaq 0x25c13f(%rip), %rax    # 0x30cd0c
cmpl $0x49, (%rax)
jne 0xb0c19
leaq 0x25bdaf(%rip), %rax    # 0x30c988
movsd (%rax), %xmm0
leaq 0x28b63c(%rip), %rdi    # 0x33c220
leaq 0x77d48(%rip), %rsi     # 0x128933
movb $0x1, %al
callq 0x9060
addl $0x2, %r14d
cmpl %r15d, %r14d
jge 0xb0cef
leaq 0x28b61a(%rip), %rcx    # 0x33c220
movl %r14d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
movl %r14d, %ebx
leaq 0x167cb0(%rip), %rax    # 0x2188d0
cmpq $0x10000, (%rax)        # imm = 0x10000
jne 0xb0d09
leaq 0x18d764(%rip), %rax    # 0x23e398
cmpq $0x0, (%rax)
jne 0xb0c5b
leaq 0x25d69f(%rip), %rax    # 0x30e2e0
cmpl $0x0, 0x1e114(%rax)
je 0xb0d09
cmpl $0x0, 0x1e110(%rax)
jle 0xb0d09
leaq 0x25bd0e(%rip), %rax    # 0x30c970
movsd (%rax), %xmm0
leaq 0x28b5b3(%rip), %rdi    # 0x33c220
leaq 0x77cd0(%rip), %rsi     # 0x128944
movb $0x1, %al
callq 0x9060
leal 0x1(%rbx), %r15d
cmpl %r12d, %r15d
jge 0xb0cf2
leaq 0x28b595(%rip), %rcx    # 0x33c220
movl %r15d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
leaq 0x25c06a(%rip), %rax    # 0x30cd0c
cmpl $0x49, (%rax)
jne 0xb0d0c
leaq 0x25bce2(%rip), %rax    # 0x30c990
movsd (%rax), %xmm0
leaq 0x28b567(%rip), %rdi    # 0x33c220
leaq 0x77c94(%rip), %rsi     # 0x128954
movb $0x1, %al
callq 0x9060
addl $0x2, %ebx
movq %rbx, %r15
cmpl %r12d, %ebx
jge 0xb0da0
leaq 0x28b543(%rip), %rcx    # 0x33c220
movl %r15d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
jmp 0xb0d0c
movl %r14d, %r15d
movl %r15d, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movl %edi, %r15d
jmp 0xb0cf2
movl %ebx, %r15d
cmpl $0x4c, (%r13)
jne 0xb0cf2
leaq 0x25c3f6(%rip), %rax    # 0x30d110
movsd (%rax), %xmm0
leaq 0x28b4fb(%rip), %rdi    # 0x33c220
leaq 0x77c39(%rip), %rsi     # 0x128965
movb $0x1, %al
callq 0x9060
leal 0x1(%r15), %edi
cmpl %r12d, %edi
jge 0xb0d98
leaq 0x28b4dd(%rip), %r14    # 0x33c220
movl -0x2c(%rbp), %esi
movl $0xf, %edx
movq %r14, %rcx
callq 0xe787
leaq 0x25c3fe(%rip), %rax    # 0x30d158
movsd (%rax), %xmm0
leaq 0x77c12(%rip), %rsi     # 0x128977
movq %r14, %rdi
movb $0x1, %al
callq 0x9060
addl $0x2, %r15d
cmpl %r12d, %r15d
jge 0xb0cf2
leaq 0x28b49d(%rip), %rcx    # 0x33c220
movl %r15d, %edi
movl -0x2c(%rbp), %esi
movl $0xf, %edx
callq 0xe787
jmp 0xb0cf2
movl %edi, %r15d
jmp 0xb0cf2
jmp 0xb0cf2