// File: CMU-SAFARI[P]MQSim/src/ssd/ONFI_Channel_NVDDR2.cpp
// Function: SSD_Components::ONFI_Channel_NVDDR2::ONFI_Channel_NVDDR2(unsigned int, unsigned int, NVM::FlashMemory::Flash_Chip**, unsigned int, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long)
ONFI_Channel_NVDDR2::ONFI_Channel_NVDDR2(flash_channel_ID_type channelID, unsigned int chipCount, NVM::FlashMemory::Flash_Chip** flashChips, unsigned int ChannelWidth,
		sim_time_type t_RC, sim_time_type t_DSC,
		sim_time_type t_DBSY, sim_time_type t_CS, sim_time_type t_RR,
		sim_time_type t_WB, sim_time_type t_WC, sim_time_type t_ADL, sim_time_type t_CALS,
		sim_time_type t_DQSRE, sim_time_type t_RPRE, sim_time_type t_RHW, sim_time_type t_CCS,
		sim_time_type t_WPST, sim_time_type t_WPSTH)
		: ONFI_Channel_Base(channelID, chipCount, flashChips, ONFI_Protocol::NVDDR2),
		ChannelWidth(ChannelWidth),
		t_RC(t_RC), t_DSC(t_DSC), t_DBSY(t_DBSY), t_CS(t_CS), t_RR(t_RR), t_WB(t_WB), t_WC(t_WC), t_ADL(t_ADL),
		t_CALS(t_CALS), t_DQSRE(t_DQSRE), t_RPRE(t_RPRE), t_RHW(t_RHW), t_CCS(t_CCS), t_WPST(t_WPST), t_WPSTH(t_WPSTH)
	{
		ReadCommandTime[1] = t_CS + t_WC * 6 + t_WB + t_RR;
		ReadCommandTime[2] = t_CS + 6 * t_WC + t_DBSY + 6 * t_WC + t_WB + t_RR;
		ReadCommandTime[3] = t_CS + 6 * t_WC + t_DBSY + 6 * t_WC + t_DBSY + 6 * t_WC + t_WB + t_RR;
		ReadCommandTime[4] = t_CS + 6 * t_WC + t_DBSY + 6 * t_WC + t_DBSY + 6 * t_WC + t_DBSY + 6 * t_WC + t_WB + t_RR;
		ReadDataOutSetupTime = t_RPRE + t_DQSRE;
		ReadDataOutSetupTime_TwoPlane = t_RPRE + t_DQSRE + t_RHW + 6 * t_WC + t_CCS + t_RPRE + t_DQSRE;
		ReadDataOutSetupTime_ThreePlane = t_RPRE + t_DQSRE + t_RHW + 6 * t_WC + t_CCS + t_RPRE + t_DQSRE + t_RHW + 6 * t_WC + t_CCS + t_RPRE + t_DQSRE;
		ReadDataOutSetupTime_FourPlane = t_RPRE + t_DQSRE + t_RHW + 6 * t_WC + t_CCS + t_RPRE + t_DQSRE + t_RHW + 6 * t_WC + t_CCS + t_RPRE + t_DQSRE + t_RHW + 6 * t_WC + t_CCS + t_RPRE + t_DQSRE;
		TwoUnitDataInTime = t_RC;

		ProgramCommandTime[1] = t_CS + t_WC * 6 + t_ADL + t_WPST + t_WPSTH + t_WB;
		ProgramCommandTime[2] = t_CS + (t_WC * 5 + t_ADL + t_WPST + t_CALS + t_WB) + t_DBSY + (t_WC * 6 + t_ADL + t_WPST + t_WPSTH + t_WB);
		ProgramCommandTime[3] = t_CS + (t_WC * 5 + t_ADL + t_WPST + t_CALS + t_WB) + t_DBSY + (t_WC * 5 + t_ADL + t_WPST + t_CALS + t_WB) + t_DBSY + (t_WC * 6 + t_ADL + t_WPST + t_WPSTH + t_WB);
		ProgramCommandTime[4] = t_CS + (t_WC * 5 + t_ADL + t_WPST + t_CALS + t_WB) + t_DBSY + (t_WC * 5 + t_ADL + t_WPST + t_CALS + t_WB) + t_DBSY + (t_WC * 5 + t_ADL + t_WPST + t_CALS + t_WB) + t_DBSY + (t_WC * 6 + t_ADL + t_WPST + t_WPSTH + t_WB);
		TwoUnitDataOutTime = t_DSC;
		ProgramSuspendCommandTime = t_CS + t_WC * 3;

		EraseCommandTime[1] = t_CS + t_WC * 4 + t_WB;
		EraseCommandTime[2] = t_CS + t_WC * 4 + t_WB + (t_DBSY + t_WC * 4 + t_WB);
		EraseCommandTime[3] = t_CS + t_WC * 4 + t_WB + (t_DBSY + t_WC * 4 + t_WB) + (t_DBSY + t_WC * 4 + t_WB);
		EraseCommandTime[4] = t_CS + t_WC * 4 + t_WB + (t_DBSY + t_WC * 4 + t_WB) + (t_DBSY + t_WC * 4 + t_WB) + (t_DBSY + t_WC * 4 + t_WB);
		EraseSuspendCommandTime = t_CS + t_WC * 3;
	}

// Assembly:
subq $0x38, %rsp
movq 0xa8(%rsp), %rax
movq 0xa0(%rsp), %rax
movq 0x98(%rsp), %rax
movq 0x90(%rsp), %rax
movq 0x88(%rsp), %rax
movq 0x80(%rsp), %rax
movq 0x78(%rsp), %rax
movq 0x70(%rsp), %rax
movq 0x68(%rsp), %rax
movq 0x60(%rsp), %rax
movq 0x58(%rsp), %rax
movq 0x50(%rsp), %rax
movq 0x48(%rsp), %rax
movq 0x40(%rsp), %rax
movq %rdi, 0x30(%rsp)
movl %esi, 0x2c(%rsp)
movl %edx, 0x28(%rsp)
movq %rcx, 0x20(%rsp)
movl %r8d, 0x1c(%rsp)
movq %r9, 0x10(%rsp)
movq 0x30(%rsp), %rdi
movq %rdi, 0x8(%rsp)
movl 0x2c(%rsp), %esi
movl 0x28(%rsp), %edx
movq 0x20(%rsp), %rcx
xorl %r8d, %r8d
callq 0x96570
movq 0x8(%rsp), %rax
movl 0x1c(%rsp), %ecx
movl %ecx, 0xd8(%rax)
movq 0x10(%rsp), %rcx
movq %rcx, 0xe0(%rax)
movq 0x40(%rsp), %rcx
movq %rcx, 0xe8(%rax)
movq 0x48(%rsp), %rcx
movq %rcx, 0xf0(%rax)
movq 0x50(%rsp), %rcx
movq %rcx, 0xf8(%rax)
movq 0x58(%rsp), %rcx
movq %rcx, 0x100(%rax)
movq 0x60(%rsp), %rcx
movq %rcx, 0x108(%rax)
movq 0x68(%rsp), %rcx
movq %rcx, 0x110(%rax)
movq 0x70(%rsp), %rcx
movq %rcx, 0x118(%rax)
movq 0x78(%rsp), %rcx
movq %rcx, 0x120(%rax)
movq 0x80(%rsp), %rcx
movq %rcx, 0x128(%rax)
movq 0x88(%rsp), %rcx
movq %rcx, 0x130(%rax)
movq 0x90(%rsp), %rcx
movq %rcx, 0x138(%rax)
movq 0x98(%rsp), %rcx
movq %rcx, 0x140(%rax)
movq 0xa0(%rsp), %rcx
movq %rcx, 0x148(%rax)
movq 0xa8(%rsp), %rcx
movq %rcx, 0x150(%rax)
movq 0x50(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x60(%rsp), %rcx
addq 0x58(%rsp), %rcx
movq %rcx, 0x30(%rax)
movq 0x50(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x48(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x60(%rsp), %rcx
addq 0x58(%rsp), %rcx
movq %rcx, 0x38(%rax)
movq 0x50(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x48(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x48(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x60(%rsp), %rcx
addq 0x58(%rsp), %rcx
movq %rcx, 0x40(%rax)
movq 0x50(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x48(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x48(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x48(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x60(%rsp), %rcx
addq 0x58(%rsp), %rcx
movq %rcx, 0x48(%rax)
movq 0x88(%rsp), %rcx
addq 0x80(%rsp), %rcx
movq %rcx, 0x50(%rax)
movq 0x88(%rsp), %rcx
addq 0x80(%rsp), %rcx
addq 0x90(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x98(%rsp), %rcx
addq 0x88(%rsp), %rcx
addq 0x80(%rsp), %rcx
movq %rcx, 0x58(%rax)
movq 0x88(%rsp), %rcx
addq 0x80(%rsp), %rcx
addq 0x90(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x98(%rsp), %rcx
addq 0x88(%rsp), %rcx
addq 0x80(%rsp), %rcx
addq 0x90(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x98(%rsp), %rcx
addq 0x88(%rsp), %rcx
addq 0x80(%rsp), %rcx
movq %rcx, 0x60(%rax)
movq 0x88(%rsp), %rcx
addq 0x80(%rsp), %rcx
addq 0x90(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x98(%rsp), %rcx
addq 0x88(%rsp), %rcx
addq 0x80(%rsp), %rcx
addq 0x90(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x98(%rsp), %rcx
addq 0x88(%rsp), %rcx
addq 0x80(%rsp), %rcx
addq 0x90(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x98(%rsp), %rcx
addq 0x88(%rsp), %rcx
addq 0x80(%rsp), %rcx
movq %rcx, 0x68(%rax)
movq 0x10(%rsp), %rcx
movq %rcx, 0x70(%rax)
movq 0x50(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq %rdx, %rcx
addq 0x70(%rsp), %rcx
addq 0xa0(%rsp), %rcx
addq 0xa8(%rsp), %rcx
addq 0x60(%rsp), %rcx
movq %rcx, 0x80(%rax)
movq 0x50(%rsp), %rcx
imulq $0x5, 0x68(%rsp), %rdx
addq 0x70(%rsp), %rdx
addq 0xa0(%rsp), %rdx
addq 0x78(%rsp), %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
addq 0x48(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq 0x70(%rsp), %rdx
addq 0xa0(%rsp), %rdx
addq 0xa8(%rsp), %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
movq %rcx, 0x88(%rax)
movq 0x50(%rsp), %rcx
imulq $0x5, 0x68(%rsp), %rdx
addq 0x70(%rsp), %rdx
addq 0xa0(%rsp), %rdx
addq 0x78(%rsp), %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
addq 0x48(%rsp), %rcx
imulq $0x5, 0x68(%rsp), %rdx
addq 0x70(%rsp), %rdx
addq 0xa0(%rsp), %rdx
addq 0x78(%rsp), %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
addq 0x48(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq 0x70(%rsp), %rdx
addq 0xa0(%rsp), %rdx
addq 0xa8(%rsp), %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
movq %rcx, 0x90(%rax)
movq 0x50(%rsp), %rcx
imulq $0x5, 0x68(%rsp), %rdx
addq 0x70(%rsp), %rdx
addq 0xa0(%rsp), %rdx
addq 0x78(%rsp), %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
addq 0x48(%rsp), %rcx
imulq $0x5, 0x68(%rsp), %rdx
addq 0x70(%rsp), %rdx
addq 0xa0(%rsp), %rdx
addq 0x78(%rsp), %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
addq 0x48(%rsp), %rcx
imulq $0x5, 0x68(%rsp), %rdx
addq 0x70(%rsp), %rdx
addq 0xa0(%rsp), %rdx
addq 0x78(%rsp), %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
addq 0x48(%rsp), %rcx
imulq $0x6, 0x68(%rsp), %rdx
addq 0x70(%rsp), %rdx
addq 0xa0(%rsp), %rdx
addq 0xa8(%rsp), %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
movq %rcx, 0x98(%rax)
movq 0x40(%rsp), %rcx
movq %rcx, 0x20(%rax)
movq 0x50(%rsp), %rcx
imulq $0x3, 0x68(%rsp), %rdx
addq %rdx, %rcx
movq %rcx, 0xa0(%rax)
movq 0x50(%rsp), %rcx
movq 0x68(%rsp), %rdx
shlq $0x2, %rdx
addq %rdx, %rcx
addq 0x60(%rsp), %rcx
movq %rcx, 0xb0(%rax)
movq 0x50(%rsp), %rcx
movq 0x68(%rsp), %rdx
shlq $0x2, %rdx
addq %rdx, %rcx
addq 0x60(%rsp), %rcx
movq 0x48(%rsp), %rdx
movq 0x68(%rsp), %rsi
shlq $0x2, %rsi
addq %rsi, %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
movq %rcx, 0xb8(%rax)
movq 0x50(%rsp), %rcx
movq 0x68(%rsp), %rdx
shlq $0x2, %rdx
addq %rdx, %rcx
addq 0x60(%rsp), %rcx
movq 0x48(%rsp), %rdx
movq 0x68(%rsp), %rsi
shlq $0x2, %rsi
addq %rsi, %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
movq 0x48(%rsp), %rdx
movq 0x68(%rsp), %rsi
shlq $0x2, %rsi
addq %rsi, %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
movq %rcx, 0xc0(%rax)
movq 0x50(%rsp), %rcx
movq 0x68(%rsp), %rdx
shlq $0x2, %rdx
addq %rdx, %rcx
addq 0x60(%rsp), %rcx
movq 0x48(%rsp), %rdx
movq 0x68(%rsp), %rsi
shlq $0x2, %rsi
addq %rsi, %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
movq 0x48(%rsp), %rdx
movq 0x68(%rsp), %rsi
shlq $0x2, %rsi
addq %rsi, %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
movq 0x48(%rsp), %rdx
movq 0x68(%rsp), %rsi
shlq $0x2, %rsi
addq %rsi, %rdx
addq 0x60(%rsp), %rdx
addq %rdx, %rcx
movq %rcx, 0xc8(%rax)
movq 0x50(%rsp), %rcx
imulq $0x3, 0x68(%rsp), %rdx
addq %rdx, %rcx
movq %rcx, 0xd0(%rax)
addq $0x38, %rsp
retq
nopl (%rax,%rax)