// File: Sooryakiran[P]dotV/src/verilog.cpp
// Function: Chip::declare(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>, int, int)
void Chip::declare(wire e, int type, int width){
    /*------------------------------------------------------------------------------------------

    This function is used to populate the Chip ports when declared.
    example :   declare("my_input", CHIP_INPUTS);
                declare("my_output", CHIP_OUTPUT); 
                declare("my_output_reg", CHIP_OUTPUT_REG);
    

    Param : c (wire), a port/wire name.
    Param : type (int), port type, 0 for CHIP_INPUTS, 1 for CHIP_OUTPUTS, 2 for CHIP_INPUT_REG 
            and 3 for CHIP_OUTPUT_REG.
    Param : width (int), Bit width of port. If no width is specified, it is assumed to be of the
            parent Chip's width.
    Returns : None
    ------------------------------------------------------------------------------------------*/ 
    
    string pre = "";
    if(width>1){
        pre = "[" + to_string(width -1) + ": 0] ";
    }
    
    if(type == CHIP_INPUTS){
        this->input_names.push_back(pre + e);
        this->is_input_reg.push_back(false);
    }
    else if(type == CHIP_OUTPUTS){
        this->output_names.push_back(pre + e);
        this->is_output_reg.push_back(false);
    }
    else if(type == CHIP_INPUTS_REG){
        this->input_names.push_back(pre + e);
        this->is_input_reg.push_back(true);
    }
    else if(type == CHIP_OUTPUTS_REG){
        this->output_names.push_back(pre + e);
        this->is_output_reg.push_back(true);
    }
    else{
        throw invalid_argument( "Invalid type for port." );
    }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x170, %rsp            # imm = 0x170
movq %rsi, -0x148(%rbp)
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movl %edx, -0x14(%rbp)
movl %ecx, -0x18(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x140(%rbp)
leaq -0x39(%rbp), %rdi
movq %rdi, -0x138(%rbp)
callq 0x1da80
movq -0x138(%rbp), %rdx
leaq 0x28598(%rip), %rsi     # 0x47111
leaq -0x38(%rbp), %rdi
callq 0x1d8a0
jmp 0x1eb84
leaq -0x39(%rbp), %rdi
callq 0x1ca40
cmpl $0x1, -0x18(%rbp)
jle 0x1ec71
movl -0x18(%rbp), %esi
decl %esi
leaq -0xb0(%rbp), %rdi
callq 0x1ced0
jmp 0x1ebaa
leaq 0x285e2(%rip), %rsi     # 0x47193
leaq -0x90(%rbp), %rdi
leaq -0xb0(%rbp), %rdx
callq 0x1d820
jmp 0x1ebc6
leaq 0x28463(%rip), %rdx     # 0x47030
leaq -0x70(%rbp), %rdi
leaq -0x90(%rbp), %rsi
callq 0x1b430
jmp 0x1ebdf
leaq -0x38(%rbp), %rdi
leaq -0x70(%rbp), %rsi
callq 0x1cd30
leaq -0x70(%rbp), %rdi
callq 0x1bea0
leaq -0x90(%rbp), %rdi
callq 0x1bea0
leaq -0xb0(%rbp), %rdi
callq 0x1bea0
jmp 0x1ec71
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x48(%rbp)
movl %eax, -0x4c(%rbp)
leaq -0x39(%rbp), %rdi
callq 0x1ca40
jmp 0x1ef31
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x48(%rbp)
movl %eax, -0x4c(%rbp)
jmp 0x1ef28
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x48(%rbp)
movl %eax, -0x4c(%rbp)
jmp 0x1ec60
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x48(%rbp)
movl %eax, -0x4c(%rbp)
leaq -0x90(%rbp), %rdi
callq 0x1bea0
leaq -0xb0(%rbp), %rdi
callq 0x1bea0
jmp 0x1ef28
cmpl $0x0, -0x14(%rbp)
jne 0x1ed02
movq -0x148(%rbp), %rdx
movq -0x140(%rbp), %rax
addq $0xe0, %rax
movq %rax, -0x150(%rbp)
leaq -0xd0(%rbp), %rdi
leaq -0x38(%rbp), %rsi
callq 0x1dee0
jmp 0x1eca8
movq -0x150(%rbp), %rdi
leaq -0xd0(%rbp), %rsi
callq 0x1c1b0
jmp 0x1ecbd
leaq -0xd0(%rbp), %rdi
callq 0x1bea0
movq -0x140(%rbp), %rdi
addq $0xf8, %rdi
xorl %esi, %esi
callq 0x1cdf0
jmp 0x1ece0
jmp 0x1ef16
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x48(%rbp)
movl %eax, -0x4c(%rbp)
leaq -0xd0(%rbp), %rdi
callq 0x1bea0
jmp 0x1ef28
cmpl $0x1, -0x14(%rbp)
jne 0x1ed93
movq -0x148(%rbp), %rdx
movq -0x140(%rbp), %rax
addq $0x120, %rax            # imm = 0x120
movq %rax, -0x158(%rbp)
leaq -0xf0(%rbp), %rdi
leaq -0x38(%rbp), %rsi
callq 0x1dee0
jmp 0x1ed39
movq -0x158(%rbp), %rdi
leaq -0xf0(%rbp), %rsi
callq 0x1c1b0
jmp 0x1ed4e
leaq -0xf0(%rbp), %rdi
callq 0x1bea0
movq -0x140(%rbp), %rdi
addq $0x138, %rdi            # imm = 0x138
xorl %esi, %esi
callq 0x1cdf0
jmp 0x1ed71
jmp 0x1ef14
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x48(%rbp)
movl %eax, -0x4c(%rbp)
leaq -0xf0(%rbp), %rdi
callq 0x1bea0
jmp 0x1ef28
cmpl $0x2, -0x14(%rbp)
jne 0x1ee27
movq -0x148(%rbp), %rdx
movq -0x140(%rbp), %rax
addq $0xe0, %rax
movq %rax, -0x160(%rbp)
leaq -0x110(%rbp), %rdi
leaq -0x38(%rbp), %rsi
callq 0x1dee0
jmp 0x1edca
movq -0x160(%rbp), %rdi
leaq -0x110(%rbp), %rsi
callq 0x1c1b0
jmp 0x1eddf
leaq -0x110(%rbp), %rdi
callq 0x1bea0
movq -0x140(%rbp), %rdi
addq $0xf8, %rdi
movl $0x1, %esi
callq 0x1cdf0
jmp 0x1ee05
jmp 0x1ef12
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x48(%rbp)
movl %eax, -0x4c(%rbp)
leaq -0x110(%rbp), %rdi
callq 0x1bea0
jmp 0x1ef28
cmpl $0x3, -0x14(%rbp)
jne 0x1eeb5
movq -0x148(%rbp), %rdx
movq -0x140(%rbp), %rax
addq $0x120, %rax            # imm = 0x120
movq %rax, -0x168(%rbp)
leaq -0x130(%rbp), %rdi
leaq -0x38(%rbp), %rsi
callq 0x1dee0
jmp 0x1ee5e
movq -0x168(%rbp), %rdi
leaq -0x130(%rbp), %rsi
callq 0x1c1b0
jmp 0x1ee73
leaq -0x130(%rbp), %rdi
callq 0x1bea0
movq -0x140(%rbp), %rdi
addq $0x138, %rdi            # imm = 0x138
movl $0x1, %esi
callq 0x1cdf0
jmp 0x1ee99
jmp 0x1ef10
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x48(%rbp)
movl %eax, -0x4c(%rbp)
leaq -0x130(%rbp), %rdi
callq 0x1bea0
jmp 0x1ef28
movl $0x10, %edi
callq 0x1bb60
movq %rax, %rdi
movq %rdi, %rax
movq %rax, -0x170(%rbp)
leaq 0x28163(%rip), %rsi     # 0x47036
callq 0x1de20
jmp 0x1eeda
movq -0x170(%rbp), %rdi
movq 0x340f8(%rip), %rsi     # 0x52fe0
movq 0x340e1(%rip), %rdx     # 0x52fd0
callq 0x1d900
jmp 0x1ef3a
movq -0x170(%rbp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x48(%rbp)
movl %eax, -0x4c(%rbp)
callq 0x1c0d0
jmp 0x1ef28
jmp 0x1ef12
jmp 0x1ef14
jmp 0x1ef16
leaq -0x38(%rbp), %rdi
callq 0x1bea0
addq $0x170, %rsp            # imm = 0x170
popq %rbp
retq
leaq -0x38(%rbp), %rdi
callq 0x1bea0
movq -0x48(%rbp), %rdi
callq 0x1da60
nopw (%rax,%rax)