// File: Sooryakiran[P]dotV/src/verilog.cpp
// Function: CARRY_RIPPLE_ADDER::CARRY_RIPPLE_ADDER(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>, std::vector<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>, std::allocator<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>>>, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>, int)
CARRY_RIPPLE_ADDER::CARRY_RIPPLE_ADDER(string name, vector<wire> input_wires, wire output_wire, int n_bits){
    /*------------------------------------------------------------------------------------------
    First we set up inputs and output vectors. The Chip parent expects everything to be of type
    vector<string>, so we set up that accordingly. 

    We also set up the bit width and name of the instance.    
    ------------------------------------------------------------------------------------------*/
    this->name = name;
    this->inputs = input_wires;
    this->outputs.push_back(output_wire);
    this->n_bits = n_bits;

    /*------------------------------------------------------------------------------------------
    Now we declare input and output ports. Note that these are generic input ports and instance
    independent where as the previous 'input_wires' will be different for each instance. 
    ------------------------------------------------------------------------------------------*/
    this->declare("A", CHIP_INPUTS);
    this->declare("B", CHIP_INPUTS);
    this->declare("out", CHIP_OUTPUTS);

    /*------------------------------------------------------------------------------------------
    We define a wire as carry wire. Note that we need to specify the bit width for wires only an
    d not input/output. This is because the bit width of input/output are expected to be equal to
    the bit width. 
    ------------------------------------------------------------------------------------------*/
    wire carry_wire = "CRA_carry_wire";
    this->add_wire("[" + to_string(n_bits) + ":0] " + carry_wire);

    /*------------------------------------------------------------------------------------------
    We need to assign the first bit of the carry wire to be zero. We use verilog("") function to
    embed verilog code inside our module.
    ------------------------------------------------------------------------------------------*/
    this->verilog("assign " + carry_wire + "[0] = 0;");

    /*------------------------------------------------------------------------------------------
    Now we configure wiring for each bits
    ------------------------------------------------------------------------------------------*/
    for(int i =0; i< n_bits; i++){
        string slice = "["+ to_string(i) + "]";
        string next_slice = "[" + to_string(i+1) + "]";

        FULL_ADDER fa("CRA_FA_" + to_string(i),
                      {"A" + slice, "B" + slice, carry_wire + slice},
                      {"out" + slice, carry_wire + next_slice});
        this->add_submodule(fa);
    }

    /*------------------------------------------------------------------------------------------
    After building the module we can use the auto_gen() funtion to automatically generate the m-
    odule definition.
    ------------------------------------------------------------------------------------------*/
    this->definition = this->auto_gen("module CARRY_RIPPLE_ADDER_" + to_string(this->n_bits) + "_BIT");

    /*------------------------------------------------------------------------------------------
    Then we can instruct how each instance has to be generated.
    ------------------------------------------------------------------------------------------*/
    this->generate =  "CARRY_RIPPLE_ADDER_" + to_string(this->n_bits) + "_BIT " + this->name  + " (" + this->inputs.at(0) + ", " + this->inputs.at(1) + ", " + this->outputs.at(0) + ");";
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x9b0, %rsp            # imm = 0x9B0
movq %rsi, -0x8c8(%rbp)
movq %rdx, -0x8e0(%rbp)
movq %rcx, -0x8d8(%rbp)
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq %rdx, -0x18(%rbp)
movq %rcx, -0x20(%rbp)
movl %r8d, -0x24(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x8d0(%rbp)
callq 0x1c4e0
movq -0x8d0(%rbp), %rdi
movq -0x8c8(%rbp), %rsi
callq 0x1b0b0
jmp 0x27269
movq -0x8e0(%rbp), %rsi
movq -0x8d0(%rbp), %rdi
subq $-0x80, %rdi
callq 0x1c9a0
jmp 0x27282
movq -0x8d8(%rbp), %rsi
movq -0x8d0(%rbp), %rdi
addq $0x98, %rdi
callq 0x1bc10
jmp 0x2729e
movq -0x8d0(%rbp), %rax
movl -0x24(%rbp), %ecx
movl %ecx, 0x190(%rax)
leaq -0x59(%rbp), %rdi
movq %rdi, -0x8e8(%rbp)
callq 0x1da80
movq -0x8e8(%rbp), %rdx
leaq 0x20406(%rip), %rsi     # 0x476d2
leaq -0x58(%rbp), %rdi
callq 0x1d8a0
jmp 0x272d7
movq -0x8d0(%rbp), %rdi
leaq -0x58(%rbp), %rsi
xorl %edx, %edx
callq 0x1b740
jmp 0x272eb
leaq -0x58(%rbp), %rdi
callq 0x1bea0
leaq -0x59(%rbp), %rdi
callq 0x1ca40
leaq -0x81(%rbp), %rdi
movq %rdi, -0x8f0(%rbp)
callq 0x1da80
movq -0x8f0(%rbp), %rdx
leaq 0x2017a(%rip), %rsi     # 0x47498
leaq -0x80(%rbp), %rdi
callq 0x1d8a0
jmp 0x27329
movq -0x8d0(%rbp), %rdi
leaq -0x80(%rbp), %rsi
xorl %edx, %edx
callq 0x1b740
jmp 0x2733d
leaq -0x80(%rbp), %rdi
callq 0x1bea0
leaq -0x81(%rbp), %rdi
callq 0x1ca40
leaq -0xa9(%rbp), %rdi
movq %rdi, -0x8f8(%rbp)
callq 0x1da80
movq -0x8f8(%rbp), %rdx
leaq 0x2012e(%rip), %rsi     # 0x474a1
leaq -0xa8(%rbp), %rdi
callq 0x1d8a0
jmp 0x27381
movq -0x8d0(%rbp), %rdi
leaq -0xa8(%rbp), %rsi
movl $0x1, %edx
callq 0x1b740
jmp 0x2739b
leaq -0xa8(%rbp), %rdi
callq 0x1bea0
leaq -0xa9(%rbp), %rdi
callq 0x1ca40
leaq -0xd1(%rbp), %rdi
movq %rdi, -0x900(%rbp)
callq 0x1da80
movq -0x900(%rbp), %rdx
leaq 0x20164(%rip), %rsi     # 0x47538
leaq -0xd0(%rbp), %rdi
callq 0x1d8a0
jmp 0x273e2
leaq -0xd1(%rbp), %rdi
callq 0x1ca40
movl -0x24(%rbp), %esi
leaq -0x158(%rbp), %rdi
callq 0x1ced0
jmp 0x273ff
leaq 0x1fd8d(%rip), %rsi     # 0x47193
leaq -0x138(%rbp), %rdi
leaq -0x158(%rbp), %rdx
callq 0x1d820
jmp 0x2741b
leaq 0x20167(%rip), %rdx     # 0x47589
leaq -0x118(%rbp), %rdi
leaq -0x138(%rbp), %rsi
callq 0x1b430
jmp 0x27437
leaq -0xf8(%rbp), %rdi
leaq -0x118(%rbp), %rsi
leaq -0xd0(%rbp), %rdx
callq 0x1d3b0
jmp 0x27453
movq -0x8d0(%rbp), %rdi
leaq -0xf8(%rbp), %rsi
callq 0x1b5d0
jmp 0x27468
leaq -0xf8(%rbp), %rdi
callq 0x1bea0
leaq -0x118(%rbp), %rdi
callq 0x1bea0
leaq -0x138(%rbp), %rdi
callq 0x1bea0
leaq -0x158(%rbp), %rdi
callq 0x1bea0
leaq 0x200a8(%rip), %rsi     # 0x47547
leaq -0x198(%rbp), %rdi
leaq -0xd0(%rbp), %rdx
callq 0x1c5a0
jmp 0x274b4
leaq 0x20129(%rip), %rdx     # 0x475e4
leaq -0x178(%rbp), %rdi
leaq -0x198(%rbp), %rsi
callq 0x1b430
jmp 0x274d0
movq -0x8d0(%rbp), %rdi
leaq -0x178(%rbp), %rsi
callq 0x1c260
jmp 0x274e5
leaq -0x178(%rbp), %rdi
callq 0x1bea0
leaq -0x198(%rbp), %rdi
callq 0x1bea0
movl $0x0, -0x19c(%rbp)
movl -0x19c(%rbp), %eax
cmpl -0x24(%rbp), %eax
jge 0x27cf9
movl -0x19c(%rbp), %esi
leaq -0x200(%rbp), %rdi
callq 0x1ced0
jmp 0x2752a
leaq 0x1fc62(%rip), %rsi     # 0x47193
leaq -0x1e0(%rbp), %rdi
leaq -0x200(%rbp), %rdx
callq 0x1d820
jmp 0x27546
leaq 0x1fcb6(%rip), %rdx     # 0x47203
leaq -0x1c0(%rbp), %rdi
leaq -0x1e0(%rbp), %rsi
callq 0x1b430
jmp 0x27562
leaq -0x1e0(%rbp), %rdi
callq 0x1bea0
leaq -0x200(%rbp), %rdi
callq 0x1bea0
movl -0x19c(%rbp), %esi
incl %esi
leaq -0x260(%rbp), %rdi
callq 0x1ced0
jmp 0x27590
leaq 0x1fbfc(%rip), %rsi     # 0x47193
leaq -0x240(%rbp), %rdi
leaq -0x260(%rbp), %rdx
callq 0x1d820
jmp 0x275ac
leaq 0x1fc50(%rip), %rdx     # 0x47203
leaq -0x220(%rbp), %rdi
leaq -0x240(%rbp), %rsi
callq 0x1b430
jmp 0x275c8
leaq -0x240(%rbp), %rdi
callq 0x1bea0
leaq -0x260(%rbp), %rdi
callq 0x1bea0
movl -0x19c(%rbp), %esi
leaq -0x438(%rbp), %rdi
callq 0x1ced0
jmp 0x275f4
leaq 0x1ff54(%rip), %rsi     # 0x4754f
leaq -0x418(%rbp), %rdi
leaq -0x438(%rbp), %rdx
callq 0x1d820
jmp 0x27610
leaq -0x4c0(%rbp), %rdi
movq %rdi, -0x4c8(%rbp)
leaq 0x200ad(%rip), %rsi     # 0x476d2
leaq -0x1c0(%rbp), %rdx
callq 0x1c5a0
jmp 0x27633
leaq -0x4a0(%rbp), %rdi
movq %rdi, -0x4c8(%rbp)
leaq 0x1fe50(%rip), %rsi     # 0x47498
leaq -0x1c0(%rbp), %rdx
callq 0x1c5a0
jmp 0x27656
leaq -0x480(%rbp), %rdi
movq %rdi, -0x4c8(%rbp)
leaq -0xd0(%rbp), %rsi
leaq -0x1c0(%rbp), %rdx
callq 0x1dee0
jmp 0x27679
leaq -0x4c0(%rbp), %rax
movq %rax, -0x460(%rbp)
movq $0x3, -0x458(%rbp)
leaq -0x4c9(%rbp), %rdi
movq %rdi, -0x908(%rbp)
callq 0x1b490
movq -0x908(%rbp), %rcx
movq -0x460(%rbp), %rsi
movq -0x458(%rbp), %rdx
leaq -0x450(%rbp), %rdi
callq 0x1b4a0
jmp 0x276c8
leaq -0x538(%rbp), %rdi
movq %rdi, -0x540(%rbp)
leaq 0x1fdc4(%rip), %rsi     # 0x474a1
leaq -0x1c0(%rbp), %rdx
callq 0x1c5a0
jmp 0x276eb
leaq -0x518(%rbp), %rdi
movq %rdi, -0x540(%rbp)
leaq -0xd0(%rbp), %rsi
leaq -0x220(%rbp), %rdx
callq 0x1dee0
jmp 0x2770e
leaq -0x538(%rbp), %rax
movq %rax, -0x4f8(%rbp)
movq $0x2, -0x4f0(%rbp)
leaq -0x541(%rbp), %rdi
movq %rdi, -0x910(%rbp)
callq 0x1b490
movq -0x910(%rbp), %rcx
movq -0x4f8(%rbp), %rsi
movq -0x4f0(%rbp), %rdx
leaq -0x4e8(%rbp), %rdi
callq 0x1b4a0
jmp 0x2775d
leaq -0x3f8(%rbp), %rdi
leaq -0x418(%rbp), %rsi
leaq -0x450(%rbp), %rdx
leaq -0x4e8(%rbp), %rcx
callq 0x1bdf0
jmp 0x27780
leaq -0x4e8(%rbp), %rdi
callq 0x1c100
leaq -0x541(%rbp), %rdi
callq 0x1b420
leaq -0x538(%rbp), %rax
movq %rax, -0x920(%rbp)
addq $0x40, %rax
movq %rax, -0x918(%rbp)
movq -0x918(%rbp), %rdi
addq $-0x20, %rdi
movq %rdi, -0x928(%rbp)
callq 0x1bea0
movq -0x920(%rbp), %rcx
movq -0x928(%rbp), %rax
cmpq %rcx, %rax
movq %rax, -0x918(%rbp)
jne 0x277b1
leaq -0x450(%rbp), %rdi
callq 0x1c100
leaq -0x4c9(%rbp), %rdi
callq 0x1b420
leaq -0x4c0(%rbp), %rax
movq %rax, -0x938(%rbp)
addq $0x60, %rax
movq %rax, -0x930(%rbp)
movq -0x930(%rbp), %rdi
addq $-0x20, %rdi
movq %rdi, -0x940(%rbp)
callq 0x1bea0
movq -0x938(%rbp), %rcx
movq -0x940(%rbp), %rax
cmpq %rcx, %rax
movq %rax, -0x930(%rbp)
jne 0x27813
leaq -0x418(%rbp), %rdi
callq 0x1bea0
leaq -0x438(%rbp), %rdi
callq 0x1bea0
leaq -0x6e0(%rbp), %rdi
leaq -0x3f8(%rbp), %rsi
callq 0x1cb00
jmp 0x27871
movq -0x8d0(%rbp), %rdi
leaq -0x6e0(%rbp), %rsi
callq 0x1c4c0
jmp 0x27886
leaq -0x6e0(%rbp), %rdi
callq 0x1b6d0
leaq -0x3f8(%rbp), %rdi
callq 0x1d100
leaq -0x220(%rbp), %rdi
callq 0x1bea0
leaq -0x1c0(%rbp), %rdi
callq 0x1bea0
movl -0x19c(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x19c(%rbp)
jmp 0x27507
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x28162
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x278fe
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
leaq -0x58(%rbp), %rdi
callq 0x1bea0
leaq -0x59(%rbp), %rdi
callq 0x1ca40
jmp 0x28162
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x2792f
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
leaq -0x80(%rbp), %rdi
callq 0x1bea0
leaq -0x81(%rbp), %rdi
callq 0x1ca40
jmp 0x28162
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x27966
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
leaq -0xa8(%rbp), %rdi
callq 0x1bea0
leaq -0xa9(%rbp), %rdi
callq 0x1ca40
jmp 0x28162
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
leaq -0xd1(%rbp), %rdi
callq 0x1ca40
jmp 0x28162
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x28156
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x279ff
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x279f3
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x279e7
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
leaq -0xf8(%rbp), %rdi
callq 0x1bea0
leaq -0x118(%rbp), %rdi
callq 0x1bea0
leaq -0x138(%rbp), %rdi
callq 0x1bea0
leaq -0x158(%rbp), %rdi
callq 0x1bea0
jmp 0x28156
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x27a36
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
leaq -0x178(%rbp), %rdi
callq 0x1bea0
leaq -0x198(%rbp), %rdi
callq 0x1bea0
jmp 0x28156
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x27a6d
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
leaq -0x1e0(%rbp), %rdi
callq 0x1bea0
leaq -0x200(%rbp), %rdi
callq 0x1bea0
jmp 0x28156
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x27ce8
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x27ab5
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
leaq -0x240(%rbp), %rdi
callq 0x1bea0
leaq -0x260(%rbp), %rdi
callq 0x1bea0
jmp 0x27ce8
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x27cdc
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x27c9c
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
movq -0x4c8(%rbp), %rax
leaq -0x4c0(%rbp), %rcx
cmpq %rax, %rcx
movq %rax, -0x948(%rbp)
je 0x27b3f
movq -0x948(%rbp), %rdi
addq $-0x20, %rdi
movq %rdi, -0x950(%rbp)
callq 0x1bea0
movq -0x950(%rbp), %rax
leaq -0x4c0(%rbp), %rcx
cmpq %rcx, %rax
movq %rax, -0x948(%rbp)
jne 0x27b0e
jmp 0x27c90
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x27c38
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
movq -0x540(%rbp), %rax
leaq -0x538(%rbp), %rcx
cmpq %rax, %rcx
movq %rax, -0x958(%rbp)
je 0x27bac
movq -0x958(%rbp), %rdi
addq $-0x20, %rdi
movq %rdi, -0x960(%rbp)
callq 0x1bea0
movq -0x960(%rbp), %rax
leaq -0x538(%rbp), %rcx
cmpq %rcx, %rax
movq %rax, -0x958(%rbp)
jne 0x27b7b
jmp 0x27c2c
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x27bd4
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
leaq -0x4e8(%rbp), %rdi
callq 0x1c100
leaq -0x541(%rbp), %rdi
callq 0x1b420
leaq -0x538(%rbp), %rax
movq %rax, -0x970(%rbp)
addq $0x40, %rax
movq %rax, -0x968(%rbp)
movq -0x968(%rbp), %rdi
addq $-0x20, %rdi
movq %rdi, -0x978(%rbp)
callq 0x1bea0
movq -0x970(%rbp), %rcx
movq -0x978(%rbp), %rax
cmpq %rcx, %rax
movq %rax, -0x968(%rbp)
jne 0x27bf9
jmp 0x27c2c
leaq -0x450(%rbp), %rdi
callq 0x1c100
leaq -0x4c9(%rbp), %rdi
callq 0x1b420
leaq -0x4c0(%rbp), %rax
movq %rax, -0x988(%rbp)
addq $0x60, %rax
movq %rax, -0x980(%rbp)
movq -0x980(%rbp), %rdi
addq $-0x20, %rdi
movq %rdi, -0x990(%rbp)
callq 0x1bea0
movq -0x988(%rbp), %rcx
movq -0x990(%rbp), %rax
cmpq %rcx, %rax
movq %rax, -0x980(%rbp)
jne 0x27c5d
jmp 0x27c90
leaq -0x418(%rbp), %rdi
callq 0x1bea0
leaq -0x438(%rbp), %rdi
callq 0x1bea0
jmp 0x27cdc
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x27cd0
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
leaq -0x6e0(%rbp), %rdi
callq 0x1b6d0
leaq -0x3f8(%rbp), %rdi
callq 0x1d100
leaq -0x220(%rbp), %rdi
callq 0x1bea0
leaq -0x1c0(%rbp), %rdi
callq 0x1bea0
jmp 0x28156
movq -0x8d0(%rbp), %rax
movl 0x190(%rax), %esi
leaq -0x760(%rbp), %rdi
callq 0x1ced0
jmp 0x27d14
leaq 0x1f83c(%rip), %rsi     # 0x47557
leaq -0x740(%rbp), %rdi
leaq -0x760(%rbp), %rdx
callq 0x1d820
jmp 0x27d30
leaq 0x1f83b(%rip), %rdx     # 0x47572
leaq -0x720(%rbp), %rdi
leaq -0x740(%rbp), %rsi
callq 0x1b430
jmp 0x27d4c
movq -0x8d0(%rbp), %rsi
leaq -0x700(%rbp), %rdi
leaq -0x720(%rbp), %rdx
callq 0x1bc40
jmp 0x27d68
movq -0x8d0(%rbp), %rdi
addq $0x20, %rdi
leaq -0x700(%rbp), %rsi
movq %rsi, -0x998(%rbp)
callq 0x1cd30
movq -0x998(%rbp), %rdi
callq 0x1bea0
leaq -0x720(%rbp), %rdi
callq 0x1bea0
leaq -0x740(%rbp), %rdi
callq 0x1bea0
leaq -0x760(%rbp), %rdi
callq 0x1bea0
movq -0x8d0(%rbp), %rax
movl 0x190(%rax), %esi
leaq -0x8c0(%rbp), %rdi
callq 0x1ced0
jmp 0x27dd1
leaq 0x1f786(%rip), %rsi     # 0x4755e
leaq -0x8a0(%rbp), %rdi
leaq -0x8c0(%rbp), %rdx
callq 0x1d820
jmp 0x27ded
leaq 0x1f3b2(%rip), %rdx     # 0x471a6
leaq -0x880(%rbp), %rdi
leaq -0x8a0(%rbp), %rsi
callq 0x1b430
jmp 0x27e09
movq -0x8d0(%rbp), %rdx
leaq -0x860(%rbp), %rdi
leaq -0x880(%rbp), %rsi
callq 0x1d3b0
jmp 0x27e25
leaq 0x1f221(%rip), %rdx     # 0x4704d
leaq -0x840(%rbp), %rdi
leaq -0x860(%rbp), %rsi
callq 0x1b430
jmp 0x27e41
movq -0x8d0(%rbp), %rdi
subq $-0x80, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x1b640
movq %rax, -0x9a0(%rbp)
jmp 0x27e5e
movq -0x9a0(%rbp), %rdx
leaq -0x820(%rbp), %rdi
leaq -0x840(%rbp), %rsi
callq 0x1d3b0
jmp 0x27e7a
leaq 0x1f1cf(%rip), %rdx     # 0x47050
leaq -0x800(%rbp), %rdi
leaq -0x820(%rbp), %rsi
callq 0x1b430
jmp 0x27e96
movq -0x8d0(%rbp), %rdi
subq $-0x80, %rdi
movl $0x1, %esi
callq 0x1b640
movq %rax, -0x9a8(%rbp)
jmp 0x27eb4
movq -0x9a8(%rbp), %rdx
leaq -0x7e0(%rbp), %rdi
leaq -0x800(%rbp), %rsi
callq 0x1d3b0
jmp 0x27ed0
leaq 0x1f179(%rip), %rdx     # 0x47050
leaq -0x7c0(%rbp), %rdi
leaq -0x7e0(%rbp), %rsi
callq 0x1b430
jmp 0x27eec
movq -0x8d0(%rbp), %rdi
addq $0x98, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x1b640
movq %rax, -0x9b0(%rbp)
jmp 0x27f0c
movq -0x9b0(%rbp), %rdx
leaq -0x7a0(%rbp), %rdi
leaq -0x7c0(%rbp), %rsi
callq 0x1d3b0
jmp 0x27f28
leaq 0x1f7c2(%rip), %rdx     # 0x476f1
leaq -0x780(%rbp), %rdi
leaq -0x7a0(%rbp), %rsi
callq 0x1b430
jmp 0x27f44
movq -0x8d0(%rbp), %rdi
addq $0x40, %rdi
leaq -0x780(%rbp), %rsi
callq 0x1cd30
leaq -0x780(%rbp), %rdi
callq 0x1bea0
leaq -0x7a0(%rbp), %rdi
callq 0x1bea0
leaq -0x7c0(%rbp), %rdi
callq 0x1bea0
leaq -0x7e0(%rbp), %rdi
callq 0x1bea0
leaq -0x800(%rbp), %rdi
callq 0x1bea0
leaq -0x820(%rbp), %rdi
callq 0x1bea0
leaq -0x840(%rbp), %rdi
callq 0x1bea0
leaq -0x860(%rbp), %rdi
callq 0x1bea0
leaq -0x880(%rbp), %rdi
callq 0x1bea0
leaq -0x8a0(%rbp), %rdi
callq 0x1bea0
leaq -0x8c0(%rbp), %rdi
callq 0x1bea0
leaq -0xd0(%rbp), %rdi
callq 0x1bea0
addq $0x9b0, %rsp            # imm = 0x9B0
popq %rbp
retq
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x28034
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x28028
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
leaq -0x720(%rbp), %rdi
callq 0x1bea0
leaq -0x740(%rbp), %rdi
callq 0x1bea0
leaq -0x760(%rbp), %rdi
callq 0x1bea0
jmp 0x28156
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x2814a
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x2813e
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x28132
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x28126
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x2811a
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x2810e
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x28102
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x280f6
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
jmp 0x280ea
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
leaq -0x7a0(%rbp), %rdi
callq 0x1bea0
leaq -0x7c0(%rbp), %rdi
callq 0x1bea0
leaq -0x7e0(%rbp), %rdi
callq 0x1bea0
leaq -0x800(%rbp), %rdi
callq 0x1bea0
leaq -0x820(%rbp), %rdi
callq 0x1bea0
leaq -0x840(%rbp), %rdi
callq 0x1bea0
leaq -0x860(%rbp), %rdi
callq 0x1bea0
leaq -0x880(%rbp), %rdi
callq 0x1bea0
leaq -0x8a0(%rbp), %rdi
callq 0x1bea0
leaq -0x8c0(%rbp), %rdi
callq 0x1bea0
leaq -0xd0(%rbp), %rdi
callq 0x1bea0
movq -0x8d0(%rbp), %rdi
callq 0x1b6d0
movq -0x30(%rbp), %rdi
callq 0x1da60
nopw (%rax,%rax)