// File: /workspace/github_cpp_makefile_star2_O1/akshayrajput[P]ARMV8_Simulator/./ADDS.cpp
// Function: ADDS()
void ADDS()
{
    int sf = IR.getLowerData() & 0x80000000;
    int op = IR.getLowerData() & 0x40000000;
    int S =  IR.getLowerData() & 0x20000000;
    int mod = (IR.getLowerData() & 0x1f000000) >> 24;
    int shift = (IR.getLowerData() & 0x00c00000) >> 22;
    int imm12 = (IR.getLowerData() & 0x003ffc00) >>10;
    int imm6 = (IR.getLowerData() & 0x0000fc00) >>10;
    int rm = (IR.getLowerData() & 0x001f0000) >> 16;
    int rn = (IR.getLowerData() & 0x000003e0) >> 5;
    int rd = (IR.getLowerData() & 0x0000001f);
    bool sub_op = false;
    int64_t imm;
    int amount = imm6;
    
    if(op)  sub_op = true;

    if(rd == 31 && sub_op)
    {
 	    CMP();
	    return;
    }
    if(shift == 0)
    {
        if (sf)
        {
            imm = (uint64_t)imm12;
        }
        else
        {
            imm = imm12;
        }
    }
    
    else if(shift == 1)
    {
        if(sf)
        {
            imm = (uint64_t)imm12;
            imm = imm << 12;
        }
        else
        {
            imm = imm12;
            imm = imm << 12;
        }
    }
    bool setFlag = false;
    if(S == 1) setFlag = true;
    if(mod == 17) // ADDS immediate
    {
        if(sf)  //64 bit
        {
            int carry = 0;
            if(sub_op)
            {
                imm = -imm;
                carry = 0;   
            }
            uint64_t rn_data = R[rn].getData();
            uint64_t dat = rn_data + imm + carry;
            
            
         	if(rn_data > 0 && imm > 0 && dat < 0)
		{
            		OFLAG = true;
		    	printf("[log] - Overflow flag\n");
         	}
        	if(rn_data < 0 && imm < 0 && dat > 0)
		{
        	    OFLAG = true;
			    printf("[log] - Zero flag set\n");
        	}

                ZFLAG = (dat == 0);
                
		if(ZFLAG)
			printf("[log] - Zero flag set\n");
	
                NFLAG = (dat < 0);
		if(NFLAG)
			printf("[log] - Negative flag set\n");
                
                if(!sub_op)
		{	
			CFLAG = rn_data > (0xffffffffffffffff - (imm + carry));
        	}
		else
		{
			CFLAG = rn_data < (-imm);
		}
		if(CFLAG)
			printf("[log] - Carry flag set\n");

            if(rd == 31 && !S)
                R[31].setData(dat);
            else
                R[rd].setData(dat);
        }
        
        else//32 bit
        {
            int carry = 0;
            if(sub_op)
            {
                imm = -imm;
                carry = 0;   
            }
            
            int rn_data = R[rn].getLowerData();
            int dat = rn_data + imm + carry;
            
            
            if(R[rn].getLowerData() > 0 && imm > 0 && dat < 0)
             {
                OFLAG = true;
                printf("[log] - Overflow flag set\n");
             }
            
            if(dat == 0)
            {
                ZFLAG = true;
                printf("[log] - Zero flag set\n");
            }
            if(dat < 0)
            {
                NFLAG = true;
                printf("[log] - Negative flag set\n");
            }
            if(!sub_op)
	      CFLAG = rn_data > (0xffffffff - (imm + carry));
            else
		{
			CFLAG = rn_data < (-imm);
		}


            if(CFLAG)
            	printf("[log] - Carry flag set.\n");
            
            if(rd == 31 && !S)
                R[31].setData(dat);
            else
                R[rd].setData(dat);
        }
    }
    
    if(mod == 11)   //shifted register
    {
	printf("[log] - ADDS register\n");
        if(sf)      //64 bit registers
        {
            uint64_t op1 = R[rn].getData();
            
            uint64_t op2 = R[rm].getData();
            if(shift == 0)
                op2 = op2 << (amount%64);
            else if(shift == 1 && shift == 2)
                op2 = op2 >> (amount%64);
            uint64_t carry = 0;
            if(sub_op)
            {
                op2 = -op2;
                carry = 0;
            }
            
            uint64_t dat = op1 + op2 + carry;
            if(rd == 31 && !S)
                R[31].setData(dat);
            else
                R[rd].setData(dat);
           
            if(op1 > 0 && op2 > 0 && dat < 0)
	    	{
			printf("[log] - Overflow flag set\n");
                OFLAG = true;
            }
            if(dat == 0)
	    	{
			printf("[log] - Zero flag set \n");
                ZFLAG = true;
            }
            if(dat < 0)
	    {
		printf("[log]- Negative flag set\n");
                NFLAG = true;
            }
		if(!sub_op)
            		CFLAG = op1 > (0xffffffffffffffff - (op2 + carry));
		else
		{
			CFLAG = op1 < (-op2);
		}

	    if(CFLAG)
	    {
		printf("[log] -Carry flag set \n");
	    }
        }
       
        else     //32 bit registers
        {
            int op1 = R[rn].getLowerData();
            
            int op2 = R[rm].getLowerData();
            if(shift == 0)
                op2 = op2 << (amount%32);
            else if(shift == 1 && shift == 2)
                op2 = op2 >> (amount%32);
            int carry = 0;
            if(sub_op)
            {
                op2 = ~op2;
                carry = 1;
            }
            
            int dat = op1 + op2 + carry;
            if(rd == 31 && !S)
                R[31].setLowerData(dat);
            else
                R[rd].setLowerData(dat);
           
            if(op1 > 0 && op2 > 0 && dat < 0)
	    {
                OFLAG = true;
		printf("[log] -Overflow flag set \n");

	    }
            if(dat == 0)
	    {
                ZFLAG = true;
		printf("[log] -Zero flag set \n");
	    }

            if(dat < 0)
	    {
                NFLAG = true; 
		printf("[log] -Negative flag set \n");
            }   
	    if(!sub_op)
            	CFLAG = op1 > (0xffffffff - op2);
	    else
	    {
	    	CFLAG = op1<(-op2);
	    }

	    if(CFLAG)
		    printf("[log] - carry flag set");
           
        }
       
    }
    
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
leaq 0x17e59(%rip), %r14     # 0x1a1f0
movq %r14, %rdi
callq 0x5c8a
movl %eax, 0x10(%rsp)
movq %r14, %rdi
callq 0x5c8a
movl %eax, %ebp
movq %r14, %rdi
callq 0x5c8a
movl %eax, 0x4(%rsp)
movq %r14, %rdi
callq 0x5c8a
movl %eax, %r13d
movq %r14, %rdi
callq 0x5c8a
movl %eax, %r15d
movq %r14, %rdi
callq 0x5c8a
movl %eax, %r12d
movq %r14, %rdi
callq 0x5c8a
movl %eax, 0x1c(%rsp)
movq %r14, %rdi
callq 0x5c8a
movl %eax, 0x18(%rsp)
movq %r14, %rdi
callq 0x5c8a
movl %eax, %ebx
movq %r14, %rdi
callq 0x5c8a
movl %eax, %r14d
andl $0x1f, %r14d
btl $0x1e, %ebp
setae %al
cmpl $0x1f, %r14d
setne %cl
orb %al, %cl
je 0x244c
shrl $0x18, %r13d
andl $0x1f, %r13d
shrl $0x16, %r15d
andl $0x3, %r15d
shrl $0xa, %r12d
andl $0xfff, %r12d           # imm = 0xFFF
shrl $0x5, %ebx
testl %r15d, %r15d
je 0x245f
cmpl $0x1, %r15d
jne 0x2462
shll $0xc, %r12d
jmp 0x2462
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x1f8b
movl %r12d, %r12d
andl $0x1f, %ebx
cmpl $0xb, %r13d
je 0x2640
cmpl $0x11, %r13d
jne 0x2843
movl %ebp, %eax
movq %r12, %rbp
negq %rbp
movl %eax, (%rsp)
btl $0x1e, %eax
cmovaeq %r12, %rbp
btl $0x1f, 0x10(%rsp)
movl %ebx, %eax
leaq 0x7c55(%rip), %rcx      # 0xa0f0
leaq (%rcx,%rax,8), %r12
jb 0x2590
movq %r12, %rdi
callq 0x5c8a
movq %rax, 0x20(%rsp)
addl %ebp, %eax
movl %eax, 0x8(%rsp)
movq %r12, %rdi
callq 0x5c8a
movl 0x8(%rsp), %edx
testl %eax, %eax
je 0x24e8
testq %rbp, %rbp
jle 0x24e8
testl %edx, %edx
jns 0x24e8
movb $0x1, 0x7c0a(%rip)      # 0xa0e2
leaq 0x4169(%rip), %rdi      # 0x6648
callq 0x1140
movl 0x8(%rsp), %edx
testl %edx, %edx
jne 0x2503
movb $0x1, 0x7bee(%rip)      # 0xa0e1
leaq 0x4257(%rip), %rdi      # 0x6751
callq 0x1140
movl 0x8(%rsp), %edx
movslq 0x20(%rsp), %r12
testl %edx, %edx
jns 0x2523
movb $0x1, 0x7bd0(%rip)      # 0xa0e3
leaq 0x424d(%rip), %rdi      # 0x6767
callq 0x1140
movl 0x8(%rsp), %edx
movl $0xffffffff, %eax       # imm = 0xFFFFFFFF
subq %rbp, %rax
xorl %ecx, %ecx
cmpq %r12, %rax
setl %cl
negq %rbp
xorl %eax, %eax
cmpq %rbp, %r12
setl %al
movl (%rsp), %ebp
btl $0x1e, %ebp
cmovael %ecx, %eax
movb %al, 0x7b96(%rip)       # 0xa0e4
testb %al, %al
je 0x2562
leaq 0x4109(%rip), %rdi      # 0x6662
callq 0x1140
movl 0x8(%rsp), %edx
movl %r14d, %eax
xorl $0x1f, %eax
movl 0x4(%rsp), %ecx
andl $0x20000000, %ecx       # imm = 0x20000000
orl %eax, %ecx
je 0x2627
movl %r14d, %eax
leaq 0x7b6c(%rip), %rcx      # 0xa0f0
leaq (%rcx,%rax,8), %rdi
movslq %edx, %rsi
jmp 0x2631
movq %r12, %rdi
callq 0x5c86
movq %rax, %r12
movq %rax, %rsi
addq %rbp, %rsi
sete 0x7b39(%rip)            # 0xa0e1
jne 0x25c0
leaq 0x41a0(%rip), %rdi      # 0x6751
movq %rsi, 0x8(%rsp)
callq 0x1140
movq 0x8(%rsp), %rsi
xorl %eax, %eax
movq %r12, %rcx
addq %rbp, %rcx
setb %al
negq %rbp
xorl %ecx, %ecx
cmpq %rbp, %r12
setb %cl
movl (%rsp), %ebp
btl $0x1e, %ebp
movb $0x0, 0x7aff(%rip)      # 0xa0e3
cmovael %eax, %ecx
movb %cl, 0x7af7(%rip)       # 0xa0e4
testb %cl, %cl
je 0x2603
leaq 0x4082(%rip), %rdi      # 0x667a
movq %rsi, %r12
callq 0x1140
movq %r12, %rsi
movl %r14d, %eax
xorl $0x1f, %eax
movl 0x4(%rsp), %ecx
andl $0x20000000, %ecx       # imm = 0x20000000
orl %eax, %ecx
je 0x262a
movl %r14d, %eax
leaq 0x7acf(%rip), %rcx      # 0xa0f0
leaq (%rcx,%rax,8), %rdi
jmp 0x2631
movslq %edx, %rsi
leaq 0x7bb7(%rip), %rdi      # 0xa1e8
callq 0x5c8e
cmpl $0xb, %r13d
jne 0x2843
movl %ebp, (%rsp)
movl 0x1c(%rsp), %r13d
shrl $0xa, %r13d
movl 0x18(%rsp), %ebp
shrl $0x10, %ebp
andl $0x1f, %ebp
leaq 0x4034(%rip), %rdi      # 0x6691
callq 0x1140
btl $0x1f, 0x10(%rsp)
movl %ebx, %eax
leaq 0x7a7f(%rip), %rbx      # 0xa0f0
leaq (%rbx,%rax,8), %rdi
movl %ebp, %eax
leaq (%rbx,%rax,8), %rbp
jb 0x2788
movl (%rsp), %eax
movl %eax, %r12d
shrl $0x1e, %r12d
andl $0x1, %r12d
callq 0x5c8a
movq %rax, 0x10(%rsp)
movq %rbp, %rdi
callq 0x5c8a
andb $0x1f, %r13b
xorl %edx, %edx
testl %r15d, %r15d
movq 0x10(%rsp), %r15
movzbl %r13b, %ecx
cmovnel %edx, %ecx
shll %cl, %eax
leal (%r15,%r12), %ebp
negl %r12d
xorl %eax, %r12d
addl %r12d, %ebp
movl %r14d, %eax
xorl $0x1f, %eax
movl 0x4(%rsp), %ecx
andl $0x20000000, %ecx       # imm = 0x20000000
shll $0x3, %r14d
orl %eax, %ecx
movl $0xf8, %eax
cmovneq %r14, %rax
addq %rax, %rbx
movq %rbx, %rdi
movl %ebp, %esi
callq 0x5c94
testl %r12d, %r12d
jle 0x2712
testl %r15d, %r15d
jle 0x2712
testl %ebp, %ebp
jns 0x2712
movb $0x1, 0x79dc(%rip)      # 0xa0e2
leaq 0x3f9a(%rip), %rdi      # 0x66a7
callq 0x1140
testl %ebp, %ebp
jne 0x2729
movb $0x1, 0x79c4(%rip)      # 0xa0e1
leaq 0x4075(%rip), %rdi      # 0x6799
callq 0x1140
testl %ebp, %ebp
jns 0x2740
movb $0x1, 0x79af(%rip)      # 0xa0e3
leaq 0x3f86(%rip), %rdi      # 0x66c1
callq 0x1140
xorl %eax, %eax
movl %r12d, %ecx
addl %r15d, %ecx
setb %al
negl %r12d
xorl %ecx, %ecx
cmpl %r12d, %r15d
setl %cl
btl $0x1e, (%rsp)
cmovael %eax, %ecx
movb %cl, 0x7980(%rip)       # 0xa0e4
testb %cl, %cl
je 0x2843
leaq 0x39f7(%rip), %rdi      # 0x616a
xorl %eax, %eax
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x1040
andl $0x3f, %r13d
callq 0x5c86
movq %rax, %r12
movq %rbp, %rdi
callq 0x5c86
xorl %ecx, %ecx
testl %r15d, %r15d
cmovel %r13d, %ecx
shlq %cl, %rax
movq %rax, %r15
negq %r15
movl (%rsp), %ebp
btl $0x1e, %ebp
cmovaeq %rax, %r15
movl %r14d, %eax
xorl $0x1f, %eax
movl 0x4(%rsp), %ecx
andl $0x20000000, %ecx       # imm = 0x20000000
shll $0x3, %r14d
orl %eax, %ecx
movl $0xf8, %eax
cmovneq %r14, %rax
addq %rax, %rbx
leaq (%r15,%r12), %rsi
movq %rbx, %rdi
callq 0x5c8e
movq %r15, %rax
addq %r12, %rax
jne 0x2802
leaq 0x3ee5(%rip), %rdi      # 0x66db
callq 0x1140
movb $0x1, 0x78df(%rip)      # 0xa0e1
xorl %eax, %eax
movq %r15, %rcx
addq %r12, %rcx
setb %al
negq %r15
xorl %ecx, %ecx
cmpq %r15, %r12
setb %cl
btl $0x1e, %ebp
cmovael %eax, %ecx
movb %cl, 0x78bf(%rip)       # 0xa0e4
testb %cl, %cl
je 0x2843
leaq 0x3f7f(%rip), %rdi      # 0x67af
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x1140
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq