// File: /workspace/github_cpp_makefile_star2_O3/OpenFodder[P]SOS_Unpacker/capsimg/CAPSImg/CapsFDCEmulator.cpp
// Function: FdcComReadDMap(CapsFdc*)
int FdcComReadDMap(PCAPSFDC pc)
{
	// clear dsr signals
	pc->aminfo&=~(CAPSFDC_AI_DSRREADY|CAPSFDC_AI_DSRAM|CAPSFDC_AI_DSRMA1);

	// get selected drive
	PCAPSDRIVE pd=pc->driveprc;

	// all cycles possibly advanced this time
	UDWORD dist=pd->idistance+(pc->clockreq-pc->clockact);

	// bit complete
	UDWORD sum=pd->timebuf[pd->tracklen-1];
	UDWORD base=pc->datacycle;
	PUDWORD time=pd->timebuf+(pc->datalock>>3);
	UDWORD diff=*time-base;
	int hi=(pc->datalock&7)+1;

	// process until broken
	while (true) {
		// bit is complete at this disk cycle
		UDWORD nextcyc=UDWORD(((UQUAD)(base+(hi*diff)/8)*pd->clockrev)/sum);

		// if not enough time to read bit, return
		if (dist < nextcyc) {
			pd->idistance=dist;
			pc->clockact=pc->clockreq;
			return 0;
		}

		// read bit into shifter
		FdcShiftBit(pc);

		// next bit
		pc->datalock++;

		// next bit timing
		if (hi == 8) {
			hi=1;
			base=*time++;
			pc->datacycle=base;
			diff=*time-base;
		} else
			hi++;

		// if index reached
		if (nextcyc >= pd->clockrev) {
			// adjust to index position
			dist-=pd->clockrev;
			pc->clockact+=pd->clockrev-pd->idistance;
			pd->idistance=0;
			pc->datalock=0;
			base=0;
			pc->datacycle=0;
			time=pd->timebuf;
			diff=*time;
			hi=1;

			// process disk index
			FdcIndex(pc, pc->driveact);

			// we read a complete byte exactly at index, set flag
			if (pc->aminfo & pc->amisigmask)
				return 1;

			// stop on end
			if (pc->endrequest)
				return 0;
		}

		// if a byte is complete, break and signal new byte
		if (pc->aminfo & pc->amisigmask) {
			int dst=pd->idistance;
			pd->idistance=nextcyc;
			pc->clockact+=nextcyc-dst;
			return 1;
		}
	}
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rdi, %rbx
andb $-0x8, 0x61(%rdi)
movq 0x100(%rdi), %rsi
movl 0x10(%rdi), %eax
movl 0x80(%rdi), %r13d
addl 0x24(%rsi), %eax
subl 0xc(%rdi), %eax
movl %eax, 0x4(%rsp)
movq 0x40(%rsi), %rax
movl 0x48(%rsi), %ecx
decl %ecx
movl (%rax,%rcx,4), %ecx
movq %rcx, 0x10(%rsp)
movl 0x88(%rdi), %edx
movl %r13d, %ecx
sarl $0x3, %ecx
movslq %ecx, %rcx
leaq (%rax,%rcx,4), %r14
movl (%r14), %r12d
movl %edx, (%rsp)
subl %edx, %r12d
andl $0x7, %r13d
incl %r13d
movq %r14, 0x8(%rsp)
movl %r13d, %ecx
imull %r12d, %ecx
shrl $0x3, %ecx
addl (%rsp), %ecx
movl 0x28(%rsi), %eax
imulq %rcx, %rax
xorl %edx, %edx
divq 0x10(%rsp)
movq %rax, %r14
cmpl %r14d, 0x4(%rsp)
jb 0x8170
movq %rsi, %rbp
movq %rbx, %rdi
callq 0x81b5
incl 0x80(%rbx)
cmpl $0x8, %r13d
je 0x80dc
incl %r13d
jmp 0x8102
movq 0x8(%rsp), %rax
movl (%rax), %ecx
movl %ecx, 0x88(%rbx)
movl 0x4(%rax), %r12d
addq $0x4, %rax
movl %ecx, (%rsp)
subl %ecx, %r12d
movl $0x1, %r13d
movq %rax, 0x8(%rsp)
movq %rbp, %rsi
movl 0x28(%rbp), %r15d
cmpl %r14d, %r15d
jbe 0x8118
movl 0x64(%rbx), %eax
testl %eax, 0x60(%rbx)
je 0x8097
jmp 0x8183
movl %r15d, %eax
subl 0x24(%rsi), %eax
addl %eax, 0xc(%rbx)
xorl %eax, %eax
movl %eax, 0x24(%rsi)
movl %eax, 0x80(%rbx)
movl %eax, 0x88(%rbx)
movq 0x40(%rsi), %r14
movl (%r14), %r12d
movl 0xfc(%rbx), %esi
movq %rbx, %rdi
callq 0x7ac2
movl 0x64(%rbx), %eax
testl %eax, 0x60(%rbx)
jne 0x81ac
subl %r15d, 0x4(%rsp)
movl $0x1, %r13d
movl $0x0, (%rsp)
cmpl $0x0, 0x8(%rbx)
movq %rbp, %rsi
je 0x8092
jmp 0x819a
movl 0x4(%rsp), %eax
movl %eax, 0x24(%rsi)
movl 0x10(%rbx), %eax
movl $0x0, (%rsp)
jmp 0x8197
movl %r14d, %eax
subl 0x24(%rsi), %eax
movl %r14d, 0x24(%rsi)
addl 0xc(%rbx), %eax
movl $0x1, (%rsp)
movl %eax, 0xc(%rbx)
movl (%rsp), %eax
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movl $0x1, (%rsp)
jmp 0x819a