// File: stetre[P]moonvulkan/src/flags.c
// Function: pushaccessflags
static int pushaccessflags(lua_State *L, VkFlags64 flags)
    {
    int n = 0;

#define CASE(CODE,str) do { if( flags & CODE) { lua_pushstring(L, str); n++; } } while(0)
    CASE(VK_ACCESS_INDIRECT_COMMAND_READ_BIT, "indirect command read");
    CASE(VK_ACCESS_INDEX_READ_BIT, "index read");
    CASE(VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT, "vertex attribute read");
    CASE(VK_ACCESS_UNIFORM_READ_BIT, "uniform read");
    CASE(VK_ACCESS_INPUT_ATTACHMENT_READ_BIT, "input attachment read");
    CASE(VK_ACCESS_SHADER_READ_BIT, "shader read");
    CASE(VK_ACCESS_SHADER_WRITE_BIT, "shader write");
    CASE(VK_ACCESS_COLOR_ATTACHMENT_READ_BIT, "color attachment read");
    CASE(VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT, "color attachment write");
    CASE(VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT, "depth stencil attachment read");
    CASE(VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT, "depth stencil attachment write");
    CASE(VK_ACCESS_TRANSFER_READ_BIT, "transfer read");
    CASE(VK_ACCESS_TRANSFER_WRITE_BIT, "transfer write");
    CASE(VK_ACCESS_HOST_READ_BIT, "host read");
    CASE(VK_ACCESS_HOST_WRITE_BIT, "host write");
    CASE(VK_ACCESS_MEMORY_READ_BIT, "memory read");
    CASE(VK_ACCESS_MEMORY_WRITE_BIT, "memory write");
    CASE(VK_ACCESS_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT, "color attachment read noncoherent");
    CASE(VK_ACCESS_CONDITIONAL_RENDERING_READ_BIT, "conditional rendering read");
    CASE(VK_ACCESS_TRANSFORM_FEEDBACK_WRITE_BIT, "transform feedback write");
    CASE(VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_READ_BIT, "transform feedback counter read");
    CASE(VK_ACCESS_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT, "transform feedback counter write");
    CASE(VK_ACCESS_FRAGMENT_DENSITY_MAP_READ_BIT, "fragment density map read");
    CASE(VK_ACCESS_ACCELERATION_STRUCTURE_READ_BIT, "acceleration structure read");
    CASE(VK_ACCESS_ACCELERATION_STRUCTURE_WRITE_BIT, "acceleration structure write");
    CASE(VK_ACCESS_FRAGMENT_SHADING_RATE_ATTACHMENT_READ_BIT, "fragment shading rate attachment read");
    CASE(VK_ACCESS_NONE, "none");
    CASE(VK_ACCESS_SHADER_SAMPLED_READ_BIT, "shader sampled read");
    CASE(VK_ACCESS_SHADER_STORAGE_READ_BIT, "shader storage read");
    CASE(VK_ACCESS_SHADER_STORAGE_WRITE_BIT, "shader storage write");
#undef CASE
    return n;
    }

// Assembly:
subq $0x18, %rsp
movq %rdi, 0x10(%rsp)
movq %rsi, 0x8(%rsp)
movl $0x0, 0x4(%rsp)
movq 0x8(%rsp), %rax
andq $0x1, %rax
cmpq $0x0, %rax
je 0x475b1
movq 0x10(%rsp), %rdi
leaq 0x966a4(%rip), %rsi     # 0xddc45
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x475b3
jmp 0x475b5
movq 0x8(%rsp), %rax
andq $0x2, %rax
cmpq $0x0, %rax
je 0x475e0
movq 0x10(%rsp), %rdi
leaq 0x9668b(%rip), %rsi     # 0xddc5b
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x475e2
jmp 0x475e4
movq 0x8(%rsp), %rax
andq $0x4, %rax
cmpq $0x0, %rax
je 0x4760f
movq 0x10(%rsp), %rdi
leaq 0x96667(%rip), %rsi     # 0xddc66
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47611
jmp 0x47613
movq 0x8(%rsp), %rax
andq $0x8, %rax
cmpq $0x0, %rax
je 0x4763e
movq 0x10(%rsp), %rdi
leaq 0x9664e(%rip), %rsi     # 0xddc7c
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47640
jmp 0x47642
movq 0x8(%rsp), %rax
andq $0x10, %rax
cmpq $0x0, %rax
je 0x4766d
movq 0x10(%rsp), %rdi
leaq 0x9662c(%rip), %rsi     # 0xddc89
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x4766f
jmp 0x47671
movq 0x8(%rsp), %rax
andq $0x20, %rax
cmpq $0x0, %rax
je 0x4769c
movq 0x10(%rsp), %rdi
leaq 0x96613(%rip), %rsi     # 0xddc9f
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x4769e
jmp 0x476a0
movq 0x8(%rsp), %rax
andq $0x40, %rax
cmpq $0x0, %rax
je 0x476cb
movq 0x10(%rsp), %rdi
leaq 0x965f0(%rip), %rsi     # 0xddcab
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x476cd
jmp 0x476cf
movq 0x8(%rsp), %rax
andq $0x80, %rax
cmpq $0x0, %rax
je 0x476fc
movq 0x10(%rsp), %rdi
leaq 0x965cc(%rip), %rsi     # 0xddcb8
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x476fe
jmp 0x47700
movq 0x8(%rsp), %rax
andq $0x100, %rax            # imm = 0x100
cmpq $0x0, %rax
je 0x4772d
movq 0x10(%rsp), %rdi
leaq 0x965b1(%rip), %rsi     # 0xddcce
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x4772f
jmp 0x47731
movq 0x8(%rsp), %rax
andq $0x200, %rax            # imm = 0x200
cmpq $0x0, %rax
je 0x4775e
movq 0x10(%rsp), %rdi
leaq 0x96597(%rip), %rsi     # 0xddce5
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47760
jmp 0x47762
movq 0x8(%rsp), %rax
andq $0x400, %rax            # imm = 0x400
cmpq $0x0, %rax
je 0x4778f
movq 0x10(%rsp), %rdi
leaq 0x96584(%rip), %rsi     # 0xddd03
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47791
jmp 0x47793
movq 0x8(%rsp), %rax
andq $0x800, %rax            # imm = 0x800
cmpq $0x0, %rax
je 0x477c0
movq 0x10(%rsp), %rdi
leaq 0x96572(%rip), %rsi     # 0xddd22
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x477c2
jmp 0x477c4
movq 0x8(%rsp), %rax
andq $0x1000, %rax           # imm = 0x1000
cmpq $0x0, %rax
je 0x477f1
movq 0x10(%rsp), %rdi
leaq 0x9654f(%rip), %rsi     # 0xddd30
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x477f3
jmp 0x477f5
movq 0x8(%rsp), %rax
andq $0x2000, %rax           # imm = 0x2000
cmpq $0x0, %rax
je 0x47822
movq 0x10(%rsp), %rdi
leaq 0x9652d(%rip), %rsi     # 0xddd3f
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47824
jmp 0x47826
movq 0x8(%rsp), %rax
andq $0x4000, %rax           # imm = 0x4000
cmpq $0x0, %rax
je 0x47853
movq 0x10(%rsp), %rdi
leaq 0x96506(%rip), %rsi     # 0xddd49
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47855
jmp 0x47857
movq 0x8(%rsp), %rax
andq $0x8000, %rax           # imm = 0x8000
cmpq $0x0, %rax
je 0x47884
movq 0x10(%rsp), %rdi
leaq 0x964e0(%rip), %rsi     # 0xddd54
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47886
jmp 0x47888
movq 0x8(%rsp), %rax
andq $0x10000, %rax          # imm = 0x10000
cmpq $0x0, %rax
je 0x478b5
movq 0x10(%rsp), %rdi
leaq 0x964bb(%rip), %rsi     # 0xddd60
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x478b7
jmp 0x478b9
movq 0x8(%rsp), %rax
andq $0x80000, %rax          # imm = 0x80000
cmpq $0x0, %rax
je 0x478e6
movq 0x10(%rsp), %rdi
leaq 0x96497(%rip), %rsi     # 0xddd6d
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x478e8
jmp 0x478ea
movq 0x8(%rsp), %rax
andq $0x100000, %rax         # imm = 0x100000
cmpq $0x0, %rax
je 0x47917
movq 0x10(%rsp), %rdi
leaq 0x96488(%rip), %rsi     # 0xddd8f
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47919
jmp 0x4791b
movq 0x8(%rsp), %rax
andq $0x2000000, %rax        # imm = 0x2000000
cmpq $0x0, %rax
je 0x47948
movq 0x10(%rsp), %rdi
leaq 0x96472(%rip), %rsi     # 0xdddaa
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x4794a
jmp 0x4794c
movq 0x8(%rsp), %rax
andq $0x4000000, %rax        # imm = 0x4000000
cmpq $0x0, %rax
je 0x47979
movq 0x10(%rsp), %rdi
leaq 0x9645a(%rip), %rsi     # 0xdddc3
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x4797b
jmp 0x4797d
movq 0x8(%rsp), %rax
andq $0x8000000, %rax        # imm = 0x8000000
cmpq $0x0, %rax
je 0x479aa
movq 0x10(%rsp), %rdi
leaq 0x96449(%rip), %rsi     # 0xddde3
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x479ac
jmp 0x479ae
movq 0x8(%rsp), %rax
andq $0x1000000, %rax        # imm = 0x1000000
cmpq $0x0, %rax
je 0x479db
movq 0x10(%rsp), %rdi
leaq 0x96439(%rip), %rsi     # 0xdde04
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x479dd
jmp 0x479df
movq 0x8(%rsp), %rax
andq $0x200000, %rax         # imm = 0x200000
cmpq $0x0, %rax
je 0x47a0c
movq 0x10(%rsp), %rdi
leaq 0x96422(%rip), %rsi     # 0xdde1e
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47a0e
jmp 0x47a10
movq 0x8(%rsp), %rax
andq $0x400000, %rax         # imm = 0x400000
cmpq $0x0, %rax
je 0x47a3d
movq 0x10(%rsp), %rdi
leaq 0x9640d(%rip), %rsi     # 0xdde3a
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47a3f
jmp 0x47a41
movq 0x8(%rsp), %rax
andq $0x800000, %rax         # imm = 0x800000
cmpq $0x0, %rax
je 0x47a6e
movq 0x10(%rsp), %rdi
leaq 0x963f9(%rip), %rsi     # 0xdde57
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47a70
jmp 0x47a72
movq 0x8(%rsp), %rax
andq $0x0, %rax
cmpq $0x0, %rax
je 0x47a9d
movq 0x10(%rsp), %rdi
leaq 0xa0e29(%rip), %rsi     # 0xe88b6
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47a9f
jmp 0x47aa1
movabsq $0x100000000, %rax      # imm = 0x100000000
andq 0x8(%rsp), %rax
cmpq $0x0, %rax
je 0x47ad2
movq 0x10(%rsp), %rdi
leaq 0x963bb(%rip), %rsi     # 0xdde7d
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47ad4
jmp 0x47ad6
movabsq $0x200000000, %rax      # imm = 0x200000000
andq 0x8(%rsp), %rax
cmpq $0x0, %rax
je 0x47b07
movq 0x10(%rsp), %rdi
leaq 0x9639a(%rip), %rsi     # 0xdde91
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47b09
jmp 0x47b0b
movabsq $0x400000000, %rax      # imm = 0x400000000
andq 0x8(%rsp), %rax
cmpq $0x0, %rax
je 0x47b3c
movq 0x10(%rsp), %rdi
leaq 0x96379(%rip), %rsi     # 0xddea5
callq 0x1a420
movl 0x4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x4(%rsp)
jmp 0x47b3e
movl 0x4(%rsp), %eax
addq $0x18, %rsp
retq
nopw (%rax,%rax)