// File: /workspace/github_c_makefile_star2_O0/ughman[P]c2c/src/emu.c
// Function: EMU_Write32
void EMU_Write32(uint32_t address,uint32_t value)
{
	if (address & 3)
		SDL_LogError(LOG_EMU,"Unaligned word store");
	if (address >= 0x80000000 && address <= 0x801FFFFF)
	{
normal:
		{
			uint32_t (*codehandler)(uint32_t) = EMU_codemap[(address & 0x1FFFFF) >> 2];
			if (codehandler != EMU_ExecuteUnrecognizedCode)
			{
				SDL_LogError(LOG_EMU,"Writing over code");
			}
		}
		EMU_ram[(address & 0x1FFFFF) >> 2] = value;
	}
	else if (address >= 0x0 && address <= 0x1FFFFF)
	{
		goto normal;
	}
	else if (address >= 0xA0000000 && address <= 0xA01FFFFF)
	{
		goto normal;
	}
	else if (address >= 0x1F800000 && address <= 0x1F8003FF)
	{
		EMU_scratch[(address & 0x3FF) >> 2] = value;
	}
	else switch (address)
	{
	case 0x1F801014:
	case 0x1F801018:
	case 0x1F801020:
		// Unused waitstate configuration
		PCSX_Write32(address,value);
		break;
	case 0x1F801074:
		IRQ_SetMask(value);
		break;
	case 0x1F8010A0:
		DMA_SetAddress(DMA_GPU,value);
		break;
	case 0x1F8010A4:
		DMA_SetBlockData(DMA_GPU,value);
		break;
	case 0x1F8010A8:
		DMA_SetMode(DMA_GPU,value);
		break;
	case 0x1F8010B0:
		DMA_SetAddress(DMA_CDR,value);
		break;
	case 0x1F8010B4:
		DMA_SetBlockData(DMA_CDR,value);
		break;
	case 0x1F8010B8:
		DMA_SetMode(DMA_CDR,value);
		break;
	case 0x1F8010C0:
		DMA_SetAddress(DMA_SPU,value);
		break;
	case 0x1F8010C4:
		DMA_SetBlockData(DMA_SPU,value);
		break;
	case 0x1F8010C8:
		DMA_SetMode(DMA_SPU,value);
		break;
	case 0x1F8010F0:
		DMA_SetControlRegister(value);
		break;
	case 0x1F8010F4:
		DMA_SetInterruptRegister(value);
		break;
	case 0x1F801114:
		RCNT_SetMode(RCNT_HBLANK,value);
		break;
	case 0x1F801810:
		GPU_Write(value);
		break;
	case 0x1F801814:
		GPU_WriteAlt(value);
		break;
	default:
		SDL_LogError(LOG_EMU,"Unrecognized 32-bit write address %.8X",address);
		PCSX_Write32(address,value);
		break;
	}
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movl %edi, -0x4(%rbp)
movl %esi, -0x8(%rbp)
movl -0x4(%rbp), %eax
andl $0x3, %eax
cmpl $0x0, %eax
je 0x31d41c
movl $0x13, %edi
leaq 0x539b(%rip), %rsi      # 0x3227b0
movb $0x0, %al
callq 0x10d0
cmpl $0x80000000, -0x4(%rbp) # imm = 0x80000000
jb 0x31d48e
cmpl $0x801fffff, -0x4(%rbp) # imm = 0x801FFFFF
ja 0x31d48e
jmp 0x31d430
movl -0x4(%rbp), %eax
andl $0x1fffff, %eax         # imm = 0x1FFFFF
shrl $0x2, %eax
movl %eax, %eax
movl %eax, %ecx
leaq 0x959a(%rip), %rax      # 0x3269e0
movq (%rax,%rcx,8), %rax
movq %rax, -0x10(%rbp)
leaq -0x2de5(%rip), %rax     # 0x31a670
cmpq %rax, -0x10(%rbp)
je 0x31d46e
movl $0x13, %edi
leaq 0x52d1(%rip), %rsi      # 0x322738
movb $0x0, %al
callq 0x10d0
movl -0x8(%rbp), %edx
movq 0x409568(%rip), %rax    # 0x7269e0
movl -0x4(%rbp), %ecx
andl $0x1fffff, %ecx         # imm = 0x1FFFFF
shrl $0x2, %ecx
movl %ecx, %ecx
movl %edx, (%rax,%rcx,4)
jmp 0x31d73b
cmpl $0x0, -0x4(%rbp)
jb 0x31d49f
cmpl $0x1fffff, -0x4(%rbp)   # imm = 0x1FFFFF
ja 0x31d49f
jmp 0x31d430
cmpl $0xa0000000, -0x4(%rbp) # imm = 0xA0000000
jb 0x31d4b6
cmpl $0xa01fffff, -0x4(%rbp) # imm = 0xA01FFFFF
ja 0x31d4b6
jmp 0x31d430
cmpl $0x1f800000, -0x4(%rbp) # imm = 0x1F800000
jb 0x31d4e8
cmpl $0x1f8003ff, -0x4(%rbp) # imm = 0x1F8003FF
ja 0x31d4e8
movl -0x8(%rbp), %edx
movq 0x409516(%rip), %rax    # 0x7269e8
movl -0x4(%rbp), %ecx
andl $0x3ff, %ecx            # imm = 0x3FF
shrl $0x2, %ecx
movl %ecx, %ecx
movl %edx, (%rax,%rcx,4)
jmp 0x31d735
movl -0x4(%rbp), %eax
movl %eax, -0x14(%rbp)
subl $0x1f801014, %eax       # imm = 0x1F801014
je 0x31d60e
jmp 0x31d4fb
movl -0x14(%rbp), %eax
subl $0x1f801018, %eax       # imm = 0x1F801018
je 0x31d60e
jmp 0x31d50b
movl -0x14(%rbp), %eax
subl $0x1f801020, %eax       # imm = 0x1F801020
je 0x31d60e
jmp 0x31d51b
movl -0x14(%rbp), %eax
subl $0x1f801074, %eax       # imm = 0x1F801074
je 0x31d625
jmp 0x31d52b
movl -0x14(%rbp), %eax
subl $0x1f8010a0, %eax       # imm = 0x1F8010A0
je 0x31d635
jmp 0x31d53b
movl -0x14(%rbp), %eax
subl $0x1f8010a4, %eax       # imm = 0x1F8010A4
je 0x31d647
jmp 0x31d54b
movl -0x14(%rbp), %eax
subl $0x1f8010a8, %eax       # imm = 0x1F8010A8
je 0x31d659
jmp 0x31d55b
movl -0x14(%rbp), %eax
subl $0x1f8010b0, %eax       # imm = 0x1F8010B0
je 0x31d66b
jmp 0x31d56b
movl -0x14(%rbp), %eax
subl $0x1f8010b4, %eax       # imm = 0x1F8010B4
je 0x31d67d
jmp 0x31d57b
movl -0x14(%rbp), %eax
subl $0x1f8010b8, %eax       # imm = 0x1F8010B8
je 0x31d68f
jmp 0x31d58b
movl -0x14(%rbp), %eax
subl $0x1f8010c0, %eax       # imm = 0x1F8010C0
je 0x31d6a1
jmp 0x31d59b
movl -0x14(%rbp), %eax
subl $0x1f8010c4, %eax       # imm = 0x1F8010C4
je 0x31d6b3
jmp 0x31d5ab
movl -0x14(%rbp), %eax
subl $0x1f8010c8, %eax       # imm = 0x1F8010C8
je 0x31d6c2
jmp 0x31d5bb
movl -0x14(%rbp), %eax
subl $0x1f8010f0, %eax       # imm = 0x1F8010F0
je 0x31d6d1
jmp 0x31d5cb
movl -0x14(%rbp), %eax
subl $0x1f8010f4, %eax       # imm = 0x1F8010F4
je 0x31d6db
jmp 0x31d5db
movl -0x14(%rbp), %eax
subl $0x1f801114, %eax       # imm = 0x1F801114
je 0x31d6e5
jmp 0x31d5eb
movl -0x14(%rbp), %eax
subl $0x1f801810, %eax       # imm = 0x1F801810
je 0x31d6f7
jmp 0x31d5fb
movl -0x14(%rbp), %eax
subl $0x1f801814, %eax       # imm = 0x1F801814
je 0x31d701
jmp 0x31d70b
leaq 0x9313(%rip), %rax      # 0x326928
movq (%rax), %rax
movl -0x4(%rbp), %edi
movl -0x8(%rbp), %esi
callq *%rax
jmp 0x31d733
movl -0x8(%rbp), %eax
movzwl %ax, %edi
callq 0x3190b0
jmp 0x31d733
movl -0x8(%rbp), %esi
movl $0x2, %edi
callq 0x319230
jmp 0x31d733
movl -0x8(%rbp), %esi
movl $0x2, %edi
callq 0x319260
jmp 0x31d733
movl -0x8(%rbp), %esi
movl $0x2, %edi
callq 0x3192c0
jmp 0x31d733
movl -0x8(%rbp), %esi
movl $0x3, %edi
callq 0x319230
jmp 0x31d733
movl -0x8(%rbp), %esi
movl $0x3, %edi
callq 0x319260
jmp 0x31d733
movl -0x8(%rbp), %esi
movl $0x3, %edi
callq 0x3192c0
jmp 0x31d733
movl -0x8(%rbp), %esi
movl $0x4, %edi
callq 0x319230
jmp 0x31d733
movl -0x8(%rbp), %esi
movl $0x4, %edi
callq 0x319260
jmp 0x31d733
movl -0x8(%rbp), %esi
movl $0x4, %edi
callq 0x3192c0
jmp 0x31d733
movl -0x8(%rbp), %edi
callq 0x319310
jmp 0x31d733
movl -0x8(%rbp), %edi
callq 0x319360
jmp 0x31d733
movl -0x8(%rbp), %eax
movl $0x1, %edi
movzwl %ax, %esi
callq 0x3191b0
jmp 0x31d733
movl -0x8(%rbp), %edi
callq 0x319100
jmp 0x31d733
movl -0x8(%rbp), %edi
callq 0x319130
jmp 0x31d733
movl -0x4(%rbp), %edx
movl $0x13, %edi
leaq 0x50ab(%rip), %rsi      # 0x3227c5
movb $0x0, %al
callq 0x10d0
leaq 0x9200(%rip), %rax      # 0x326928
movq (%rax), %rax
movl -0x4(%rbp), %edi
movl -0x8(%rbp), %esi
callq *%rax
jmp 0x31d735
jmp 0x31d737
jmp 0x31d739
jmp 0x31d73b
addq $0x20, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)