// File: bloody76[P]Chip8-Disassembler/src/disassembler.cc
// Function: pretty_print()
void pretty_print()
{
    for (int i = 0; i < size; i += 2)
    {
        auto it = functions.find(i + 0x200);
        if (it != functions.end())
        {
            std::cout << "\t";
            if (it->first == 0x200)
                std::cout << "start";
            else
            {
                if (it->second == Type::SUB)
                    std::cout << "sub_";
                else
                    std::cout << "adr_";
                std::cout << it->first;
            }
            std::cout  << ":" << std::endl;
        }
        uint16 op = (mem[i] << 8) | mem[i + 1];
        {
            std::cout << "0x" << std::hex << op << std::dec << "|\t\t";
            switch ((op & 0xF000) >> 12)
            {
                case 0:
                    if ((op & 0x0FFF) == 0xE0)
                        std::cout << "CLS";
                    else if ((op & 0x0FFF) == 0xEE)
                        std::cout << "RET";
                    else
                        std::cout << "GOTO adr:" << (op & 0x0FFF);
                    break;
                case 1:
                    std::cout << "JP " << (op & 0x0FFF);
                    break;
                case 2:
                    std::cout << "CALL sub_" << (op & 0x0FFF);
                    break;
                case 3:
                    std::cout << "SE V" << ((op & 0x0F00) >> 8) << ", " << (op & 0x00FF);
                    break;
                case 4:
                    std::cout << "SNE V" << ((op & 0x0F00) >> 8) << ", " << (op & 0x00FF);
                    break;
                case 5:
                    std::cout << "SE V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                    break;
                case 6:
                    std::cout << "LD V" << ((op & 0x0F00) >> 8) << ", " << (op & 0x00FF);
                    break;
                case 7:
                    std::cout << "ADD V" << ((op & 0x0F00) >> 8) << ", " << (op & 0x00FF);
                    break;
                case 8:
                    switch (op & 0x000F)
                    {
                        case 0:
                            std::cout << "LD V" << ((op & 0x00F0) >> 4) << ", V" << ((op & 0x0F00) >> 8);
                            break;
                        case 1:
                            std::cout << "OR V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                            break;
                        case 2:
                            std::cout << "AND V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                            break;
                        case 3:
                            std::cout << "XOR V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                            break;
                        case 4:
                            std::cout << "ADD V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                            break;
                        case 5:
                            std::cout << "SUB V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                            break;
                        case 6:
                            std::cout << "SHR V" << ((op & 0x0F00) >> 8);
                            break;
                        case 7:
                            std::cout << "SUBN V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                            break;
                        case 0xE:
                            std::cout << "SHL V" << ((op & 0x0F00) >> 8);
                            break;
                    }
                    break;
                case 9:
                    std::cout << "SNE V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                    break;
                case 0xA:
                    std::cout << "LD I, " << (op & 0x0FFF);
                    break;
                case 0xB:
                    std::cout << "JP V0, " << (op & 0x0FFF);
                    break;
                case 0xC:
                    std::cout << "RND V" << ((op & 0x0F00) >> 8) << ", " << (op & 0x00FF);
                    break;
                case 0xD:
                    std::cout << "DRW V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4) << ", " << (op & 0x00FF);
                    break;
                case 0xE:
                    switch (op & 0x00FF)
                    {
                        case 0x9E:
                            std::cout << "SKP V" << ((op & 0x0F00) >> 8);
                            break;
                        case 0xA1:
                            std::cout << "SKNP V" << ((op & 0x0F00) >> 8);
                            break;
                    }
                    break;
                case 0xF:
                    switch (op & 0x00FF)
                    {
                        case 0x07:
                            std::cout << "LD V" << ((op & 0x0F00) >> 8) << ", DT";
                            break;
                        case 0x0A:
                            std::cout << "LD V" << ((op & 0x0F00) >> 8) << ", K";
                            break;
                        case 0x15:
                            std::cout << "LD DT, V" << ((op & 0x0F00) >> 8);
                            break;
                        case 0x18:
                            std::cout << "LD ST, V" << ((op & 0x0F00) >> 8);
                            break;
                        case 0x1E:
                            std::cout << "ADD I, V" << ((op & 0x0F00) >> 8);
                            break;
                        case 0x29:
                            std::cout << "LD F, V" << ((op & 0x0F00) >> 8);
                            break;
                        case 0x33:
                            std::cout << "LD B, V" << ((op & 0x0F00) >> 8);
                            break;
                        case 0x55:
                            std::cout << "LD [I], V" << ((op & 0x0F00) >> 8);
                            break;
                        case 0x65:
                            std::cout << "LD V" << ((op & 0x0F00) >> 8) << ", [i]";
                            break;
                    }
                    break;
                default:
                    std::cout << op;
                    break;
            }
            std::cout << std::endl;
        }
    }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x50, %rsp
movl $0x0, -0x4(%rbp)
movslq -0x4(%rbp), %rax
movq %rax, -0x30(%rbp)
leaq 0x5b42(%rip), %rdi      # 0x81e0
callq 0x3400
movq %rax, %rcx
movq -0x30(%rbp), %rax
cmpq %rcx, %rax
jge 0x3183
movl -0x4(%rbp), %eax
addl $0x200, %eax            # imm = 0x200
movw %ax, -0x12(%rbp)
leaq 0x5ae2(%rip), %rdi      # 0x81a8
leaq -0x12(%rbp), %rsi
callq 0x3500
movq %rax, -0x10(%rbp)
leaq 0x5ace(%rip), %rdi      # 0x81a8
callq 0x3560
movq %rax, -0x20(%rbp)
leaq -0x10(%rbp), %rdi
leaq -0x20(%rbp), %rsi
callq 0x3530
testb $0x1, %al
jne 0x26f9
jmp 0x27a5
movq 0x58d0(%rip), %rdi      # 0x7fd0
leaq 0x29a2(%rip), %rsi      # 0x50a9
callq 0x2160
leaq -0x10(%rbp), %rdi
callq 0x3590
movzwl (%rax), %eax
cmpl $0x200, %eax            # imm = 0x200
jne 0x2734
movq 0x58aa(%rip), %rdi      # 0x7fd0
leaq 0x296c(%rip), %rsi      # 0x5099
callq 0x2160
jmp 0x2783
leaq -0x10(%rbp), %rdi
callq 0x3590
cmpl $0x0, 0x4(%rax)
jne 0x2758
movq 0x5886(%rip), %rdi      # 0x7fd0
leaq 0x2975(%rip), %rsi      # 0x50c6
callq 0x2160
jmp 0x276b
movq 0x5871(%rip), %rdi      # 0x7fd0
leaq 0x2939(%rip), %rsi      # 0x509f
callq 0x2160
leaq -0x10(%rbp), %rdi
callq 0x3590
movq 0x5855(%rip), %rdi      # 0x7fd0
movzwl (%rax), %esi
callq 0x2290
movq 0x5846(%rip), %rdi      # 0x7fd0
leaq 0x292a(%rip), %rsi      # 0x50bb
callq 0x2160
movq %rax, %rdi
movq 0x5820(%rip), %rsi      # 0x7fc0
callq 0x21a0
movq 0x5a2c(%rip), %rcx      # 0x81d8
movslq -0x4(%rbp), %rdx
movzbl (%rcx,%rdx), %eax
shll $0x8, %eax
movzbl 0x1(%rcx,%rdx), %ecx
orl %ecx, %eax
movw %ax, -0x22(%rbp)
movq 0x5807(%rip), %rdi      # 0x7fd0
leaq 0x28d4(%rip), %rsi      # 0x50a4
callq 0x2160
movq %rax, %rdi
leaq 0xdd1(%rip), %rsi       # 0x35b0
callq 0x2090
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
callq 0x2290
movq %rax, %rdi
leaq 0xde6(%rip), %rsi       # 0x35e0
callq 0x2090
movq %rax, %rdi
leaq 0x289e(%rip), %rsi      # 0x50a7
callq 0x2160
movzwl -0x22(%rbp), %eax
shrl $0xc, %eax
movl %eax, %ecx
movq %rcx, -0x38(%rbp)
subl $0xf, %eax
ja 0x3152
movq -0x38(%rbp), %rax
leaq 0x27d5(%rip), %rcx      # 0x5004
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movzwl -0x22(%rbp), %eax
andl $0xfff, %eax            # imm = 0xFFF
cmpl $0xe0, %eax
jne 0x285d
movq 0x5781(%rip), %rdi      # 0x7fd0
leaq 0x2855(%rip), %rsi      # 0x50ab
callq 0x2160
jmp 0x28a9
movzwl -0x22(%rbp), %eax
andl $0xfff, %eax            # imm = 0xFFF
cmpl $0xee, %eax
jne 0x2882
movq 0x575c(%rip), %rdi      # 0x7fd0
leaq 0x2834(%rip), %rsi      # 0x50af
callq 0x2160
jmp 0x28a7
movq 0x5747(%rip), %rdi      # 0x7fd0
leaq 0x2823(%rip), %rsi      # 0x50b3
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xfff, %esi            # imm = 0xFFF
callq 0x22a0
jmp 0x28a9
jmp 0x3162
movq 0x571b(%rip), %rdi      # 0x7fd0
leaq 0x2801(%rip), %rsi      # 0x50bd
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xfff, %esi            # imm = 0xFFF
callq 0x22a0
jmp 0x3162
movq 0x56f1(%rip), %rdi      # 0x7fd0
leaq 0x27db(%rip), %rsi      # 0x50c1
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xfff, %esi            # imm = 0xFFF
callq 0x22a0
jmp 0x3162
movq 0x56c7(%rip), %rdi      # 0x7fd0
leaq 0x27bb(%rip), %rsi      # 0x50cb
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x27de(%rip), %rsi      # 0x5112
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xff, %esi
callq 0x22a0
jmp 0x3162
movq 0x5679(%rip), %rdi      # 0x7fd0
leaq 0x2772(%rip), %rsi      # 0x50d0
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x2790(%rip), %rsi      # 0x5112
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xff, %esi
callq 0x22a0
jmp 0x3162
movq 0x562b(%rip), %rdi      # 0x7fd0
leaq 0x271f(%rip), %rsi      # 0x50cb
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x278e(%rip), %rsi      # 0x515e
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf0, %esi
sarl $0x4, %esi
callq 0x22a0
jmp 0x3162
movq 0x55da(%rip), %rdi      # 0x7fd0
leaq 0x26d9(%rip), %rsi      # 0x50d6
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x26f1(%rip), %rsi      # 0x5112
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xff, %esi
callq 0x22a0
jmp 0x3162
movq 0x558c(%rip), %rdi      # 0x7fd0
leaq 0x2690(%rip), %rsi      # 0x50db
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x26a3(%rip), %rsi      # 0x5112
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xff, %esi
callq 0x22a0
jmp 0x3162
movzwl -0x22(%rbp), %eax
andl $0xf, %eax
movl %eax, %ecx
movq %rcx, -0x40(%rbp)
subl $0xe, %eax
ja 0x2d3b
movq -0x40(%rbp), %rax
leaq 0x2598(%rip), %rcx      # 0x5044
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movq 0x5514(%rip), %rdi      # 0x7fd0
leaq 0x2613(%rip), %rsi      # 0x50d6
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf0, %esi
sarl $0x4, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x2677(%rip), %rsi      # 0x515e
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
jmp 0x2d3b
movq 0x54c3(%rip), %rdi      # 0x7fd0
leaq 0x25d4(%rip), %rsi      # 0x50e8
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x2626(%rip), %rsi      # 0x515e
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf0, %esi
sarl $0x4, %esi
callq 0x22a0
jmp 0x2d3b
movq 0x5472(%rip), %rdi      # 0x7fd0
leaq 0x257c(%rip), %rsi      # 0x50e1
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x25d5(%rip), %rsi      # 0x515e
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf0, %esi
sarl $0x4, %esi
callq 0x22a0
jmp 0x2d3b
movq 0x5421(%rip), %rdi      # 0x7fd0
leaq 0x2531(%rip), %rsi      # 0x50e7
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x2584(%rip), %rsi      # 0x515e
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf0, %esi
sarl $0x4, %esi
callq 0x22a0
jmp 0x2d3b
movq 0x53d0(%rip), %rdi      # 0x7fd0
leaq 0x24d4(%rip), %rsi      # 0x50db
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x2533(%rip), %rsi      # 0x515e
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf0, %esi
sarl $0x4, %esi
callq 0x22a0
jmp 0x2d3b
movq 0x537f(%rip), %rdi      # 0x7fd0
leaq 0x2495(%rip), %rsi      # 0x50ed
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x24e2(%rip), %rsi      # 0x515e
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf0, %esi
sarl $0x4, %esi
callq 0x22a0
jmp 0x2d3b
movq 0x532e(%rip), %rdi      # 0x7fd0
leaq 0x244a(%rip), %rsi      # 0x50f3
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
jmp 0x2d3b
movq 0x5304(%rip), %rdi      # 0x7fd0
leaq 0x2426(%rip), %rsi      # 0x50f9
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x2467(%rip), %rsi      # 0x515e
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf0, %esi
sarl $0x4, %esi
callq 0x22a0
jmp 0x2d3b
movq 0x52b6(%rip), %rdi      # 0x7fd0
leaq 0x23df(%rip), %rsi      # 0x5100
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
jmp 0x3162
movq 0x5289(%rip), %rdi      # 0x7fd0
leaq 0x2382(%rip), %rsi      # 0x50d0
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x23ec(%rip), %rsi      # 0x515e
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf0, %esi
sarl $0x4, %esi
callq 0x22a0
jmp 0x3162
movq 0x5238(%rip), %rdi      # 0x7fd0
leaq 0x2367(%rip), %rsi      # 0x5106
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xfff, %esi            # imm = 0xFFF
callq 0x22a0
jmp 0x3162
movq 0x520e(%rip), %rdi      # 0x7fd0
leaq 0x2344(%rip), %rsi      # 0x510d
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xfff, %esi            # imm = 0xFFF
callq 0x22a0
jmp 0x3162
movq 0x51e4(%rip), %rdi      # 0x7fd0
leaq 0x2322(%rip), %rsi      # 0x5115
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x22fb(%rip), %rsi      # 0x5112
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xff, %esi
callq 0x22a0
jmp 0x3162
movq 0x5196(%rip), %rdi      # 0x7fd0
leaq 0x22da(%rip), %rsi      # 0x511b
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x22f9(%rip), %rsi      # 0x515e
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf0, %esi
sarl $0x4, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x2289(%rip), %rsi      # 0x5112
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xff, %esi
callq 0x22a0
jmp 0x3162
movzbl -0x22(%rbp), %eax
movl %eax, -0x44(%rbp)
subl $0x9e, %eax
je 0x2ec1
jmp 0x2eb5
movl -0x44(%rbp), %eax
subl $0xa1, %eax
je 0x2eeb
jmp 0x2f13
movq 0x5108(%rip), %rdi      # 0x7fd0
leaq 0x2252(%rip), %rsi      # 0x5121
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
jmp 0x2f13
movq 0x50de(%rip), %rdi      # 0x7fd0
leaq 0x222e(%rip), %rsi      # 0x5127
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
jmp 0x3162
movzbl -0x22(%rbp), %eax
movl %eax, -0x48(%rbp)
subl $0x7, %eax
je 0x2f99
jmp 0x2f26
movl -0x48(%rbp), %eax
subl $0xa, %eax
je 0x2fd5
jmp 0x2f34
movl -0x48(%rbp), %eax
subl $0x15, %eax
je 0x3011
jmp 0x2f42
movl -0x48(%rbp), %eax
subl $0x18, %eax
je 0x303e
jmp 0x2f50
movl -0x48(%rbp), %eax
subl $0x1e, %eax
je 0x306b
jmp 0x2f5e
movl -0x48(%rbp), %eax
subl $0x29, %eax
je 0x3098
jmp 0x2f6c
movl -0x48(%rbp), %eax
subl $0x33, %eax
je 0x30c5
jmp 0x2f7a
movl -0x48(%rbp), %eax
subl $0x55, %eax
je 0x30ef
jmp 0x2f88
movl -0x48(%rbp), %eax
subl $0x65, %eax
je 0x3119
jmp 0x3150
movq 0x5030(%rip), %rdi      # 0x7fd0
leaq 0x212f(%rip), %rsi      # 0x50d6
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x2163(%rip), %rsi      # 0x512e
callq 0x2160
jmp 0x3150
movq 0x4ff4(%rip), %rdi      # 0x7fd0
leaq 0x20f3(%rip), %rsi      # 0x50d6
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x212c(%rip), %rsi      # 0x5133
callq 0x2160
jmp 0x3150
movq 0x4fb8(%rip), %rdi      # 0x7fd0
leaq 0x2118(%rip), %rsi      # 0x5137
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
jmp 0x3150
movq 0x4f8b(%rip), %rdi      # 0x7fd0
leaq 0x20f4(%rip), %rsi      # 0x5140
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
jmp 0x3150
movq 0x4f5e(%rip), %rdi      # 0x7fd0
leaq 0x20d0(%rip), %rsi      # 0x5149
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
jmp 0x3150
movq 0x4f31(%rip), %rdi      # 0x7fd0
leaq 0x20ac(%rip), %rsi      # 0x5152
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
jmp 0x3150
movq 0x4f04(%rip), %rdi      # 0x7fd0
leaq 0x2087(%rip), %rsi      # 0x515a
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
jmp 0x3150
movq 0x4eda(%rip), %rdi      # 0x7fd0
leaq 0x2065(%rip), %rsi      # 0x5162
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
jmp 0x3150
movq 0x4eb0(%rip), %rdi      # 0x7fd0
leaq 0x1faf(%rip), %rsi      # 0x50d6
callq 0x2160
movq %rax, %rdi
movzwl -0x22(%rbp), %esi
andl $0xf00, %esi            # imm = 0xF00
sarl $0x8, %esi
callq 0x22a0
movq %rax, %rdi
leaq 0x2021(%rip), %rsi      # 0x516c
callq 0x2160
jmp 0x3162
movq 0x4e77(%rip), %rdi      # 0x7fd0
movzwl -0x22(%rbp), %esi
callq 0x2290
movq 0x4e67(%rip), %rdi      # 0x7fd0
movq 0x4e50(%rip), %rsi      # 0x7fc0
callq 0x21a0
movl -0x4(%rbp), %eax
addl $0x2, %eax
movl %eax, -0x4(%rbp)
jmp 0x268f
addq $0x50, %rsp
popq %rbp
retq
nopl (%rax)