// File: /workspace/github_cpp_makefile_star2_O2/rossy[P]crossc/SPIRV-Cross/spirv_glsl.cpp
// Function: spirv_cross::CompilerGLSL::emit_subgroup_op(spirv_cross::Instruction const&)
void CompilerGLSL::emit_subgroup_op(const Instruction &i)
{
	const uint32_t *ops = stream(i);
	auto op = static_cast<Op>(i.op);

	if (!options.vulkan_semantics)
		SPIRV_CROSS_THROW("Can only use subgroup operations in Vulkan semantics.");

	switch (op)
	{
	case OpGroupNonUniformElect:
		require_extension_internal("GL_KHR_shader_subgroup_basic");
		break;

	case OpGroupNonUniformBroadcast:
	case OpGroupNonUniformBroadcastFirst:
	case OpGroupNonUniformBallot:
	case OpGroupNonUniformInverseBallot:
	case OpGroupNonUniformBallotBitExtract:
	case OpGroupNonUniformBallotBitCount:
	case OpGroupNonUniformBallotFindLSB:
	case OpGroupNonUniformBallotFindMSB:
		require_extension_internal("GL_KHR_shader_subgroup_ballot");
		break;

	case OpGroupNonUniformShuffle:
	case OpGroupNonUniformShuffleXor:
		require_extension_internal("GL_KHR_shader_subgroup_shuffle");
		break;

	case OpGroupNonUniformShuffleUp:
	case OpGroupNonUniformShuffleDown:
		require_extension_internal("GL_KHR_shader_subgroup_shuffle_relative");
		break;

	case OpGroupNonUniformAll:
	case OpGroupNonUniformAny:
	case OpGroupNonUniformAllEqual:
		require_extension_internal("GL_KHR_shader_subgroup_vote");
		break;

	case OpGroupNonUniformFAdd:
	case OpGroupNonUniformFMul:
	case OpGroupNonUniformFMin:
	case OpGroupNonUniformFMax:
	case OpGroupNonUniformIAdd:
	case OpGroupNonUniformIMul:
	case OpGroupNonUniformSMin:
	case OpGroupNonUniformSMax:
	case OpGroupNonUniformUMin:
	case OpGroupNonUniformUMax:
	case OpGroupNonUniformBitwiseAnd:
	case OpGroupNonUniformBitwiseOr:
	case OpGroupNonUniformBitwiseXor:
	{
		auto operation = static_cast<GroupOperation>(ops[3]);
		if (operation == GroupOperationClusteredReduce)
		{
			require_extension_internal("GL_KHR_shader_subgroup_clustered");
		}
		else if (operation == GroupOperationExclusiveScan || operation == GroupOperationInclusiveScan ||
		         operation == GroupOperationReduce)
		{
			require_extension_internal("GL_KHR_shader_subgroup_arithmetic");
		}
		else
			SPIRV_CROSS_THROW("Invalid group operation.");
		break;
	}

	case OpGroupNonUniformQuadSwap:
	case OpGroupNonUniformQuadBroadcast:
		require_extension_internal("GL_KHR_shader_subgroup_quad");
		break;

	default:
		SPIRV_CROSS_THROW("Invalid opcode for subgroup.");
	}

	uint32_t result_type = ops[0];
	uint32_t id = ops[1];

	auto scope = static_cast<Scope>(get<SPIRConstant>(ops[2]).scalar());
	if (scope != ScopeSubgroup)
		SPIRV_CROSS_THROW("Only subgroup scope is supported.");

	switch (op)
	{
	case OpGroupNonUniformElect:
		emit_op(result_type, id, "subgroupElect()", true);
		break;

	case OpGroupNonUniformBroadcast:
		emit_binary_func_op(result_type, id, ops[3], ops[4], "subgroupBroadcast");
		break;

	case OpGroupNonUniformBroadcastFirst:
		emit_unary_func_op(result_type, id, ops[3], "subgroupBroadcastFirst");
		break;

	case OpGroupNonUniformBallot:
		emit_unary_func_op(result_type, id, ops[3], "subgroupBallot");
		break;

	case OpGroupNonUniformInverseBallot:
		emit_unary_func_op(result_type, id, ops[3], "subgroupInverseBallot");
		break;

	case OpGroupNonUniformBallotBitExtract:
		emit_binary_func_op(result_type, id, ops[3], ops[4], "subgroupBallotBitExtract");
		break;

	case OpGroupNonUniformBallotFindLSB:
		emit_unary_func_op(result_type, id, ops[3], "subgroupBallotFindLSB");
		break;

	case OpGroupNonUniformBallotFindMSB:
		emit_unary_func_op(result_type, id, ops[3], "subgroupBallotFindMSB");
		break;

	case OpGroupNonUniformBallotBitCount:
	{
		auto operation = static_cast<GroupOperation>(ops[3]);
		if (operation == GroupOperationReduce)
			emit_unary_func_op(result_type, id, ops[4], "subgroupBallotBitCount");
		else if (operation == GroupOperationInclusiveScan)
			emit_unary_func_op(result_type, id, ops[4], "subgroupBallotInclusiveBitCount");
		else if (operation == GroupOperationExclusiveScan)
			emit_unary_func_op(result_type, id, ops[4], "subgroupBallotExclusiveBitCount");
		else
			SPIRV_CROSS_THROW("Invalid BitCount operation.");
		break;
	}

	case OpGroupNonUniformShuffle:
		emit_binary_func_op(result_type, id, ops[3], ops[4], "subgroupShuffle");
		break;

	case OpGroupNonUniformShuffleXor:
		emit_binary_func_op(result_type, id, ops[3], ops[4], "subgroupShuffleXor");
		break;

	case OpGroupNonUniformShuffleUp:
		emit_binary_func_op(result_type, id, ops[3], ops[4], "subgroupShuffleUp");
		break;

	case OpGroupNonUniformShuffleDown:
		emit_binary_func_op(result_type, id, ops[3], ops[4], "subgroupShuffleDown");
		break;

	case OpGroupNonUniformAll:
		emit_unary_func_op(result_type, id, ops[3], "subgroupAll");
		break;

	case OpGroupNonUniformAny:
		emit_unary_func_op(result_type, id, ops[3], "subgroupAny");
		break;

	case OpGroupNonUniformAllEqual:
		emit_unary_func_op(result_type, id, ops[3], "subgroupAllEqual");
		break;

		// clang-format off
#define GLSL_GROUP_OP(op, glsl_op) \
case OpGroupNonUniform##op: \
	{ \
		auto operation = static_cast<GroupOperation>(ops[3]); \
		if (operation == GroupOperationReduce) \
			emit_unary_func_op(result_type, id, ops[4], "subgroup" #glsl_op); \
		else if (operation == GroupOperationInclusiveScan) \
			emit_unary_func_op(result_type, id, ops[4], "subgroupInclusive" #glsl_op); \
		else if (operation == GroupOperationExclusiveScan) \
			emit_unary_func_op(result_type, id, ops[4], "subgroupExclusive" #glsl_op); \
		else if (operation == GroupOperationClusteredReduce) \
			emit_binary_func_op(result_type, id, ops[4], ops[5], "subgroupClustered" #glsl_op); \
		else \
			SPIRV_CROSS_THROW("Invalid group operation."); \
		break; \
	}
	GLSL_GROUP_OP(FAdd, Add)
	GLSL_GROUP_OP(FMul, Mul)
	GLSL_GROUP_OP(FMin, Min)
	GLSL_GROUP_OP(FMax, Max)
	GLSL_GROUP_OP(IAdd, Add)
	GLSL_GROUP_OP(IMul, Mul)
	GLSL_GROUP_OP(SMin, Min)
	GLSL_GROUP_OP(SMax, Max)
	GLSL_GROUP_OP(UMin, Min)
	GLSL_GROUP_OP(UMax, Max)
	GLSL_GROUP_OP(BitwiseAnd, And)
	GLSL_GROUP_OP(BitwiseOr, Or)
	GLSL_GROUP_OP(BitwiseXor, Xor)
#undef GLSL_GROUP_OP
		// clang-format on

	case OpGroupNonUniformQuadSwap:
	{
		uint32_t direction = get<SPIRConstant>(ops[4]).scalar();
		if (direction == 0)
			emit_unary_func_op(result_type, id, ops[3], "subgroupQuadSwapHorizontal");
		else if (direction == 1)
			emit_unary_func_op(result_type, id, ops[3], "subgroupQuadSwapVertical");
		else if (direction == 2)
			emit_unary_func_op(result_type, id, ops[3], "subgroupQuadSwapDiagonal");
		else
			SPIRV_CROSS_THROW("Invalid quad swap direction.");
		break;
	}

	case OpGroupNonUniformQuadBroadcast:
	{
		emit_binary_func_op(result_type, id, ops[3], ops[4], "subgroupQuadBroadcast");
		break;
	}

	default:
		SPIRV_CROSS_THROW("Invalid opcode for subgroup.");
	}

	register_control_dependent_expression(id);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x30, %rsp
movq %rsi, %r14
movq %rdi, %rbx
callq 0x16f1e
cmpb $0x0, 0x43e(%rbx)
je 0x33e6f
movzwl (%r14), %r12d
addl $0xfffffeb3, %r12d      # imm = 0xFFFFFEB3
cmpl $0x21, %r12d
ja 0x33f59
movq %rax, %r15
leaq 0x5d1cf(%rip), %rax     # 0x9094c
movslq (%rax,%r12,4), %rcx
addq %rax, %rcx
jmpq *%rcx
movl 0xc(%r15), %eax
cmpl $0x3, %eax
jne 0x337df
leaq 0x60299(%rip), %rsi     # 0x93a2f
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
leaq 0x10(%rsp), %rsi
movq %rbx, %rdi
callq 0x21390
jmp 0x338c7
leaq 0x601f0(%rip), %rsi     # 0x939ae
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
leaq 0x10(%rsp), %rsi
movq %rbx, %rdi
callq 0x21390
jmp 0x338c7
jae 0x33f0b
leaq 0x60264(%rip), %rsi     # 0x93a50
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
leaq 0x10(%rsp), %rsi
movq %rbx, %rdi
callq 0x21390
jmp 0x338c7
leaq 0x601ff(%rip), %rsi     # 0x93a13
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
leaq 0x10(%rsp), %rsi
movq %rbx, %rdi
callq 0x21390
jmp 0x338c7
leaq 0x60190(%rip), %rsi     # 0x939cc
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
leaq 0x10(%rsp), %rsi
movq %rbx, %rdi
callq 0x21390
jmp 0x338c7
leaq 0x6022a(%rip), %rsi     # 0x93a8b
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
leaq 0x10(%rsp), %rsi
movq %rbx, %rdi
callq 0x21390
jmp 0x338c7
leaq 0x60165(%rip), %rsi     # 0x939eb
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
leaq 0x10(%rsp), %rsi
movq %rbx, %rdi
callq 0x21390
jmp 0x338c7
leaq 0x600e6(%rip), %rsi     # 0x93991
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
leaq 0x10(%rsp), %rsi
movq %rbx, %rdi
callq 0x21390
leaq 0x10(%rsp), %rdi
callq 0x6548
movl (%r15), %r14d
movl 0x4(%r15), %ebp
movl 0x8(%r15), %esi
movq %rbx, %rdi
callq 0x17bce
cmpl $0x3, 0x10(%rax)
jne 0x33ebd
cmpl $0x21, %r12d
ja 0x33fa7
leaq 0x5d0d5(%rip), %rax     # 0x909d4
movslq (%rax,%r12,4), %rcx
addq %rax, %rcx
jmpq *%rcx
leaq 0x601d7(%rip), %rsi     # 0x93ae6
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
leaq 0x10(%rsp), %rcx
pushq $0x1
popq %r8
movq %rbx, %rdi
movl %r14d, %esi
movl %ebp, %edx
xorl %r9d, %r9d
callq 0x2f196
leaq 0x10(%rsp), %rdi
callq 0x6548
jmp 0x33e58
movl 0xc(%r15), %eax
cmpq $0x3, %rax
ja 0x34091
leaq 0x5d151(%rip), %rcx     # 0x90aac
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl 0xc(%r15), %ecx
leaq 0x60204(%rip), %r8      # 0x93b73
jmp 0x33e4b
movl 0xc(%r15), %eax
cmpq $0x3, %rax
ja 0x340df
leaq 0x5d133(%rip), %rcx     # 0x90abc
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl 0xc(%r15), %eax
cmpl $0x2, %eax
je 0x33d8f
cmpl $0x1, %eax
je 0x33d7f
testl %eax, %eax
jne 0x33ff5
movl 0x10(%r15), %ecx
leaq 0x601ce(%rip), %r8      # 0x93b89
jmp 0x33e4b
movl 0xc(%r15), %eax
cmpq $0x3, %rax
ja 0x3412d
leaq 0x5d137(%rip), %rcx     # 0x90b0c
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl 0xc(%r15), %ecx
movl 0x10(%r15), %r8d
leaq 0x6020f(%rip), %r9      # 0x93bfc
jmp 0x33e31
movl 0xc(%r15), %ecx
leaq 0x60160(%rip), %r8      # 0x93b5d
jmp 0x33e4b
movl 0xc(%r15), %ecx
movl 0x10(%r15), %r8d
leaq 0x60133(%rip), %r9      # 0x93b44
jmp 0x33e31
movl 0xc(%r15), %ecx
movl 0x10(%r15), %r8d
leaq 0x601e7(%rip), %r9      # 0x93c0c
jmp 0x33e31
movl 0xc(%r15), %eax
cmpq $0x3, %rax
ja 0x3417b
leaq 0x5d0dd(%rip), %rcx     # 0x90b1c
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl 0xc(%r15), %eax
cmpq $0x3, %rax
ja 0x341c9
leaq 0x5d03f(%rip), %rcx     # 0x90a9c
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl 0xc(%r15), %ecx
movl 0x10(%r15), %r8d
leaq 0x601aa(%rip), %r9      # 0x93c1f
jmp 0x33e31
movl 0xc(%r15), %eax
cmpq $0x3, %rax
ja 0x34217
leaq 0x5d04d(%rip), %rcx     # 0x90adc
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl 0x10(%r15), %ecx
leaq 0x601cb(%rip), %r8      # 0x93c6e
jmp 0x33e4b
movl 0xc(%r15), %ecx
movl 0x10(%r15), %r8d
leaq 0x6003f(%rip), %r9      # 0x93af6
jmp 0x33e31
movl 0xc(%r15), %ecx
movl 0x10(%r15), %r8d
leaq 0x60166(%rip), %r9      # 0x93c31
jmp 0x33e31
movl 0xc(%r15), %eax
cmpq $0x3, %rax
ja 0x34265
leaq 0x5cf97(%rip), %rcx     # 0x90a7c
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl 0x10(%r15), %ecx
leaq 0x602a1(%rip), %r8      # 0x93d9a
jmp 0x33e4b
movl 0x10(%r15), %esi
movq %rbx, %rdi
callq 0x17bce
movl 0x10(%rax), %eax
cmpl $0x2, %eax
je 0x33daf
cmpl $0x1, %eax
je 0x33d9f
testl %eax, %eax
jne 0x34043
movl 0xc(%r15), %ecx
leaq 0x60345(%rip), %r8      # 0x93e77
jmp 0x33e4b
movl 0xc(%r15), %ecx
leaq 0x5ffc6(%rip), %r8      # 0x93b08
jmp 0x33e4b
movl 0xc(%r15), %ecx
leaq 0x600ff(%rip), %r8      # 0x93c51
jmp 0x33e4b
movl 0xc(%r15), %ecx
leaq 0x5ffcc(%rip), %r8      # 0x93b2e
jmp 0x33e4b
movl 0xc(%r15), %ecx
leaq 0x600eb(%rip), %r8      # 0x93c5d
jmp 0x33e4b
movl 0xc(%r15), %ecx
leaq 0x600c3(%rip), %r8      # 0x93c45
jmp 0x33e4b
movl 0xc(%r15), %eax
cmpq $0x3, %rax
ja 0x342b3
leaq 0x5cec0(%rip), %rcx     # 0x90a5c
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl 0x10(%r15), %ecx
leaq 0x6027c(%rip), %r8      # 0x93e2c
jmp 0x33e4b
movl 0xc(%r15), %ecx
movl 0x10(%r15), %r8d
leaq 0x6031d(%rip), %r9      # 0x93ee1
jmp 0x33e31
movl 0xc(%r15), %ecx
leaq 0x5ff4b(%rip), %r8      # 0x93b1f
jmp 0x33e4b
movl 0xc(%r15), %eax
cmpq $0x3, %rax
ja 0x34301
leaq 0x5cede(%rip), %rcx     # 0x90acc
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl 0x10(%r15), %ecx
leaq 0x600b7(%rip), %r8      # 0x93cb9
jmp 0x33e4b
movl 0xc(%r15), %eax
cmpq $0x3, %rax
ja 0x3434f
leaq 0x5ce70(%rip), %rcx     # 0x90a8c
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl 0xc(%r15), %eax
cmpq $0x3, %rax
ja 0x3439d
leaq 0x5cec2(%rip), %rcx     # 0x90afc
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl 0x10(%r15), %ecx
leaq 0x600b6(%rip), %r8      # 0x93d04
jmp 0x33e4b
movl 0xc(%r15), %eax
cmpq $0x3, %rax
ja 0x343eb
leaq 0x5ce04(%rip), %rcx     # 0x90a6c
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl 0x10(%r15), %ecx
leaq 0x60169(%rip), %r8      # 0x93de5
jmp 0x33e4b
movl 0xc(%r15), %eax
cmpq $0x3, %rax
ja 0x34436
leaq 0x5ce56(%rip), %rcx     # 0x90aec
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl 0x10(%r15), %ecx
leaq 0x600a5(%rip), %r8      # 0x93d4f
jmp 0x33e4b
movl 0x10(%r15), %ecx
leaq 0x6006b(%rip), %r8      # 0x93d25
jmp 0x33e4b
movl 0x10(%r15), %ecx
movl 0x14(%r15), %r8d
leaq 0x6006c(%rip), %r9      # 0x93d3a
jmp 0x33e31
movl 0x10(%r15), %ecx
leaq 0x60032(%rip), %r8      # 0x93d10
jmp 0x33e4b
movl 0x10(%r15), %ecx
leaq 0x60082(%rip), %r8      # 0x93d70
jmp 0x33e4b
movl 0x10(%r15), %ecx
movl 0x14(%r15), %r8d
leaq 0x60083(%rip), %r9      # 0x93d85
jmp 0x33e31
movl 0x10(%r15), %ecx
leaq 0x60049(%rip), %r8      # 0x93d5b
jmp 0x33e4b
movl 0x10(%r15), %ecx
leaq 0x5ff6d(%rip), %r8      # 0x93c8f
jmp 0x33e4b
movl 0x10(%r15), %ecx
movl 0x14(%r15), %r8d
leaq 0x5ff6e(%rip), %r9      # 0x93ca4
jmp 0x33e31
movl 0x10(%r15), %ecx
leaq 0x5ff34(%rip), %r8      # 0x93c7a
jmp 0x33e4b
movl 0x10(%r15), %ecx
leaq 0x5ff84(%rip), %r8      # 0x93cda
jmp 0x33e4b
movl 0x10(%r15), %ecx
movl 0x14(%r15), %r8d
leaq 0x5ff85(%rip), %r9      # 0x93cef
jmp 0x33e31
movl 0x10(%r15), %ecx
leaq 0x5ff4b(%rip), %r8      # 0x93cc5
jmp 0x33e4b
movl 0x10(%r15), %ecx
leaq 0x5fe16(%rip), %r8      # 0x93ba0
jmp 0x33e4b
movl 0x10(%r15), %ecx
leaq 0x5fe26(%rip), %r8      # 0x93bc0
jmp 0x33e4b
movl 0xc(%r15), %ecx
leaq 0x600e8(%rip), %r8      # 0x93e92
jmp 0x33e4b
movl 0xc(%r15), %ecx
leaq 0x600f1(%rip), %r8      # 0x93eab
jmp 0x33e4b
movl 0x10(%r15), %ecx
leaq 0x5fff1(%rip), %r8      # 0x93dbb
jmp 0x33e4b
movl 0x10(%r15), %ecx
movl 0x14(%r15), %r8d
leaq 0x5fff5(%rip), %r9      # 0x93dd0
jmp 0x33e31
movl 0x10(%r15), %ecx
leaq 0x5ffbe(%rip), %r8      # 0x93da6
jmp 0x33e4b
movl 0x10(%r15), %ecx
leaq 0x60058(%rip), %r8      # 0x93e4d
jmp 0x33e4b
movl 0x10(%r15), %ecx
movl 0x14(%r15), %r8d
leaq 0x6005c(%rip), %r9      # 0x93e62
jmp 0x33e31
movl 0x10(%r15), %ecx
leaq 0x60025(%rip), %r8      # 0x93e38
jmp 0x33e4b
movl 0x10(%r15), %ecx
leaq 0x5ffe4(%rip), %r8      # 0x93e04
jmp 0x33e4b
movl 0x10(%r15), %ecx
movl 0x14(%r15), %r8d
leaq 0x5ffe7(%rip), %r9      # 0x93e18
movq %rbx, %rdi
movl %r14d, %esi
movl %ebp, %edx
callq 0x2fab8
jmp 0x33e58
movl 0x10(%r15), %ecx
leaq 0x5ffa5(%rip), %r8      # 0x93df0
movq %rbx, %rdi
movl %r14d, %esi
movl %ebp, %edx
callq 0x2f9ee
movq %rbx, %rdi
movl %ebp, %esi
callq 0x318aa
addq $0x30, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5fada(%rip), %rsi     # 0x9395b
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2f17(%rip), %rsi     # 0xe6dc0
movq 0xb4130(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5fbf5(%rip), %rsi     # 0x93ac4
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2ec9(%rip), %rsi     # 0xe6dc0
movq 0xb40e2(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5fb55(%rip), %rsi     # 0x93a72
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2e7b(%rip), %rsi     # 0xe6dc0
movq 0xb4094(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5fb3c(%rip), %rsi     # 0x93aa7
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2e2d(%rip), %rsi     # 0xe6dc0
movq 0xb4046(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5faee(%rip), %rsi     # 0x93aa7
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2ddf(%rip), %rsi     # 0xe6dc0
movq 0xb3ff8(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5fbd9(%rip), %rsi     # 0x93be0
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2d91(%rip), %rsi     # 0xe6dc0
movq 0xb3faa(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5fe6f(%rip), %rsi     # 0x93ec4
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2d43(%rip), %rsi     # 0xe6dc0
movq 0xb3f5c(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5f9cf(%rip), %rsi     # 0x93a72
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2cf5(%rip), %rsi     # 0xe6dc0
movq 0xb3f0e(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5f981(%rip), %rsi     # 0x93a72
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2ca7(%rip), %rsi     # 0xe6dc0
movq 0xb3ec0(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5f933(%rip), %rsi     # 0x93a72
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2c59(%rip), %rsi     # 0xe6dc0
movq 0xb3e72(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5f8e5(%rip), %rsi     # 0x93a72
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2c0b(%rip), %rsi     # 0xe6dc0
movq 0xb3e24(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5f897(%rip), %rsi     # 0x93a72
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2bbd(%rip), %rsi     # 0xe6dc0
movq 0xb3dd6(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5f849(%rip), %rsi     # 0x93a72
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2b6f(%rip), %rsi     # 0xe6dc0
movq 0xb3d88(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5f7fb(%rip), %rsi     # 0x93a72
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2b21(%rip), %rsi     # 0xe6dc0
movq 0xb3d3a(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5f7ad(%rip), %rsi     # 0x93a72
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2ad3(%rip), %rsi     # 0xe6dc0
movq 0xb3cec(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5f75f(%rip), %rsi     # 0x93a72
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2a85(%rip), %rsi     # 0xe6dc0
movq 0xb3c9e(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5f711(%rip), %rsi     # 0x93a72
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2a37(%rip), %rsi     # 0xe6dc0
movq 0xb3c50(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5f6c3(%rip), %rsi     # 0x93a72
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb29e9(%rip), %rsi     # 0xe6dc0
movq 0xb3c02(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5f675(%rip), %rsi     # 0x93a72
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb299b(%rip), %rsi     # 0xe6dc0
movq 0xb3bb4(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x3447f
pushq $0x10
popq %rdi
callq 0x6140
movq %rax, %r14
leaq 0x5f62a(%rip), %rsi     # 0x93a72
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x6100
movb $0x1, %bpl
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x6f6e
xorl %ebp, %ebp
leaq 0xb2950(%rip), %rsi     # 0xe6dc0
movq 0xb3b69(%rip), %rdx     # 0xe7fe0
movq %r14, %rdi
callq 0x6490
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x34514
jmp 0x34528
jmp 0x344fc
jmp 0x3450b
jmp 0x344fc
jmp 0x3450b
jmp 0x344fc
jmp 0x344fc
jmp 0x344fc
jmp 0x3450b
jmp 0x3450b
jmp 0x3450b
jmp 0x344fc
jmp 0x3450b
jmp 0x34514
jmp 0x34528
jmp 0x344fc
jmp 0x3450b
jmp 0x344fc
jmp 0x3450b
movq %rax, %rbx
leaq 0x10(%rsp), %rdi
callq 0x6548
jmp 0x34533
movq %rax, %rbx
jmp 0x34533
jmp 0x34514
jmp 0x34528
movq %rax, %rbx
leaq 0x10(%rsp), %rdi
callq 0x6548
testb %bpl, %bpl
jne 0x3452b
jmp 0x34533
movq %rax, %rbx
movq %r14, %rdi
callq 0x6200
movq %rbx, %rdi
callq 0x64b0
nop