// File: /workspace/github_c_makefile_star2_O3/samtools[P]htslib/htscodecs/htscodecs/rANS_static32x16pr_avx512.c
// Function: rans_uncompress_O0_32x16_avx512
unsigned char *rans_uncompress_O0_32x16_avx512(unsigned char *in,
                                               unsigned int in_size,
                                               unsigned char *out,
                                               unsigned int out_sz) {
    if (in_size < 32*4) // 32-states at least
        return NULL;

    if (out_sz >= INT_MAX)
        return NULL; // protect against some overflow cases

    /* Load in the static tables */
    unsigned char *cp = in, *out_free = NULL;
    unsigned char *cp_end = in + in_size;
    int i;
    uint32_t s3[TOTFREQ]  __attribute__((aligned(64))); // For TF_SHIFT <= 12

    if (!out)
        out_free = out = malloc(out_sz);
    if (!out)
        return NULL;

    // Precompute reverse lookup of frequency.
    uint32_t F[256] = {0}, fsum;
    int fsz = decode_freq(cp, cp_end, F, &fsum);
    if (!fsz)
        goto err;
    cp += fsz;

    normalise_freq_shift(F, fsum, TOTFREQ);

    // Build symbols; fixme, do as part of decode, see the _d variant
    if (rans_F_to_s3(F, TF_SHIFT, s3))
        goto err;

    if (cp_end - cp < 32 * 4)
        goto err;

    int z;
    RansState Rv[32] __attribute__((aligned(64)));
    for (z = 0; z < 32; z++) {
        RansDecInit(&Rv[z], &cp);
        if (Rv[z] < RANS_BYTE_L)
            goto err;
    }

    uint16_t *sp = (uint16_t *)cp;

    int out_end = (out_sz&~(32-1));
    const uint32_t mask = (1u << TF_SHIFT)-1;

    __m512i maskv = _mm512_set1_epi32(mask); // set mask in all lanes
    __m512i R1 = _mm512_load_epi32(&Rv[0]);
    __m512i R2 = _mm512_load_epi32(&Rv[16]);

    // Start of the first loop iteration, which we do move to the end of the
    // loop for the next cycle so we can remove some of the instr. latency.
    __m512i masked1 = _mm512_and_epi32(R1, maskv);
    __m512i masked2 = _mm512_and_epi32(R2, maskv);
    __m512i S1 = _mm512_i32gather_epi32x(masked1, (int *)s3, sizeof(*s3));
    __m512i S2 = _mm512_i32gather_epi32x(masked2, (int *)s3, sizeof(*s3));

    uint8_t overflow[64+64] = {0};
    for (i=0; i < out_end; i+=32) {
      //for (z = 0; z < 16; z++) {

      // Protect against running off the end of in buffer.
      // We copy it to a worst-case local buffer when near the end.
      if ((uint8_t *)sp+64 > cp_end) {
        memmove(overflow, sp, cp_end - (uint8_t *)sp);
        sp = (uint16_t *)overflow;
        cp_end = overflow + sizeof(overflow);
      }

      //uint32_t S = s3[R[z] & mask];
      __m512i renorm_words1 = _mm512_cvtepu16_epi32(_mm256_loadu_si256((const __m256i *)sp)); // next 16 words

      //uint16_t f = S>>(TF_SHIFT+8), b = (S>>8) & mask;
      __m512i f1 = _mm512_srli_epi32(S1, TF_SHIFT+8);
      __m512i f2 = _mm512_srli_epi32(S2, TF_SHIFT+8);
      __m512i b1 = _mm512_and_epi32(_mm512_srli_epi32(S1, 8), maskv);
      __m512i b2 = _mm512_and_epi32(_mm512_srli_epi32(S2, 8), maskv);

      //R[z] = f * (R[z] >> TF_SHIFT) + b;
      // approx 10 cycle latency on mullo.
      R1 = _mm512_add_epi32(
               _mm512_mullo_epi32(
                   _mm512_srli_epi32(R1, TF_SHIFT), f1), b1);
      __mmask16 renorm_mask1, renorm_mask2;
      renorm_mask1=_mm512_cmplt_epu32_mask(R1, _mm512_set1_epi32(RANS_BYTE_L));
      R2 = _mm512_add_epi32(
               _mm512_mullo_epi32(
                   _mm512_srli_epi32(R2, TF_SHIFT), f2), b2);

      // renorm. this is the interesting part:
      renorm_mask2=_mm512_cmplt_epu32_mask(R2, _mm512_set1_epi32(RANS_BYTE_L));
      // advance by however many words we actually read
      sp += _mm_popcnt_u32(renorm_mask1);
      __m512i renorm_words2 = _mm512_cvtepu16_epi32(_mm256_loadu_si256(
                                      (const __m256i *)sp));

      // select masked only
      __m512i renorm_vals1, renorm_vals2;

      renorm_vals1 = _mm512_mask_expand_epi32(R1, renorm_mask1, renorm_words1);
      renorm_vals2 = _mm512_mask_expand_epi32(R2, renorm_mask2, renorm_words2);

      // For start of next loop iteration.  This has been moved here
      // (and duplicated to before the loop starts) so we can do something
      // with the latency period of gather, such as finishing up the
      // renorm offset and writing the results.
      __m512i S1_ = S1; // temporary copy for use in out[]=S later
      __m512i S2_ = S2;

      masked1 = _mm512_and_epi32(renorm_vals1, maskv);
      S1 = _mm512_i32gather_epi32x(masked1, (int *)s3, sizeof(*s3));
      masked2 = _mm512_and_epi32(renorm_vals2, maskv);
      S2 = _mm512_i32gather_epi32x(masked2, (int *)s3, sizeof(*s3));

      R1 = _mm512_mask_slli_epi32(R1, renorm_mask1, R1, 16);
      R2 = _mm512_mask_slli_epi32(R2, renorm_mask2, R2, 16);

      __m512i m16 = _mm512_set1_epi32(0xffff);
      renorm_vals1 = _mm512_maskz_and_epi32(renorm_mask1, renorm_vals1, m16);
      renorm_vals2 = _mm512_maskz_and_epi32(renorm_mask2, renorm_vals2, m16);

      // advance by however many words we actually read
      sp += _mm_popcnt_u32(renorm_mask2);

      R1 = _mm512_add_epi32(R1, renorm_vals1);
      R2 = _mm512_add_epi32(R2, renorm_vals2);

      //out[i+z] = S;
      _mm_storeu_si128((__m128i *)(out+i),    _mm512_cvtepi32_epi8(S1_));
      _mm_storeu_si128((__m128i *)(out+i+16), _mm512_cvtepi32_epi8(S2_));
    }

    _mm512_store_epi32(&Rv[ 0], R1);
    _mm512_store_epi32(&Rv[16], R2);

    for (z = out_sz & (32-1); z-- > 0; )
      out[out_end + z] = s3[Rv[z] & mask];

    return out;

 err:
    free(out_free);
    return NULL;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
andq $-0x40, %rsp
subq $0x4680, %rsp           # imm = 0x4680
movl %ecx, %r13d
cmpl $0x80, %esi
setb %al
cmpl $0x7fffffff, %ecx       # imm = 0x7FFFFFFF
setae %cl
orb %al, %cl
jne 0x6da63
movl %esi, %r15d
movq %rdi, %rbx
xorl %r14d, %r14d
movq %rdx, 0x38(%rsp)
testq %rdx, %rdx
je 0x6d324
xorl %ecx, %ecx
jmp 0x6d33d
movl %r13d, %edi
callq 0x4680
movq %rax, %rcx
movq %rax, 0x38(%rsp)
testq %rax, %rax
je 0x6da63
movq %rcx, 0x40(%rsp)
movq %r13, 0x30(%rsp)
movl %r15d, %r13d
leaq (%rbx,%r13), %r15
leaq 0x240(%rsp), %rdi
movl $0x400, %edx            # imm = 0x400
xorl %esi, %esi
callq 0x4260
leaq 0x1(%rbx), %rax
movzbl (%rbx), %ecx
xorl %edx, %edx
movl %ecx, %esi
movl $0x1, 0x240(%rsp,%rsi,4)
testl %edx, %edx
je 0x6d38e
cmpl $0xfe, %ecx
jg 0x6d411
decl %edx
incl %ecx
jmp 0x6d3a8
incl %ecx
movzbl (%rax), %esi
cmpl %esi, %ecx
jne 0x6d3a1
movzbl 0x1(%rax), %edx
addq $0x2, %rax
jmp 0x6d3a8
incq %rax
xorl %edx, %edx
movl %esi, %ecx
testl %ecx, %ecx
je 0x6d3b5
leaq 0x2(%rax), %rsi
cmpq %r15, %rsi
jb 0x6d36b
testl %ecx, %ecx
je 0x6d40c
xorl %r14d, %r14d
movl %ecx, %esi
movl $0x1, 0x240(%rsp,%rsi,4)
cmpq %r15, %rax
jae 0x6d411
testl %edx, %edx
je 0x6d3e0
cmpl $0xfe, %ecx
jg 0x6d411
decl %edx
incl %ecx
jmp 0x6d403
incl %ecx
movzbl (%rax), %esi
leaq 0x1(%rax), %rdi
xorl %edx, %edx
cmpl %esi, %ecx
jne 0x6d3fe
cmpq %r15, %rdi
jae 0x6d411
movzbl 0x1(%rax), %edx
addq $0x2, %rax
jmp 0x6d403
movq %rdi, %rax
movl %esi, %ecx
testl %ecx, %ecx
je 0x6d40c
cmpq %r15, %rax
jb 0x6d3bc
subl %ebx, %eax
movslq %eax, %r14
addq %rbx, %r14
xorl %ecx, %ecx
xorl %eax, %eax
cmpl $0x0, 0x240(%rsp,%rcx,4)
je 0x6d496
movq %r15, %rdx
subq %r14, %rdx
cmpq $0x6, %rdx
jl 0x6d467
xorl %edi, %edi
xorl %edx, %edx
movzbl (%r14,%rdi), %r8d
movl %edx, %esi
shll $0x7, %esi
movl %r8d, %edx
andl $0x7f, %edx
orl %esi, %edx
leaq 0x1(%rdi), %rsi
testb %r8b, %r8b
jns 0x6d455
cmpl $0x5, %edi
movq %rsi, %rdi
jne 0x6d432
addq %r14, %rsi
movl %edx, 0x240(%rsp,%rcx,4)
subl %r14d, %esi
movslq %esi, %rsi
jmp 0x6d491
cmpq %r15, %r14
jae 0x6d482
movsbl (%r14), %edx
testl %edx, %edx
js 0x6d4a8
movl %edx, 0x240(%rsp,%rcx,4)
movl $0x1, %esi
jmp 0x6d491
movl $0x0, 0x240(%rsp,%rcx,4)
xorl %edx, %edx
xorl %esi, %esi
addq %rsi, %r14
addl %edx, %eax
incq %rcx
cmpq $0x100, %rcx            # imm = 0x100
jne 0x6d418
jmp 0x6d4ce
xorl %edx, %edx
movq %r14, %rsi
movzbl (%rsi), %edi
incq %rsi
movl %edx, %r8d
shll $0x7, %r8d
movl %edi, %edx
andl $0x7f, %edx
orl %r8d, %edx
testb %dil, %dil
jns 0x6d458
cmpq %r15, %rsi
jb 0x6d4ad
jmp 0x6d458
subq %rbx, %r14
testl %r14d, %r14d
je 0x6da56
movslq %r14d, %rcx
testl $0xffffefff, %eax       # imm = 0xFFFFEFFF
je 0x6d527
xorl %edx, %edx
cmpl $0xfff, %eax            # imm = 0xFFF
ja 0x6d4fd
xorl %edx, %edx
leal (%rax,%rax), %esi
incl %edx
cmpl $0x800, %eax            # imm = 0x800
movl %esi, %eax
jb 0x6d4ef
vpbroadcastd %edx, %zmm0
xorl %eax, %eax
vmovdqu64 0x240(%rsp,%rax,4), %zmm1
vpsllvd %zmm0, %zmm1, %zmm1
vmovdqu64 %zmm1, 0x240(%rsp,%rax,4)
addq $0x10, %rax
cmpq $0x100, %rax            # imm = 0x100
jne 0x6d505
addq %rcx, %rbx
xorl %eax, %eax
xorl %edx, %edx
movl 0x240(%rsp,%rax,4), %esi
movl $0x1000, %edi           # imm = 0x1000
subl %edx, %edi
leal -0x1(%rsi), %r8d
cmpl %edi, %r8d
jae 0x6d562
movl %esi, %edi
shll $0x14, %edi
addl %eax, %edi
movslq %edx, %rdx
movl %edi, 0x640(%rsp,%rdx,4)
incl %edx
addl $0x100, %edi            # imm = 0x100
decl %esi
jne 0x6d54c
incq %rax
cmpq $0x100, %rax            # imm = 0x100
jne 0x6d52e
cmpl $0x1000, %edx           # imm = 0x1000
jne 0x6da56
subq %rcx, %r13
cmpq $0x80, %r13
jl 0x6da56
xorl %r13d, %r13d
movl (%rbx,%r13), %eax
movl %eax, 0x140(%rsp,%r13)
cmpl $0x8000, %eax           # imm = 0x8000
jb 0x6da56
addq $0x4, %r13
cmpq $0x80, %r13
jne 0x6d58c
vmovdqa64 0x140(%rsp), %zmm0
vmovdqa64 0x180(%rsp), %zmm1
vpbroadcastq 0x329ee(%rip), %zmm2 # 0x9ffb8
vmovdqa64 %zmm0, 0x40(%rsp)
vpandq %zmm2, %zmm0, %zmm0
vmovdqa64 %zmm1, 0x80(%rsp)
vpandq %zmm2, %zmm1, %zmm1
vmovdqa64 %zmm1, 0xc0(%rsp)
leaq 0x640(%rsp), %r14
movq %r14, %rdi
callq 0x6d1c6
vmovdqa64 %zmm0, 0x100(%rsp)
vmovdqa64 0xc0(%rsp), %zmm0
movq %r14, %rdi
callq 0x6d1c6
movq 0x30(%rsp), %rax
vpxor %xmm1, %xmm1, %xmm1
vmovdqa64 %zmm1, 0x1c0(%rsp)
vmovdqa64 %zmm1, 0x200(%rsp)
andl $0x7fffffe0, %eax       # imm = 0x7FFFFFE0
movl %eax, %r14d
je 0x6da7a
addq %r13, %rbx
xorl %r13d, %r13d
vpbroadcastd 0x3293f(%rip), %zmm15 # 0x9ff8c
vpbroadcastd 0x32929(%rip), %zmm16 # 0x9ff80
vpbroadcastd 0x32d9f(%rip), %zmm17 # 0xa0400
vmovdqa64 0x40(%rsp), %zmm11
vmovdqa64 0x80(%rsp), %zmm12
vmovdqa64 0x100(%rsp), %zmm13
leaq 0x40(%rbx), %rax
cmpq %r15, %rax
jbe 0x6d70b
subq %rbx, %r15
leaq 0x1c0(%rsp), %r12
movq %r12, %rdi
movq %rbx, %rsi
movq %r15, %rdx
vmovdqa64 %zmm11, 0x40(%rsp)
vmovdqa64 %zmm12, 0x80(%rsp)
vmovdqa64 %zmm13, 0x100(%rsp)
vmovdqa64 %zmm0, 0xc0(%rsp)
vzeroupper
callq 0x4830
vpbroadcastd 0x32d34(%rip), %zmm17 # 0xa0400
vpbroadcastd 0x328aa(%rip), %zmm16 # 0x9ff80
vpbroadcastd 0x328ac(%rip), %zmm15 # 0x9ff8c
vmovdqa64 0xc0(%rsp), %zmm0
vmovdqa64 0x100(%rsp), %zmm13
vmovdqa64 0x80(%rsp), %zmm12
vmovdqa64 0x40(%rsp), %zmm11
movq %r12, %rbx
leaq 0x240(%rsp), %r15
vpmovzxwd (%rbx), %zmm1
vpsrld $0x14, %zmm13, %zmm6
vpsrld $0x14, %zmm0, %zmm2
vpsrld $0x8, %zmm13, %zmm3
vpsrld $0x8, %zmm0, %zmm4
vpsrld $0xc, %zmm11, %zmm5
vpmulld %zmm6, %zmm5, %zmm5
vpandd %zmm15, %zmm3, %zmm3
vpaddd %zmm3, %zmm5, %zmm11
vpcmpltud %zmm16, %zmm11, %k1
vpsrld $0xc, %zmm12, %zmm3
vpmulld %zmm2, %zmm3, %zmm3
vpandd %zmm15, %zmm4, %zmm2
vpaddd %zmm2, %zmm3, %zmm12
vpcmpltud %zmm16, %zmm12, %k2
kmovw %k1, %eax
popcntl %eax, %eax
leaq (%rbx,%rax,2), %rax
vpmovzxwd (%rax), %zmm2
vmovdqa64 %zmm11, %zmm14
vpexpandd %zmm1, %zmm14 {%k1}
vmovdqa64 %zmm12, %zmm1
vpexpandd %zmm2, %zmm1 {%k2}
vpbroadcastq 0x32817(%rip), %zmm7 # 0x9ffb8
vpandq %zmm7, %zmm14, %zmm5
vextracti128 $0x1, %ymm5, %xmm4
vextracti32x4 $0x2, %zmm5, %xmm3
vextracti32x4 $0x3, %zmm5, %xmm2
vmovd %xmm2, %ecx
vmovd 0x640(%rsp,%rcx,4), %xmm6
vpextrd $0x1, %xmm2, %ecx
vpinsrd $0x1, 0x640(%rsp,%rcx,4), %xmm6, %xmm6
vpextrd $0x2, %xmm2, %ecx
vpinsrd $0x2, 0x640(%rsp,%rcx,4), %xmm6, %xmm6
vpextrd $0x3, %xmm2, %ecx
vpinsrd $0x3, 0x640(%rsp,%rcx,4), %xmm6, %xmm2
vmovd %xmm3, %ecx
vmovd 0x640(%rsp,%rcx,4), %xmm6
vpextrd $0x1, %xmm3, %ecx
vpinsrd $0x1, 0x640(%rsp,%rcx,4), %xmm6, %xmm6
vpextrd $0x2, %xmm3, %ecx
vpinsrd $0x2, 0x640(%rsp,%rcx,4), %xmm6, %xmm6
vpextrd $0x3, %xmm3, %ecx
vpinsrd $0x3, 0x640(%rsp,%rcx,4), %xmm6, %xmm3
vmovd %xmm4, %ecx
vmovd 0x640(%rsp,%rcx,4), %xmm6
vpextrd $0x1, %xmm4, %ecx
vpinsrd $0x1, 0x640(%rsp,%rcx,4), %xmm6, %xmm6
vpextrd $0x2, %xmm4, %ecx
vpinsrd $0x2, 0x640(%rsp,%rcx,4), %xmm6, %xmm6
vpextrd $0x3, %xmm4, %ecx
vpinsrd $0x3, 0x640(%rsp,%rcx,4), %xmm6, %xmm4
vmovd %xmm5, %ecx
vmovd 0x640(%rsp,%rcx,4), %xmm6
vpextrd $0x1, %xmm5, %ecx
vpinsrd $0x1, 0x640(%rsp,%rcx,4), %xmm6, %xmm6
vpextrd $0x2, %xmm5, %ecx
vpinsrd $0x2, 0x640(%rsp,%rcx,4), %xmm6, %xmm6
vpextrd $0x3, %xmm5, %ecx
vpinsrd $0x3, 0x640(%rsp,%rcx,4), %xmm6, %xmm5
vpandq %zmm7, %zmm1, %zmm6
vextracti128 $0x1, %ymm6, %xmm7
vextracti32x4 $0x2, %zmm6, %xmm9
vextracti32x4 $0x3, %zmm6, %xmm8
vmovd %xmm8, %ecx
vmovd 0x640(%rsp,%rcx,4), %xmm10
vpextrd $0x1, %xmm8, %ecx
vpinsrd $0x1, 0x640(%rsp,%rcx,4), %xmm10, %xmm10
vpextrd $0x2, %xmm8, %ecx
vpinsrd $0x2, 0x640(%rsp,%rcx,4), %xmm10, %xmm10
vpextrd $0x3, %xmm8, %ecx
vpinsrd $0x3, 0x640(%rsp,%rcx,4), %xmm10, %xmm8
vmovd %xmm9, %ecx
vmovd 0x640(%rsp,%rcx,4), %xmm10
vpextrd $0x1, %xmm9, %ecx
vpinsrd $0x1, 0x640(%rsp,%rcx,4), %xmm10, %xmm10
vpextrd $0x2, %xmm9, %ecx
vpinsrd $0x2, 0x640(%rsp,%rcx,4), %xmm10, %xmm10
vpextrd $0x3, %xmm9, %ecx
vpinsrd $0x3, 0x640(%rsp,%rcx,4), %xmm10, %xmm9
vmovd %xmm7, %ecx
vmovd 0x640(%rsp,%rcx,4), %xmm10
vpextrd $0x1, %xmm7, %ecx
vpinsrd $0x1, 0x640(%rsp,%rcx,4), %xmm10, %xmm10
vpextrd $0x2, %xmm7, %ecx
vpinsrd $0x2, 0x640(%rsp,%rcx,4), %xmm10, %xmm10
vpextrd $0x3, %xmm7, %ecx
vpinsrd $0x3, 0x640(%rsp,%rcx,4), %xmm10, %xmm7
vmovd %xmm6, %ecx
vmovd 0x640(%rsp,%rcx,4), %xmm10
vpextrd $0x1, %xmm6, %ecx
vpinsrd $0x1, 0x640(%rsp,%rcx,4), %xmm10, %xmm10
vpextrd $0x2, %xmm6, %ecx
vpinsrd $0x2, 0x640(%rsp,%rcx,4), %xmm10, %xmm10
vpextrd $0x3, %xmm6, %ecx
vpinsrd $0x3, 0x640(%rsp,%rcx,4), %xmm10, %xmm6
kmovw %k2, %ecx
popcntl %ecx, %ecx
leaq (%rax,%rcx,2), %rbx
vinserti128 $0x1, %xmm2, %ymm3, %ymm2
vinserti128 $0x1, %xmm4, %ymm5, %ymm3
movq 0x38(%rsp), %rax
vpmovdb %zmm13, (%rax,%r13)
vinserti64x4 $0x1, %ymm2, %zmm3, %zmm13
vinserti128 $0x1, %xmm8, %ymm9, %ymm3
vpmovdb %zmm0, 0x10(%rax,%r13)
vinserti128 $0x1, %xmm7, %ymm6, %ymm4
vinserti64x4 $0x1, %ymm3, %zmm4, %zmm3
vpslld $0x10, %zmm11, %zmm4
vpslld $0x10, %zmm12, %zmm5
vpandq %zmm17, %zmm14, %zmm0
vpandq %zmm17, %zmm1, %zmm1
vpord %zmm4, %zmm0, %zmm11 {%k1}
vpord %zmm5, %zmm1, %zmm12 {%k2}
addq $0x20, %r13
vmovdqa64 %zmm3, %zmm0
cmpq %r14, %r13
jb 0x6d679
jmp 0x6da8a
movq 0x40(%rsp), %rdi
vzeroupper
callq 0x45c0
xorl %ebx, %ebx
movq %rbx, %rax
leaq -0x28(%rbp), %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
vzeroupper
retq
vmovdqa64 0x40(%rsp), %zmm11
vmovdqa64 0x80(%rsp), %zmm12
vmovdqa64 %zmm11, 0x140(%rsp)
vmovdqa64 %zmm12, 0x180(%rsp)
movq 0x30(%rsp), %rax
testb $0x1f, %al
movq 0x38(%rsp), %rbx
je 0x6da65
andl $0x1f, %eax
movl %eax, %ecx
addl $0xf, %ecx
andl $-0x10, %ecx
movq %rcx, 0x40(%rsp)
vpbroadcastq %rax, %zmm1
vpaddq 0x32638(%rip), %zmm1, %zmm0 # 0xa0100
decq %rax
vpaddq 0x3266b(%rip), %zmm1, %zmm1 # 0xa0140
vpbroadcastq %rax, %zmm2
vpbroadcastq %r14, %zmm3
xorl %edx, %edx
vpmovsxbq 0x3292b(%rip), %zmm4 # 0xa0418
vpmovsxbq 0x324d9(%rip), %zmm5 # 0x9ffd0
vpternlogd $0xff, %zmm6, %zmm6, %zmm6
vpbroadcastq 0x32908(%rip), %zmm7 # 0xa0410
vpbroadcastq %rdx, %zmm8
vporq %zmm4, %zmm8, %zmm9
vporq %zmm5, %zmm8, %zmm8
vpcmpleuq %zmm2, %zmm8, %k1
vpcmpleuq %zmm2, %zmm9, %k0
kunpckbw %k1, %k0, %k2
vpaddq %zmm6, %zmm1, %zmm8
vmovq %xmm8, %rax
vpternlogd $0xff, %zmm9, %zmm9, %zmm9 {%k2} {z}
vpshufd $0x1b, %zmm9, %zmm9     # zmm9 = zmm9[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
vshufi64x2 $0x1b, %zmm9, %zmm9, %zmm9 # zmm9 = zmm9[6,7,4,5,2,3,0,1]
vptestmd %zmm9, %zmm9, %k2
leaq 0x104(%rsp), %rcx
vmovdqu32 (%rcx,%rax,4), %zmm9 {%k2} {z}
kmovw %k1, %eax
vextracti32x4 $0x3, %zmm9, %xmm10
testb $0x1, %al
je 0x6db89
vpextrd $0x3, %xmm10, %eax
andl $0xfff, %eax            # imm = 0xFFF
movb 0x640(%rsp,%rax,4), %al
movb %al, 0x80(%rsp)
kmovw %k1, %eax
testb $0x2, %al
je 0x6dbaa
vpextrd $0x2, %xmm10, %eax
andl $0xfff, %eax            # imm = 0xFFF
movb 0x640(%rsp,%rax,4), %al
movb %al, 0x100(%rsp)
kmovw %k1, %eax
testb $0x4, %al
je 0x6dbcb
vpextrd $0x1, %xmm10, %eax
andl $0xfff, %eax            # imm = 0xFFF
movb 0x640(%rsp,%rax,4), %al
movb %al, 0xc0(%rsp)
kmovw %k1, %eax
testb $0x8, %al
je 0x6dbe7
vmovd %xmm10, %eax
andl $0xfff, %eax            # imm = 0xFFF
movb 0x640(%rsp,%rax,4), %al
movb %al, 0x30(%rsp)
kmovw %k1, %eax
vextracti32x4 $0x2, %zmm9, %xmm10
testb $0x10, %al
je 0x6dc0c
vpextrd $0x3, %xmm10, %eax
andl $0xfff, %eax            # imm = 0xFFF
movb 0x640(%rsp,%rax,4), %al
movb %al, 0x2f(%rsp)
kmovw %k1, %eax
testb $0x20, %al
je 0x6dc2a
vpextrd $0x2, %xmm10, %eax
andl $0xfff, %eax            # imm = 0xFFF
movb 0x640(%rsp,%rax,4), %al
movb %al, 0x2e(%rsp)
kmovw %k1, %eax
testb $0x40, %al
je 0x6dc45
vpextrd $0x1, %xmm10, %eax
andl $0xfff, %eax            # imm = 0xFFF
movb 0x640(%rsp,%rax,4), %r14b
kmovw %k1, %eax
testb $-0x80, %al
je 0x6dc5e
vmovd %xmm10, %eax
andl $0xfff, %eax            # imm = 0xFFF
movb 0x640(%rsp,%rax,4), %r15b
kmovw %k0, %eax
testb $0x1, %al
je 0x6dc7f
vextracti128 $0x1, %ymm9, %xmm10
vpextrd $0x3, %xmm10, %eax
andl $0xfff, %eax            # imm = 0xFFF
movb 0x640(%rsp,%rax,4), %r12b
kmovw %k0, %eax
testb $0x2, %al
je 0x6dca0
vextracti128 $0x1, %ymm9, %xmm10
vpextrd $0x2, %xmm10, %eax
andl $0xfff, %eax            # imm = 0xFFF
movb 0x640(%rsp,%rax,4), %r13b
kmovw %k0, %eax
testb $0x4, %al
je 0x6dcc0
vextracti128 $0x1, %ymm9, %xmm10
vpextrd $0x1, %xmm10, %eax
andl $0xfff, %eax            # imm = 0xFFF
movb 0x640(%rsp,%rax,4), %cl
kmovw %k0, %esi
testb $0x8, %sil
je 0x6dce0
vextracti128 $0x1, %ymm9, %xmm10
vmovd %xmm10, %eax
andl $0xfff, %eax            # imm = 0xFFF
movb 0x640(%rsp,%rax,4), %al
kmovw %k0, %edi
testb $0x10, %dil
je 0x6dcfe
vpextrd $0x3, %xmm9, %esi
andl $0xfff, %esi            # imm = 0xFFF
movb 0x640(%rsp,%rsi,4), %sil
kmovw %k0, %r8d
testb $0x20, %r8b
je 0x6dd1c
vpextrd $0x2, %xmm9, %edi
andl $0xfff, %edi            # imm = 0xFFF
movb 0x640(%rsp,%rdi,4), %dil
kmovw %k0, %r9d
testb $0x40, %r9b
je 0x6dd3b
vpextrd $0x1, %xmm9, %r8d
andl $0xfff, %r8d            # imm = 0xFFF
movb 0x640(%rsp,%r8,4), %r8b
kmovw %k0, %r10d
testb $-0x80, %r10b
je 0x6dd59
vmovd %xmm9, %r9d
andl $0xfff, %r9d            # imm = 0xFFF
movb 0x640(%rsp,%r9,4), %r9b
vpaddq %zmm3, %zmm8, %zmm8
kmovw %k1, %r10d
testb $0x1, %r10b
je 0x6dd7a
vmovq %xmm8, %r10
movb 0x80(%rsp), %r11b
movb %r11b, (%rbx,%r10)
kmovw %k1, %r10d
testb $0x2, %r10b
je 0x6dd96
vpextrq $0x1, %xmm8, %r10
movb 0x100(%rsp), %r11b
movb %r11b, (%rbx,%r10)
kmovw %k1, %r10d
testb $0x4, %r10b
je 0x6ddb7
vextracti128 $0x1, %ymm8, %xmm9
vmovq %xmm9, %r10
movb 0xc0(%rsp), %r11b
movb %r11b, (%rbx,%r10)
kmovw %k1, %r10d
testb $0x8, %r10b
je 0x6ddd6
vextracti128 $0x1, %ymm8, %xmm9
vpextrq $0x1, %xmm9, %r10
movb 0x30(%rsp), %r11b
movb %r11b, (%rbx,%r10)
kmovw %k1, %r10d
vextracti32x4 $0x2, %zmm8, %xmm9
testb $0x10, %r10b
je 0x6ddf5
vmovq %xmm9, %r10
movb 0x2f(%rsp), %r11b
movb %r11b, (%rbx,%r10)
kmovw %k1, %r10d
testb $0x20, %r10b
je 0x6de0e
vpextrq $0x1, %xmm9, %r10
movb 0x2e(%rsp), %r11b
movb %r11b, (%rbx,%r10)
kmovw %k1, %r10d
vextracti32x4 $0x3, %zmm8, %xmm8
testb $0x40, %r10b
je 0x6de28
vmovq %xmm8, %r10
movb %r14b, (%rbx,%r10)
kmovw %k1, %r10d
testb $-0x80, %r10b
je 0x6de3c
vpextrq $0x1, %xmm8, %r10
movb %r15b, (%rbx,%r10)
vpaddq %zmm6, %zmm0, %zmm8
vpaddq %zmm3, %zmm8, %zmm8
kmovw %k0, %r10d
testb $0x1, %r10b
je 0x6de5b
vmovq %xmm8, %r10
movb %r12b, (%rbx,%r10)
kmovw %k0, %r10d
testb $0x2, %r10b
je 0x6de6f
vpextrq $0x1, %xmm8, %r10
movb %r13b, (%rbx,%r10)
kmovw %k0, %r10d
testb $0x4, %r10b
je 0x6de88
vextracti128 $0x1, %ymm8, %xmm9
vmovq %xmm9, %r10
movb %cl, (%rbx,%r10)
kmovw %k0, %ecx
testb $0x8, %cl
je 0x6dea0
vextracti128 $0x1, %ymm8, %xmm9
vpextrq $0x1, %xmm9, %rcx
movb %al, (%rbx,%rcx)
kmovw %k0, %eax
vextracti32x4 $0x2, %zmm8, %xmm9
testb $0x10, %al
je 0x6deb8
vmovq %xmm9, %rax
movb %sil, (%rbx,%rax)
kmovw %k0, %eax
testb $0x20, %al
je 0x6deca
vpextrq $0x1, %xmm9, %rax
movb %dil, (%rbx,%rax)
kmovw %k0, %eax
vextracti32x4 $0x3, %zmm8, %xmm8
testb $0x40, %al
je 0x6dee2
vmovq %xmm8, %rax
movb %r8b, (%rbx,%rax)
kmovw %k0, %eax
testb $-0x80, %al
je 0x6def4
vpextrq $0x1, %xmm8, %rax
movb %r9b, (%rbx,%rax)
addq $0x10, %rdx
vpaddq %zmm7, %zmm1, %zmm1
vpaddq %zmm7, %zmm0, %zmm0
cmpq %rdx, 0x40(%rsp)
jne 0x6db08
jmp 0x6da65