// File: /workspace/github_cpp_makefile_star2_O2/CMU-SAFARI[P]MQSim/src/main.cpp
// Function: read_workload_definitions(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
std::vector<std::vector<IO_Flow_Parameter_Set*>*>* read_workload_definitions(const string workload_defs_file_path)
{
	std::vector<std::vector<IO_Flow_Parameter_Set*>*>* io_scenarios = new std::vector<std::vector<IO_Flow_Parameter_Set*>*>;

	ifstream workload_defs_file;
	workload_defs_file.open(workload_defs_file_path.c_str());
	bool use_default_workloads = true;
	if (!workload_defs_file) {
		PRINT_MESSAGE("The specified workload definition file does not exist!");
		PRINT_MESSAGE("Using MQSim's default workload definitions.");
		PRINT_MESSAGE("Writing the default workload definitions to the expected workload definition file.");
		PRINT_MESSAGE("[====================] Done!\n");
	} else {
		string line((std::istreambuf_iterator<char>(workload_defs_file)), std::istreambuf_iterator<char>());
		if (line.compare("USE_INTERNAL_PARAMS") != 0) {
			rapidxml::xml_document<> doc;
			// character type defaults to char
			char* temp_string = new char[line.length() + 1];
			strcpy(temp_string, line.c_str());
			doc.parse<0>(temp_string);
			rapidxml::xml_node<> *mqsim_io_scenarios = doc.first_node("MQSim_IO_Scenarios");
			if (mqsim_io_scenarios != NULL) {
				for (auto xml_io_scenario = mqsim_io_scenarios->first_node("IO_Scenario"); xml_io_scenario; xml_io_scenario = xml_io_scenario->next_sibling("IO_Scenario")) {
					std::vector<IO_Flow_Parameter_Set*>* scenario_definition = new std::vector<IO_Flow_Parameter_Set*>;
					for (auto flow_def = xml_io_scenario->first_node(); flow_def; flow_def = flow_def->next_sibling()) {
						IO_Flow_Parameter_Set* flow;
						if (strcmp(flow_def->name(), "IO_Flow_Parameter_Set_Synthetic") == 0) {
							flow = new IO_Flow_Parameter_Set_Synthetic;
							((IO_Flow_Parameter_Set_Synthetic*)flow)->XML_deserialize(flow_def);
						} else if (strcmp(flow_def->name(), "IO_Flow_Parameter_Set_Trace_Based") == 0) {
							flow = new IO_Flow_Parameter_Set_Trace_Based;
							((IO_Flow_Parameter_Set_Trace_Based*)flow)->XML_deserialize(flow_def);
						}
						scenario_definition->push_back(flow);
					}
					io_scenarios->push_back(scenario_definition);
					use_default_workloads = false;
				}
			} else {
				PRINT_MESSAGE("Error in the workload definition file!");
				PRINT_MESSAGE("Using MQSim's default workload definitions.");
				PRINT_MESSAGE("Writing the default workload definitions to the expected workload definition file.");
				PRINT_MESSAGE("[====================] Done!\n");
			}
		}
	}

	if (use_default_workloads) {
		std::vector<IO_Flow_Parameter_Set*>* scenario_definition = new std::vector<IO_Flow_Parameter_Set*>;
		IO_Flow_Parameter_Set_Synthetic* io_flow_1 = new IO_Flow_Parameter_Set_Synthetic;
		io_flow_1->Device_Level_Data_Caching_Mode = SSD_Components::Caching_Mode::WRITE_CACHE;
		io_flow_1->Type = Flow_Type::SYNTHETIC;
		io_flow_1->Priority_Class = IO_Flow_Priority_Class::HIGH;
		io_flow_1->Channel_No = 8;
		io_flow_1->Channel_IDs = new flash_channel_ID_type[8];
		io_flow_1->Channel_IDs[0] = 0; io_flow_1->Channel_IDs[1] = 1; io_flow_1->Channel_IDs[2] = 2; io_flow_1->Channel_IDs[3] = 3;
		io_flow_1->Channel_IDs[4] = 4; io_flow_1->Channel_IDs[5] = 5; io_flow_1->Channel_IDs[6] = 6; io_flow_1->Channel_IDs[7] = 7;
		io_flow_1->Chip_No = 4;
		io_flow_1->Chip_IDs = new flash_chip_ID_type[4];
		io_flow_1->Chip_IDs[0] = 0; io_flow_1->Chip_IDs[1] = 1; io_flow_1->Chip_IDs[2] = 2; io_flow_1->Chip_IDs[3] = 3;
		io_flow_1->Die_No = 2;
		io_flow_1->Die_IDs = new flash_die_ID_type[2];
		io_flow_1->Die_IDs[0] = 0; io_flow_1->Die_IDs[1] = 1;
		io_flow_1->Plane_No = 2;
		io_flow_1->Plane_IDs = new flash_plane_ID_type[2];
		io_flow_1->Plane_IDs[0] = 0; io_flow_1->Plane_IDs[1] = 1;
		io_flow_1->Initial_Occupancy_Percentage = 50;
		io_flow_1->Working_Set_Percentage = 85;
		io_flow_1->Synthetic_Generator_Type = Utils::Request_Generator_Type::QUEUE_DEPTH;
		io_flow_1->Read_Percentage = 100;
		io_flow_1->Address_Distribution = Utils::Address_Distribution_Type::RANDOM_UNIFORM;
		io_flow_1->Percentage_of_Hot_Region = 0;
		io_flow_1->Generated_Aligned_Addresses = true;
		io_flow_1->Address_Alignment_Unit = 16;
		io_flow_1->Request_Size_Distribution = Utils::Request_Size_Distribution_Type::FIXED;
		io_flow_1->Average_Request_Size = 8;
		io_flow_1->Variance_Request_Size = 0;
		io_flow_1->Seed = 12344;
		io_flow_1->Average_No_of_Reqs_in_Queue = 2;
		io_flow_1->Bandwidth = 262144;
		io_flow_1->Stop_Time = 1000000000;
		io_flow_1->Total_Requests_To_Generate = 0;
		scenario_definition->push_back(io_flow_1);

		IO_Flow_Parameter_Set_Synthetic* io_flow_2 = new IO_Flow_Parameter_Set_Synthetic;
		io_flow_2->Device_Level_Data_Caching_Mode = SSD_Components::Caching_Mode::WRITE_CACHE;
		io_flow_2->Type = Flow_Type::SYNTHETIC;
		io_flow_2->Priority_Class = IO_Flow_Priority_Class::HIGH;
		io_flow_2->Channel_No = 8;
		io_flow_2->Channel_IDs = new flash_channel_ID_type[8];
		io_flow_2->Channel_IDs[0] = 0; io_flow_2->Channel_IDs[1] = 1; io_flow_2->Channel_IDs[2] = 2; io_flow_2->Channel_IDs[3] = 3;
		io_flow_2->Channel_IDs[4] = 4; io_flow_2->Channel_IDs[5] = 5; io_flow_2->Channel_IDs[6] = 6; io_flow_2->Channel_IDs[7] = 7;
		io_flow_2->Chip_No = 4;
		io_flow_2->Chip_IDs = new flash_chip_ID_type[4];
		io_flow_2->Chip_IDs[0] = 0; io_flow_2->Chip_IDs[1] = 1; io_flow_2->Chip_IDs[2] = 2; io_flow_2->Chip_IDs[3] = 3;
		io_flow_2->Die_No = 2;
		io_flow_2->Die_IDs = new flash_die_ID_type[2];
		io_flow_2->Die_IDs[0] = 0; io_flow_2->Die_IDs[1] = 1;
		io_flow_2->Plane_No = 2;
		io_flow_2->Plane_IDs = new flash_plane_ID_type[2];
		io_flow_2->Plane_IDs[0] = 0; io_flow_2->Plane_IDs[1] = 1;
		io_flow_2->Initial_Occupancy_Percentage = 50;
		io_flow_2->Working_Set_Percentage = 85;
		io_flow_2->Synthetic_Generator_Type = Utils::Request_Generator_Type::QUEUE_DEPTH;
		io_flow_2->Read_Percentage = 100;
		io_flow_2->Address_Distribution = Utils::Address_Distribution_Type::RANDOM_UNIFORM;
		io_flow_2->Percentage_of_Hot_Region = 0;
		io_flow_2->Generated_Aligned_Addresses = true;
		io_flow_2->Address_Alignment_Unit = 16;
		io_flow_2->Request_Size_Distribution = Utils::Request_Size_Distribution_Type::FIXED;
		io_flow_2->Average_Request_Size = 8;
		io_flow_2->Variance_Request_Size = 0;
		io_flow_2->Seed = 6533;
		io_flow_2->Average_No_of_Reqs_in_Queue = 2;
		io_flow_2->Bandwidth = 131072;
		io_flow_2->Stop_Time = 1000000000;
		io_flow_2->Total_Requests_To_Generate = 0;
		scenario_definition->push_back(io_flow_2);

		io_scenarios->push_back(scenario_definition);

		PRINT_MESSAGE("Writing default workload parameters to the expected input file.")

		Utils::XmlWriter xmlwriter;
		string tmp;
		xmlwriter.Open(workload_defs_file_path.c_str());
		tmp = "MQSim_IO_Scenarios";
		xmlwriter.Write_open_tag(tmp);
		tmp = "IO_Scenario";
		xmlwriter.Write_open_tag(tmp);

		io_flow_1->XML_serialize(xmlwriter);
		io_flow_2->XML_serialize(xmlwriter);

		xmlwriter.Write_close_tag();
		xmlwriter.Write_close_tag();
		xmlwriter.Close();
	}
	workload_defs_file.close();

	return io_scenarios;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x10348, %rsp          # imm = 0x10348
movq %rdi, %r14
pushq $0x18
popq %rdi
callq 0x7370
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
movq %rax, 0x30(%rsp)
andq $0x0, 0x10(%rax)
leaq 0xb8(%rsp), %rbx
movq %rbx, %rdi
callq 0x73a0
movq %r14, 0x40(%rsp)
movq (%r14), %rsi
pushq $0x8
popq %rdx
movq %rbx, %rdi
callq 0x7250
movq 0xb8(%rsp), %rax
movq -0x18(%rax), %rax
testb $0x5, 0xd8(%rsp,%rax)
leaq 0x20(%rsp), %rcx
je 0x884b
movq 0x59797(%rip), %rdi     # 0x61f78
leaq 0x3a990(%rip), %rsi     # 0x43178
callq 0x7360
movq %rax, %rdi
callq 0x71a0
movq 0x5977c(%rip), %rdi     # 0x61f78
leaq 0x3a9ac(%rip), %rsi     # 0x431af
callq 0x7360
movq %rax, %rdi
callq 0x71a0
movq 0x59761(%rip), %rdi     # 0x61f78
leaq 0x3a9bd(%rip), %rsi     # 0x431db
callq 0x7360
movq %rax, %rdi
callq 0x71a0
movq 0x59746(%rip), %rdi     # 0x61f78
leaq 0x3a8d0(%rip), %rsi     # 0x43109
callq 0x7360
movq %rax, %rdi
callq 0x71a0
jmp 0x8b1c
movq 0x1a0(%rsp,%rax), %rsi
leaq 0x10(%rsp), %rdi
movq %rcx, (%rdi)
pushq $-0x1
popq %rdx
xorl %ecx, %ecx
movl %edx, %r8d
callq 0x9d66
leaq 0x3a8b8(%rip), %rsi     # 0x43127
leaq 0x10(%rsp), %rdi
callq 0x7120
testl %eax, %eax
je 0x8b12
leaq 0x320(%rsp), %rax
andq $0x0, -0x40(%rax)
xorps %xmm0, %xmm0
movaps %xmm0, -0x60(%rax)
andl $0x0, -0x38(%rax)
andq $0x0, -0x30(%rax)
andq $0x0, -0x20(%rax)
leaq 0x10338(%rsp), %rax
leaq 0x338(%rsp), %rcx
movups %xmm0, (%rax)
movq %rcx, -0x18(%rcx)
movq %rcx, -0x10(%rcx)
movq %rax, -0x8(%rcx)
movq 0x18(%rsp), %rdi
incq %rdi
callq 0x7030
movq %rax, %rbx
movq 0x10(%rsp), %rsi
movq %rax, %rdi
callq 0x7330
leaq 0x2c0(%rsp), %rdi
movq %rbx, %rsi
callq 0x98ea
leaq 0x3a938(%rip), %rsi     # 0x4322e
leaq 0x2c0(%rsp), %rdi
pushq $0x1
popq %rcx
xorl %edx, %edx
callq 0x99b8
testq %rax, %rax
je 0x8a99
leaq 0x3a929(%rip), %rsi     # 0x43241
pushq $0x1
popq %rcx
movq %rax, %rdi
xorl %edx, %edx
callq 0x99b8
movq %rax, %rbp
movb $0x1, %r15b
pushq $0x1
popq %r14
leaq 0x3a917(%rip), %rbx     # 0x4324d
leaq 0x5812b(%rip), %rax     # 0x60a68
addq $0x10, %rax
movq %rax, 0x50(%rsp)
leaq 0x38(%rsp), %r13
leaq 0x5814e(%rip), %rax     # 0x60aa0
addq $0x10, %rax
movq %rax, 0x48(%rsp)
testq %rbp, %rbp
je 0x8a73
pushq $0x18
popq %rdi
callq 0x7370
andq $0x0, 0x10(%rax)
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
movq %rax, 0x8(%rsp)
movq 0x30(%rbp), %r15
testq %r15, %r15
je 0x8a45
movq (%r15), %r12
testq %r12, %r12
leaq 0x59b6c(%rip), %rax     # 0x62502
cmoveq %rax, %r12
movq %r12, %rdi
movq %rbx, %rsi
callq 0x7490
testl %eax, %eax
je 0x89fb
movq %r12, %rdi
leaq 0x3a8ba(%rip), %rsi     # 0x4326d
callq 0x7490
testl %eax, %eax
jne 0x8a21
movl $0x80, %edi
callq 0x7370
movq 0x48(%rsp), %rcx
movq %rcx, (%rax)
movq %rax, %rcx
addq $0x60, %rcx
movq %rcx, 0x50(%rax)
andq $0x0, 0x58(%rax)
movb $0x0, 0x60(%rax)
movl $0x1, 0xc(%rax)
movq %rax, 0x38(%rsp)
movq %rax, %rdi
movq %r15, %rsi
callq 0x14690
jmp 0x8a21
movl $0x90, %edi
callq 0x7370
movq 0x50(%rsp), %rcx
movq %rcx, (%rax)
andl $0x0, 0xc(%rax)
movq %rax, 0x38(%rsp)
movq %rax, %rdi
movq %r15, %rsi
callq 0x13bd6
movq 0x8(%rsp), %rdi
movq %r13, %rsi
callq 0x9a50
movq %r15, %rdi
xorl %esi, %esi
xorl %edx, %edx
movl %r14d, %ecx
callq 0x9a6e
movq %rax, %r15
jmp 0x8980
movq 0x30(%rsp), %rdi
leaq 0x8(%rsp), %rsi
callq 0x9b0c
xorl %r15d, %r15d
movq %rbp, %rdi
leaq 0x3a7e0(%rip), %rsi     # 0x43241
xorl %edx, %edx
movl %r14d, %ecx
callq 0x9a6e
movq %rax, %rbp
jmp 0x895b
leaq 0x320(%rsp), %rdi
callq 0x9c68
leaq 0x10(%rsp), %rdi
callq 0x7678
testb $0x1, %r15b
jne 0x8b1c
jmp 0x8eb8
movq 0x594d8(%rip), %rdi     # 0x61f78
leaq 0x3a7e8(%rip), %rsi     # 0x4328f
callq 0x7360
movq %rax, %rdi
callq 0x71a0
movq 0x594bd(%rip), %rdi     # 0x61f78
leaq 0x3a6ed(%rip), %rsi     # 0x431af
callq 0x7360
movq %rax, %rdi
callq 0x71a0
movq 0x594a2(%rip), %rdi     # 0x61f78
leaq 0x3a6fe(%rip), %rsi     # 0x431db
callq 0x7360
movq %rax, %rdi
callq 0x71a0
movq 0x59487(%rip), %rdi     # 0x61f78
leaq 0x3a611(%rip), %rsi     # 0x43109
callq 0x7360
movq %rax, %rdi
callq 0x71a0
leaq 0x320(%rsp), %rdi
callq 0x9c68
leaq 0x10(%rsp), %rdi
callq 0x7678
pushq $0x18
popq %rdi
callq 0x7370
movq %rax, %rbx
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
andq $0x0, 0x10(%rax)
movq %rax, 0x8(%rsp)
movl $0x90, %edi
callq 0x7370
movq %rax, %r15
leaq 0x57f1d(%rip), %r13     # 0x60a68
addq $0x10, %r13
movq %r13, (%rax)
andq $0x0, 0x8(%rax)
movl $0x1, 0x10(%rax)
movl $0x8, 0x3c(%rax)
pushq $0x20
popq %rdi
callq 0x7030
movq %rax, 0x18(%r15)
movaps 0x3a498(%rip), %xmm0    # 0x43010
movups %xmm0, (%rax)
movaps 0x3a49e(%rip), %xmm0    # 0x43020
movups %xmm0, 0x10(%rax)
movl $0x4, 0x40(%r15)
pushq $0x10
popq %rdi
callq 0x7030
movq %rax, 0x20(%r15)
movaps 0x3a46f(%rip), %xmm0    # 0x43010
movups %xmm0, (%rax)
movl $0x2, 0x44(%r15)
pushq $0x8
popq %rdi
callq 0x7030
movq %rax, 0x28(%r15)
movabsq $0x100000000, %r14      # imm = 0x100000000
movq %r14, (%rax)
movl $0x2, 0x48(%r15)
pushq $0x8
popq %rdi
callq 0x7030
movq %rax, 0x30(%r15)
movl $0x32, 0x38(%r15)
movabsq $0x100000055, %rbp      # imm = 0x100000055
movq %rbp, 0x4c(%r15)
movb $0x64, 0x54(%r15)
movl $0x2, 0x58(%r15)
movw $0x100, 0x5c(%r15)      # imm = 0x100
movaps 0x3a426(%rip), %xmm0    # 0x43030
movups %xmm0, 0x60(%r15)
movabsq $0x200003038, %rcx      # imm = 0x200003038
movq %rcx, 0x70(%r15)
movl $0x40000, 0x78(%r15)    # imm = 0x40000
movq $0x3b9aca00, 0x80(%r15) # imm = 0x3B9ACA00
andl $0x0, 0x88(%r15)
movq %r14, (%rax)
leaq 0x2c0(%rsp), %rsi
movq %r15, (%rsi)
movq %rbx, %rdi
callq 0xb4c0
movl $0x90, %edi
callq 0x7370
movq %rax, %r12
movq %r13, (%rax)
andq $0x0, 0x8(%rax)
movl $0x1, 0x10(%rax)
movl $0x8, 0x3c(%rax)
pushq $0x20
popq %rdi
callq 0x7030
movq %rax, 0x18(%r12)
movaps 0x3a38b(%rip), %xmm0    # 0x43010
movups %xmm0, (%rax)
movaps 0x3a391(%rip), %xmm0    # 0x43020
movups %xmm0, 0x10(%rax)
movl $0x4, 0x40(%r12)
pushq $0x10
popq %rdi
callq 0x7030
movq %rax, 0x20(%r12)
movaps 0x3a360(%rip), %xmm0    # 0x43010
movups %xmm0, (%rax)
movl $0x2, 0x44(%r12)
pushq $0x8
popq %rdi
callq 0x7030
movq %rax, 0x28(%r12)
movq %r14, (%rax)
movl $0x2, 0x48(%r12)
pushq $0x8
popq %rdi
callq 0x7030
movq %rax, 0x30(%r12)
movl $0x32, 0x38(%r12)
movq %rbp, 0x4c(%r12)
movb $0x64, 0x54(%r12)
movl $0x2, 0x58(%r12)
movw $0x100, 0x5c(%r12)      # imm = 0x100
movaps 0x3a322(%rip), %xmm0    # 0x43030
movups %xmm0, 0x60(%r12)
movabsq $0x200001985, %rcx      # imm = 0x200001985
movq %rcx, 0x70(%r12)
movl $0x20000, 0x78(%r12)    # imm = 0x20000
movq $0x3b9aca00, 0x80(%r12) # imm = 0x3B9ACA00
andl $0x0, 0x88(%r12)
movq %r14, (%rax)
movq 0x8(%rsp), %rdi
leaq 0x2c0(%rsp), %rsi
movq %r12, (%rsi)
callq 0xb4c0
leaq 0x8(%rsp), %rsi
movq 0x30(%rsp), %rdi
callq 0x9b0c
movq 0x59209(%rip), %rdi     # 0x61f78
leaq 0x3a540(%rip), %rsi     # 0x432b6
callq 0x7360
movq %rax, %rdi
callq 0x71a0
leaq 0x2c0(%rsp), %rdi
callq 0x98a0
leaq 0x20(%rsp), %rax
movq %rax, 0x10(%rsp)
andq $0x0, 0x18(%rsp)
movb $0x0, 0x20(%rsp)
movq 0x40(%rsp), %rax
movq (%rax), %rsi
leaq 0x98(%rsp), %rdi
leaq 0x38(%rsp), %rdx
callq 0x7150
leaq 0x2c0(%rsp), %rdi
leaq 0x98(%rsp), %rsi
callq 0x41980
leaq 0x98(%rsp), %rdi
callq 0x7678
leaq 0x3a446(%rip), %rsi     # 0x4322e
leaq 0x10(%rsp), %rdi
callq 0x7640
leaq 0x78(%rsp), %rdi
leaq 0x10(%rsp), %rsi
callq 0x7480
leaq 0x2c0(%rsp), %rdi
leaq 0x78(%rsp), %rsi
callq 0x419e0
leaq 0x78(%rsp), %rdi
callq 0x7678
leaq 0x3a41d(%rip), %rsi     # 0x43241
leaq 0x10(%rsp), %rdi
callq 0x7640
leaq 0x58(%rsp), %rdi
leaq 0x10(%rsp), %rsi
callq 0x7480
leaq 0x2c0(%rsp), %rdi
leaq 0x58(%rsp), %rsi
callq 0x419e0
leaq 0x58(%rsp), %rdi
callq 0x7678
movq (%r15), %rax
leaq 0x2c0(%rsp), %rsi
movq %r15, %rdi
callq *(%rax)
movq (%r12), %rax
leaq 0x2c0(%rsp), %rsi
movq %r12, %rdi
callq *(%rax)
leaq 0x2c0(%rsp), %rdi
callq 0x41c5c
leaq 0x2c0(%rsp), %rdi
callq 0x41c5c
leaq 0x2c0(%rsp), %rdi
callq 0x419c4
leaq 0x10(%rsp), %rdi
callq 0x7678
leaq 0x2c0(%rsp), %rdi
callq 0x98c4
leaq 0xb8(%rsp), %rdi
callq 0x70a0
leaq 0xb8(%rsp), %rdi
callq 0x7100
movq 0x30(%rsp), %rax
addq $0x10348, %rsp          # imm = 0x10348
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
jmp 0x8f4e
jmp 0x8f29
jmp 0x8f4e
movq %rax, %rbx
leaq 0x58(%rsp), %rdi
jmp 0x8f0e
movq %rax, %rbx
leaq 0x78(%rsp), %rdi
jmp 0x8f0e
movq %rax, %rbx
leaq 0x98(%rsp), %rdi
callq 0x7678
jmp 0x8f31
jmp 0x8f2e
jmp 0x8f29
jmp 0x8f29
jmp 0x8f29
jmp 0x8f29
jmp 0x8f4e
jmp 0x8f29
jmp 0x8f4e
jmp 0x8f29
jmp 0x8f29
movq %rax, %rbx
jmp 0x8f68
movq %rax, %rbx
leaq 0x10(%rsp), %rdi
callq 0x7678
leaq 0x2c0(%rsp), %rdi
callq 0x98c4
jmp 0x8f68
jmp 0x8f4e
jmp 0x8f4e
movq %rax, %rbx
leaq 0x320(%rsp), %rdi
callq 0x9c68
leaq 0x10(%rsp), %rdi
callq 0x7678
leaq 0xb8(%rsp), %rdi
callq 0x7100
movq %rbx, %rdi
callq 0x75d0