// File: /workspace/github_cpp_makefile_star2_O2/sopanpatra160[P]OOO_Superscalar_Processor_Simulator/cache.cc
// Function: cache::write(unsigned int)
unsigned int cache::write(unsigned int addr){

	unsigned int addr_ev;
	num_w++;
	calc_tag_ind(addr);
		
	if(lev == 1){
		//#1 check for the element in all the blocks of that set	
		for (unsigned int j=0; j<a; j++){
			if((tag_store[ind][j]==tag) && (valid_store[ind][j]==1)){
				if(rp==2)
					lru_update(ind,j);
				else if(rp==3) 
					lfu_update_block(ind,j,1);
				if(wp==0){
					dirty_store[ind][j]=1;
				}
				return 1;
			}
		}
		if(vptr != NULL){
			unsigned int tag_vc = vptr->calc_tag(addr);
			unsigned int found_loc;
			unsigned int found_vc = 0;
			for (unsigned int j=0; j<vptr->a; j++){
				
				if((vptr->tag_store[0][j]==tag_vc) && (vptr->valid_store[0][j]==1)){
					found_vc = 1;
					found_loc = j;
				}
			}
			if(found_vc==1){
				num_swap++;
				swap(found_loc,1);
				return 1;
			}
		}

		num_miss_w++;
		
		//#2 MISS in L1 but invalid case
		for (unsigned int j=0; j<a; j++){
			if(valid_store[ind][j]==0){
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][j]=tag;
				valid_store[ind][j]=1;
				dirty_store[ind][j]=1;
				if(rp==2)
					lru_update(ind,j);
				else 
					lfu_update_block(ind,j,0);
				return 0;
			}
		}
		
		//#3 MISS IN L1 FOR ALL BITS VALID : EVICTION
		//LRU
		if(rp==2){
			ev_blk= lru_block2evict(ind);
		}
		//LFU policy
		else if(rp==3){
			ev_blk= lfu_block2evict(ind);
		}


		if(vptr != NULL){
			addr_ev = ev_blk_addr(ind,tag_store[ind][ev_blk]);
			vptr->insert_vc(addr_ev,dirty_store[ind][ev_blk]);
			if(next!=NULL)
				next->read(addr);
			tag_store[ind][ev_blk]=tag;
			dirty_store[ind][ev_blk]=1;
			

		}
		else if(vptr == NULL){
			if(dirty_store[ind][ev_blk]==0){
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][ev_blk]=tag;
				dirty_store[ind][ev_blk]=1;
			}
			else if(dirty_store[ind][ev_blk]==1){
				num_wb+=1;
				addr_ev = ev_blk_addr(ind,tag_store[ind][ev_blk]);
				if(next!=NULL)
					next->write(addr_ev);
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][ev_blk]=tag;
				dirty_store[ind][ev_blk]=1;
			}
		}

		if(rp==2){
			lru_update(ind,ev_blk);
		}
		else if(rp==3){
			lfu_update_set(ind,ev_blk);
			lfu_update_block(ind,ev_blk,0);
		}
		return 0;

	}	
		
	if(lev == 2){
		//#1 check for the element in all the blocks of that set
		for (unsigned int j=0; j<a; j++){
			if((tag_store[ind][j]==tag) && (valid_store[ind][j]==1)){

				if(rp==2)
					lru_update(ind,j);
				else if(rp==3) 
					lfu_update_block(ind,j,1);
				if(wp==0){
					dirty_store[ind][j]=1;
				}

				return 1;
			}
		}

		num_miss_w+=1;

		//#2 MISS in L1 but invalid case	
		for (unsigned int j=0; j<a; j++){
			if(valid_store[ind][j]==0){
				if(wp == 0){
					tag_store[ind][j]=tag;
					valid_store[ind][j]=1;
					dirty_store[ind][j]=1;
					if(rp==2)
						lru_update(ind,j);
					else 
						lfu_update_block(ind,j,0);
				}

				return 0;
			}
		}
		
		//#3 MISS IN L1 FOR ALL BITS VALID : EVICTION	
		//LRU policy
		if(rp==2){
			ev_blk= lru_block2evict(ind);
		}
		//LFU policy
		else if(rp==3){
			ev_blk= lfu_block2evict(ind);
		}

		//update dirty according to write policy
		//WB policy
		if(wp == 0){
			if(dirty_store[ind][ev_blk]==0){
				tag_store[ind][ev_blk]=tag;
				dirty_store[ind][ev_blk]=1;
				if(rp==2){
					lru_update(ind,ev_blk);
				}
				else if(rp==3){
					lfu_update_set(ind,ev_blk);
					lfu_update_block(ind,ev_blk,0);
				}
			}
			else if(dirty_store[ind][ev_blk]==1){
				num_wb+=1;
				tag_store[ind][ev_blk]=tag;
				if(rp==2){
					lru_update(ind,ev_blk);
				}
				else if(rp==3){
					lfu_update_set(ind,ev_blk);
					lfu_update_block(ind,ev_blk,0);
				}
			}
		}
		return 0;
	}
	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %esi, %ebp
movq %rdi, %rbx
incl 0x88(%rdi)
callq 0x1b30
movl 0x24(%rbx), %eax
cmpl $0x1, %eax
je 0x1f07
xorl %ebp, %ebp
cmpl $0x2, %eax
jne 0x22f5
movl 0x18(%rbx), %ecx
movq 0x28(%rbx), %r12
movl 0x68(%rbx), %r14d
movl 0x64(%rbx), %r13d
movq 0x30(%rbx), %rax
xorl %r15d, %r15d
cmpq %r15, %rcx
je 0x1f43
movq (%r12,%r14,8), %rdx
cmpl %r13d, (%rdx,%r15,4)
jne 0x1f02
movq (%rax,%r14,8), %rdx
cmpl $0x1, (%rdx,%r15,4)
je 0x2042
incq %r15
jmp 0x1ee4
movl 0x18(%rbx), %eax
movq 0x28(%rbx), %r13
movl 0x68(%rbx), %r8d
movl %r8d, %r14d
movl 0x64(%rbx), %edx
movq 0x30(%rbx), %rcx
xorl %r15d, %r15d
cmpq %r15, %rax
je 0x1f67
movq (%r13,%r14,8), %rsi
cmpl %edx, (%rsi,%r15,4)
jne 0x1f3e
movq (%rcx,%r14,8), %rsi
cmpl $0x1, (%rsi,%r15,4)
je 0x2057
incq %r15
jmp 0x1f1f
incl 0x8c(%rbx)
xorl %edx, %edx
cmpq %rdx, %rcx
je 0x1fd9
movq (%rax,%r14,8), %rsi
cmpl $0x0, (%rsi,%rdx,4)
je 0x1ffe
incq %rdx
jmp 0x1f4b
movq 0x8(%rbx), %r15
testq %r15, %r15
je 0x20b0
movl 0x5c(%r15), %ecx
addl 0x58(%r15), %ecx
movl %ebp, %edx
shrl %cl, %edx
movl 0x18(%r15), %ecx
movl %edx, 0x64(%r15)
xorl %edi, %edi
xorl %r8d, %r8d
cmpq %rdi, %rcx
je 0x1fba
movq 0x28(%r15), %r9
movq (%r9), %r9
cmpl %edx, (%r9,%rdi,4)
jne 0x1fb5
movq 0x30(%r15), %r9
movq (%r9), %r9
movl (%r9,%rdi,4), %r9d
cmpl $0x1, %r9d
cmovel %edi, %esi
cmovel %r9d, %r8d
incq %rdi
jmp 0x1f8d
cmpl $0x1, %r8d
jne 0x20a5
incl 0x7c(%rbx)
pushq $0x1
popq %rbp
movq %rbx, %rdi
movl %ebp, %edx
callq 0x1bc4
jmp 0x22f5
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x2150
cmpl $0x2, %eax
jne 0x215e
movq %rbx, %rdi
movl %r14d, %esi
callq 0x1cf8
jmp 0x215b
xorl %ebp, %ebp
cmpl $0x0, 0x20(%rbx)
jne 0x22f5
movq (%r12,%r14,8), %rcx
movl %r13d, (%rcx,%rdx,4)
movl 0x68(%rbx), %ecx
movq (%rax,%rcx,8), %rax
pushq $0x1
popq %rcx
movl %ecx, (%rax,%rdx,4)
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %esi
movq (%rax,%rsi,8), %rax
movl %ecx, (%rax,%rdx,4)
movl 0x68(%rbx), %esi
cmpl $0x2, 0x1c(%rbx)
jne 0x228d
movq %rbx, %rdi
jmp 0x22c4
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x2074
cmpl $0x2, %eax
jne 0x2080
movq %rbx, %rdi
movl %r14d, %esi
jmp 0x206a
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x2074
cmpl $0x2, %eax
jne 0x2080
movq %rbx, %rdi
movl %r8d, %esi
movl %r15d, %edx
callq 0x1b50
jmp 0x2080
movq 0x48(%rbx), %rax
movq (%rax,%r14,8), %rax
incl (%rax,%r15,4)
pushq $0x1
popq %rbp
cmpl $0x0, 0x20(%rbx)
jne 0x22f5
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %ecx
movq (%rax,%rcx,8), %rax
movl $0x1, (%rax,%r15,4)
jmp 0x22f5
movq 0x30(%rbx), %rcx
movl 0x68(%rbx), %r14d
movl %r14d, %r8d
incl 0x8c(%rbx)
xorl %r12d, %r12d
cmpq %r12, %rax
je 0x20ce
movq (%rcx,%r14,8), %rdx
cmpl $0x0, (%rdx,%r12,4)
je 0x20f6
incq %r12
jmp 0x20b9
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x21c3
cmpl $0x2, %eax
jne 0x21d7
movq %rbx, %rdi
movl %r8d, %r12d
movl %r8d, %esi
callq 0x1cf8
jmp 0x21d1
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x2111
movl %ebp, %esi
callq 0x165c
movq 0x28(%rbx), %r13
movq 0x30(%rbx), %rcx
movl 0x68(%rbx), %r14d
movl 0x64(%rbx), %eax
movq (%r13,%r14,8), %rdx
movl %eax, (%rdx,%r12,4)
movl 0x68(%rbx), %eax
movq (%rcx,%rax,8), %rax
pushq $0x1
popq %rcx
movl %ecx, (%rax,%r12,4)
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %edx
movq (%rax,%rdx,8), %rax
movl %ecx, (%rax,%r12,4)
movl 0x68(%rbx), %esi
cmpl $0x2, 0x1c(%rbx)
jne 0x21a7
movq %rbx, %rdi
movl %r12d, %edx
callq 0x1b50
jmp 0x21bc
movq %rbx, %rdi
movl %r14d, %esi
callq 0x1d2a
movl %eax, 0x6c(%rbx)
xorl %ebp, %ebp
cmpl $0x0, 0x20(%rbx)
jne 0x22f5
movq 0x38(%rbx), %rax
movq (%rax,%r14,8), %rdx
movl 0x6c(%rbx), %ecx
movl (%rdx,%rcx,4), %edx
cmpl $0x1, %edx
je 0x22a3
testl %edx, %edx
jne 0x22f5
movq (%r12,%r14,8), %rdx
movl %r13d, (%rdx,%rcx,4)
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %edx
movq (%rax,%rcx,8), %rax
movl $0x1, (%rax,%rdx,4)
jmp 0x22ae
movq 0x48(%rbx), %rax
movq 0x50(%rbx), %rcx
movl (%rcx,%rsi,4), %ecx
incl %ecx
movq (%rax,%rsi,8), %rax
movl %ecx, (%rax,%r12,4)
xorl %ebp, %ebp
jmp 0x22f5
movq %rbx, %rdi
movl %r8d, %r12d
movl %r8d, %esi
callq 0x1d2a
movl %eax, 0x6c(%rbx)
movl %r12d, %r8d
testq %r15, %r15
je 0x2247
movq (%r13,%r14,8), %rax
movl 0x58(%rbx), %ecx
shll %cl, %r8d
movl 0x6c(%rbx), %edx
movl (%rax,%rdx,4), %esi
addl 0x5c(%rbx), %ecx
shll %cl, %esi
orl %r8d, %esi
movq 0x38(%rbx), %rax
movq (%rax,%r14,8), %rax
movl (%rax,%rdx,4), %edx
movq %r15, %rdi
callq 0x1d6c
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x2217
movl %ebp, %esi
callq 0x165c
movl 0x64(%rbx), %eax
movq 0x28(%rbx), %rcx
movl 0x68(%rbx), %edx
movq (%rcx,%rdx,8), %rcx
movl 0x6c(%rbx), %edx
movl %eax, (%rcx,%rdx,4)
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %edx
movq (%rax,%rcx,8), %rax
movl $0x1, (%rax,%rdx,4)
movl 0x1c(%rbx), %eax
xorl %ebp, %ebp
jmp 0x22b1
movq 0x38(%rbx), %rax
movq (%rax,%r14,8), %rdx
movl 0x6c(%rbx), %ecx
movl (%rdx,%rcx,4), %edx
cmpl $0x1, %edx
je 0x2306
testl %edx, %edx
jne 0x2240
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x2280
movl %ebp, %esi
callq 0x165c
movq 0x28(%rbx), %r13
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %r14d
movl 0x6c(%rbx), %ecx
movl 0x64(%rbx), %edx
movq (%r13,%r14,8), %rsi
movl %edx, (%rsi,%rcx,4)
jmp 0x222f
movq 0x48(%rbx), %rax
movq 0x50(%rbx), %rcx
movl (%rcx,%rsi,4), %ecx
incl %ecx
movq (%rax,%rsi,8), %rax
movl %ecx, (%rax,%rdx,4)
jmp 0x22f5
incl 0x74(%rbx)
movq (%r12,%r14,8), %rax
movl %r13d, (%rax,%rcx,4)
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x22cb
cmpl $0x2, %eax
jne 0x22f5
movl 0x68(%rbx), %esi
movl 0x6c(%rbx), %edx
movq %rbx, %rdi
callq 0x1b50
jmp 0x22f5
movl 0x68(%rbx), %eax
movl 0x6c(%rbx), %ecx
movq 0x48(%rbx), %rdx
movq 0x50(%rbx), %rsi
movq (%rdx,%rax,8), %rdi
movl (%rdi,%rcx,4), %ecx
movl %ecx, (%rsi,%rax,4)
movl 0x68(%rbx), %eax
movl 0x6c(%rbx), %ecx
movl (%rsi,%rax,4), %esi
incl %esi
movq (%rdx,%rax,8), %rax
movl %esi, (%rax,%rcx,4)
movl %ebp, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
incl 0x74(%rbx)
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x2217
movq (%r13,%r14,8), %rax
movl (%rax,%rcx,4), %edx
movl 0x58(%rbx), %eax
movl 0x5c(%rbx), %ecx
addl %eax, %ecx
shll %cl, %edx
movl %eax, %ecx
shll %cl, %r8d
orl %edx, %r8d
movl %r8d, %esi
callq 0x1ea0
jmp 0x2208