LLM4Binary/decompile-bench-makefile huggingface dataset:
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/HybridCache.cc
// Function: HybridCache::finishSimu()
void 
HybridCache::finishSimu()
{
	for (int i = 0; i < m_nb_set; i++) {
		for (int j = 0; j < m_nbSRAMways; j++) {
		    updateStatsDeallocate(m_tableSRAM[i][j]);
		}
		for (int j = 0; j < m_nbNVMways; j++) {
		    updateStatsDeallocate(m_tableNVM[i][j]);
		}
	}
	m_predictor->finishSimu();
	
	if(simu_parameters.traceLLC && m_ID == -1)
	{
		gzclose(LLC_trace);
	}

}

// Assembly:
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
xorl %r14d, %r14d
movslq 0xac(%rbx), %rax
cmpq %rax, %r14
jge 0x14f95
imulq $0x18, %r14, %r15
xorl %r12d, %r12d
movslq 0xa8(%rbx), %rax
cmpq %rax, %r12
jge 0x14f68
movq 0x20(%rbx), %rax
movq (%rax,%r15), %rax
movq (%rax,%r12,8), %rsi
movq %rbx, %rdi
callq 0x14fd8
incq %r12
jmp 0x14f43
xorl %r12d, %r12d
movslq 0xa4(%rbx), %rax
cmpq %rax, %r12
jge 0x14f90
movq 0x8(%rbx), %rax
movq (%rax,%r15), %rax
movq (%rax,%r12,8), %rsi
movq %rbx, %rdi
callq 0x14fd8
incq %r12
jmp 0x14f6b
incq %r14
jmp 0x14f30
movq 0x68(%rbx), %rdi
movq (%rdi), %rax
callq *0x38(%rax)
leaq 0x28faa(%rip), %rax     # 0x3df50
cmpb $0x1, 0x89(%rax)
jne 0x14fcb
cmpl $-0x1, (%rbx)
jne 0x14fcb
movq 0x28acd(%rip), %rdi     # 0x3da88
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
jmp 0x5540
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/HybridCache.cc
// Function: HybridCache::entete_debug()
void
HybridCache::entete_debug()
{
	DPRINTF(DebugCache , "CACHE[%d]-", m_ID);
	if(m_isInstructionCache){
		DPRINTF(DebugCache , "I:");	
	}
	else{	
		DPRINTF(DebugCache , "D:");
	}
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
subq $0x30, %rsp
movq %rdi, %r14
leaq 0x1559e(%rip), %rsi     # 0x2a84d
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x5140
leaq 0x28c8b(%rip), %rbx     # 0x3df50
addq $0x8, %rbx
leaq 0x10(%rsp), %rsi
movq %rbx, %rdi
callq 0x138f8
movq %rax, %r15
leaq 0x10(%rsp), %rdi
callq 0x5618
testq %r15, %r15
je 0x152f9
movl (%r14), %esi
leaq 0x15a76(%rip), %rdi     # 0x2ad68
xorl %eax, %eax
callq 0x5040
cmpb $0x1, 0x4(%r14)
jne 0x1533e
leaq 0x15546(%rip), %rsi     # 0x2a84d
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x5140
leaq 0x10(%rsp), %rsi
movq %rbx, %rdi
callq 0x138f8
movq %rax, %rbx
leaq 0x10(%rsp), %rdi
callq 0x5618
testq %rbx, %rbx
je 0x15381
leaq 0x15a37(%rip), %rdi     # 0x2ad73
jmp 0x1537a
leaq 0x15508(%rip), %rsi     # 0x2a84d
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x5140
leaq 0x10(%rsp), %rsi
movq %rbx, %rdi
callq 0x138f8
movq %rax, %rbx
leaq 0x10(%rsp), %rdi
callq 0x5618
testq %rbx, %rbx
je 0x15381
leaq 0x159fc(%rip), %rdi     # 0x2ad76
xorl %eax, %eax
callq 0x5040
addq $0x30, %rsp
popq %rbx
popq %r14
popq %r15
retq
jmp 0x15393
jmp 0x15393
jmp 0x153a2
jmp 0x153a2
movq %rax, %rbx
leaq 0x10(%rsp), %rdi
callq 0x5618
jmp 0x153a5
movq %rax, %rbx
movq %rbx, %rdi
callq 0x5570
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/HybridCache.cc
// Function: HybridCache::getEntry(unsigned long)
CacheEntry*
HybridCache::getEntry(uint64_t block_addr)
{
//	uint64_t block_addr =  bitRemove(addr , 0 , m_start_index+1);

	map<uint64_t,HybridLocation>::iterator p = m_tag_index.find(block_addr);
	
	if (p != m_tag_index.end()){
	
		int id_set = addressToCacheSet(block_addr);
		HybridLocation loc = p->second;
		if(loc.m_inNVM)
			return m_tableNVM[id_set][loc.m_way];
		else 
			return m_tableSRAM[id_set][loc.m_way];	
	

	}
	else{
		return NULL;
	}
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq %rsp, %rax
movq %rsi, (%rax)
addq $0x38, %rdi
movq %rax, %rsi
callq 0x1817e
movq %rax, %r14
leaq 0x40(%rbx), %rax
cmpq %rax, %r14
je 0x15407
movq (%rsp), %rsi
movq %rbx, %rdi
callq 0x15f56
movslq 0x28(%r14), %rcx
cltq
leaq 0x20(%rbx), %rdx
addq $0x8, %rbx
testb $0x1, 0x2c(%r14)
cmoveq %rdx, %rbx
movq (%rbx), %rdx
imulq $0x18, %rax, %rax
movq (%rdx,%rax), %rax
movq (%rax,%rcx,8), %rax
jmp 0x15409
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/HybridCache.cc
// Function: HybridCache::addressToCacheSet(unsigned long)
int 
HybridCache::addressToCacheSet(uint64_t address) 
{
	uint64_t a = address;
	a = bitRemove(a , 0, m_start_index);
	a = bitRemove(a , m_end_index,64);
	
	a = a >> (m_start_index+1);
	assert(a < (unsigned int)m_nb_set);
	
	return (int)a;
}

// Assembly:
pushq %rbx
movq %rdi, %rbx
movl 0x94(%rdi), %edx
movq %rsi, %rdi
xorl %esi, %esi
callq 0x24f70
movl 0x98(%rbx), %esi
pushq $0x40
popq %rdx
movq %rax, %rdi
callq 0x24f70
movb 0x94(%rbx), %cl
incb %cl
shrq %cl, %rax
movl 0xac(%rbx), %ecx
cmpq %rcx, %rax
jae 0x15f93
popq %rbx
retq
leaq 0x14165(%rip), %rdi     # 0x2a0ff
leaq 0x14790(%rip), %rsi     # 0x2a731
leaq 0x14b5f(%rip), %rcx     # 0x2ab07
movl $0x29b, %edx            # imm = 0x29B
callq 0x51e0
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/HybridCache.cc
// Function: HybridCache::signalWB(Access, bool)
void
HybridCache::signalWB(Access wb_request, bool isKept)
{
	CacheEntry* entry = getEntry(wb_request.m_address);
	if(entry != NULL)
	{
		entete_debug();
		DPRINTF(DebugCache , "Invalidation of the block [%#lx]\n" , entry->address);
		m_system->signalWB(wb_request , isKept);		
	}
	
}

// Assembly:
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x60, %rsp
movl %esi, %ebx
movq %rdi, %r14
movq 0x90(%rsp), %rsi
callq 0x153ae
testq %rax, %rax
je 0x16072
movq %rax, %r15
movq %r14, %rdi
callq 0x1529c
leaq 0x14861(%rip), %rsi     # 0x2a84d
leaq 0x40(%rsp), %r12
leaq 0x3f(%rsp), %rdx
movq %r12, %rdi
callq 0x5140
leaq 0x27f4b(%rip), %rdi     # 0x3df50
addq $0x8, %rdi
movq %r12, %rsi
callq 0x138f8
movq %rax, %r12
leaq 0x90(%rsp), %r13
leaq 0x40(%rsp), %rdi
callq 0x5618
testq %r12, %r12
je 0x1603d
movq 0x8(%r15), %rsi
leaq 0x14afe(%rip), %rdi     # 0x2ab34
xorl %eax, %eax
callq 0x5040
movq 0xb8(%r14), %rdi
movq 0x30(%r13), %rax
movq %rax, 0x30(%rsp)
movups (%r13), %xmm0
movups 0x10(%r13), %xmm1
movups 0x20(%r13), %xmm2
movups %xmm2, 0x20(%rsp)
movups %xmm1, 0x10(%rsp)
movups %xmm0, (%rsp)
movzbl %bl, %esi
callq 0x19552
addq $0x60, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
retq
movq %rax, %rbx
leaq 0x40(%rsp), %rdi
callq 0x5618
movq %rbx, %rdi
callq 0x5570
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/HybridCache.cc
// Function: HybridCache::deallocate(CacheEntry*)
void 
HybridCache::deallocate(CacheEntry* destination_entry)
{
	uint64_t addr = destination_entry->address;
	updateStatsDeallocate(destination_entry);

	map<uint64_t,HybridLocation>::iterator it = m_tag_index.find(addr);	
	if(it != m_tag_index.end()){
		m_tag_index.erase(it);	
	}	

	destination_entry->initEntry();
	
	
}

// Assembly:
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r15
movq 0x8(%rsi), %rax
movq %rsp, %r12
movq %rax, (%r12)
callq 0x14fd8
leaq 0x38(%r15), %r14
movq %r14, %rdi
movq %r12, %rsi
callq 0x1817e
addq $0x40, %r15
cmpq %r15, %rax
je 0x160d7
movq %r14, %rdi
movq %rax, %rsi
callq 0x181d4
movq %rbx, %rdi
callq 0x17778
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/HybridCache.cc
// Function: HybridCache::allocate(unsigned long, int, int, bool, unsigned long, bool)
void 
HybridCache::allocate(uint64_t address , int id_set , int id_assoc, bool inNVM, uint64_t pc, bool isPrefetch)
{

	uint64_t block_addr = bitRemove(address , 0 , m_start_index+1);
	
	if(inNVM){
	 	assert(!m_tableNVM[id_set][id_assoc]->isValid);

		m_tableNVM[id_set][id_assoc]->isValid = true;	
		m_tableNVM[id_set][id_assoc]->address = block_addr;
		m_tableNVM[id_set][id_assoc]->policyInfo = 0;
		m_tableNVM[id_set][id_assoc]->m_pc = pc;
		m_tableNVM[id_set][id_assoc]->isPrefetch = isPrefetch;
	}
	else
	{
	 	assert(!m_tableSRAM[id_set][id_assoc]->isValid);

		m_tableSRAM[id_set][id_assoc]->isValid = true;	
		m_tableSRAM[id_set][id_assoc]->address = block_addr;
		m_tableSRAM[id_set][id_assoc]->policyInfo = 0;		
		m_tableSRAM[id_set][id_assoc]->m_pc = pc;		
		m_tableSRAM[id_set][id_assoc]->isPrefetch = isPrefetch;
	}
	
	if(!m_isWarmup)
		stats_nbFetchedLines++;	
		
	HybridLocation loc(id_assoc, inNVM);
	m_tag_index.insert(pair<uint64_t , HybridLocation>(block_addr , loc));
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x10, %rsp
movq %r9, %r15
movl %r8d, %r14d
movl %ecx, %ebp
movl %edx, %r12d
movq %rdi, %rbx
movl 0x94(%rdi), %edx
incl %edx
movq %rsi, %rdi
xorl %esi, %esi
callq 0x24f70
movslq %r12d, %rdx
movslq %ebp, %rcx
testl %r14d, %r14d
je 0x16157
movq 0x8(%rbx), %rsi
imulq $0x18, %rdx, %rdx
movq (%rsi,%rdx), %rdx
movq (%rdx,%rcx,8), %rcx
cmpb $0x1, (%rcx)
jne 0x1616c
leaq 0x148ac(%rip), %rdi     # 0x2a9eb
leaq 0x145eb(%rip), %rsi     # 0x2a731
leaq 0x148c5(%rip), %rcx     # 0x2aa12
movl $0x23d, %edx            # imm = 0x23D
callq 0x51e0
movq 0x20(%rbx), %rsi
imulq $0x18, %rdx, %rdx
movq (%rsi,%rdx), %rdx
movq (%rdx,%rcx,8), %rcx
cmpb $0x1, (%rcx)
je 0x161c5
movb 0x40(%rsp), %dl
movb $0x1, (%rcx)
movq %rax, 0x8(%rcx)
andl $0x0, 0x38(%rcx)
movq %r15, 0x10(%rcx)
movb %dl, 0x14b(%rcx)
cmpb $0x0, 0x91(%rbx)
jne 0x16195
incq 0x1a0(%rbx)
addq $0x38, %rbx
movq %rsp, %rsi
movq %rax, (%rsi)
movzbl %r14b, %eax
shlq $0x20, %rax
movl %ebp, %ecx
orq %rax, %rcx
movq %rcx, 0x8(%rsi)
movq %rbx, %rdi
callq 0x18588
addq $0x10, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
leaq 0x1488b(%rip), %rdi     # 0x2aa57
leaq 0x1455e(%rip), %rsi     # 0x2a731
leaq 0x14838(%rip), %rcx     # 0x2aa12
movl $0x247, %edx            # imm = 0x247
callq 0x51e0
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/HybridCache.cc
// Function: HybridCache::deallocate(unsigned long)
void
HybridCache::deallocate(uint64_t block_addr)
{
	entete_debug();
	DPRINTF(DebugCache , "DEALLOCATE %#lx\n", block_addr);
	map<uint64_t,HybridLocation>::iterator it = m_tag_index.find(block_addr);	
	
	if(it != m_tag_index.end()){

		int id_set = blockAddressToCacheSet(block_addr);

		HybridLocation loc = it->second;
		CacheEntry* current = NULL; 

		if(loc.m_inNVM)
			current = m_tableNVM[id_set][loc.m_way]; 		
		else
			current = m_tableSRAM[id_set][loc.m_way]; 		

		updateStatsDeallocate(current);
		current->initEntry();
				
		m_tag_index.erase(it);	

	}
}

// Assembly:
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x38, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movq %rsi, 0x10(%rsp)
callq 0x1529c
leaq 0x145b7(%rip), %rsi     # 0x2a84d
leaq 0x18(%rsp), %r15
leaq 0xf(%rsp), %rdx
movq %r15, %rdi
callq 0x5140
leaq 0x27ca1(%rip), %rdi     # 0x3df50
addq $0x8, %rdi
movq %r15, %rsi
callq 0x138f8
movq %rax, %r15
leaq 0x18(%rsp), %rdi
callq 0x5618
testq %r15, %r15
je 0x162de
leaq 0x14706(%rip), %rdi     # 0x2a9da
movq %r14, %rsi
xorl %eax, %eax
callq 0x5040
leaq 0x38(%rbx), %r14
leaq 0x10(%rsp), %rsi
movq %r14, %rdi
callq 0x1817e
movq %rax, %r15
leaq 0x40(%rbx), %rax
cmpq %rax, %r15
je 0x1634c
movq 0x10(%rsp), %rsi
movq %rbx, %rdi
callq 0x1636e
movslq 0x28(%r15), %rcx
cltq
leaq 0x20(%rbx), %rdx
leaq 0x8(%rbx), %rsi
testb $0x1, 0x2c(%r15)
cmovneq %rsi, %rdx
movq (%rdx), %rdx
imulq $0x18, %rax, %rax
movq (%rdx,%rax), %rax
movq (%rax,%rcx,8), %r12
movq %rbx, %rdi
movq %r12, %rsi
callq 0x14fd8
movq %r12, %rdi
callq 0x17778
movq %r14, %rdi
movq %r15, %rsi
callq 0x181d4
addq $0x38, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq
movq %rax, %rbx
leaq 0x18(%rsp), %rdi
callq 0x5618
movq %rbx, %rdi
callq 0x5570
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/HybridCache.cc
// Function: HybridCache::blockAddressToCacheSet(unsigned long)
int 
HybridCache::blockAddressToCacheSet(uint64_t block_addr) 
{
	uint64_t a =block_addr;
	a = bitRemove(a , m_end_index,64);
	
	a = a >> (m_start_index+1);
	assert(a < (unsigned int)m_nb_set);
	
	return (int)a;
}

// Assembly:
pushq %rbx
movq %rsi, %rax
movq %rdi, %rbx
movl 0x98(%rdi), %esi
pushq $0x40
popq %rdx
movq %rax, %rdi
callq 0x24f70
movb 0x94(%rbx), %cl
incb %cl
shrq %cl, %rax
movl 0xac(%rbx), %ecx
cmpq %rcx, %rax
jae 0x1639e
popq %rbx
retq
leaq 0x13d5a(%rip), %rdi     # 0x2a0ff
leaq 0x14385(%rip), %rsi     # 0x2a731
leaq 0x1480b(%rip), %rcx     # 0x2abbe
movl $0x2e7, %edx            # imm = 0x2E7
callq 0x51e0
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/HybridCache.cc
// Function: HybridCache::printConfig(std::ostream&)
void
HybridCache::printConfig(std::ostream& out) 
{		
	string entete = "Cache";
	if(m_ID != -1){
		entete+="L1";
		if(m_isInstructionCache)
		 	entete += "I";
		else
			entete += "D";
	}
	else
		entete+= "LLC";

	out << entete << ":Size\t" << m_cache_size << endl;
	out << entete << ":SRAMways\t" << m_nbSRAMways << endl;
	out << entete << ":NVMways\t" << m_nbNVMways << endl;
	out << entete << ":Blocksize\t" << m_blocksize << endl;
	out << entete << ":Sets    \t" << m_nb_set << endl;
	out << entete << ":Predictor\t" << m_policy << endl;
	m_predictor->printConfig(out,entete);
	out << "************************" << endl;
}

// Assembly:
pushq %r14
pushq %rbx
subq $0x48, %rsp
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x136ae(%rip), %rsi     # 0x2a852
leaq 0x8(%rsp), %rdi
leaq 0x7(%rsp), %rdx
callq 0x5140
cmpl $-0x1, (%r14)
je 0x171e3
leaq 0x14eb7(%rip), %rsi     # 0x2c077
leaq 0x8(%rsp), %rdi
callq 0x55b0
leaq 0x13a1f(%rip), %rax     # 0x2abf0
leaq 0x128a0(%rip), %rsi     # 0x29a78
cmpb $0x0, 0x4(%r14)
cmovneq %rax, %rsi
jmp 0x171ea
leaq 0x14ede(%rip), %rsi     # 0x2c0c8
leaq 0x8(%rsp), %rdi
callq 0x55b0
leaq 0x8(%rsp), %rsi
movq %rbx, %rdi
callq 0x5290
leaq 0x139ea(%rip), %rsi     # 0x2abf2
movq %rax, %rdi
callq 0x52c0
movl 0x9c(%r14), %esi
movq %rax, %rdi
callq 0x5560
movq %rax, %rdi
callq 0x5190
leaq 0x8(%rsp), %rsi
movq %rbx, %rdi
callq 0x5290
leaq 0x139be(%rip), %rsi     # 0x2abf9
movq %rax, %rdi
callq 0x52c0
movl 0xa8(%r14), %esi
movq %rax, %rdi
callq 0x5560
movq %rax, %rdi
callq 0x5190
leaq 0x8(%rsp), %rsi
movq %rbx, %rdi
callq 0x5290
leaq 0x13996(%rip), %rsi     # 0x2ac04
movq %rax, %rdi
callq 0x52c0
movl 0xa4(%r14), %esi
movq %rax, %rdi
callq 0x5560
movq %rax, %rdi
callq 0x5190
leaq 0x8(%rsp), %rsi
movq %rbx, %rdi
callq 0x5290
leaq 0x1396d(%rip), %rsi     # 0x2ac0e
movq %rax, %rdi
callq 0x52c0
movl 0xb0(%r14), %esi
movq %rax, %rdi
callq 0x5560
movq %rax, %rdi
callq 0x5190
leaq 0x8(%rsp), %rsi
movq %rbx, %rdi
callq 0x5290
leaq 0x13946(%rip), %rsi     # 0x2ac1a
movq %rax, %rdi
callq 0x52c0
movl 0xac(%r14), %esi
movq %rax, %rdi
callq 0x5560
movq %rax, %rdi
callq 0x5190
leaq 0x8(%rsp), %rsi
movq %rbx, %rdi
callq 0x5290
leaq 0x1391e(%rip), %rsi     # 0x2ac25
movq %rax, %rdi
callq 0x52c0
leaq 0x70(%r14), %rsi
movq %rax, %rdi
callq 0x5290
movq %rax, %rdi
callq 0x5190
movq 0x68(%r14), %r14
leaq 0x28(%rsp), %rdi
leaq 0x8(%rsp), %rsi
callq 0x5410
movq (%r14), %rax
leaq 0x28(%rsp), %rdx
movq %r14, %rdi
movq %rbx, %rsi
callq *0x30(%rax)
leaq 0x28(%rsp), %rdi
callq 0x5618
leaq 0x13bd5(%rip), %rsi     # 0x2af2d
movq %rbx, %rdi
callq 0x52c0
movq %rax, %rdi
callq 0x5190
leaq 0x8(%rsp), %rdi
callq 0x5618
addq $0x48, %rsp
popq %rbx
popq %r14
retq
movq %rax, %rbx
leaq 0x28(%rsp), %rdi
callq 0x5618
jmp 0x1738c
movq %rax, %rbx
leaq 0x8(%rsp), %rdi
callq 0x5618
movq %rbx, %rdi
callq 0x5570
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Cache.hh
// Function: CacheEntry::~CacheEntry()
CacheEntry() { 
			isNVM = false;
			isLearning_policy = false;
			isLearning_weight = false;
			isLearning = false;
			initEntry();
		}

// Assembly:
pushq %rbx
movq %rdi, %rbx
addq $0x150, %rdi            # imm = 0x150
callq 0xa4a8
leaq 0x100(%rbx), %rdi
callq 0xa49a
leaq 0xe8(%rbx), %rdi
callq 0xea6a
leaq 0xd0(%rbx), %rdi
callq 0x17a3e
leaq 0xa8(%rbx), %rdi
callq 0xe9b4
leaq 0x90(%rbx), %rdi
callq 0xa49a
leaq 0x78(%rbx), %rdi
callq 0xa49a
leaq 0x60(%rbx), %rdi
callq 0xa49a
addq $0x48, %rbx
movq %rbx, %rdi
popq %rbx
jmp 0xa49a
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/InstructionPredictor.cc
// Function: InstructionPredictor::updatePolicy(unsigned long, unsigned long, bool, Access, bool)
void
InstructionPredictor::updatePolicy(uint64_t set, uint64_t index, bool inNVM, Access element, bool isWBrequest = false)
{
	//DPRINTF("InstructionPredictor::updatePolicy\n");
	
	CacheEntry* current;

	if(inNVM){
		current = m_tableNVM[set][index];
		m_replacementPolicyNVM_ptr->updatePolicy(set, index , element);
	}		
	else{
		current = m_tableSRAM[set][index];
		m_replacementPolicySRAM_ptr->updatePolicy(set, index , element);
	}
		
	current->policyInfo = m_cpt;
	if(element.isWrite()){
		current->cost_value+= WRITE_VALUE;
	}
	else{ 
		current->cost_value += READ_VALUE;	
	} 	
	Predictor::updatePolicy(set, index, inNVM, element , isWBrequest);

	m_cpt++;
	//DPRINTF("InstructionPredictor:: End updatePolicy\n");
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x38, %rsp
movl %r8d, %ebx
movl %ecx, %ebp
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %r14
movl %ecx, %eax
xorb $0x1, %cl
movzbl %cl, %ecx
movq 0x8(%rdi,%rax,8), %rax
movq (%rax), %rax
imulq $0x18, %rsi, %rdx
movq (%rax,%rdx), %rax
movq (%rax,%r15,8), %r13
movq 0x60(%rdi,%rcx,8), %rdi
movq (%rdi), %rax
movq 0xa0(%rsp), %rcx
movq %rcx, 0x30(%rsp)
movaps 0x70(%rsp), %xmm0
movaps 0x80(%rsp), %xmm1
movaps 0x90(%rsp), %xmm2
movups %xmm2, 0x20(%rsp)
movups %xmm1, 0x10(%rsp)
movups %xmm0, (%rsp)
movq %r15, %rdx
callq *0x10(%rax)
movl 0x270(%r14), %eax
movl %eax, 0x38(%r13)
movl 0x8c(%rsp), %edx
xorl %eax, %eax
cmpl $0x3, %edx
sete %cl
cmpl $0x6, %edx
je 0x18979
movb %cl, %al
leaq 0x12446(%rip), %rcx     # 0x2adb8
movsd (%rcx,%rax,8), %xmm0
jmp 0x18981
movsd 0x12447(%rip), %xmm0    # 0x2adc8
addsd 0x130(%r13), %xmm0
movsd %xmm0, 0x130(%r13)
movq 0xa0(%rsp), %rax
movq %rax, 0x30(%rsp)
movaps 0x70(%rsp), %xmm0
movaps 0x80(%rsp), %xmm1
movaps 0x90(%rsp), %xmm2
movups %xmm2, 0x20(%rsp)
movups %xmm1, 0x10(%rsp)
movups %xmm0, (%rsp)
movq %r14, %rdi
movq %r12, %rsi
movq %r15, %rdx
movl %ebp, %ecx
movl %ebx, %r8d
callq 0x1fe44
incq 0x270(%r14)
addq $0x38, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/InstructionPredictor.cc
// Function: InstructionPredictor::insertionPolicy(unsigned long, unsigned long, bool, Access)
void InstructionPredictor::insertionPolicy(uint64_t set, uint64_t index, bool inNVM, Access element)
{
	//DPRINTF("InstructionPredictor::insertionPolicy\n");
	
	CacheEntry* current;
	if(inNVM){
		current = m_tableNVM[set][index];
	}		
	else{
		current = m_tableSRAM[set][index];
	}
	
	current->policyInfo = m_cpt;

	if(element.isWrite())
		current->cost_value = WRITE_VALUE;
	else
		current->cost_value = READ_VALUE;
	
	Predictor::insertionPolicy(set , index , inNVM , element);
	m_cpt++;
}

// Assembly:
pushq %rbx
subq $0x40, %rsp
movq %rdi, %rbx
movl %ecx, %eax
movq 0x8(%rdi,%rax,8), %rax
movq (%rax), %rax
imulq $0x18, %rsi, %rdi
movq (%rax,%rdi), %rax
movq (%rax,%rdx,8), %rax
movl 0x270(%rbx), %edi
movl %edi, 0x38(%rax)
movl 0x6c(%rsp), %r9d
xorl %edi, %edi
cmpl $0x3, %r9d
sete %r8b
cmpl $0x6, %r9d
je 0x18a3a
movb %r8b, %dil
leaq 0x12386(%rip), %r8      # 0x2adb8
movsd (%r8,%rdi,8), %xmm0
jmp 0x18a42
movsd 0x12386(%rip), %xmm0    # 0x2adc8
movsd %xmm0, 0x130(%rax)
movq 0x80(%rsp), %rax
movq %rax, 0x30(%rsp)
movaps 0x50(%rsp), %xmm0
movaps 0x60(%rsp), %xmm1
movaps 0x70(%rsp), %xmm2
movups %xmm2, 0x20(%rsp)
movups %xmm1, 0x10(%rsp)
movups %xmm0, (%rsp)
movq %rbx, %rdi
callq 0x1f3a2
incq 0x270(%rbx)
addq $0x40, %rsp
popq %rbx
retq
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/InstructionPredictor.cc
// Function: InstructionPredictor::printConfig(std::ostream&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
void
InstructionPredictor::printConfig(std::ostream& out, string entete){
	out << entete << ":InstructionPredictor" << std::endl;
	out << entete << ":READ_VALUE\t" << READ_VALUE << std::endl;		
	out << entete << ":WRITE_VALUE\t" << WRITE_VALUE << std::endl;		
	out << entete << ":CostThreshold\t" << simu_parameters.cost_threshold << std::endl;		
	out << entete << ":PCThreshold\t" << PC_THRESHOLD << endl;
	Predictor::printConfig(out, entete);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x20, %rsp
movq %rdx, %r15
movq %rsi, %rbx
movq %rdi, %r14
movq %rsi, %rdi
movq %rdx, %rsi
callq 0x5290
leaq 0x1231f(%rip), %rsi     # 0x2add0
movq %rax, %rdi
callq 0x52c0
movq %rax, %rdi
callq 0x5190
movq %rbx, %rdi
movq %r15, %rsi
callq 0x5290
leaq 0x12313(%rip), %rsi     # 0x2ade6
movq %rax, %rdi
callq 0x52c0
pushq $-0x1
popq %rsi
movq %rax, %rdi
callq 0x5560
movq %rax, %rdi
callq 0x5190
movq %rbx, %rdi
movq %r15, %rsi
callq 0x5290
leaq 0x122f3(%rip), %rsi     # 0x2adf3
movq %rax, %rdi
callq 0x52c0
pushq $0x3
popq %rbp
movq %rax, %rdi
movl %ebp, %esi
callq 0x5560
movq %rax, %rdi
callq 0x5190
movq %rbx, %rdi
movq %r15, %rsi
callq 0x5290
leaq 0x122d2(%rip), %rsi     # 0x2ae01
movq %rax, %rdi
callq 0x52c0
leaq 0x25412(%rip), %rcx     # 0x3df50
movl 0xbc(%rcx), %esi
movq %rax, %rdi
callq 0x5560
movq %rax, %rdi
callq 0x5190
movq %rbx, %rdi
movq %r15, %rsi
callq 0x5290
leaq 0x122ab(%rip), %rsi     # 0x2ae11
movq %rax, %rdi
callq 0x52c0
movq %rax, %rdi
movl %ebp, %esi
callq 0x5560
movq %rax, %rdi
callq 0x5190
movq %rsp, %r12
movq %r12, %rdi
movq %r15, %rsi
callq 0x5410
movq %r14, %rdi
movq %rbx, %rsi
movq %r12, %rdx
callq 0x20228
movq %rsp, %rdi
callq 0x5618
addq $0x20, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
movq %rsp, %rdi
callq 0x5618
movq %rbx, %rdi
callq 0x5570
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/InstructionPredictor.cc
// Function: InstructionPredictor::printStats(std::ostream&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
void 
InstructionPredictor::printStats(std::ostream& out, string entete)
{	
	int totalWrite = 0;
	for(auto p : stats_PCwrites)
	{
		pair<int,int> current = p.second;
		totalWrite += current.first;
	}
	
	out << entete << ":InstructionPredictor Parameters:" << endl;
	out << entete << ":Total Write\t" << totalWrite << endl;
	
	/*
	ofstream output_file;
	output_file.open(OUTPUT_PREDICTOR_FILE , std::ofstream::app);
	if(totalWrite > 0){
		output_file << "Write Intensity Per Instruction "<< endl;
		for(auto p : stats_PCwrites)
		{
			pair<int,int> current = p.second;
			output_file << p.first << "\t" << current.first << "\t" << current.second << endl;
		}
	}
	output_file.close();
	*/
	Predictor::printStats(out,entete);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x20, %rsp
movq %rdx, %r15
movq %rsi, %rbx
movq %rdi, %r14
movq 0x2c8(%rdi), %rax
leaq 0x2b8(%rdi), %r12
xorl %ebp, %ebp
cmpq %r12, %rax
je 0x18bfb
addl 0x28(%rax), %ebp
movq %rax, %rdi
callq 0x5210
jmp 0x18be9
movq %rbx, %rdi
movq %r15, %rsi
callq 0x5290
leaq 0x12212(%rip), %rsi     # 0x2ae1f
movq %rax, %rdi
callq 0x52c0
movq %rax, %rdi
callq 0x5190
movq %rbx, %rdi
movq %r15, %rsi
callq 0x5290
leaq 0x12212(%rip), %rsi     # 0x2ae41
movq %rax, %rdi
callq 0x52c0
movq %rax, %rdi
movl %ebp, %esi
callq 0x5560
movq %rax, %rdi
callq 0x5190
movq %rsp, %r12
movq %r12, %rdi
movq %r15, %rsi
callq 0x5410
movq %r14, %rdi
movq %rbx, %rsi
movq %r12, %rdx
callq 0x20390
movq %rsp, %rdi
callq 0x5618
addq $0x20, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
movq %rsp, %rdi
callq 0x5618
movq %rbx, %rdi
callq 0x5570
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/InstructionPredictor.cc
// Function: InstructionPredictor::evictPolicy(int, bool)
int
InstructionPredictor::evictPolicy(int set, bool inNVM)
{	
	//DPRINTF("InstructionPredictor::evictPolicy set %d\n" , set);
	int assoc_victim = -1;
	assert(m_replacementPolicyNVM_ptr != NULL);
	assert(m_replacementPolicySRAM_ptr != NULL);
	

	if(inNVM)
		assoc_victim = m_replacementPolicyNVM_ptr->evictPolicy(set);
	else
		assoc_victim = m_replacementPolicySRAM_ptr->evictPolicy(set);


	/* Update the status of the instruction */ 
	CacheEntry* current;
	if(inNVM)
		current = m_tableNVM[set][assoc_victim];
	else
		current = m_tableSRAM[set][assoc_victim];

	if(current->isValid){
		//DPRINTF("InstructionPredictor::evictPolicy is Valid\n");
		if( current->cost_value >= simu_parameters.cost_threshold)
		{
			pc_counters[current->m_pc]++;
			if(pc_counters[current->m_pc] == 3)
				pc_counters[current->m_pc] = 3;
		
		}
		else
		{
			pc_counters[current->m_pc]--;
			if(pc_counters[current->m_pc] < 0)
				pc_counters[current->m_pc] = 0;
		}	
	}
	
	evictRecording(set , assoc_victim , inNVM);
	
	return assoc_victim;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq 0x60(%rdi), %rax
testq %rax, %rax
je 0x18daa
movq %rdi, %r14
movq 0x68(%rdi), %rdi
testq %rdi, %rdi
je 0x18dc9
movl %esi, %ebx
movslq %esi, %r12
testb %dl, %dl
cmovneq %rax, %rdi
movzbl %dl, %r15d
movq (%rdi), %rax
movl %r12d, %esi
callq *0x20(%rax)
movl %eax, %ebp
movq 0x8(%r14,%r15,8), %rax
movq (%rax), %rax
imulq $0x18, %r12, %rcx
movslq %ebp, %rdx
movq (%rax,%rcx), %rax
movq (%rax,%rdx,8), %r12
cmpb $0x1, (%r12)
jne 0x18d8a
movsd 0x130(%r12), %xmm0
movsd %xmm0, 0x8(%rsp)
leaq 0x25244(%rip), %rax     # 0x3df50
cvtsi2sdl 0xbc(%rax), %xmm0
movsd %xmm0, 0x10(%rsp)
leaq 0x280(%r14), %r13
addq $0x10, %r12
movq %r13, %rdi
movq %r12, %rsi
callq 0x18e02
movsd 0x8(%rsp), %xmm0
ucomisd 0x10(%rsp), %xmm0
movl (%rax), %ecx
jae 0x18d5e
decl %ecx
movl %ecx, (%rax)
movq %r13, %rdi
movq %r12, %rsi
callq 0x18e02
cmpl $0x0, (%rax)
jns 0x18d8a
movl $0x0, 0x8(%rsp)
jmp 0x18d79
incl %ecx
movl %ecx, (%rax)
movq %r13, %rdi
movq %r12, %rsi
callq 0x18e02
cmpl $0x3, (%rax)
jne 0x18d8a
pushq $0x3
popq %rax
movl %eax, 0x8(%rsp)
movq %r13, %rdi
movq %r12, %rsi
callq 0x18e02
movl 0x8(%rsp), %ecx
movl %ecx, (%rax)
movq %r14, %rdi
movl %ebx, %esi
movl %ebp, %edx
movl %r15d, %ecx
callq 0x1f248
movl %ebp, %eax
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0x103e0(%rip), %rdi     # 0x29191
leaq 0x12097(%rip), %rsi     # 0x2ae4f
leaq 0x120ac(%rip), %rcx     # 0x2ae6b
movl $0x90, %edx
callq 0x51e0
leaq 0x1041a(%rip), %rdi     # 0x291ea
leaq 0x12078(%rip), %rsi     # 0x2ae4f
leaq 0x1208d(%rip), %rcx     # 0x2ae6b
movl $0x91, %edx
callq 0x51e0
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Level.cc
// Function: Level::Level(int, std::vector<ConfigCache, std::allocator<ConfigCache>>, Hierarchy*)
Level::Level(int id_core, std::vector<ConfigCache> configs, Hierarchy* system) : m_IDcore(id_core), m_system(system){
	assert(configs.size()  >  0);
	
	m_isUnified = true;
	m_printStats = configs[0].m_printStats;
	
	m_dcache = new HybridCache(m_IDcore, false, configs[0].m_size, configs[0].m_assoc , \
					configs[0].m_blocksize, configs[0].m_nbNVMways, configs[0].m_policy, this);
	
	m_dcache->setPrintState(m_printStats);
	m_icache = NULL;	
	if(configs.size() == 2){
		m_isUnified = false;
		m_icache = new HybridCache(m_IDcore, true, configs[1].m_size, configs[1].m_assoc , \
					configs[1].m_blocksize, configs[1].m_nbNVMways, configs[1].m_policy, this);
		m_icache->setPrintState(m_printStats);
	}
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x58, %rsp
movl %esi, 0x10(%rdi)
movq %rcx, 0x18(%rdi)
movq (%rdx), %r12
cmpq %r12, 0x8(%rdx)
je 0x193d6
movq %rdx, %r15
movl %esi, %ebp
movq %rdi, %rbx
movb $0x1, 0x20(%rdi)
movb 0x34(%r12), %al
movb %al, 0x21(%rdi)
movl $0x230, %edi            # imm = 0x230
callq 0x52e0
movq %rax, %r14
movl (%r12), %r13d
movl 0x4(%r12), %eax
movl %eax, 0x4(%rsp)
movl 0x8(%r12), %eax
movl %eax, 0x14(%rsp)
movl 0x30(%r12), %eax
movq %rax, 0x8(%rsp)
addq $0x10, %r12
leaq 0x38(%rsp), %rdi
movq %r12, %rsi
callq 0x5410
subq $0x8, %rsp
movq %r14, %rdi
movl %ebp, %esi
xorl %edx, %edx
movl %r13d, %ecx
movl 0xc(%rsp), %r8d
movl 0x1c(%rsp), %r9d
pushq %rbx
leaq 0x48(%rsp), %rax
pushq %rax
pushq 0x20(%rsp)
callq 0x13f00
addq $0x20, %rsp
movq %r14, (%rbx)
leaq 0x38(%rsp), %rdi
callq 0x5618
movq (%rbx), %rax
movb 0x21(%rbx), %cl
movb %cl, 0x90(%rax)
andq $0x0, 0x8(%rbx)
movq (%r15), %r12
movq 0x8(%r15), %rax
subq %r12, %rax
cmpq $0x70, %rax
jne 0x193c7
movb $0x0, 0x20(%rbx)
movl $0x230, %edi            # imm = 0x230
callq 0x52e0
movq %rax, %r15
movl 0x10(%rbx), %r14d
movl 0x38(%r12), %ebp
movl 0x3c(%r12), %eax
movl %eax, 0x4(%rsp)
movl 0x40(%r12), %r13d
movl 0x68(%r12), %eax
movq %rax, 0x8(%rsp)
addq $0x48, %r12
leaq 0x18(%rsp), %rdi
movq %r12, %rsi
callq 0x5410
subq $0x8, %rsp
pushq $0x1
popq %rdx
movq %r15, %rdi
movl %r14d, %esi
movl %ebp, %ecx
movl 0xc(%rsp), %r8d
movl %r13d, %r9d
pushq %rbx
leaq 0x28(%rsp), %rax
pushq %rax
pushq 0x20(%rsp)
callq 0x13f00
addq $0x20, %rsp
movq %r15, 0x8(%rbx)
leaq 0x18(%rsp), %rdi
callq 0x5618
movq 0x8(%rbx), %rax
movb 0x21(%rbx), %cl
movb %cl, 0x90(%rax)
addq $0x58, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0x11adf(%rip), %rdi     # 0x2aebc
leaq 0x11aeb(%rip), %rsi     # 0x2aecf
leaq 0x11af1(%rip), %rcx     # 0x2aedc
pushq $0x16
popq %rdx
callq 0x51e0
movq %r15, %r14
movq %rax, %rbx
leaq 0x18(%rsp), %rdi
jmp 0x1940d
movq %r15, %r14
jmp 0x19414
movq %rax, %rbx
leaq 0x38(%rsp), %rdi
callq 0x5618
jmp 0x19417
movq %rax, %rbx
movq %r14, %rdi
callq 0x52a0
movq %rbx, %rdi
callq 0x5570
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Level.cc
// Function: Level::printResults(std::ostream&)
void
Level::printResults(std::ostream& out)
{
	out << "************************************************" << endl;
//	out << "Core n°" << m_IDcore << endl;
	if(m_isUnified)
		m_dcache->printResults(out);
	else
	{
//		out << "Data Cache " << endl;
		m_dcache->printResults(out);
		out << "******" << endl;
//		out << "Instruction Cache " << endl;
		m_icache->printResults(out);
	}
}

// Assembly:
pushq %rbp
pushq %r14
pushq %rbx
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x1192c(%rip), %rsi     # 0x2af15
movq %rbx, %rdi
callq 0x52c0
movq %rax, %rdi
callq 0x5190
movq (%r14), %rdi
movb 0x20(%r14), %bpl
movq %rbx, %rsi
callq 0x16838
testb %bpl, %bpl
je 0x19612
popq %rbx
popq %r14
popq %rbp
retq
leaq 0x11926(%rip), %rsi     # 0x2af3f
movq %rbx, %rdi
callq 0x52c0
movq %rax, %rdi
callq 0x5190
movq 0x8(%r14), %rdi
movq %rbx, %rsi
popq %rbx
popq %r14
popq %rbp
jmp 0x16838
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Level.cc
// Function: Level::printConfig(std::ostream&)
void
Level::printConfig(std::ostream& out)
{
	out << "************************************************" << endl;
//	out << "Core n°" << m_IDcore << endl;
	if(m_isUnified)
		m_dcache->printConfig(out);
	else
	{
//		out << "Data Cache " << endl;
		m_dcache->printConfig(out);
		out << "******" << endl;
//		out << "Instruction Cache " << endl;
		m_icache->printConfig(out);
	}
}

// Assembly:
pushq %rbp
pushq %r14
pushq %rbx
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x118ca(%rip), %rsi     # 0x2af15
movq %rbx, %rdi
callq 0x52c0
movq %rax, %rdi
callq 0x5190
movq (%r14), %rdi
movb 0x20(%r14), %bpl
movq %rbx, %rsi
callq 0x17190
testb %bpl, %bpl
je 0x19674
popq %rbx
popq %r14
popq %rbp
retq
leaq 0x118c4(%rip), %rsi     # 0x2af3f
movq %rbx, %rdi
callq 0x52c0
movq %rax, %rdi
callq 0x5190
movq 0x8(%r14), %rdi
movq %rbx, %rsi
popq %rbx
popq %r14
popq %rbp
jmp 0x17190
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/MemoryTrace.cc
// Function: CompressedTrace::readNext(Access&)
bool 
CompressedTrace::readNext(Access& element)
{
	assert(m_isOpen);	

	if(!gzread(m_compressedTrace, mybuffer_dummy, TRACE_BUFFER_SIZE))
		return false;
	

	readNext_addr = string(strtok(mybuffer_dummy, " "));

	
	if(readNext_addr[0] != '#' || readNext_addr[1] != '!')
	{
		cout << "Line passed - Wrong Format" << endl;
		return true;
	}
	readNext_addr.erase( readNext_addr.begin(), readNext_addr.begin()+2);
	
	element.m_address = hexToInt1(readNext_addr.c_str());
	readNext_operation = atoi(strtok(NULL, " ") );		
	element.m_size = atoi(strtok(NULL, " ")); 		
	element.m_idthread = atoi( strtok(NULL, " ") );
	element.m_pc = hexToInt1(strtok(NULL, " "));

	switch(readNext_operation){
		case 0 : element.m_type = MemCmd::INST_READ;break;
		case 1 : element.m_type = MemCmd::DATA_READ;break;
		case 2 : element.m_type = MemCmd::DATA_WRITE;break;
		default: assert(false && "operation not recognized \n");
	}

	return true;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
subq $0x30, %rsp
cmpb $0x0, 0x28(%rdi)
je 0x1985f
movq %rsi, %r14
movq 0x30(%rdi), %rdi
leaq 0x243b5(%rip), %rsi     # 0x3dad0
pushq $0x32
popq %rdx
callq 0x55a0
movl %eax, %ebx
testl %eax, %eax
je 0x1983c
leaq 0x2439c(%rip), %rdi     # 0x3dad0
leaq 0x10073(%rip), %rsi     # 0x297ae
callq 0x54a0
leaq 0x10(%rsp), %r15
leaq 0xf(%rsp), %rdx
movq %r15, %rdi
movq %rax, %rsi
callq 0x5140
leaq 0x2434c(%rip), %rdi     # 0x3daa8
movq %r15, %rsi
callq 0x53c0
movq %r15, %rdi
callq 0x5618
movq 0x24335(%rip), %rsi     # 0x3daa8
cmpb $0x23, (%rsi)
jne 0x19821
cmpb $0x21, 0x1(%rsi)
jne 0x19821
leaq 0x2(%rsi), %rdx
leaq 0x24317(%rip), %rdi     # 0x3daa8
callq 0x50c0
movq 0x2430b(%rip), %rdi     # 0x3daa8
callq 0x2500c
movq %rax, (%r14)
leaq 0x10002(%rip), %r15     # 0x297ae
xorl %edi, %edi
movq %r15, %rsi
callq 0x54a0
movq %rax, %rdi
callq 0x5490
movl %eax, 0x24340(%rip)     # 0x3db04
xorl %edi, %edi
movq %r15, %rsi
callq 0x54a0
movq %rax, %rdi
callq 0x5490
movl %eax, 0x8(%r14)
xorl %edi, %edi
movq %r15, %rsi
callq 0x54a0
movq %rax, %rdi
callq 0x5490
movl %eax, 0x20(%r14)
xorl %edi, %edi
movq %r15, %rsi
callq 0x54a0
movq %rax, %rdi
callq 0x2500c
movq %rax, 0x10(%r14)
movl 0x242f8(%rip), %eax     # 0x3db04
cmpl $0x2, %eax
je 0x19855
cmpl $0x1, %eax
je 0x1984b
testl %eax, %eax
jne 0x1987c
andl $0x0, 0x1c(%r14)
jmp 0x1983c
movq 0x237a8(%rip), %rdi     # 0x3cfd0
leaq 0x11764(%rip), %rsi     # 0x2af93
callq 0x52c0
movq %rax, %rdi
callq 0x5190
testl %ebx, %ebx
setne %al
addq $0x30, %rsp
popq %rbx
popq %r14
popq %r15
retq
movl $0x2, 0x1c(%r14)
jmp 0x1983c
movl $0x3, 0x1c(%r14)
jmp 0x1983c
leaq 0x116e0(%rip), %rdi     # 0x2af46
leaq 0x116e2(%rip), %rsi     # 0x2af4f
leaq 0x116ee(%rip), %rcx     # 0x2af62
pushq $0x33
popq %rdx
callq 0x51e0
leaq 0x1172b(%rip), %rdi     # 0x2afae
leaq 0x116c5(%rip), %rsi     # 0x2af4f
leaq 0x116d1(%rip), %rcx     # 0x2af62
pushq $0x4d
jmp 0x19876
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/MemoryTrace.cc
// Function: CompressedTrace::open()
bool
CompressedTrace::open()
{
	m_compressedTrace = gzopen(m_trace.c_str() , "rb8");
	if(!m_compressedTrace)
		cout << "The trace " << m_trace << " cannot be opened" << endl;
	else
		m_isOpen = true;

	return m_isOpen;
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq 0x8(%rdi), %rdi
leaq 0x1172d(%rip), %rsi     # 0x2afd5
callq 0x5450
movq %rax, 0x30(%rbx)
testq %rax, %rax
je 0x198be
movb $0x1, 0x28(%rbx)
movb $0x1, %al
jmp 0x198fa
leaq 0x8(%rbx), %r14
movq 0x23707(%rip), %rdi     # 0x3cfd0
leaq 0x11709(%rip), %rsi     # 0x2afd9
callq 0x52c0
movq %rax, %rdi
movq %r14, %rsi
callq 0x5290
leaq 0x116fd(%rip), %rsi     # 0x2afe4
movq %rax, %rdi
callq 0x52c0
movq %rax, %rdi
callq 0x5190
movb 0x28(%rbx), %al
andb $0x1, %al
addq $0x8, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/MemoryTrace.cc
// Function: TextTrace::open()
bool
TextTrace::open()
{
	m_textTrace.open(m_trace);
	if(!m_textTrace)
		cout << "The trace " << m_trace << " cannot be opened" << endl;
	else
		m_isOpen = true;


	return m_isOpen;
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
addq $0x30, %rdi
leaq 0x8(%rbx), %r14
pushq $0x8
popq %rdx
movq %r14, %rsi
callq 0x5270
movq 0x30(%rbx), %rax
movq -0x18(%rax), %rax
testb $0x5, 0x50(%rbx,%rax)
je 0x19c35
movq 0x233ce(%rip), %rdi     # 0x3cfd0
leaq 0x113d0(%rip), %rsi     # 0x2afd9
callq 0x52c0
movq %rax, %rdi
movq %r14, %rsi
callq 0x5290
leaq 0x113c4(%rip), %rsi     # 0x2afe4
movq %rax, %rdi
callq 0x52c0
movq %rax, %rdi
callq 0x5190
movb 0x28(%rbx), %al
jmp 0x19c3b
movb $0x1, 0x28(%rbx)
movb $0x1, %al
andb $0x1, %al
addq $0x8, %rsp
popq %rbx
popq %r14
retq
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/MemoryTrace.cc
// Function: initTrace(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
MemoryTrace* initTrace(std::string trace_name)
{
	std::vector<std::string> split_line;
	std::string ext = split(trace_name , '.').back();	
	if(ext.size() == 3 && ext == "txt")
		return new TextTrace(trace_name);
	else
		return new CompressedTrace(trace_name);		

}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
subq $0xb0, %rsp
movq %rdi, %r14
xorps %xmm0, %xmm0
movaps %xmm0, (%rsp)
andq $0x0, 0x10(%rsp)
leaq 0x50(%rsp), %rdi
movq %r14, %rsi
callq 0x5410
leaq 0x18(%rsp), %rdi
leaq 0x50(%rsp), %rsi
pushq $0x2e
popq %rdx
callq 0x24e58
movq 0x20(%rsp), %rsi
addq $-0x20, %rsi
leaq 0x30(%rsp), %rdi
callq 0x5410
leaq 0x18(%rsp), %rdi
callq 0x9ef6
leaq 0x50(%rsp), %rdi
callq 0x5618
cmpq $0x3, 0x38(%rsp)
jne 0x19cfb
leaq 0xfa3f(%rip), %rsi      # 0x296ff
leaq 0x30(%rsp), %rdi
callq 0x9f59
testb %al, %al
je 0x19cfb
movl $0x238, %edi            # imm = 0x238
callq 0x52e0
movq %rax, %rbx
leaq 0x90(%rsp), %r15
movq %r15, %rdi
movq %r14, %rsi
callq 0x5410
movq %rbx, %rdi
movq %r15, %rsi
callq 0x19db2
jmp 0x19d21
pushq $0x38
popq %rdi
callq 0x52e0
movq %rax, %rbx
leaq 0x70(%rsp), %r15
movq %r15, %rdi
movq %r14, %rsi
callq 0x5410
movq %rbx, %rdi
movq %r15, %rsi
callq 0x19e32
movq %r15, %rdi
callq 0x5618
leaq 0x30(%rsp), %rdi
callq 0x5618
movq %rsp, %rdi
callq 0x9ef6
movq %rbx, %rax
addq $0xb0, %rsp
popq %rbx
popq %r14
popq %r15
retq
movq %rax, %r14
leaq 0x90(%rsp), %rdi
jmp 0x19d62
jmp 0x19d69
movq %rax, %r14
leaq 0x70(%rsp), %rdi
callq 0x5618
jmp 0x19d6c
movq %rax, %r14
movq %rbx, %rdi
callq 0x52a0
jmp 0x19d79
movq %rax, %r14
leaq 0x30(%rsp), %rdi
jmp 0x19d97
movq %rax, %r14
leaq 0x18(%rsp), %rdi
callq 0x9ef6
jmp 0x19d92
movq %rax, %r14
leaq 0x50(%rsp), %rdi
callq 0x5618
movq %rsp, %rdi
callq 0x9ef6
movq %r14, %rdi
callq 0x5570
movq %rax, %r14
jmp 0x19d9c
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/PHC.cc
// Function: PHCPredictor::allocateInNVM(unsigned long, Access)
allocDecision
PHCPredictor::allocateInNVM(uint64_t set, Access element)
{
//	if(element.isInstFetch())
//		return ALLOCATE_IN_NVM;
	
	update_globalPChistory(element.m_pc);
	stats_nbMiss++;
	miss_counter++;
	if(miss_counter > 255)
		miss_counter = 255;
	
	// All the set is a learning/sampled set independantly of its way or SRAM/NVM alloc
	//bool isLearning = m_tableSRAM[set][0]->isLearning; 

	int sum_pred = 0;
	for(unsigned i = 0 ; i < m_features.size() ; i++)
	{
		int hash = m_features_hash[i](element.block_addr , element.m_pc);
		sum_pred += m_features[i]->getAllocationPrediction(hash, true);
	}
	if( abs(sum_pred) < simu_parameters.perceptron_allocation_threshold )
	{
		stats_prediction_preemptive++;
		if( element.isWrite() )
			return ALLOCATE_IN_SRAM;
		else 
			return ALLOCATE_IN_NVM;
	}
	else
	{
		stats_prediction_confident++;
		if( sum_pred < simu_parameters.perceptron_allocation_threshold )
			return ALLOCATE_IN_SRAM;
		else
			return ALLOCATE_IN_NVM;
	}

}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
leaq 0x40(%rsp), %r15
movq 0x10(%r15), %r14
movq %r14, %rsi
callq 0x1afde
incq 0x368(%rbx)
leaq 0x2327f(%rip), %rax     # 0x3e1a0
movl (%rax), %ecx
movl $0xfe, %edx
cmpl %edx, %ecx
cmovll %ecx, %edx
incl %edx
movl %edx, (%rax)
xorl %r13d, %r13d
movq 0x30(%r15), %r15
pushq $0x1
popq %rbp
xorl %eax, %eax
movl %eax, %r12d
movq 0x278(%rbx), %rax
subq 0x270(%rbx), %rax
sarq $0x3, %rax
cmpq %r12, %rax
jbe 0x1af86
movq 0x288(%rbx), %rax
movq %r15, %rdi
movq %r14, %rsi
callq *(%rax,%r12,8)
movq 0x270(%rbx), %rcx
movq (%rcx,%r12,8), %rdi
movl %eax, %esi
movl %ebp, %edx
callq 0x11126
addl %eax, %r13d
leal 0x1(%r12), %eax
jmp 0x1af3d
movl %r13d, %ecx
negl %ecx
cmovsl %r13d, %ecx
leaq 0x22fba(%rip), %rax     # 0x3df50
movl 0x1c0(%rax), %eax
cmpl %eax, %ecx
jge 0x1afbf
incq 0x3e0(%rbx)
leaq 0x40(%rsp), %rax
movl 0x1c(%rax), %eax
cmpl $0x3, %eax
setne %cl
cmpl $0x6, %eax
setne %al
andb %cl, %al
jmp 0x1afcc
incq 0x3d8(%rbx)
cmpl %eax, %r13d
setge %al
movzbl %al, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/PHC.cc
// Function: PHCPredictor::update_globalPChistory(unsigned long)
void
PHCPredictor::update_globalPChistory(uint64_t pc)
{	
	m_global_PChistory.push_front(pc);
	if( m_global_PChistory.size() == 11)
		m_global_PChistory.pop_back();
	
	if(!m_need_callee_file)
		return;
	
	if(m_callee_map.count(pc) != 0)
	{
		m_callee_PChistory.push_front(pc);
		if( m_callee_PChistory.size() == 11)
			m_callee_PChistory.pop_back();
	}
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq %rsp, %rax
movq %rsi, (%rax)
leaq 0x22b1e(%rip), %r14     # 0x3db10
movq %r14, %rdi
movq %rax, %rsi
callq 0x1c2ee
movq %r14, %rdi
callq 0x1c30c
cmpq $0xb, %rax
jne 0x1b017
leaq 0x22afe(%rip), %rdi     # 0x3db10
callq 0x1c31c
cmpb $0x1, 0x2e0(%rbx)
jne 0x1b063
addq $0x2e8, %rbx            # imm = 0x2E8
movq %rsp, %rsi
movq %rbx, %rdi
callq 0x18de8
testq %rax, %rax
je 0x1b063
leaq 0x22b22(%rip), %rbx     # 0x3db60
movq %rsp, %rsi
movq %rbx, %rdi
callq 0x1c2ee
movq %rbx, %rdi
callq 0x1c30c
cmpq $0xb, %rax
jne 0x1b063
leaq 0x22b02(%rip), %rdi     # 0x3db60
callq 0x1c31c
addq $0x8, %rsp
popq %rbx
popq %r14
retq
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/PHC.cc
// Function: PHCPredictor::updatePolicy(unsigned long, unsigned long, bool, Access, bool)
void
PHCPredictor::updatePolicy(uint64_t set, uint64_t index, bool inNVM, Access element, bool isWBrequest)
{
	update_globalPChistory(element.m_pc);
	
	stats_update++;
	
	CacheEntry *entry = get_entry(set , index , inNVM);
	entry->policyInfo = m_cpt++;


	RD_TYPE rd_type = classifyRD( set , index , inNVM );
	stats_access_class[rd_type][element.isWrite()]++;

	if(entry->isLearning)
	{
		entry->cost_value += m_costAccess[element.isWrite()][rd_type];
//		cout << "UpdatePolicy Learning Cache line 0x" << std::hex << element.block_addr
//			<< std::dec << " Cost Value " << entry->cost_value << endl;

	}

	stats_nbHits++;
	miss_counter--;
	if(miss_counter < 0)
		miss_counter = 0;

	Predictor::updatePolicy(set , index , inNVM , element , isWBrequest);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %r8d, %ebp
movl %ecx, %r15d
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r12
movq 0x50(%rsp), %rsi
callq 0x1afde
incq 0x3a8(%r12)
movl %r15d, %eax
movq 0x8(%r12,%rax,8), %rax
movq (%rax), %rax
imulq $0x18, %r14, %rcx
movq (%rax,%rcx), %rax
movq (%rax,%rbx,8), %r13
movq 0x2d8(%r12), %rax
leaq 0x1(%rax), %rcx
movq %rcx, 0x2d8(%r12)
movl %eax, 0x38(%r13)
movq %r12, %rdi
movl %r14d, %esi
movl %ebx, %edx
movl %r15d, %ecx
callq 0x1b18e
movl %eax, %eax
movq 0x430(%r12), %rdx
imulq $0x18, %rax, %rsi
movl 0x5c(%rsp), %ecx
cmpl $0x3, %ecx
sete %dil
cmpl $0x6, %ecx
sete %cl
orb %dil, %cl
movzbl %cl, %ecx
movq (%rdx,%rsi), %rdx
incl (%rdx,%rcx,4)
cmpb $0x1, 0x148(%r13)
jne 0x1b134
movq 0x2b8(%r12), %rdx
imulq $0x18, %rcx, %rcx
movq (%rdx,%rcx), %rcx
cvtsi2sdl (%rcx,%rax,4), %xmm0
addsd 0x130(%r13), %xmm0
movsd %xmm0, 0x130(%r13)
incq 0x370(%r12)
leaq 0x2305d(%rip), %rax     # 0x3e1a0
movl (%rax), %ecx
cmpl $0x2, %ecx
pushq $0x1
popq %rdx
cmovgel %ecx, %edx
decl %edx
movl %edx, (%rax)
movzbl %r15b, %ecx
movzbl %bpl, %r8d
movq %r12, %rdi
movq %r14, %rsi
movq %rbx, %rdx
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x1fe44
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/PHC.cc
// Function: PHCPredictor::classifyRD(int, int, bool)
RD_TYPE
PHCPredictor::classifyRD(int set , int index, bool inNVM)
{
	vector<CacheEntry*> line;
	int64_t ref_rd = 0;
	if(inNVM)
	{
		ref_rd = m_tableNVM[set][index]->policyInfo;
		line = m_tableNVM[set];
	}
	else
	{
		line = m_tableSRAM[set];
		ref_rd = m_tableSRAM[set][index]->policyInfo;
	}
	
	int position = 0;
	/* Determine the position of the cache line in the LRU stack */
	for(unsigned i = 0 ; i < line.size() ; i ++)
	{
		if(line[i]->policyInfo < ref_rd && line[i]->isValid)
			position++;
	}	

	if(simu_parameters.nvm_assoc > simu_parameters.sram_assoc)
	{
		if(position < simu_parameters.mediumrd_def)
			return RD_SHORT;
		else
			return RD_MEDIUM;	
	}
	else
	{
		if(position < simu_parameters.mediumrd_def)
			return RD_SHORT;
		else
			return RD_MEDIUM;
	}
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
subq $0x20, %rsp
movl %edx, %ebx
movq %rdi, %r14
andq $0x0, 0x10(%rsp)
xorps %xmm0, %xmm0
movaps %xmm0, (%rsp)
movslq %esi, %rax
testl %ecx, %ecx
je 0x1b1d7
movq 0x10(%r14), %rcx
movq (%rcx), %rcx
imulq $0x18, %rax, %rax
leaq (%rcx,%rax), %rsi
movslq %ebx, %rdx
movq (%rcx,%rax), %rax
movq (%rax,%rdx,8), %rax
movl 0x38(%rax), %ebx
movq %rsp, %rdi
callq 0x9ffc
jmp 0x1b202
movq 0x8(%r14), %rcx
imulq $0x18, %rax, %r15
movq (%rcx), %rsi
addq %r15, %rsi
movq %rsp, %rdi
callq 0x9ffc
movq 0x8(%r14), %rax
movq (%rax), %rax
movslq %ebx, %rcx
movq (%rax,%r15), %rax
movq (%rax,%rcx,8), %rax
movl 0x38(%rax), %ebx
movq (%rsp), %rax
movq 0x8(%rsp), %rcx
subq %rax, %rcx
sarq $0x3, %rcx
xorl %edx, %edx
xorl %esi, %esi
movl %esi, %esi
cmpq %rsi, %rcx
jbe 0x1b22f
movq (%rax,%rsi,8), %rdi
cmpl %ebx, 0x38(%rdi)
jge 0x1b22b
movzbl (%rdi), %edi
addl %edi, %edx
incl %esi
jmp 0x1b216
leaq 0x22d1a(%rip), %rax     # 0x3df50
xorl %ebx, %ebx
cmpl 0x1fc(%rax), %edx
setge %bl
movq %rsp, %rdi
callq 0xb6b2
movl %ebx, %eax
addq $0x20, %rsp
popq %rbx
popq %r14
popq %r15
retq
movq %rax, %rbx
movq %rsp, %rdi
callq 0xb6b2
movq %rbx, %rdi
callq 0x5570
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/PHC.cc
// Function: PHCPredictor::finishSimu()
void 
PHCPredictor::finishSimu()
{
	
	if(simu_parameters.perceptron_drawFeatureMaps)
	{
		drawFeatureMaps();
	}
	
	for(auto feature : m_features)
		feature->finishSimu();
	
	Predictor::finishSimu();
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
leaq 0x21e9c(%rip), %rax     # 0x3df50
cmpb $0x1, 0x1cc(%rax)
jne 0x1c0c5
movq %rbx, %rdi
callq 0x1c0ee
movq 0x270(%rbx), %r14
movq 0x278(%rbx), %rbx
cmpq %rbx, %r14
je 0x1c0e6
movq (%r14), %rdi
callq 0x11344
addq $0x8, %r14
jmp 0x1c0d3
addq $0x8, %rsp
popq %rbx
popq %r14
retq