// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/softfloat.c
// Function: roundAndPackFloat128
static float128 roundAndPackFloat128(flag zSign, int32 zExp,
                                     uint64_t zSig0, uint64_t zSig1,
                                     uint64_t zSig2, float_status *status)
{
    int8 roundingMode;
    flag roundNearestEven, increment, isTiny;

    roundingMode = status->float_rounding_mode;
    roundNearestEven = ( roundingMode == float_round_nearest_even );
    switch (roundingMode) {
    case float_round_nearest_even:
    case float_round_ties_away:
        increment = ((int64_t)zSig2 < 0);
        break;
    case float_round_to_zero:
        increment = 0;
        break;
    case float_round_up:
        increment = !zSign && zSig2;
        break;
    case float_round_down:
        increment = zSign && zSig2;
        break;
    default:
        abort();
    }
    if ( 0x7FFD <= (uint32_t) zExp ) {
        if (    ( 0x7FFD < zExp )
             || (    ( zExp == 0x7FFD )
                  && eq128(
                         LIT64( 0x0001FFFFFFFFFFFF ),
                         LIT64( 0xFFFFFFFFFFFFFFFF ),
                         zSig0,
                         zSig1
                     )
                  && increment
                )
           ) {
            float_raise(float_flag_overflow | float_flag_inexact, status);
            if (    ( roundingMode == float_round_to_zero )
                 || ( zSign && ( roundingMode == float_round_up ) )
                 || ( ! zSign && ( roundingMode == float_round_down ) )
               ) {
                return
                    packFloat128(
                        zSign,
                        0x7FFE,
                        LIT64( 0x0000FFFFFFFFFFFF ),
                        LIT64( 0xFFFFFFFFFFFFFFFF )
                    );
            }
            return packFloat128( zSign, 0x7FFF, 0, 0 );
        }
        if ( zExp < 0 ) {
            if (status->flush_to_zero) {
                float_raise(float_flag_output_denormal, status);
                return packFloat128(zSign, 0, 0, 0);
            }
            isTiny =
                   (status->float_detect_tininess
                    == float_tininess_before_rounding)
                || ( zExp < -1 )
                || ! increment
                || lt128(
                       zSig0,
                       zSig1,
                       LIT64( 0x0001FFFFFFFFFFFF ),
                       LIT64( 0xFFFFFFFFFFFFFFFF )
                   );
            shift128ExtraRightJamming(
                zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );
            zExp = 0;
            if (isTiny && zSig2) {
                float_raise(float_flag_underflow, status);
            }
            switch (roundingMode) {
            case float_round_nearest_even:
            case float_round_ties_away:
                increment = ((int64_t)zSig2 < 0);
                break;
            case float_round_to_zero:
                increment = 0;
                break;
            case float_round_up:
                increment = !zSign && zSig2;
                break;
            case float_round_down:
                increment = zSign && zSig2;
                break;
            default:
                abort();
            }
        }
    }
    if (zSig2) {
        status->float_exception_flags |= float_flag_inexact;
    }
    if ( increment ) {
        add128( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );
        zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );
    }
    else {
        if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;
    }
    return packFloat128( zSign, zExp, zSig0, zSig1 );

}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x20, %rsp
movq %rdx, 0x10(%rsp)
movq %rcx, 0x8(%rsp)
movq %r8, 0x18(%rsp)
movzbl 0x1(%r9), %r15d
cmpq $0x4, %r15
ja 0x11834
movq %r9, %r14
movl %esi, %r10d
movl %edi, %ebx
leaq 0x32b3(%rip), %rax      # 0x148e8
movslq (%rax,%r15,4), %rsi
addq %rax, %rsi
jmpq *%rsi
movq %r8, %rsi
shrq $0x3f, %rsi
jmp 0x11661
xorl %esi, %esi
jmp 0x11661
testb %bl, %bl
setne %al
jmp 0x11657
testb %bl, %bl
sete %al
testq %r8, %r8
setne %sil
andb %al, %sil
cmpl $0x7ffd, %r10d          # imm = 0x7FFD
jb 0x116da
jle 0x116b1
movabsq $0x7ffeffffffffffff, %rcx # imm = 0x7FFEFFFFFFFFFFFF
orb $0x28, 0x2(%r14)
cmpl $0x3, %r15d
je 0x1169e
testb %bl, %bl
setne %al
cmpl $0x2, %r15d
sete %dl
testb %dl, %al
jne 0x1169e
xorb $0x1, %r15b
orb %bl, %r15b
jne 0x1175f
movzbl %bl, %r10d
shlq $0x3f, %r10
orq %rcx, %r10
pushq $-0x1
popq %rax
jmp 0x11737
jne 0x116d5
movabsq $0x1ffffffffffff, %rax  # imm = 0x1FFFFFFFFFFFF
movl $0x7ffd, %r10d          # imm = 0x7FFD
cmpq %rax, %rdx
jne 0x116da
cmpq $-0x1, %rcx
jne 0x116da
testb %sil, %sil
jne 0x1166c
jmp 0x116da
testl %r10d, %r10d
js 0x11747
testq %r8, %r8
je 0x116e4
orb $0x20, 0x2(%r14)
movq 0x10(%rsp), %rcx
movq 0x8(%rsp), %rax
testb %sil, %sil
je 0x1171a
testl %r15d, %r15d
sete %dl
addq $0x1, %rax
adcq $0x0, %rcx
shlq %r8
testq %r8, %r8
sete %sil
andb %dl, %sil
movzbl %sil, %edx
notq %rdx
andq %rdx, %rax
jmp 0x11726
xorl %edx, %edx
movq %rax, %rsi
orq %rcx, %rsi
cmovel %edx, %r10d
movzbl %bl, %edx
shlq $0x3f, %rdx
shlq $0x30, %r10
addq %rdx, %r10
addq %rcx, %r10
movq %r10, %rdx
addq $0x20, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
cmpb $0x0, 0x4(%r14)
je 0x11773
orb $-0x80, 0x2(%r14)
movzbl %bl, %r10d
shlq $0x3f, %r10
xorl %eax, %eax
jmp 0x11737
movzbl %bl, %eax
shlq $0x3f, %rax
incq %rcx
orq %rax, %rcx
xorl %eax, %eax
movq %rcx, %r10
jmp 0x11737
movb $0x1, %bpl
cmpl $-0x1, %r10d
jne 0x117a9
cmpb $0x1, (%r14)
je 0x117a9
testb %sil, %sil
je 0x117a9
movabsq $0x1ffffffffffff, %rax  # imm = 0x1FFFFFFFFFFFF
cmpq %rax, %rdx
setb %al
sete %sil
cmpq $-0x1, %rcx
setne %bpl
andb %sil, %bpl
orb %al, %bpl
negl %r10d
leaq 0x18(%rsp), %r12
movq %r12, (%rsp)
leaq 0x10(%rsp), %rax
leaq 0x8(%rsp), %r9
movq %rdx, %rdi
movq %rcx, %rsi
movq %r8, %rdx
movq %r10, %rcx
movq %rax, %r8
callq 0x1156d
movq (%r12), %r8
testq %r8, %r8
setne %al
andb %bpl, %al
cmpb $0x1, %al
jne 0x117e9
orb $0x10, 0x2(%r14)
xorl %r10d, %r10d
movl %r15d, %eax
leaq 0x3106(%rip), %rcx      # 0x148fc
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movq %r8, %rsi
shrq $0x3f, %rsi
jmp 0x116da
xorl %esi, %esi
jmp 0x116da
testq %r8, %r8
setne %al
testb %bl, %bl
setne %sil
jmp 0x1182c
testq %r8, %r8
setne %al
testb %bl, %bl
sete %sil
andb %al, %sil
jmp 0x116da
callq 0x1040