// File: /workspace/github_cpp_makefile_star2_O2/dsesami[P]superscalar-processor-model/main.cc
// Function: main
int main(int argc, char ** argv) {
    if(argc != 7) {
        cout << "Invalid amount of arguments for 'sim_ds'. Please include 6 " <<
                "parameters of the format <ROB_SIZE> <IQ_SIZE> <WIDTH> " <<
                "<CACHE_SIZE> <P> <TRACE_FILE>." << endl;
        return 1;
    }

    ROBSIZE    = atoi(argv[1]), // Max # of entries within Reorder Buffer
    IQ_SIZE    = atoi(argv[2]), // Max # of entries within Issue Queue
    WIDTH      = atoi(argv[3]), // Superscalar width of all pipeline stages (minus WB)
    CACHE_SIZE = atoi(argv[4]), // Size of instruction cache in bytes
    P          = atoi(argv[5]); // Prefetching flag
    TRACE_FILE =      argv[6] ; // Name of trace file

    dyn_instr_count   = 0,   // Dynamic instruction count
    cycles            = 0;   // Total number of cycles. Always at least 1.
    double ipc        = 0;   // Average instructions per cycle

    infile.open(TRACE_FILE);

    ROB.resize(ROBSIZE);
    IQ.resize(IQ_SIZE);

    // Pipeline routine
    do {
        retire();
        //cout << "1" << endl;
        writeback();
        //cout << "2" << endl;
        execute();
        //cout << "3" << endl;
        issue();
        //cout << "4" << endl;
        dispatch();
        //cout << "5" << endl;
        regRead();
        //cout << "6" << endl;
        rename();
        //cout << "7" << endl;
        decode();
        //cout << "8" << endl;
        FE_continue = fetch();
        //cout << "9" << endl;
    }
    while (advance_cycle());

    ipc = (double) dyn_instr_count / (double) cycles;

    cout << "# === Simulator Command =========" << endl
         << "# ./sim_ds "  << argv[1] << " " <<
            argv[2] << " " << argv[3] << " " <<
            argv[4] << " " << argv[5] << " " <<
            argv[6] << endl;
    cout << "# === Processor Configuration ===" << endl;
    cout << "# ROB_SIZE  = "        << argv[1]  << endl;
    cout << "# IQ_SIZE   = "        << argv[2]  << endl;
    cout << "# WIDTH     = "        << argv[3]  << endl;
    cout << "# CACHE_SIZE    = "    << argv[4]  << endl;
    cout << "# PREFETCHING   = "    << argv[5]  << endl;
    cout << "# === Simulation Results ========" << endl;
    cout << "# Dynamic Instruction Count      = " << dyn_instr_count << endl;
    cout << "# Cycles                         = " << cycles          << endl;
    cout << "# Instructions Per Cycle (IPC)   = " << fixed << setprecision(2) << ipc             << endl;

    return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
cmpl $0x7, %edi
jne 0x296b
movq %rsi, %rbx
movq 0x8(%rsi), %rdi
callq 0x21d0
movl %eax, 0x6b04(%rip)      # 0x9164
movq 0x10(%rbx), %rdi
callq 0x21d0
movl %eax, 0x6af9(%rip)      # 0x9168
movq 0x18(%rbx), %rdi
callq 0x21d0
movl %eax, 0x6aee(%rip)      # 0x916c
movq 0x20(%rbx), %rdi
callq 0x21d0
movl %eax, 0x6ae3(%rip)      # 0x9170
movq 0x28(%rbx), %rdi
callq 0x21d0
movl %eax, 0x6ad8(%rip)      # 0x9174
movq 0x30(%rbx), %rsi
andl $0x0, 0x6ad1(%rip)      # 0x9178
movq %rsi, 0x6ad2(%rip)      # 0x9180
andl $0x0, 0x6ac7(%rip)      # 0x917c
leaq 0x6acc(%rip), %rdi      # 0x9188
pushq $0x8
popq %rdx
callq 0x20e0
movl 0x6a9a(%rip), %esi      # 0x9164
leaq 0x6cbf(%rip), %rdi      # 0x9390
callq 0x2e32
movl 0x6a8c(%rip), %esi      # 0x9168
leaq 0x6cdd(%rip), %rdi      # 0x93c0
callq 0x2e70
callq 0x4dc4
callq 0x4c28
callq 0x47a0
callq 0x43f0
callq 0x41b0
callq 0x4024
callq 0x3d34
callq 0x3bb0
callq 0x36cc
movl %eax, 0x6cd5(%rip)      # 0x93f0
callq 0x29b3
testb %al, %al
jne 0x26e8
movl 0x6a4e(%rip), %eax      # 0x9178
cvtsi2sd %rax, %xmm1
movl 0x6a47(%rip), %eax      # 0x917c
cvtsi2sd %rax, %xmm0
divsd %xmm0, %xmm1
movsd %xmm1, 0x8(%rsp)
movq 0x688d(%rip), %r14      # 0x8fd8
leaq 0x3960(%rip), %rsi      # 0x60b2
movq %r14, %rdi
callq 0x2140
movq %rax, %rdi
callq 0x20b0
leaq 0x396b(%rip), %rsi      # 0x60d4
movq %rax, %rdi
callq 0x2140
movq 0x8(%rbx), %rsi
movq %rax, %rdi
callq 0x2140
leaq 0x3c72(%rip), %r15      # 0x63f6
movq %rax, %rdi
movq %r15, %rsi
callq 0x2140
movq 0x10(%rbx), %rsi
movq %rax, %rdi
callq 0x2140
movq %rax, %rdi
movq %r15, %rsi
callq 0x2140
movq 0x18(%rbx), %rsi
movq %rax, %rdi
callq 0x2140
movq %rax, %rdi
movq %r15, %rsi
callq 0x2140
movq 0x20(%rbx), %rsi
movq %rax, %rdi
callq 0x2140
movq %rax, %rdi
movq %r15, %rsi
callq 0x2140
movq 0x28(%rbx), %rsi
movq %rax, %rdi
callq 0x2140
movq %rax, %rdi
movq %r15, %rsi
callq 0x2140
movq 0x30(%rbx), %rsi
movq %rax, %rdi
callq 0x2140
movq %rax, %rdi
callq 0x20b0
leaq 0x38da(%rip), %rsi      # 0x60e0
movq %r14, %rdi
callq 0x2140
movq %rax, %rdi
callq 0x20b0
leaq 0x38e5(%rip), %rsi      # 0x6102
movq %r14, %rdi
callq 0x2140
movq 0x8(%rbx), %rsi
movq %rax, %rdi
callq 0x2140
movq %rax, %rdi
callq 0x20b0
leaq 0x38d1(%rip), %rsi      # 0x6111
movq %r14, %rdi
callq 0x2140
movq 0x10(%rbx), %rsi
movq %rax, %rdi
callq 0x2140
movq %rax, %rdi
callq 0x20b0
leaq 0x38bd(%rip), %rsi      # 0x6120
movq %r14, %rdi
callq 0x2140
movq 0x18(%rbx), %rsi
movq %rax, %rdi
callq 0x2140
movq %rax, %rdi
callq 0x20b0
leaq 0x38a9(%rip), %rsi      # 0x612f
movq %r14, %rdi
callq 0x2140
movq 0x20(%rbx), %rsi
movq %rax, %rdi
callq 0x2140
movq %rax, %rdi
callq 0x20b0
leaq 0x3899(%rip), %rsi      # 0x6142
movq %r14, %rdi
callq 0x2140
movq 0x28(%rbx), %rsi
movq %rax, %rdi
callq 0x2140
movq %rax, %rdi
callq 0x20b0
leaq 0x3889(%rip), %rsi      # 0x6155
movq %r14, %rdi
callq 0x2140
movq %rax, %rdi
callq 0x20b0
leaq 0x3894(%rip), %rsi      # 0x6177
movq %r14, %rdi
callq 0x2140
movl 0x6887(%rip), %esi      # 0x9178
movq %rax, %rdi
callq 0x20f0
movq %rax, %rdi
callq 0x20b0
leaq 0x3893(%rip), %rsi      # 0x619b
movq %r14, %rdi
callq 0x2140
movl 0x6866(%rip), %esi      # 0x917c
movq %rax, %rdi
callq 0x20f0
movq %rax, %rdi
callq 0x20b0
leaq 0x3892(%rip), %rsi      # 0x61bf
movq %r14, %rdi
callq 0x2140
movq (%rax), %rcx
movq -0x18(%rcx), %rdx
movl $0xfffffefb, %esi       # imm = 0xFFFFFEFB
andl 0x18(%rax,%rdx), %esi
orl $0x4, %esi
movl %esi, 0x18(%rax,%rdx)
movq -0x18(%rcx), %rcx
movq $0x2, 0x8(%rax,%rcx)
movq %rax, %rdi
movsd 0x8(%rsp), %xmm0
callq 0x21f0
xorl %ebx, %ebx
jmp 0x299f
movq 0x6666(%rip), %rdi      # 0x8fd8
leaq 0x36a7(%rip), %rsi      # 0x6020
callq 0x2140
leaq 0x36d7(%rip), %rsi      # 0x605c
movq %rax, %rdi
callq 0x2140
leaq 0x36ff(%rip), %rsi      # 0x6093
movq %rax, %rdi
callq 0x2140
pushq $0x1
popq %rbx
movq %rax, %rdi
callq 0x20b0
movl %ebx, %eax
addq $0x10, %rsp
popq %rbx
popq %r14
popq %r15
retq