// File: /workspace/github_cpp_makefile_star2_O1/sopanpatra160[P]OOO_Superscalar_Processor_Simulator/cache.cc
// Function: cache::read(unsigned int)
unsigned int cache::read(unsigned int addr){

	//printf("Entered read \n");
	unsigned int addr_ev;
	num_r++;
	//printf("Access no. %d\n",num_r);
	calc_tag_ind(addr);

	hit=0;
	miss=0;
		//printf("level = %d\n",lev);
	if(lev == 1){

		//#1 check for the element in all the blocks of that set
		for (unsigned int j=0; j<a; j++){
			if((tag_store[ind][j]==tag) && (valid_store[ind][j]==1)){
				if(rp==2)
					lru_update(ind,j);
				else if(rp==3)
					lfu_update_block(ind,j,1);
				hit=1;
				//printf("L1 Hit \n");				
				return 1;
			}
		}
		if(vptr != NULL){
			unsigned int tag_vc = vptr->calc_tag(addr); // tag reconstruction
			unsigned int found_vc=0;
			unsigned int found_loc = 0;
			for (unsigned int j=0; j<vptr->a; j++){
				if((vptr->tag_store[0][j]==tag_vc) && (vptr->valid_store[0][j]==1)){
					found_vc = 1;
					found_loc = j;
				}
			}
			if(found_vc==1){
				//unsigned int tag_vc = vptr->calc_tag(addr);
				num_swap+=1;
				swap(found_loc,0);
				return 1;
			}
		}
		num_miss_r++; // MISS in L1
		miss=1;
		//printf("L1 Miss \n");
		
		//#2 MISS in L1 but invalid case
		for (unsigned int j=0; j<a; j++){
			if(valid_store[ind][j]==0){
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][j]=tag;
				valid_store[ind][j]=1;
				if(rp==2)
					lru_update(ind,j);
				else if(rp ==3) 
					lfu_update_block(ind,j,0);

				return 0;
			}
		}
		
		//#3 MISS IN L1 FOR ALL BITS VALID : EVICTION

		if(rp==2){
			ev_blk= lru_block2evict(ind);
		}
		
		else if(rp==3){
			ev_blk= lfu_block2evict(ind);
		}

		//See if victim cache is present
		if(vptr != NULL){
			addr_ev = ev_blk_addr(ind,tag_store[ind][ev_blk]);
			
			vptr->insert_vc(addr_ev,dirty_store[ind][ev_blk]);
			if(next!=NULL)
				next->read(addr);
			tag_store[ind][ev_blk]=tag;
			dirty_store[ind][ev_blk]=0;
		}
		
		else if(vptr == NULL){
			if(dirty_store[ind][ev_blk]==0){
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][ev_blk]=tag;
			}
			if(dirty_store[ind][ev_blk]==1){
				num_wb+=1;
				addr_ev = ev_blk_addr(ind,tag_store[ind][ev_blk]);
				if(next!=NULL)
					next->write(addr_ev);
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][ev_blk]=tag;
				dirty_store[ind][ev_blk]=0;
			}
		}

		//update LRU/LFU counters
		if(rp==2){
			lru_update(ind,ev_blk);
		}
		else if(rp==3){
			lfu_update_set(ind,ev_blk);
			lfu_update_block(ind,ev_blk,0);
		}
		return 0;
	}	

	else if(lev == 2){
		//#1 check for the element in all the blocks of that set
		for (unsigned int j=0; j<a; j++){
			if((tag_store[ind][j]==tag) && (valid_store[ind][j]==1)){
				if(rp==2)
					lru_update(ind,j);
				else if(rp==3)
					lfu_update_block(ind,j,1);
				hit=1;
				return 1;
			}
		}
		miss=1;	
		num_miss_r++;
		
		//#2 MISS in L1 but invalid case
		for (unsigned int j=0; j<a; j++){
			if(valid_store[ind][j]==0){
				tag_store[ind][j]=tag;
				valid_store[ind][j]=1;
				if(rp==2)
					lru_update(ind,j);
				else 
					lfu_update_block(ind,j,0);
			}
		}
		
		//#3 MISS IN L1 FOR ALL BITS VALID : EVICTION
		if(rp==2){
			ev_blk= lru_block2evict(ind);
		}
		//LFU policy
		else if(rp==3){
			ev_blk= lfu_block2evict(ind);
		}

		if(wp==0){
			if(dirty_store[ind][ev_blk]==0){
				tag_store[ind][ev_blk]=tag;
			}
			if(dirty_store[ind][ev_blk]==1){
				num_wb+=1;
				tag_store[ind][ev_blk]=tag;
				dirty_store[ind][ev_blk]=0;
			}
		}

		if(rp==2){
			lru_update(ind,ev_blk);
		}
		else if(rp==3){
			lfu_update_set(ind,ev_blk);
			lfu_update_block(ind,ev_blk,0);
		}
		return 0;
	}
	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
incl 0x80(%rdi)
movl %esi, %ebp
movl 0x58(%rdi), %eax
movl %eax, %ecx
shrl %cl, %esi
movl 0x24(%rdi), %edi
movl 0x60(%rbx), %ecx
addl %eax, %ecx
shll %cl, %esi
shrl %cl, %esi
movl %esi, 0x68(%rbx)
addl 0x5c(%rbx), %eax
movl %ebp, %edx
movl %eax, %ecx
shrl %cl, %edx
movl %edx, 0x64(%rbx)
movq $0x0, 0x9c(%rbx)
cmpl $0x1, %edi
je 0x1895
cmpl $0x2, %edi
jne 0x1d28
movl 0x18(%rbx), %edi
testq %rdi, %rdi
je 0x1788
movl %esi, %ecx
movq 0x28(%rbx), %rax
movq 0x30(%rbx), %rsi
movq (%rax,%rcx,8), %r8
xorl %eax, %eax
cmpl %edx, (%r8,%rax,4)
jne 0x1780
movq (%rsi,%rcx,8), %r9
cmpl $0x1, (%r9,%rax,4)
je 0x196a
incq %rax
cmpq %rax, %rdi
jne 0x176b
movl $0x1, 0xa0(%rbx)
incl 0x84(%rbx)
movl 0x18(%rbx), %r9d
testl %r9d, %r9d
je 0x1846
movq 0x28(%rbx), %rax
movq 0x30(%rbx), %rcx
movq 0x50(%rbx), %rdx
movq 0x48(%rbx), %rsi
movq 0x40(%rbx), %rdi
xorl %r8d, %r8d
movl 0x68(%rbx), %r9d
movq (%rcx,%r9,8), %r10
cmpl $0x0, (%r10,%r8,4)
jne 0x1836
movl 0x64(%rbx), %r10d
movq (%rax,%r9,8), %r9
movl %r10d, (%r9,%r8,4)
movl 0x68(%rbx), %r9d
movq (%rcx,%r9,8), %r9
movl $0x1, (%r9,%r8,4)
movl 0x68(%rbx), %r9d
cmpl $0x2, 0x1c(%rbx)
jne 0x1827
movq (%rdi,%r9,8), %r9
cmpl $0x0, 0x18(%rbx)
je 0x181d
movl (%r9,%r8,4), %r10d
xorl %r11d, %r11d
movl (%r9,%r11,4), %ebp
cmpl %r10d, %ebp
jae 0x1811
incl %ebp
movl %ebp, (%r9,%r11,4)
incq %r11
movl 0x18(%rbx), %r14d
cmpq %r14, %r11
jb 0x1802
movl $0x0, (%r9,%r8,4)
jmp 0x1836
movl (%rdx,%r9,4), %r10d
incl %r10d
movq (%rsi,%r9,8), %r9
movl %r10d, (%r9,%r8,4)
incq %r8
movl 0x18(%rbx), %r9d
cmpq %r9, %r8
jb 0x17bc
movl 0x1c(%rbx), %eax
cmpl $0x2, %eax
je 0x1930
cmpl $0x3, %eax
jne 0x19ef
testl %r9d, %r9d
je 0x19ea
movl 0x68(%rbx), %eax
movq 0x48(%rbx), %rcx
movq (%rcx,%rax,8), %rcx
movl %r9d, %edx
xorl %esi, %esi
xorl %edi, %edi
movl %edi, %eax
movl (%rcx,%rax,4), %r8d
movl %esi, %eax
cmpl (%rcx,%rsi,4), %r8d
ja 0x1886
movl %edi, %eax
incq %rsi
movl %eax, %edi
cmpq %rsi, %rdx
jne 0x1876
jmp 0x19ec
movl 0x18(%rbx), %edi
testq %rdi, %rdi
je 0x18ca
movl %esi, %ecx
movq 0x28(%rbx), %rax
movq 0x30(%rbx), %rsi
movq (%rax,%rcx,8), %r8
xorl %eax, %eax
cmpl %edx, (%r8,%rax,4)
jne 0x18c2
movq (%rsi,%rcx,8), %r9
cmpl $0x1, (%r9,%rax,4)
je 0x19a5
incq %rax
cmpq %rax, %rdi
jne 0x18ad
movq 0x8(%rbx), %rax
testq %rax, %rax
je 0x1aae
movl 0x5c(%rax), %ecx
addl 0x58(%rax), %ecx
movl %ebp, %edx
shrl %cl, %edx
movl 0x18(%rax), %ecx
movl %edx, 0x64(%rax)
testq %rcx, %rcx
je 0x1a97
movq 0x28(%rax), %rsi
movq (%rsi), %rdi
xorl %r8d, %r8d
xorl %esi, %esi
xorl %r9d, %r9d
cmpl %edx, (%rdi,%r8,4)
jne 0x191c
movq 0x30(%rax), %r10
movq (%r10), %r10
movl (%r10,%r8,4), %r10d
cmpl $0x1, %r10d
cmovel %r10d, %r9d
cmovel %r8d, %esi
incq %r8
cmpq %r8, %rcx
jne 0x18ff
cmpl $0x1, %r9d
sete %al
jmp 0x1a9b
testl %r9d, %r9d
je 0x19ea
movl 0x68(%rbx), %eax
movq 0x40(%rbx), %rcx
movq (%rcx,%rax,8), %rcx
movl %r9d, %edx
xorl %esi, %esi
xorl %edi, %edi
movl %edi, %eax
movl (%rcx,%rax,4), %r8d
movl %esi, %eax
cmpl (%rcx,%rsi,4), %r8d
jb 0x195b
movl %edi, %eax
incq %rsi
movl %eax, %edi
cmpq %rsi, %rdx
jne 0x194b
jmp 0x19ec
movl 0x1c(%rbx), %edx
cmpl $0x3, %edx
je 0x1b06
cmpl $0x2, %edx
jne 0x1b11
movq 0x40(%rbx), %rdx
movq (%rdx,%rcx,8), %rcx
movl (%rcx,%rax,4), %edx
xorl %esi, %esi
movl (%rcx,%rsi,4), %edi
cmpl %edx, %edi
jae 0x1998
incl %edi
movl %edi, (%rcx,%rsi,4)
incq %rsi
movl 0x18(%rbx), %edi
cmpq %rdi, %rsi
jb 0x198c
jmp 0x19de
movl 0x1c(%rbx), %edx
cmpl $0x3, %edx
je 0x1b06
cmpl $0x2, %edx
jne 0x1b11
movq 0x40(%rbx), %rdx
movq (%rdx,%rcx,8), %rcx
movl (%rcx,%rax,4), %edx
xorl %esi, %esi
movl (%rcx,%rsi,4), %edi
cmpl %edx, %edi
jae 0x19d3
incl %edi
movl %edi, (%rcx,%rsi,4)
incq %rsi
movl 0x18(%rbx), %edi
cmpq %rdi, %rsi
jb 0x19c7
movl $0x0, (%rcx,%rax,4)
jmp 0x1b11
xorl %eax, %eax
movl %eax, 0x6c(%rbx)
cmpl $0x0, 0x20(%rbx)
jne 0x1a49
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %ecx
movq (%rax,%rcx,8), %rsi
movl 0x6c(%rbx), %edx
cmpl $0x0, (%rsi,%rdx,4)
jne 0x1a17
movl 0x64(%rbx), %esi
movq 0x28(%rbx), %rdi
movq (%rdi,%rcx,8), %rcx
movl %esi, (%rcx,%rdx,4)
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %edx
movq (%rax,%rcx,8), %rsi
cmpl $0x1, (%rsi,%rdx,4)
jne 0x1a49
incl 0x74(%rbx)
movl 0x64(%rbx), %esi
movq 0x28(%rbx), %rdi
movq (%rdi,%rcx,8), %rcx
movl %esi, (%rcx,%rdx,4)
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %edx
movq (%rax,%rcx,8), %rax
movl $0x0, (%rax,%rdx,4)
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x1cfe
cmpl $0x2, %eax
jne 0x1d28
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %eax
movq 0x40(%rbx), %rdx
movq (%rdx,%rcx,8), %rcx
cmpl $0x0, 0x18(%rbx)
je 0x1cf5
movl (%rcx,%rax,4), %edx
xorl %esi, %esi
movl (%rcx,%rsi,4), %edi
cmpl %edx, %edi
jae 0x1a87
incl %edi
movl %edi, (%rcx,%rsi,4)
incq %rsi
movl 0x18(%rbx), %edi
cmpq %rdi, %rsi
jb 0x1a7b
jmp 0x1cf5
xorl %eax, %eax
xorl %esi, %esi
testb %al, %al
je 0x1aae
incl 0x7c(%rbx)
movq %rbx, %rdi
xorl %edx, %edx
callq 0x1e52
jmp 0x1b1b
incl 0x84(%rbx)
movl $0x1, 0xa0(%rbx)
movl 0x18(%rbx), %ecx
movl $0x1, %eax
testl %ecx, %ecx
setne %r14b
je 0x1bc0
movq 0x30(%rbx), %rdx
movl 0x68(%rbx), %esi
movq (%rdx,%rsi,8), %rdx
cmpl $0x0, (%rdx)
je 0x1b25
leal -0x1(%rcx), %esi
xorl %edi, %edi
cmpl %edi, %esi
je 0x1ba3
leaq 0x1(%rdi), %r15
cmpl $0x0, 0x4(%rdx,%rdi,4)
movq %r15, %rdi
jne 0x1ae7
cmpl %ecx, %r15d
setb %r14b
jmp 0x1b28
movq 0x48(%rbx), %rdx
movq (%rdx,%rcx,8), %rcx
incl (%rcx,%rax,4)
movl $0x1, 0x9c(%rbx)
movl $0x1, %eax
jmp 0x1d2a
xorl %r15d, %r15d
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x1b37
movl %ebp, %esi
callq 0x1702
movl 0x64(%rbx), %eax
movq 0x28(%rbx), %rcx
movl 0x68(%rbx), %edx
movq (%rcx,%rdx,8), %rcx
movl %eax, (%rcx,%r15,4)
movq 0x30(%rbx), %rax
movl 0x68(%rbx), %ecx
movq (%rax,%rcx,8), %rax
movl $0x1, (%rax,%r15,4)
movl 0x1c(%rbx), %ecx
xorl %eax, %eax
cmpl $0x3, %ecx
je 0x1ba8
cmpl $0x2, %ecx
jne 0x1bc0
movl 0x68(%rbx), %ecx
movq 0x40(%rbx), %rdx
movq (%rdx,%rcx,8), %rcx
cmpl $0x0, 0x18(%rbx)
je 0x1b99
movl (%rcx,%r15,4), %edx
xorl %esi, %esi
movl (%rcx,%rsi,4), %edi
cmpl %edx, %edi
jae 0x1b8e
incl %edi
movl %edi, (%rcx,%rsi,4)
incq %rsi
movl 0x18(%rbx), %edi
cmpq %rdi, %rsi
jb 0x1b82
movl $0x0, (%rcx,%r15,4)
jmp 0x1bc0
xorl %r14d, %r14d
jmp 0x1bc0
movl 0x68(%rbx), %ecx
movq 0x48(%rbx), %rdx
movq 0x50(%rbx), %rsi
movl (%rsi,%rcx,4), %esi
incl %esi
movq (%rdx,%rcx,8), %rcx
movl %esi, (%rcx,%r15,4)
testb %r14b, %r14b
jne 0x1d2a
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x1c09
cmpl $0x2, %eax
jne 0x1c41
movl 0x18(%rbx), %ecx
testq %rcx, %rcx
je 0x1c3c
movl 0x68(%rbx), %eax
movq 0x40(%rbx), %rdx
movq (%rdx,%rax,8), %rdx
xorl %esi, %esi
xorl %edi, %edi
movl %edi, %eax
movl (%rdx,%rax,4), %r8d
movl %esi, %eax
cmpl (%rdx,%rsi,4), %r8d
jb 0x1bfd
movl %edi, %eax
incq %rsi
movl %eax, %edi
cmpq %rsi, %rcx
jne 0x1bed
jmp 0x1c3e
movl 0x18(%rbx), %ecx
testq %rcx, %rcx
je 0x1c3c
movl 0x68(%rbx), %eax
movq 0x48(%rbx), %rdx
movq (%rdx,%rax,8), %rdx
xorl %esi, %esi
xorl %edi, %edi
movl %edi, %eax
movl (%rdx,%rax,4), %r8d
movl %esi, %eax
cmpl (%rdx,%rsi,4), %r8d
ja 0x1c30
movl %edi, %eax
incq %rsi
movl %eax, %edi
cmpq %rsi, %rcx
jne 0x1c20
jmp 0x1c3e
xorl %eax, %eax
movl %eax, 0x6c(%rbx)
movq 0x8(%rbx), %rdi
movl 0x6c(%rbx), %eax
testq %rdi, %rdi
je 0x1d35
movl 0x68(%rbx), %edx
movq 0x28(%rbx), %rsi
movl 0x58(%rbx), %ecx
movl %edx, %r8d
shll %cl, %r8d
movq (%rsi,%rdx,8), %rsi
movl (%rsi,%rax,4), %esi
addl 0x5c(%rbx), %ecx
shll %cl, %esi
movq 0x38(%rbx), %rcx
movq (%rcx,%rdx,8), %rcx
orl %r8d, %esi
movl (%rcx,%rax,4), %edx
callq 0x208c
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x1c8f
movl %ebp, %esi
callq 0x1702
movl 0x64(%rbx), %eax
movq 0x28(%rbx), %rcx
movl 0x68(%rbx), %edx
movq (%rcx,%rdx,8), %rcx
movl 0x6c(%rbx), %edx
movl %eax, (%rcx,%rdx,4)
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %ecx
movq (%rax,%rcx,8), %rax
movl 0x6c(%rbx), %ecx
movl $0x0, (%rax,%rcx,4)
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x1cfe
cmpl $0x2, %eax
jne 0x1d28
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %eax
movq 0x40(%rbx), %rdx
movq (%rdx,%rcx,8), %rcx
cmpl $0x0, 0x18(%rbx)
je 0x1cf5
movl (%rcx,%rax,4), %edx
xorl %esi, %esi
movl (%rcx,%rsi,4), %edi
cmpl %edx, %edi
jae 0x1cea
incl %edi
movl %edi, (%rcx,%rsi,4)
incq %rsi
movl 0x18(%rbx), %edi
cmpq %rdi, %rsi
jb 0x1cde
movl $0x0, (%rcx,%rax,4)
jmp 0x1d28
movl 0x68(%rbx), %eax
movl 0x6c(%rbx), %ecx
movq 0x48(%rbx), %rdx
movq 0x50(%rbx), %rsi
movq (%rdx,%rax,8), %rdi
movl (%rdi,%rcx,4), %ecx
movl %ecx, (%rsi,%rax,4)
movl 0x68(%rbx), %eax
movl 0x6c(%rbx), %ecx
movl (%rsi,%rax,4), %esi
incl %esi
movq (%rdx,%rax,8), %rax
movl %esi, (%rax,%rcx,4)
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
movq 0x38(%rbx), %rcx
movl 0x68(%rbx), %edx
movq (%rcx,%rdx,8), %rcx
cmpl $0x0, (%rcx,%rax,4)
jne 0x1d69
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x1d55
movl %ebp, %esi
callq 0x1702
movl 0x64(%rbx), %eax
movq 0x28(%rbx), %rcx
movl 0x68(%rbx), %edx
movq (%rcx,%rdx,8), %rcx
movl 0x6c(%rbx), %edx
movl %eax, (%rcx,%rdx,4)
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %esi
movq (%rax,%rsi,8), %rcx
movl 0x6c(%rbx), %eax
cmpl $0x1, (%rcx,%rax,4)
jne 0x1cb8
incl 0x74(%rbx)
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x1c80
movq 0x28(%rbx), %rcx
movq (%rcx,%rsi,8), %rcx
movl (%rcx,%rax,4), %edx
movl 0x58(%rbx), %eax
movl 0x5c(%rbx), %ecx
addl %eax, %ecx
shll %cl, %edx
movl %eax, %ecx
shll %cl, %esi
orl %edx, %esi
callq 0x2272
jmp 0x1c80
nop