// File: /workspace/github_c_makefile_star2_O2/intel[P]pf-bb-config/bb_acc_common.c
// Function: acc_mem_read
int acc_mem_read(void *dev, int rwFlag, int regAddr, int wPayload)
{
	hw_device *device = (hw_device *)dev;
	uint32_t payload = 0x0;
	LOG(DEBUG, "rwFlag = %d, regAddr = 0x%x, wPayload = 0x%x\n",
			rwFlag, regAddr, wPayload);
	clear_log_resp_file(dev);
	/* Protection specific to VRB registers. */
	if (device->device_id == VRB1_DEVICE_ID) {
		if ((regAddr >= VRB1_QMGR_BA_START) && (regAddr < VRB1_QMGR_BA_END)) {
			LOG_RESP(ERR, "Invalid Address for VRB1 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
		if ((regAddr >= VRB1_ARAM_START) && (regAddr < VRB1_ARAM_END)) {
			LOG_RESP(ERR, "Invalid ARAM Address for VRB1 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
		if ((regAddr >= VRB1_QOS_A_START) && (regAddr < VRB1_QOS_A_END)) {
			LOG_RESP(ERR, "Invalid QoS A Address for VRB1 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
		if ((regAddr >= VRB1_QOS_B_START) && (regAddr < VRB1_QOS_B_END)) {
			LOG_RESP(ERR, "Invalid QoS B Address for VRB1 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
		if ((regAddr >= VRB1_QOS_C_START) && (regAddr < VRB1_QOS_C_END)) {
			LOG_RESP(ERR, "Invalid QoS C Address for VRB1 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
	}
	if (device->device_id == VRB2_DEVICE_ID) {
		if ((regAddr >= VRB2_QMGR_BA_START) && (regAddr < VRB2_QMGR_BA_END)) {
			LOG_RESP(ERR, "Invalid Address for VRB2 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
		if ((regAddr >= VRB2_ARAM_START) && (regAddr < VRB2_ARAM_END)) {
			LOG_RESP(ERR, "Invalid ARAM Address for VRB2 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
		if ((regAddr >= VRB2_MLD_START) && (regAddr < VRB2_MLD_END)) {
			LOG_RESP(ERR, "Invalid MLD Address for VRB2 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
	}

	/* Prevent 4B read outside of PF BAR. */
	if ((regAddr + 4) > device->bar_size) {
		LOG_RESP(ERR, "Invalid address range for PF BAR 0x%x", regAddr);
		LOG_RESP_END();
		return 0;
	}

	switch (rwFlag) {
	default:
	case MM_READ_REG_READ:
		payload = reg_read(device->bar0Addr, regAddr);
		LOG_RESP(INFO, "Read 0x%08X 0x%08X\n", regAddr, payload);
		break;
	case MM_READ_REG_WRITE:
		LOG_RESP(INFO, "Write 0x%08X 0x%08X\n", regAddr, wPayload);
		reg_write(device->bar0Addr, regAddr, wPayload);
		break;
	}
	LOG_RESP_END();
	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x20, %rsp
movl %ecx, %ebp
movl %edx, %ebx
movl %esi, %r15d
movq %rdi, %r14
callq 0x1a231
leaq 0x1afcc(%rip), %r12     # 0x34ed0
movq 0x18(%r12), %r8
movl %ebp, 0x10(%rsp)
movl %ebx, 0x8(%rsp)
movl %r15d, (%rsp)
leaq 0x1465f(%rip), %rdx     # 0x2e57b
leaq 0x14693(%rip), %r9      # 0x2e5b6
pushq $0x3
popq %rdi
xorl %esi, %esi
movq %rax, %rcx
xorl %eax, %eax
callq 0x19400
movq %r14, %rdi
callq 0x19c10
movl 0x1c(%r14), %eax
cmpl $0x57c2, %eax           # imm = 0x57C2
je 0x19f73
cmpl $0x57c0, %eax           # imm = 0x57C0
jne 0x1a028
movl %ebx, %eax
andl $0xfffff000, %eax       # imm = 0xFFFFF000
cmpl $0xa01000, %eax         # imm = 0xA01000
jne 0x19f96
callq 0x1a231
movq (%r12), %r8
leaq 0x14655(%rip), %rdx     # 0x2e5c3
jmp 0x1a044
movl %ebx, %eax
andl $0xffffe000, %eax       # imm = 0xFFFFE000
cmpl $0xa08000, %eax         # imm = 0xA08000
jne 0x19fb9
callq 0x1a231
movq (%r12), %r8
leaq 0x14702(%rip), %rdx     # 0x2e693
jmp 0x1a044
movl %ebx, %eax
andl $0xffff8000, %eax       # imm = 0xFFFF8000
cmpl $0x818000, %eax         # imm = 0x818000
jne 0x19fdb
callq 0x1a231
movq (%r12), %r8
leaq 0x14634(%rip), %rdx     # 0x2e5e8
jmp 0x1a044
movl %ebx, %ecx
andl $0xffff8000, %ecx       # imm = 0xFFFF8000
cmpl $0x818000, %ecx         # imm = 0x818000
jne 0x1a00f
callq 0x1a231
movq (%r12), %r8
leaq 0x146df(%rip), %rdx     # 0x2e6b8
jmp 0x1a044
movl %ebx, %eax
andl $-0x20, %eax
cmpl $0xbb00c0, %eax         # imm = 0xBB00C0
je 0x1a101
cmpl $0xba00c0, %eax         # imm = 0xBA00C0
je 0x1a0ec
cmpl $0xb900c0, %eax         # imm = 0xB900C0
jne 0x1a028
callq 0x1a231
movq (%r12), %r8
leaq 0x14605(%rip), %rdx     # 0x2e612
jmp 0x1a044
cmpl $0xb5e000, %eax         # imm = 0xB5E000
jne 0x1a028
callq 0x1a231
movq (%r12), %r8
leaq 0x146bc(%rip), %rdx     # 0x2e6e2
jmp 0x1a044
leal 0x4(%rbx), %eax
cmpl 0xb8(%r14), %eax
jbe 0x1a086
callq 0x1a231
movq (%r12), %r8
leaq 0x146c7(%rip), %rdx     # 0x2e70b
pushq $0x1
popq %rsi
xorl %edi, %edi
movq %rax, %rcx
movl %ebx, %r9d
xorl %eax, %eax
callq 0x19400
callq 0x1a231
movq 0x10(%r12), %r8
leaq 0x144f7(%rip), %rdx     # 0x2e55e
pushq $0x2
popq %rdi
pushq $0x1
popq %rsi
movq %rax, %rcx
xorl %eax, %eax
callq 0x19400
xorl %eax, %eax
addq $0x20, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
cmpl $0x1, %r15d
jne 0x1a0c1
callq 0x1a231
movq 0x10(%r12), %r8
movl %ebp, (%rsp)
leaq 0x146b3(%rip), %rdx     # 0x2e753
pushq $0x2
popq %rdi
pushq $0x1
popq %rsi
movq %rax, %rcx
movl %ebx, %r9d
xorl %eax, %eax
callq 0x19400
movq 0xb0(%r14), %rax
movl %ebx, %ecx
movl %ebp, (%rax,%rcx)
jmp 0x1a056
movq 0xb0(%r14), %rax
movl %ebx, %ecx
movl (%rax,%rcx), %ebp
callq 0x1a231
movq 0x10(%r12), %r8
movl %ebp, (%rsp)
leaq 0x14657(%rip), %rdx     # 0x2e738
pushq $0x2
popq %rdi
pushq $0x1
popq %rsi
jmp 0x1a049
callq 0x1a231
movq (%r12), %r8
leaq 0x14541(%rip), %rdx     # 0x2e63d
jmp 0x1a044
callq 0x1a231
movq (%r12), %r8
leaq 0x14557(%rip), %rdx     # 0x2e668
jmp 0x1a044