// File: /workspace/github_c_makefile_star2_O3/tstword[P]MIPSAssemblerC/src/assembler.c
// Function: check_directive
int check_directive(struct instruction_node *instr) {
    struct reserved_entry *directive = instr->mnemonic;
    struct operand_node *operand_list = instr->operand_list;

    /* Check if entry is directive */
    if(directive->token != TOK_DIRECTIVE) return 0;

    struct opcode_entry *entry = (struct opcode_entry *)directive->attrptr;

    int assemble_status = 1; /* Assume assembled directive */

    if(!verify_operand_list(directive, operand_list)) {
        destroy_instruction(instr);
        return 0;
    }

    /* Check if segment is text before handling directive */
    switch(entry - opcode_table) {
        case DIRECTIVE_ASCII:
        case DIRECTIVE_ASCIIZ:
        case DIRECTIVE_HALF:
        case DIRECTIVE_BYTE:
            if(cfg_assembler->segment != SEGMENT_DATA) {
                fprintf(stderr, "Directive '%s' is not allowed in the .text segment on line %ld\n", directive->id, cfg_assembler->lineno);
                cfg_assembler->status = ASSEMBLER_STATUS_FAIL;
                destroy_instruction(instr);
                return 0;
            }
            break;
    }

    switch(entry->opcode) {
        case DIRECTIVE_INCLUDE: {
            /* Create tokenizer structure */
            struct tokenizer *tokenizer = create_tokenizer(operand_list->identifier);
            if(tokenizer == NULL) {
                fprintf(stderr, "Failed to include file '%s' on line %ld : ", operand_list->identifier, cfg_assembler->lineno);
                perror(NULL);
                cfg_assembler->status = ASSEMBLER_STATUS_FAIL;
                destroy_instruction(instr);
                assemble_status = 0;
            } 
            else {
                insert_front(cfg_assembler->tokenizer_list, (void *)tokenizer);
                cfg_assembler->tokenizer = tokenizer;
                cfg_assembler->lookahead = get_next_token(tokenizer);
            }
            break;
        }
        case DIRECTIVE_TEXT: 
            cfg_assembler->segment = SEGMENT_TEXT;
            break;
        case DIRECTIVE_DATA:
            cfg_assembler->segment = SEGMENT_DATA;
            cfg_assembler->auto_align = 1;
            break;
        case DIRECTIVE_KTEXT:
            cfg_assembler->segment = SEGMENT_KTEXT;
            break;
        case DIRECTIVE_KDATA:
            cfg_assembler->segment = SEGMENT_KDATA;
            break;
        case DIRECTIVE_ALIGN: {
            if(operand_list->value.integer > 31) {
                fprintf(stderr, "Directive '.align n' expects n to be within the range of [0, 31] on line %ld\n", cfg_assembler->lineno);
                cfg_assembler->status = ASSEMBLER_STATUS_FAIL;
                destroy_instruction(instr);
                assemble_status = 0;
            }
            else if(operand_list->value.integer == 0) {
                /* Disable automatic alignment of .half, .word, directives until next .data segment */
                cfg_assembler->auto_align = 0;
            }
            else {
                align_segment_offset(operand_list->value.integer);
            }
            break;
        }
        case DIRECTIVE_WORD: {
            struct operand_node *current_operand = operand_list;
            while(current_operand != NULL) {
                if(current_operand->operand & OPERAND_LABEL) {
                    /* Check if label has been defined */
                    struct symbol_table_entry *sym_entry = get_symbol_table(cfg_assembler->symbol_table, current_operand->identifier);
                    if(sym_entry->status == SYMBOL_UNDEFINED) {
                        /* Special case, this directive can take multiple undefined labels
                         * We must ensure that this instruction is appended only once */
                        if(assemble_status) insert_front(sym_entry->instr_list, (void *)instr);
                        incr_segment_offset(0x4);
                        assemble_status = 0;
                    }
                    else {
                        offset_t sym_offset = sym_entry->offset;
                        write_segment_memory((void *)&sym_offset, 0x4);
                        incr_segment_offset(0x4);
                    }
                }
                else {
                    int value = current_operand->value.integer;
                    write_segment_memory((void *)&value, 0x4);
                    incr_segment_offset(0x4);
                }
                current_operand = current_operand->next;
            }
            break;
        }
        case DIRECTIVE_HALF: {
            struct operand_node *current_operand = operand_list;
            while(current_operand != NULL) {
                int value = current_operand->value.integer;
                write_segment_memory((void *)&value, 0x2);
                incr_segment_offset(0x2);
                current_operand = current_operand->next;
            }
            break;
        }
        case DIRECTIVE_BYTE: {
            struct operand_node *current_operand = operand_list;
            while(current_operand != NULL) {
                int value = current_operand->value.integer;
                write_segment_memory((void *)&value, 0x1);
                incr_segment_offset(0x1);
                current_operand = current_operand->next;
            }
            break;
        }
        case DIRECTIVE_ASCII: {
            write_escaped_string(operand_list->identifier);
            break;
        }
        case DIRECTIVE_ASCIIZ: {
            int nullterm = '\0';
            write_escaped_string(operand_list->identifier);
            write_segment_memory((void *)&nullterm, 0x1);
            incr_segment_offset(0x1);
            break;
        }
        case DIRECTIVE_SPACE: {
            alloc_segment_memory(operand_list->value.integer);
            incr_segment_offset(operand_list->value.integer);
            break;
        }
    }

    return assemble_status;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq (%rdi), %r15
xorl %ebp, %ebp
cmpl $0xc, 0x8(%r15)
jne 0x5177
movq %rdi, %r14
movq 0x8(%rdi), %rbx
movq 0x10(%r15), %r12
movq %r15, %rdi
movq %rbx, %rsi
callq 0x3ff8
testl %eax, %eax
je 0x516d
movq %r12, %rax
subq 0x5ed8(%rip), %rax      # 0xafb8
sarq $0x3, %rax
addq $-0x3c, %rax
cmpq $0x4, %rax
ja 0x5105
cmpq $0x3, %rax
je 0x5105
movq 0x74bd(%rip), %rsi      # 0xc5b8
cmpb $0x1, 0x45(%rsi)
jne 0x541f
movzbl (%r12), %eax
movl $0x1, %ebp
addl $-0x39, %eax
cmpl $0xb, %eax
ja 0x5177
leaq 0x212a(%rip), %rcx      # 0x7248
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movq 0x8(%rbx), %rdi
callq 0x6b64
testq %rax, %rax
je 0x545d
movq %rax, %r15
movq 0x7475(%rip), %rax      # 0xc5b8
movq 0x8(%rax), %rdi
movq %r15, %rsi
callq 0x5963
movq 0x7462(%rip), %rax      # 0xc5b8
movq %r15, (%rax)
movq %r15, %rdi
callq 0x6bfa
movq 0x7450(%rip), %rcx      # 0xc5b8
movl %eax, 0x40(%rcx)
jmp 0x5177
movq %r14, %rdi
callq 0x4187
xorl %ebp, %ebp
movl %ebp, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movl 0x8(%rbx), %edi
callq 0x3880
movl 0x8(%rbx), %edi
jmp 0x51e5
movq 0x8(%rbx), %rdi
callq 0x39ef
movq 0x7413(%rip), %rax      # 0xc5b8
movzbl 0x45(%rax), %ebx
leal (,%rbx,4), %ecx
movl 0x48(%rax,%rcx), %r14d
leaq 0x20c4(%rip), %rax      # 0x7280
subl (%rcx,%rax), %r14d
movl $0x1, %edi
callq 0x3880
movq 0x73e7(%rip), %rax      # 0xc5b8
movq 0x20(%rax,%rbx,8), %rax
movb $0x0, (%rax,%r14)
movl $0x1, %ebp
movl $0x1, %edi
callq 0x37dc
jmp 0x5177
movq 0x73c5(%rip), %rax      # 0xc5b8
movb $0x2, 0x45(%rax)
jmp 0x5177
movq 0x73b5(%rip), %rax      # 0xc5b8
movw $0x101, 0x45(%rax)      # imm = 0x101
jmp 0x5177
movq 0x8(%rbx), %rdi
callq 0x39ef
jmp 0x5177
testq %rbx, %rbx
je 0x5177
leaq 0x2054(%rip), %r14      # 0x7280
movzwl 0x8(%rbx), %r15d
movq 0x7380(%rip), %rax      # 0xc5b8
movzbl 0x45(%rax), %r12d
leal (,%r12,4), %ecx
movl 0x48(%rax,%rcx), %r13d
subl (%rcx,%r14), %r13d
movl $0x2, %edi
callq 0x3880
movq 0x7359(%rip), %rax      # 0xc5b8
movq 0x20(%rax,%r12,8), %rax
movw %r15w, (%rax,%r13)
movl $0x2, %edi
callq 0x37dc
movq 0x10(%rbx), %rbx
testq %rbx, %rbx
jne 0x522c
jmp 0x5177
movq 0x7330(%rip), %rax      # 0xc5b8
movb $0x0, 0x45(%rax)
jmp 0x5177
testq %rbx, %rbx
je 0x5177
leaq 0x1fdf(%rip), %r14      # 0x7280
movb 0x8(%rbx), %bpl
movq 0x730c(%rip), %rax      # 0xc5b8
movzbl 0x45(%rax), %r15d
leal (,%r15,4), %ecx
movl 0x48(%rax,%rcx), %r12d
subl (%rcx,%r14), %r12d
movl $0x1, %edi
callq 0x3880
movq 0x72e5(%rip), %rax      # 0xc5b8
movq 0x20(%rax,%r15,8), %rax
movb %bpl, (%rax,%r12)
movl $0x1, %ebp
movl $0x1, %edi
callq 0x37dc
movq 0x10(%rbx), %rbx
testq %rbx, %rbx
jne 0x52a1
jmp 0x5177
movl 0x8(%rbx), %ecx
cmpl $0x20, %ecx
jae 0x5471
cmpl $0x1f, %ecx
je 0x5177
testl %ecx, %ecx
jne 0x542f
movq 0x729b(%rip), %rax      # 0xc5b8
movb $0x0, 0x46(%rax)
jmp 0x5177
movq 0x728b(%rip), %rax      # 0xc5b8
movb $0x3, 0x45(%rax)
jmp 0x5177
testq %rbx, %rbx
je 0x5177
movl $0x1, %r12d
testb $0x1, (%rbx)
jne 0x538d
movl 0x8(%rbx), %ebp
movq 0x7264(%rip), %rax      # 0xc5b8
movzbl 0x45(%rax), %r15d
leal (,%r15,4), %ecx
movl 0x48(%rax,%rcx), %r13d
leaq 0x1f13(%rip), %rax      # 0x7280
subl (%rcx,%rax), %r13d
movl $0x4, %edi
callq 0x3880
movq 0x7236(%rip), %rax      # 0xc5b8
movq 0x20(%rax,%r15,8), %rax
movl %ebp, (%rax,%r13)
jmp 0x53e8
movq 0x7224(%rip), %rax      # 0xc5b8
movq 0x10(%rax), %rdi
movq 0x8(%rbx), %rsi
callq 0x616b
cmpb $0x0, 0x8(%rax)
je 0x540a
movl 0xc(%rax), %ebp
movq 0x7207(%rip), %rax      # 0xc5b8
movzbl 0x45(%rax), %r13d
leal (,%r13,4), %ecx
movl 0x48(%rax,%rcx), %r15d
leaq 0x1eb6(%rip), %rax      # 0x7280
subl (%rcx,%rax), %r15d
movl $0x4, %edi
callq 0x3880
movq 0x71d9(%rip), %rax      # 0xc5b8
movq 0x20(%rax,%r13,8), %rax
movl %ebp, (%rax,%r15)
movl %r12d, %ebp
movl $0x4, %edi
callq 0x37dc
movq 0x10(%rbx), %rbx
movl %ebp, %r12d
testq %rbx, %rbx
jne 0x5345
jmp 0x5177
xorl %ebp, %ebp
testl %r12d, %r12d
je 0x53eb
movq 0x18(%rax), %rdi
movq %r14, %rsi
callq 0x5963
jmp 0x53eb
movq %r15, %rdi
movq %r14, %rdx
callq 0x3275
jmp 0x5175
movl $0x1, %edx
shll %cl, %edx
movq 0x717b(%rip), %rax      # 0xc5b8
movzbl 0x45(%rax), %ecx
movl 0x48(%rax,%rcx,4), %esi
leal -0x1(%rdx), %edi
andl %esi, %edi
je 0x5177
addl %edx, %esi
subl %edi, %esi
movl %esi, 0x48(%rax,%rcx,4)
jmp 0x5177
addq $0x8, %rbx
movq %rbx, %rdi
movq %r14, %rsi
callq 0x32f0
jmp 0x5175
movq %r14, %rdi
callq 0x32b2
jmp 0x5175