// File: /workspace/github_c_makefile_star2_O1/Ihsoh[P]ilang/compiler/assembler/ins_enc.c
// Function: ins_enc_XXX_rAX_Iz
void ins_enc_XXX_rAX_Iz(
	Instruction *ins,
	InstructionEncoderData *data
) {
	_CHECK_PARAMS(2);

	ParserASTNode *ins_node = data->ins_node;

	ParserASTNode *target = data->ins_node->childs[0];

	ParserASTNode *source = data->ins_node->childs[1];

	EncoderInstruction enc_ins;

	ins_init(data->ctx, ins, ins_node, &enc_ins);

	int arch = ASM_PARSER_CONTEXT_DATA_GET_ARCH(data->ctx);

	InsRegister *target_reg = ASM_REG_AST_NODE_GET_REG(target);

	switch (arch) {
		case ASM_ARCH_BIT16: {
			switch (target_reg->id) {
				case INS_AM_AX: {
					ins_fill_imm16(data->ctx, ins, source, &enc_ins);
					break;
				}
				case INS_AM_EAX: {
					enc_ins.legacy_prefix.operand_size_override = true;
					ins_fill_imm32(data->ctx, ins, source, &enc_ins);
					break;
				}
				case INS_AM_RAX: {
					data->ctx->syntax_error_node_msg(
						data->ctx,
						ins_node,
						"instruction not supported in 16-bit mode."
					);
					break;
				}
				default: {
					assert(0);
					break;
				}
			}
			break;
		}
		case ASM_ARCH_BIT32: {
			switch (target_reg->id) {
				case INS_AM_AX: {
					enc_ins.legacy_prefix.operand_size_override = true;
					ins_fill_imm16(data->ctx, ins, source, &enc_ins);
					break;
				}
				case INS_AM_EAX: {
					ins_fill_imm32(data->ctx, ins, source, &enc_ins);
					break;
				}
				case INS_AM_RAX: {
					data->ctx->syntax_error_node_msg(
						data->ctx,
						ins_node,
						"instruction not supported in 32-bit mode."
					);
					break;
				}
				default: {
					assert(0);
					break;
				}
			}
			break;
		}
		case ASM_ARCH_BIT64: {
			switch (target_reg->id) {
				case INS_AM_AX: {
					enc_ins.legacy_prefix.operand_size_override = true;
					ins_fill_imm16(data->ctx, ins, source, &enc_ins);
					break;
				}
				case INS_AM_EAX: {
					ins_fill_imm32(data->ctx, ins, source, &enc_ins);
					break;
				}
				case INS_AM_RAX: {
					enc_ins.rex_prefix_used = true;
					enc_ins.rex_prefix.w = 1;
					ins_fill_imm32(data->ctx, ins, source, &enc_ins);
					break;
				}
				default: {
					assert(0);
					break;
				}
			}
			break;
		}
		default: {
			assert(0);
			break;
		}
	}

	_output(data, &enc_ins);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
testq %rdi, %rdi
je 0x188a3
movq %rsi, %rbx
testq %rsi, %rsi
je 0x188ac
movq (%rbx), %r12
testq %r12, %r12
je 0x188b5
cmpl $0x2, 0x44(%r12)
jne 0x188be
movq %rdi, %r14
movq 0x48(%r12), %rax
movq (%rax), %r13
movq 0x8(%rax), %r15
movq 0x8(%rbx), %rdi
leaq -0x88(%rbp), %rcx
movq %r14, %rsi
movq %r12, %rdx
callq 0x155a6
movq 0x8(%rbx), %rdi
movl 0xb0(%rdi), %ecx
movq 0x60(%r13), %rax
cmpl $0x4, %ecx
je 0x1880b
cmpl $0x2, %ecx
je 0x187d4
cmpl $0x1, %ecx
jne 0x188dd
movl 0x8(%rax), %eax
cmpl $0x8a00, %eax           # imm = 0x8A00
je 0x18878
cmpl $0x8900, %eax           # imm = 0x8900
je 0x18860
cmpl $0x8800, %eax           # imm = 0x8800
jne 0x188fc
leaq -0x88(%rbp), %rcx
jmp 0x18832
movl 0x8(%rax), %eax
cmpl $0x8a00, %eax           # imm = 0x8A00
je 0x18848
cmpl $0x8900, %eax           # imm = 0x8900
je 0x1883f
cmpl $0x8800, %eax           # imm = 0x8800
je 0x18827
leaq 0x16ba1(%rip), %rdi     # 0x2f394
leaq 0x1a49a(%rip), %rsi     # 0x32c94
leaq 0x1a65e(%rip), %rcx     # 0x32e5f
movl $0xf6, %edx
callq 0xa0b0
movl 0x8(%rax), %eax
cmpl $0x8a00, %eax           # imm = 0x8A00
je 0x18851
cmpl $0x8900, %eax           # imm = 0x8900
je 0x1883f
cmpl $0x8800, %eax           # imm = 0x8800
jne 0x1891b
leaq -0x88(%rbp), %rcx
movb $0x1, 0xb(%rcx)
movq %r14, %rsi
movq %r15, %rdx
callq 0x160a9
jmp 0x18885
leaq -0x88(%rbp), %rcx
jmp 0x1886b
leaq 0x1a67b(%rip), %rdx     # 0x32eca
jmp 0x1887f
leaq -0x88(%rbp), %rcx
movw $0x101, 0xd(%rcx)       # imm = 0x101
jmp 0x1886b
leaq -0x88(%rbp), %rcx
movb $0x1, 0xb(%rcx)
movq %r14, %rsi
movq %r15, %rdx
callq 0x1619f
jmp 0x18885
leaq 0x1a621(%rip), %rdx     # 0x32ea0
movq %r12, %rsi
callq *0x58(%rdi)
leaq -0x88(%rbp), %rsi
movq %rbx, %rdi
callq 0x181fc
addq $0x68, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0x18ed0(%rip), %rdi     # 0x3177a
jmp 0x188c5
leaq 0x1ed41(%rip), %rdi     # 0x375f4
jmp 0x188c5
leaq 0x1a435(%rip), %rdi     # 0x32cf1
jmp 0x188c5
leaq 0x1a43b(%rip), %rdi     # 0x32d00
leaq 0x1a3c8(%rip), %rsi     # 0x32c94
leaq 0x1a58c(%rip), %rcx     # 0x32e5f
movl $0xb7, %edx
callq 0xa0b0
leaq 0x16ab0(%rip), %rdi     # 0x2f394
leaq 0x1a3a9(%rip), %rsi     # 0x32c94
leaq 0x1a56d(%rip), %rcx     # 0x32e5f
movl $0x115, %edx            # imm = 0x115
callq 0xa0b0
leaq 0x16a91(%rip), %rdi     # 0x2f394
leaq 0x1a38a(%rip), %rsi     # 0x32c94
leaq 0x1a54e(%rip), %rcx     # 0x32e5f
movl $0xdc, %edx
callq 0xa0b0
leaq 0x16a72(%rip), %rdi     # 0x2f394
leaq 0x1a36b(%rip), %rsi     # 0x32c94
leaq 0x1a52f(%rip), %rcx     # 0x32e5f
movl $0x10e, %edx            # imm = 0x10E
callq 0xa0b0