// File: /workspace/github_c_makefile_star2_O0/mjosaarinen[P]brutus/crypto_aead/minalpherv11/avx2/MinalpherCore.cpp
// Function: format_return_quadruple_block(long long vector[4] const*, long long vector[4] const*, long long vector[4]&, long long vector[4]&, long long vector[4]&, long long vector[4]&)
void format_return_quadruple_block(
  const __m256i             ymmA[4], /* I                            */
  const __m256i             ymmB[4], /* I                            */
  __m256i                   &DATA1,  /* O                            */
  __m256i                   &DATA2,  /* O                            */
  __m256i                   &DATA3,  /* O                            */
  __m256i                   &DATA4   /* O                            */
  )
{
  /*==== FORMAT CHANGE ====*/
  //Constant Load
  const __m256i ymmMaskFF = _mm256_set_epi16(0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF);

  //FORMAT RETRUN
  __m256i tmp0 = _mm256_srli_epi16(ymmA[0], 4);
  __m256i tmp1 = _mm256_srli_epi16(ymmB[0], 4);
  __m256i tmp2 = _mm256_srli_epi16(ymmA[1], 4);
  __m256i tmp3 = _mm256_srli_epi16(ymmB[1], 4);
  __m256i tmp4 = _mm256_srli_epi16(ymmA[2], 4);
  __m256i tmp5 = _mm256_srli_epi16(ymmB[2], 4);
  __m256i tmp6 = _mm256_srli_epi16(ymmA[3], 4);
  __m256i tmp7 = _mm256_srli_epi16(ymmB[3], 4);

  tmp0 = _mm256_xor_si256(tmp0, ymmA[0]);
  tmp1 = _mm256_xor_si256(tmp1, ymmB[0]);
  tmp2 = _mm256_xor_si256(tmp2, ymmA[1]);
  tmp3 = _mm256_xor_si256(tmp3, ymmB[1]);
  tmp4 = _mm256_xor_si256(tmp4, ymmA[2]);
  tmp5 = _mm256_xor_si256(tmp5, ymmB[2]);
  tmp6 = _mm256_xor_si256(tmp6, ymmA[3]);
  tmp7 = _mm256_xor_si256(tmp7, ymmB[3]);

  tmp0 = _mm256_and_si256(ymmMaskFF, tmp0);
  tmp1 = _mm256_and_si256(ymmMaskFF, tmp1);
  tmp2 = _mm256_and_si256(ymmMaskFF, tmp2);
  tmp3 = _mm256_and_si256(ymmMaskFF, tmp3);
  tmp4 = _mm256_and_si256(ymmMaskFF, tmp4);
  tmp5 = _mm256_and_si256(ymmMaskFF, tmp5);
  tmp6 = _mm256_and_si256(ymmMaskFF, tmp6);
  tmp7 = _mm256_and_si256(ymmMaskFF, tmp7);

  //PACK
  __m256i DATA_A = _mm256_packus_epi16(tmp0, tmp1);
  __m256i DATA_B = _mm256_packus_epi16(tmp2, tmp3);
  __m256i DATA_C = _mm256_packus_epi16(tmp4, tmp5);
  __m256i DATA_D = _mm256_packus_epi16(tmp6, tmp7);

  //PERM
  tmp0 = _mm256_permute2x128_si256(DATA_A, DATA_C, 0x20);
  tmp1 = _mm256_permute2x128_si256(DATA_B, DATA_D, 0x20);
  tmp2 = _mm256_permute2x128_si256(DATA_A, DATA_C, 0x31);
  tmp3 = _mm256_permute2x128_si256(DATA_B, DATA_D, 0x31);

  //UNPACK
  DATA_A = _mm256_unpacklo_epi32(tmp0, tmp1);
  DATA_B = _mm256_unpackhi_epi32(tmp0, tmp1);
  DATA_C = _mm256_unpacklo_epi32(tmp2, tmp3);
  DATA_D = _mm256_unpackhi_epi32(tmp2, tmp3);

  DATA1 = _mm256_unpacklo_epi32(DATA_A, DATA_B);
  DATA2 = _mm256_unpackhi_epi32(DATA_A, DATA_B);
  DATA3 = _mm256_unpacklo_epi32(DATA_C, DATA_D);
  DATA4 = _mm256_unpackhi_epi32(DATA_C, DATA_D);
  /*==== END FORMAT CHANGE ====*/
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0xb40, %rsp            # imm = 0xB40
movq %rdi, 0x1d8(%rsp)
movq %rsi, 0x1d0(%rsp)
movq %rdx, 0x1c8(%rsp)
movq %rcx, 0x1c0(%rsp)
movq %r8, 0x1b8(%rsp)
movq %r9, 0x1b0(%rsp)
movw $0xff, 0x81e(%rsp)
movw $0xff, 0x81c(%rsp)
movw $0xff, 0x81a(%rsp)
movw $0xff, 0x818(%rsp)
movw $0xff, 0x816(%rsp)
movw $0xff, 0x814(%rsp)
movw $0xff, 0x812(%rsp)
movw $0xff, 0x810(%rsp)
movw $0xff, 0x80e(%rsp)
movw $0xff, 0x80c(%rsp)
movw $0xff, 0x80a(%rsp)
movw $0xff, 0x808(%rsp)
movw $0xff, 0x806(%rsp)
movw $0xff, 0x804(%rsp)
movw $0xff, 0x802(%rsp)
movw $0xff, 0x800(%rsp)
movzwl 0x800(%rsp), %eax
vmovd %eax, %xmm0
movzwl 0x802(%rsp), %eax
vpinsrw $0x1, %eax, %xmm0, %xmm0
movzwl 0x804(%rsp), %eax
vpinsrw $0x2, %eax, %xmm0, %xmm0
movzwl 0x806(%rsp), %eax
vpinsrw $0x3, %eax, %xmm0, %xmm0
movzwl 0x808(%rsp), %eax
vpinsrw $0x4, %eax, %xmm0, %xmm0
movzwl 0x80a(%rsp), %eax
vpinsrw $0x5, %eax, %xmm0, %xmm0
movzwl 0x80c(%rsp), %eax
vpinsrw $0x6, %eax, %xmm0, %xmm0
movzwl 0x80e(%rsp), %eax
vpinsrw $0x7, %eax, %xmm0, %xmm0
movzwl 0x810(%rsp), %eax
vmovd %eax, %xmm1
movzwl 0x812(%rsp), %eax
vpinsrw $0x1, %eax, %xmm1, %xmm1
movzwl 0x814(%rsp), %eax
vpinsrw $0x2, %eax, %xmm1, %xmm1
movzwl 0x816(%rsp), %eax
vpinsrw $0x3, %eax, %xmm1, %xmm1
movzwl 0x818(%rsp), %eax
vpinsrw $0x4, %eax, %xmm1, %xmm1
movzwl 0x81a(%rsp), %eax
vpinsrw $0x5, %eax, %xmm1, %xmm1
movzwl 0x81c(%rsp), %eax
vpinsrw $0x6, %eax, %xmm1, %xmm1
movzwl 0x81e(%rsp), %eax
vpinsrw $0x7, %eax, %xmm1, %xmm1
vmovdqa %xmm1, 0x7f0(%rsp)
vmovdqa %xmm0, 0x7e0(%rsp)
vmovdqa 0x7e0(%rsp), %ymm0
vmovdqa %ymm0, 0x180(%rsp)
movq 0x1d8(%rsp), %rax
vmovdqa (%rax), %ymm0
vmovdqa %ymm0, 0x5c0(%rsp)
movl $0x4, 0x5bc(%rsp)
vmovdqa 0x5c0(%rsp), %ymm0
vmovd 0x5bc(%rsp), %xmm1
vpsrlw %xmm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x160(%rsp)
movq 0x1d0(%rsp), %rax
vmovdqa (%rax), %ymm0
vmovdqa %ymm0, 0x580(%rsp)
movl $0x4, 0x57c(%rsp)
vmovdqa 0x580(%rsp), %ymm0
vmovd 0x57c(%rsp), %xmm1
vpsrlw %xmm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x140(%rsp)
movq 0x1d8(%rsp), %rax
vmovdqa 0x20(%rax), %ymm0
vmovdqa %ymm0, 0x540(%rsp)
movl $0x4, 0x53c(%rsp)
vmovdqa 0x540(%rsp), %ymm0
vmovd 0x53c(%rsp), %xmm1
vpsrlw %xmm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x120(%rsp)
movq 0x1d0(%rsp), %rax
vmovdqa 0x20(%rax), %ymm0
vmovdqa %ymm0, 0x500(%rsp)
movl $0x4, 0x4fc(%rsp)
vmovdqa 0x500(%rsp), %ymm0
vmovd 0x4fc(%rsp), %xmm1
vpsrlw %xmm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x100(%rsp)
movq 0x1d8(%rsp), %rax
vmovdqa 0x40(%rax), %ymm0
vmovdqa %ymm0, 0x4c0(%rsp)
movl $0x4, 0x4bc(%rsp)
vmovdqa 0x4c0(%rsp), %ymm0
vmovd 0x4bc(%rsp), %xmm1
vpsrlw %xmm1, %ymm0, %ymm0
vmovdqa %ymm0, 0xe0(%rsp)
movq 0x1d0(%rsp), %rax
vmovdqa 0x40(%rax), %ymm0
vmovdqa %ymm0, 0x480(%rsp)
movl $0x4, 0x47c(%rsp)
vmovdqa 0x480(%rsp), %ymm0
vmovd 0x47c(%rsp), %xmm1
vpsrlw %xmm1, %ymm0, %ymm0
vmovdqa %ymm0, 0xc0(%rsp)
movq 0x1d8(%rsp), %rax
vmovdqa 0x60(%rax), %ymm0
vmovdqa %ymm0, 0x440(%rsp)
movl $0x4, 0x43c(%rsp)
vmovdqa 0x440(%rsp), %ymm0
vmovd 0x43c(%rsp), %xmm1
vpsrlw %xmm1, %ymm0, %ymm0
vmovdqa %ymm0, 0xa0(%rsp)
movq 0x1d0(%rsp), %rax
vmovdqa 0x60(%rax), %ymm0
vmovdqa %ymm0, 0x400(%rsp)
movl $0x4, 0x3fc(%rsp)
vmovdqa 0x400(%rsp), %ymm0
vmovd 0x3fc(%rsp), %xmm1
vpsrlw %xmm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x80(%rsp)
vmovdqa 0x160(%rsp), %ymm1
movq 0x1d8(%rsp), %rax
vmovdqa (%rax), %ymm0
vmovdqa %ymm1, 0x7c0(%rsp)
vmovdqa %ymm0, 0x7a0(%rsp)
vmovdqa 0x7c0(%rsp), %ymm0
vmovdqa 0x7a0(%rsp), %ymm1
vpxor %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x160(%rsp)
vmovdqa 0x140(%rsp), %ymm1
movq 0x1d0(%rsp), %rax
vmovdqa (%rax), %ymm0
vmovdqa %ymm1, 0x780(%rsp)
vmovdqa %ymm0, 0x760(%rsp)
vmovdqa 0x780(%rsp), %ymm0
vmovdqa 0x760(%rsp), %ymm1
vpxor %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x140(%rsp)
vmovdqa 0x120(%rsp), %ymm1
movq 0x1d8(%rsp), %rax
vmovdqa 0x20(%rax), %ymm0
vmovdqa %ymm1, 0x740(%rsp)
vmovdqa %ymm0, 0x720(%rsp)
vmovdqa 0x740(%rsp), %ymm0
vmovdqa 0x720(%rsp), %ymm1
vpxor %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x120(%rsp)
vmovdqa 0x100(%rsp), %ymm1
movq 0x1d0(%rsp), %rax
vmovdqa 0x20(%rax), %ymm0
vmovdqa %ymm1, 0x700(%rsp)
vmovdqa %ymm0, 0x6e0(%rsp)
vmovdqa 0x700(%rsp), %ymm0
vmovdqa 0x6e0(%rsp), %ymm1
vpxor %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x100(%rsp)
vmovdqa 0xe0(%rsp), %ymm1
movq 0x1d8(%rsp), %rax
vmovdqa 0x40(%rax), %ymm0
vmovdqa %ymm1, 0x6c0(%rsp)
vmovdqa %ymm0, 0x6a0(%rsp)
vmovdqa 0x6c0(%rsp), %ymm0
vmovdqa 0x6a0(%rsp), %ymm1
vpxor %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0xe0(%rsp)
vmovdqa 0xc0(%rsp), %ymm1
movq 0x1d0(%rsp), %rax
vmovdqa 0x40(%rax), %ymm0
vmovdqa %ymm1, 0x680(%rsp)
vmovdqa %ymm0, 0x660(%rsp)
vmovdqa 0x680(%rsp), %ymm0
vmovdqa 0x660(%rsp), %ymm1
vpxor %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0xc0(%rsp)
vmovdqa 0xa0(%rsp), %ymm1
movq 0x1d8(%rsp), %rax
vmovdqa 0x60(%rax), %ymm0
vmovdqa %ymm1, 0x640(%rsp)
vmovdqa %ymm0, 0x620(%rsp)
vmovdqa 0x640(%rsp), %ymm0
vmovdqa 0x620(%rsp), %ymm1
vpxor %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0xa0(%rsp)
vmovdqa 0x80(%rsp), %ymm1
movq 0x1d0(%rsp), %rax
vmovdqa 0x60(%rax), %ymm0
vmovdqa %ymm1, 0x600(%rsp)
vmovdqa %ymm0, 0x5e0(%rsp)
vmovdqa 0x600(%rsp), %ymm0
vmovdqa 0x5e0(%rsp), %ymm1
vpxor %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x80(%rsp)
vmovdqa 0x180(%rsp), %ymm1
vmovdqa 0x160(%rsp), %ymm0
vmovdqa %ymm1, 0x3c0(%rsp)
vmovdqa %ymm0, 0x3a0(%rsp)
vmovdqa 0x3c0(%rsp), %ymm0
vmovdqa 0x3a0(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x160(%rsp)
vmovdqa 0x180(%rsp), %ymm1
vmovdqa 0x140(%rsp), %ymm0
vmovdqa %ymm1, 0x380(%rsp)
vmovdqa %ymm0, 0x360(%rsp)
vmovdqa 0x380(%rsp), %ymm0
vmovdqa 0x360(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x140(%rsp)
vmovdqa 0x180(%rsp), %ymm1
vmovdqa 0x120(%rsp), %ymm0
vmovdqa %ymm1, 0x340(%rsp)
vmovdqa %ymm0, 0x320(%rsp)
vmovdqa 0x340(%rsp), %ymm0
vmovdqa 0x320(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x120(%rsp)
vmovdqa 0x180(%rsp), %ymm1
vmovdqa 0x100(%rsp), %ymm0
vmovdqa %ymm1, 0x300(%rsp)
vmovdqa %ymm0, 0x2e0(%rsp)
vmovdqa 0x300(%rsp), %ymm0
vmovdqa 0x2e0(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x100(%rsp)
vmovdqa 0x180(%rsp), %ymm1
vmovdqa 0xe0(%rsp), %ymm0
vmovdqa %ymm1, 0x2c0(%rsp)
vmovdqa %ymm0, 0x2a0(%rsp)
vmovdqa 0x2c0(%rsp), %ymm0
vmovdqa 0x2a0(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0xe0(%rsp)
vmovdqa 0x180(%rsp), %ymm1
vmovdqa 0xc0(%rsp), %ymm0
vmovdqa %ymm1, 0x280(%rsp)
vmovdqa %ymm0, 0x260(%rsp)
vmovdqa 0x280(%rsp), %ymm0
vmovdqa 0x260(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0xc0(%rsp)
vmovdqa 0x180(%rsp), %ymm1
vmovdqa 0xa0(%rsp), %ymm0
vmovdqa %ymm1, 0x240(%rsp)
vmovdqa %ymm0, 0x220(%rsp)
vmovdqa 0x240(%rsp), %ymm0
vmovdqa 0x220(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0xa0(%rsp)
vmovdqa 0x180(%rsp), %ymm1
vmovdqa 0x80(%rsp), %ymm0
vmovdqa %ymm1, 0x200(%rsp)
vmovdqa %ymm0, 0x1e0(%rsp)
vmovdqa 0x200(%rsp), %ymm0
vmovdqa 0x1e0(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x80(%rsp)
vmovdqa 0x160(%rsp), %ymm1
vmovdqa 0x140(%rsp), %ymm0
vmovdqa %ymm1, 0x900(%rsp)
vmovdqa %ymm0, 0x8e0(%rsp)
vmovdqa 0x900(%rsp), %ymm0
vmovdqa 0x8e0(%rsp), %ymm1
vpackuswb %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x60(%rsp)
vmovdqa 0x120(%rsp), %ymm1
vmovdqa 0x100(%rsp), %ymm0
vmovdqa %ymm1, 0x8c0(%rsp)
vmovdqa %ymm0, 0x8a0(%rsp)
vmovdqa 0x8c0(%rsp), %ymm0
vmovdqa 0x8a0(%rsp), %ymm1
vpackuswb %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x40(%rsp)
vmovdqa 0xe0(%rsp), %ymm1
vmovdqa 0xc0(%rsp), %ymm0
vmovdqa %ymm1, 0x880(%rsp)
vmovdqa %ymm0, 0x860(%rsp)
vmovdqa 0x880(%rsp), %ymm0
vmovdqa 0x860(%rsp), %ymm1
vpackuswb %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x20(%rsp)
vmovdqa 0xa0(%rsp), %ymm1
vmovdqa 0x80(%rsp), %ymm0
vmovdqa %ymm1, 0x840(%rsp)
vmovdqa %ymm0, 0x820(%rsp)
vmovdqa 0x840(%rsp), %ymm0
vmovdqa 0x820(%rsp), %ymm1
vpackuswb %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, (%rsp)
vmovdqa 0x60(%rsp), %ymm0
vmovdqa 0x20(%rsp), %ymm1
vperm2i128 $0x20, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0,1],ymm1[0,1]
vmovdqa %ymm0, 0x160(%rsp)
vmovdqa 0x40(%rsp), %ymm0
vmovdqa (%rsp), %ymm1
vperm2i128 $0x20, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0,1],ymm1[0,1]
vmovdqa %ymm0, 0x140(%rsp)
vmovdqa 0x60(%rsp), %ymm0
vmovdqa 0x20(%rsp), %ymm1
vperm2i128 $0x31, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[2,3],ymm1[2,3]
vmovdqa %ymm0, 0x120(%rsp)
vmovdqa 0x40(%rsp), %ymm0
vmovdqa (%rsp), %ymm1
vperm2i128 $0x31, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[2,3],ymm1[2,3]
vmovdqa %ymm0, 0x100(%rsp)
vmovdqa 0x160(%rsp), %ymm1
vmovdqa 0x140(%rsp), %ymm0
vmovdqa %ymm1, 0xa00(%rsp)
vmovdqa %ymm0, 0x9e0(%rsp)
vmovdqa 0xa00(%rsp), %ymm0
vmovdqa 0x9e0(%rsp), %ymm1
vpunpckldq %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
vmovdqa %ymm0, 0x60(%rsp)
vmovdqa 0x160(%rsp), %ymm1
vmovdqa 0x140(%rsp), %ymm0
vmovdqa %ymm1, 0xb00(%rsp)
vmovdqa %ymm0, 0xae0(%rsp)
vmovdqa 0xb00(%rsp), %ymm0
vmovdqa 0xae0(%rsp), %ymm1
vpunpckhdq %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
vmovdqa %ymm0, 0x40(%rsp)
vmovdqa 0x120(%rsp), %ymm1
vmovdqa 0x100(%rsp), %ymm0
vmovdqa %ymm1, 0x9c0(%rsp)
vmovdqa %ymm0, 0x9a0(%rsp)
vmovdqa 0x9c0(%rsp), %ymm0
vmovdqa 0x9a0(%rsp), %ymm1
vpunpckldq %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
vmovdqa %ymm0, 0x20(%rsp)
vmovdqa 0x120(%rsp), %ymm1
vmovdqa 0x100(%rsp), %ymm0
vmovdqa %ymm1, 0xac0(%rsp)
vmovdqa %ymm0, 0xaa0(%rsp)
vmovdqa 0xac0(%rsp), %ymm0
vmovdqa 0xaa0(%rsp), %ymm1
vpunpckhdq %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
vmovdqa %ymm0, (%rsp)
vmovdqa 0x60(%rsp), %ymm1
vmovdqa 0x40(%rsp), %ymm0
vmovdqa %ymm1, 0x980(%rsp)
vmovdqa %ymm0, 0x960(%rsp)
vmovdqa 0x980(%rsp), %ymm0
vmovdqa 0x960(%rsp), %ymm1
vpunpckldq %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
movq 0x1c8(%rsp), %rax
vmovdqa %ymm0, (%rax)
vmovdqa 0x60(%rsp), %ymm1
vmovdqa 0x40(%rsp), %ymm0
vmovdqa %ymm1, 0xa80(%rsp)
vmovdqa %ymm0, 0xa60(%rsp)
vmovdqa 0xa80(%rsp), %ymm0
vmovdqa 0xa60(%rsp), %ymm1
vpunpckhdq %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
movq 0x1c0(%rsp), %rax
vmovdqa %ymm0, (%rax)
vmovdqa 0x20(%rsp), %ymm1
vmovdqa (%rsp), %ymm0
vmovdqa %ymm1, 0x940(%rsp)
vmovdqa %ymm0, 0x920(%rsp)
vmovdqa 0x940(%rsp), %ymm0
vmovdqa 0x920(%rsp), %ymm1
vpunpckldq %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
movq 0x1b8(%rsp), %rax
vmovdqa %ymm0, (%rax)
vmovdqa 0x20(%rsp), %ymm1
vmovdqa (%rsp), %ymm0
vmovdqa %ymm1, 0xa40(%rsp)
vmovdqa %ymm0, 0xa20(%rsp)
vmovdqa 0xa40(%rsp), %ymm0
vmovdqa 0xa20(%rsp), %ymm1
vpunpckhdq %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
movq 0x1b0(%rsp), %rax
vmovdqa %ymm0, (%rax)
movq %rbp, %rsp
popq %rbp
vzeroupper
retq
nopl (%rax,%rax)