// File: /workspace/github_cpp_makefile_star2_O2/dramninjasUMD[P]BOBSim/SimpleController.cpp
// Function: BOBSim::SimpleController::Update()
void SimpleController::Update()
{
	//
	//Stats
	//
	unsigned currentCount = 0;
	//count all the ACTIVATES waiting in the queue
	for(unsigned i=0; i<commandQueue.size(); i++)
	{
		if(commandQueue[i]->busPacketType==ACTIVATE)
		{
			currentCount++;
		}
	}
	if(currentCount>commandQueueMax) commandQueueMax = currentCount;

	//cumulative rolling average
	commandQueueAverage += currentCount;

	//count the number of idle banks
	unsigned num=0;
	for(unsigned r=0; r<NUM_RANKS; r++)
	{
		for(unsigned b=0; b<NUM_BANKS; b++)
		{
			if(bankStates[r][b].currentBankState==IDLE)
			{
				num++;
			}
		}
	}
	numIdleBanksAverage += num;

	//count the number of active banks
	unsigned numActive=0;
	for(unsigned r=0; r<NUM_RANKS; r++)
	{
		for(unsigned b=0; b<NUM_BANKS; b++)
		{
			if(bankStates[r][b].currentBankState==ROW_ACTIVE)
			{
				numActive++;
			}
		}
	}
	numActBanksAverage += numActive;

	//count the number of precharging banks
	unsigned numPre=0;
	for(unsigned r=0; r<NUM_RANKS; r++)
	{
		for(unsigned b=0; b<NUM_BANKS; b++)
		{
			if(bankStates[r][b].currentBankState==PRECHARGING)
			{
				numPre++;
			}
		}
	}
	numPreBanksAverage += numPre;

	//count the number of refreshing banks
	unsigned numRef=0;
	for(unsigned r=0; r<NUM_RANKS; r++)
	{
		for(unsigned b=0; b<NUM_BANKS; b++)
		{
			if(bankStates[r][b].currentBankState==REFRESHING)
			{
				numRef++;
			}
		}
	}
	numRefBanksAverage += numRef;

	//
	//Power
	//
	for(unsigned r=0; r<NUM_RANKS; r++)
	{
		bool bankOpen = false;
		for(unsigned b=0; b<NUM_RANKS; b++)
		{
			if(bankStates[r][b].currentBankState == ROW_ACTIVE ||
			        bankStates[r][b].currentBankState == REFRESHING)
			{
				bankOpen = true;
				break;
			}
		}

		if(bankOpen)
		{
			//DRAM_BUS_WIDTH/2 because value accounts for DDR
			backgroundEnergy[r] += IDD3N * ((DRAM_BUS_WIDTH/2 * 8) / DEVICE_WIDTH);
		}
		else
		{
			//DRAM_BUS_WIDTH/2 because value accounts for DDR
			idd2nCount[r]++;
			backgroundEnergy[r] += IDD2N * ((DRAM_BUS_WIDTH/2 * 8) / DEVICE_WIDTH);
		}
	}


	//
	//Update
	//
	//Updates the sliding window for tFAW
	for(unsigned r=0; r<NUM_RANKS; r++)
	{
		for(unsigned i=0; i<tFAWWindow[r].size(); i++)
		{
			tFAWWindow[r][i]--;
			if(tFAWWindow[r][i]==0) tFAWWindow[r].erase(tFAWWindow[r].begin());
		}
	}

	//Updates the bank states for each rank
	for(unsigned r=0; r<NUM_RANKS; r++)
	{
		for(unsigned b=0; b<NUM_BANKS; b++)
		{
			bankStates[r][b].UpdateStateChange();
		}
	}

	//Handle refresh counters
	for(unsigned i=0; i<NUM_RANKS; i++)
	{
		if(refreshCounters[i]>0)
		{
			refreshCounters[i]--;
		}
	}

	//Send write data to data bus
	for(unsigned i=0; i<writeBurstCountdown.size(); i++)
	{
		writeBurstCountdown[i]--;
	}
	if(writeBurstCountdown.size()>0&&writeBurstCountdown[0]==0)
	{
		if(DEBUG_CHANNEL) DEBUG("     == Sending Write Data : "<<*writeBurstQueue[0]);
		(*DataCallback)(writeBurstQueue[0],0);
		writeBurstQueue.erase(writeBurstQueue.begin());
		writeBurstCountdown.erase(writeBurstCountdown.begin());
	}

	bool issuingRefresh = false;
	bool canIssueRefresh = true;

	//Figure out if everyone who needs a refresh can actually receive one
	for(unsigned r=0; r<NUM_RANKS; r++)
	{
		if(refreshCounters[r]==0)
		{
			if(DEBUG_CHANNEL) DEBUG("      !! -- Rank "<<r<<" needs refresh");
			//Check to be sure we can issue a refresh
			for(unsigned b=0; b<NUM_BANKS; b++)
			{
				if(bankStates[r][b].nextActivate > currentClockCycle ||
				        bankStates[r][b].currentBankState != IDLE)
				{
					canIssueRefresh = false;

				}
			}

			//Once all counters have reached 0 and everyone is either idle or ready to accept refresh-CAS
			if(canIssueRefresh)
			{
				if(DEBUG_CHANNEL) DEBUGN("-- !! Refresh is issuable - Sending : ");

				//BusPacketType packtype, unsigned transactionID, unsigned col, unsigned rw, unsigned r, unsigned b, unsigned prt, unsigned bl
				BusPacket *refreshPacket = new BusPacket(REFRESH, -1, 0, 0, r, 0, 0, 0, 0, 0, false);
				refreshPacket->channel = channel->channelID;

				//Send to command bus
				(*CommandCallback)(refreshPacket,0);

				//make sure we don't send anythign else
				issuingRefresh = true;

				refreshEnergy[r] += (IDD5B-IDD3N) * tRFC * ((DRAM_BUS_WIDTH/2 * 8) / DEVICE_WIDTH);

				for(unsigned b=0; b<NUM_BANKS; b++)
				{
					bankStates[r][b].currentBankState = REFRESHING;
					bankStates[r][b].stateChangeCountdown = tRFC;
					bankStates[r][b].nextActivate = currentClockCycle + tRFC;
					bankStates[r][b].lastCommand = REFRESH;
				}

				//reset refresh counters
				for(unsigned i=0; i<NUM_RANKS; i++)
				{
					if(refreshCounters[r]==0)
					{
						refreshCounters[r] = 7800/tCK;
					}
				}

				//only issue one
				break;
			}
		}
	}

	//If no refresh is being issued then do this block
	if(!issuingRefresh)
	{
		for(unsigned i=0; i<commandQueue.size(); i++)
		{
			//Checks to see if this particular request can be issued
			if(IsIssuable(commandQueue[i]))
			{
				//make sure we don't send a command ahead of its own ACTIVATE
				if(i>0 && commandQueue[i]->transactionID == commandQueue[i-1]->transactionID)
					continue;

				//send to channel
				(*CommandCallback)(commandQueue[i],0);

				//update channel controllers bank state bookkeeping
				unsigned rank = commandQueue[i]->rank;
				unsigned bank = commandQueue[i]->bank;
				BusPacket *writeData;

				//
				//Main block for determining what to do with each type of command
				//
				switch(commandQueue[i]->busPacketType)
				{
				case READ_P:
					outstandingReads++;
					waitingACTS--;
					if(waitingACTS<0)
					{
						ERROR("#@)($J@)#(RJ");
						exit(0);
					}

					//keep track of energy
					burstEnergy[rank] += (IDD4R - IDD3N) * BL/2 * ((DRAM_BUS_WIDTH/2 * 8) / DEVICE_WIDTH);

					bankStates[rank][bank].lastCommand = READ_P;
					bankStates[rank][bank].stateChangeCountdown = (4*tCK>7.5)?tRTP:ceil(7.5/tCK); //4 clk or 7.5ns
					bankStates[rank][bank].nextActivate = max(bankStates[rank][bank].nextActivate, currentClockCycle + tRTP + tRP);
					bankStates[rank][bank].nextRefresh = currentClockCycle + tRTP + tRP;

					for(unsigned r=0; r<NUM_RANKS; r++)
					{
						if(r==rank)
						{
							for(unsigned b=0; b<NUM_BANKS; b++)
							{
								bankStates[r][b].nextRead = max(bankStates[r][b].nextRead,
								                                currentClockCycle + max(tCCD, TRANSACTION_SIZE/DRAM_BUS_WIDTH));
								bankStates[r][b].nextWrite = max(bankStates[r][b].nextWrite,
								                                 currentClockCycle + (tCL + TRANSACTION_SIZE/DRAM_BUS_WIDTH + tRTRS - tCWL));
							}
						}
						else
						{
							for(unsigned b=0; b<NUM_BANKS; b++)
							{
								bankStates[r][b].nextRead = max(bankStates[r][b].nextRead,
								                                currentClockCycle + TRANSACTION_SIZE/DRAM_BUS_WIDTH + tRTRS);
								bankStates[r][b].nextWrite = max(bankStates[r][b].nextWrite,
								                                 currentClockCycle + (tCL + TRANSACTION_SIZE/DRAM_BUS_WIDTH + tRTRS - tCWL));
							}
						}
					}

					//prevents read or write being issued while waiting for auto-precharge to close page
					bankStates[rank][bank].nextRead = bankStates[rank][bank].nextActivate;
					bankStates[rank][bank].nextWrite = bankStates[rank][bank].nextActivate;

					break;
				case WRITE_P:
					waitingACTS--;
					if(waitingACTS<0)
					{
						ERROR(")(JWE)(FJEWF");
						exit(0);
					}

					//keep track of energy
					burstEnergy[rank] += (IDD4W - IDD3N) * BL/2 * ((DRAM_BUS_WIDTH/2 * 8) / DEVICE_WIDTH);

					writeData = new BusPacket(*commandQueue[i]);
					writeData->busPacketType = WRITE_DATA;
					writeBurstQueue.push_back(writeData);
					writeBurstCountdown.push_back(tCWL);
					if(DEBUG_CHANNEL) DEBUG("     !!! After Issuing WRITE_P, burstQueue is :"<<writeBurstQueue.size()<<" "<<writeBurstCountdown.size()<<" with head : "<<writeBurstCountdown[0]);

					bankStates[rank][bank].lastCommand = WRITE_P;
					bankStates[rank][bank].stateChangeCountdown = tCWL + TRANSACTION_SIZE/DRAM_BUS_WIDTH + tWR;
					bankStates[rank][bank].nextActivate = currentClockCycle + tCWL + TRANSACTION_SIZE/DRAM_BUS_WIDTH + tWR + tRP;
					bankStates[rank][bank].nextRefresh = currentClockCycle + tCWL + TRANSACTION_SIZE/DRAM_BUS_WIDTH + tWR + tRP;

					for(unsigned r=0; r<NUM_RANKS; r++)
					{
						if(r==rank)
						{
							for(unsigned b=0; b<NUM_BANKS; b++)
							{
								bankStates[r][b].nextRead = max(bankStates[r][b].nextRead, currentClockCycle + tCWL + TRANSACTION_SIZE/DRAM_BUS_WIDTH + tWTR);
								bankStates[r][b].nextWrite = max(bankStates[r][b].nextWrite, currentClockCycle+(uint64_t)max(tCCD, TRANSACTION_SIZE/DRAM_BUS_WIDTH));
							}
						}
						else
						{
							for(unsigned b=0; b<NUM_BANKS; b++)
							{
								bankStates[r][b].nextRead = max(bankStates[r][b].nextRead, currentClockCycle + tCWL + TRANSACTION_SIZE/DRAM_BUS_WIDTH + tRTRS - tCL);
								bankStates[r][b].nextWrite = max(bankStates[r][b].nextWrite, currentClockCycle + TRANSACTION_SIZE/DRAM_BUS_WIDTH + tRTRS);
							}
						}
					}

					//prevents read or write being issued while waiting for auto-precharge to close page
					bankStates[rank][bank].nextRead = bankStates[rank][bank].nextActivate;
					bankStates[rank][bank].nextWrite = bankStates[rank][bank].nextActivate;

					break;
				case ACTIVATE:
					for(unsigned b=0; b<NUM_BANKS; b++)
					{
						if(b!=bank)
						{
							bankStates[rank][b].nextActivate = max(currentClockCycle + tRRD, bankStates[rank][b].nextActivate);
						}
					}

					actpreEnergy[rank] += ((IDD0 * tRC) - ((IDD3N * tRAS) + (IDD2N * (tRC - tRAS)))) * ((DRAM_BUS_WIDTH/2 * 8) / DEVICE_WIDTH);

					bankStates[rank][bank].lastCommand = ACTIVATE;
					bankStates[rank][bank].currentBankState = ROW_ACTIVE;
					bankStates[rank][bank].openRowAddress = commandQueue[i]->row;
					bankStates[rank][bank].nextActivate = currentClockCycle + tRC;
					bankStates[rank][bank].nextRead = max(currentClockCycle + tRCD, bankStates[rank][bank].nextRead);
					bankStates[rank][bank].nextWrite = max(currentClockCycle + tRCD, bankStates[rank][bank].nextWrite);

					//keep track of sliding window
					tFAWWindow[rank].push_back(tFAW);

					break;
				default:
					ERROR("Unexpected packet type" << *commandQueue[i]);
					abort();


				}

				//erase
				commandQueue.erase(commandQueue.begin()+i);

				break;
			}
		}
	}
	
	//
	//Debug output
	//
	if(DEBUG_CHANNEL)
	{
		if(commandQueue.size()>0)
		{
			DEBUG("     == Command queue");
			for(unsigned i=0; i<commandQueue.size(); i++)
			{
				DEBUG("       "<<i<<"] " << *commandQueue[i]);
			}
		}

		DEBUG("     == Bank states");

		for(unsigned i=0; i<NUM_RANKS; i++)
		{
			for(unsigned j=0; j<NUM_BANKS; j++)
			{
				DEBUGN("       ");
				if(bankStates[i][j].currentBankState == ROW_ACTIVE)
				{
					DEBUGN("[" << hex << bankStates[i][j].openRowAddress << dec << "] ");
				}
				else if(bankStates[i][j].currentBankState == IDLE)
				{
					DEBUGN("[idle]");
				}
				else if(bankStates[i][j].currentBankState == PRECHARGING)
				{
					DEBUGN("[pre] ");
				}
				else if(bankStates[i][j].currentBankState == REFRESHING)
				{
					DEBUGN("[ref] ");
				}
				else
				{
					ERROR("== Error - unknown state");
					exit(0);
				}
			}
			DEBUG("");
		}
	}

	//increment clock cycle
	currentClockCycle++;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xd8, %rsp
movq %rdi, %rbx
leaq 0x28(%rdi), %r14
leaq 0x38(%rdi), %r15
xorl %eax, %eax
xorl %ebp, %ebp
movl %eax, %r12d
movq %r14, %rdi
callq 0x5364
cmpq %r12, %rax
jbe 0xd2de
movq %r15, %rdi
movq %r12, %rsi
callq 0x5c34
movq (%rax), %rax
xorl %ecx, %ecx
cmpl $0x4, 0x4(%rax)
sete %cl
addl %ecx, %ebp
leal 0x1(%r12), %eax
jmp 0xd2ae
cmpl 0x10(%rbx), %ebp
jbe 0xd2e6
movl %ebp, 0x10(%rbx)
addl %ebp, 0x14(%rbx)
movq 0x78(%rbx), %rax
xorl %ecx, %ecx
xorl %edx, %edx
cmpq $0x4, %rcx
je 0xd318
movq (%rax,%rcx,8), %rsi
xorl %edi, %edi
cmpq $0x200, %rdi            # imm = 0x200
je 0xd313
cmpl $0x1, (%rsi,%rdi)
adcl $0x0, %edx
addq $0x40, %rdi
jmp 0xd2fd
incq %rcx
jmp 0xd2f1
addl %edx, 0x18(%rbx)
xorl %ecx, %ecx
xorl %edx, %edx
cmpq $0x4, %rcx
je 0xd34d
movq (%rax,%rcx,8), %rsi
xorl %edi, %edi
cmpq $0x200, %rdi            # imm = 0x200
je 0xd348
xorl %r8d, %r8d
cmpl $0x1, (%rsi,%rdi)
sete %r8b
addl %r8d, %edx
addq $0x40, %rdi
jmp 0xd32b
incq %rcx
jmp 0xd31f
addl %edx, 0x1c(%rbx)
xorl %ecx, %ecx
xorl %edx, %edx
cmpq $0x4, %rcx
je 0xd382
movq (%rax,%rcx,8), %rsi
xorl %edi, %edi
cmpq $0x200, %rdi            # imm = 0x200
je 0xd37d
xorl %r8d, %r8d
cmpl $0x2, (%rsi,%rdi)
sete %r8b
addl %r8d, %edx
addq $0x40, %rdi
jmp 0xd360
incq %rcx
jmp 0xd354
addl %edx, 0x20(%rbx)
xorl %ecx, %ecx
xorl %edx, %edx
cmpq $0x4, %rcx
je 0xd3b7
movq (%rax,%rcx,8), %rsi
xorl %edi, %edi
cmpq $0x200, %rdi            # imm = 0x200
je 0xd3b2
xorl %r8d, %r8d
cmpl $0x3, (%rsi,%rdi)
sete %r8b
addl %r8d, %edx
addq $0x40, %rdi
jmp 0xd395
incq %rcx
jmp 0xd389
addl %edx, 0x24(%rbx)
movq 0xf8(%rbx), %rcx
movq 0x158(%rbx), %rdx
xorl %esi, %esi
cmpq $0x4, %rsi
je 0xd40c
movq (%rax,%rsi,8), %rdi
xorl %r8d, %r8d
cmpq $0x100, %r8             # imm = 0x100
je 0xd3fb
movl (%rdi,%r8), %r9d
orl $0x2, %r9d
cmpl $0x3, %r9d
je 0xd3f4
addq $0x40, %r8
jmp 0xd3d7
movl $0x2d0, %edi            # imm = 0x2D0
jmp 0xd403
incl (%rdx,%rsi,4)
movl $0x280, %edi            # imm = 0x280
addq %rdi, (%rcx,%rsi,8)
incq %rsi
jmp 0xd3ca
xorl %r12d, %r12d
cmpq $0x4, %r12
je 0xd453
xorl %r13d, %r13d
imulq $0x18, %r12, %rbp
movl %r13d, %r13d
movq 0xb0(%rbx), %rdi
movq (%rdi,%rbp), %rsi
movq 0x8(%rdi,%rbp), %rax
subq %rsi, %rax
sarq $0x2, %rax
cmpq %r13, %rax
jbe 0xd44e
decl (%rsi,%r13,4)
jne 0xd449
addq %rbp, %rdi
callq 0xcd02
incl %r13d
jmp 0xd41c
incq %r12
jmp 0xd40f
xorl %r12d, %r12d
cmpq $0x4, %r12
je 0xd483
xorl %r13d, %r13d
cmpq $0x200, %r13            # imm = 0x200
je 0xd47e
movq 0x78(%rbx), %rax
movq (%rax,%r12,8), %rdi
addq %r13, %rdi
callq 0x9580
addq $0x40, %r13
jmp 0xd45f
incq %r12
jmp 0xd456
movq 0xc8(%rbx), %rax
xorl %ecx, %ecx
cmpq $0x4, %rcx
je 0xd4a3
movl (%rax,%rcx,4), %edx
testl %edx, %edx
je 0xd49e
decl %edx
movl %edx, (%rax,%rcx,4)
incq %rcx
jmp 0xd48c
leaq 0x80(%rbx), %r13
movq 0x80(%rbx), %rcx
movq 0x88(%rbx), %rdx
movq %rdx, %rsi
subq %rcx, %rsi
sarq $0x2, %rsi
xorl %edi, %edi
movl %edi, %edi
cmpq %rdi, %rsi
jbe 0xd4d2
decl (%rcx,%rdi,4)
incl %edi
jmp 0xd4c4
cmpq %rcx, %rdx
je 0xd521
cmpl $0x0, (%rcx)
jne 0xd521
movq 0x98(%rbx), %rax
movq 0x1b0(%rbx), %rdi
leaq 0x98(%rbx), %r12
movq (%rax), %rsi
movq (%rdi), %rax
xorl %edx, %edx
callq *0x10(%rax)
movq 0x98(%rbx), %rsi
movq %r12, %rdi
callq 0xcd3c
movq 0x80(%rbx), %rsi
movq %r13, %rdi
callq 0xcd02
movq 0xc8(%rbx), %rax
movq 0x8(%rbx), %rcx
movq 0x78(%rbx), %rdx
movb $0x1, %sil
xorl %r12d, %r12d
cmpq $0x4, %r12
je 0xd573
cmpl $0x0, (%rax,%r12,4)
jne 0xd56e
movq (%rdx,%r12,8), %rdi
xorl %r8d, %r8d
cmpq $0x200, %r8             # imm = 0x200
je 0xd562
cmpq %rcx, 0x8(%rdi,%r8)
ja 0xd55a
cmpl $0x0, (%rdi,%r8)
je 0xd55c
xorl %esi, %esi
addq $0x40, %r8
jmp 0xd543
testb $0x1, %sil
jne 0xd688
xorl %esi, %esi
incq %r12
jmp 0xd52f
xorl %r12d, %r12d
movl %r12d, %r12d
movq %r14, %rdi
callq 0x5364
cmpq %r12, %rax
jbe 0xdad2
movq %r15, %rdi
movq %r12, %rsi
callq 0x5c34
movq (%rax), %rsi
movq %rbx, %rdi
callq 0xdc42
testb %al, %al
je 0xd5cf
testq %r12, %r12
je 0xd5d4
movq %r15, %rdi
movq %r12, %rsi
callq 0x5c34
movq (%rax), %rax
movl 0x18(%rax), %ebp
leal -0x1(%r12), %esi
movq %r15, %rdi
callq 0x5c34
movq (%rax), %rax
cmpl 0x18(%rax), %ebp
jne 0xd5d4
incl %r12d
jmp 0xd576
movq %r13, 0x38(%rsp)
movq 0x1a8(%rbx), %rbp
movq %r15, %rdi
movq %r12, %rsi
callq 0x5c34
movq (%rax), %rsi
movq (%rbp), %rax
movq %rbp, %rdi
xorl %edx, %edx
callq *0x10(%rax)
movq %r15, %rdi
movq %r12, %rsi
callq 0x5c34
movq (%rax), %rax
movl 0x14(%rax), %r13d
movq %r15, %rdi
movq %r12, %rsi
callq 0x5c34
movq (%rax), %rax
movl 0x10(%rax), %ebp
movq %r15, %rdi
movq %r12, %rsi
callq 0x5c34
movq (%rax), %rax
movl 0x4(%rax), %eax
cmpl $0x1, %eax
je 0xd8d4
cmpl $0x3, %eax
je 0xd756
cmpl $0x4, %eax
jne 0xdae8
movq 0x8(%rbx), %rcx
movq 0x78(%rbx), %rax
addq $0x4, %rcx
shlq $0x6, %rbp
xorl %edx, %edx
cmpq $0x200, %rdx            # imm = 0x200
je 0xd9e5
cmpq %rdx, %rbp
je 0xd682
movq (%rax,%r13,8), %rsi
movq 0x8(%rsi,%rdx), %rdi
cmpq %rdi, %rcx
cmovaq %rcx, %rdi
movq %rdi, 0x8(%rsi,%rdx)
addq $0x40, %rdx
jmp 0xd65b
pushq $0x38
popq %rdi
callq 0x2190
movq %rax, %r14
andl $0x0, 0x28(%rsp)
andq $0x0, 0x20(%rsp)
andl $0x0, 0x18(%rsp)
andl $0x0, 0x10(%rsp)
andl $0x0, 0x8(%rsp)
andl $0x0, (%rsp)
pushq $0x5
popq %rsi
pushq $-0x1
popq %rdx
movq %rax, %rdi
xorl %ecx, %ecx
xorl %r8d, %r8d
movl %r12d, %r9d
callq 0x9680
movq 0x170(%rbx), %rax
movl 0x1e0(%rax), %eax
movl %eax, 0x28(%r14)
movq 0x1a8(%rbx), %rdi
movq (%rdi), %rax
xorl %r15d, %r15d
movq %r14, %rsi
xorl %edx, %edx
callq *0x10(%rax)
movq 0x140(%rbx), %rax
addq $0x4d530, (%rax,%r12,8) # imm = 0x4D530
movq 0x8(%rbx), %rax
movq 0x78(%rbx), %rcx
movq (%rcx,%r12,8), %rcx
addq $0x6b, %rax
movabsq $0x6b00000005, %rdx     # imm = 0x6B00000005
cmpq $0x200, %r15            # imm = 0x200
je 0xd737
movl $0x3, (%rcx,%r15)
movq %rax, 0x8(%rcx,%r15)
movq %rdx, 0x38(%rcx,%r15)
addq $0x40, %r15
jmp 0xd716
movq 0xc8(%rbx), %rax
cmpl $0x0, (%rax,%r12,4)
jne 0xdad2
movl $0x1450, (%rax,%r12,4)  # imm = 0x1450
jmp 0xdad2
movl 0xf4(%rbx), %eax
leal -0x1(%rax), %ecx
movl %ecx, 0xf4(%rbx)
testl %eax, %eax
jle 0xdb6a
movq 0x110(%rbx), %rax
addq $0x1b80, (%rax,%r13,8)  # imm = 0x1B80
pushq $0x38
popq %rdi
callq 0x2190
movq %rax, 0x40(%rsp)
movq %r15, %rdi
movq %r12, %rsi
callq 0x5c34
movq (%rax), %rax
movdqu (%rax), %xmm0
movdqu 0x10(%rax), %xmm1
movups 0x20(%rax), %xmm2
movq 0x40(%rsp), %rcx
movdqu %xmm0, (%rcx)
movdqu %xmm1, 0x10(%rcx)
movups %xmm2, 0x20(%rcx)
movq 0x30(%rax), %rax
movq %rax, 0x30(%rcx)
leaq 0x48(%rsp), %rsi
movq %rcx, (%rsi)
movl $0x8, 0x4(%rcx)
leaq 0x98(%rbx), %rdi
callq 0xcd76
leaq 0x8a84(%rip), %rsi      # 0x16264
movq 0x38(%rsp), %rdi
callq 0x90e6
movq 0x78(%rbx), %rax
movq %rax, 0x38(%rsp)
movq (%rax,%r13,8), %rax
shlq $0x6, %rbp
movl $0x3, 0x38(%rax,%rbp)
movl 0x8a5b(%rip), %edx      # 0x16264
addl $0xe, %edx
movl %edx, 0x3c(%rax,%rbp)
movq 0x8(%rbx), %rdx
movl 0x8a49(%rip), %r9d      # 0x16264
leaq (%rdx,%r9), %rcx
addq $0x17, %rcx
movq %rcx, 0x8(%rax,%rbp)
movq %rcx, 0x40(%rsp)
movq %rcx, 0x30(%rax,%rbp)
leaq (%rdx,%r9), %rdi
addq $-0x3, %rdi
leaq 0x6(%rdx), %r8
addq %rdx, %r9
addq $0x9, %r9
addq $0x4, %rdx
xorl %r10d, %r10d
cmpq $0x4, %r10
je 0xda70
cmpq %r13, %r10
jne 0xd88f
xorl %r11d, %r11d
cmpq $0x200, %r11            # imm = 0x200
je 0xd8cc
movq 0x10(%rax,%r11), %r15
movq 0x18(%rax,%r11), %rsi
cmpq %r9, %r15
cmovbeq %r9, %r15
cmpq %rdx, %rsi
cmovbeq %rdx, %rsi
movq %r15, 0x10(%rax,%r11)
movq %rsi, 0x18(%rax,%r11)
addq $0x40, %r11
jmp 0xd85e
movq 0x38(%rsp), %rcx
movq (%rcx,%r10,8), %r11
xorl %r15d, %r15d
cmpq $0x200, %r15            # imm = 0x200
je 0xd8cc
movq 0x10(%r11,%r15), %rsi
movq 0x18(%r11,%r15), %rcx
cmpq %rdi, %rsi
cmovbeq %rdi, %rsi
cmpq %r8, %rcx
cmovbeq %r8, %rcx
movq %rsi, 0x10(%r11,%r15)
movq %rcx, 0x18(%r11,%r15)
addq $0x40, %r15
jmp 0xd89b
incq %r10
jmp 0xd84c
movq 0xf0(%rbx), %xmm0
movq 0x30bc(%rip), %xmm1     # 0x109a0
paddd %xmm0, %xmm1
movq %xmm1, 0xf0(%rbx)
pshufd $0x55, %xmm0, %xmm0     # xmm0 = xmm0[1,1,1,1]
movd %xmm0, %eax
testl %eax, %eax
jle 0xdbc0
movq 0x110(%rbx), %rax
addq $0x1a40, (%rax,%r13,8)  # imm = 0x1A40
movq 0x78(%rbx), %rcx
movq (%rcx,%r13,8), %rax
shlq $0x6, %rbp
movabsq $0x500000001, %rdx      # imm = 0x500000001
movq %rdx, 0x38(%rax,%rbp)
movq 0x8(%rbx), %rsi
leaq 0xe(%rsi), %rdi
movq 0x8(%rax,%rbp), %rdx
cmpq %rdi, %rdx
cmovbeq %rdi, %rdx
movq %rdx, 0x38(%rsp)
movq %rdx, 0x8(%rax,%rbp)
movq %rdi, 0x30(%rax,%rbp)
pushq $0xf
popq %rdi
subl 0x890d(%rip), %edi      # 0x16264
leaq 0x6(%rsi), %r8
addq %rsi, %rdi
addq $0x4, %rsi
xorl %r9d, %r9d
cmpq $0x4, %r9
je 0xda77
cmpq %r13, %r9
jne 0xd9a8
xorl %r10d, %r10d
cmpq $0x200, %r10            # imm = 0x200
je 0xd9e0
movq 0x10(%rax,%r10), %r11
movq 0x18(%rax,%r10), %r15
cmpq %rsi, %r11
cmovbeq %rsi, %r11
cmpq %rdi, %r15
cmovbeq %rdi, %r15
movq %r11, 0x10(%rax,%r10)
movq %r15, 0x18(%rax,%r10)
addq $0x40, %r10
jmp 0xd977
movq (%rcx,%r9,8), %r10
xorl %r11d, %r11d
cmpq $0x200, %r11            # imm = 0x200
je 0xd9e0
movq 0x10(%r10,%r11), %r15
movq 0x18(%r10,%r11), %rdx
cmpq %r8, %r15
cmovbeq %r8, %r15
cmpq %rdi, %rdx
cmovbeq %rdi, %rdx
movq %r15, 0x10(%r10,%r11)
movq %rdx, 0x18(%r10,%r11)
addq $0x40, %r11
jmp 0xd9af
incq %r9
jmp 0xd965
movq 0x128(%rbx), %rcx
addq $0x40b0, (%rcx,%r13,8)  # imm = 0x40B0
movq (%rax,%r13,8), %rax
movl $0x4, 0x38(%rax,%rbp)
movl $0x1, (%rax,%rbp)
movq %r15, %rdi
movq %r12, %rsi
callq 0x5c34
movq (%rax), %rax
movl 0xc(%rax), %eax
movq 0x78(%rbx), %rcx
movq (%rcx,%r13,8), %rcx
movl %eax, 0x4(%rcx,%rbp)
movq 0x8(%rbx), %rax
leaq 0x21(%rax), %rdx
movq %rdx, 0x8(%rcx,%rbp)
addq $0x9, %rax
movq 0x10(%rcx,%rbp), %rdx
movq 0x18(%rcx,%rbp), %rsi
cmpq %rdx, %rax
cmovaq %rax, %rdx
movq %rdx, 0x10(%rcx,%rbp)
cmpq %rsi, %rax
cmovbeq %rsi, %rax
movq %rax, 0x18(%rcx,%rbp)
imulq $0x18, %r13, %rdi
addq 0xb0(%rbx), %rdi
leaq 0x87ff(%rip), %rsi      # 0x16268
callq 0x90e6
jmp 0xda86
movq 0x40(%rsp), %rcx
jmp 0xda7c
movq 0x38(%rsp), %rcx
movq %rcx, 0x10(%rax,%rbp)
movq %rcx, 0x18(%rax,%rbp)
movups 0x38(%rbx), %xmm0
leaq 0x50(%rsp), %rsi
movaps %xmm0, (%rsi)
movups 0x48(%rbx), %xmm0
movaps %xmm0, 0x10(%rsi)
leaq 0x70(%rsp), %r15
movq %r15, %rdi
movq %r12, %rdx
callq 0x5c53
movaps (%r15), %xmm0
movaps 0x10(%r15), %xmm1
leaq 0x90(%rsp), %rdx
movaps %xmm0, (%rdx)
movaps %xmm1, 0x10(%rdx)
leaq 0xb8(%rsp), %rdi
movq %r14, %rsi
callq 0x5374
incq 0x8(%rbx)
addq $0xd8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x8501(%rip), %rdi      # 0x15ff0
leaq 0x168a(%rip), %rsi      # 0xf180
callq 0x2180
leaq 0x2eae(%rip), %rsi      # 0x109b0
movq %rax, %rdi
callq 0x2180
leaq 0x1618(%rip), %rsi      # 0xf129
movq %rax, %rdi
callq 0x2180
movq %rax, %rdi
movl $0x1d6, %esi            # imm = 0x1D6
callq 0x22e0
leaq 0x1664(%rip), %rsi      # 0xf191
movq %rax, %rdi
callq 0x2180
leaq 0x2ea3(%rip), %rsi      # 0x109df
movq %rax, %rdi
callq 0x2180
movq %rax, %rbx
movq %r14, %rdi
movq %r12, %rsi
callq 0xe346
movq (%rax), %rsi
movq %rbx, %rdi
callq 0x98b8
movq %rax, %rdi
callq 0x20b0
callq 0x20e0
movq 0x847f(%rip), %rdi      # 0x15ff0
leaq 0x1608(%rip), %rsi      # 0xf180
callq 0x2180
leaq 0x2e2c(%rip), %rsi      # 0x109b0
movq %rax, %rdi
callq 0x2180
leaq 0x1596(%rip), %rsi      # 0xf129
movq %rax, %rdi
callq 0x2180
movq %rax, %rdi
movl $0x194, %esi            # imm = 0x194
callq 0x22e0
leaq 0x15e2(%rip), %rsi      # 0xf191
movq %rax, %rdi
callq 0x2180
leaq 0x2e14(%rip), %rsi      # 0x109d2
jmp 0xdc14
movq 0x8429(%rip), %rdi      # 0x15ff0
leaq 0x15b2(%rip), %rsi      # 0xf180
callq 0x2180
leaq 0x2dd6(%rip), %rsi      # 0x109b0
movq %rax, %rdi
callq 0x2180
leaq 0x1540(%rip), %rsi      # 0xf129
movq %rax, %rdi
callq 0x2180
movq %rax, %rdi
movl $0x167, %esi            # imm = 0x167
callq 0x22e0
leaq 0x158c(%rip), %rsi      # 0xf191
movq %rax, %rdi
callq 0x2180
leaq 0x2db1(%rip), %rsi      # 0x109c5
movq %rax, %rdi
callq 0x2180
movq %rax, %rdi
callq 0x20b0
xorl %edi, %edi
callq 0x21d0
movq %rax, %rbx
pushq $0x38
popq %rsi
movq %r14, %rdi
callq 0x21b0
movq %rbx, %rdi
callq 0x22f0
nop