// File: /workspace/github_c_makefile_star2_O2/samtools[P]htslib/htscodecs/htscodecs/rANS_static32x16pr_avx2.c
// Function: rans_uncompress_O0_32x16_avx2
unsigned char *rans_uncompress_O0_32x16_avx2(unsigned char *in,
                                             unsigned int in_size,
                                             unsigned char *out,
                                             unsigned int out_sz) {
    if (in_size < 16) // 4-states at least
        return NULL;

    if (out_sz >= INT_MAX)
        return NULL; // protect against some overflow cases

#ifdef FUZZING_BUILD_MODE_UNSAFE_FOR_PRODUCTION
    if (out_sz > 100000)
        return NULL;
#endif

    /* Load in the static tables */
    unsigned char *cp = in, *out_free = NULL;
    unsigned char *cp_end = in + in_size;
    int i;
    uint32_t s3[TOTFREQ] __attribute__((aligned(32))); // For TF_SHIFT <= 12

    if (!out)
        out_free = out = malloc(out_sz);
    if (!out)
        return NULL;

    // Precompute reverse lookup of frequency.
    uint32_t F[256] = {0}, fsum;
    int fsz = decode_freq(cp, cp_end, F, &fsum);
    if (!fsz)
        goto err;
    cp += fsz;

    normalise_freq_shift(F, fsum, TOTFREQ);

    // Build symbols; fixme, do as part of decode, see the _d variant
    if (rans_F_to_s3(F, TF_SHIFT, s3))
        goto err;

    if (cp_end - cp < NX * 4)
        goto err;

    int z;
    RansState R[NX] __attribute__((aligned(32)));
    for (z = 0; z < NX; z++) {
        RansDecInit(&R[z], &cp);
        if (R[z] < RANS_BYTE_L)
            goto err;
    }

    uint16_t *sp = (uint16_t *)cp;
    uint8_t overflow[64+64] = {0};
    cp_end -= 64;

    // Protect against running off the end of in buffer.
    // We copy it to a worst-case local buffer when near the end.
    if ((uint8_t *)sp > cp_end) {
        memmove(overflow, sp, cp_end+64 - (uint8_t *)sp);
        sp = (uint16_t *)overflow;
        cp_end = overflow + sizeof(overflow) - 64;
    }

    int out_end = (out_sz&~(NX-1));
    const uint32_t mask = (1u << TF_SHIFT)-1;

    __m256i maskv  = _mm256_set1_epi32(mask); // set mask in all lanes
    LOAD(Rv, R);

    for (i=0; i < out_end; i+=NX) {
        //for (z = 0; z < NX; z++)
        //  m[z] = R[z] & mask;
        __m256i masked1 = _mm256_and_si256(Rv1, maskv);
	__m256i masked2 = _mm256_and_si256(Rv2, maskv);
        __m256i masked3 = _mm256_and_si256(Rv3, maskv);
        __m256i masked4 = _mm256_and_si256(Rv4, maskv);

	//  S[z] = s3[m[z]];
	__m256i Sv1 = _mm256_i32gather_epi32x((int *)s3, masked1, sizeof(*s3));
        __m256i Sv2 = _mm256_i32gather_epi32x((int *)s3, masked2, sizeof(*s3));
        __m256i Sv3 = _mm256_i32gather_epi32x((int *)s3, masked3, sizeof(*s3));
        __m256i Sv4 = _mm256_i32gather_epi32x((int *)s3, masked4, sizeof(*s3));

        //  f[z] = S[z]>>(TF_SHIFT+8);
        __m256i fv1 = _mm256_srli_epi32(Sv1, TF_SHIFT+8);
        __m256i fv2 = _mm256_srli_epi32(Sv2, TF_SHIFT+8);

        //  b[z] = (S[z]>>8) & mask;
        __m256i bv1 = _mm256_and_si256(_mm256_srli_epi32(Sv1, 8), maskv);
        __m256i bv2 = _mm256_and_si256(_mm256_srli_epi32(Sv2, 8), maskv);

        //  s[z] = S[z] & 0xff;
        __m256i sv1 = _mm256_and_si256(Sv1, _mm256_set1_epi32(0xff));
        __m256i sv2 = _mm256_and_si256(Sv2, _mm256_set1_epi32(0xff));

        //  R[z] = f[z] * (R[z] >> TF_SHIFT) + b[z];
        Rv1 = _mm256_add_epi32(
                  _mm256_mullo_epi32(
                      _mm256_srli_epi32(Rv1,TF_SHIFT), fv1), bv1);
        Rv2 = _mm256_add_epi32(
                  _mm256_mullo_epi32(
                      _mm256_srli_epi32(Rv2,TF_SHIFT), fv2), bv2);

        // Tricky one:  out[i+z] = s[z];
        //             ---h---g ---f---e  ---d---c ---b---a
        //             ---p---o ---n---m  ---l---k ---j---i
        // packs_epi32 -p-o-n-m -h-g-f-e  -l-k-j-i -d-c-b-a
        // permute4x64 -p-o-n-m -l-k-j-i  -h-g-f-e -d-c-b-a
        // packs_epi16 ponmlkji ponmlkji  hgfedcba hgfedcba
        sv1 = _mm256_packus_epi32(sv1, sv2);
        sv1 = _mm256_permute4x64_epi64(sv1, 0xd8);

        // Protect against running off the end of in buffer.
        // We copy it to a worst-case local buffer when near the end.
        if ((uint8_t *)sp > cp_end) {
            memmove(overflow, sp, cp_end+64 - (uint8_t *)sp);
            sp = (uint16_t *)overflow;
            cp_end = overflow + sizeof(overflow) - 64;
        }

        __m256i Vv1 = _mm256_cvtepu16_epi32(_mm_loadu_si128((__m128i *)sp));
        sv1 = _mm256_packus_epi16(sv1, sv1);

        // c =  R[z] < RANS_BYTE_L;

// The lack of unsigned comparisons means we have to jump through hoops.
// in AVX2 land the second version comes out best (and first in SSE land).

//#define _mm256_cmplt_epu32_imm(a,b) _mm256_andnot_si256(_mm256_cmpeq_epi32(_mm256_max_epu32((a),_mm256_set1_epi32(b)), (a)), _mm256_set1_epi32(-1));

#define _mm256_cmplt_epu32_imm(a,b) _mm256_cmpgt_epi32(_mm256_set1_epi32((b)-0x80000000), _mm256_xor_si256((a), _mm256_set1_epi32(0x80000000)))

        __m256i renorm_mask1, renorm_mask2;
        renorm_mask1 = _mm256_cmplt_epu32_imm(Rv1, RANS_BYTE_L);
        renorm_mask2 = _mm256_cmplt_epu32_imm(Rv2, RANS_BYTE_L);

        // y = (R[z] << 16) | V[z];
        unsigned int imask1 = _mm256_movemask_ps((__m256)renorm_mask1);
        __m256i idx1 = _mm256_load_si256((const __m256i*)permute[imask1]);
        __m256i Yv1 = _mm256_slli_epi32(Rv1, 16);
        Vv1 = _mm256_permutevar8x32_epi32(Vv1, idx1);
        __m256i Yv2 = _mm256_slli_epi32(Rv2, 16);

        // Shuffle the renorm values to correct lanes and incr sp pointer
        unsigned int imask2 = _mm256_movemask_ps((__m256)renorm_mask2);
        sp += _mm_popcnt_u32(imask1);

        __m256i idx2 = _mm256_load_si256((const __m256i*)permute[imask2]);
        __m256i Vv2 = _mm256_cvtepu16_epi32(_mm_loadu_si128((__m128i *)sp));
        sp += _mm_popcnt_u32(imask2);

        Yv1 = _mm256_or_si256(Yv1, Vv1);
        Vv2 = _mm256_permutevar8x32_epi32(Vv2, idx2);
        Yv2 = _mm256_or_si256(Yv2, Vv2);

        // R[z] = c ? Y[z] : R[z];
        Rv1 = _mm256_blendv_epi8(Rv1, Yv1, renorm_mask1);
        Rv2 = _mm256_blendv_epi8(Rv2, Yv2, renorm_mask2);

        // ------------------------------------------------------------
        //  f[z] = S[z]>>(TF_SHIFT+8);
        __m256i fv3 = _mm256_srli_epi32(Sv3, TF_SHIFT+8);
        __m256i fv4 = _mm256_srli_epi32(Sv4, TF_SHIFT+8);

        //  b[z] = (S[z]>>8) & mask;
        __m256i bv3 = _mm256_and_si256(_mm256_srli_epi32(Sv3, 8), maskv);
        __m256i bv4 = _mm256_and_si256(_mm256_srli_epi32(Sv4, 8), maskv);

        //  s[z] = S[z] & 0xff;
        __m256i sv3 = _mm256_and_si256(Sv3, _mm256_set1_epi32(0xff));
        __m256i sv4 = _mm256_and_si256(Sv4, _mm256_set1_epi32(0xff));

        //  R[z] = f[z] * (R[z] >> TF_SHIFT) + b[z];
        Rv3 = _mm256_add_epi32(_mm256_mullo_epi32(_mm256_srli_epi32(Rv3,TF_SHIFT),fv3),bv3);
        Rv4 = _mm256_add_epi32(_mm256_mullo_epi32(_mm256_srli_epi32(Rv4,TF_SHIFT),fv4),bv4);

        // Tricky one:  out[i+z] = s[z];
        //             ---h---g ---f---e  ---d---c ---b---a
        //             ---p---o ---n---m  ---l---k ---j---i
        // packs_epi32 -p-o-n-m -h-g-f-e  -l-k-j-i -d-c-b-a
        // permute4x64 -p-o-n-m -l-k-j-i  -h-g-f-e -d-c-b-a
        // packs_epi16 ponmlkji ponmlkji  hgfedcba hgfedcba
        sv3 = _mm256_packus_epi32(sv3, sv4);
        sv3 = _mm256_permute4x64_epi64(sv3, 0xd8);

        // c =  R[z] < RANS_BYTE_L;
        __m256i renorm_mask3, renorm_mask4;
        renorm_mask3 = _mm256_cmplt_epu32_imm(Rv3, RANS_BYTE_L);
        sv3 = _mm256_packus_epi16(sv3, sv3);
        renorm_mask4 = _mm256_cmplt_epu32_imm(Rv4, RANS_BYTE_L);

        // y = (R[z] << 16) | V[z];
        __m256i Vv3 = _mm256_cvtepu16_epi32(_mm_loadu_si128((__m128i *)sp));

        *(uint64_t *)&out[i+0]  = _mm256_extract_epi64(sv1, 0);
        *(uint64_t *)&out[i+8]  = _mm256_extract_epi64(sv1, 2);
        *(uint64_t *)&out[i+16] = _mm256_extract_epi64(sv3, 0);
        *(uint64_t *)&out[i+24] = _mm256_extract_epi64(sv3, 2);

        __m256i Yv3 = _mm256_slli_epi32(Rv3, 16);
        unsigned int imask3 = _mm256_movemask_ps((__m256)renorm_mask3);
        __m256i idx3 = _mm256_load_si256((const __m256i*)permute[imask3]);

        // Shuffle the renorm values to correct lanes and incr sp pointer
        Vv3 = _mm256_permutevar8x32_epi32(Vv3, idx3);
        __m256i Yv4 = _mm256_slli_epi32(Rv4, 16);
        unsigned int imask4 = _mm256_movemask_ps((__m256)renorm_mask4);
        sp += _mm_popcnt_u32(imask3);

        __m256i idx4 = _mm256_load_si256((const __m256i*)permute[imask4]);
        __m256i Vv4 = _mm256_cvtepu16_epi32(_mm_loadu_si128((__m128i *)sp));

        //Vv = _mm256_and_si256(Vv, renorm_mask);  (blend does the AND anyway)
        Yv3 = _mm256_or_si256(Yv3, Vv3);
        Vv4 = _mm256_permutevar8x32_epi32(Vv4, idx4);
        Yv4 = _mm256_or_si256(Yv4, Vv4);
        sp += _mm_popcnt_u32(imask4);

        // R[z] = c ? Y[z] : R[z];
        Rv3 = _mm256_blendv_epi8(Rv3, Yv3, renorm_mask3);
        Rv4 = _mm256_blendv_epi8(Rv4, Yv4, renorm_mask4);
    }

    STORE(Rv, R);
    //_mm256_store_si256((__m256i *)&R[0], Rv1);
    //_mm256_store_si256((__m256i *)&R[8], Rv2);
    //_mm256_store_si256((__m256i *)&R[16], Rv3);
    //_mm256_store_si256((__m256i *)&R[24], Rv4);

    for (z = out_sz & (NX-1); z-- > 0; )
      out[out_end + z] = s3[R[z] & mask];

    //fprintf(stderr, "    0 Decoded %d bytes\n", (int)(cp-in)); //c-size

    return out;

 err:
    free(out_free);
    return NULL;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
andq $-0x20, %rsp
subq $0x46a0, %rsp           # imm = 0x46A0
movl %ecx, %r14d
cmpl $0x10, %esi
setb %al
cmpl $0x7fffffff, %ecx       # imm = 0x7FFFFFFF
setae %cl
orb %al, %cl
jne 0x53baf
movl %esi, %ebx
movq %rdi, %r12
xorl %r13d, %r13d
testq %rdx, %rdx
je 0x53a84
xorl %eax, %eax
jmp 0x53a98
movl %r14d, %edi
callq 0x4680
movq %rax, %rdx
testq %rax, %rax
je 0x53baf
movq %rax, 0x40(%rsp)
movq %r14, 0x8(%rsp)
movq %rdx, 0x18(%rsp)
movl %ebx, %eax
movq %rax, 0x120(%rsp)
leaq (%r12,%rax), %r15
leaq 0x280(%rsp), %rbx
movl $0x400, %edx            # imm = 0x400
movq %rbx, %rdi
xorl %esi, %esi
callq 0x4260
movq %r12, %rdi
movq %r15, %rsi
movq %rbx, %rdx
callq 0x565c0
movslq %eax, %rbx
movq %r12, 0x20(%rsp)
addq %r12, %rbx
xorl %r12d, %r12d
cmpq $0x400, %r12            # imm = 0x400
je 0x53b23
cmpl $0x0, 0x280(%rsp,%r12)
je 0x53b1d
leaq (%rsp,%r12), %r14
addq $0x280, %r14            # imm = 0x280
movq %rbx, %rdi
movq %r15, %rsi
movq %r14, %rdx
callq 0x561e4
cltq
addq %rax, %rbx
addl (%r14), %r13d
addq $0x4, %r12
jmp 0x53ae8
subq 0x20(%rsp), %rbx
testl %ebx, %ebx
je 0x53ba5
movslq %ebx, %rbx
leaq 0x280(%rsp), %rdi
movl %r13d, %esi
movl $0x1000, %edx           # imm = 0x1000
callq 0x54045
xorl %eax, %eax
xorl %ecx, %ecx
cmpq $0x100, %rax            # imm = 0x100
je 0x53b8a
movl 0x280(%rsp,%rax,4), %edx
movl $0x1000, %esi           # imm = 0x1000
subl %ecx, %esi
leal -0x1(%rdx), %edi
cmpl %esi, %edi
jae 0x53b85
movl %edx, %esi
shll $0x14, %esi
addl %eax, %esi
subl $0x1, %edx
jb 0x53b85
movslq %ecx, %rcx
movl %esi, 0x680(%rsp,%rcx,4)
incl %ecx
addl $0x100, %esi            # imm = 0x100
jmp 0x53b6c
incq %rax
jmp 0x53b48
cmpl $0x1000, %ecx           # imm = 0x1000
jne 0x53ba5
movq 0x120(%rsp), %rax
subq %rbx, %rax
cmpq $0x80, %rax
jge 0x53bc3
movq 0x40(%rsp), %rdi
callq 0x45c0
xorl %eax, %eax
leaq -0x28(%rbp), %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
vzeroupper
retq
movq %rax, %rdx
addq %rbx, 0x20(%rsp)
xorl %eax, %eax
cmpq $0x80, %rax
je 0x53bf2
movq 0x20(%rsp), %rcx
movl (%rcx,%rax), %ecx
movl %ecx, 0x140(%rsp,%rax)
cmpl $0x8000, %ecx           # imm = 0x8000
jb 0x53ba5
addq $0x4, %rax
jmp 0x53bcd
vxorps %xmm0, %xmm0, %xmm0
vmovaps %ymm0, 0x260(%rsp)
vmovaps %ymm0, 0x240(%rsp)
vmovaps %ymm0, 0x220(%rsp)
vmovaps %ymm0, 0x200(%rsp)
addq $-0x40, %r15
movq 0x20(%rsp), %rsi
addq %rax, %rsi
cmpq %r15, %rsi
jbe 0x53c4b
subq %rax, %rdx
leaq 0x200(%rsp), %rbx
movq %rbx, %rdi
vzeroupper
callq 0x43c0
leaq 0x240(%rsp), %r15
jmp 0x53c4e
movq %rsi, %rbx
movq 0x8(%rsp), %rax
andl $0x7fffffe0, %eax       # imm = 0x7FFFFFE0
movq %rax, 0x10(%rsp)
vmovaps 0x140(%rsp), %ymm9
vmovaps 0x160(%rsp), %ymm8
vmovaps 0x180(%rsp), %ymm3
vmovaps 0x1a0(%rsp), %ymm2
xorl %r14d, %r14d
vbroadcastsd 0x2a04b(%rip), %ymm0 # 0x7dcd8
vmovaps %ymm0, 0x1c0(%rsp)
vbroadcastss 0x2a025(%rip), %ymm0 # 0x7dcc4
vmovaps %ymm0, 0x20(%rsp)
leaq 0x680(%rsp), %r13
vbroadcastss 0x2a012(%rip), %ymm0 # 0x7dcc8
vmovaps %ymm0, 0x40(%rsp)
leaq 0x2c05d(%rip), %r12     # 0x7fd20
cmpq 0x10(%rsp), %r14
jae 0x53fe2
vmovaps 0x1c0(%rsp), %ymm1
vandps %ymm1, %ymm9, %ymm0
vandps %ymm1, %ymm8, %ymm4
vmovaps %ymm4, 0x60(%rsp)
vmovaps %ymm3, 0x1e0(%rsp)
vandps %ymm1, %ymm3, %ymm3
vmovaps %ymm3, 0x100(%rsp)
vmovaps %ymm2, 0x120(%rsp)
vandps %ymm1, %ymm2, %ymm1
vmovaps %ymm1, 0xa0(%rsp)
movq %r13, %rdi
vmovaps %ymm8, 0xe0(%rsp)
vmovaps %ymm9, 0xc0(%rsp)
callq 0x54072
vmovaps %ymm0, 0x80(%rsp)
movq %r13, %rdi
vmovaps 0x60(%rsp), %ymm0
callq 0x54072
vmovaps %ymm0, 0x60(%rsp)
movq %r13, %rdi
vmovaps 0x100(%rsp), %ymm0
callq 0x54072
vmovaps %ymm0, 0x100(%rsp)
movq %r13, %rdi
vmovdqa 0xa0(%rsp), %ymm0
callq 0x54072
vmovdqa 0x80(%rsp), %ymm3
vpsrld $0x14, %ymm3, %ymm5
vmovdqa 0x60(%rsp), %ymm4
vpsrld $0x14, %ymm4, %ymm1
vpsrld $0x8, %ymm3, %ymm2
vmovdqa %ymm3, %ymm6
vpsrld $0x8, %ymm4, %ymm3
vmovdqa %ymm4, %ymm7
vmovdqa 0xc0(%rsp), %ymm4
vpsrld $0xc, %ymm4, %ymm4
vpmulld %ymm4, %ymm5, %ymm5
vmovdqa 0x20(%rsp), %ymm4
vpand %ymm4, %ymm2, %ymm2
vpaddd %ymm2, %ymm5, %ymm8
vmovdqa 0xe0(%rsp), %ymm2
vpsrld $0xc, %ymm2, %ymm2
vpmulld %ymm2, %ymm1, %ymm2
vpand %ymm4, %ymm3, %ymm1
vpaddd %ymm1, %ymm2, %ymm11
vmovdqa 0x40(%rsp), %ymm1
vpand %ymm1, %ymm6, %ymm2
vpand %ymm1, %ymm7, %ymm1
vpackusdw %ymm1, %ymm2, %ymm1
vpermq $0xd8, %ymm1, %ymm10    # ymm10 = ymm1[0,2,1,3]
movq %rbx, %rsi
cmpq %r15, %rbx
jbe 0x53e6b
subq %rsi, %r15
addq $0x40, %r15
leaq 0x200(%rsp), %rbx
movq %rbx, %rdi
movq %r15, %rdx
vmovdqa %ymm0, 0xe0(%rsp)
vmovdqa %ymm10, 0xc0(%rsp)
vmovdqa %ymm8, 0xa0(%rsp)
vmovdqa %ymm11, 0x80(%rsp)
vzeroupper
callq 0x4830
vmovdqa 0x80(%rsp), %ymm11
vmovdqa 0xa0(%rsp), %ymm8
vmovdqa 0xc0(%rsp), %ymm10
vmovdqa 0xe0(%rsp), %ymm0
movq %rbx, %rsi
leaq 0x240(%rsp), %r15
vpmovzxwd (%rsi), %ymm1
vpbroadcastd 0x29e53(%rip), %ymm7 # 0x7dccc
vpminud %ymm7, %ymm8, %ymm2
vpcmpeqd %ymm2, %ymm8, %ymm2
vmovmskps %ymm2, %eax
popcntl %eax, %ecx
shll $0x5, %eax
vmovdqa (%rax,%r12), %ymm3
vpermd %ymm1, %ymm3, %ymm1
vpslld $0x10, %ymm8, %ymm3
vpor %ymm3, %ymm1, %ymm1
vpslld $0x10, %ymm11, %ymm3
vpminud %ymm7, %ymm11, %ymm4
vpcmpeqd %ymm4, %ymm11, %ymm4
vmovmskps %ymm4, %eax
leaq (%rsi,%rcx,2), %rcx
popcntl %eax, %edx
shll $0x5, %eax
vpmovzxwd (%rcx), %ymm5
vmovdqa (%rax,%r12), %ymm6
vpermd %ymm5, %ymm6, %ymm5
vpor %ymm3, %ymm5, %ymm3
leaq (%rcx,%rdx,2), %rax
vblendvps %ymm2, %ymm1, %ymm8, %ymm9
vblendvps %ymm4, %ymm3, %ymm11, %ymm8
vmovdqa 0x100(%rsp), %ymm6
vpsrld $0x14, %ymm6, %ymm1
vpsrld $0x14, %ymm0, %ymm2
vpsrld $0x8, %ymm6, %ymm3
vpsrld $0x8, %ymm0, %ymm4
vmovdqa 0x1e0(%rsp), %ymm5
vpsrld $0xc, %ymm5, %ymm5
vpmulld %ymm5, %ymm1, %ymm1
vmovdqa 0x20(%rsp), %ymm5
vpand %ymm5, %ymm3, %ymm3
vpaddd %ymm3, %ymm1, %ymm1
vmovdqa 0x120(%rsp), %ymm3
vpsrld $0xc, %ymm3, %ymm3
vpmulld %ymm3, %ymm2, %ymm2
vpand %ymm5, %ymm4, %ymm3
vpaddd %ymm3, %ymm2, %ymm2
vmovdqa 0x40(%rsp), %ymm4
vpand %ymm4, %ymm6, %ymm3
vpand %ymm4, %ymm0, %ymm4
vpackusdw %ymm4, %ymm3, %ymm3
vpermq $0xd8, %ymm3, %ymm3     # ymm3 = ymm3[0,2,1,3]
vpackuswb %ymm3, %ymm10, %ymm3
vpmovzxwd (%rax), %ymm4
vpermq $0xd8, %ymm3, %ymm3     # ymm3 = ymm3[0,2,1,3]
movq 0x18(%rsp), %rcx
vmovdqu %ymm3, (%rcx,%r14)
vpslld $0x10, %ymm1, %ymm3
vpminud %ymm7, %ymm1, %ymm5
vpcmpeqd %ymm5, %ymm1, %ymm5
vmovmskps %ymm5, %ecx
popcntl %ecx, %edx
shll $0x5, %ecx
vmovdqa (%rcx,%r12), %ymm6
vpermd %ymm4, %ymm6, %ymm4
vpor %ymm3, %ymm4, %ymm3
vpslld $0x10, %ymm2, %ymm4
vpminud %ymm7, %ymm2, %ymm0
vpcmpeqd %ymm0, %ymm2, %ymm0
vmovmskps %ymm0, %ecx
leaq (%rax,%rdx,2), %rax
popcntl %ecx, %edx
shll $0x5, %ecx
vmovdqa (%rcx,%r12), %ymm6
vpmovzxwd (%rax), %ymm7
vpermd %ymm7, %ymm6, %ymm6
vpor %ymm4, %ymm6, %ymm4
vblendvps %ymm5, %ymm3, %ymm1, %ymm3
leaq (%rax,%rdx,2), %rbx
vblendvps %ymm0, %ymm4, %ymm2, %ymm2
addq $0x20, %r14
jmp 0x53cc3
vmovaps %ymm9, 0x140(%rsp)
vmovaps %ymm8, 0x160(%rsp)
vmovaps %ymm3, 0x180(%rsp)
vmovaps %ymm2, 0x1a0(%rsp)
movq 0x8(%rsp), %rsi
andl $0x1f, %esi
movq 0x18(%rsp), %rax
movq 0x10(%rsp), %rcx
leaq (%rcx,%rax), %rdi
decq %rdi
movl $0xfff, %ecx            # imm = 0xFFF
testq %rsi, %rsi
jle 0x53bb1
movl 0x13c(%rsp,%rsi,4), %edx
andl %ecx, %edx
movb 0x680(%rsp,%rdx,4), %dl
movb %dl, (%rdi,%rsi)
decq %rsi
jmp 0x54024