// File: /workspace/github_c_makefile_star2_O1/markdryan[P]subtilis/arch/arm32/vfp_alloc.c
// Function: prv_alloc_vfp_cptran_instr
static void prv_alloc_vfp_cptran_instr(void *user_data, subtilis_arm_op_t *op,
				       subtilis_arm_instr_type_t type,
				       subtilis_vfp_cptran_instr_t *instr,
				       subtilis_error_t *err)
{
	subtilis_arm_reg_t vreg_op2;
	int dist_op2;
	subtilis_arm_reg_ud_t *ud = user_data;
	bool fixed_op2 = true;

	if (!instr->use_dregs) {
		subtilis_error_set_assertion_failed(err);
		return;
	}

	if (type != SUBTILIS_VFP_INSTR_FMSR) {
		vreg_op2 = instr->src;
		subtilis_arm_reg_alloc_ensure(ud, op, ud->int_regs,
					      ud->real_regs, &instr->src, err);
		if (err->type != SUBTILIS_ERROR_OK)
			return;
		dist_op2 = subtilis_arm_reg_alloc_calculate_dist(
		    ud, vreg_op2, op, &ud->real_regs->dist_walker,
		    ud->real_regs);
		if (dist_op2 == -1)
			ud->real_regs->phys_to_virt[instr->src] = INT_MAX;

		subtilis_arm_reg_alloc_alloc_dest(ud, op, &instr->dest, err);
		if (err->type != SUBTILIS_ERROR_OK)
			return;
		ud->real_regs->next[instr->src] = dist_op2;
	} else {
		vreg_op2 = instr->src;
		fixed_op2 = subtilis_arm_reg_alloc_ensure(
		    ud, op, ud->int_regs, ud->int_regs, &instr->src, err);
		if (err->type != SUBTILIS_ERROR_OK)
			return;
		dist_op2 = subtilis_arm_reg_alloc_calculate_dist(
		    ud, vreg_op2, op, &ud->int_regs->dist_walker, ud->int_regs);
		if (dist_op2 == -1)
			ud->int_regs->phys_to_virt[instr->src] = INT_MAX;

		subtilis_arm_reg_alloc_alloc_fp_dest(ud, op, &instr->dest, err);
		if (err->type != SUBTILIS_ERROR_OK)
			return;

		if (!fixed_op2)
			ud->int_regs->next[instr->src] = dist_op2;
	}

	ud->instr_count++;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %r8, %r15
cmpb $0x0, 0x4(%rcx)
je 0x6c8e9
movq %rcx, %r12
movl %edx, %eax
movq %rsi, %r13
movq %rdi, %rbx
leaq 0x10(%rcx), %r14
movq 0x10(%rcx), %rbp
movq 0x8(%rdi), %rdx
cmpl $0x5d, %eax
jne 0x6c910
movq %rbx, %rdi
movq %r13, %rsi
movq %rdx, %rcx
movq %r14, %r8
movq %r15, %r9
callq 0x5216a
cmpl $0x0, (%r15)
jne 0x6c99c
movb %al, 0xf(%rsp)
leaq 0x8(%rbx), %rax
movq %rax, 0x10(%rsp)
movq 0x8(%rbx), %r8
leaq 0x90(%r8), %rcx
movq %rbx, %rdi
movq %rbp, %rsi
movq %r13, %rdx
callq 0x51f18
movl %eax, %ebp
cmpl $-0x1, %eax
jne 0x6c8b9
movq 0x10(%rsp), %rax
movq (%rax), %rax
movq 0x8(%rax), %rax
movq (%r14), %rcx
movq $0x7fffffff, (%rax,%rcx,8) # imm = 0x7FFFFFFF
addq $0x8, %r12
movq %rbx, %rdi
movq %r13, %rsi
movq %r12, %rdx
movq %r15, %rcx
callq 0x52427
cmpl $0x0, (%r15)
movb 0xf(%rsp), %al
jne 0x6c99c
testb %al, %al
je 0x6c986
jmp 0x6c998
leaq 0xa726(%rip), %rdx      # 0x77016
movq %r15, %rdi
movl $0xf, %esi
movl $0x12b, %ecx            # imm = 0x12B
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x13604
movq 0x10(%rbx), %rcx
movq %rbx, %rdi
movq %r13, %rsi
movq %r14, %r8
movq %r15, %r9
callq 0x5216a
cmpl $0x0, (%r15)
jne 0x6c99c
leaq 0x10(%rbx), %rax
movq %rax, 0x10(%rsp)
movq 0x10(%rbx), %r8
leaq 0x90(%r8), %rcx
movq %rbx, %rdi
movq %rbp, %rsi
movq %r13, %rdx
callq 0x51f18
movl %eax, %ebp
cmpl $-0x1, %eax
jne 0x6c96b
movq 0x10(%rsp), %rax
movq (%rax), %rax
movq 0x8(%rax), %rax
movq (%r14), %rcx
movq $0x7fffffff, (%rax,%rcx,8) # imm = 0x7FFFFFFF
addq $0x8, %r12
movq %rbx, %rdi
movq %r13, %rsi
movq %r12, %rdx
movq %r15, %rcx
callq 0x5237c
cmpl $0x0, (%r15)
jne 0x6c99c
movq 0x10(%rsp), %rax
movq (%rax), %rax
movq 0x10(%rax), %rax
movq (%r14), %rcx
movl %ebp, (%rax,%rcx,4)
incq 0x20(%rbx)
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq