// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float128_to_int64_round_to_zero
int64 float128_to_int64_round_to_zero(float128 a, float_status *status)
{
    flag aSign;
    int32 aExp, shiftCount;
    uint64_t aSig0, aSig1;
    int64 z;

    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
    shiftCount = aExp - 0x402F;
    if ( 0 < shiftCount ) {
        if ( 0x403E <= aExp ) {
            aSig0 &= LIT64( 0x0000FFFFFFFFFFFF );
            if (    ( a.high == LIT64( 0xC03E000000000000 ) )
                 && ( aSig1 < LIT64( 0x0002000000000000 ) ) ) {
                if (aSig1) {
                    status->float_exception_flags |= float_flag_inexact;
                }
            }
            else {
                float_raise(float_flag_invalid, status);
                if ( ! aSign || ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) ) {
                    return LIT64( 0x7FFFFFFFFFFFFFFF );
                }
            }
            return (int64_t) LIT64( 0x8000000000000000 );
        }
        z = ( aSig0<<shiftCount ) | ( aSig1>>( ( - shiftCount ) & 63 ) );
        if ( (uint64_t) ( aSig1<<shiftCount ) ) {
            status->float_exception_flags |= float_flag_inexact;
        }
    }
    else {
        if ( aExp < 0x3FFF ) {
            if ( aExp | aSig0 | aSig1 ) {
                status->float_exception_flags |= float_flag_inexact;
            }
            return 0;
        }
        z = aSig0>>( - shiftCount );
        if (    aSig1
             || ( shiftCount && (uint64_t) ( aSig0<<( shiftCount & 63 ) ) ) ) {
            status->float_exception_flags |= float_flag_inexact;
        }
    }
    if ( aSign ) z = - z;
    return z;

}

// Assembly:
movabsq $0xffffffffffff, %rax   # imm = 0xFFFFFFFFFFFF
movq %rsi, %rcx
andq %rax, %rcx
movq %rsi, %r10
shrq $0x30, %r10
movl %r10d, %r9d
andl $0x7fff, %r9d           # imm = 0x7FFF
leaq 0x1(%rcx,%rax), %r8
movq %r8, %r11
cmoveq %rcx, %r11
leal -0x402f(%r9), %eax
cmpl $0x4030, %r9d           # imm = 0x4030
jb 0x11b53
cmpl $0x403e, %r9d           # imm = 0x403E
jb 0x11b72
movabsq $0x7fffffffffffffff, %rax # imm = 0x7FFFFFFFFFFFFFFF
movabsq $-0x3fc2000000000000, %r8 # imm = 0xC03E000000000000
xorq %rsi, %r8
movq %rdi, %r10
shrq $0x31, %r10
orq %r8, %r10
jne 0x11bb3
testq %rdi, %rdi
je 0x11bd3
orb $0x20, 0x2(%rdx)
jmp 0x11bd3
cmpl $0x3ffe, %r9d           # imm = 0x3FFE
ja 0x11b91
andl $0x7fff, %r10d          # imm = 0x7FFF
orq %r11, %r10
orq %rdi, %r10
je 0x11b6f
orb $0x20, 0x2(%rdx)
xorl %eax, %eax
retq
movl %eax, %ecx
shlq %cl, %r8
movb $0x2f, %cl
subb %r10b, %cl
movq %rdi, %r9
shrq %cl, %r9
orq %r8, %r9
movl %eax, %ecx
shlq %cl, %rdi
testq %rdi, %rdi
jne 0x11ba1
jmp 0x11ba5
movb $0x2f, %cl
subb %r9b, %cl
movq %r8, %r9
shrq %cl, %r9
testq %rdi, %rdi
je 0x11bd7
orb $0x20, 0x2(%rdx)
movq %r9, %rax
negq %rax
testq %rsi, %rsi
cmovnsq %r9, %rax
retq
orb $0x1, 0x2(%rdx)
testq %rsi, %rsi
jns 0x11bb2
cmpl $0x7fff, %r9d           # imm = 0x7FFF
setne %dl
orq %rdi, %rcx
sete %cl
orb %dl, %cl
cmpb $0x1, %cl
jne 0x11bb2
incq %rax
retq
testl %eax, %eax
je 0x11ba5
movl %eax, %ecx
shlq %cl, %r8
testq %r8, %r8
jne 0x11ba1
jmp 0x11ba5