// File: /workspace/github_c_makefile_star2_O3/ughman[P]c2c/src/emu.c
// Function: EMU_ReadU32
uint32_t EMU_ReadU32(uint32_t address)
{
	if (address & 3)
		SDL_LogError(LOG_EMU,"Unaligned word load");
	if (address >= 0x80000000 && address <= 0x801FFFFF)
	{
normal:
		{
			uint32_t (*codehandler)(uint32_t) = EMU_codemap[(address & 0x1FFFFF) >> 2];
			if (codehandler != EMU_ExecuteUnrecognizedCode)
			{
				SDL_LogError(LOG_EMU,"Reading code as data");
			}
		}
		return EMU_ram[(address & 0x1FFFFF) >> 2];
	}
	else if (address >= 0x0 && address <= 0x1FFFFF)
	{
		goto normal;
	}
	else if (address >= 0xA0000000 && address <= 0xA01FFFFF)
	{
		goto normal;
	}
	else if (address >= 0x1F800000 && address <= 0x1F8003FF)
	{
		return EMU_scratch[(address & 0x3FF) >> 2];
	}
	else switch (address)
	{
	case 0x1F801014:
		// Unused waitstate configuration
		return PCSX_Read16(address);
	case 0x1F801074:
		return IRQ_GetMask();
	case 0x1F8010A8:
		return DMA_GetMode(DMA_GPU);
	case 0x1F8010B8:
		return DMA_GetMode(DMA_CDR);
	case 0x1F8010F0:
		return DMA_GetControlRegister();
	case 0x1F8010F4:
		return DMA_GetInterruptRegister();
	case 0x1F801110:
		return RCNT_GetValue(RCNT_HBLANK);
	case 0x1F801810:
		return GPU_Read();
	case 0x1F801814:
		return GPU_GetStatus();
	default:
		SDL_LogError(LOG_EMU,"Unrecognized 32-bit read address %.8X",address);
		return PCSX_Read32(address);
	}
}

// Assembly:
pushq %rbx
movl %edi, %ebx
testb $0x3, %bl
je 0x172425
leaq 0x4ffd(%rip), %rsi      # 0x177416
movl $0x13, %edi
xorl %eax, %eax
callq 0x10d0
testl $0x7fe00000, %ebx       # imm = 0x7FE00000
setne %al
movl %ebx, %ecx
andl $0xffe00000, %ecx       # imm = 0xFFE00000
cmpl $0xa0000000, %ecx       # imm = 0xA0000000
setne %cl
testb %cl, %al
jne 0x172482
shrl $0x2, %ebx
andl $0x7ffff, %ebx          # imm = 0x7FFFF
leaq 0x8f0d(%rip), %rax      # 0x17b360
leaq -0x482(%rip), %rcx      # 0x171fd8
cmpq %rcx, (%rax,%rbx,8)
je 0x172473
leaq 0x4f37(%rip), %rsi      # 0x17739e
movl $0x13, %edi
xorl %eax, %eax
callq 0x10d0
movq 0x408ee6(%rip), %rax    # 0x57b360
movl (%rax,%rbx,4), %eax
jmp 0x172553
movl %ebx, %eax
andl $0xfffffc00, %eax       # imm = 0xFFFFFC00
cmpl $0x1f800000, %eax       # imm = 0x1F800000
jne 0x1724a5
movq 0x408ed1(%rip), %rax    # 0x57b368
andl $0x3fc, %ebx            # imm = 0x3FC
movl (%rax,%rbx), %eax
jmp 0x172553
cmpl $0x1f8010ef, %ebx       # imm = 0x1F8010EF
jle 0x1724df
cmpl $0x1f80110f, %ebx       # imm = 0x1F80110F
jle 0x172515
cmpl $0x1f801110, %ebx       # imm = 0x1F801110
je 0x172546
cmpl $0x1f801810, %ebx       # imm = 0x1F801810
je 0x17255b
cmpl $0x1f801814, %ebx       # imm = 0x1F801814
jne 0x172561
popq %rbx
jmp 0x17127c
cmpl $0x1f8010a7, %ebx       # imm = 0x1F8010A7
jg 0x1724fe
cmpl $0x1f801014, %ebx       # imm = 0x1F801014
je 0x17252b
cmpl $0x1f801074, %ebx       # imm = 0x1F801074
jne 0x172561
callq 0x171225
jmp 0x172550
cmpl $0x1f8010a8, %ebx       # imm = 0x1F8010A8
je 0x17253b
cmpl $0x1f8010b8, %ebx       # imm = 0x1F8010B8
jne 0x172561
movl $0x3, %edi
jmp 0x172540
cmpl $0x1f8010f0, %ebx       # imm = 0x1F8010F0
je 0x172555
cmpl $0x1f8010f4, %ebx       # imm = 0x1F8010F4
jne 0x172561
popq %rbx
jmp 0x17133a
leaq 0x8d56(%rip), %rax      # 0x17b288
movl $0x1f801014, %edi       # imm = 0x1F801014
callq *(%rax)
jmp 0x172550
movl $0x2, %edi
popq %rbx
jmp 0x1712f2
movl $0x1, %edi
callq 0x17128c
movzwl %ax, %eax
popq %rbx
retq
popq %rbx
jmp 0x171319
popq %rbx
jmp 0x171248
leaq 0x4ec2(%rip), %rsi      # 0x17742a
movl $0x13, %edi
movl %ebx, %edx
xorl %eax, %eax
callq 0x10d0
leaq 0x8d13(%rip), %rax      # 0x17b290
movl %ebx, %edi
popq %rbx
jmpq *(%rax)