// File: /workspace/github_cpp_makefile_star2_O2/CMU-SAFARI[P]MQSim/src/ssd/Address_Mapping_Unit_Page_Level.cpp
// Function: SSD_Components::Address_Mapping_Unit_Page_Level::online_create_entry_for_reads(unsigned long, unsigned short, NVM::FlashMemory::Physical_Page_Address&, unsigned long)
PPA_type Address_Mapping_Unit_Page_Level::online_create_entry_for_reads(LPA_type lpa, const stream_id_type stream_id, NVM::FlashMemory::Physical_Page_Address& read_address, uint64_t read_sectors_bitmap)
	{
		AddressMappingDomain* domain = domains[stream_id];
		switch (domain->PlaneAllocationScheme) {
			//Static: Channel first
			case Flash_Plane_Allocation_Scheme_Type::CWDP:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)(lpa % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / domain->Channel_no) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / (domain->Channel_no * domain->Chip_no)) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / (domain->Channel_no * domain->Chip_no * domain->Die_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CWPD:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)(lpa % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / domain->Channel_no) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / (domain->Channel_no * domain->Chip_no * domain->Plane_no)) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / (domain->Channel_no * domain->Chip_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CDWP:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)(lpa % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / (domain->Channel_no * domain->Die_no)) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / domain->Channel_no) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / (domain->Channel_no * domain->Die_no * domain->Chip_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CDPW:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)(lpa % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / (domain->Channel_no * domain->Die_no * domain->Plane_no)) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / domain->Channel_no) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / (domain->Channel_no * domain->Die_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CPWD:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)(lpa % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / (domain->Channel_no * domain->Plane_no)) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / (domain->Channel_no * domain->Plane_no * domain->Chip_no)) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / domain->Channel_no) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CPDW:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)(lpa % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / (domain->Channel_no * domain->Plane_no * domain->Die_no)) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / (domain->Channel_no * domain->Plane_no)) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / domain->Channel_no) % domain->Plane_no)];
				break;
				//Static: Way first
			case Flash_Plane_Allocation_Scheme_Type::WCDP:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / domain->Chip_no) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)(lpa % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / (domain->Chip_no * domain->Channel_no)) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / (domain->Chip_no * domain->Channel_no * domain->Die_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WCPD:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / domain->Chip_no) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)(lpa % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / (domain->Chip_no * domain->Channel_no * domain->Plane_no)) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / (domain->Chip_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WDCP:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / (domain->Chip_no * domain->Die_no)) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)(lpa % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / domain->Chip_no) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / (domain->Chip_no * domain->Die_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WDPC:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / (domain->Chip_no * domain->Die_no * domain->Plane_no)) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)(lpa % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / domain->Chip_no) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / (domain->Chip_no * domain->Die_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WPCD:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / (domain->Chip_no * domain->Plane_no)) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)(lpa % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / (domain->Chip_no * domain->Plane_no * domain->Channel_no)) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / domain->Chip_no) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WPDC:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / (domain->Chip_no * domain->Plane_no * domain->Die_no)) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)(lpa % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / (domain->Chip_no * domain->Plane_no)) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / domain->Chip_no) % domain->Plane_no)];
				break;
				//Static: Die first
			case Flash_Plane_Allocation_Scheme_Type::DCWP:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / domain->Die_no) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / (domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)(lpa % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / (domain->Die_no * domain->Channel_no * domain->Chip_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DCPW:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / domain->Die_no) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / (domain->Die_no * domain->Channel_no * domain->Plane_no)) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)(lpa % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / (domain->Die_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DWCP:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / (domain->Die_no * domain->Chip_no)) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / domain->Die_no) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)(lpa % domain->Die_no)];
				read_address.PlaneID = domain->Die_ids[(unsigned int)((lpa / (domain->Die_no * domain->Chip_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DWPC:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / (domain->Die_no * domain->Chip_no * domain->Plane_no)) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / domain->Die_no) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)(lpa % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / (domain->Die_no * domain->Chip_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DPCW:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / (domain->Die_no * domain->Plane_no)) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / (domain->Die_no * domain->Plane_no * domain->Channel_no)) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)(lpa % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / domain->Die_no) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DPWC:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / (domain->Die_no * domain->Plane_no * domain->Chip_no)) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / (domain->Die_no * domain->Plane_no)) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)(lpa % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)((lpa / domain->Die_no) % domain->Plane_no)];
				break;
				//Static: Plane first
			case Flash_Plane_Allocation_Scheme_Type::PCWD:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / domain->Plane_no) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / (domain->Plane_no * domain->Channel_no)) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / (domain->Plane_no * domain->Channel_no * domain->Chip_no)) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)(lpa % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PCDW:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / domain->Plane_no) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / (domain->Plane_no * domain->Channel_no * domain->Die_no)) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / (domain->Plane_no * domain->Channel_no)) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)(lpa % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PWCD:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / (domain->Plane_no * domain->Chip_no)) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / domain->Plane_no) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / (domain->Plane_no * domain->Chip_no * domain->Channel_no)) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)(lpa % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PWDC:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / (domain->Plane_no * domain->Chip_no * domain->Die_no)) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / domain->Plane_no) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / (domain->Plane_no * domain->Chip_no)) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)(lpa % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PDCW:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / (domain->Plane_no * domain->Die_no)) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / (domain->Plane_no * domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / domain->Plane_no) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)(lpa % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PDWC:
				read_address.ChannelID = domain->Channel_ids[(unsigned int)((lpa / (domain->Plane_no * domain->Die_no * domain->Chip_no)) % domain->Channel_no)];
				read_address.ChipID = domain->Chip_ids[(unsigned int)((lpa / (domain->Plane_no * domain->Die_no)) % domain->Chip_no)];
				read_address.DieID = domain->Die_ids[(unsigned int)((lpa / domain->Plane_no) % domain->Die_no)];
				read_address.PlaneID = domain->Plane_ids[(unsigned int)(lpa % domain->Plane_no)];
				break;
			default:
				PRINT_ERROR("Unknown plane allocation scheme type!")
		}

		block_manager->Allocate_block_and_page_in_plane_for_user_write(stream_id, read_address);
		PPA_type ppa = Convert_address_to_ppa(read_address);
		domain->Update_mapping_info(ideal_mapping_table, stream_id, lpa, ppa, read_sectors_bitmap);

		return ppa;
	}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rcx, %r12
movl %edx, %ecx
movq 0xa8(%rdi), %rax
movl %edx, %edx
movq (%rax,%rdx,8), %r13
movl 0x208(%r13), %eax
cmpq $0x17, %rax
ja 0x25dd7
movq %r8, %rbx
movq %rsi, %r14
movq %rdi, %r15
leaq 0x2111a(%rip), %rdx     # 0x46368
movslq (%rdx,%rax,4), %rax
addq %rdx, %rax
jmpq *%rax
movq 0x210(%r13), %rsi
movl 0x218(%r13), %edi
movq %r14, %rax
xorl %edx, %edx
divq %rdi
movl (%rsi,%rdx,4), %edx
movl %edx, (%r12)
movq 0x220(%r13), %r8
movl 0x228(%r13), %esi
xorl %edx, %edx
divq %rsi
movl (%r8,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r8
imull %edi, %esi
movq %r14, %rax
xorl %edx, %edx
divq %rsi
movl 0x238(%r13), %edi
xorl %edx, %edx
divq %rdi
movl (%r8,%rdx,4), %eax
movl %eax, 0x8(%r12)
imull %edi, %esi
jmp 0x25bff
movq 0x210(%r13), %r8
movl 0x238(%r13), %edi
movl 0x248(%r13), %esi
movl %esi, %r9d
imull %edi, %r9d
movq %r14, %rax
xorl %edx, %edx
divq %r9
movl 0x218(%r13), %r10d
xorl %edx, %edx
divq %r10
movl (%r8,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r8
imull %r10d, %r9d
movq %r14, %rax
xorl %edx, %edx
divq %r9
movl 0x228(%r13), %r9d
xorl %edx, %edx
divq %r9
movl (%r8,%rdx,4), %eax
jmp 0x25827
movq 0x210(%r13), %rsi
movl 0x238(%r13), %r9d
movl 0x228(%r13), %r8d
movl %r8d, %edi
imull %r9d, %edi
movq %r14, %rax
xorl %edx, %edx
divq %rdi
movl 0x218(%r13), %r10d
xorl %edx, %edx
divq %r10
movl (%rsi,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r11
movq %r14, %rax
xorl %edx, %edx
divq %r9
movq %rdx, %rsi
xorl %edx, %edx
divq %r8
movl (%r11,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r8
movl (%r8,%rsi,4), %eax
movl %eax, 0x8(%r12)
imull %r10d, %edi
movq %r14, %rax
xorl %edx, %edx
divq %rdi
movl 0x248(%r13), %esi
xorl %edx, %edx
divq %rsi
leaq (%r8,%rdx,4), %rsi
jmp 0x25d82
movq 0x210(%r13), %r10
movl 0x228(%r13), %esi
movl 0x248(%r13), %edi
movl %edi, %r9d
imull %esi, %r9d
movl 0x238(%r13), %r8d
movl %r8d, %r11d
imull %r9d, %r11d
movq %r14, %rax
xorl %edx, %edx
divq %r11
movl 0x218(%r13), %r11d
xorl %edx, %edx
divq %r11
movl (%r10,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r10
movq %r14, %rax
xorl %edx, %edx
divq %rsi
movq %rax, %rsi
movl (%r10,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r10
movq %r14, %rax
xorl %edx, %edx
divq %r9
xorl %edx, %edx
divq %r8
movl (%r10,%rdx,4), %eax
jmp 0x25b88
movq 0x210(%r13), %rdi
movl 0x218(%r13), %r8d
movq %r14, %rax
xorl %edx, %edx
divq %r8
movq %rax, %rsi
movl (%rdi,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r9
movl 0x248(%r13), %edi
movl %edi, %r10d
imull %r8d, %r10d
movq %r14, %rax
xorl %edx, %edx
divq %r10
movl 0x228(%r13), %r8d
xorl %edx, %edx
divq %r8
movl (%r9,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r9
imull %r8d, %r10d
movq %r14, %rax
xorl %edx, %edx
divq %r10
jmp 0x25b78
movq 0x210(%r13), %r8
movl 0x238(%r13), %r9d
movl 0x218(%r13), %edi
movq %r14, %rax
xorl %edx, %edx
divq %r9
movq %rdx, %rsi
xorl %edx, %edx
divq %rdi
movl (%r8,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r8
imull %r9d, %edi
movq %r14, %rax
xorl %edx, %edx
divq %rdi
movl 0x228(%r13), %r9d
xorl %edx, %edx
divq %r9
movl (%r8,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %rax
movl (%rax,%rsi,4), %eax
movl %eax, 0x8(%r12)
imull %r9d, %edi
jmp 0x25a92
movq 0x210(%r13), %r10
movl 0x228(%r13), %r9d
movl 0x238(%r13), %r8d
movl %r8d, %edi
imull %r9d, %edi
movl 0x248(%r13), %esi
movl %esi, %r11d
imull %edi, %r11d
movq %r14, %rax
xorl %edx, %edx
divq %r11
movl 0x218(%r13), %r11d
xorl %edx, %edx
divq %r11
movl (%r10,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r10
movq %r14, %rax
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %edx
movl %edx, 0x4(%r12)
movq 0x230(%r13), %r9
xorl %edx, %edx
divq %r8
movl (%r9,%rdx,4), %eax
movl %eax, 0x8(%r12)
movq %r14, %rax
xorl %edx, %edx
divq %rdi
jmp 0x25c0e
movq 0x210(%r13), %rdi
movl 0x218(%r13), %r8d
movq %r14, %rax
xorl %edx, %edx
divq %r8
movq %rax, %rsi
movl (%rdi,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r9
movl 0x238(%r13), %r10d
movl %r10d, %edi
imull %r8d, %edi
movq %r14, %rax
xorl %edx, %edx
divq %rdi
movl 0x228(%r13), %r8d
xorl %edx, %edx
divq %r8
movl (%r9,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r9
movq %rsi, %rax
xorl %edx, %edx
divq %r10
movl (%r9,%rdx,4), %eax
jmp 0x25a89
movq 0x210(%r13), %r10
movl 0x238(%r13), %esi
movl 0x228(%r13), %r9d
movl %r9d, %r8d
imull %esi, %r8d
movl 0x248(%r13), %edi
movl %edi, %r11d
imull %r8d, %r11d
movq %r14, %rax
xorl %edx, %edx
divq %r11
movl 0x218(%r13), %r11d
xorl %edx, %edx
divq %r11
movl (%r10,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r10
movq %r14, %rax
xorl %edx, %edx
divq %rsi
movq %rdx, %rsi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %rax
movl (%rax,%rsi,4), %eax
jmp 0x256cb
movq 0x210(%r13), %rdi
movl 0x218(%r13), %r9d
movq %r14, %rax
xorl %edx, %edx
divq %r9
movq %rax, %rsi
movl (%rdi,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r10
movl 0x238(%r13), %r11d
movl %r11d, %r8d
imull %r9d, %r8d
movl 0x248(%r13), %edi
movl %edi, %r9d
imull %r8d, %r9d
movq %r14, %rax
xorl %edx, %edx
divq %r9
movl 0x228(%r13), %r9d
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r9
movq %rsi, %rax
xorl %edx, %edx
divq %r11
movl (%r9,%rdx,4), %eax
movl %eax, 0x8(%r12)
movq %r14, %rax
xorl %edx, %edx
divq %r8
jmp 0x25b90
movq 0x210(%r13), %r8
movl 0x228(%r13), %r9d
movl 0x218(%r13), %edi
movq %r14, %rax
xorl %edx, %edx
divq %r9
movq %rdx, %rsi
xorl %edx, %edx
divq %rdi
movl (%r8,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %rax
movl (%rax,%rsi,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %rsi
imull %r9d, %edi
movl 0x248(%r13), %r8d
movl %r8d, %r9d
imull %edi, %r9d
movq %r14, %rax
xorl %edx, %edx
divq %r9
movl 0x238(%r13), %r9d
xorl %edx, %edx
divq %r9
movl (%rsi,%rdx,4), %eax
jmp 0x25a14
movq 0x210(%r13), %rsi
movl 0x218(%r13), %edi
movq %r14, %rax
xorl %edx, %edx
divq %rdi
movl (%rsi,%rdx,4), %edx
movl %edx, (%r12)
movq 0x220(%r13), %r8
movl 0x228(%r13), %esi
xorl %edx, %edx
divq %rsi
movl (%r8,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r8
imull %edi, %esi
movl 0x248(%r13), %edi
movl %edi, %r9d
imull %esi, %r9d
movq %r14, %rax
xorl %edx, %edx
divq %r9
movl 0x238(%r13), %r9d
xorl %edx, %edx
divq %r9
movl (%r8,%rdx,4), %eax
movl %eax, 0x8(%r12)
movq %r14, %rax
xorl %edx, %edx
divq %rsi
jmp 0x25b90
movq 0x210(%r13), %r9
movl 0x238(%r13), %edi
movl 0x248(%r13), %esi
movl %esi, %r10d
imull %edi, %r10d
movl 0x228(%r13), %r8d
movl %r8d, %r11d
imull %r10d, %r11d
movq %r14, %rax
xorl %edx, %edx
divq %r11
movl 0x218(%r13), %r11d
xorl %edx, %edx
divq %r11
movl (%r9,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r9
movq %r14, %rax
xorl %edx, %edx
divq %r10
xorl %edx, %edx
divq %r8
movl (%r9,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r8
movq %r14, %rax
xorl %edx, %edx
divq %rdi
movl (%r8,%rdx,4), %edx
movl %edx, 0x8(%r12)
jmp 0x25c0e
movq 0x210(%r13), %rsi
movl 0x248(%r13), %r9d
movl 0x228(%r13), %r8d
movl %r8d, %edi
imull %r9d, %edi
movq %r14, %rax
xorl %edx, %edx
divq %rdi
movl 0x218(%r13), %r10d
xorl %edx, %edx
divq %r10
movl (%rsi,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r11
movq %r14, %rax
xorl %edx, %edx
divq %r9
movq %rdx, %rsi
xorl %edx, %edx
divq %r8
movl (%r11,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r8
imull %r10d, %edi
jmp 0x25aff
movq 0x210(%r13), %rdi
movl 0x218(%r13), %r8d
movq %r14, %rax
xorl %edx, %edx
divq %r8
movq %rax, %rsi
movl (%rdi,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r9
movl 0x248(%r13), %edi
movl %edi, %r10d
imull %r8d, %r10d
movl 0x238(%r13), %r8d
movl %r8d, %r11d
imull %r10d, %r11d
movq %r14, %rax
xorl %edx, %edx
divq %r11
movl 0x228(%r13), %r11d
xorl %edx, %edx
divq %r11
movl (%r9,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r9
movq %r14, %rax
xorl %edx, %edx
divq %r10
jmp 0x25b7f
movq 0x210(%r13), %r10
movl 0x248(%r13), %esi
movl 0x228(%r13), %r9d
movl %r9d, %r8d
imull %esi, %r8d
movl 0x238(%r13), %edi
movl %edi, %r11d
imull %r8d, %r11d
movq %r14, %rax
xorl %edx, %edx
divq %r11
movl 0x218(%r13), %r11d
xorl %edx, %edx
divq %r11
movl (%r10,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r10
movq %r14, %rax
xorl %edx, %edx
divq %rsi
movq %rdx, %rsi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r9
movq %r14, %rax
xorl %edx, %edx
divq %r8
xorl %edx, %edx
divq %rdi
movl (%r9,%rdx,4), %eax
jmp 0x25d72
movq 0x210(%r13), %r8
movl 0x238(%r13), %r9d
movl 0x218(%r13), %edi
movq %r14, %rax
xorl %edx, %edx
divq %r9
movq %rdx, %rsi
xorl %edx, %edx
divq %rdi
movl (%r8,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r10
imull %r9d, %edi
movl 0x248(%r13), %r8d
movl %r8d, %r9d
imull %edi, %r9d
movq %r14, %rax
xorl %edx, %edx
divq %r9
movl 0x228(%r13), %r9d
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %rax
movl (%rax,%rsi,4), %eax
movl %eax, 0x8(%r12)
movq %r14, %rax
xorl %edx, %edx
divq %rdi
xorl %edx, %edx
divq %r8
jmp 0x25c13
movq 0x210(%r13), %r8
movl 0x228(%r13), %r9d
movl 0x218(%r13), %edi
movq %r14, %rax
xorl %edx, %edx
divq %r9
movq %rdx, %rsi
xorl %edx, %edx
divq %rdi
movl (%r8,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %rax
movl (%rax,%rsi,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %rsi
imull %r9d, %edi
movq %r14, %rax
xorl %edx, %edx
divq %rdi
movl 0x238(%r13), %r8d
xorl %edx, %edx
divq %r8
movl (%rsi,%rdx,4), %eax
movl %eax, 0x8(%r12)
imull %r8d, %edi
movq %r14, %rax
xorl %edx, %edx
divq %rdi
jmp 0x25c07
movq 0x210(%r13), %r8
movl 0x248(%r13), %r9d
movl 0x218(%r13), %edi
movq %r14, %rax
xorl %edx, %edx
divq %r9
movq %rdx, %rsi
xorl %edx, %edx
divq %rdi
movl (%r8,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r8
imull %r9d, %edi
movq %r14, %rax
xorl %edx, %edx
divq %rdi
movl 0x228(%r13), %r9d
xorl %edx, %edx
divq %r9
movl (%r8,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r8
imull %r9d, %edi
movq %r14, %rax
xorl %edx, %edx
divq %rdi
movl 0x238(%r13), %edi
jmp 0x25d69
movq 0x210(%r13), %rsi
movl 0x228(%r13), %r9d
movl 0x248(%r13), %edi
movl %edi, %r8d
imull %r9d, %r8d
movq %r14, %rax
xorl %edx, %edx
divq %r8
movl 0x218(%r13), %r10d
xorl %edx, %edx
divq %r10
movl (%rsi,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r11
movq %r14, %rax
xorl %edx, %edx
divq %r9
movq %rax, %rsi
movl (%r11,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r9
imull %r10d, %r8d
movq %r14, %rax
xorl %edx, %edx
divq %r8
movl 0x238(%r13), %r8d
xorl %edx, %edx
divq %r8
movl (%r9,%rdx,4), %eax
movl %eax, 0x8(%r12)
movq %rsi, %rax
xorl %edx, %edx
divq %rdi
jmp 0x25c13
movq 0x210(%r13), %r9
movl 0x228(%r13), %r10d
movl 0x238(%r13), %edi
movl %edi, %esi
imull %r10d, %esi
movq %r14, %rax
xorl %edx, %edx
divq %rsi
movl 0x218(%r13), %r8d
xorl %edx, %edx
divq %r8
movl (%r9,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r9
movq %r14, %rax
xorl %edx, %edx
divq %r10
movl (%r9,%rdx,4), %edx
movl %edx, 0x4(%r12)
movq 0x230(%r13), %r9
xorl %edx, %edx
divq %rdi
movl (%r9,%rdx,4), %eax
movl %eax, 0x8(%r12)
imull %r8d, %esi
movq %r14, %rax
xorl %edx, %edx
divq %rsi
movl 0x248(%r13), %esi
xorl %edx, %edx
divq %rsi
movq %rdx, %rsi
jmp 0x25d77
movq 0x210(%r13), %r8
movl 0x248(%r13), %esi
movl 0x238(%r13), %edi
movl %edi, %r9d
imull %esi, %r9d
movq %r14, %rax
xorl %edx, %edx
divq %r9
movl 0x218(%r13), %r10d
xorl %edx, %edx
divq %r10
movl (%r8,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r8
imull %r10d, %r9d
movq %r14, %rax
xorl %edx, %edx
divq %r9
movl 0x228(%r13), %r9d
xorl %edx, %edx
divq %r9
movl (%r8,%rdx,4), %eax
jmp 0x25d52
movq 0x210(%r13), %r8
movl 0x248(%r13), %r9d
movl 0x218(%r13), %edi
movq %r14, %rax
xorl %edx, %edx
divq %r9
movq %rdx, %rsi
xorl %edx, %edx
divq %rdi
movl (%r8,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r8
imull %r9d, %edi
movl 0x238(%r13), %r9d
movl %r9d, %r10d
imull %edi, %r10d
movq %r14, %rax
xorl %edx, %edx
divq %r10
movl 0x228(%r13), %r10d
xorl %edx, %edx
divq %r10
movl (%r8,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r8
movq %r14, %rax
xorl %edx, %edx
divq %rdi
xorl %edx, %edx
divq %r9
jmp 0x25d6e
movq 0x210(%r13), %r9
movl 0x248(%r13), %esi
movl 0x238(%r13), %edi
movl %edi, %r10d
imull %esi, %r10d
movl 0x228(%r13), %r8d
movl %r8d, %r11d
imull %r10d, %r11d
movq %r14, %rax
xorl %edx, %edx
divq %r11
movl 0x218(%r13), %r11d
xorl %edx, %edx
divq %r11
movl (%r9,%rdx,4), %eax
movl %eax, (%r12)
movq 0x220(%r13), %r9
movq %r14, %rax
xorl %edx, %edx
divq %r10
xorl %edx, %edx
divq %r8
movl (%r9,%rdx,4), %eax
movl %eax, 0x4(%r12)
movq 0x230(%r13), %r8
movq %r14, %rax
xorl %edx, %edx
divq %rsi
movq %rdx, %rsi
xorl %edx, %edx
divq %rdi
movl (%r8,%rdx,4), %eax
movl %eax, 0x8(%r12)
shlq $0x2, %rsi
addq 0x240(%r13), %rsi
movl (%rsi), %eax
movl %eax, 0xc(%r12)
movq 0x40(%r15), %rdi
movq (%rdi), %rax
movzwl %cx, %ebp
movl %ebp, %esi
movq %r12, %rdx
callq *0x10(%rax)
movq (%r15), %rax
movq %r15, %rdi
movq %r12, %rsi
callq *0x90(%rax)
movq %rax, %r12
movzbl 0x4c(%r15), %esi
movq %r13, %rdi
movl %ebp, %edx
movq %r14, %rcx
movq %rax, %r8
movq %rbx, %r9
callq 0x265a6
movq %r12, %rax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x3c212(%rip), %rbx     # 0x61ff0
leaq 0x1e7a3(%rip), %rsi     # 0x44588
movq %rbx, %rdi
callq 0x7360
leaq 0x20b50(%rip), %rsi     # 0x46944
movq %rbx, %rdi
callq 0x7360
movq %rax, %rdi
callq 0x71a0
movq 0x3c1c5(%rip), %rdi     # 0x61fd0
callq 0x73d0
pushq $0x1
popq %rdi
callq 0x73e0