// File: /workspace/github_cpp_makefile_star2_O3/jkingan[P]ladyheather/heathgps.cpp
// Function: restore_x72_state()
void restore_x72_state()
{
unsigned i;
double val;

   // restore last known settings from disk file since STUPID Symmetricom 
   // does not save them in EEPROM

   if(x72_file) {
      fclose(x72_file);
      x72_file = 0;
   }
   x72_state_set = 1;

   sprintf(x72_name, "%s%s", dump_prefix, SYM_EEP_FILE);
   x72_file = fopen(x72_name, "r");
   if(x72_file == 0) goto open_x72_for_write;

   while(fgets(out, sizeof out, x72_file) != NULL) {  // get the last saved settings
      if(out[0] == 0) continue;

      for(i=0; i<strlen(out); i++) {   // skip leading white space
         if(out[i] == ' ') continue;
         else if(out[i] == '\t') continue;
         else break;
      }


      if(out[i] == '.') ;          // first thing on the line should be a number
      else if(out[i] == '+') ;
      else if(out[i] == '-') ;
      else if(isdigit(out[i])) ;
      else continue;               // treat anything else as a comment

      strupr(out);
if(debug_file) fprintf(debug_file, "restore:%s\n", out);  //burp

      if(strstr(out, "DIVIDER")) {
         last_x72_acmos_freq = atoi(&out[i]);
         user_set_x72_acmos_freq = 1;
      }
      else if(strstr(out, "DDS")) {
         last_x72_dds = atof(&out[i]);
         user_set_x72_dds = 1;
      }
      else if(strstr(out, "OSC")) {
         val = atof(&out[i]);
         if(val > 0.0) {
            last_x72_osc = x72_osc = atof(&out[i]);
            user_set_x72_osc = 1;
         }
      }
      else if(strstr(out, "EFC")) {
         last_x72_efc = atoi(&out[i]);
         user_set_x72_efc = 1;
      }
      else if(strstr(out, "PPS")) {
         last_x72_pps_enable = atoi(&out[i]);
         user_set_x72_pps_enable = 1;
      }
      else if(strstr(out, "TIC")) {
         last_x72_tic = atoi(&out[i]);
         user_set_x72_tic = 1;
      }
      else if(strstr(out, "SRVC")) {
         last_x72_srvc = atoi(&out[i]);
         user_set_x72_srvc = 1;
      }

      else if(strstr(out, "DISCIPLINE")) { // discipling parameters
         last_x72_dmode = atoi(&out[i]);
         user_set_x72_dmode = 1;
      }
      else if(strstr(out, "DMODE")) {      // old name for this param
         last_x72_dmode = atoi(&out[i]);
         user_set_x72_dmode = 1;
      }
      else if(strstr(out, "TC")) { 
         last_x72_tc = atoi(&out[i]);
         user_set_x72_tc = 1;
      }
      else if(strstr(out, "DAMPING")) {
         last_x72_damping = atof(&out[i]);
         user_set_x72_damping = 1;
      }
      else if(strstr(out, "JAMTHRESH")) {
         last_x72_jamthresh = atof(&out[i]);
         user_set_x72_jamthresh = 1;
      }
      else if(strstr(out, "HOLDOVER")) {
         last_x72_holdover = atoi(&out[i]);
         user_set_x72_holdover = 1;
      }
      else if(strstr(out, "EOF")) {
         break;
      }
   }

   if(x72_file) {
      fclose(x72_file);
      x72_file = 0;
   }

   open_x72_for_write:
   x72_file = fopen(x72_name, "w");

   // send the last known settings values to the device and re-write the values to the settings file
   if(user_set_x72_dmode) set_x72_discipline(last_x72_dmode);
   if((last_x72_dmode == 1) || (last_x72_dmode == 2)) {  // firmware disciplining enabled
      // don't set TC or DAMPING values... this messes up X72 firmware disciplining
   }
   else {
      if(user_set_x72_dds)     set_x72_dds(last_x72_dds);
      if(user_set_x72_tic)     set_x72_tic(last_x72_tic);
      if(user_set_x72_tc)      set_x72_tc(last_x72_tc);
      if(user_set_x72_damping) set_x72_damping(last_x72_damping);

      // software disciplining parameters
      if(user_set_x72_jamthresh)  set_x72_jamthresh(last_x72_jamthresh);
      if(user_set_x72_holdover)   set_x72_holdover(last_x72_holdover);
   }

   if(user_set_x72_acmos_freq) set_x72_acmos_freq(last_x72_acmos_freq);
   if(user_set_x72_efc)        set_x72_efc(last_x72_efc);
   if(user_set_x72_srvc)       set_x72_srvc(last_x72_srvc);
   if(user_set_x72_pps_enable) {
      user_pps_enable = last_x72_pps_enable;
      set_pps(user_pps_enable, pps_polarity,  delay_value, pps1_delay,  pps_threshold, 4);
   }

   x72_restore_timeout = 10; // pause disciplining for 10 seconds after a settings restoration
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
leaq 0x1af999(%rip), %r15    # 0x23e3b8
movq (%r15), %rdi
testq %rdi, %rdi
je 0x8ea33
callq 0x9370
movq $0x0, (%r15)
leaq 0x18c2d6(%rip), %rax    # 0x21ad10
movl $0x1, (%rax)
leaq 0x1aee19(%rip), %rbx    # 0x23d860
leaq 0x7cb4c(%rip), %rsi     # 0x10b59a
leaq 0x27f76b(%rip), %rdx    # 0x30e1c0
leaq 0x95582(%rip), %rcx     # 0x123fde
movq %rbx, %rdi
xorl %eax, %eax
callq 0x9060
leaq 0x92320(%rip), %rsi     # 0x120d8d
movq %rbx, %rdi
callq 0x9430
movq %rax, (%r15)
testq %rax, %rax
je 0x8ee07
leaq 0x2ad798(%rip), %rbx    # 0x33c220
movq %rbx, %rdi
movl $0x201, %esi            # imm = 0x201
movq %rax, %rdx
callq 0x9600
testq %rax, %rax
je 0x8edf3
movabsq $0x680000000000, %r13   # imm = 0x680000000000
movb (%rbx), %r14b
testb %r14b, %r14b
je 0x8eb95
movq %rbx, %rdi
callq 0x9120
testq %rax, %rax
je 0x8eaed
movl $0x1, %ecx
xorl %r12d, %r12d
movzbl (%rbx,%r12), %r14d
cmpl $0x20, %r14d
je 0x8eadd
cmpl $0x9, %r14d
jne 0x8eaf0
movl %ecx, %r12d
incl %ecx
cmpq %r12, %rax
ja 0x8eacc
movb (%rbx,%r12), %r14b
jmp 0x8eaf0
xorl %r12d, %r12d
cmpb $0x2e, %r14b
ja 0x8ebb3
movzbl %r14b, %eax
btq %rax, %r13
jae 0x8ebb3
movq %rbx, %rdi
callq 0x9899
leaq 0x1af879(%rip), %rax    # 0x23e390
movq (%rax), %rdi
testq %rdi, %rdi
je 0x8eb30
leaq 0x954c3(%rip), %rsi     # 0x123fe9
movq %rbx, %rdx
xorl %eax, %eax
callq 0x9560
addq %rbx, %r12
movq %rbx, %rdi
leaq 0x954b8(%rip), %rsi     # 0x123ff5
callq 0x9090
testq %rax, %rax
je 0x8eb61
movq %r12, %rdi
callq 0x95e0
leaq 0x18c376(%rip), %rcx    # 0x21aecc
movl %eax, (%rcx)
leaq 0x18c359(%rip), %rax    # 0x21aeb8
jmp 0x8eb8f
movq %rbx, %rdi
leaq 0x8f38d(%rip), %rsi     # 0x11def8
callq 0x9090
testq %rax, %rax
je 0x8ebc5
movq %r12, %rdi
callq 0x9470
leaq 0x18c35c(%rip), %rax    # 0x21aee0
movsd %xmm0, (%rax)
leaq 0x18c321(%rip), %rax    # 0x21aeb0
movl $0x1, (%rax)
movq (%r15), %rdx
movq %rbx, %rdi
movl $0x201, %esi            # imm = 0x201
callq 0x9600
testq %rax, %rax
jne 0x8eaab
jmp 0x8edf3
movsbl %r14b, %eax
addl $-0x30, %eax
cmpl $0x9, %eax
jbe 0x8eb08
jmp 0x8eb95
movq %rbx, %rdi
leaq 0x7aa23(%rip), %rsi     # 0x1095f2
callq 0x9090
testq %rax, %rax
je 0x8ec0a
movq %r12, %rdi
callq 0x9470
ucomisd 0x7a52f(%rip), %xmm0    # 0x109118
jbe 0x8eb95
leaq 0x18c076(%rip), %rax    # 0x21ac68
movsd %xmm0, (%rax)
leaq 0x18c2eb(%rip), %rax    # 0x21aee8
movsd %xmm0, (%rax)
leaq 0x18c2ac(%rip), %rax    # 0x21aeb4
jmp 0x8eb8f
movq %rbx, %rdi
leaq 0x8f1fc(%rip), %rsi     # 0x11de10
callq 0x9090
testq %rax, %rax
je 0x8ec3b
movq %r12, %rdi
callq 0x95e0
leaq 0x18c2a3(%rip), %rcx    # 0x21aed0
movl %eax, (%rcx)
leaq 0x18c28e(%rip), %rax    # 0x21aec4
jmp 0x8eb8f
movq %rbx, %rdi
leaq 0x9774e(%rip), %rsi     # 0x126393
callq 0x9090
testq %rax, %rax
je 0x8ec6c
movq %r12, %rdi
callq 0x95e0
leaq 0x18c276(%rip), %rcx    # 0x21aed4
movl %eax, (%rcx)
leaq 0x18c255(%rip), %rax    # 0x21aebc
jmp 0x8eb8f
movq %rbx, %rdi
leaq 0x9ecfa(%rip), %rsi     # 0x12d970
callq 0x9090
testq %rax, %rax
je 0x8ec9d
movq %r12, %rdi
callq 0x95e0
leaq 0x18c249(%rip), %rcx    # 0x21aed8
movl %eax, (%rcx)
leaq 0x18c228(%rip), %rax    # 0x21aec0
jmp 0x8eb8f
movq %rbx, %rdi
leaq 0x95356(%rip), %rsi     # 0x123ffd
callq 0x9090
testq %rax, %rax
je 0x8ecce
movq %r12, %rdi
callq 0x95e0
leaq 0x18c21c(%rip), %rcx    # 0x21aedc
movl %eax, (%rcx)
leaq 0x18c1ff(%rip), %rax    # 0x21aec8
jmp 0x8eb8f
movq %rbx, %rdi
leaq 0x9532a(%rip), %rsi     # 0x124002
callq 0x9090
testq %rax, %rax
jne 0x8ecf6
movq %rbx, %rdi
leaq 0x95321(%rip), %rsi     # 0x12400d
callq 0x9090
testq %rax, %rax
je 0x8ed13
movq %r12, %rdi
callq 0x95e0
leaq 0x18c21b(%rip), %rcx    # 0x21af20
movl %eax, (%rcx)
leaq 0x18c1f6(%rip), %rax    # 0x21af04
jmp 0x8eb8f
movq %rbx, %rdi
leaq 0xa4f2d(%rip), %rsi     # 0x133c4a
callq 0x9090
testq %rax, %rax
je 0x8ed44
movq %r12, %rdi
callq 0x95e0
leaq 0x18c1e6(%rip), %rcx    # 0x21af1c
movl %eax, (%rcx)
leaq 0x18c1b5(%rip), %rax    # 0x21aef4
jmp 0x8eb8f
movq %rbx, %rdi
leaq 0x952c5(%rip), %rsi     # 0x124013
callq 0x9090
testq %rax, %rax
je 0x8ed77
movq %r12, %rdi
callq 0x9470
leaq 0x18c1a1(%rip), %rax    # 0x21af08
movsd %xmm0, (%rax)
leaq 0x18c186(%rip), %rax    # 0x21aef8
jmp 0x8eb8f
movq %rbx, %rdi
leaq 0x9529a(%rip), %rsi     # 0x12401b
callq 0x9090
testq %rax, %rax
je 0x8edaa
movq %r12, %rdi
callq 0x9470
leaq 0x18c176(%rip), %rax    # 0x21af10
movsd %xmm0, (%rax)
leaq 0x18c157(%rip), %rax    # 0x21aefc
jmp 0x8eb8f
movq %rbx, %rdi
leaq 0x9539b(%rip), %rsi     # 0x12414f
callq 0x9090
testq %rax, %rax
je 0x8eddb
movq %r12, %rdi
callq 0x95e0
leaq 0x18c14b(%rip), %rcx    # 0x21af18
movl %eax, (%rcx)
leaq 0x18c12a(%rip), %rax    # 0x21af00
jmp 0x8eb8f
movq %rbx, %rdi
leaq 0x95240(%rip), %rsi     # 0x124025
callq 0x9090
testq %rax, %rax
je 0x8eb95
movq (%r15), %rdi
testq %rdi, %rdi
je 0x8ee07
callq 0x9370
movq $0x0, (%r15)
leaq 0x1aea52(%rip), %rdi    # 0x23d860
leaq 0x925a6(%rip), %rsi     # 0x1213bb
callq 0x9430
movq %rax, (%r15)
leaq 0x18c0e0(%rip), %rax    # 0x21af04
cmpl $0x0, (%rax)
je 0x8ee37
leaq 0x18c0f0(%rip), %rax    # 0x21af20
movl (%rax), %edi
callq 0x6db23
leaq 0x18c0e2(%rip), %rax    # 0x21af20
movl (%rax), %eax
decl %eax
cmpl $0x2, %eax
jb 0x8eeed
leaq 0x18c05e(%rip), %rax    # 0x21aeb0
cmpl $0x0, (%rax)
je 0x8ee67
leaq 0x18c082(%rip), %rax    # 0x21aee0
movsd (%rax), %xmm0
callq 0x70fb0
leaq 0x18c052(%rip), %rax    # 0x21aec0
cmpl $0x0, (%rax)
je 0x8ee81
leaq 0x18c05e(%rip), %rax    # 0x21aed8
movl (%rax), %edi
callq 0x8fbce
leaq 0x18c06c(%rip), %rax    # 0x21aef4
cmpl $0x0, (%rax)
je 0x8ee9b
leaq 0x18c088(%rip), %rax    # 0x21af1c
movl (%rax), %edi
callq 0x7117e
leaq 0x18c056(%rip), %rax    # 0x21aef8
cmpl $0x0, (%rax)
je 0x8eeb7
leaq 0x18c05a(%rip), %rax    # 0x21af08
movsd (%rax), %xmm0
callq 0x71261
leaq 0x18c03e(%rip), %rax    # 0x21aefc
cmpl $0x0, (%rax)
je 0x8eed3
leaq 0x18c046(%rip), %rax    # 0x21af10
movsd (%rax), %xmm0
callq 0x710f3
leaq 0x18c026(%rip), %rax    # 0x21af00
cmpl $0x0, (%rax)
je 0x8eeed
leaq 0x18c032(%rip), %rax    # 0x21af18
movl (%rax), %edi
callq 0x712ff
leaq 0x18bfc4(%rip), %rax    # 0x21aeb8
cmpl $0x0, (%rax)
je 0x8ef07
leaq 0x18bfcc(%rip), %rax    # 0x21aecc
movl (%rax), %edi
callq 0x8fc67
leaq 0x18bfb6(%rip), %rax    # 0x21aec4
cmpl $0x0, (%rax)
je 0x8ef21
leaq 0x18bfb6(%rip), %rax    # 0x21aed0
movl (%rax), %edi
callq 0x8fb6f
leaq 0x18bfa0(%rip), %rax    # 0x21aec8
cmpl $0x0, (%rax)
je 0x8ef3b
leaq 0x18bfa8(%rip), %rax    # 0x21aedc
movl (%rax), %edi
callq 0x8fcc3
leaq 0x18bf7a(%rip), %rax    # 0x21aebc
cmpl $0x0, (%rax)
je 0x8ef90
leaq 0x18bf86(%rip), %rax    # 0x21aed4
movzbl (%rax), %edi
leaq 0x27edc9(%rip), %rax    # 0x30dd21
movb %dil, (%rax)
leaq 0x27edb6(%rip), %rax    # 0x30dd18
movzbl (%rax), %esi
leaq 0x27ee54(%rip), %rax    # 0x30ddc0
movsd (%rax), %xmm0
leaq 0x27ee61(%rip), %rax    # 0x30ddd8
movsd (%rax), %xmm1
leaq 0x27ed9a(%rip), %rax    # 0x30dd1c
movss (%rax), %xmm2
movl $0x4, %edx
callq 0x6add8
movl $0xa, 0x2ddc3a(%rip)    # 0x36cbd4
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq