// File: /workspace/github_cpp_makefile_star2_O2/ys1998[P]spsim/src/alu.cpp
// Function: ALU1::operate()
void ALU1::operate(void){
	int funct = std::get<1>(i.type());
	int opcode = std::get<0>(i.type());
	if(funct == FUNCT["add"]){
		res = in1 + in2;
	}else if(funct == FUNCT["sub"]){
		res = in1 - in2;
	}else if(opcode != 0){
		if ((opcode == OPCODE["beq"]) || (opcode == OPCODE["bne"]))	{	
			if(opcode == OPCODE["beq"]){
				res = (in1 == in2);
			}else if(opcode == OPCODE["bne"]){
				res = (in1 != in2);
			}
			// Branch prediction update
			int possible_jump_address = i.get_pc() + 1 + i.get_immediate();
			*(predict_addr + i.get_pc() % BRANCH_PREDICT_SLOTS) = possible_jump_address;
			
			if(res == 1){
				*(predict + i.get_pc() % BRANCH_PREDICT_SLOTS) += 1;
				if(*(predict + i.get_pc() % BRANCH_PREDICT_SLOTS) == STRONGLY_TAKEN + 1)
					*(predict + i.get_pc() % BRANCH_PREDICT_SLOTS) = STRONGLY_TAKEN;
			}else{
				*(predict + i.get_pc() % BRANCH_PREDICT_SLOTS) -= 1;
				if(*(predict + i.get_pc() % BRANCH_PREDICT_SLOTS) == STRONGLY_NOT_TAKEN - 1)
					*(predict + i.get_pc() % BRANCH_PREDICT_SLOTS) = STRONGLY_NOT_TAKEN;
			}
			
			if (res != i.predicted || ((res == 1) && (possible_jump_address != i.jumpAddressPred))){
				//	case of misprediction
				if(res == 0) possible_jump_address = i.get_pc()+1;
				// flush second ALU
				a->flush(i.get_id());
				a3->flush(i.get_id());
				// flush other entities
				f->flush(i.get_id(), possible_jump_address);
			}
				
		}	
	} 
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x50, %rsp
movq %rdi, %rbx
leaq 0x8(%rdi), %r14
leaq 0x10(%rsp), %r15
movq %r15, %rdi
movq %r14, %rsi
callq 0x7c7c
movl (%r15), %r12d
leaq 0x10(%rsp), %r15
movq %r15, %rdi
movq %r14, %rsi
callq 0x7c7c
movl 0x4(%r15), %ebp
leaq 0xc737(%rip), %rsi      # 0x10004
leaq 0x10(%rsp), %rdi
leaq 0x30(%rsp), %rdx
callq 0x4860
leaq 0x13955(%rip), %rdi     # 0x17238
leaq 0x10(%rsp), %rsi
callq 0x47fa
movl (%rax), %r14d
leaq 0x10(%rsp), %rdi
callq 0x3100
cmpl %r14d, %r12d
jne 0x390d
movl 0xb8(%rbx), %eax
addl 0xb4(%rbx), %eax
jmp 0x3952
leaq 0xc6f4(%rip), %rsi      # 0x10008
leaq 0x10(%rsp), %rdi
leaq 0x30(%rsp), %rdx
callq 0x4860
leaq 0x1390e(%rip), %rdi     # 0x17238
leaq 0x10(%rsp), %rsi
callq 0x47fa
movl (%rax), %r14d
leaq 0x10(%rsp), %rdi
callq 0x3100
cmpl %r14d, %r12d
jne 0x3965
movl 0xb4(%rbx), %eax
subl 0xb8(%rbx), %eax
movl %eax, 0xbc(%rbx)
addq $0x50, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
testl %ebp, %ebp
je 0x3958
leaq 0xc69c(%rip), %rsi      # 0x1000c
leaq 0x10(%rsp), %rdi
leaq 0xf(%rsp), %rdx
callq 0x4860
leaq 0x13882(%rip), %rdi     # 0x17208
leaq 0x10(%rsp), %rsi
callq 0x47fa
cmpl (%rax), %ebp
jne 0x39a0
leaq 0x10(%rsp), %rdi
callq 0x3100
jmp 0x39e7
leaq 0xc669(%rip), %rsi      # 0x10010
leaq 0x30(%rsp), %rdi
leaq 0xe(%rsp), %rdx
callq 0x4860
leaq 0x1384b(%rip), %rdi     # 0x17208
leaq 0x30(%rsp), %rsi
callq 0x47fa
movl (%rax), %r14d
leaq 0x30(%rsp), %rdi
callq 0x3100
leaq 0x10(%rsp), %rdi
callq 0x3100
cmpl %r14d, %ebp
jne 0x3958
leaq 0xc61e(%rip), %rsi      # 0x1000c
leaq 0x10(%rsp), %rdi
leaq 0x30(%rsp), %rdx
callq 0x4860
leaq 0x13804(%rip), %rdi     # 0x17208
leaq 0x10(%rsp), %rsi
callq 0x47fa
movl (%rax), %r14d
leaq 0x10(%rsp), %rdi
callq 0x3100
cmpl %r14d, %ebp
jne 0x3a31
movl 0xb4(%rbx), %eax
cmpl 0xb8(%rbx), %eax
sete %al
jmp 0x3a79
leaq 0xc5d8(%rip), %rsi      # 0x10010
leaq 0x10(%rsp), %rdi
leaq 0x30(%rsp), %rdx
callq 0x4860
leaq 0x137ba(%rip), %rdi     # 0x17208
leaq 0x10(%rsp), %rsi
callq 0x47fa
movl (%rax), %r14d
leaq 0x10(%rsp), %rdi
callq 0x3100
cmpl %r14d, %ebp
jne 0x3a82
movl 0xb4(%rbx), %eax
cmpl 0xb8(%rbx), %eax
setne %al
movzbl %al, %eax
movl %eax, 0xbc(%rbx)
movl 0xc(%rbx), %eax
movl 0x38(%rbx), %ecx
leal (%rax,%rcx), %ebp
incl %ebp
movq 0x100(%rbx), %rcx
pushq $0x20
popq %rsi
cltd
idivl %esi
movslq %edx, %rax
movl %ebp, (%rcx,%rax,4)
movl 0xc(%rbx), %eax
movl 0xbc(%rbx), %edi
cltd
idivl %esi
movq 0xf8(%rbx), %rcx
movslq %edx, %rax
movl (%rcx,%rax,4), %edx
cmpl $0x1, %edi
jne 0x3adb
incl %edx
movl %edx, (%rcx,%rax,4)
movl 0xc(%rbx), %eax
cltd
idivl %esi
movslq %edx, %rax
cmpl $0x4, (%rcx,%rax,4)
jne 0x3af3
movl $0x3, (%rcx,%rax,4)
jmp 0x3af3
decl %edx
movl %edx, (%rcx,%rax,4)
movl 0xc(%rbx), %eax
cltd
idivl %esi
movslq %edx, %rax
cmpl $-0x1, (%rcx,%rax,4)
jne 0x3af3
andl $0x0, (%rcx,%rax,4)
movl 0xbc(%rbx), %eax
cmpl 0x78(%rbx), %eax
jne 0x3b11
cmpl $0x1, %eax
jne 0x3958
cmpl 0x7c(%rbx), %ebp
jne 0x3b1a
jmp 0x3958
testl %eax, %eax
jne 0x3b1a
movl 0xc(%rbx), %ebp
incl %ebp
movq 0xe0(%rbx), %rdi
movl 0x8(%rbx), %esi
movq (%rdi), %rax
callq *0x10(%rax)
movq 0xe8(%rbx), %rdi
movl 0x8(%rbx), %esi
movq (%rdi), %rax
callq *0x10(%rax)
movq 0xf0(%rbx), %rdi
movl 0x8(%rbx), %esi
movl %ebp, %edx
callq 0x69ac
jmp 0x3958
jmp 0x3b71
jmp 0x3b80
movq %rax, %rbx
leaq 0x30(%rsp), %rdi
callq 0x3100
jmp 0x3b74
jmp 0x3b71
jmp 0x3b71
jmp 0x3b80
jmp 0x3b71
jmp 0x3b80
jmp 0x3b71
jmp 0x3b80
movq %rax, %rbx
leaq 0x10(%rsp), %rdi
callq 0x3100
jmp 0x3b83
movq %rax, %rbx
movq %rbx, %rdi
callq 0x3320
nop