// File: /workspace/github_c_makefile_star2_O2/cogbee[P]vmir-latest/src/vmir_transform.c
// Function: liveness_set_succ
static void
liveness_set_succ(ir_function_t *f, ir_instr_t *ii)
{
  switch(ii->ii_class) {
  case IR_IC_RET:
  case IR_IC_UNREACHABLE:
  case IR_IC_RESUME:
    ii->ii_num_succ = 0;
    break;

  case IR_IC_CAST:
  case IR_IC_VAARG:
  case IR_IC_LOAD:
  case IR_IC_BINOP:
  case IR_IC_CMP2:
  case IR_IC_STORE:
  case IR_IC_ALLOCA:
  case IR_IC_SELECT:
  case IR_IC_CMP_SELECT:
  case IR_IC_LEA:
  case IR_IC_MOVE:
  case IR_IC_VMOP:
  case IR_IC_CALL:
  case IR_IC_STACKCOPY:
  case IR_IC_STACKSHRINK:
  case IR_IC_MLA:
  case IR_IC_LANDINGPAD:
  case IR_IC_EXTRACTVAL:
    /* -1 just means that we have one successor and it's the next instruction
     * Note that this is different from ii_num_suc == 1 where we have one
     * successor and it's NOT the next instruction (unconditional branch)
     */
    ii->ii_num_succ = -1;
    break;

  case IR_IC_SWITCH:
    {
      ir_instr_switch_t *s = (ir_instr_switch_t *)ii;

      ii->ii_num_succ = 1 + s->num_paths;
      ii->ii_succ = malloc(sizeof(ir_bb_t *) * ii->ii_num_succ);
      ii->ii_succ[0] = bb_find(f, s->defblock);

      for(int i = 0; i < s->num_paths; i++)
        ii->ii_succ[i + 1] = bb_find(f, s->paths[i].block);
    }
    break;

  case IR_IC_BR:
    {
      ir_instr_br_t *b = (ir_instr_br_t *)ii;

      ii->ii_num_succ = 1;
      if(b->condition.value != -1)
        ii->ii_num_succ = 2;

      ii->ii_succ = malloc(sizeof(ir_bb_t *) * ii->ii_num_succ);
      ii->ii_succ[0] = bb_find(f, b->true_branch);
      if(b->condition.value != -1)
        ii->ii_succ[1] = bb_find(f, b->false_branch);
    }
    break;

  case IR_IC_CMP_BRANCH:
    {
      ir_instr_cmp_branch_t *icb = (ir_instr_cmp_branch_t *)ii;

      ii->ii_num_succ = 2;
      ii->ii_succ = malloc(sizeof(ir_bb_t *) * ii->ii_num_succ);
      ii->ii_succ[0] = bb_find(f, icb->true_branch);
      ii->ii_succ[1] = bb_find(f, icb->false_branch);
    }
    break;

  case IR_IC_INVOKE:
    {
      ir_instr_invoke_t *icb = (ir_instr_invoke_t *)ii;

      ii->ii_num_succ = 2;
      ii->ii_succ = malloc(sizeof(ir_bb_t *) * ii->ii_num_succ);
      ii->ii_succ[0] = bb_find(f, icb->normal_dest);
      ii->ii_succ[1] = bb_find(f, icb->unwind_dest);
    }
    break;

  default:
    printf("Cant set successor for op %d\n", ii->ii_class);
    abort();
  }
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movq %rsi, %r14
movl 0x28(%rsi), %esi
cmpq $0x1b, %rsi
ja 0x14542
movq %rdi, %rbx
leaq 0xb220(%rip), %rax      # 0x1f638
movslq (%rax,%rsi,4), %rcx
addq %rax, %rcx
jmpq *%rcx
orw $-0x1, 0x50(%r14)
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
andw $0x0, 0x50(%r14)
jmp 0x14427
movl 0x58(%r14), %ebp
xorl %eax, %eax
cmpl $-0x1, %ebp
setne %al
leal 0x1(%rax), %ecx
movw %cx, 0x50(%r14)
leal 0x8(,%rax,8), %edi
callq 0x3380
movq %rax, %r15
movq %rax, 0x40(%r14)
movl 0x60(%r14), %esi
movq %rbx, %rdi
callq 0x142d5
movq %rax, (%r15)
cmpl $-0x1, %ebp
je 0x14427
movl 0x64(%r14), %esi
jmp 0x144cd
movw $0x2, 0x50(%r14)
pushq $0x10
popq %rdi
callq 0x3380
movq %rax, %r15
movq %rax, 0x40(%r14)
movl 0x6c(%r14), %esi
movq %rbx, %rdi
callq 0x142d5
movq %rax, (%r15)
movl 0x70(%r14), %esi
jmp 0x144cd
movw $0x2, 0x50(%r14)
pushq $0x10
popq %rdi
callq 0x3380
movq %rax, %r15
movq %rax, 0x40(%r14)
movl 0x64(%r14), %esi
movq %rbx, %rdi
callq 0x142d5
movq %rax, (%r15)
movl 0x68(%r14), %esi
movq %rbx, %rdi
callq 0x142d5
movq %rax, 0x8(%r15)
jmp 0x14427
movl 0x64(%r14), %r12d
leal 0x1(%r12), %eax
movw %ax, 0x50(%r14)
movswq %ax, %rdi
shlq $0x3, %rdi
callq 0x3380
movq %rax, %r15
movq %rax, 0x40(%r14)
movl 0x60(%r14), %esi
movq %rbx, %rdi
callq 0x142d5
movq %rax, (%r15)
xorl %r15d, %r15d
testl %r12d, %r12d
cmovlel %r15d, %r12d
shlq $0x3, %r12
cmpq %r15, %r12
je 0x14427
movl 0x70(%r14,%r15,2), %esi
movq %rbx, %rdi
callq 0x142d5
movq 0x40(%r14), %rcx
movq %rax, 0x8(%rcx,%r15)
addq $0x8, %r15
jmp 0x1451d
leaq 0xd035(%rip), %rdi      # 0x2157e
xorl %eax, %eax
callq 0x3190
callq 0x3060