// File: /workspace/github_cpp_makefile_star2_O3/CMU-SAFARI[P]MQSim/src/ssd/Address_Mapping_Unit_Page_Level.cpp
// Function: SSD_Components::Address_Mapping_Unit_Page_Level::allocate_plane_for_user_write(SSD_Components::NVM_Transaction_Flash_WR*)
void Address_Mapping_Unit_Page_Level::allocate_plane_for_user_write(NVM_Transaction_Flash_WR* transaction)
	{
		LPA_type lpn = transaction->LPA;
		NVM::FlashMemory::Physical_Page_Address& targetAddress = transaction->Address;
		AddressMappingDomain* domain = domains[transaction->Stream_id];

		switch (domain->PlaneAllocationScheme) {
			case Flash_Plane_Allocation_Scheme_Type::CWDP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CWPD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Channel_no * domain->Chip_no * domain->Plane_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Channel_no * domain->Chip_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CDWP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CDPW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CPWD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CPDW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Plane_no)];
				break;
				//Static: Way first
			case Flash_Plane_Allocation_Scheme_Type::WCDP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no * domain->Die_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WCPD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no * domain->Plane_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WDCP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Die_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Die_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WDPC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Die_no * domain->Plane_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Die_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WPCD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Plane_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Plane_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WPDC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Plane_no * domain->Die_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Plane_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Plane_no)];
				break;
				//Static: Die first
			case Flash_Plane_Allocation_Scheme_Type::DCWP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Die_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no * domain->Chip_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DCPW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Die_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no * domain->Plane_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DWCP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Die_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DWPC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no * domain->Plane_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Die_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DPCW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Die_no * domain->Plane_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Plane_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Die_no) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DPWC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Die_no * domain->Plane_no * domain->Chip_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Plane_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Die_no) % domain->Plane_no)];
				break;
				//Static: Plane first
			case Flash_Plane_Allocation_Scheme_Type::PCWD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no * domain->Chip_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PCDW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no * domain->Die_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PWCD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PWDC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no * domain->Die_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PDCW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PDWC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no * domain->Chip_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			default:
				PRINT_ERROR("Unknown plane allocation scheme type!")
		}
	}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq 0xa8(%rdi), %rax
movzwl (%rsi), %ecx
movq (%rax,%rcx,8), %r8
movl 0x208(%r8), %eax
cmpq $0x17, %rax
ja 0x2bec4
movq 0x58(%rsi), %rcx
leaq 0x2cfa4(%rip), %rdx     # 0x58398
movslq (%rdx,%rax,4), %rax
addq %rdx, %rax
jmpq *%rax
movq 0x210(%r8), %rdi
movl 0x218(%r8), %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r9
movl (%rdi,%rdx,4), %edx
movl %edx, 0x38(%rsi)
movq 0x220(%r8), %r10
movl 0x228(%r8), %edi
xorl %edx, %edx
divq %rdi
movl (%r10,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %r10
imull %r9d, %edi
movq %rcx, %rax
xorl %edx, %edx
divq %rdi
movl 0x238(%r8), %r9d
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, 0x40(%rsi)
imull %edi, %r9d
jmp 0x2bbd6
movq 0x210(%r8), %r10
movl 0x238(%r8), %r9d
movl 0x248(%r8), %edi
movl %edi, %r11d
imull %r9d, %r11d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movl 0x218(%r8), %ebx
xorl %edx, %edx
divq %rbx
movl (%r10,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %r10
imull %ebx, %r11d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movl 0x228(%r8), %r11d
xorl %edx, %edx
divq %r11
movl (%r10,%rdx,4), %eax
jmp 0x2b97b
movq 0x210(%r8), %rdi
movl 0x238(%r8), %r11d
movl 0x228(%r8), %r10d
movl %r10d, %r9d
imull %r11d, %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r9
movl 0x218(%r8), %ebx
xorl %edx, %edx
divq %rbx
movl (%rdi,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %r14
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rdi
xorl %edx, %edx
divq %r10
movl (%r14,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %rax
movl (%rax,%rdi,4), %eax
movl %eax, 0x40(%rsi)
imull %ebx, %r9d
jmp 0x2bbd6
movq 0x210(%r8), %rbx
movl 0x228(%r8), %edi
movl 0x248(%r8), %r9d
movl %r9d, %r11d
imull %edi, %r11d
movl 0x238(%r8), %r10d
movl %r10d, %r14d
imull %r11d, %r14d
movq %rcx, %rax
xorl %edx, %edx
divq %r14
movl 0x218(%r8), %r14d
xorl %edx, %edx
divq %r14
movl (%rbx,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %rbx
movq %rcx, %rax
xorl %edx, %edx
divq %rdi
movq %rax, %rdi
movl (%rbx,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %rbx
movq %rcx, %rax
xorl %edx, %edx
divq %r11
xorl %edx, %edx
divq %r10
movl (%rbx,%rdx,4), %eax
jmp 0x2bcd7
movq 0x210(%r8), %r9
movl 0x218(%r8), %r10d
movq %rcx, %rax
xorl %edx, %edx
divq %r10
movq %rax, %rdi
movl (%r9,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %r11
movl 0x248(%r8), %r9d
movl %r9d, %ebx
imull %r10d, %ebx
movq %rcx, %rax
xorl %edx, %edx
divq %rbx
movl 0x228(%r8), %r10d
xorl %edx, %edx
divq %r10
movl (%r11,%rdx,4), %eax
jmp 0x2bcb1
movq 0x210(%r8), %r10
movl 0x238(%r8), %r11d
movl 0x218(%r8), %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rdi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %r10
imull %r11d, %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r9
movl 0x228(%r8), %r11d
xorl %edx, %edx
divq %r11
movl (%r10,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %rax
movl (%rax,%rdi,4), %eax
movl %eax, 0x40(%rsi)
imull %r11d, %r9d
jmp 0x2bbd6
movq 0x210(%r8), %rbx
movl 0x228(%r8), %r11d
movl 0x238(%r8), %r10d
movl %r10d, %r9d
imull %r11d, %r9d
movl 0x248(%r8), %edi
movl %edi, %r14d
imull %r9d, %r14d
movq %rcx, %rax
xorl %edx, %edx
divq %r14
movl 0x218(%r8), %r14d
xorl %edx, %edx
divq %r14
movl (%rbx,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %rbx
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movl (%rbx,%rdx,4), %edx
movl %edx, 0x3c(%rsi)
movq 0x230(%r8), %r11
xorl %edx, %edx
divq %r10
movl (%r11,%rdx,4), %eax
movl %eax, 0x40(%rsi)
movq %rcx, %rax
xorl %edx, %edx
divq %r9
jmp 0x2b994
movq 0x210(%r8), %r9
movl 0x218(%r8), %r10d
movq %rcx, %rax
xorl %edx, %edx
divq %r10
movq %rax, %rdi
movl (%r9,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %r9
movl 0x238(%r8), %r11d
movl %r11d, %ebx
imull %r10d, %ebx
movq %rcx, %rax
xorl %edx, %edx
divq %rbx
movl 0x228(%r8), %r10d
xorl %edx, %edx
divq %r10
movl (%r9,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %r9
movq %rdi, %rax
xorl %edx, %edx
divq %r11
movl (%r9,%rdx,4), %eax
movl %eax, 0x40(%rsi)
imull %ebx, %r10d
movq %rcx, %rax
xorl %edx, %edx
divq %r10
jmp 0x2bbde
movq 0x210(%r8), %rbx
movl 0x238(%r8), %edi
movl 0x228(%r8), %r11d
movl %r11d, %r10d
imull %edi, %r10d
movl 0x248(%r8), %r9d
movl %r9d, %r14d
imull %r10d, %r14d
movq %rcx, %rax
xorl %edx, %edx
divq %r14
movl 0x218(%r8), %r14d
xorl %edx, %edx
divq %r14
movl (%rbx,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %rbx
movq %rcx, %rax
xorl %edx, %edx
divq %rdi
movq %rdx, %rdi
xorl %edx, %edx
divq %r11
movl (%rbx,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %rax
movl (%rax,%rdi,4), %eax
jmp 0x2b82a
movq 0x210(%r8), %r9
movl 0x218(%r8), %r11d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movq %rax, %rdi
movl (%r9,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %rbx
movl 0x248(%r8), %r9d
movl 0x238(%r8), %r14d
movl %r14d, %r10d
imull %r11d, %r10d
movl %r10d, %r11d
imull %r9d, %r11d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movl 0x228(%r8), %r11d
xorl %edx, %edx
divq %r11
movl (%rbx,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %r11
movq %rdi, %rax
xorl %edx, %edx
divq %r14
movl (%r11,%rdx,4), %eax
movl %eax, 0x40(%rsi)
movq %rcx, %rax
xorl %edx, %edx
divq %r10
jmp 0x2bcdd
movq 0x210(%r8), %r10
movl 0x228(%r8), %r11d
movl 0x218(%r8), %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rdi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %rax
movl (%rax,%rdi,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %rdi
imull %r11d, %r9d
movl 0x248(%r8), %r10d
movl %r10d, %r11d
imull %r9d, %r11d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movl 0x238(%r8), %r11d
xorl %edx, %edx
divq %r11
movl (%rdi,%rdx,4), %eax
jmp 0x2bb5f
movq 0x210(%r8), %rdi
movl 0x218(%r8), %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r9
movl (%rdi,%rdx,4), %edx
movl %edx, 0x38(%rsi)
movq 0x220(%r8), %r10
movl 0x228(%r8), %edi
xorl %edx, %edx
divq %rdi
movl (%r10,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %r10
imull %r9d, %edi
movl 0x248(%r8), %r9d
movl %r9d, %r11d
imull %edi, %r11d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movl 0x238(%r8), %r11d
xorl %edx, %edx
divq %r11
movl (%r10,%rdx,4), %eax
movl %eax, 0x40(%rsi)
movq %rcx, %rax
xorl %edx, %edx
divq %rdi
jmp 0x2bcdd
movq 0x210(%r8), %r11
movl 0x238(%r8), %r9d
movl 0x248(%r8), %edi
movl %edi, %ebx
imull %r9d, %ebx
movl 0x228(%r8), %r10d
movl %r10d, %r14d
imull %ebx, %r14d
movq %rcx, %rax
xorl %edx, %edx
divq %r14
movl 0x218(%r8), %r14d
xorl %edx, %edx
divq %r14
movl (%r11,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %r11
movq %rcx, %rax
xorl %edx, %edx
divq %rbx
xorl %edx, %edx
divq %r10
movl (%r11,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %r10
movq %rcx, %rax
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %ecx
movl %ecx, 0x40(%rsi)
xorl %edx, %edx
divq %rdi
jmp 0x2bce2
movq 0x210(%r8), %rdi
movl 0x248(%r8), %r11d
movl 0x228(%r8), %r10d
movl %r10d, %r9d
imull %r11d, %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r9
movl 0x218(%r8), %ebx
xorl %edx, %edx
divq %rbx
movl (%rdi,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %r14
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rdi
xorl %edx, %edx
divq %r10
movl (%r14,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %r10
imull %ebx, %r9d
jmp 0x2bc4c
movq 0x210(%r8), %r9
movl 0x218(%r8), %r11d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movq %rax, %rdi
movl (%r9,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %rbx
movl 0x248(%r8), %r9d
movl 0x238(%r8), %r10d
movl %r9d, %r14d
imull %r11d, %r14d
movl %r14d, %r11d
imull %r10d, %r11d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movl 0x228(%r8), %r11d
xorl %edx, %edx
divq %r11
movl (%rbx,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %r11
movq %rcx, %rax
xorl %edx, %edx
divq %r14
xorl %edx, %edx
divq %r10
jmp 0x2bcd3
movq 0x210(%r8), %rbx
movl 0x248(%r8), %edi
movl 0x228(%r8), %r11d
movl %r11d, %r10d
imull %edi, %r10d
movl 0x238(%r8), %r9d
movl %r9d, %r14d
imull %r10d, %r14d
movq %rcx, %rax
xorl %edx, %edx
divq %r14
movl 0x218(%r8), %r14d
xorl %edx, %edx
divq %r14
movl (%rbx,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %rbx
movq %rcx, %rax
xorl %edx, %edx
divq %rdi
movq %rdx, %rdi
xorl %edx, %edx
divq %r11
movl (%rbx,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %r11
movq %rcx, %rax
xorl %edx, %edx
divq %r10
xorl %edx, %edx
divq %r9
movl (%r11,%rdx,4), %eax
jmp 0x2bea9
movq 0x210(%r8), %r10
movl 0x238(%r8), %r11d
movl 0x218(%r8), %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rdi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %rbx
imull %r11d, %r9d
movl 0x248(%r8), %r10d
movl %r10d, %r11d
imull %r9d, %r11d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movl 0x228(%r8), %r11d
xorl %edx, %edx
divq %r11
movl (%rbx,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %rax
movl (%rax,%rdi,4), %eax
movl %eax, 0x40(%rsi)
movq %rcx, %rax
xorl %edx, %edx
divq %r9
xorl %edx, %edx
divq %r10
jmp 0x2bce2
movq 0x210(%r8), %r10
movl 0x228(%r8), %r11d
movl 0x218(%r8), %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rdi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %rax
movl (%rax,%rdi,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %rdi
imull %r11d, %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r9
movl 0x238(%r8), %r10d
xorl %edx, %edx
divq %r10
movl (%rdi,%rdx,4), %eax
movl %eax, 0x40(%rsi)
imull %r10d, %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r9
movl 0x248(%r8), %ecx
xorl %edx, %edx
divq %rcx
jmp 0x2bce2
movq 0x210(%r8), %r10
movl 0x248(%r8), %r11d
movl 0x218(%r8), %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rdi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %r10
imull %r11d, %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r9
movl 0x228(%r8), %r11d
xorl %edx, %edx
divq %r11
movl (%r10,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %r10
imull %r11d, %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r9
movl 0x238(%r8), %ecx
xorl %edx, %edx
divq %rcx
jmp 0x2bea5
movq 0x210(%r8), %rdi
movl 0x228(%r8), %r11d
movl 0x248(%r8), %r9d
movl %r9d, %r10d
imull %r11d, %r10d
movq %rcx, %rax
xorl %edx, %edx
divq %r10
movl 0x218(%r8), %ebx
xorl %edx, %edx
divq %rbx
movl (%rdi,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %r14
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movq %rax, %rdi
movl (%r14,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %r11
imull %ebx, %r10d
movq %rcx, %rax
xorl %edx, %edx
divq %r10
movl 0x238(%r8), %ecx
xorl %edx, %edx
divq %rcx
movl (%r11,%rdx,4), %eax
movl %eax, 0x40(%rsi)
movq %rdi, %rax
xorl %edx, %edx
divq %r9
movq %rdx, %rdi
jmp 0x2beac
movq 0x210(%r8), %r11
movl 0x228(%r8), %ebx
movl 0x238(%r8), %r9d
movl %r9d, %edi
imull %ebx, %edi
movq %rcx, %rax
xorl %edx, %edx
divq %rdi
movl 0x218(%r8), %r10d
xorl %edx, %edx
divq %r10
movl (%r11,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %r11
movq %rcx, %rax
xorl %edx, %edx
divq %rbx
movl (%r11,%rdx,4), %edx
movl %edx, 0x3c(%rsi)
movq 0x230(%r8), %r11
xorl %edx, %edx
divq %r9
movl (%r11,%rdx,4), %eax
movl %eax, 0x40(%rsi)
imull %r10d, %edi
movq %rcx, %rax
xorl %edx, %edx
divq %rdi
jmp 0x2bbde
movq 0x210(%r8), %r10
movl 0x248(%r8), %edi
movl 0x238(%r8), %r9d
movl %r9d, %r11d
imull %edi, %r11d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movl 0x218(%r8), %ebx
xorl %edx, %edx
divq %rbx
movl (%r10,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %r10
imull %ebx, %r11d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movl 0x228(%r8), %r11d
xorl %edx, %edx
divq %r11
movl (%r10,%rdx,4), %eax
jmp 0x2be8b
movq 0x210(%r8), %r10
movl 0x248(%r8), %r11d
movl 0x218(%r8), %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rdi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %r10
imull %r11d, %r9d
movl 0x238(%r8), %r11d
movl %r11d, %ebx
imull %r9d, %ebx
movq %rcx, %rax
xorl %edx, %edx
divq %rbx
movl 0x228(%r8), %ebx
xorl %edx, %edx
divq %rbx
movl (%r10,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %r10
movq %rcx, %rax
xorl %edx, %edx
divq %r9
xorl %edx, %edx
divq %r11
jmp 0x2bea5
movq 0x210(%r8), %r11
movl 0x248(%r8), %edi
movl 0x238(%r8), %r9d
movl %r9d, %ebx
imull %edi, %ebx
movl 0x228(%r8), %r10d
movl %r10d, %r14d
imull %ebx, %r14d
movq %rcx, %rax
xorl %edx, %edx
divq %r14
movl 0x218(%r8), %r14d
xorl %edx, %edx
divq %r14
movl (%r11,%rdx,4), %eax
movl %eax, 0x38(%rsi)
movq 0x220(%r8), %r11
movq %rcx, %rax
xorl %edx, %edx
divq %rbx
xorl %edx, %edx
divq %r10
movl (%r11,%rdx,4), %eax
movl %eax, 0x3c(%rsi)
movq 0x230(%r8), %r10
movq %rcx, %rax
xorl %edx, %edx
divq %rdi
movq %rdx, %rdi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, 0x40(%rsi)
shlq $0x2, %rdi
addq 0x240(%r8), %rdi
movl (%rdi), %eax
movl %eax, 0x44(%rsi)
addq $0x8, %rsp
popq %rbx
popq %r14
retq
movq 0x43125(%rip), %rbx     # 0x6eff0
leaq 0x2a6d6(%rip), %rsi     # 0x565a8
movq %rbx, %rdi
callq 0x7390
leaq 0x2cb93(%rip), %rsi     # 0x58a74
movq %rbx, %rdi
callq 0x7390
movq %rax, %rdi
callq 0x71c0
movq 0x430d8(%rip), %rdi     # 0x6efd0
callq 0x7430
movl $0x1, %edi
callq 0x7440
nop