// File: /workspace/github_c_makefile_star2_O0/intel[P]pf-bb-config/fpga_lte/fpga_lte_cfg_parser.c
// Function: fpga_handler
static int
fpga_handler(void *user, const char *section,
	     const char *name, const char *value)
{
	struct fpga_lte_fec_conf *fpga_conf = (struct fpga_lte_fec_conf *) user;
	int ret = 1;

	if (!strcmp(section, MODE) && !strcmp(name, PFMODE)) {
		if (!strcmp(value, ZERO))
			fpga_conf->pf_mode_en = false;
		else if (!strcmp(value, ONE))
			fpga_conf->pf_mode_en = true;
		else
			ret = 0;
	} else if (!strcmp(section, UL) && !strcmp(name, BANDWIDTH)) {
		ret = parse_number8(value, &fpga_conf->ul_bandwidth);
	} else if (!strcmp(section, DL) && !strcmp(name, BANDWIDTH)) {
		ret = parse_number8(value, &fpga_conf->dl_bandwidth);
	} else if (!strcmp(section, UL) && !strcmp(name, LOAD_BALANCE)) {
		ret = parse_number8(value, &fpga_conf->ul_load_balance);
	} else if (!strcmp(section, DL) && !strcmp(name, LOAD_BALANCE)) {
		ret = parse_number8(value, &fpga_conf->dl_load_balance);
	} else if (!strcmp(section, UL) && !strcmp(name, QUEUE_MAP)) {
		ret = parse_array8(value, fpga_conf->vf_ul_queues_number);
	} else if (!strcmp(section, DL) && !strcmp(name, QUEUE_MAP)) {
		ret = parse_array8(value, fpga_conf->vf_dl_queues_number);
	} else if (!strcmp(section, FLR) && !strcmp(name, FLR_TIME_OUT)) {
		ret = parse_number16(value, &fpga_conf->flr_time_out);
	} else {
		printf("ERROR: Section (%s) or name (%s) is not valid.\n",
		       section, name);
		return 0;
	}
	if (ret != 1)
		printf("Error: Conversion of value (%s) failed.\n", value);

	return ret;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x40, %rsp
movq %rdi, -0x10(%rbp)
movq %rsi, -0x18(%rbp)
movq %rdx, -0x20(%rbp)
movq %rcx, -0x28(%rbp)
movq -0x10(%rbp), %rax
movq %rax, -0x30(%rbp)
movl $0x1, -0x34(%rbp)
movq -0x18(%rbp), %rdi
leaq 0x11901(%rip), %rsi     # 0x23c73
callq 0xd1e0
cmpl $0x0, %eax
jne 0x123db
movq -0x20(%rbp), %rdi
leaq 0x118f1(%rip), %rsi     # 0x23c78
callq 0xd1e0
cmpl $0x0, %eax
jne 0x123db
movq -0x28(%rbp), %rdi
leaq 0x10cbd(%rip), %rsi     # 0x23059
callq 0xd1e0
cmpl $0x0, %eax
jne 0x123af
movq -0x30(%rbp), %rax
movb $0x0, (%rax)
jmp 0x123d6
movq -0x28(%rbp), %rdi
leaq 0x10ccd(%rip), %rsi     # 0x23087
callq 0xd1e0
cmpl $0x0, %eax
jne 0x123cd
movq -0x30(%rbp), %rax
movb $0x1, (%rax)
jmp 0x123d4
movl $0x0, -0x34(%rbp)
jmp 0x123d6
jmp 0x125d7
movq -0x18(%rbp), %rdi
leaq 0x11c38(%rip), %rsi     # 0x2401e
callq 0xd1e0
cmpl $0x0, %eax
jne 0x1241e
movq -0x20(%rbp), %rdi
leaq 0x11cc5(%rip), %rsi     # 0x240c0
callq 0xd1e0
cmpl $0x0, %eax
jne 0x1241e
movq -0x28(%rbp), %rdi
movq -0x30(%rbp), %rsi
addq $0x11, %rsi
callq 0x12600
movl %eax, -0x34(%rbp)
jmp 0x125d5
movq -0x18(%rbp), %rdi
leaq 0x11bf8(%rip), %rsi     # 0x24021
callq 0xd1e0
cmpl $0x0, %eax
jne 0x12461
movq -0x20(%rbp), %rdi
leaq 0x11c82(%rip), %rsi     # 0x240c0
callq 0xd1e0
cmpl $0x0, %eax
jne 0x12461
movq -0x28(%rbp), %rdi
movq -0x30(%rbp), %rsi
addq $0x12, %rsi
callq 0x12600
movl %eax, -0x34(%rbp)
jmp 0x125d3
movq -0x18(%rbp), %rdi
leaq 0x11bb2(%rip), %rsi     # 0x2401e
callq 0xd1e0
cmpl $0x0, %eax
jne 0x124a4
movq -0x20(%rbp), %rdi
leaq 0x11c49(%rip), %rsi     # 0x240ca
callq 0xd1e0
cmpl $0x0, %eax
jne 0x124a4
movq -0x28(%rbp), %rdi
movq -0x30(%rbp), %rsi
addq $0x13, %rsi
callq 0x12600
movl %eax, -0x34(%rbp)
jmp 0x125d1
movq -0x18(%rbp), %rdi
leaq 0x11b72(%rip), %rsi     # 0x24021
callq 0xd1e0
cmpl $0x0, %eax
jne 0x124e7
movq -0x20(%rbp), %rdi
leaq 0x11c06(%rip), %rsi     # 0x240ca
callq 0xd1e0
cmpl $0x0, %eax
jne 0x124e7
movq -0x28(%rbp), %rdi
movq -0x30(%rbp), %rsi
addq $0x14, %rsi
callq 0x12600
movl %eax, -0x34(%rbp)
jmp 0x125cf
movq -0x18(%rbp), %rdi
leaq 0x11b2c(%rip), %rsi     # 0x2401e
callq 0xd1e0
cmpl $0x0, %eax
jne 0x1252a
movq -0x20(%rbp), %rdi
leaq 0x11bd0(%rip), %rsi     # 0x240d7
callq 0xd1e0
cmpl $0x0, %eax
jne 0x1252a
movq -0x28(%rbp), %rdi
movq -0x30(%rbp), %rsi
addq $0x1, %rsi
callq 0x12690
movl %eax, -0x34(%rbp)
jmp 0x125cd
movq -0x18(%rbp), %rdi
leaq 0x11aec(%rip), %rsi     # 0x24021
callq 0xd1e0
cmpl $0x0, %eax
jne 0x1256a
movq -0x20(%rbp), %rdi
leaq 0x11b8d(%rip), %rsi     # 0x240d7
callq 0xd1e0
cmpl $0x0, %eax
jne 0x1256a
movq -0x28(%rbp), %rdi
movq -0x30(%rbp), %rsi
addq $0x9, %rsi
callq 0x12690
movl %eax, -0x34(%rbp)
jmp 0x125cb
movq -0x18(%rbp), %rdi
leaq 0x11b69(%rip), %rsi     # 0x240de
callq 0xd1e0
cmpl $0x0, %eax
jne 0x125aa
movq -0x20(%rbp), %rdi
leaq 0x11b58(%rip), %rsi     # 0x240e2
callq 0xd1e0
cmpl $0x0, %eax
jne 0x125aa
movq -0x28(%rbp), %rdi
movq -0x30(%rbp), %rsi
addq $0x16, %rsi
callq 0x12780
movl %eax, -0x34(%rbp)
jmp 0x125c9
movq -0x18(%rbp), %rsi
movq -0x20(%rbp), %rdx
leaq 0x11b36(%rip), %rdi     # 0x240ef
movb $0x0, %al
callq 0xd140
movl $0x0, -0x4(%rbp)
jmp 0x125f5
jmp 0x125cb
jmp 0x125cd
jmp 0x125cf
jmp 0x125d1
jmp 0x125d3
jmp 0x125d5
jmp 0x125d7
cmpl $0x1, -0x34(%rbp)
je 0x125ef
movq -0x28(%rbp), %rsi
leaq 0x11b37(%rip), %rdi     # 0x2411f
movb $0x0, %al
callq 0xd140
movl -0x34(%rbp), %eax
movl %eax, -0x4(%rbp)
movl -0x4(%rbp), %eax
addq $0x40, %rsp
popq %rbp
retq
nop