// File: /workspace/github_c_makefile_star2_O0/nh13[P]ksw/src/parasail/src/nw_diag_avx2_256_64.c
// Function: arr_store_si256
static inline void arr_store_si256(
        int *array,
        __m256i vWH,
        int32_t i,
        int32_t s1Len,
        int32_t j,
        int32_t s2Len)
{
    if (0 <= i+0 && i+0 < s1Len && 0 <= j-0 && j-0 < s2Len) {
        array[1LL*(i+0)*s2Len + (j-0)] = (int64_t)_mm256_extract_epi64_rpl(vWH, 3);
    }
    if (0 <= i+1 && i+1 < s1Len && 0 <= j-1 && j-1 < s2Len) {
        array[1LL*(i+1)*s2Len + (j-1)] = (int64_t)_mm256_extract_epi64_rpl(vWH, 2);
    }
    if (0 <= i+2 && i+2 < s1Len && 0 <= j-2 && j-2 < s2Len) {
        array[1LL*(i+2)*s2Len + (j-2)] = (int64_t)_mm256_extract_epi64_rpl(vWH, 1);
    }
    if (0 <= i+3 && i+3 < s1Len && 0 <= j-3 && j-3 < s2Len) {
        array[1LL*(i+3)*s2Len + (j-3)] = (int64_t)_mm256_extract_epi64_rpl(vWH, 0);
    }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x60, %rsp
movq %rdi, 0x48(%rsp)
vmovdqa %ymm0, 0x20(%rsp)
movl %esi, 0x1c(%rsp)
movl %edx, 0x18(%rsp)
movl %ecx, 0x14(%rsp)
movl %r8d, 0x10(%rsp)
movl 0x1c(%rsp), %ecx
addl $0x0, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9b83ff
movl 0x1c(%rsp), %eax
addl $0x0, %eax
cmpl 0x18(%rsp), %eax
jge 0x9b83ff
movl 0x14(%rsp), %ecx
subl $0x0, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9b83ff
movl 0x14(%rsp), %eax
subl $0x0, %eax
cmpl 0x10(%rsp), %eax
jge 0x9b83ff
movq 0x38(%rsp), %rax
movl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x0, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0x0, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0x1, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9b8466
movl 0x1c(%rsp), %eax
addl $0x1, %eax
cmpl 0x18(%rsp), %eax
jge 0x9b8466
movl 0x14(%rsp), %ecx
subl $0x1, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9b8466
movl 0x14(%rsp), %eax
subl $0x1, %eax
cmpl 0x10(%rsp), %eax
jge 0x9b8466
movq 0x30(%rsp), %rax
movl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x1, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0x1, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0x2, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9b84cd
movl 0x1c(%rsp), %eax
addl $0x2, %eax
cmpl 0x18(%rsp), %eax
jge 0x9b84cd
movl 0x14(%rsp), %ecx
subl $0x2, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9b84cd
movl 0x14(%rsp), %eax
subl $0x2, %eax
cmpl 0x10(%rsp), %eax
jge 0x9b84cd
movq 0x28(%rsp), %rax
movl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x2, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0x2, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0x3, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9b8534
movl 0x1c(%rsp), %eax
addl $0x3, %eax
cmpl 0x18(%rsp), %eax
jge 0x9b8534
movl 0x14(%rsp), %ecx
subl $0x3, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9b8534
movl 0x14(%rsp), %eax
subl $0x3, %eax
cmpl 0x10(%rsp), %eax
jge 0x9b8534
movq 0x20(%rsp), %rax
movl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x3, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0x3, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movq %rbp, %rsp
popq %rbp
vzeroupper
retq
nopl (%rax)