// File: /workspace/github_c_makefile_star2_O0/mjosaarinen[P]brutus/crypto_aead/minalpherv11/avx2/MinalpherCore.cpp
// Function: format_return_double_block(long long vector[4] const*, long long vector[4]&, long long vector[4]&)
void format_return_double_block(
  const __m256i             ymm[4],  /* I    ymm                     */
  __m256i                   &DATA1,  /* O    HI                      */
  __m256i                   &DATA2   /* O    LOW                     */
  )
{
  /*==== FORMAT CHANGE ====*/
  //Constant Load
  const __m256i ymmMaskFF = _mm256_set_epi16(0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF, 0x00FF);

  __m256i DATA_A, DATA_B;
  __m256i tmp0, tmp1, tmp2, tmp3;

  tmp0 = _mm256_srli_epi16(ymm[0], 4);
  tmp0 = _mm256_xor_si256(tmp0, ymm[0]);
  tmp0 = _mm256_and_si256(ymmMaskFF, tmp0);
  tmp1 = _mm256_srli_epi16(ymm[1], 4);
  tmp1 = _mm256_xor_si256(tmp1, ymm[1]);
  tmp1 = _mm256_and_si256(ymmMaskFF, tmp1);
  DATA_A = _mm256_packus_epi16(tmp0, tmp1);

  tmp2 = _mm256_srli_epi16(ymm[2], 4);
  tmp2 = _mm256_xor_si256(tmp2, ymm[2]);
  tmp2 = _mm256_and_si256(ymmMaskFF, tmp2);
  tmp3 = _mm256_srli_epi16(ymm[3], 4);
  tmp3 = _mm256_xor_si256(tmp3, ymm[3]);
  tmp3 = _mm256_and_si256(ymmMaskFF, tmp3);
  DATA_B = _mm256_packus_epi16(tmp2, tmp3);

  DATA1 = _mm256_permute2x128_si256(DATA_B, DATA_A, 0x02);
  DATA2 = _mm256_permute2x128_si256(DATA_B, DATA_A, 0x13);
  /*==== END FORMAT CHANGE ====*/
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x4e0, %rsp            # imm = 0x4E0
movq %rdi, 0xf8(%rsp)
movq %rsi, 0xf0(%rsp)
movq %rdx, 0xe8(%rsp)
movw $0xff, 0x43e(%rsp)
movw $0xff, 0x43c(%rsp)
movw $0xff, 0x43a(%rsp)
movw $0xff, 0x438(%rsp)
movw $0xff, 0x436(%rsp)
movw $0xff, 0x434(%rsp)
movw $0xff, 0x432(%rsp)
movw $0xff, 0x430(%rsp)
movw $0xff, 0x42e(%rsp)
movw $0xff, 0x42c(%rsp)
movw $0xff, 0x42a(%rsp)
movw $0xff, 0x428(%rsp)
movw $0xff, 0x426(%rsp)
movw $0xff, 0x424(%rsp)
movw $0xff, 0x422(%rsp)
movw $0xff, 0x420(%rsp)
movzwl 0x420(%rsp), %eax
vmovd %eax, %xmm0
movzwl 0x422(%rsp), %eax
vpinsrw $0x1, %eax, %xmm0, %xmm0
movzwl 0x424(%rsp), %eax
vpinsrw $0x2, %eax, %xmm0, %xmm0
movzwl 0x426(%rsp), %eax
vpinsrw $0x3, %eax, %xmm0, %xmm0
movzwl 0x428(%rsp), %eax
vpinsrw $0x4, %eax, %xmm0, %xmm0
movzwl 0x42a(%rsp), %eax
vpinsrw $0x5, %eax, %xmm0, %xmm0
movzwl 0x42c(%rsp), %eax
vpinsrw $0x6, %eax, %xmm0, %xmm0
movzwl 0x42e(%rsp), %eax
vpinsrw $0x7, %eax, %xmm0, %xmm0
movzwl 0x430(%rsp), %eax
vmovd %eax, %xmm1
movzwl 0x432(%rsp), %eax
vpinsrw $0x1, %eax, %xmm1, %xmm1
movzwl 0x434(%rsp), %eax
vpinsrw $0x2, %eax, %xmm1, %xmm1
movzwl 0x436(%rsp), %eax
vpinsrw $0x3, %eax, %xmm1, %xmm1
movzwl 0x438(%rsp), %eax
vpinsrw $0x4, %eax, %xmm1, %xmm1
movzwl 0x43a(%rsp), %eax
vpinsrw $0x5, %eax, %xmm1, %xmm1
movzwl 0x43c(%rsp), %eax
vpinsrw $0x6, %eax, %xmm1, %xmm1
movzwl 0x43e(%rsp), %eax
vpinsrw $0x7, %eax, %xmm1, %xmm1
vmovdqa %xmm1, 0x410(%rsp)
vmovdqa %xmm0, 0x400(%rsp)
vmovdqa 0x400(%rsp), %ymm0
vmovdqa %ymm0, 0xc0(%rsp)
movq 0xf8(%rsp), %rax
vmovdqa (%rax), %ymm0
vmovdqa %ymm0, 0x2e0(%rsp)
movl $0x4, 0x2dc(%rsp)
vmovdqa 0x2e0(%rsp), %ymm0
vmovd 0x2dc(%rsp), %xmm1
vpsrlw %xmm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x60(%rsp)
vmovdqa 0x60(%rsp), %ymm1
movq 0xf8(%rsp), %rax
vmovdqa (%rax), %ymm0
vmovdqa %ymm1, 0x3e0(%rsp)
vmovdqa %ymm0, 0x3c0(%rsp)
vmovdqa 0x3e0(%rsp), %ymm0
vmovdqa 0x3c0(%rsp), %ymm1
vpxor %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x60(%rsp)
vmovdqa 0xc0(%rsp), %ymm1
vmovdqa 0x60(%rsp), %ymm0
vmovdqa %ymm1, 0x1e0(%rsp)
vmovdqa %ymm0, 0x1c0(%rsp)
vmovdqa 0x1e0(%rsp), %ymm0
vmovdqa 0x1c0(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x60(%rsp)
movq 0xf8(%rsp), %rax
vmovdqa 0x20(%rax), %ymm0
vmovdqa %ymm0, 0x2a0(%rsp)
movl $0x4, 0x29c(%rsp)
vmovdqa 0x2a0(%rsp), %ymm0
vmovd 0x29c(%rsp), %xmm1
vpsrlw %xmm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x40(%rsp)
vmovdqa 0x40(%rsp), %ymm1
movq 0xf8(%rsp), %rax
vmovdqa 0x20(%rax), %ymm0
vmovdqa %ymm1, 0x3a0(%rsp)
vmovdqa %ymm0, 0x380(%rsp)
vmovdqa 0x3a0(%rsp), %ymm0
vmovdqa 0x380(%rsp), %ymm1
vpxor %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x40(%rsp)
vmovdqa 0xc0(%rsp), %ymm1
vmovdqa 0x40(%rsp), %ymm0
vmovdqa %ymm1, 0x1a0(%rsp)
vmovdqa %ymm0, 0x180(%rsp)
vmovdqa 0x1a0(%rsp), %ymm0
vmovdqa 0x180(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x40(%rsp)
vmovdqa 0x60(%rsp), %ymm1
vmovdqa 0x40(%rsp), %ymm0
vmovdqa %ymm1, 0x4a0(%rsp)
vmovdqa %ymm0, 0x480(%rsp)
vmovdqa 0x4a0(%rsp), %ymm0
vmovdqa 0x480(%rsp), %ymm1
vpackuswb %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0xa0(%rsp)
movq 0xf8(%rsp), %rax
vmovdqa 0x40(%rax), %ymm0
vmovdqa %ymm0, 0x260(%rsp)
movl $0x4, 0x25c(%rsp)
vmovdqa 0x260(%rsp), %ymm0
vmovd 0x25c(%rsp), %xmm1
vpsrlw %xmm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x20(%rsp)
vmovdqa 0x20(%rsp), %ymm1
movq 0xf8(%rsp), %rax
vmovdqa 0x40(%rax), %ymm0
vmovdqa %ymm1, 0x360(%rsp)
vmovdqa %ymm0, 0x340(%rsp)
vmovdqa 0x360(%rsp), %ymm0
vmovdqa 0x340(%rsp), %ymm1
vpxor %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x20(%rsp)
vmovdqa 0xc0(%rsp), %ymm1
vmovdqa 0x20(%rsp), %ymm0
vmovdqa %ymm1, 0x160(%rsp)
vmovdqa %ymm0, 0x140(%rsp)
vmovdqa 0x160(%rsp), %ymm0
vmovdqa 0x140(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x20(%rsp)
movq 0xf8(%rsp), %rax
vmovdqa 0x60(%rax), %ymm0
vmovdqa %ymm0, 0x220(%rsp)
movl $0x4, 0x21c(%rsp)
vmovdqa 0x220(%rsp), %ymm0
vmovd 0x21c(%rsp), %xmm1
vpsrlw %xmm1, %ymm0, %ymm0
vmovdqa %ymm0, (%rsp)
vmovdqa (%rsp), %ymm1
movq 0xf8(%rsp), %rax
vmovdqa 0x60(%rax), %ymm0
vmovdqa %ymm1, 0x320(%rsp)
vmovdqa %ymm0, 0x300(%rsp)
vmovdqa 0x320(%rsp), %ymm0
vmovdqa 0x300(%rsp), %ymm1
vpxor %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, (%rsp)
vmovdqa 0xc0(%rsp), %ymm1
vmovdqa (%rsp), %ymm0
vmovdqa %ymm1, 0x120(%rsp)
vmovdqa %ymm0, 0x100(%rsp)
vmovdqa 0x120(%rsp), %ymm0
vmovdqa 0x100(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, (%rsp)
vmovdqa 0x20(%rsp), %ymm1
vmovdqa (%rsp), %ymm0
vmovdqa %ymm1, 0x460(%rsp)
vmovdqa %ymm0, 0x440(%rsp)
vmovdqa 0x460(%rsp), %ymm0
vmovdqa 0x440(%rsp), %ymm1
vpackuswb %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x80(%rsp)
vmovdqa 0x80(%rsp), %ymm1
vmovdqa 0xa0(%rsp), %ymm0
vperm2i128 $0x20, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0,1],ymm1[0,1]
movq 0xf0(%rsp), %rax
vmovdqa %ymm0, (%rax)
vmovdqa 0x80(%rsp), %ymm1
vmovdqa 0xa0(%rsp), %ymm0
vperm2i128 $0x31, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[2,3],ymm1[2,3]
movq 0xe8(%rsp), %rax
vmovdqa %ymm0, (%rax)
movq %rbp, %rsp
popq %rbp
vzeroupper
retq
nopw (%rax,%rax)