// File: /workspace/github_c_makefile_star2_O3/hobo0xcc[P]rve/src/cpu.c
// Function: Translate
uint64_t Translate(State *state, uint64_t v_addr, uint8_t access_type) {
    uint8_t MODE = ReadCSR(state, SATP, 60, 63);

    if (MODE == Bare || state->mode == MACHINE) {
        return v_addr;
    }
    if (MODE != Sv39) {
        Error("Unimplemented Translation Mode: %d", MODE);
    }

    uint64_t a;
    int64_t i;
    bool access_fault;
    bool page_fault;
    uint64_t PPN;
    uint64_t va_vpn_i;
    uint64_t pte_addr;
    uint64_t pte;
    uint8_t pte_v;
    uint8_t pte_r;
    uint8_t pte_w;
    uint8_t pte_x;
    uint8_t pte_u;
    uint8_t pte_g;
    uint8_t pte_a;
    uint8_t pte_d;
    uint8_t pte_rsw;
    uint64_t pte_ppn;
    uint64_t pa;
step1:
    // printf("step1\n");
    page_fault = false;
    uint64_t va = GetRange(v_addr, VALEN, XLEN - 1);
    if (GetRange(v_addr, VALEN - 1, VALEN - 1) == 1 && va != SetNBits(XLEN - VALEN)) {
        page_fault = true;
    }
    if (GetRange(v_addr, VALEN - 1, VALEN - 1) == 0 && va != 0) {
        page_fault = true;
    }
    if (page_fault) {
        // printf("step1 page fault\n");
        PageFault(state, access_type);
        return v_addr;
    }

step2:
    // printf("step2\n");
    PPN = ReadCSR(state, SATP, 0, 43);
    a = PPN * PAGESIZE;
    i = LEVELS - 1;

step3:
    // printf("step3\n");
    va_vpn_i = ((v_addr >> 12) >> (i * 9)) & SetNBits(9);
    pte_addr = a + va_vpn_i * PTESIZE;
    pte = MemRead64(state, pte_addr);

step4:
    // printf("step4\n");
    pte_v = pte & SetNBits(1);
    pte_r = pte >> 1 & SetNBits(1);
    pte_w = pte >> 2 & SetNBits(1);
    pte_x = pte >> 3 & SetNBits(1);
    pte_u = pte >> 4 & SetNBits(1);
    pte_g = pte >> 5 & SetNBits(1);
    pte_a = pte >> 6 & SetNBits(1);
    pte_d = pte >> 7 & SetNBits(1);
    pte_ppn = pte >> 10;
    pte_rsw = pte >> 8 & SetNBits(2);
    if (pte_v == 0 || (pte_r == 0 && pte_w == 1)) {
        // printf("step4 page fault\n");
        PageFault(state, access_type);
        return v_addr;
    }

step5:
    // printf("step5\n");
    // If pte.r=1 or pte.x=1, go to step 6. 
    if (pte_r == 1 || pte_x == 1) {
        goto step6;
    } else {
        i--;
        if (i < 0) {
            // printf("step5 page fault\n");
            PageFault(state, access_type);
            return v_addr;
        } else {
            a =  pte_ppn * PAGESIZE;
            goto step3;
        }
    }

step6:
    // printf("step6\n");
    page_fault = false;
    // When SUM=0, S-mode memory accesses to pages that areaccessible by U-mode (U=1 in Figure 4.17) will fault. 
    // if (ReadCSR(state, MSTATUS, 18, 18) == 0 && pte_u == 1) {
    //     page_fault = true;
    // }
    if (access_type == AccessInstruction) {
        if (pte_x == 0) {
            printf("AccessInstruction Page Fault\n");
            page_fault = true;
        }
    }
    if (access_type == AccessLoad) {
        // if (ReadCSR(state, MSTATUS, 19, 19) == 0) {
        if (pte_r == 0) {
            printf("AccessLoad Page Fault\n");
            page_fault = true;
        }
        // } else if (ReadCSR(state, MSTATUS, 19, 19) == 1) {
        //     if (pte_r == 0 || pte_x == 0) {
        //         page_fault = true;
        //     }
        // }
    }
    if (access_type == AccessStore) {
        if (pte_w == 0) {
            printf("AccessStore Page Fault\n");
            page_fault = true;
        }
    }

    if (page_fault) {
        printf("step6 page fault\n");
        PageFault(state, access_type);
        return v_addr;
    }

step7:
    // printf("step7\n");
    if (i > 0) {
        if ((pte_ppn & SetNBits(9 * i)) != 0) {
            page_fault = true;
        }
    }
    if (page_fault) {
        printf("step7 page fault\n");
        PageFault(state, access_type);
        return v_addr;
    }

step8:
    // printf("step8\n");
    if (pte_a == 0 || (access_type == AccessStore && pte_d == 0)) {
        uint64_t new_pte = pte | SetOneBit(6) | (access_type == AccessStore ? SetOneBit(7) : 0);
        MemWrite64(state, pte_addr, new_pte);
    }

step9:
    // printf("step9\n");
    pa = 0;
    pa |= (v_addr & SetNBits(12));
    if (i > 0) {
        pa |= (v_addr >> 12 & SetNBits(9 * i)) << 12;
    }
    pa |= (pte_ppn & (SetNBits(44) ^ SetNBits(9 * i))) << 12;
    // printf("va: 0x%llx -> pa: 0x%llx\n", v_addr, pa);
    return pa;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x38, %rsp
movq %rsi, %rbx
movq 0xc08(%rdi), %rsi
shrq $0x3c, %rsi
je 0x2bce
movq %rdi, %r14
cmpb $0x3, 0x8148(%rdi)
je 0x2bce
movl %edx, %r15d
cmpl $0x8, %esi
je 0x2a6e
leaq 0x5840(%rip), %rdi      # 0x82a7
xorl %eax, %eax
callq 0x6c10
movq %rbx, %rcx
shrq $0x27, %rcx
cmpq $0x1ffffff, %rcx        # imm = 0x1FFFFFF
setb %al
btq $0x26, %rbx
setae %dl
testq %rcx, %rcx
setne %cl
testb %dl, %cl
jne 0x2b65
movq %rbx, %rcx
shrq $0x26, %rcx
andb %al, %cl
jne 0x2b65
movl %r15d, -0x30(%rbp)
movabsq $0xfffffffffff, %r15    # imm = 0xFFFFFFFFFFF
andq 0xc08(%r14), %r15
movq %rbx, -0x38(%rbp)
shrq $0xc, %rbx
movq %rbx, -0x48(%rbp)
movl $0x2, %ebx
shlq $0xc, %r15
leaq (%rbx,%rbx,8), %rcx
movq -0x48(%rbp), %rax
movq %rcx, -0x40(%rbp)
shrq %cl, %rax
movq %rax, -0x50(%rbp)
andl $0x1ff, %eax            # imm = 0x1FF
movq %r15, -0x58(%rbp)
leaq (%r15,%rax,8), %r13
xorl %r15d, %r15d
xorl %r12d, %r12d
movq %r14, %rdi
movq %r13, %rsi
callq 0x27e9
movzbl %al, %eax
movl %r15d, %ecx
shlq %cl, %rax
orq %rax, %r12
addq $0x8, %r15
incq %r13
cmpq $0x40, %r15
jne 0x2af4
testb $0x1, %r12b
je 0x2bbe
movl %r12d, %eax
shrl $0x2, %eax
btl $0x1, %r12d
setae %cl
movl %eax, %edx
andb %cl, %dl
cmpb $0x1, %dl
je 0x2bbe
movl %r12d, %edx
shrl $0x3, %edx
movq %r12, %r15
shrq $0xa, %r15
movl %r12d, %ecx
shrl %ecx
movl %ecx, %esi
orl %edx, %esi
testb $0x1, %sil
jne 0x2b73
subq $0x1, %rbx
jae 0x2aca
jmp 0x2bbe
movzbl %r15b, %esi
movq %r14, %rdi
callq 0x29d0
jmp 0x2bce
cmpb $0x0, -0x30(%rbp)
jne 0x2b87
andl $0x1, %edx
jne 0x2b87
leaq 0x5931(%rip), %rdi      # 0x84b6
jmp 0x2bad
cmpb $0x1, -0x30(%rbp)
jne 0x2b9b
andl $0x1, %ecx
jne 0x2b9b
leaq 0x593a(%rip), %rdi      # 0x84d3
jmp 0x2bad
cmpb $0x2, -0x30(%rbp)
jne 0x2be0
andl $0x1, %eax
jne 0x2be0
leaq 0x593c(%rip), %rdi      # 0x84e9
callq 0x1060
leaq 0x5958(%rip), %rdi      # 0x8511
callq 0x1060
movzbl -0x30(%rbp), %esi
movq %r14, %rdi
callq 0x29d0
movq -0x38(%rbp), %rbx
movq %rbx, %rax
addq $0x38, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
testq %rbx, %rbx
jle 0x2c04
movq $-0x1, %rax
movq -0x40(%rbp), %rcx
shlq %cl, %rax
notq %rax
testq %rax, %r15
je 0x2c04
leaq 0x58fe(%rip), %rdi      # 0x8500
jmp 0x2bb9
cmpb $0x2, -0x30(%rbp)
sete %al
testb %r12b, %r12b
setns %cl
testb $0x40, %r12b
je 0x2c1b
andb %cl, %al
je 0x2c6c
xorl %eax, %eax
cmpb $0x2, -0x30(%rbp)
sete %al
shll $0x7, %eax
orq %r12, %rax
orq $0x40, %rax
movq %rax, -0x30(%rbp)
movq -0x50(%rbp), %rcx
andl $0x1ff, %ecx            # imm = 0x1FF
movq -0x58(%rbp), %rax
leaq (%rax,%rcx,8), %r12
xorl %r13d, %r13d
movq -0x30(%rbp), %rax
movl %r13d, %ecx
shrq %cl, %rax
movzbl %al, %edx
movq %r14, %rdi
movq %r12, %rsi
callq 0x2678
addq $0x8, %r13
incq %r12
cmpq $0x40, %r13
jne 0x2c47
movq -0x38(%rbp), %rdx
andl $0xfff, %edx            # imm = 0xFFF
movq $-0x1, %rax
movq -0x40(%rbp), %rcx
shlq %cl, %rax
movq %rax, %rcx
notq %rcx
movq -0x48(%rbp), %rsi
andq %rcx, %rsi
shlq $0xc, %rsi
xorl %ecx, %ecx
testq %rbx, %rbx
cmovgq %rsi, %rcx
orq %rdx, %rcx
movabsq $0xff00000000000, %rdx  # imm = 0xFF00000000000
xorq %rax, %rdx
andq %rdx, %r15
shlq $0xc, %r15
orq %rcx, %r15
movq %r15, %rbx
jmp 0x2bce