// File: CMU-SAFARI[P]MQSim/src/ssd/Address_Mapping_Unit_Page_Level.cpp
// Function: SSD_Components::Address_Mapping_Unit_Page_Level::Allocate_address_for_preconditioning(unsigned short, std::map<unsigned long, unsigned long, std::less<unsigned long>, std::allocator<std::pair<unsigned long const, unsigned long>>>&, std::vector<double, std::allocator<double>>&)
void Address_Mapping_Unit_Page_Level::Allocate_address_for_preconditioning(const stream_id_type stream_id, std::map<LPA_type, page_status_type>& lpa_list, std::vector<double>& steady_state_distribution)
	{
		int idx = 0;
		std::vector<LPA_type>**** assigned_lpas = new std::vector<LPA_type>***[channel_count];
		for (unsigned int channel_cntr = 0; channel_cntr < channel_count; channel_cntr++) {
			assigned_lpas[channel_cntr] = new std::vector<LPA_type>**[chip_no_per_channel];
			for (unsigned int chip_cntr = 0; chip_cntr < chip_no_per_channel; chip_cntr++) {
				assigned_lpas[channel_cntr][chip_cntr] = new std::vector<LPA_type>*[die_no_per_chip];
				for (unsigned int die_cntr = 0; die_cntr < die_no_per_chip; die_cntr++) {
					assigned_lpas[channel_cntr][chip_cntr][die_cntr] = new std::vector<LPA_type>[plane_no_per_die];
				}
			}
		}

		//First: distribute LPAs to planes
		NVM::FlashMemory::Physical_Page_Address plane_address;
		for (auto lpa = lpa_list.begin(); lpa != lpa_list.end();) {
			if ((*lpa).first >= domains[stream_id]->Total_logical_pages_no) {
				PRINT_ERROR("Out of range LPA specified for preconditioning! LPA shoud be smaller than " << domains[stream_id]->Total_logical_pages_no << ", but it is " << (*lpa).first)
			}
			PPA_type ppa = domains[stream_id]->Get_ppa_for_preconditioning(stream_id, (*lpa).first);
			if (ppa != NO_LPA) {
				PRINT_ERROR("Calling address allocation for a previously allocated LPA during preconditioning!")
			}
			allocate_plane_for_preconditioning(stream_id, (*lpa).first, plane_address);
			if (LPA_type(Utils::Logical_Address_Partitioning_Unit::Get_share_of_physcial_pages_in_plane(plane_address.ChannelID, plane_address.ChipID, plane_address.DieID, plane_address.PlaneID) * page_no_per_plane)
				> assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size()) {
				assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].push_back((*lpa).first);
				lpa++;
			} else {
				lpa_list.erase(lpa++);
			}
		}

		//Second: distribute LPAs within planes based on the steady-state status of blocks
		//unsigned int safe_guard_band = ftl->GC_and_WL_Unit->Get_minimum_number_of_free_pages_before_GC();
		for (unsigned int channel_cntr = 0; channel_cntr < domains[stream_id]->Channel_no; channel_cntr++) {
			for (unsigned int chip_cntr = 0; chip_cntr < domains[stream_id]->Chip_no; chip_cntr++) {
				for (unsigned int die_cntr = 0; die_cntr < domains[stream_id]->Die_no; die_cntr++) {
					for (unsigned int plane_cntr = 0; plane_cntr < domains[stream_id]->Plane_no; plane_cntr++) {
						plane_address.ChannelID = domains[stream_id]->Channel_ids[channel_cntr];
						plane_address.ChipID = domains[stream_id]->Chip_ids[chip_cntr];
						plane_address.DieID = domains[stream_id]->Die_ids[die_cntr];
						plane_address.PlaneID = domains[stream_id]->Plane_ids[plane_cntr];

						unsigned int physical_block_consumption_goal = (unsigned int)(double(block_no_per_plane - ftl->GC_and_WL_Unit->Get_minimum_number_of_free_pages_before_GC() / 2)
							* Utils::Logical_Address_Partitioning_Unit::Get_share_of_physcial_pages_in_plane(plane_address.ChannelID, plane_address.ChipID, plane_address.DieID, plane_address.PlaneID));

						//Adjust the average
						double model_average = 0;
						std::vector<double> adjusted_steady_state_distribution;
						//Check if probability distribution is correct 
						for (unsigned int i = 0; i <= pages_no_per_block; i++) {
							model_average += steady_state_distribution[i] * double(i) / double(pages_no_per_block);
							adjusted_steady_state_distribution.push_back(steady_state_distribution[i]);
						}
						double real_average = double(assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size()) / (physical_block_consumption_goal * pages_no_per_block);
						if (std::abs(model_average - real_average) * pages_no_per_block > 0.9999) {
							int displacement_index = int((real_average - model_average) * pages_no_per_block);
							if (displacement_index > 0) {
								for (int i = 0; i < displacement_index; i++) {
									adjusted_steady_state_distribution[i] = 0;
								}
								for (int i = displacement_index; i < int(pages_no_per_block); i++) {
									adjusted_steady_state_distribution[i] = steady_state_distribution[i - displacement_index];
								}
							} else {
								displacement_index *= -1;
								for (int i = 0; i < int(pages_no_per_block) - displacement_index; i++) {
									adjusted_steady_state_distribution[i] = steady_state_distribution[i + displacement_index];
								}
								for (int i = int(pages_no_per_block) - displacement_index; i < int(pages_no_per_block); i++) {
									adjusted_steady_state_distribution[i] = 0;
								}
							}
						}

						//Check if it is possible to find a PPA for each LPA with current proability assignments 
						unsigned int total_valid_pages = 0;
						for (int valid_pages_in_block = pages_no_per_block; valid_pages_in_block >= 0; valid_pages_in_block--) {
							total_valid_pages += valid_pages_in_block * (unsigned int)(adjusted_steady_state_distribution[valid_pages_in_block] * physical_block_consumption_goal);
						}
						unsigned int pages_need_PPA = 0;//The number of LPAs that remain unassigned due to imperfect probability assignments
						if (total_valid_pages < assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size()) {
							pages_need_PPA = (unsigned int)(assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size()) - total_valid_pages;
						}
						
						unsigned int remaining_blocks_to_consume = physical_block_consumption_goal;
						for (int valid_pages_in_block = pages_no_per_block; valid_pages_in_block >= 0; valid_pages_in_block--) {
							unsigned int block_no_with_x_valid_page = (unsigned int)(adjusted_steady_state_distribution[valid_pages_in_block] * physical_block_consumption_goal);
							if (block_no_with_x_valid_page > 0 && pages_need_PPA > 0) {
								block_no_with_x_valid_page += (pages_need_PPA / valid_pages_in_block) + (pages_need_PPA % valid_pages_in_block == 0 ? 0 : 1);
								pages_need_PPA = 0;
							}

							if (block_no_with_x_valid_page <= remaining_blocks_to_consume) {
								remaining_blocks_to_consume -= block_no_with_x_valid_page;
							} else {
								block_no_with_x_valid_page = remaining_blocks_to_consume;
								remaining_blocks_to_consume = 0;
							}

							for (unsigned int block_cntr = 0; block_cntr < block_no_with_x_valid_page; block_cntr++) {
								//Assign physical addresses
								std::vector<NVM::FlashMemory::Physical_Page_Address> addresses;
								if (assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size() < valid_pages_in_block) {
									valid_pages_in_block = int(assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size());
								}
								for (int page_cntr = 0; page_cntr < valid_pages_in_block; page_cntr++) {
									NVM::FlashMemory::Physical_Page_Address addr(plane_address.ChannelID, plane_address.ChipID, plane_address.DieID, plane_address.PlaneID, 0, 0);
									addresses.push_back(addr);
								}
								block_manager->Allocate_Pages_in_block_and_invalidate_remaining_for_preconditioning(stream_id, plane_address, addresses);

								//Update mapping table
								for (auto const &address : addresses) {
									LPA_type lpa = assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].back();
									assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].pop_back();
									PPA_type ppa = Convert_address_to_ppa(address);
									flash_controller->Change_memory_status_preconditioning(&address, &lpa);
									domains[stream_id]->GlobalMappingTable[lpa].PPA = ppa;
									domains[stream_id]->GlobalMappingTable[lpa].WrittenStateBitmap = (*lpa_list.find(lpa)).second;
									domains[stream_id]->GlobalMappingTable[lpa].TimeStamp = 0;
								}
							}
						}
						if (assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size() > 0) {
							PRINT_ERROR("It is not possible to assign PPA to all LPAs in Allocate_address_for_preconditioning! It is not safe to continue preconditioning." << assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size())
						}
					}
				}
			}
		}

		for (unsigned int channel_cntr = 0; channel_cntr < channel_count; channel_cntr++) {
			for (unsigned int chip_cntr = 0; chip_cntr < chip_no_per_channel; chip_cntr++) {
				for (unsigned int die_cntr = 0; die_cntr < die_no_per_chip; die_cntr++) {
					delete[] assigned_lpas[channel_cntr][chip_cntr][die_cntr];
				}
				delete[] assigned_lpas[channel_cntr][chip_cntr];
			}
			delete[] assigned_lpas[channel_cntr];
		}
		delete[] assigned_lpas;
	}

// Assembly:
subq $0x298, %rsp            # imm = 0x298
movw %si, %ax
movq %rdi, 0x290(%rsp)
movw %ax, 0x28e(%rsp)
movq %rdx, 0x280(%rsp)
movq %rcx, 0x278(%rsp)
movq 0x290(%rsp), %rax
movq %rax, 0x100(%rsp)
movl $0x0, 0x274(%rsp)
movl 0x64(%rax), %eax
movl $0x8, %ecx
mulq %rcx
movq %rax, %rdi
seto %cl
movq $-0x1, %rax
testb $0x1, %cl
cmovneq %rax, %rdi
callq 0x8030
movq %rax, 0x268(%rsp)
movl $0x0, 0x264(%rsp)
movq 0x100(%rsp), %rcx
movl 0x264(%rsp), %eax
cmpl 0x64(%rcx), %eax
jae 0x5129d
movq 0x100(%rsp), %rax
movl 0x68(%rax), %eax
movl $0x8, %ecx
mulq %rcx
movq %rax, %rdi
seto %cl
movq $-0x1, %rax
testb $0x1, %cl
cmovneq %rax, %rdi
callq 0x8030
movq %rax, %rdx
movq 0x268(%rsp), %rax
movl 0x264(%rsp), %ecx
movq %rdx, (%rax,%rcx,8)
movl $0x0, 0x260(%rsp)
movq 0x100(%rsp), %rcx
movl 0x260(%rsp), %eax
cmpl 0x68(%rcx), %eax
jae 0x51285
movq 0x100(%rsp), %rax
movl 0x6c(%rax), %eax
movl $0x8, %ecx
mulq %rcx
movq %rax, %rdi
seto %cl
movq $-0x1, %rax
testb $0x1, %cl
cmovneq %rax, %rdi
callq 0x8030
movq %rax, %rdx
movq 0x268(%rsp), %rax
movl 0x264(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x260(%rsp), %ecx
movq %rdx, (%rax,%rcx,8)
movl $0x0, 0x25c(%rsp)
movq 0x100(%rsp), %rcx
movl 0x25c(%rsp), %eax
cmpl 0x6c(%rcx), %eax
jae 0x5126d
movq 0x100(%rsp), %rax
movl 0x70(%rax), %eax
movq %rax, 0xf0(%rsp)
movl $0x18, %ecx
mulq %rcx
movq %rax, %rdi
seto %cl
addq $0x8, %rdi
setb %al
orb %al, %cl
movq $-0x1, %rax
testb $0x1, %cl
cmovneq %rax, %rdi
callq 0x8030
movq %rax, %rcx
movq 0xf0(%rsp), %rax
movq %rax, (%rcx)
addq $0x8, %rcx
movq %rcx, 0xf8(%rsp)
cmpq $0x0, %rax
je 0x51226
movq 0xf8(%rsp), %rax
movq 0xf0(%rsp), %rcx
imulq $0x18, %rcx, %rdx
movq %rax, %rcx
addq %rdx, %rcx
movq %rcx, 0xe0(%rsp)
movq %rax, 0xe8(%rsp)
movq 0xe8(%rsp), %rdi
movq %rdi, 0xd8(%rsp)
callq 0x21550
movq 0xd8(%rsp), %rax
movq 0xe0(%rsp), %rcx
addq $0x18, %rax
cmpq %rcx, %rax
movq %rax, 0xe8(%rsp)
jne 0x511f0
movq 0xf8(%rsp), %rdx
movq 0x268(%rsp), %rax
movl 0x264(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x260(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x25c(%rsp), %ecx
movq %rdx, (%rax,%rcx,8)
movl 0x25c(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x25c(%rsp)
jmp 0x51151
jmp 0x5126f
movl 0x260(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x260(%rsp)
jmp 0x510e1
jmp 0x51287
movl 0x264(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x264(%rsp)
jmp 0x5107c
leaq 0x244(%rsp), %rdi
xorl %r9d, %r9d
movl %r9d, %esi
movl %r9d, %edx
movl %r9d, %ecx
movl %r9d, %r8d
movl $0x0, (%rsp)
callq 0x4a220
movq 0x280(%rsp), %rdi
callq 0x59b00
movq %rax, 0x238(%rsp)
movq 0x280(%rsp), %rdi
callq 0x59b50
movq %rax, 0x230(%rsp)
leaq 0x238(%rsp), %rdi
leaq 0x230(%rsp), %rsi
callq 0x59b30
testb $0x1, %al
jne 0x51308
jmp 0x51650
leaq 0x238(%rsp), %rdi
callq 0x59b80
movq 0x100(%rsp), %rcx
movq (%rax), %rax
movq 0xa8(%rcx), %rcx
movzwl 0x28e(%rsp), %edx
movq (%rcx,%rdx,8), %rcx
cmpq 0x258(%rcx), %rax
jb 0x513e9
movq 0x88ca9(%rip), %rdi     # 0xd9ff0
leaq 0x5959a(%rip), %rsi     # 0xaa8e8
callq 0x8440
movq 0x88c96(%rip), %rdi     # 0xd9ff0
leaq 0x5b5d9(%rip), %rsi     # 0xac93a
callq 0x8440
movq %rax, %rdi
movq 0x100(%rsp), %rax
movq 0xa8(%rax), %rax
movzwl 0x28e(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x258(%rax), %rsi
callq 0x8100
movq %rax, %rdi
leaq 0x5b5eb(%rip), %rsi     # 0xac985
callq 0x8440
movq %rax, 0xd0(%rsp)
leaq 0x238(%rsp), %rdi
callq 0x59b80
movq 0xd0(%rsp), %rdi
movq (%rax), %rsi
callq 0x8100
movq %rax, %rdi
movq 0x88b8a(%rip), %rsi     # 0xd9f58
callq 0x8480
movq 0x88bf6(%rip), %rdi     # 0xd9fd0
callq 0x84f0
movl $0x1, %edi
callq 0x8500
movq 0x100(%rsp), %rax
movq 0xa8(%rax), %rax
movzwl 0x28e(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq %rax, 0xc0(%rsp)
movw 0x28e(%rsp), %ax
movw %ax, 0xce(%rsp)
leaq 0x238(%rsp), %rdi
callq 0x59b80
movq 0xc0(%rsp), %rdi
movq %rax, %rcx
movw 0xce(%rsp), %ax
movq (%rcx), %rdx
movzwl %ax, %esi
callq 0x59bb0
movq %rax, 0x228(%rsp)
cmpq $-0x1, 0x228(%rsp)
je 0x514a5
movq 0x88b8f(%rip), %rdi     # 0xd9ff0
leaq 0x59480(%rip), %rsi     # 0xaa8e8
callq 0x8440
movq 0x88b7c(%rip), %rdi     # 0xd9ff0
leaq 0x5b517(%rip), %rsi     # 0xac992
callq 0x8440
movq %rax, %rdi
movq 0x88ace(%rip), %rsi     # 0xd9f58
callq 0x8480
movq 0x88b3a(%rip), %rdi     # 0xd9fd0
callq 0x84f0
movl $0x1, %edi
callq 0x8500
movzwl 0x28e(%rsp), %eax
movl %eax, 0xb4(%rsp)
leaq 0x238(%rsp), %rdi
callq 0x59b80
movl 0xb4(%rsp), %esi
movq 0x100(%rsp), %rdi
movq (%rax), %rdx
leaq 0x244(%rsp), %rcx
callq 0x52590
movl 0x244(%rsp), %edi
movl 0x248(%rsp), %esi
movl 0x24c(%rsp), %edx
movl 0x250(%rsp), %ecx
callq 0xa67f0
movq 0x100(%rsp), %rax
movl 0x94(%rax), %eax
cvtsi2sd %rax, %xmm1
mulsd %xmm1, %xmm0
movaps %xmm0, %xmm1
cvttsd2si %xmm1, %rax
movq %rax, %rdx
sarq $0x3f, %rdx
movsd 0x57ad9(%rip), %xmm1    # 0xa9008
subsd %xmm1, %xmm0
cvttsd2si %xmm0, %rcx
andq %rdx, %rcx
orq %rcx, %rax
movq %rax, 0xb8(%rsp)
movq 0x268(%rsp), %rax
movl 0x244(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x248(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x24c(%rsp), %ecx
movq (%rax,%rcx,8), %rdi
movl 0x250(%rsp), %eax
imulq $0x18, %rax, %rax
addq %rax, %rdi
callq 0x3c180
movq %rax, %rcx
movq 0xb8(%rsp), %rax
cmpq %rcx, %rax
jbe 0x51607
movq 0x268(%rsp), %rax
movl 0x244(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x248(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x24c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x250(%rsp), %ecx
imulq $0x18, %rcx, %rcx
addq %rcx, %rax
movq %rax, 0xa8(%rsp)
leaq 0x238(%rsp), %rdi
callq 0x59b80
movq 0xa8(%rsp), %rdi
movq %rax, %rsi
callq 0x59be0
leaq 0x238(%rsp), %rdi
xorl %esi, %esi
callq 0x59c50
movq %rax, 0x220(%rsp)
jmp 0x5164b
movq 0x280(%rsp), %rax
movq %rax, 0xa0(%rsp)
leaq 0x238(%rsp), %rdi
xorl %esi, %esi
callq 0x59c50
movq 0xa0(%rsp), %rdi
movq %rax, 0x218(%rsp)
movq 0x218(%rsp), %rsi
callq 0x59c90
movq %rax, 0x210(%rsp)
jmp 0x512d5
movl $0x0, 0x20c(%rsp)
movq 0x100(%rsp), %rcx
movl 0x20c(%rsp), %eax
movq 0xa8(%rcx), %rcx
movzwl 0x28e(%rsp), %edx
movq (%rcx,%rdx,8), %rcx
cmpl 0x218(%rcx), %eax
jae 0x523c5
movl $0x0, 0x208(%rsp)
movq 0x100(%rsp), %rcx
movl 0x208(%rsp), %eax
movq 0xa8(%rcx), %rcx
movzwl 0x28e(%rsp), %edx
movq (%rcx,%rdx,8), %rcx
cmpl 0x228(%rcx), %eax
jae 0x523ad
movl $0x0, 0x204(%rsp)
movq 0x100(%rsp), %rcx
movl 0x204(%rsp), %eax
movq 0xa8(%rcx), %rcx
movzwl 0x28e(%rsp), %edx
movq (%rcx,%rdx,8), %rcx
cmpl 0x238(%rcx), %eax
jae 0x52395
movl $0x0, 0x200(%rsp)
movq 0x100(%rsp), %rcx
movl 0x200(%rsp), %eax
movq 0xa8(%rcx), %rcx
movzwl 0x28e(%rsp), %edx
movq (%rcx,%rdx,8), %rcx
cmpl 0x248(%rcx), %eax
jae 0x5237d
movq 0x100(%rsp), %rax
movq 0xa8(%rax), %rcx
movzwl 0x28e(%rsp), %edx
movq (%rcx,%rdx,8), %rcx
movq 0x210(%rcx), %rcx
movl 0x20c(%rsp), %edx
movl (%rcx,%rdx,4), %ecx
movl %ecx, 0x244(%rsp)
movq 0xa8(%rax), %rcx
movzwl 0x28e(%rsp), %edx
movq (%rcx,%rdx,8), %rcx
movq 0x220(%rcx), %rcx
movl 0x208(%rsp), %edx
movl (%rcx,%rdx,4), %ecx
movl %ecx, 0x248(%rsp)
movq 0xa8(%rax), %rcx
movzwl 0x28e(%rsp), %edx
movq (%rcx,%rdx,8), %rcx
movq 0x230(%rcx), %rcx
movl 0x204(%rsp), %edx
movl (%rcx,%rdx,4), %ecx
movl %ecx, 0x24c(%rsp)
movq 0xa8(%rax), %rcx
movzwl 0x28e(%rsp), %edx
movq (%rcx,%rdx,8), %rcx
movq 0x240(%rcx), %rcx
movl 0x200(%rsp), %edx
movl (%rcx,%rdx,4), %ecx
movl %ecx, 0x250(%rsp)
movl 0x74(%rax), %ecx
movl %ecx, 0x94(%rsp)
movq 0x30(%rax), %rax
movq 0x48(%rax), %rdi
callq 0x81b60
movl %eax, %ecx
movl 0x94(%rsp), %eax
shrl %ecx
subl %ecx, %eax
cvtsi2sd %rax, %xmm0
movsd %xmm0, 0x98(%rsp)
movl 0x244(%rsp), %edi
movl 0x248(%rsp), %esi
movl 0x24c(%rsp), %edx
movl 0x250(%rsp), %ecx
callq 0xa67f0
movaps %xmm0, %xmm1
movsd 0x98(%rsp), %xmm0
mulsd %xmm1, %xmm0
cvttsd2si %xmm0, %rax
movl %eax, 0x1fc(%rsp)
xorps %xmm0, %xmm0
movsd %xmm0, 0x1f0(%rsp)
leaq 0x1d8(%rsp), %rdi
callq 0x59cd0
movl $0x0, 0x1d4(%rsp)
movq 0x100(%rsp), %rcx
movl 0x1d4(%rsp), %eax
cmpl 0x78(%rcx), %eax
ja 0x51943
movq 0x278(%rsp), %rdi
movl 0x1d4(%rsp), %eax
movl %eax, %esi
callq 0x59ce0
movq %rax, %rcx
movq 0x100(%rsp), %rax
movsd (%rcx), %xmm1
movl 0x1d4(%rsp), %ecx
cvtsi2sd %rcx, %xmm0
mulsd %xmm0, %xmm1
movl 0x78(%rax), %eax
cvtsi2sd %rax, %xmm0
divsd %xmm0, %xmm1
movsd 0x1f0(%rsp), %xmm0
addsd %xmm1, %xmm0
movsd %xmm0, 0x1f0(%rsp)
movq 0x278(%rsp), %rdi
movl 0x1d4(%rsp), %eax
movl %eax, %esi
callq 0x59ce0
movq %rax, %rsi
leaq 0x1d8(%rsp), %rdi
callq 0x59d00
jmp 0x51912
jmp 0x51914
movl 0x1d4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x1d4(%rsp)
jmp 0x5187b
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x1c8(%rsp)
movl %eax, 0x1c4(%rsp)
jmp 0x5236b
movq 0x268(%rsp), %rax
movl 0x244(%rsp), %edx
movl 0x248(%rsp), %ecx
movq (%rax,%rdx,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x24c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x250(%rsp), %ecx
leaq (%rcx,%rcx,2), %rcx
leaq (%rax,%rcx,8), %rdi
callq 0x3c180
movq 0x100(%rsp), %rcx
movq %rax, %xmm0
movaps 0x5a01c(%rip), %xmm1    # 0xab9b0
punpckldq %xmm1, %xmm0    # xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
movapd 0x5a020(%rip), %xmm1    # 0xab9c0
subpd %xmm1, %xmm0
movaps %xmm0, %xmm1
unpckhpd %xmm0, %xmm0            # xmm0 = xmm0[1,1]
addsd %xmm1, %xmm0
movl 0x1fc(%rsp), %eax
movl 0x78(%rcx), %ecx
imull %ecx, %eax
cvtsi2sd %rax, %xmm1
divsd %xmm1, %xmm0
movsd %xmm0, 0x1b8(%rsp)
movsd 0x1f0(%rsp), %xmm0
movsd 0x1b8(%rsp), %xmm1
subsd %xmm1, %xmm0
callq 0x59d70
movsd %xmm0, 0x88(%rsp)
jmp 0x519f4
movsd 0x88(%rsp), %xmm0
movq 0x100(%rsp), %rax
movl 0x78(%rax), %eax
cvtsi2sd %rax, %xmm1
mulsd %xmm1, %xmm0
movsd 0x5aa27(%rip), %xmm1    # 0xac440
ucomisd %xmm1, %xmm0
jbe 0x51c28
movq 0x100(%rsp), %rax
movsd 0x1b8(%rsp), %xmm0
movsd 0x1f0(%rsp), %xmm1
subsd %xmm1, %xmm0
movl 0x78(%rax), %eax
cvtsi2sd %rax, %xmm1
mulsd %xmm1, %xmm0
cvttsd2si %xmm0, %eax
movl %eax, 0x1b4(%rsp)
cmpl $0x0, 0x1b4(%rsp)
jle 0x51b37
movl $0x0, 0x1b0(%rsp)
movl 0x1b0(%rsp), %eax
cmpl 0x1b4(%rsp), %eax
jge 0x51ab0
movslq 0x1b0(%rsp), %rsi
leaq 0x1d8(%rsp), %rdi
callq 0x59ce0
xorps %xmm0, %xmm0
movsd %xmm0, (%rax)
movl 0x1b0(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x1b0(%rsp)
jmp 0x51a71
movl 0x1b4(%rsp), %eax
movl %eax, 0x1ac(%rsp)
movq 0x100(%rsp), %rcx
movl 0x1ac(%rsp), %eax
cmpl 0x78(%rcx), %eax
jge 0x51b32
movq 0x278(%rsp), %rdi
movl 0x1ac(%rsp), %eax
subl 0x1b4(%rsp), %eax
movslq %eax, %rsi
callq 0x59ce0
movsd (%rax), %xmm0
movsd %xmm0, 0x80(%rsp)
movslq 0x1ac(%rsp), %rsi
leaq 0x1d8(%rsp), %rdi
callq 0x59ce0
movsd 0x80(%rsp), %xmm0
movsd %xmm0, (%rax)
movl 0x1ac(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x1ac(%rsp)
jmp 0x51abe
jmp 0x51c26
imull $-0x1, 0x1b4(%rsp), %eax
movl %eax, 0x1b4(%rsp)
movl $0x0, 0x1a8(%rsp)
movq 0x100(%rsp), %rcx
movl 0x1a8(%rsp), %eax
movl 0x78(%rcx), %ecx
subl 0x1b4(%rsp), %ecx
cmpl %ecx, %eax
jge 0x51bc8
movq 0x278(%rsp), %rdi
movl 0x1a8(%rsp), %eax
addl 0x1b4(%rsp), %eax
movslq %eax, %rsi
callq 0x59ce0
movsd (%rax), %xmm0
movsd %xmm0, 0x78(%rsp)
movslq 0x1a8(%rsp), %rsi
leaq 0x1d8(%rsp), %rdi
callq 0x59ce0
movsd 0x78(%rsp), %xmm0
movsd %xmm0, (%rax)
movl 0x1a8(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x1a8(%rsp)
jmp 0x51b51
movq 0x100(%rsp), %rax
movl 0x78(%rax), %eax
subl 0x1b4(%rsp), %eax
movl %eax, 0x1a4(%rsp)
movq 0x100(%rsp), %rcx
movl 0x1a4(%rsp), %eax
cmpl 0x78(%rcx), %eax
jge 0x51c24
movslq 0x1a4(%rsp), %rsi
leaq 0x1d8(%rsp), %rdi
callq 0x59ce0
xorps %xmm0, %xmm0
movsd %xmm0, (%rax)
movl 0x1a4(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x1a4(%rsp)
jmp 0x51be1
jmp 0x51c26
jmp 0x51c28
movq 0x100(%rsp), %rax
movl $0x0, 0x1a0(%rsp)
movl 0x78(%rax), %eax
movl %eax, 0x19c(%rsp)
cmpl $0x0, 0x19c(%rsp)
jl 0x51cae
movl 0x19c(%rsp), %eax
movl %eax, 0x74(%rsp)
movslq %eax, %rsi
leaq 0x1d8(%rsp), %rdi
callq 0x59ce0
movq %rax, %rcx
movl 0x74(%rsp), %eax
movsd (%rcx), %xmm0
movl 0x1fc(%rsp), %ecx
cvtsi2sd %rcx, %xmm1
mulsd %xmm1, %xmm0
cvttsd2si %xmm0, %rcx
imull %ecx, %eax
addl 0x1a0(%rsp), %eax
movl %eax, 0x1a0(%rsp)
movl 0x19c(%rsp), %eax
addl $-0x1, %eax
movl %eax, 0x19c(%rsp)
jmp 0x51c45
movl $0x0, 0x198(%rsp)
movl 0x1a0(%rsp), %eax
movq %rax, 0x68(%rsp)
movq 0x268(%rsp), %rax
movl 0x244(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x248(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x24c(%rsp), %ecx
movq (%rax,%rcx,8), %rdi
movl 0x250(%rsp), %eax
imulq $0x18, %rax, %rax
addq %rax, %rdi
callq 0x3c180
movq %rax, %rcx
movq 0x68(%rsp), %rax
cmpq %rcx, %rax
jae 0x51d58
movq 0x268(%rsp), %rax
movl 0x244(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x248(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x24c(%rsp), %ecx
movq (%rax,%rcx,8), %rdi
movl 0x250(%rsp), %eax
imulq $0x18, %rax, %rax
addq %rax, %rdi
callq 0x3c180
subl 0x1a0(%rsp), %eax
movl %eax, 0x198(%rsp)
movq 0x100(%rsp), %rax
movl 0x1fc(%rsp), %ecx
movl %ecx, 0x194(%rsp)
movl 0x78(%rax), %eax
movl %eax, 0x190(%rsp)
cmpl $0x0, 0x190(%rsp)
jl 0x52257
movslq 0x190(%rsp), %rsi
leaq 0x1d8(%rsp), %rdi
callq 0x59ce0
movsd (%rax), %xmm0
movl 0x1fc(%rsp), %eax
cvtsi2sd %rax, %xmm1
mulsd %xmm1, %xmm0
cvttsd2si %xmm0, %rax
movl %eax, 0x18c(%rsp)
cmpl $0x0, 0x18c(%rsp)
jbe 0x51e21
cmpl $0x0, 0x198(%rsp)
jbe 0x51e21
movl 0x198(%rsp), %eax
xorl %edx, %edx
divl 0x190(%rsp)
movl %eax, 0x64(%rsp)
movl 0x198(%rsp), %eax
xorl %edx, %edx
divl 0x190(%rsp)
movl 0x64(%rsp), %eax
movl %edx, %esi
movl $0x1, %ecx
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %ecx
addl %ecx, %eax
addl 0x18c(%rsp), %eax
movl %eax, 0x18c(%rsp)
movl $0x0, 0x198(%rsp)
movl 0x18c(%rsp), %eax
cmpl 0x194(%rsp), %eax
ja 0x51e4a
movl 0x18c(%rsp), %ecx
movl 0x194(%rsp), %eax
subl %ecx, %eax
movl %eax, 0x194(%rsp)
jmp 0x51e63
movl 0x194(%rsp), %eax
movl %eax, 0x18c(%rsp)
movl $0x0, 0x194(%rsp)
movl $0x0, 0x188(%rsp)
movl 0x188(%rsp), %eax
cmpl 0x18c(%rsp), %eax
jae 0x5223f
leaq 0x170(%rsp), %rdi
callq 0x59d90
movq 0x268(%rsp), %rax
movl 0x244(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x248(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x24c(%rsp), %ecx
movq (%rax,%rcx,8), %rdi
movl 0x250(%rsp), %eax
imulq $0x18, %rax, %rax
addq %rax, %rdi
callq 0x3c180
movslq 0x190(%rsp), %rcx
cmpq %rcx, %rax
jae 0x51f1b
movq 0x268(%rsp), %rax
movl 0x244(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x248(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x24c(%rsp), %ecx
movq (%rax,%rcx,8), %rdi
movl 0x250(%rsp), %eax
imulq $0x18, %rax, %rax
addq %rax, %rdi
callq 0x3c180
movl %eax, 0x190(%rsp)
movl $0x0, 0x16c(%rsp)
movl 0x16c(%rsp), %eax
cmpl 0x190(%rsp), %eax
jge 0x51fc4
movl 0x244(%rsp), %esi
movl 0x248(%rsp), %edx
movl 0x24c(%rsp), %ecx
movl 0x250(%rsp), %r8d
movq %rsp, %rax
movl $0x0, (%rax)
leaq 0x154(%rsp), %rdi
xorl %r9d, %r9d
callq 0x4a220
jmp 0x51f72
leaq 0x170(%rsp), %rdi
leaq 0x154(%rsp), %rsi
callq 0x59da0
jmp 0x51f89
jmp 0x51f8b
movl 0x16c(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x16c(%rsp)
jmp 0x51f26
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x1c8(%rsp)
movl %eax, 0x1c4(%rsp)
leaq 0x170(%rsp), %rdi
callq 0x59f70
jmp 0x5236b
movq 0x100(%rsp), %rax
movq 0x40(%rax), %rdi
movzwl 0x28e(%rsp), %esi
movq (%rdi), %rax
movq 0x28(%rax), %rax
leaq 0x244(%rsp), %rdx
leaq 0x170(%rsp), %rcx
callq *%rax
jmp 0x51ff3
leaq 0x170(%rsp), %rax
movq %rax, 0x148(%rsp)
movq 0x148(%rsp), %rdi
callq 0x59e10
movq %rax, 0x140(%rsp)
movq 0x148(%rsp), %rdi
callq 0x59e40
movq %rax, 0x138(%rsp)
leaq 0x140(%rsp), %rdi
leaq 0x138(%rsp), %rsi
callq 0x59e70
testb $0x1, %al
jne 0x5204b
jmp 0x5221c
leaq 0x140(%rsp), %rdi
callq 0x59eb0
movq %rax, 0x130(%rsp)
movq 0x268(%rsp), %rax
movl 0x244(%rsp), %edx
movl 0x248(%rsp), %ecx
movq (%rax,%rdx,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x24c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x250(%rsp), %ecx
leaq (%rcx,%rcx,2), %rcx
leaq (%rax,%rcx,8), %rdi
callq 0x59ec0
movq (%rax), %rax
movq %rax, 0x128(%rsp)
movq 0x268(%rsp), %rax
movl 0x244(%rsp), %edx
movl 0x248(%rsp), %ecx
movq (%rax,%rdx,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x24c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x250(%rsp), %ecx
leaq (%rcx,%rcx,2), %rcx
leaq (%rax,%rcx,8), %rdi
callq 0x59f00
movq 0x100(%rsp), %rdi
movq 0x130(%rsp), %rsi
movq (%rdi), %rax
movq 0x90(%rax), %rax
callq *%rax
movq %rax, 0x58(%rsp)
jmp 0x52108
movq 0x100(%rsp), %rax
movq 0x58(%rsp), %rcx
movq %rcx, 0x120(%rsp)
movq 0x38(%rax), %rdi
movq 0x130(%rsp), %rsi
movq (%rdi), %rax
movq 0x20(%rax), %rax
leaq 0x128(%rsp), %rdx
callq *%rax
jmp 0x5213c
movq 0x100(%rsp), %rax
movq 0x120(%rsp), %rdx
movq 0xa8(%rax), %rax
movzwl 0x28e(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x20(%rax), %rax
movq 0x128(%rsp), %rcx
leaq (%rcx,%rcx,2), %rcx
movq %rdx, (%rax,%rcx,8)
movq 0x280(%rsp), %rdi
leaq 0x128(%rsp), %rsi
callq 0x59f20
movq %rax, 0x50(%rsp)
jmp 0x5218f
movq 0x50(%rsp), %rax
movq %rax, 0x118(%rsp)
leaq 0x118(%rsp), %rdi
callq 0x59b80
movq %rax, %rcx
movq 0x100(%rsp), %rax
movq 0x8(%rcx), %rdx
movq 0xa8(%rax), %rcx
movzwl 0x28e(%rsp), %esi
movq (%rcx,%rsi,8), %rcx
movq 0x20(%rcx), %rcx
imulq $0x18, 0x128(%rsp), %rsi
addq %rsi, %rcx
movq %rdx, 0x8(%rcx)
movq 0xa8(%rax), %rax
movzwl 0x28e(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x20(%rax), %rax
imulq $0x18, 0x128(%rsp), %rcx
addq %rcx, %rax
movq $0x0, 0x10(%rax)
leaq 0x140(%rsp), %rdi
callq 0x59f50
jmp 0x5202d
leaq 0x170(%rsp), %rdi
callq 0x59f70
movl 0x188(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x188(%rsp)
jmp 0x51e6e
jmp 0x52241
movl 0x190(%rsp), %eax
addl $-0x1, %eax
movl %eax, 0x190(%rsp)
jmp 0x51d78
movq 0x268(%rsp), %rax
movl 0x244(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x248(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x24c(%rsp), %ecx
movq (%rax,%rcx,8), %rdi
movl 0x250(%rsp), %eax
imulq $0x18, %rax, %rax
addq %rax, %rdi
callq 0x3c180
cmpq $0x0, %rax
jbe 0x52348
movq 0x87d4c(%rip), %rdi     # 0xd9ff0
leaq 0x5863d(%rip), %rsi     # 0xaa8e8
callq 0x8440
jmp 0x522b2
movq 0x87d37(%rip), %rdi     # 0xd9ff0
leaq 0x5a724(%rip), %rsi     # 0xac9e4
callq 0x8440
movq %rax, 0x48(%rsp)
jmp 0x522cc
movq 0x268(%rsp), %rax
movl 0x244(%rsp), %edx
movl 0x248(%rsp), %ecx
movq (%rax,%rdx,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x24c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x250(%rsp), %ecx
leaq (%rcx,%rcx,2), %rcx
leaq (%rax,%rcx,8), %rdi
callq 0x3c180
movq 0x48(%rsp), %rdi
movq %rax, %rsi
callq 0x8100
movq %rax, 0x40(%rsp)
jmp 0x5231d
movq 0x40(%rsp), %rdi
movq 0x87c2f(%rip), %rsi     # 0xd9f58
callq 0x8480
jmp 0x52330
movq 0x87c99(%rip), %rdi     # 0xd9fd0
callq 0x84f0
jmp 0x5233e
movl $0x1, %edi
callq 0x8500
leaq 0x1d8(%rsp), %rdi
callq 0x59fd0
movl 0x200(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x200(%rsp)
jmp 0x51706
leaq 0x1d8(%rsp), %rdi
callq 0x59fd0
jmp 0x52581
jmp 0x5237f
movl 0x204(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x204(%rsp)
jmp 0x516cd
jmp 0x52397
movl 0x208(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x208(%rsp)
jmp 0x51694
jmp 0x523af
movl 0x20c(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x20c(%rsp)
jmp 0x5165b
movl $0x0, 0x114(%rsp)
movq 0x100(%rsp), %rcx
movl 0x114(%rsp), %eax
cmpl 0x64(%rcx), %eax
jae 0x5255c
movl $0x0, 0x110(%rsp)
movq 0x100(%rsp), %rcx
movl 0x110(%rsp), %eax
cmpl 0x68(%rcx), %eax
jae 0x5251c
movl $0x0, 0x10c(%rsp)
movq 0x100(%rsp), %rcx
movl 0x10c(%rsp), %eax
cmpl 0x6c(%rcx), %eax
jae 0x524d1
movq 0x268(%rsp), %rax
movl 0x114(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x110(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x10c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq %rax, 0x38(%rsp)
cmpq $0x0, %rax
je 0x524b9
movq 0x38(%rsp), %rcx
movq %rcx, %rax
addq $-0x8, %rax
movq %rax, 0x28(%rsp)
imulq $0x18, -0x8(%rcx), %rdx
movq %rcx, %rax
addq %rdx, %rax
cmpq %rax, %rcx
movq %rax, 0x30(%rsp)
je 0x524af
movq 0x30(%rsp), %rdi
addq $-0x18, %rdi
movq %rdi, 0x20(%rsp)
callq 0x20b80
movq 0x38(%rsp), %rcx
movq 0x20(%rsp), %rax
cmpq %rcx, %rax
movq %rax, 0x30(%rsp)
jne 0x52488
movq 0x28(%rsp), %rdi
callq 0x8570
jmp 0x524bb
movl 0x10c(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x10c(%rsp)
jmp 0x52416
movq 0x268(%rsp), %rax
movl 0x114(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x110(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq %rax, 0x18(%rsp)
cmpq $0x0, %rax
je 0x52504
movq 0x18(%rsp), %rdi
callq 0x8570
jmp 0x52506
movl 0x110(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x110(%rsp)
jmp 0x523f3
movq 0x268(%rsp), %rax
movl 0x114(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq %rax, 0x10(%rsp)
cmpq $0x0, %rax
je 0x52544
movq 0x10(%rsp), %rdi
callq 0x8570
jmp 0x52546
movl 0x114(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x114(%rsp)
jmp 0x523d0
movq 0x268(%rsp), %rax
movq %rax, 0x8(%rsp)
cmpq $0x0, %rax
je 0x52579
movq 0x8(%rsp), %rdi
callq 0x8570
addq $0x298, %rsp            # imm = 0x298
retq
movq 0x1c8(%rsp), %rdi
callq 0x8770
nop