// File: /workspace/github_cpp_makefile_star2_O2/sopanpatra160[P]OOO_Superscalar_Processor_Simulator/cache.cc
// Function: cache::read(unsigned int)
unsigned int cache::read(unsigned int addr){

	//printf("Entered read \n");
	unsigned int addr_ev;
	num_r++;
	//printf("Access no. %d\n",num_r);
	calc_tag_ind(addr);

	hit=0;
	miss=0;
		//printf("level = %d\n",lev);
	if(lev == 1){

		//#1 check for the element in all the blocks of that set
		for (unsigned int j=0; j<a; j++){
			if((tag_store[ind][j]==tag) && (valid_store[ind][j]==1)){
				if(rp==2)
					lru_update(ind,j);
				else if(rp==3)
					lfu_update_block(ind,j,1);
				hit=1;
				//printf("L1 Hit \n");				
				return 1;
			}
		}
		if(vptr != NULL){
			unsigned int tag_vc = vptr->calc_tag(addr); // tag reconstruction
			unsigned int found_vc=0;
			unsigned int found_loc = 0;
			for (unsigned int j=0; j<vptr->a; j++){
				if((vptr->tag_store[0][j]==tag_vc) && (vptr->valid_store[0][j]==1)){
					found_vc = 1;
					found_loc = j;
				}
			}
			if(found_vc==1){
				//unsigned int tag_vc = vptr->calc_tag(addr);
				num_swap+=1;
				swap(found_loc,0);
				return 1;
			}
		}
		num_miss_r++; // MISS in L1
		miss=1;
		//printf("L1 Miss \n");
		
		//#2 MISS in L1 but invalid case
		for (unsigned int j=0; j<a; j++){
			if(valid_store[ind][j]==0){
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][j]=tag;
				valid_store[ind][j]=1;
				if(rp==2)
					lru_update(ind,j);
				else if(rp ==3) 
					lfu_update_block(ind,j,0);

				return 0;
			}
		}
		
		//#3 MISS IN L1 FOR ALL BITS VALID : EVICTION

		if(rp==2){
			ev_blk= lru_block2evict(ind);
		}
		
		else if(rp==3){
			ev_blk= lfu_block2evict(ind);
		}

		//See if victim cache is present
		if(vptr != NULL){
			addr_ev = ev_blk_addr(ind,tag_store[ind][ev_blk]);
			
			vptr->insert_vc(addr_ev,dirty_store[ind][ev_blk]);
			if(next!=NULL)
				next->read(addr);
			tag_store[ind][ev_blk]=tag;
			dirty_store[ind][ev_blk]=0;
		}
		
		else if(vptr == NULL){
			if(dirty_store[ind][ev_blk]==0){
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][ev_blk]=tag;
			}
			if(dirty_store[ind][ev_blk]==1){
				num_wb+=1;
				addr_ev = ev_blk_addr(ind,tag_store[ind][ev_blk]);
				if(next!=NULL)
					next->write(addr_ev);
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][ev_blk]=tag;
				dirty_store[ind][ev_blk]=0;
			}
		}

		//update LRU/LFU counters
		if(rp==2){
			lru_update(ind,ev_blk);
		}
		else if(rp==3){
			lfu_update_set(ind,ev_blk);
			lfu_update_block(ind,ev_blk,0);
		}
		return 0;
	}	

	else if(lev == 2){
		//#1 check for the element in all the blocks of that set
		for (unsigned int j=0; j<a; j++){
			if((tag_store[ind][j]==tag) && (valid_store[ind][j]==1)){
				if(rp==2)
					lru_update(ind,j);
				else if(rp==3)
					lfu_update_block(ind,j,1);
				hit=1;
				return 1;
			}
		}
		miss=1;	
		num_miss_r++;
		
		//#2 MISS in L1 but invalid case
		for (unsigned int j=0; j<a; j++){
			if(valid_store[ind][j]==0){
				tag_store[ind][j]=tag;
				valid_store[ind][j]=1;
				if(rp==2)
					lru_update(ind,j);
				else 
					lfu_update_block(ind,j,0);
			}
		}
		
		//#3 MISS IN L1 FOR ALL BITS VALID : EVICTION
		if(rp==2){
			ev_blk= lru_block2evict(ind);
		}
		//LFU policy
		else if(rp==3){
			ev_blk= lfu_block2evict(ind);
		}

		if(wp==0){
			if(dirty_store[ind][ev_blk]==0){
				tag_store[ind][ev_blk]=tag;
			}
			if(dirty_store[ind][ev_blk]==1){
				num_wb+=1;
				tag_store[ind][ev_blk]=tag;
				dirty_store[ind][ev_blk]=0;
			}
		}

		if(rp==2){
			lru_update(ind,ev_blk);
		}
		else if(rp==3){
			lfu_update_set(ind,ev_blk);
			lfu_update_block(ind,ev_blk,0);
		}
		return 0;
	}
	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %esi, %ebp
movq %rdi, %rbx
incl 0x80(%rdi)
callq 0x1b30
andq $0x0, 0x9c(%rbx)
movl 0x24(%rbx), %eax
cmpl $0x1, %eax
je 0x16c8
xorl %ebp, %ebp
cmpl $0x2, %eax
jne 0x1b1f
movl 0x18(%rbx), %eax
movq 0x28(%rbx), %rcx
movl 0x68(%rbx), %esi
movl 0x64(%rbx), %edi
movq 0x30(%rbx), %r8
xorl %edx, %edx
cmpq %rdx, %rax
je 0x1705
movq (%rcx,%rsi,8), %r9
cmpl %edi, (%r9,%rdx,4)
jne 0x16c3
movq (%r8,%rsi,8), %r9
cmpl $0x1, (%r9,%rdx,4)
je 0x1818
incq %rdx
jmp 0x16a5
movl 0x18(%rbx), %eax
movq 0x28(%rbx), %r13
movl 0x68(%rbx), %r8d
movl %r8d, %r14d
movl 0x64(%rbx), %esi
movq 0x30(%rbx), %rcx
xorl %edx, %edx
cmpq %rdx, %rax
je 0x17a7
movq (%r13,%r14,8), %rdi
cmpl %esi, (%rdi,%rdx,4)
jne 0x1700
movq (%rcx,%r14,8), %rdi
cmpl $0x1, (%rdi,%rdx,4)
je 0x1832
incq %rdx
jmp 0x16df
movl $0x1, 0xa0(%rbx)
incl 0x84(%rbx)
xorl %r14d, %r14d
movl %eax, %eax
cmpq %rax, %r14
jae 0x1782
movq 0x30(%rbx), %rax
movl 0x68(%rbx), %ecx
movq (%rax,%rcx,8), %rdx
cmpl $0x0, (%rdx,%r14,4)
jne 0x177a
movl 0x64(%rbx), %edx
movq 0x28(%rbx), %rsi
movq (%rsi,%rcx,8), %rcx
movl %edx, (%rcx,%r14,4)
movl 0x68(%rbx), %ecx
movq (%rax,%rcx,8), %rax
movl $0x1, (%rax,%r14,4)
movl 0x68(%rbx), %esi
cmpl $0x2, 0x1c(%rbx)
jne 0x1765
movq %rbx, %rdi
movl %r14d, %edx
callq 0x1b50
jmp 0x177a
movq 0x48(%rbx), %rax
movq 0x50(%rbx), %rcx
movl (%rcx,%rsi,4), %ecx
incl %ecx
movq (%rax,%rsi,8), %rax
movl %ecx, (%rax,%r14,4)
incq %r14
movl 0x18(%rbx), %eax
jmp 0x1718
movl 0x1c(%rbx), %eax
cmpl $0x2, %eax
je 0x1857
cmpl $0x3, %eax
jne 0x1865
movl 0x68(%rbx), %esi
movq %rbx, %rdi
callq 0x1d2a
jmp 0x1862
movq 0x8(%rbx), %r15
testq %r15, %r15
je 0x18d7
movl 0x18(%r15), %edx
movl 0x5c(%r15), %ecx
addl 0x58(%r15), %ecx
movl %ebp, %edi
shrl %cl, %edi
movl %edi, 0x64(%r15)
xorl %ecx, %ecx
xorl %r8d, %r8d
xorl %esi, %esi
cmpq %rcx, %rdx
je 0x17fc
movq 0x28(%r15), %r9
movq (%r9), %r9
cmpl %edi, (%r9,%rcx,4)
jne 0x17f7
movq 0x30(%r15), %r9
movq (%r9), %r9
movl (%r9,%rcx,4), %r9d
cmpl $0x1, %r9d
cmovel %r9d, %r8d
cmovel %ecx, %esi
incq %rcx
jmp 0x17cf
cmpl $0x1, %r8d
jne 0x18cc
incl 0x7c(%rbx)
movq %rbx, %rdi
xorl %edx, %edx
callq 0x1bc4
jmp 0x19a1
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x1982
cmpl $0x2, %eax
jne 0x1997
movq %rbx, %rdi
jmp 0x184d
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x198c
cmpl $0x2, %eax
jne 0x1997
movq %rbx, %rdi
movl %r8d, %esi
callq 0x1b50
jmp 0x1997
movl 0x68(%rbx), %esi
movq %rbx, %rdi
callq 0x1cf8
movl %eax, 0x6c(%rbx)
cmpl $0x0, 0x20(%rbx)
jne 0x1a27
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %ecx
movq (%rax,%rcx,8), %rsi
movl 0x6c(%rbx), %edx
movl (%rsi,%rdx,4), %esi
testl %esi, %esi
jne 0x189f
movl 0x64(%rbx), %esi
movq 0x28(%rbx), %rdi
movq (%rdi,%rcx,8), %rcx
movl %esi, (%rcx,%rdx,4)
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %edx
movq (%rax,%rcx,8), %rsi
movl (%rsi,%rdx,4), %esi
cmpl $0x1, %esi
jne 0x1a27
incl 0x74(%rbx)
movl 0x64(%rbx), %esi
movq 0x28(%rbx), %rdi
movq (%rdi,%rcx,8), %rcx
movl %esi, (%rcx,%rdx,4)
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %edx
movq (%rax,%rcx,8), %rax
andl $0x0, (%rax,%rdx,4)
jmp 0x1a27
movq 0x30(%rbx), %rcx
movl 0x68(%rbx), %r14d
movl %r14d, %r8d
incl 0x84(%rbx)
movl $0x1, 0xa0(%rbx)
xorl %r12d, %r12d
cmpq %r12, %rax
je 0x18ff
movq (%rcx,%r14,8), %rdx
cmpl $0x0, (%rdx,%r12,4)
je 0x1927
incq %r12
jmp 0x18ea
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x19a9
cmpl $0x2, %eax
jne 0x19bd
movq %rbx, %rdi
movl %r8d, %r12d
movl %r8d, %esi
callq 0x1cf8
jmp 0x19b7
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x1942
movl %ebp, %esi
callq 0x165c
movq 0x28(%rbx), %r13
movq 0x30(%rbx), %rcx
movl 0x68(%rbx), %r14d
movl 0x64(%rbx), %eax
movq (%r13,%r14,8), %rdx
movl %eax, (%rdx,%r12,4)
movl 0x68(%rbx), %eax
movq (%rcx,%rax,8), %rax
movl $0x1, (%rax,%r12,4)
movl 0x1c(%rbx), %eax
xorl %ebp, %ebp
cmpl $0x3, %eax
je 0x1b07
cmpl $0x2, %eax
jne 0x1b1f
movl 0x68(%rbx), %esi
movq %rbx, %rdi
movl %r12d, %edx
jmp 0x1a43
movq 0x48(%rbx), %rax
movq (%rax,%rsi,8), %rax
jmp 0x1994
movq 0x48(%rbx), %rax
movq (%rax,%r14,8), %rax
incl (%rax,%rdx,4)
movl $0x1, 0x9c(%rbx)
pushq $0x1
popq %rbp
jmp 0x1b1f
movq %rbx, %rdi
movl %r8d, %r12d
movl %r8d, %esi
callq 0x1d2a
movl %eax, 0x6c(%rbx)
movl %r12d, %r8d
testq %r15, %r15
je 0x1a7c
movq (%r13,%r14,8), %rax
movl 0x58(%rbx), %ecx
shll %cl, %r8d
movl 0x6c(%rbx), %edx
movl (%rax,%rdx,4), %esi
addl 0x5c(%rbx), %ecx
shll %cl, %esi
orl %r8d, %esi
movq 0x38(%rbx), %rax
movq (%rax,%r14,8), %rax
movl (%rax,%rdx,4), %edx
movq %r15, %rdi
callq 0x1d6c
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x1a01
movl %ebp, %esi
callq 0x165c
movl 0x64(%rbx), %eax
movq 0x28(%rbx), %rcx
movl 0x68(%rbx), %edx
movq (%rcx,%rdx,8), %rcx
movl 0x6c(%rbx), %edx
movl %eax, (%rcx,%rdx,4)
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %ecx
movq (%rax,%rcx,8), %rax
movl 0x6c(%rbx), %ecx
andl $0x0, (%rax,%rcx,4)
movl 0x1c(%rbx), %eax
xorl %ebp, %ebp
cmpl $0x3, %eax
je 0x1a4d
cmpl $0x2, %eax
jne 0x1b1f
movl 0x68(%rbx), %esi
movl 0x6c(%rbx), %edx
movq %rbx, %rdi
callq 0x1b50
jmp 0x1b1f
movl 0x68(%rbx), %eax
movl 0x6c(%rbx), %ecx
movq 0x48(%rbx), %rdx
movq 0x50(%rbx), %rsi
movq (%rdx,%rax,8), %rdi
movl (%rdi,%rcx,4), %ecx
movl %ecx, (%rsi,%rax,4)
movl 0x68(%rbx), %eax
movl 0x6c(%rbx), %ecx
movl (%rsi,%rax,4), %esi
incl %esi
movq (%rdx,%rax,8), %rax
movl %esi, (%rax,%rcx,4)
jmp 0x1b1f
movq 0x38(%rbx), %rcx
movq (%rcx,%r14,8), %rdx
movl 0x6c(%rbx), %eax
movl (%rdx,%rax,4), %edx
testl %edx, %edx
jne 0x1ac8
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x1aac
movl %ebp, %esi
callq 0x165c
movq 0x28(%rbx), %r13
movq 0x38(%rbx), %rcx
movl 0x68(%rbx), %r14d
movl 0x6c(%rbx), %eax
movl 0x64(%rbx), %edx
movq (%r13,%r14,8), %rsi
movl %edx, (%rsi,%rax,4)
movl 0x68(%rbx), %r14d
movl 0x6c(%rbx), %eax
movq (%rcx,%r14,8), %rcx
movl (%rcx,%rax,4), %edx
movl %r14d, %r8d
cmpl $0x1, %edx
jne 0x1a27
incl 0x74(%rbx)
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x1a01
movq (%r13,%r14,8), %rcx
movl (%rcx,%rax,4), %edx
movl 0x58(%rbx), %eax
movl 0x5c(%rbx), %ecx
addl %eax, %ecx
shll %cl, %edx
movl %eax, %ecx
shll %cl, %r8d
orl %edx, %r8d
movl %r8d, %esi
callq 0x1ea0
jmp 0x19f2
movl 0x68(%rbx), %eax
movq 0x48(%rbx), %rcx
movq 0x50(%rbx), %rdx
movl (%rdx,%rax,4), %edx
incl %edx
movq (%rcx,%rax,8), %rax
movl %edx, (%rax,%r12,4)
movl %ebp, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq