// File: /workspace/github_cpp_makefile_star2_O3/CMU-SAFARI[P]ramulator/src/TLDRAM.cpp
// Function: ramulator::TLDRAM::init_speed()
void TLDRAM::init_speed()
{
    // nRRD, nFAW
    int page = (org_entry.dq * org_entry.count[int(Level::Column)]) >> 13;
    switch (speed_entry.rate) {
        case 800:  speed_entry.nRRD = (page==1) ? 4 : 4;
          speed_entry.nFAW = (page==1) ? 16 : 20;
          break;
        case 1066: speed_entry.nRRD = (page==1) ? 4 : 6;
          speed_entry.nFAW = (page==1) ? 20 : 27;
          break;
        case 1333:
          speed_entry.nRRD = (page==1) ? 4 : 5;
          speed_entry.nFAW = (page==1) ? 20 : 30;
          break;
        case 1600:
          speed_entry.nRRD = (page==1) ? 5 : 6;
          speed_entry.nFAW = (page==1) ? 24 : 32;
          break;
        case 1866:
          speed_entry.nRRD = (page==1) ? 5 : 6;
          speed_entry.nFAW = (page==1) ? 26 : 33;
          break;
        case 2133:
          speed_entry.nRRD = (page==1) ? 5 : 6;
          speed_entry.nFAW = (page==1) ? 27 : 34;
          break;
        default: assert(false);
    }

    // nRFC, nXS
    int chip = org_entry.size;
    switch (speed_entry.rate) {
        case 800:  speed_entry.nRFC = (chip==512) ? 36  : (chip==1<<10) ? 44
          : (chip==1<<11) ? 64  : (chip==1<<12) ? 104 : 140; break;
        case 1066: speed_entry.nRFC = (chip==512) ? 48  : (chip==1<<10) ? 59
          : (chip==1<<11) ? 86  : (chip==1<<12) ? 139 : 187; break;
        case 1333: speed_entry.nRFC = (chip==512) ? 60  : (chip==1<<10) ? 74
          : (chip==1<<11) ? 107 : (chip==1<<12) ? 174 : 234; break;
        case 1600: speed_entry.nRFC = (chip==512) ? 72  : (chip==1<<10) ? 88
          : (chip==1<<11) ? 128 : (chip==1<<12) ? 208 : 280; break;
        case 1866: speed_entry.nRFC = (chip==512) ? 84  : (chip==1<<10) ? 103
          : (chip==1<<11) ? 150 : (chip==1<<12) ? 243 : 327; break;
        case 2133: speed_entry.nRFC = (chip==512) ? 96  : (chip==1<<10) ? 118
          : (chip==1<<11) ? 171 : (chip==1<<12) ? 278 : 374; break;
        default: assert(false);
    }
    switch (speed_entry.rate) {
        case 800:  speed_entry.nXS  = (chip==512) ? 40  : (chip==1<<10) ? 48
          : (chip==1<<11) ? 68  : (chip==1<<12) ? 108 : 144; break;
        case 1066: speed_entry.nXS  = (chip==512) ? 54  : (chip==1<<10) ? 64
          : (chip==1<<11) ? 91  : (chip==1<<12) ? 144 : 192; break;
        case 1333: speed_entry.nXS  = (chip==512) ? 67  : (chip==1<<10) ? 80
          : (chip==1<<11) ? 114 : (chip==1<<12) ? 180 : 240; break;
        case 1600: speed_entry.nXS  = (chip==512) ? 80  : (chip==1<<10) ? 96
          : (chip==1<<11) ? 136 : (chip==1<<12) ? 216 : 288; break;
        case 1866: speed_entry.nXS  = (chip==512) ? 94  : (chip==1<<10) ? 112
          : (chip==1<<11) ? 159 : (chip==1<<12) ? 252 : 336; break;
        case 2133: speed_entry.nXS  = (chip==512) ? 107 : (chip==1<<10) ? 128
          : (chip==1<<11) ? 182 : (chip==1<<12) ? 288 : 384; break;
        default: assert(false);
    }
}

// Assembly:
movl 0x36cc(%rdi), %eax
imull 0x36b8(%rdi), %eax
sarl $0xd, %eax
movl 0x3eb8(%rdi), %ecx
cmpl $0x63f, %ecx            # imm = 0x63F
jg 0x13c1fd
cmpl $0x320, %ecx            # imm = 0x320
je 0x13c33f
cmpl $0x42a, %ecx            # imm = 0x42A
je 0x13c280
cmpl $0x535, %ecx            # imm = 0x535
jne 0x13c5bd
xorl %ecx, %ecx
cmpl $0x1, %eax
sete %cl
movl $0x14, %eax
movl $0x1e, %edx
cmovel %eax, %edx
xorl $0x5, %ecx
movl %ecx, 0x3f00(%rdi)
movl %edx, 0x3f04(%rdi)
movl 0x36b4(%rdi), %eax
cmpl $0x800, %eax            # imm = 0x800
je 0x13c462
cmpl $0x400, %eax            # imm = 0x400
je 0x13c412
cmpl $0x200, %eax            # imm = 0x200
jne 0x13c500
movl $0x3c, 0x3f08(%rdi)
movl $0x43, %eax
jmp 0x13c5b6
cmpl $0x640, %ecx            # imm = 0x640
je 0x13c399
cmpl $0x74a, %ecx            # imm = 0x74A
je 0x13c2e0
cmpl $0x855, %ecx            # imm = 0x855
jne 0x13c5bd
xorl %ecx, %ecx
cmpl $0x1, %eax
setne %cl
movl $0x1b, %eax
movl $0x22, %edx
cmovel %eax, %edx
addl $0x5, %ecx
movl %ecx, 0x3f00(%rdi)
movl %edx, 0x3f04(%rdi)
movl 0x36b4(%rdi), %eax
cmpl $0x800, %eax            # imm = 0x800
je 0x13c476
cmpl $0x400, %eax            # imm = 0x400
je 0x13c426
cmpl $0x200, %eax            # imm = 0x200
jne 0x13c527
movl $0x60, 0x3f08(%rdi)
movl $0x6b, %eax
jmp 0x13c5b6
xorl %ecx, %ecx
cmpl $0x1, %eax
movl $0x14, %eax
movl $0x1b, %edx
cmovel %eax, %edx
setne %cl
leal 0x4(%rcx,%rcx), %eax
movl %eax, 0x3f00(%rdi)
movl %edx, 0x3f04(%rdi)
movl 0x36b4(%rdi), %eax
cmpl $0x800, %eax            # imm = 0x800
je 0x13c43a
cmpl $0x400, %eax            # imm = 0x400
je 0x13c3ea
cmpl $0x200, %eax            # imm = 0x200
jne 0x13c4b2
movl $0x30, 0x3f08(%rdi)
movl $0x36, %eax
jmp 0x13c5b6
xorl %ecx, %ecx
cmpl $0x1, %eax
setne %cl
movl $0x1a, %eax
movl $0x21, %edx
cmovel %eax, %edx
addl $0x5, %ecx
movl %ecx, 0x3f00(%rdi)
movl %edx, 0x3f04(%rdi)
movl 0x36b4(%rdi), %eax
cmpl $0x800, %eax            # imm = 0x800
je 0x13c44e
cmpl $0x400, %eax            # imm = 0x400
je 0x13c3fe
cmpl $0x200, %eax            # imm = 0x200
jne 0x13c4d9
movl $0x54, 0x3f08(%rdi)
movl $0x5e, %eax
jmp 0x13c5b6
xorl %ecx, %ecx
cmpl $0x1, %eax
setne %cl
movl $0x4, 0x3f00(%rdi)
leal 0x10(,%rcx,4), %eax
movl %eax, 0x3f04(%rdi)
movl 0x36b4(%rdi), %eax
cmpl $0x800, %eax            # imm = 0x800
je 0x13c54b
cmpl $0x400, %eax            # imm = 0x400
je 0x13c48a
cmpl $0x200, %eax            # imm = 0x200
jne 0x13c56d
movl $0x24, 0x3f08(%rdi)
movl $0x28, %eax
jmp 0x13c5b6
xorl %ecx, %ecx
cmpl $0x1, %eax
setne %cl
leal 0x5(%rcx), %eax
movl %eax, 0x3f00(%rdi)
leal 0x18(,%rcx,8), %eax
movl %eax, 0x3f04(%rdi)
movl 0x36b4(%rdi), %eax
cmpl $0x800, %eax            # imm = 0x800
je 0x13c55c
cmpl $0x400, %eax            # imm = 0x400
je 0x13c49e
cmpl $0x200, %eax            # imm = 0x200
jne 0x13c591
movl $0x48, 0x3f08(%rdi)
jmp 0x13c41c
movl $0x3b, 0x3f08(%rdi)
movl $0x40, %eax
jmp 0x13c5b6
movl $0x67, 0x3f08(%rdi)
movl $0x70, %eax
jmp 0x13c5b6
movl $0x4a, 0x3f08(%rdi)
movl $0x50, %eax
jmp 0x13c5b6
movl $0x76, 0x3f08(%rdi)
movl $0x80, %eax
jmp 0x13c5b6
movl $0x56, 0x3f08(%rdi)
movl $0x5b, %eax
jmp 0x13c5b6
movl $0x96, 0x3f08(%rdi)
movl $0x9f, %eax
jmp 0x13c5b6
movl $0x6b, 0x3f08(%rdi)
movl $0x72, %eax
jmp 0x13c5b6
movl $0xab, 0x3f08(%rdi)
movl $0xb6, %eax
jmp 0x13c5b6
movl $0x2c, 0x3f08(%rdi)
movl $0x30, %eax
jmp 0x13c5b6
movl $0x58, 0x3f08(%rdi)
movl $0x60, %eax
jmp 0x13c5b6
cmpl $0x1000, %eax           # imm = 0x1000
movl $0x8b, %eax
movl $0xbb, %ecx
cmovel %eax, %ecx
movl %ecx, 0x3f08(%rdi)
movl $0x90, %ecx
movl $0xc0, %eax
jmp 0x13c5b3
cmpl $0x1000, %eax           # imm = 0x1000
movl $0xf3, %eax
movl $0x147, %ecx            # imm = 0x147
cmovel %eax, %ecx
movl %ecx, 0x3f08(%rdi)
movl $0xfc, %ecx
movl $0x150, %eax            # imm = 0x150
jmp 0x13c5b3
cmpl $0x1000, %eax           # imm = 0x1000
movl $0xae, %eax
movl $0xea, %ecx
cmovel %eax, %ecx
movl %ecx, 0x3f08(%rdi)
movl $0xb4, %ecx
movl $0xf0, %eax
jmp 0x13c5b3
cmpl $0x1000, %eax           # imm = 0x1000
movl $0x116, %eax            # imm = 0x116
movl $0x176, %ecx            # imm = 0x176
cmovel %eax, %ecx
movl %ecx, 0x3f08(%rdi)
movl $0x120, %ecx            # imm = 0x120
movl $0x180, %eax            # imm = 0x180
jmp 0x13c5b3
movl $0x40, 0x3f08(%rdi)
movl $0x44, %eax
jmp 0x13c5b6
movl $0x80, 0x3f08(%rdi)
movl $0x88, %eax
jmp 0x13c5b6
cmpl $0x1000, %eax           # imm = 0x1000
movl $0x68, %eax
movl $0x8c, %ecx
cmovel %eax, %ecx
movl %ecx, 0x3f08(%rdi)
movl $0x6c, %ecx
movl $0x90, %eax
jmp 0x13c5b3
cmpl $0x1000, %eax           # imm = 0x1000
movl $0xd0, %eax
movl $0x118, %ecx            # imm = 0x118
cmovel %eax, %ecx
movl %ecx, 0x3f08(%rdi)
movl $0xd8, %ecx
movl $0x120, %eax            # imm = 0x120
cmovel %ecx, %eax
movl %eax, 0x3f20(%rdi)
retq
pushq %rax
leaq 0xddd4(%rip), %rdi      # 0x14a399
leaq 0x20d79(%rip), %rsi     # 0x15d345
leaq 0x20d81(%rip), %rcx     # 0x15d354
movl $0x6b, %edx
callq 0xb200
nop