// File: /workspace/github_c_makefile_star2_O0/nh13[P]ksw/src/parasail/src/sw_striped_avx2_256_16.c
// Function: arr_store_si256
static inline void arr_store_si256(
        int *array,
        __m256i vH,
        int32_t t,
        int32_t seglen,
        int32_t d,
        int32_t dlen,
        int32_t bias)
{
    array[1LL*( 0*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH,  0) - bias;
    array[1LL*( 1*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH,  1) - bias;
    array[1LL*( 2*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH,  2) - bias;
    array[1LL*( 3*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH,  3) - bias;
    array[1LL*( 4*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH,  4) - bias;
    array[1LL*( 5*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH,  5) - bias;
    array[1LL*( 6*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH,  6) - bias;
    array[1LL*( 7*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH,  7) - bias;
    array[1LL*( 8*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH,  8) - bias;
    array[1LL*( 9*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH,  9) - bias;
    array[1LL*(10*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH, 10) - bias;
    array[1LL*(11*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH, 11) - bias;
    array[1LL*(12*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH, 12) - bias;
    array[1LL*(13*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH, 13) - bias;
    array[1LL*(14*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH, 14) - bias;
    array[1LL*(15*seglen+t)*dlen + d] = (int16_t)_mm256_extract_epi16_rpl(vH, 15) - bias;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x60, %rsp
movq %rdi, 0x48(%rsp)
vmovaps %ymm0, 0x20(%rsp)
movl %esi, 0x1c(%rsp)
movl %edx, 0x18(%rsp)
movl %ecx, 0x14(%rsp)
movl %r8d, 0x10(%rsp)
movl %r9d, 0xc(%rsp)
movswl 0x20(%rsp), %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movslq 0x1c(%rsp), %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x1, %xmm0, %eax
movswl %ax, %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x18(%rsp), %ecx
movl 0x1c(%rsp), %esi
addl %esi, %ecx
movslq %ecx, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x2, %xmm0, %eax
movswl %ax, %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x18(%rsp), %ecx
movl 0x1c(%rsp), %edi
movl %ecx, %esi
movl %edi, %ecx
leal (%rcx,%rsi,2), %ecx
movslq %ecx, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x3, %xmm0, %eax
movswl %ax, %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x18(%rsp), %esi
movl %esi, %ecx
leal (%rcx,%rcx,2), %ecx
movl 0x1c(%rsp), %esi
addl %esi, %ecx
movslq %ecx, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x4, %xmm0, %eax
movswl %ax, %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x18(%rsp), %ecx
movl 0x1c(%rsp), %edi
movl %ecx, %esi
movl %edi, %ecx
leal (%rcx,%rsi,4), %ecx
movslq %ecx, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x5, %xmm0, %eax
movswl %ax, %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x18(%rsp), %esi
movl %esi, %ecx
leal (%rcx,%rcx,4), %ecx
movl 0x1c(%rsp), %esi
addl %esi, %ecx
movslq %ecx, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x6, %xmm0, %eax
movswl %ax, %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x18(%rsp), %esi
movl %esi, %ecx
leal (%rcx,%rcx,2), %edi
movl 0x1c(%rsp), %esi
movl %esi, %ecx
movl %edi, %esi
leal (%rcx,%rsi,2), %ecx
movslq %ecx, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x7, %xmm0, %eax
movswl %ax, %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x18(%rsp), %esi
movl %esi, %ecx
shll $0x3, %ecx
subl %esi, %ecx
movl 0x1c(%rsp), %esi
addl %esi, %ecx
movslq %ecx, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movswl 0x30(%rsp), %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x18(%rsp), %ecx
movl 0x1c(%rsp), %edi
movl %ecx, %esi
movl %edi, %ecx
leal (%rcx,%rsi,8), %ecx
movslq %ecx, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x1, %xmm0, %eax
movswl %ax, %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x18(%rsp), %esi
movl %esi, %ecx
leal (%rcx,%rcx,8), %ecx
movl 0x1c(%rsp), %esi
addl %esi, %ecx
movslq %ecx, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x2, %xmm0, %eax
movswl %ax, %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x18(%rsp), %esi
movl %esi, %ecx
leal (%rcx,%rcx,4), %edi
movl 0x1c(%rsp), %esi
movl %esi, %ecx
movl %edi, %esi
leal (%rcx,%rsi,2), %ecx
movslq %ecx, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x3, %xmm0, %eax
movswl %ax, %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x18(%rsp), %esi
movl %esi, %ecx
leal (%rcx,%rcx,4), %edi
movl %edi, %esi
leal (%rcx,%rsi,2), %ecx
movl 0x1c(%rsp), %esi
addl %esi, %ecx
movslq %ecx, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x4, %xmm0, %eax
movswl %ax, %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x18(%rsp), %esi
movl %esi, %ecx
leal (%rcx,%rcx,2), %edi
movl 0x1c(%rsp), %esi
movl %esi, %ecx
movl %edi, %esi
leal (%rcx,%rsi,4), %ecx
movslq %ecx, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x5, %xmm0, %eax
movswl %ax, %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x18(%rsp), %esi
movl %esi, %ecx
leal (%rcx,%rcx,2), %edi
movl %edi, %esi
leal (%rcx,%rsi,4), %ecx
movl 0x1c(%rsp), %esi
addl %esi, %ecx
movslq %ecx, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x6, %xmm0, %eax
movswl %ax, %edx
movl 0xc(%rsp), %eax
subl %eax, %edx
movq 0x48(%rsp), %rax
movl 0x18(%rsp), %ecx
movl %ecx, %esi
addl %esi, %esi
shll $0x4, %ecx
subl %esi, %ecx
movl 0x1c(%rsp), %esi
addl %esi, %ecx
movslq %ecx, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x7, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
subl 0xc(%rsp), %edx
movq 0x48(%rsp), %rax
imull $0xf, 0x18(%rsp), %ecx
addl 0x1c(%rsp), %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movslq 0x14(%rsp), %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movq %rbp, %rsp
popq %rbp
vzeroupper
retq
nop