// File: /workspace/github_c_makefile_star2_O0/intel[P]pf-bb-config/bb_acc_common.c
// Function: acc_mem_read
int acc_mem_read(void *dev, int rwFlag, int regAddr, int wPayload)
{
	hw_device *device = (hw_device *)dev;
	uint32_t payload = 0x0;
	LOG(DEBUG, "rwFlag = %d, regAddr = 0x%x, wPayload = 0x%x\n",
			rwFlag, regAddr, wPayload);
	clear_log_resp_file(dev);
	/* Protection specific to VRB registers. */
	if (device->device_id == VRB1_DEVICE_ID) {
		if ((regAddr >= VRB1_QMGR_BA_START) && (regAddr < VRB1_QMGR_BA_END)) {
			LOG_RESP(ERR, "Invalid Address for VRB1 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
		if ((regAddr >= VRB1_ARAM_START) && (regAddr < VRB1_ARAM_END)) {
			LOG_RESP(ERR, "Invalid ARAM Address for VRB1 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
		if ((regAddr >= VRB1_QOS_A_START) && (regAddr < VRB1_QOS_A_END)) {
			LOG_RESP(ERR, "Invalid QoS A Address for VRB1 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
		if ((regAddr >= VRB1_QOS_B_START) && (regAddr < VRB1_QOS_B_END)) {
			LOG_RESP(ERR, "Invalid QoS B Address for VRB1 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
		if ((regAddr >= VRB1_QOS_C_START) && (regAddr < VRB1_QOS_C_END)) {
			LOG_RESP(ERR, "Invalid QoS C Address for VRB1 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
	}
	if (device->device_id == VRB2_DEVICE_ID) {
		if ((regAddr >= VRB2_QMGR_BA_START) && (regAddr < VRB2_QMGR_BA_END)) {
			LOG_RESP(ERR, "Invalid Address for VRB2 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
		if ((regAddr >= VRB2_ARAM_START) && (regAddr < VRB2_ARAM_END)) {
			LOG_RESP(ERR, "Invalid ARAM Address for VRB2 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
		if ((regAddr >= VRB2_MLD_START) && (regAddr < VRB2_MLD_END)) {
			LOG_RESP(ERR, "Invalid MLD Address for VRB2 0x%x", regAddr);
			LOG_RESP_END();
			return 0;
		}
	}

	/* Prevent 4B read outside of PF BAR. */
	if ((regAddr + 4) > device->bar_size) {
		LOG_RESP(ERR, "Invalid address range for PF BAR 0x%x", regAddr);
		LOG_RESP_END();
		return 0;
	}

	switch (rwFlag) {
	default:
	case MM_READ_REG_READ:
		payload = reg_read(device->bar0Addr, regAddr);
		LOG_RESP(INFO, "Read 0x%08X 0x%08X\n", regAddr, payload);
		break;
	case MM_READ_REG_WRITE:
		LOG_RESP(INFO, "Write 0x%08X 0x%08X\n", regAddr, wPayload);
		reg_write(device->bar0Addr, regAddr, wPayload);
		break;
	}
	LOG_RESP_END();
	return 0;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x50, %rsp
movq %rdi, -0x10(%rbp)
movl %esi, -0x14(%rbp)
movl %edx, -0x18(%rbp)
movl %ecx, -0x1c(%rbp)
movq -0x10(%rbp), %rax
movq %rax, -0x28(%rbp)
movl $0x0, -0x2c(%rbp)
callq 0x22e70
movq %rax, %rcx
leaq 0x191dd(%rip), %rax     # 0x3b8d0
movq 0x18(%rax), %r8
movl -0x14(%rbp), %r11d
movl -0x18(%rbp), %r10d
movl -0x1c(%rbp), %eax
movl $0x3, %edi
xorl %esi, %esi
leaq 0x13e82(%rip), %rdx     # 0x36592
leaq 0x13eb6(%rip), %r9      # 0x365cd
movl %r11d, (%rsp)
movl %r10d, 0x8(%rsp)
movl %eax, 0x10(%rsp)
movb $0x0, %al
callq 0x216e0
movq -0x10(%rbp), %rdi
callq 0x22260
movq -0x28(%rbp), %rax
cmpl $0x57c0, 0x1c(%rax)     # imm = 0x57C0
jne 0x2298b
cmpl $0xa01000, -0x18(%rbp)  # imm = 0xA01000
jl 0x227b9
cmpl $0xa02000, -0x18(%rbp)  # imm = 0xA02000
jge 0x227b9
callq 0x22e70
movq %rax, %rcx
leaq 0x1916a(%rip), %rax     # 0x3b8d0
movq (%rax), %r8
movl -0x18(%rbp), %r9d
xorl %edi, %edi
movl $0x1, %esi
leaq 0x13e5f(%rip), %rdx     # 0x365da
movb $0x0, %al
callq 0x216e0
callq 0x22e70
movq %rax, %rcx
leaq 0x1913f(%rip), %rax     # 0x3b8d0
movq 0x10(%rax), %r8
movl $0x2, %edi
movl $0x1, %esi
leaq 0x13dcf(%rip), %rdx     # 0x36575
movb $0x0, %al
callq 0x216e0
movl $0x0, -0x4(%rbp)
jmp 0x22c50
cmpl $0x818000, -0x18(%rbp)  # imm = 0x818000
jl 0x2282d
cmpl $0x820000, -0x18(%rbp)  # imm = 0x820000
jge 0x2282d
callq 0x22e70
movq %rax, %rcx
leaq 0x190f6(%rip), %rax     # 0x3b8d0
movq (%rax), %r8
movl -0x18(%rbp), %r9d
xorl %edi, %edi
movl $0x1, %esi
leaq 0x13e10(%rip), %rdx     # 0x365ff
movb $0x0, %al
callq 0x216e0
callq 0x22e70
movq %rax, %rcx
leaq 0x190cb(%rip), %rax     # 0x3b8d0
movq 0x10(%rax), %r8
movl $0x2, %edi
movl $0x1, %esi
leaq 0x13d5b(%rip), %rdx     # 0x36575
movb $0x0, %al
callq 0x216e0
movl $0x0, -0x4(%rbp)
jmp 0x22c50
cmpl $0xb900c0, -0x18(%rbp)  # imm = 0xB900C0
jl 0x228a1
cmpl $0xb900e0, -0x18(%rbp)  # imm = 0xB900E0
jge 0x228a1
callq 0x22e70
movq %rax, %rcx
leaq 0x19082(%rip), %rax     # 0x3b8d0
movq (%rax), %r8
movl -0x18(%rbp), %r9d
xorl %edi, %edi
movl $0x1, %esi
leaq 0x13dc6(%rip), %rdx     # 0x36629
movb $0x0, %al
callq 0x216e0
callq 0x22e70
movq %rax, %rcx
leaq 0x19057(%rip), %rax     # 0x3b8d0
movq 0x10(%rax), %r8
movl $0x2, %edi
movl $0x1, %esi
leaq 0x13ce7(%rip), %rdx     # 0x36575
movb $0x0, %al
callq 0x216e0
movl $0x0, -0x4(%rbp)
jmp 0x22c50
cmpl $0xba00c0, -0x18(%rbp)  # imm = 0xBA00C0
jl 0x22915
cmpl $0xba00e0, -0x18(%rbp)  # imm = 0xBA00E0
jge 0x22915
callq 0x22e70
movq %rax, %rcx
leaq 0x1900e(%rip), %rax     # 0x3b8d0
movq (%rax), %r8
movl -0x18(%rbp), %r9d
xorl %edi, %edi
movl $0x1, %esi
leaq 0x13d7d(%rip), %rdx     # 0x36654
movb $0x0, %al
callq 0x216e0
callq 0x22e70
movq %rax, %rcx
leaq 0x18fe3(%rip), %rax     # 0x3b8d0
movq 0x10(%rax), %r8
movl $0x2, %edi
movl $0x1, %esi
leaq 0x13c73(%rip), %rdx     # 0x36575
movb $0x0, %al
callq 0x216e0
movl $0x0, -0x4(%rbp)
jmp 0x22c50
cmpl $0xbb00c0, -0x18(%rbp)  # imm = 0xBB00C0
jl 0x22989
cmpl $0xbb00e0, -0x18(%rbp)  # imm = 0xBB00E0
jge 0x22989
callq 0x22e70
movq %rax, %rcx
leaq 0x18f9a(%rip), %rax     # 0x3b8d0
movq (%rax), %r8
movl -0x18(%rbp), %r9d
xorl %edi, %edi
movl $0x1, %esi
leaq 0x13d34(%rip), %rdx     # 0x3667f
movb $0x0, %al
callq 0x216e0
callq 0x22e70
movq %rax, %rcx
leaq 0x18f6f(%rip), %rax     # 0x3b8d0
movq 0x10(%rax), %r8
movl $0x2, %edi
movl $0x1, %esi
leaq 0x13bff(%rip), %rdx     # 0x36575
movb $0x0, %al
callq 0x216e0
movl $0x0, -0x4(%rbp)
jmp 0x22c50
jmp 0x2298b
movq -0x28(%rbp), %rax
cmpl $0x57c2, 0x1c(%rax)     # imm = 0x57C2
jne 0x22afa
cmpl $0xa08000, -0x18(%rbp)  # imm = 0xA08000
jl 0x22a10
cmpl $0xa0a000, -0x18(%rbp)  # imm = 0xA0A000
jge 0x22a10
callq 0x22e70
movq %rax, %rcx
leaq 0x18f13(%rip), %rax     # 0x3b8d0
movq (%rax), %r8
movl -0x18(%rbp), %r9d
xorl %edi, %edi
movl $0x1, %esi
leaq 0x13cd8(%rip), %rdx     # 0x366aa
movb $0x0, %al
callq 0x216e0
callq 0x22e70
movq %rax, %rcx
leaq 0x18ee8(%rip), %rax     # 0x3b8d0
movq 0x10(%rax), %r8
movl $0x2, %edi
movl $0x1, %esi
leaq 0x13b78(%rip), %rdx     # 0x36575
movb $0x0, %al
callq 0x216e0
movl $0x0, -0x4(%rbp)
jmp 0x22c50
cmpl $0x818000, -0x18(%rbp)  # imm = 0x818000
jl 0x22a84
cmpl $0x820000, -0x18(%rbp)  # imm = 0x820000
jge 0x22a84
callq 0x22e70
movq %rax, %rcx
leaq 0x18e9f(%rip), %rax     # 0x3b8d0
movq (%rax), %r8
movl -0x18(%rbp), %r9d
xorl %edi, %edi
movl $0x1, %esi
leaq 0x13c89(%rip), %rdx     # 0x366cf
movb $0x0, %al
callq 0x216e0
callq 0x22e70
movq %rax, %rcx
leaq 0x18e74(%rip), %rax     # 0x3b8d0
movq 0x10(%rax), %r8
movl $0x2, %edi
movl $0x1, %esi
leaq 0x13b04(%rip), %rdx     # 0x36575
movb $0x0, %al
callq 0x216e0
movl $0x0, -0x4(%rbp)
jmp 0x22c50
cmpl $0xb5e000, -0x18(%rbp)  # imm = 0xB5E000
jl 0x22af8
cmpl $0xb60000, -0x18(%rbp)  # imm = 0xB60000
jge 0x22af8
callq 0x22e70
movq %rax, %rcx
leaq 0x18e2b(%rip), %rax     # 0x3b8d0
movq (%rax), %r8
movl -0x18(%rbp), %r9d
xorl %edi, %edi
movl $0x1, %esi
leaq 0x13c3f(%rip), %rdx     # 0x366f9
movb $0x0, %al
callq 0x216e0
callq 0x22e70
movq %rax, %rcx
leaq 0x18e00(%rip), %rax     # 0x3b8d0
movq 0x10(%rax), %r8
movl $0x2, %edi
movl $0x1, %esi
leaq 0x13a90(%rip), %rdx     # 0x36575
movb $0x0, %al
callq 0x216e0
movl $0x0, -0x4(%rbp)
jmp 0x22c50
jmp 0x22afa
movl -0x18(%rbp), %eax
addl $0x4, %eax
movq -0x28(%rbp), %rcx
cmpl 0xb8(%rcx), %eax
jbe 0x22b6e
callq 0x22e70
movq %rax, %rcx
leaq 0x18db5(%rip), %rax     # 0x3b8d0
movq (%rax), %r8
movl -0x18(%rbp), %r9d
xorl %edi, %edi
movl $0x1, %esi
leaq 0x13bf2(%rip), %rdx     # 0x36722
movb $0x0, %al
callq 0x216e0
callq 0x22e70
movq %rax, %rcx
leaq 0x18d8a(%rip), %rax     # 0x3b8d0
movq 0x10(%rax), %r8
movl $0x2, %edi
movl $0x1, %esi
leaq 0x13a1a(%rip), %rdx     # 0x36575
movb $0x0, %al
callq 0x216e0
movl $0x0, -0x4(%rbp)
jmp 0x22c50
movl -0x14(%rbp), %eax
movl %eax, -0x30(%rbp)
testl %eax, %eax
je 0x22b86
jmp 0x22b7a
movl -0x30(%rbp), %eax
subl $0x1, %eax
je 0x22bd3
jmp 0x22b84
jmp 0x22b86
movq -0x28(%rbp), %rax
movq 0xb0(%rax), %rdi
movl -0x18(%rbp), %esi
callq 0x223d0
movl %eax, -0x2c(%rbp)
callq 0x22e70
movq %rax, %rcx
leaq 0x18d25(%rip), %rax     # 0x3b8d0
movq 0x10(%rax), %r8
movl -0x18(%rbp), %r9d
movl -0x2c(%rbp), %eax
movl $0x2, %edi
movl $0x1, %esi
leaq 0x13b88(%rip), %rdx     # 0x3674f
movl %eax, (%rsp)
movb $0x0, %al
callq 0x216e0
jmp 0x22c1e
callq 0x22e70
movq %rax, %rcx
leaq 0x18cee(%rip), %rax     # 0x3b8d0
movq 0x10(%rax), %r8
movl -0x18(%rbp), %r9d
movl -0x1c(%rbp), %eax
movl $0x2, %edi
movl $0x1, %esi
leaq 0x13b6c(%rip), %rdx     # 0x3676a
movl %eax, (%rsp)
movb $0x0, %al
callq 0x216e0
movq -0x28(%rbp), %rax
movq 0xb0(%rax), %rdi
movl -0x18(%rbp), %esi
movl -0x1c(%rbp), %edx
callq 0x22c60
callq 0x22e70
movq %rax, %rcx
leaq 0x18ca3(%rip), %rax     # 0x3b8d0
movq 0x10(%rax), %r8
movl $0x2, %edi
movl $0x1, %esi
leaq 0x13933(%rip), %rdx     # 0x36575
movb $0x0, %al
callq 0x216e0
movl $0x0, -0x4(%rbp)
movl -0x4(%rbp), %eax
addq $0x50, %rsp
popq %rbp
retq
nopl (%rax)