// File: NishadSaraf[P]Championship-Simulator/src/ooo_cpu.cc
// Function: O3_CPU::handle_o3_fetch(PACKET*, unsigned int)
void O3_CPU::handle_o3_fetch(PACKET *current_packet, uint32_t cache_type)
{
    uint32_t rob_index = current_packet->rob_index,
             sq_index  = current_packet->sq_index,
             lq_index  = current_packet->lq_index;

    // update ROB entry
    if (cache_type == 0) { // DTLB

#ifdef SANITY_CHECK
        if (rob_index != check_rob(current_packet->instr_id))
            assert(0);
#endif
        if (current_packet->type == RFO) {
            SQ.entry[sq_index].physical_address = (current_packet->data_pa << PAGE_SHIFT) | (SQ.entry[sq_index].virtual_address & ((1 << PAGE_SHIFT) - 1)); // translated address
            SQ.entry[sq_index].translated = COMPLETED;

            RTS1[RTS1_tail] = sq_index;
            RTS1_tail++;
            if (RTS1_tail == SQ_SIZE)
                RTS1_tail = 0;

            DP (if (warmup_complete[cpu]) {
            cout << "[ROB] " << __func__ << " RFO instr_id: " << SQ.entry[sq_index].instr_id;
            cout << " DTLB_FETCH_DONE translation: " << +SQ.entry[sq_index].translated << hex << " page: " << (SQ.entry[sq_index].physical_address>>LOG2_PAGE_SIZE);
            cout << " full_addr: " << SQ.entry[sq_index].physical_address << dec << " store_merged: " << +current_packet->store_merged;
            cout << " load_merged: " << +current_packet->load_merged << endl; }); 

            handle_merged_translation(current_packet);
        }
        else { 
            LQ.entry[lq_index].physical_address = (current_packet->data_pa << PAGE_SHIFT) | (LQ.entry[lq_index].virtual_address & ((1 << PAGE_SHIFT) - 1)); // translated address
            LQ.entry[lq_index].translated = COMPLETED;

            RTL1[RTL1_tail] = lq_index;
            RTL1_tail++;
            if (RTL1_tail == LQ_SIZE)
                RTL1_tail = 0;

            DP (if (warmup_complete[cpu]) {
            cout << "[RTL1] " << __func__ << " instr_id: " << LQ.entry[lq_index].instr_id << " rob_index: " << LQ.entry[lq_index].rob_index << " is added to RTL1";
            cout << " head: " << RTL1_head << " tail: " << RTL1_tail << endl; }); 

            DP (if (warmup_complete[cpu]) {
            cout << "[ROB] " << __func__ << " load instr_id: " << LQ.entry[lq_index].instr_id;
            cout << " DTLB_FETCH_DONE translation: " << +LQ.entry[lq_index].translated << hex << " page: " << (LQ.entry[lq_index].physical_address>>LOG2_PAGE_SIZE);
            cout << " full_addr: " << LQ.entry[lq_index].physical_address << dec << " store_merged: " << +current_packet->store_merged;
            cout << " load_merged: " << +current_packet->load_merged << endl; }); 

            handle_merged_translation(current_packet);
        }

        ROB.entry[rob_index].event_cycle = current_packet->event_cycle;
    }
    else { // L1D

        if (current_packet->type == RFO)
            handle_merged_load(current_packet);
        else { // do traditional things
#ifdef SANITY_CHECK
            if (rob_index != check_rob(current_packet->instr_id))
                assert(0);

            if (current_packet->store_merged)
                assert(0);
#endif
            LQ.entry[lq_index].fetched = COMPLETED;
            ROB.entry[rob_index].num_mem_ops--;

#ifdef SANITY_CHECK
            if (ROB.entry[rob_index].num_mem_ops < 0) {
                cerr << "instr_id: " << ROB.entry[rob_index].instr_id << endl;
                assert(0);
            }
#endif
            if (ROB.entry[rob_index].num_mem_ops == 0)
                inflight_mem_executions++;

            DP (if (warmup_complete[cpu]) {
            cout << "[ROB] " << __func__ << " load instr_id: " << LQ.entry[lq_index].instr_id;
            cout << " L1D_FETCH_DONE fetched: " << +LQ.entry[lq_index].fetched << hex << " address: " << (LQ.entry[lq_index].physical_address>>LOG2_BLOCK_SIZE);
            cout << " full_addr: " << LQ.entry[lq_index].physical_address << dec << " remain_mem_ops: " << ROB.entry[rob_index].num_mem_ops;
            cout << " load_merged: " << +current_packet->load_merged << " inflight_mem: " << inflight_mem_executions << endl; }); 

            release_load_queue(lq_index);

            handle_merged_load(current_packet);

            ROB.entry[rob_index].event_cycle = current_packet->event_cycle;
        }
    }
}

// Assembly:
subq $0x38, %rsp
movq %rdi, 0x30(%rsp)
movq %rsi, 0x28(%rsp)
movl %edx, 0x24(%rsp)
movq 0x30(%rsp), %rax
movq %rax, 0x10(%rsp)
movq 0x28(%rsp), %rax
movl 0x10(%rax), %eax
movl %eax, 0x20(%rsp)
movq 0x28(%rsp), %rax
movl 0x33c(%rax), %eax
movl %eax, 0x1c(%rsp)
movq 0x28(%rsp), %rax
movl 0x338(%rax), %eax
movl %eax, 0x18(%rsp)
cmpl $0x0, 0x24(%rsp)
jne 0x1b0f3
movq 0x10(%rsp), %rdi
movl 0x20(%rsp), %eax
movl %eax, 0xc(%rsp)
movq 0x28(%rsp), %rax
movq 0x368(%rax), %rsi
callq 0x15e60
movl %eax, %ecx
movl 0xc(%rsp), %eax
cmpl %ecx, %eax
je 0x1af48
leaq 0x80d4(%rip), %rdi      # 0x23004
leaq 0x8c7e(%rip), %rsi      # 0x23bb5
movl $0x67e, %edx            # imm = 0x67E
leaq 0x8f84(%rip), %rcx      # 0x23ec7
callq 0x3160
movq 0x28(%rsp), %rax
movzbl 0x32f(%rax), %eax
cmpl $0x1, %eax
jne 0x1b013
movq 0x10(%rsp), %rax
movq 0x28(%rsp), %rcx
movq 0x358(%rcx), %rdx
shlq $0xc, %rdx
movq 0xa28(%rax), %rcx
movl 0x1c(%rsp), %esi
imulq $0x140, %rsi, %rsi      # imm = 0x140
addq %rsi, %rcx
movq 0x10(%rcx), %rcx
andq $0xfff, %rcx            # imm = 0xFFF
orq %rcx, %rdx
movq 0xa28(%rax), %rcx
movl 0x1c(%rsp), %esi
imulq $0x140, %rsi, %rsi      # imm = 0x140
addq %rsi, %rcx
movq %rdx, 0x18(%rcx)
movq 0xa28(%rax), %rcx
movl 0x1c(%rsp), %edx
imulq $0x140, %rdx, %rdx      # imm = 0x140
addq %rdx, %rcx
movb $0x2, 0x3c(%rcx)
movl 0x1c(%rsp), %edx
movl 0x366c(%rax), %ecx
movl %edx, 0x3588(%rax,%rcx,4)
movl 0x366c(%rax), %ecx
addl $0x1, %ecx
movl %ecx, 0x366c(%rax)
cmpl $0x38, 0x366c(%rax)
jne 0x1afff
movq 0x10(%rsp), %rax
movl $0x0, 0x366c(%rax)
movq 0x10(%rsp), %rdi
movq 0x28(%rsp), %rsi
callq 0x1aa50
jmp 0x1b0c4
movq 0x10(%rsp), %rax
movq 0x28(%rsp), %rcx
movq 0x358(%rcx), %rdx
shlq $0xc, %rdx
movq 0x9f0(%rax), %rcx
movl 0x18(%rsp), %esi
imulq $0x140, %rsi, %rsi      # imm = 0x140
addq %rsi, %rcx
movq 0x10(%rcx), %rcx
andq $0xfff, %rcx            # imm = 0xFFF
orq %rcx, %rdx
movq 0x9f0(%rax), %rcx
movl 0x18(%rsp), %esi
imulq $0x140, %rsi, %rsi      # imm = 0x140
addq %rsi, %rcx
movq %rdx, 0x18(%rcx)
movq 0x9f0(%rax), %rcx
movl 0x18(%rsp), %edx
imulq $0x140, %rdx, %rdx      # imm = 0x140
addq %rdx, %rcx
movb $0x2, 0x3c(%rcx)
movl 0x18(%rsp), %edx
movl 0x349c(%rax), %ecx
movl %edx, 0x3378(%rax,%rcx,4)
movl 0x349c(%rax), %ecx
addl $0x1, %ecx
movl %ecx, 0x349c(%rax)
cmpl $0x48, 0x349c(%rax)
jne 0x1b0b5
movq 0x10(%rsp), %rax
movl $0x0, 0x349c(%rax)
movq 0x10(%rsp), %rdi
movq 0x28(%rsp), %rsi
callq 0x1aa50
movq 0x10(%rsp), %rax
movq 0x28(%rsp), %rcx
movq 0x378(%rcx), %rcx
movq 0x9b8(%rax), %rax
movl 0x20(%rsp), %edx
imulq $0x758, %rdx, %rdx      # imm = 0x758
addq %rdx, %rax
movq %rcx, 0x40(%rax)
jmp 0x1b2c6
movq 0x28(%rsp), %rax
movzbl 0x32f(%rax), %eax
cmpl $0x1, %eax
jne 0x1b118
movq 0x10(%rsp), %rdi
movq 0x28(%rsp), %rsi
callq 0x1acc0
jmp 0x1b2c4
movq 0x10(%rsp), %rdi
movl 0x20(%rsp), %eax
movl %eax, 0x8(%rsp)
movq 0x28(%rsp), %rax
movq 0x368(%rax), %rsi
callq 0x15e60
movl %eax, %ecx
movl 0x8(%rsp), %eax
cmpl %ecx, %eax
je 0x1b15f
leaq 0x7ebd(%rip), %rdi      # 0x23004
leaq 0x8a67(%rip), %rsi      # 0x23bb5
movl $0x6b0, %edx            # imm = 0x6B0
leaq 0x8d6d(%rip), %rcx      # 0x23ec7
callq 0x3160
movq 0x28(%rsp), %rax
cmpb $0x0, 0x32b(%rax)
je 0x1b18c
leaq 0x7e90(%rip), %rdi      # 0x23004
leaq 0x8a3a(%rip), %rsi      # 0x23bb5
movl $0x6b3, %edx            # imm = 0x6B3
leaq 0x8d40(%rip), %rcx      # 0x23ec7
callq 0x3160
movq 0x10(%rsp), %rax
movq 0x9f0(%rax), %rcx
movl 0x18(%rsp), %edx
imulq $0x140, %rdx, %rdx      # imm = 0x140
addq %rdx, %rcx
movb $0x2, 0x3d(%rcx)
movq 0x9b8(%rax), %rcx
movl 0x20(%rsp), %edx
imulq $0x758, %rdx, %rdx      # imm = 0x758
addq %rdx, %rcx
movl 0x70(%rcx), %edx
addl $-0x1, %edx
movl %edx, 0x70(%rcx)
movq 0x9b8(%rax), %rax
movl 0x20(%rsp), %ecx
imulq $0x758, %rcx, %rcx      # imm = 0x758
addq %rcx, %rax
cmpl $0x0, 0x70(%rax)
jge 0x1b249
movq 0xde06(%rip), %rdi      # 0x28ff0
leaq 0x8c2f(%rip), %rsi      # 0x23e20
callq 0x3220
movq %rax, %rdi
movq 0x10(%rsp), %rax
movq 0x9b8(%rax), %rax
movl 0x20(%rsp), %ecx
imulq $0x758, %rcx, %rcx      # imm = 0x758
addq %rcx, %rax
movq (%rax), %rsi
callq 0x3080
movq %rax, %rdi
movq 0xdd93(%rip), %rsi      # 0x28fb8
callq 0x3250
leaq 0x7dd3(%rip), %rdi      # 0x23004
leaq 0x897d(%rip), %rsi      # 0x23bb5
movl $0x6bb, %edx            # imm = 0x6BB
leaq 0x8c83(%rip), %rcx      # 0x23ec7
callq 0x3160
movq 0x10(%rsp), %rax
movq 0x9b8(%rax), %rax
movl 0x20(%rsp), %ecx
imulq $0x758, %rcx, %rcx      # imm = 0x758
addq %rcx, %rax
cmpl $0x0, 0x70(%rax)
jne 0x1b27d
movq 0x10(%rsp), %rax
movl 0x924(%rax), %ecx
addl $0x1, %ecx
movl %ecx, 0x924(%rax)
movq 0x10(%rsp), %rdi
movl 0x18(%rsp), %esi
callq 0x191c0
movq 0x10(%rsp), %rdi
movq 0x28(%rsp), %rsi
callq 0x1acc0
movq 0x10(%rsp), %rax
movq 0x28(%rsp), %rcx
movq 0x378(%rcx), %rcx
movq 0x9b8(%rax), %rax
movl 0x20(%rsp), %edx
imulq $0x758, %rdx, %rdx      # imm = 0x758
addq %rdx, %rax
movq %rcx, 0x40(%rax)
jmp 0x1b2c6
addq $0x38, %rsp
retq
nopl (%rax,%rax)