// File: /workspace/github_cpp_makefile_star2_O3/jkingan[P]ladyheather/heathgps.cpp
// Function: x72_discipline_state()
void x72_discipline_state()
{
static int change_count;
double slope;
int val;
int i1, i2;
int flag;
double x;
double dds_change;

   // discipline the output frequency 

   if(pps_enabled == 0) {  // should never happen
      x72_start_discipline();
      return;
   }
   if(x72_tc_val <= 0) {
      x72_tc_val = X72_TIME_CONST;
       x72_reset_filter();
   }
   if(x72_jamthresh_val > X72_JAMSYNC_THRESH) x72_jamthresh_val = X72_JAMSYNC_THRESH;
   if(x72_jamthresh_val <= 0) x72_jamthresh_val = X72_JAMSYNC_THRESH;

   val = x72_pps;
   val = fix_x72_tics(val);
if(show_debug_info) sprintf(debug_text, "disciplining!  interval:%d   ival:%d  last:%d  sum:%d mcv:%g   dds:%g   x72_pps:%d -> %d   ppo:%g", x72_pps_interval, x72_ival,last_ival,x72_dis_sum,x72_pps_stats(0),  last_x72_dds, x72_pps, val, pps_offset);
   val = IABS(val);

   if((val > (int) (x72_jamthresh_val*1.0E-9*x72_osc))) {  // PPS is off by a large amount, do an immediate jamsync
if(show_debug_info) sprintf(debug_text5, "disipline holdover pps limit!!! %d", x72_pps);
      x72_start_discipline();
// !!!!!!!! if DDS is too far off and drift exceeds this rate, we'll never start disciplining
//x72_pps_stats(0);
//slope = x72_pps_trend;
//slope /= (double) x72_pps_interval;
//goto jamit_damnit;
      return;
   }

   if(x72_pps_interval == 0) last_dis_ival = x72_ival;
   i1 = fix_x72_tics(x72_ival);           // fixup possible wrap near 0
   i2 = fix_x72_tics(last_dis_ival);
   last_dis_ival = x72_ival;

   x72_update_pps_list(i1);      // add fixed up ival to pps list

   x72_dis_sum += (i1 - i2);     // accumulate difference between the last two PPS values
   if(IABS(x72_dis_sum) >= 2) ++x72_sum_sum;   // error sum exceeds threshold, see for how long
   else                       x72_sum_sum = 0; // error sum is back in allowed range

   flag = 0;
#define FORCE_TIC 3  // 3 -> 50 ns   was 6
   if((IABS(x72_dis_sum) >= FORCE_TIC) && (x72_pps_interval >= (LONG_INTERVAL*2))) {   // was *1
      flag = 1;   // accumulated PPS error is large over a long interval
   }
   else if(1 && (IABS(x72_dis_sum) >= (FORCE_TIC*3))) {  // was *2 - bigger error triggers an immediate DDS change
      flag = 2;
   }

   if(IABS(x72_sum_sum) >= 5) {  // PPS is off by 2 or more tics for over 5 consecutive seconds
      if((x72_pps_interval >= x72_tc_val) || (flag == 2)) { // we have enough data to evaluate
         x = x72_pps_stats(1);
         if(x || flag) { // PPS most common value is not zero or large PPS error
            // update DDS based on the interval average PPS error
            if(1 && (x72_pps_interval < LONG_INTERVAL)) { // qwerty drift rate is a bit large, scale average value betwen 1.0 and 2.0 times the average
               slope = x72_pps_avg * (1.0 + (((double) (x72_pps_interval - x72_tc_val)) / (2.0*(double) x72_tc_val)) );
            }
            else {  // very slow drift rate
               slope = x72_pps_trend;
            }
            slope /= (double) x72_pps_interval;
         }
         else slope = 0.0;

//jamit_damnit:
         if(slope) {  // adjust the DDS frequency to cancel the average PPS drift during the interval
            slope /= (double) x72_osc;
            last_interval_dds = interval_start_dds;
            interval_start_dds = last_x72_dds + slope;
interval_start_dds = x72_avg_dds(interval_start_dds);
            ++change_count;
            dds_change = interval_start_dds-last_x72_dds;
if(show_debug_info) {
   BEEP(516);
   sprintf(plot_title, "New dds %d!  %g olddds:%g  change:%g  interval:%d  ival:%d  lastiv:%d  sum:%d  mcv:%g  avg:%g  flag:%d", change_count, interval_start_dds,last_x72_dds,dds_change, x72_pps_interval, x72_ival, last_dis_ival, x72_dis_sum, x72_pps_stats(0), x72_pps_avg, flag);
   mark_q_entry[9] = plot_q_in;
}
if(debug_file) fprintf(debug_file, "New dds %d!  %g olddds:%g  change:%g  interval:%d  ival:%d  lastiv:%d  sum:%d mcv:%g  avg:%g  flag:%d\n", change_count,interval_start_dds,last_x72_dds,dds_change, x72_pps_interval, x72_ival, last_dis_ival, x72_dis_sum, x72_pps_stats(0), x72_pps_avg, flag);

            set_x72_dds(interval_start_dds);
            have_x72_pps = 0;
            last_dis_ival = x72_ival;
            new_x72_interval(3);

            update_x72_tic(last_x72_pps, 3);  // re-align PPS out to PPS in
            x72_jamsync_ticks = 0;   // we just changed the TIC register to move the PPS output
            x72_jamsync_flag = 0;    // now wait for the change to take effect
            x72_user_state = X72_STATE_JAM2;
         }
      }
   }
   else {  // PID is not currently used
//      update_x72_pid();
   }
update_x72_pid();

   return;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
leaq 0x24c24b(%rip), %rax    # 0x30dd20
cmpb $0x0, (%rax)
je 0xc1c58
leaq 0x15931f(%rip), %rax    # 0x21ae04
cmpl $0x0, (%rax)
jg 0xc1b1c
movl $0x190, (%rax)          # imm = 0x190
leaq 0x159431(%rip), %rax    # 0x21af28
xorl %ecx, %ecx
movl %ecx, (%rax)
movq %rcx, 0x2b4c2e(%rip)    # 0x376730
movl %ecx, 0x2b8228(%rip)    # 0x379d30
movl %ecx, 0x2b8226(%rip)    # 0x379d34
movq %rcx, 0x2b8213(%rip)    # 0x379d28
movq %rcx, 0x2b821c(%rip)    # 0x379d38
leaq 0x1592fd(%rip), %rcx    # 0x21ae20
movsd (%rcx), %xmm1
ucomisd 0x49df9(%rip), %xmm1    # 0x10b928
ja 0xc1b3b
xorpd %xmm0, %xmm0
ucomisd %xmm1, %xmm0
jb 0xc1b50
movabsq $0x4072c00000000000, %rax # imm = 0x4072C00000000000
movq %rax, (%rcx)
movsd 0x49dd8(%rip), %xmm1    # 0x10b928
leaq 0x1592a5(%rip), %rdi    # 0x21adfc
movl (%rdi), %r13d
leaq 0x159107(%rip), %rbx    # 0x21ac68
movsd (%rbx), %xmm0
cvttsd2si %xmm0, %eax
movl %eax, %ecx
shrl $0x1f, %ecx
addl %eax, %ecx
sarl %ecx
xorl %edx, %edx
cmpl %r13d, %ecx
cmovll %eax, %edx
subl %edx, %r13d
leaq 0x156d40(%rip), %rax    # 0x2188c4
cmpb $0x0, (%rax)
je 0xc1c18
leaq 0x159390(%rip), %rax    # 0x21af24
movl (%rax), %ebx
leaq 0x15939f(%rip), %rax    # 0x21af3c
movl (%rax), %r14d
movl 0x2b02f9(%rip), %r15d   # 0x371ea0
movl 0x2b4a86(%rip), %r12d   # 0x376634
callq 0xc13ab
leaq 0x159326(%rip), %rax    # 0x21aee0
movsd (%rax), %xmm1
leaq 0x159237(%rip), %rax    # 0x21adfc
movl (%rax), %r10d
leaq 0x24abe9(%rip), %rax    # 0x30c7b8
movsd (%rax), %xmm2
leaq 0x27cdc6(%rip), %rdi    # 0x33e9a0
leaq 0x6915d(%rip), %rsi     # 0x12ad3e
movl %ebx, %edx
leaq 0x15907e(%rip), %rbx    # 0x21ac68
movl %r14d, %ecx
movl %r15d, %r8d
movl %r12d, %r9d
movb $0x3, %al
pushq %r13
pushq %r10
callq 0x9060
leaq 0x1591f7(%rip), %rdi    # 0x21adfc
addq $0x10, %rsp
leaq 0x159210(%rip), %rax    # 0x21ae20
movsd (%rax), %xmm1
movsd (%rbx), %xmm0
movl %r13d, %eax
negl %eax
cmovsl %r13d, %eax
mulsd 0x4751f(%rip), %xmm1    # 0x109148
mulsd %xmm0, %xmm1
cvttsd2si %xmm1, %ecx
cmpl %ecx, %eax
jle 0xc1c6b
leaq 0x156c88(%rip), %rax    # 0x2188c4
cmpb $0x0, (%rax)
je 0xc1c58
movl (%rdi), %edx
leaq 0x27d296(%rip), %rdi    # 0x33eee0
leaq 0x6914f(%rip), %rsi     # 0x12ada0
xorl %eax, %eax
callq 0x9060
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x8fd22
movq %rbx, %r13
leaq 0x1592af(%rip), %r12    # 0x21af24
xorl %r15d, %r15d
leaq 0x1592bd(%rip), %rax    # 0x21af3c
movl (%rax), %eax
movl %eax, %ecx
cmpl %r15d, (%r12)
je 0xc1c8f
movl 0x2b0215(%rip), %ecx    # 0x371ea4
cvttsd2si %xmm0, %r14d
movl %r14d, %edx
shrl $0x1f, %edx
addl %r14d, %edx
sarl %edx
cmpl %eax, %edx
movl $0x0, %esi
cmovll %r14d, %esi
movl %eax, %ebx
subl %esi, %ebx
cmpl %ecx, %edx
cmovgel %r15d, %r14d
subl %ecx, %r14d
movl %eax, 0x2b01e7(%rip)    # 0x371ea4
movl %ebx, %edi
callq 0xc1674
addl %ebx, %r14d
addl 0x2b4966(%rip), %r14d   # 0x376634
movl %r14d, %edx
negl %edx
cmovsl %r14d, %edx
movl 0x2b495b(%rip), %eax    # 0x376638
incl %eax
cmpl $0x2, %edx
cmovbl %r15d, %eax
movl %r14d, 0x2b4947(%rip)   # 0x376634
movl %eax, 0x2b4945(%rip)    # 0x376638
seta %sil
movl (%r12), %ecx
cmpl $0x960, %ecx            # imm = 0x960
setge %dil
testb %dil, %sil
je 0xc1d12
movl $0x1, %r14d
jmp 0xc1d2e
xorl %r15d, %r15d
movl $0x0, %ebx
movl $0x0, %r14d
cmpl $0x9, %edx
jb 0xc1d30
movl $0x2, %r14d
movb $0x1, %r15b
movb $0x1, %bl
movl %eax, %edx
negl %edx
cmovsl %eax, %edx
cmpl $0x5, %edx
jb 0xc1fe2
leaq 0x1590bd(%rip), %rax    # 0x21ae04
cmpl (%rax), %ecx
setl %al
notb %r15b
testb %al, %r15b
jne 0xc1fe2
callq 0xc13ab
xorpd %xmm1, %xmm1
ucomisd %xmm1, %xmm0
setnp %al
sete %cl
andb %al, %cl
notb %bl
testb %cl, %bl
jne 0xc1fe2
movl (%r12), %eax
cmpl $0x4af, %eax            # imm = 0x4AF
jg 0xc1db7
leaq 0x15907b(%rip), %rcx    # 0x21ae04
movl (%rcx), %ecx
movl %eax, %edx
subl %ecx, %edx
xorps %xmm0, %xmm0
cvtsi2sd %edx, %xmm0
xorps %xmm1, %xmm1
cvtsi2sd %ecx, %xmm1
addsd %xmm1, %xmm1
divsd %xmm1, %xmm0
addsd 0x472c3(%rip), %xmm0    # 0x109070
mulsd 0x2b488b(%rip), %xmm0   # 0x376640
jmp 0xc1dc2
leaq 0x159172(%rip), %rcx    # 0x21af30
movsd (%rcx), %xmm0
xorps %xmm1, %xmm1
cvtsi2sd %eax, %xmm1
divsd %xmm1, %xmm0
xorpd %xmm1, %xmm1
ucomisd %xmm1, %xmm0
jne 0xc1ddd
jnp 0xc1fe2
divsd (%r13), %xmm0
movsd 0x2b485d(%rip), %xmm1   # 0x376648
movsd %xmm1, 0x2b485d(%rip)   # 0x376650
leaq 0x1590e6(%rip), %r15    # 0x21aee0
addsd (%r15), %xmm0
movsd %xmm0, 0x2b4841(%rip)   # 0x376648
callq 0xc1507
movsd %xmm0, 0x2b4834(%rip)   # 0x376648
incl 0x2b7f32(%rip)          # 0x379d4c
movapd %xmm0, %xmm1
subsd (%r15), %xmm1
leaq 0x156a9a(%rip), %rax    # 0x2188c4
cmpb $0x0, (%rax)
movsd %xmm1, -0x50(%rbp)
je 0xc1ef0
movl $0x204, %edi            # imm = 0x204
callq 0x9d78
movl 0x2b7f04(%rip), %ebx    # 0x379d4c
movsd 0x2b47f8(%rip), %xmm0   # 0x376648
movsd %xmm0, -0x40(%rbp)
movsd (%r15), %xmm0
movsd %xmm0, -0x38(%rbp)
movl (%r12), %eax
movl %eax, -0x30(%rbp)
leaq 0x1590cf(%rip), %r13    # 0x21af3c
movq %r13, %r15
movl (%r13), %r13d
movl 0x2b002a(%rip), %eax    # 0x371ea4
movl %eax, -0x2c(%rbp)
movl 0x2b47b1(%rip), %eax    # 0x376634
movq %rax, -0x48(%rbp)
callq 0xc13ab
movapd %xmm0, %xmm3
movsd 0x2b47a8(%rip), %xmm4   # 0x376640
leaq 0x27c9b1(%rip), %rdi    # 0x33e850
leaq 0x68f1d(%rip), %rsi     # 0x12adc3
movl %ebx, %edx
movsd -0x40(%rbp), %xmm0
movsd -0x38(%rbp), %xmm1
movsd -0x50(%rbp), %xmm2
movl -0x30(%rbp), %ecx
movl %r13d, %r8d
movl -0x2c(%rbp), %r9d
movb $0x5, %al
pushq %r14
pushq -0x48(%rbp)
callq 0x9060
addq $0x10, %rsp
leaq 0x159450(%rip), %rax    # 0x21b328
movq (%rax), %rax
leaq 0x1593ce(%rip), %rcx    # 0x21b2b0
movq %rax, 0x48(%rcx)
movsd 0x2b475a(%rip), %xmm0   # 0x376648
jmp 0xc1ef7
leaq 0x159045(%rip), %r15    # 0x21af3c
leaq 0x17c492(%rip), %rax    # 0x23e390
movq (%rax), %rbx
testq %rbx, %rbx
je 0xc1f92
movl 0x2b7e3b(%rip), %r13d   # 0x379d4c
leaq 0x158fc8(%rip), %rax    # 0x21aee0
movsd (%rax), %xmm1
movsd %xmm1, -0x40(%rbp)
movl (%r12), %eax
movl %eax, -0x30(%rbp)
movl (%r15), %r12d
movl 0x2aff73(%rip), %eax    # 0x371ea4
movl %eax, -0x2c(%rbp)
movl 0x2b46fa(%rip), %eax    # 0x376634
movq %rax, -0x48(%rbp)
movsd %xmm0, -0x38(%rbp)
callq 0xc13ab
movapd %xmm0, %xmm3
movsd 0x2b46ec(%rip), %xmm4   # 0x376640
leaq 0x68ecf(%rip), %rsi     # 0x12ae2a
movq %rbx, %rdi
movl %r13d, %edx
movsd -0x38(%rbp), %xmm0
movsd -0x40(%rbp), %xmm1
movsd -0x50(%rbp), %xmm2
movl -0x30(%rbp), %ecx
movl %r12d, %r8d
movl -0x2c(%rbp), %r9d
movb $0x5, %al
pushq %r14
pushq -0x48(%rbp)
callq 0x9560
addq $0x10, %rsp
movsd 0x2b46b6(%rip), %xmm0   # 0x376648
callq 0x70fb0
leaq 0x158d32(%rip), %rax    # 0x21acd0
xorl %ebx, %ebx
movl %ebx, (%rax)
movl (%r15), %eax
movl %eax, 0x2afef9(%rip)    # 0x371ea4
movl $0x3, %edi
callq 0xc15e1
movl 0x2aac2d(%rip), %edi    # 0x36cbe8
incl 0x2b7d7f(%rip)          # 0x379d40
callq 0x8fbce
movl %ebx, 0x2b4690(%rip)    # 0x37665c
movl %ebx, 0x2b465a(%rip)    # 0x37662c
movl %ebx, 0x2b4650(%rip)    # 0x376628
movl $0x5, 0x2aac02(%rip)    # 0x36cbe4
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
nopl (%rax)