// File: /workspace/github_cpp_makefile_star2_O1/gulshan216[P]Perceptron_Based_Reuse_Prediction/cache.cc
// Function: cache_access(cache*, unsigned long long, unsigned long long, unsigned int, int, unsigned int, unsigned long long*)
bool cache_access (cache *c, unsigned long long int address, unsigned long long int pc, unsigned int size, int op, unsigned int core, unsigned long long int *writeback_address = NULL) {
	c->counts[op]++;
	int i, assoc = c->assoc;
	block *v;
	unsigned int offset = address & (c->blocksize - 1);
	unsigned long long int block_addr = address >> c->offset_bits;
	unsigned int set = (block_addr >> c->set_shift) & c->index_mask;

	// note this doesn't generate the right tag if we have a non-zero set shift
	// we *do* need the right tag value for things like the sampler to work
	// because the sampler recontstructs the physical address from the tag & index

	unsigned long long int tag = block_addr >> c->index_bits;

	// this will be true if the current set contains only valid blocks, false otherwise

	int set_valid = c->sets[set].valid;
	c->accesses++;
	v = &c->sets[set].blocks[0];
	LINE_STATE ls;
	if (writeback_address) *writeback_address = 0;
	AccessTypes at;
	switch (op) {
		case DAN_PREFETCH: at = ACCESS_PREFETCH; break;
		case DAN_DREAD: at = ACCESS_LOAD; break;
		case DAN_WRITE: at = ACCESS_STORE; break;
		case DAN_WRITEBACK: at = ACCESS_WRITEBACK; break;
		case DAN_IREAD: at = ACCESS_IFETCH; break;
		default: at = ACCESS_LOAD;
		printf ("op is %d!\n", op); fflush (stdout);
		assert (0);
	}
	
	// tag match?

	for (i=0; i<assoc; i++) {
		if (v[i].tag == tag) {
			if (at == ACCESS_STORE || at == ACCESS_WRITEBACK) v[i].dirty = true;
			if (c->replacement_policy == REPLACEMENT_POLICY_LRU) {
				// move this block to the mru position
				if (i != 0) move_to_mru (v, i);
				assert (i >= 0 && i < assoc);
				// update CRC's LRU policy (for instrumentation)
				ls.tag = tag;
				if (at != ACCESS_WRITEBACK)
#ifdef DANSHIP
					c->repl->UpdateReplacementState (set, i, &ls, core, pc, at, true, address);
#else
					c->repl->UpdateReplacementState (set, i, &ls, core, pc, at, true);
#endif
			} else if (c->replacement_policy >= REPLACEMENT_POLICY_CRC) {
				ls.tag = tag;
				assert (i >= 0 && i < assoc);
				if (at != ACCESS_WRITEBACK)
#ifdef DANSHIP
					c->repl->UpdateReplacementState (set, i, &ls, core, pc, at, true, address);
#else
					c->repl->UpdateReplacementState (set, i, &ls, core, pc, at, true);
#endif
			}
			return false;
		}
	}
	c->misses++;

	// a miss.
	// find a block to replace

	if (!set_valid) {
		for (i=0; i<assoc; i++) {
			if (v[i].valid == 0) break;
		}
		if (i == assoc) {
			c->sets[set].valid = 1; // mark this set as having only valid blocks so we don't search it again
			set_valid = 1;
		}
		// at this point, i indicates an invalid block, or assoc if there is no invalid block
	}
	if (c->replacement_policy == REPLACEMENT_POLICY_RANDOM) {

		// if no invalid block, choose a random one

		if (set_valid) i = (random_counter++) % assoc; // replace
		check_writeback (i);
		if (at == ACCESS_STORE || at == ACCESS_WRITEBACK) 
			v[i].dirty = true;
		else
			v[i].dirty = false;
		v[i].tag = tag;
		v[i].valid = 1;
		place (c, pc, set, &v[i], offset);
	} else if (c->replacement_policy == REPLACEMENT_POLICY_LRU) {

		// if no invalid block, use the lru one (the one in the last position)

		if (set_valid) i = assoc - 1; // replace LRU block
		check_writeback (i);
		if (i != 0) move_to_mru (v, i);
		if (at == ACCESS_STORE || at == ACCESS_WRITEBACK) 
			v[0].dirty = true;
		else
			v[0].dirty = false;
		v[0].tag = tag;
		v[0].valid = 1;
		place (c, pc, set, &v[0], offset);

		// update CRC's LRU policy (for instrumentation)
		ls.tag = tag;
		if (at != ACCESS_WRITEBACK) {
			// find LRU way
			int lru = -1;
			for (int z=0; z<(int)assoc; z++) if (c->repl->repl[set][z].LRUstackposition == (unsigned) assoc-1) { lru = z; break; }
			assert (lru >= 0);
#ifdef DANSHIP
			c->repl->UpdateReplacementState (set, lru, &ls, core, pc, at, false, address);
#else
			c->repl->UpdateReplacementState (set, lru, &ls, core, pc, at, false);
#endif
		}
	} else {
		// assume we are using CRC replacement policy, see what it wants to replace
		if (set_valid) {
			i = c->repl->GetVictimInSet (core, set, NULL, assoc, pc, address, at); // replace
		}
		ls.tag = tag;

		// -1 means bypass

		if (i != -1) {
			check_writeback (i);
			if (at == ACCESS_STORE || at == ACCESS_WRITEBACK) 
				v[i].dirty = true;
			else
				v[i].dirty = false;
			v[i].tag = tag;
			v[i].valid = 1;
			assert (i >= 0 && i < assoc);
#ifdef DANSHIP
			c->repl->UpdateReplacementState (set, i, &ls, core, pc, at, false, address);
#else
			c->repl->UpdateReplacementState (set, i, &ls, core, pc, at, false);
#endif
			place (c, pc, set, &v[i], offset);
		}
	}
	// only count as a miss if the block is not a writeback block or prefetch
	return (at != ACCESS_WRITEBACK) && (at != ACCESS_PREFETCH);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
movl %r8d, %r13d
movq %rdi, %r12
movslq %r8d, %rax
incq 0x40(%rdi,%rax,8)
movl %r9d, 0x14(%rsp)
movq %rsi, %rax
movl 0x10(%rdi), %esi
movq %rax, %r15
movl %esi, %ecx
shrq %cl, %r15
movq %rdx, 0x20(%rsp)
movq 0xa0(%rsp), %rdx
movb 0xc(%rdi), %cl
movq %r15, %rbx
shrq %cl, %rbx
movl 0x4(%rdi), %ebp
andl 0x20(%rdi), %ebx
movl 0x14(%rdi), %ecx
shrq %cl, %r15
movl 0x8(%rdi), %r11d
movq 0x38(%rdi), %rdi
imulq $0x288, %rbx, %r8       # imm = 0x288
movzbl 0x280(%rdi,%r8), %r9d
incq 0x30(%r12)
testq %rdx, %rdx
je 0x404d17
movq $0x0, (%rdx)
cmpl $0x7, %r13d
ja 0x4051e3
movl %r13d, %edx
leaq 0x1842d9(%rip), %r10    # 0x589004
movslq (%r10,%rdx,4), %rdx
addq %r10, %rdx
jmpq *%rdx
movb $0x1, %dl
movl %edx, 0x1c(%rsp)
movl $0x0, 0xc(%rsp)
movl $0x0, 0x10(%rsp)
jmp 0x404d9e
movl $0x5, %r13d
movb $0x1, %dl
movl %edx, 0x1c(%rsp)
movl $0x0, 0xc(%rsp)
movl $0x0, 0x10(%rsp)
movl $0x0, 0x18(%rsp)
jmp 0x404da4
movb $0x1, %dl
movl %edx, 0xc(%rsp)
movl $0x0, 0x10(%rsp)
movb $0x1, %dl
movl %edx, 0x1c(%rsp)
jmp 0x404d9e
movb $0x1, %dl
movl %edx, 0x10(%rsp)
movl $0x0, 0xc(%rsp)
movl $0x0, 0x1c(%rsp)
movb $0x1, %dl
movl %edx, 0x18(%rsp)
leaq (%rdi,%r8), %r14
xorl %edx, %edx
testl %ebp, %ebp
jle 0x404dc9
movq %r14, %r10
cmpq %r15, 0x8(%r10)
je 0x404ebd
incq %rdx
addq $0x28, %r10
cmpq %rdx, %rbp
jne 0x404db1
movl %ebp, %edx
decl %r11d
incq 0x28(%r12)
testl %r9d, %r9d
jne 0x404e19
xorl %r9d, %r9d
movl $0x0, %edx
testl %ebp, %ebp
jle 0x404e00
leaq (%r8,%rdi), %r10
addq $0x10, %r10
xorl %edx, %edx
cmpb $0x0, (%r10)
je 0x404e00
incq %rdx
addq $0x28, %r10
cmpq %rdx, %rbp
jne 0x404dec
movl %ebp, %edx
cmpl %ebp, %edx
jne 0x404e19
leaq (%rdi,%r8), %r9
addq $0x280, %r9             # imm = 0x280
movb $0x1, (%r9)
movl $0x1, %r9d
andl %eax, %r11d
movl %r11d, 0x2c(%rsp)
movl 0x18(%r12), %r10d
testl %r10d, %r10d
je 0x404eec
cmpl $0x1, %r10d
jne 0x405013
testl %r9d, %r9d
je 0x404e51
movl 0x1f80d0(%rip), %eax    # 0x5fcf14
leal 0x1(%rax), %edx
movl %edx, 0x1f80c7(%rip)    # 0x5fcf14
xorl %edx, %edx
divl %ebp
movslq %edx, %rax
movq 0xa0(%rsp), %rdi
testq %rdi, %rdi
je 0x404e89
leaq (%rax,%rax,4), %rdx
cmpb $0x0, 0x10(%r14,%rdx,8)
je 0x404e89
leaq (%r14,%rdx,8), %rdx
cmpb $0x0, 0x11(%rdx)
je 0x404e89
movq 0x8(%rdx), %rdx
shlq %cl, %rdx
addq %rbx, %rdx
movl %esi, %ecx
shlq %cl, %rdx
movq %rdx, (%rdi)
movl 0xc(%rsp), %ecx
orb 0x10(%rsp), %cl
leaq (%rax,%rax,4), %rax
movb %cl, 0x11(%r14,%rax,8)
movq %r15, 0x8(%r14,%rax,8)
movb $0x1, 0x10(%r14,%rax,8)
movq 0x20(%rsp), %rcx
movq %rcx, 0x18(%r14,%rax,8)
movl 0x2c(%rsp), %ecx
movl %ecx, 0x20(%r14,%rax,8)
jmp 0x4051cc
movl 0x10(%rsp), %esi
movl 0xc(%rsp), %eax
orb %sil, %al
cmpb $0x1, %al
jne 0x404ed1
movb $0x1, 0x11(%r10)
movl 0x18(%r12), %eax
testl %eax, %eax
je 0x405100
cmpl $0x2, %eax
jge 0x405168
jmp 0x405198
leal -0x1(%rbp), %eax
testl %r9d, %r9d
cmovnel %eax, %edx
movslq %edx, %r9
cmpq $0x0, 0xa0(%rsp)
je 0x404f34
leaq (%r9,%r9,4), %r10
cmpb $0x0, 0x10(%r14,%r10,8)
je 0x404f34
leaq (%r14,%r10,8), %r10
cmpb $0x0, 0x11(%r10)
je 0x404f34
movq 0x8(%r10), %r10
shlq %cl, %r10
addq %rbx, %r10
movl %esi, %ecx
shlq %cl, %r10
movq 0xa0(%rsp), %rcx
movq %r10, (%rcx)
testl %edx, %edx
je 0x404faa
leaq (%r9,%r9,4), %rcx
movq 0x20(%r14,%rcx,8), %rsi
movq %rsi, 0x50(%rsp)
movups (%r14,%rcx,8), %xmm0
movups 0x10(%r14,%rcx,8), %xmm1
movaps %xmm1, 0x40(%rsp)
movaps %xmm0, 0x30(%rsp)
jle 0x404f8f
movl %edx, %ecx
leaq (%rcx,%rcx,4), %rdx
incq %rcx
leaq (%r8,%rdx,8), %rdx
addq %rdx, %rdi
movl -0x8(%rdi), %edx
movl %edx, 0x20(%rdi)
movups -0x28(%rdi), %xmm0
movups -0x18(%rdi), %xmm1
movups %xmm1, 0x10(%rdi)
movups %xmm0, (%rdi)
addq $-0x28, %rdi
decq %rcx
cmpq $0x1, %rcx
jg 0x404f6d
movl 0x50(%rsp), %ecx
movl %ecx, 0x20(%r14)
movaps 0x30(%rsp), %xmm0
movaps 0x40(%rsp), %xmm1
movups %xmm1, 0x10(%r14)
movups %xmm0, (%r14)
movl 0x10(%rsp), %edx
movl 0xc(%rsp), %ecx
orb %dl, %cl
movb %cl, 0x11(%r14)
movq %r15, 0x8(%r14)
movb $0x1, 0x10(%r14)
movq 0x20(%rsp), %rcx
movq %rcx, 0x18(%r14)
movl 0x2c(%rsp), %ecx
movl %ecx, 0x20(%r14)
movq %r15, 0x30(%rsp)
testb %dl, %dl
jne 0x4051cc
movl $0xffffffff, %edx       # imm = 0xFFFFFFFF
testl %ebp, %ebp
jle 0x40519e
movq 0x80(%r12), %rcx
movq (%rcx), %rcx
movq (%rcx,%rbx,8), %rsi
xorl %ecx, %ecx
cmpl %eax, (%rsi,%rcx,8)
je 0x40519c
incq %rcx
cmpq %rcx, %rbp
jne 0x404ffd
jmp 0x40519e
testl %r9d, %r9d
je 0x405048
movq 0x80(%r12), %rdi
movl 0x14(%rsp), %esi
movl %ebx, %edx
xorl %ecx, %ecx
movl %ebp, %r8d
movq 0x20(%rsp), %r9
pushq %r13
pushq %rax
movq %r13, 0x70(%rsp)
callq 0x40661e
movq 0x70(%rsp), %r13
addq $0x10, %rsp
movl %eax, %edx
movq %r15, 0x30(%rsp)
cmpl $-0x1, %edx
je 0x4051cc
movslq %edx, %rax
movq 0xa0(%rsp), %rdi
testq %rdi, %rdi
je 0x405096
leaq (%rax,%rax,4), %rcx
cmpb $0x0, 0x10(%r14,%rcx,8)
je 0x405096
leaq (%r14,%rcx,8), %rcx
cmpb $0x0, 0x11(%rcx)
je 0x405096
movq 0x8(%rcx), %rsi
movb 0x14(%r12), %cl
shlq %cl, %rsi
movb 0x10(%r12), %cl
addq %rbx, %rsi
shlq %cl, %rsi
movq %rsi, (%rdi)
movl 0xc(%rsp), %ecx
orb 0x10(%rsp), %cl
leaq (%rax,%rax,4), %rax
movb %cl, 0x11(%r14,%rax,8)
movq %r15, 0x8(%r14,%rax,8)
movb $0x1, 0x10(%r14,%rax,8)
testl %edx, %edx
js 0x405222
cmpl %ebp, %edx
jge 0x405222
leaq (%r14,%rax,8), %r14
movq 0x80(%r12), %rdi
leaq 0x30(%rsp), %rcx
movl %ebx, %esi
movl 0x14(%rsp), %r8d
movq 0x20(%rsp), %r9
pushq $0x0
pushq %r13
movq %r9, %rbx
callq 0x4067ee
addq $0x10, %rsp
movq %rbx, 0x18(%r14)
movl 0x2c(%rsp), %eax
movl %eax, 0x20(%r14)
jmp 0x4051cc
testq %rdx, %rdx
je 0x405168
leaq 0x1(%rdx), %rax
movq 0x20(%r10), %rcx
movq %rcx, 0x50(%rsp)
movups (%r10), %xmm0
movups 0x10(%r10), %xmm1
movaps %xmm1, 0x40(%rsp)
movaps %xmm0, 0x30(%rsp)
movl -0x8(%r10), %ecx
movl %ecx, 0x20(%r10)
movups -0x28(%r10), %xmm0
movups -0x18(%r10), %xmm1
movups %xmm1, 0x10(%r10)
movups %xmm0, (%r10)
addq $-0x28, %r10
decq %rax
cmpq $0x1, %rax
jg 0x405125
movl 0x50(%rsp), %eax
movl %eax, 0x20(%r14)
movaps 0x30(%rsp), %xmm0
movaps 0x40(%rsp), %xmm1
movups %xmm1, 0x10(%r14)
movups %xmm0, (%r14)
movq %r15, 0x30(%rsp)
testb %sil, %sil
jne 0x405198
movq 0x80(%r12), %rdi
leaq 0x30(%rsp), %rcx
movl %ebx, %esi
movl 0x14(%rsp), %r8d
movq 0x20(%rsp), %r9
pushq $0x1
pushq %r13
callq 0x4067ee
addq $0x10, %rsp
xorl %eax, %eax
jmp 0x4051d4
movl %ecx, %edx
testl %edx, %edx
js 0x405241
movq 0x80(%r12), %rdi
leaq 0x30(%rsp), %rcx
movl %ebx, %esi
movl 0x14(%rsp), %r8d
movq 0x20(%rsp), %r9
pushq $0x0
pushq %r13
callq 0x4067ee
addq $0x10, %rsp
movl 0x1c(%rsp), %eax
andb 0x18(%rsp), %al
addq $0x68, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0x183e5a(%rip), %rdi    # 0x589044
movl %r13d, %esi
xorl %eax, %eax
callq 0x4de520
movq $0x5fb510, %rax         # imm = 0x5FB510
movq (%rax), %rdi
callq 0x4ed080
leaq 0x1845ff(%rip), %rdi    # 0x589809
leaq 0x183e1d(%rip), %rsi    # 0x58902e
leaq 0x183e37(%rip), %rcx    # 0x58904f
movl $0x6b, %edx
callq 0x4cc560
leaq 0x183ea0(%rip), %rdi    # 0x5890c9
leaq 0x183dfe(%rip), %rsi    # 0x58902e
leaq 0x183e18(%rip), %rcx    # 0x58904f
movl $0xd5, %edx
callq 0x4cc560
leaq 0x183e95(%rip), %rdi    # 0x5890dd
leaq 0x183ddf(%rip), %rsi    # 0x58902e
leaq 0x183df9(%rip), %rcx    # 0x58904f
movl $0xbd, %edx
callq 0x4cc560