// File: /workspace/github_c_makefile_star2_O0/samtools[P]htslib/htscodecs/htscodecs/rANS_static32x16pr_avx512.c
// Function: mm512_i32gather_epi32x1
static inline __m512i _mm512_i32gather_epi32x1(__m512i idx, void *v) {
    uint8_t *b = (uint8_t *)v;
    volatile int c[16] __attribute__((aligned(32)));

    //_mm512_store_si512((__m512i *)c, idx); // equivalent, but slower
    _mm256_store_si256((__m256i *)(c),   _mm512_castsi512_si256(idx));
    _mm256_store_si256((__m256i *)(c+8), _mm512_extracti64x4_epi64(idx, 1));

    return _mm512_set_epi32(b[c[15]], b[c[14]], b[c[13]], b[c[12]],
                            b[c[11]], b[c[10]], b[c[9]], b[c[8]],
                            b[c[7]], b[c[6]], b[c[5]], b[c[4]],
                            b[c[3]], b[c[2]], b[c[1]], b[c[0]]);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
andq $-0x40, %rsp
subq $0x240, %rsp            # imm = 0x240
vmovdqa64 %zmm0, 0x80(%rsp)
movq %rdi, 0x78(%rsp)
movq 0x78(%rsp), %rax
movq %rax, 0x70(%rsp)
vmovdqa64 0x80(%rsp), %zmm0
vmovdqa64 %zmm0, 0x140(%rsp)
vmovdqa64 0x140(%rsp), %zmm0
leaq 0x20(%rsp), %rax
movq %rax, 0x138(%rsp)
vmovaps %ymm0, 0x100(%rsp)
vmovaps 0x100(%rsp), %ymm0
movq 0x138(%rsp), %rax
vmovaps %ymm0, (%rax)
leaq 0x40(%rsp), %rax
vmovdqa64 0x80(%rsp), %zmm0
movq %rax, 0xf8(%rsp)
vextracti64x4 $0x1, %zmm0, 0xc0(%rsp)
vmovaps 0xc0(%rsp), %ymm0
movq 0xf8(%rsp), %rax
vmovaps %ymm0, (%rax)
movq 0x70(%rsp), %rax
movslq 0x5c(%rsp), %rcx
movzbl (%rax,%rcx), %eax
movl %eax, 0x14(%rsp)
movq 0x70(%rsp), %rax
movslq 0x58(%rsp), %rcx
movzbl (%rax,%rcx), %eax
movl %eax, 0x18(%rsp)
movq 0x70(%rsp), %rax
movslq 0x54(%rsp), %rcx
movzbl (%rax,%rcx), %r13d
movq 0x70(%rsp), %rax
movslq 0x50(%rsp), %rcx
movzbl (%rax,%rcx), %r12d
movq 0x70(%rsp), %rax
movslq 0x4c(%rsp), %rcx
movzbl (%rax,%rcx), %r15d
movq 0x70(%rsp), %rax
movslq 0x48(%rsp), %rcx
movzbl (%rax,%rcx), %r14d
movq 0x70(%rsp), %rax
movslq 0x44(%rsp), %rcx
movzbl (%rax,%rcx), %ebx
movq 0x70(%rsp), %rax
movslq 0x40(%rsp), %rcx
movzbl (%rax,%rcx), %r11d
movq 0x70(%rsp), %rax
movslq 0x3c(%rsp), %rcx
movzbl (%rax,%rcx), %r10d
movq 0x70(%rsp), %rax
movslq 0x38(%rsp), %rcx
movzbl (%rax,%rcx), %r9d
movq 0x70(%rsp), %rax
movslq 0x34(%rsp), %rcx
movzbl (%rax,%rcx), %r8d
movq 0x70(%rsp), %rax
movslq 0x30(%rsp), %rcx
movzbl (%rax,%rcx), %edi
movq 0x70(%rsp), %rax
movslq 0x2c(%rsp), %rcx
movzbl (%rax,%rcx), %esi
movq 0x70(%rsp), %rax
movslq 0x28(%rsp), %rcx
movzbl (%rax,%rcx), %edx
movq 0x70(%rsp), %rax
movslq 0x24(%rsp), %rcx
movzbl (%rax,%rcx), %eax
movl %eax, 0x10(%rsp)
movq 0x70(%rsp), %rax
movslq 0x20(%rsp), %rcx
movzbl (%rax,%rcx), %eax
movl 0x10(%rsp), %ecx
movl %eax, 0x1c(%rsp)
movl 0x14(%rsp), %eax
movl %eax, 0x204(%rsp)
movl 0x18(%rsp), %eax
movl %eax, 0x200(%rsp)
movl 0x1c(%rsp), %eax
movl %r13d, 0x1fc(%rsp)
movl %r12d, 0x1f8(%rsp)
movl %r15d, 0x1f4(%rsp)
movl %r14d, 0x1f0(%rsp)
movl %ebx, 0x1ec(%rsp)
movl %r11d, 0x1e8(%rsp)
movl %r10d, 0x1e4(%rsp)
movl %r9d, 0x1e0(%rsp)
movl %r8d, 0x1dc(%rsp)
movl %edi, 0x1d8(%rsp)
movl %esi, 0x1d4(%rsp)
movl %edx, 0x1d0(%rsp)
movl %ecx, 0x1cc(%rsp)
movl %eax, 0x1c8(%rsp)
movl 0x1cc(%rsp), %edx
movl 0x1d0(%rsp), %ecx
movl 0x1d4(%rsp), %eax
movl 0x1dc(%rsp), %r8d
movl 0x1e0(%rsp), %edi
movl 0x1e4(%rsp), %esi
movl 0x1ec(%rsp), %r11d
movl 0x1f0(%rsp), %r10d
movl 0x1f4(%rsp), %r9d
movl 0x1fc(%rsp), %r15d
movl 0x200(%rsp), %r14d
movl 0x204(%rsp), %ebx
vmovd 0x1f8(%rsp), %xmm0
vpinsrd $0x1, %r15d, %xmm0, %xmm0
vpinsrd $0x2, %r14d, %xmm0, %xmm0
vpinsrd $0x3, %ebx, %xmm0, %xmm1
vmovd 0x1e8(%rsp), %xmm0
vpinsrd $0x1, %r11d, %xmm0, %xmm0
vpinsrd $0x2, %r10d, %xmm0, %xmm0
vpinsrd $0x3, %r9d, %xmm0, %xmm2
vmovaps %xmm2, %xmm0
vinserti128 $0x1, %xmm1, %ymm0, %ymm1
vmovd 0x1d8(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm2
vmovd 0x1c8(%rsp), %xmm0
vpinsrd $0x1, %edx, %xmm0, %xmm0
vpinsrd $0x2, %ecx, %xmm0, %xmm0
vpinsrd $0x3, %eax, %xmm0, %xmm3
vmovaps %xmm3, %xmm0
vinserti128 $0x1, %xmm2, %ymm0, %ymm2
vmovaps %ymm2, %ymm0
vinserti64x4 $0x1, %ymm1, %zmm0, %zmm0
vmovdqa64 %zmm0, 0x180(%rsp)
vmovdqa64 0x180(%rsp), %zmm0
leaq -0x28(%rbp), %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
nopl (%rax)