// File: /workspace/github_cpp_makefile_star2_O2/CMU-SAFARI[P]ramulator/src/TLDRAM.cpp
// Function: ramulator::TLDRAM::init_prereq()
void TLDRAM::init_prereq()
{
    // RD
    prereq[int(Level::Rank)][int(Command::RD)] = [] (DRAM<TLDRAM>* node, Command cmd, int id) {
        switch (int(node->state)) {
            case int(State::PowerUp): return Command::MAX;
            case int(State::ActPowerDown): return Command::PDX;
            case int(State::PrePowerDown): return Command::PDX;
            case int(State::SelfRefresh): return Command::SRX;
            default: assert(false);
        }
    };
    prereq[int(Level::Rank)][int(Command::MIG)] = prereq[int(Level::Rank)][int(Command::RD)];

    prereq[int(Level::Bank)][int(Command::RD)] = [] (DRAM<TLDRAM>* node, Command cmd, int id) {
        switch (int(node->state)) {
            case int(State::Closed):
                if (id % node->spec->segment_ratio)
                    return Command::ACT;
                else
                    return Command::ACTF;
            case int(State::Opened):
                if (node->row_state.find(id) != node->row_state.end())
                    return cmd;
                if (id % node->spec->segment_ratio)
                    return Command::PRE;
                else
                    return Command::PREF;
            default: assert(false);
        }
    };
    prereq[int(Level::Bank)][int(Command::MIG)] = [] (DRAM<TLDRAM>* node, Command cmd, int id) {
        switch (int(node->state)) {
            case int(State::Closed):
                return Command::ACTM;
            case int(State::Opened):
                if (node->row_state.find(id) != node->row_state.end())
                    return cmd;
                return Command::PREM;
            default: assert(false);
        }
    };

    // WR
    prereq[int(Level::Rank)][int(Command::WR)] = prereq[int(Level::Rank)][int(Command::RD)];
    prereq[int(Level::Bank)][int(Command::WR)] = prereq[int(Level::Bank)][int(Command::RD)];

    // REF
    prereq[int(Level::Rank)][int(Command::REF)] = [] (DRAM<TLDRAM>* node, Command cmd, int id) {
        for (auto bank : node->children) {
            if (bank->state == State::Closed)
                continue;
            if (id % node->spec->segment_ratio)
                return Command::PREA;
            else
                return Command::PREAF;
        }
        return Command::REF;
    };

    // PD
    prereq[int(Level::Rank)][int(Command::PDE)] = [] (DRAM<TLDRAM>* node, Command cmd, int id) {
        switch (int(node->state)) {
            case int(State::PowerUp): return Command::PDE;
            case int(State::ActPowerDown): return Command::PDE;
            case int(State::PrePowerDown): return Command::PDE;
            case int(State::SelfRefresh): return Command::SRX;
            default: assert(false);
        }
    };

    // SR
    prereq[int(Level::Rank)][int(Command::SRE)] = [] (DRAM<TLDRAM>* node, Command cmd, int id) {
        switch (int(node->state)) {
            case int(State::PowerUp): return Command::SRE;
            case int(State::ActPowerDown): return Command::PDX;
            case int(State::PrePowerDown): return Command::PDX;
            case int(State::SelfRefresh): return Command::SRE;
            default: assert(false);
        }
    };
}

// Assembly:
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x28, %rsp
movq %rdi, %rbx
leaq 0x518(%rdi), %r14
movups 0x518(%rdi), %xmm0
movq %rsp, %r12
movaps %xmm0, (%r12)
xorps %xmm0, %xmm0
movups %xmm0, 0x518(%rdi)
movups 0x528(%rdi), %xmm0
leaq 0x239e(%rip), %rax      # 0xc909a
movq %rax, 0x528(%rdi)
movaps %xmm0, 0x10(%r12)
leaq 0x234c(%rip), %rax      # 0xc905c
movq %rax, 0x530(%rdi)
movq %r12, %rdi
callq 0x96b6a
leaq 0x658(%rbx), %rdi
movq %r14, %rsi
callq 0xc998c
leaq 0x738(%rbx), %r15
movups 0x738(%rbx), %xmm0
movaps %xmm0, (%r12)
xorps %xmm0, %xmm0
movups %xmm0, 0x738(%rbx)
movups 0x748(%rbx), %xmm0
leaq 0x23ed(%rip), %rax      # 0xc9146
movq %rax, 0x748(%rbx)
movaps %xmm0, 0x10(%r12)
leaq 0x2345(%rip), %rax      # 0xc90b2
movq %rax, 0x750(%rbx)
movq %rsp, %r12
movq %r12, %rdi
callq 0x96b6a
movups 0x878(%rbx), %xmm0
movaps %xmm0, (%r12)
xorps %xmm0, %xmm0
movups %xmm0, 0x878(%rbx)
movups 0x888(%rbx), %xmm0
leaq 0x2429(%rip), %rax      # 0xc91cc
movq %rax, 0x888(%rbx)
movaps %xmm0, 0x10(%r12)
leaq 0x23a7(%rip), %rax      # 0xc915e
movq %rax, 0x890(%rbx)
movq %rsp, %r12
movq %r12, %rdi
callq 0x96b6a
leaq 0x538(%rbx), %rdi
movq %r14, %rsi
callq 0xc998c
leaq 0x758(%rbx), %rdi
movq %r15, %rsi
callq 0xc998c
movups 0x558(%rbx), %xmm0
movaps %xmm0, (%r12)
xorps %xmm0, %xmm0
movups %xmm0, 0x558(%rbx)
movups 0x568(%rbx), %xmm0
leaq 0x241d(%rip), %rax      # 0xc9228
movq %rax, 0x568(%rbx)
movaps %xmm0, 0x10(%r12)
leaq 0x23c5(%rip), %rax      # 0xc91e4
movq %rax, 0x570(%rbx)
movq %rsp, %r14
movq %r14, %rdi
callq 0x96b6a
movups 0x578(%rbx), %xmm0
movaps %xmm0, (%r14)
xorps %xmm0, %xmm0
movups %xmm0, 0x578(%rbx)
movups 0x588(%rbx), %xmm0
leaq 0x242a(%rip), %rax      # 0xc927e
movq %rax, 0x588(%rbx)
movaps %xmm0, 0x10(%r14)
leaq 0x23d9(%rip), %rax      # 0xc9240
movq %rax, 0x590(%rbx)
movq %rsp, %r14
movq %r14, %rdi
callq 0x96b6a
movups 0x5b8(%rbx), %xmm0
movaps %xmm0, (%r14)
xorps %xmm0, %xmm0
movups %xmm0, 0x5b8(%rbx)
movups 0x5c8(%rbx), %xmm0
leaq 0x2438(%rip), %rax      # 0xc92d4
movq %rax, 0x5c8(%rbx)
movaps %xmm0, 0x10(%r14)
leaq 0x23e7(%rip), %rax      # 0xc9296
movq %rax, 0x5d0(%rbx)
movq %rsp, %rdi
callq 0x96b6a
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq