// File: /workspace/github_cpp_makefile_star2_O1/CMU-SAFARI[P]MQSim/src/exec/SSD_Device.cpp
// Function: SSD_Device::SSD_Device(Device_Parameter_Set*, std::vector<IO_Flow_Parameter_Set*, std::allocator<IO_Flow_Parameter_Set*>>*)
SSD_Device::SSD_Device(Device_Parameter_Set *parameters, std::vector<IO_Flow_Parameter_Set *> *io_flows) : MQSimEngine::Sim_Object("SSDDevice")
{
	SSD_Device *device = this;
	my_instance = device; //used for static functions
	Simulator->AddObject(device);

	device->Preconditioning_required = parameters->Enabled_Preconditioning;
	device->Memory_Type = parameters->Memory_Type;

	switch (Memory_Type)
	{
	case NVM::NVM_Type::FLASH:
	{
		sim_time_type *read_latencies, *write_latencies;
		sim_time_type average_flash_read_latency = 0, average_flash_write_latency = 0; //Required for FTL initialization

		//Step 1: create memory chips (flash chips in our case)
		switch (parameters->Flash_Parameters.Flash_Technology)
		{
		case Flash_Technology_Type::SLC:
			read_latencies = new sim_time_type[1];
			read_latencies[0] = parameters->Flash_Parameters.Page_Read_Latency_LSB;
			write_latencies = new sim_time_type[1];
			write_latencies[0] = parameters->Flash_Parameters.Page_Program_Latency_LSB;
			average_flash_read_latency = read_latencies[0];
			average_flash_write_latency = write_latencies[0];
			break;
		case Flash_Technology_Type::MLC:
			read_latencies = new sim_time_type[2];
			read_latencies[0] = parameters->Flash_Parameters.Page_Read_Latency_LSB;
			read_latencies[1] = parameters->Flash_Parameters.Page_Read_Latency_MSB;
			write_latencies = new sim_time_type[2];
			write_latencies[0] = parameters->Flash_Parameters.Page_Program_Latency_LSB;
			write_latencies[1] = parameters->Flash_Parameters.Page_Program_Latency_MSB;
			average_flash_read_latency = (read_latencies[0] + read_latencies[1]) / 2;
			average_flash_write_latency = (write_latencies[0] + write_latencies[1]) / 2;
			break;
		case Flash_Technology_Type::TLC:
			read_latencies = new sim_time_type[3];
			read_latencies[0] = parameters->Flash_Parameters.Page_Read_Latency_LSB;
			read_latencies[1] = parameters->Flash_Parameters.Page_Read_Latency_CSB;
			read_latencies[2] = parameters->Flash_Parameters.Page_Read_Latency_MSB;
			write_latencies = new sim_time_type[3];
			write_latencies[0] = parameters->Flash_Parameters.Page_Program_Latency_LSB;
			write_latencies[1] = parameters->Flash_Parameters.Page_Program_Latency_CSB;
			write_latencies[2] = parameters->Flash_Parameters.Page_Program_Latency_MSB;
			average_flash_read_latency = (read_latencies[0] + read_latencies[1] + read_latencies[2]) / 3;
			average_flash_write_latency = (write_latencies[0] + write_latencies[1] + write_latencies[2]) / 3;
			break;
		default:
			throw std::invalid_argument("The specified flash technologies is not supported");
		}

		//Step 2: create memory channels to connect chips to the controller
		this->Channel_count = parameters->Flash_Channel_Count;
		this->Chip_no_per_channel = parameters->Chip_No_Per_Channel;
		switch (parameters->Flash_Comm_Protocol)
		{
		case SSD_Components::ONFI_Protocol::NVDDR2:
		{
			SSD_Components::ONFI_Channel_NVDDR2 **channels = new SSD_Components::ONFI_Channel_NVDDR2 *[parameters->Flash_Channel_Count];
			for (unsigned int channel_cntr = 0; channel_cntr < parameters->Flash_Channel_Count; channel_cntr++)
			{
				NVM::FlashMemory::Flash_Chip **chips = new NVM::FlashMemory::Flash_Chip *[parameters->Chip_No_Per_Channel];
				for (unsigned int chip_cntr = 0; chip_cntr < parameters->Chip_No_Per_Channel; chip_cntr++)
				{
					chips[chip_cntr] = new NVM::FlashMemory::Flash_Chip(device->ID() + ".Channel." + std::to_string(channel_cntr) + ".Chip." + std::to_string(chip_cntr),
																		channel_cntr, chip_cntr, parameters->Flash_Parameters.Flash_Technology, parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
																		parameters->Flash_Parameters.Block_No_Per_Plane, parameters->Flash_Parameters.Page_No_Per_Block,
																		read_latencies, write_latencies, parameters->Flash_Parameters.Block_Erase_Latency,
																		parameters->Flash_Parameters.Suspend_Program_Time, parameters->Flash_Parameters.Suspend_Erase_Time);
					Simulator->AddObject(chips[chip_cntr]); //Each simulation object (a child of MQSimEngine::Sim_Object) should be added to the engine
				}
				channels[channel_cntr] = new SSD_Components::ONFI_Channel_NVDDR2(channel_cntr, parameters->Chip_No_Per_Channel,
																				 chips, parameters->Flash_Channel_Width,
																				 (sim_time_type)((double)1000 / parameters->Channel_Transfer_Rate) * 2, (sim_time_type)((double)1000 / parameters->Channel_Transfer_Rate) * 2);
				device->Channels.push_back(channels[channel_cntr]); //Channels should not be added to the simulator core, they are passive object that do not handle any simulation event
			}

			//Step 3: create channel controller and connect channels to it
			device->PHY = new SSD_Components::NVM_PHY_ONFI_NVDDR2(device->ID() + ".PHY", channels, parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel,
																  parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die);
			Simulator->AddObject(device->PHY);
			break;
		}
		default:
			throw std::invalid_argument("No implementation is available for the specified flash communication protocol");
		}
		delete[] read_latencies;
		delete[] write_latencies;

		//Steps 4 - 8: create FTL components and connect them together
		SSD_Components::FTL *ftl = new SSD_Components::FTL(device->ID() + ".FTL", NULL, parameters->Flash_Channel_Count,
														   parameters->Chip_No_Per_Channel, parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
														   parameters->Flash_Parameters.Block_No_Per_Plane, parameters->Flash_Parameters.Page_No_Per_Block,
														   parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, average_flash_read_latency, average_flash_write_latency, parameters->Overprovisioning_Ratio,
														   parameters->Flash_Parameters.Block_PE_Cycles_Limit, parameters->Seed++);
		ftl->PHY = (SSD_Components::NVM_PHY_ONFI *)PHY;
		Simulator->AddObject(ftl);
		device->Firmware = ftl;

		//Step 5: create TSU
		SSD_Components::TSU_Base *tsu;
		bool erase_suspension = false, program_suspension = false;
		if (parameters->Flash_Parameters.CMD_Suspension_Support == NVM::FlashMemory::Command_Suspension_Mode::PROGRAM)
		{
			program_suspension = true;
		}
		if (parameters->Flash_Parameters.CMD_Suspension_Support == NVM::FlashMemory::Command_Suspension_Mode::ERASE)
		{
			erase_suspension = true;
		}
		if (parameters->Flash_Parameters.CMD_Suspension_Support == NVM::FlashMemory::Command_Suspension_Mode::PROGRAM_ERASE)
		{
			program_suspension = true;
			erase_suspension = true;
		}
		switch (parameters->Transaction_Scheduling_Policy)
		{
		case SSD_Components::Flash_Scheduling_Type::OUT_OF_ORDER:
			tsu = new SSD_Components::TSU_OutOfOrder(ftl->ID() + ".TSU", ftl, static_cast<SSD_Components::NVM_PHY_ONFI_NVDDR2 *>(device->PHY),
													 parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel,
													 parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
													 parameters->Preferred_suspend_write_time_for_read, parameters->Preferred_suspend_erase_time_for_read,
													 parameters->Preferred_suspend_erase_time_for_write,
													 erase_suspension, program_suspension);
			break;
		case SSD_Components::Flash_Scheduling_Type::PRIORITY_OUT_OF_ORDER:
			tsu = new SSD_Components::TSU_Priority_OutOfOrder(ftl->ID() + ".TSU", ftl, static_cast<SSD_Components::NVM_PHY_ONFI_NVDDR2 *>(device->PHY),
										  parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel,
										  parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
										  parameters->Preferred_suspend_write_time_for_read, parameters->Preferred_suspend_erase_time_for_read,
										  parameters->Preferred_suspend_erase_time_for_write,
										  erase_suspension, program_suspension);
			break;
		/*case SSD_Components::Flash_Scheduling_Type::FLIN:
				{
					unsigned int * stream_count_per_priority_class = new unsigned int[4];
					for (int i = 0; i < 4; i++)
						stream_count_per_priority_class[i] = 0;
					for (auto &flow : (*io_flows))
						stream_count_per_priority_class[(int)flow->Priority_Class]++;
					stream_id_type** stream_ids_per_priority_class = new stream_id_type*[4];
					for (int i = 0; i < 4; i++)
						stream_ids_per_priority_class[i] = new stream_id_type[stream_count_per_priority_class[i]];

					tsu = new SSD_Components::TSU_FLIN(ftl->ID() + ".TSU", ftl, static_cast<SSD_Components::NVM_PHY_ONFI_NVDDR2*>(device->PHY),
						parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel,
						parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die, parameters->Flash_Parameters.Page_Capacity,
						10000000, 33554432, 262144, 4, (unsigned int)io_flows->size(), stream_count_per_priority_class, stream_ids_per_priority_class,
						0.6,
						parameters->Preferred_suspend_write_time_for_read, parameters->Preferred_suspend_erase_time_for_read, parameters->Preferred_suspend_erase_time_for_write,
						erase_suspension, program_suspension);
					break;
				}*/
		default:
			throw std::invalid_argument("No implementation is available for the specified transaction scheduling algorithm");
		}
		Simulator->AddObject(tsu);
		ftl->TSU = tsu;

		//Step 6: create Flash_Block_Manager
		SSD_Components::Flash_Block_Manager_Base *fbm;
		fbm = new SSD_Components::Flash_Block_Manager(NULL, parameters->Flash_Parameters.Block_PE_Cycles_Limit,
													  (unsigned int)io_flows->size(), parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel,
													  parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
													  parameters->Flash_Parameters.Block_No_Per_Plane, parameters->Flash_Parameters.Page_No_Per_Block);
		ftl->BlockManager = fbm;

		//Step 7: create Address_Mapping_Unit
		SSD_Components::Address_Mapping_Unit_Base *amu;
		std::vector<std::vector<flash_channel_ID_type>> flow_channel_id_assignments;
		std::vector<std::vector<flash_chip_ID_type>> flow_chip_id_assignments;
		std::vector<std::vector<flash_die_ID_type>> flow_die_id_assignments;
		std::vector<std::vector<flash_plane_ID_type>> flow_plane_id_assignments;
		unsigned int stream_count = 0;
		for (unsigned int i = 0; i < io_flows->size(); i++)
		{
			switch (parameters->HostInterface_Type)
			{
			case HostInterface_Types::SATA:
			{
				stream_count = 1;
				std::vector<flash_channel_ID_type> channel_ids;
				flow_channel_id_assignments.push_back(channel_ids);
				for (unsigned int j = 0; j < parameters->Flash_Channel_Count; j++)
				{
					flow_channel_id_assignments[i].push_back(j);
				}
				std::vector<flash_chip_ID_type> chip_ids;
				flow_chip_id_assignments.push_back(chip_ids);
				for (unsigned int j = 0; j < parameters->Chip_No_Per_Channel; j++)
				{
					flow_chip_id_assignments[i].push_back(j);
				}
				std::vector<flash_die_ID_type> die_ids;
				flow_die_id_assignments.push_back(die_ids);
				for (unsigned int j = 0; j < parameters->Flash_Parameters.Die_No_Per_Chip; j++)
				{
					flow_die_id_assignments[i].push_back(j);
				}
				std::vector<flash_plane_ID_type> plane_ids;
				flow_plane_id_assignments.push_back(plane_ids);
				for (unsigned int j = 0; j < parameters->Flash_Parameters.Plane_No_Per_Die; j++)
				{
					flow_plane_id_assignments[i].push_back(j);
				}
				break;
			}
			case HostInterface_Types::NVME:
			{
				stream_count = (unsigned int)io_flows->size();
				std::vector<flash_channel_ID_type> channel_ids;
				flow_channel_id_assignments.push_back(channel_ids);
				for (int j = 0; j < (*io_flows)[i]->Channel_No; j++)
				{
					flow_channel_id_assignments[i].push_back((*io_flows)[i]->Channel_IDs[j]);
				}
				std::vector<flash_chip_ID_type> chip_ids;
				flow_chip_id_assignments.push_back(chip_ids);
				for (int j = 0; j < (*io_flows)[i]->Chip_No; j++)
				{
					flow_chip_id_assignments[i].push_back((*io_flows)[i]->Chip_IDs[j]);
				}
				std::vector<flash_die_ID_type> die_ids;
				flow_die_id_assignments.push_back(die_ids);
				for (int j = 0; j < (*io_flows)[i]->Die_No; j++)
				{
					flow_die_id_assignments[i].push_back((*io_flows)[i]->Die_IDs[j]);
				}
				std::vector<flash_plane_ID_type> plane_ids;
				flow_plane_id_assignments.push_back(plane_ids);
				for (int j = 0; j < (*io_flows)[i]->Plane_No; j++)
				{
					flow_plane_id_assignments[i].push_back((*io_flows)[i]->Plane_IDs[j]);
				}
				break;
			}
			default:
				break;
			}
		}

		Utils::Logical_Address_Partitioning_Unit::Allocate_logical_address_for_flows(parameters->HostInterface_Type, (unsigned int)io_flows->size(),
																					 parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel, parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
																					 flow_channel_id_assignments, flow_chip_id_assignments, flow_die_id_assignments, flow_plane_id_assignments,
																					 parameters->Flash_Parameters.Block_No_Per_Plane, parameters->Flash_Parameters.Page_No_Per_Block,
																					 parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, parameters->Overprovisioning_Ratio);
		switch (parameters->Address_Mapping)
		{
		case SSD_Components::Flash_Address_Mapping_Type::PAGE_LEVEL:
			amu = new SSD_Components::Address_Mapping_Unit_Page_Level(ftl->ID() + ".AddressMappingUnit", ftl, (SSD_Components::NVM_PHY_ONFI *)device->PHY,
																	  fbm, parameters->Ideal_Mapping_Table, parameters->CMT_Capacity, parameters->Plane_Allocation_Scheme, stream_count,
																	  parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel, parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
																	  flow_channel_id_assignments, flow_chip_id_assignments, flow_die_id_assignments, flow_plane_id_assignments,
																	  parameters->Flash_Parameters.Block_No_Per_Plane, parameters->Flash_Parameters.Page_No_Per_Block,
																	  parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, parameters->Flash_Parameters.Page_Capacity, parameters->Overprovisioning_Ratio,
																	  parameters->CMT_Sharing_Mode);
			break;
		case SSD_Components::Flash_Address_Mapping_Type::HYBRID:
			amu = new SSD_Components::Address_Mapping_Unit_Hybrid(ftl->ID() + ".AddressMappingUnit", ftl, (SSD_Components::NVM_PHY_ONFI *)device->PHY,
																  fbm, parameters->Ideal_Mapping_Table, stream_count,
																  parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel, parameters->Flash_Parameters.Die_No_Per_Chip,
																  parameters->Flash_Parameters.Plane_No_Per_Die, parameters->Flash_Parameters.Block_No_Per_Plane, parameters->Flash_Parameters.Page_No_Per_Block,
																  parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, parameters->Flash_Parameters.Page_Capacity, parameters->Overprovisioning_Ratio);
			break;
		default:
			throw std::invalid_argument("No implementation is available fo the secified address mapping strategy");
		}
		Simulator->AddObject(amu);
		ftl->Address_Mapping_Unit = amu;

		//Step 8: create GC_and_WL_unit
		double max_rho = 0;
		for (unsigned int i = 0; i < io_flows->size(); i++)
		{
			if ((*io_flows)[i]->Initial_Occupancy_Percentage > max_rho)
			{
				max_rho = (*io_flows)[i]->Initial_Occupancy_Percentage;
			}
		}
		max_rho /= 100; //Convert from percentage to a value between zero and 1
		SSD_Components::GC_and_WL_Unit_Base *gcwl;
		gcwl = new SSD_Components::GC_and_WL_Unit_Page_Level(ftl->ID() + ".GCandWLUnit", amu, fbm, tsu, (SSD_Components::NVM_PHY_ONFI *)device->PHY,
															 parameters->GC_Block_Selection_Policy, parameters->GC_Exec_Threshold, parameters->Preemptible_GC_Enabled, parameters->GC_Hard_Threshold,
															 parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel,
															 parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
															 parameters->Flash_Parameters.Block_No_Per_Plane, parameters->Flash_Parameters.Page_No_Per_Block,
															 parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, parameters->Use_Copyback_for_GC, max_rho, 10,
															 parameters->Seed++);
		Simulator->AddObject(gcwl);
		fbm->Set_GC_and_WL_Unit(gcwl);
		ftl->GC_and_WL_Unit = gcwl;

		//Step 9: create Data_Cache_Manager
		SSD_Components::Data_Cache_Manager_Base *dcm;
		SSD_Components::Caching_Mode *caching_modes = new SSD_Components::Caching_Mode[io_flows->size()];
		for (unsigned int i = 0; i < io_flows->size(); i++)
		{
			caching_modes[i] = (*io_flows)[i]->Device_Level_Data_Caching_Mode;
		}

		switch (parameters->Caching_Mechanism)
		{
		case SSD_Components::Caching_Mechanism::SIMPLE:
			dcm = new SSD_Components::Data_Cache_Manager_Flash_Simple(device->ID() + ".DataCache", NULL, ftl, (SSD_Components::NVM_PHY_ONFI *)device->PHY,
																	  parameters->Data_Cache_Capacity, parameters->Data_Cache_DRAM_Row_Size, parameters->Data_Cache_DRAM_Data_Rate,
																	  parameters->Data_Cache_DRAM_Data_Busrt_Size, parameters->Data_Cache_DRAM_tRCD, parameters->Data_Cache_DRAM_tCL, parameters->Data_Cache_DRAM_tRP,
																	  caching_modes, (unsigned int)io_flows->size(),
																	  parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, parameters->Flash_Channel_Count * parameters->Chip_No_Per_Channel * parameters->Flash_Parameters.Die_No_Per_Chip * parameters->Flash_Parameters.Plane_No_Per_Die * parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE);

			break;
		case SSD_Components::Caching_Mechanism::ADVANCED:
			dcm = new SSD_Components::Data_Cache_Manager_Flash_Advanced(device->ID() + ".DataCache", NULL, ftl, (SSD_Components::NVM_PHY_ONFI *)device->PHY,
																		parameters->Data_Cache_Capacity, parameters->Data_Cache_DRAM_Row_Size, parameters->Data_Cache_DRAM_Data_Rate,
																		parameters->Data_Cache_DRAM_Data_Busrt_Size, parameters->Data_Cache_DRAM_tRCD, parameters->Data_Cache_DRAM_tCL, parameters->Data_Cache_DRAM_tRP,
																		caching_modes, parameters->Data_Cache_Sharing_Mode, (unsigned int)io_flows->size(),
																		parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, parameters->Flash_Channel_Count * parameters->Chip_No_Per_Channel * parameters->Flash_Parameters.Die_No_Per_Chip * parameters->Flash_Parameters.Plane_No_Per_Die * parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE);

			break;
		default:
			PRINT_ERROR("Unknown data caching mechanism!")
		}

		Simulator->AddObject(dcm);
		ftl->Data_cache_manager = dcm;
		device->Cache_manager = dcm;

		//Step 10: create Host_Interface
		switch (parameters->HostInterface_Type)
		{
		case HostInterface_Types::NVME:
			device->Host_interface = new SSD_Components::Host_Interface_NVMe(device->ID() + ".HostInterface",
																			 Utils::Logical_Address_Partitioning_Unit::Get_total_device_lha_count(), parameters->IO_Queue_Depth, parameters->IO_Queue_Depth,
																			 (unsigned int)io_flows->size(), parameters->Queue_Fetch_Size, parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, dcm);
			break;
		case HostInterface_Types::SATA:
			device->Host_interface = new SSD_Components::Host_Interface_SATA(device->ID() + ".HostInterface",
																			 parameters->IO_Queue_Depth, Utils::Logical_Address_Partitioning_Unit::Get_total_device_lha_count(), parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, dcm);

			break;
		default:
			break;
		}
		Simulator->AddObject(device->Host_interface);
		dcm->Set_host_interface(device->Host_interface);
		break;
	}
	default:
		throw std::invalid_argument("Undefined NVM type specified ");
	} // switch (Memory_Type)
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x258, %rsp            # imm = 0x258
movq %rdx, 0x58(%rsp)
movq %rdi, %rbx
leaq 0x10(%rsp), %rax
movq %rax, -0x10(%rax)
leaq 0x3c807(%rip), %rsi     # 0x57588
leaq 0x3c809(%rip), %rdx     # 0x57591
movq %rsp, %rdi
callq 0xb0c6
movq %rsp, %rsi
movq %rbx, 0x28(%rsp)
movq %rbx, %rdi
callq 0x165ce
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1adb3
callq 0x7370
leaq 0x52d8e(%rip), %rax     # 0x6db48
movq 0x28(%rsp), %rcx
movq %rax, (%rcx)
leaq 0x52db7(%rip), %rax     # 0x6db80
movq %rax, 0x30(%rcx)
leaq 0x60(%rcx), %rax
movq %rax, 0x160(%rsp)
xorpd %xmm0, %xmm0
movupd %xmm0, 0x60(%rcx)
movq $0x0, 0x70(%rcx)
movq %rcx, 0x547cf(%rip)     # 0x6f5c0
callq 0x281b4
movq %rax, %rdi
movq 0x28(%rsp), %rsi
callq 0x2822a
leaq 0x54572(%rip), %rax     # 0x6f37c
movb (%rax), %al
movq 0x28(%rsp), %rcx
movb %al, 0x38(%rcx)
leaq 0x5471d(%rip), %rax     # 0x6f538
movl (%rax), %eax
movl %eax, 0x3c(%rcx)
testl %eax, %eax
jne 0x1cefb
leaq 0x545f9(%rip), %rax     # 0x6f428
movl (%rax), %eax
cmpl $0x3, %eax
je 0x1aeef
cmpl $0x2, %eax
je 0x1ae87
cmpl $0x1, %eax
jne 0x1d00b
movl $0x8, %edi
callq 0x7030
movq %rax, %r12
leaq 0x545d4(%rip), %rax     # 0x6f430
movq (%rax), %r14
movq %r14, (%r12)
movl $0x8, %edi
callq 0x7030
movq %rax, %r9
leaq 0x545d1(%rip), %rax     # 0x6f448
movq (%rax), %rax
movq %rax, 0x68(%rsp)
movq %rax, (%r9)
jmp 0x1af8e
movl $0x10, %edi
callq 0x7030
movq %rax, %r12
leaq 0x54595(%rip), %rax     # 0x6f430
movq (%rax), %rbx
movq %rbx, (%r12)
leaq 0x54597(%rip), %rax     # 0x6f440
movq (%rax), %r14
movq %r14, 0x8(%r12)
movl $0x10, %edi
callq 0x7030
movq %rax, %r9
leaq 0x54583(%rip), %rax     # 0x6f448
movq (%rax), %rax
movq %rax, (%r9)
leaq 0x54586(%rip), %rcx     # 0x6f458
movq (%rcx), %rcx
movq %rcx, 0x8(%r9)
addq %rbx, %r14
shrq %r14
addq %rax, %rcx
shrq %rcx
movq %rcx, 0x68(%rsp)
jmp 0x1af8e
movl $0x18, %edi
callq 0x7030
movq %rax, %r12
leaq 0x5452d(%rip), %rax     # 0x6f430
movq (%rax), %r14
movq %r14, (%r12)
leaq 0x54527(%rip), %rax     # 0x6f438
movq (%rax), %rbx
movq %rbx, 0x8(%r12)
leaq 0x54520(%rip), %rax     # 0x6f440
movq (%rax), %r15
movq %r15, 0x10(%r12)
movl $0x18, %edi
callq 0x7030
movq %rax, %r9
leaq 0x5450c(%rip), %rax     # 0x6f448
movq (%rax), %rsi
movq %rsi, (%r9)
leaq 0x54507(%rip), %rax     # 0x6f450
movq (%rax), %rcx
movq %rcx, 0x8(%r9)
leaq 0x54501(%rip), %rax     # 0x6f458
movq (%rax), %rdi
movq %rdi, 0x10(%r9)
addq %r14, %rbx
addq %r15, %rbx
movabsq $-0x5555555555555555, %r8 # imm = 0xAAAAAAAAAAAAAAAB
movq %rbx, %rax
mulq %r8
movq %rdx, %r14
shrq %r14
addq %rsi, %rcx
addq %rdi, %rcx
movq %rcx, %rax
mulq %r8
shrq %rdx
movq %rdx, 0x68(%rsp)
movq %r9, 0x70(%rsp)
movq %r12, 0x50(%rsp)
leaq 0x54461(%rip), %rax     # 0x6f400
movl (%rax), %edi
movq 0x28(%rsp), %rcx
movl %edi, 0x78(%rcx)
leaq 0x5445c(%rip), %rax     # 0x6f40c
movl (%rax), %eax
movl %eax, 0x7c(%rcx)
leaq 0x5459c(%rip), %rax     # 0x6f558
cmpl $0x0, (%rax)
jne 0x1cf32
shlq $0x3, %rdi
callq 0x7030
movq %rax, 0x60(%rsp)
movq %r14, 0xa8(%rsp)
leaq 0x5441e(%rip), %rax     # 0x6f400
cmpl $0x0, (%rax)
je 0x1b621
xorl %ebp, %ebp
movl $0xd1b71759, %r14d      # imm = 0xD1B71759
leaq 0x54412(%rip), %rax     # 0x6f40c
movl (%rax), %edi
shlq $0x3, %rdi
callq 0x7030
movq %rax, %rbx
leaq 0x543fd(%rip), %rax     # 0x6f40c
movl (%rax), %r13d
testl %r13d, %r13d
je 0x1b543
xorl %r12d, %r12d
movl $0x108, %edi            # imm = 0x108
callq 0x73a0
movq %rax, %r13
leaq 0x140(%rsp), %rax
movq %rax, 0x130(%rsp)
movq 0x28(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
leaq 0x130(%rsp), %r15
movq %r15, %rdi
callq 0xb036
movq %r15, %rdi
leaq 0x3c55f(%rip), %rsi     # 0x575c4
callq 0x7690
leaq 0x100(%rsp), %rsi
movq %rsi, 0xf0(%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1b09e
movq %rdx, 0xf0(%rsp)
movq (%rcx), %rdx
movq %rdx, 0x100(%rsp)
jmp 0x1b0a6
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rdx, 0xf8(%rsp)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movl $0x1, %eax
cmpq $0xa, %rbp
jb 0x1b10b
movl $0x4, %eax
movl %ebp, %ecx
cmpl $0x63, %ecx
jbe 0x1b104
cmpl $0x3e7, %ecx            # imm = 0x3E7
jbe 0x1b109
cmpl $0x2710, %ecx           # imm = 0x2710
jb 0x1b10b
movl %ecx, %edx
imulq %r14, %rdx
shrq $0x2d, %rdx
addl $0x4, %eax
cmpl $0x1869f, %ecx          # imm = 0x1869F
movl %edx, %ecx
ja 0x1b0d3
addl $-0x3, %eax
jmp 0x1b10b
addl $-0x2, %eax
jmp 0x1b10b
decl %eax
movl %eax, %esi
leaq 0xe0(%rsp), %rax
movq %rax, 0xd0(%rsp)
leaq 0xd0(%rsp), %rdi
xorl %edx, %edx
callq 0x7420
movq 0xd0(%rsp), %rdi
movl 0xd8(%rsp), %esi
movl %ebp, %edx
callq 0xafc9
movq 0xf0(%rsp), %rcx
movl $0xf, %esi
leaq 0x100(%rsp), %rax
cmpq %rax, %rcx
je 0x1b164
movq 0x100(%rsp), %rsi
movq 0xf8(%rsp), %r8
movq 0xd8(%rsp), %rdx
leaq (%rdx,%r8), %rax
cmpq %rsi, %rax
jbe 0x1b1a1
movl $0xf, %esi
leaq 0xe0(%rsp), %rdi
cmpq %rdi, 0xd0(%rsp)
je 0x1b19c
movq 0xe0(%rsp), %rsi
cmpq %rsi, %rax
jbe 0x1b1b8
movq 0xd0(%rsp), %rsi
leaq 0xf0(%rsp), %rdi
callq 0x7130
jmp 0x1b1c9
leaq 0xd0(%rsp), %rdi
xorl %esi, %esi
xorl %edx, %edx
callq 0x73e0
leaq 0xc0(%rsp), %rsi
movq %rsi, 0xb0(%rsp)
movq (%rax), %rdx
leaq 0x10(%rax), %rcx
cmpq %rcx, %rdx
je 0x1b1fa
movq %rdx, 0xb0(%rsp)
movq (%rcx), %rdx
movq %rdx, 0xc0(%rsp)
jmp 0x1b202
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq %rax, %rdx
addq $0x8, %rdx
movq 0x8(%rax), %rsi
movq %rsi, 0xb8(%rsp)
movq %rcx, (%rax)
movq $0x0, (%rdx)
movb $0x0, (%rcx)
leaq 0xb0(%rsp), %rdi
leaq 0x3c39d(%rip), %rsi     # 0x575ce
callq 0x7690
leaq 0x40(%rsp), %rsi
movq %rsi, 0x30(%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1b25e
movq %rdx, 0x30(%rsp)
movq (%rcx), %rdx
movq %rdx, 0x40(%rsp)
jmp 0x1b266
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rdx, 0x38(%rsp)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movl $0x1, %eax
cmpq $0xa, %r12
jb 0x1b2c9
movl $0x4, %eax
movl %r12d, %ecx
cmpl $0x63, %ecx
jbe 0x1b2c2
cmpl $0x3e7, %ecx            # imm = 0x3E7
jbe 0x1b2c7
cmpl $0x2710, %ecx           # imm = 0x2710
jb 0x1b2c9
movl %ecx, %edx
imulq %r14, %rdx
shrq $0x2d, %rdx
addl $0x4, %eax
cmpl $0x1869f, %ecx          # imm = 0x1869F
movl %edx, %ecx
ja 0x1b291
addl $-0x3, %eax
jmp 0x1b2c9
addl $-0x2, %eax
jmp 0x1b2c9
decl %eax
movl %eax, %esi
leaq 0x90(%rsp), %rax
movq %rax, 0x80(%rsp)
leaq 0x80(%rsp), %rdi
xorl %edx, %edx
callq 0x7420
movq 0x80(%rsp), %rdi
movl 0x88(%rsp), %esi
movl %r12d, %edx
callq 0xafc9
movq 0x30(%rsp), %rcx
movl $0xf, %esi
leaq 0x40(%rsp), %rax
cmpq %rax, %rcx
je 0x1b31a
movq 0x40(%rsp), %rsi
movq 0x38(%rsp), %r8
movq 0x88(%rsp), %rdx
leaq (%rdx,%r8), %rax
cmpq %rsi, %rax
jbe 0x1b354
movl $0xf, %esi
leaq 0x90(%rsp), %rdi
cmpq %rdi, 0x80(%rsp)
je 0x1b34f
movq 0x90(%rsp), %rsi
cmpq %rsi, %rax
jbe 0x1b368
movq 0x80(%rsp), %rsi
leaq 0x30(%rsp), %rdi
callq 0x7130
jmp 0x1b379
leaq 0x80(%rsp), %rdi
xorl %esi, %esi
xorl %edx, %edx
callq 0x73e0
leaq 0x10(%rsp), %rsi
movq %rsi, (%rsp)
movq (%rax), %rdx
leaq 0x10(%rax), %rcx
cmpq %rcx, %rdx
je 0x1b39c
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1b3a4
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq %rax, %rdx
addq $0x8, %rdx
movq 0x8(%rax), %rsi
movq %rsi, 0x8(%rsp)
movq %rcx, (%rax)
movq $0x0, (%rdx)
movb $0x0, (%rcx)
leaq 0x54060(%rip), %rax     # 0x6f428
movl (%rax), %r8d
leaq 0x540ae(%rip), %rax     # 0x6f480
movl (%rax), %r9d
leaq 0x540a8(%rip), %rax     # 0x6f484
movl (%rax), %eax
leaq 0x540a3(%rip), %rcx     # 0x6f488
movl (%rcx), %ecx
leaq 0x5409e(%rip), %rdx     # 0x6f48c
movl (%rdx), %edx
leaq 0x54069(%rip), %rsi     # 0x6f460
movq (%rsi), %rsi
leaq 0x54077(%rip), %rdi     # 0x6f478
movq (%rdi), %rdi
leaq 0x54065(%rip), %r10     # 0x6f470
movq (%r10), %r10
subq $0x60, %rsp
xorpd %xmm0, %xmm0
movupd %xmm0, 0x48(%rsp)
movq %r10, 0x38(%rsp)
movq %rdi, 0x30(%rsp)
movq %rsi, 0x28(%rsp)
movq 0xd0(%rsp), %rsi
movq %rsi, 0x20(%rsp)
movq 0xb0(%rsp), %rsi
movq %rsi, 0x18(%rsp)
movl %edx, 0x10(%rsp)
movl %ecx, 0x8(%rsp)
movl %eax, (%rsp)
movq $0x14, 0x40(%rsp)
movq %r13, %rdi
leaq 0x60(%rsp), %rsi
movl %ebp, %edx
movl %r12d, %ecx
callq 0x264c0
addq $0x60, %rsp
movq %r13, (%rbx,%r12,8)
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1b486
callq 0x7370
movq 0x80(%rsp), %rdi
leaq 0x90(%rsp), %rax
cmpq %rax, %rdi
je 0x1b4a0
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1b4b4
callq 0x7370
movq 0xb0(%rsp), %rdi
leaq 0xc0(%rsp), %rax
cmpq %rax, %rdi
je 0x1b4ce
callq 0x7370
movq 0xd0(%rsp), %rdi
leaq 0xe0(%rsp), %rax
cmpq %rax, %rdi
je 0x1b4e8
callq 0x7370
movq 0xf0(%rsp), %rdi
leaq 0x100(%rsp), %rax
cmpq %rax, %rdi
je 0x1b502
callq 0x7370
movq 0x130(%rsp), %rdi
leaq 0x140(%rsp), %rax
cmpq %rax, %rdi
je 0x1b51c
callq 0x7370
callq 0x281b4
movq (%rbx,%r12,8), %rsi
movq %rax, %rdi
callq 0x2822a
incq %r12
leaq 0x53ed5(%rip), %rax     # 0x6f40c
movl (%rax), %r13d
cmpq %r13, %r12
jb 0x1b01e
movl $0x158, %edi            # imm = 0x158
callq 0x73a0
movq %rax, %r12
leaq 0x53ead(%rip), %rax     # 0x6f404
movl (%rax), %r8d
leaq 0x53ea7(%rip), %rax     # 0x6f408
movl (%rax), %eax
cvtsi2sd %rax, %xmm0
movsd 0x3c010(%rip), %xmm1    # 0x57580
divsd %xmm0, %xmm1
cvttsd2si %xmm1, %rax
movq %rax, %rcx
subsd 0x39acc(%rip), %xmm1    # 0x55050
cvttsd2si %xmm1, %r9
sarq $0x3f, %rcx
andq %rcx, %r9
orq %rax, %r9
addq %r9, %r9
movq %r12, %rdi
movl %ebp, %esi
movl %r13d, %edx
movq %rbx, %rcx
movl $0xf, %eax
pushq %rax
pushq $0x6
pushq $0x12c                  # imm = 0x12C
movl $0x64, %r10d
pushq %r10
pushq %rax
pushq %rax
pushq %rax
pushq $0x46
pushq $0x19
pushq %r10
movl $0x14, %eax
pushq %rax
pushq %rax
pushq $0x1f4                  # imm = 0x1F4
pushq %r9
callq 0x48d50
addq $0x70, %rsp
movq 0x60(%rsp), %rax
movq %r12, (%rax,%rbp,8)
movq %r12, (%rsp)
movq 0x28(%rsp), %rax
movq 0x68(%rax), %rsi
cmpq 0x70(%rax), %rsi
je 0x1b5fc
movq %r12, (%rsi)
addq $0x8, 0x68(%rax)
jmp 0x1b60c
movq 0x160(%rsp), %rdi
movq %rsp, %rdx
callq 0x1ddfc
incq %rbp
leaq 0x53dea(%rip), %rax     # 0x6f400
movl (%rax), %eax
cmpq %rax, %rbp
jb 0x1aff3
movl $0xb8, %edi
callq 0x73a0
movq 0xa8(%rsp), %r13
movq %rax, %r12
leaq 0x40(%rsp), %rax
movq %rax, -0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
leaq 0x30(%rsp), %rdi
callq 0xb036
leaq 0x3bf75(%rip), %rsi     # 0x575d5
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x10(%rsp), %rsi
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1b690
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1b698
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rsp, %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
leaq 0x53d47(%rip), %rax     # 0x6f400
movl (%rax), %ecx
leaq 0x53d4a(%rip), %rax     # 0x6f40c
movl (%rax), %r8d
leaq 0x53db4(%rip), %rax     # 0x6f480
movl (%rax), %r9d
leaq 0x53dae(%rip), %rax     # 0x6f484
movl (%rax), %eax
subq $0x8, %rsp
movq %r12, %rdi
movq 0x68(%rsp), %rdx
pushq %rax
callq 0x45c80
addq $0x10, %rsp
movq 0x28(%rsp), %rax
movq %r12, 0x58(%rax)
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1b70a
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
leaq 0x53d66(%rip), %rbx     # 0x6f484
je 0x1b725
callq 0x7370
callq 0x281b4
movq 0x28(%rsp), %rcx
movq 0x58(%rcx), %rsi
movq %rax, %rdi
callq 0x2822a
movq 0x50(%rsp), %rdi
callq 0x7480
movq 0x70(%rsp), %rdi
callq 0x7480
movl $0xb8, %edi
callq 0x73a0
movq %rax, %rcx
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x28(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
movq %rcx, 0x50(%rsp)
callq 0xb036
leaq 0x3be9e(%rip), %rsi     # 0x57628
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x10(%rsp), %rsi
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1b7ba
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1b7c2
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rsp, %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
leaq 0x53c1d(%rip), %rax     # 0x6f400
movl (%rax), %ecx
leaq 0x53c20(%rip), %rax     # 0x6f40c
movl (%rax), %r8d
leaq 0x53c8a(%rip), %rax     # 0x6f480
movl (%rax), %r9d
movl (%rbx), %eax
leaq 0x53c86(%rip), %rdx     # 0x6f488
movl (%rdx), %r10d
leaq 0x53c80(%rip), %rdx     # 0x6f48c
movl (%rdx), %r11d
leaq 0x53c7a(%rip), %rdx     # 0x6f490
movl (%rdx), %r14d
shrl $0x9, %r14d
leaq 0x53b9c(%rip), %rdx     # 0x6f3c0
movsd (%rdx), %xmm0
leaq 0x53b49(%rip), %rdi     # 0x6f378
movl (%rdi), %r15d
leal 0x1(%r15), %edx
movl %edx, (%rdi)
leaq 0x53c29(%rip), %rbx     # 0x6f468
movl (%rbx), %r12d
movq 0x50(%rsp), %rdi
xorl %edx, %edx
pushq %r15
pushq %r12
pushq 0x78(%rsp)
pushq %r13
pushq %r14
pushq %r11
pushq %r10
pushq %rax
callq 0x36c74
addq $0x40, %rsp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1b876
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
movq 0x50(%rsp), %r14
je 0x1b88f
callq 0x7370
movq 0x28(%rsp), %rax
movq 0x58(%rax), %rax
movq %rax, 0x58(%r14)
callq 0x281b4
movq %rax, %rdi
movq %r14, %rsi
callq 0x2822a
movq 0x28(%rsp), %rax
movq %r14, 0x50(%rax)
leaq 0x53b70(%rip), %rax     # 0x6f42c
movl (%rax), %r14d
movl %r14d, %ebp
andl $-0x2, %ebp
decl %r14d
leaq 0x53c81(%rip), %rax     # 0x6f550
movl (%rax), %eax
testl %eax, %eax
je 0x1b954
cmpl $0x1, %eax
jne 0x1cf53
movl $0x108, %edi            # imm = 0x108
callq 0x73a0
movq %rax, 0x70(%rsp)
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x50(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xb036
leaq 0x3bd17(%rip), %rsi     # 0x5762d
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x53b5d(%rip), %rdi     # 0x6f484
leaq 0x10(%rsp), %rsi
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1ba8c
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1ba94
movl $0xe8, %edi
callq 0x73a0
movq %rax, 0x70(%rsp)
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x50(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xb036
leaq 0x3bca1(%rip), %rsi     # 0x5762d
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x53ae7(%rip), %rdi     # 0x6f484
leaq 0x10(%rsp), %rsi
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1b9c3
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1b9cb
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
xorl %r10d, %r10d
cmpl $0x2, %r14d
setb %r10b
xorl %r11d, %r11d
cmpl $0x2, %ebp
sete %r11b
movq 0x8(%rax), %rdx
movq %rsp, %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x58(%rax), %rcx
leaq 0x539f6(%rip), %rax     # 0x6f400
movl (%rax), %r8d
leaq 0x539f8(%rip), %rax     # 0x6f40c
movl (%rax), %r9d
leaq 0x53a62(%rip), %rax     # 0x6f480
movl (%rax), %eax
movl (%rdi), %r14d
leaq 0x539ce(%rip), %r15     # 0x6f3f8
leaq 0x539b7(%rip), %r12     # 0x6f3e8
leaq 0x539b8(%rip), %r13     # 0x6f3f0
subq $0x8, %rsp
movq 0x78(%rsp), %rdi
movq 0x58(%rsp), %rdx
pushq %r10
pushq %r11
pushq (%r13)
pushq (%r12)
pushq (%r15)
pushq %r14
pushq %rax
callq 0x4b4a8
addq $0x40, %rsp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1ba74
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1bb51
jmp 0x1bb4c
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
xorl %r10d, %r10d
cmpl $0x2, %r14d
setb %r10b
xorl %r11d, %r11d
cmpl $0x2, %ebp
sete %r11b
movq 0x8(%rax), %rdx
movq %rsp, %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x58(%rax), %rcx
leaq 0x5392d(%rip), %rax     # 0x6f400
movl (%rax), %r8d
leaq 0x5392f(%rip), %rax     # 0x6f40c
movl (%rax), %r9d
leaq 0x53999(%rip), %rax     # 0x6f480
movl (%rax), %eax
movl (%rdi), %r14d
leaq 0x53905(%rip), %r15     # 0x6f3f8
leaq 0x538ee(%rip), %r12     # 0x6f3e8
leaq 0x538ef(%rip), %r13     # 0x6f3f0
subq $0x8, %rsp
movq 0x78(%rsp), %rdi
movq 0x58(%rsp), %rdx
pushq %r10
pushq %r11
pushq (%r13)
pushq (%r12)
pushq (%r15)
pushq %r14
pushq %rax
callq 0x4e50c
addq $0x40, %rsp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1bb3d
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1bb51
callq 0x7370
callq 0x281b4
movq %rax, %rdi
movq 0x70(%rsp), %rsi
callq 0x2822a
movq 0x50(%rsp), %rax
movq 0x70(%rsp), %rcx
movq %rcx, 0x50(%rax)
movl $0x38, %edi
callq 0x73a0
movq %rax, %r15
movq 0x58(%rsp), %r14
movq 0x8(%r14), %rcx
subq (%r14), %rcx
movl (%rbx), %edx
shrq $0x3, %rcx
leaq 0x53869(%rip), %rax     # 0x6f400
movl (%rax), %r8d
leaq 0x5386b(%rip), %rax     # 0x6f40c
movl (%rax), %r9d
leaq 0x538d5(%rip), %rax     # 0x6f480
movl (%rax), %eax
leaq 0x538d0(%rip), %r12     # 0x6f484
movl (%r12), %r10d
leaq 0x538c9(%rip), %rsi     # 0x6f488
movl (%rsi), %r11d
leaq 0x538c3(%rip), %rsi     # 0x6f48c
movl (%rsi), %ebx
xorl %r13d, %r13d
movq %r15, %rdi
xorl %esi, %esi
pushq %rbx
pushq %r11
pushq %r10
pushq %rax
callq 0x3ce2c
addq $0x20, %rsp
movq 0x50(%rsp), %rax
movq %r15, 0x40(%rax)
movq %r13, 0xc0(%rsp)
xorpd %xmm0, %xmm0
movapd %xmm0, 0xb0(%rsp)
movq %r13, 0x100(%rsp)
movapd %xmm0, 0xf0(%rsp)
movq %r13, 0x140(%rsp)
movapd %xmm0, 0x130(%rsp)
movq %r13, 0xe0(%rsp)
movapd %xmm0, 0xd0(%rsp)
movq 0x8(%r14), %rax
movq (%r14), %rcx
movq %rax, %rbp
subq %rcx, %rbp
sarq $0x3, %rbp
cmpq %rcx, %rax
movq %r15, 0xa8(%rsp)
movl $0x0, %ecx
je 0x1c194
xorl %ebx, %ebx
leaq 0x5371d(%rip), %r15     # 0x6f380
leaq 0xb0(%rsp), %r13
leaq 0x30(%rsp), %r14
xorl %ecx, %ecx
movl (%r15), %eax
cmpl $0x1, %eax
je 0x1bee4
testl %eax, %eax
jne 0x1c179
xorpd %xmm0, %xmm0
movapd %xmm0, (%rsp)
movq $0x0, 0x10(%rsp)
movq %r13, %rdi
movq %rsp, %rsi
callq 0x1dcba
movl $0x0, 0x30(%rsp)
leaq 0x5374e(%rip), %rax     # 0x6f400
cmpl $0x0, (%rax)
leaq 0x80(%rsp), %rbp
je 0x1bd04
xorl %eax, %eax
movq 0xb0(%rsp), %rcx
leaq (%rbx,%rbx,2), %rdx
leaq (%rcx,%rdx,8), %rdi
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1bce7
movl %eax, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1bcef
movq %r14, %rdx
callq 0x1e1ac
movl 0x30(%rsp), %eax
incl %eax
movl %eax, 0x30(%rsp)
leaq 0x53700(%rip), %rcx     # 0x6f400
cmpl (%rcx), %eax
jb 0x1bcc1
xorpd %xmm0, %xmm0
movapd %xmm0, 0x30(%rsp)
movq $0x0, 0x40(%rsp)
leaq 0xf0(%rsp), %rdi
movq %r14, %rsi
callq 0x1dcba
movl $0x0, 0x80(%rsp)
leaq 0x536d3(%rip), %rax     # 0x6f40c
cmpl $0x0, (%rax)
je 0x1bd89
xorl %eax, %eax
movq 0xf0(%rsp), %rcx
leaq (%rbx,%rbx,2), %rdx
leaq (%rcx,%rdx,8), %rdi
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1bd66
movl %eax, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1bd6e
movq %rbp, %rdx
callq 0x1e1ac
movl 0x80(%rsp), %eax
incl %eax
movl %eax, 0x80(%rsp)
leaq 0x53687(%rip), %rcx     # 0x6f40c
cmpl (%rcx), %eax
jb 0x1bd40
xorpd %xmm0, %xmm0
movapd %xmm0, 0x80(%rsp)
movq $0x0, 0x90(%rsp)
leaq 0x130(%rsp), %rdi
movq %rbp, %rsi
callq 0x1dcba
movl $0x0, 0x110(%rsp)
leaq 0x536bc(%rip), %rax     # 0x6f480
cmpl $0x0, (%rax)
leaq 0x110(%rsp), %rbp
je 0x1be1c
xorl %eax, %eax
movq 0x130(%rsp), %rcx
leaq (%rbx,%rbx,2), %rdx
leaq (%rcx,%rdx,8), %rdi
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1bdf9
movl %eax, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1be01
movq %rbp, %rdx
callq 0x1e1ac
movl 0x110(%rsp), %eax
incl %eax
movl %eax, 0x110(%rsp)
leaq 0x53668(%rip), %rcx     # 0x6f480
cmpl (%rcx), %eax
jb 0x1bdd3
xorpd %xmm0, %xmm0
movapd %xmm0, 0x110(%rsp)
movq $0x0, 0x120(%rsp)
leaq 0xd0(%rsp), %rdi
movq %rbp, %rsi
callq 0x1dcba
movl $0x0, 0x7c(%rsp)
cmpl $0x0, (%r12)
leaq 0x7c(%rsp), %rbp
je 0x1be99
xorl %eax, %eax
movq 0xd0(%rsp), %rcx
leaq (%rbx,%rbx,2), %rdx
leaq (%rcx,%rdx,8), %rdi
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1be81
movl %eax, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1be89
movq %rbp, %rdx
callq 0x1e1ac
movl 0x7c(%rsp), %eax
incl %eax
movl %eax, 0x7c(%rsp)
cmpl (%r12), %eax
jb 0x1be5b
movq 0x110(%rsp), %rdi
testq %rdi, %rdi
je 0x1beab
callq 0x7370
movq 0x80(%rsp), %rdi
testq %rdi, %rdi
je 0x1bebd
callq 0x7370
movq 0x30(%rsp), %rdi
testq %rdi, %rdi
je 0x1becc
callq 0x7370
movq (%rsp), %rdi
testq %rdi, %rdi
je 0x1beda
callq 0x7370
movl $0x1, %ecx
jmp 0x1c179
xorpd %xmm0, %xmm0
movapd %xmm0, (%rsp)
movq $0x0, 0x10(%rsp)
movq %r13, %rdi
movq %rsp, %rsi
callq 0x1dcba
movq 0x58(%rsp), %rax
movq (%rax), %rax
movq (%rax,%rbx,8), %rax
cmpl $0x0, 0x3c(%rax)
jle 0x1bf69
leaq (%rbx,%rbx,2), %r15
xorl %r13d, %r13d
xorl %r12d, %r12d
movq 0xb0(%rsp), %rcx
leaq (%rcx,%r15,8), %rdi
movq 0x18(%rax), %rdx
addq %r13, %rdx
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1bf48
movl (%rdx), %eax
movl %eax, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1bf4d
callq 0x1e1ac
incq %r12
movq 0x58(%rsp), %rax
movq (%rax), %rax
movq (%rax,%rbx,8), %rax
movslq 0x3c(%rax), %rcx
addq $0x4, %r13
cmpq %rcx, %r12
jl 0x1bf1d
xorpd %xmm0, %xmm0
movapd %xmm0, 0x30(%rsp)
movq $0x0, 0x40(%rsp)
leaq 0xf0(%rsp), %rdi
movq %r14, %rsi
callq 0x1dcba
movq 0x58(%rsp), %rax
movq (%rax), %rax
movq (%rax,%rbx,8), %rax
cmpl $0x0, 0x40(%rax)
jle 0x1bff4
xorl %r15d, %r15d
xorl %r13d, %r13d
movq 0xf0(%rsp), %rcx
leaq (%rbx,%rbx,2), %rdx
leaq (%rcx,%rdx,8), %rdi
movq 0x20(%rax), %rdx
addq %r15, %rdx
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1bfd3
movl (%rdx), %eax
movl %eax, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1bfd8
callq 0x1e1ac
incq %r13
movq 0x58(%rsp), %rax
movq (%rax), %rax
movq (%rax,%rbx,8), %rax
movslq 0x40(%rax), %rcx
addq $0x4, %r15
cmpq %rcx, %r13
jl 0x1bfa4
xorpd %xmm0, %xmm0
movapd %xmm0, 0x80(%rsp)
movq $0x0, 0x90(%rsp)
leaq 0x130(%rsp), %rdi
leaq 0x80(%rsp), %rsi
callq 0x1dcba
movq 0x58(%rsp), %rax
movq (%rax), %rax
movq (%rax,%rbx,8), %rax
cmpl $0x0, 0x44(%rax)
leaq 0x5344b(%rip), %r12     # 0x6f484
jle 0x1c091
xorl %r15d, %r15d
xorl %r13d, %r13d
movq 0x130(%rsp), %rcx
leaq (%rbx,%rbx,2), %rdx
leaq (%rcx,%rdx,8), %rdi
movq 0x28(%rax), %rdx
addq %r15, %rdx
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1c070
movl (%rdx), %eax
movl %eax, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1c075
callq 0x1e1ac
incq %r13
movq 0x58(%rsp), %rax
movq (%rax), %rax
movq (%rax,%rbx,8), %rax
movslq 0x44(%rax), %rcx
addq $0x4, %r15
cmpq %rcx, %r13
jl 0x1c041
xorpd %xmm0, %xmm0
movapd %xmm0, 0x110(%rsp)
movq $0x0, 0x120(%rsp)
leaq 0xd0(%rsp), %rdi
leaq 0x110(%rsp), %rsi
callq 0x1dcba
movq 0x58(%rsp), %rax
movq (%rax), %rax
movq (%rax,%rbx,8), %rax
cmpl $0x0, 0x48(%rax)
jle 0x1c127
xorl %r15d, %r15d
xorl %r13d, %r13d
movq 0xd0(%rsp), %rcx
leaq (%rbx,%rbx,2), %rdx
leaq (%rcx,%rdx,8), %rdi
movq 0x30(%rax), %rdx
addq %r15, %rdx
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1c106
movl (%rdx), %eax
movl %eax, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1c10b
callq 0x1e1ac
incq %r13
movq 0x58(%rsp), %rax
movq (%rax), %rax
movq (%rax,%rbx,8), %rax
movslq 0x48(%rax), %rcx
addq $0x4, %r15
cmpq %rcx, %r13
jl 0x1c0d7
movq 0x110(%rsp), %rdi
testq %rdi, %rdi
je 0x1c139
callq 0x7370
movq 0x80(%rsp), %rdi
testq %rdi, %rdi
leaq 0x53235(%rip), %r15     # 0x6f380
leaq 0xb0(%rsp), %r13
je 0x1c15a
callq 0x7370
movq 0x30(%rsp), %rdi
testq %rdi, %rdi
je 0x1c169
callq 0x7370
movq (%rsp), %rdi
testq %rdi, %rdi
je 0x1c177
callq 0x7370
movl %ebp, %ecx
incl %ebx
movq 0x58(%rsp), %rax
movq 0x8(%rax), %rbp
subq (%rax), %rbp
sarq $0x3, %rbp
cmpq %rbx, %rbp
ja 0x1bc72
movq %rcx, 0xa0(%rsp)
leaq 0x531dd(%rip), %rax     # 0x6f380
movl (%rax), %r14d
leaq 0x53253(%rip), %rax     # 0x6f400
movl (%rax), %eax
movl %eax, 0x60(%rsp)
leaq 0x53252(%rip), %rax     # 0x6f40c
movq %r12, %rcx
movl (%rax), %r12d
leaq 0x532b9(%rip), %rax     # 0x6f480
movl (%rax), %r13d
movl (%rcx), %eax
movl %eax, 0x68(%rsp)
leaq 0x240(%rsp), %rbx
leaq 0xb0(%rsp), %rsi
movq %rbx, %rdi
callq 0x1dce6
leaq 0x1f8(%rsp), %rdi
leaq 0xf0(%rsp), %rsi
callq 0x1dce6
leaq 0x1e0(%rsp), %rdi
leaq 0x130(%rsp), %rsi
callq 0x1dce6
leaq 0x228(%rsp), %r15
leaq 0xd0(%rsp), %rsi
movq %r15, %rdi
callq 0x1dce6
leaq 0x53257(%rip), %rax     # 0x6f488
movl (%rax), %eax
leaq 0x53252(%rip), %rcx     # 0x6f48c
movl (%rcx), %r10d
leaq 0x5324c(%rip), %rcx     # 0x6f490
movl (%rcx), %r11d
shrl $0x9, %r11d
leaq 0x5316e(%rip), %rcx     # 0x6f3c0
movsd (%rcx), %xmm0
subq $0x8, %rsp
movl %r14d, %edi
movl %ebp, %esi
movl 0x68(%rsp), %edx
movl %r12d, %ecx
movl %r13d, %r8d
movl 0x70(%rsp), %r9d
pushq %r11
pushq %r10
pushq %rax
pushq %r15
leaq 0x208(%rsp), %rax
pushq %rax
leaq 0x228(%rsp), %rax
pushq %rax
pushq %rbx
callq 0x52db8
addq $0x40, %rsp
leaq 0x228(%rsp), %rdi
callq 0x1dd78
leaq 0x1e0(%rsp), %rdi
callq 0x1dd78
leaq 0x1f8(%rsp), %rdi
callq 0x1dd78
leaq 0x240(%rsp), %rdi
callq 0x1dd78
leaq 0x53274(%rip), %rax     # 0x6f540
movl (%rax), %eax
testl %eax, %eax
je 0x1c35b
cmpl $0x1, %eax
jne 0x1cf87
movl $0xa8, %edi
callq 0x73a0
movq %rax, 0x60(%rsp)
movq %rsp, %rdi
leaq 0x10(%rsp), %rax
movq %rax, (%rdi)
movq 0x50(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xb036
leaq 0x3b36f(%rip), %rsi     # 0x57684
movq %rsp, %rdi
callq 0x7690
leaq 0x53160(%rip), %rdi     # 0x6f484
leaq 0x188(%rsp), %rbx
movq %rbx, -0x10(%rbx)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1c5be
movq %rdx, 0x178(%rsp)
movq (%rcx), %rdx
movq %rdx, 0x188(%rsp)
jmp 0x1c5c6
movl $0xc8, %edi
callq 0x73a0
movq %rax, 0x60(%rsp)
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x50(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xb036
leaq 0x3b2f1(%rip), %rsi     # 0x57684
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x10(%rsp), %rsi
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1c3c3
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1c3cb
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rdx, 0x8(%rsp)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x58(%rax), %rax
movq %rax, 0x68(%rsp)
leaq 0x5314c(%rip), %rax     # 0x6f544
movb (%rax), %al
movb %al, 0x158(%rsp)
leaq 0x52fb0(%rip), %rax     # 0x6f3b8
movl (%rax), %r13d
leaq 0x5313a(%rip), %rax     # 0x6f54c
movl (%rax), %ebx
leaq 0x52fe5(%rip), %rax     # 0x6f400
movl (%rax), %r12d
leaq 0x52fe7(%rip), %rax     # 0x6f40c
movl (%rax), %ebp
leaq 0x53052(%rip), %rax     # 0x6f480
movl (%rax), %r14d
leaq 0x5304c(%rip), %rax     # 0x6f484
movl (%rax), %r15d
leaq 0x1c8(%rsp), %rdi
leaq 0xb0(%rsp), %rsi
callq 0x1dce6
leaq 0x1b0(%rsp), %rdi
leaq 0xf0(%rsp), %rsi
callq 0x1dce6
leaq 0x198(%rsp), %rdi
leaq 0x130(%rsp), %rsi
callq 0x1dce6
movq %r15, 0x168(%rsp)
movq %rbx, 0x150(%rsp)
movq %r13, 0x170(%rsp)
leaq 0x210(%rsp), %r13
leaq 0xd0(%rsp), %rsi
movq %r13, %rdi
callq 0x1dce6
leaq 0x52fd7(%rip), %rax     # 0x6f488
movl (%rax), %eax
leaq 0x52fd2(%rip), %rcx     # 0x6f48c
movl (%rcx), %r10d
leaq 0x52fcc(%rip), %rcx     # 0x6f490
movl (%rcx), %ebx
movl %ebx, %r11d
shrl $0x9, %r11d
leaq 0x52eec(%rip), %rcx     # 0x6f3c0
movsd (%rcx), %xmm0
leaq 0x53069(%rip), %rcx     # 0x6f548
movl (%rcx), %r15d
subq $0x8, %rsp
movzbl 0x160(%rsp), %r9d
leaq 0x8(%rsp), %rsi
movq 0x68(%rsp), %rdi
movq 0x58(%rsp), %rdx
movq 0x70(%rsp), %rcx
movq 0xb0(%rsp), %r8
pushq $0x1
pushq %r15
pushq %rbx
pushq %r11
pushq %r10
pushq %rax
pushq %r13
leaq 0x1d8(%rsp), %rax
pushq %rax
leaq 0x1f8(%rsp), %rax
pushq %rax
leaq 0x218(%rsp), %rax
pushq %rax
pushq 0x1c0(%rsp)
pushq %r14
pushq %rbp
pushq %r12
pushq 0x118(%rsp)
pushq 0x1d0(%rsp)
pushq 0x1f8(%rsp)
callq 0x2a392
addq $0x90, %rsp
leaq 0x210(%rsp), %rdi
callq 0x1dd78
leaq 0x198(%rsp), %rdi
callq 0x1dd78
leaq 0x1b0(%rsp), %rdi
callq 0x1dd78
leaq 0x1c8(%rsp), %rdi
callq 0x1dd78
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1c5a6
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1c6a5
jmp 0x1c6a0
movupd (%rcx), %xmm0
movupd %xmm0, (%rbx)
movq 0x8(%rax), %rdx
leaq 0x178(%rsp), %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x58(%rax), %rcx
leaq 0x52f4f(%rip), %rax     # 0x6f544
movzbl (%rax), %r9d
leaq 0x52e00(%rip), %rax     # 0x6f400
movl (%rax), %eax
leaq 0x52e03(%rip), %rdx     # 0x6f40c
movl (%rdx), %r10d
leaq 0x52e6d(%rip), %rdx     # 0x6f480
movl (%rdx), %r11d
movl (%rdi), %r14d
leaq 0x52e68(%rip), %rdx     # 0x6f488
movl (%rdx), %r15d
leaq 0x52e62(%rip), %rdx     # 0x6f48c
movl (%rdx), %r12d
leaq 0x52e5c(%rip), %rdx     # 0x6f490
movl (%rdx), %r13d
leaq 0x52d82(%rip), %rdx     # 0x6f3c0
movsd (%rdx), %xmm0
movl %r13d, %ebp
shrl $0x9, %ebp
subq $0x8, %rsp
movq 0x68(%rsp), %rdi
movq 0x58(%rsp), %rdx
movq 0xb0(%rsp), %r8
pushq $0x1
pushq $0x0
pushq %r13
pushq %rbp
pushq %r12
pushq %r15
pushq %r14
pushq %r11
pushq %r10
pushq %rax
pushq 0xf8(%rsp)
callq 0x293f8
addq $0x60, %rsp
movq 0x178(%rsp), %rdi
cmpq %rbx, %rdi
je 0x1c692
callq 0x7370
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1c6a5
callq 0x7370
callq 0x281b4
movq %rax, %rdi
movq 0x60(%rsp), %rsi
callq 0x2822a
movq 0x50(%rsp), %rbx
movq 0x60(%rsp), %rax
movq %rax, 0x38(%rbx)
movq 0x58(%rsp), %rcx
movq (%rcx), %rax
movq 0x8(%rcx), %rcx
subq %rax, %rcx
je 0x1c70a
sarq $0x3, %rcx
xorpd %xmm0, %xmm0
xorl %edx, %edx
leaq 0x52d9d(%rip), %r14     # 0x6f484
movq (%rax,%rdx,8), %rsi
movl 0x38(%rsi), %esi
xorps %xmm1, %xmm1
cvtsi2sd %rsi, %xmm1
maxsd %xmm0, %xmm1
incq %rdx
movl %edx, %esi
movapd %xmm1, %xmm0
cmpq %rsi, %rcx
ja 0x1c6e7
jmp 0x1c715
xorpd %xmm1, %xmm1
leaq 0x52d6f(%rip), %r14     # 0x6f484
movsd %xmm1, 0x68(%rsp)
movl $0x118, %edi            # imm = 0x118
callq 0x73a0
movq %rax, %r15
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x8(%rbx), %rsi
movq 0x10(%rbx), %rdx
addq %rsi, %rdx
movq %r15, 0xa0(%rsp)
callq 0xb036
leaq 0x3af8c(%rip), %rsi     # 0x576e0
leaq 0x30(%rsp), %rdi
callq 0x7690
movsd 0x68(%rsp), %xmm0
divsd 0x3a734(%rip), %xmm0    # 0x56ea0
movsd %xmm0, 0x68(%rsp)
leaq 0x10(%rsp), %rsi
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1c798
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1c7a0
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rsp, %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x58(%rax), %r9
leaq 0x52c06(%rip), %rax     # 0x6f3d0
movl (%rax), %eax
movq %rax, 0x158(%rsp)
leaq 0x52bed(%rip), %rax     # 0x6f3c8
movsd (%rax), %xmm0
leaq 0x52bee(%rip), %rax     # 0x6f3d4
movzbl (%rax), %eax
movq %rax, 0x150(%rsp)
leaq 0x52be0(%rip), %rax     # 0x6f3d8
movsd (%rax), %xmm1
leaq 0x52bfd(%rip), %rax     # 0x6f400
movl (%rax), %r11d
leaq 0x52bff(%rip), %rax     # 0x6f40c
movl (%rax), %ebx
leaq 0x52c6a(%rip), %rax     # 0x6f480
movl (%rax), %r15d
movl (%r14), %r12d
leaq 0x52c65(%rip), %rax     # 0x6f488
movl (%rax), %r13d
leaq 0x52c5f(%rip), %rax     # 0x6f48c
movl (%rax), %ebp
leaq 0x52b42(%rip), %rdx     # 0x6f378
movl (%rdx), %ecx
leal 0x1(%rcx), %eax
movl %eax, (%rdx)
leaq 0x52c4c(%rip), %rax     # 0x6f490
movl (%rax), %eax
shrl $0x9, %eax
xorl %r14d, %r14d
testl %ecx, %ecx
leaq 0x52cff(%rip), %rcx     # 0x6f554
movzbl (%rcx), %r10d
setne %r14b
subq $0x8, %rsp
movq 0xa8(%rsp), %rdi
movq 0x68(%rsp), %rdx
movq 0xb0(%rsp), %rcx
movq 0x78(%rsp), %r8
movsd 0x70(%rsp), %xmm2
pushq $0x1b0                  # imm = 0x1B0
pushq $0x64
pushq $0x1
pushq %r14
pushq $0xa
pushq %r10
pushq %rax
pushq %rbp
pushq %r13
pushq %r12
pushq %r15
pushq %rbx
pushq %r11
pushq 0x1c0(%rsp)
pushq 0x1d0(%rsp)
callq 0x4061c
addq $0x80, %rsp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
movq 0x50(%rsp), %rbx
je 0x1c8cd
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
movq 0xa8(%rsp), %r14
movq 0xa0(%rsp), %r15
je 0x1c8f1
callq 0x7370
callq 0x281b4
movq %rax, %rdi
movq %r15, %rsi
callq 0x2822a
movq %r14, %rdi
movq %r15, %rsi
callq 0x3deee
movq %r15, 0x48(%rbx)
movq 0x58(%rsp), %rax
movq (%rax), %rbx
movq 0x8(%rax), %r12
movq %r12, %rax
subq %rbx, %rax
movq %rax, %r15
sarq $0x3, %r15
movq %r15, %rcx
shrq $0x3e, %rcx
sarq %rax
xorl %edi, %edi
negq %rcx
sbbq %rdi, %rdi
orq %rax, %rdi
callq 0x7030
movq %rax, %r14
cmpq %rbx, %r12
je 0x1c962
xorl %eax, %eax
movq (%rbx,%rax,8), %rcx
movl 0x8(%rcx), %ecx
movl %ecx, (%r14,%rax,4)
incq %rax
movl %eax, %ecx
cmpq %rcx, %r15
ja 0x1c94d
leaq 0x52a1f(%rip), %rax     # 0x6f388
movl (%rax), %eax
testl %eax, %eax
je 0x1c9e5
cmpl $0x1, %eax
jne 0x1cfb9
movl $0x110, %edi            # imm = 0x110
callq 0x73a0
movq %rax, %r12
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x28(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xb036
leaq 0x3ad3f(%rip), %rsi     # 0x576ed
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x10(%rsp), %rsi
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1cb4d
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1cb55
movl $0x100, %edi            # imm = 0x100
callq 0x73a0
movq %rax, %r12
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x28(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xb036
leaq 0x3acd2(%rip), %rsi     # 0x576ed
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x10(%rsp), %rsi
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1ca4b
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1ca53
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rsp, %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x58(%rax), %r8
leaq 0x5290f(%rip), %rax     # 0x6f38c
movl (%rax), %r9d
leaq 0x52909(%rip), %rax     # 0x6f390
movl (%rax), %eax
leaq 0x52904(%rip), %rcx     # 0x6f394
movl (%rcx), %r10d
leaq 0x528fe(%rip), %rcx     # 0x6f398
leaq 0x529ef(%rip), %rdx     # 0x6f490
movl (%rdx), %ebp
movl %ebp, %r13d
leaq 0x52953(%rip), %rdx     # 0x6f400
imull (%rdx), %ebp
movl (%rcx), %r11d
leaq 0x52952(%rip), %rcx     # 0x6f40c
imull (%rcx), %ebp
leaq 0x529bc(%rip), %rcx     # 0x6f480
imull (%rcx), %ebp
movq 0x58(%rsp), %rcx
movq 0x8(%rcx), %rbx
subq (%rcx), %rbx
leaq 0x529aa(%rip), %rcx     # 0x6f484
imull (%rcx), %ebp
leaq 0x528cc(%rip), %r15     # 0x6f3b0
shrq $0x3, %rbx
shrl $0x9, %r13d
shrl $0x9, %ebp
movq %r12, %rdi
xorl %edx, %edx
movq 0x50(%rsp), %rcx
pushq %rbp
pushq %r13
pushq %rbx
pushq %r14
pushq (%r15)
leaq 0x5289f(%rip), %rbx     # 0x6f3a8
pushq (%rbx)
leaq 0x5288e(%rip), %rbx     # 0x6f3a0
pushq (%rbx)
pushq %r11
pushq %r10
pushq %rax
callq 0x353d8
addq $0x50, %rsp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1cb35
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1cc58
jmp 0x1cc53
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rsp, %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x58(%rax), %r8
leaq 0x5280d(%rip), %rax     # 0x6f38c
movl (%rax), %r9d
leaq 0x52807(%rip), %rax     # 0x6f390
movl (%rax), %eax
leaq 0x52802(%rip), %rcx     # 0x6f394
movl (%rcx), %r10d
leaq 0x527fc(%rip), %rcx     # 0x6f398
movl (%rcx), %r11d
leaq 0x528ea(%rip), %rcx     # 0x6f490
movl (%rcx), %ebp
movl %ebp, %ebx
leaq 0x5284f(%rip), %rcx     # 0x6f400
imull (%rcx), %ebp
leaq 0x52851(%rip), %rcx     # 0x6f40c
imull (%rcx), %ebp
leaq 0x528bb(%rip), %rcx     # 0x6f480
imull (%rcx), %ebp
leaq 0x528b5(%rip), %rcx     # 0x6f484
imull (%rcx), %ebp
leaq 0x52963(%rip), %rcx     # 0x6f53c
movq 0x58(%rsp), %rdx
movq 0x8(%rdx), %r15
subq (%rdx), %r15
movl (%rcx), %r13d
shrq $0x3, %r15
shrl $0x9, %ebx
shrl $0x9, %ebp
subq $0x8, %rsp
movq %r12, %rdi
xorl %edx, %edx
movq 0x58(%rsp), %rcx
pushq %rbp
pushq %rbx
pushq %r15
pushq %r13
pushq %r14
leaq 0x527a1(%rip), %rbx     # 0x6f3b0
pushq (%rbx)
leaq 0x52790(%rip), %rbx     # 0x6f3a8
pushq (%rbx)
leaq 0x5277f(%rip), %rbx     # 0x6f3a0
pushq (%rbx)
pushq %r11
pushq %r10
pushq %rax
callq 0x32f68
addq $0x60, %rsp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1cc44
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1cc58
callq 0x7370
callq 0x281b4
movq %rax, %rdi
movq %r12, %rsi
callq 0x2822a
movq 0x50(%rsp), %rax
movq %r12, 0x30(%rax)
movq 0x28(%rsp), %rax
movq %r12, 0x48(%rax)
leaq 0x526ff(%rip), %rax     # 0x6f380
movl (%rax), %eax
testl %eax, %eax
je 0x1ccf6
cmpl $0x1, %eax
jne 0x1ce8e
movl $0x90, %edi
callq 0x73a0
movq %rax, %r14
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x28(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xb036
leaq 0x3aa52(%rip), %rsi     # 0x57718
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x10(%rsp), %rsi
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1cd63
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1cd6b
movl $0x90, %edi
callq 0x73a0
movq %rax, %r14
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x28(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xb036
leaq 0x3a9ec(%rip), %rsi     # 0x57718
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x10(%rsp), %rsi
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1ce0d
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1ce15
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rdx, 0x8(%rsp)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
callq 0x53b00
leaq 0x525f5(%rip), %rcx     # 0x6f384
movzwl (%rcx), %ecx
movq 0x58(%rsp), %rdx
movq 0x8(%rdx), %r9
subq (%rdx), %r9
shrq $0x3, %r9
leaq 0x525dd(%rip), %rdx     # 0x6f386
movzwl (%rdx), %r10d
leaq 0x526dc(%rip), %rdx     # 0x6f490
movl (%rdx), %r11d
shrl $0x9, %r11d
subq $0x8, %rsp
leaq 0x8(%rsp), %rsi
movq %r14, %rdi
movq %rax, %rdx
movl %ecx, %r8d
pushq %r12
pushq %r11
pushq %r10
callq 0x4247a
addq $0x20, %rsp
movq 0x28(%rsp), %rax
movq %r14, 0x40(%rax)
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1cdf8
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1ce8e
jmp 0x1ce89
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rdx, 0x8(%rsp)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
leaq 0x52550(%rip), %rax     # 0x6f384
movzwl (%rax), %ebx
callq 0x53b00
leaq 0x5264d(%rip), %rcx     # 0x6f490
movl (%rcx), %r8d
shrl $0x9, %r8d
movzwl %bx, %edx
movq %rsp, %rsi
movq %r14, %rdi
movq %rax, %rcx
movq %r12, %r9
callq 0x4457e
movq 0x28(%rsp), %rax
movq %r14, 0x40(%rax)
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1ce7a
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1ce8e
callq 0x7370
callq 0x281b4
movq 0x28(%rsp), %rcx
movq 0x40(%rcx), %rsi
movq %rax, %rdi
callq 0x2822a
movq 0x28(%rsp), %rax
movq 0x40(%rax), %rsi
movq %r12, %rdi
callq 0x32ccc
leaq 0xd0(%rsp), %rdi
callq 0x1dd78
leaq 0x130(%rsp), %rdi
callq 0x1dd78
leaq 0xf0(%rsp), %rdi
callq 0x1dd78
leaq 0xb0(%rsp), %rdi
callq 0x1dd78
addq $0x258, %rsp            # imm = 0x258
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movl $0x10, %edi
callq 0x71d0
movq %rax, %rbx
leaq 0x3a818(%rip), %rsi     # 0x57727
movq %rax, %rdi
callq 0x7680
movq 0x520aa(%rip), %rsi     # 0x6efc8
movq 0x5208b(%rip), %rdx     # 0x6efb0
movq %rbx, %rdi
callq 0x75e0
jmp 0x1cfb9
movl $0x10, %edi
callq 0x71d0
movq %rax, %rbx
leaq 0x3a694(%rip), %rsi     # 0x575da
movq %rax, %rdi
callq 0x7680
jmp 0x1d027
movl $0x10, %edi
callq 0x71d0
movq %rax, %rbx
leaq 0x3a6cb(%rip), %rsi     # 0x57632
movq %rax, %rdi
callq 0x7680
movq 0x52052(%rip), %rsi     # 0x6efc8
movq 0x52033(%rip), %rdx     # 0x6efb0
movq %rbx, %rdi
callq 0x75e0
jmp 0x1cfb9
movl $0x10, %edi
callq 0x71d0
movq %rax, %rbx
leaq 0x3a6fd(%rip), %rsi     # 0x57698
movq %rax, %rdi
callq 0x7680
movq 0x5201e(%rip), %rsi     # 0x6efc8
movq 0x51fff(%rip), %rdx     # 0x6efb0
movq %rbx, %rdi
callq 0x75e0
movq 0x52030(%rip), %rdi     # 0x6eff0
leaq 0x395e1(%rip), %rsi     # 0x565a8
movl $0x6, %edx
callq 0x7400
movq 0x52018(%rip), %rdi     # 0x6eff0
leaq 0x3a719(%rip), %rsi     # 0x576f8
movl $0x1f, %edx
callq 0x7400
movq 0x52000(%rip), %rdi     # 0x6eff0
callq 0x71c0
movq 0x51fd4(%rip), %rdi     # 0x6efd0
callq 0x7430
movl $0x1, %edi
callq 0x7440
movl $0x10, %edi
callq 0x71d0
movq %rax, %rbx
leaq 0x3a573(%rip), %rsi     # 0x57592
movq %rax, %rdi
callq 0x7680
movq 0x51f9a(%rip), %rsi     # 0x6efc8
movq 0x51f7b(%rip), %rdx     # 0x6efb0
movq %rbx, %rdi
callq 0x75e0
jmp 0x1d219
movq %rax, %rbp
movq %rbx, %rdi
callq 0x72c0
jmp 0x1d4b2
jmp 0x1d219
movq %rax, %rbp
jmp 0x1d23f
movq %rax, %rbp
jmp 0x1d26b
movq %rax, %rbp
jmp 0x1d27f
movq %rax, %rbp
jmp 0x1d27f
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d0c3
callq 0x7370
jmp 0x1d0c3
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d0aa
callq 0x7370
jmp 0x1d0aa
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d0dc
callq 0x7370
jmp 0x1d0dc
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d0d7
callq 0x7370
jmp 0x1d0e1
movq %rax, %rbp
jmp 0x1d0e1
movq %rax, %rbp
movq %r12, %rdi
jmp 0x1d4ad
movq %rax, %rbp
leaq 0x210(%rsp), %rdi
callq 0x1dd78
jmp 0x1d0fe
movq %rax, %rbp
leaq 0x198(%rsp), %rdi
callq 0x1dd78
jmp 0x1d110
movq %rax, %rbp
leaq 0x1b0(%rsp), %rdi
callq 0x1dd78
jmp 0x1d122
movq %rax, %rbp
leaq 0x1c8(%rsp), %rdi
callq 0x1dd78
jmp 0x1d14b
movq %rax, %rbp
movq 0x178(%rsp), %rdi
cmpq %rbx, %rdi
je 0x1d17c
callq 0x7370
jmp 0x1d17c
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d163
callq 0x7370
jmp 0x1d163
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d194
callq 0x7370
jmp 0x1d194
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d18f
callq 0x7370
jmp 0x1d194
movq %rax, %rbp
movq 0x60(%rsp), %rdi
jmp 0x1d4ad
movq %rax, %rbp
jmp 0x1d194
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d1ef
callq 0x7370
jmp 0x1d1ef
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d1d6
callq 0x7370
jmp 0x1d1d6
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d208
callq 0x7370
jmp 0x1d208
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d203
callq 0x7370
jmp 0x1d20d
movq %rax, %rbp
jmp 0x1d20d
movq %rax, %rbp
movq 0x70(%rsp), %rdi
jmp 0x1d5c0
jmp 0x1d219
movq %rax, %rbp
movq %rbx, %rdi
callq 0x72c0
jmp 0x1d5ca
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d23f
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d253
callq 0x7370
jmp 0x1d27f
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d26b
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d27f
callq 0x7370
movq %r14, %rdi
jmp 0x1d4ad
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d2a2
callq 0x7370
jmp 0x1d2a2
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d2bb
callq 0x7370
jmp 0x1d2bb
movq %rax, %rbp
movq 0xa0(%rsp), %rdi
jmp 0x1d4ad
movq %rax, %rbp
leaq 0x228(%rsp), %rdi
callq 0x1dd78
jmp 0x1d2dd
movq %rax, %rbp
leaq 0x1e0(%rsp), %rdi
callq 0x1dd78
jmp 0x1d2ef
movq %rax, %rbp
leaq 0x1f8(%rsp), %rdi
callq 0x1dd78
jmp 0x1d301
movq %rax, %rbp
leaq 0x240(%rsp), %rdi
callq 0x1dd78
jmp 0x1d4b2
movq %rax, %rbp
movq %r15, %rdi
jmp 0x1d5c0
jmp 0x1d5c7
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d33e
callq 0x7370
jmp 0x1d33e
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d357
callq 0x7370
jmp 0x1d357
movq %rax, %rbp
movq 0x50(%rsp), %rdi
jmp 0x1d5c0
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d37c
callq 0x7370
jmp 0x1d37c
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d395
callq 0x7370
jmp 0x1d395
movq %rax, %rbp
jmp 0x1d402
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d600
jmp 0x1d5fb
movq %rax, %rbp
jmp 0x1d600
jmp 0x1d5c7
jmp 0x1d5c7
jmp 0x1d5c7
jmp 0x1d5c7
jmp 0x1d3f7
jmp 0x1d5c7
jmp 0x1d3f7
jmp 0x1d43d
jmp 0x1d40f
jmp 0x1d468
jmp 0x1d426
jmp 0x1d493
jmp 0x1d454
jmp 0x1d4a1
jmp 0x1d47f
jmp 0x1d5c7
movq %rax, %rbp
jmp 0x1d4b2
movq %rax, %rbp
movq %r12, %rdi
jmp 0x1d5c0
jmp 0x1d5c7
movq %rax, %rbp
movq 0x110(%rsp), %rdi
testq %rdi, %rdi
je 0x1d440
callq 0x7370
jmp 0x1d440
movq %rax, %rbp
movq 0x110(%rsp), %rdi
testq %rdi, %rdi
je 0x1d46b
callq 0x7370
jmp 0x1d46b
movq %rax, %rbp
movq 0x80(%rsp), %rdi
testq %rdi, %rdi
je 0x1d457
callq 0x7370
jmp 0x1d457
movq %rax, %rbp
movq 0x30(%rsp), %rdi
testq %rdi, %rdi
je 0x1d496
callq 0x7370
jmp 0x1d496
movq %rax, %rbp
movq 0x80(%rsp), %rdi
testq %rdi, %rdi
je 0x1d482
callq 0x7370
jmp 0x1d482
movq %rax, %rbp
movq 0x30(%rsp), %rdi
testq %rdi, %rdi
je 0x1d4a4
callq 0x7370
jmp 0x1d4a4
movq %rax, %rbp
movq (%rsp), %rdi
testq %rdi, %rdi
je 0x1d4b2
jmp 0x1d4ad
movq %rax, %rbp
movq (%rsp), %rdi
testq %rdi, %rdi
je 0x1d4b2
callq 0x7370
leaq 0xd0(%rsp), %rdi
callq 0x1dd78
leaq 0x130(%rsp), %rdi
callq 0x1dd78
leaq 0xf0(%rsp), %rdi
callq 0x1dd78
leaq 0xb0(%rsp), %rdi
callq 0x1dd78
jmp 0x1d5ca
movq %rax, %rbp
jmp 0x1d54b
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d513
callq 0x7370
jmp 0x1d513
movq %rax, %rbp
jmp 0x1d5a3
movq %rax, %rbp
movq 0x80(%rsp), %rdi
leaq 0x90(%rsp), %rax
cmpq %rax, %rdi
je 0x1d537
callq 0x7370
jmp 0x1d537
movq %rax, %rbp
jmp 0x1d565
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d54b
callq 0x7370
leaq 0xc0(%rsp), %rax
movq 0xb0(%rsp), %rdi
cmpq %rax, %rdi
je 0x1d565
callq 0x7370
movq 0xd0(%rsp), %rdi
leaq 0xe0(%rsp), %rax
cmpq %rax, %rdi
je 0x1d589
callq 0x7370
jmp 0x1d589
movq %rax, %rbp
jmp 0x1d5bd
movq %rax, %rbp
movq 0xf0(%rsp), %rdi
leaq 0x100(%rsp), %rax
cmpq %rax, %rdi
je 0x1d5a3
callq 0x7370
movq 0x130(%rsp), %rdi
leaq 0x140(%rsp), %rax
cmpq %rax, %rdi
je 0x1d5bd
callq 0x7370
movq %r13, %rdi
callq 0x7370
jmp 0x1d5ca
movq %rax, %rbp
movq 0x160(%rsp), %rax
movq (%rax), %rdi
testq %rdi, %rdi
je 0x1d5df
callq 0x7370
leaq 0x50472(%rip), %rax     # 0x6da58
movq 0x28(%rsp), %rcx
movq %rax, (%rcx)
movq 0x8(%rcx), %rdi
addq $0x18, %rcx
cmpq %rcx, %rdi
je 0x1d600
callq 0x7370
movq %rbp, %rdi
callq 0x7620