// File: /workspace/github_c_makefile_star2_O2/aquaxis[P]synverll/src/parser_ir_top.c
// Function: create_top_module
int create_top_module()
{
	MODULE_TREE *now_module_tree = NULL;
	MEMORY_TREE *now_memory_tree = NULL;
	CALL_TREE *now_call_tree = NULL;
	CALL_SIGNAL_TREE *now_call_signal_tree = NULL;
	char *module_name;
	char *call_signal_name;
	int args_num;
	char *label;
	char *verilog_signal;
	char *verilog_wire;
	char *verilog_module;
	int inout;

	printf("[Create top Module]\n");

	call_signal_name	= calloc(STR_MAX, 1);
	label				= calloc(STR_MAX, 1);
	verilog_signal		= calloc(STR_MAX, 1);
	verilog_wire		= calloc(STR_MAX, 1);
	verilog_module		= calloc(STR_MAX, 1);

    now_module_tree = module_tree_top;
    while(now_module_tree != NULL){
		// 初期化
		args_num = 0;
		module_name = calloc(strlen(now_module_tree->module_name)+1,1);
		strcpy(module_name, convname(sep_p(now_module_tree->module_name)));

		// モジュール宣言
		sprintf(verilog_module, "%s u_%s(\n", module_name, module_name);
		register_top_module_decl(verilog_module);

		// 制御信号の生成
		sprintf(verilog_module, "\t// system signals\n");
		register_top_module_decl(verilog_module);
		{
			sprintf(verilog_module, "\t.__func_clock(system_clock),\n");
			register_top_module_decl(verilog_module);
			sprintf(verilog_module, "\t.__func_reset(system_reset),\n");
			register_top_module_decl(verilog_module);
			// __func_start(in)
			sprintf(label, "__func_start");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_CTRL, SIG_IN, 0, NULL, 0, verilog_signal, verilog_wire);
			// ToDo: 接続されるべき信号を検索してWired OR宣言を生成する。
			// __func_done(out)
			sprintf(label, "__func_done");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_CTRL, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __func_ready(out)
			sprintf(label, "__func_ready");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_CTRL, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
		}

		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// メモリバスの生成
		sprintf(verilog_module, "\t// memory bus\n");
		register_top_module_decl(verilog_module);
		if(now_module_tree->is_module_gm_if){
			use_gm_if = 1;

			// __gm_base(in)
			sprintf(label, "__gm_base");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [31:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_IN, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_req(out)
			sprintf(label, "__gm_req");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_rnw(out)
			sprintf(label, "__gm_rnw");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_done(in)
			sprintf(label, "__gm_done");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_IN, 0, NULL, 0, verilog_signal, verilog_wire);
			// ToDo: 接続されるべき信号を検索してWired OR宣言を生成する。
			// __gm_adrs(out)
			sprintf(label, "__gm_adrs");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [31:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_leng(out)
			sprintf(label, "__gm_leng");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [1:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_di(in)
			sprintf(label, "__gm_di");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [31:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_IN, 0, NULL, 0, verilog_signal, verilog_wire);
			// ToDo: 接続されるべき信号を検索してWired OR宣言を生成する。
			// __gm_do(out)
			sprintf(label, "__gm_do");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [31:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
		}

		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// メモリアドレスの生成
		sprintf(verilog_module, "\t// base address\n");
		register_top_module_decl(verilog_module);
		{
			now_memory_tree = now_module_tree->memory_tree_ptr;
			while(now_memory_tree != NULL){
				if(now_memory_tree->flag == MEMORY_FLAG_GLOBAL){
					sprintf(label, "%s", convname(sep_p(now_memory_tree->label)));
//					sprintf(verilog_signal, "%s%s", module_name, label);
					sprintf(verilog_module, "\t.__base_%s(__base_%s),\n", label, label);
					register_top_module_decl(verilog_module);
//					sprintf(verilog_wire, "wire [31:0] %s", module_name);
//					register_top_signal_tree(label, verilog_signal, 0, 0, verilog_wire);
				}
				now_memory_tree = now_memory_tree->next_ptr;
			}
		}
		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// 引数の生成
		sprintf(verilog_module, "\t// arguments\n");
		register_top_module_decl(verilog_module);
		args_num = 0;
		{
			now_memory_tree = now_module_tree->memory_tree_ptr;
			while(now_memory_tree != NULL){
				if(now_memory_tree->flag == MEMORY_FLAG_REGISTER){
					sprintf(label, "__args_%s", convname(sep_p(now_memory_tree->label)));
					sprintf(verilog_signal, "%s%s", module_name, label);
					sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
					register_top_module_decl(verilog_module);
//					sprintf(verilog_wire, "wire [31:0] %s", verilog_signal);
//					register_top_signal_tree(label, module_name, label, 0, 0, 0, verilog_signal, verilog_wire);

					if(now_memory_tree->size > 0){
						sprintf(verilog_wire, "wire [%d:0] %s;", now_memory_tree->size*8-1, verilog_signal);
					}else{
						sprintf(verilog_wire, "wire %s;", verilog_signal);
					}
					register_top_signal_tree(label, module_name, convname(sep_p(now_memory_tree->label)), FLAG_ARGS, SIG_IN, now_memory_tree->size, NULL, args_num, verilog_signal, verilog_wire);
					// ToDo: 接続されるべき信号を検索してWired OR宣言を生成する。
					args_num ++;
				}
				now_memory_tree = now_memory_tree->next_ptr;
			}
		}
		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// CALL命令の生成
		sprintf(verilog_module, "\t// call instruction\n");
		register_top_module_decl(verilog_module);
		{
			now_call_tree = now_module_tree->call_tree_ptr;
			while(now_call_tree != NULL){
				now_call_signal_tree = now_call_tree->signal_top_ptr;
				while(now_call_signal_tree != NULL){
					if(
						!strcmp(now_call_signal_tree->signal_name, "req") ||
						!strcmp(now_call_signal_tree->signal_name, "ready") ||
						!strcmp(now_call_signal_tree->signal_name, "done") ||
						!strcmp(now_call_signal_tree->signal_name, "result")
					){
						sprintf(label, "__call_%s_%s", convname(sep_p(now_call_tree->call_name)), now_call_signal_tree->signal_name);
					}else{
						sprintf(label, "__call_%s_%s_%d", convname(sep_p(now_call_tree->call_name)), now_call_signal_tree->signal_name, now_call_signal_tree->num);
					}
					sprintf(verilog_signal, "%s%s", module_name, label);
					sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
					register_top_module_decl(verilog_module);
					if(now_call_signal_tree->size > 0){
						sprintf(verilog_wire, "wire [%d:0] %s;", now_call_signal_tree->size-1, verilog_signal);
					}else{
						sprintf(verilog_wire, "wire %s;", verilog_signal);
					}
					if(
						!strcmp(now_call_signal_tree->signal_name, "done") ||
						!strcmp(now_call_signal_tree->signal_name, "ready") ||
						!strcmp(now_call_signal_tree->signal_name, "result")
					){
						inout = SIG_IN;
					}else{
						inout = SIG_OUT;
					}
					register_top_signal_tree(label, module_name, now_call_signal_tree->signal_name, FLAG_CALL, inout, 0, convname(sep_p(now_call_tree->call_name)), now_call_signal_tree->num, verilog_signal, verilog_wire);
					now_call_signal_tree = now_call_signal_tree->next_ptr;
				}
				sprintf(verilog_module, "\n");
				now_call_tree = now_call_tree->next_ptr;
			}
		}

		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// 戻り値の生成
		sprintf(verilog_module, "\t// return value\n");
		register_top_module_decl(verilog_module);

		{
			now_memory_tree = now_module_tree->memory_tree_ptr;
			while(now_memory_tree != NULL){
				if(now_memory_tree->flag == MEMORY_FLAG_RETURN){
					if(strcmp(now_memory_tree->type, "void")){
						sprintf(verilog_signal, "%s__func_result", module_name);
						sprintf(verilog_module, "\t.%s(%s)\n", "__func_result", verilog_signal);
						register_top_module_decl(verilog_module);

						if(now_memory_tree->size > 0){
							sprintf(verilog_wire, "wire [%d:0] %s;", now_memory_tree->size*8-1,verilog_signal);
						}else{
							sprintf(verilog_wire, "wire %s;", verilog_signal);
						}

						register_top_signal_tree("__func_result", module_name, verilog_signal, FLAG_RETURN, SIG_OUT, now_memory_tree->size, verilog_signal, 0, verilog_signal, verilog_wire);
					}
				}
				now_memory_tree = now_memory_tree->next_ptr;
			}
		}

//		sprintf(verilog_module, "\n");
//		register_top_module_decl(verilog_module);
//		sprintf(verilog_module, "\t.__dummy()\n");
//		register_top_module_decl(verilog_module);
		sprintf(verilog_module, ");\n");
		register_top_module_decl(verilog_module);

        now_module_tree = now_module_tree->next_ptr;

        free(module_name);
    }

    free(call_signal_name);
    free(verilog_signal);

	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
leaq 0x49e1(%rip), %rdi      # 0xefed
callq 0x1070
pushq $0x1
popq %rbx
movl $0x400, %edi            # imm = 0x400
movq %rbx, %rsi
callq 0x10f0
movq %rax, %r14
movl $0x400, %edi            # imm = 0x400
movq %rbx, %rsi
callq 0x10f0
movq %rax, %r15
movl $0x400, %edi            # imm = 0x400
movq %rbx, %rsi
callq 0x10f0
movq %rax, %rbp
movl $0x400, %edi            # imm = 0x400
movq %rbx, %rsi
callq 0x10f0
movq %rax, %r13
leaq 0x8f15(%rip), %rax      # 0x13570
movq (%rax), %rbx
movq %rbp, 0x20(%rsp)
movq %r14, (%rsp)
testq %rbx, %rbx
je 0xb22f
movq 0x10(%rbx), %r12
movq %r12, %rdi
callq 0x1090
leaq 0x1(%rax), %rdi
pushq $0x1
popq %rsi
callq 0x10f0
movq %rax, 0x8(%rsp)
movzbl (%r12), %eax
cmpl $0x40, %eax
movq %rbx, 0x10(%rsp)
je 0xa6a1
cmpl $0x25, %eax
jne 0xa6a4
incq %r12
movq %r12, %rdi
callq 0x1393
movq 0x8(%rsp), %rbx
movq %rbx, %rdi
movq %rax, %rsi
callq 0x1060
movq %r13, %rdi
leaq 0x4589(%rip), %rsi      # 0xec4f
movq %rbx, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
movups 0x4577(%rip), %xmm0     # 0xec59
movups %xmm0, (%r13)
movl $0xa736c, 0x10(%r13)    # imm = 0xA736C
movq %r13, %rdi
callq 0x9a0c
movups 0x456f(%rip), %xmm0     # 0xec6d
movups %xmm0, (%r13)
movups 0x4572(%rip), %xmm0     # 0xec7c
movups %xmm0, 0xf(%r13)
movq %r13, %rdi
callq 0x9a0c
movups 0x456e(%rip), %xmm0     # 0xec8c
movups %xmm0, (%r13)
movups 0x4571(%rip), %xmm0     # 0xec9b
movups %xmm0, 0xf(%r13)
movq %r13, %rdi
callq 0x9a0c
movq (%rsp), %r14
movabsq $0x735f636e75665f5f, %rax # imm = 0x735F636E75665F5F
movq %rax, (%r14)
movabsq $0x74726174735f63, %rax # imm = 0x74726174735F63
movq %rax, 0x5(%r14)
movq %r15, %rdi
leaq 0x2ae0(%rip), %rsi      # 0xd240
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4534(%rip), %rsi      # 0xecab
movq %r14, %rdx
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
movq %rbp, %rdi
leaq 0x4520(%rip), %rsi      # 0xecb6
movq %r15, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r14, %rdi
movq %rbx, %rsi
movq %r14, %rdx
pushq $0x1
popq %rcx
xorl %r8d, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r15
pushq $0x0
pushq $0x0
callq 0x9b9e
addq $0x20, %rsp
movabsq $0x645f636e75665f5f, %rax # imm = 0x645F636E75665F5F
movq %rax, (%r14)
movl $0x656e6f, 0x8(%r14)    # imm = 0x656E6F
movq %r15, %rdi
leaq 0x2a5f(%rip), %rsi      # 0xd240
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x44b3(%rip), %rsi      # 0xecab
movq %r14, %rdx
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
movq %rbp, %rdi
leaq 0x449f(%rip), %rsi      # 0xecb6
movq %r15, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r14, %rdi
movq %rbx, %rsi
movq %r14, %rdx
pushq $0x1
popq %rcx
movl %ecx, %r8d
movl %ecx, %r12d
xorl %r9d, %r9d
pushq %rbp
pushq %r15
pushq $0x0
pushq $0x0
callq 0x9b9e
addq $0x20, %rsp
movabsq $0x725f636e75665f5f, %rax # imm = 0x725F636E75665F5F
movq %rax, (%r14)
movabsq $0x79646165725f63, %rax # imm = 0x79646165725F63
movq %rax, 0x5(%r14)
movq %r15, %rdi
leaq 0x29d5(%rip), %rsi      # 0xd240
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4429(%rip), %rsi      # 0xecab
movq %r14, %rdx
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
movq %rbp, %rdi
leaq 0x4415(%rip), %rsi      # 0xecb6
movq %r15, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r14, %rdi
movl %r12d, %ecx
movq %rbx, %r12
movq %rbx, %rsi
movq %r14, %rdx
movl %ecx, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r15
pushq $0x0
pushq $0x0
callq 0x9b9e
addq $0x20, %rsp
movw $0xa, (%r13)
movq %r13, %rdi
callq 0x9a0c
movups 0x43f2(%rip), %xmm0     # 0xecd8
movups %xmm0, (%r13)
movq %r13, %rdi
callq 0x9a0c
movq 0x10(%rsp), %rax
xorl %ecx, %ecx
cmpl %ecx, 0x28(%rax)
je 0xad07
movl $0x1, 0x8caf(%rip)      # 0x135bc
movw $0x65, %ax
movw %ax, 0x8(%r14)
movabsq $0x7361625f6d675f5f, %rax # imm = 0x7361625F6D675F5F
movq %rax, (%r14)
movq %r15, %rdi
leaq 0x2913(%rip), %rsi      # 0xd240
movq %r12, %rdx
xorl %ebx, %ebx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4365(%rip), %rsi      # 0xecab
movq %r14, %rdx
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
movq %rbp, %rdi
leaq 0x4383(%rip), %rsi      # 0xece8
movq %r15, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r14, %rdi
movq %r12, %rsi
movq %r14, %rdx
pushq $0x2
popq %rcx
xorl %r8d, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r15
pushq $0x0
pushq $0x0
callq 0x9b9e
addq $0x20, %rsp
movabsq $0x7165725f6d675f5f, %rax # imm = 0x7165725F6D675F5F
movq %rax, (%r14)
movb %bl, 0x8(%r14)
movq %r15, %rdi
leaq 0x2894(%rip), %rsi      # 0xd240
movq %r12, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x42e8(%rip), %rsi      # 0xecab
movq %r14, %rdx
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
movq %rbp, %rdi
leaq 0x42d4(%rip), %rsi      # 0xecb6
movq %r15, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r14, %rdi
movq %r12, %rsi
movq %r14, %rdx
pushq $0x2
popq %rcx
pushq $0x1
popq %r8
movl %r8d, %ebx
xorl %r9d, %r9d
pushq %rbp
pushq %r15
pushq $0x0
pushq $0x0
callq 0x9b9e
addq $0x20, %rsp
movabsq $0x776e725f6d675f5f, %rax # imm = 0x776E725F6D675F5F
movq %rax, (%r14)
xorl %eax, %eax
movb %al, 0x8(%r14)
movq %r15, %rdi
leaq 0x2811(%rip), %rsi      # 0xd240
movq %r12, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4265(%rip), %rsi      # 0xecab
movq %r14, %rdx
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
movq %rbp, %rdi
leaq 0x4251(%rip), %rsi      # 0xecb6
movq %r15, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r14, %rdi
movq %r12, %rsi
movq %r14, %rdx
pushq $0x2
popq %rcx
movl %ebx, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r15
pushq $0x0
pushq $0x0
callq 0x9b9e
addq $0x20, %rsp
movabsq $0x6e6f645f6d675f5f, %rax # imm = 0x6E6F645F6D675F5F
movq %rax, (%r14)
movw $0x65, %ax
movw %ax, 0x8(%r14)
movq %r15, %rdi
leaq 0x278f(%rip), %rsi      # 0xd240
movq %rsi, %rbx
movq %r12, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x41e0(%rip), %rsi      # 0xecab
movq %r14, %rdx
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
movq %rbp, %rdi
leaq 0x41cc(%rip), %rsi      # 0xecb6
movq %r15, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r14, %rdi
movq %r12, %rsi
movq %r14, %rdx
pushq $0x2
popq %rcx
xorl %r8d, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r15
pushq $0x0
pushq $0x0
callq 0x9b9e
addq $0x20, %rsp
movabsq $0x7264615f6d675f5f, %rax # imm = 0x7264615F6D675F5F
movq %rax, (%r14)
movw $0x73, 0x8(%r14)
movq %r15, %rdi
movq %rbx, %rsi
movq %r12, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4164(%rip), %rsi      # 0xecab
movq %r14, %rdx
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
movq %rbp, %rdi
leaq 0x4182(%rip), %rsi      # 0xece8
movq %r15, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r14, %rdi
movq %r12, %rsi
movq %r14, %rdx
pushq $0x2
popq %rcx
pushq $0x1
popq %rbx
movl %ebx, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r15
pushq $0x0
pushq $0x0
callq 0x9b9e
addq $0x20, %rsp
movabsq $0x6e656c5f6d675f5f, %rax # imm = 0x6E656C5F6D675F5F
movq %rax, (%r14)
movw $0x67, 0x8(%r14)
movq %r15, %rdi
leaq 0x268d(%rip), %rsi      # 0xd240
movq %r12, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x40e1(%rip), %rsi      # 0xecab
movq %r14, %rdx
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
movq %rbp, %rdi
leaq 0x4135(%rip), %rsi      # 0xed1e
movq %r15, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r14, %rdi
movq %r12, %rsi
movq %r14, %rdx
pushq $0x2
popq %rcx
movl %ebx, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r15
pushq $0x0
pushq $0x0
callq 0x9b9e
addq $0x20, %rsp
movabsq $0x69645f6d675f5f, %rax # imm = 0x69645F6D675F5F
movq %rax, (%r14)
movq %r15, %rdi
leaq 0x2614(%rip), %rsi      # 0xd240
movq %r12, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4068(%rip), %rsi      # 0xecab
movq %r14, %rdx
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
movq %rbp, %rdi
leaq 0x4086(%rip), %rbx      # 0xece8
movq %rbx, %rsi
movq %r15, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r14, %rdi
movq %r12, %rsi
movq %r14, %rdx
pushq $0x2
popq %rcx
xorl %r8d, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r15
pushq $0x0
pushq $0x0
callq 0x9b9e
addq $0x20, %rsp
movabsq $0x6f645f6d675f5f, %rax # imm = 0x6F645F6D675F5F
movq %rax, (%r14)
movq %r15, %rdi
leaq 0x2598(%rip), %rsi      # 0xd240
movq %r12, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x3fec(%rip), %rsi      # 0xecab
movq %r14, %rdx
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
movq %rbp, %rdi
movq %rbx, %rsi
movq %r15, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r14, %rdi
movq %r12, %rsi
movq %r14, %rdx
pushq $0x2
popq %rcx
pushq $0x1
popq %r8
xorl %r9d, %r9d
pushq %rbp
pushq %r15
pushq $0x0
pushq $0x0
callq 0x9b9e
addq $0x20, %rsp
movw $0xa, %bx
movw %bx, (%r13)
movq %r13, %rdi
callq 0x9a0c
movw %bx, 0x10(%r13)
movups 0x4009(%rip), %xmm0     # 0xed2d
movups %xmm0, (%r13)
movq %r13, %rdi
callq 0x9a0c
movq 0x10(%rsp), %rax
leaq 0x18(%rax), %rbx
movq %rbx, 0x18(%rsp)
movq (%rbx), %rbx
testq %rbx, %rbx
je 0xad96
cmpl $0x1, 0x10(%rbx)
jne 0xad90
movq 0x18(%rbx), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xad5e
cmpl $0x25, %eax
jne 0xad61
incq %rdi
callq 0x1393
movq %r14, %rdi
movq %rax, %rsi
callq 0x1060
movq %r13, %rdi
leaq 0x3fc4(%rip), %rsi      # 0xed3f
movq %r14, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
addq $0x8, %rbx
jmp 0xad3f
movw $0xa, (%r13)
movq %r13, %rdi
callq 0x9a0c
movabsq $0x75677261202f2f09, %rax # imm = 0x75677261202F2F09
movq %rax, (%r13)
movabsq $0xa73746e656d75, %rax  # imm = 0xA73746E656D75
movq %rax, 0x7(%r13)
movq %r13, %rdi
callq 0x9a0c
xorl %ebx, %ebx
movq 0x18(%rsp), %r12
movq (%r12), %r12
testq %r12, %r12
je 0xaed8
cmpl $0x4, 0x10(%r12)
jne 0xaecf
movq 0x18(%r12), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xadfb
cmpl $0x25, %eax
jne 0xadfe
incq %rdi
callq 0x1393
movq (%rsp), %r14
movq %r14, %rdi
leaq 0x3f56(%rip), %rsi      # 0xed67
movq %rax, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r15, %rdi
leaq 0x241b(%rip), %rsi      # 0xd240
movq 0x8(%rsp), %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x3e6d(%rip), %rsi      # 0xecab
movq %r14, %rdx
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
movl 0x44(%r12), %eax
testl %eax, %eax
jle 0xae79
leal -0x1(,%rax,8), %edx
movq %rbp, %rdi
leaq 0x3f04(%rip), %rsi      # 0xed71
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
jmp 0xae8d
movq %rbp, %rdi
leaq 0x3e33(%rip), %rsi      # 0xecb6
movq %r15, %rdx
xorl %eax, %eax
callq 0x11a0
movq 0x18(%r12), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xae9f
cmpl $0x25, %eax
jne 0xaea2
incq %rdi
callq 0x1393
movl 0x44(%r12), %r9d
movq (%rsp), %rdi
movq 0x8(%rsp), %rsi
movq %rax, %rdx
pushq $0x3
popq %rcx
xorl %r8d, %r8d
pushq %rbp
pushq %r15
pushq %rbx
pushq $0x0
callq 0x9b9e
addq $0x20, %rsp
incl %ebx
addq $0x8, %r12
jmp 0xadd0
movw $0xa, (%r13)
movq %r13, %rdi
callq 0x9a0c
movabsq $0xa6e6f69746375, %rax  # imm = 0xA6E6F69746375
movq %rax, 0xe(%r13)
movups 0x3e85(%rip), %xmm0     # 0xed81
movups %xmm0, (%r13)
movq %r13, %r14
movq %r13, %rdi
callq 0x9a0c
movq 0x10(%rsp), %rax
leaq 0x20(%rax), %r13
movq (%r13), %r13
testq %r13, %r13
je 0xb100
leaq 0x20(%r13), %rbx
movq (%rbx), %rbx
testq %rbx, %rbx
je 0xb0f1
movq 0x10(%rbx), %r12
movq %r12, %rdi
leaq 0x3dbd(%rip), %rsi      # 0xecfd
callq 0x1100
testl %eax, %eax
je 0xafbd
movq %r12, %rdi
leaq 0x3d7f(%rip), %rsi      # 0xecd2
callq 0x1100
testl %eax, %eax
je 0xafbd
movq %r12, %rdi
leaq 0x3d60(%rip), %rsi      # 0xecc6
callq 0x1100
testl %eax, %eax
je 0xafbd
movq %r12, %rdi
leaq 0x3e39(%rip), %rsi      # 0xedb2
callq 0x1100
testl %eax, %eax
je 0xafbd
movq 0x10(%r13), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xaf93
cmpl $0x25, %eax
jne 0xaf96
incq %rdi
movq (%rsp), %r12
callq 0x1393
movq 0x10(%rbx), %rcx
movl 0x28(%rbx), %r8d
movq %r12, %rdi
leaq 0x3b0f(%rip), %rsi      # 0xeac0
movq %rax, %rdx
xorl %eax, %eax
callq 0x11a0
jmp 0xaff2
movq 0x10(%r13), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xafce
cmpl $0x25, %eax
jne 0xafd1
incq %rdi
movq (%rsp), %r12
callq 0x1393
movq 0x10(%rbx), %rcx
movq %r12, %rdi
leaq 0x265f(%rip), %rsi      # 0xd647
movq %rax, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r15, %rdi
leaq 0x2244(%rip), %rsi      # 0xd240
movq 0x8(%rsp), %rdx
movq %r12, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r12, %rdx
movq %r14, %rdi
leaq 0x3c93(%rip), %rsi      # 0xecab
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r14, %rdi
callq 0x9a0c
movl 0x24(%rbx), %edx
testl %edx, %edx
jle 0xb049
decl %edx
movq %rbp, %rdi
leaq 0x3d34(%rip), %rsi      # 0xed71
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
jmp 0xb05d
movq %rbp, %rdi
leaq 0x3c63(%rip), %rsi      # 0xecb6
movq %r15, %rdx
xorl %eax, %eax
callq 0x11a0
movq 0x10(%rbx), %rbp
movq %rbp, %rdi
leaq 0x3c5b(%rip), %rsi      # 0xecc6
callq 0x1100
xorl %r12d, %r12d
testl %eax, %eax
je 0xb0a2
movq %rbp, %rdi
leaq 0x3c51(%rip), %rsi      # 0xecd2
callq 0x1100
testl %eax, %eax
je 0xb0a2
movq %rbp, %rdi
leaq 0x3d1e(%rip), %rsi      # 0xedb2
callq 0x1100
xorl %r12d, %r12d
testl %eax, %eax
setne %r12b
movq 0x10(%r13), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xb0b3
cmpl $0x25, %eax
jne 0xb0b6
incq %rdi
callq 0x1393
movl 0x28(%rbx), %r10d
movq (%rsp), %rdi
movq 0x8(%rsp), %rsi
movq %rbp, %rdx
pushq $0x5
popq %rcx
movl %r12d, %r8d
xorl %r9d, %r9d
movq 0x20(%rsp), %rbp
pushq %rbp
pushq %r15
pushq %r10
pushq %rax
callq 0x9b9e
addq $0x20, %rsp
addq $0x8, %rbx
jmp 0xaf26
movw $0xa, (%r14)
addq $0x8, %r13
jmp 0xaf15
movq %r14, %r13
movw $0xa, %bx
movw %bx, (%r14)
movq %r14, %rdi
callq 0x9a0c
movw %bx, 0x10(%r14)
movups 0x3c78(%rip), %xmm0     # 0xed97
movups %xmm0, (%r14)
movq %r14, %rdi
callq 0x9a0c
movq 0x8(%rsp), %r12
movq 0x18(%rsp), %rbx
movq (%rbx), %rbx
testq %rbx, %rbx
je 0xb209
cmpl $0x5, 0x10(%rbx)
jne 0xb200
movq 0x20(%rbx), %rdi
leaq 0x1eae(%rip), %rsi      # 0xd004
movq %rbx, %r14
callq 0x1100
testl %eax, %eax
je 0xb200
movq %r15, %rdi
leaq 0x3c39(%rip), %rsi      # 0xeda9
movq %r12, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x3c35(%rip), %rsi      # 0xedb9
leaq 0x3c20(%rip), %rdx      # 0xedab
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9a0c
movl 0x44(%rbx), %eax
testl %eax, %eax
jle 0xb1c1
leal -0x1(,%rax,8), %edx
movq %rbp, %rdi
leaq 0x3bbc(%rip), %rsi      # 0xed71
movq %r15, %rcx
xorl %eax, %eax
callq 0x11a0
jmp 0xb1d5
movq %rbp, %rdi
leaq 0x3aeb(%rip), %rsi      # 0xecb6
movq %r15, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r14, %rbx
movl 0x44(%r14), %r9d
leaq 0x3bc8(%rip), %rdi      # 0xedab
movq %r12, %rsi
movq %r15, %rdx
pushq $0x6
popq %rcx
pushq $0x1
popq %r8
pushq %rbp
pushq %r15
pushq $0x0
pushq %r15
callq 0x9b9e
addq $0x20, %rsp
addq $0x8, %rbx
jmp 0xb135
movl $0xa3b29, (%r13)        # imm = 0xA3B29
movq %r13, %rdi
callq 0x9a0c
movq 0x10(%rsp), %rbx
movq 0x8(%rbx), %rbx
movq %r12, %rdi
callq 0x1030
jmp 0xa667
movq %r15, %rdi
callq 0x1030
xorl %eax, %eax
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq