// File: /workspace/github_cpp_makefile_star2_O2/akshayrajput[P]ARMV8_Simulator/./ADDS.cpp
// Function: ADDS()
void ADDS()
{
    int sf = IR.getLowerData() & 0x80000000;
    int op = IR.getLowerData() & 0x40000000;
    int S =  IR.getLowerData() & 0x20000000;
    int mod = (IR.getLowerData() & 0x1f000000) >> 24;
    int shift = (IR.getLowerData() & 0x00c00000) >> 22;
    int imm12 = (IR.getLowerData() & 0x003ffc00) >>10;
    int imm6 = (IR.getLowerData() & 0x0000fc00) >>10;
    int rm = (IR.getLowerData() & 0x001f0000) >> 16;
    int rn = (IR.getLowerData() & 0x000003e0) >> 5;
    int rd = (IR.getLowerData() & 0x0000001f);
    bool sub_op = false;
    int64_t imm;
    int amount = imm6;
    
    if(op)  sub_op = true;

    if(rd == 31 && sub_op)
    {
 	    CMP();
	    return;
    }
    if(shift == 0)
    {
        if (sf)
        {
            imm = (uint64_t)imm12;
        }
        else
        {
            imm = imm12;
        }
    }
    
    else if(shift == 1)
    {
        if(sf)
        {
            imm = (uint64_t)imm12;
            imm = imm << 12;
        }
        else
        {
            imm = imm12;
            imm = imm << 12;
        }
    }
    bool setFlag = false;
    if(S == 1) setFlag = true;
    if(mod == 17) // ADDS immediate
    {
        if(sf)  //64 bit
        {
            int carry = 0;
            if(sub_op)
            {
                imm = -imm;
                carry = 0;   
            }
            uint64_t rn_data = R[rn].getData();
            uint64_t dat = rn_data + imm + carry;
            
            
         	if(rn_data > 0 && imm > 0 && dat < 0)
		{
            		OFLAG = true;
		    	printf("[log] - Overflow flag\n");
         	}
        	if(rn_data < 0 && imm < 0 && dat > 0)
		{
        	    OFLAG = true;
			    printf("[log] - Zero flag set\n");
        	}

                ZFLAG = (dat == 0);
                
		if(ZFLAG)
			printf("[log] - Zero flag set\n");
	
                NFLAG = (dat < 0);
		if(NFLAG)
			printf("[log] - Negative flag set\n");
                
                if(!sub_op)
		{	
			CFLAG = rn_data > (0xffffffffffffffff - (imm + carry));
        	}
		else
		{
			CFLAG = rn_data < (-imm);
		}
		if(CFLAG)
			printf("[log] - Carry flag set\n");

            if(rd == 31 && !S)
                R[31].setData(dat);
            else
                R[rd].setData(dat);
        }
        
        else//32 bit
        {
            int carry = 0;
            if(sub_op)
            {
                imm = -imm;
                carry = 0;   
            }
            
            int rn_data = R[rn].getLowerData();
            int dat = rn_data + imm + carry;
            
            
            if(R[rn].getLowerData() > 0 && imm > 0 && dat < 0)
             {
                OFLAG = true;
                printf("[log] - Overflow flag set\n");
             }
            
            if(dat == 0)
            {
                ZFLAG = true;
                printf("[log] - Zero flag set\n");
            }
            if(dat < 0)
            {
                NFLAG = true;
                printf("[log] - Negative flag set\n");
            }
            if(!sub_op)
	      CFLAG = rn_data > (0xffffffff - (imm + carry));
            else
		{
			CFLAG = rn_data < (-imm);
		}


            if(CFLAG)
            	printf("[log] - Carry flag set.\n");
            
            if(rd == 31 && !S)
                R[31].setData(dat);
            else
                R[rd].setData(dat);
        }
    }
    
    if(mod == 11)   //shifted register
    {
	printf("[log] - ADDS register\n");
        if(sf)      //64 bit registers
        {
            uint64_t op1 = R[rn].getData();
            
            uint64_t op2 = R[rm].getData();
            if(shift == 0)
                op2 = op2 << (amount%64);
            else if(shift == 1 && shift == 2)
                op2 = op2 >> (amount%64);
            uint64_t carry = 0;
            if(sub_op)
            {
                op2 = -op2;
                carry = 0;
            }
            
            uint64_t dat = op1 + op2 + carry;
            if(rd == 31 && !S)
                R[31].setData(dat);
            else
                R[rd].setData(dat);
           
            if(op1 > 0 && op2 > 0 && dat < 0)
	    	{
			printf("[log] - Overflow flag set\n");
                OFLAG = true;
            }
            if(dat == 0)
	    	{
			printf("[log] - Zero flag set \n");
                ZFLAG = true;
            }
            if(dat < 0)
	    {
		printf("[log]- Negative flag set\n");
                NFLAG = true;
            }
		if(!sub_op)
            		CFLAG = op1 > (0xffffffffffffffff - (op2 + carry));
		else
		{
			CFLAG = op1 < (-op2);
		}

	    if(CFLAG)
	    {
		printf("[log] -Carry flag set \n");
	    }
        }
       
        else     //32 bit registers
        {
            int op1 = R[rn].getLowerData();
            
            int op2 = R[rm].getLowerData();
            if(shift == 0)
                op2 = op2 << (amount%32);
            else if(shift == 1 && shift == 2)
                op2 = op2 >> (amount%32);
            int carry = 0;
            if(sub_op)
            {
                op2 = ~op2;
                carry = 1;
            }
            
            int dat = op1 + op2 + carry;
            if(rd == 31 && !S)
                R[31].setLowerData(dat);
            else
                R[rd].setLowerData(dat);
           
            if(op1 > 0 && op2 > 0 && dat < 0)
	    {
                OFLAG = true;
		printf("[log] -Overflow flag set \n");

	    }
            if(dat == 0)
	    {
                ZFLAG = true;
		printf("[log] -Zero flag set \n");
	    }

            if(dat < 0)
	    {
                NFLAG = true; 
		printf("[log] -Negative flag set \n");
            }   
	    if(!sub_op)
            	CFLAG = op1 > (0xffffffff - op2);
	    else
	    {
	    	CFLAG = op1<(-op2);
	    }

	    if(CFLAG)
		    printf("[log] - carry flag set");
           
        }
       
    }
    
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
leaq 0x17efc(%rip), %r14     # 0x1a1e0
movq %r14, %rdi
callq 0x5b26
movl %eax, 0x18(%rsp)
movq %r14, %rdi
callq 0x5b26
movl %eax, %r12d
movq %r14, %rdi
callq 0x5b26
movl %eax, 0x14(%rsp)
movq %r14, %rdi
callq 0x5b26
movl %eax, %ebx
movq %r14, %rdi
callq 0x5b26
movl %eax, %r15d
movq %r14, %rdi
callq 0x5b26
movl %eax, %r13d
movq %r14, %rdi
callq 0x5b26
movl %eax, 0x10(%rsp)
movq %r14, %rdi
callq 0x5b26
movl %eax, 0x24(%rsp)
movq %r14, %rdi
callq 0x5b26
movl %eax, %ebp
movq %r14, %rdi
callq 0x5b26
movl %eax, %r14d
andl $0x1f, %r14d
movl %r12d, 0xc(%rsp)
btl $0x1e, %r12d
setae %al
cmpl $0x1f, %r14d
setne %cl
orb %al, %cl
je 0x239d
shrl $0x18, %ebx
andl $0x1f, %ebx
shrl $0x16, %r15d
andl $0x3, %r15d
shrl $0xa, %r13d
andl $0xfff, %r13d           # imm = 0xFFF
shrl $0x5, %ebp
testl %r15d, %r15d
je 0x23b0
cmpl $0x1, %r15d
jne 0x23b3
shll $0xc, %r13d
jmp 0x23b3
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x1ed8
movl %r13d, %r13d
andl $0x1f, %ebp
cmpl $0xb, %ebx
je 0x244c
cmpl $0x11, %ebx
jne 0x27bb
movq %r13, %r12
negq %r12
btl $0x1e, 0xc(%rsp)
cmovaeq %r13, %r12
btl $0x1f, 0x18(%rsp)
movl %ebp, %eax
leaq 0x7cf9(%rip), %r13      # 0xa0e0
leaq (%r13,%rax,8), %rbx
jb 0x253b
movq %rbx, %rdi
callq 0x5b26
movslq %eax, %r15
leal (%r15,%r12), %ebp
movq %rbx, %rdi
callq 0x5b26
testl %eax, %eax
je 0x268e
testq %r12, %r12
jle 0x268e
testl %ebp, %ebp
jns 0x268e
movb $0x1, 0x7ca9(%rip)      # 0xa0d2
leaq 0x4218(%rip), %rdi      # 0x6648
callq 0x1120
leaq 0x432b(%rip), %rdi      # 0x6767
leaq 0x7c90(%rip), %rax      # 0xa0d3
movl 0x14(%rsp), %ebx
jmp 0x26ba
movl 0x10(%rsp), %ebx
shrl $0xa, %ebx
movl 0x24(%rsp), %r12d
shrl $0x10, %r12d
andl $0x1f, %r12d
leaq 0x422a(%rip), %rdi      # 0x6691
callq 0x1120
btl $0x1f, 0x18(%rsp)
movl %ebp, %eax
leaq 0x7c65(%rip), %r13      # 0xa0e0
leaq (%r13,%rax,8), %rdi
movl %r12d, %eax
leaq (%r13,%rax,8), %r12
jb 0x25c8
movl %r14d, %eax
xorl $0x1f, %eax
movl %eax, 0x10(%rsp)
movl 0xc(%rsp), %eax
movl %eax, %ebp
shrl $0x1e, %ebp
andl $0x1, %ebp
callq 0x5b26
movq %rax, 0x18(%rsp)
movq %r12, %rdi
callq 0x5b26
andb $0x1f, %bl
xorl %edx, %edx
testl %r15d, %r15d
movq 0x18(%rsp), %r15
movzbl %bl, %ecx
cmovnel %edx, %ecx
shll %cl, %eax
leal (%r15,%rbp), %ebx
negl %ebp
xorl %eax, %ebp
addl %ebp, %ebx
movl 0x14(%rsp), %eax
andl $0x20000000, %eax       # imm = 0x20000000
shll $0x3, %r14d
orl 0x10(%rsp), %eax
movl $0xf8, %eax
cmovneq %r14, %rax
addq %rax, %r13
movq %r13, %rdi
movl %ebx, %esi
callq 0x5b30
testl %ebp, %ebp
jle 0x2748
testl %r15d, %r15d
jle 0x2748
testl %ebx, %ebx
jns 0x2748
movb $0x1, 0x7bb6(%rip)      # 0xa0d2
leaq 0x4184(%rip), %rdi      # 0x66a7
callq 0x1120
leaq 0x4192(%rip), %rdi      # 0x66c1
leaq 0x7b9d(%rip), %rax      # 0xa0d3
jmp 0x2770
movq %rbx, %rdi
callq 0x5b22
movq %rax, %r15
movq %rax, %rbx
addq %r12, %rbx
sete 0x7b7e(%rip)            # 0xa0d1
jne 0x2561
leaq 0x41f5(%rip), %rdi      # 0x6751
callq 0x1120
xorl %eax, %eax
movq %r15, %rcx
addq %r12, %rcx
setb %al
negq %r12
xorl %ecx, %ecx
cmpq %r12, %r15
setb %cl
btl $0x1e, 0xc(%rsp)
movb $0x0, 0x7b4f(%rip)      # 0xa0d3
cmovael %eax, %ecx
movb %cl, 0x7b47(%rip)       # 0xa0d4
testb %cl, %cl
je 0x259d
leaq 0x40e2(%rip), %rdi      # 0x667a
callq 0x1120
movl %r14d, %eax
xorl $0x1f, %eax
movl 0x14(%rsp), %ecx
andl $0x20000000, %ecx       # imm = 0x20000000
orl %eax, %ecx
je 0x271f
movl %r14d, %eax
leaq (,%rax,8), %rdi
addq %r13, %rdi
jmp 0x2726
andl $0x3f, %ebx
movl %ebx, 0x10(%rsp)
movl %r14d, %ebp
xorl $0x1f, %ebp
callq 0x5b22
movq %rax, %rbx
movq %r12, %rdi
callq 0x5b22
xorl %ecx, %ecx
testl %r15d, %r15d
cmovel 0x10(%rsp), %ecx
shlq %cl, %rax
movq %rax, %r15
negq %r15
movl 0xc(%rsp), %r12d
btl $0x1e, %r12d
cmovaeq %rax, %r15
movl 0x14(%rsp), %eax
andl $0x20000000, %eax       # imm = 0x20000000
shll $0x3, %r14d
orl %ebp, %eax
movl $0xf8, %eax
cmovneq %r14, %rax
addq %rax, %r13
leaq (%r15,%rbx), %rsi
movq %r13, %rdi
callq 0x5b2a
movq %r15, %rax
addq %rbx, %rax
jne 0x2648
leaq 0x409f(%rip), %rdi      # 0x66db
callq 0x1120
movb $0x1, 0x7a89(%rip)      # 0xa0d1
xorl %eax, %eax
movq %r15, %rcx
addq %rbx, %rcx
setb %al
negq %r15
xorl %ecx, %ecx
cmpq %r15, %rbx
setb %cl
btl $0x1e, %r12d
cmovael %eax, %ecx
movb %cl, 0x7a68(%rip)       # 0xa0d4
testb %cl, %cl
je 0x27bb
leaq 0x4134(%rip), %rdi      # 0x67af
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x1120
leaq 0x7a3c(%rip), %rcx      # 0xa0d1
leaq 0x7a37(%rip), %rax      # 0xa0d3
testl %ebp, %ebp
cmoveq %rcx, %rax
leaq 0x40a8(%rip), %rcx      # 0x6751
leaq 0x40b7(%rip), %rdi      # 0x6767
cmoveq %rcx, %rdi
movl 0x14(%rsp), %ebx
jg 0x26c2
movb $0x1, (%rax)
callq 0x1120
movl $0xffffffff, %eax       # imm = 0xFFFFFFFF
subq %r12, %rax
xorl %ecx, %ecx
cmpq %r15, %rax
setl %cl
negq %r12
xorl %eax, %eax
cmpq %r12, %r15
setl %al
btl $0x1e, 0xc(%rsp)
cmovael %ecx, %eax
movb %al, 0x79e8(%rip)       # 0xa0d4
testb %al, %al
je 0x26fc
leaq 0x3f6b(%rip), %rdi      # 0x6662
callq 0x1120
movl %r14d, %eax
xorl $0x1f, %eax
andl $0x20000000, %ebx       # imm = 0x20000000
orl %eax, %ebx
je 0x272b
movl %r14d, %eax
leaq (,%rax,8), %rdi
addq %r13, %rdi
movslq %ebp, %rsi
jmp 0x2735
leaq 0x7ab2(%rip), %rdi      # 0xa1d8
movq %rbx, %rsi
jmp 0x2735
movslq %ebp, %rsi
leaq 0x7aa3(%rip), %rdi      # 0xa1d8
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x5b2a
leaq 0x7982(%rip), %rcx      # 0xa0d1
leaq 0x797d(%rip), %rax      # 0xa0d3
testl %ebx, %ebx
cmoveq %rcx, %rax
leaq 0x4036(%rip), %rcx      # 0x6799
leaq 0x3f57(%rip), %rdi      # 0x66c1
cmoveq %rcx, %rdi
jg 0x2778
movb $0x1, (%rax)
callq 0x1120
xorl %eax, %eax
movl %ebp, %ecx
addl %r15d, %ecx
setb %al
negl %ebp
xorl %ecx, %ecx
cmpl %ebp, %r15d
setl %cl
btl $0x1e, 0xc(%rsp)
cmovael %eax, %ecx
movb %cl, 0x7939(%rip)       # 0xa0d4
testb %cl, %cl
je 0x27bb
leaq 0x39c4(%rip), %rdi      # 0x616a
xorl %eax, %eax
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x1030
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq