// File: /workspace/github_c_makefile_star2_O0/samtools[P]htslib/htscodecs/htscodecs/rANS_static32x16pr_avx2.c
// Function: rans_compress_O0_32x16_avx2
unsigned char *rans_compress_O0_32x16_avx2(unsigned char *in,
                                           unsigned int in_size,
                                           unsigned char *out,
                                           unsigned int *out_size) {
    unsigned char *cp, *out_end;
    RansEncSymbol syms[256];
    RansState ransN[NX] __attribute__((aligned(32)));
    uint8_t* ptr;
    uint32_t F[256+MAGIC] = {0};
    int i, j, tab_size = 0, x, z;
    // -20 for order/size/meta
    uint32_t bound = rans_compress_bound_4x16(in_size,0)-20;

    if (!out) {
        *out_size = bound;
        out = malloc(*out_size);
    }
    if (!out || bound > *out_size)
        return NULL;

    // If "out" isn't word aligned, tweak out_end/ptr to ensure it is.
    // We already added more round in bound to allow for this.
    if (((size_t)out)&1)
        bound--;
    ptr = out_end = out + bound;

    if (in_size == 0)
        goto empty;

    // Compute statistics
    if (hist8(in, in_size, F) < 0)
        return NULL;

    // Normalise so frequences sum to power of 2
    uint32_t fsum = in_size;
    uint32_t max_val = round2(fsum);
    if (max_val > TOTFREQ)
        max_val = TOTFREQ;

    if (normalise_freq(F, fsum, max_val) < 0)
        return NULL;
    fsum=max_val;

    cp = out;
    cp += encode_freq(cp, F);
    tab_size = cp-out;
    //write(2, out+4, cp-(out+4));

    if (normalise_freq(F, fsum, TOTFREQ) < 0)
        return NULL;

    // Encode statistics.
    for (x = j = 0; j < 256; j++) {
        if (F[j]) {
            RansEncSymbolInit(&syms[j], x, F[j], TF_SHIFT);
            x += F[j];
        }
    }

    for (z = 0; z < NX; z++)
      RansEncInit(&ransN[z]);

    z = i = in_size&(NX-1);
    while (z-- > 0)
      RansEncPutSymbol(&ransN[z], &ptr, &syms[in[in_size-(i-z)]]);

    uint16_t *ptr16 = (uint16_t *)ptr;

    LOAD(Rv, ransN);

    for (i=(in_size &~(NX-1)); i>0; i-=NX) {
        // We need to gather sym[curr_char][last_char] structs.
        // These hold 4 32-bit values, so are 128 bit each, and
        // are loaded from 32 distinct addresses.
        //
        // We load them into 32 128-bit lanes and then combine to get
        // 16 avx-256 registers.
        // These are now ABCD ABCD ABCD ABCD... orientation
        // We can then "gather" from these registers via a combination
        // of shuffle / permutes / and / or operations.  This is less
        // IO than repeating 4 sets of gathers/loads 32-times over.

        // DCBA holding 4 elements in a syms[] array
        // -> 4-way rotate via shuffles
        // [0] DCBA  11 10 01 00  E4
        // [1] CBAD  10 01 00 11  93
        // [2] BADC  01 00 11 10  4E
        // [3] ADCB  00 11 10 01  39
        //
        // Then AND to select relevant lanes and OR
        // [0] ......A0
        // [1] ....A1..
        // [2] ..A2....
        // [3] A3......  OR to get A3A2A1A0
        //
        // or:
        // [0] ....B0..
        // [1] ..B1....
        // [2] B2......
        // [3] ......B3  OR to get B2B1B0B3 and shuffle to B3B2B1B0

        __m256i sh[16];
        for (z = 0; z < 16; z+=4) {
            int Z = i - NX + z*2;

#define m128_to_256 _mm256_castsi128_si256
            __m256i t0, t1, t2, t3;
            __m128i *s0, *s1, *s2, *s3;
            s0 = (__m128i *)(&syms[in[Z+0]]);
            s1 = (__m128i *)(&syms[in[Z+4]]);
            s2 = (__m128i *)(&syms[in[Z+1]]);
            s3 = (__m128i *)(&syms[in[Z+5]]);

            // FIXME: try load instead of loadu, as 128-bit aligned.
            t0 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s0)), 0xE4);
            t1 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s1)), 0xE4);
            t2 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s2)), 0x93);
            t3 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s3)), 0x93);

            sh[z+0] = _mm256_permute2x128_si256(t0, t1, 0x20);
            sh[z+1] = _mm256_permute2x128_si256(t2, t3, 0x20);

            s0 = (__m128i *)(&syms[in[Z+2]]);
            s1 = (__m128i *)(&syms[in[Z+6]]);
            s2 = (__m128i *)(&syms[in[Z+3]]);
            s3 = (__m128i *)(&syms[in[Z+7]]);

            t0 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s0)), 0x4E);
            t1 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s1)), 0x4E);
            t2 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s2)), 0x39);
            t3 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s3)), 0x39);

            sh[z+2] = _mm256_permute2x128_si256(t0, t1, 0x20);
            sh[z+3] = _mm256_permute2x128_si256(t2, t3, 0x20);

            // potential to set xmax, rf, bias, and SD in-situ here, removing
            // the need to hold sh[] in regs.  Doing so doesn't seem to speed
            // things up though.
        }

        __m256i xA = _mm256_set_epi32(0,0,0,-1, 0,0,0,-1);
        __m256i xB = _mm256_set_epi32(0,0,-1,0, 0,0,-1,0);
        __m256i xC = _mm256_set_epi32(0,-1,0,0, 0,-1,0,0);
        __m256i xD = _mm256_set_epi32(-1,0,0,0, -1,0,0,0);

#define SYM_LOAD(x, A, B, C, D)                                         \
        _mm256_or_si256(_mm256_or_si256(_mm256_and_si256(sh[x+0], A),   \
                                        _mm256_and_si256(sh[x+1], B)),  \
                        _mm256_or_si256(_mm256_and_si256(sh[x+2], C),   \
                                        _mm256_and_si256(sh[x+3], D)))

        // Renorm:
        // if (x > x_max) {*--ptr16 = x & 0xffff; x >>= 16;}
        __m256i xmax1 = SYM_LOAD( 0, xA, xB, xC, xD);
        __m256i xmax2 = SYM_LOAD( 4, xA, xB, xC, xD);
        __m256i xmax3 = SYM_LOAD( 8, xA, xB, xC, xD);
        __m256i xmax4 = SYM_LOAD(12, xA, xB, xC, xD);

        __m256i cv1 = _mm256_cmpgt_epi32(Rv1, xmax1);
        __m256i cv2 = _mm256_cmpgt_epi32(Rv2, xmax2);
        __m256i cv3 = _mm256_cmpgt_epi32(Rv3, xmax3);
        __m256i cv4 = _mm256_cmpgt_epi32(Rv4, xmax4);

        // Store bottom 16-bits at ptr16
        unsigned int imask1 = _mm256_movemask_ps((__m256)cv1);
        unsigned int imask2 = _mm256_movemask_ps((__m256)cv2);
        unsigned int imask3 = _mm256_movemask_ps((__m256)cv3);
        unsigned int imask4 = _mm256_movemask_ps((__m256)cv4);

        __m256i idx1 = _mm256_load_si256((const __m256i*)permutec[imask1]);
        __m256i idx2 = _mm256_load_si256((const __m256i*)permutec[imask2]);
        __m256i idx3 = _mm256_load_si256((const __m256i*)permutec[imask3]);
        __m256i idx4 = _mm256_load_si256((const __m256i*)permutec[imask4]);

        // Permute; to gather together the rans states that need flushing
        __m256i V1, V2, V3, V4;
        V1 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv1, cv1), idx1);
        V2 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv2, cv2), idx2);
        V3 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv3, cv3), idx3);
        V4 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv4, cv4), idx4);
        
        // We only flush bottom 16 bits, to squash 32-bit states into 16 bit.
        V1 = _mm256_and_si256(V1, _mm256_set1_epi32(0xffff));
        V2 = _mm256_and_si256(V2, _mm256_set1_epi32(0xffff));
        V3 = _mm256_and_si256(V3, _mm256_set1_epi32(0xffff));
        V4 = _mm256_and_si256(V4, _mm256_set1_epi32(0xffff));
        __m256i V12 = _mm256_packus_epi32(V1, V2);
        __m256i V34 = _mm256_packus_epi32(V3, V4);

        // It's BAba order, want BbAa so shuffle.
        V12 = _mm256_permute4x64_epi64(V12, 0xd8);
        V34 = _mm256_permute4x64_epi64(V34, 0xd8);

        // Now we have bottom N 16-bit values in each V12/V34 to flush
        __m128i f =  _mm256_extractf128_si256(V34, 1);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask4);

        f =  _mm256_extractf128_si256(V34, 0);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask3);

        f =  _mm256_extractf128_si256(V12, 1);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask2);

        f =  _mm256_extractf128_si256(V12, 0);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask1);

        __m256i Rs;
        Rs = _mm256_srli_epi32(Rv1,16); Rv1 = _mm256_blendv_epi8(Rv1, Rs, cv1);
        Rs = _mm256_srli_epi32(Rv2,16); Rv2 = _mm256_blendv_epi8(Rv2, Rs, cv2);
        Rs = _mm256_srli_epi32(Rv3,16); Rv3 = _mm256_blendv_epi8(Rv3, Rs, cv3);
        Rs = _mm256_srli_epi32(Rv4,16); Rv4 = _mm256_blendv_epi8(Rv4, Rs, cv4);

        // Cannot trivially replace the multiply as mulhi_epu32 doesn't
        // exist (only mullo).
        // However we can use _mm256_mul_epu32 twice to get 64bit results
        // (half our lanes) and shift/or to get the answer.
        //
        // (AVX512 allows us to hold it all in 64-bit lanes and use mullo_epi64
        // plus a shift.  KNC has mulhi_epi32, but not sure if this is
        // available.)
        __m256i rfv1 = _mm256_shuffle_epi32(SYM_LOAD( 0, xB, xC, xD, xA),0x39);
        __m256i rfv2 = _mm256_shuffle_epi32(SYM_LOAD( 4, xB, xC, xD, xA),0x39);
        __m256i rfv3 = _mm256_shuffle_epi32(SYM_LOAD( 8, xB, xC, xD, xA),0x39);
        __m256i rfv4 = _mm256_shuffle_epi32(SYM_LOAD(12, xB, xC, xD, xA),0x39);

        rfv1 = _mm256_mulhi_epu32(Rv1, rfv1);
        rfv2 = _mm256_mulhi_epu32(Rv2, rfv2);
        rfv3 = _mm256_mulhi_epu32(Rv3, rfv3);
        rfv4 = _mm256_mulhi_epu32(Rv4, rfv4);

        __m256i SDv1 = _mm256_shuffle_epi32(SYM_LOAD( 0, xD, xA, xB, xC),0x93);
        __m256i SDv2 = _mm256_shuffle_epi32(SYM_LOAD( 4, xD, xA, xB, xC),0x93);
        __m256i SDv3 = _mm256_shuffle_epi32(SYM_LOAD( 8, xD, xA, xB, xC),0x93);
        __m256i SDv4 = _mm256_shuffle_epi32(SYM_LOAD(12, xD, xA, xB, xC),0x93);

        __m256i shiftv1 = _mm256_srli_epi32(SDv1, 16);
        __m256i shiftv2 = _mm256_srli_epi32(SDv2, 16);
        __m256i shiftv3 = _mm256_srli_epi32(SDv3, 16);
        __m256i shiftv4 = _mm256_srli_epi32(SDv4, 16);

        shiftv1 = _mm256_sub_epi32(shiftv1, _mm256_set1_epi32(32));
        shiftv2 = _mm256_sub_epi32(shiftv2, _mm256_set1_epi32(32));
        shiftv3 = _mm256_sub_epi32(shiftv3, _mm256_set1_epi32(32));
        shiftv4 = _mm256_sub_epi32(shiftv4, _mm256_set1_epi32(32));

        __m256i qv1 = _mm256_srlv_epi32(rfv1, shiftv1);
        __m256i qv2 = _mm256_srlv_epi32(rfv2, shiftv2);

        __m256i freqv1 = _mm256_and_si256(SDv1, _mm256_set1_epi32(0xffff));
        __m256i freqv2 = _mm256_and_si256(SDv2, _mm256_set1_epi32(0xffff));
        qv1 = _mm256_mullo_epi32(qv1, freqv1);
        qv2 = _mm256_mullo_epi32(qv2, freqv2);

        __m256i qv3 = _mm256_srlv_epi32(rfv3, shiftv3);
        __m256i qv4 = _mm256_srlv_epi32(rfv4, shiftv4);

        __m256i freqv3 = _mm256_and_si256(SDv3, _mm256_set1_epi32(0xffff));
        __m256i freqv4 = _mm256_and_si256(SDv4, _mm256_set1_epi32(0xffff));
        qv3 = _mm256_mullo_epi32(qv3, freqv3);
        qv4 = _mm256_mullo_epi32(qv4, freqv4);

        __m256i biasv1=_mm256_shuffle_epi32(SYM_LOAD( 0, xC, xD, xA, xB),0x4E);
        __m256i biasv2=_mm256_shuffle_epi32(SYM_LOAD( 4, xC, xD, xA, xB),0x4E);
        __m256i biasv3=_mm256_shuffle_epi32(SYM_LOAD( 8, xC, xD, xA, xB),0x4E);
        __m256i biasv4=_mm256_shuffle_epi32(SYM_LOAD(12, xC, xD, xA, xB),0x4E);

        qv1 = _mm256_add_epi32(qv1, biasv1);
        qv2 = _mm256_add_epi32(qv2, biasv2);
        qv3 = _mm256_add_epi32(qv3, biasv3);
        qv4 = _mm256_add_epi32(qv4, biasv4);

        Rv1 = _mm256_add_epi32(Rv1, qv1);
        Rv2 = _mm256_add_epi32(Rv2, qv2);
        Rv3 = _mm256_add_epi32(Rv3, qv3);
        Rv4 = _mm256_add_epi32(Rv4, qv4);
    }

    STORE(Rv, ransN);

    ptr = (uint8_t *)ptr16;
    for (z = NX-1; z >= 0; z--)
      RansEncFlush(&ransN[z], &ptr);

 empty:
    // Finalise block size and return it
    *out_size = (out_end - ptr) + tab_size;

//    cp = out;
//    *cp++ = (in_size>> 0) & 0xff;
//    *cp++ = (in_size>> 8) & 0xff;
//    *cp++ = (in_size>>16) & 0xff;
//    *cp++ = (in_size>>24) & 0xff;

    memmove(out + tab_size, ptr, out_end-ptr);

    return out;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x5140, %rsp           # imm = 0x5140
movq %rdi, 0x1eb0(%rsp)
movl %esi, 0x1eac(%rsp)
movq %rdx, 0x1ea0(%rsp)
movq %rcx, 0x1e98(%rsp)
leaq 0x9d0(%rsp), %rdi
xorl %esi, %esi
movl $0x420, %edx            # imm = 0x420
callq 0x4250
movl $0x0, 0x9c4(%rsp)
movl 0x1eac(%rsp), %edi
xorl %esi, %esi
callq 0x8e2d0
subl $0x14, %eax
movl %eax, 0x9b8(%rsp)
cmpq $0x0, 0x1ea0(%rsp)
jne 0x955ba
movl 0x9b8(%rsp), %ecx
movq 0x1e98(%rsp), %rax
movl %ecx, (%rax)
movq 0x1e98(%rsp), %rax
movl (%rax), %eax
movl %eax, %edi
callq 0x4650
movq %rax, 0x1ea0(%rsp)
cmpq $0x0, 0x1ea0(%rsp)
je 0x955d8
movl 0x9b8(%rsp), %eax
movq 0x1e98(%rsp), %rcx
cmpl (%rcx), %eax
jbe 0x955e9
movq $0x0, 0x1eb8(%rsp)
jmp 0x9951d
movq 0x1ea0(%rsp), %rax
andq $0x1, %rax
cmpq $0x0, %rax
je 0x9560c
movl 0x9b8(%rsp), %eax
addl $-0x1, %eax
movl %eax, 0x9b8(%rsp)
movq 0x1ea0(%rsp), %rax
movl 0x9b8(%rsp), %ecx
addq %rcx, %rax
movq %rax, 0x1e88(%rsp)
movq %rax, 0xdf8(%rsp)
cmpl $0x0, 0x1eac(%rsp)
jne 0x9563d
jmp 0x994ad
movq 0x1eb0(%rsp), %rdi
movl 0x1eac(%rsp), %esi
leaq 0x9d0(%rsp), %rdx
callq 0x99530
cmpl $0x0, %eax
jge 0x9566f
movq $0x0, 0x1eb8(%rsp)
jmp 0x9951d
movl 0x1eac(%rsp), %eax
movl %eax, 0x9b4(%rsp)
movl 0x9b4(%rsp), %edi
callq 0x99970
movl %eax, 0x9b0(%rsp)
cmpl $0x1000, 0x9b0(%rsp) # imm = 0x1000
jbe 0x956a8
movl $0x1000, 0x9b0(%rsp) # imm = 0x1000
leaq 0x9d0(%rsp), %rdi
movl 0x9b4(%rsp), %esi
movl 0x9b0(%rsp), %edx
callq 0x999d0
cmpl $0x0, %eax
jge 0x956d9
movq $0x0, 0x1eb8(%rsp)
jmp 0x9951d
movl 0x9b0(%rsp), %eax
movl %eax, 0x9b4(%rsp)
movq 0x1ea0(%rsp), %rax
movq %rax, 0x1e90(%rsp)
movq 0x1e90(%rsp), %rdi
leaq 0x9d0(%rsp), %rsi
callq 0x99c50
movl %eax, %ecx
movq 0x1e90(%rsp), %rax
movslq %ecx, %rcx
addq %rcx, %rax
movq %rax, 0x1e90(%rsp)
movq 0x1e90(%rsp), %rax
movq 0x1ea0(%rsp), %rcx
subq %rcx, %rax
movl %eax, 0x9c4(%rsp)
leaq 0x9d0(%rsp), %rdi
movl 0x9b4(%rsp), %esi
movl $0x1000, %edx           # imm = 0x1000
callq 0x999d0
cmpl $0x0, %eax
jge 0x9576d
movq $0x0, 0x1eb8(%rsp)
jmp 0x9951d
movl $0x0, 0x9c8(%rsp)
movl $0x0, 0x9c0(%rsp)
cmpl $0x100, 0x9c8(%rsp) # imm = 0x100
jge 0x9580e
movslq 0x9c8(%rsp), %rax
cmpl $0x0, 0x9d0(%rsp,%rax,4)
je 0x957f6
movslq 0x9c8(%rsp), %rax
leaq 0xe80(%rsp), %rdi
shlq $0x4, %rax
addq %rax, %rdi
movl 0x9c0(%rsp), %esi
movslq 0x9c8(%rsp), %rax
movl 0x9d0(%rsp,%rax,4), %edx
movl $0xc, %ecx
callq 0x99cf0
movslq 0x9c8(%rsp), %rax
movl 0x9d0(%rsp,%rax,4), %eax
addl 0x9c0(%rsp), %eax
movl %eax, 0x9c0(%rsp)
jmp 0x957f8
movl 0x9c8(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x9c8(%rsp)
jmp 0x95783
movl $0x0, 0x9bc(%rsp)
cmpl $0x20, 0x9bc(%rsp)
jge 0x95852
movslq 0x9bc(%rsp), %rax
leaq 0xe00(%rsp), %rdi
shlq $0x2, %rax
addq %rax, %rdi
callq 0x99e90
movl 0x9bc(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x9bc(%rsp)
jmp 0x95819
movl 0x1eac(%rsp), %eax
andl $0x1f, %eax
movl %eax, 0x9cc(%rsp)
movl %eax, 0x9bc(%rsp)
movl 0x9bc(%rsp), %eax
movl %eax, %ecx
addl $-0x1, %ecx
movl %ecx, 0x9bc(%rsp)
cmpl $0x0, %eax
jle 0x958dc
movslq 0x9bc(%rsp), %rax
leaq 0xe00(%rsp), %rdi
shlq $0x2, %rax
addq %rax, %rdi
movq 0x1eb0(%rsp), %rax
movl 0x1eac(%rsp), %ecx
movl 0x9cc(%rsp), %edx
subl 0x9bc(%rsp), %edx
subl %edx, %ecx
movl %ecx, %ecx
movzbl (%rax,%rcx), %eax
leaq 0xe80(%rsp), %rdx
shlq $0x4, %rax
addq %rax, %rdx
leaq 0xdf8(%rsp), %rsi
callq 0x99eb0
jmp 0x9586a
movq 0xdf8(%rsp), %rax
movq %rax, 0x9a8(%rsp)
leaq 0xe00(%rsp), %rax
movq %rax, 0x1ef8(%rsp)
movq 0x1ef8(%rsp), %rax
vmovdqa (%rax), %ymm0
vmovdqa %ymm0, 0x980(%rsp)
leaq 0xe00(%rsp), %rax
addq $0x20, %rax
movq %rax, 0x1ef0(%rsp)
movq 0x1ef0(%rsp), %rax
vmovdqa (%rax), %ymm0
vmovdqa %ymm0, 0x960(%rsp)
leaq 0xe00(%rsp), %rax
addq $0x40, %rax
movq %rax, 0x1ee8(%rsp)
movq 0x1ee8(%rsp), %rax
vmovdqa (%rax), %ymm0
vmovdqa %ymm0, 0x940(%rsp)
leaq 0xe00(%rsp), %rax
addq $0x60, %rax
movq %rax, 0x1ee0(%rsp)
movq 0x1ee0(%rsp), %rax
vmovdqa (%rax), %ymm0
vmovdqa %ymm0, 0x920(%rsp)
movl 0x1eac(%rsp), %eax
andl $-0x20, %eax
movl %eax, 0x9cc(%rsp)
cmpl $0x0, 0x9cc(%rsp)
jle 0x99364
movl $0x0, 0x9bc(%rsp)
cmpl $0x10, 0x9bc(%rsp)
jge 0x95df7
movl 0x9cc(%rsp), %edx
movl 0x9bc(%rsp), %eax
movl %eax, %ecx
movl %edx, %eax
leal -0x20(%rax,%rcx,2), %eax
movl %eax, 0x71c(%rsp)
movq 0x1eb0(%rsp), %rax
movslq 0x71c(%rsp), %rcx
movzbl (%rax,%rcx), %eax
shll $0x4, %eax
leaq 0xe80(%rsp,%rax), %rax
movq %rax, 0x678(%rsp)
movq 0x1eb0(%rsp), %rcx
movslq 0x71c(%rsp), %rax
movzbl 0x4(%rax,%rcx), %eax
shll $0x4, %eax
leaq 0xe80(%rsp,%rax), %rax
movq %rax, 0x670(%rsp)
movq 0x1eb0(%rsp), %rcx
movslq 0x71c(%rsp), %rax
movzbl 0x1(%rax,%rcx), %eax
shll $0x4, %eax
leaq 0xe80(%rsp,%rax), %rax
movq %rax, 0x668(%rsp)
movq 0x1eb0(%rsp), %rcx
movslq 0x71c(%rsp), %rax
movzbl 0x5(%rax,%rcx), %eax
shll $0x4, %eax
leaq 0xe80(%rsp,%rax), %rax
movq %rax, 0x660(%rsp)
movq 0x678(%rsp), %rax
movq %rax, 0x1fb8(%rsp)
movq 0x1fb8(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0x1f70(%rsp)
vmovdqa 0x1f70(%rsp), %xmm0
vmovdqa %xmm1, 0x6f0(%rsp)
vmovdqa %xmm0, 0x6e0(%rsp)
movq 0x670(%rsp), %rax
movq %rax, 0x1fb0(%rsp)
movq 0x1fb0(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0x1f60(%rsp)
vmovdqa 0x1f60(%rsp), %xmm0
vmovdqa %xmm1, 0x6d0(%rsp)
vmovdqa %xmm0, 0x6c0(%rsp)
movq 0x668(%rsp), %rax
movq %rax, 0x1fa8(%rsp)
movq 0x1fa8(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0x1f50(%rsp)
vmovdqa 0x1f50(%rsp), %xmm0
vmovdqa %xmm0, %xmm0
vpshufd $0x93, %ymm0, %ymm0     # ymm0 = ymm0[3,0,1,2,7,4,5,6]
vmovaps %ymm0, 0x6a0(%rsp)
movq 0x660(%rsp), %rax
movq %rax, 0x1fa0(%rsp)
movq 0x1fa0(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0x1f40(%rsp)
vmovdqa 0x1f40(%rsp), %xmm0
vmovdqa %xmm0, %xmm0
vpshufd $0x93, %ymm0, %ymm0     # ymm0 = ymm0[3,0,1,2,7,4,5,6]
vmovaps %ymm0, 0x680(%rsp)
vmovaps 0x6e0(%rsp), %ymm0
vmovaps 0x6c0(%rsp), %ymm1
vperm2i128 $0x20, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0,1],ymm1[0,1]
movslq 0x9bc(%rsp), %rax
shlq $0x5, %rax
vmovaps %ymm0, 0x720(%rsp,%rax)
vmovaps 0x6a0(%rsp), %ymm0
vmovaps 0x680(%rsp), %ymm1
vperm2i128 $0x20, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0,1],ymm1[0,1]
movslq 0x9bc(%rsp), %rax
shlq $0x5, %rax
leaq 0x720(%rsp), %rcx
vmovaps %ymm0, 0x20(%rax,%rcx)
movq 0x1eb0(%rsp), %rdx
movslq 0x71c(%rsp), %rax
movzbl 0x2(%rax,%rdx), %eax
shll $0x4, %eax
leaq 0xe80(%rsp,%rax), %rax
movq %rax, 0x678(%rsp)
movq 0x1eb0(%rsp), %rdx
movslq 0x71c(%rsp), %rax
movzbl 0x6(%rax,%rdx), %eax
shll $0x4, %eax
leaq 0xe80(%rsp,%rax), %rax
movq %rax, 0x670(%rsp)
movq 0x1eb0(%rsp), %rdx
movslq 0x71c(%rsp), %rax
movzbl 0x3(%rax,%rdx), %eax
shll $0x4, %eax
leaq 0xe80(%rsp,%rax), %rax
movq %rax, 0x668(%rsp)
movq 0x1eb0(%rsp), %rdx
movslq 0x71c(%rsp), %rax
movzbl 0x7(%rax,%rdx), %eax
shll $0x4, %eax
leaq 0xe80(%rsp,%rax), %rax
movq %rax, 0x660(%rsp)
movq 0x678(%rsp), %rax
movq %rax, 0x1f98(%rsp)
movq 0x1f98(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0x1f30(%rsp)
vmovdqa 0x1f30(%rsp), %xmm0
vmovdqa %xmm0, %xmm0
vpshufd $0x4e, %ymm0, %ymm0     # ymm0 = ymm0[2,3,0,1,6,7,4,5]
vmovaps %ymm0, 0x6e0(%rsp)
movq 0x670(%rsp), %rax
movq %rax, 0x1f90(%rsp)
movq 0x1f90(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0x1f20(%rsp)
vmovdqa 0x1f20(%rsp), %xmm0
vmovdqa %xmm0, %xmm0
vpshufd $0x4e, %ymm0, %ymm0     # ymm0 = ymm0[2,3,0,1,6,7,4,5]
vmovaps %ymm0, 0x6c0(%rsp)
movq 0x668(%rsp), %rax
movq %rax, 0x1f88(%rsp)
movq 0x1f88(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0x1f10(%rsp)
vmovdqa 0x1f10(%rsp), %xmm0
vmovdqa %xmm0, %xmm0
vpshufd $0x39, %ymm0, %ymm0     # ymm0 = ymm0[1,2,3,0,5,6,7,4]
vmovaps %ymm0, 0x6a0(%rsp)
movq 0x660(%rsp), %rax
movq %rax, 0x1f80(%rsp)
movq 0x1f80(%rsp), %rax
vmovdqu (%rax), %xmm0
vmovdqa %xmm0, 0x1f00(%rsp)
vmovdqa 0x1f00(%rsp), %xmm0
vmovdqa %xmm0, %xmm0
vpshufd $0x39, %ymm0, %ymm0     # ymm0 = ymm0[1,2,3,0,5,6,7,4]
vmovaps %ymm0, 0x680(%rsp)
vmovaps 0x6e0(%rsp), %ymm0
vmovaps 0x6c0(%rsp), %ymm1
vperm2i128 $0x20, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0,1],ymm1[0,1]
movslq 0x9bc(%rsp), %rax
shlq $0x5, %rax
vmovaps %ymm0, 0x40(%rax,%rcx)
vmovaps 0x6a0(%rsp), %ymm0
vmovaps 0x680(%rsp), %ymm1
vperm2i128 $0x20, %ymm1, %ymm0, %ymm0 # ymm0 = ymm0[0,1],ymm1[0,1]
movl 0x9bc(%rsp), %eax
addl $0x3, %eax
movslq %eax, %rcx
leaq 0x720(%rsp), %rax
shlq $0x5, %rcx
addq %rcx, %rax
vmovdqa %ymm0, (%rax)
movl 0x9bc(%rsp), %eax
addl $0x4, %eax
movl %eax, 0x9bc(%rsp)
jmp 0x959b6
movl $0x0, 0x20bc(%rsp)
movl $0x0, 0x20b8(%rsp)
movl $0x0, 0x20b4(%rsp)
movl $0xffffffff, 0x20b0(%rsp) # imm = 0xFFFFFFFF
movl $0x0, 0x20ac(%rsp)
movl $0x0, 0x20a8(%rsp)
movl $0x0, 0x20a4(%rsp)
movl $0xffffffff, 0x20a0(%rsp) # imm = 0xFFFFFFFF
movl 0x20a4(%rsp), %r8d
movl 0x20a8(%rsp), %edi
movl 0x20ac(%rsp), %esi
movl 0x20b4(%rsp), %edx
movl 0x20b8(%rsp), %ecx
movl 0x20bc(%rsp), %eax
vmovd 0x20a0(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x20b0(%rsp), %xmm1
vpinsrd $0x1, %edx, %xmm1, %xmm1
vpinsrd $0x2, %ecx, %xmm1, %xmm1
vpinsrd $0x3, %eax, %xmm1, %xmm1
vmovdqa %xmm1, 0x2090(%rsp)
vmovdqa %xmm0, 0x2080(%rsp)
vmovaps 0x2080(%rsp), %ymm0
vmovaps %ymm0, 0x640(%rsp)
movl $0x0, 0x207c(%rsp)
movl $0x0, 0x2078(%rsp)
movl $0xffffffff, 0x2074(%rsp) # imm = 0xFFFFFFFF
movl $0x0, 0x2070(%rsp)
movl $0x0, 0x206c(%rsp)
movl $0x0, 0x2068(%rsp)
movl $0xffffffff, 0x2064(%rsp) # imm = 0xFFFFFFFF
movl $0x0, 0x2060(%rsp)
movl 0x2064(%rsp), %r8d
movl 0x2068(%rsp), %edi
movl 0x206c(%rsp), %esi
movl 0x2074(%rsp), %edx
movl 0x2078(%rsp), %ecx
movl 0x207c(%rsp), %eax
vmovd 0x2060(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x2070(%rsp), %xmm1
vpinsrd $0x1, %edx, %xmm1, %xmm1
vpinsrd $0x2, %ecx, %xmm1, %xmm1
vpinsrd $0x3, %eax, %xmm1, %xmm1
vmovdqa %xmm1, 0x2050(%rsp)
vmovdqa %xmm0, 0x2040(%rsp)
vmovaps 0x2040(%rsp), %ymm0
vmovaps %ymm0, 0x620(%rsp)
movl $0x0, 0x203c(%rsp)
movl $0xffffffff, 0x2038(%rsp) # imm = 0xFFFFFFFF
movl $0x0, 0x2034(%rsp)
movl $0x0, 0x2030(%rsp)
movl $0x0, 0x202c(%rsp)
movl $0xffffffff, 0x2028(%rsp) # imm = 0xFFFFFFFF
movl $0x0, 0x2024(%rsp)
movl $0x0, 0x2020(%rsp)
movl 0x2024(%rsp), %r8d
movl 0x2028(%rsp), %edi
movl 0x202c(%rsp), %esi
movl 0x2034(%rsp), %edx
movl 0x2038(%rsp), %ecx
movl 0x203c(%rsp), %eax
vmovd 0x2020(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x2030(%rsp), %xmm1
vpinsrd $0x1, %edx, %xmm1, %xmm1
vpinsrd $0x2, %ecx, %xmm1, %xmm1
vpinsrd $0x3, %eax, %xmm1, %xmm1
vmovdqa %xmm1, 0x2010(%rsp)
vmovdqa %xmm0, 0x2000(%rsp)
vmovaps 0x2000(%rsp), %ymm0
vmovaps %ymm0, 0x600(%rsp)
movl $0xffffffff, 0x1ffc(%rsp) # imm = 0xFFFFFFFF
movl $0x0, 0x1ff8(%rsp)
movl $0x0, 0x1ff4(%rsp)
movl $0x0, 0x1ff0(%rsp)
movl $0xffffffff, 0x1fec(%rsp) # imm = 0xFFFFFFFF
movl $0x0, 0x1fe8(%rsp)
movl $0x0, 0x1fe4(%rsp)
movl $0x0, 0x1fe0(%rsp)
movl 0x1fe4(%rsp), %r8d
movl 0x1fe8(%rsp), %edi
movl 0x1fec(%rsp), %esi
movl 0x1ff4(%rsp), %edx
movl 0x1ff8(%rsp), %ecx
movl 0x1ffc(%rsp), %eax
vmovd 0x1fe0(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x1ff0(%rsp), %xmm1
vpinsrd $0x1, %edx, %xmm1, %xmm1
vpinsrd $0x2, %ecx, %xmm1, %xmm1
vpinsrd $0x3, %eax, %xmm1, %xmm1
vmovdqa %xmm1, 0x1fd0(%rsp)
vmovdqa %xmm0, 0x1fc0(%rsp)
vmovaps 0x1fc0(%rsp), %ymm0
vmovaps %ymm0, 0x5e0(%rsp)
vmovaps 0x720(%rsp), %ymm1
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm1, 0x3fa0(%rsp)
vmovaps %ymm0, 0x3f80(%rsp)
vmovaps 0x3fa0(%rsp), %ymm0
vmovaps 0x3f80(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x740(%rsp), %ymm2
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm2, 0x3f60(%rsp)
vmovaps %ymm0, 0x3f40(%rsp)
vmovaps 0x3f60(%rsp), %ymm0
vmovaps 0x3f40(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2ca0(%rsp)
vmovaps %ymm0, 0x2c80(%rsp)
vmovaps 0x2ca0(%rsp), %ymm0
vmovaps 0x2c80(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x760(%rsp), %ymm2
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm2, 0x3f20(%rsp)
vmovaps %ymm0, 0x3f00(%rsp)
vmovaps 0x3f20(%rsp), %ymm0
vmovaps 0x3f00(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x780(%rsp), %ymm3
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm3, 0x3ee0(%rsp)
vmovaps %ymm0, 0x3ec0(%rsp)
vmovaps 0x3ee0(%rsp), %ymm0
vmovaps 0x3ec0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x2c60(%rsp)
vmovaps %ymm0, 0x2c40(%rsp)
vmovaps 0x2c60(%rsp), %ymm0
vmovaps 0x2c40(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2c20(%rsp)
vmovaps %ymm0, 0x2c00(%rsp)
vmovaps 0x2c20(%rsp), %ymm0
vmovaps 0x2c00(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x5c0(%rsp)
vmovaps 0x7a0(%rsp), %ymm1
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm1, 0x3ea0(%rsp)
vmovaps %ymm0, 0x3e80(%rsp)
vmovaps 0x3ea0(%rsp), %ymm0
vmovaps 0x3e80(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x7c0(%rsp), %ymm2
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm2, 0x3e60(%rsp)
vmovaps %ymm0, 0x3e40(%rsp)
vmovaps 0x3e60(%rsp), %ymm0
vmovaps 0x3e40(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2be0(%rsp)
vmovaps %ymm0, 0x2bc0(%rsp)
vmovaps 0x2be0(%rsp), %ymm0
vmovaps 0x2bc0(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x7e0(%rsp), %ymm2
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm2, 0x3e20(%rsp)
vmovaps %ymm0, 0x3e00(%rsp)
vmovaps 0x3e20(%rsp), %ymm0
vmovaps 0x3e00(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x800(%rsp), %ymm3
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm3, 0x3de0(%rsp)
vmovaps %ymm0, 0x3dc0(%rsp)
vmovaps 0x3de0(%rsp), %ymm0
vmovaps 0x3dc0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x2ba0(%rsp)
vmovaps %ymm0, 0x2b80(%rsp)
vmovaps 0x2ba0(%rsp), %ymm0
vmovaps 0x2b80(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2b60(%rsp)
vmovaps %ymm0, 0x2b40(%rsp)
vmovaps 0x2b60(%rsp), %ymm0
vmovaps 0x2b40(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x5a0(%rsp)
vmovaps 0x820(%rsp), %ymm1
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm1, 0x3da0(%rsp)
vmovaps %ymm0, 0x3d80(%rsp)
vmovaps 0x3da0(%rsp), %ymm0
vmovaps 0x3d80(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x840(%rsp), %ymm2
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm2, 0x3d60(%rsp)
vmovaps %ymm0, 0x3d40(%rsp)
vmovaps 0x3d60(%rsp), %ymm0
vmovaps 0x3d40(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2b20(%rsp)
vmovaps %ymm0, 0x2b00(%rsp)
vmovaps 0x2b20(%rsp), %ymm0
vmovaps 0x2b00(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x860(%rsp), %ymm2
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm2, 0x3d20(%rsp)
vmovaps %ymm0, 0x3d00(%rsp)
vmovaps 0x3d20(%rsp), %ymm0
vmovaps 0x3d00(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x880(%rsp), %ymm3
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm3, 0x3ce0(%rsp)
vmovaps %ymm0, 0x3cc0(%rsp)
vmovaps 0x3ce0(%rsp), %ymm0
vmovaps 0x3cc0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x2ae0(%rsp)
vmovaps %ymm0, 0x2ac0(%rsp)
vmovaps 0x2ae0(%rsp), %ymm0
vmovaps 0x2ac0(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2aa0(%rsp)
vmovaps %ymm0, 0x2a80(%rsp)
vmovaps 0x2aa0(%rsp), %ymm0
vmovaps 0x2a80(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x580(%rsp)
vmovaps 0x8a0(%rsp), %ymm1
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm1, 0x3ca0(%rsp)
vmovaps %ymm0, 0x3c80(%rsp)
vmovaps 0x3ca0(%rsp), %ymm0
vmovaps 0x3c80(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x8c0(%rsp), %ymm2
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm2, 0x3c60(%rsp)
vmovaps %ymm0, 0x3c40(%rsp)
vmovaps 0x3c60(%rsp), %ymm0
vmovaps 0x3c40(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2a60(%rsp)
vmovaps %ymm0, 0x2a40(%rsp)
vmovaps 0x2a60(%rsp), %ymm0
vmovaps 0x2a40(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x8e0(%rsp), %ymm2
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm2, 0x3c20(%rsp)
vmovaps %ymm0, 0x3c00(%rsp)
vmovaps 0x3c20(%rsp), %ymm0
vmovaps 0x3c00(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x900(%rsp), %ymm3
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm3, 0x3be0(%rsp)
vmovaps %ymm0, 0x3bc0(%rsp)
vmovaps 0x3be0(%rsp), %ymm0
vmovaps 0x3bc0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x2a20(%rsp)
vmovaps %ymm0, 0x2a00(%rsp)
vmovaps 0x2a20(%rsp), %ymm0
vmovaps 0x2a00(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x29e0(%rsp)
vmovaps %ymm0, 0x29c0(%rsp)
vmovaps 0x29e0(%rsp), %ymm0
vmovaps 0x29c0(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x560(%rsp)
vmovaps 0x980(%rsp), %ymm1
vmovaps 0x5c0(%rsp), %ymm0
vmovaps %ymm1, 0x40a0(%rsp)
vmovaps %ymm0, 0x4080(%rsp)
vmovaps 0x40a0(%rsp), %ymm0
vmovaps 0x4080(%rsp), %ymm1
vpcmpgtd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x540(%rsp)
vmovaps 0x960(%rsp), %ymm1
vmovaps 0x5a0(%rsp), %ymm0
vmovaps %ymm1, 0x4060(%rsp)
vmovaps %ymm0, 0x4040(%rsp)
vmovaps 0x4060(%rsp), %ymm0
vmovaps 0x4040(%rsp), %ymm1
vpcmpgtd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x520(%rsp)
vmovaps 0x940(%rsp), %ymm1
vmovaps 0x580(%rsp), %ymm0
vmovaps %ymm1, 0x4020(%rsp)
vmovaps %ymm0, 0x4000(%rsp)
vmovaps 0x4020(%rsp), %ymm0
vmovaps 0x4000(%rsp), %ymm1
vpcmpgtd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x500(%rsp)
vmovaps 0x920(%rsp), %ymm1
vmovaps 0x560(%rsp), %ymm0
vmovaps %ymm1, 0x3fe0(%rsp)
vmovaps %ymm0, 0x3fc0(%rsp)
vmovaps 0x3fe0(%rsp), %ymm0
vmovaps 0x3fc0(%rsp), %ymm1
vpcmpgtd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x4e0(%rsp)
vmovaps 0x540(%rsp), %ymm0
vmovaps %ymm0, 0x4120(%rsp)
vmovaps 0x4120(%rsp), %ymm0
vmovmskps %ymm0, %eax
movl %eax, 0x4dc(%rsp)
vmovaps 0x520(%rsp), %ymm0
vmovaps %ymm0, 0x4100(%rsp)
vmovaps 0x4100(%rsp), %ymm0
vmovmskps %ymm0, %eax
movl %eax, 0x4d8(%rsp)
vmovaps 0x500(%rsp), %ymm0
vmovaps %ymm0, 0x40e0(%rsp)
vmovaps 0x40e0(%rsp), %ymm0
vmovmskps %ymm0, %eax
movl %eax, 0x4d4(%rsp)
vmovaps 0x4e0(%rsp), %ymm0
vmovaps %ymm0, 0x40c0(%rsp)
vmovaps 0x40c0(%rsp), %ymm0
vmovmskps %ymm0, %eax
movl %eax, 0x4d0(%rsp)
movl 0x4dc(%rsp), %eax
movl %eax, %edx
shlq $0x5, %rdx
leaq 0x77319(%rip), %rax     # 0x10dbe0
movq %rax, %rcx
addq %rdx, %rcx
movq %rcx, 0x1ed8(%rsp)
movq 0x1ed8(%rsp), %rcx
vmovaps (%rcx), %ymm0
vmovaps %ymm0, 0x4a0(%rsp)
movl 0x4d8(%rsp), %ecx
movl %ecx, %edx
shlq $0x5, %rdx
movq %rax, %rcx
addq %rdx, %rcx
movq %rcx, 0x1ed0(%rsp)
movq 0x1ed0(%rsp), %rcx
vmovaps (%rcx), %ymm0
vmovaps %ymm0, 0x480(%rsp)
movl 0x4d4(%rsp), %ecx
movl %ecx, %edx
shlq $0x5, %rdx
movq %rax, %rcx
addq %rdx, %rcx
movq %rcx, 0x1ec8(%rsp)
movq 0x1ec8(%rsp), %rcx
vmovaps (%rcx), %ymm0
vmovaps %ymm0, 0x460(%rsp)
movl 0x4d0(%rsp), %ecx
shlq $0x5, %rcx
addq %rcx, %rax
movq %rax, 0x1ec0(%rsp)
movq 0x1ec0(%rsp), %rax
vmovaps (%rax), %ymm0
vmovaps %ymm0, 0x440(%rsp)
vmovaps 0x980(%rsp), %ymm1
vmovaps 0x540(%rsp), %ymm0
vmovaps %ymm1, 0x3ba0(%rsp)
vmovaps %ymm0, 0x3b80(%rsp)
vmovaps 0x3ba0(%rsp), %ymm0
vmovaps 0x3b80(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x4a0(%rsp), %ymm0
vmovaps %ymm1, 0x4220(%rsp)
vmovaps %ymm0, 0x4200(%rsp)
vmovaps 0x4220(%rsp), %ymm1
vmovaps 0x4200(%rsp), %ymm0
vpermd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x420(%rsp)
vmovaps 0x960(%rsp), %ymm1
vmovaps 0x520(%rsp), %ymm0
vmovaps %ymm1, 0x3b60(%rsp)
vmovaps %ymm0, 0x3b40(%rsp)
vmovaps 0x3b60(%rsp), %ymm0
vmovaps 0x3b40(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x480(%rsp), %ymm0
vmovaps %ymm1, 0x41e0(%rsp)
vmovaps %ymm0, 0x41c0(%rsp)
vmovaps 0x41e0(%rsp), %ymm1
vmovaps 0x41c0(%rsp), %ymm0
vpermd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x400(%rsp)
vmovaps 0x940(%rsp), %ymm1
vmovaps 0x500(%rsp), %ymm0
vmovaps %ymm1, 0x3b20(%rsp)
vmovaps %ymm0, 0x3b00(%rsp)
vmovaps 0x3b20(%rsp), %ymm0
vmovaps 0x3b00(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x460(%rsp), %ymm0
vmovaps %ymm1, 0x41a0(%rsp)
vmovaps %ymm0, 0x4180(%rsp)
vmovaps 0x41a0(%rsp), %ymm1
vmovaps 0x4180(%rsp), %ymm0
vpermd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x3e0(%rsp)
vmovaps 0x920(%rsp), %ymm1
vmovaps 0x4e0(%rsp), %ymm0
vmovaps %ymm1, 0x3ae0(%rsp)
vmovaps %ymm0, 0x3ac0(%rsp)
vmovaps 0x3ae0(%rsp), %ymm0
vmovaps 0x3ac0(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x440(%rsp), %ymm0
vmovaps %ymm1, 0x4160(%rsp)
vmovaps %ymm0, 0x4140(%rsp)
vmovaps 0x4160(%rsp), %ymm1
vmovaps 0x4140(%rsp), %ymm0
vpermd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x3c0(%rsp)
vmovaps 0x420(%rsp), %ymm1
movl $0xffff, 0x467c(%rsp) # imm = 0xFFFF
movl 0x467c(%rsp), %eax
movl %eax, 0x10(%rsp)
movl %eax, 0x46bc(%rsp)
movl %eax, 0x46b8(%rsp)
movl %eax, 0x46b4(%rsp)
movl %eax, 0x46b0(%rsp)
movl %eax, 0x46ac(%rsp)
movl %eax, 0x46a8(%rsp)
movl %eax, 0x46a4(%rsp)
movl %eax, 0x46a0(%rsp)
movl 0x46a4(%rsp), %r8d
movl 0x46a8(%rsp), %edi
movl 0x46ac(%rsp), %esi
movl 0x46b4(%rsp), %edx
movl 0x46b8(%rsp), %ecx
movl 0x46bc(%rsp), %eax
vmovd 0x46a0(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x46b0(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x4690(%rsp)
vmovdqa %xmm0, 0x4680(%rsp)
vmovaps 0x4680(%rsp), %ymm0
vmovaps %ymm1, 0x3aa0(%rsp)
vmovaps %ymm0, 0x3a80(%rsp)
vmovaps 0x3aa0(%rsp), %ymm0
vmovaps 0x3a80(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x420(%rsp)
vmovaps 0x400(%rsp), %ymm1
movl $0xffff, 0x461c(%rsp) # imm = 0xFFFF
movl 0x461c(%rsp), %eax
movl %eax, 0x14(%rsp)
movl %eax, 0x4678(%rsp)
movl %eax, 0x4674(%rsp)
movl %eax, 0x4670(%rsp)
movl %eax, 0x466c(%rsp)
movl %eax, 0x4668(%rsp)
movl %eax, 0x4664(%rsp)
movl %eax, 0x4660(%rsp)
movl %eax, 0x465c(%rsp)
movl 0x4660(%rsp), %r8d
movl 0x4664(%rsp), %edi
movl 0x4668(%rsp), %esi
movl 0x4670(%rsp), %edx
movl 0x4674(%rsp), %ecx
movl 0x4678(%rsp), %eax
vmovd 0x465c(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x466c(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x4630(%rsp)
vmovdqa %xmm0, 0x4620(%rsp)
vmovaps 0x4620(%rsp), %ymm0
vmovaps %ymm1, 0x3a60(%rsp)
vmovaps %ymm0, 0x3a40(%rsp)
vmovaps 0x3a60(%rsp), %ymm0
vmovaps 0x3a40(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x400(%rsp)
vmovaps 0x3e0(%rsp), %ymm1
movl $0xffff, 0x45bc(%rsp) # imm = 0xFFFF
movl 0x45bc(%rsp), %eax
movl %eax, 0x18(%rsp)
movl %eax, 0x4618(%rsp)
movl %eax, 0x4614(%rsp)
movl %eax, 0x4610(%rsp)
movl %eax, 0x460c(%rsp)
movl %eax, 0x4608(%rsp)
movl %eax, 0x4604(%rsp)
movl %eax, 0x4600(%rsp)
movl %eax, 0x45fc(%rsp)
movl 0x4600(%rsp), %r8d
movl 0x4604(%rsp), %edi
movl 0x4608(%rsp), %esi
movl 0x4610(%rsp), %edx
movl 0x4614(%rsp), %ecx
movl 0x4618(%rsp), %eax
vmovd 0x45fc(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x460c(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x45d0(%rsp)
vmovdqa %xmm0, 0x45c0(%rsp)
vmovaps 0x45c0(%rsp), %ymm0
vmovaps %ymm1, 0x3a20(%rsp)
vmovaps %ymm0, 0x3a00(%rsp)
vmovaps 0x3a20(%rsp), %ymm0
vmovaps 0x3a00(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x3e0(%rsp)
vmovaps 0x3c0(%rsp), %ymm1
movl $0xffff, 0x455c(%rsp) # imm = 0xFFFF
movl 0x455c(%rsp), %eax
movl %eax, 0x1c(%rsp)
movl %eax, 0x45b8(%rsp)
movl %eax, 0x45b4(%rsp)
movl %eax, 0x45b0(%rsp)
movl %eax, 0x45ac(%rsp)
movl %eax, 0x45a8(%rsp)
movl %eax, 0x45a4(%rsp)
movl %eax, 0x45a0(%rsp)
movl %eax, 0x459c(%rsp)
movl 0x45a0(%rsp), %r8d
movl 0x45a4(%rsp), %edi
movl 0x45a8(%rsp), %esi
movl 0x45b0(%rsp), %edx
movl 0x45b4(%rsp), %ecx
movl 0x45b8(%rsp), %eax
vmovd 0x459c(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x45ac(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x4570(%rsp)
vmovdqa %xmm0, 0x4560(%rsp)
vmovaps 0x4560(%rsp), %ymm0
vmovaps %ymm1, 0x39e0(%rsp)
vmovaps %ymm0, 0x39c0(%rsp)
vmovaps 0x39e0(%rsp), %ymm0
vmovaps 0x39c0(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x3c0(%rsp)
vmovaps 0x420(%rsp), %ymm1
vmovaps 0x400(%rsp), %ymm0
vmovaps %ymm1, 0x4720(%rsp)
vmovaps %ymm0, 0x4700(%rsp)
vmovaps 0x4720(%rsp), %ymm0
vmovaps 0x4700(%rsp), %ymm1
vpackusdw %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x3a0(%rsp)
vmovaps 0x3e0(%rsp), %ymm1
vmovaps 0x3c0(%rsp), %ymm0
vmovaps %ymm1, 0x46e0(%rsp)
vmovaps %ymm0, 0x46c0(%rsp)
vmovaps 0x46e0(%rsp), %ymm0
vmovaps 0x46c0(%rsp), %ymm1
vpackusdw %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x380(%rsp)
vmovaps 0x3a0(%rsp), %ymm0
vpermq $0xd8, %ymm0, %ymm0     # ymm0 = ymm0[0,2,1,3]
vmovaps %ymm0, 0x3a0(%rsp)
vmovaps 0x380(%rsp), %ymm0
vpermq $0xd8, %ymm0, %ymm0     # ymm0 = ymm0[0,2,1,3]
vmovaps %ymm0, 0x380(%rsp)
vmovdqa 0x390(%rsp), %xmm0
vmovdqa %xmm0, 0x370(%rsp)
movq 0x9a8(%rsp), %rax
addq $-0x10, %rax
vmovdqa 0x370(%rsp), %xmm0
movq %rax, 0x47c0(%rsp)
vmovdqa %xmm0, 0x47b0(%rsp)
vmovdqa 0x47b0(%rsp), %xmm0
movq 0x47c0(%rsp), %rax
vmovdqu %xmm0, (%rax)
movl 0x4d0(%rsp), %eax
movl %eax, 0x47d8(%rsp)
popcntl 0x47d8(%rsp), %ecx
movq 0x9a8(%rsp), %rax
addl %ecx, %ecx
subq %rcx, %rax
movq %rax, 0x9a8(%rsp)
vmovdqa 0x380(%rsp), %xmm0
vmovdqa %xmm0, 0x370(%rsp)
movq 0x9a8(%rsp), %rax
addq $-0x10, %rax
vmovdqa 0x370(%rsp), %xmm0
movq %rax, 0x47a8(%rsp)
vmovdqa %xmm0, 0x4790(%rsp)
vmovdqa 0x4790(%rsp), %xmm0
movq 0x47a8(%rsp), %rax
vmovdqu %xmm0, (%rax)
movl 0x4d4(%rsp), %eax
movl %eax, 0x47d4(%rsp)
popcntl 0x47d4(%rsp), %ecx
movq 0x9a8(%rsp), %rax
addl %ecx, %ecx
subq %rcx, %rax
movq %rax, 0x9a8(%rsp)
vmovdqa 0x3b0(%rsp), %xmm0
vmovdqa %xmm0, 0x370(%rsp)
movq 0x9a8(%rsp), %rax
addq $-0x10, %rax
vmovdqa 0x370(%rsp), %xmm0
movq %rax, 0x4788(%rsp)
vmovdqa %xmm0, 0x4770(%rsp)
vmovdqa 0x4770(%rsp), %xmm0
movq 0x4788(%rsp), %rax
vmovdqu %xmm0, (%rax)
movl 0x4d8(%rsp), %eax
movl %eax, 0x47d0(%rsp)
popcntl 0x47d0(%rsp), %ecx
movq 0x9a8(%rsp), %rax
addl %ecx, %ecx
subq %rcx, %rax
movq %rax, 0x9a8(%rsp)
vmovdqa 0x3a0(%rsp), %xmm0
vmovdqa %xmm0, 0x370(%rsp)
movq 0x9a8(%rsp), %rax
addq $-0x10, %rax
vmovdqa 0x370(%rsp), %xmm0
movq %rax, 0x4768(%rsp)
vmovdqa %xmm0, 0x4750(%rsp)
vmovdqa 0x4750(%rsp), %xmm0
movq 0x4768(%rsp), %rax
vmovdqu %xmm0, (%rax)
movl 0x4dc(%rsp), %eax
movl %eax, 0x47cc(%rsp)
popcntl 0x47cc(%rsp), %ecx
movq 0x9a8(%rsp), %rax
addl %ecx, %ecx
subq %rcx, %rax
movq %rax, 0x9a8(%rsp)
vmovaps 0x980(%rsp), %ymm0
vmovaps %ymm0, 0x49a0(%rsp)
movl $0x10, 0x499c(%rsp)
vmovaps 0x49a0(%rsp), %ymm0
vmovd 0x499c(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x340(%rsp)
vmovaps 0x980(%rsp), %ymm2
vmovaps 0x340(%rsp), %ymm1
vmovaps 0x540(%rsp), %ymm0
vmovaps %ymm2, 0x4b20(%rsp)
vmovaps %ymm1, 0x4b00(%rsp)
vmovaps %ymm0, 0x4ae0(%rsp)
vmovaps 0x4b20(%rsp), %ymm0
vmovaps 0x4b00(%rsp), %ymm1
vmovaps 0x4ae0(%rsp), %ymm2
vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x980(%rsp)
vmovaps 0x960(%rsp), %ymm0
vmovaps %ymm0, 0x4960(%rsp)
movl $0x10, 0x495c(%rsp)
vmovaps 0x4960(%rsp), %ymm0
vmovd 0x495c(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x340(%rsp)
vmovaps 0x960(%rsp), %ymm2
vmovaps 0x340(%rsp), %ymm1
vmovaps 0x520(%rsp), %ymm0
vmovaps %ymm2, 0x4ac0(%rsp)
vmovaps %ymm1, 0x4aa0(%rsp)
vmovaps %ymm0, 0x4a80(%rsp)
vmovaps 0x4ac0(%rsp), %ymm0
vmovaps 0x4aa0(%rsp), %ymm1
vmovaps 0x4a80(%rsp), %ymm2
vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x960(%rsp)
vmovaps 0x940(%rsp), %ymm0
vmovaps %ymm0, 0x4920(%rsp)
movl $0x10, 0x491c(%rsp)
vmovaps 0x4920(%rsp), %ymm0
vmovd 0x491c(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x340(%rsp)
vmovaps 0x940(%rsp), %ymm2
vmovaps 0x340(%rsp), %ymm1
vmovaps 0x500(%rsp), %ymm0
vmovaps %ymm2, 0x4a60(%rsp)
vmovaps %ymm1, 0x4a40(%rsp)
vmovaps %ymm0, 0x4a20(%rsp)
vmovaps 0x4a60(%rsp), %ymm0
vmovaps 0x4a40(%rsp), %ymm1
vmovaps 0x4a20(%rsp), %ymm2
vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x940(%rsp)
vmovaps 0x920(%rsp), %ymm0
vmovaps %ymm0, 0x48e0(%rsp)
movl $0x10, 0x48dc(%rsp)
vmovaps 0x48e0(%rsp), %ymm0
vmovd 0x48dc(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x340(%rsp)
vmovaps 0x920(%rsp), %ymm2
vmovaps 0x340(%rsp), %ymm1
vmovaps 0x4e0(%rsp), %ymm0
vmovaps %ymm2, 0x4a00(%rsp)
vmovaps %ymm1, 0x49e0(%rsp)
vmovaps %ymm0, 0x49c0(%rsp)
vmovaps 0x4a00(%rsp), %ymm0
vmovaps 0x49e0(%rsp), %ymm1
vmovaps 0x49c0(%rsp), %ymm2
vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x920(%rsp)
vmovaps 0x720(%rsp), %ymm1
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm1, 0x39a0(%rsp)
vmovaps %ymm0, 0x3980(%rsp)
vmovaps 0x39a0(%rsp), %ymm0
vmovaps 0x3980(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x740(%rsp), %ymm2
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm2, 0x3960(%rsp)
vmovaps %ymm0, 0x3940(%rsp)
vmovaps 0x3960(%rsp), %ymm0
vmovaps 0x3940(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x29a0(%rsp)
vmovaps %ymm0, 0x2980(%rsp)
vmovaps 0x29a0(%rsp), %ymm0
vmovaps 0x2980(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x760(%rsp), %ymm2
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm2, 0x3920(%rsp)
vmovaps %ymm0, 0x3900(%rsp)
vmovaps 0x3920(%rsp), %ymm0
vmovaps 0x3900(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x780(%rsp), %ymm3
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm3, 0x38e0(%rsp)
vmovaps %ymm0, 0x38c0(%rsp)
vmovaps 0x38e0(%rsp), %ymm0
vmovaps 0x38c0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x2960(%rsp)
vmovaps %ymm0, 0x2940(%rsp)
vmovaps 0x2960(%rsp), %ymm0
vmovaps 0x2940(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2920(%rsp)
vmovaps %ymm0, 0x2900(%rsp)
vmovaps 0x2920(%rsp), %ymm0
vmovaps 0x2900(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vpshufd $0x39, %ymm0, %ymm0     # ymm0 = ymm0[1,2,3,0,5,6,7,4]
vmovaps %ymm0, 0x320(%rsp)
vmovaps 0x7a0(%rsp), %ymm1
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm1, 0x38a0(%rsp)
vmovaps %ymm0, 0x3880(%rsp)
vmovaps 0x38a0(%rsp), %ymm0
vmovaps 0x3880(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x7c0(%rsp), %ymm2
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm2, 0x3860(%rsp)
vmovaps %ymm0, 0x3840(%rsp)
vmovaps 0x3860(%rsp), %ymm0
vmovaps 0x3840(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x28e0(%rsp)
vmovaps %ymm0, 0x28c0(%rsp)
vmovaps 0x28e0(%rsp), %ymm0
vmovaps 0x28c0(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x7e0(%rsp), %ymm2
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm2, 0x3820(%rsp)
vmovaps %ymm0, 0x3800(%rsp)
vmovaps 0x3820(%rsp), %ymm0
vmovaps 0x3800(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x800(%rsp), %ymm3
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm3, 0x37e0(%rsp)
vmovaps %ymm0, 0x37c0(%rsp)
vmovaps 0x37e0(%rsp), %ymm0
vmovaps 0x37c0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x28a0(%rsp)
vmovaps %ymm0, 0x2880(%rsp)
vmovaps 0x28a0(%rsp), %ymm0
vmovaps 0x2880(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2860(%rsp)
vmovaps %ymm0, 0x2840(%rsp)
vmovaps 0x2860(%rsp), %ymm0
vmovaps 0x2840(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vpshufd $0x39, %ymm0, %ymm0     # ymm0 = ymm0[1,2,3,0,5,6,7,4]
vmovaps %ymm0, 0x300(%rsp)
vmovaps 0x820(%rsp), %ymm1
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm1, 0x37a0(%rsp)
vmovaps %ymm0, 0x3780(%rsp)
vmovaps 0x37a0(%rsp), %ymm0
vmovaps 0x3780(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x840(%rsp), %ymm2
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm2, 0x3760(%rsp)
vmovaps %ymm0, 0x3740(%rsp)
vmovaps 0x3760(%rsp), %ymm0
vmovaps 0x3740(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2820(%rsp)
vmovaps %ymm0, 0x2800(%rsp)
vmovaps 0x2820(%rsp), %ymm0
vmovaps 0x2800(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x860(%rsp), %ymm2
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm2, 0x3720(%rsp)
vmovaps %ymm0, 0x3700(%rsp)
vmovaps 0x3720(%rsp), %ymm0
vmovaps 0x3700(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x880(%rsp), %ymm3
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm3, 0x36e0(%rsp)
vmovaps %ymm0, 0x36c0(%rsp)
vmovaps 0x36e0(%rsp), %ymm0
vmovaps 0x36c0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x27e0(%rsp)
vmovaps %ymm0, 0x27c0(%rsp)
vmovaps 0x27e0(%rsp), %ymm0
vmovaps 0x27c0(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x27a0(%rsp)
vmovaps %ymm0, 0x2780(%rsp)
vmovaps 0x27a0(%rsp), %ymm0
vmovaps 0x2780(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vpshufd $0x39, %ymm0, %ymm0     # ymm0 = ymm0[1,2,3,0,5,6,7,4]
vmovaps %ymm0, 0x2e0(%rsp)
vmovaps 0x8a0(%rsp), %ymm1
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm1, 0x36a0(%rsp)
vmovaps %ymm0, 0x3680(%rsp)
vmovaps 0x36a0(%rsp), %ymm0
vmovaps 0x3680(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x8c0(%rsp), %ymm2
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm2, 0x3660(%rsp)
vmovaps %ymm0, 0x3640(%rsp)
vmovaps 0x3660(%rsp), %ymm0
vmovaps 0x3640(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2760(%rsp)
vmovaps %ymm0, 0x2740(%rsp)
vmovaps 0x2760(%rsp), %ymm0
vmovaps 0x2740(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x8e0(%rsp), %ymm2
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm2, 0x3620(%rsp)
vmovaps %ymm0, 0x3600(%rsp)
vmovaps 0x3620(%rsp), %ymm0
vmovaps 0x3600(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x900(%rsp), %ymm3
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm3, 0x35e0(%rsp)
vmovaps %ymm0, 0x35c0(%rsp)
vmovaps 0x35e0(%rsp), %ymm0
vmovaps 0x35c0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x2720(%rsp)
vmovaps %ymm0, 0x2700(%rsp)
vmovaps 0x2720(%rsp), %ymm0
vmovaps 0x2700(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x26e0(%rsp)
vmovaps %ymm0, 0x26c0(%rsp)
vmovaps 0x26e0(%rsp), %ymm0
vmovaps 0x26c0(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vpshufd $0x39, %ymm0, %ymm0     # ymm0 = ymm0[1,2,3,0,5,6,7,4]
vmovaps %ymm0, 0x2c0(%rsp)
vmovaps 0x980(%rsp), %ymm0
vmovaps 0x320(%rsp), %ymm1
callq 0x99f70
vmovaps %ymm0, 0x320(%rsp)
vmovaps 0x960(%rsp), %ymm0
vmovaps 0x300(%rsp), %ymm1
callq 0x99f70
vmovaps %ymm0, 0x300(%rsp)
vmovaps 0x940(%rsp), %ymm0
vmovaps 0x2e0(%rsp), %ymm1
callq 0x99f70
vmovaps %ymm0, 0x2e0(%rsp)
vmovaps 0x920(%rsp), %ymm0
vmovaps 0x2c0(%rsp), %ymm1
callq 0x99f70
vmovaps %ymm0, 0x2c0(%rsp)
vmovaps 0x720(%rsp), %ymm1
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm1, 0x35a0(%rsp)
vmovaps %ymm0, 0x3580(%rsp)
vmovaps 0x35a0(%rsp), %ymm0
vmovaps 0x3580(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x740(%rsp), %ymm2
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm2, 0x3560(%rsp)
vmovaps %ymm0, 0x3540(%rsp)
vmovaps 0x3560(%rsp), %ymm0
vmovaps 0x3540(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x26a0(%rsp)
vmovaps %ymm0, 0x2680(%rsp)
vmovaps 0x26a0(%rsp), %ymm0
vmovaps 0x2680(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x760(%rsp), %ymm2
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm2, 0x3520(%rsp)
vmovaps %ymm0, 0x3500(%rsp)
vmovaps 0x3520(%rsp), %ymm0
vmovaps 0x3500(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x780(%rsp), %ymm3
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm3, 0x34e0(%rsp)
vmovaps %ymm0, 0x34c0(%rsp)
vmovaps 0x34e0(%rsp), %ymm0
vmovaps 0x34c0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x2660(%rsp)
vmovaps %ymm0, 0x2640(%rsp)
vmovaps 0x2660(%rsp), %ymm0
vmovaps 0x2640(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2620(%rsp)
vmovaps %ymm0, 0x2600(%rsp)
vmovaps 0x2620(%rsp), %ymm0
vmovaps 0x2600(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vpshufd $0x93, %ymm0, %ymm0     # ymm0 = ymm0[3,0,1,2,7,4,5,6]
vmovaps %ymm0, 0x2a0(%rsp)
vmovaps 0x7a0(%rsp), %ymm1
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm1, 0x34a0(%rsp)
vmovaps %ymm0, 0x3480(%rsp)
vmovaps 0x34a0(%rsp), %ymm0
vmovaps 0x3480(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x7c0(%rsp), %ymm2
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm2, 0x3460(%rsp)
vmovaps %ymm0, 0x3440(%rsp)
vmovaps 0x3460(%rsp), %ymm0
vmovaps 0x3440(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x25e0(%rsp)
vmovaps %ymm0, 0x25c0(%rsp)
vmovaps 0x25e0(%rsp), %ymm0
vmovaps 0x25c0(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x7e0(%rsp), %ymm2
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm2, 0x3420(%rsp)
vmovaps %ymm0, 0x3400(%rsp)
vmovaps 0x3420(%rsp), %ymm0
vmovaps 0x3400(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x800(%rsp), %ymm3
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm3, 0x33e0(%rsp)
vmovaps %ymm0, 0x33c0(%rsp)
vmovaps 0x33e0(%rsp), %ymm0
vmovaps 0x33c0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x25a0(%rsp)
vmovaps %ymm0, 0x2580(%rsp)
vmovaps 0x25a0(%rsp), %ymm0
vmovaps 0x2580(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2560(%rsp)
vmovaps %ymm0, 0x2540(%rsp)
vmovaps 0x2560(%rsp), %ymm0
vmovaps 0x2540(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vpshufd $0x93, %ymm0, %ymm0     # ymm0 = ymm0[3,0,1,2,7,4,5,6]
vmovaps %ymm0, 0x280(%rsp)
vmovaps 0x820(%rsp), %ymm1
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm1, 0x33a0(%rsp)
vmovaps %ymm0, 0x3380(%rsp)
vmovaps 0x33a0(%rsp), %ymm0
vmovaps 0x3380(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x840(%rsp), %ymm2
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm2, 0x3360(%rsp)
vmovaps %ymm0, 0x3340(%rsp)
vmovaps 0x3360(%rsp), %ymm0
vmovaps 0x3340(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2520(%rsp)
vmovaps %ymm0, 0x2500(%rsp)
vmovaps 0x2520(%rsp), %ymm0
vmovaps 0x2500(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x860(%rsp), %ymm2
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm2, 0x3320(%rsp)
vmovaps %ymm0, 0x3300(%rsp)
vmovaps 0x3320(%rsp), %ymm0
vmovaps 0x3300(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x880(%rsp), %ymm3
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm3, 0x32e0(%rsp)
vmovaps %ymm0, 0x32c0(%rsp)
vmovaps 0x32e0(%rsp), %ymm0
vmovaps 0x32c0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x24e0(%rsp)
vmovaps %ymm0, 0x24c0(%rsp)
vmovaps 0x24e0(%rsp), %ymm0
vmovaps 0x24c0(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x24a0(%rsp)
vmovaps %ymm0, 0x2480(%rsp)
vmovaps 0x24a0(%rsp), %ymm0
vmovaps 0x2480(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vpshufd $0x93, %ymm0, %ymm0     # ymm0 = ymm0[3,0,1,2,7,4,5,6]
vmovaps %ymm0, 0x260(%rsp)
vmovaps 0x8a0(%rsp), %ymm1
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm1, 0x32a0(%rsp)
vmovaps %ymm0, 0x3280(%rsp)
vmovaps 0x32a0(%rsp), %ymm0
vmovaps 0x3280(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x8c0(%rsp), %ymm2
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm2, 0x3260(%rsp)
vmovaps %ymm0, 0x3240(%rsp)
vmovaps 0x3260(%rsp), %ymm0
vmovaps 0x3240(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2460(%rsp)
vmovaps %ymm0, 0x2440(%rsp)
vmovaps 0x2460(%rsp), %ymm0
vmovaps 0x2440(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x8e0(%rsp), %ymm2
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm2, 0x3220(%rsp)
vmovaps %ymm0, 0x3200(%rsp)
vmovaps 0x3220(%rsp), %ymm0
vmovaps 0x3200(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x900(%rsp), %ymm3
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm3, 0x31e0(%rsp)
vmovaps %ymm0, 0x31c0(%rsp)
vmovaps 0x31e0(%rsp), %ymm0
vmovaps 0x31c0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x2420(%rsp)
vmovaps %ymm0, 0x2400(%rsp)
vmovaps 0x2420(%rsp), %ymm0
vmovaps 0x2400(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x23e0(%rsp)
vmovaps %ymm0, 0x23c0(%rsp)
vmovaps 0x23e0(%rsp), %ymm0
vmovaps 0x23c0(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vpshufd $0x93, %ymm0, %ymm0     # ymm0 = ymm0[3,0,1,2,7,4,5,6]
vmovaps %ymm0, 0x240(%rsp)
vmovaps 0x2a0(%rsp), %ymm0
vmovaps %ymm0, 0x48a0(%rsp)
movl $0x10, 0x489c(%rsp)
vmovaps 0x48a0(%rsp), %ymm0
vmovd 0x489c(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x220(%rsp)
vmovaps 0x280(%rsp), %ymm0
vmovaps %ymm0, 0x4860(%rsp)
movl $0x10, 0x485c(%rsp)
vmovaps 0x4860(%rsp), %ymm0
vmovd 0x485c(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x200(%rsp)
vmovaps 0x260(%rsp), %ymm0
vmovaps %ymm0, 0x4820(%rsp)
movl $0x10, 0x481c(%rsp)
vmovaps 0x4820(%rsp), %ymm0
vmovd 0x481c(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x1e0(%rsp)
vmovaps 0x240(%rsp), %ymm0
vmovaps %ymm0, 0x47e0(%rsp)
movl $0x10, 0x47dc(%rsp)
vmovaps 0x47e0(%rsp), %ymm0
vmovd 0x47dc(%rsp), %xmm1
vpsrld %xmm1, %ymm0, %ymm0
vmovaps %ymm0, 0x1c0(%rsp)
vmovaps 0x220(%rsp), %ymm1
movl $0x20, 0x44fc(%rsp)
movl 0x44fc(%rsp), %eax
movl %eax, 0x20(%rsp)
movl %eax, 0x4558(%rsp)
movl %eax, 0x4554(%rsp)
movl %eax, 0x4550(%rsp)
movl %eax, 0x454c(%rsp)
movl %eax, 0x4548(%rsp)
movl %eax, 0x4544(%rsp)
movl %eax, 0x4540(%rsp)
movl %eax, 0x453c(%rsp)
movl 0x4540(%rsp), %r8d
movl 0x4544(%rsp), %edi
movl 0x4548(%rsp), %esi
movl 0x4550(%rsp), %edx
movl 0x4554(%rsp), %ecx
movl 0x4558(%rsp), %eax
vmovd 0x453c(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x454c(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x4510(%rsp)
vmovdqa %xmm0, 0x4500(%rsp)
vmovaps 0x4500(%rsp), %ymm0
vmovaps %ymm1, 0x4c20(%rsp)
vmovaps %ymm0, 0x4c00(%rsp)
vmovaps 0x4c20(%rsp), %ymm0
vmovaps 0x4c00(%rsp), %ymm1
vpsubd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x220(%rsp)
vmovaps 0x200(%rsp), %ymm1
movl $0x20, 0x449c(%rsp)
movl 0x449c(%rsp), %eax
movl %eax, 0x24(%rsp)
movl %eax, 0x44f8(%rsp)
movl %eax, 0x44f4(%rsp)
movl %eax, 0x44f0(%rsp)
movl %eax, 0x44ec(%rsp)
movl %eax, 0x44e8(%rsp)
movl %eax, 0x44e4(%rsp)
movl %eax, 0x44e0(%rsp)
movl %eax, 0x44dc(%rsp)
movl 0x44e0(%rsp), %r8d
movl 0x44e4(%rsp), %edi
movl 0x44e8(%rsp), %esi
movl 0x44f0(%rsp), %edx
movl 0x44f4(%rsp), %ecx
movl 0x44f8(%rsp), %eax
vmovd 0x44dc(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x44ec(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x44b0(%rsp)
vmovdqa %xmm0, 0x44a0(%rsp)
vmovaps 0x44a0(%rsp), %ymm0
vmovaps %ymm1, 0x4be0(%rsp)
vmovaps %ymm0, 0x4bc0(%rsp)
vmovaps 0x4be0(%rsp), %ymm0
vmovaps 0x4bc0(%rsp), %ymm1
vpsubd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x200(%rsp)
vmovaps 0x1e0(%rsp), %ymm1
movl $0x20, 0x443c(%rsp)
movl 0x443c(%rsp), %eax
movl %eax, 0x28(%rsp)
movl %eax, 0x4498(%rsp)
movl %eax, 0x4494(%rsp)
movl %eax, 0x4490(%rsp)
movl %eax, 0x448c(%rsp)
movl %eax, 0x4488(%rsp)
movl %eax, 0x4484(%rsp)
movl %eax, 0x4480(%rsp)
movl %eax, 0x447c(%rsp)
movl 0x4480(%rsp), %r8d
movl 0x4484(%rsp), %edi
movl 0x4488(%rsp), %esi
movl 0x4490(%rsp), %edx
movl 0x4494(%rsp), %ecx
movl 0x4498(%rsp), %eax
vmovd 0x447c(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x448c(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x4450(%rsp)
vmovdqa %xmm0, 0x4440(%rsp)
vmovaps 0x4440(%rsp), %ymm0
vmovaps %ymm1, 0x4ba0(%rsp)
vmovaps %ymm0, 0x4b80(%rsp)
vmovaps 0x4ba0(%rsp), %ymm0
vmovaps 0x4b80(%rsp), %ymm1
vpsubd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x1e0(%rsp)
vmovaps 0x1c0(%rsp), %ymm1
movl $0x20, 0x43dc(%rsp)
movl 0x43dc(%rsp), %eax
movl %eax, 0x2c(%rsp)
movl %eax, 0x4438(%rsp)
movl %eax, 0x4434(%rsp)
movl %eax, 0x4430(%rsp)
movl %eax, 0x442c(%rsp)
movl %eax, 0x4428(%rsp)
movl %eax, 0x4424(%rsp)
movl %eax, 0x4420(%rsp)
movl %eax, 0x441c(%rsp)
movl 0x4420(%rsp), %r8d
movl 0x4424(%rsp), %edi
movl 0x4428(%rsp), %esi
movl 0x4430(%rsp), %edx
movl 0x4434(%rsp), %ecx
movl 0x4438(%rsp), %eax
vmovd 0x441c(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x442c(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x43f0(%rsp)
vmovdqa %xmm0, 0x43e0(%rsp)
vmovaps 0x43e0(%rsp), %ymm0
vmovaps %ymm1, 0x4b60(%rsp)
vmovaps %ymm0, 0x4b40(%rsp)
vmovaps 0x4b60(%rsp), %ymm0
vmovaps 0x4b40(%rsp), %ymm1
vpsubd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x1c0(%rsp)
vmovaps 0x320(%rsp), %ymm1
vmovaps 0x220(%rsp), %ymm0
vmovaps %ymm1, 0x4d20(%rsp)
vmovaps %ymm0, 0x4d00(%rsp)
vmovaps 0x4d20(%rsp), %ymm0
vmovaps 0x4d00(%rsp), %ymm1
vpsrlvd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x1a0(%rsp)
vmovaps 0x300(%rsp), %ymm1
vmovaps 0x200(%rsp), %ymm0
vmovaps %ymm1, 0x4ce0(%rsp)
vmovaps %ymm0, 0x4cc0(%rsp)
vmovaps 0x4ce0(%rsp), %ymm0
vmovaps 0x4cc0(%rsp), %ymm1
vpsrlvd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x180(%rsp)
vmovaps 0x2a0(%rsp), %ymm1
movl $0xffff, 0x437c(%rsp) # imm = 0xFFFF
movl 0x437c(%rsp), %eax
movl %eax, 0x30(%rsp)
movl %eax, 0x43d8(%rsp)
movl %eax, 0x43d4(%rsp)
movl %eax, 0x43d0(%rsp)
movl %eax, 0x43cc(%rsp)
movl %eax, 0x43c8(%rsp)
movl %eax, 0x43c4(%rsp)
movl %eax, 0x43c0(%rsp)
movl %eax, 0x43bc(%rsp)
movl 0x43c0(%rsp), %r8d
movl 0x43c4(%rsp), %edi
movl 0x43c8(%rsp), %esi
movl 0x43d0(%rsp), %edx
movl 0x43d4(%rsp), %ecx
movl 0x43d8(%rsp), %eax
vmovd 0x43bc(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x43cc(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x4390(%rsp)
vmovdqa %xmm0, 0x4380(%rsp)
vmovaps 0x4380(%rsp), %ymm0
vmovaps %ymm1, 0x31a0(%rsp)
vmovaps %ymm0, 0x3180(%rsp)
vmovaps 0x31a0(%rsp), %ymm0
vmovaps 0x3180(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x160(%rsp)
vmovaps 0x280(%rsp), %ymm1
movl $0xffff, 0x431c(%rsp) # imm = 0xFFFF
movl 0x431c(%rsp), %eax
movl %eax, 0x34(%rsp)
movl %eax, 0x4378(%rsp)
movl %eax, 0x4374(%rsp)
movl %eax, 0x4370(%rsp)
movl %eax, 0x436c(%rsp)
movl %eax, 0x4368(%rsp)
movl %eax, 0x4364(%rsp)
movl %eax, 0x4360(%rsp)
movl %eax, 0x435c(%rsp)
movl 0x4360(%rsp), %r8d
movl 0x4364(%rsp), %edi
movl 0x4368(%rsp), %esi
movl 0x4370(%rsp), %edx
movl 0x4374(%rsp), %ecx
movl 0x4378(%rsp), %eax
vmovd 0x435c(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x436c(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x4330(%rsp)
vmovdqa %xmm0, 0x4320(%rsp)
vmovaps 0x4320(%rsp), %ymm0
vmovaps %ymm1, 0x3160(%rsp)
vmovaps %ymm0, 0x3140(%rsp)
vmovaps 0x3160(%rsp), %ymm0
vmovaps 0x3140(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x140(%rsp)
vmovaps 0x1a0(%rsp), %ymm1
vmovaps 0x160(%rsp), %ymm0
vmovaps %ymm1, 0x4e20(%rsp)
vmovaps %ymm0, 0x4e00(%rsp)
vmovaps 0x4e20(%rsp), %ymm0
vmovaps 0x4e00(%rsp), %ymm1
vpmulld %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x1a0(%rsp)
vmovaps 0x180(%rsp), %ymm1
vmovaps 0x140(%rsp), %ymm0
vmovaps %ymm1, 0x4de0(%rsp)
vmovaps %ymm0, 0x4dc0(%rsp)
vmovaps 0x4de0(%rsp), %ymm0
vmovaps 0x4dc0(%rsp), %ymm1
vpmulld %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x180(%rsp)
vmovaps 0x2e0(%rsp), %ymm1
vmovaps 0x1e0(%rsp), %ymm0
vmovaps %ymm1, 0x4ca0(%rsp)
vmovaps %ymm0, 0x4c80(%rsp)
vmovaps 0x4ca0(%rsp), %ymm0
vmovaps 0x4c80(%rsp), %ymm1
vpsrlvd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x120(%rsp)
vmovaps 0x2c0(%rsp), %ymm1
vmovaps 0x1c0(%rsp), %ymm0
vmovaps %ymm1, 0x4c60(%rsp)
vmovaps %ymm0, 0x4c40(%rsp)
vmovaps 0x4c60(%rsp), %ymm0
vmovaps 0x4c40(%rsp), %ymm1
vpsrlvd %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x100(%rsp)
vmovaps 0x260(%rsp), %ymm1
movl $0xffff, 0x42bc(%rsp) # imm = 0xFFFF
movl 0x42bc(%rsp), %eax
movl %eax, 0x38(%rsp)
movl %eax, 0x4318(%rsp)
movl %eax, 0x4314(%rsp)
movl %eax, 0x4310(%rsp)
movl %eax, 0x430c(%rsp)
movl %eax, 0x4308(%rsp)
movl %eax, 0x4304(%rsp)
movl %eax, 0x4300(%rsp)
movl %eax, 0x42fc(%rsp)
movl 0x4300(%rsp), %r8d
movl 0x4304(%rsp), %edi
movl 0x4308(%rsp), %esi
movl 0x4310(%rsp), %edx
movl 0x4314(%rsp), %ecx
movl 0x4318(%rsp), %eax
vmovd 0x42fc(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x430c(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x42d0(%rsp)
vmovdqa %xmm0, 0x42c0(%rsp)
vmovaps 0x42c0(%rsp), %ymm0
vmovaps %ymm1, 0x3120(%rsp)
vmovaps %ymm0, 0x3100(%rsp)
vmovaps 0x3120(%rsp), %ymm0
vmovaps 0x3100(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0xe0(%rsp)
vmovaps 0x240(%rsp), %ymm1
movl $0xffff, 0x425c(%rsp) # imm = 0xFFFF
movl 0x425c(%rsp), %eax
movl %eax, 0x3c(%rsp)
movl %eax, 0x42b8(%rsp)
movl %eax, 0x42b4(%rsp)
movl %eax, 0x42b0(%rsp)
movl %eax, 0x42ac(%rsp)
movl %eax, 0x42a8(%rsp)
movl %eax, 0x42a4(%rsp)
movl %eax, 0x42a0(%rsp)
movl %eax, 0x429c(%rsp)
movl 0x42a0(%rsp), %r8d
movl 0x42a4(%rsp), %edi
movl 0x42a8(%rsp), %esi
movl 0x42b0(%rsp), %edx
movl 0x42b4(%rsp), %ecx
movl 0x42b8(%rsp), %eax
vmovd 0x429c(%rsp), %xmm0
vpinsrd $0x1, %r8d, %xmm0, %xmm0
vpinsrd $0x2, %edi, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm0
vmovd 0x42ac(%rsp), %xmm2
vpinsrd $0x1, %edx, %xmm2, %xmm2
vpinsrd $0x2, %ecx, %xmm2, %xmm2
vpinsrd $0x3, %eax, %xmm2, %xmm2
vmovdqa %xmm2, 0x4270(%rsp)
vmovdqa %xmm0, 0x4260(%rsp)
vmovaps 0x4260(%rsp), %ymm0
vmovaps %ymm1, 0x30e0(%rsp)
vmovaps %ymm0, 0x30c0(%rsp)
vmovaps 0x30e0(%rsp), %ymm0
vmovaps 0x30c0(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0xc0(%rsp)
vmovaps 0x120(%rsp), %ymm1
vmovaps 0xe0(%rsp), %ymm0
vmovaps %ymm1, 0x4da0(%rsp)
vmovaps %ymm0, 0x4d80(%rsp)
vmovaps 0x4da0(%rsp), %ymm0
vmovaps 0x4d80(%rsp), %ymm1
vpmulld %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x120(%rsp)
vmovaps 0x100(%rsp), %ymm1
vmovaps 0xc0(%rsp), %ymm0
vmovaps %ymm1, 0x4d60(%rsp)
vmovaps %ymm0, 0x4d40(%rsp)
vmovaps 0x4d60(%rsp), %ymm0
vmovaps 0x4d40(%rsp), %ymm1
vpmulld %ymm1, %ymm0, %ymm0
vmovaps %ymm0, 0x100(%rsp)
vmovaps 0x720(%rsp), %ymm1
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm1, 0x30a0(%rsp)
vmovaps %ymm0, 0x3080(%rsp)
vmovaps 0x30a0(%rsp), %ymm0
vmovaps 0x3080(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x740(%rsp), %ymm2
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm2, 0x3060(%rsp)
vmovaps %ymm0, 0x3040(%rsp)
vmovaps 0x3060(%rsp), %ymm0
vmovaps 0x3040(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x23a0(%rsp)
vmovaps %ymm0, 0x2380(%rsp)
vmovaps 0x23a0(%rsp), %ymm0
vmovaps 0x2380(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x760(%rsp), %ymm2
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm2, 0x3020(%rsp)
vmovaps %ymm0, 0x3000(%rsp)
vmovaps 0x3020(%rsp), %ymm0
vmovaps 0x3000(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x780(%rsp), %ymm3
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm3, 0x2fe0(%rsp)
vmovaps %ymm0, 0x2fc0(%rsp)
vmovaps 0x2fe0(%rsp), %ymm0
vmovaps 0x2fc0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x2360(%rsp)
vmovaps %ymm0, 0x2340(%rsp)
vmovaps 0x2360(%rsp), %ymm0
vmovaps 0x2340(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2320(%rsp)
vmovaps %ymm0, 0x2300(%rsp)
vmovaps 0x2320(%rsp), %ymm0
vmovaps 0x2300(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vpshufd $0x4e, %ymm0, %ymm0     # ymm0 = ymm0[2,3,0,1,6,7,4,5]
vmovaps %ymm0, 0xa0(%rsp)
vmovaps 0x7a0(%rsp), %ymm1
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm1, 0x2fa0(%rsp)
vmovaps %ymm0, 0x2f80(%rsp)
vmovaps 0x2fa0(%rsp), %ymm0
vmovaps 0x2f80(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x7c0(%rsp), %ymm2
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm2, 0x2f60(%rsp)
vmovaps %ymm0, 0x2f40(%rsp)
vmovaps 0x2f60(%rsp), %ymm0
vmovaps 0x2f40(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x22e0(%rsp)
vmovaps %ymm0, 0x22c0(%rsp)
vmovaps 0x22e0(%rsp), %ymm0
vmovaps 0x22c0(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x7e0(%rsp), %ymm2
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm2, 0x2f20(%rsp)
vmovaps %ymm0, 0x2f00(%rsp)
vmovaps 0x2f20(%rsp), %ymm0
vmovaps 0x2f00(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x800(%rsp), %ymm3
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm3, 0x2ee0(%rsp)
vmovaps %ymm0, 0x2ec0(%rsp)
vmovaps 0x2ee0(%rsp), %ymm0
vmovaps 0x2ec0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x22a0(%rsp)
vmovaps %ymm0, 0x2280(%rsp)
vmovaps 0x22a0(%rsp), %ymm0
vmovaps 0x2280(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2260(%rsp)
vmovaps %ymm0, 0x2240(%rsp)
vmovaps 0x2260(%rsp), %ymm0
vmovaps 0x2240(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vpshufd $0x4e, %ymm0, %ymm0     # ymm0 = ymm0[2,3,0,1,6,7,4,5]
vmovaps %ymm0, 0x80(%rsp)
vmovaps 0x820(%rsp), %ymm1
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm1, 0x2ea0(%rsp)
vmovaps %ymm0, 0x2e80(%rsp)
vmovaps 0x2ea0(%rsp), %ymm0
vmovaps 0x2e80(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x840(%rsp), %ymm2
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm2, 0x2e60(%rsp)
vmovaps %ymm0, 0x2e40(%rsp)
vmovaps 0x2e60(%rsp), %ymm0
vmovaps 0x2e40(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2220(%rsp)
vmovaps %ymm0, 0x2200(%rsp)
vmovaps 0x2220(%rsp), %ymm0
vmovaps 0x2200(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x860(%rsp), %ymm2
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm2, 0x2e20(%rsp)
vmovaps %ymm0, 0x2e00(%rsp)
vmovaps 0x2e20(%rsp), %ymm0
vmovaps 0x2e00(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x880(%rsp), %ymm3
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm3, 0x2de0(%rsp)
vmovaps %ymm0, 0x2dc0(%rsp)
vmovaps 0x2de0(%rsp), %ymm0
vmovaps 0x2dc0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x21e0(%rsp)
vmovaps %ymm0, 0x21c0(%rsp)
vmovaps 0x21e0(%rsp), %ymm0
vmovaps 0x21c0(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x21a0(%rsp)
vmovaps %ymm0, 0x2180(%rsp)
vmovaps 0x21a0(%rsp), %ymm0
vmovaps 0x2180(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm0
vpshufd $0x4e, %ymm0, %ymm0     # ymm0 = ymm0[2,3,0,1,6,7,4,5]
vmovaps %ymm0, 0x60(%rsp)
vmovaps 0x8a0(%rsp), %ymm1
vmovaps 0x600(%rsp), %ymm0
vmovaps %ymm1, 0x2da0(%rsp)
vmovaps %ymm0, 0x2d80(%rsp)
vmovaps 0x2da0(%rsp), %ymm0
vmovaps 0x2d80(%rsp), %ymm1
vpand %ymm1, %ymm0, %ymm1
vmovaps 0x8c0(%rsp), %ymm2
vmovaps 0x5e0(%rsp), %ymm0
vmovaps %ymm2, 0x2d60(%rsp)
vmovaps %ymm0, 0x2d40(%rsp)
vmovaps 0x2d60(%rsp), %ymm0
vmovaps 0x2d40(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x2160(%rsp)
vmovaps %ymm0, 0x2140(%rsp)
vmovaps 0x2160(%rsp), %ymm0
vmovaps 0x2140(%rsp), %ymm1
vpor %ymm1, %ymm0, %ymm1
vmovaps 0x8e0(%rsp), %ymm2
vmovaps 0x640(%rsp), %ymm0
vmovaps %ymm2, 0x2d20(%rsp)
vmovaps %ymm0, 0x2d00(%rsp)
vmovaps 0x2d20(%rsp), %ymm0
vmovaps 0x2d00(%rsp), %ymm2
vpand %ymm2, %ymm0, %ymm2
vmovaps 0x900(%rsp), %ymm3
vmovaps 0x620(%rsp), %ymm0
vmovaps %ymm3, 0x2ce0(%rsp)
vmovaps %ymm0, 0x2cc0(%rsp)
vmovaps 0x2ce0(%rsp), %ymm0
vmovaps 0x2cc0(%rsp), %ymm3
vpand %ymm3, %ymm0, %ymm0
vmovaps %ymm2, 0x2120(%rsp)
vmovaps %ymm0, 0x2100(%rsp)
vmovaps 0x2120(%rsp), %ymm0
vmovaps 0x2100(%rsp), %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovaps %ymm1, 0x20e0(%rsp)
vmovaps %ymm0, 0x20c0(%rsp)
vmovaps 0x20e0(%rsp), %ymm0
vmovaps 0x20c0(%rsp), %ymm1
vpshufd $0x4e, %ymm1, %ymm1     # ymm1 = ymm1[2,3,0,1,6,7,4,5]
vpshufd $0x4e, %ymm0, %ymm0     # ymm0 = ymm0[2,3,0,1,6,7,4,5]
vpor %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x40(%rsp)
vmovdqa 0x1a0(%rsp), %ymm1
vmovdqa 0xa0(%rsp), %ymm0
vmovdqa %ymm1, 0x5020(%rsp)
vmovdqa %ymm0, 0x5000(%rsp)
vmovdqa 0x5020(%rsp), %ymm0
vmovdqa 0x5000(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x1a0(%rsp)
vmovdqa 0x180(%rsp), %ymm1
vmovdqa 0x80(%rsp), %ymm0
vmovdqa %ymm1, 0x4fe0(%rsp)
vmovdqa %ymm0, 0x4fc0(%rsp)
vmovdqa 0x4fe0(%rsp), %ymm0
vmovdqa 0x4fc0(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x180(%rsp)
vmovdqa 0x120(%rsp), %ymm1
vmovdqa 0x60(%rsp), %ymm0
vmovdqa %ymm1, 0x4fa0(%rsp)
vmovdqa %ymm0, 0x4f80(%rsp)
vmovdqa 0x4fa0(%rsp), %ymm0
vmovdqa 0x4f80(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x120(%rsp)
vmovdqa 0x100(%rsp), %ymm1
vmovdqa 0x40(%rsp), %ymm0
vmovdqa %ymm1, 0x4f60(%rsp)
vmovdqa %ymm0, 0x4f40(%rsp)
vmovdqa 0x4f60(%rsp), %ymm0
vmovdqa 0x4f40(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x100(%rsp)
vmovdqa 0x980(%rsp), %ymm1
vmovdqa 0x1a0(%rsp), %ymm0
vmovdqa %ymm1, 0x4f20(%rsp)
vmovdqa %ymm0, 0x4f00(%rsp)
vmovdqa 0x4f20(%rsp), %ymm0
vmovdqa 0x4f00(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x980(%rsp)
vmovdqa 0x960(%rsp), %ymm1
vmovdqa 0x180(%rsp), %ymm0
vmovdqa %ymm1, 0x4ee0(%rsp)
vmovdqa %ymm0, 0x4ec0(%rsp)
vmovdqa 0x4ee0(%rsp), %ymm0
vmovdqa 0x4ec0(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x960(%rsp)
vmovdqa 0x940(%rsp), %ymm1
vmovdqa 0x120(%rsp), %ymm0
vmovdqa %ymm1, 0x4ea0(%rsp)
vmovdqa %ymm0, 0x4e80(%rsp)
vmovdqa 0x4ea0(%rsp), %ymm0
vmovdqa 0x4e80(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x940(%rsp)
vmovdqa 0x920(%rsp), %ymm1
vmovdqa 0x100(%rsp), %ymm0
vmovdqa %ymm1, 0x4e60(%rsp)
vmovdqa %ymm0, 0x4e40(%rsp)
vmovdqa 0x4e60(%rsp), %ymm0
vmovdqa 0x4e40(%rsp), %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x920(%rsp)
movl 0x9cc(%rsp), %eax
subl $0x20, %eax
movl %eax, 0x9cc(%rsp)
jmp 0x9599d
leaq 0xe00(%rsp), %rax
vmovdqa 0x980(%rsp), %ymm0
movq %rax, 0x5128(%rsp)
vmovdqa %ymm0, 0x5100(%rsp)
vmovdqa 0x5100(%rsp), %ymm0
movq 0x5128(%rsp), %rax
vmovdqa %ymm0, (%rax)
leaq 0xe00(%rsp), %rax
addq $0x20, %rax
vmovdqa 0x960(%rsp), %ymm0
movq %rax, 0x50f8(%rsp)
vmovdqa %ymm0, 0x50c0(%rsp)
vmovdqa 0x50c0(%rsp), %ymm0
movq 0x50f8(%rsp), %rax
vmovdqa %ymm0, (%rax)
leaq 0xe00(%rsp), %rax
addq $0x40, %rax
vmovdqa 0x940(%rsp), %ymm0
movq %rax, 0x50b8(%rsp)
vmovdqa %ymm0, 0x5080(%rsp)
vmovdqa 0x5080(%rsp), %ymm0
movq 0x50b8(%rsp), %rax
vmovdqa %ymm0, (%rax)
leaq 0xe00(%rsp), %rax
addq $0x60, %rax
vmovdqa 0x920(%rsp), %ymm0
movq %rax, 0x5078(%rsp)
vmovdqa %ymm0, 0x5040(%rsp)
vmovdqa 0x5040(%rsp), %ymm0
movq 0x5078(%rsp), %rax
vmovdqa %ymm0, (%rax)
movq 0x9a8(%rsp), %rax
movq %rax, 0xdf8(%rsp)
movl $0x1f, 0x9bc(%rsp)
cmpl $0x0, 0x9bc(%rsp)
jl 0x994ab
movslq 0x9bc(%rsp), %rax
leaq 0xe00(%rsp), %rdi
shlq $0x2, %rax
addq %rax, %rdi
leaq 0xdf8(%rsp), %rsi
vzeroupper
callq 0x9a0a0
movl 0x9bc(%rsp), %eax
addl $-0x1, %eax
movl %eax, 0x9bc(%rsp)
jmp 0x99467
jmp 0x994ad
movq 0x1e88(%rsp), %rax
movq 0xdf8(%rsp), %rcx
subq %rcx, %rax
movslq 0x9c4(%rsp), %rcx
addq %rcx, %rax
movl %eax, %ecx
movq 0x1e98(%rsp), %rax
movl %ecx, (%rax)
movq 0x1ea0(%rsp), %rdi
movslq 0x9c4(%rsp), %rax
addq %rax, %rdi
movq 0xdf8(%rsp), %rsi
movq 0x1e88(%rsp), %rdx
movq 0xdf8(%rsp), %rax
subq %rax, %rdx
vzeroupper
callq 0x4810
movq 0x1ea0(%rsp), %rax
movq %rax, 0x1eb8(%rsp)
movq 0x1eb8(%rsp), %rax
movq %rbp, %rsp
popq %rbp
retq
nopw (%rax,%rax)