// File: /workspace/github_c_makefile_star2_O0/Encryptr[P]O-plus-plus/opp/compiler/compile_expr.c
// Function: opp_compile_logic_end
static void opp_compile_logic_end(struct Opp_Context* opp, struct Opp_Node* logic)
{
	switch (opp->cond_state.cond_type) 
	{
		case LOGIC_COND: {
			OPCODE_START();
				OPCODE_TYPE(OPCODE_LABEL);
				opp->ir.opcodes[opp->ir.instr_idx].constant.val.imm_i32 = opp->cond_state.locs[0];
			OPCODE_END();

			OPCODE_START();
				OPCODE_TYPE(OPCODE_CONST);
				opp->ir.opcodes[opp->ir.instr_idx].constant.val.type = IMM_I64;
				opp->ir.opcodes[opp->ir.instr_idx].constant.val.imm_i64 = 1;
				opp->ir.opcodes[opp->ir.instr_idx].constant.nopush = 1;
			OPCODE_END();

			OPCODE_START();
				OPCODE_TYPE(OPCODE_JMP);
				opp->ir.opcodes[opp->ir.instr_idx].jmp.type = PURE_JMP;
				opp->ir.opcodes[opp->ir.instr_idx].jmp.loc = opp->cond_state.endloc;
			OPCODE_END();

			OPCODE_START();
				OPCODE_TYPE(OPCODE_LABEL);
				opp->ir.opcodes[opp->ir.instr_idx].constant.val.imm_i32 = opp->cond_state.locs[1];
			OPCODE_END();

			OPCODE_START();
				OPCODE_TYPE(OPCODE_CONST);
				opp->ir.opcodes[opp->ir.instr_idx].constant.val.type = IMM_I64;
				opp->ir.opcodes[opp->ir.instr_idx].constant.val.imm_i64 = 0;
				opp->ir.opcodes[opp->ir.instr_idx].constant.nopush = 0;
			OPCODE_END();

			OPCODE_START();
				OPCODE_TYPE(OPCODE_LABEL);
				opp->ir.opcodes[opp->ir.instr_idx].constant.val.imm_i32 = opp->cond_state.endloc;
			OPCODE_END();
			break;
		}

		case IFWHILE_COND:
			opp->cond_state.cond_type = LOGIC_COND;
			break;

		case SWITCH_COND:
			break;
	}
}

// Assembly:
subq $0x18, %rsp
movq %rdi, 0x10(%rsp)
movq %rsi, 0x8(%rsp)
movq 0x10(%rsp), %rax
movl 0x68(%rax), %eax
movl %eax, 0x4(%rsp)
testl %eax, %eax
je 0x7be1
jmp 0x7bc0
movl 0x4(%rsp), %eax
subl $0x1, %eax
je 0x7e78
jmp 0x7bcf
movl 0x4(%rsp), %eax
subl $0x2, %eax
je 0x7e86
jmp 0x7e88
movq 0x10(%rsp), %rdi
callq 0x5600
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rcx
imulq $0x28, 0x48(%rcx), %rcx
addq %rcx, %rax
movl $0xa, (%rax)
movq 0x10(%rsp), %rax
movl 0x70(%rax), %ecx
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rdx
imulq $0x28, 0x48(%rdx), %rdx
addq %rdx, %rax
movl %ecx, 0x10(%rax)
movq 0x10(%rsp), %rax
movq 0x48(%rax), %rcx
addq $0x1, %rcx
movq %rcx, 0x48(%rax)
movq 0x10(%rsp), %rdi
callq 0x5600
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rcx
imulq $0x28, 0x48(%rcx), %rcx
addq %rcx, %rax
movl $0x0, (%rax)
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rcx
imulq $0x28, 0x48(%rcx), %rcx
addq %rcx, %rax
movl $0xa, 0x8(%rax)
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rcx
imulq $0x28, 0x48(%rcx), %rcx
addq %rcx, %rax
movq $0x1, 0x10(%rax)
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rcx
imulq $0x28, 0x48(%rcx), %rcx
addq %rcx, %rax
movb $0x1, 0x1c(%rax)
movq 0x10(%rsp), %rax
movq 0x48(%rax), %rcx
addq $0x1, %rcx
movq %rcx, 0x48(%rax)
movq 0x10(%rsp), %rdi
callq 0x5600
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rcx
imulq $0x28, 0x48(%rcx), %rcx
addq %rcx, %rax
movl $0x8, (%rax)
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rcx
imulq $0x28, 0x48(%rcx), %rcx
addq %rcx, %rax
movl $0x0, 0x8(%rax)
movq 0x10(%rsp), %rax
movl 0x78(%rax), %ecx
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rdx
imulq $0x28, 0x48(%rdx), %rdx
addq %rdx, %rax
movl %ecx, 0xc(%rax)
movq 0x10(%rsp), %rax
movq 0x48(%rax), %rcx
addq $0x1, %rcx
movq %rcx, 0x48(%rax)
movq 0x10(%rsp), %rdi
callq 0x5600
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rcx
imulq $0x28, 0x48(%rcx), %rcx
addq %rcx, %rax
movl $0xa, (%rax)
movq 0x10(%rsp), %rax
movl 0x74(%rax), %ecx
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rdx
imulq $0x28, 0x48(%rdx), %rdx
addq %rdx, %rax
movl %ecx, 0x10(%rax)
movq 0x10(%rsp), %rax
movq 0x48(%rax), %rcx
addq $0x1, %rcx
movq %rcx, 0x48(%rax)
movq 0x10(%rsp), %rdi
callq 0x5600
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rcx
imulq $0x28, 0x48(%rcx), %rcx
addq %rcx, %rax
movl $0x0, (%rax)
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rcx
imulq $0x28, 0x48(%rcx), %rcx
addq %rcx, %rax
movl $0xa, 0x8(%rax)
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rcx
imulq $0x28, 0x48(%rcx), %rcx
addq %rcx, %rax
movq $0x0, 0x10(%rax)
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rcx
imulq $0x28, 0x48(%rcx), %rcx
addq %rcx, %rax
movb $0x0, 0x1c(%rax)
movq 0x10(%rsp), %rax
movq 0x48(%rax), %rcx
addq $0x1, %rcx
movq %rcx, 0x48(%rax)
movq 0x10(%rsp), %rdi
callq 0x5600
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rcx
imulq $0x28, 0x48(%rcx), %rcx
addq %rcx, %rax
movl $0xa, (%rax)
movq 0x10(%rsp), %rax
movl 0x78(%rax), %ecx
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rax
movq 0x10(%rsp), %rdx
imulq $0x28, 0x48(%rdx), %rdx
addq %rdx, %rax
movl %ecx, 0x10(%rax)
movq 0x10(%rsp), %rax
movq 0x48(%rax), %rcx
addq $0x1, %rcx
movq %rcx, 0x48(%rax)
jmp 0x7e88
movq 0x10(%rsp), %rax
movl $0x0, 0x68(%rax)
jmp 0x7e88
jmp 0x7e88
addq $0x18, %rsp
retq
nopl (%rax)