// File: /workspace/github_cpp_makefile_star2_O1/dramninjasUMD[P]BOBSim/SimpleController.cpp
// Function: BOBSim::SimpleController::AddTransaction(BOBSim::Transaction*)
void SimpleController::AddTransaction(Transaction *trans)
{
	//map physical address to rank/bank/row/col
	AddressMapping(trans->address,mappedRank,mappedBank,mappedRow,mappedCol);

	if(GIVE_LOGIC_PRIORITY && trans->originatedFromLogicOp)
	{
		//if requests from logic ops have priority, put them at the front so they go first
		if(DEBUG_LOGIC) DEBUG("  == Simple Controller received transaction from logic op : "<<*trans);
		switch(trans->transactionType)
		{
		case DATA_READ:
			readCounter++;
			//create column read bus packet and add it to command queue
			commandQueue.push_front(new BusPacket(READ_P,trans->transactionID,mappedCol,mappedRow,mappedRank,mappedBank,trans->portID,trans->transactionSize/DRAM_BUS_WIDTH,trans->mappedChannel,trans->address,trans->originatedFromLogicOp));
			break;
		case DATA_WRITE:
			writeCounter++;
			//create column write bus packet and add it to command queue
			commandQueue.push_front(new BusPacket(WRITE_P,trans->transactionID,mappedCol,mappedRow,mappedRank,mappedBank,trans->portID,trans->transactionSize/DRAM_BUS_WIDTH,trans->mappedChannel,trans->address,trans->originatedFromLogicOp));
			delete trans;
			break;
		default:
			ERROR("== ERROR - Adding wrong transaction to simple controller : "<<*trans);
			abort();
			break;
		}
		//since we're pushing front, add the ACT after so it ends up being first
		commandQueue.push_front(new BusPacket(ACTIVATE, trans->transactionID,mappedCol,mappedRow,mappedRank,mappedBank,trans->portID,0,trans->mappedChannel,trans->address,trans->originatedFromLogicOp));
	}
	else
	{
		//create the row activate bus packet and add it to command queue
		commandQueue.push_back(new BusPacket(ACTIVATE, trans->transactionID,mappedCol,mappedRow,mappedRank,mappedBank,trans->portID,0,trans->mappedChannel,trans->address,trans->originatedFromLogicOp));

		switch(trans->transactionType)
		{
		case DATA_READ:
			readCounter++;
			//create column read bus packet and add it to command queue
			commandQueue.push_back(new BusPacket(READ_P,trans->transactionID,mappedCol,mappedRow,mappedRank,mappedBank,trans->portID,trans->transactionSize/DRAM_BUS_WIDTH,trans->mappedChannel,trans->address,trans->originatedFromLogicOp));
			break;
		case DATA_WRITE:
			writeCounter++;
			//create column write bus packet and add it to command queue
			commandQueue.push_back(new BusPacket(WRITE_P,trans->transactionID,mappedCol,mappedRow,mappedRank,mappedBank,trans->portID,trans->transactionSize/DRAM_BUS_WIDTH,trans->mappedChannel,trans->address,trans->originatedFromLogicOp));
			delete trans;
			break;
		default:
			ERROR("== ERROR - Adding wrong transaction to simple controller : "<<*trans);
			abort();
			break;
		}
	}

	waitingACTS++;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movq 0x8(%rsi), %rsi
callq 0x11e4c
cmpb $0x1, 0x30(%rbx)
jne 0x11ac5
movl (%rbx), %eax
cmpl $0x1, %eax
je 0x11bc1
testl %eax, %eax
jne 0x11d6f
incl 0xe4(%r14)
movl $0x38, %edi
callq 0x31d0
movq %rax, %r15
movl 0x18(%rbx), %edx
movl 0x184(%r14), %ecx
movl 0x180(%r14), %r8d
movl 0x178(%r14), %r9d
movl 0x17c(%r14), %eax
movl 0x1c(%rbx), %r10d
movl 0x14(%rbx), %r11d
shrl $0x4, %r11d
movl 0x10(%rbx), %r12d
movq %r15, %rdi
movl $0x1, %esi
pushq $0x1
pushq 0x8(%rbx)
pushq %r12
pushq %r11
pushq %r10
pushq %rax
callq 0xc6d8
addq $0x30, %rsp
movq %r15, (%rsp)
movq 0x38(%r14), %rax
cmpq 0x40(%r14), %rax
je 0x11cd2
movq %r15, -0x8(%rax)
addq $-0x8, 0x38(%r14)
jmp 0x11cde
movl $0x38, %edi
callq 0x31d0
movq %rax, %r12
movl 0x18(%rbx), %edx
movl 0x184(%r14), %ecx
movl 0x180(%r14), %r8d
movl 0x178(%r14), %r9d
movl 0x17c(%r14), %eax
movl 0x1c(%rbx), %r10d
movl 0x10(%rbx), %r11d
xorl %r15d, %r15d
movq %r12, %rdi
movl $0x4, %esi
pushq %r15
pushq 0x8(%rbx)
pushq %r11
pushq %r15
pushq %r10
pushq %rax
callq 0xc6d8
addq $0x30, %rsp
leaq 0x28(%r14), %r15
movq %rsp, %rsi
movq %r12, (%rsi)
movq %r15, %rdi
callq 0x122de
movl (%rbx), %eax
testl %eax, %eax
je 0x11c41
cmpl $0x1, %eax
jne 0x11daa
incl 0xe8(%r14)
movl $0x38, %edi
callq 0x31d0
movq %rax, %r12
movl 0x18(%rbx), %edx
movl 0x184(%r14), %ecx
movl 0x180(%r14), %r8d
movl 0x178(%r14), %r9d
movl 0x17c(%r14), %eax
movl 0x1c(%rbx), %r10d
movl 0x14(%rbx), %r11d
shrl $0x4, %r11d
movl 0x10(%rbx), %r13d
movzbl 0x30(%rbx), %ebp
movq %r12, %rdi
movl $0x3, %esi
pushq %rbp
pushq 0x8(%rbx)
pushq %r13
pushq %r11
pushq %r10
pushq %rax
callq 0xc6d8
addq $0x30, %rsp
movq %rsp, %rsi
movq %r12, (%rsi)
movq %r15, %rdi
callq 0x122de
movl $0x90, %esi
movq %rbx, %rdi
callq 0x31f0
jmp 0x11d59
incl 0xe8(%r14)
movl $0x38, %edi
callq 0x31d0
movq %rax, %r15
movl 0x18(%rbx), %edx
movl 0x184(%r14), %ecx
movl 0x180(%r14), %r8d
movl 0x178(%r14), %r9d
movl 0x17c(%r14), %eax
movl 0x1c(%rbx), %r10d
movl 0x14(%rbx), %r11d
shrl $0x4, %r11d
movl 0x10(%rbx), %r12d
movq %r15, %rdi
movl $0x3, %esi
pushq $0x1
pushq 0x8(%rbx)
pushq %r12
pushq %r11
pushq %r10
pushq %rax
callq 0xc6d8
addq $0x30, %rsp
movq %r15, (%rsp)
movq 0x38(%r14), %rax
cmpq 0x40(%r14), %rax
je 0x11cb7
movq %r15, -0x8(%rax)
addq $-0x8, 0x38(%r14)
jmp 0x11cc3
incl 0xe4(%r14)
movl $0x38, %edi
callq 0x31d0
movq %rax, %r12
movl 0x18(%rbx), %edx
movl 0x184(%r14), %ecx
movl 0x180(%r14), %r8d
movl 0x178(%r14), %r9d
movl 0x17c(%r14), %eax
movl 0x1c(%rbx), %r10d
movl 0x14(%rbx), %r11d
shrl $0x4, %r11d
movl 0x10(%rbx), %r13d
movzbl 0x30(%rbx), %ebp
movq %r12, %rdi
movl $0x1, %esi
pushq %rbp
pushq 0x8(%rbx)
pushq %r13
pushq %r11
pushq %r10
pushq %rax
callq 0xc6d8
addq $0x30, %rsp
movq %rsp, %rsi
movq %r12, (%rsi)
movq %r15, %rdi
callq 0x122de
jmp 0x11d59
leaq 0x28(%r14), %rdi
movq %rsp, %rsi
callq 0x12218
movl $0x90, %esi
movq %rbx, %rdi
callq 0x31f0
jmp 0x11cde
leaq 0x28(%r14), %rdi
movq %rsp, %rsi
callq 0x12218
movl $0x38, %edi
callq 0x31d0
movq %rax, %r15
movl 0x18(%rbx), %edx
movl 0x184(%r14), %ecx
movl 0x180(%r14), %r8d
movl 0x178(%r14), %r9d
movl 0x17c(%r14), %eax
movl 0x1c(%rbx), %r10d
movl 0x10(%rbx), %r11d
movzbl 0x30(%rbx), %r12d
movq %r15, %rdi
movl $0x4, %esi
pushq %r12
pushq 0x8(%rbx)
pushq %r11
pushq $0x0
pushq %r10
pushq %rax
callq 0xc6d8
addq $0x30, %rsp
movq %r15, (%rsp)
movq 0x38(%r14), %rax
cmpq 0x40(%r14), %rax
je 0x11d4d
movq %r15, -0x8(%rax)
addq $-0x8, 0x38(%r14)
jmp 0x11d59
leaq 0x28(%r14), %rdi
movq %rsp, %rsi
callq 0x12218
incl 0xf4(%r14)
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x727a(%rip), %rdi      # 0x18ff0
leaq 0x13fb(%rip), %rsi      # 0x13178
callq 0x31c0
leaq 0x2bff(%rip), %rsi      # 0x14988
movq %rax, %rdi
callq 0x31c0
leaq 0x1389(%rip), %rsi      # 0x13121
movq %rax, %rdi
callq 0x31c0
movq %rax, %rdi
movl $0x275, %esi            # imm = 0x275
jmp 0x11de3
movq 0x723f(%rip), %rdi      # 0x18ff0
leaq 0x13c0(%rip), %rsi      # 0x13178
callq 0x31c0
leaq 0x2bc4(%rip), %rsi      # 0x14988
movq %rax, %rdi
callq 0x31c0
leaq 0x134e(%rip), %rsi      # 0x13121
movq %rax, %rdi
callq 0x31c0
movq %rax, %rdi
movl $0x28f, %esi            # imm = 0x28F
callq 0x3330
leaq 0x139a(%rip), %rsi      # 0x13189
movq %rax, %rdi
callq 0x31c0
leaq 0x2c09(%rip), %rsi      # 0x14a07
movq %rax, %rdi
callq 0x31c0
movq %rax, %rdi
movq %rbx, %rsi
callq 0x1243b
movq %rax, %rdi
callq 0x30d0
callq 0x3100
jmp 0x11e33
jmp 0x11e33
jmp 0x11e26
jmp 0x11e26
movq %rax, %rbx
movl $0x38, %esi
movq %r15, %rdi
jmp 0x11e3e
movq %rax, %rbx
movl $0x38, %esi
movq %r12, %rdi
callq 0x31f0
movq %rbx, %rdi
callq 0x3340
nop