// File: CMU-SAFARI[P]MQSim/src/ssd/Data_Cache_Manager_Flash_Advanced.cpp
// Function: SSD_Components::Data_Cache_Manager_Flash_Advanced::write_to_destage_buffer(SSD_Components::User_Request*)
void Data_Cache_Manager_Flash_Advanced::write_to_destage_buffer(User_Request* user_request)
	{
		//To eliminate race condition, MQSim assumes the management information and user data are stored in separate DRAM modules
		unsigned int cache_eviction_read_size_in_sectors = 0;//The size of data evicted from cache
		unsigned int flash_written_back_write_size_in_sectors = 0;//The size of data that is both written back to flash and written to DRAM
		unsigned int dram_write_size_in_sectors = 0;//The size of data written to DRAM (must be >= flash_written_back_write_size_in_sectors)
		std::list<NVM_Transaction*>* evicted_cache_slots = new std::list<NVM_Transaction*>;
		std::list<NVM_Transaction*> writeback_transactions;
		auto it = user_request->Transaction_list.begin();

		int queue_id = user_request->Stream_id;
		if (shared_dram_request_queue) {
			queue_id = 0;
		}

		while (it != user_request->Transaction_list.end() 
			&& (back_pressure_buffer_depth[queue_id] + cache_eviction_read_size_in_sectors + flash_written_back_write_size_in_sectors) < back_pressure_buffer_max_depth) {
			NVM_Transaction_Flash_WR* tr = (NVM_Transaction_Flash_WR*)(*it);
			//If the logical address already exists in the cache
			if (per_stream_cache[tr->Stream_id]->Exists(tr->Stream_id, tr->LPA)) {
				/*MQSim should get rid of writting stale data to the cache.
				* This situation may result from out-of-order transaction execution*/
				Data_Cache_Slot_Type slot = per_stream_cache[tr->Stream_id]->Get_slot(tr->Stream_id, tr->LPA);
				sim_time_type timestamp = slot.Timestamp;
				NVM::memory_content_type content = slot.Content;
				if (tr->DataTimeStamp > timestamp) {
					timestamp = tr->DataTimeStamp;
					content = tr->Content;
				}
				per_stream_cache[tr->Stream_id]->Update_data(tr->Stream_id, tr->LPA, content, timestamp, tr->write_sectors_bitmap | slot.State_bitmap_of_existing_sectors);
			} else {//the logical address is not in the cache
				if (!per_stream_cache[tr->Stream_id]->Check_free_slot_availability()) {
					Data_Cache_Slot_Type evicted_slot = per_stream_cache[tr->Stream_id]->Evict_one_slot_lru();
					if (evicted_slot.Status == Cache_Slot_Status::DIRTY_NO_FLASH_WRITEBACK) {
						evicted_cache_slots->push_back(new NVM_Transaction_Flash_WR(Transaction_Source_Type::CACHE,
							tr->Stream_id, count_sector_no_from_status_bitmap(evicted_slot.State_bitmap_of_existing_sectors) * SECTOR_SIZE_IN_BYTE,
							evicted_slot.LPA, NULL, IO_Flow_Priority_Class::URGENT, evicted_slot.Content, evicted_slot.State_bitmap_of_existing_sectors, evicted_slot.Timestamp));
						cache_eviction_read_size_in_sectors += count_sector_no_from_status_bitmap(evicted_slot.State_bitmap_of_existing_sectors);
						//DEBUG2("Evicting page" << evicted_slot.LPA << " from write buffer ")
					}
				}
				per_stream_cache[tr->Stream_id]->Insert_write_data(tr->Stream_id, tr->LPA, tr->Content, tr->DataTimeStamp, tr->write_sectors_bitmap);
			}
			dram_write_size_in_sectors += count_sector_no_from_status_bitmap(tr->write_sectors_bitmap);
			//hot/cold data separation
			if (bloom_filter[tr->Stream_id].find(tr->LPA) == bloom_filter[tr->Stream_id].end()) {
				per_stream_cache[tr->Stream_id]->Change_slot_status_to_writeback(tr->Stream_id, tr->LPA); //Eagerly write back cold data
				flash_written_back_write_size_in_sectors += count_sector_no_from_status_bitmap(tr->write_sectors_bitmap);
				bloom_filter[user_request->Stream_id].insert(tr->LPA);
				writeback_transactions.push_back(tr);
			}
			user_request->Transaction_list.erase(it++);
		}
		
		user_request->Sectors_serviced_from_cache += dram_write_size_in_sectors;//This is very important update. It is used to decide when all data sectors of a user request are serviced
		back_pressure_buffer_depth[queue_id] += cache_eviction_read_size_in_sectors + flash_written_back_write_size_in_sectors;

		//Issue memory read for cache evictions
		if (evicted_cache_slots->size() > 0) {
			Memory_Transfer_Info* read_transfer_info = new Memory_Transfer_Info;
			read_transfer_info->Size_in_bytes = cache_eviction_read_size_in_sectors * SECTOR_SIZE_IN_BYTE;
			read_transfer_info->Related_request = evicted_cache_slots;
			read_transfer_info->next_event_type = Data_Cache_Simulation_Event_Type::MEMORY_READ_FOR_CACHE_EVICTION_FINISHED;
			read_transfer_info->Stream_id = user_request->Stream_id;
			service_dram_access_request(read_transfer_info);
		}

		//Issue memory write to write data to DRAM
		if (dram_write_size_in_sectors) {
			Memory_Transfer_Info* write_transfer_info = new Memory_Transfer_Info;
			write_transfer_info->Size_in_bytes = dram_write_size_in_sectors * SECTOR_SIZE_IN_BYTE;
			write_transfer_info->Related_request = user_request;
			write_transfer_info->next_event_type = Data_Cache_Simulation_Event_Type::MEMORY_WRITE_FOR_USERIO_FINISHED;
			write_transfer_info->Stream_id = user_request->Stream_id;
			service_dram_access_request(write_transfer_info);
		}

		//If any writeback should be performed, then issue flash write transactions
		if (writeback_transactions.size() > 0) {
					static_cast<FTL*>(nvm_firmware)->Address_Mapping_Unit->Translate_lpa_to_ppa_and_dispatch(writeback_transactions);
		}
		
		//Reset control data structures used for hot/cold separation 
		if (Simulator->Time() > next_bloom_filter_reset_milestone) {
			bloom_filter[user_request->Stream_id].clear();
			next_bloom_filter_reset_milestone = Simulator->Time() + bloom_filter_reset_step;
		}
	}

// Assembly:
subq $0x1e8, %rsp            # imm = 0x1E8
movq %rdi, 0x1e0(%rsp)
movq %rsi, 0x1d8(%rsp)
movq 0x1e0(%rsp), %rax
movq %rax, 0xa8(%rsp)
movl $0x0, 0x1d4(%rsp)
movl $0x0, 0x1d0(%rsp)
movl $0x0, 0x1cc(%rsp)
movl $0x18, %edi
callq 0x8450
movq %rax, %rdi
movq %rdi, 0xa0(%rsp)
callq 0x6c250
movq 0xa0(%rsp), %rax
movq %rax, 0x1c0(%rsp)
leaq 0x1a8(%rsp), %rdi
callq 0x6c250
movq 0x1d8(%rsp), %rdi
addq $0x40, %rdi
callq 0x6c0d0
movq %rax, %rcx
movq 0xa8(%rsp), %rax
movq %rcx, 0x1a0(%rsp)
movq 0x1d8(%rsp), %rcx
movzwl 0x68(%rcx), %ecx
movl %ecx, 0x19c(%rsp)
testb $0x1, 0xe0(%rax)
je 0x6b3ea
movl $0x0, 0x19c(%rsp)
jmp 0x6b3ec
movq 0x1d8(%rsp), %rdi
addq $0x40, %rdi
callq 0x6c120
movq %rax, 0x190(%rsp)
leaq 0x1a0(%rsp), %rdi
leaq 0x190(%rsp), %rsi
callq 0x6c100
movb %al, %cl
xorl %eax, %eax
testb $0x1, %cl
movb %al, 0x9f(%rsp)
jne 0x6b42c
jmp 0x6b464
movq 0xa8(%rsp), %rcx
movq 0xf0(%rcx), %rax
movslq 0x19c(%rsp), %rdx
movl (%rax,%rdx,4), %eax
addl 0x1d4(%rsp), %eax
addl 0x1d0(%rsp), %eax
cmpl 0xe8(%rcx), %eax
setb %al
movb %al, 0x9f(%rsp)
movb 0x9f(%rsp), %al
testb $0x1, %al
jne 0x6b474
jmp 0x6b9aa
leaq 0x1a0(%rsp), %rdi
callq 0x6c150
movq %rax, %rcx
movq 0xa8(%rsp), %rax
movq (%rcx), %rcx
movq %rcx, 0x188(%rsp)
movq 0xc0(%rax), %rcx
movq 0x188(%rsp), %rax
movzwl (%rax), %esi
movl %esi, %edx
movq (%rcx,%rdx,8), %rdi
movq 0x58(%rax), %rdx
callq 0x64390
movb %al, 0x9e(%rsp)
jmp 0x6b4c1
movb 0x9e(%rsp), %al
testb $0x1, %al
jne 0x6b4d1
jmp 0x6b5d8
movq 0xa8(%rsp), %rax
movq 0xc0(%rax), %rcx
movq 0x188(%rsp), %rax
movzwl (%rax), %edx
movl %edx, %esi
movq (%rcx,%rsi,8), %rsi
movq 0x58(%rax), %rcx
leaq 0x148(%rsp), %rdi
callq 0x644c0
jmp 0x6b504
movq 0x160(%rsp), %rax
movq %rax, 0x140(%rsp)
movq 0x158(%rsp), %rax
movq %rax, 0x138(%rsp)
movq 0x188(%rsp), %rax
movq 0xa0(%rax), %rax
cmpq 0x140(%rsp), %rax
jbe 0x6b586
movq 0x188(%rsp), %rax
movq 0xa0(%rax), %rax
movq %rax, 0x140(%rsp)
movq 0x188(%rsp), %rax
movq 0x80(%rax), %rax
movq %rax, 0x138(%rsp)
jmp 0x6b586
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x180(%rsp)
movl %eax, 0x17c(%rsp)
jmp 0x6bbfd
movq 0xa8(%rsp), %rax
movq 0xc0(%rax), %rcx
movq 0x188(%rsp), %rax
movzwl (%rax), %esi
movl %esi, %edx
movq (%rcx,%rdx,8), %rdi
movq 0x138(%rsp), %rcx
movq 0x140(%rsp), %r8
movq 0x58(%rax), %rdx
movq 0x98(%rax), %r9
movq 0x148(%rsp), %rax
orq %rax, %r9
callq 0x64e60
jmp 0x6b5d3
jmp 0x6b7b8
movq 0xa8(%rsp), %rax
movq 0xc0(%rax), %rax
movq 0x188(%rsp), %rcx
movzwl (%rcx), %ecx
movq (%rax,%rcx,8), %rdi
callq 0x64610
movb %al, 0x9d(%rsp)
jmp 0x6b604
movb 0x9d(%rsp), %al
testb $0x1, %al
jne 0x6b776
jmp 0x6b615
movq 0xa8(%rsp), %rax
movq 0xc0(%rax), %rax
movq 0x188(%rsp), %rcx
movzwl (%rcx), %ecx
movq (%rax,%rcx,8), %rsi
leaq 0x108(%rsp), %rdi
callq 0x64830
jmp 0x6b642
cmpl $0x2, 0x128(%rsp)
jne 0x6b774
movq 0x1c0(%rsp), %rax
movq %rax, 0x88(%rsp)
movl $0xb0, %edi
callq 0x8450
movq %rax, 0x90(%rsp)
jmp 0x6b674
movq 0x188(%rsp), %rax
movw (%rax), %ax
movw %ax, 0x82(%rsp)
movq 0x108(%rsp), %rdi
callq 0x5a170
movl %eax, 0x84(%rsp)
jmp 0x6b69d
movq 0x90(%rsp), %rdi
movw 0x82(%rsp), %ax
movl 0x84(%rsp), %ecx
shll $0x9, %ecx
movq 0x108(%rsp), %r9
movq 0x110(%rsp), %r8
movq 0x118(%rsp), %rsi
movq 0x120(%rsp), %r10
movq %rsp, %rdx
movq %r10, 0x18(%rdx)
movq %r9, 0x10(%rdx)
movq %rsi, 0x8(%rdx)
movl $0x0, (%rdx)
movzwl %ax, %edx
xorl %eax, %eax
movl %eax, %r9d
movl $0x1, %esi
callq 0x963f0
jmp 0x6b700
movq 0x88(%rsp), %rdi
movq 0x90(%rsp), %rax
movq %rax, 0x100(%rsp)
leaq 0x100(%rsp), %rsi
callq 0x6c260
jmp 0x6b727
movq 0x108(%rsp), %rdi
callq 0x5a170
movl %eax, 0x7c(%rsp)
jmp 0x6b73a
movl 0x7c(%rsp), %eax
addl 0x1d4(%rsp), %eax
movl %eax, 0x1d4(%rsp)
jmp 0x6b774
movq 0x90(%rsp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x180(%rsp)
movl %eax, 0x17c(%rsp)
callq 0x8410
jmp 0x6bbfd
jmp 0x6b776
movq 0xa8(%rsp), %rax
movq 0xc0(%rax), %rcx
movq 0x188(%rsp), %rax
movzwl (%rax), %esi
movl %esi, %edx
movq (%rcx,%rdx,8), %rdi
movq 0x58(%rax), %rdx
movq 0x80(%rax), %rcx
movq 0xa0(%rax), %r8
movq 0x98(%rax), %r9
callq 0x64c00
jmp 0x6b7b6
jmp 0x6b7b8
movq 0x188(%rsp), %rax
movq 0x98(%rax), %rdi
callq 0x5a170
movl %eax, 0x78(%rsp)
jmp 0x6b7d2
movq 0xa8(%rsp), %rax
movl 0x78(%rsp), %edx
movl 0x1cc(%rsp), %ecx
addl %edx, %ecx
movl %ecx, 0x1cc(%rsp)
movq 0xf8(%rax), %rdi
movq 0x188(%rsp), %rsi
movzwl (%rsi), %eax
leaq (%rax,%rax,2), %rax
shll $0x4, %eax
addq %rax, %rdi
addq $0x58, %rsi
callq 0x5e3d0
movq %rax, 0x70(%rsp)
jmp 0x6b81a
movq 0xa8(%rsp), %rax
movq 0x70(%rsp), %rcx
movq %rcx, 0xf8(%rsp)
movq 0xf8(%rax), %rdi
movq 0x188(%rsp), %rax
movzwl (%rax), %eax
imulq $0x30, %rax, %rax
addq %rax, %rdi
callq 0x5e430
movq %rax, 0xf0(%rsp)
leaq 0xf8(%rsp), %rdi
leaq 0xf0(%rsp), %rsi
callq 0x5ecc0
testb $0x1, %al
jne 0x6b873
jmp 0x6b94e
movq 0xa8(%rsp), %rax
movq 0xc0(%rax), %rcx
movq 0x188(%rsp), %rax
movzwl (%rax), %esi
movl %esi, %edx
movq (%rcx,%rdx,8), %rdi
movq 0x58(%rax), %rdx
callq 0x64900
jmp 0x6b89e
movq 0x188(%rsp), %rax
movq 0x98(%rax), %rdi
callq 0x5a170
movl %eax, 0x6c(%rsp)
jmp 0x6b8b8
movq 0xa8(%rsp), %rax
movl 0x6c(%rsp), %edx
movl 0x1d0(%rsp), %ecx
addl %edx, %ecx
movl %ecx, 0x1d0(%rsp)
movq 0xf8(%rax), %rdi
movq 0x1d8(%rsp), %rax
movzwl 0x68(%rax), %eax
leaq (%rax,%rax,2), %rax
shll $0x4, %eax
addq %rax, %rdi
movq 0x188(%rsp), %rsi
addq $0x58, %rsi
callq 0x3b360
movb %dl, 0x5f(%rsp)
movq %rax, 0x60(%rsp)
jmp 0x6b90d
movb 0x5f(%rsp), %al
movq 0x60(%rsp), %rcx
movq %rcx, 0xe0(%rsp)
movb %al, 0xe8(%rsp)
movq 0x188(%rsp), %rax
movq %rax, 0xd8(%rsp)
leaq 0x1a8(%rsp), %rdi
leaq 0xd8(%rsp), %rsi
callq 0x6c260
jmp 0x6b94c
jmp 0x6b94e
movq 0x1d8(%rsp), %rax
addq $0x40, %rax
movq %rax, 0x50(%rsp)
leaq 0x1a0(%rsp), %rdi
xorl %esi, %esi
callq 0x6c1c0
movq %rax, 0xc8(%rsp)
leaq 0xd0(%rsp), %rdi
leaq 0xc8(%rsp), %rsi
callq 0x6c1f0
movq 0x50(%rsp), %rdi
movq 0xd0(%rsp), %rsi
callq 0x6c170
movq %rax, 0xc0(%rsp)
jmp 0x6b3ec
movq 0xa8(%rsp), %rax
movl 0x1cc(%rsp), %edx
movq 0x1d8(%rsp), %rcx
addl 0x58(%rcx), %edx
movl %edx, 0x58(%rcx)
movl 0x1d4(%rsp), %edx
addl 0x1d0(%rsp), %edx
movq 0xf0(%rax), %rax
movslq 0x19c(%rsp), %rcx
addl (%rax,%rcx,4), %edx
movl %edx, (%rax,%rcx,4)
movq 0x1c0(%rsp), %rdi
callq 0x59910
cmpq $0x0, %rax
jbe 0x6ba87
movl $0x18, %edi
callq 0x8450
movq %rax, 0x48(%rsp)
jmp 0x6ba12
movq 0xa8(%rsp), %rdi
movq 0x48(%rsp), %rax
movq %rax, 0xb8(%rsp)
movl 0x1d4(%rsp), %ecx
shll $0x9, %ecx
movq 0xb8(%rsp), %rax
movl %ecx, (%rax)
movq 0x1c0(%rsp), %rcx
movq 0xb8(%rsp), %rax
movq %rcx, 0x8(%rax)
movq 0xb8(%rsp), %rax
movl $0x0, 0x10(%rax)
movq 0x1d8(%rsp), %rax
movw 0x68(%rax), %cx
movq 0xb8(%rsp), %rax
movw %cx, 0x14(%rax)
movq 0xb8(%rsp), %rsi
callq 0x6b220
jmp 0x6ba85
jmp 0x6ba87
cmpl $0x0, 0x1cc(%rsp)
je 0x6bb1b
movl $0x18, %edi
callq 0x8450
movq %rax, 0x40(%rsp)
jmp 0x6baa6
movq 0xa8(%rsp), %rdi
movq 0x40(%rsp), %rax
movq %rax, 0xb0(%rsp)
movl 0x1cc(%rsp), %ecx
shll $0x9, %ecx
movq 0xb0(%rsp), %rax
movl %ecx, (%rax)
movq 0x1d8(%rsp), %rcx
movq 0xb0(%rsp), %rax
movq %rcx, 0x8(%rax)
movq 0xb0(%rsp), %rax
movl $0x3, 0x10(%rax)
movq 0x1d8(%rsp), %rax
movw 0x68(%rax), %cx
movq 0xb0(%rsp), %rax
movw %cx, 0x14(%rax)
movq 0xb0(%rsp), %rsi
callq 0x6b220
jmp 0x6bb19
jmp 0x6bb1b
leaq 0x1a8(%rsp), %rdi
callq 0x59910
cmpq $0x0, %rax
jbe 0x6bb53
movq 0xa8(%rsp), %rax
movq 0x38(%rax), %rax
movq 0x38(%rax), %rdi
movq (%rdi), %rax
movq 0x60(%rax), %rax
leaq 0x1a8(%rsp), %rsi
callq *%rax
jmp 0x6bb51
jmp 0x6bb53
callq 0x46500
movq %rax, 0x38(%rsp)
jmp 0x6bb5f
movq 0x38(%rsp), %rdi
callq 0x46c50
movq %rax, 0x30(%rsp)
jmp 0x6bb70
movq 0x30(%rsp), %rax
movq 0xa8(%rsp), %rcx
cmpq 0x108(%rcx), %rax
jbe 0x6bbe8
movq 0xa8(%rsp), %rax
movq 0xf8(%rax), %rdi
movq 0x1d8(%rsp), %rax
movzwl 0x68(%rax), %eax
leaq (%rax,%rax,2), %rax
shll $0x4, %eax
addq %rax, %rdi
callq 0x6c2a0
callq 0x46500
movq %rax, 0x28(%rsp)
jmp 0x6bbbc
movq 0x28(%rsp), %rdi
callq 0x46c50
movq %rax, 0x20(%rsp)
jmp 0x6bbcd
movq 0xa8(%rsp), %rax
movq 0x20(%rsp), %rcx
addq 0x100(%rax), %rcx
movq %rcx, 0x108(%rax)
leaq 0x1a8(%rsp), %rdi
callq 0x6c2b0
addq $0x1e8, %rsp            # imm = 0x1E8
retq
leaq 0x1a8(%rsp), %rdi
callq 0x6c2b0
movq 0x180(%rsp), %rdi
callq 0x8770
nopw (%rax,%rax)