// File: /workspace/github_cpp_makefile_star2_O1/bloody76[P]Chip8-Disassembler/src/disassembler.cc
// Function: pretty_print()
void pretty_print()
{
    for (int i = 0; i < size; i += 2)
    {
        auto it = functions.find(i + 0x200);
        if (it != functions.end())
        {
            std::cout << "\t";
            if (it->first == 0x200)
                std::cout << "start";
            else
            {
                if (it->second == Type::SUB)
                    std::cout << "sub_";
                else
                    std::cout << "adr_";
                std::cout << it->first;
            }
            std::cout  << ":" << std::endl;
        }
        uint16 op = (mem[i] << 8) | mem[i + 1];
        {
            std::cout << "0x" << std::hex << op << std::dec << "|\t\t";
            switch ((op & 0xF000) >> 12)
            {
                case 0:
                    if ((op & 0x0FFF) == 0xE0)
                        std::cout << "CLS";
                    else if ((op & 0x0FFF) == 0xEE)
                        std::cout << "RET";
                    else
                        std::cout << "GOTO adr:" << (op & 0x0FFF);
                    break;
                case 1:
                    std::cout << "JP " << (op & 0x0FFF);
                    break;
                case 2:
                    std::cout << "CALL sub_" << (op & 0x0FFF);
                    break;
                case 3:
                    std::cout << "SE V" << ((op & 0x0F00) >> 8) << ", " << (op & 0x00FF);
                    break;
                case 4:
                    std::cout << "SNE V" << ((op & 0x0F00) >> 8) << ", " << (op & 0x00FF);
                    break;
                case 5:
                    std::cout << "SE V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                    break;
                case 6:
                    std::cout << "LD V" << ((op & 0x0F00) >> 8) << ", " << (op & 0x00FF);
                    break;
                case 7:
                    std::cout << "ADD V" << ((op & 0x0F00) >> 8) << ", " << (op & 0x00FF);
                    break;
                case 8:
                    switch (op & 0x000F)
                    {
                        case 0:
                            std::cout << "LD V" << ((op & 0x00F0) >> 4) << ", V" << ((op & 0x0F00) >> 8);
                            break;
                        case 1:
                            std::cout << "OR V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                            break;
                        case 2:
                            std::cout << "AND V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                            break;
                        case 3:
                            std::cout << "XOR V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                            break;
                        case 4:
                            std::cout << "ADD V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                            break;
                        case 5:
                            std::cout << "SUB V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                            break;
                        case 6:
                            std::cout << "SHR V" << ((op & 0x0F00) >> 8);
                            break;
                        case 7:
                            std::cout << "SUBN V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                            break;
                        case 0xE:
                            std::cout << "SHL V" << ((op & 0x0F00) >> 8);
                            break;
                    }
                    break;
                case 9:
                    std::cout << "SNE V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4);
                    break;
                case 0xA:
                    std::cout << "LD I, " << (op & 0x0FFF);
                    break;
                case 0xB:
                    std::cout << "JP V0, " << (op & 0x0FFF);
                    break;
                case 0xC:
                    std::cout << "RND V" << ((op & 0x0F00) >> 8) << ", " << (op & 0x00FF);
                    break;
                case 0xD:
                    std::cout << "DRW V" << ((op & 0x0F00) >> 8) << ", V" << ((op & 0x00F0) >> 4) << ", " << (op & 0x00FF);
                    break;
                case 0xE:
                    switch (op & 0x00FF)
                    {
                        case 0x9E:
                            std::cout << "SKP V" << ((op & 0x0F00) >> 8);
                            break;
                        case 0xA1:
                            std::cout << "SKNP V" << ((op & 0x0F00) >> 8);
                            break;
                    }
                    break;
                case 0xF:
                    switch (op & 0x00FF)
                    {
                        case 0x07:
                            std::cout << "LD V" << ((op & 0x0F00) >> 8) << ", DT";
                            break;
                        case 0x0A:
                            std::cout << "LD V" << ((op & 0x0F00) >> 8) << ", K";
                            break;
                        case 0x15:
                            std::cout << "LD DT, V" << ((op & 0x0F00) >> 8);
                            break;
                        case 0x18:
                            std::cout << "LD ST, V" << ((op & 0x0F00) >> 8);
                            break;
                        case 0x1E:
                            std::cout << "ADD I, V" << ((op & 0x0F00) >> 8);
                            break;
                        case 0x29:
                            std::cout << "LD F, V" << ((op & 0x0F00) >> 8);
                            break;
                        case 0x33:
                            std::cout << "LD B, V" << ((op & 0x0F00) >> 8);
                            break;
                        case 0x55:
                            std::cout << "LD [I], V" << ((op & 0x0F00) >> 8);
                            break;
                        case 0x65:
                            std::cout << "LD V" << ((op & 0x0F00) >> 8) << ", [i]";
                            break;
                    }
                    break;
                default:
                    std::cout << op;
                    break;
            }
            std::cout << std::endl;
        }
    }
}

// Assembly:
cmpq $0x0, 0x3c77(%rip)      # 0x6188
jle 0x2beb
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
xorl %ebp, %ebp
leaq 0x3c2d(%rip), %r14      # 0x6158
movq 0x3a9e(%rip), %rbx      # 0x5fd0
leaq 0x1acb(%rip), %r15      # 0x4004
leal 0x200(%rbp), %eax
movq 0x3c1a(%rip), %rdx      # 0x6160
movq %r14, %rcx
testq %rdx, %rdx
je 0x2569
movq %r14, %rcx
xorl %esi, %esi
cmpw %ax, 0x20(%rdx)
setb %sil
cmovaeq %rdx, %rcx
movq 0x10(%rdx,%rsi,8), %rdx
testq %rdx, %rdx
jne 0x2551
movq %r14, %r12
cmpq %r14, %rcx
je 0x257c
cmpw 0x20(%rcx), %ax
cmovbq %r14, %rcx
movq %rcx, %r12
cmpq %r14, %r12
je 0x2627
movl $0x1, %edx
movq %rbx, %rdi
leaq 0x1b15(%rip), %rsi      # 0x40a9
callq 0x2180
cmpw $0x200, 0x20(%r12)      # imm = 0x200
jne 0x25b9
movl $0x5, %edx
movq %rbx, %rdi
leaq 0x1ae7(%rip), %rsi      # 0x4099
callq 0x2180
jmp 0x25ec
cmpl $0x0, 0x24(%r12)
leaq 0x1ad9(%rip), %rsi      # 0x409f
leaq 0x1af9(%rip), %rax      # 0x40c6
cmoveq %rax, %rsi
movl $0x4, %edx
movq %rbx, %rdi
callq 0x2180
movzwl 0x20(%r12), %esi
movq %rbx, %rdi
callq 0x20d0
movl $0x1, %edx
movq %rbx, %rdi
leaq 0x1ac0(%rip), %rsi      # 0x40bb
callq 0x2180
movq (%rbx), %rax
movq -0x18(%rax), %rdi
addq %rbx, %rdi
movl $0xa, %esi
callq 0x2130
movsbl %al, %esi
movq %rbx, %rdi
callq 0x2040
movq %rax, %rdi
callq 0x20e0
movq 0x3b52(%rip), %rax      # 0x6180
movzbl (%rax,%rbp), %r12d
shll $0x8, %r12d
movzbl 0x1(%rax,%rbp), %r13d
orq %r13, %r12
movl $0x2, %edx
movq %rbx, %rdi
leaq 0x1a55(%rip), %rsi      # 0x40a4
callq 0x2180
movq (%rbx), %rax
movq -0x18(%rax), %rax
movl 0x18(%rbx,%rax), %ecx
andl $-0x4b, %ecx
orl $0x8, %ecx
movl %ecx, 0x18(%rbx,%rax)
movq %rbx, %rdi
movq %r12, %rsi
callq 0x20d0
movq (%rax), %rcx
movq -0x18(%rcx), %rcx
movl 0x18(%rax,%rcx), %edx
andl $-0x4b, %edx
orl $0x2, %edx
movl %edx, 0x18(%rax,%rcx)
movl $0x3, %edx
movq %rax, %rdi
leaq 0x1a0f(%rip), %rsi      # 0x40a7
callq 0x2180
movl %r12d, %eax
shrl $0xc, %eax
movslq (%r15,%rax,4), %rax
addq %r15, %rax
jmpq *%rax
andl $0xfff, %r12d           # imm = 0xFFF
cmpl $0xee, %r12d
je 0x29eb
cmpl $0xe0, %r12d
jne 0x29ff
movl $0x3, %edx
movq %rbx, %rdi
leaq 0x19cf(%rip), %rsi      # 0x40ab
jmp 0x2ab2
cmpl $0xa1, %r13d
je 0x29d7
cmpl $0x9e, %r13d
jne 0x2ba5
movl $0x5, %edx
movq %rbx, %rdi
leaq 0x1a17(%rip), %rsi      # 0x4121
jmp 0x2b8d
movl $0x7, %edx
movq %rbx, %rdi
leaq 0x19ef(%rip), %rsi      # 0x410d
jmp 0x2909
movl $0x5, %edx
movq %rbx, %rdi
leaq 0x199e(%rip), %rsi      # 0x40d0
jmp 0x28c1
movl $0x5, %edx
movq %rbx, %rdi
leaq 0x19cf(%rip), %rsi      # 0x4115
jmp 0x28c1
movl $0x5, %edx
movq %rbx, %rdi
leaq 0x1976(%rip), %rsi      # 0x40d0
jmp 0x282b
movl $0x9, %edx
movq %rbx, %rdi
leaq 0x1953(%rip), %rsi      # 0x40c1
jmp 0x2909
cmpl $0x1d, %r13d
jle 0x297e
cmpl $0x32, %r13d
jle 0x2a40
cmpl $0x33, %r13d
je 0x2ae4
cmpl $0x55, %r13d
je 0x2b45
cmpl $0x65, %r13d
jne 0x2ba5
movl $0x4, %edx
movq %rbx, %rdi
leaq 0x1922(%rip), %rsi      # 0x40d6
callq 0x2180
shrl $0x8, %r12d
andl $0xf, %r12d
movq %rbx, %rdi
movl %r12d, %esi
callq 0x2210
movl $0x5, %edx
movq %rax, %rdi
leaq 0x1991(%rip), %rsi      # 0x416c
jmp 0x2ab2
movl $0x4, %edx
movq %rbx, %rdi
leaq 0x18dc(%rip), %rsi      # 0x40cb
jmp 0x28c1
movl $0x5, %edx
movq %rbx, %rdi
leaq 0x18d8(%rip), %rsi      # 0x40db
jmp 0x28c1
movl $0x3, %edx
movq %rbx, %rdi
leaq 0x18a6(%rip), %rsi      # 0x40bd
jmp 0x2909
movl $0x4, %edx
movq %rbx, %rdi
leaq 0x18a0(%rip), %rsi      # 0x40cb
callq 0x2180
movl %r12d, %esi
shrl $0x8, %esi
andl $0xf, %esi
movq %rbx, %rdi
callq 0x2210
movq %rax, %r13
movl $0x3, %edx
movq %rax, %rdi
leaq 0x190b(%rip), %rsi      # 0x415e
callq 0x2180
shrl $0x4, %r12d
andl $0xf, %r12d
movq %r13, %rdi
jmp 0x2b9d
movl $0x5, %edx
movq %rbx, %rdi
leaq 0x18a4(%rip), %rsi      # 0x411b
callq 0x2180
movl %r12d, %esi
shrl $0x8, %esi
andl $0xf, %esi
movq %rbx, %rdi
callq 0x2210
movq %rax, %r13
movl $0x3, %edx
movq %rax, %rdi
leaq 0x18bf(%rip), %rsi      # 0x415e
callq 0x2180
movl %r12d, %esi
shrl $0x4, %esi
andl $0xf, %esi
movq %r13, %rdi
jmp 0x28d2
movl $0x4, %edx
movq %rbx, %rdi
leaq 0x1815(%rip), %rsi      # 0x40d6
callq 0x2180
movl %r12d, %esi
shrl $0x8, %esi
andl $0xf, %esi
movq %rbx, %rdi
callq 0x2210
movq %rax, %r13
movl $0x2, %edx
movq %rax, %rdi
leaq 0x1829(%rip), %rsi      # 0x4112
callq 0x2180
movzbl %r12b, %esi
movq %r13, %rdi
jmp 0x2ba0
movl $0x6, %edx
movq %rbx, %rdi
leaq 0x17fd(%rip), %rsi      # 0x4106
callq 0x2180
andl $0xfff, %r12d           # imm = 0xFFF
jmp 0x2b9a
movl %r12d, %eax
andl $0xf, %eax
cmpl $0xe, %eax
ja 0x2ba5
leaq 0x1714(%rip), %rcx      # 0x4044
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl $0x4, %edx
movq %rbx, %rdi
leaq 0x178e(%rip), %rsi      # 0x40d6
callq 0x2180
movl %r12d, %esi
shrl $0x4, %esi
andl $0xf, %esi
movq %rbx, %rdi
callq 0x2210
movq %rax, %r13
movl $0x3, %edx
movq %rax, %rdi
leaq 0x17ee(%rip), %rsi      # 0x415e
callq 0x2180
shrl $0x8, %r12d
jmp 0x285c
cmpl $0x14, %r13d
jg 0x2a18
cmpl $0x7, %r13d
je 0x2a7c
cmpl $0xa, %r13d
jne 0x2ba5
movl $0x4, %edx
movq %rbx, %rdi
leaq 0x172b(%rip), %rsi      # 0x40d6
callq 0x2180
shrl $0x8, %r12d
andl $0xf, %r12d
movq %rbx, %rdi
movl %r12d, %esi
callq 0x2210
movl $0x3, %edx
movq %rax, %rdi
leaq 0x1761(%rip), %rsi      # 0x4133
jmp 0x2ab2
movl $0x6, %edx
movq %rbx, %rdi
leaq 0x1741(%rip), %rsi      # 0x4127
jmp 0x2b8d
movl $0x3, %edx
movq %rbx, %rdi
leaq 0x16b5(%rip), %rsi      # 0x40af
jmp 0x2ab2
movl $0x9, %edx
movq %rbx, %rdi
leaq 0x16a5(%rip), %rsi      # 0x40b3
callq 0x2180
jmp 0x2b9a
cmpl $0x15, %r13d
je 0x2abc
cmpl $0x18, %r13d
jne 0x2ba5
movl $0x8, %edx
movq %rbx, %rdi
leaq 0x1705(%rip), %rsi      # 0x4140
jmp 0x2b8d
cmpl $0x1e, %r13d
je 0x2af8
cmpl $0x29, %r13d
jne 0x2ba5
movl $0x7, %edx
movq %rbx, %rdi
leaq 0x16ef(%rip), %rsi      # 0x4152
jmp 0x2b8d
movl $0x5, %edx
movq %rbx, %rdi
leaq 0x166a(%rip), %rsi      # 0x40e1
jmp 0x282b
movl $0x4, %edx
movq %rbx, %rdi
leaq 0x164b(%rip), %rsi      # 0x40d6
callq 0x2180
shrl $0x8, %r12d
andl $0xf, %r12d
movq %rbx, %rdi
movl %r12d, %esi
callq 0x2210
movl $0x4, %edx
movq %rax, %rdi
leaq 0x167c(%rip), %rsi      # 0x412e
callq 0x2180
jmp 0x2ba5
movl $0x8, %edx
movq %rbx, %rdi
leaq 0x166c(%rip), %rsi      # 0x4137
jmp 0x2b8d
movl $0x5, %edx
movq %rbx, %rdi
leaq 0x160e(%rip), %rsi      # 0x40ed
jmp 0x282b
movl $0x7, %edx
movq %rbx, %rdi
leaq 0x1667(%rip), %rsi      # 0x415a
jmp 0x2b8d
movl $0x8, %edx
movq %rbx, %rdi
leaq 0x1642(%rip), %rsi      # 0x4149
jmp 0x2b8d
movl $0x4, %edx
movq %rbx, %rdi
leaq 0x15cd(%rip), %rsi      # 0x40e8
jmp 0x282b
movl $0x5, %edx
movq %rbx, %rdi
leaq 0x15c4(%rip), %rsi      # 0x40f3
jmp 0x2b8d
movl $0x6, %edx
movq %rbx, %rdi
leaq 0x15b9(%rip), %rsi      # 0x40f9
jmp 0x282b
movl $0x9, %edx
movq %rbx, %rdi
leaq 0x160e(%rip), %rsi      # 0x4162
jmp 0x2b8d
movl $0x5, %edx
movq %rbx, %rdi
leaq 0x1582(%rip), %rsi      # 0x40e7
jmp 0x282b
movl $0x5, %edx
movq %rbx, %rdi
leaq 0x1562(%rip), %rsi      # 0x40db
jmp 0x282b
movl $0x5, %edx
movq %rbx, %rdi
leaq 0x1573(%rip), %rsi      # 0x4100
callq 0x2180
shrl $0x8, %r12d
andl $0xf, %r12d
movq %rbx, %rdi
movl %r12d, %esi
callq 0x2210
movq (%rbx), %rax
movq -0x18(%rax), %rdi
addq %rbx, %rdi
movl $0xa, %esi
callq 0x2130
movsbl %al, %esi
movq %rbx, %rdi
callq 0x2040
movq %rax, %rdi
callq 0x20e0
addq $0x2, %rbp
cmpq %rbp, 0x35b1(%rip)      # 0x6188
jg 0x2539
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq