// File: /workspace/github_cpp_makefile_star2_O1/gvaumour[P]cache-simulator/src/SimplePerceptron.cc
// Function: SimplePerceptronPredictor::insertionPolicy(unsigned long, unsigned long, bool, Access)
void
SimplePerceptronPredictor::insertionPolicy(uint64_t set, uint64_t index, bool inNVM, Access element)
{
	CacheEntry* entry = inNVM ? m_tableNVM[set][index] : m_tableSRAM[set][index];
	entry->missPC = element.m_pc;
		
	if(isHitInBPtags(element.block_addr , set))
	{
		entry->missPC = getMissPCfromBPtags(element.block_addr , set);
		correctBPerror(entry , element , set );
			/*
		debug_file_simple_perceptron << "Insertion + detected SRAM error on line 0x" << std::hex << element.block_addr \
			 << " , Retified MissPC from 0x" << element.m_pc << " to " << entry->missPC << endl;
		*/
	}

	entry->policyInfo = m_cpt++;

	if(entry->isLearning)
	{		
		updateCostModel(entry, entry->address , set , element.isWrite());		

		if(simu_parameters.simple_perceptron_fastLearning)
			doLearning(entry);

		setPrediction(entry , element);	
	}	
	reportAccess( element, entry , set , inNVM, string("INSERTION") );
	
//	stats_access_class[rd][element.isWrite()]++;
	Predictor::insertionPolicy(set , index , inNVM , element);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
movl %ecx, %ebp
movq %rsi, %r14
movq %rdi, %r15
leaq 0xa0(%rsp), %rbx
movl %ecx, %eax
movq 0x8(%rdi,%rax,8), %rax
movq (%rax), %rax
leaq (%rsi,%rsi,2), %rcx
movq (%rax,%rcx,8), %rax
movq %rdx, 0x40(%rsp)
movq (%rax,%rdx,8), %r12
movq 0x10(%rbx), %rax
movq %rax, 0x20(%r12)
movq 0x30(%rbx), %r13
movq %r13, %rsi
movl %r14d, %edx
callq 0x278f6
testb %al, %al
je 0x2b4ce
movq %r15, %rdi
movq %r13, %rsi
movl %r14d, %edx
callq 0x27942
movq %rax, 0x20(%r12)
movq 0x30(%rbx), %rax
movq %rax, 0x30(%rsp)
movups (%rbx), %xmm0
movups 0x10(%rbx), %xmm1
movups 0x20(%rbx), %xmm2
movups %xmm2, 0x20(%rsp)
movups %xmm1, 0x10(%rsp)
movups %xmm0, (%rsp)
movq %r15, %rdi
movq %r12, %rsi
movl %r14d, %edx
callq 0x2b634
movq 0x2c0(%r15), %rax
leaq 0x1(%rax), %rcx
movq %rcx, 0x2c0(%r15)
movl %eax, 0x38(%r12)
cmpb $0x1, 0x148(%r12)
jne 0x2b560
movq 0x8(%r12), %rdx
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
sete %cl
cmpl $0x6, %eax
sete %al
orb %cl, %al
movzbl %al, %r8d
movq %r15, %rdi
movq %r12, %rsi
movl %r14d, %ecx
callq 0x2b782
leaq 0x1aa31(%rip), %rax     # 0x45f50
cmpb $0x1, 0x24c(%rax)
jne 0x2b533
movq %r15, %rdi
movq %r12, %rsi
callq 0x2b83e
movq 0x30(%rbx), %rax
movq %rax, 0x30(%rsp)
movups (%rbx), %xmm0
movups 0x10(%rbx), %xmm1
movups 0x20(%rbx), %xmm2
movups %xmm2, 0x20(%rsp)
movups %xmm1, 0x10(%rsp)
movups %xmm0, (%rsp)
movq %r15, %rdi
movq %r12, %rsi
callq 0x2b954
leaq 0x58(%rsp), %rax
movq %rax, -0x10(%rax)
leaq 0x8bcb(%rip), %rsi      # 0x3413b
leaq 0x8bcd(%rip), %rdx      # 0x34144
leaq 0x48(%rsp), %r13
movq %r13, %rdi
callq 0xccac
movq 0x30(%rbx), %rax
movq %rax, 0x30(%rsp)
movups (%rbx), %xmm0
movups 0x10(%rbx), %xmm1
movups 0x20(%rbx), %xmm2
movups %xmm2, 0x20(%rsp)
movups %xmm1, 0x10(%rsp)
movups %xmm0, (%rsp)
movzbl %bpl, %ebp
movq %r15, %rdi
movq %r12, %rsi
movl %r14d, %edx
movl %ebp, %ecx
movq %r13, %r8
callq 0x2bb2a
movq 0x48(%rsp), %rdi
leaq 0x58(%rsp), %rax
cmpq %rax, %rdi
je 0x2b5d1
callq 0x52a0
movq 0x30(%rbx), %rax
movq %rax, 0x30(%rsp)
movups (%rbx), %xmm0
movups 0x10(%rbx), %xmm1
movups 0x20(%rbx), %xmm2
movups %xmm2, 0x20(%rsp)
movups %xmm1, 0x10(%rsp)
movups %xmm0, (%rsp)
movq %r15, %rdi
movq %r14, %rsi
movq 0x40(%rsp), %rdx
movl %ebp, %ecx
callq 0x26892
addq $0x68, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
movq 0x48(%rsp), %rdi
leaq 0x58(%rsp), %rax
cmpq %rax, %rdi
je 0x2b62b
callq 0x52a0
movq %rbx, %rdi
callq 0x55a0
nop