// File: /workspace/github_cpp_makefile_star2_O3/NishadSaraf[P]Championship-Simulator/src/cache.cc
// Function: CACHE::handle_read()
void CACHE::handle_read()
{
    // handle read
    uint32_t read_cpu = RQ.entry[RQ.head].cpu;
    if (read_cpu == NUM_CPUS)
        return;

    for (uint32_t i=0; i<MAX_READ; i++) {

        // handle the oldest entry
        if ((RQ.entry[RQ.head].event_cycle <= current_core_cycle[read_cpu]) && (RQ.occupancy > 0)) {
            int index = RQ.head;

            // access cache
            uint32_t set = get_set(RQ.entry[index].address);
            int way = check_hit(&RQ.entry[index]);
            
            if (way >= 0) { // read hit

                if (cache_type == IS_ITLB) {
                    RQ.entry[index].instruction_pa = block[set][way].data;
                    if (PROCESSED.occupancy < PROCESSED.SIZE)
                        PROCESSED.add_queue(&RQ.entry[index]);
                }
                else if (cache_type == IS_DTLB) {
                    RQ.entry[index].data_pa = block[set][way].data;
                    if (PROCESSED.occupancy < PROCESSED.SIZE)
                        PROCESSED.add_queue(&RQ.entry[index]);
                }
                else if (cache_type == IS_STLB) 
                    RQ.entry[index].data = block[set][way].data;
                else if (cache_type == IS_L1I) {
                    if (PROCESSED.occupancy < PROCESSED.SIZE)
                        PROCESSED.add_queue(&RQ.entry[index]);
                }
                //else if (cache_type == IS_L1D) {
                else if ((cache_type == IS_L1D) && (RQ.entry[index].type != PREFETCH)) {
                    if (PROCESSED.occupancy < PROCESSED.SIZE)
                        PROCESSED.add_queue(&RQ.entry[index]);
                }

                // update prefetcher on load instruction
                if (RQ.entry[index].type == LOAD) {
                    if (cache_type == IS_L1D) 
                        l1d_prefetcher_operate(block[set][way].full_addr, RQ.entry[index].ip, 1, RQ.entry[index].type);
                    else if (cache_type == IS_L2C)
                        l2c_prefetcher_operate(block[set][way].full_addr, RQ.entry[index].ip, 1, RQ.entry[index].type);
                }

                // update replacement policy
                if (cache_type == IS_LLC) {
                    llc_update_replacement_state(read_cpu, set, way, block[set][way].full_addr, RQ.entry[index].ip, 0, RQ.entry[index].type, 1);

                }
                else
                    update_replacement_state(read_cpu, set, way, block[set][way].full_addr, RQ.entry[index].ip, 0, RQ.entry[index].type, 1);

                // COLLECT STATS
                sim_hit[read_cpu][RQ.entry[index].type]++;
                sim_access[read_cpu][RQ.entry[index].type]++;

                // check fill level
                if (RQ.entry[index].fill_level < fill_level) {

                    if (RQ.entry[index].instruction) 
                        upper_level_icache[read_cpu]->return_data(&RQ.entry[index]);
                    else // data
                        upper_level_dcache[read_cpu]->return_data(&RQ.entry[index]);
                }

                // update prefetch stats and reset prefetch bit
                if (block[set][way].prefetch) {
                    STATS.pf_useful++;
                    block[set][way].prefetch = 0;
                }
                block[set][way].used = 1;

                HIT[RQ.entry[index].type]++;
                ACCESS[RQ.entry[index].type]++;
                
                // remove this entry from RQ
                RQ.remove_queue(&RQ.entry[index]);
            }
            else { // read miss

                DP ( if (warmup_complete[read_cpu]) {
                cout << "[" << NAME << "] " << __func__ << " read miss";
                cout << " instr_id: " << RQ.entry[index].instr_id << " address: " << hex << RQ.entry[index].address;
                cout << " full_addr: " << RQ.entry[index].full_addr << dec;
                cout << " cycle: " << RQ.entry[index].event_cycle << endl; });

                // check mshr
                uint8_t miss_handled = 1;
                int mshr_index = check_mshr(&RQ.entry[index]);

                if ((mshr_index == -1) && (MSHR.occupancy < MSHR_SIZE)) { // this is a new miss

                    // add it to mshr (read miss)
                    add_mshr(&RQ.entry[index]);

                    // add it to the next level's read queue
                    if (lower_level)
                        lower_level->add_rq(&RQ.entry[index]);
                    else { // this is the last level
                        if (cache_type == IS_STLB) {
                            // TODO: need to differentiate page table walk and actual swap

                            // emulate page table walk
                            uint64_t pa = va_to_pa(read_cpu, RQ.entry[index].instr_id, RQ.entry[index].full_addr, RQ.entry[index].address);

                            RQ.entry[index].data = pa >> PAGE_SHIFT; 
                            RQ.entry[index].event_cycle = current_core_cycle[read_cpu];
                            return_data(&RQ.entry[index]);
                        }
                    }
                }
                else {
                    if ((mshr_index == -1) && (MSHR.occupancy == MSHR_SIZE)) { // not enough MSHR resource
                        
                        // cannot handle miss request until one of MSHRs is available
                        miss_handled = 0;
                        STALL[RQ.entry[index].type]++;
                    }
                    else if (mshr_index != -1) { // already in-flight miss

                        // mark merged consumer
                        if (RQ.entry[index].type == RFO) {

                            if (RQ.entry[index].tlb_access) {
                                uint32_t sq_index = RQ.entry[index].sq_index;
                                MSHR.entry[mshr_index].store_merged = 1;
                                MSHR.entry[mshr_index].sq_index_depend_on_me[sq_index] = 1;
                                for (uint32_t i=0; i<SQ_SIZE; i++) {
                                    if (RQ.entry[index].sq_index_depend_on_me[i])
                                        MSHR.entry[mshr_index].sq_index_depend_on_me[i] = 1;
                                    else
                                        continue;
                                }
                            }

                            if (RQ.entry[index].load_merged) {
                                //uint32_t lq_index = RQ.entry[index].lq_index; 
                                MSHR.entry[mshr_index].load_merged = 1;
                                //MSHR.entry[mshr_index].lq_index_depend_on_me[lq_index] = 1;
                                for (uint32_t i=0; i<LQ_SIZE; i++) {
                                    if (RQ.entry[index].lq_index_depend_on_me[i])
                                        MSHR.entry[mshr_index].lq_index_depend_on_me[i] = 1;
                                }
                            }
                        }
                        else {
                            if (RQ.entry[index].instruction) {
                                uint32_t rob_index = RQ.entry[index].rob_index;
                                MSHR.entry[mshr_index].instr_merged = 1;
                                MSHR.entry[mshr_index].rob_index_depend_on_me[rob_index] = 1;

                                DP (if (warmup_complete[MSHR.entry[mshr_index].cpu]) {
                                cout << "[INSTR_MERGED] " << __func__ << " cpu: " << MSHR.entry[mshr_index].cpu << " instr_id: " << MSHR.entry[mshr_index].instr_id;
                                cout << " merged rob_index: " << rob_index << " instr_id: " << RQ.entry[index].instr_id << endl; });

                                if (RQ.entry[index].instr_merged) {
                                    for (uint32_t i=0; i<ROB_SIZE; i++) {
                                        if (RQ.entry[index].rob_index_depend_on_me[i]) {
                                            MSHR.entry[mshr_index].rob_index_depend_on_me[i] = 1;

                                            DP (if (warmup_complete[MSHR.entry[mshr_index].cpu]) {
                                            cout << "[INSTR_MERGED] " << __func__ << " cpu: " << MSHR.entry[mshr_index].cpu << " instr_id: " << MSHR.entry[mshr_index].instr_id;
                                            cout << " merged rob_index: " << i << " instr_id: N/A" << endl; });
                                        }
                                    }
                                }
                            }
                            else 
                            {
                                uint32_t lq_index = RQ.entry[index].lq_index;
                                MSHR.entry[mshr_index].load_merged = 1;
                                MSHR.entry[mshr_index].lq_index_depend_on_me[lq_index] = 1;

                                DP (if (warmup_complete[read_cpu]) {
                                cout << "[DATA_MERGED] " << __func__ << " cpu: " << read_cpu << " instr_id: " << RQ.entry[index].instr_id;
                                cout << " merged rob_index: " << RQ.entry[index].rob_index << " instr_id: " << RQ.entry[index].instr_id << " lq_index: " << RQ.entry[index].lq_index << endl; });

                                for (uint32_t i=0; i<LQ_SIZE; i++) {
                                    if (RQ.entry[index].lq_index_depend_on_me[i]) 
                                        MSHR.entry[mshr_index].lq_index_depend_on_me[i] = 1;
                                }

                                if (RQ.entry[index].store_merged) {
                                    //uint32_t sq_index = RQ.entry[index].sq_index;
                                    MSHR.entry[mshr_index].store_merged = 1;
                                    //MSHR.entry[mshr_index].sq_index_depend_on_me[sq_index] = 1;
                                    for (uint32_t i=0; i<SQ_SIZE; i++) {
                                        if (RQ.entry[index].sq_index_depend_on_me[i])
                                            MSHR.entry[mshr_index].sq_index_depend_on_me[i] = 1;
                                        else
                                            continue;
                                    }
                                }
                            }
                        }

                        // update fill_level
                        if (RQ.entry[index].fill_level < MSHR.entry[mshr_index].fill_level)
                            MSHR.entry[mshr_index].fill_level = RQ.entry[index].fill_level;

                        // update request
                        if (MSHR.entry[mshr_index].type == PREFETCH) {
                            uint8_t  prior_returned = MSHR.entry[mshr_index].returned;
                            uint64_t prior_event_cycle = MSHR.entry[mshr_index].event_cycle;
                            memcpy(&MSHR.entry[mshr_index], &RQ.entry[index], sizeof(PACKET));
                            
                            // in case request is already returned, we should keep event_cycle and retunred variables
                            MSHR.entry[mshr_index].returned = prior_returned;
                            MSHR.entry[mshr_index].event_cycle = prior_event_cycle;
                        }

                        MSHR_MERGED[RQ.entry[index].type]++;

                        DP ( if (warmup_complete[read_cpu]) {
                        cout << "[" << NAME << "] " << __func__ << " mshr merged";
                        cout << " instr_id: " << RQ.entry[index].instr_id << " prior_id: " << MSHR.entry[mshr_index].instr_id; 
                        cout << " address: " << hex << RQ.entry[index].address;
                        cout << " full_addr: " << RQ.entry[index].full_addr << dec;
                        cout << " cycle: " << RQ.entry[index].event_cycle << endl; });
                    }
                    else { // WE SHOULD NOT REACH HERE
                        cerr << "[" << NAME << "] MSHR errors" << endl;
                        assert(0);
                    }
                }

                if (miss_handled) {
                    // update prefetcher on load instruction
                    if (RQ.entry[index].type == LOAD) {
                        if (cache_type == IS_L1D) 
                            l1d_prefetcher_operate(RQ.entry[index].full_addr, RQ.entry[index].ip, 0, RQ.entry[index].type);
                        if (cache_type == IS_L2C)
                            l2c_prefetcher_operate(RQ.entry[index].full_addr, RQ.entry[index].ip, 0, RQ.entry[index].type);
                    }

                    MISS[RQ.entry[index].type]++;
                    ACCESS[RQ.entry[index].type]++;

                    // remove this entry from RQ
                    RQ.remove_queue(&RQ.entry[index]);
                }
            }
        }
    }
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x48, %rsp
movq 0x90e0(%rdi), %rax
movl 0x9074(%rdi), %ecx
imulq $0x380, %rcx, %rcx      # imm = 0x380
movl 0x330(%rax,%rcx), %r13d
cmpq $0x1, %r13
je 0x5448
movq %rdi, %rbx
cmpl $0x0, 0x739c(%rdi)
je 0x5448
leaq 0x9048(%rbx), %rax
movq %rax, 0x20(%rsp)
leaq 0xe628(%rbx), %rax
movq %rax, 0x10(%rsp)
leaq 0x10308(%rbx), %rax
movq %rax, 0x40(%rsp)
leaq 0x102e8(%rbx), %rax
movq %rax, 0x38(%rsp)
leaq 0x8(%rbx,%r13,8), %rax
movq %rax, 0x30(%rsp)
leaq (%rbx,%r13,8), %rax
addq $0x10, %rax
movq %rax, 0x28(%rsp)
xorl %r12d, %r12d
leaq 0x7c263(%rip), %rsi     # 0x80ec0
movq %r13, 0x18(%rsp)
movq 0x90e0(%rbx), %rax
movl 0x9074(%rbx), %ecx
imulq $0x380, %rcx, %rdx      # imm = 0x380
movq 0x378(%rax,%rdx), %rdx
cmpq (%rsi,%r13,8), %rdx
ja 0x5438
cmpl $0x0, 0x907c(%rbx)
je 0x5438
movslq %ecx, %rcx
imulq $0x380, %rcx, %r15      # imm = 0x380
movl 0x340(%rax,%r15), %r14d
movl 0x7370(%rbx), %edi
callq 0x9203
movl $0xffffffff, %ebp       # imm = 0xFFFFFFFF
movl %eax, %ecx
shll %cl, %ebp
movq 0x90e0(%rbx), %rsi
addq %r15, %rsi
movq %rbx, %rdi
callq 0x497a
testl %eax, %eax
js 0x4d37
movl %eax, %r10d
notl %ebp
andl %r14d, %ebp
movzbl 0x73a4(%rbx), %eax
movl %r10d, %r13d
movl %ebp, %edi
cmpq $0x4, %rax
movq %rdi, 0x8(%rsp)
ja 0x4eae
leaq 0xf31d(%rip), %rcx      # 0x14018
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movq 0x7390(%rbx), %rax
movq (%rax,%rdi,8), %rax
leaq (,%r13,4), %rcx
addq %r13, %rcx
shlq $0x4, %rcx
movq 0x30(%rax,%rcx), %rax
movq 0x90e0(%rbx), %rsi
movq %rax, 0x350(%rsi,%r15)
jmp 0x4e88
movq 0x90e0(%rbx), %rdi
leaq (%rdi,%r15), %rsi
movl 0x7388(%rbx), %r8d
testq %r8, %r8
movq 0x18(%rsp), %r13
movabsq $0x100000000, %r14      # imm = 0x100000000
je 0x4da9
movq 0xca20(%rbx), %rdx
movq 0x340(%rsi), %r9
imulq $0x380, %r8, %r10       # imm = 0x380
xorl %ecx, %ecx
xorl %r11d, %r11d
xorl %eax, %eax
cmpq %r9, 0x340(%rdx,%r11)
je 0x4d96
addq %r14, %rax
addq $0x380, %r11            # imm = 0x380
incl %ecx
cmpq %r11, %r10
jne 0x4d79
jmp 0x4da9
movabsq $0x37ffffffc80, %r9     # imm = 0x37FFFFFFC80
cmpq %r9, %r11
jne 0x5083
movl 0xc9bc(%rbx), %eax
cmpl %r8d, %eax
jae 0x4ddd
movq %rbx, %rdi
callq 0x4b60
movq 0x18(%rbx), %rdi
testq %rdi, %rdi
je 0x516c
movq 0x90e0(%rbx), %rsi
addq %r15, %rsi
movq (%rdi), %rax
callq *(%rax)
jmp 0x5393
cmpl %r8d, %eax
jne 0x5457
movzbl 0x32f(%rdi,%r15), %eax
incq 0x7328(%rbx,%rax,8)
jmp 0x5431
movq 0x90e0(%rbx), %rsi
cmpb $0x2, 0x32f(%rsi,%r15)
jne 0x4e88
jmp 0x4eae
movq 0x7390(%rbx), %rax
movq (%rax,%rdi,8), %rax
leaq (,%r13,4), %rcx
addq %r13, %rcx
shlq $0x4, %rcx
movq 0x30(%rax,%rcx), %rax
movq 0x90e0(%rbx), %rcx
movq %rax, 0x360(%rcx,%r15)
jmp 0x4eae
movl 0xe65c(%rbx), %eax
cmpl 0xe648(%rbx), %eax
jae 0x4eae
movq 0x90e0(%rbx), %rsi
jmp 0x4e96
movq 0x7390(%rbx), %rax
movq (%rax,%rdi,8), %rax
leaq (,%r13,4), %rcx
addq %r13, %rcx
shlq $0x4, %rcx
movq 0x30(%rax,%rcx), %rax
movq 0x90e0(%rbx), %rsi
movq %rax, 0x358(%rsi,%r15)
movl 0xe65c(%rbx), %eax
cmpl 0xe648(%rbx), %eax
jae 0x4eae
addq %r15, %rsi
movq 0x10(%rsp), %rdi
movl %r10d, %r14d
callq 0xc3b6
movl %r14d, %r10d
movq 0x8(%rsp), %rdi
movq 0x90e0(%rbx), %rax
cmpb $0x0, 0x32f(%rax,%r15)
jne 0x4f58
addq %r15, %rax
movzbl 0x73a4(%rbx), %ecx
cmpl $0x5, %ecx
je 0x4f17
cmpl $0x4, %ecx
jne 0x4f5e
movq 0x7390(%rbx), %rcx
movq (%rcx,%rdi,8), %rcx
leaq (,%r13,4), %rdx
addq %r13, %rdx
shlq $0x4, %rdx
movq 0x20(%rcx,%rdx), %rsi
movq 0x370(%rax), %rdx
movq %rbx, %rdi
movl $0x1, %ecx
xorl %r8d, %r8d
movl %r10d, %r14d
callq 0x13812
jmp 0x4f50
movq 0x7390(%rbx), %rcx
movq (%rcx,%rdi,8), %rcx
leaq (,%r13,4), %rdx
addq %r13, %rdx
shlq $0x4, %rdx
movq 0x20(%rcx,%rdx), %rsi
movq 0x370(%rax), %rdx
movq %rbx, %rdi
movl $0x1, %ecx
xorl %r8d, %r8d
movl %r10d, %r14d
callq 0x1380a
movl %r14d, %r10d
movq 0x8(%rsp), %rdi
movb 0x73a4(%rbx), %cl
movq %r13, %r14
leaq (,%r13,4), %rax
addq %r13, %rax
shlq $0x4, %rax
movq 0x7390(%rbx), %rdx
movq (%rdx,%rdi,8), %rdx
movq 0x20(%rdx,%rax), %r8
movq 0x90e0(%rbx), %rax
movq 0x370(%rax,%r15), %r9
movzbl 0x32f(%rax,%r15), %eax
subq $0x8, %rsp
cmpb $0x6, %cl
jne 0x4fbd
movq %rbx, %rdi
movq 0x20(%rsp), %r13
movl %r13d, %esi
movl %ebp, %edx
movl %r10d, %ecx
pushq $0x1
pushq %rax
pushq $0x0
callq 0x136d4
jmp 0x4fd7
movq %rbx, %rdi
movq 0x20(%rsp), %r13
movl %r13d, %esi
movl %ebp, %edx
movl %r10d, %ecx
pushq $0x1
pushq %rax
pushq $0x0
callq 0x135ee
addq $0x20, %rsp
movq 0x90e0(%rbx), %rsi
movzbl 0x32f(%rsi,%r15), %eax
movq %r13, %rcx
shlq $0x5, %rcx
movq 0x40(%rsp), %rdx
addq %rcx, %rdx
shll $0x3, %eax
incq (%rax,%rdx)
addq 0x38(%rsp), %rcx
incq (%rax,%rcx)
movl 0x8(%rsi,%r15), %eax
cmpl 0x7398(%rbx), %eax
jge 0x5031
addq %r15, %rsi
cmpb $0x0, (%rsi)
movq 0x30(%rsp), %rax
cmoveq 0x28(%rsp), %rax
movq (%rax), %rdi
movq (%rdi), %rax
callq *0x18(%rax)
movq 0x7390(%rbx), %rax
movq 0x8(%rsp), %rcx
movq (%rax,%rcx,8), %rax
leaq (%r14,%r14,4), %rcx
shlq $0x4, %rcx
cmpb $0x0, 0x1(%rax,%rcx)
je 0x5061
leaq (%rax,%rcx), %rdx
incq %rdx
incq 0x102d0(%rbx)
movb $0x0, (%rdx)
movb $0x1, 0x3(%rax,%rcx)
movq 0x90e0(%rbx), %rax
movzbl 0x32f(%rax,%r15), %ecx
incq 0x72c8(%rbx,%rcx,8)
jmp 0x541b
cmpb $0x1, 0x32f(%rsi)
jne 0x51d8
cmpb $0x0, 0x1(%rsi)
je 0x5103
movl 0x33c(%rsi), %esi
movq %rax, %rdi
sarq $0x20, %rdi
imulq $0x380, %rdi, %rdi      # imm = 0x380
leaq (%rdx,%rdi), %r8
movb $0x1, %r9b
movb %r9b, 0x32b(%rdx,%rdi)
movb %r9b, 0x229(%rsi,%r8)
movslq %ecx, %rdx
imulq $0x380, %rdx, %rdx      # imm = 0x380
xorl %esi, %esi
movq 0x90e0(%rbx), %rdi
addq %r15, %rdi
cmpb $0x0, 0x229(%rsi,%rdi)
je 0x50f3
movq 0xca20(%rbx), %rdi
addq %rdx, %rdi
movb $0x1, 0x229(%rsi,%rdi)
incq %rsi
cmpq $0x38, %rsi
jne 0x50cd
movq 0x90e0(%rbx), %rdi
cmpb $0x0, 0x32a(%rdi,%r15)
je 0x5252
movq 0xca20(%rbx), %rdx
sarq $0x20, %rax
imulq $0x380, %rax, %rsi      # imm = 0x380
movb $0x1, 0x32a(%rdx,%rsi)
movslq %ecx, %rcx
imulq $0x380, %rcx, %rcx      # imm = 0x380
xorl %edx, %edx
movq 0x90e0(%rbx), %rsi
addq %r15, %rsi
cmpb $0x0, 0x129(%rdx,%rsi)
je 0x515e
movq 0xca20(%rbx), %rsi
addq %rcx, %rsi
movb $0x1, 0x129(%rdx,%rsi)
incq %rdx
cmpq $0x48, %rdx
jne 0x5138
jmp 0x530b
cmpb $0x2, 0x73a4(%rbx)
jne 0x5393
movq 0x90e0(%rbx), %rax
movq 0x368(%rax,%r15), %rsi
movq 0x340(%rax,%r15), %rcx
movq 0x348(%rax,%r15), %rdx
movl %r13d, %edi
callq 0x927d
shrq $0xc, %rax
movq 0x90e0(%rbx), %rcx
leaq (%rcx,%r15), %rsi
movq %rax, 0x360(%rcx,%r15)
leaq 0x7bd02(%rip), %rax     # 0x80ec0
movq (%rax,%r13,8), %rax
movq %rax, 0x378(%rcx,%r15)
movq (%rbx), %rax
movq %rbx, %rdi
callq *0x18(%rax)
jmp 0x5393
sarq $0x20, %rax
cmpb $0x0, (%rsi)
je 0x525b
movl 0x10(%rsi), %esi
imulq $0x380, %rax, %rdi      # imm = 0x380
leaq (%rdx,%rdi), %r8
movb $0x1, %r9b
movb %r9b, 0x329(%rdx,%rdi)
movb %r9b, 0x29(%rsi,%r8)
movq 0x90e0(%rbx), %rdx
cmpb $0x0, 0x329(%rdx,%r15)
je 0x530b
movslq %ecx, %rcx
imulq $0x380, %rcx, %rcx      # imm = 0x380
xorl %edx, %edx
movq 0x90e0(%rbx), %rsi
addq %r15, %rsi
cmpb $0x0, 0x29(%rdx,%rsi)
je 0x5241
movq 0xca20(%rbx), %rsi
addq %rcx, %rsi
movb $0x1, 0x29(%rdx,%rsi)
incq %rdx
cmpq $0x100, %rdx            # imm = 0x100
jne 0x5221
jmp 0x530b
sarq $0x20, %rax
jmp 0x530b
movl 0x338(%rsi), %edi
imulq $0x380, %rax, %rsi      # imm = 0x380
movb $0x1, %r8b
movb %r8b, 0x32a(%rdx,%rsi)
addq %rsi, %rdx
movb %r8b, 0x129(%rdi,%rdx)
movslq %ecx, %rcx
imulq $0x380, %rcx, %rcx      # imm = 0x380
xorl %edx, %edx
movq 0x90e0(%rbx), %rdi
addq %r15, %rdi
cmpb $0x0, 0x129(%rdx,%rdi)
je 0x52b0
movq 0xca20(%rbx), %rdi
addq %rcx, %rdi
movb $0x1, 0x129(%rdx,%rdi)
incq %rdx
cmpq $0x48, %rdx
jne 0x528a
movq 0x90e0(%rbx), %rdx
cmpb $0x0, 0x32b(%rdx,%r15)
je 0x530b
movq 0xca20(%rbx), %rdx
movb $0x1, 0x32b(%rdx,%rsi)
xorl %edx, %edx
movq 0x90e0(%rbx), %rsi
addq %r15, %rsi
cmpb $0x0, 0x229(%rdx,%rsi)
je 0x5302
movq 0xca20(%rbx), %rsi
addq %rcx, %rsi
movb $0x1, 0x229(%rdx,%rsi)
incq %rdx
cmpq $0x38, %rdx
jne 0x52dc
movq 0x90e0(%rbx), %rsi
movl 0x8(%rsi,%r15), %ecx
movq 0xca20(%rbx), %rdi
imulq $0x380, %rax, %r14      # imm = 0x380
cmpl 0x8(%rdi,%r14), %ecx
jge 0x5336
leaq (%rdi,%r14), %rax
addq $0x8, %rax
movl %ecx, (%rax)
cmpb $0x2, 0x32f(%rdi,%r14)
jne 0x5382
addq %r14, %rdi
movb 0x32c(%rdi), %bpl
movq 0x378(%rdi), %r13
addq %r15, %rsi
movl $0x380, %edx            # imm = 0x380
callq 0x31c0
movq 0xca20(%rbx), %rax
movb %bpl, 0x32c(%rax,%r14)
movq %r13, 0x378(%rax,%r14)
movq 0x18(%rsp), %r13
movq 0x90e0(%rbx), %rsi
movzbl 0x32f(%rsi,%r15), %eax
incq 0x7308(%rbx,%rax,8)
movq 0x90e0(%rbx), %rax
cmpb $0x0, 0x32f(%rax,%r15)
jne 0x540a
movb 0x73a4(%rbx), %cl
cmpb $0x4, %cl
jne 0x53db
addq %r15, %rax
movq 0x348(%rax), %rsi
movq 0x370(%rax), %rdx
movq %rbx, %rdi
xorl %ecx, %ecx
xorl %r8d, %r8d
callq 0x13812
movb 0x73a4(%rbx), %cl
movq 0x90e0(%rbx), %rax
cmpb $0x5, %cl
jne 0x540a
movq 0x348(%rax,%r15), %rsi
movq 0x370(%rax,%r15), %rdx
movzbl 0x32f(%rax,%r15), %r8d
movq %rbx, %rdi
xorl %ecx, %ecx
callq 0x1380a
movq 0x90e0(%rbx), %rax
movzbl 0x32f(%rax,%r15), %ecx
incq 0x72e8(%rbx,%rcx,8)
leaq (%rax,%r15), %rsi
incq 0x72a8(%rbx,%rcx,8)
movq 0x20(%rsp), %rdi
callq 0xc41a
leaq 0x7ba88(%rip), %rsi     # 0x80ec0
incl %r12d
cmpl 0x739c(%rbx), %r12d
jb 0x4c62
addq $0x48, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x14b92(%rip), %rdi     # 0x19ff0
leaq 0xec2b(%rip), %rsi      # 0x14090
callq 0x3250
addq $0x7350, %rbx           # imm = 0x7350
movq %rax, %rdi
movq %rbx, %rsi
callq 0x31e0
leaq 0xec0f(%rip), %rsi      # 0x14092
movq %rax, %rdi
callq 0x3250
movq %rax, %rdi
callq 0x3110
leaq 0xebcd(%rip), %rdi      # 0x14067
leaq 0xebc8(%rip), %rsi      # 0x14069
leaq 0xec44(%rip), %rcx      # 0x140ec
movl $0x273, %edx            # imm = 0x273
callq 0x3160