// File: /workspace/github_cpp_makefile_star2_O3/CMU-SAFARI[P]MQSim/src/exec/SSD_Device.cpp
// Function: SSD_Device::SSD_Device(Device_Parameter_Set*, std::vector<IO_Flow_Parameter_Set*, std::allocator<IO_Flow_Parameter_Set*>>*)
SSD_Device::SSD_Device(Device_Parameter_Set *parameters, std::vector<IO_Flow_Parameter_Set *> *io_flows) : MQSimEngine::Sim_Object("SSDDevice")
{
	SSD_Device *device = this;
	my_instance = device; //used for static functions
	Simulator->AddObject(device);

	device->Preconditioning_required = parameters->Enabled_Preconditioning;
	device->Memory_Type = parameters->Memory_Type;

	switch (Memory_Type)
	{
	case NVM::NVM_Type::FLASH:
	{
		sim_time_type *read_latencies, *write_latencies;
		sim_time_type average_flash_read_latency = 0, average_flash_write_latency = 0; //Required for FTL initialization

		//Step 1: create memory chips (flash chips in our case)
		switch (parameters->Flash_Parameters.Flash_Technology)
		{
		case Flash_Technology_Type::SLC:
			read_latencies = new sim_time_type[1];
			read_latencies[0] = parameters->Flash_Parameters.Page_Read_Latency_LSB;
			write_latencies = new sim_time_type[1];
			write_latencies[0] = parameters->Flash_Parameters.Page_Program_Latency_LSB;
			average_flash_read_latency = read_latencies[0];
			average_flash_write_latency = write_latencies[0];
			break;
		case Flash_Technology_Type::MLC:
			read_latencies = new sim_time_type[2];
			read_latencies[0] = parameters->Flash_Parameters.Page_Read_Latency_LSB;
			read_latencies[1] = parameters->Flash_Parameters.Page_Read_Latency_MSB;
			write_latencies = new sim_time_type[2];
			write_latencies[0] = parameters->Flash_Parameters.Page_Program_Latency_LSB;
			write_latencies[1] = parameters->Flash_Parameters.Page_Program_Latency_MSB;
			average_flash_read_latency = (read_latencies[0] + read_latencies[1]) / 2;
			average_flash_write_latency = (write_latencies[0] + write_latencies[1]) / 2;
			break;
		case Flash_Technology_Type::TLC:
			read_latencies = new sim_time_type[3];
			read_latencies[0] = parameters->Flash_Parameters.Page_Read_Latency_LSB;
			read_latencies[1] = parameters->Flash_Parameters.Page_Read_Latency_CSB;
			read_latencies[2] = parameters->Flash_Parameters.Page_Read_Latency_MSB;
			write_latencies = new sim_time_type[3];
			write_latencies[0] = parameters->Flash_Parameters.Page_Program_Latency_LSB;
			write_latencies[1] = parameters->Flash_Parameters.Page_Program_Latency_CSB;
			write_latencies[2] = parameters->Flash_Parameters.Page_Program_Latency_MSB;
			average_flash_read_latency = (read_latencies[0] + read_latencies[1] + read_latencies[2]) / 3;
			average_flash_write_latency = (write_latencies[0] + write_latencies[1] + write_latencies[2]) / 3;
			break;
		default:
			throw std::invalid_argument("The specified flash technologies is not supported");
		}

		//Step 2: create memory channels to connect chips to the controller
		this->Channel_count = parameters->Flash_Channel_Count;
		this->Chip_no_per_channel = parameters->Chip_No_Per_Channel;
		switch (parameters->Flash_Comm_Protocol)
		{
		case SSD_Components::ONFI_Protocol::NVDDR2:
		{
			SSD_Components::ONFI_Channel_NVDDR2 **channels = new SSD_Components::ONFI_Channel_NVDDR2 *[parameters->Flash_Channel_Count];
			for (unsigned int channel_cntr = 0; channel_cntr < parameters->Flash_Channel_Count; channel_cntr++)
			{
				NVM::FlashMemory::Flash_Chip **chips = new NVM::FlashMemory::Flash_Chip *[parameters->Chip_No_Per_Channel];
				for (unsigned int chip_cntr = 0; chip_cntr < parameters->Chip_No_Per_Channel; chip_cntr++)
				{
					chips[chip_cntr] = new NVM::FlashMemory::Flash_Chip(device->ID() + ".Channel." + std::to_string(channel_cntr) + ".Chip." + std::to_string(chip_cntr),
																		channel_cntr, chip_cntr, parameters->Flash_Parameters.Flash_Technology, parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
																		parameters->Flash_Parameters.Block_No_Per_Plane, parameters->Flash_Parameters.Page_No_Per_Block,
																		read_latencies, write_latencies, parameters->Flash_Parameters.Block_Erase_Latency,
																		parameters->Flash_Parameters.Suspend_Program_Time, parameters->Flash_Parameters.Suspend_Erase_Time);
					Simulator->AddObject(chips[chip_cntr]); //Each simulation object (a child of MQSimEngine::Sim_Object) should be added to the engine
				}
				channels[channel_cntr] = new SSD_Components::ONFI_Channel_NVDDR2(channel_cntr, parameters->Chip_No_Per_Channel,
																				 chips, parameters->Flash_Channel_Width,
																				 (sim_time_type)((double)1000 / parameters->Channel_Transfer_Rate) * 2, (sim_time_type)((double)1000 / parameters->Channel_Transfer_Rate) * 2);
				device->Channels.push_back(channels[channel_cntr]); //Channels should not be added to the simulator core, they are passive object that do not handle any simulation event
			}

			//Step 3: create channel controller and connect channels to it
			device->PHY = new SSD_Components::NVM_PHY_ONFI_NVDDR2(device->ID() + ".PHY", channels, parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel,
																  parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die);
			Simulator->AddObject(device->PHY);
			break;
		}
		default:
			throw std::invalid_argument("No implementation is available for the specified flash communication protocol");
		}
		delete[] read_latencies;
		delete[] write_latencies;

		//Steps 4 - 8: create FTL components and connect them together
		SSD_Components::FTL *ftl = new SSD_Components::FTL(device->ID() + ".FTL", NULL, parameters->Flash_Channel_Count,
														   parameters->Chip_No_Per_Channel, parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
														   parameters->Flash_Parameters.Block_No_Per_Plane, parameters->Flash_Parameters.Page_No_Per_Block,
														   parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, average_flash_read_latency, average_flash_write_latency, parameters->Overprovisioning_Ratio,
														   parameters->Flash_Parameters.Block_PE_Cycles_Limit, parameters->Seed++);
		ftl->PHY = (SSD_Components::NVM_PHY_ONFI *)PHY;
		Simulator->AddObject(ftl);
		device->Firmware = ftl;

		//Step 5: create TSU
		SSD_Components::TSU_Base *tsu;
		bool erase_suspension = false, program_suspension = false;
		if (parameters->Flash_Parameters.CMD_Suspension_Support == NVM::FlashMemory::Command_Suspension_Mode::PROGRAM)
		{
			program_suspension = true;
		}
		if (parameters->Flash_Parameters.CMD_Suspension_Support == NVM::FlashMemory::Command_Suspension_Mode::ERASE)
		{
			erase_suspension = true;
		}
		if (parameters->Flash_Parameters.CMD_Suspension_Support == NVM::FlashMemory::Command_Suspension_Mode::PROGRAM_ERASE)
		{
			program_suspension = true;
			erase_suspension = true;
		}
		switch (parameters->Transaction_Scheduling_Policy)
		{
		case SSD_Components::Flash_Scheduling_Type::OUT_OF_ORDER:
			tsu = new SSD_Components::TSU_OutOfOrder(ftl->ID() + ".TSU", ftl, static_cast<SSD_Components::NVM_PHY_ONFI_NVDDR2 *>(device->PHY),
													 parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel,
													 parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
													 parameters->Preferred_suspend_write_time_for_read, parameters->Preferred_suspend_erase_time_for_read,
													 parameters->Preferred_suspend_erase_time_for_write,
													 erase_suspension, program_suspension);
			break;
		case SSD_Components::Flash_Scheduling_Type::PRIORITY_OUT_OF_ORDER:
			tsu = new SSD_Components::TSU_Priority_OutOfOrder(ftl->ID() + ".TSU", ftl, static_cast<SSD_Components::NVM_PHY_ONFI_NVDDR2 *>(device->PHY),
										  parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel,
										  parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
										  parameters->Preferred_suspend_write_time_for_read, parameters->Preferred_suspend_erase_time_for_read,
										  parameters->Preferred_suspend_erase_time_for_write,
										  erase_suspension, program_suspension);
			break;
		/*case SSD_Components::Flash_Scheduling_Type::FLIN:
				{
					unsigned int * stream_count_per_priority_class = new unsigned int[4];
					for (int i = 0; i < 4; i++)
						stream_count_per_priority_class[i] = 0;
					for (auto &flow : (*io_flows))
						stream_count_per_priority_class[(int)flow->Priority_Class]++;
					stream_id_type** stream_ids_per_priority_class = new stream_id_type*[4];
					for (int i = 0; i < 4; i++)
						stream_ids_per_priority_class[i] = new stream_id_type[stream_count_per_priority_class[i]];

					tsu = new SSD_Components::TSU_FLIN(ftl->ID() + ".TSU", ftl, static_cast<SSD_Components::NVM_PHY_ONFI_NVDDR2*>(device->PHY),
						parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel,
						parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die, parameters->Flash_Parameters.Page_Capacity,
						10000000, 33554432, 262144, 4, (unsigned int)io_flows->size(), stream_count_per_priority_class, stream_ids_per_priority_class,
						0.6,
						parameters->Preferred_suspend_write_time_for_read, parameters->Preferred_suspend_erase_time_for_read, parameters->Preferred_suspend_erase_time_for_write,
						erase_suspension, program_suspension);
					break;
				}*/
		default:
			throw std::invalid_argument("No implementation is available for the specified transaction scheduling algorithm");
		}
		Simulator->AddObject(tsu);
		ftl->TSU = tsu;

		//Step 6: create Flash_Block_Manager
		SSD_Components::Flash_Block_Manager_Base *fbm;
		fbm = new SSD_Components::Flash_Block_Manager(NULL, parameters->Flash_Parameters.Block_PE_Cycles_Limit,
													  (unsigned int)io_flows->size(), parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel,
													  parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
													  parameters->Flash_Parameters.Block_No_Per_Plane, parameters->Flash_Parameters.Page_No_Per_Block);
		ftl->BlockManager = fbm;

		//Step 7: create Address_Mapping_Unit
		SSD_Components::Address_Mapping_Unit_Base *amu;
		std::vector<std::vector<flash_channel_ID_type>> flow_channel_id_assignments;
		std::vector<std::vector<flash_chip_ID_type>> flow_chip_id_assignments;
		std::vector<std::vector<flash_die_ID_type>> flow_die_id_assignments;
		std::vector<std::vector<flash_plane_ID_type>> flow_plane_id_assignments;
		unsigned int stream_count = 0;
		for (unsigned int i = 0; i < io_flows->size(); i++)
		{
			switch (parameters->HostInterface_Type)
			{
			case HostInterface_Types::SATA:
			{
				stream_count = 1;
				std::vector<flash_channel_ID_type> channel_ids;
				flow_channel_id_assignments.push_back(channel_ids);
				for (unsigned int j = 0; j < parameters->Flash_Channel_Count; j++)
				{
					flow_channel_id_assignments[i].push_back(j);
				}
				std::vector<flash_chip_ID_type> chip_ids;
				flow_chip_id_assignments.push_back(chip_ids);
				for (unsigned int j = 0; j < parameters->Chip_No_Per_Channel; j++)
				{
					flow_chip_id_assignments[i].push_back(j);
				}
				std::vector<flash_die_ID_type> die_ids;
				flow_die_id_assignments.push_back(die_ids);
				for (unsigned int j = 0; j < parameters->Flash_Parameters.Die_No_Per_Chip; j++)
				{
					flow_die_id_assignments[i].push_back(j);
				}
				std::vector<flash_plane_ID_type> plane_ids;
				flow_plane_id_assignments.push_back(plane_ids);
				for (unsigned int j = 0; j < parameters->Flash_Parameters.Plane_No_Per_Die; j++)
				{
					flow_plane_id_assignments[i].push_back(j);
				}
				break;
			}
			case HostInterface_Types::NVME:
			{
				stream_count = (unsigned int)io_flows->size();
				std::vector<flash_channel_ID_type> channel_ids;
				flow_channel_id_assignments.push_back(channel_ids);
				for (int j = 0; j < (*io_flows)[i]->Channel_No; j++)
				{
					flow_channel_id_assignments[i].push_back((*io_flows)[i]->Channel_IDs[j]);
				}
				std::vector<flash_chip_ID_type> chip_ids;
				flow_chip_id_assignments.push_back(chip_ids);
				for (int j = 0; j < (*io_flows)[i]->Chip_No; j++)
				{
					flow_chip_id_assignments[i].push_back((*io_flows)[i]->Chip_IDs[j]);
				}
				std::vector<flash_die_ID_type> die_ids;
				flow_die_id_assignments.push_back(die_ids);
				for (int j = 0; j < (*io_flows)[i]->Die_No; j++)
				{
					flow_die_id_assignments[i].push_back((*io_flows)[i]->Die_IDs[j]);
				}
				std::vector<flash_plane_ID_type> plane_ids;
				flow_plane_id_assignments.push_back(plane_ids);
				for (int j = 0; j < (*io_flows)[i]->Plane_No; j++)
				{
					flow_plane_id_assignments[i].push_back((*io_flows)[i]->Plane_IDs[j]);
				}
				break;
			}
			default:
				break;
			}
		}

		Utils::Logical_Address_Partitioning_Unit::Allocate_logical_address_for_flows(parameters->HostInterface_Type, (unsigned int)io_flows->size(),
																					 parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel, parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
																					 flow_channel_id_assignments, flow_chip_id_assignments, flow_die_id_assignments, flow_plane_id_assignments,
																					 parameters->Flash_Parameters.Block_No_Per_Plane, parameters->Flash_Parameters.Page_No_Per_Block,
																					 parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, parameters->Overprovisioning_Ratio);
		switch (parameters->Address_Mapping)
		{
		case SSD_Components::Flash_Address_Mapping_Type::PAGE_LEVEL:
			amu = new SSD_Components::Address_Mapping_Unit_Page_Level(ftl->ID() + ".AddressMappingUnit", ftl, (SSD_Components::NVM_PHY_ONFI *)device->PHY,
																	  fbm, parameters->Ideal_Mapping_Table, parameters->CMT_Capacity, parameters->Plane_Allocation_Scheme, stream_count,
																	  parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel, parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
																	  flow_channel_id_assignments, flow_chip_id_assignments, flow_die_id_assignments, flow_plane_id_assignments,
																	  parameters->Flash_Parameters.Block_No_Per_Plane, parameters->Flash_Parameters.Page_No_Per_Block,
																	  parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, parameters->Flash_Parameters.Page_Capacity, parameters->Overprovisioning_Ratio,
																	  parameters->CMT_Sharing_Mode);
			break;
		case SSD_Components::Flash_Address_Mapping_Type::HYBRID:
			amu = new SSD_Components::Address_Mapping_Unit_Hybrid(ftl->ID() + ".AddressMappingUnit", ftl, (SSD_Components::NVM_PHY_ONFI *)device->PHY,
																  fbm, parameters->Ideal_Mapping_Table, stream_count,
																  parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel, parameters->Flash_Parameters.Die_No_Per_Chip,
																  parameters->Flash_Parameters.Plane_No_Per_Die, parameters->Flash_Parameters.Block_No_Per_Plane, parameters->Flash_Parameters.Page_No_Per_Block,
																  parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, parameters->Flash_Parameters.Page_Capacity, parameters->Overprovisioning_Ratio);
			break;
		default:
			throw std::invalid_argument("No implementation is available fo the secified address mapping strategy");
		}
		Simulator->AddObject(amu);
		ftl->Address_Mapping_Unit = amu;

		//Step 8: create GC_and_WL_unit
		double max_rho = 0;
		for (unsigned int i = 0; i < io_flows->size(); i++)
		{
			if ((*io_flows)[i]->Initial_Occupancy_Percentage > max_rho)
			{
				max_rho = (*io_flows)[i]->Initial_Occupancy_Percentage;
			}
		}
		max_rho /= 100; //Convert from percentage to a value between zero and 1
		SSD_Components::GC_and_WL_Unit_Base *gcwl;
		gcwl = new SSD_Components::GC_and_WL_Unit_Page_Level(ftl->ID() + ".GCandWLUnit", amu, fbm, tsu, (SSD_Components::NVM_PHY_ONFI *)device->PHY,
															 parameters->GC_Block_Selection_Policy, parameters->GC_Exec_Threshold, parameters->Preemptible_GC_Enabled, parameters->GC_Hard_Threshold,
															 parameters->Flash_Channel_Count, parameters->Chip_No_Per_Channel,
															 parameters->Flash_Parameters.Die_No_Per_Chip, parameters->Flash_Parameters.Plane_No_Per_Die,
															 parameters->Flash_Parameters.Block_No_Per_Plane, parameters->Flash_Parameters.Page_No_Per_Block,
															 parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, parameters->Use_Copyback_for_GC, max_rho, 10,
															 parameters->Seed++);
		Simulator->AddObject(gcwl);
		fbm->Set_GC_and_WL_Unit(gcwl);
		ftl->GC_and_WL_Unit = gcwl;

		//Step 9: create Data_Cache_Manager
		SSD_Components::Data_Cache_Manager_Base *dcm;
		SSD_Components::Caching_Mode *caching_modes = new SSD_Components::Caching_Mode[io_flows->size()];
		for (unsigned int i = 0; i < io_flows->size(); i++)
		{
			caching_modes[i] = (*io_flows)[i]->Device_Level_Data_Caching_Mode;
		}

		switch (parameters->Caching_Mechanism)
		{
		case SSD_Components::Caching_Mechanism::SIMPLE:
			dcm = new SSD_Components::Data_Cache_Manager_Flash_Simple(device->ID() + ".DataCache", NULL, ftl, (SSD_Components::NVM_PHY_ONFI *)device->PHY,
																	  parameters->Data_Cache_Capacity, parameters->Data_Cache_DRAM_Row_Size, parameters->Data_Cache_DRAM_Data_Rate,
																	  parameters->Data_Cache_DRAM_Data_Busrt_Size, parameters->Data_Cache_DRAM_tRCD, parameters->Data_Cache_DRAM_tCL, parameters->Data_Cache_DRAM_tRP,
																	  caching_modes, (unsigned int)io_flows->size(),
																	  parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, parameters->Flash_Channel_Count * parameters->Chip_No_Per_Channel * parameters->Flash_Parameters.Die_No_Per_Chip * parameters->Flash_Parameters.Plane_No_Per_Die * parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE);

			break;
		case SSD_Components::Caching_Mechanism::ADVANCED:
			dcm = new SSD_Components::Data_Cache_Manager_Flash_Advanced(device->ID() + ".DataCache", NULL, ftl, (SSD_Components::NVM_PHY_ONFI *)device->PHY,
																		parameters->Data_Cache_Capacity, parameters->Data_Cache_DRAM_Row_Size, parameters->Data_Cache_DRAM_Data_Rate,
																		parameters->Data_Cache_DRAM_Data_Busrt_Size, parameters->Data_Cache_DRAM_tRCD, parameters->Data_Cache_DRAM_tCL, parameters->Data_Cache_DRAM_tRP,
																		caching_modes, parameters->Data_Cache_Sharing_Mode, (unsigned int)io_flows->size(),
																		parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, parameters->Flash_Channel_Count * parameters->Chip_No_Per_Channel * parameters->Flash_Parameters.Die_No_Per_Chip * parameters->Flash_Parameters.Plane_No_Per_Die * parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE);

			break;
		default:
			PRINT_ERROR("Unknown data caching mechanism!")
		}

		Simulator->AddObject(dcm);
		ftl->Data_cache_manager = dcm;
		device->Cache_manager = dcm;

		//Step 10: create Host_Interface
		switch (parameters->HostInterface_Type)
		{
		case HostInterface_Types::NVME:
			device->Host_interface = new SSD_Components::Host_Interface_NVMe(device->ID() + ".HostInterface",
																			 Utils::Logical_Address_Partitioning_Unit::Get_total_device_lha_count(), parameters->IO_Queue_Depth, parameters->IO_Queue_Depth,
																			 (unsigned int)io_flows->size(), parameters->Queue_Fetch_Size, parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, dcm);
			break;
		case HostInterface_Types::SATA:
			device->Host_interface = new SSD_Components::Host_Interface_SATA(device->ID() + ".HostInterface",
																			 parameters->IO_Queue_Depth, Utils::Logical_Address_Partitioning_Unit::Get_total_device_lha_count(), parameters->Flash_Parameters.Page_Capacity / SECTOR_SIZE_IN_BYTE, dcm);

			break;
		default:
			break;
		}
		Simulator->AddObject(device->Host_interface);
		dcm->Set_host_interface(device->Host_interface);
		break;
	}
	default:
		throw std::invalid_argument("Undefined NVM type specified ");
	} // switch (Memory_Type)
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x268, %rsp            # imm = 0x268
movq %rdx, 0x60(%rsp)
movq %rdi, %rbx
leaq 0x10(%rsp), %r14
movq %r14, -0x10(%r14)
leaq 0x3c89b(%rip), %rsi     # 0x57588
leaq 0x3c89d(%rip), %rdx     # 0x57591
movq %rsp, %rdi
callq 0xafc8
movq %rsp, %rsi
movq %rbx, 0x28(%rsp)
movq %rbx, %rdi
callq 0x164ce
movq (%rsp), %rdi
cmpq %r14, %rdi
je 0x1ad1a
callq 0x7370
leaq 0x52e1f(%rip), %rax     # 0x6db40
movq 0x28(%rsp), %rcx
movq %rax, (%rcx)
leaq 0x52e48(%rip), %rax     # 0x6db78
movq %rax, 0x30(%rcx)
leaq 0x60(%rcx), %rax
movq %rax, 0x170(%rsp)
xorpd %xmm0, %xmm0
movupd %xmm0, 0x60(%rcx)
movq $0x0, 0x70(%rcx)
movq %rcx, 0x54868(%rip)     # 0x6f5c0
callq 0x28018
movq %rax, %rdi
movq 0x28(%rsp), %rsi
callq 0x2808c
leaq 0x5460b(%rip), %rax     # 0x6f37c
movb (%rax), %al
movq 0x28(%rsp), %rcx
movb %al, 0x38(%rcx)
leaq 0x547b6(%rip), %rax     # 0x6f538
movl (%rax), %eax
movl %eax, 0x3c(%rcx)
testl %eax, %eax
jne 0x1ce55
leaq 0x54692(%rip), %rax     # 0x6f428
movl (%rax), %eax
cmpl $0x3, %eax
je 0x1ae56
cmpl $0x2, %eax
je 0x1adee
cmpl $0x1, %eax
jne 0x1cf65
movl $0x8, %edi
callq 0x7030
movq %rax, %r12
leaq 0x5466d(%rip), %rax     # 0x6f430
movq (%rax), %r14
movq %r14, (%r12)
movl $0x8, %edi
callq 0x7030
movq %rax, %r9
leaq 0x5466a(%rip), %rax     # 0x6f448
movq (%rax), %rax
movq %rax, 0x70(%rsp)
movq %rax, (%r9)
jmp 0x1aef5
movl $0x10, %edi
callq 0x7030
movq %rax, %r12
leaq 0x5462e(%rip), %rax     # 0x6f430
movq (%rax), %rbx
movq %rbx, (%r12)
leaq 0x54630(%rip), %rax     # 0x6f440
movq (%rax), %r14
movq %r14, 0x8(%r12)
movl $0x10, %edi
callq 0x7030
movq %rax, %r9
leaq 0x5461c(%rip), %rax     # 0x6f448
movq (%rax), %rax
movq %rax, (%r9)
leaq 0x5461f(%rip), %rcx     # 0x6f458
movq (%rcx), %rcx
movq %rcx, 0x8(%r9)
addq %rbx, %r14
shrq %r14
addq %rax, %rcx
shrq %rcx
movq %rcx, 0x70(%rsp)
jmp 0x1aef5
movl $0x18, %edi
callq 0x7030
movq %rax, %r12
leaq 0x545c6(%rip), %rax     # 0x6f430
movq (%rax), %r14
movq %r14, (%r12)
leaq 0x545c0(%rip), %rax     # 0x6f438
movq (%rax), %rbx
movq %rbx, 0x8(%r12)
leaq 0x545b9(%rip), %rax     # 0x6f440
movq (%rax), %r15
movq %r15, 0x10(%r12)
movl $0x18, %edi
callq 0x7030
movq %rax, %r9
leaq 0x545a5(%rip), %rax     # 0x6f448
movq (%rax), %rsi
movq %rsi, (%r9)
leaq 0x545a0(%rip), %rax     # 0x6f450
movq (%rax), %rcx
movq %rcx, 0x8(%r9)
leaq 0x5459a(%rip), %rax     # 0x6f458
movq (%rax), %rdi
movq %rdi, 0x10(%r9)
addq %r14, %rbx
addq %r15, %rbx
movabsq $-0x5555555555555555, %r8 # imm = 0xAAAAAAAAAAAAAAAB
movq %rbx, %rax
mulq %r8
movq %rdx, %r14
shrq %r14
addq %rsi, %rcx
addq %rdi, %rcx
movq %rcx, %rax
mulq %r8
shrq %rdx
movq %rdx, 0x70(%rsp)
movq %r9, 0x78(%rsp)
movq %r12, 0x58(%rsp)
leaq 0x544fa(%rip), %rax     # 0x6f400
movl (%rax), %ebx
movq 0x28(%rsp), %rcx
movl %ebx, 0x78(%rcx)
leaq 0x544f5(%rip), %rax     # 0x6f40c
movl (%rax), %eax
movl %eax, 0x7c(%rcx)
leaq 0x54635(%rip), %rax     # 0x6f558
cmpl $0x0, (%rax)
jne 0x1ce8c
leaq (,%rbx,8), %rdi
callq 0x7030
movq %rax, 0x68(%rsp)
movq %r14, 0x88(%rsp)
testq %rbx, %rbx
je 0x1b57b
xorl %ebp, %ebp
movl $0xd1b71759, %r14d      # imm = 0xD1B71759
leaq 0x544ae(%rip), %rax     # 0x6f40c
movl (%rax), %r12d
leaq (,%r12,8), %rdi
callq 0x7030
movq %rax, %rbx
testl %r12d, %r12d
je 0x1b49a
xorl %r12d, %r12d
movl $0x108, %edi            # imm = 0x108
callq 0x73a0
movq %rax, %r13
leaq 0x150(%rsp), %rax
movq %rax, 0x140(%rsp)
movq 0x28(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
leaq 0x140(%rsp), %r15
movq %r15, %rdi
callq 0xaf32
movq %r15, %rdi
leaq 0x3c600(%rip), %rsi     # 0x575c4
callq 0x7690
leaq 0x100(%rsp), %rsi
movq %rsi, 0xf0(%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1affd
movq %rdx, 0xf0(%rsp)
movq (%rcx), %rdx
movq %rdx, 0x100(%rsp)
jmp 0x1b005
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rdx, 0xf8(%rsp)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movl $0x1, %eax
cmpq $0xa, %rbp
jb 0x1b06a
movl $0x4, %eax
movl %ebp, %ecx
cmpl $0x63, %ecx
jbe 0x1b063
cmpl $0x3e7, %ecx            # imm = 0x3E7
jbe 0x1b068
cmpl $0x2710, %ecx           # imm = 0x2710
jb 0x1b06a
movl %ecx, %edx
imulq %r14, %rdx
shrq $0x2d, %rdx
addl $0x4, %eax
cmpl $0x1869f, %ecx          # imm = 0x1869F
movl %edx, %ecx
ja 0x1b032
addl $-0x3, %eax
jmp 0x1b06a
addl $-0x2, %eax
jmp 0x1b06a
decl %eax
movl %eax, %esi
leaq 0xe0(%rsp), %rax
movq %rax, 0xd0(%rsp)
leaq 0xd0(%rsp), %rdi
xorl %edx, %edx
callq 0x7420
movq 0xd0(%rsp), %rdi
movl 0xd8(%rsp), %esi
movl %ebp, %edx
callq 0xaec5
movq 0xf0(%rsp), %rcx
movl $0xf, %edi
leaq 0x100(%rsp), %rax
cmpq %rax, %rcx
je 0x1b0c3
movq 0x100(%rsp), %rdi
movq 0xf8(%rsp), %r8
movq 0xd0(%rsp), %rsi
movq 0xd8(%rsp), %rdx
leaq (%rdx,%r8), %rax
cmpq %rdi, %rax
jbe 0x1b103
movl $0xf, %edi
leaq 0xe0(%rsp), %r9
cmpq %r9, %rsi
je 0x1b0fe
movq 0xe0(%rsp), %rdi
cmpq %rdi, %rax
jbe 0x1b112
leaq 0xf0(%rsp), %rdi
callq 0x7130
jmp 0x1b123
leaq 0xd0(%rsp), %rdi
xorl %esi, %esi
xorl %edx, %edx
callq 0x73e0
leaq 0xc0(%rsp), %rsi
movq %rsi, 0xb0(%rsp)
movq (%rax), %rdx
leaq 0x10(%rax), %rcx
cmpq %rcx, %rdx
je 0x1b154
movq %rdx, 0xb0(%rsp)
movq (%rcx), %rdx
movq %rdx, 0xc0(%rsp)
jmp 0x1b15c
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq %rax, %rdx
addq $0x8, %rdx
movq 0x8(%rax), %rsi
movq %rsi, 0xb8(%rsp)
movq %rcx, (%rax)
movq $0x0, (%rdx)
movb $0x0, (%rcx)
leaq 0xb0(%rsp), %rdi
leaq 0x3c443(%rip), %rsi     # 0x575ce
callq 0x7690
leaq 0x40(%rsp), %rsi
movq %rsi, 0x30(%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1b1b8
movq %rdx, 0x30(%rsp)
movq (%rcx), %rdx
movq %rdx, 0x40(%rsp)
jmp 0x1b1c0
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rdx, 0x38(%rsp)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movl $0x1, %eax
cmpq $0xa, %r12
jb 0x1b223
movl $0x4, %eax
movl %r12d, %ecx
cmpl $0x63, %ecx
jbe 0x1b21c
cmpl $0x3e7, %ecx            # imm = 0x3E7
jbe 0x1b221
cmpl $0x2710, %ecx           # imm = 0x2710
jb 0x1b223
movl %ecx, %edx
imulq %r14, %rdx
shrq $0x2d, %rdx
addl $0x4, %eax
cmpl $0x1869f, %ecx          # imm = 0x1869F
movl %edx, %ecx
ja 0x1b1eb
addl $-0x3, %eax
jmp 0x1b223
addl $-0x2, %eax
jmp 0x1b223
decl %eax
movl %eax, %esi
leaq 0xa0(%rsp), %rax
movq %rax, 0x90(%rsp)
leaq 0x90(%rsp), %rdi
xorl %edx, %edx
callq 0x7420
movq 0x90(%rsp), %rdi
movl 0x98(%rsp), %esi
movl %r12d, %edx
callq 0xaec5
movq 0x30(%rsp), %rcx
movl $0xf, %edi
leaq 0x40(%rsp), %rax
cmpq %rax, %rcx
je 0x1b274
movq 0x40(%rsp), %rdi
movq 0x38(%rsp), %r8
movq 0x90(%rsp), %rsi
movq 0x98(%rsp), %rdx
leaq (%rdx,%r8), %rax
cmpq %rdi, %rax
jbe 0x1b2b1
movl $0xf, %edi
leaq 0xa0(%rsp), %r9
cmpq %r9, %rsi
je 0x1b2ac
movq 0xa0(%rsp), %rdi
cmpq %rdi, %rax
jbe 0x1b2bd
leaq 0x30(%rsp), %rdi
callq 0x7130
jmp 0x1b2ce
leaq 0x90(%rsp), %rdi
xorl %esi, %esi
xorl %edx, %edx
callq 0x73e0
leaq 0x10(%rsp), %rsi
movq %rsi, (%rsp)
movq (%rax), %rdx
leaq 0x10(%rax), %rcx
cmpq %rcx, %rdx
je 0x1b2f1
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1b2f9
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq %rax, %rdx
addq $0x8, %rdx
movq 0x8(%rax), %rsi
movq %rsi, 0x8(%rsp)
movq %rcx, (%rax)
movq $0x0, (%rdx)
movb $0x0, (%rcx)
leaq 0x5410b(%rip), %rax     # 0x6f428
movl (%rax), %r8d
leaq 0x54159(%rip), %rax     # 0x6f480
movl (%rax), %r9d
leaq 0x54153(%rip), %rax     # 0x6f484
movl (%rax), %eax
leaq 0x5414e(%rip), %rcx     # 0x6f488
movl (%rcx), %ecx
leaq 0x54149(%rip), %rdx     # 0x6f48c
movl (%rdx), %edx
leaq 0x54114(%rip), %rsi     # 0x6f460
movq (%rsi), %rsi
leaq 0x54122(%rip), %rdi     # 0x6f478
movq (%rdi), %rdi
leaq 0x54110(%rip), %r10     # 0x6f470
movq (%r10), %r10
subq $0x60, %rsp
xorpd %xmm0, %xmm0
movupd %xmm0, 0x48(%rsp)
movq %r10, 0x38(%rsp)
movq %rdi, 0x30(%rsp)
movq %rsi, 0x28(%rsp)
movq 0xd8(%rsp), %rsi
movq %rsi, 0x20(%rsp)
movq 0xb8(%rsp), %rsi
movq %rsi, 0x18(%rsp)
movl %edx, 0x10(%rsp)
movl %ecx, 0x8(%rsp)
movl %eax, (%rsp)
movq $0x14, 0x40(%rsp)
movq %r13, %rdi
leaq 0x60(%rsp), %rsi
movl %ebp, %edx
movl %r12d, %ecx
callq 0x2633c
addq $0x60, %rsp
movq %r13, (%rbx,%r12,8)
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1b3db
callq 0x7370
movq 0x90(%rsp), %rdi
leaq 0xa0(%rsp), %rax
cmpq %rax, %rdi
je 0x1b3f5
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1b409
callq 0x7370
movq 0xb0(%rsp), %rdi
leaq 0xc0(%rsp), %rax
cmpq %rax, %rdi
je 0x1b423
callq 0x7370
movq 0xd0(%rsp), %rdi
leaq 0xe0(%rsp), %rax
cmpq %rax, %rdi
je 0x1b43d
callq 0x7370
movq 0xf0(%rsp), %rdi
leaq 0x100(%rsp), %rax
cmpq %rax, %rdi
je 0x1b457
callq 0x7370
movq 0x140(%rsp), %rdi
leaq 0x150(%rsp), %rax
cmpq %rax, %rdi
je 0x1b471
callq 0x7370
callq 0x28018
movq (%rbx,%r12,8), %rsi
movq %rax, %rdi
callq 0x2808c
incq %r12
leaq 0x53f80(%rip), %rax     # 0x6f40c
movl (%rax), %r13d
cmpq %r13, %r12
jb 0x1af7d
jmp 0x1b49d
xorl %r13d, %r13d
movl $0x158, %edi            # imm = 0x158
callq 0x73a0
movq %rax, %r12
leaq 0x53f53(%rip), %rax     # 0x6f404
movl (%rax), %r8d
leaq 0x53f4d(%rip), %rax     # 0x6f408
movl (%rax), %eax
cvtsi2sd %rax, %xmm0
movsd 0x3c0b6(%rip), %xmm1    # 0x57580
divsd %xmm0, %xmm1
cvttsd2si %xmm1, %rax
movq %rax, %rcx
subsd 0x39b72(%rip), %xmm1    # 0x55050
cvttsd2si %xmm1, %r9
sarq $0x3f, %rcx
andq %rcx, %r9
orq %rax, %r9
addq %r9, %r9
movq %r12, %rdi
movl %ebp, %esi
movl %r13d, %edx
movq %rbx, %rcx
movl $0xf, %eax
pushq %rax
pushq $0x6
pushq $0x12c                  # imm = 0x12C
movl $0x64, %r10d
pushq %r10
pushq %rax
pushq %rax
pushq %rax
pushq $0x46
pushq $0x19
pushq %r10
movl $0x14, %eax
pushq %rax
pushq %rax
pushq $0x1f4                  # imm = 0x1F4
pushq %r9
callq 0x482f4
addq $0x70, %rsp
movq 0x68(%rsp), %rax
movq %r12, (%rax,%rbp,8)
movq %r12, (%rsp)
movq 0x28(%rsp), %rax
movq 0x68(%rax), %rsi
cmpq 0x70(%rax), %rsi
je 0x1b556
movq %r12, (%rsi)
addq $0x8, 0x68(%rax)
jmp 0x1b566
movq 0x170(%rsp), %rdi
movq %rsp, %rdx
callq 0x1dd4e
incq %rbp
leaq 0x53e90(%rip), %rax     # 0x6f400
movl (%rax), %eax
cmpq %rax, %rbp
jb 0x1af57
movl $0xb8, %edi
callq 0x73a0
leaq 0x10(%rsp), %rbx
leaq 0x53e6f(%rip), %r14     # 0x6f400
movq 0x88(%rsp), %r13
movq %rax, %r12
leaq 0x40(%rsp), %rax
movq %rax, -0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
leaq 0x30(%rsp), %rdi
callq 0xaf32
leaq 0x3c00f(%rip), %rsi     # 0x575d5
leaq 0x30(%rsp), %rdi
callq 0x7690
movq %rbx, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1b5f1
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1b5f9
movupd (%rcx), %xmm0
movupd %xmm0, (%rbx)
movq 0x8(%rax), %rdx
movq %rsp, %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movl (%r14), %ecx
leaq 0x53def(%rip), %rax     # 0x6f40c
movl (%rax), %r8d
leaq 0x53e59(%rip), %rax     # 0x6f480
movl (%rax), %r9d
leaq 0x53e53(%rip), %r15     # 0x6f484
movl (%r15), %eax
subq $0x8, %rsp
movq %r12, %rdi
movq 0x70(%rsp), %rdx
pushq %rax
callq 0x451f0
addq $0x10, %rsp
movq 0x28(%rsp), %rax
movq %r12, 0x58(%rax)
movq (%rsp), %rdi
cmpq %rbx, %rdi
je 0x1b661
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1b675
callq 0x7370
callq 0x28018
movq 0x28(%rsp), %rcx
movq 0x58(%rcx), %rsi
movq %rax, %rdi
callq 0x2808c
movq 0x58(%rsp), %rdi
callq 0x7480
movq 0x78(%rsp), %rdi
callq 0x7480
movl $0xb8, %edi
callq 0x73a0
movq %rax, %rcx
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x28(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
movq %rcx, 0x58(%rsp)
callq 0xaf32
leaq 0x3bf4e(%rip), %rsi     # 0x57628
leaq 0x30(%rsp), %rdi
callq 0x7690
movq %rbx, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1b705
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1b70d
movupd (%rcx), %xmm0
movupd %xmm0, (%rbx)
movq 0x8(%rax), %rdx
movq %rsp, %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movl (%r14), %ecx
leaq 0x53cdb(%rip), %rax     # 0x6f40c
movl (%rax), %r8d
leaq 0x53d45(%rip), %rax     # 0x6f480
movl (%rax), %r9d
movl (%r15), %eax
leaq 0x53d40(%rip), %rdx     # 0x6f488
movl (%rdx), %r10d
leaq 0x53d3a(%rip), %rdx     # 0x6f48c
movl (%rdx), %r11d
leaq 0x53d34(%rip), %rdx     # 0x6f490
movl (%rdx), %r14d
shrl $0x9, %r14d
leaq 0x53c56(%rip), %rdx     # 0x6f3c0
movsd (%rdx), %xmm0
leaq 0x53c03(%rip), %rdi     # 0x6f378
movl (%rdi), %r15d
leal 0x1(%r15), %edx
movl %edx, (%rdi)
leaq 0x53ce3(%rip), %rbx     # 0x6f468
movl (%rbx), %r12d
movq 0x58(%rsp), %rdi
xorl %edx, %edx
pushq %r15
pushq %r12
pushq 0x80(%rsp)
pushq %r13
pushq %r14
pushq %r11
pushq %r10
pushq %rax
callq 0x361dc
addq $0x40, %rsp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1b7bf
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
movq 0x58(%rsp), %r14
je 0x1b7d8
callq 0x7370
movq 0x28(%rsp), %rax
movq 0x58(%rax), %rax
movq %rax, 0x58(%r14)
callq 0x28018
movq %rax, %rdi
movq %r14, %rsi
callq 0x2808c
movq 0x28(%rsp), %rax
movq %r14, 0x50(%rax)
leaq 0x53c27(%rip), %rax     # 0x6f42c
movl (%rax), %r14d
movl %r14d, %ebp
andl $-0x2, %ebp
decl %r14d
leaq 0x53d38(%rip), %rax     # 0x6f550
movl (%rax), %eax
testl %eax, %eax
je 0x1b8a8
cmpl $0x1, %eax
jne 0x1cead
movl $0x108, %edi            # imm = 0x108
callq 0x73a0
movq %rax, 0x78(%rsp)
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x58(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xaf32
leaq 0x3bdca(%rip), %rsi     # 0x5762d
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x10(%rsp), %rsi
leaq 0x53b87(%rip), %rdi     # 0x6f400
leaq 0x53c04(%rip), %r15     # 0x6f484
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1b9e3
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1b9eb
movl $0xe8, %edi
callq 0x73a0
movq %rax, 0x78(%rsp)
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x58(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xaf32
leaq 0x3bd4d(%rip), %rsi     # 0x5762d
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x10(%rsp), %rsi
leaq 0x53b0a(%rip), %rdi     # 0x6f400
leaq 0x53b87(%rip), %r15     # 0x6f484
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1b91e
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1b926
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
xorl %r10d, %r10d
cmpl $0x2, %r14d
setb %r10b
xorl %r11d, %r11d
cmpl $0x2, %ebp
sete %r11b
movq 0x8(%rax), %rdx
movq %rsp, %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x58(%rax), %rcx
movl (%rdi), %r8d
leaq 0x53aa4(%rip), %rax     # 0x6f40c
movl (%rax), %r9d
leaq 0x53b0e(%rip), %rax     # 0x6f480
movl (%rax), %eax
movl (%r15), %r14d
leaq 0x53a7a(%rip), %r15     # 0x6f3f8
leaq 0x53a63(%rip), %r12     # 0x6f3e8
leaq 0x53a64(%rip), %r13     # 0x6f3f0
subq $0x8, %rsp
movq 0x80(%rsp), %rdi
movq 0x60(%rsp), %rdx
pushq %r10
pushq %r11
pushq (%r13)
pushq (%r12)
pushq (%r15)
pushq %r14
pushq %rax
callq 0x4aa48
addq $0x40, %rsp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1b9cb
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1baa4
jmp 0x1ba9f
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
xorl %r10d, %r10d
cmpl $0x2, %r14d
setb %r10b
xorl %r11d, %r11d
cmpl $0x2, %ebp
sete %r11b
movq 0x8(%rax), %rdx
movq %rsp, %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x58(%rax), %rcx
movl (%rdi), %r8d
leaq 0x539df(%rip), %rax     # 0x6f40c
movl (%rax), %r9d
leaq 0x53a49(%rip), %rax     # 0x6f480
movl (%rax), %eax
movl (%r15), %r14d
leaq 0x539b5(%rip), %r15     # 0x6f3f8
leaq 0x5399e(%rip), %r12     # 0x6f3e8
leaq 0x5399f(%rip), %r13     # 0x6f3f0
subq $0x8, %rsp
movq 0x80(%rsp), %rdi
movq 0x60(%rsp), %rdx
pushq %r10
pushq %r11
pushq (%r13)
pushq (%r12)
pushq (%r15)
pushq %r14
pushq %rax
callq 0x4da34
addq $0x40, %rsp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1ba90
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1baa4
callq 0x7370
callq 0x28018
movq %rax, %rdi
movq 0x78(%rsp), %rsi
callq 0x2808c
movq 0x58(%rsp), %rax
movq 0x78(%rsp), %rcx
movq %rcx, 0x50(%rax)
movl $0x38, %edi
callq 0x73a0
movq %rax, %r12
movq 0x60(%rsp), %r14
movq 0x8(%r14), %rcx
subq (%r14), %rcx
movl (%rbx), %edx
shrq $0x3, %rcx
leaq 0x53916(%rip), %rax     # 0x6f400
movl (%rax), %r8d
leaq 0x53918(%rip), %rax     # 0x6f40c
movl (%rax), %r9d
leaq 0x53982(%rip), %rax     # 0x6f480
movl (%rax), %eax
leaq 0x5397d(%rip), %r13     # 0x6f484
movl (%r13), %r10d
leaq 0x53976(%rip), %rsi     # 0x6f488
movl (%rsi), %r11d
leaq 0x53970(%rip), %rsi     # 0x6f48c
movl (%rsi), %ebx
xorl %r15d, %r15d
movq %r12, %rdi
xorl %esi, %esi
pushq %rbx
pushq %r11
pushq %r10
pushq %rax
callq 0x3c38c
addq $0x20, %rsp
movq 0x58(%rsp), %rax
movq %r12, 0x88(%rsp)
movq %r12, 0x40(%rax)
movq %r15, 0xc0(%rsp)
xorpd %xmm0, %xmm0
movapd %xmm0, 0xb0(%rsp)
movq %r15, 0x100(%rsp)
movapd %xmm0, 0xf0(%rsp)
movq %r15, 0x150(%rsp)
movapd %xmm0, 0x140(%rsp)
movq %r15, 0xe0(%rsp)
movapd %xmm0, 0xd0(%rsp)
movq 0x8(%r14), %rax
movq (%r14), %rcx
movq %rax, %rbp
subq %rcx, %rbp
sarq $0x3, %rbp
cmpq %rcx, %rax
je 0x1c0e2
xorl %ebx, %ebx
leaq 0x537cf(%rip), %r12     # 0x6f380
leaq 0x30(%rsp), %r14
xorl %r15d, %r15d
movl (%r12), %eax
cmpl $0x1, %eax
je 0x1be34
testl %eax, %eax
jne 0x1c0c7
xorpd %xmm0, %xmm0
movapd %xmm0, (%rsp)
movq $0x0, 0x10(%rsp)
leaq 0xb0(%rsp), %rdi
movq %rsp, %rsi
callq 0x1dc00
movl $0x0, 0x30(%rsp)
leaq 0x53801(%rip), %r15     # 0x6f400
cmpl $0x0, (%r15)
leaq 0x90(%rsp), %rbp
je 0x1bc4c
xorl %eax, %eax
movq 0xb0(%rsp), %rcx
leaq (%rbx,%rbx,2), %rdx
leaq (%rcx,%rdx,8), %rdi
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1bc35
movl %eax, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1bc3d
movq %r14, %rdx
callq 0x1e0f4
movl 0x30(%rsp), %eax
incl %eax
movl %eax, 0x30(%rsp)
cmpl (%r15), %eax
jb 0x1bc0f
xorpd %xmm0, %xmm0
movapd %xmm0, 0x30(%rsp)
movq $0x0, 0x40(%rsp)
leaq 0xf0(%rsp), %rdi
movq %r14, %rsi
callq 0x1dc00
movl $0x0, 0x90(%rsp)
leaq 0x5378b(%rip), %rax     # 0x6f40c
cmpl $0x0, (%rax)
leaq 0x537f5(%rip), %r15     # 0x6f480
je 0x1bcd8
xorl %eax, %eax
movq 0xf0(%rsp), %rcx
leaq (%rbx,%rbx,2), %rdx
leaq (%rcx,%rdx,8), %rdi
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1bcb5
movl %eax, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1bcbd
movq %rbp, %rdx
callq 0x1e0f4
movl 0x90(%rsp), %eax
incl %eax
movl %eax, 0x90(%rsp)
leaq 0x53738(%rip), %rcx     # 0x6f40c
cmpl (%rcx), %eax
jb 0x1bc8f
xorpd %xmm0, %xmm0
movapd %xmm0, 0x90(%rsp)
movq $0x0, 0xa0(%rsp)
leaq 0x140(%rsp), %rdi
movq %rbp, %rsi
callq 0x1dc00
movl $0x0, 0x120(%rsp)
cmpl $0x0, (%r15)
leaq 0x120(%rsp), %rbp
je 0x1bd5f
xorl %eax, %eax
movq 0x140(%rsp), %rcx
leaq (%rbx,%rbx,2), %rdx
leaq (%rcx,%rdx,8), %rdi
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1bd42
movl %eax, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1bd4a
movq %rbp, %rdx
callq 0x1e0f4
movl 0x120(%rsp), %eax
incl %eax
movl %eax, 0x120(%rsp)
cmpl (%r15), %eax
jb 0x1bd1c
xorpd %xmm0, %xmm0
movapd %xmm0, 0x120(%rsp)
movq $0x0, 0x130(%rsp)
leaq 0xd0(%rsp), %rdi
movq %rbp, %rsi
callq 0x1dc00
movl $0x0, 0x84(%rsp)
cmpl $0x0, (%r13)
leaq 0x84(%rsp), %r15
je 0x1bde8
xorl %eax, %eax
movq 0xd0(%rsp), %rcx
leaq (%rbx,%rbx,2), %rdx
leaq (%rcx,%rdx,8), %rdi
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1bdca
movl %eax, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1bdd2
movq %r15, %rdx
callq 0x1e0f4
movl 0x84(%rsp), %eax
incl %eax
movl %eax, 0x84(%rsp)
cmpl (%r13), %eax
jb 0x1bda4
movq 0x120(%rsp), %rdi
testq %rdi, %rdi
je 0x1bdfa
callq 0x7370
movq 0x90(%rsp), %rdi
testq %rdi, %rdi
je 0x1be0c
callq 0x7370
movq 0x30(%rsp), %rdi
testq %rdi, %rdi
je 0x1be1b
callq 0x7370
movq (%rsp), %rdi
testq %rdi, %rdi
je 0x1be29
callq 0x7370
movl $0x1, %r15d
jmp 0x1c0c7
xorpd %xmm0, %xmm0
movapd %xmm0, (%rsp)
movq $0x0, 0x10(%rsp)
leaq 0xb0(%rsp), %rdi
movq %rsp, %rsi
callq 0x1dc00
movq 0x60(%rsp), %rax
movq (%rax), %rax
movq (%rax,%rbx,8), %rcx
cmpl $0x0, 0x3c(%rcx)
jle 0x1bebe
leaq (%rbx,%rbx,2), %r15
xorl %r13d, %r13d
xorl %r12d, %r12d
movq 0xb0(%rsp), %rdx
leaq (%rdx,%r15,8), %rdi
movq 0x18(%rcx), %rdx
addq %r13, %rdx
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1be9d
movl (%rdx), %ecx
movl %ecx, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1beaa
callq 0x1e0f4
movq 0x60(%rsp), %rax
movq (%rax), %rax
incq %r12
movq (%rax,%rbx,8), %rcx
movslq 0x3c(%rcx), %rdx
addq $0x4, %r13
cmpq %rdx, %r12
jl 0x1be72
xorpd %xmm0, %xmm0
movapd %xmm0, 0x30(%rsp)
movq $0x0, 0x40(%rsp)
leaq 0xf0(%rsp), %rdi
movq %r14, %rsi
callq 0x1dc00
movq 0x60(%rsp), %rax
movq (%rax), %rax
movq (%rax,%rbx,8), %rcx
cmpl $0x0, 0x40(%rcx)
jle 0x1bf49
xorl %r15d, %r15d
xorl %r13d, %r13d
movq 0xf0(%rsp), %rdx
leaq (%rbx,%rbx,2), %rsi
leaq (%rdx,%rsi,8), %rdi
movq 0x20(%rcx), %rdx
addq %r15, %rdx
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1bf28
movl (%rdx), %ecx
movl %ecx, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1bf35
callq 0x1e0f4
movq 0x60(%rsp), %rax
movq (%rax), %rax
incq %r13
movq (%rax,%rbx,8), %rcx
movslq 0x40(%rcx), %rdx
addq $0x4, %r15
cmpq %rdx, %r13
jl 0x1bef9
xorpd %xmm0, %xmm0
movapd %xmm0, 0x90(%rsp)
movq $0x0, 0xa0(%rsp)
leaq 0x140(%rsp), %rdi
leaq 0x90(%rsp), %rsi
callq 0x1dc00
movq 0x60(%rsp), %rax
movq (%rax), %rax
movq (%rax,%rbx,8), %rcx
cmpl $0x0, 0x44(%rcx)
leaq 0x533f2(%rip), %r12     # 0x6f380
jle 0x1bfe6
xorl %r15d, %r15d
xorl %r13d, %r13d
movq 0x140(%rsp), %rdx
leaq (%rbx,%rbx,2), %rsi
leaq (%rdx,%rsi,8), %rdi
movq 0x28(%rcx), %rdx
addq %r15, %rdx
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1bfc5
movl (%rdx), %ecx
movl %ecx, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1bfd2
callq 0x1e0f4
movq 0x60(%rsp), %rax
movq (%rax), %rax
incq %r13
movq (%rax,%rbx,8), %rcx
movslq 0x44(%rcx), %rdx
addq $0x4, %r15
cmpq %rdx, %r13
jl 0x1bf96
xorpd %xmm0, %xmm0
movapd %xmm0, 0x120(%rsp)
movq $0x0, 0x130(%rsp)
leaq 0xd0(%rsp), %rdi
leaq 0x120(%rsp), %rsi
callq 0x1dc00
movq 0x60(%rsp), %rax
movq (%rax), %rax
movq (%rax,%rbx,8), %rcx
cmpl $0x0, 0x48(%rcx)
jle 0x1c07c
xorl %r15d, %r15d
xorl %r13d, %r13d
movq 0xd0(%rsp), %rdx
leaq (%rbx,%rbx,2), %rsi
leaq (%rdx,%rsi,8), %rdi
movq 0x30(%rcx), %rdx
addq %r15, %rdx
movq 0x8(%rdi), %rsi
cmpq 0x10(%rdi), %rsi
je 0x1c05b
movl (%rdx), %ecx
movl %ecx, (%rsi)
addq $0x4, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x1c068
callq 0x1e0f4
movq 0x60(%rsp), %rax
movq (%rax), %rax
incq %r13
movq (%rax,%rbx,8), %rcx
movslq 0x48(%rcx), %rdx
addq $0x4, %r15
cmpq %rdx, %r13
jl 0x1c02c
movq 0x120(%rsp), %rdi
testq %rdi, %rdi
je 0x1c08e
callq 0x7370
movq 0x90(%rsp), %rdi
testq %rdi, %rdi
leaq 0x533e4(%rip), %r13     # 0x6f484
je 0x1c0a7
callq 0x7370
movq 0x30(%rsp), %rdi
testq %rdi, %rdi
je 0x1c0b6
callq 0x7370
movq (%rsp), %rdi
testq %rdi, %rdi
je 0x1c0c4
callq 0x7370
movl %ebp, %r15d
incl %ebx
movq 0x60(%rsp), %rax
movq 0x8(%rax), %rbp
subq (%rax), %rbp
sarq $0x3, %rbp
cmpq %rbx, %rbp
ja 0x1bbb9
leaq 0x53297(%rip), %rax     # 0x6f380
movl (%rax), %r14d
leaq 0x5330d(%rip), %rax     # 0x6f400
movl (%rax), %eax
movl %eax, 0x68(%rsp)
leaq 0x5330c(%rip), %rax     # 0x6f40c
movl (%rax), %r12d
movq %r13, %rax
leaq 0x53373(%rip), %rcx     # 0x6f480
movl (%rcx), %r13d
movl (%rax), %eax
movl %eax, 0x70(%rsp)
leaq 0x220(%rsp), %rdi
leaq 0xb0(%rsp), %rsi
callq 0x1dc2c
leaq 0x208(%rsp), %rdi
leaq 0xf0(%rsp), %rsi
callq 0x1dc2c
leaq 0x1f0(%rsp), %rdi
leaq 0x140(%rsp), %rsi
callq 0x1dc2c
leaq 0x250(%rsp), %rbx
leaq 0xd0(%rsp), %rsi
movq %rbx, %rdi
callq 0x1dc2c
leaq 0x53314(%rip), %rax     # 0x6f488
movl (%rax), %eax
leaq 0x5330f(%rip), %rcx     # 0x6f48c
movl (%rcx), %r10d
leaq 0x53309(%rip), %rcx     # 0x6f490
movl (%rcx), %r11d
shrl $0x9, %r11d
leaq 0x5322b(%rip), %rcx     # 0x6f3c0
movsd (%rcx), %xmm0
subq $0x8, %rsp
movl %r14d, %edi
movl %ebp, %esi
movl 0x70(%rsp), %edx
movl %r12d, %ecx
movl %r13d, %r8d
movl 0x78(%rsp), %r9d
pushq %r11
pushq %r10
pushq %rax
pushq %rbx
leaq 0x218(%rsp), %rax
pushq %rax
leaq 0x238(%rsp), %rax
pushq %rax
leaq 0x258(%rsp), %rax
pushq %rax
callq 0x52412
addq $0x40, %rsp
leaq 0x250(%rsp), %rdi
callq 0x1dcbe
leaq 0x1f0(%rsp), %rdi
callq 0x1dcbe
leaq 0x208(%rsp), %rdi
callq 0x1dcbe
leaq 0x220(%rsp), %rdi
callq 0x1dcbe
leaq 0x5332a(%rip), %rax     # 0x6f540
movl (%rax), %eax
testl %eax, %eax
je 0x1c2a5
cmpl $0x1, %eax
jne 0x1cee1
movl $0xa8, %edi
callq 0x73a0
movq %rax, 0x68(%rsp)
movq %rsp, %rdi
leaq 0x10(%rsp), %rax
movq %rax, (%rdi)
movq 0x58(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xaf32
leaq 0x3b425(%rip), %rsi     # 0x57684
movq %rsp, %rdi
callq 0x7690
leaq 0x53216(%rip), %rdi     # 0x6f484
leaq 0x198(%rsp), %rsi
movq %rsi, -0x10(%rsi)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1c514
movq %rdx, 0x188(%rsp)
movq (%rcx), %rdx
movq %rdx, 0x198(%rsp)
jmp 0x1c51c
movl $0xc8, %edi
callq 0x73a0
movq %rax, 0x68(%rsp)
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x58(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xaf32
leaq 0x3b3a7(%rip), %rsi     # 0x57684
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x53196(%rip), %rdi     # 0x6f484
leaq 0x10(%rsp), %rsi
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1c314
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1c31c
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rdx, 0x8(%rsp)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x58(%rax), %r12
leaq 0x53200(%rip), %rax     # 0x6f544
movb (%rax), %bl
leaq 0x5306b(%rip), %rax     # 0x6f3b8
movl (%rax), %r14d
leaq 0x531f5(%rip), %rax     # 0x6f54c
movl (%rax), %r13d
leaq 0x5309f(%rip), %rax     # 0x6f400
movl (%rax), %eax
movq %rax, 0x70(%rsp)
leaq 0x5309d(%rip), %rax     # 0x6f40c
movl (%rax), %eax
movq %rax, 0x118(%rsp)
leaq 0x53100(%rip), %rax     # 0x6f480
movl (%rax), %eax
movq %rax, 0x168(%rsp)
movl (%rdi), %eax
movq %rax, 0x160(%rsp)
leaq 0x1d8(%rsp), %rdi
leaq 0xb0(%rsp), %rsi
callq 0x1dc2c
leaq 0x1c0(%rsp), %rdi
leaq 0xf0(%rsp), %rsi
callq 0x1dc2c
leaq 0x1a8(%rsp), %rdi
leaq 0x140(%rsp), %rsi
callq 0x1dc2c
movq %r13, 0x178(%rsp)
movq %r14, 0x180(%rsp)
leaq 0x238(%rsp), %rbp
leaq 0xd0(%rsp), %rsi
movq %rbp, %rdi
callq 0x1dc2c
leaq 0x53086(%rip), %rax     # 0x6f488
movl (%rax), %eax
leaq 0x53081(%rip), %rcx     # 0x6f48c
movl (%rcx), %r10d
leaq 0x5307b(%rip), %rcx     # 0x6f490
movl (%rcx), %r14d
movl %r14d, %r11d
shrl $0x9, %r11d
leaq 0x52f9a(%rip), %rcx     # 0x6f3c0
movsd (%rcx), %xmm0
leaq 0x53117(%rip), %rcx     # 0x6f548
movl (%rcx), %r13d
subq $0x8, %rsp
movzbl %bl, %r9d
leaq 0x8(%rsp), %rsi
movq 0x70(%rsp), %rdi
movq 0x60(%rsp), %rdx
movq %r12, %rcx
movq 0x90(%rsp), %r8
pushq $0x1
pushq %r13
pushq %r14
pushq %r11
pushq %r10
pushq %rax
pushq %rbp
leaq 0x1e8(%rsp), %rax
pushq %rax
leaq 0x208(%rsp), %rax
pushq %rax
leaq 0x228(%rsp), %rax
pushq %rax
pushq 0x1b8(%rsp)
pushq 0x1c8(%rsp)
pushq 0x180(%rsp)
pushq 0xe0(%rsp)
pushq %r15
pushq 0x1f8(%rsp)
pushq 0x208(%rsp)
callq 0x29ec6
addq $0x90, %rsp
leaq 0x238(%rsp), %rdi
callq 0x1dcbe
leaq 0x1a8(%rsp), %rdi
callq 0x1dcbe
leaq 0x1c0(%rsp), %rdi
callq 0x1dcbe
leaq 0x1d8(%rsp), %rdi
callq 0x1dcbe
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1c4fc
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1c5fb
jmp 0x1c5f6
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
leaq 0x188(%rsp), %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x58(%rax), %rcx
leaq 0x52ff9(%rip), %rax     # 0x6f544
movzbl (%rax), %r9d
leaq 0x52eaa(%rip), %rax     # 0x6f400
movl (%rax), %eax
leaq 0x52ead(%rip), %rdx     # 0x6f40c
movl (%rdx), %r10d
leaq 0x52f17(%rip), %rdx     # 0x6f480
movl (%rdx), %r11d
movl (%rdi), %r14d
leaq 0x52f12(%rip), %rdx     # 0x6f488
movl (%rdx), %r12d
leaq 0x52f0c(%rip), %rdx     # 0x6f48c
movl (%rdx), %r13d
leaq 0x52f06(%rip), %rdx     # 0x6f490
movl (%rdx), %ebx
leaq 0x52e2d(%rip), %rdx     # 0x6f3c0
movsd (%rdx), %xmm0
movl %ebx, %ebp
shrl $0x9, %ebp
subq $0x8, %rsp
movq 0x70(%rsp), %rdi
movq 0x60(%rsp), %rdx
movq 0x90(%rsp), %r8
pushq $0x1
pushq $0x0
pushq %rbx
pushq %rbp
pushq %r13
pushq %r12
pushq %r14
pushq %r11
pushq %r10
pushq %rax
pushq %r15
callq 0x29224
addq $0x60, %rsp
movq 0x188(%rsp), %rdi
leaq 0x198(%rsp), %rax
cmpq %rax, %rdi
leaq 0x10(%rsp), %rbx
je 0x1c5ed
callq 0x7370
movq (%rsp), %rdi
cmpq %rbx, %rdi
je 0x1c5fb
callq 0x7370
callq 0x28018
movq %rax, %rdi
movq 0x68(%rsp), %rsi
callq 0x2808c
movq 0x58(%rsp), %r15
movq 0x68(%rsp), %rax
movq %rax, 0x38(%r15)
movq 0x60(%rsp), %rcx
movq (%rcx), %rax
movq 0x8(%rcx), %rcx
subq %rax, %rcx
je 0x1c66c
sarq $0x3, %rcx
xorpd %xmm0, %xmm0
xorl %edx, %edx
leaq 0x10(%rsp), %rbx
leaq 0x52dbe(%rip), %r14     # 0x6f400
leaq 0x52e3b(%rip), %r12     # 0x6f484
movq (%rax,%rdx,8), %rsi
movl 0x38(%rsi), %esi
xorps %xmm1, %xmm1
cvtsi2sd %rsi, %xmm1
maxsd %xmm0, %xmm1
incq %rdx
movl %edx, %esi
movapd %xmm1, %xmm0
cmpq %rsi, %rcx
ja 0x1c649
jmp 0x1c683
xorpd %xmm1, %xmm1
leaq 0x10(%rsp), %rbx
leaq 0x52d84(%rip), %r14     # 0x6f400
leaq 0x52e01(%rip), %r12     # 0x6f484
movsd %xmm1, 0x70(%rsp)
movl $0x118, %edi            # imm = 0x118
callq 0x73a0
movq %rax, 0x118(%rsp)
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x8(%r15), %rsi
movq 0x10(%r15), %rdx
addq %rsi, %rdx
callq 0xaf32
leaq 0x3b021(%rip), %rsi     # 0x576e0
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x52db0(%rip), %rdi     # 0x6f480
movsd 0x70(%rsp), %xmm0
divsd 0x3a7c2(%rip), %xmm0    # 0x56ea0
movsd %xmm0, 0x70(%rsp)
movq %rbx, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1c705
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1c70d
movupd (%rcx), %xmm0
movupd %xmm0, (%rbx)
movq 0x8(%rax), %rdx
movq %rsp, %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x58(%rax), %r9
leaq 0x52c99(%rip), %rax     # 0x6f3d0
movl (%rax), %eax
movq %rax, 0x168(%rsp)
leaq 0x52c80(%rip), %rax     # 0x6f3c8
movsd (%rax), %xmm0
leaq 0x52c81(%rip), %rax     # 0x6f3d4
movzbl (%rax), %eax
movq %rax, 0x160(%rsp)
leaq 0x52c73(%rip), %rax     # 0x6f3d8
movsd (%rax), %xmm1
movl (%r14), %r11d
leaq 0x52c99(%rip), %rax     # 0x6f40c
movl (%rax), %ebx
movl (%rdi), %r15d
movl (%r12), %r12d
leaq 0x52d05(%rip), %rax     # 0x6f488
movl (%rax), %r13d
leaq 0x52cff(%rip), %rax     # 0x6f48c
movl (%rax), %ebp
leaq 0x52be2(%rip), %rdx     # 0x6f378
movl (%rdx), %ecx
leal 0x1(%rcx), %eax
movl %eax, (%rdx)
leaq 0x52cec(%rip), %rax     # 0x6f490
movl (%rax), %eax
shrl $0x9, %eax
xorl %r14d, %r14d
testl %ecx, %ecx
leaq 0x52d9f(%rip), %rcx     # 0x6f554
movzbl (%rcx), %r10d
setne %r14b
subq $0x8, %rsp
movq 0x120(%rsp), %rdi
movq 0x70(%rsp), %rdx
movq 0x90(%rsp), %rcx
movq 0x80(%rsp), %r8
movsd 0x78(%rsp), %xmm2
pushq $0x1b0                  # imm = 0x1B0
pushq $0x64
pushq $0x1
pushq %r14
pushq $0xa
pushq %r10
pushq %rax
pushq %rbp
pushq %r13
pushq %r12
pushq %r15
pushq %rbx
pushq %r11
pushq 0x1d0(%rsp)
pushq 0x1e0(%rsp)
callq 0x3fbfc
addq $0x80, %rsp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
movq 0x58(%rsp), %rbx
je 0x1c830
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
leaq 0x52c40(%rip), %r13     # 0x6f484
je 0x1c84b
callq 0x7370
callq 0x28018
movq 0x118(%rsp), %r14
movq %rax, %rdi
movq %r14, %rsi
callq 0x2808c
movq 0x88(%rsp), %rdi
movq %r14, %rsi
callq 0x3d496
movq %r14, 0x48(%rbx)
movq 0x60(%rsp), %rax
movq (%rax), %rbx
movq 0x8(%rax), %r12
movq %r12, %rax
subq %rbx, %rax
movq %rax, %r15
sarq $0x3, %r15
movq %r15, %rcx
shrq $0x3e, %rcx
sarq %rax
xorl %edi, %edi
negq %rcx
sbbq %rdi, %rdi
orq %rax, %rdi
callq 0x7030
movq %rax, %r14
cmpq %rbx, %r12
je 0x1c8c9
xorl %eax, %eax
movq (%rbx,%rax,8), %rcx
movl 0x8(%rcx), %ecx
movl %ecx, (%r14,%rax,4)
incq %rax
movl %eax, %ecx
cmpq %rcx, %r15
ja 0x1c8b4
leaq 0x52ab8(%rip), %rax     # 0x6f388
movl (%rax), %eax
testl %eax, %eax
je 0x1c95e
cmpl $0x1, %eax
jne 0x1cf13
movl $0x110, %edi            # imm = 0x110
callq 0x73a0
movq %rax, %r12
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x28(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xaf32
leaq 0x3add4(%rip), %rsi     # 0x576ed
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x10(%rsp), %rsi
leaq 0x52ad1(%rip), %rdi     # 0x6f400
leaq 0x52b4a(%rip), %r15     # 0x6f480
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1cac6
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1cace
movl $0x100, %edi            # imm = 0x100
callq 0x73a0
movq %rax, %r12
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x28(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xaf32
leaq 0x3ad59(%rip), %rsi     # 0x576ed
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x10(%rsp), %rsi
leaq 0x52a56(%rip), %rdi     # 0x6f400
leaq 0x52acf(%rip), %rbx     # 0x6f480
movq %rsi, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1c9d2
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1c9da
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rsp, %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x58(%rax), %r8
leaq 0x52988(%rip), %rax     # 0x6f38c
movl (%rax), %r9d
leaq 0x52982(%rip), %rax     # 0x6f390
movl (%rax), %eax
leaq 0x5297d(%rip), %rcx     # 0x6f394
movl (%rcx), %r10d
leaq 0x52977(%rip), %rcx     # 0x6f398
leaq 0x52a68(%rip), %rdx     # 0x6f490
movl (%rdx), %ebp
movl %ebp, %r13d
imull (%rdi), %ebp
movl (%rcx), %r11d
leaq 0x529d2(%rip), %rcx     # 0x6f40c
imull (%rcx), %ebp
imull (%rbx), %ebp
movq 0x60(%rsp), %rcx
movq 0x8(%rcx), %rbx
subq (%rcx), %rbx
leaq 0x52a31(%rip), %rcx     # 0x6f484
imull (%rcx), %ebp
leaq 0x52953(%rip), %r15     # 0x6f3b0
shrq $0x3, %rbx
shrl $0x9, %r13d
shrl $0x9, %ebp
movq %r12, %rdi
xorl %edx, %edx
movq 0x58(%rsp), %rcx
pushq %rbp
pushq %r13
pushq %rbx
pushq %r14
pushq (%r15)
leaq 0x52926(%rip), %rbx     # 0x6f3a8
pushq (%rbx)
leaq 0x52915(%rip), %rbx     # 0x6f3a0
pushq (%rbx)
pushq %r11
pushq %r10
pushq %rax
callq 0x3497c
addq $0x50, %rsp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1caae
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1cbbf
jmp 0x1cbba
movupd (%rcx), %xmm0
movupd %xmm0, (%rsi)
movq 0x8(%rax), %rdx
movq %rsp, %rsi
movq %rdx, 0x8(%rsi)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
movq 0x28(%rsp), %rax
movq 0x58(%rax), %r8
leaq 0x52894(%rip), %rax     # 0x6f38c
movl (%rax), %r9d
leaq 0x5288e(%rip), %rax     # 0x6f390
movl (%rax), %eax
leaq 0x52889(%rip), %rcx     # 0x6f394
movl (%rcx), %r10d
leaq 0x52883(%rip), %rcx     # 0x6f398
movl (%rcx), %r11d
leaq 0x52971(%rip), %rcx     # 0x6f490
movl (%rcx), %ebp
movl %ebp, %ebx
imull (%rdi), %ebp
leaq 0x528df(%rip), %rcx     # 0x6f40c
imull (%rcx), %ebp
imull (%r15), %ebp
imull (%r13), %ebp
leaq 0x529fc(%rip), %rcx     # 0x6f53c
movq 0x60(%rsp), %rdx
movq 0x8(%rdx), %r15
subq (%rdx), %r15
movl (%rcx), %r13d
shrq $0x3, %r15
shrl $0x9, %ebx
shrl $0x9, %ebp
subq $0x8, %rsp
movq %r12, %rdi
xorl %edx, %edx
movq 0x60(%rsp), %rcx
pushq %rbp
pushq %rbx
pushq %r15
pushq %r13
pushq %r14
leaq 0x5283a(%rip), %rbx     # 0x6f3b0
pushq (%rbx)
leaq 0x52829(%rip), %rbx     # 0x6f3a8
pushq (%rbx)
leaq 0x52818(%rip), %rbx     # 0x6f3a0
pushq (%rbx)
pushq %r11
pushq %r10
pushq %rax
callq 0x32528
addq $0x60, %rsp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1cbab
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1cbbf
callq 0x7370
callq 0x28018
movq %rax, %rdi
movq %r12, %rsi
callq 0x2808c
movq 0x58(%rsp), %rax
movq %r12, 0x30(%rax)
movq 0x28(%rsp), %rax
movq %r12, 0x48(%rax)
leaq 0x52798(%rip), %rax     # 0x6f380
movl (%rax), %eax
testl %eax, %eax
je 0x1cc5d
cmpl $0x1, %eax
jne 0x1cde8
movl $0x90, %edi
callq 0x73a0
movq %rax, %r14
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x28(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xaf32
leaq 0x3aaeb(%rip), %rsi     # 0x57718
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x10(%rsp), %rbx
movq %rbx, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1ccca
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1ccd2
movl $0x90, %edi
callq 0x73a0
movq %rax, %r14
leaq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
movq %rax, (%rdi)
movq 0x28(%rsp), %rax
movq 0x8(%rax), %rsi
movq 0x10(%rax), %rdx
addq %rsi, %rdx
callq 0xaf32
leaq 0x3aa85(%rip), %rsi     # 0x57718
leaq 0x30(%rsp), %rdi
callq 0x7690
leaq 0x10(%rsp), %r15
movq %r15, (%rsp)
movq (%rax), %rdx
movq %rax, %rcx
addq $0x10, %rcx
cmpq %rcx, %rdx
je 0x1cd6b
movq %rdx, (%rsp)
movq (%rcx), %rdx
movq %rdx, 0x10(%rsp)
jmp 0x1cd74
movupd (%rcx), %xmm0
movupd %xmm0, (%rbx)
movq 0x8(%rax), %rdx
movq %rdx, 0x8(%rsp)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
callq 0x531a2
leaq 0x5268e(%rip), %rcx     # 0x6f384
movzwl (%rcx), %ecx
movq 0x60(%rsp), %rdx
movq 0x8(%rdx), %r9
subq (%rdx), %r9
shrq $0x3, %r9
leaq 0x52676(%rip), %rdx     # 0x6f386
movzwl (%rdx), %r10d
leaq 0x52775(%rip), %rdx     # 0x6f490
movl (%rdx), %r11d
shrl $0x9, %r11d
subq $0x8, %rsp
leaq 0x8(%rsp), %rsi
movq %r14, %rdi
movq %rax, %rdx
movl %ecx, %r8d
pushq %r12
pushq %r11
pushq %r10
callq 0x41a10
addq $0x20, %rsp
movq 0x28(%rsp), %rax
movq %r14, 0x40(%rax)
movq (%rsp), %rdi
cmpq %rbx, %rdi
je 0x1cd5a
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1cde8
jmp 0x1cde3
movupd (%rcx), %xmm0
movupd %xmm0, (%r15)
movq 0x8(%rax), %rdx
movq %rdx, 0x8(%rsp)
movq %rcx, (%rax)
movq $0x0, 0x8(%rax)
movb $0x0, 0x10(%rax)
leaq 0x525f1(%rip), %rax     # 0x6f384
movzwl (%rax), %ebx
callq 0x531a2
leaq 0x526ee(%rip), %rcx     # 0x6f490
movl (%rcx), %r8d
shrl $0x9, %r8d
movzwl %bx, %edx
movq %rsp, %rsi
movq %r14, %rdi
movq %rax, %rcx
movq %r12, %r9
callq 0x43b12
movq 0x28(%rsp), %rax
movq %r14, 0x40(%rax)
movq (%rsp), %rdi
cmpq %r15, %rdi
je 0x1cdd4
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1cde8
callq 0x7370
callq 0x28018
movq 0x28(%rsp), %rcx
movq 0x40(%rcx), %rsi
movq %rax, %rdi
callq 0x2808c
movq 0x28(%rsp), %rax
movq 0x40(%rax), %rsi
movq %r12, %rdi
callq 0x3228a
leaq 0xd0(%rsp), %rdi
callq 0x1dcbe
leaq 0x140(%rsp), %rdi
callq 0x1dcbe
leaq 0xf0(%rsp), %rdi
callq 0x1dcbe
leaq 0xb0(%rsp), %rdi
callq 0x1dcbe
addq $0x268, %rsp            # imm = 0x268
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movl $0x10, %edi
callq 0x71d0
movq %rax, %rbx
leaq 0x3a8be(%rip), %rsi     # 0x57727
movq %rax, %rdi
callq 0x7680
movq 0x52150(%rip), %rsi     # 0x6efc8
movq 0x52129(%rip), %rdx     # 0x6efa8
movq %rbx, %rdi
callq 0x75e0
jmp 0x1cf13
movl $0x10, %edi
callq 0x71d0
movq %rax, %rbx
leaq 0x3a73a(%rip), %rsi     # 0x575da
movq %rax, %rdi
callq 0x7680
jmp 0x1cf81
movl $0x10, %edi
callq 0x71d0
movq %rax, %rbx
leaq 0x3a771(%rip), %rsi     # 0x57632
movq %rax, %rdi
callq 0x7680
movq 0x520f8(%rip), %rsi     # 0x6efc8
movq 0x520d1(%rip), %rdx     # 0x6efa8
movq %rbx, %rdi
callq 0x75e0
jmp 0x1cf13
movl $0x10, %edi
callq 0x71d0
movq %rax, %rbx
leaq 0x3a7a3(%rip), %rsi     # 0x57698
movq %rax, %rdi
callq 0x7680
movq 0x520c4(%rip), %rsi     # 0x6efc8
movq 0x5209d(%rip), %rdx     # 0x6efa8
movq %rbx, %rdi
callq 0x75e0
movq 0x520d6(%rip), %rdi     # 0x6eff0
leaq 0x39687(%rip), %rsi     # 0x565a8
movl $0x6, %edx
callq 0x7400
movq 0x520be(%rip), %rdi     # 0x6eff0
leaq 0x3a7bf(%rip), %rsi     # 0x576f8
movl $0x1f, %edx
callq 0x7400
movq 0x520a6(%rip), %rdi     # 0x6eff0
callq 0x71c0
movq 0x5207a(%rip), %rdi     # 0x6efd0
callq 0x7430
movl $0x1, %edi
callq 0x7440
movl $0x10, %edi
callq 0x71d0
movq %rax, %rbx
leaq 0x3a619(%rip), %rsi     # 0x57592
movq %rax, %rdi
callq 0x7680
movq 0x52040(%rip), %rsi     # 0x6efc8
movq 0x52019(%rip), %rdx     # 0x6efa8
movq %rbx, %rdi
callq 0x75e0
jmp 0x1d17b
movq %rax, %rbp
movq %rbx, %rdi
callq 0x72c0
jmp 0x1d3fa
jmp 0x1d17b
movq %rax, %rbp
jmp 0x1d19c
movq %rax, %rbp
jmp 0x1d1c3
movq %rax, %rbp
jmp 0x1d1d7
movq %rax, %rbp
jmp 0x1d1d7
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d01d
callq 0x7370
jmp 0x1d01d
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d004
callq 0x7370
jmp 0x1d004
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d036
callq 0x7370
jmp 0x1d036
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d031
callq 0x7370
jmp 0x1d03b
movq %rax, %rbp
jmp 0x1d03b
movq %rax, %rbp
movq %r12, %rdi
jmp 0x1d3f5
movq %rax, %rbp
leaq 0x238(%rsp), %rdi
callq 0x1dcbe
jmp 0x1d058
movq %rax, %rbp
leaq 0x1a8(%rsp), %rdi
callq 0x1dcbe
jmp 0x1d06a
movq %rax, %rbp
leaq 0x1c0(%rsp), %rdi
callq 0x1dcbe
jmp 0x1d07c
movq %rax, %rbp
leaq 0x1d8(%rsp), %rdi
callq 0x1dcbe
jmp 0x1d0ad
movq %rax, %rbp
movq 0x188(%rsp), %rdi
leaq 0x198(%rsp), %rax
cmpq %rax, %rdi
je 0x1d0de
callq 0x7370
jmp 0x1d0de
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d0c5
callq 0x7370
jmp 0x1d0c5
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d0f6
callq 0x7370
jmp 0x1d0f6
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d0f1
callq 0x7370
jmp 0x1d0f6
movq %rax, %rbp
movq 0x68(%rsp), %rdi
jmp 0x1d3f5
movq %rax, %rbp
jmp 0x1d0f6
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d151
callq 0x7370
jmp 0x1d151
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d138
callq 0x7370
jmp 0x1d138
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d16a
callq 0x7370
jmp 0x1d16a
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d165
callq 0x7370
jmp 0x1d16f
movq %rax, %rbp
jmp 0x1d16f
movq %rax, %rbp
movq 0x78(%rsp), %rdi
jmp 0x1d508
jmp 0x1d17b
movq %rax, %rbp
movq %rbx, %rdi
callq 0x72c0
jmp 0x1d512
movq %rax, %rbp
movq (%rsp), %rdi
cmpq %r15, %rdi
je 0x1d19c
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d1b0
callq 0x7370
jmp 0x1d1d7
movq %rax, %rbp
movq (%rsp), %rdi
cmpq %rbx, %rdi
je 0x1d1c3
callq 0x7370
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d1d7
callq 0x7370
movq %r14, %rdi
jmp 0x1d3f5
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d1fa
callq 0x7370
jmp 0x1d1fa
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d213
callq 0x7370
jmp 0x1d213
movq %rax, %rbp
movq 0x118(%rsp), %rdi
jmp 0x1d3f5
movq %rax, %rbp
leaq 0x250(%rsp), %rdi
callq 0x1dcbe
jmp 0x1d235
movq %rax, %rbp
leaq 0x1f0(%rsp), %rdi
callq 0x1dcbe
jmp 0x1d247
movq %rax, %rbp
leaq 0x208(%rsp), %rdi
callq 0x1dcbe
jmp 0x1d259
movq %rax, %rbp
leaq 0x220(%rsp), %rdi
callq 0x1dcbe
jmp 0x1d3fa
jmp 0x1d347
jmp 0x1d50f
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d290
callq 0x7370
jmp 0x1d290
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d2a9
callq 0x7370
jmp 0x1d2a9
movq %rax, %rbp
movq 0x58(%rsp), %rdi
jmp 0x1d508
movq %rax, %rbp
movq (%rsp), %rdi
cmpq %rbx, %rdi
je 0x1d2c9
callq 0x7370
jmp 0x1d2c9
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d2e2
callq 0x7370
jmp 0x1d2e2
movq %rax, %rbp
jmp 0x1d34a
movq %rax, %rbp
movq (%rsp), %rdi
cmpq %r14, %rdi
je 0x1d548
jmp 0x1d543
movq %rax, %rbp
jmp 0x1d548
jmp 0x1d50f
jmp 0x1d50f
jmp 0x1d50f
jmp 0x1d50f
jmp 0x1d33f
jmp 0x1d50f
jmp 0x1d33f
jmp 0x1d385
jmp 0x1d357
jmp 0x1d3b0
jmp 0x1d36e
jmp 0x1d3db
jmp 0x1d39c
jmp 0x1d3e9
jmp 0x1d3c7
jmp 0x1d50f
movq %rax, %rbp
jmp 0x1d3fa
movq %rax, %rbp
movq %r12, %rdi
jmp 0x1d508
jmp 0x1d50f
movq %rax, %rbp
movq 0x120(%rsp), %rdi
testq %rdi, %rdi
je 0x1d388
callq 0x7370
jmp 0x1d388
movq %rax, %rbp
movq 0x120(%rsp), %rdi
testq %rdi, %rdi
je 0x1d3b3
callq 0x7370
jmp 0x1d3b3
movq %rax, %rbp
movq 0x90(%rsp), %rdi
testq %rdi, %rdi
je 0x1d39f
callq 0x7370
jmp 0x1d39f
movq %rax, %rbp
movq 0x30(%rsp), %rdi
testq %rdi, %rdi
je 0x1d3de
callq 0x7370
jmp 0x1d3de
movq %rax, %rbp
movq 0x90(%rsp), %rdi
testq %rdi, %rdi
je 0x1d3ca
callq 0x7370
jmp 0x1d3ca
movq %rax, %rbp
movq 0x30(%rsp), %rdi
testq %rdi, %rdi
je 0x1d3ec
callq 0x7370
jmp 0x1d3ec
movq %rax, %rbp
movq (%rsp), %rdi
testq %rdi, %rdi
je 0x1d3fa
jmp 0x1d3f5
movq %rax, %rbp
movq (%rsp), %rdi
testq %rdi, %rdi
je 0x1d3fa
callq 0x7370
leaq 0xd0(%rsp), %rdi
callq 0x1dcbe
leaq 0x140(%rsp), %rdi
callq 0x1dcbe
leaq 0xf0(%rsp), %rdi
callq 0x1dcbe
leaq 0xb0(%rsp), %rdi
callq 0x1dcbe
jmp 0x1d512
movq %rax, %rbp
jmp 0x1d493
movq %rax, %rbp
movq (%rsp), %rdi
leaq 0x10(%rsp), %rax
cmpq %rax, %rdi
je 0x1d45b
callq 0x7370
jmp 0x1d45b
movq %rax, %rbp
jmp 0x1d4eb
movq %rax, %rbp
movq 0x90(%rsp), %rdi
leaq 0xa0(%rsp), %rax
cmpq %rax, %rdi
je 0x1d47f
callq 0x7370
jmp 0x1d47f
movq %rax, %rbp
jmp 0x1d4ad
movq %rax, %rbp
movq 0x30(%rsp), %rdi
leaq 0x40(%rsp), %rax
cmpq %rax, %rdi
je 0x1d493
callq 0x7370
leaq 0xc0(%rsp), %rax
movq 0xb0(%rsp), %rdi
cmpq %rax, %rdi
je 0x1d4ad
callq 0x7370
movq 0xd0(%rsp), %rdi
leaq 0xe0(%rsp), %rax
cmpq %rax, %rdi
je 0x1d4d1
callq 0x7370
jmp 0x1d4d1
movq %rax, %rbp
jmp 0x1d505
movq %rax, %rbp
movq 0xf0(%rsp), %rdi
leaq 0x100(%rsp), %rax
cmpq %rax, %rdi
je 0x1d4eb
callq 0x7370
movq 0x140(%rsp), %rdi
leaq 0x150(%rsp), %rax
cmpq %rax, %rdi
je 0x1d505
callq 0x7370
movq %r13, %rdi
callq 0x7370
jmp 0x1d512
movq %rax, %rbp
movq 0x170(%rsp), %rax
movq (%rax), %rdi
testq %rdi, %rdi
je 0x1d527
callq 0x7370
leaq 0x5053a(%rip), %rax     # 0x6da68
movq 0x28(%rsp), %rcx
movq %rax, (%rcx)
movq 0x8(%rcx), %rdi
addq $0x18, %rcx
cmpq %rcx, %rdi
je 0x1d548
callq 0x7370
movq %rbp, %rdi
callq 0x7620