// File: /workspace/github_cpp_makefile_star2_O1/jkingan[P]ladyheather/heathmsc.cpp
// Function: adevs_active(int)
int adevs_active(int check_enable)
{
int i;
static int last_ticc_i = 0;

   // NEW_RCVR

   // return true if we might have adevs to display
   //   0x01 : pps_offset available
   //   0x02 : osc_offset available
   //   0x04 : TICC channel C available
   //   0x08 : TICC channel D available
   //   0x80 : flags that bits 0x01 and 0x02 are guessed

   if(no_adev_flag) return 0;

   if(check_enable) {
      if     (pps_adev_period > 0.0) ;        // aaaallll
      else if(osc_adev_period > 0.0) ;
      else if(chc_adev_period > 0.0) ;
      else if(chd_adev_period > 0.0) ;
      else if(adev_period <= 0.0) {
         return 0;
      }
   }

   if(jitter_adev) return 0x03;

   i = 0;
   if(rcvr_type == TICC_RCVR) {
      if(have_pps_offset) i |= 0x01;
      if(have_osc_offset) i |= 0x02;
      if(have_chc_offset) i |= 0x04;
      if(have_chd_offset) i |= 0x08;
      if(mtie_q_count[CHA_MTIE]) i |= 0x01;
      if(mtie_q_count[CHB_MTIE]) i |= 0x02;
      if(mtie_q_count[CHC_MTIE]) i |= 0x04;
      if(mtie_q_count[CHD_MTIE]) i |= 0x08;
      if(sim_file && (i == 0)) return last_ticc_i;
      last_ticc_i = i;
      return i;
   }
   else if(TICC_USED) {
      if(ticc_mode == 'I') return 0x01;   // time interval
      if(ticc_mode == 'F') return 0x01;   // frequency counter
      return 0x03;   // aaaacccc
   }
   else {
      if(luxor) return 0;
      if(NO_ADEV_INFO) return 0;
   }

   if(rcvr_type == PRS_RCVR) ;   // SRO_RCVR?  LPFRS_RCVR  SA35_RCVR?
   else if(GPSDO) ;
   else if(!TIMING_RCVR) return 0;
///   else if(TIMING_RCVR) return 0;

   if(rcvr_type == BRANDY_RCVR) {
      if(have_pps_offset) return 0x01;
      else                return 0x01;
   }

   if(have_pps_offset && have_osc_offset) return 0x03;
   else if(have_pps_offset) return 0x01;
   else if(have_osc_offset) return 0x02;

   return 0x83;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r14
pushq %rbx
leaq 0x16484f(%rip), %rax    # 0x23cd34
xorl %ebx, %ebx
cmpl $0x0, (%rax)
jne 0xd8556
testl %edi, %edi
je 0xd8545
leaq 0x164809(%rip), %rax    # 0x23cd00
movsd (%rax), %xmm1
xorpd %xmm0, %xmm0
ucomisd %xmm0, %xmm1
ja 0xd8545
leaq 0x1647fc(%rip), %rax    # 0x23cd08
movsd (%rax), %xmm1
ucomisd %xmm0, %xmm1
ja 0xd8545
leaq 0x1647f3(%rip), %rax    # 0x23cd10
movsd (%rax), %xmm1
ucomisd %xmm0, %xmm1
ja 0xd8545
leaq 0x1647ea(%rip), %rax    # 0x23cd18
movsd (%rax), %xmm1
ucomisd %xmm0, %xmm1
ja 0xd8545
leaq 0x1647b9(%rip), %rax    # 0x23ccf8
ucomisd (%rax), %xmm0
jae 0xd8556
leaq 0x164778(%rip), %rax    # 0x23ccc4
cmpl $0x0, (%rax)
je 0xd855d
movl $0x3, %ebx
movl %ebx, %eax
popq %rbx
popq %r14
popq %rbp
retq
leaq 0x14036c(%rip), %r14    # 0x2188d0
cmpq $0x10000, (%r14)        # imm = 0x10000
jne 0xd8607
leaq 0x234cc0(%rip), %rax    # 0x30d238
xorl %ecx, %ecx
cmpl $0x0, (%rax)
setne %cl
leaq 0x234cad(%rip), %rax    # 0x30d234
leal 0x2(%rcx), %edx
cmpl $0x0, (%rax)
cmovel %ecx, %edx
leaq 0x234ca5(%rip), %rax    # 0x30d23c
leal 0x4(%rdx), %ecx
cmpl $0x0, (%rax)
cmovel %edx, %ecx
leaq 0x234c99(%rip), %rax    # 0x30d240
leal 0x8(%rcx), %edx
cmpl $0x0, (%rax)
cmovel %ecx, %edx
xorl %eax, %eax
cmpl $0x0, 0x37c837(%rip)    # 0x454df0
setne %al
orl %edx, %eax
movl %eax, %ecx
orl $0x2, %ecx
cmpl $0x0, 0x37c82a(%rip)    # 0x454df4
cmovel %eax, %ecx
movl %ecx, %eax
orl $0x4, %eax
cmpl $0x0, 0x37c81f(%rip)    # 0x454df8
cmovel %ecx, %eax
movl %eax, %ebx
orl $0x8, %ebx
cmpl $0x0, 0x37c814(%rip)    # 0x454dfc
cmovel %eax, %ebx
leaq 0x165dce(%rip), %rax    # 0x23e3c0
cmpq $0x0, (%rax)
je 0xd8635
testl %ebx, %ebx
jne 0xd8635
movl 0x37cede(%rip), %ebx    # 0x4554e0
jmp 0xd8556
callq 0x701f2
testl %eax, %eax
je 0xd8640
leaq 0x2346f5(%rip), %rax    # 0x30cd0c
movl (%rax), %eax
xorl %ecx, %ecx
cmpl $0x46, %eax
setne %cl
cmpl $0x49, %eax
leal 0x1(%rcx,%rcx), %eax
movl $0x1, %ebx
cmovnel %eax, %ebx
jmp 0xd8556
movl %ebx, 0x37cea5(%rip)    # 0x4554e0
jmp 0xd8556
leaq 0x1668f7(%rip), %rax    # 0x23ef3e
cmpb $0x0, (%rax)
jne 0xd8556
movq (%r14), %rax
cmpq $0x1, %rax
sete %dl
leaq 0x142973(%rip), %rcx    # 0x21afd4
movl (%rcx), %ecx
cmpl $0x41, %ecx
sete %sil
andb %dl, %sil
leaq 0x140284(%rip), %rdx    # 0x2188f8
movl (%rdx), %edx
cmpl $0x47, %edx
sete %dil
testb %dil, %sil
jne 0xd8556
testb %sil, %sil
je 0xd869d
cmpl $0x33, %edx
je 0xd8556
cmpl $0x47, %edx
je 0xd8556
movabsq $0xcc0a0d4a2, %rdi      # imm = 0xCC0A0D4A2
testq %rdi, %rax
setne %dil
orb %sil, %dil
jne 0xd8556
cmpq $0x1000000, %rax        # imm = 0x1000000
je 0xd875d
cmpq $0x1, %rax
setne %r8b
leaq 0x140232(%rip), %rdi    # 0x218904
movb (%rdi), %dil
testb %dil, %dil
setne %r9b
orb %r8b, %r9b
cmpl $0x50, %ecx
sete %r8b
orb %r9b, %r8b
jne 0xd8701
leal -0x33(%rcx), %r8d
cmpl $0xe, %r8d
ja 0xd874c
movl $0x4009, %r9d           # imm = 0x4009
btl %r8d, %r9d
jae 0xd874c
testb %dil, %dil
setne %dil
testl $0x540010, %eax         # imm = 0x540010
setne %r8b
leaq 0x1428b8(%rip), %r9     # 0x21afd0
cmpl $0x0, (%r9)
setne %r9b
orb %r8b, %r9b
leaq 0x166803(%rip), %r8     # 0x23ef2d
cmpb $0x0, (%r8)
setne %r8b
leaq 0x1428ff(%rip), %r10    # 0x21b038
cmpl $0x0, (%r10)
setne %r10b
orb %r8b, %r10b
orb %r9b, %r10b
orb %dil, %r10b
je 0xd87a6
movl $0x1, %ebx
cmpq $0x40000, %rax          # imm = 0x40000
je 0xd8556
leaq 0x234ad4(%rip), %rax    # 0x30d238
movl (%rax), %eax
testl %eax, %eax
setne %dl
leaq 0x234ac2(%rip), %rcx    # 0x30d234
movl (%rcx), %ecx
testl %ecx, %ecx
setne %sil
movl $0x3, %ebx
testb %sil, %dl
jne 0xd8556
testl %ecx, %ecx
movl $0x2, %ecx
movl $0x83, %edx
cmovnel %ecx, %edx
testl %eax, %eax
movl $0x1, %ebx
cmovel %edx, %ebx
jmp 0xd8556
testb %sil, %sil
je 0xd87b5
cmpl $0x33, %edx
je 0xd874c
cmpl $0x47, %edx
je 0xd874c
cmpl $0x50, %ecx
sete %dl
cmpl $0x41, %ecx
sete %cl
cmpq $0x1, %rax
sete %sil
testl $0x944, %eax            # imm = 0x944
jne 0xd874c
orb %dl, %cl
andb %cl, %sil
je 0xd8556
jmp 0xd874c