// File: /workspace/github_cpp_makefile_star2_O2/CMU-SAFARI[P]MQSim/src/host/SATA_HBA.cpp
// Function: Host_Components::SATA_HBA::Execute_simulator_event(MQSimEngine::Sim_Event*)
void SATA_HBA::Execute_simulator_event(MQSimEngine::Sim_Event* event)
	{
		switch ((HBA_Sim_Events)event->Type)
		{
			case HBA_Sim_Events::CONSUME_IO_REQUEST:
			{
				Completion_Queue_Entry* cqe = consume_requests.front();
				consume_requests.pop();
				//Find the request and update statistics
				Host_IO_Request* request = sata_ncq.queue[cqe->Command_Identifier];
				sata_ncq.queue.erase(cqe->Command_Identifier);
				available_command_ids.insert(cqe->Command_Identifier);
				sata_ncq.Submission_queue_head = cqe->SQ_Head;

				((*IO_flows)[request->Source_flow_id])->SATA_consume_io_request(request);

				Update_and_submit_ncq_completion_info();

				//If the submission queue is not full anymore, then enqueue waiting requests
				while (waiting_requests_for_submission.size() > 0) {
					if (!SATA_SQ_FULL(sata_ncq) && available_command_ids.size() > 0)
					{
						Host_IO_Request* new_req = waiting_requests_for_submission.front();
						waiting_requests_for_submission.pop_front();
						if (sata_ncq.queue[*available_command_ids.begin()] != NULL) {
							PRINT_ERROR("Unexpteced situation in SATA_HBA! Overwriting a waiting I/O request in the queue!")
						} else {
							new_req->IO_queue_info = *available_command_ids.begin();
							sata_ncq.queue[*available_command_ids.begin()] = new_req;
							available_command_ids.erase(available_command_ids.begin());
							request_queue_in_memory[sata_ncq.Submission_queue_tail] = new_req;
							SATA_UPDATE_SQ_TAIL(sata_ncq);
						}
						new_req->Enqueue_time = Simulator->Time();
						pcie_root_complex->Write_to_device(sata_ncq.Submission_tail_register_address_on_device, sata_ncq.Submission_queue_tail);//Based on NVMe protocol definition, the updated tail pointer should be informed to the device
					} else {
						break;
					}
				}

				delete cqe;

				if(consume_requests.size() > 0) {
					Simulator->Register_sim_event(Simulator->Time() + hba_processing_delay, this, NULL, static_cast<int>(HBA_Sim_Events::CONSUME_IO_REQUEST));
				}
				break;
			}
			case HBA_Sim_Events::SUBMIT_IO_REQUEST:
			{
				Host_IO_Request* request = host_requests.front();
				host_requests.pop();

				//If the hardware queue is full
				if (SATA_SQ_FULL(sata_ncq) || available_command_ids.size() == 0) {
					waiting_requests_for_submission.push_back(request);
				} else {
					if (sata_ncq.queue[*available_command_ids.begin()] != NULL) {
						PRINT_ERROR("Unexpteced situation in IO_Flow_Base! Overwriting an unhandled I/O request in the queue!")
					} else {
						request->IO_queue_info = *available_command_ids.begin();
						sata_ncq.queue[*available_command_ids.begin()] = request;
						available_command_ids.erase(available_command_ids.begin());
						request_queue_in_memory[sata_ncq.Submission_queue_tail] = request;
						SATA_UPDATE_SQ_TAIL(sata_ncq);
					}
					request->Enqueue_time = Simulator->Time();
					pcie_root_complex->Write_to_device(sata_ncq.Submission_tail_register_address_on_device, sata_ncq.Submission_queue_tail);//Based on NVMe protocol definition, the updated tail pointer should be informed to the device
				}

				if (host_requests.size() > 0) {
					Simulator->Register_sim_event(Simulator->Time() + hba_processing_delay, this, NULL, static_cast<int>(HBA_Sim_Events::SUBMIT_IO_REQUEST));
				}

				break;
			}
		} //switch ((HBA_Sim_Events)event->Type)
	}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movq %rdi, %rbx
movl 0x18(%rsi), %eax
testl %eax, %eax
je 0x1d3b3
cmpl $0x1, %eax
jne 0x1d53f
leaq 0x110(%rbx), %rdi
movq 0x120(%rbx), %rax
movq (%rax), %r14
movq %rdi, 0x18(%rsp)
callq 0x1dbbc
leaq 0x78(%rbx), %r12
leaq 0xc(%r14), %rax
movq %rax, 0x10(%rsp)
movzwl 0xc(%r14), %eax
leaq 0x8(%rsp), %r13
movq %rax, (%r13)
movq %r12, %rdi
movq %r13, %rsi
callq 0x19d20
movq (%rax), %r15
movzwl 0xc(%r14), %eax
movq %rax, (%r13)
leaq 0x8(%rsp), %rsi
movq %r12, %rdi
callq 0x1a094
leaq 0xb0(%rbx), %rbp
movq %rbp, %rdi
movq 0x10(%rsp), %rsi
callq 0x19a84
movq %r14, 0x10(%rsp)
movzwl 0x8(%r14), %eax
movw %ax, 0x48(%rbx)
movq 0x40(%rbx), %rax
movzwl 0x22(%r15), %ecx
movq (%rax), %rax
movq (%rax,%rcx,8), %rdi
movq (%rdi), %rax
movq %r15, %rsi
callq *0x30(%rax)
movq %rbx, %rdi
callq 0x1d5ae
leaq 0xf8(%rbx), %r14
cmpq $0x0, 0x108(%rbx)
je 0x1d3ee
movzwl 0x4a(%rbx), %eax
movzwl 0x4c(%rbx), %ecx
decl %ecx
cmpl %eax, %ecx
jle 0x1d2e8
incl %eax
movzwl 0x48(%rbx), %ecx
cmpl %ecx, %eax
jne 0x1d2f3
jmp 0x1d3ee
cmpw $0x0, 0x48(%rbx)
je 0x1d3ee
cmpq $0x0, 0xd8(%rbx)
je 0x1d3ee
movq 0xf8(%rbx), %rax
movq 0x10(%rax), %r15
movq %r14, %rdi
callq 0x19970
movq 0xc8(%rbx), %rax
movzwl 0x20(%rax), %eax
movq %rax, 0x8(%rsp)
movq %r12, %rdi
movq %r13, %rsi
callq 0x19d20
cmpq $0x0, (%rax)
jne 0x1d54e
movq 0xc8(%rbx), %rax
movzwl 0x20(%rax), %eax
movw %ax, 0x20(%r15)
movq %rax, 0x8(%rsp)
movq %r12, %rdi
movq %r13, %rsi
callq 0x19d20
movq %r15, (%rax)
movq 0xc8(%rbx), %rsi
movq %rbp, %rdi
callq 0x1a1ae
movzwl 0x4a(%rbx), %eax
movq 0xe0(%rbx), %rcx
movq %r15, (%rcx,%rax,8)
incl %eax
cmpw 0x4c(%rbx), %ax
movl $0x0, %ecx
cmovel %ecx, %eax
movw %ax, 0x4a(%rbx)
callq 0x1f784
movq %rax, %rdi
callq 0x1fafc
movq %rax, 0x8(%r15)
movq 0x38(%rbx), %rdi
movq 0x50(%rbx), %rsi
movzwl 0x4a(%rbx), %edx
callq 0x1ce34
jmp 0x1d2bd
leaq 0x160(%rbx), %r14
movq 0x170(%rbx), %rax
movq (%rax), %r13
movq %r13, 0x8(%rsp)
movq %r14, %rdi
callq 0x1dc54
movzwl 0x4a(%rbx), %eax
movzwl 0x4c(%rbx), %ecx
decl %ecx
cmpl %eax, %ecx
jle 0x1d438
incl %eax
movzwl 0x48(%rbx), %ecx
cmpl %ecx, %eax
jne 0x1d443
jmp 0x1d4f5
movq 0x10(%rsp), %rdi
callq 0x7340
movq 0x18(%rsp), %rdi
callq 0x1dc0c
testq %rax, %rax
je 0x1d53f
callq 0x1f784
movq %rax, %r14
callq 0x1f784
movq %rax, %rdi
callq 0x1fafc
addq 0x30(%rbx), %rax
pushq $0x1
popq %r8
movq %r14, %rdi
movq %rax, %rsi
movq %rbx, %rdx
xorl %ecx, %ecx
jmp 0x1d53a
cmpw $0x0, 0x48(%rbx)
je 0x1d4f5
cmpq $0x0, 0xd8(%rbx)
je 0x1d4f5
leaq 0x78(%rbx), %r15
movq 0xc8(%rbx), %rax
movzwl 0x20(%rax), %eax
leaq 0x20(%rsp), %rsi
movq %rax, (%rsi)
movq %r15, %rdi
callq 0x19d20
cmpq $0x0, (%rax)
jne 0x1d58f
leaq 0xb0(%rbx), %r12
movq 0xc8(%rbx), %rax
movzwl 0x20(%rax), %eax
movw %ax, 0x20(%r13)
leaq 0x20(%rsp), %rsi
movq %rax, (%rsi)
movq %r15, %rdi
callq 0x19d20
movq %r13, (%rax)
movq 0xc8(%rbx), %rsi
movq %r12, %rdi
callq 0x1a1ae
movzwl 0x4a(%rbx), %eax
movq 0xe0(%rbx), %rcx
movq %r13, (%rcx,%rax,8)
incl %eax
xorl %ecx, %ecx
cmpw 0x4c(%rbx), %ax
cmovnel %eax, %ecx
movw %cx, 0x4a(%rbx)
callq 0x1f784
movq %rax, %rdi
callq 0x1fafc
movq %rax, 0x8(%r13)
movq 0x38(%rbx), %rdi
movq 0x50(%rbx), %rsi
movzwl 0x4a(%rbx), %edx
callq 0x1ce34
jmp 0x1d506
leaq 0xf8(%rbx), %rdi
leaq 0x8(%rsp), %rsi
callq 0x19978
movq %r14, %rdi
callq 0x1dca4
testq %rax, %rax
je 0x1d53f
callq 0x1f784
movq %rax, %r14
callq 0x1f784
movq %rax, %rdi
callq 0x1fafc
addq 0x30(%rbx), %rax
movq %r14, %rdi
movq %rax, %rsi
movq %rbx, %rdx
xorl %ecx, %ecx
xorl %r8d, %r8d
callq 0x1fb00
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x44a9b(%rip), %rbx     # 0x61ff0
leaq 0x2702c(%rip), %rsi     # 0x44588
movq %rbx, %rdi
callq 0x7360
leaq 0x289b7(%rip), %rsi     # 0x45f22
movq %rbx, %rdi
callq 0x7360
movq %rax, %rdi
callq 0x71a0
movq 0x44a4e(%rip), %rdi     # 0x61fd0
callq 0x73d0
pushq $0x1
popq %rdi
callq 0x73e0
movq 0x44a5a(%rip), %rbx     # 0x61ff0
leaq 0x26feb(%rip), %rsi     # 0x44588
movq %rbx, %rdi
callq 0x7360
leaq 0x283fe(%rip), %rsi     # 0x459aa
jmp 0x1d56b