// File: /workspace/github_c_makefile_star2_O3/mmcco[P]sljit/sljit_src/sljitNativeX86_common.c
// Function: emit_mov_byte
static int emit_mov_byte(struct sljit_compiler *compiler, int sign,
	int dst, long dstw,
	int src, long srcw)
{
	u_char* inst;
	int dst_r;
#if (defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32)
	int work_r;
#endif

#if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
	compiler->mode32 = 0;
#endif

	if (dst == SLJIT_UNUSED && !(src & SLJIT_MEM))
		return SLJIT_SUCCESS; /* Empty instruction. */

	if (src & SLJIT_IMM) {
		if (FAST_IS_REG(dst)) {
#if (defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32)
			return emit_do_imm(compiler, MOV_r_i32 + reg_map[dst], srcw);
#else
			inst = emit_x86_instruction(compiler, 1, SLJIT_IMM, srcw, dst, 0);
			FAIL_IF(!inst);
			*inst = MOV_rm_i32;
			return SLJIT_SUCCESS;
#endif
		}
		inst = emit_x86_instruction(compiler, 1 | EX86_BYTE_ARG | EX86_NO_REXW, SLJIT_IMM, srcw, dst, dstw);
		FAIL_IF(!inst);
		*inst = MOV_rm8_i8;
		return SLJIT_SUCCESS;
	}

	dst_r = FAST_IS_REG(dst) ? dst : TMP_REG1;

	if ((dst & SLJIT_MEM) && FAST_IS_REG(src)) {
#if (defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32)
		if (reg_map[src] >= 4) {
			SLJIT_ASSERT(dst_r == TMP_REG1);
			EMIT_MOV(compiler, TMP_REG1, 0, src, 0);
		} else
			dst_r = src;
#else
		dst_r = src;
#endif
	}
#if (defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32)
	else if (FAST_IS_REG(src) && reg_map[src] >= 4) {
		/* src, dst are regs. */
		SLJIT_ASSERT(SLOW_IS_REG(dst));
		if (reg_map[dst] < 4) {
			if (dst != src)
				EMIT_MOV(compiler, dst, 0, src, 0);
			inst = emit_x86_instruction(compiler, 2, dst, 0, dst, 0);
			FAIL_IF(!inst);
			*inst++ = GROUP_0F;
			*inst = sign ? MOVSX_r_rm8 : MOVZX_r_rm8;
		}
		else {
			if (dst != src)
				EMIT_MOV(compiler, dst, 0, src, 0);
			if (sign) {
				/* shl reg, 24 */
				inst = emit_x86_instruction(compiler, 1 | EX86_SHIFT_INS, SLJIT_IMM, 24, dst, 0);
				FAIL_IF(!inst);
				*inst |= SHL;
				/* sar reg, 24 */
				inst = emit_x86_instruction(compiler, 1 | EX86_SHIFT_INS, SLJIT_IMM, 24, dst, 0);
				FAIL_IF(!inst);
				*inst |= SAR;
			}
			else {
				inst = emit_x86_instruction(compiler, 1 | EX86_BIN_INS, SLJIT_IMM, 0xff, dst, 0);
				FAIL_IF(!inst);
				*(inst + 1) |= AND;
			}
		}
		return SLJIT_SUCCESS;
	}
#endif
	else {
		/* src can be memory addr or reg_map[src] < 4 on x86_32 architectures. */
		inst = emit_x86_instruction(compiler, 2, dst_r, 0, src, srcw);
		FAIL_IF(!inst);
		*inst++ = GROUP_0F;
		*inst = sign ? MOVSX_r_rm8 : MOVZX_r_rm8;
	}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl $0x0, 0x70(%rdi)
movl %r8d, %eax
andl $0x80, %eax
xorl %r14d, %r14d
orl %edx, %eax
je 0x17c79
movq %rcx, %r15
movl %edx, %ebp
movq %rdi, %rbx
testb $0x40, %r8b
jne 0x17bc0
cmpl $0x40, %ebp
movl $0xe, %r12d
cmovll %ebp, %r12d
testb %bpl, %bpl
sets %al
cmpl $0x40, %r8d
setl %cl
testb %cl, %al
je 0x17bf8
movl %r8d, %r12d
jmp 0x17c2c
cmpl $0x3f, %ebp
jg 0x17c51
xorl %r14d, %r14d
movq %rbx, %rdi
movl $0x1, %esi
movl $0x40, %edx
movq %r9, %rcx
movl %ebp, %r8d
xorl %r9d, %r9d
callq 0x15da2
testq %rax, %rax
je 0x17c76
movb $-0x39, (%rax)
jmp 0x17c79
movl %esi, %r13d
xorl %r14d, %r14d
movq %rbx, %rdi
movl $0x2, %esi
movl %r12d, %edx
xorl %ecx, %ecx
callq 0x15da2
testq %rax, %rax
je 0x17c76
testl %r13d, %r13d
setne %cl
shlb $0x3, %cl
orb $-0x4a, %cl
movb $0xf, (%rax)
movb %cl, 0x1(%rax)
testb %bpl, %bpl
jns 0x17c79
xorl %r14d, %r14d
movq %rbx, %rdi
movl $0xc1, %esi
movl %r12d, %edx
xorl %ecx, %ecx
movl %ebp, %r8d
movq %r15, %r9
callq 0x15da2
testq %rax, %rax
je 0x17c76
movb $-0x78, (%rax)
jmp 0x17c79
movq %rbx, %rdi
movl $0x181, %esi            # imm = 0x181
movl $0x40, %edx
movq %r9, %rcx
movl %ebp, %r8d
movq %r15, %r9
callq 0x15da2
testq %rax, %rax
je 0x17c76
movb $-0x3a, (%rax)
jmp 0x17c79
movl (%rbx), %r14d
movl %r14d, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq