// File: CMU-SAFARI[P]MQSim/src/ssd/Address_Mapping_Unit_Page_Level.cpp
// Function: SSD_Components::Address_Mapping_Unit_Page_Level::allocate_plane_for_preconditioning(unsigned short, unsigned long, NVM::FlashMemory::Physical_Page_Address&)
void Address_Mapping_Unit_Page_Level::allocate_plane_for_preconditioning(stream_id_type stream_id, LPA_type lpn, NVM::FlashMemory::Physical_Page_Address& targetAddress)
	{
		AddressMappingDomain* domain = domains[stream_id];

		switch (domain->PlaneAllocationScheme) {
			case Flash_Plane_Allocation_Scheme_Type::CWDP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CWPD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Channel_no * domain->Chip_no * domain->Plane_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Channel_no * domain->Chip_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CDWP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CDPW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CPWD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CPDW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Plane_no)];
				break;
				//Static: Way first
			case Flash_Plane_Allocation_Scheme_Type::WCDP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no * domain->Die_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WCPD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no * domain->Plane_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WDCP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Die_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Die_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WDPC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Die_no * domain->Plane_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Die_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WPCD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Plane_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Plane_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WPDC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Plane_no * domain->Die_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Plane_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Plane_no)];
				break;
				//Static: Die first
			case Flash_Plane_Allocation_Scheme_Type::DCWP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Die_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no * domain->Chip_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DCPW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Die_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no * domain->Plane_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DWCP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Die_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DWPC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no * domain->Plane_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Die_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DPCW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Die_no * domain->Plane_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Plane_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Die_no) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DPWC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Die_no * domain->Plane_no * domain->Chip_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Plane_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Die_no) % domain->Plane_no)];
				break;
				//Static: Plane first
			case Flash_Plane_Allocation_Scheme_Type::PCWD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no * domain->Chip_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PCDW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no * domain->Die_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PWCD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PWDC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no * domain->Die_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PDCW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PDWC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no * domain->Chip_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			default:
				PRINT_ERROR("Unknown plane allocation scheme type!")
		}
	}

// Assembly:
subq $0x338, %rsp            # imm = 0x338
movw %si, %ax
movq %rdi, 0x330(%rsp)
movw %ax, 0x32e(%rsp)
movq %rdx, 0x320(%rsp)
movq %rcx, 0x318(%rsp)
movq 0x330(%rsp), %rax
movq 0xa8(%rax), %rax
movzwl 0x32e(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq %rax, 0x310(%rsp)
movq 0x310(%rsp), %rax
movl 0x208(%rax), %eax
movq %rax, 0x308(%rsp)
subq $0x17, %rax
ja 0x54c88
movq 0x308(%rsp), %rax
leaq 0x59e9c(%rip), %rcx     # 0xac4a8
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x2e8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x2e8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x2f0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x2f0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x2f8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x2f8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x300(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x300(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x2c8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x2c8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x2d0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x2d0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x2d8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x248(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x2d8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x2e0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x2e0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x2a8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x2a8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x2b0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x2b0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x2b8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x2b8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x2c0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x2c0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x288(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x288(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x290(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x238(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x290(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x298(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x298(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x2a0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x2a0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x268(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x268(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x270(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x270(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x278(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x278(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x280(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x280(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x248(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x248(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x250(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x238(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x250(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x258(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x258(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x260(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x260(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x228(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x228(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x230(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x230(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x238(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x238(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x240(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x238(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x240(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x208(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x208(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x210(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x210(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x218(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x248(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x218(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x220(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x220(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x1e8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x238(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x1e8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x1f0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x1f0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x1f8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x1f8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x200(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x238(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x200(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x1c8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x238(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x248(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x1c8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x1d0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x1d0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x1d8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x1d8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x1e0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x238(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x1e0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x1a8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x248(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x1a8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x1b0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x1b0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x1b8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x248(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x1b8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x1c0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x1c0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x188(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x248(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x238(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x188(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x190(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x190(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x198(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x248(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x198(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x1a0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x1a0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x168(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x168(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x170(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x170(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x178(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x178(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x180(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x180(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x148(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x148(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x150(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x248(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x150(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x158(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x158(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x160(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x160(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x128(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x128(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x130(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x130(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x138(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x138(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x140(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x140(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x108(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x248(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x108(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x110(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x110(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x118(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x118(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x120(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x120(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0xe8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x248(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0xe8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0xf0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x248(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0xf0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0xf8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0xf8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x100(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x100(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0xc8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x248(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0xc8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0xd0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x248(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0xd0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0xd8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0xd8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0xe0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0xe0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0xa8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0xa8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0xb0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0xb0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0xb8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0xb8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0xc0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0xc0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x88(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x88(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x90(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x238(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x90(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x98(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x98(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0xa0(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0xa0(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x68(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x68(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x70(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x70(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x78(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x78(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x80(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x80(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x48(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x238(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x48(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x50(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x50(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x58(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x58(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x60(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x60(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x28(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x238(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x28(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x30(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x238(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x218(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x30(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x38(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x38(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x40(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x40(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x310(%rsp), %rax
movq 0x210(%rax), %rax
movq %rax, 0x8(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x238(%rdx), %ecx
movq 0x310(%rsp), %rdx
imull 0x228(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x218(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x8(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, (%rax)
movq 0x310(%rsp), %rax
movq 0x220(%rax), %rax
movq %rax, 0x10(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
movq 0x310(%rsp), %rdx
imull 0x238(%rdx), %ecx
movl %ecx, %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x228(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x10(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x4(%rax)
movq 0x310(%rsp), %rax
movq 0x230(%rax), %rax
movq %rax, 0x18(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x310(%rsp), %rcx
movl 0x238(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x18(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0x8(%rax)
movq 0x310(%rsp), %rax
movq 0x240(%rax), %rax
movq %rax, 0x20(%rsp)
movq 0x320(%rsp), %rax
movq 0x310(%rsp), %rcx
movl 0x248(%rcx), %ecx
xorl %edx, %edx
divq %rcx
movq 0x20(%rsp), %rax
movl %edx, %ecx
movl %ecx, %ecx
movl (%rax,%rcx,4), %ecx
movq 0x318(%rsp), %rax
movl %ecx, 0xc(%rax)
jmp 0x54cd3
movq 0x85361(%rip), %rdi     # 0xd9ff0
leaq 0x55c52(%rip), %rsi     # 0xaa8e8
callq 0x8440
movq 0x8534e(%rip), %rdi     # 0xd9ff0
leaq 0x57e3b(%rip), %rsi     # 0xacae4
callq 0x8440
movq %rax, %rdi
movq 0x852a0(%rip), %rsi     # 0xd9f58
callq 0x8480
movq 0x8530c(%rip), %rdi     # 0xd9fd0
callq 0x84f0
movl $0x1, %edi
callq 0x8500
addq $0x338, %rsp            # imm = 0x338
retq
nopl (%rax,%rax)