// File: /workspace/github_c_makefile_star2_O0/AK6DN[P]dec-utilities-for-pdp/d8tape/dasm.c
// Function: dasm8
void
dasm8 (int addr, unsigned short int buf)
{
    int     ind, cur;
    int     eff_addr;
    int     primary;                        // is primary disassembly 'c'ode or 'd'ata?

    if (optv > 1) {
        printf ("dasm8 (addr 0%04o word 0%04o tag 0x%04x)\n", addr, buf, tags [addr]);
    }

    eff_addr = ea (addr, buf, &ind, &cur);

    if (two_word) {
        printf ("\t%04o /\t\t\t\t\t / (operand)\n", buf);
        two_word = 0;
        return;
    }

    // prepare buffer areas for disassembly and comments.
    memset (disbuf, 0, sizeof (disbuf));
    memset (combuf, 0, sizeof (combuf));

    primary = 'c';                          // default to code disassembly

    if (tags [addr] & TAG_LABEL) {
        printf ("L%04o,\n", addr);
    }

    if (tags [addr] & TAG_SUB) {
        printf ("\n");
        printf ("////////////////////////////////////////////////////////////////////////////////\n");
        printf ("/\n");
        printf ("/\tSUBROUTINE:  S%04o\n", addr);
        printf ("/\n");
        xrefs (addr);
        printf ("////////////////////////////////////////////////////////////////////////////////\n");
        printf ("S%04o,\n", addr);
        printf ("\t0\t\t\t\t\t\t/ return area\n");
        // done; can't be SUB and anything else (except label, perhaps)
        return;
    }

    if (tags [addr] & TAG_DATA) {
        // if it's data, set primary as data
        primary = 'd';
        if ((addr & 07770) == 00010) {  // addresses 0010 -> 0017 are autoindex
            printf ("AI%o,\t%04o\t\t\t\t/ AUTO-INDEX REGISTER", addr & 7, core [addr]);
        } else {
            if (tags [addr] & TAG_INDIRECTFC) {
                printf ("C%04o,\n", addr);
            }
            printf ("%c%04o,\t", tags [addr] & TAG_KONSTANT ? 'K' : tags [addr] & TAG_WRITABLE ? 'D' : 'C', tags [addr] & TAG_KONSTANT ? core [addr] : addr);
            printf ("%04o\t\t\t\t/", core [addr]);
        }
    }

    switch (buf & 07000) {
    case    00000:          // AND
    case    01000:          // TAD
    case    02000:          // ISZ
    case    03000:          // DCA
    case    04000:          // JMS
    case    05000:          // JMP
        sprintf (disbuf, "%s ", codes [buf >> 9]);

        if (ind) {
            strcat (disbuf, "I ");
        } else {
            strcat (disbuf, "  ");
        }

        if (tags [eff_addr] & TAG_SUB) {
            strcat (disbuf, "S");
        } else if (tags [eff_addr] & TAG_LABEL) {
            strcat (disbuf, "L");
        } else {
            if ((eff_addr & 07770) == 00010) {  // addresses 0010 -> 0017
                strcat (disbuf, "AI");
                strcat (combuf, "AUTO INDEX REGISTER");
            } else {
                strcat (disbuf, (tags [eff_addr] & TAG_KONSTANT) ? "K" : tags [eff_addr] & TAG_WRITABLE ? "D" : "C");
            }
        }

        if (tags [addr] & TAG_RETURN) {
            strcat (combuf, "return ");
        } else {
            // comment indirect flow control change to reflect ultimate target
            switch (buf & 07400) {
            case    04400:
                sprintf (combuf + strlen (combuf), "long call to S%04o ", core [eff_addr]);
                break;
            case    05400:
                sprintf (combuf + strlen (combuf), "long jump to L%04o ", core [eff_addr]);
                break;
            }
        }

        if ((eff_addr & 07770) == 00010) {      // address 0010 -> 0017
            sprintf (disbuf + strlen (disbuf), "%o ", eff_addr & 7);
        } else {
            sprintf (disbuf + strlen (disbuf), "%04o ", (tags [eff_addr] & TAG_KONSTANT) ? core [eff_addr] : eff_addr);
        }

        break;

    case    06000:          // IOT
        fetch_iot (buf, disbuf, combuf);
        break;

    case    07000:          // OPR
        // perform "short form" OPRs here first...
        switch (buf) {
            case    07000: sprintf (disbuf, "NOP");                                                                     break;
#ifdef DNN1
//          case    07002: sprintf (disbuf, "BSW");                                                                     break;
            case    07600: sprintf (disbuf, "7600");                                                                    break;
#endif // DNN1
#ifdef DNN2
            case    07400: sprintf (disbuf, "7400");                                                                    break;
            case    07401: sprintf (disbuf, "7401");                                                                    break;
            case    07601: sprintf (disbuf, "7601");                                                                    break;
#endif // DNN2
            case    07041: sprintf (disbuf, "CIA");                                                                     break;
            case    07120: sprintf (disbuf, "STL");                                                                     break;
            case    07204: sprintf (disbuf, "GLK");                                                                     break;
            case    07240: sprintf (disbuf, "STA");                 strcat (combuf, "AC = 7777 (-0001)");               break;
            case    07300: sprintf (disbuf, "CLA CLL");             strcat (combuf, "AC = 0000");                       break;
            case    07301: sprintf (disbuf, "CLA CLL IAC");         strcat (combuf, "AC = 0001");                       break;
            case    07303: sprintf (disbuf, "CLA CLL IAC BSW");     strcat (combuf, "AC = 0100 (64)");                  break;
            case    07305: sprintf (disbuf, "CLA CLL IAC RAL");     strcat (combuf, "AC = 0002");                       break;
            case    07325: sprintf (disbuf, "CLA CLL CML IAC RAL"); strcat (combuf, "AC = 0003");                       break;
            case    07326: sprintf (disbuf, "CLA CLL CML RTL");     strcat (combuf, "AC = 0002");                       break;
            case    07307: sprintf (disbuf, "CLA CLL IAC RTL");     strcat (combuf, "AC = 0004");                       break;
            case    07327: sprintf (disbuf, "CLA CLL CML IAC RTL"); strcat (combuf, "AC = 0006");                       break;
            case    07330: sprintf (disbuf, "CLA CLL CML RAR");     strcat (combuf, "AC = 4000 (-4000 = -2048 dec)");   break;
            case    07332: sprintf (disbuf, "CLA CLL CML RTR");     strcat (combuf, "AC = 2000 (1024)");                break;
            case    07333: sprintf (disbuf, "CLA CLL CML IAC RTL"); strcat (combuf, "AC = 6000 (-2000 = -1024 dec)");   break;
            case    07340: sprintf (disbuf, "CLA CLL CMA");         strcat (combuf, "AC = 7777 (-0001)");               break;
            case    07344: sprintf (disbuf, "CLA CLL CMA RAL");     strcat (combuf, "AC = 7776 (-0002)");               break;
            case    07346: sprintf (disbuf, "CLA CLL CMA RTL");     strcat (combuf, "AC = 7775 (-0003)");               break;
            case    07350: sprintf (disbuf, "CLA CLL CMA RAR");     strcat (combuf, "AC = 3777 (2047)");                break;
            case    07352: sprintf (disbuf, "CLA CLL CMA RTR");     strcat (combuf, "AC = 5777 (-2001 = -1025 dec)");   break;
#ifndef DNN2
            case    07401: sprintf (disbuf, "NOP");                                                                     break;
#endif // !DNN1
            case    07410: sprintf (disbuf, "SKP");                                                                     break;
            case    07610: sprintf (disbuf, "SKP CLA");                                                                 break;
            case    07604: sprintf (disbuf, "LAS");                                                                     break;
            case    07621: sprintf (disbuf, "CAM");                                                                     break;
            default:

                // determine group (0401 is 0000/0001 for group 1, 0400 for group 2, 0401 for EAE)
                switch (buf & 00401) {
                case    00000:  // group 1
                case    00001:  // group 1
                    // sequence 1
                    if (buf & 00200) {
                        strcat (disbuf, "CLA ");
                    }
                    if (buf & 00100) {
                        strcat (disbuf, "CLL ");
                    }
                    // sequence 2
                    if (buf & 00040) {
                        strcat (disbuf, "CMA ");
                    }
                    if (buf & 00020) {
                        strcat (disbuf, "CML ");
                    }
                    // sequence 3
                    if (buf & 00001) {
                        strcat (disbuf, "IAC ");
                    }
                    // sequence 4
                    if (buf & 00010) {
                        if (buf & 00002) {
                            strcat (disbuf, "RTR ");
                        } else {
                            strcat (disbuf, "RAR ");
                        }
                    }
                    if (buf & 00004) {
                        if (buf & 00002) {
                            strcat (disbuf, "RTL ");
                        } else {
                            strcat (disbuf, "RAL ");
                        }
                    }
#ifdef DNN2
		    if ((buf & 00016) == 00002) {
			strcat (disbuf, "BSW ");
		    }
#endif // DNN2
                    break;

                case    00400:  // group 2
                    // sequence 1
                    if (buf & 00100) {
                        if (buf & 00010) {
                            strcat (disbuf, "SPA ");
                        } else {
                            strcat (disbuf, "SMA ");
                        }
                    }
                    if (buf & 00040) {
                        if (buf & 00010) {
                            strcat (disbuf, "SNA ");
                        } else {
                            strcat (disbuf, "SZA ");
                        }
                    }
                    if (buf & 00020) {
                        if (buf & 00010) {
                            strcat (disbuf, "SZL ");
                        } else {
                            strcat (disbuf, "SNL ");
                        }
                    }
#ifdef DNN2
		    if ((buf & 00170) == 00010) {
			strcat (disbuf, "SKP ");
		    }
#endif // DNN2
                    // sequence 2
                    if (buf & 00200) {
                        strcat (disbuf, "CLA ");
                    }
                    // sequence 3
                    if (buf & 00004) {
                        strcat (disbuf, "OSR ");
                    }
                    if (buf & 00002) {
                        strcat (disbuf, "HLT ");
                    }
                    break;
                case    00401:  // EAE
                    // sequence 1
                    if (buf & 00200) {
                        strcat (disbuf, "CLA ");
                    }
                    // sequence 2
                    if (buf & 00100) {
                        strcat (disbuf, "MQA ");
                    }
                    if (buf & 00040) {
                        strcat (disbuf, "SCA ");
                    }
                    if (buf & 00020) {
                        strcat (disbuf, "MQL ");
                    }
                    // sequence 3
                    switch (buf & 00016) {
                    case    0:      // no further ops, done
                        break;
                    case    002:
                        strcat (disbuf, "SCL ");
                        two_word = buf;
                        break;
                    case    004:
                        strcat (disbuf, "MUY ");
                        two_word = buf;
                        break;
                    case    006:
                        strcat (disbuf, "DVI ");
                        two_word = buf;
                        break;
                    case    010:
                        strcat (disbuf, "NMI");
                        break;
                    case    012:
                        strcat (disbuf, "SHL ");
                        two_word = buf;
                        break;
                    case    014:
                        strcat (disbuf, "ASR ");
                        two_word = buf;
                        break;
                    case    016:
                        strcat (disbuf, "LSR ");
                        two_word = buf;
                        break;
                    }
                    break;
                }
                break;
        }
        break;
    }
    if (two_word) {
        strcat (disbuf, "+");
    }
    // trim any trailing spaces
    while (*disbuf && disbuf [strlen (disbuf) - 1] == ' ') {
        disbuf [strlen (disbuf) - 1] = 0;
    }

    if (primary == 'c') {               // if primary is code, then spill data too
        pad (disbuf, 0, COMSTART - 4);  // add tabs to get disassembly to comment start (one tab less because we print it next)
        printf ("\t%s", disbuf);        // print disassembly so far
        printf ("/ ");                  // print comment start
        pad (combuf, 2, DATASTART);     // pad comment buffer to get to data area
        printf ("%s@@%04o=%04o\n", combuf, addr, buf);  // print comment, address and opcode
    } else {                            // else we've already spilled both, just terminate the line
        pad (disbuf, 2, DATASTART);
        printf (" %s", disbuf);
        printf ("\n");
        two_word = 0;                   // we don't care that it's a two-word when we're printing it as data
    }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x60, %rsp
movw %si, %ax
movl %edi, -0x4(%rbp)
movw %ax, -0x6(%rbp)
leaq 0xa477(%rip), %rax      # 0xef50
cmpl $0x1, (%rax)
jle 0x4b02
movl -0x4(%rbp), %esi
movzwl -0x6(%rbp), %edx
movslq -0x4(%rbp), %rcx
leaq 0xc470(%rip), %rax      # 0x10f60
movzwl (%rax,%rcx,2), %ecx
leaq 0x6a8b(%rip), %rdi      # 0xb586
movb $0x0, %al
callq 0x30a0
movl -0x4(%rbp), %edi
movzwl -0x6(%rbp), %esi
leaq -0xc(%rbp), %rdx
leaq -0x10(%rbp), %rcx
callq 0x5c40
movl %eax, -0x14(%rbp)
cmpw $0x0, 0xe45f(%rip)      # 0x12f80
je 0x4b43
movzwl -0x6(%rbp), %esi
leaq 0x6a82(%rip), %rdi      # 0xb5b0
movb $0x0, %al
callq 0x30a0
movw $0x0, 0xe442(%rip)      # 0x12f80
jmp 0x5c33
leaq 0xe446(%rip), %rdi      # 0x12f90
xorl %esi, %esi
movl $0x18, %edx
callq 0x30b0
leaq 0xe453(%rip), %rdi      # 0x12fb0
xorl %esi, %esi
movl $0x26, %edx
callq 0x30b0
movl $0x63, -0x18(%rbp)
movslq -0x4(%rbp), %rcx
leaq 0xc3e5(%rip), %rax      # 0x10f60
movzwl (%rax,%rcx,2), %eax
andl $0x4, %eax
cmpl $0x0, %eax
je 0x4b98
movl -0x4(%rbp), %esi
leaq 0x6a39(%rip), %rdi      # 0xb5ca
movb $0x0, %al
callq 0x30a0
movslq -0x4(%rbp), %rcx
leaq 0xc3bd(%rip), %rax      # 0x10f60
movzwl (%rax,%rcx,2), %eax
andl $0x2, %eax
cmpl $0x0, %eax
je 0x4c36
leaq 0x3609(%rip), %rdi      # 0x81c3
movb $0x0, %al
callq 0x30a0
leaq 0x6a0a(%rip), %rdi      # 0xb5d2
movb $0x0, %al
callq 0x30a0
leaq 0x6a4b(%rip), %rdi      # 0xb621
movb $0x0, %al
callq 0x30a0
movl -0x4(%rbp), %esi
leaq 0x6a3d(%rip), %rdi      # 0xb624
movb $0x0, %al
callq 0x30a0
leaq 0x6a2c(%rip), %rdi      # 0xb621
movb $0x0, %al
callq 0x30a0
movl -0x4(%rbp), %edi
callq 0x5cd0
leaq 0x69c7(%rip), %rdi      # 0xb5d2
movb $0x0, %al
callq 0x30a0
movl -0x4(%rbp), %esi
leaq 0x6a1e(%rip), %rdi      # 0xb63a
movb $0x0, %al
callq 0x30a0
leaq 0x6a18(%rip), %rdi      # 0xb642
movb $0x0, %al
callq 0x30a0
jmp 0x5c33
movslq -0x4(%rbp), %rcx
leaq 0xc31f(%rip), %rax      # 0x10f60
movzwl (%rax,%rcx,2), %eax
andl $0x1, %eax
cmpl $0x0, %eax
je 0x4d6e
movl $0x64, -0x18(%rbp)
movl -0x4(%rbp), %eax
andl $0xff8, %eax            # imm = 0xFF8
cmpl $0x8, %eax
jne 0x4c8d
movl -0x4(%rbp), %esi
andl $0x7, %esi
movslq -0x4(%rbp), %rcx
leaq 0xa2ea(%rip), %rax      # 0xef60
movswl (%rax,%rcx,2), %edx
leaq 0x69d8(%rip), %rdi      # 0xb659
movb $0x0, %al
callq 0x30a0
jmp 0x4d6c
movslq -0x4(%rbp), %rcx
leaq 0xc2c8(%rip), %rax      # 0x10f60
movzwl (%rax,%rcx,2), %eax
andl $0x400, %eax            # imm = 0x400
cmpl $0x0, %eax
je 0x4cb7
movl -0x4(%rbp), %esi
leaq 0x69cd(%rip), %rdi      # 0xb67d
movb $0x0, %al
callq 0x30a0
movslq -0x4(%rbp), %rcx
leaq 0xc29e(%rip), %rax      # 0x10f60
movzwl (%rax,%rcx,2), %eax
andl $0x200, %eax            # imm = 0x200
cmpl $0x0, %eax
je 0x4cda
movl $0x4b, %eax
movl %eax, -0x1c(%rbp)
jmp 0x4d02
movslq -0x4(%rbp), %rcx
leaq 0xc27b(%rip), %rax      # 0x10f60
movzwl (%rax,%rcx,2), %edx
andl $0x100, %edx            # imm = 0x100
movl $0x43, %eax
movl $0x44, %ecx
cmpl $0x0, %edx
cmovnel %ecx, %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %eax
movl %eax, -0x20(%rbp)
movslq -0x4(%rbp), %rcx
leaq 0xc24d(%rip), %rax      # 0x10f60
movzwl (%rax,%rcx,2), %eax
andl $0x200, %eax            # imm = 0x200
cmpl $0x0, %eax
je 0x4d35
movslq -0x4(%rbp), %rcx
leaq 0xa234(%rip), %rax      # 0xef60
movswl (%rax,%rcx,2), %eax
movl %eax, -0x24(%rbp)
jmp 0x4d3b
movl -0x4(%rbp), %eax
movl %eax, -0x24(%rbp)
movl -0x20(%rbp), %esi
movl -0x24(%rbp), %edx
leaq 0x693d(%rip), %rdi      # 0xb685
movb $0x0, %al
callq 0x30a0
movslq -0x4(%rbp), %rcx
leaq 0xa206(%rip), %rax      # 0xef60
movswl (%rax,%rcx,2), %esi
leaq 0x6929(%rip), %rdi      # 0xb68e
movb $0x0, %al
callq 0x30a0
jmp 0x4d6e
movzwl -0x6(%rbp), %eax
andl $0xe00, %eax            # imm = 0xE00
movl %eax, -0x28(%rbp)
je 0x4ddd
jmp 0x4d7e
movl -0x28(%rbp), %eax
subl $0x200, %eax            # imm = 0x200
je 0x4ddd
jmp 0x4d8a
movl -0x28(%rbp), %eax
subl $0x400, %eax            # imm = 0x400
je 0x4ddd
jmp 0x4d96
movl -0x28(%rbp), %eax
subl $0x600, %eax            # imm = 0x600
je 0x4ddd
jmp 0x4da2
movl -0x28(%rbp), %eax
subl $0x800, %eax            # imm = 0x800
je 0x4ddd
jmp 0x4dae
movl -0x28(%rbp), %eax
subl $0xa00, %eax            # imm = 0xA00
je 0x4ddd
jmp 0x4dba
movl -0x28(%rbp), %eax
subl $0xc00, %eax            # imm = 0xC00
je 0x508d
jmp 0x4dca
movl -0x28(%rbp), %eax
subl $0xe00, %eax            # imm = 0xE00
je 0x50a9
jmp 0x5b01
movzwl -0x6(%rbp), %eax
sarl $0x9, %eax
movslq %eax, %rcx
leaq 0xa102(%rip), %rax      # 0xeef0
movq (%rax,%rcx,8), %rdx
leaq 0xe197(%rip), %rdi      # 0x12f90
leaq 0x6898(%rip), %rsi      # 0xb698
movb $0x0, %al
callq 0x3180
cmpl $0x0, -0xc(%rbp)
je 0x4e22
leaq 0xe17c(%rip), %rdi      # 0x12f90
leaq 0x6b67(%rip), %rsi      # 0xb982
callq 0x3170
jmp 0x4e35
leaq 0xe167(%rip), %rdi      # 0x12f90
leaq 0x328b(%rip), %rsi      # 0x80bb
callq 0x3170
movslq -0x14(%rbp), %rcx
leaq 0xc120(%rip), %rax      # 0x10f60
movzwl (%rax,%rcx,2), %eax
andl $0x2, %eax
cmpl $0x0, %eax
je 0x4e64
leaq 0xe13d(%rip), %rdi      # 0x12f90
leaq 0x6aa8(%rip), %rsi      # 0xb902
callq 0x3170
jmp 0x4f30
movslq -0x14(%rbp), %rcx
leaq 0xc0f1(%rip), %rax      # 0x10f60
movzwl (%rax,%rcx,2), %eax
andl $0x4, %eax
cmpl $0x0, %eax
je 0x4e93
leaq 0xe10e(%rip), %rdi      # 0x12f90
leaq 0x69e6(%rip), %rsi      # 0xb86f
callq 0x3170
jmp 0x4f2e
movl -0x14(%rbp), %eax
andl $0xff8, %eax            # imm = 0xFF8
cmpl $0x8, %eax
jne 0x4ec8
leaq 0xe0e9(%rip), %rdi      # 0x12f90
leaq 0x67ee(%rip), %rsi      # 0xb69c
callq 0x3170
leaq 0xe0f6(%rip), %rdi      # 0x12fb0
leaq 0x67de(%rip), %rsi      # 0xb69f
callq 0x3170
jmp 0x4f2c
movslq -0x14(%rbp), %rcx
leaq 0xc08d(%rip), %rax      # 0x10f60
movzwl (%rax,%rcx,2), %eax
andl $0x200, %eax            # imm = 0x200
cmpl $0x0, %eax
je 0x4eee
leaq 0x6821(%rip), %rax      # 0xb709
movq %rax, -0x30(%rbp)
jmp 0x4f1c
movslq -0x14(%rbp), %rcx
leaq 0xc067(%rip), %rax      # 0x10f60
movzwl (%rax,%rcx,2), %edx
andl $0x100, %edx            # imm = 0x100
leaq 0x5f72(%rip), %rax      # 0xae7c
leaq 0x5b64(%rip), %rcx      # 0xaa75
cmpl $0x0, %edx
cmovneq %rcx, %rax
movq %rax, -0x30(%rbp)
movq -0x30(%rbp), %rsi
leaq 0xe069(%rip), %rdi      # 0x12f90
callq 0x3170
jmp 0x4f2e
jmp 0x4f30
movslq -0x4(%rbp), %rcx
leaq 0xc025(%rip), %rax      # 0x10f60
movzwl (%rax,%rcx,2), %eax
andl $0x8, %eax
cmpl $0x0, %eax
je 0x4f5f
leaq 0xe062(%rip), %rdi      # 0x12fb0
leaq 0x675e(%rip), %rsi      # 0xb6b3
callq 0x3170
jmp 0x4fea
movzwl -0x6(%rbp), %eax
andl $0xf00, %eax            # imm = 0xF00
movl %eax, -0x34(%rbp)
subl $0x900, %eax            # imm = 0x900
je 0x4f80
jmp 0x4f74
movl -0x34(%rbp), %eax
subl $0xb00, %eax            # imm = 0xB00
je 0x4fb5
jmp 0x4fe8
leaq 0xe029(%rip), %rdi      # 0x12fb0
callq 0x3090
leaq 0xe01d(%rip), %rdi      # 0x12fb0
addq %rax, %rdi
movslq -0x14(%rbp), %rcx
leaq 0x9fbf(%rip), %rax      # 0xef60
movswl (%rax,%rcx,2), %edx
leaq 0x670f(%rip), %rsi      # 0xb6bb
movb $0x0, %al
callq 0x3180
jmp 0x4fe8
leaq 0xdff4(%rip), %rdi      # 0x12fb0
callq 0x3090
leaq 0xdfe8(%rip), %rdi      # 0x12fb0
addq %rax, %rdi
movslq -0x14(%rbp), %rcx
leaq 0x9f8a(%rip), %rax      # 0xef60
movswl (%rax,%rcx,2), %edx
leaq 0x66ee(%rip), %rsi      # 0xb6cf
movb $0x0, %al
callq 0x3180
jmp 0x4fea
movl -0x14(%rbp), %eax
andl $0xff8, %eax            # imm = 0xFF8
cmpl $0x8, %eax
jne 0x5023
leaq 0xdf92(%rip), %rdi      # 0x12f90
callq 0x3090
leaq 0xdf86(%rip), %rdi      # 0x12f90
addq %rax, %rdi
movl -0x14(%rbp), %edx
andl $0x7, %edx
leaq 0x66c9(%rip), %rsi      # 0xb6e3
movb $0x0, %al
callq 0x3180
jmp 0x5088
leaq 0xdf66(%rip), %rdi      # 0x12f90
callq 0x3090
movq %rax, %rcx
leaq 0xdf57(%rip), %rax      # 0x12f90
addq %rcx, %rax
movq %rax, -0x40(%rbp)
movslq -0x14(%rbp), %rcx
leaq 0xbf15(%rip), %rax      # 0x10f60
movzwl (%rax,%rcx,2), %eax
andl $0x200, %eax            # imm = 0x200
cmpl $0x0, %eax
je 0x506d
movslq -0x14(%rbp), %rcx
leaq 0x9efc(%rip), %rax      # 0xef60
movswl (%rax,%rcx,2), %eax
movl %eax, -0x44(%rbp)
jmp 0x5073
movl -0x14(%rbp), %eax
movl %eax, -0x44(%rbp)
movq -0x40(%rbp), %rdi
movl -0x44(%rbp), %edx
leaq 0x665c(%rip), %rsi      # 0xb6dd
movb $0x0, %al
callq 0x3180
jmp 0x5b01
movzwl -0x6(%rbp), %edi
leaq 0xdef8(%rip), %rsi      # 0x12f90
leaq 0xdf11(%rip), %rdx      # 0x12fb0
callq 0x5ef0
jmp 0x5b01
movzwl -0x6(%rbp), %eax
movl %eax, -0x48(%rbp)
subl $0xe00, %eax            # imm = 0xE00
je 0x527c
jmp 0x50bd
movl -0x48(%rbp), %eax
subl $0xe21, %eax            # imm = 0xE21
je 0x52fe
jmp 0x50cd
movl -0x48(%rbp), %eax
subl $0xe50, %eax            # imm = 0xE50
je 0x5318
jmp 0x50dd
movl -0x48(%rbp), %eax
subl $0xe84, %eax            # imm = 0xE84
je 0x5332
jmp 0x50ed
movl -0x48(%rbp), %eax
subl $0xea0, %eax            # imm = 0xEA0
je 0x534c
jmp 0x50fd
movl -0x48(%rbp), %eax
subl $0xec0, %eax            # imm = 0xEC0
je 0x5379
jmp 0x510d
movl -0x48(%rbp), %eax
subl $0xec1, %eax            # imm = 0xEC1
je 0x53a6
jmp 0x511d
movl -0x48(%rbp), %eax
subl $0xec3, %eax            # imm = 0xEC3
je 0x53d3
jmp 0x512d
movl -0x48(%rbp), %eax
subl $0xec5, %eax            # imm = 0xEC5
je 0x5400
jmp 0x513d
movl -0x48(%rbp), %eax
subl $0xec7, %eax            # imm = 0xEC7
je 0x5487
jmp 0x514d
movl -0x48(%rbp), %eax
subl $0xed5, %eax            # imm = 0xED5
je 0x542d
jmp 0x515d
movl -0x48(%rbp), %eax
subl $0xed6, %eax            # imm = 0xED6
je 0x545a
jmp 0x516d
movl -0x48(%rbp), %eax
subl $0xed7, %eax            # imm = 0xED7
je 0x54b4
jmp 0x517d
movl -0x48(%rbp), %eax
subl $0xed8, %eax            # imm = 0xED8
je 0x54e1
jmp 0x518d
movl -0x48(%rbp), %eax
subl $0xeda, %eax            # imm = 0xEDA
je 0x550e
jmp 0x519d
movl -0x48(%rbp), %eax
subl $0xedb, %eax            # imm = 0xEDB
je 0x553b
jmp 0x51ad
movl -0x48(%rbp), %eax
subl $0xee0, %eax            # imm = 0xEE0
je 0x5568
jmp 0x51bd
movl -0x48(%rbp), %eax
subl $0xee4, %eax            # imm = 0xEE4
je 0x5595
jmp 0x51cd
movl -0x48(%rbp), %eax
subl $0xee6, %eax            # imm = 0xEE6
je 0x55c2
jmp 0x51dd
movl -0x48(%rbp), %eax
subl $0xee8, %eax            # imm = 0xEE8
je 0x55ef
jmp 0x51ed
movl -0x48(%rbp), %eax
subl $0xeea, %eax            # imm = 0xEEA
je 0x561c
jmp 0x51fd
movl -0x48(%rbp), %eax
subl $0xf00, %eax            # imm = 0xF00
je 0x52b0
jmp 0x520d
movl -0x48(%rbp), %eax
subl $0xf01, %eax            # imm = 0xF01
je 0x52ca
jmp 0x521d
movl -0x48(%rbp), %eax
subl $0xf08, %eax            # imm = 0xF08
je 0x5649
jmp 0x522d
movl -0x48(%rbp), %eax
subl $0xf80, %eax            # imm = 0xF80
je 0x5296
jmp 0x5239
movl -0x48(%rbp), %eax
subl $0xf81, %eax            # imm = 0xF81
je 0x52e4
jmp 0x5249
movl -0x48(%rbp), %eax
subl $0xf84, %eax            # imm = 0xF84
je 0x567d
jmp 0x5259
movl -0x48(%rbp), %eax
subl $0xf88, %eax            # imm = 0xF88
je 0x5663
jmp 0x5269
movl -0x48(%rbp), %eax
subl $0xf91, %eax            # imm = 0xF91
je 0x5697
jmp 0x56b1
leaq 0xdd0d(%rip), %rdi      # 0x12f90
leaq 0x645d(%rip), %rsi      # 0xb6e7
movb $0x0, %al
callq 0x3180
jmp 0x5aff
leaq 0xdcf3(%rip), %rdi      # 0x12f90
leaq 0x6447(%rip), %rsi      # 0xb6eb
movb $0x0, %al
callq 0x3180
jmp 0x5aff
leaq 0xdcd9(%rip), %rdi      # 0x12f90
leaq 0x6432(%rip), %rsi      # 0xb6f0
movb $0x0, %al
callq 0x3180
jmp 0x5aff
leaq 0xdcbf(%rip), %rdi      # 0x12f90
leaq 0x641d(%rip), %rsi      # 0xb6f5
movb $0x0, %al
callq 0x3180
jmp 0x5aff
leaq 0xdca5(%rip), %rdi      # 0x12f90
leaq 0x6408(%rip), %rsi      # 0xb6fa
movb $0x0, %al
callq 0x3180
jmp 0x5aff
leaq 0xdc8b(%rip), %rdi      # 0x12f90
leaq 0x63f3(%rip), %rsi      # 0xb6ff
movb $0x0, %al
callq 0x3180
jmp 0x5aff
leaq 0xdc71(%rip), %rdi      # 0x12f90
leaq 0x63dd(%rip), %rsi      # 0xb703
movb $0x0, %al
callq 0x3180
jmp 0x5aff
leaq 0xdc57(%rip), %rdi      # 0x12f90
leaq 0x63c7(%rip), %rsi      # 0xb707
movb $0x0, %al
callq 0x3180
jmp 0x5aff
leaq 0xdc3d(%rip), %rdi      # 0x12f90
leaq 0x63b1(%rip), %rsi      # 0xb70b
movb $0x0, %al
callq 0x3180
leaq 0xdc48(%rip), %rdi      # 0x12fb0
leaq 0x63a0(%rip), %rsi      # 0xb70f
callq 0x3170
jmp 0x5aff
leaq 0xdc10(%rip), %rdi      # 0x12f90
leaq 0x639a(%rip), %rsi      # 0xb721
movb $0x0, %al
callq 0x3180
leaq 0xdc1b(%rip), %rdi      # 0x12fb0
leaq 0x638d(%rip), %rsi      # 0xb729
callq 0x3170
jmp 0x5aff
leaq 0xdbe3(%rip), %rdi      # 0x12f90
leaq 0x637f(%rip), %rsi      # 0xb733
movb $0x0, %al
callq 0x3180
leaq 0xdbee(%rip), %rdi      # 0x12fb0
leaq 0x6376(%rip), %rsi      # 0xb73f
callq 0x3170
jmp 0x5aff
leaq 0xdbb6(%rip), %rdi      # 0x12f90
leaq 0x6368(%rip), %rsi      # 0xb749
movb $0x0, %al
callq 0x3180
leaq 0xdbc1(%rip), %rdi      # 0x12fb0
leaq 0x6363(%rip), %rsi      # 0xb759
callq 0x3170
jmp 0x5aff
leaq 0xdb89(%rip), %rdi      # 0x12f90
leaq 0x635a(%rip), %rsi      # 0xb768
movb $0x0, %al
callq 0x3180
leaq 0xdb94(%rip), %rdi      # 0x12fb0
leaq 0x6355(%rip), %rsi      # 0xb778
callq 0x3170
jmp 0x5aff
leaq 0xdb5c(%rip), %rdi      # 0x12f90
leaq 0x6347(%rip), %rsi      # 0xb782
movb $0x0, %al
callq 0x3180
leaq 0xdb67(%rip), %rdi      # 0x12fb0
leaq 0x6346(%rip), %rsi      # 0xb796
callq 0x3170
jmp 0x5aff
leaq 0xdb2f(%rip), %rdi      # 0x12f90
leaq 0x6338(%rip), %rsi      # 0xb7a0
movb $0x0, %al
callq 0x3180
leaq 0xdb3a(%rip), %rdi      # 0x12fb0
leaq 0x62fb(%rip), %rsi      # 0xb778
callq 0x3170
jmp 0x5aff
leaq 0xdb02(%rip), %rdi      # 0x12f90
leaq 0x631b(%rip), %rsi      # 0xb7b0
movb $0x0, %al
callq 0x3180
leaq 0xdb0d(%rip), %rdi      # 0x12fb0
leaq 0x6316(%rip), %rsi      # 0xb7c0
callq 0x3170
jmp 0x5aff
leaq 0xdad5(%rip), %rdi      # 0x12f90
leaq 0x6308(%rip), %rsi      # 0xb7ca
movb $0x0, %al
callq 0x3180
leaq 0xdae0(%rip), %rdi      # 0x12fb0
leaq 0x6307(%rip), %rsi      # 0xb7de
callq 0x3170
jmp 0x5aff
leaq 0xdaa8(%rip), %rdi      # 0x12f90
leaq 0x62f9(%rip), %rsi      # 0xb7e8
movb $0x0, %al
callq 0x3180
leaq 0xdab3(%rip), %rdi      # 0x12fb0
leaq 0x62f4(%rip), %rsi      # 0xb7f8
callq 0x3170
jmp 0x5aff
leaq 0xda7b(%rip), %rdi      # 0x12f90
leaq 0x62fa(%rip), %rsi      # 0xb816
movb $0x0, %al
callq 0x3180
leaq 0xda86(%rip), %rdi      # 0x12fb0
leaq 0x62f5(%rip), %rsi      # 0xb826
callq 0x3170
jmp 0x5aff
leaq 0xda4e(%rip), %rdi      # 0x12f90
leaq 0x6281(%rip), %rsi      # 0xb7ca
movb $0x0, %al
callq 0x3180
leaq 0xda59(%rip), %rdi      # 0x12fb0
leaq 0x62d9(%rip), %rsi      # 0xb837
callq 0x3170
jmp 0x5aff
leaq 0xda21(%rip), %rdi      # 0x12f90
leaq 0x62df(%rip), %rsi      # 0xb855
movb $0x0, %al
callq 0x3180
leaq 0xda2c(%rip), %rdi      # 0x12fb0
leaq 0x6184(%rip), %rsi      # 0xb70f
callq 0x3170
jmp 0x5aff
leaq 0xd9f4(%rip), %rdi      # 0x12f90
leaq 0x62be(%rip), %rsi      # 0xb861
movb $0x0, %al
callq 0x3180
leaq 0xd9ff(%rip), %rdi      # 0x12fb0
leaq 0x62b9(%rip), %rsi      # 0xb871
callq 0x3170
jmp 0x5aff
leaq 0xd9c7(%rip), %rdi      # 0x12f90
leaq 0x62b3(%rip), %rsi      # 0xb883
movb $0x0, %al
callq 0x3180
leaq 0xd9d2(%rip), %rdi      # 0x12fb0
leaq 0x62ae(%rip), %rsi      # 0xb893
callq 0x3170
jmp 0x5aff
leaq 0xd99a(%rip), %rdi      # 0x12f90
leaq 0x62a8(%rip), %rsi      # 0xb8a5
movb $0x0, %al
callq 0x3180
leaq 0xd9a5(%rip), %rdi      # 0x12fb0
leaq 0x62a3(%rip), %rsi      # 0xb8b5
callq 0x3170
jmp 0x5aff
leaq 0xd96d(%rip), %rdi      # 0x12f90
leaq 0x629c(%rip), %rsi      # 0xb8c6
movb $0x0, %al
callq 0x3180
leaq 0xd978(%rip), %rdi      # 0x12fb0
leaq 0x6297(%rip), %rsi      # 0xb8d6
callq 0x3170
jmp 0x5aff
leaq 0xd940(%rip), %rdi      # 0x12f90
leaq 0x629d(%rip), %rsi      # 0xb8f4
movb $0x0, %al
callq 0x3180
jmp 0x5aff
leaq 0xd926(%rip), %rdi      # 0x12f90
leaq 0x6287(%rip), %rsi      # 0xb8f8
movb $0x0, %al
callq 0x3180
jmp 0x5aff
leaq 0xd90c(%rip), %rdi      # 0x12f90
leaq 0x6275(%rip), %rsi      # 0xb900
movb $0x0, %al
callq 0x3180
jmp 0x5aff
leaq 0xd8f2(%rip), %rdi      # 0x12f90
leaq 0x625f(%rip), %rsi      # 0xb904
movb $0x0, %al
callq 0x3180
jmp 0x5aff
movzwl -0x6(%rbp), %eax
andl $0x101, %eax            # imm = 0x101
movl %eax, -0x4c(%rbp)
subl $0x2, %eax
jb 0x56e7
jmp 0x56c4
movl -0x4c(%rbp), %eax
subl $0x100, %eax            # imm = 0x100
je 0x582c
jmp 0x56d4
movl -0x4c(%rbp), %eax
subl $0x101, %eax            # imm = 0x101
je 0x5975
jmp 0x5afd
movzwl -0x6(%rbp), %eax
andl $0x80, %eax
cmpl $0x0, %eax
je 0x5708
leaq 0xd894(%rip), %rdi      # 0x12f90
leaq 0x6205(%rip), %rsi      # 0xb908
callq 0x3170
movzwl -0x6(%rbp), %eax
andl $0x40, %eax
cmpl $0x0, %eax
je 0x5727
leaq 0xd875(%rip), %rdi      # 0x12f90
leaq 0x61eb(%rip), %rsi      # 0xb90d
callq 0x3170
movzwl -0x6(%rbp), %eax
andl $0x20, %eax
cmpl $0x0, %eax
je 0x5746
leaq 0xd856(%rip), %rdi      # 0x12f90
leaq 0x61d1(%rip), %rsi      # 0xb912
callq 0x3170
movzwl -0x6(%rbp), %eax
andl $0x10, %eax
cmpl $0x0, %eax
je 0x5765
leaq 0xd837(%rip), %rdi      # 0x12f90
leaq 0x61b7(%rip), %rsi      # 0xb917
callq 0x3170
movzwl -0x6(%rbp), %eax
andl $0x1, %eax
cmpl $0x0, %eax
je 0x5784
leaq 0xd818(%rip), %rdi      # 0x12f90
leaq 0x619d(%rip), %rsi      # 0xb91c
callq 0x3170
movzwl -0x6(%rbp), %eax
andl $0x8, %eax
cmpl $0x0, %eax
je 0x57c6
movzwl -0x6(%rbp), %eax
andl $0x2, %eax
cmpl $0x0, %eax
je 0x57b1
leaq 0xd7ed(%rip), %rdi      # 0x12f90
leaq 0x6177(%rip), %rsi      # 0xb921
callq 0x3170
jmp 0x57c4
leaq 0xd7d8(%rip), %rdi      # 0x12f90
leaq 0x6167(%rip), %rsi      # 0xb926
callq 0x3170
jmp 0x57c6
movzwl -0x6(%rbp), %eax
andl $0x4, %eax
cmpl $0x0, %eax
je 0x5808
movzwl -0x6(%rbp), %eax
andl $0x2, %eax
cmpl $0x0, %eax
je 0x57f3
leaq 0xd7ab(%rip), %rdi      # 0x12f90
leaq 0x613f(%rip), %rsi      # 0xb92b
callq 0x3170
jmp 0x5806
leaq 0xd796(%rip), %rdi      # 0x12f90
leaq 0x612f(%rip), %rsi      # 0xb930
callq 0x3170
jmp 0x5808
movzwl -0x6(%rbp), %eax
andl $0xe, %eax
cmpl $0x2, %eax
jne 0x5827
leaq 0xd775(%rip), %rdi      # 0x12f90
leaq 0x6113(%rip), %rsi      # 0xb935
callq 0x3170
jmp 0x5afd
movzwl -0x6(%rbp), %eax
andl $0x40, %eax
cmpl $0x0, %eax
je 0x586e
movzwl -0x6(%rbp), %eax
andl $0x8, %eax
cmpl $0x0, %eax
je 0x5859
leaq 0xd745(%rip), %rdi      # 0x12f90
leaq 0x60e8(%rip), %rsi      # 0xb93a
callq 0x3170
jmp 0x586c
leaq 0xd730(%rip), %rdi      # 0x12f90
leaq 0x60d8(%rip), %rsi      # 0xb93f
callq 0x3170
jmp 0x586e
movzwl -0x6(%rbp), %eax
andl $0x20, %eax
cmpl $0x0, %eax
je 0x58b0
movzwl -0x6(%rbp), %eax
andl $0x8, %eax
cmpl $0x0, %eax
je 0x589b
leaq 0xd703(%rip), %rdi      # 0x12f90
leaq 0x60b0(%rip), %rsi      # 0xb944
callq 0x3170
jmp 0x58ae
leaq 0xd6ee(%rip), %rdi      # 0x12f90
leaq 0x60a0(%rip), %rsi      # 0xb949
callq 0x3170
jmp 0x58b0
movzwl -0x6(%rbp), %eax
andl $0x10, %eax
cmpl $0x0, %eax
je 0x58f2
movzwl -0x6(%rbp), %eax
andl $0x8, %eax
cmpl $0x0, %eax
je 0x58dd
leaq 0xd6c1(%rip), %rdi      # 0x12f90
leaq 0x6078(%rip), %rsi      # 0xb94e
callq 0x3170
jmp 0x58f0
leaq 0xd6ac(%rip), %rdi      # 0x12f90
leaq 0x6068(%rip), %rsi      # 0xb953
callq 0x3170
jmp 0x58f2
movzwl -0x6(%rbp), %eax
andl $0x78, %eax
cmpl $0x8, %eax
jne 0x5911
leaq 0xd68b(%rip), %rdi      # 0x12f90
leaq 0x604c(%rip), %rsi      # 0xb958
callq 0x3170
movzwl -0x6(%rbp), %eax
andl $0x80, %eax
cmpl $0x0, %eax
je 0x5932
leaq 0xd66a(%rip), %rdi      # 0x12f90
leaq 0x5fdb(%rip), %rsi      # 0xb908
callq 0x3170
movzwl -0x6(%rbp), %eax
andl $0x4, %eax
cmpl $0x0, %eax
je 0x5951
leaq 0xd64b(%rip), %rdi      # 0x12f90
leaq 0x6011(%rip), %rsi      # 0xb95d
callq 0x3170
movzwl -0x6(%rbp), %eax
andl $0x2, %eax
cmpl $0x0, %eax
je 0x5970
leaq 0xd62c(%rip), %rdi      # 0x12f90
leaq 0x5ff7(%rip), %rsi      # 0xb962
callq 0x3170
jmp 0x5afd
movzwl -0x6(%rbp), %eax
andl $0x80, %eax
cmpl $0x0, %eax
je 0x5996
leaq 0xd606(%rip), %rdi      # 0x12f90
leaq 0x5f77(%rip), %rsi      # 0xb908
callq 0x3170
movzwl -0x6(%rbp), %eax
andl $0x40, %eax
cmpl $0x0, %eax
je 0x59b5
leaq 0xd5e7(%rip), %rdi      # 0x12f90
leaq 0x5fb7(%rip), %rsi      # 0xb967
callq 0x3170
movzwl -0x6(%rbp), %eax
andl $0x20, %eax
cmpl $0x0, %eax
je 0x59d4
leaq 0xd5c8(%rip), %rdi      # 0x12f90
leaq 0x5f9d(%rip), %rsi      # 0xb96c
callq 0x3170
movzwl -0x6(%rbp), %eax
andl $0x10, %eax
cmpl $0x0, %eax
je 0x59f3
leaq 0xd5a9(%rip), %rdi      # 0x12f90
leaq 0x5f83(%rip), %rsi      # 0xb971
callq 0x3170
movzwl -0x6(%rbp), %eax
andl $0xe, %eax
movl %eax, %ecx
movq %rcx, -0x58(%rbp)
subl $0xe, %eax
ja 0x5afb
movq -0x58(%rbp), %rax
leaq 0x3028(%rip), %rcx      # 0x8a3c
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
jmp 0x5afb
leaq 0xd567(%rip), %rdi      # 0x12f90
leaq 0x5f46(%rip), %rsi      # 0xb976
callq 0x3170
movw -0x6(%rbp), %ax
movw %ax, 0xd540(%rip)       # 0x12f80
jmp 0x5afb
leaq 0xd544(%rip), %rdi      # 0x12f90
leaq 0x5f28(%rip), %rsi      # 0xb97b
callq 0x3170
movw -0x6(%rbp), %ax
movw %ax, 0xd51d(%rip)       # 0x12f80
jmp 0x5afb
leaq 0xd521(%rip), %rdi      # 0x12f90
leaq 0x5f0a(%rip), %rsi      # 0xb980
callq 0x3170
movw -0x6(%rbp), %ax
movw %ax, 0xd4fa(%rip)       # 0x12f80
jmp 0x5afb
leaq 0xd501(%rip), %rdi      # 0x12f90
leaq 0x5eef(%rip), %rsi      # 0xb985
callq 0x3170
jmp 0x5afb
leaq 0xd4ec(%rip), %rdi      # 0x12f90
leaq 0x5ede(%rip), %rsi      # 0xb989
callq 0x3170
movw -0x6(%rbp), %ax
movw %ax, 0xd4c5(%rip)       # 0x12f80
jmp 0x5afb
leaq 0xd4cc(%rip), %rdi      # 0x12f90
leaq 0x5ec3(%rip), %rsi      # 0xb98e
callq 0x3170
movw -0x6(%rbp), %ax
movw %ax, 0xd4a5(%rip)       # 0x12f80
jmp 0x5afb
leaq 0xd4ac(%rip), %rdi      # 0x12f90
leaq 0x5ea8(%rip), %rsi      # 0xb993
callq 0x3170
movw -0x6(%rbp), %ax
movw %ax, 0xd485(%rip)       # 0x12f80
jmp 0x5afd
jmp 0x5aff
jmp 0x5b01
cmpw $0x0, 0xd477(%rip)      # 0x12f80
je 0x5b1e
leaq 0xd47e(%rip), %rdi      # 0x12f90
leaq 0x5e7f(%rip), %rsi      # 0xb998
callq 0x3170
jmp 0x5b20
movsbl 0xd469(%rip), %ecx      # 0x12f90
xorl %eax, %eax
cmpl $0x0, %ecx
movb %al, -0x59(%rbp)
je 0x5b58
leaq 0xd458(%rip), %rdi      # 0x12f90
callq 0x3090
movq %rax, %rcx
subq $0x1, %rcx
leaq 0xd445(%rip), %rax      # 0x12f90
movsbl (%rax,%rcx), %eax
cmpl $0x20, %eax
sete %al
movb %al, -0x59(%rbp)
movb -0x59(%rbp), %al
testb $0x1, %al
jne 0x5b61
jmp 0x5b81
leaq 0xd428(%rip), %rdi      # 0x12f90
callq 0x3090
movq %rax, %rcx
subq $0x1, %rcx
leaq 0xd415(%rip), %rax      # 0x12f90
movb $0x0, (%rax,%rcx)
jmp 0x5b20
cmpl $0x63, -0x18(%rbp)
jne 0x5bf1
leaq 0xd402(%rip), %rdi      # 0x12f90
xorl %esi, %esi
movl $0x18, %edx
callq 0x5fe0
leaq 0x5df9(%rip), %rdi      # 0xb99a
leaq 0xd3e8(%rip), %rsi      # 0x12f90
movb $0x0, %al
callq 0x30a0
leaq 0x5de8(%rip), %rdi      # 0xb99e
movb $0x0, %al
callq 0x30a0
leaq 0xd3ec(%rip), %rdi      # 0x12fb0
movl $0x2, %esi
movl $0x28, %edx
callq 0x5fe0
movl -0x4(%rbp), %edx
movzwl -0x6(%rbp), %ecx
leaq 0x5dc0(%rip), %rdi      # 0xb9a1
leaq 0xd3c8(%rip), %rsi      # 0x12fb0
movb $0x0, %al
callq 0x30a0
jmp 0x5c33
leaq 0xd398(%rip), %rdi      # 0x12f90
movl $0x2, %esi
movl $0x28, %edx
callq 0x5fe0
leaq 0x5da2(%rip), %rdi      # 0xb9b0
leaq 0xd37b(%rip), %rsi      # 0x12f90
movb $0x0, %al
callq 0x30a0
leaq 0x25a0(%rip), %rdi      # 0x81c3
movb $0x0, %al
callq 0x30a0
movw $0x0, 0xd34d(%rip)      # 0x12f80
addq $0x60, %rsp
popq %rbp
retq
nopl (%rax)