// File: /workspace/github_c_makefile_star2_O0/buptlxb[P]xRay/disasm/instr_set/opcodes_FPU.c
// Function: DE_
void __bea_callspec__ DE_(PDISASM pMyDisasm)
{
    long MyMODRM;
    char (*pRegistersFPU)[8][8] ;

    GV.DECALAGE_EIP = 0;
    if (!Security(1, pMyDisasm)) {return;}
    MyMODRM = *((UInt8*)(UIntPtr) (GV.EIP_+1));
    pRegistersFPU = &RegistersFPU_Masm;
    if (GV.SYNTAX_ == NasmSyntax) {
        pRegistersFPU = &RegistersFPU_Nasm;
    }
    if (MyMODRM <= 0xbf) {

        GV.REGOPCODE = ((*((UInt8*)(UIntPtr) (GV.EIP_+1))) >> 3) & 0x7;
        if (GV.REGOPCODE == 0) {
            GV.MemDecoration = Arg2word;
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fiadd ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else if (GV.REGOPCODE == 1) {
            GV.MemDecoration = Arg2word;
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fimul ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else if (GV.REGOPCODE == 2) {
            GV.MemDecoration = Arg2word;
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+COMPARISON_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "ficom ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else if (GV.REGOPCODE == 3) {
            GV.MemDecoration = Arg2word;
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+COMPARISON_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "ficomp ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else if (GV.REGOPCODE == 4) {
            GV.MemDecoration = Arg2word;
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fisub ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else if (GV.REGOPCODE == 5) {
            GV.MemDecoration = Arg2word;
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fisubr ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else if (GV.REGOPCODE == 6) {
            GV.MemDecoration = Arg2word;
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fidiv ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else if (GV.REGOPCODE == 7) {
            GV.MemDecoration = Arg2word;
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fidivr ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else {
            FailDecode(pMyDisasm);
        }
    }
    else {
        if ((MyMODRM & 0xf0) == 0xc0) {
            if (((MyMODRM & 0xf) >=0) && ((MyMODRM & 0xf) <=7)) {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "faddp ");
                #endif
            }
            else {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fmulp ");
                #endif
                (*pMyDisasm).Argument2.AccessMode = WRITE;
            }
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Argument2.ArgMnemonic, (*pRegistersFPU)[0]);
            #endif
            (*pMyDisasm).Argument2.ArgType = REGISTER_TYPE+FPU_REG+REGS[0];
            (*pMyDisasm).Argument2.ArgSize = 80;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Argument1.ArgMnemonic, (*pRegistersFPU)[(MyMODRM & 0xf)%8]);
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REGS[(MyMODRM & 0xf)%8];
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else if ((MyMODRM & 0xf0) == 0xd0) {
            if (((MyMODRM & 0xf) >=0) && ((MyMODRM & 0xf) <=7)) {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+COMPARISON_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fcomp5 ");
                #endif
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Argument1.ArgMnemonic, (*pRegistersFPU)[(MyMODRM & 0xf)%8]);
                #endif
                (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REGS[(MyMODRM & 0xf)%8];
                (*pMyDisasm).Argument1.ArgSize = 80;
            }
            else if (MyMODRM == 0xd9){
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+COMPARISON_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fcompp ");
                #endif
            }
            else {
                FailDecode(pMyDisasm);
            }


        }
        else if ((MyMODRM & 0xf0) == 0xe0) {
            if (((MyMODRM & 0xf) >=0) && ((MyMODRM & 0xf) <=7)) {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fsubrp ");
                #endif
            }
            else {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fsubp ");
                #endif
                (*pMyDisasm).Argument2.AccessMode = WRITE;
            }
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Argument2.ArgMnemonic, (*pRegistersFPU)[0]);
            #endif
            (*pMyDisasm).Argument2.ArgType = REGISTER_TYPE+FPU_REG+REGS[0];
            (*pMyDisasm).Argument2.ArgSize = 80;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Argument1.ArgMnemonic, (*pRegistersFPU)[(MyMODRM & 0xf)%8]);
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REGS[(MyMODRM & 0xf)%8];
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else if ((MyMODRM & 0xf0) == 0xf0) {
            if (((MyMODRM & 0xf) >=0) && ((MyMODRM & 0xf) <=7)) {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fdivrp ");
                #endif
            }
            else {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fdivp ");
                #endif
                (*pMyDisasm).Argument2.AccessMode = WRITE;
            }
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Argument2.ArgMnemonic, (*pRegistersFPU)[0]);
            #endif
            (*pMyDisasm).Argument2.ArgType = REGISTER_TYPE+FPU_REG+REGS[0];
            (*pMyDisasm).Argument2.ArgSize = 80;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Argument1.ArgMnemonic, (*pRegistersFPU)[(MyMODRM & 0xf)%8]);
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REGS[(MyMODRM & 0xf)%8];
            (*pMyDisasm).Argument1.ArgSize = 80;

        }
        else {
            FailDecode(pMyDisasm);
        }
    }
    GV.EIP_ += GV.DECALAGE_EIP+2;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movq -0x8(%rbp), %rax
movl $0x0, 0x244(%rax)
movq -0x8(%rbp), %rsi
movl $0x1, %edi
callq 0x4d340
cmpl $0x0, %eax
jne 0x2ad42
jmp 0x2b610
movq -0x8(%rbp), %rax
movq 0x1f0(%rax), %rax
movzbl 0x1(%rax), %eax
movq %rax, -0x10(%rbp)
leaq 0x37ca4(%rip), %rax     # 0x62a00
movq %rax, -0x18(%rbp)
movq -0x8(%rbp), %rax
cmpl $0x200, 0x24c(%rax)     # imm = 0x200
jne 0x2ad7b
leaq 0x37cc9(%rip), %rax     # 0x62a40
movq %rax, -0x18(%rbp)
cmpq $0xbf, -0x10(%rbp)
jg 0x2b156
movq -0x8(%rbp), %rax
movq 0x1f0(%rax), %rax
movzbl 0x1(%rax), %ecx
sarl $0x3, %ecx
andl $0x7, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x240(%rax)
movq -0x8(%rbp), %rax
cmpl $0x0, 0x240(%rax)
jne 0x2ae1b
movq -0x8(%rbp), %rax
movl $0x66, 0x210(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x26e1b(%rip), %rsi     # 0x51c10
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x2b151
movq -0x8(%rbp), %rax
cmpl $0x1, 0x240(%rax)
jne 0x2ae8e
movq -0x8(%rbp), %rax
movl $0x66, 0x210(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x26daf(%rip), %rsi     # 0x51c17
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x2b14f
movq -0x8(%rbp), %rax
cmpl $0x2, 0x240(%rax)
jne 0x2af01
movq -0x8(%rbp), %rax
movl $0x66, 0x210(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x2000d, 0x60(%rax)    # imm = 0x2000D
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x26d43(%rip), %rsi     # 0x51c1e
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x2b14d
movq -0x8(%rbp), %rax
cmpl $0x3, 0x240(%rax)
jne 0x2af74
movq -0x8(%rbp), %rax
movl $0x66, 0x210(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x2000d, 0x60(%rax)    # imm = 0x2000D
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x26cd7(%rip), %rsi     # 0x51c25
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x2b14b
movq -0x8(%rbp), %rax
cmpl $0x4, 0x240(%rax)
jne 0x2afe7
movq -0x8(%rbp), %rax
movl $0x66, 0x210(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x26c6c(%rip), %rsi     # 0x51c2d
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x2b149
movq -0x8(%rbp), %rax
cmpl $0x5, 0x240(%rax)
jne 0x2b05a
movq -0x8(%rbp), %rax
movl $0x66, 0x210(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x26c00(%rip), %rsi     # 0x51c34
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x2b147
movq -0x8(%rbp), %rax
cmpl $0x6, 0x240(%rax)
jne 0x2b0ca
movq -0x8(%rbp), %rax
movl $0x66, 0x210(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x26b95(%rip), %rsi     # 0x51c3c
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x2b145
movq -0x8(%rbp), %rax
cmpl $0x7, 0x240(%rax)
jne 0x2b13a
movq -0x8(%rbp), %rax
movl $0x66, 0x210(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x26b2c(%rip), %rsi     # 0x51c43
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x2b143
movq -0x8(%rbp), %rdi
callq 0x30050
jmp 0x2b145
jmp 0x2b147
jmp 0x2b149
jmp 0x2b14b
jmp 0x2b14d
jmp 0x2b14f
jmp 0x2b151
jmp 0x2b5ed
movq -0x10(%rbp), %rax
andq $0xf0, %rax
cmpq $0xc0, %rax
jne 0x2b282
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x0, %rax
jl 0x2b1ad
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x7, %rax
jg 0x2b1ad
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x26b90(%rip), %rsi     # 0x51d36
callq 0x81c0
jmp 0x2b1de
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x26b72(%rip), %rsi     # 0x51d3d
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x2, 0x150(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x18(%rbp), %rsi
callq 0x81c0
movl 0x37ca8(%rip), %ecx     # 0x62ea0
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0x144(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0x148(%rax)
movq -0x8(%rbp), %rdi
addq $0x9c, %rdi
movq -0x18(%rbp), %rsi
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
shlq $0x3, %rdx
addq %rdx, %rsi
callq 0x81c0
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
leaq 0x37c44(%rip), %rax     # 0x62ea0
movl (%rax,%rdx,4), %ecx
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0xdc(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x2b5eb
movq -0x10(%rbp), %rax
andq $0xf0, %rax
cmpq $0xd0, %rax
jne 0x2b387
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x0, %rax
jl 0x2b348
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x7, %rax
jg 0x2b348
movq -0x8(%rbp), %rax
movl $0x2000d, 0x60(%rax)    # imm = 0x2000D
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x26a6a(%rip), %rsi     # 0x51d44
callq 0x81c0
movq -0x8(%rbp), %rdi
addq $0x9c, %rdi
movq -0x18(%rbp), %rsi
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
shlq $0x3, %rdx
addq %rdx, %rsi
callq 0x81c0
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
leaq 0x37b7b(%rip), %rax     # 0x62ea0
movl (%rax,%rdx,4), %ecx
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0xdc(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x2b382
cmpq $0xd9, -0x10(%rbp)
jne 0x2b377
movq -0x8(%rbp), %rax
movl $0x2000d, 0x60(%rax)    # imm = 0x2000D
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x269dc(%rip), %rsi     # 0x51d4c
callq 0x81c0
jmp 0x2b380
movq -0x8(%rbp), %rdi
callq 0x30050
jmp 0x2b382
jmp 0x2b5e9
movq -0x10(%rbp), %rax
andq $0xf0, %rax
cmpq $0xe0, %rax
jne 0x2b4b3
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x0, %rax
jl 0x2b3de
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x7, %rax
jg 0x2b3de
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2697d(%rip), %rsi     # 0x51d54
callq 0x81c0
jmp 0x2b40f
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x26960(%rip), %rsi     # 0x51d5c
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x2, 0x150(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x18(%rbp), %rsi
callq 0x81c0
movl 0x37a77(%rip), %ecx     # 0x62ea0
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0x144(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0x148(%rax)
movq -0x8(%rbp), %rdi
addq $0x9c, %rdi
movq -0x18(%rbp), %rsi
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
shlq $0x3, %rdx
addq %rdx, %rsi
callq 0x81c0
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
leaq 0x37a13(%rip), %rax     # 0x62ea0
movl (%rax,%rdx,4), %ecx
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0xdc(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x2b5e7
movq -0x10(%rbp), %rax
andq $0xf0, %rax
cmpq $0xf0, %rax
jne 0x2b5dc
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x0, %rax
jl 0x2b50a
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x7, %rax
jg 0x2b50a
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x26860(%rip), %rsi     # 0x51d63
callq 0x81c0
jmp 0x2b53b
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x26843(%rip), %rsi     # 0x51d6b
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x2, 0x150(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x18(%rbp), %rsi
callq 0x81c0
movl 0x3794b(%rip), %ecx     # 0x62ea0
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0x144(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0x148(%rax)
movq -0x8(%rbp), %rdi
addq $0x9c, %rdi
movq -0x18(%rbp), %rsi
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
shlq $0x3, %rdx
addq %rdx, %rsi
callq 0x81c0
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
leaq 0x378e7(%rip), %rax     # 0x62ea0
movl (%rax,%rdx,4), %ecx
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0xdc(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x2b5e5
movq -0x8(%rbp), %rdi
callq 0x30050
jmp 0x2b5e7
jmp 0x2b5e9
jmp 0x2b5eb
jmp 0x2b5ed
movq -0x8(%rbp), %rax
movl 0x244(%rax), %eax
addl $0x2, %eax
movl %eax, %eax
movl %eax, %ecx
movq -0x8(%rbp), %rax
addq 0x1f0(%rax), %rcx
movq %rcx, 0x1f0(%rax)
addq $0x20, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)