// File: /workspace/github_c_makefile_star2_O1/mmcco[P]sljit/sljit_src/sljitNativeX86_common.c
// Function: sljit_emit_op_flags
int sljit_emit_op_flags(struct sljit_compiler *compiler, int op,
	int dst, long dstw,
	int src, long srcw,
	int type)
{
	u_char *inst;
	u_char cond_set = 0;
#if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
	int reg;
#else
	/* CHECK_EXTRA_REGS migh overwrite these values. */
	int dst_save = dst;
	long dstw_save = dstw;
#endif

	CHECK_ERROR();
	CHECK(check_sljit_emit_op_flags(compiler, op, dst, dstw, src, srcw, type));

	if (dst == SLJIT_UNUSED)
		return SLJIT_SUCCESS;

	ADJUST_LOCAL_OFFSET(dst, dstw);
	CHECK_EXTRA_REGS(dst, dstw, (void)0);
	if (compiler->flags_saved)
		FAIL_IF(emit_restore_flags(compiler, op & SLJIT_KEEP_FLAGS));

	type &= 0xff;
	/* setcc = jcc + 0x10. */
	cond_set = get_jump_code(type) + 0x10;

#if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
	if (GET_OPCODE(op) == SLJIT_OR && !GET_ALL_FLAGS(op) && FAST_IS_REG(dst) && dst == src) {
		inst = ensure_buf(compiler, 1 + 4 + 3);
		FAIL_IF(!inst);
		INC_SIZE(4 + 3);
		/* Set low reg to conditional flag. */
		*inst++ = (reg_map[TMP_REG1] <= 7) ? REX : REX_B;
		*inst++ = GROUP_0F;
		*inst++ = cond_set;
		*inst++ = MOD_REG | reg_lmap[TMP_REG1];
		*inst++ = REX | (reg_map[TMP_REG1] <= 7 ? 0 : REX_R) | (reg_map[dst] <= 7 ? 0 : REX_B);
		*inst++ = OR_rm8_r8;
		*inst++ = MOD_REG | (reg_lmap[TMP_REG1] << 3) | reg_lmap[dst];
		return SLJIT_SUCCESS;
	}

	reg = (op == SLJIT_MOV && FAST_IS_REG(dst)) ? dst : TMP_REG1;

	inst = ensure_buf(compiler, 1 + 4 + 4);
	FAIL_IF(!inst);
	INC_SIZE(4 + 4);
	/* Set low reg to conditional flag. */
	*inst++ = (reg_map[reg] <= 7) ? REX : REX_B;
	*inst++ = GROUP_0F;
	*inst++ = cond_set;
	*inst++ = MOD_REG | reg_lmap[reg];
	*inst++ = REX_W | (reg_map[reg] <= 7 ? 0 : (REX_B | REX_R));
	*inst++ = GROUP_0F;
	*inst++ = MOVZX_r_rm8;
	*inst = MOD_REG | (reg_lmap[reg] << 3) | reg_lmap[reg];

	if (reg != TMP_REG1)
		return SLJIT_SUCCESS;

	if (GET_OPCODE(op) < SLJIT_ADD) {
		compiler->mode32 = GET_OPCODE(op) != SLJIT_MOV;
		return emit_mov(compiler, dst, dstw, TMP_REG1, 0);
	}
#if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) \
		|| (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS)
	compiler->skip_checks = 1;
#endif
	return sljit_emit_op2(compiler, op, dst, dstw, dst, dstw, TMP_REG1, 0);
#else /* SLJIT_CONFIG_X86_64 */
	if (GET_OPCODE(op) < SLJIT_ADD && FAST_IS_REG(dst)) {
		if (reg_map[dst] <= 4) {
			/* Low byte is accessible. */
			inst = ensure_buf(compiler, 1 + 3 + 3);
			FAIL_IF(!inst);
			INC_SIZE(3 + 3);
			/* Set low byte to conditional flag. */
			*inst++ = GROUP_0F;
			*inst++ = cond_set;
			*inst++ = MOD_REG | reg_map[dst];

			*inst++ = GROUP_0F;
			*inst++ = MOVZX_r_rm8;
			*inst = MOD_REG | (reg_map[dst] << 3) | reg_map[dst];
			return SLJIT_SUCCESS;
		}

		/* Low byte is not accessible. */
		if (cpu_has_cmov == -1)
			get_cpu_features();

		if (cpu_has_cmov) {
			EMIT_MOV(compiler, TMP_REG1, 0, SLJIT_IMM, 1);
			/* a xor reg, reg operation would overwrite the flags. */
			EMIT_MOV(compiler, dst, 0, SLJIT_IMM, 0);

			inst = ensure_buf(compiler, 1 + 3);
			FAIL_IF(!inst);
			INC_SIZE(3);

			*inst++ = GROUP_0F;
			/* cmovcc = setcc - 0x50. */
			*inst++ = cond_set - 0x50;
			*inst++ = MOD_REG | (reg_map[dst] << 3) | reg_map[TMP_REG1];
			return SLJIT_SUCCESS;
		}

		inst = ensure_buf(compiler, 1 + 1 + 3 + 3 + 1);
		FAIL_IF(!inst);
		INC_SIZE(1 + 3 + 3 + 1);
		*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
		/* Set al to conditional flag. */
		*inst++ = GROUP_0F;
		*inst++ = cond_set;
		*inst++ = MOD_REG | 0 /* eax */;

		*inst++ = GROUP_0F;
		*inst++ = MOVZX_r_rm8;
		*inst++ = MOD_REG | (reg_map[dst] << 3) | 0 /* eax */;
		*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
		return SLJIT_SUCCESS;
	}

	if (GET_OPCODE(op) == SLJIT_OR && !GET_ALL_FLAGS(op) && FAST_IS_REG(dst) && dst == src && reg_map[dst] <= 4) {
		SLJIT_COMPILE_ASSERT(reg_map[SLJIT_R0] == 0, scratch_reg1_must_be_eax);
		if (dst != SLJIT_R0) {
			inst = ensure_buf(compiler, 1 + 1 + 3 + 2 + 1);
			FAIL_IF(!inst);
			INC_SIZE(1 + 3 + 2 + 1);
			/* Set low reg to conditional flag. */
			*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
			*inst++ = GROUP_0F;
			*inst++ = cond_set;
			*inst++ = MOD_REG | 0 /* eax */;
			*inst++ = OR_rm8_r8;
			*inst++ = MOD_REG | (0 /* eax */ << 3) | reg_map[dst];
			*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
		}
		else {
			inst = ensure_buf(compiler, 1 + 2 + 3 + 2 + 2);
			FAIL_IF(!inst);
			INC_SIZE(2 + 3 + 2 + 2);
			/* Set low reg to conditional flag. */
			*inst++ = XCHG_r_rm;
			*inst++ = MOD_REG | (1 /* ecx */ << 3) | reg_map[TMP_REG1];
			*inst++ = GROUP_0F;
			*inst++ = cond_set;
			*inst++ = MOD_REG | 1 /* ecx */;
			*inst++ = OR_rm8_r8;
			*inst++ = MOD_REG | (1 /* ecx */ << 3) | 0 /* eax */;
			*inst++ = XCHG_r_rm;
			*inst++ = MOD_REG | (1 /* ecx */ << 3) | reg_map[TMP_REG1];
		}
		return SLJIT_SUCCESS;
	}

	/* Set TMP_REG1 to the bit. */
	inst = ensure_buf(compiler, 1 + 1 + 3 + 3 + 1);
	FAIL_IF(!inst);
	INC_SIZE(1 + 3 + 3 + 1);
	*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
	/* Set al to conditional flag. */
	*inst++ = GROUP_0F;
	*inst++ = cond_set;
	*inst++ = MOD_REG | 0 /* eax */;

	*inst++ = GROUP_0F;
	*inst++ = MOVZX_r_rm8;
	*inst++ = MOD_REG | (0 << 3) /* eax */ | 0 /* eax */;

	*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];

	if (GET_OPCODE(op) < SLJIT_ADD)
		return emit_mov(compiler, dst, dstw, TMP_REG1, 0);

#if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) \
		|| (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS)
	compiler->skip_checks = 1;
#endif
	return sljit_emit_op2(compiler, op, dst_save, dstw_save, dst_save, dstw_save, TMP_REG1, 0);
#endif /* SLJIT_CONFIG_X86_64 */
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movl (%rdi), %ebx
testl %ebx, %ebx
je 0x1d364
movl %ebx, %eax
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movl 0x50(%rsp), %eax
cmpl $0x200, %eax            # imm = 0x200
jae 0x1db14
movzbl %al, %ebx
cmpl $0x16, %ebx
jae 0x1db22
movq %r9, %r13
movl %edx, %r15d
movl %esi, %ebp
movq %rdi, %r14
cmpl $0x20, %esi
je 0x1d3aa
movl %ebp, %eax
andl $0xffff80ff, %eax       # imm = 0xFFFF80FF
leal -0x65(%rax), %edx
cmpl $0x3, %edx
jb 0x1d3aa
addl $-0x25, %eax
cmpl $0x2, %eax
jae 0x1db64
testl $0x3c00, %ebp           # imm = 0x3C00
jne 0x1db30
movl %ebp, %eax
notl %eax
testl $0x4200, %eax           # imm = 0x4200
je 0x1db3e
movl %ebp, %r12d
andl $0xffff80ff, %r12d      # imm = 0xFFFF80FF
cmpl $0x5f, %r12d
jg 0x1d3f0
testl %r8d, %r8d
jne 0x1d3df
testq %r13, %r13
je 0x1d402
leaq 0x5e89(%rip), %rdi      # 0x2326f
movl $0x57a, %esi            # imm = 0x57A
jmp 0x1db58
cmpl %r15d, %r8d
jne 0x1db4c
cmpq %rcx, %r13
jne 0x1db4c
movq %r8, 0x10(%rsp)
movl 0x48(%r14), %eax
cmpl $-0x1, %eax
je 0x1d604
movl 0x4c(%r14), %edx
cmpl $-0x1, %edx
je 0x1d604
testl %r15d, %r15d
je 0x1d456
setg %dil
cmpl %r15d, %eax
setge %sil
testb %sil, %dil
jne 0x1d456
movl $0xc, %r8d
subl %edx, %r8d
cmpl %r15d, %r8d
setge %dl
cmpl $0xd, %r15d
setge %sil
orb %dl, %sil
jne 0x1d539
testq %rcx, %rcx
jne 0x1d604
movq 0x78(%r14), %rdi
testq %rdi, %rdi
movq %rcx, 0x8(%rsp)
je 0x1d90b
btl $0x8, %ebp
leaq 0x2ee4(%rip), %rsi      # 0x20360
leaq 0x5f79(%rip), %rdx      # 0x233fc
cmovaeq %rsi, %rdx
cmpl $0x60, %r12d
jl 0x1d49f
leal -0x60(%r12), %eax
leaq 0xa7b7(%rip), %rcx      # 0x27c50
leaq (%rcx,%rax,8), %rax
jmp 0x1d4b3
movslq %r12d, %rax
leaq 0xa707(%rip), %rcx      # 0x27bb0
leaq (%rcx,%rax,8), %rax
addq $-0x100, %rax
movq (%rax), %rcx
btl $0x9, %ebp
leaq 0x5fb0(%rip), %r8       # 0x23471
cmovaeq %rsi, %r8
btl $0xe, %ebp
leaq 0x5fb0(%rip), %r9       # 0x23480
cmovaeq %rsi, %r9
leaq 0x60ed(%rip), %rsi      # 0x235c8
xorl %eax, %eax
callq 0x20b0
testb $0x40, %r15b
jne 0x1d51d
testb %r15b, %r15b
movq 0x8(%rsp), %rdx
js 0x1d560
testl %r15d, %r15d
je 0x1d615
movq 0x78(%r14), %rdi
cmpl %r15d, 0x48(%r14)
jge 0x1d651
movl $0xc, %edx
subl %r15d, %edx
leaq 0x5fba(%rip), %rsi      # 0x234d2
jmp 0x1d65c
movq 0x78(%r14), %rdi
leaq 0x5e49(%rip), %rsi      # 0x23371
movq 0x8(%rsp), %rdx
xorl %eax, %eax
callq 0x20b0
jmp 0x1d725
cmpl $0x8d, %r15d
jne 0x1d59f
testq %rcx, %rcx
js 0x1d604
movslq 0x80(%r14), %rax
cmpq %rcx, %rax
jg 0x1d45f
jmp 0x1d604
movl %ebx, 0x4(%rsp)
movl %r15d, %ebx
movq 0x78(%r14), %rsi
andl $0x3f, %ebx
je 0x1d634
movl $0x5b, %edi
callq 0x20a0
movq 0x78(%r14), %rdi
cmpl 0x48(%r14), %ebx
jle 0x1d668
movl $0xc, %edx
subl %ebx, %edx
leaq 0x5f38(%rip), %rsi      # 0x234d2
jmp 0x1d673
testb %r15b, %r15b
jns 0x1d604
movl %r15d, %edx
andl $0x3f, %edx
sete %sil
cmpl %eax, %edx
setle %dil
orb %sil, %dil
jne 0x1d5c3
cmpl $0xc, %edx
ja 0x1d604
cmpl %r8d, %edx
jle 0x1d604
testl $0x3f00, %r15d          # imm = 0x3F00
je 0x1d5f7
testl %edx, %edx
je 0x1d604
movl %r15d, %edx
shrl $0x8, %edx
andl $0x3f, %edx
setne %sil
cmpl %eax, %edx
setle %al
testb %al, %sil
jne 0x1d5f1
cmpl $0xc, %edx
ja 0x1d604
cmpl %r8d, %edx
jle 0x1d604
cmpq $0x4, %rcx
jae 0x1d604
cmpl $0x4000, %r15d          # imm = 0x4000
jb 0x1d45f
leaq 0x5c64(%rip), %rdi      # 0x2326f
movl $0x57e, %esi            # imm = 0x57E
jmp 0x1db58
movq 0x78(%r14), %rcx
leaq 0x5d6e(%rip), %rdi      # 0x2338e
movl $0x6, %esi
movl $0x1, %edx
callq 0x2120
jmp 0x1d725
leaq 0x5d4c(%rip), %rax      # 0x23387
movq %rsi, %rdi
movq %rax, %rsi
xorl %eax, %eax
callq 0x20b0
movl 0x4(%rsp), %ebx
jmp 0x1d725
leal -0x1(%r15), %edx
leaq 0x5e71(%rip), %rsi      # 0x234cd
xorl %eax, %eax
callq 0x20b0
jmp 0x1d725
decl %ebx
leaq 0x5e5c(%rip), %rsi      # 0x234cd
movl %ebx, %edx
xorl %eax, %eax
callq 0x20b0
testl $0x3f00, %r15d          # imm = 0x3F00
movl 0x4(%rsp), %ebx
je 0x1d6c6
movq 0x78(%r14), %rcx
leaq 0x5ce4(%rip), %rdi      # 0x23376
movl $0x3, %esi
movl $0x1, %edx
callq 0x2120
movl %r15d, %edx
shrl $0x8, %edx
andl $0x3f, %edx
movq 0x78(%r14), %rdi
cmpl 0x48(%r14), %edx
jle 0x1d6e4
movl $0xc, %eax
subl %edx, %eax
leaq 0x5e10(%rip), %rsi      # 0x234d2
movl %eax, %edx
jmp 0x1d6ed
movq 0x8(%rsp), %rdx
testq %rdx, %rdx
je 0x1d717
movq 0x78(%r14), %rdi
leaq 0x5ca5(%rip), %rsi      # 0x23380
xorl %eax, %eax
callq 0x20b0
jmp 0x1d717
decl %edx
leaq 0x5de0(%rip), %rsi      # 0x234cd
xorl %eax, %eax
callq 0x20b0
movq 0x8(%rsp), %rcx
testq %rcx, %rcx
je 0x1d717
movq 0x78(%r14), %rdi
movl $0x1, %edx
shll %cl, %edx
leaq 0x5c6a(%rip), %rsi      # 0x2337a
xorl %eax, %eax
callq 0x20b0
movq 0x78(%r14), %rsi
movl $0x5d, %edi
callq 0x20a0
cmpl $0x0, 0x10(%rsp)
je 0x1d8b4
movq 0x78(%r14), %rcx
leaq 0x5d48(%rip), %rdi      # 0x23483
movl $0x2, %esi
movl $0x1, %edx
callq 0x2120
movq 0x10(%rsp), %rcx
testb $0x40, %cl
jne 0x1d772
movq 0x78(%r14), %rax
testb %cl, %cl
js 0x1d78c
cmpl %ecx, 0x48(%r14)
jge 0x1d7be
movl $0xc, %edx
subl %ecx, %edx
leaq 0x5d62(%rip), %rsi      # 0x234d2
jmp 0x1d7c8
movq 0x78(%r14), %rdi
leaq 0x5bf4(%rip), %rsi      # 0x23371
movq %r13, %rdx
xorl %eax, %eax
callq 0x20b0
jmp 0x1d8b4
movl %ebx, 0x4(%rsp)
movl %ecx, %ebx
andl $0x3f, %ebx
je 0x1d7d7
movl $0x5b, %edi
movq %rax, %rsi
callq 0x20a0
movq 0x78(%r14), %rdi
cmpl 0x48(%r14), %ebx
jle 0x1d7f4
movl $0xc, %edx
subl %ebx, %edx
leaq 0x5d16(%rip), %rsi      # 0x234d2
jmp 0x1d7ff
leal -0x1(%rcx), %edx
leaq 0x5d05(%rip), %rsi      # 0x234cd
movq %rax, %rdi
xorl %eax, %eax
callq 0x20b0
jmp 0x1d8b4
leaq 0x5ba9(%rip), %rsi      # 0x23387
movq %rax, %rdi
movq %r13, %rdx
xorl %eax, %eax
callq 0x20b0
movl 0x4(%rsp), %ebx
jmp 0x1d8b4
decl %ebx
leaq 0x5cd0(%rip), %rsi      # 0x234cd
movl %ebx, %edx
xorl %eax, %eax
callq 0x20b0
movq 0x10(%rsp), %rbx
testl $0x3f00, %ebx           # imm = 0x3F00
je 0x1d851
movq 0x78(%r14), %rcx
leaq 0x5b58(%rip), %rdi      # 0x23376
movl $0x3, %esi
movl $0x1, %edx
callq 0x2120
movl %ebx, %edx
shrl $0x8, %edx
andl $0x3f, %edx
movq 0x78(%r14), %rdi
cmpl 0x48(%r14), %edx
jle 0x1d871
movl $0xc, %eax
subl %edx, %eax
leaq 0x5c85(%rip), %rsi      # 0x234d2
movl %eax, %edx
jmp 0x1d87a
testq %r13, %r13
movl 0x4(%rsp), %ebx
je 0x1d8a6
movq 0x78(%r14), %rdi
leaq 0x5b1b(%rip), %rsi      # 0x23380
movq %r13, %rdx
xorl %eax, %eax
callq 0x20b0
jmp 0x1d8a6
decl %edx
leaq 0x5c53(%rip), %rsi      # 0x234cd
xorl %eax, %eax
callq 0x20b0
movl 0x4(%rsp), %ebx
testq %r13, %r13
je 0x1d8a6
movq 0x78(%r14), %rdi
movl $0x1, %edx
movl %r13d, %ecx
shll %cl, %edx
leaq 0x5adb(%rip), %rsi      # 0x2337a
xorl %eax, %eax
callq 0x20b0
movq 0x78(%r14), %rsi
movl $0x5d, %edi
callq 0x20a0
cmpl $0x100, 0x50(%rsp)      # imm = 0x100
leaq 0x5c61(%rip), %rax      # 0x23524
leaq 0x2a96(%rip), %rcx      # 0x20360
cmovbq %rcx, %rax
leaq 0x5c55(%rip), %rcx      # 0x2352a
leaq 0x5c4b(%rip), %rdx      # 0x23527
cmovbq %rcx, %rdx
cmpl $0xe, %ebx
cmovbq %rax, %rdx
movq 0x78(%r14), %rdi
movl %ebx, %eax
leaq 0xa40c(%rip), %rcx      # 0x27d00
movq (%rcx,%rax,8), %rcx
leaq 0x5cdb(%rip), %rsi      # 0x235da
xorl %eax, %eax
callq 0x20b0
movq 0x8(%rsp), %rcx
testl %r15d, %r15d
je 0x1daca
cmpl $0x8d, %r15d
jne 0x1d926
addq $0x8, %rcx
movq %rcx, 0x8(%rsp)
cmpl $0x0, 0x74(%r14)
je 0x1d964
movl $0x7, %esi
movq %r14, %rdi
callq 0x152be
testq %rax, %rax
je 0x1dad2
movl %ebp, %ecx
movb $0x6, (%rax)
addq $0x6, 0x60(%r14)
andl $0x4000, %ecx           # imm = 0x4000
movl $0x648d489d, 0x1(%rax)  # imm = 0x648D489D
movw $0xf824, 0x5(%rax)      # imm = 0xF824
movl %ecx, 0x74(%r14)
movl %ebx, %edi
callq 0x1db72
movl %eax, %r13d
addb $0x10, %r13b
cmpl $0x66, %r12d
jne 0x1d9f2
cmpl $0x100, %ebp            # imm = 0x100
setae %al
cmpl $0x40, %r15d
setge %cl
orb %al, %cl
cmpl 0x10(%rsp), %r15d
setne %al
orb %cl, %al
jne 0x1d9f2
movl $0x8, %esi
movq %r14, %rdi
callq 0x152be
testq %rax, %rax
je 0x1dadc
movb $0x7, (%rax)
addq $0x7, 0x60(%r14)
movw $0xf40, 0x1(%rax)       # imm = 0xF40
movb %r13b, 0x3(%rax)
movb $-0x3e, 0x4(%rax)
movslq %r15d, %rcx
movl $0xf10f, %edx           # imm = 0xF10F
btq %r15, %rdx
setb %dl
xorb $0x41, %dl
movb %dl, 0x5(%rax)
movb $0x8, 0x6(%rax)
leaq 0x573e(%rip), %rdx      # 0x23120
movb (%rcx,%rdx), %cl
orb $-0x30, %cl
movb %cl, 0x7(%rax)
xorl %ebx, %ebx
jmp 0x1d353
movl $0x9, %esi
movq %r14, %rdi
callq 0x152be
testq %rax, %rax
je 0x1dadc
cmpl $0x40, %r15d
movl $0xe, %ecx
cmovll %r15d, %ecx
movl $0xe, %edx
cmpl $0x20, %ebp
cmovnel %edx, %ecx
movb $0x8, (%rax)
addq $0x8, 0x60(%r14)
movslq %ecx, %rcx
movl $0xf10f, %edx           # imm = 0xF10F
xorl %esi, %esi
btq %rcx, %rdx
setb %dl
setae %sil
xorb $0x41, %dl
movb %dl, 0x1(%rax)
movb $0xf, 0x2(%rax)
movb %r13b, 0x3(%rax)
leaq 0x56ce(%rip), %rdx      # 0x23120
movb (%rcx,%rdx), %dl
movl %edx, %edi
orb $-0x40, %dil
movb %dil, 0x4(%rax)
leal (%rsi,%rsi,4), %esi
addl $0x48, %esi
movb %sil, 0x5(%rax)
movw $0xb60f, 0x6(%rax)      # imm = 0xB60F
shlb $0x3, %dl
orb %dil, %dl
movb %dl, 0x8(%rax)
xorl %ebx, %ebx
cmpl $0xe, %ecx
jne 0x1d353
cmpl $0x5f, %r12d
jg 0x1dae4
xorl %eax, %eax
cmpl $0x20, %r12d
setne %al
movl %eax, 0x70(%r14)
testl %r15d, %r15d
movq 0x8(%rsp), %r9
je 0x1d353
xorl %ebx, %ebx
movq %r14, %rdi
movl $0x1, %esi
movl $0xe, %edx
xorl %ecx, %ecx
movl %r15d, %r8d
callq 0x15e07
testq %rax, %rax
je 0x1dadc
movb $-0x77, (%rax)
jmp 0x1d353
movl %r15d, %ebx
jmp 0x1d353
cmpl $0x0, (%r14)
je 0x1d964
movl (%r14), %ebx
jmp 0x1d353
movl $0x1, 0x84(%r14)
movq %r14, %rdi
movl %ebp, %esi
movl %r15d, %edx
movq 0x8(%rsp), %rcx
movl %r15d, %r8d
movq %rcx, %r9
pushq $0x0
pushq $0xe
callq 0x18025
addq $0x28, %rsp
jmp 0x1d359
leaq 0x5754(%rip), %rdi      # 0x2326f
movl $0x573, %esi            # imm = 0x573
jmp 0x1db58
leaq 0x5746(%rip), %rdi      # 0x2326f
movl $0x574, %esi            # imm = 0x574
jmp 0x1db58
leaq 0x5738(%rip), %rdi      # 0x2326f
movl $0x577, %esi            # imm = 0x577
jmp 0x1db58
leaq 0x572a(%rip), %rdi      # 0x2326f
movl $0x578, %esi            # imm = 0x578
jmp 0x1db58
leaq 0x571c(%rip), %rdi      # 0x2326f
movl $0x57c, %esi            # imm = 0x57C
xorl %eax, %eax
callq 0x2080
callq 0x2040
leaq 0x5704(%rip), %rdi      # 0x2326f
movl $0x576, %esi            # imm = 0x576
jmp 0x1db58