LLM4Binary/decompile-bench-makefile huggingface dataset:
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::SBC(unsigned char)
void CPU::SBC(uint8_t u8) {                 // SBC A, u8
  uint8_t result = this->reg.A - u8 - ((this->reg.F & 0x10) >> 4);

  // Set Flags
  this->setZeroFlag(result == 0);     // Zero Flag
  this->setAddSubFlag(true);  // Set N Flag
  this->checkHalfCarry(this->reg.A, result);
  this->checkCarry(u8 + ((this->reg.F & 0x10) >> 4), this->reg.A);  // Check Carry for Subtraction

  this->reg.A = result;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movb %sil, %al
movq %rdi, -0x8(%rbp)
movb %al, -0x9(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x18(%rbp)
movzbl 0x118(%rdi), %eax
movzbl -0x9(%rbp), %ecx
subl %ecx, %eax
movzbl 0x11d(%rdi), %ecx
andl $0x10, %ecx
sarl $0x4, %ecx
subl %ecx, %eax
movb %al, -0xa(%rbp)
movzbl -0xa(%rbp), %eax
cmpl $0x0, %eax
sete %al
movzbl %al, %esi
andl $0x1, %esi
callq 0x4a9b0
movq -0x18(%rbp), %rdi
movl $0x1, %esi
callq 0x4aa20
movq -0x18(%rbp), %rdi
movb 0x118(%rdi), %al
movzbl %al, %esi
movzbl -0xa(%rbp), %edx
callq 0x4ab70
movq -0x18(%rbp), %rax
movzbl -0x9(%rbp), %ecx
movzbl 0x11d(%rax), %edx
andl $0x10, %edx
sarl $0x4, %edx
addl %edx, %ecx
movq %rax, %rdi
movzbl %cl, %esi
movzbl 0x118(%rax), %edx
callq 0x4abe0
movq -0x18(%rbp), %rax
movb -0xa(%rbp), %cl
movb %cl, 0x118(%rax)
addq $0x20, %rsp
popq %rbp
retq
nop
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::SUB(unsigned char)
void CPU::SUB(uint8_t u8) {                 // SUB A, u8
  uint8_t result = this->reg.A - u8;

  // Set Flags
  this->setZeroFlag(result == 0);      // Zero Flag
  this->setAddSubFlag(true);  // Set N Flag
  this->checkHalfCarry(this->reg.A, result);
  this->checkCarry(u8, this->reg.A);  // Check Carry for Subtraction

  this->reg.A = result;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movb %sil, %al
movq %rdi, -0x8(%rbp)
movb %al, -0x9(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x18(%rbp)
movzbl 0x118(%rdi), %eax
movzbl -0x9(%rbp), %ecx
subl %ecx, %eax
movb %al, -0xa(%rbp)
movzbl -0xa(%rbp), %eax
cmpl $0x0, %eax
sete %al
movzbl %al, %esi
andl $0x1, %esi
callq 0x4a9b0
movq -0x18(%rbp), %rdi
movl $0x1, %esi
callq 0x4aa20
movq -0x18(%rbp), %rdi
movb 0x118(%rdi), %al
movzbl %al, %esi
movzbl -0xa(%rbp), %edx
callq 0x4ab70
movq -0x18(%rbp), %rax
movb -0x9(%rbp), %cl
movq %rax, %rdi
movzbl %cl, %esi
movzbl 0x118(%rax), %edx
callq 0x4abe0
movq -0x18(%rbp), %rax
movb -0xa(%rbp), %cl
movb %cl, 0x118(%rax)
addq $0x20, %rsp
popq %rbp
retq
nop
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::ADDHL(unsigned short)
void CPU::ADDHL(uint16_t r16) {             // ADD HL, r16
  uint16_t HL = (this->reg.H << 8) | this->reg.L;
  uint16_t result = HL + r16;

  // Set Flags
  this->setAddSubFlag(false);  // Unset N Flag
  this->checkHalfCarry(HL >> 8, result >> 8);
  this->checkCarry_16(HL, HL + r16);

  this->reg.H = result >> 8;
  this->reg.L = result & 0xFF;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movw %si, %ax
movq %rdi, -0x8(%rbp)
movw %ax, -0xa(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x18(%rbp)
movzbl 0x11e(%rdi), %eax
shll $0x8, %eax
movzbl 0x11f(%rdi), %ecx
orl %ecx, %eax
movw %ax, -0xc(%rbp)
movzwl -0xc(%rbp), %eax
movzwl -0xa(%rbp), %ecx
addl %ecx, %eax
movw %ax, -0xe(%rbp)
xorl %esi, %esi
callq 0x4aa20
movq -0x18(%rbp), %rdi
movzwl -0xc(%rbp), %eax
sarl $0x8, %eax
movb %al, %cl
movzwl -0xe(%rbp), %eax
sarl $0x8, %eax
movzbl %cl, %esi
movzbl %al, %edx
callq 0x4ab70
movq -0x18(%rbp), %rdi
movw -0xc(%rbp), %cx
movzwl -0xc(%rbp), %eax
movzwl -0xa(%rbp), %edx
addl %edx, %eax
movzwl %cx, %esi
movzwl %ax, %edx
callq 0x4ac30
movq -0x18(%rbp), %rax
movzwl -0xe(%rbp), %ecx
sarl $0x8, %ecx
movb %cl, 0x11e(%rax)
movzwl -0xe(%rbp), %ecx
andl $0xff, %ecx
movb %cl, 0x11f(%rax)
addq $0x20, %rsp
popq %rbp
retq
nopw (%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::DEC(unsigned char*, unsigned char*)
void CPU::DEC(uint8_t *ru, uint8_t *rl) {    // DEC r16
  uint16_t r16 = (*ru << 8) | *rl;
  uint16_t result = r16 - 1;

  *ru = result >> 8;
  *rl = result & 0xFF;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq %rdx, -0x18(%rbp)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
shll $0x8, %eax
movq -0x18(%rbp), %rcx
movzbl (%rcx), %ecx
orl %ecx, %eax
movw %ax, -0x1a(%rbp)
movzwl -0x1a(%rbp), %eax
subl $0x1, %eax
movw %ax, -0x1c(%rbp)
movzwl -0x1c(%rbp), %eax
sarl $0x8, %eax
movb %al, %cl
movq -0x10(%rbp), %rax
movb %cl, (%rax)
movzwl -0x1c(%rbp), %eax
andl $0xff, %eax
movb %al, %cl
movq -0x18(%rbp), %rax
movb %cl, (%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::BIT(unsigned char, unsigned char*)
void CPU::BIT(uint8_t u3, uint8_t *r8) {     // BIT u3, r8
  // Check bit at u3 in r8's Bytes
  // Shift byte to u3 Bit to check if R8 Bit is set
  if ( ((1 << u3) & *r8) == 0 ) {
    this->setZeroFlag(true);
  }
  this->setAddSubFlag(false);
  this->setHalfCarryFlag(true);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movb %sil, %al
movq %rdi, -0x8(%rbp)
movb %al, -0x9(%rbp)
movq %rdx, -0x18(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x20(%rbp)
movzbl -0x9(%rbp), %ecx
movl $0x1, %eax
shll %cl, %eax
movq -0x18(%rbp), %rcx
movzbl (%rcx), %ecx
andl %ecx, %eax
cmpl $0x0, %eax
jne 0xb9fc5
movq -0x20(%rbp), %rdi
movl $0x1, %esi
callq 0x4a9b0
movq -0x20(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa20
movq -0x20(%rbp), %rdi
movl $0x1, %esi
callq 0x4aa90
addq $0x20, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::BIT(unsigned char, unsigned short)
void CPU::BIT(uint8_t u3, uint16_t a16) {    // BIT u3, [HL]
  uint8_t value = this->memory.read(a16);
  this->BIT(u3, &value);
  this->memory.write(a16, value);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movw %dx, %ax
movb %sil, %cl
movq %rdi, -0x8(%rbp)
movb %cl, -0x9(%rbp)
movw %ax, -0xc(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x18(%rbp)
addq $0x130, %rdi            # imm = 0x130
movzwl -0xc(%rbp), %esi
callq 0xbc0c0
movq -0x18(%rbp), %rdi
movb %al, -0xd(%rbp)
leaq -0xd(%rbp), %rdx
movzbl -0x9(%rbp), %esi
callq 0xb9f80
movq -0x18(%rbp), %rdi
addq $0x130, %rdi            # imm = 0x130
movw -0xc(%rbp), %ax
movzwl %ax, %esi
movzbl -0xd(%rbp), %edx
callq 0xbc150
addq $0x20, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::RES(unsigned char, unsigned short)
void CPU::RES(uint8_t u3, uint16_t a16) {    // RES u3, [HL]
  uint8_t value = this->memory.read(a16);
  this->RES(u3, &value);
  this->memory.write(a16, value);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movw %dx, %ax
movb %sil, %cl
movq %rdi, -0x8(%rbp)
movb %cl, -0x9(%rbp)
movw %ax, -0xc(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x18(%rbp)
addq $0x130, %rdi            # imm = 0x130
movzwl -0xc(%rbp), %esi
callq 0xbc0c0
movq -0x18(%rbp), %rdi
movb %al, -0xd(%rbp)
leaq -0xd(%rbp), %rdx
movzbl -0x9(%rbp), %esi
callq 0xba060
movq -0x18(%rbp), %rdi
addq $0x130, %rdi            # imm = 0x130
movw -0xc(%rbp), %ax
movzwl %ax, %esi
movzbl -0xd(%rbp), %edx
callq 0xbc150
addq $0x20, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::SWAP(unsigned char*)
void CPU::SWAP(uint8_t *r8) {               // SWAP r8
  uint8_t L = *r8 >> 4;
  uint8_t R = *r8 << 4;
  uint8_t result = L | R;

  // Set Flags
  this->setZeroFlag(result == 0);     // Zero Flag
  this->setAddSubFlag(false);     // Unset N Flag
  this->setHalfCarryFlag(false);  // Unset Half Carry Flag
  this->setCarryFlag(false);      // Unset Carry Flag
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x20(%rbp)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
sarl $0x4, %eax
movb %al, -0x11(%rbp)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
shll $0x4, %eax
movb %al, -0x12(%rbp)
movzbl -0x11(%rbp), %eax
movzbl -0x12(%rbp), %ecx
orl %ecx, %eax
movb %al, -0x13(%rbp)
movzbl -0x13(%rbp), %eax
cmpl $0x0, %eax
sete %al
movzbl %al, %esi
andl $0x1, %esi
callq 0x4a9b0
movq -0x20(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa20
movq -0x20(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa90
movq -0x20(%rbp), %rdi
xorl %esi, %esi
callq 0x4ab00
addq $0x20, %rsp
popq %rbp
retq
nopl (%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::SWAP(unsigned short)
void CPU::SWAP(uint16_t a16) {             // SWAP [HL]
  uint8_t value = this->memory.read(a16);
  this->SWAP(&value);
  this->memory.write(a16, value);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movw %si, %ax
movq %rdi, -0x8(%rbp)
movw %ax, -0xa(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x18(%rbp)
addq $0x130, %rdi            # imm = 0x130
movzwl -0xa(%rbp), %esi
callq 0xbc0c0
movq -0x18(%rbp), %rdi
movb %al, -0xb(%rbp)
leaq -0xb(%rbp), %rsi
callq 0xba1b0
movq -0x18(%rbp), %rdi
addq $0x130, %rdi            # imm = 0x130
movw -0xa(%rbp), %ax
movzwl %ax, %esi
movzbl -0xb(%rbp), %edx
callq 0xbc150
addq $0x20, %rsp
popq %rbp
retq
nopl (%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::RL(unsigned char*)
void CPU::RL(uint8_t *r8) {                // RL r8
  uint8_t carry = (this->reg.F & 0x10) << 3;

  // Set Carry flag according to 7th Bit
  this->setCarryFlag((*r8 & 0x80) != 0);

  *r8 = (*r8 << 1) | carry;  // Set right most bit

  // Set Flags
  if (*r8 == 0)
    this->setZeroFlag(true);
  this->setAddSubFlag(false);
  this->setHalfCarryFlag(false);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x20(%rbp)
movzbl 0x11d(%rdi), %eax
andl $0x10, %eax
shll $0x3, %eax
movb %al, -0x11(%rbp)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
andl $0x80, %eax
cmpl $0x0, %eax
setne %al
movzbl %al, %esi
andl $0x1, %esi
callq 0x4ab00
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
shll %eax
movzbl -0x11(%rbp), %ecx
orl %ecx, %eax
movb %al, %cl
movq -0x10(%rbp), %rax
movb %cl, (%rax)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
cmpl $0x0, %eax
jne 0xba306
movq -0x20(%rbp), %rdi
movl $0x1, %esi
callq 0x4a9b0
movq -0x20(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa20
movq -0x20(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa90
addq $0x20, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::RLC(unsigned char*)
void CPU::RLC(uint8_t *r8) {               // RLC r8
  // Set Carry flag according to 7th Bit
  this->setCarryFlag((*r8 & 0x80) != 0);

  // Carry 7th Bit over
  *r8 = (*r8 << 1) | ((this->reg.F & 0x10) >> 4);

  // Set Flags
  if (*r8 == 0)
    this->setZeroFlag(true);
  this->setAddSubFlag(false);
  this->setHalfCarryFlag(false);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x18(%rbp)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
andl $0x80, %eax
cmpl $0x0, %eax
setne %al
movzbl %al, %esi
andl $0x1, %esi
callq 0x4ab00
movq -0x18(%rbp), %rcx
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
shll %eax
movzbl 0x11d(%rcx), %ecx
andl $0x10, %ecx
sarl $0x4, %ecx
orl %ecx, %eax
movb %al, %cl
movq -0x10(%rbp), %rax
movb %cl, (%rax)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
cmpl $0x0, %eax
jne 0xba443
movq -0x18(%rbp), %rdi
movl $0x1, %esi
callq 0x4a9b0
movq -0x18(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa20
movq -0x18(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa90
addq $0x20, %rsp
popq %rbp
retq
nop
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::RR(unsigned char*)
void CPU::RR(uint8_t *r8) {                // RR r8
  uint8_t carry = (this->reg.F & 0x10) << 3; // Set to Top Bit

  // Set Carry flag according to 7th Bit
  this->setCarryFlag((*r8 & 0x01) != 0);

  *r8 = (*r8 >> 1) | carry;  // Set left most bit

  // Set Flags
  if (*r8 == 0)
    this->setZeroFlag(true);
  this->setAddSubFlag(false);
  this->setHalfCarryFlag(false);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x20(%rbp)
movzbl 0x11d(%rdi), %eax
andl $0x10, %eax
shll $0x3, %eax
movb %al, -0x11(%rbp)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
andl $0x1, %eax
cmpl $0x0, %eax
setne %al
movzbl %al, %esi
andl $0x1, %esi
callq 0x4ab00
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
sarl %eax
movzbl -0x11(%rbp), %ecx
orl %ecx, %eax
movb %al, %cl
movq -0x10(%rbp), %rax
movb %cl, (%rax)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
cmpl $0x0, %eax
jne 0xba574
movq -0x20(%rbp), %rdi
movl $0x1, %esi
callq 0x4a9b0
movq -0x20(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa20
movq -0x20(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa90
addq $0x20, %rsp
popq %rbp
retq
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::RRC(unsigned char*)
void CPU::RRC(uint8_t *r8) {                // RRC r8
  // Set Carry flag according to 7th Bit
  this->setCarryFlag((*r8 & 0x01) != 0);

  // Carry 7th Bit over
  *r8 = (*r8 >> 1) | ((this->reg.F & 0x10) << 3);

  // Set Flags
  if (*r8 == 0)
    this->setZeroFlag(true);
  this->setAddSubFlag(false);
  this->setHalfCarryFlag(false);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x18(%rbp)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
andl $0x1, %eax
cmpl $0x0, %eax
setne %al
movzbl %al, %esi
andl $0x1, %esi
callq 0x4ab00
movq -0x18(%rbp), %rcx
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
sarl %eax
movzbl 0x11d(%rcx), %ecx
andl $0x10, %ecx
shll $0x3, %ecx
orl %ecx, %eax
movb %al, %cl
movq -0x10(%rbp), %rax
movb %cl, (%rax)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
cmpl $0x0, %eax
jne 0xba6a1
movq -0x18(%rbp), %rdi
movl $0x1, %esi
callq 0x4a9b0
movq -0x18(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa20
movq -0x18(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa90
addq $0x20, %rsp
popq %rbp
retq
nopl (%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::SLA(unsigned char*)
void CPU::SLA(uint8_t *r8) {               // SLA r8
  // Set Carry from Left Shift
  this->setCarryFlag((*r8 & 0x80) != 0);

  // Shift Left
  *r8 = *r8 << 1;

  // Set Flags
  if (*r8 == 0)
    this->setZeroFlag(true);
  this->setAddSubFlag(false);
  this->setHalfCarryFlag(false);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x18(%rbp)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
andl $0x80, %eax
cmpl $0x0, %eax
setne %al
movzbl %al, %esi
andl $0x1, %esi
callq 0x4ab00
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
shll %eax
movb %al, %cl
movq -0x10(%rbp), %rax
movb %cl, (%rax)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
cmpl $0x0, %eax
jne 0xba7c0
movq -0x18(%rbp), %rdi
movl $0x1, %esi
callq 0x4a9b0
movq -0x18(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa20
movq -0x18(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa90
addq $0x20, %rsp
popq %rbp
retq
nopl (%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::SRA(unsigned char*)
void CPU::SRA(uint8_t *r8) {               // SRA r8
  // Set Carry from Right Shift
  this->setCarryFlag((*r8 & 0x01) != 0);

  // Shift Arithmetic Right
  uint8_t topBit = *r8 & 0x80;
  *r8 = topBit | (*r8 >> 1);

  // Set Flags
  if (*r8 == 0)
    this->setZeroFlag(true);
  this->setAddSubFlag(false);
  this->setHalfCarryFlag(false);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x20(%rbp)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
andl $0x1, %eax
cmpl $0x0, %eax
setne %al
movzbl %al, %esi
andl $0x1, %esi
callq 0x4ab00
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
andl $0x80, %eax
movb %al, -0x11(%rbp)
movzbl -0x11(%rbp), %eax
movq -0x10(%rbp), %rcx
movzbl (%rcx), %ecx
sarl %ecx
orl %ecx, %eax
movb %al, %cl
movq -0x10(%rbp), %rax
movb %cl, (%rax)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
cmpl $0x0, %eax
jne 0xba8b3
movq -0x20(%rbp), %rdi
movl $0x1, %esi
callq 0x4a9b0
movq -0x20(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa20
movq -0x20(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa90
addq $0x20, %rsp
popq %rbp
retq
nop
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::SRL(unsigned char*)
void CPU::SRL(uint8_t *r8) {                // SRL r8
  // Set Carry from Right Shift
  this->setCarryFlag((*r8 & 0x01) != 0);

  // Shift Logic Right
  *r8 = *r8 >> 1;

  // Set Flags
  if (*r8 == 0)
    this->setZeroFlag(true);
  this->setAddSubFlag(false);
  this->setHalfCarryFlag(false);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x18(%rbp)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
andl $0x1, %eax
cmpl $0x0, %eax
setne %al
movzbl %al, %esi
andl $0x1, %esi
callq 0x4ab00
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
sarl %eax
movb %al, %cl
movq -0x10(%rbp), %rax
movb %cl, (%rax)
movq -0x10(%rbp), %rax
movzbl (%rax), %eax
cmpl $0x0, %eax
jne 0xba98e
movq -0x18(%rbp), %rdi
movl $0x1, %esi
callq 0x4a9b0
movq -0x18(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa20
movq -0x18(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa90
addq $0x20, %rsp
popq %rbp
retq
nopw (%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::LDHLI()
void CPU::LDHLI() {            // LD [HLI], A
  uint16_t HL = (this->reg.H << 8) | this->reg.L;

  this->memory.write(HL, this->reg.A);
  HL++;

  this->reg.H = HL >> 8;
  this->reg.L = HL & 0xFF;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x18(%rbp)
movzbl 0x11e(%rax), %ecx
shll $0x8, %ecx
movzbl 0x11f(%rax), %edx
orl %edx, %ecx
movw %cx, -0xa(%rbp)
movq %rax, %rdi
addq $0x130, %rdi            # imm = 0x130
movw -0xa(%rbp), %cx
movzwl %cx, %esi
movzbl 0x118(%rax), %edx
callq 0xbc150
movq -0x18(%rbp), %rax
movw -0xa(%rbp), %cx
addw $0x1, %cx
movw %cx, -0xa(%rbp)
movzwl -0xa(%rbp), %ecx
sarl $0x8, %ecx
movb %cl, 0x11e(%rax)
movzwl -0xa(%rbp), %ecx
andl $0xff, %ecx
movb %cl, 0x11f(%rax)
addq $0x20, %rsp
popq %rbp
retq
nopl (%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::LDAHLI()
void CPU::LDAHLI() {                        // LD A, [HLI]
  uint16_t HL = (this->reg.H << 8) | this->reg.L;

  this->reg.A = this->memory.read(HL);
  HL++;

  this->reg.H = HL >> 8;
  this->reg.L = HL & 0xFF;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x18(%rbp)
movzbl 0x11e(%rdi), %eax
shll $0x8, %eax
movzbl 0x11f(%rdi), %ecx
orl %ecx, %eax
movw %ax, -0xa(%rbp)
addq $0x130, %rdi            # imm = 0x130
movzwl -0xa(%rbp), %esi
callq 0xbc0c0
movb %al, %cl
movq -0x18(%rbp), %rax
movb %cl, 0x118(%rax)
movw -0xa(%rbp), %cx
addw $0x1, %cx
movw %cx, -0xa(%rbp)
movzwl -0xa(%rbp), %ecx
sarl $0x8, %ecx
movb %cl, 0x11e(%rax)
movzwl -0xa(%rbp), %ecx
andl $0xff, %ecx
movb %cl, 0x11f(%rax)
addq $0x20, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::CALL(unsigned short)
void CPU::CALL(uint16_t u16) {                  // CALL, u16
  // Push Address to Stack
  uint16_t offsetAddr = this->PC + 0x03;        // Offset from CALL
  this->PUSH(&offsetAddr);

  // JP to address
  this->PC = u16 - 0x03;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movw %si, %ax
movq %rdi, -0x8(%rbp)
movw %ax, -0xa(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x18(%rbp)
movzwl 0x12c(%rdi), %eax
addl $0x3, %eax
movw %ax, -0xc(%rbp)
leaq -0xc(%rbp), %rsi
callq 0xbae20
movq -0x18(%rbp), %rax
movzwl -0xa(%rbp), %ecx
subl $0x3, %ecx
movw %cx, 0x12c(%rax)
addq $0x20, %rsp
popq %rbp
retq
nopw (%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::CALL(ConditionCode, unsigned short)
void CPU::CALL(ConditionCode cc, uint16_t a16) {   // CALL cc, u16
  this->extraCycles = 3;

  switch (cc) {
    case Z:
      if ((this->reg.F & 0x80) != 0)
        return this->CALL(a16);
      break;
    case NZ:
      if ((this->reg.F & 0x80) == 0)
        return this->CALL(a16);
      break;
    case C:
      if ((this->reg.F & 0x10) != 0)
        return this->CALL(a16);
      break;
    case NC:
      if ((this->reg.F & 0x10) == 0)
        return this->CALL(a16);
      break;
  }

  this->extraCycles = 0;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movw %dx, %ax
movq %rdi, -0x8(%rbp)
movl %esi, -0xc(%rbp)
movw %ax, -0xe(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x20(%rbp)
movl $0x3, 0xc(%rax)
movl -0xc(%rbp), %eax
movq %rax, -0x18(%rbp)
subq $0x3, %rax
ja 0xbaf8e
movq -0x18(%rbp), %rax
leaq 0xb6f8f(%rip), %rcx     # 0x171e80
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x80, %eax
cmpl $0x0, %eax
je 0xbaf1e
movq -0x20(%rbp), %rdi
movzwl -0xe(%rbp), %esi
callq 0xbadd0
jmp 0xbaf99
jmp 0xbaf8e
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x80, %eax
cmpl $0x0, %eax
jne 0xbaf44
movq -0x20(%rbp), %rdi
movzwl -0xe(%rbp), %esi
callq 0xbadd0
jmp 0xbaf99
jmp 0xbaf8e
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x10, %eax
cmpl $0x0, %eax
je 0xbaf68
movq -0x20(%rbp), %rdi
movzwl -0xe(%rbp), %esi
callq 0xbadd0
jmp 0xbaf99
jmp 0xbaf8e
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x10, %eax
cmpl $0x0, %eax
jne 0xbaf8c
movq -0x20(%rbp), %rdi
movzwl -0xe(%rbp), %esi
callq 0xbadd0
jmp 0xbaf99
jmp 0xbaf8e
movq -0x20(%rbp), %rax
movl $0x0, 0xc(%rax)
addq $0x20, %rsp
popq %rbp
retq
nop
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::JP(ConditionCode, unsigned short)
void CPU::JP(ConditionCode cc, uint16_t a16) {  // JP cc, u16
  this->extraCycles = 1;

  switch (cc) {
    case Z:
      if ((this->reg.F & 0x80) != 0)
        return this->JP(a16);
      break;
    case NZ:
      if ((this->reg.F & 0x80) == 0)
        return this->JP(a16);
      break;
    case C:
      if ((this->reg.F & 0x10) != 0)
        return this->JP(a16);
      break;
    case NC:
      if ((this->reg.F & 0x10) == 0)
        return this->JP(a16);
      break;
  }

  this->extraCycles = 0;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movw %dx, %ax
movq %rdi, -0x8(%rbp)
movl %esi, -0xc(%rbp)
movw %ax, -0xe(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x20(%rbp)
movl $0x1, 0xc(%rax)
movl -0xc(%rbp), %eax
movq %rax, -0x18(%rbp)
subq $0x3, %rax
ja 0xbb0de
movq -0x18(%rbp), %rax
leaq 0xb6e4f(%rip), %rcx     # 0x171e90
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x80, %eax
cmpl $0x0, %eax
je 0xbb06e
movq -0x20(%rbp), %rdi
movzwl -0xe(%rbp), %esi
callq 0xbafa0
jmp 0xbb0e9
jmp 0xbb0de
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x80, %eax
cmpl $0x0, %eax
jne 0xbb094
movq -0x20(%rbp), %rdi
movzwl -0xe(%rbp), %esi
callq 0xbafa0
jmp 0xbb0e9
jmp 0xbb0de
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x10, %eax
cmpl $0x0, %eax
je 0xbb0b8
movq -0x20(%rbp), %rdi
movzwl -0xe(%rbp), %esi
callq 0xbafa0
jmp 0xbb0e9
jmp 0xbb0de
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x10, %eax
cmpl $0x0, %eax
jne 0xbb0dc
movq -0x20(%rbp), %rdi
movzwl -0xe(%rbp), %esi
callq 0xbafa0
jmp 0xbb0e9
jmp 0xbb0de
movq -0x20(%rbp), %rax
movl $0x0, 0xc(%rax)
addq $0x20, %rsp
popq %rbp
retq
nop
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::JR(ConditionCode, signed char)
void CPU::JR(ConditionCode cc, int8_t e8) {     // JR cc, e8
  this->extraCycles = 1;

  switch (cc) {
    case Z:
      if ((this->reg.F & 0x80) != 0)
        return this->JR(e8);
      break;
    case NZ:
      if ((this->reg.F & 0x80) == 0)
        return this->JR(e8);
      break;
    case C:
      if ((this->reg.F & 0x10) != 0)
        return this->JR(e8);
      break;
    case NC:
      if ((this->reg.F & 0x10) == 0)
        return this->JR(e8);
      break;
  }

  this->extraCycles = 0;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movb %dl, %al
movq %rdi, -0x8(%rbp)
movl %esi, -0xc(%rbp)
movb %al, -0xd(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x20(%rbp)
movl $0x1, 0xc(%rax)
movl -0xc(%rbp), %eax
movq %rax, -0x18(%rbp)
subq $0x3, %rax
ja 0xbb1fc
movq -0x18(%rbp), %rax
leaq 0xb6d41(%rip), %rcx     # 0x171ea0
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x80, %eax
cmpl $0x0, %eax
je 0xbb18c
movq -0x20(%rbp), %rdi
movsbl -0xd(%rbp), %esi
callq 0xbb0f0
jmp 0xbb207
jmp 0xbb1fc
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x80, %eax
cmpl $0x0, %eax
jne 0xbb1b2
movq -0x20(%rbp), %rdi
movsbl -0xd(%rbp), %esi
callq 0xbb0f0
jmp 0xbb207
jmp 0xbb1fc
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x10, %eax
cmpl $0x0, %eax
je 0xbb1d6
movq -0x20(%rbp), %rdi
movsbl -0xd(%rbp), %esi
callq 0xbb0f0
jmp 0xbb207
jmp 0xbb1fc
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x10, %eax
cmpl $0x0, %eax
jne 0xbb1fa
movq -0x20(%rbp), %rdi
movsbl -0xd(%rbp), %esi
callq 0xbb0f0
jmp 0xbb207
jmp 0xbb1fc
movq -0x20(%rbp), %rax
movl $0x0, 0xc(%rax)
addq $0x20, %rsp
popq %rbp
retq
nopl (%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::RET(ConditionCode)
void CPU::RET(ConditionCode cc) {                 // RET cc
  this->extraCycles = 3;

  switch (cc) {
    case Z:
      if ((this->reg.F & 0x80) != 0)
        return this->RET();
      break;
    case NZ:
      if ((this->reg.F & 0x80) == 0)
        return this->RET();
      break;
    case C:
      if ((this->reg.F & 0x10) != 0)
        return this->RET();
      break;
    case NC:
      if ((this->reg.F & 0x10) == 0)
        return this->RET();
      break;
  }

  this->extraCycles = 0;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movl %esi, -0xc(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x20(%rbp)
movl $0x3, 0xc(%rax)
movl -0xc(%rbp), %eax
movq %rax, -0x18(%rbp)
subq $0x3, %rax
ja 0xbb2d7
movq -0x18(%rbp), %rax
leaq 0xb6c66(%rip), %rcx     # 0x171eb0
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x80, %eax
cmpl $0x0, %eax
je 0xbb273
movq -0x20(%rbp), %rdi
callq 0xbb2f0
jmp 0xbb2e2
jmp 0xbb2d7
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x80, %eax
cmpl $0x0, %eax
jne 0xbb295
movq -0x20(%rbp), %rdi
callq 0xbb2f0
jmp 0xbb2e2
jmp 0xbb2d7
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x10, %eax
cmpl $0x0, %eax
je 0xbb2b5
movq -0x20(%rbp), %rdi
callq 0xbb2f0
jmp 0xbb2e2
jmp 0xbb2d7
movq -0x20(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x10, %eax
cmpl $0x0, %eax
jne 0xbb2d5
movq -0x20(%rbp), %rdi
callq 0xbb2f0
jmp 0xbb2e2
jmp 0xbb2d7
movq -0x20(%rbp), %rax
movl $0x0, 0xc(%rax)
addq $0x20, %rsp
popq %rbp
retq
nopl (%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::ADDSP(signed char)
void CPU::ADDSP(int8_t e8) {                     // ADD SP, e8
  uint16_t result = this->SP + e8;

  // Set Flags
  this->setZeroFlag(false);
  this->setAddSubFlag(false);
  this->checkHalfCarry(this->SP >> 8, result >> 8);
  this->checkCarry_16(SP, SP + e8);

  this->SP = result;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movb %sil, %al
movq %rdi, -0x8(%rbp)
movb %al, -0x9(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x18(%rbp)
movzwl 0x12e(%rdi), %eax
movsbl -0x9(%rbp), %ecx
addl %ecx, %eax
movw %ax, -0xc(%rbp)
xorl %esi, %esi
callq 0x4a9b0
movq -0x18(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa20
movq -0x18(%rbp), %rdi
movzwl 0x12e(%rdi), %eax
sarl $0x8, %eax
movb %al, %cl
movzwl -0xc(%rbp), %eax
sarl $0x8, %eax
movzbl %cl, %esi
movzbl %al, %edx
callq 0x4ab70
movq -0x18(%rbp), %rdi
movw 0x12e(%rdi), %cx
movzwl 0x12e(%rdi), %eax
movsbl -0x9(%rbp), %edx
addl %edx, %eax
movzwl %cx, %esi
movzwl %ax, %edx
callq 0x4ac30
movq -0x18(%rbp), %rax
movw -0xc(%rbp), %cx
movw %cx, 0x12e(%rax)
addq $0x20, %rsp
popq %rbp
retq
nopw (%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::LDHL(signed char)
void CPU::LDHL(int8_t e8) {                      // LD HL, SP+e8
  uint16_t result = this->SP + e8;

  // Set Flags
  this->setZeroFlag(false);
  this->setAddSubFlag(false);
  this->checkHalfCarry(this->SP >> 8, result >> 8);
  this->checkCarry_16(SP, SP + e8);

  // Store into HL
  this->reg.H = this->SP << 8;
  this->reg.L = this->SP & 0xFF;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movb %sil, %al
movq %rdi, -0x8(%rbp)
movb %al, -0x9(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x18(%rbp)
movzwl 0x12e(%rdi), %eax
movsbl -0x9(%rbp), %ecx
addl %ecx, %eax
movw %ax, -0xc(%rbp)
xorl %esi, %esi
callq 0x4a9b0
movq -0x18(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa20
movq -0x18(%rbp), %rdi
movzwl 0x12e(%rdi), %eax
sarl $0x8, %eax
movb %al, %cl
movzwl -0xc(%rbp), %eax
sarl $0x8, %eax
movzbl %cl, %esi
movzbl %al, %edx
callq 0x4ab70
movq -0x18(%rbp), %rdi
movw 0x12e(%rdi), %cx
movzwl 0x12e(%rdi), %eax
movsbl -0x9(%rbp), %edx
addl %edx, %eax
movzwl %cx, %esi
movzwl %ax, %edx
callq 0x4ac30
movq -0x18(%rbp), %rax
movzwl 0x12e(%rax), %ecx
shll $0x8, %ecx
movb %cl, 0x11e(%rax)
movzwl 0x12e(%rax), %ecx
andl $0xff, %ecx
movb %cl, 0x11f(%rax)
addq $0x20, %rsp
popq %rbp
retq
nop
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::CCF()
void CPU::CCF() {                                // CCF
  // Set Flags
  this->setAddSubFlag(false);
  this->setHalfCarryFlag(false);
  this->reg.F ^= 0x10;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x10, %rsp
movq %rdi, -0x8(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x10(%rbp)
xorl %esi, %esi
callq 0x4aa20
movq -0x10(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa90
movq -0x10(%rbp), %rax
movzbl 0x11d(%rax), %ecx
xorl $0x10, %ecx
movb %cl, 0x11d(%rax)
addq $0x10, %rsp
popq %rbp
retq
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::CPL()
void CPU::CPL() {                                // CPL
  this->reg.A = ~this->reg.A;

  // Set Flags
  this->setZeroFlag(false);
  this->setHalfCarryFlag(false);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x10, %rsp
movq %rdi, -0x8(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x10(%rbp)
movzbl 0x118(%rdi), %eax
xorl $-0x1, %eax
movb %al, 0x118(%rdi)
xorl %esi, %esi
callq 0x4a9b0
movq -0x10(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa90
addq $0x10, %rsp
popq %rbp
retq
nopl (%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::DAA()
void CPU::DAA() {                                // DAA
  uint8_t A = this->reg.A;
  bool isAddedSix = false;

  // Addition
  if (!(this->reg.F & 0x40)) {
    if (this->reg.F & 0x20 || (A & 0x0F) > 0x09) {
      A += 0x06;
      isAddedSix = true;
    }
    if (this->reg.F & 0x10 || A > 0x9F || isAddedSix && A < 0x06) { // PATCHED END: If overflow from prev A
      A += 0x60;
      this->setCarryFlag(true);
    }
  }
  
  // Subtraction
  else {
    if (this->reg.F & 0x20) {
      A -= 0x06;
    }
    if (this->reg.F & 0x10) {
      A -= 0x60;
    }
  }

  this->setZeroFlag(A == 0);
  this->setHalfCarryFlag(false);

  // Set the Value
  this->reg.A = A;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x18(%rbp)
movb 0x118(%rax), %cl
movb %cl, -0x9(%rbp)
movb $0x0, -0xa(%rbp)
movzbl 0x11d(%rax), %eax
andl $0x40, %eax
cmpl $0x0, %eax
jne 0xbb974
movq -0x18(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x20, %eax
cmpl $0x0, %eax
jne 0xbb91f
movzbl -0x9(%rbp), %eax
andl $0xf, %eax
cmpl $0x9, %eax
jle 0xbb92d
movzbl -0x9(%rbp), %eax
addl $0x6, %eax
movb %al, -0x9(%rbp)
movb $0x1, -0xa(%rbp)
movq -0x18(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x10, %eax
cmpl $0x0, %eax
jne 0xbb95a
movzbl -0x9(%rbp), %eax
cmpl $0x9f, %eax
jg 0xbb95a
testb $0x1, -0xa(%rbp)
je 0xbb972
movzbl -0x9(%rbp), %eax
cmpl $0x6, %eax
jge 0xbb972
movq -0x18(%rbp), %rdi
movzbl -0x9(%rbp), %eax
addl $0x60, %eax
movb %al, -0x9(%rbp)
movl $0x1, %esi
callq 0x4ab00
jmp 0xbb9b0
movq -0x18(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x20, %eax
cmpl $0x0, %eax
je 0xbb991
movzbl -0x9(%rbp), %eax
subl $0x6, %eax
movb %al, -0x9(%rbp)
movq -0x18(%rbp), %rax
movzbl 0x11d(%rax), %eax
andl $0x10, %eax
cmpl $0x0, %eax
je 0xbb9ae
movzbl -0x9(%rbp), %eax
subl $0x60, %eax
movb %al, -0x9(%rbp)
jmp 0xbb9b0
movq -0x18(%rbp), %rdi
movzbl -0x9(%rbp), %eax
cmpl $0x0, %eax
sete %al
movzbl %al, %esi
andl $0x1, %esi
callq 0x4a9b0
movq -0x18(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa90
movq -0x18(%rbp), %rax
movb -0x9(%rbp), %cl
movb %cl, 0x118(%rax)
addq $0x20, %rsp
popq %rbp
retq
nopw (%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Instructions.cc
// Function: CPU::SCF()
void CPU::SCF() {                                // SCF
  // Set Flags
  this->setAddSubFlag(false);
  this->setHalfCarryFlag(false);
  this->setCarryFlag(true);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x10, %rsp
movq %rdi, -0x8(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x10(%rbp)
xorl %esi, %esi
callq 0x4aa20
movq -0x10(%rbp), %rdi
xorl %esi, %esi
callq 0x4aa90
movq -0x10(%rbp), %rdi
movl $0x1, %esi
callq 0x4ab00
addq $0x10, %rsp
popq %rbp
retq
nopw (%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Memory.cc
// Function: Memory::Memory(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
Memory::Memory(std::string ROMPath) {
  std::cout << "Dumping ROM...\n";
  dumpROM(ROMPath);

  // Populate Memory
  std::cout << "Populating Memory...\n";
  if (disassembledROM.size() >= 0x7FFF) {
    for (int i = 0; i <= 0x7FFF; i++) {
      memory[i] = disassembledROM[i];
    }
  } else {
    // TODO: Halt, bad dump
  }

  // TODO: Intitial Values
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x70, %rsp
movq %rsi, -0x70(%rbp)
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x60(%rbp)
addq $0x8, %rdi
movq %rdi, -0x68(%rbp)
callq 0xbc2c0
movq -0x60(%rbp), %rax
addq $0x20, %rax
movq %rax, %rcx
addq $0x10000, %rcx          # imm = 0x10000
movq %rcx, -0x58(%rbp)
movq %rax, -0x50(%rbp)
movq -0x50(%rbp), %rax
movq -0x58(%rbp), %rcx
movb $0x0, (%rax)
addq $0x1, %rax
cmpq %rcx, %rax
movq %rax, -0x50(%rbp)
jne 0xbbad3
movq 0x1523fe(%rip), %rdi    # 0x20def0
leaq 0xb63c7(%rip), %rsi     # 0x171ec0
callq 0xd5c0
jmp 0xbbb00
movq -0x70(%rbp), %rsi
leaq -0x40(%rbp), %rdi
callq 0xd120
jmp 0xbbb0f
movq -0x60(%rbp), %rdi
leaq -0x40(%rbp), %rsi
callq 0xbbbd0
jmp 0xbbb1e
leaq -0x40(%rbp), %rdi
callq 0xd730
movq 0x1523c2(%rip), %rdi    # 0x20def0
leaq 0xb639b(%rip), %rsi     # 0x171ed0
callq 0xd5c0
jmp 0xbbb3c
movq -0x60(%rbp), %rdi
addq $0x8, %rdi
callq 0xbc2e0
cmpq $0x7fff, %rax           # imm = 0x7FFF
jb 0xbbbb5
movl $0x0, -0x44(%rbp)
cmpl $0x7fff, -0x44(%rbp)    # imm = 0x7FFF
jg 0xbbbb3
movq -0x60(%rbp), %rdi
addq $0x8, %rdi
movslq -0x44(%rbp), %rsi
callq 0xbc300
movq %rax, %rcx
movq -0x60(%rbp), %rax
movb (%rcx), %dl
movslq -0x44(%rbp), %rcx
movb %dl, 0x20(%rax,%rcx)
movl -0x44(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x44(%rbp)
jmp 0xbbb58
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x18(%rbp)
movl %eax, -0x1c(%rbp)
jmp 0xbbbbd
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x18(%rbp)
movl %eax, -0x1c(%rbp)
leaq -0x40(%rbp), %rdi
callq 0xd730
jmp 0xbbbbd
jmp 0xbbbb7
jmp 0xbbbb7
addq $0x70, %rsp
popq %rbp
retq
movq -0x68(%rbp), %rdi
callq 0xb5240
movq -0x18(%rbp), %rdi
callq 0xd620
nop
// File: Ciaxur[P]yagb-emu/src/Memory.cc
// Function: Memory::dumpROM(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
void Memory::dumpROM(std::string ROMPath) {
  std::ifstream infile;
  infile.open(ROMPath);

  // Check if file exists
  if (!infile) {
    std::cout << "ROM not found" << std::endl;
    return;
  }

  // Allocate Space
  disassembledROM.clear();
  disassembledROM.reserve(1024 * 32);

  uint8_t buffer[1];
  for (int i=0; !infile.eof(); i++) {
    infile.read((char *) buffer, 1);
    if (infile.gcount())
      disassembledROM.push_back(buffer[0]);
  }
  std::cout << "ROM Disassembled!\n";
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x270, %rsp            # imm = 0x270
movq %rsi, -0x238(%rbp)
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x248(%rbp)
leaq -0x218(%rbp), %rdi
movq %rdi, -0x240(%rbp)
callq 0xd390
movq -0x240(%rbp), %rdi
movq -0x238(%rbp), %rsi
movl $0x8, %edx
callq 0xd1f0
jmp 0xbbc22
movq -0x218(%rbp), %rax
movq -0x18(%rax), %rax
leaq -0x218(%rbp,%rax), %rdi
callq 0xd040
movb %al, -0x249(%rbp)
jmp 0xbbc42
movb -0x249(%rbp), %al
testb $0x1, %al
jne 0xbbc4e
jmp 0xbbcb1
movq 0x15229b(%rip), %rdi    # 0x20def0
leaq 0xb628a(%rip), %rsi     # 0x171ee6
callq 0xd5c0
movq %rax, -0x258(%rbp)
jmp 0xbbc6a
movq -0x258(%rbp), %rdi
movq 0x152310(%rip), %rsi    # 0x20df88
callq 0xd980
jmp 0xbbc7f
movl $0x1, -0x228(%rbp)
jmp 0xbbd9f
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x220(%rbp)
movl %eax, -0x224(%rbp)
leaq -0x218(%rbp), %rdi
callq 0xd050
jmp 0xbbdb4
movq -0x248(%rbp), %rdi
addq $0x8, %rdi
movq %rdi, -0x260(%rbp)
callq 0xbc320
movq -0x260(%rbp), %rdi
movl $0x8000, %esi           # imm = 0x8000
callq 0xbc340
jmp 0xbbcdb
movl $0x0, -0x230(%rbp)
movq -0x218(%rbp), %rax
movq -0x18(%rax), %rax
leaq -0x218(%rbp,%rax), %rdi
callq 0xdaf0
movb %al, -0x261(%rbp)
jmp 0xbbd05
movb -0x261(%rbp), %al
xorb $-0x1, %al
testb $0x1, %al
jne 0xbbd13
jmp 0xbbd80
leaq -0x218(%rbp), %rdi
leaq -0x229(%rbp), %rsi
movl $0x1, %edx
callq 0xd4f0
jmp 0xbbd2d
leaq -0x218(%rbp), %rdi
callq 0xd230
movq %rax, -0x270(%rbp)
jmp 0xbbd42
movq -0x270(%rbp), %rax
cmpq $0x0, %rax
je 0xbbd6a
movq -0x248(%rbp), %rdi
addq $0x8, %rdi
leaq -0x229(%rbp), %rsi
callq 0xbc420
jmp 0xbbd68
jmp 0xbbd6a
jmp 0xbbd6c
movl -0x230(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x230(%rbp)
jmp 0xbbce5
movq 0x152169(%rip), %rdi    # 0x20def0
leaq 0xb6166(%rip), %rsi     # 0x171ef4
callq 0xd5c0
jmp 0xbbd95
movl $0x0, -0x228(%rbp)
leaq -0x218(%rbp), %rdi
callq 0xd050
addq $0x270, %rsp            # imm = 0x270
popq %rbp
retq
movq -0x220(%rbp), %rdi
callq 0xd620
// File: Ciaxur[P]yagb-emu/src/Memory.cc
// Function: Memory::read(unsigned short)
uint8_t Memory::read(uint16_t address) {
  //std::cout << "Accessing Address: " << address << std::endl;

  // TODO: OAM
  if (address >= 0x0000 && address <= 0xFFFF) {
    return memory[address];
  }
  else {
      std::cout << "Memory.read [" << std::hex << address << std::dec << "]: YO OUT OF RANGE!\n";
      // TODO: Halt CPU Loop
  }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movw %si, %ax
movq %rdi, -0x8(%rbp)
movw %ax, -0xa(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x18(%rbp)
movzwl -0xa(%rbp), %eax
cmpl $0x0, %eax
jl 0xbc101
movzwl -0xa(%rbp), %eax
cmpl $0xffff, %eax           # imm = 0xFFFF
jg 0xbc101
movq -0x18(%rbp), %rax
movzwl -0xa(%rbp), %ecx
movb 0x20(%rax,%rcx), %al
addq $0x20, %rsp
popq %rbp
retq
movq 0x151de8(%rip), %rdi    # 0x20def0
leaq 0xb5dfb(%rip), %rsi     # 0x171f0a
callq 0xd5c0
movq %rax, %rdi
leaq -0x7e3e(%rip), %rsi     # 0xb42e0
callq 0xdb40
movq %rax, %rdi
movzwl -0xa(%rbp), %esi
callq 0xd320
movq %rax, %rdi
leaq -0x7cb9(%rip), %rsi     # 0xb4480
callq 0xdb40
movq %rax, %rdi
leaq 0xb5dd0(%rip), %rsi     # 0x171f18
callq 0xd5c0
ud2
nop
// File: Ciaxur[P]yagb-emu/src/Memory.cc
// Function: Memory::write(unsigned short, unsigned char)
void Memory::write(uint16_t address, uint8_t value) {
  // TODO: MBC Switch
  if (address < 0x7FFF) {

  }

  // Output Serial Link
  else if (address == 0xFF02 && value == 0x81) {
//    std::cout << "Serial Link Value: " << std::hex << (int)this->read(0xFF01) << '\n';
    std::cout << (char)this->read(0xFF01);

    // Serial Write Interrupt
    memory[0xFF0F] |= 0x08;
  }

  // VRAM Write
  else if (address >= 0x8000 && address <= 0x9FFF && *(this->LCDMode) != 3) {
    memory[address] = value;
  }

  // Reset DIV if writen to
  else if (address == 0xFF04) {
    memory[0xFF04] = 0;
  }

  // Prohibited Areas, NO.
  else if (!(address >= 0xE000 && address <= 0xFDFF) && !(address >= 0xFEA0 && address <= 0xFEFF)) {
    memory[address] = value;
  }

  else {
    // Writing out of range
    std::cout << "Memory.write [" << std::hex << address << std::dec << "]: INVALID RANGE!\n";
  }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movb %dl, %al
movw %si, %cx
movq %rdi, -0x8(%rbp)
movw %cx, -0xa(%rbp)
movb %al, -0xb(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x18(%rbp)
movzwl -0xa(%rbp), %eax
cmpl $0x7fff, %eax           # imm = 0x7FFF
jge 0xbc180
jmp 0xbc2b5
movzwl -0xa(%rbp), %eax
cmpl $0xff02, %eax           # imm = 0xFF02
jne 0xbc1cc
movzbl -0xb(%rbp), %eax
cmpl $0x81, %eax
jne 0xbc1cc
movq -0x18(%rbp), %rdi
movl $0xff01, %esi           # imm = 0xFF01
callq 0xbc0c0
movq 0x151d45(%rip), %rdi    # 0x20def0
movsbl %al, %esi
callq 0xd630
movq -0x18(%rbp), %rax
movzbl 0xff2f(%rax), %ecx
orl $0x8, %ecx
movb %cl, 0xff2f(%rax)
jmp 0xbc2b3
movzwl -0xa(%rbp), %eax
cmpl $0x8000, %eax           # imm = 0x8000
jl 0xbc209
movzwl -0xa(%rbp), %eax
cmpl $0x9fff, %eax           # imm = 0x9FFF
jg 0xbc209
movq -0x18(%rbp), %rax
movq 0x10020(%rax), %rax
movzbl (%rax), %eax
cmpl $0x3, %eax
je 0xbc209
movq -0x18(%rbp), %rax
movb -0xb(%rbp), %dl
movzwl -0xa(%rbp), %ecx
movb %dl, 0x20(%rax,%rcx)
jmp 0xbc2b1
movzwl -0xa(%rbp), %eax
cmpl $0xff04, %eax           # imm = 0xFF04
jne 0xbc224
movq -0x18(%rbp), %rax
movb $0x0, 0xff24(%rax)
jmp 0xbc2af
movzwl -0xa(%rbp), %eax
cmpl $0xe000, %eax           # imm = 0xE000
jl 0xbc23a
movzwl -0xa(%rbp), %eax
cmpl $0xfdff, %eax           # imm = 0xFDFF
jle 0xbc261
movzwl -0xa(%rbp), %eax
cmpl $0xfea0, %eax           # imm = 0xFEA0
jl 0xbc250
movzwl -0xa(%rbp), %eax
cmpl $0xfeff, %eax           # imm = 0xFEFF
jle 0xbc261
movq -0x18(%rbp), %rax
movb -0xb(%rbp), %dl
movzwl -0xa(%rbp), %ecx
movb %dl, 0x20(%rax,%rcx)
jmp 0xbc2ad
movq 0x151c88(%rip), %rdi    # 0x20def0
leaq 0xb5cbe(%rip), %rsi     # 0x171f2d
callq 0xd5c0
movq %rax, %rdi
leaq -0x7f9e(%rip), %rsi     # 0xb42e0
callq 0xdb40
movq %rax, %rdi
movzwl -0xa(%rbp), %esi
callq 0xd320
movq %rax, %rdi
leaq -0x7e19(%rip), %rsi     # 0xb4480
callq 0xdb40
movq %rax, %rdi
leaq 0xb5c94(%rip), %rsi     # 0x171f3c
callq 0xd5c0
jmp 0xbc2af
jmp 0xbc2b1
jmp 0xbc2b3
jmp 0xbc2b5
addq $0x20, %rsp
popq %rbp
retq
nopl (%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/Opcode.cc
// Function: Opcode::Opcode(unsigned char, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>, unsigned short, unsigned short, std::function<void ()>)
Opcode::Opcode(uint8_t opcode, std::string label, uint16_t machineCycles, uint16_t length, std::function<void()> exec) {
    this->opcode = opcode;
    this->label = label;
    this->machineCycles = machineCycles;
    this->length = length;
    this->exec = exec;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x60, %rsp
movq %r9, -0x60(%rbp)
movq %rdx, -0x40(%rbp)
movw %r8w, %ax
movq %rdi, -0x8(%rbp)
movb %sil, -0x9(%rbp)
movq %rdx, -0x18(%rbp)
movw %cx, -0x1a(%rbp)
movw %ax, -0x1c(%rbp)
movq %r9, -0x28(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x50(%rbp)
addq $0x8, %rdi
movq %rdi, -0x48(%rbp)
callq 0xd370
movq -0x50(%rbp), %rdi
addq $0x30, %rdi
movq %rdi, -0x58(%rbp)
callq 0xbcd60
movq -0x50(%rbp), %rax
movq -0x48(%rbp), %rdi
movq -0x40(%rbp), %rsi
movb -0x9(%rbp), %cl
movb %cl, (%rax)
callq 0xda80
jmp 0xbccda
movq -0x60(%rbp), %rsi
movq -0x50(%rbp), %rdi
movw -0x1a(%rbp), %ax
movw %ax, 0x28(%rdi)
movw -0x1c(%rbp), %ax
movw %ax, 0x2a(%rdi)
addq $0x30, %rdi
callq 0xbcda0
jmp 0xbccfd
addq $0x60, %rsp
popq %rbp
retq
movq -0x58(%rbp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x30(%rbp)
movl %eax, -0x34(%rbp)
callq 0xb3f20
movq -0x48(%rbp), %rdi
callq 0xd730
movq -0x30(%rbp), %rdi
callq 0xd620
nopw (%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/PPU.cc
// Function: PPU::PPU(CPU*, Memory*)
PPU::PPU(CPU *cpu, Memory *memory) {
  this->cpu = cpu;
  this->memory = memory;
  this->LY = 0x90;
  this->currentFrame = 0;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq %rdx, -0x18(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movq %rcx, 0x18(%rax)
movq -0x18(%rbp), %rcx
movq %rcx, 0x10(%rax)
movb $-0x70, 0x20(%rax)
movq $0x0, 0x8(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/main.cc
// Function: handleEventPolling(CPU*)
void handleEventPolling(CPU *cpu) {
  SDL_Event windowEvent;

  while (SDL_PollEvent(&windowEvent) != 0) {
    ImGui_ImplSDL2_ProcessEvent(&windowEvent);

    // Check if close button was clicked
    if (windowEvent.type == SDL_QUIT) {
      std::cout << "Quitting...\n";
      cpu->stop();
      return;
    }

    switch (windowEvent.type) {
    // Handle Key Presses
    case SDL_KEYDOWN:
      if (windowEvent.key.keysym.sym == SDL_KeyCode::SDLK_s) {
        if (keystate.step_instr_hold == 0)
          keystate.step_instr = true;
        keystate.step_instr_hold++;
      }
      if (windowEvent.key.keysym.sym == SDL_KeyCode::SDLK_m) {
        if (keystate.step_frame_hold == 0)
          keystate.step_frame = true;
        keystate.step_frame_hold++;
      }


      break;
    case SDL_KEYUP:
      // TODO: Key Press Here
      if (windowEvent.key.keysym.sym == SDL_KeyCode::SDLK_s) {
        keystate.step_instr = false;
        keystate.step_instr_hold = 0;
      }
      if (windowEvent.key.keysym.sym == SDL_KeyCode::SDLK_m) {
        keystate.step_frame = false;
        keystate.step_frame_hold = 0;
      }

      break;

    default:
      break;
    }
  }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x50, %rsp
movq %rdi, -0x8(%rbp)
leaq -0x40(%rbp), %rdi
callq 0xda00
cmpl $0x0, %eax
je 0xbd2cf
leaq -0x40(%rbp), %rdi
callq 0x167f00
cmpl $0x100, -0x40(%rbp)     # imm = 0x100
jne 0xbd231
movq 0x150cd9(%rip), %rdi    # 0x20def0
leaq 0xb4e0e(%rip), %rsi     # 0x17202c
callq 0xd5c0
movq -0x8(%rbp), %rdi
callq 0x4c900
jmp 0xbd2cf
movl -0x40(%rbp), %eax
movl %eax, -0x44(%rbp)
subl $0x300, %eax            # imm = 0x300
je 0xbd24c
jmp 0xbd240
movl -0x44(%rbp), %eax
subl $0x301, %eax            # imm = 0x301
je 0xbd298
jmp 0xbd2c8
cmpl $0x73, -0x2c(%rbp)
jne 0xbd271
cmpl $0x0, 0x155b7b(%rip)    # 0x212dd4
jne 0xbd262
movb $0x1, 0x155b6e(%rip)    # 0x212dd0
movl 0x155b6c(%rip), %eax    # 0x212dd4
addl $0x1, %eax
movl %eax, 0x155b63(%rip)    # 0x212dd4
cmpl $0x6d, -0x2c(%rbp)
jne 0xbd296
cmpl $0x0, 0x155b5a(%rip)    # 0x212dd8
jne 0xbd287
movb $0x1, 0x155b4a(%rip)    # 0x212dd1
movl 0x155b4b(%rip), %eax    # 0x212dd8
addl $0x1, %eax
movl %eax, 0x155b42(%rip)    # 0x212dd8
jmp 0xbd2ca
cmpl $0x73, -0x2c(%rbp)
jne 0xbd2af
movb $0x0, 0x155b2b(%rip)    # 0x212dd0
movl $0x0, 0x155b25(%rip)    # 0x212dd4
cmpl $0x6d, -0x2c(%rbp)
jne 0xbd2c6
movb $0x0, 0x155b15(%rip)    # 0x212dd1
movl $0x0, 0x155b12(%rip)    # 0x212dd8
jmp 0xbd2ca
jmp 0xbd2ca
jmp 0xbd1ec
addq $0x50, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: Ciaxur[P]yagb-emu/src/../include/imgui_club/imgui_memory_editor/imgui_memory_editor.h
// Function: MemoryEditor::MemoryEditor()
MemoryEditor()
    {
        // Settings
        Open = true;
        ReadOnly = false;
        Cols = 16;
        OptShowOptions = true;
        OptShowDataPreview = false;
        OptShowHexII = false;
        OptShowAscii = true;
        OptGreyOutZeroes = true;
        OptUpperCaseHex = true;
        OptMidColsCount = 8;
        OptAddrDigitsCount = 0;
        HighlightColor = IM_COL32(255, 255, 255, 50);
        ReadFn = NULL;
        WriteFn = NULL;
        HighlightFn = NULL;

        // State/Internals
        ContentsWidthChanged = false;
        DataPreviewAddr = DataEditingAddr = (size_t)-1;
        DataEditingTakeFocus = false;
        memset(DataInputBuf, 0, sizeof(DataInputBuf));
        memset(AddrInputBuf, 0, sizeof(AddrInputBuf));
        GotoAddr = (size_t)-1;
        HighlightMin = HighlightMax = (size_t)-1;
        PreviewEndianess = 0;
        PreviewDataType = ImGuiDataType_S32;
    }

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x10, %rsp
movq %rdi, -0x8(%rbp)
movq -0x8(%rbp), %rdi
movq %rdi, -0x10(%rbp)
movb $0x1, (%rdi)
movb $0x0, 0x1(%rdi)
movl $0x10, 0x4(%rdi)
movb $0x1, 0x8(%rdi)
movb $0x0, 0x9(%rdi)
movb $0x0, 0xa(%rdi)
movb $0x1, 0xb(%rdi)
movb $0x1, 0xc(%rdi)
movb $0x1, 0xd(%rdi)
movl $0x8, 0x10(%rdi)
movl $0x0, 0x14(%rdi)
movl $0x32ffffff, 0x18(%rdi) # imm = 0x32FFFFFF
movq $0x0, 0x20(%rdi)
movq $0x0, 0x28(%rdi)
movq $0x0, 0x30(%rdi)
movb $0x0, 0x38(%rdi)
movq $-0x1, 0x48(%rdi)
movq $-0x1, 0x40(%rdi)
movb $0x0, 0x50(%rdi)
addq $0x51, %rdi
xorl %esi, %esi
movl $0x20, %edx
callq 0xd2f0
movq -0x10(%rbp), %rdi
addq $0x71, %rdi
xorl %esi, %esi
movl $0x20, %edx
callq 0xd2f0
movq -0x10(%rbp), %rax
movq $-0x1, 0x98(%rax)
movq $-0x1, 0xa8(%rax)
movq $-0x1, 0xa0(%rax)
movl $0x0, 0xb0(%rax)
movl $0x4, 0xb4(%rax)
addq $0x10, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)
nopl (%rax)
// File: Ciaxur[P]yagb-emu/src/main.cc
// Function: ImGui_NewFrame()
inline void ImGui_NewFrame() {
  // Start the Dear ImGui frame
  ImGui_ImplOpenGL3_NewFrame();
  ImGui_ImplSDL2_NewFrame(window);
  ImGui::NewFrame();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
callq 0x169210
movq 0x153918(%rip), %rdi    # 0x212dc8
callq 0x1684d0
callq 0xcc680
popq %rbp
retq
nopl (%rax)