// File: /workspace/github_c_makefile_star2_O0/markdryan[P]subtilis/arch/arm32/arm_reg_alloc.c
// Function: prv_allocate_floating
static void
prv_allocate_floating(subtilis_arm_reg_ud_t *ud, subtilis_arm_op_t *current,
		      subtilis_arm_reg_class_t *int_regs,
		      subtilis_arm_reg_class_t *regs, subtilis_arm_reg_t *reg,
		      subtilis_arm_reg_t restricted, subtilis_error_t *err)
{
	subtilis_arm_reg_t target_reg;
	int i;
	int next = regs->max_regs;
	int max_next = -1;

	/* Virtual register is not already assigned. */

	for (i = regs->max_regs - 1; i >= 0; i--)
		if ((regs->phys_to_virt[i] == INT_MAX) &&
		    (restricted == SIZE_MAX || restricted != i))
			break;

	if (i >= 0) {
		target_reg = (size_t)i;
	} else {
		/* No free physical regs.  Need to spill. */

		for (i = 0; i < regs->max_regs; i++)
			if ((regs->next[i] > max_next) &&
			    (restricted == SIZE_MAX || restricted != i)) {
				max_next = regs->next[i];
				next = i;
			}
		if (next == regs->max_regs) {
			subtilis_error_set_assertion_failed(err);
			return;
		}
		target_reg = next;
		prv_spill_reg(ud, current, regs->phys_to_virt[next], int_regs,
			      regs, target_reg, err);
		if (err->type != SUBTILIS_ERROR_OK)
			return;
	}

	*reg = target_reg;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x50, %rsp
movq 0x10(%rbp), %rax
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq %rdx, -0x18(%rbp)
movq %rcx, -0x20(%rbp)
movq %r8, -0x28(%rbp)
movq %r9, -0x30(%rbp)
movq -0x20(%rbp), %rax
movq (%rax), %rax
movl %eax, -0x40(%rbp)
movl $0xffffffff, -0x44(%rbp) # imm = 0xFFFFFFFF
movq -0x20(%rbp), %rax
movq (%rax), %rax
subq $0x1, %rax
movl %eax, -0x3c(%rbp)
cmpl $0x0, -0x3c(%rbp)
jl 0x773b2
movq -0x20(%rbp), %rax
movq 0x8(%rax), %rax
movslq -0x3c(%rbp), %rcx
cmpq $0x7fffffff, (%rax,%rcx,8) # imm = 0x7FFFFFFF
jne 0x773a5
cmpq $-0x1, -0x30(%rbp)
je 0x773a3
movq -0x30(%rbp), %rax
movslq -0x3c(%rbp), %rcx
cmpq %rcx, %rax
je 0x773a5
jmp 0x773b2
jmp 0x773a7
movl -0x3c(%rbp), %eax
addl $-0x1, %eax
movl %eax, -0x3c(%rbp)
jmp 0x77373
cmpl $0x0, -0x3c(%rbp)
jl 0x773c5
movslq -0x3c(%rbp), %rax
movq %rax, -0x38(%rbp)
jmp 0x77495
movl $0x0, -0x3c(%rbp)
movslq -0x3c(%rbp), %rax
movq -0x20(%rbp), %rcx
cmpq (%rcx), %rax
jae 0x77426
movq -0x20(%rbp), %rax
movq 0x10(%rax), %rax
movslq -0x3c(%rbp), %rcx
movl (%rax,%rcx,4), %eax
cmpl -0x44(%rbp), %eax
jle 0x77419
cmpq $-0x1, -0x30(%rbp)
je 0x77401
movq -0x30(%rbp), %rax
movslq -0x3c(%rbp), %rcx
cmpq %rcx, %rax
je 0x77419
movq -0x20(%rbp), %rax
movq 0x10(%rax), %rax
movslq -0x3c(%rbp), %rcx
movl (%rax,%rcx,4), %eax
movl %eax, -0x44(%rbp)
movl -0x3c(%rbp), %eax
movl %eax, -0x40(%rbp)
jmp 0x7741b
movl -0x3c(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x3c(%rbp)
jmp 0x773cc
movslq -0x40(%rbp), %rax
movq -0x20(%rbp), %rcx
cmpq (%rcx), %rax
jne 0x7744f
movq 0x10(%rbp), %rdi
movl $0xf, %esi
leaq 0x35750(%rip), %rdx     # 0xacb93
movl $0x33a, %ecx            # imm = 0x33A
callq 0x158e0
jmp 0x774a0
movslq -0x40(%rbp), %rax
movq %rax, -0x38(%rbp)
movq -0x8(%rbp), %rdi
movq -0x10(%rbp), %rsi
movq -0x20(%rbp), %rax
movq 0x8(%rax), %rax
movslq -0x40(%rbp), %rcx
movq (%rax,%rcx,8), %rdx
movq -0x18(%rbp), %rcx
movq -0x20(%rbp), %r8
movq -0x38(%rbp), %r9
movq 0x10(%rbp), %rax
movq %rax, (%rsp)
callq 0x7a350
movq 0x10(%rbp), %rax
cmpl $0x0, (%rax)
je 0x77493
jmp 0x774a0
jmp 0x77495
movq -0x38(%rbp), %rcx
movq -0x28(%rbp), %rax
movq %rcx, (%rax)
addq $0x50, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)