// File: /workspace/github_c_makefile_star2_O1/samtools[P]htslib/htscodecs/htscodecs/rANS_static32x16pr_avx2.c
// Function: rans_compress_O1_32x16_avx2
unsigned char *rans_compress_O1_32x16_avx2(unsigned char *in, unsigned int in_size,
                                           unsigned char *out, unsigned int *out_size) {
    unsigned char *cp, *out_end, *out_free = NULL;
    unsigned int tab_size;
    uint32_t bound = rans_compress_bound_4x16(in_size,1)-20;
    int z;
    RansState ransN[NX] __attribute__((aligned(32)));

    if (in_size < NX) // force O0 instead
        return NULL;

    if (!out) {
        *out_size = bound;
        out = malloc(*out_size);
    }
    if (!out || bound > *out_size)
        return NULL;

    if (((size_t)out)&1)
        bound--;
    out_end = out + bound;

    RansEncSymbol (*syms)[256] = htscodecs_tls_alloc(256 * (sizeof(*syms)));
    if (!syms) {
        free(out_free);
        return NULL;
    }

    cp = out;
    int shift = encode_freq1(in, in_size, 32, syms, &cp); 
    if (shift < 0) {
        free(out_free);
        htscodecs_tls_free(syms);
        return NULL;
    }
    tab_size = cp - out;

    for (z = 0; z < NX; z++)
      RansEncInit(&ransN[z]);

    uint8_t* ptr = out_end;

    int iN[NX], isz4 = in_size/NX;
    for (z = 0; z < NX; z++)
        iN[z] = (z+1)*isz4-2;

    unsigned char lN[NX];
    for (z = 0; z < NX; z++)
        lN[z] = in[iN[z]+1];

    // Deal with the remainder
    z = NX-1;
    lN[z] = in[in_size-1];
    for (iN[z] = in_size-2; iN[z] > NX*isz4-2; iN[z]--) {
        unsigned char c = in[iN[z]];
        RansEncPutSymbol(&ransN[z], &ptr, &syms[c][lN[z]]);
        lN[z] = c;
    }

    uint16_t *ptr16 = (uint16_t *)ptr;

//       clang16      clang10      gcc7         gcc13
//       587 435 381  588 438 403  504 386 415  527 381 394
// simT  611 432 402  475 401 367  472 422 386  486 353 324

    LOAD(Rv, ransN);

    for (; iN[0] >= 0; ) {
        // We need to gather sym[curr_char][last_char] structs.
        // These hold 4 32-bit values, so are 128 bit each, and
        // are loaded from 32 distinct addresses.
        //
        // We load them into 32 128-bit lanes and then combine to get
        // 16 avx-256 registers.
        // These are now ABCD ABCD ABCD ABCD... orientation
        // Code we can then "gather" from these registers via a combination
        // of shuffle / permutes / and / or operations.  This is less
        // IO than repeating 4 sets of gathers/loads 32-times over.

        // DCBA holding 4 elements in a syms[] array
        // -> 4-way rotate via shuffles
        // [0] DCBA  11 10 01 00  E4
        // [1] CBAD  10 01 00 11  93
        // [2] BADC  01 00 11 10  4E
        // [3] ADCB  00 11 10 01  39
        //
        // Then AND to select relevant lanes and OR
        // [0] ......A0
        // [1] ....A1..
        // [2] ..A2....
        // [3] A3......  OR to get A3A2A1A0
        //
        // or:
        // [0] ....B0..
        // [1] ..B1....
        // [2] B2......
        // [3] ......B3  OR to get B2B1B0B3 and shuffle to B3B2B1B0

        __m256i xmaxv[4];
        __m256i rfv[4];
        __m256i SDv[4];
        __m256i biasv[4];

        const __m256i xA = _mm256_set_epi32(0,0,0,-1, 0,0,0,-1);
        const __m256i xB = _mm256_set_epi32(0,0,-1,0, 0,0,-1,0);
        const __m256i xC = _mm256_set_epi32(0,-1,0,0, 0,-1,0,0);
        const __m256i xD = _mm256_set_epi32(-1,0,0,0, -1,0,0,0);

        for (z = 0; z < 32; z += 8) {
#define m128_to_256 _mm256_castsi128_si256
            __m128i *s0 = (__m128i *)(&syms[in[iN[z+0]]][lN[z+0]]);
            __m128i *s1 = (__m128i *)(&syms[in[iN[z+4]]][lN[z+4]]);
            __m128i *s2 = (__m128i *)(&syms[in[iN[z+1]]][lN[z+1]]);
            __m128i *s3 = (__m128i *)(&syms[in[iN[z+5]]][lN[z+5]]);

            __m256i t0, t1, t2, t3;
            t0 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s0)), 0xE4);
            t1 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s1)), 0xE4);
            t2 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s2)), 0x93);
            t3 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s3)), 0x93);

            __m256i sh0 = _mm256_permute2x128_si256(t0, t1, 0x20);
            __m256i sh1 = _mm256_permute2x128_si256(t2, t3, 0x20);

            lN[z+0] = in[iN[z+0]];
            lN[z+4] = in[iN[z+4]];
            lN[z+1] = in[iN[z+1]];
            lN[z+5] = in[iN[z+5]];

            // Initialise first half of xmax, rf, SD and bias vectors
            __m128i *s4 = (__m128i *)(&syms[in[iN[z+2]]][lN[z+2]]);
            __m128i *s5 = (__m128i *)(&syms[in[iN[z+6]]][lN[z+6]]);
            __m128i *s6 = (__m128i *)(&syms[in[iN[z+3]]][lN[z+3]]);
            __m128i *s7 = (__m128i *)(&syms[in[iN[z+7]]][lN[z+7]]);

            __m256i t4, t5, t6, t7;
            t4 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s4)), 0x4E);
            t5 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s5)), 0x4E);
            t6 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s6)), 0x39);
            t7 = _mm256_shuffle_epi32(m128_to_256(_mm_loadu_si128(s7)), 0x39);

            __m256i sh2 = _mm256_permute2x128_si256(t4, t5, 0x20);
            __m256i sh3 = _mm256_permute2x128_si256(t6, t7, 0x20);

            lN[z+2] = in[iN[z+2]];
            lN[z+6] = in[iN[z+6]];
            lN[z+3] = in[iN[z+3]];
            lN[z+7] = in[iN[z+7]];

#define SH_LOAD(A, B, C, D)                                        \
            _mm256_or_si256(_mm256_or_si256(_mm256_and_si256(sh0, A), \
                                            _mm256_and_si256(sh1, B)),\
                            _mm256_or_si256(_mm256_and_si256(sh2, C), \
                                            _mm256_and_si256(sh3, D)))
            xmaxv[z/8] = SH_LOAD(xA, xB, xC, xD);
            rfv  [z/8] = SH_LOAD(xB, xC, xD, xA);
            SDv  [z/8] = SH_LOAD(xD, xA, xB, xC);
            biasv[z/8] = SH_LOAD(xC, xD, xA, xB);

            rfv  [z/8] = _mm256_shuffle_epi32(rfv  [z/8],  0x39);
            SDv  [z/8] = _mm256_shuffle_epi32(SDv  [z/8],  0x93);
            biasv[z/8] = _mm256_shuffle_epi32(biasv[z/8],0x4E);
        }

        // ------------------------------------------------------------
        //      for (z = NX-1; z >= 0; z--) {
        //          if (ransN[z] >= x_max[z]) {
        //              *--ptr16 = ransN[z] & 0xffff;
        //              ransN[z] >>= 16;
        //          }
        //      }
        __m256i cv1 = _mm256_cmpgt_epi32(Rv1, xmaxv[0]);
        __m256i cv2 = _mm256_cmpgt_epi32(Rv2, xmaxv[1]);
        __m256i cv3 = _mm256_cmpgt_epi32(Rv3, xmaxv[2]);
        __m256i cv4 = _mm256_cmpgt_epi32(Rv4, xmaxv[3]);

        // Store bottom 16-bits at ptr16
        //
        // for (z = NX-1; z >= 0; z--) {
        //     if (cond[z]) *--ptr16 = (uint16_t )(ransN[z] & 0xffff);
        // }
        unsigned int imask1 = _mm256_movemask_ps((__m256)cv1);
        unsigned int imask2 = _mm256_movemask_ps((__m256)cv2);
        unsigned int imask3 = _mm256_movemask_ps((__m256)cv3);
        unsigned int imask4 = _mm256_movemask_ps((__m256)cv4);

        __m256i idx1 = _mm256_load_si256((const __m256i*)permutec[imask1]);
        __m256i idx2 = _mm256_load_si256((const __m256i*)permutec[imask2]);
        __m256i idx3 = _mm256_load_si256((const __m256i*)permutec[imask3]);
        __m256i idx4 = _mm256_load_si256((const __m256i*)permutec[imask4]);

        // Permute; to gather together the rans states that need flushing
        __m256i V1, V2, V3, V4;
        V1 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv1, cv1), idx1);
        V2 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv2, cv2), idx2);
        V3 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv3, cv3), idx3);
        V4 = _mm256_permutevar8x32_epi32(_mm256_and_si256(Rv4, cv4), idx4);

        // We only flush bottom 16 bits, to squash 32-bit states into 16 bit.
        V1 = _mm256_and_si256(V1, _mm256_set1_epi32(0xffff));
        V2 = _mm256_and_si256(V2, _mm256_set1_epi32(0xffff));
        V3 = _mm256_and_si256(V3, _mm256_set1_epi32(0xffff));
        V4 = _mm256_and_si256(V4, _mm256_set1_epi32(0xffff));
        __m256i V12 = _mm256_packus_epi32(V1, V2);
        __m256i V34 = _mm256_packus_epi32(V3, V4);

        // It's BAba order, want BbAa so shuffle.
        V12 = _mm256_permute4x64_epi64(V12, 0xd8);
        V34 = _mm256_permute4x64_epi64(V34, 0xd8);

        // Now we have bottom N 16-bit values in each V12/V34 to flush
        __m128i f =  _mm256_extractf128_si256(V34, 1);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask4);

        f =  _mm256_extractf128_si256(V34, 0);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask3);

        f =  _mm256_extractf128_si256(V12, 1);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask2);

        f =  _mm256_extractf128_si256(V12, 0);
        _mm_storeu_si128((__m128i *)(ptr16-8), f);
        ptr16 -= _mm_popcnt_u32(imask1);

        __m256i Rs1, Rs2, Rs3, Rs4;
        Rs1 = _mm256_srli_epi32(Rv1,16);
        Rs2 = _mm256_srli_epi32(Rv2,16);
        Rs3 = _mm256_srli_epi32(Rv3,16);
        Rs4 = _mm256_srli_epi32(Rv4,16);

        Rv1 = _mm256_blendv_epi8(Rv1, Rs1, cv1);
        Rv2 = _mm256_blendv_epi8(Rv2, Rs2, cv2);
        Rv3 = _mm256_blendv_epi8(Rv3, Rs3, cv3);
        Rv4 = _mm256_blendv_epi8(Rv4, Rs4, cv4);

        // ------------------------------------------------------------
        // uint32_t q = (uint32_t) (((uint64_t)ransN[z] *
        //                           rcp_freq[z]) >> rcp_shift[z]);
        // ransN[z] = ransN[z] + bias[z] + q * cmpl_freq[z];

        // Cannot trivially replace the multiply as mulhi_epu32 doesn't exist
        // (only mullo).  However we can use _mm256_mul_epu32 twice to get
        // 64bit results (half our lanes) and shift/or to get the answer.
        //
        // (AVX512 allows us to hold it all in 64-bit lanes and use mullo_epi64
        // plus a shift.  KNC has mulhi_epi32, but not sure if this is
        // available.)
        rfv[0] = _mm256_mulhi_epu32(Rv1, rfv[0]);
        rfv[1] = _mm256_mulhi_epu32(Rv2, rfv[1]);
        rfv[2] = _mm256_mulhi_epu32(Rv3, rfv[2]);
        rfv[3] = _mm256_mulhi_epu32(Rv4, rfv[3]);

        __m256i shiftv1 = _mm256_srli_epi32(SDv[0], 16);
        __m256i shiftv2 = _mm256_srli_epi32(SDv[1], 16);
        __m256i shiftv3 = _mm256_srli_epi32(SDv[2], 16);
        __m256i shiftv4 = _mm256_srli_epi32(SDv[3], 16);

        shiftv1 = _mm256_sub_epi32(shiftv1, _mm256_set1_epi32(32));
        shiftv2 = _mm256_sub_epi32(shiftv2, _mm256_set1_epi32(32));
        shiftv3 = _mm256_sub_epi32(shiftv3, _mm256_set1_epi32(32));
        shiftv4 = _mm256_sub_epi32(shiftv4, _mm256_set1_epi32(32));

        __m256i qv1 = _mm256_srlv_epi32(rfv[0], shiftv1);
        __m256i qv2 = _mm256_srlv_epi32(rfv[1], shiftv2);

        __m256i freqv1 = _mm256_and_si256(SDv[0], _mm256_set1_epi32(0xffff));
        __m256i freqv2 = _mm256_and_si256(SDv[1], _mm256_set1_epi32(0xffff));
        qv1 = _mm256_mullo_epi32(qv1, freqv1);
        qv2 = _mm256_mullo_epi32(qv2, freqv2);

        __m256i qv3 = _mm256_srlv_epi32(rfv[2], shiftv3);
        __m256i qv4 = _mm256_srlv_epi32(rfv[3], shiftv4);

        __m256i freqv3 = _mm256_and_si256(SDv[2], _mm256_set1_epi32(0xffff));
        __m256i freqv4 = _mm256_and_si256(SDv[3], _mm256_set1_epi32(0xffff));
        qv3 = _mm256_mullo_epi32(qv3, freqv3);
        qv4 = _mm256_mullo_epi32(qv4, freqv4);

        qv1 = _mm256_add_epi32(qv1, biasv[0]);
        qv2 = _mm256_add_epi32(qv2, biasv[1]);
        qv3 = _mm256_add_epi32(qv3, biasv[2]);
        qv4 = _mm256_add_epi32(qv4, biasv[3]);

        for (z = 0; z < NX; z++)
            iN[z]--;

        Rv1 = _mm256_add_epi32(Rv1, qv1);
        Rv2 = _mm256_add_epi32(Rv2, qv2);
        Rv3 = _mm256_add_epi32(Rv3, qv3);
        Rv4 = _mm256_add_epi32(Rv4, qv4);
    }

    STORE(Rv, ransN);

    ptr = (uint8_t *)ptr16;

    for (z = NX-1; z>=0; z--)
        RansEncPutSymbol(&ransN[z], &ptr, &syms[0][lN[z]]);

    for (z = NX-1; z>=0; z--)
        RansEncFlush(&ransN[z], &ptr);

    *out_size = (out_end - ptr) + tab_size;

    cp = out;
    memmove(out + tab_size, ptr, out_end-ptr);

    htscodecs_tls_free(syms);
    return out;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
andq $-0x20, %rsp
subq $0xb60, %rsp            # imm = 0xB60
movq %rcx, %r12
movq %rdx, %r14
movl %esi, %ebx
movq %rdi, %r13
movl %esi, %edi
movl $0x1, %esi
callq 0x64798
movq %rbx, %rcx
cmpl $0x20, %ecx
jb 0x6c3a4
movl %eax, %r15d
leal -0x14(%r15), %ebx
testq %r14, %r14
jne 0x6b8ad
movl %ebx, (%r12)
movl %ebx, %edi
movq %rcx, %r14
callq 0x4680
movq %r14, %rcx
movq %rax, %r14
testq %r14, %r14
je 0x6c3a4
cmpl (%r12), %ebx
ja 0x6c3a4
movq %rcx, 0x40(%rsp)
movq %r12, 0xd8(%rsp)
addl $-0x15, %r15d
testb $0x1, %r14b
cmovel %ebx, %r15d
movq %r15, 0x50(%rsp)
movl $0x100000, %edi         # imm = 0x100000
callq 0x8060c
testq %rax, %rax
je 0x6c3a4
movq %rax, %r12
movl $0x100, %edi            # imm = 0x100
movl $0x400, %esi            # imm = 0x400
callq 0x8070d
testq %rax, %rax
je 0x6ba2b
movq %rax, %r15
leaq 0x320(%rsp), %rdi
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
movq 0x40(%rsp), %r10
movl %r10d, %ebx
addq %r13, %rbx
cmpl $0x7a120, %r10d         # imm = 0x7A120
movq %r14, 0x38(%rsp)
jbe 0x6ba32
movl $0x100, %edi            # imm = 0x100
movl $0x40c, %esi            # imm = 0x40C
callq 0x8070d
testq %rax, %rax
je 0x6c1ad
leaq -0x8(%rbx), %rsi
xorl %edx, %edx
movq %r13, %rcx
cmpq %r13, %rsi
jbe 0x6b9ff
movzbl (%rcx), %r8d
movzbl 0x1(%rcx), %r9d
movzbl 0x2(%rcx), %r10d
movzbl 0x3(%rcx), %edi
movzbl %dl, %edx
shll $0xa, %edx
addq %r15, %rdx
incl (%rdx,%r8,4)
imulq $0x40c, %r8, %rdx       # imm = 0x40C
addq %rax, %rdx
incl (%rdx,%r9,4)
shll $0xa, %r9d
addq %r15, %r9
incl (%r9,%r10,4)
imulq $0x40c, %r10, %rdx      # imm = 0x40C
addq %rax, %rdx
incl (%rdx,%rdi,4)
movzbl 0x4(%rcx), %r8d
movzbl 0x5(%rcx), %r9d
movzbl 0x6(%rcx), %r10d
movzbl 0x7(%rcx), %edx
shll $0xa, %edi
addq %r15, %rdi
incl (%rdi,%r8,4)
imulq $0x40c, %r8, %rdi       # imm = 0x40C
addq %rax, %rdi
incl (%rdi,%r9,4)
shll $0xa, %r9d
addq %r15, %r9
incl (%r9,%r10,4)
addq $0x8, %rcx
imulq $0x40c, %r10, %rdi      # imm = 0x40C
addq %rax, %rdi
incl (%rdi,%rdx,4)
cmpq %rsi, %rcx
jb 0x6b96a
cmpq %rbx, %rcx
jae 0x6bb28
movq 0x38(%rsp), %r14
movzbl (%rcx), %esi
movzbl %dl, %edx
shll $0xa, %edx
addq %r15, %rdx
incl (%rdx,%rsi,4)
incq %rcx
movl %esi, %edx
cmpq %rbx, %rcx
jb 0x6ba0d
jmp 0x6bb2f
movb $0x1, %al
jmp 0x6c1bc
leaq -0x8(%rbx), %rcx
xorl %edx, %edx
movq %r13, %rax
cmpq %r13, %rcx
jbe 0x6bac9
movzbl (%rax), %r8d
movzbl 0x1(%rax), %r9d
movzbl 0x2(%rax), %edi
movzbl 0x3(%rax), %esi
movzbl %dl, %edx
shll $0xa, %edx
addq %r15, %rdx
incl (%rdx,%r8,4)
shll $0xa, %r8d
addq %r15, %r8
incl (%r8,%r9,4)
shll $0xa, %r9d
addq %r15, %r9
incl (%r9,%rdi,4)
shll $0xa, %edi
addq %r15, %rdi
incl (%rdi,%rsi,4)
movzbl 0x4(%rax), %r8d
movzbl 0x5(%rax), %r9d
movzbl 0x6(%rax), %edi
movzbl 0x7(%rax), %edx
shll $0xa, %esi
addq %r15, %rsi
incl (%rsi,%r8,4)
shll $0xa, %r8d
addq %r15, %r8
incl (%r8,%r9,4)
shll $0xa, %r9d
addq %r15, %r9
incl (%r9,%rdi,4)
addq $0x8, %rax
shll $0xa, %edi
addq %r15, %rdi
incl (%rdi,%rdx,4)
cmpq %rcx, %rax
jb 0x6ba44
cmpq %rbx, %rax
jae 0x6bae9
movzbl (%rax), %ecx
movzbl %dl, %edx
shll $0xa, %edx
addq %r15, %rdx
incl (%rdx,%rcx,4)
incq %rax
movl %ecx, %edx
cmpq %rbx, %rax
jb 0x6bace
jmp 0x6baeb
movl %edx, %ecx
movzbl %cl, %eax
incl 0x320(%rsp,%rax,4)
xorl %eax, %eax
movq %r15, %rcx
xorl %esi, %esi
xorl %edx, %edx
addl (%rcx,%rsi,4), %edx
incq %rsi
cmpq $0x100, %rsi            # imm = 0x100
jne 0x6bafe
addl %edx, 0x320(%rsp,%rax,4)
incq %rax
addq $0x400, %rcx            # imm = 0x400
cmpq $0x100, %rax            # imm = 0x100
jne 0x6bafa
jmp 0x6bb90
movl %edx, %esi
movq 0x38(%rsp), %r14
movzbl %sil, %ecx
incl 0x320(%rsp,%rcx,4)
xorl %ecx, %ecx
movq %rax, %rdx
movq %r15, %rsi
xorl %r8d, %r8d
xorl %edi, %edi
movl (%rsi,%r8,4), %r9d
addl (%rdx,%r8,4), %r9d
movl %r9d, (%rsi,%r8,4)
addl %r9d, %edi
incq %r8
cmpq $0x100, %r8             # imm = 0x100
jne 0x6bb47
addl %edi, 0x320(%rsp,%rcx,4)
incq %rcx
addq $0x400, %rsi            # imm = 0x400
addq $0x40c, %rdx            # imm = 0x40C
cmpq $0x100, %rcx            # imm = 0x100
jne 0x6bb42
movq %rax, %rdi
callq 0x80732
movq 0x40(%rsp), %r10
movl %r10d, %eax
shrl $0x5, %eax
movl %eax, %eax
leaq (%rax,%r13), %rcx
movl $0x1f, %edx
movzbl (%rcx), %esi
incl (%r15,%rsi,4)
addq %rax, %rcx
decq %rdx
jne 0x6bba1
movl 0x320(%rsp), %eax
movl $0x1, 0x320(%rsp)
leaq 0x1(%r14), %r9
movb $0x0, (%r14)
xorl %ecx, %ecx
movl $0x1, %edx
xorl %esi, %esi
movq %r9, %r8
movq %r8, %rdi
cmpl $0x0, 0x320(%rsp,%rcx,4)
je 0x6bbe9
testl %esi, %esi
je 0x6bbfd
decl %esi
movq %rdi, %r8
incq %rcx
incq %rdx
cmpq $0x100, %rcx            # imm = 0x100
jne 0x6bbd6
jmp 0x6bc4f
leaq 0x1(%rdi), %r8
movb %cl, (%rdi)
xorl %esi, %esi
testq %rcx, %rcx
je 0x6bbec
cmpl $0x0, 0x31c(%rsp,%rcx,4)
je 0x6bbec
leal 0x1(%rcx), %r8d
movl %r8d, %esi
cmpq $0xfe, %rcx
ja 0x6bc42
movq %rdx, %rsi
cmpl $0x0, 0x320(%rsp,%rsi,4)
je 0x6bc42
incq %rsi
cmpq $0x100, %rsi            # imm = 0x100
jne 0x6bc27
movl $0x100, %esi            # imm = 0x100
subl %r8d, %esi
movb %sil, 0x1(%rdi)
addq $0x2, %rdi
jmp 0x6bbe9
addl $0x1f, %eax
movb $0x0, (%r8)
subl %r9d, %r8d
incl %r8d
movslq %r8d, %rcx
movq %r9, 0x48(%rsp)
addq %r9, %rcx
movq %rcx, 0x8(%rsp)
leaq 0x320(%rsp), %rbx
movl %eax, (%rbx)
leaq 0x740(%rsp), %r14
movl $0x400, %edx            # imm = 0x400
movq %r14, %rdi
xorl %esi, %esi
callq 0x4260
movq %rbx, %rdi
movq %r15, %rsi
movq %rbx, %rdx
movq %r14, %rcx
callq 0x658ea
xorl %edx, %edx
movl %eax, %ecx
movl $0x1, %edi
movl $0x1, %esi
shll %cl, %esi
movl $0x8000, %eax           # imm = 0x8000
shrl %cl, %eax
shll $0x10, %eax
movl %eax, 0x80(%rsp)
leal -0x1(%rsi), %eax
movq %rax, 0x100(%rsp)
movq %r15, %r14
movl %ecx, 0xe0(%rsp)
movq %r15, 0x58(%rsp)
movq %rsi, 0x60(%rsp)
movl 0x320(%rsp,%rdx,4), %eax
testl %eax, %eax
je 0x6be22
movq %rdx, %rsi
movl 0x740(%rsp,%rdx,4), %edx
movl $0x400, %r8d            # imm = 0x400
cmpl %r8d, %edx
movl $0x400, %r11d           # imm = 0x400
cmovbl %edx, %r11d
cmpl $0xa, %ecx
cmovnel %edx, %r11d
movq %r15, %rcx
movq %rsi, 0xa0(%rsp)
movq %rsi, %r15
shlq $0xa, %r15
addq %rcx, %r15
movq %r11, %rcx
shlq $0x1f, %rcx
movb $0x1, %r10b
movslq %eax, %r8
xorl %r9d, %r9d
movq %rcx, %rax
xorl %edx, %edx
divq %r8
movq %rax, %rsi
movl $0x40000000, %eax       # imm = 0x40000000
xorl %edx, %edx
idivl %r8d
movslq %eax, %rdx
addq %rsi, %rdx
xorl %eax, %eax
xorl %esi, %esi
xorl %ebx, %ebx
movl (%r14,%r9,4), %r8d
testq %r8, %r8
je 0x6bd85
cmpl %r8d, %esi
cmovbl %r9d, %ebx
cmovbel %r8d, %esi
imulq %rdx, %r8
shrq $0x1f, %r8
cmpl $0x2, %r8d
cmovbl %edi, %r8d
movl %r8d, (%r14,%r9,4)
addl %eax, %r8d
movl %r8d, %eax
incq %r9
cmpq $0x100, %r9             # imm = 0x100
jne 0x6bd57
movl %r11d, %esi
subl %eax, %esi
movslq %ebx, %rdx
testl %esi, %esi
jg 0x6be29
jns 0x6be3c
movl (%r15,%rdx,4), %r9d
movl %esi, %r8d
negl %r8d
cmpl %r8d, %r9d
jbe 0x6bdc7
movl %r9d, %ebx
shrl %ebx
cmpl %r8d, %ebx
setb %r8b
testb %r8b, %r10b
je 0x6be32
testb $0x1, %r10b
movl $0x0, %r10d
jne 0x6bd30
addl %r9d, %esi
movl $0x1, (%r15,%rdx,4)
decl %esi
je 0x6be3c
xorl %eax, %eax
movl (%r14,%rax,4), %ecx
cmpl $0x2, %ecx
jb 0x6be11
movl %esi, %r8d
negl %r8d
movl $0x1, %r9d
subl %ecx, %r9d
cmpl %r8d, %ecx
cmoval %esi, %r9d
addl %r9d, %ecx
movl %ecx, (%r14,%rax,4)
subl %r9d, %esi
cmpq $0xfe, %rax
ja 0x6be3c
incq %rax
testl %esi, %esi
jne 0x6bde8
jmp 0x6be3c
xorl %eax, %eax
jmp 0x6c105
leaq (%r15,%rdx,4), %rax
movl (%rax), %r9d
jmp 0x6be36
leaq (%r15,%rdx,4), %rax
addl %esi, %r9d
movl %r9d, (%rax)
cmpl $0x0, (%r15,%rdx,4)
je 0x6c0ef
movq 0xa0(%rsp), %rax
movl %r11d, 0x320(%rsp,%rax,4)
xorl %ecx, %ecx
xorl %edx, %edx
movq 0x8(%rsp), %r8
movq %r8, %rax
movl 0xe0(%rsp), %r9d
movq 0x60(%rsp), %rsi
cmpl $0x0, 0x320(%rsp,%rcx,4)
je 0x6bf91
cmpl $0x0, (%r14,%rcx,4)
je 0x6beab
testl %edx, %edx
je 0x6be96
decl %edx
movslq %edx, %rdx
subq %rdx, %rax
movb %dl, (%rax)
incq %rax
movl (%r14,%rcx,4), %edx
cmpl $0x7f, %edx
ja 0x6beb8
movb %dl, (%rax)
movl $0x1, %edx
jmp 0x6bf8c
incl %edx
movb $0x0, (%rax)
incq %rax
jmp 0x6bf91
movl %edx, %esi
cmpl $0x3fff, %edx           # imm = 0x3FFF
ja 0x6bee1
shrl $0x7, %esi
orb $-0x80, %sil
movb %sil, (%rax)
movq 0x60(%rsp), %rsi
andb $0x7f, %dl
movb %dl, 0x1(%rax)
movl $0x2, %edx
jmp 0x6bf8c
cmpl $0x1fffff, %edx         # imm = 0x1FFFFF
ja 0x6bf12
shrl $0xe, %esi
orb $-0x80, %sil
movb %sil, (%rax)
movl %edx, %esi
shrl $0x7, %esi
orb $-0x80, %sil
movb %sil, 0x1(%rax)
movq 0x60(%rsp), %rsi
andb $0x7f, %dl
movb %dl, 0x2(%rax)
movl $0x3, %edx
jmp 0x6bf8c
cmpl $0xfffffff, %edx        # imm = 0xFFFFFFF
ja 0x6bf4b
shrl $0x15, %esi
orb $-0x80, %sil
movb %sil, (%rax)
movl %edx, %esi
shrl $0xe, %esi
orb $-0x80, %sil
movb %sil, 0x1(%rax)
movl %edx, %esi
shrl $0x7, %esi
orb $-0x80, %sil
movb %sil, 0x2(%rax)
andb $0x7f, %dl
movb %dl, 0x3(%rax)
movl $0x4, %edx
jmp 0x6bf87
shrl $0x1c, %esi
orb $-0x80, %sil
movb %sil, (%rax)
movl %edx, %esi
shrl $0x15, %esi
orb $-0x80, %sil
movb %sil, 0x1(%rax)
movl %edx, %esi
shrl $0xe, %esi
orb $-0x80, %sil
movb %sil, 0x2(%rax)
movl %edx, %esi
shrl $0x7, %esi
orb $-0x80, %sil
movb %sil, 0x3(%rax)
andb $0x7f, %dl
movb %dl, 0x4(%rax)
movl $0x5, %edx
movq 0x60(%rsp), %rsi
addq %rdx, %rax
xorl %edx, %edx
incq %rcx
cmpq $0x100, %rcx            # imm = 0x100
jne 0x6be70
testl %edx, %edx
je 0x6bfb2
decl %edx
movslq %edx, %rcx
subq %rcx, %rax
movb %cl, (%rax)
incq %rax
movq 0xa0(%rsp), %rcx
movl 0x320(%rsp,%rcx,4), %edx
movl %esi, %ecx
notl %ecx
testl %ecx, %edx
je 0x6bfeb
xorl %ecx, %ecx
cmpl %esi, %edx
jae 0x6bfd9
xorl %ecx, %ecx
addl %edx, %edx
incl %ecx
cmpl %esi, %edx
jb 0x6bfd1
xorl %edx, %edx
shll %cl, (%r14,%rdx,4)
incq %rdx
cmpq $0x100, %rdx            # imm = 0x100
jne 0x6bfdb
movq 0xa0(%rsp), %rdx
movl %esi, 0x320(%rsp,%rdx,4)
cmpl $0x10, %r9d
ja 0x6cba1
subl %r8d, %eax
cltq
addq %rax, %r8
movq %r8, 0x8(%rsp)
xorl %r9d, %r9d
xorl %r11d, %r11d
movl %esi, %eax
subl %r11d, %eax
jb 0x6cb63
movl (%r15,%r9,4), %ebx
cmpl %ebx, %eax
jb 0x6cb82
movq %rdx, %rax
shlq $0xc, %rax
addq %r12, %rax
movq %r9, %r10
shlq $0x4, %r10
addq %rax, %r10
movl 0x80(%rsp), %eax
imull %ebx, %eax
decl %eax
movl %eax, (%r10)
movl %esi, %eax
subl %ebx, %eax
movw %ax, 0xc(%r10)
cmpl $0x2, %ebx
jae 0x6c07b
movl $0xffffffff, 0x4(%r10)  # imm = 0xFFFFFFFF
movw $0x0, 0xe(%r10)
movq 0x100(%rsp), %rax
addl %r11d, %eax
jmp 0x6c0c1
movl $0x1e, %esi
leal -0x1e(%rsi), %ecx
movl $0x1, %eax
shll %cl, %eax
incl %esi
cmpl %ebx, %eax
jb 0x6c080
movl $0x1, %eax
movl %esi, %ecx
shlq %cl, %rax
addq %rbx, %rax
decq %rax
xorl %edx, %edx
divq %rbx
movl %eax, 0x4(%r10)
addl $-0x20, %esi
movw %si, 0xe(%r10)
movl %r11d, %eax
movq 0xa0(%rsp), %rdx
movq 0x60(%rsp), %rsi
movl %eax, 0x8(%r10)
addw $0x20, 0xe(%r10)
addl (%r15,%r9,4), %r11d
incq %r9
cmpq $0x100, %r9             # imm = 0x100
jne 0x6c017
xorl %eax, %eax
movq 0x58(%rsp), %r15
movl 0xe0(%rsp), %ecx
jmp 0x6c105
movb $0x1, %al
movq 0x58(%rsp), %r15
movl 0xe0(%rsp), %ecx
movq 0xa0(%rsp), %rdx
testb %al, %al
jne 0x6c1ad
incq %rdx
addq $0x400, %r14            # imm = 0x400
cmpq $0x100, %rdx            # imm = 0x100
jne 0x6bcde
movl %ecx, %eax
shlb $0x4, %al
movq 0x38(%rsp), %r14
movb %al, (%r14)
movq 0x8(%rsp), %rax
movq %rax, %rbx
subq %r14, %rbx
cmpq $0x3e9, %rbx            # imm = 0x3E9
jl 0x6c381
movq %rax, %rsi
movq 0x48(%rsp), %rdi
subq %rdi, %rsi
leaq 0x1a0(%rsp), %rcx
movq %rsi, 0x80(%rsp)
xorl %edx, %edx
callq 0x64845
movq %rax, %rcx
testq %rax, %rax
je 0x6c379
movl 0x1a0(%rsp), %edx
leal 0x6(%rdx), %eax
cmpq %rax, %rbx
jle 0x6c379
orb $0x1, (%r14)
movq 0x80(%rsp), %rsi
cmpl $0x7f, %esi
ja 0x6c1c6
movq 0x48(%rsp), %rdi
movb %sil, (%rdi)
movl $0x1, %eax
jmp 0x6c288
movq %r15, %rdi
callq 0x80732
movb $0x1, %al
movq 0x38(%rsp), %r14
movq %r14, 0x8(%rsp)
jmp 0x6c393
cmpl $0x3fff, %esi           # imm = 0x3FFF
movq 0x48(%rsp), %rdi
movl %esi, %eax
ja 0x6c1f0
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x1(%r14)
andb $0x7f, %sil
movb %sil, 0x2(%r14)
movl $0x2, %eax
jmp 0x6c288
cmpl $0x1fffff, %esi         # imm = 0x1FFFFF
ja 0x6c21b
shrl $0xe, %eax
orb $-0x80, %al
movb %al, 0x1(%r14)
movl %esi, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x2(%r14)
andb $0x7f, %sil
movb %sil, 0x3(%r14)
movl $0x3, %eax
jmp 0x6c288
cmpl $0xfffffff, %esi        # imm = 0xFFFFFFF
ja 0x6c251
shrl $0x15, %eax
orb $-0x80, %al
movb %al, 0x1(%r14)
movl %esi, %eax
shrl $0xe, %eax
orb $-0x80, %al
movb %al, 0x2(%r14)
movl %esi, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x3(%r14)
andb $0x7f, %sil
movb %sil, 0x4(%r14)
movl $0x4, %eax
jmp 0x6c288
shrl $0x1c, %eax
orb $-0x80, %al
movb %al, 0x1(%r14)
movl %esi, %eax
shrl $0x15, %eax
orb $-0x80, %al
movb %al, 0x2(%r14)
movl %esi, %eax
shrl $0xe, %eax
orb $-0x80, %al
movb %al, 0x3(%r14)
movl %esi, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x4(%r14)
andb $0x7f, %sil
movb %sil, 0x5(%r14)
movl $0x5, %eax
addq %rax, %rdi
cmpl $0x7f, %edx
ja 0x6c29c
movb %dl, (%rdi)
movl $0x1, %eax
jmp 0x6c347
movl %edx, %eax
cmpl $0x3fff, %edx           # imm = 0x3FFF
ja 0x6c2be
shrl $0x7, %eax
orb $-0x80, %al
movb %al, (%rdi)
movl %edx, %eax
andb $0x7f, %al
movb %al, 0x1(%rdi)
movl $0x2, %eax
jmp 0x6c347
cmpl $0x1fffff, %edx         # imm = 0x1FFFFF
ja 0x6c2e5
shrl $0xe, %eax
orb $-0x80, %al
movb %al, (%rdi)
movl %edx, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x1(%rdi)
movl %edx, %eax
andb $0x7f, %al
movb %al, 0x2(%rdi)
movl $0x3, %eax
jmp 0x6c347
cmpl $0xfffffff, %edx        # imm = 0xFFFFFFF
ja 0x6c316
shrl $0x15, %eax
orb $-0x80, %al
movb %al, (%rdi)
movl %edx, %eax
shrl $0xe, %eax
orb $-0x80, %al
movb %al, 0x1(%rdi)
movl %edx, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x2(%rdi)
movl %edx, %eax
andb $0x7f, %al
movb %al, 0x3(%rdi)
movl $0x4, %eax
jmp 0x6c347
shrl $0x1c, %eax
orb $-0x80, %al
movb %al, (%rdi)
movl %edx, %eax
shrl $0x15, %eax
orb $-0x80, %al
movb %al, 0x1(%rdi)
movl %edx, %eax
shrl $0xe, %eax
orb $-0x80, %al
movb %al, 0x2(%rdi)
movl %edx, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x3(%rdi)
movl %edx, %eax
andb $0x7f, %al
movb %al, 0x4(%rdi)
movl $0x5, %eax
addq %rax, %rdi
movq %rcx, 0x80(%rsp)
movq 0x80(%rsp), %rsi
movq %rdx, 0x60(%rsp)
movq %rdi, %rbx
callq 0x43c0
movq 0x80(%rsp), %rcx
addq 0x60(%rsp), %rbx
movq %rbx, 0x8(%rsp)
movq %rcx, %rdi
callq 0x45c0
movq %r15, %rdi
callq 0x80732
movl 0xe0(%rsp), %eax
shrl $0x1f, %eax
movq 0x40(%rsp), %r11
testb %al, %al
je 0x6c3b9
movq %r12, %rdi
callq 0x80732
xorl %r14d, %r14d
movq %r14, %rax
leaq -0x28(%rbp), %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x50(%rsp), %rax
addq %r14, %rax
xorl %ecx, %ecx
movl $0x8000, 0x320(%rsp,%rcx,4) # imm = 0x8000
incq %rcx
cmpq $0x20, %rcx
jne 0x6c3c3
movl %r11d, %ecx
shrl $0x5, %ecx
leal -0x2(%rcx), %edx
xorl %esi, %esi
movl %edx, 0x740(%rsp,%rsi,4)
incq %rsi
addl %ecx, %edx
cmpq $0x20, %rsi
jne 0x6c3e2
xorl %ecx, %ecx
movslq 0x740(%rsp,%rcx,4), %rdx
movb 0x1(%r13,%rdx), %dl
movb %dl, 0x10(%rsp,%rcx)
incq %rcx
cmpq $0x20, %rcx
jne 0x6c3f6
leal -0x1(%r11), %ecx
movb (%r13,%rcx), %cl
movb %cl, 0x2f(%rsp)
leal -0x2(%r11), %ecx
andl $-0x20, %r11d
addl $-0x2, %r11d
movl %ecx, 0x7bc(%rsp)
cmpl %r11d, %ecx
jle 0x6c4a7
movl %ecx, %ecx
movzbl (%r13,%rcx), %edx
movzbl 0x2f(%rsp), %esi
movl %edx, %edi
shll $0xc, %edi
addq %r12, %rdi
shll $0x4, %esi
movl 0x39c(%rsp), %r8d
xorl %ecx, %ecx
cmpl (%rsi,%rdi), %r8d
seta %cl
leal (%rcx,%rcx), %r9d
movw %r8w, -0x2(%rax)
shll $0x4, %ecx
shrl %cl, %r8d
movl 0x4(%rsi,%rdi), %r10d
imulq %r8, %r10
movb 0xe(%rsi,%rdi), %cl
shrq %cl, %r10
subq %r9, %rax
addl 0x8(%rsi,%rdi), %r8d
movzwl 0xc(%rsi,%rdi), %ecx
imull %r10d, %ecx
addl %r8d, %ecx
movl %ecx, 0x39c(%rsp)
movb %dl, 0x2f(%rsp)
movl 0x7bc(%rsp), %ecx
decl %ecx
jmp 0x6c429
vmovdqa 0x320(%rsp), %ymm2
vmovdqa 0x340(%rsp), %ymm3
vmovdqa 0x360(%rsp), %ymm4
vmovdqa 0x380(%rsp), %ymm5
cmpl $0x0, 0x740(%rsp)
js 0x6ca60
vpxor %xmm0, %xmm0, %xmm0
leaq 0x327dc(%rip), %rcx     # 0x9ecc0
vbroadcastss 0x327b3(%rip), %ymm1 # 0x9eca0
vmovaps %ymm1, 0x80(%rsp)
movq $-0x8, %rdx
movslq 0x760(%rsp,%rdx,4), %rsi
movzbl (%r13,%rsi), %esi
movzbl 0x18(%rsp,%rdx), %r10d
movl %esi, %r11d
shll $0xc, %r11d
addq %r12, %r11
shll $0x4, %r10d
movslq 0x770(%rsp,%rdx,4), %rdi
movzbl (%r13,%rdi), %edi
movzbl 0x1c(%rsp,%rdx), %r9d
movslq 0x764(%rsp,%rdx,4), %r8
movzbl (%r13,%r8), %r8d
vmovdqu (%r10,%r11), %xmm1
movzbl 0x19(%rsp,%rdx), %r10d
movl %r8d, %r11d
shll $0xc, %r11d
addq %r12, %r11
shll $0x4, %r10d
vmovdqu (%r10,%r11), %xmm7
movl %edi, %r10d
shll $0xc, %r10d
addq %r12, %r10
shll $0x4, %r9d
movslq 0x774(%rsp,%rdx,4), %r11
movzbl (%r13,%r11), %r11d
vinserti128 $0x1, (%r9,%r10), %ymm1, %ymm6
movzbl 0x1d(%rsp,%rdx), %r9d
movl %r11d, %r10d
shll $0xc, %r10d
addq %r12, %r10
shll $0x4, %r9d
vinserti128 $0x1, (%r9,%r10), %ymm7, %ymm7
movb %sil, 0x18(%rsp,%rdx)
movb %dil, 0x1c(%rsp,%rdx)
movb %r8b, 0x19(%rsp,%rdx)
movb %r11b, 0x1d(%rsp,%rdx)
movslq 0x768(%rsp,%rdx,4), %rsi
movzbl (%r13,%rsi), %esi
movzbl 0x1a(%rsp,%rdx), %r8d
movl %esi, %r9d
shll $0xc, %r9d
addq %r12, %r9
shll $0x4, %r8d
movslq 0x778(%rsp,%rdx,4), %rdi
movzbl (%r13,%rdi), %edi
movzbl 0x1e(%rsp,%rdx), %r10d
movl %edi, %r11d
shll $0xc, %r11d
addq %r12, %r11
shll $0x4, %r10d
vmovdqu (%r8,%r9), %xmm1
movslq 0x76c(%rsp,%rdx,4), %r8
movzbl (%r13,%r8), %r8d
movzbl 0x1b(%rsp,%rdx), %r9d
vinserti128 $0x1, (%r10,%r11), %ymm1, %ymm8
movl %r8d, %r10d
shll $0xc, %r10d
addq %r12, %r10
shll $0x4, %r9d
movslq 0x77c(%rsp,%rdx,4), %r11
movzbl (%r13,%r11), %r11d
vmovdqu (%r9,%r10), %xmm1
movzbl 0x1f(%rsp,%rdx), %r9d
movl %r11d, %r10d
shll $0xc, %r10d
addq %r12, %r10
shll $0x4, %r9d
vinserti128 $0x1, (%r9,%r10), %ymm1, %ymm9
movb %sil, 0x1a(%rsp,%rdx)
movb %dil, 0x1e(%rsp,%rdx)
movb %r8b, 0x1b(%rsp,%rdx)
movb %r11b, 0x1f(%rsp,%rdx)
vpshufd $0x93, %ymm7, %ymm1     # ymm1 = ymm7[3,0,1,2,7,4,5,6]
vpshufd $0x4e, %ymm8, %ymm10    # ymm10 = ymm8[2,3,0,1,6,7,4,5]
vpshufd $0x39, %ymm9, %ymm11    # ymm11 = ymm9[1,2,3,0,5,6,7,4]
vpblendd $0x11, %ymm6, %ymm0, %ymm12 # ymm12 = ymm6[0],ymm0[1,2,3],ymm6[4],ymm0[5,6,7]
vpblendd $0x22, %ymm1, %ymm0, %ymm13 # ymm13 = ymm0[0],ymm1[1],ymm0[2,3,4],ymm1[5],ymm0[6,7]
vpor %ymm12, %ymm13, %ymm12
vpblendd $0x44, %ymm10, %ymm0, %ymm13 # ymm13 = ymm0[0,1],ymm10[2],ymm0[3,4,5],ymm10[6],ymm0[7]
vpslldq $0xc, %ymm9, %ymm14     # ymm14 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm9[0,1,2,3],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm9[16,17,18,19]
vpor %ymm14, %ymm13, %ymm13
vpor %ymm13, %ymm12, %ymm12
vmovdqa %ymm12, 0x1c0(%rsp,%rdx,4)
vpblendd $0x22, %ymm6, %ymm0, %ymm12 # ymm12 = ymm0[0],ymm6[1],ymm0[2,3,4],ymm6[5],ymm0[6,7]
vpblendd $0x44, %ymm1, %ymm0, %ymm1 # ymm1 = ymm0[0,1],ymm1[2],ymm0[3,4,5],ymm1[6],ymm0[7]
vpor %ymm1, %ymm12, %ymm1
vpblendd $0x88, %ymm10, %ymm0, %ymm12 # ymm12 = ymm0[0,1,2],ymm10[3],ymm0[4,5,6],ymm10[7]
vpor %ymm1, %ymm12, %ymm1
vpblendd $0x11, %ymm11, %ymm1, %ymm12 # ymm12 = ymm11[0],ymm1[1,2,3],ymm11[4],ymm1[5,6,7]
vmovdqa %ymm12, 0x140(%rsp,%rdx,4)
vpblendd $0x88, %ymm6, %ymm0, %ymm12 # ymm12 = ymm0[0,1,2],ymm6[3],ymm0[4,5,6],ymm6[7]
vpsrldq $0xc, %ymm7, %ymm13     # ymm13 = ymm7[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm7[28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
vpor %ymm12, %ymm13, %ymm12
vpblendd $0x22, %ymm10, %ymm0, %ymm10 # ymm10 = ymm0[0],ymm10[1],ymm0[2,3,4],ymm10[5],ymm0[6,7]
vpor %ymm10, %ymm12, %ymm10
vpblendd $0x44, %ymm11, %ymm10, %ymm10 # ymm10 = ymm10[0,1],ymm11[2],ymm10[3,4,5],ymm11[6],ymm10[7]
vmovdqa %ymm10, 0x240(%rsp,%rdx,4)
vpalignr $0x4, %ymm1, %ymm11, %ymm1 # ymm1 = ymm1[4,5,6,7,8,9,10,11,12,13,14,15],ymm11[0,1,2,3],ymm1[20,21,22,23,24,25,26,27,28,29,30,31],ymm11[16,17,18,19]
vmovdqa %ymm1, 0x140(%rsp,%rdx,4)
vpshufd $0x93, %ymm10, %ymm1    # ymm1 = ymm10[3,0,1,2,7,4,5,6]
vmovdqa %ymm1, 0x240(%rsp,%rdx,4)
vpunpckhdq %ymm7, %ymm6, %ymm1 # ymm1 = ymm6[2],ymm7[2],ymm6[3],ymm7[3],ymm6[6],ymm7[6],ymm6[7],ymm7[7]
vpblendd $0x44, %ymm8, %ymm1, %ymm1 # ymm1 = ymm1[0,1],ymm8[2],ymm1[3,4,5],ymm8[6],ymm1[7]
vpshufd $0x99, %ymm9, %ymm6     # ymm6 = ymm9[1,2,1,2,5,6,5,6]
vpblendd $0x88, %ymm6, %ymm1, %ymm1 # ymm1 = ymm1[0,1,2],ymm6[3],ymm1[4,5,6],ymm6[7]
vmovdqa %ymm1, 0x2c0(%rsp,%rdx,4)
addq $0x8, %rdx
cmpq $0x18, %rdx
jb 0x6c4fd
vpcmpgtd 0x1a0(%rsp), %ymm2, %ymm6
vmovmskps %ymm6, %r9d
vpcmpgtd 0x1c0(%rsp), %ymm3, %ymm7
vmovmskps %ymm7, %edi
vpcmpgtd 0x1e0(%rsp), %ymm4, %ymm8
vpcmpgtd 0x200(%rsp), %ymm5, %ymm9
vmovmskps %ymm8, %r8d
vmovmskps %ymm9, %esi
popcntl %r9d, %edx
shll $0x5, %r9d
vmovdqa (%r9,%rcx), %ymm1
popcntl %edi, %r9d
shll $0x5, %edi
vmovdqa (%rdi,%rcx), %ymm10
popcntl %r8d, %edi
shll $0x5, %r8d
vmovdqa (%r8,%rcx), %ymm11
popcntl %esi, %r8d
shll $0x5, %esi
vmovdqa (%rsi,%rcx), %ymm12
vpand %ymm2, %ymm6, %ymm13
vpermd %ymm13, %ymm1, %ymm1
vpand %ymm3, %ymm7, %ymm13
vpermd %ymm13, %ymm10, %ymm10
vpand %ymm4, %ymm8, %ymm13
vpermd %ymm13, %ymm11, %ymm11
vpand %ymm5, %ymm9, %ymm13
vpermd %ymm13, %ymm12, %ymm12
vpblendw $0xaa, %ymm0, %ymm1, %ymm1 # ymm1 = ymm1[0],ymm0[1],ymm1[2],ymm0[3],ymm1[4],ymm0[5],ymm1[6],ymm0[7],ymm1[8],ymm0[9],ymm1[10],ymm0[11],ymm1[12],ymm0[13],ymm1[14],ymm0[15]
vpblendw $0xaa, %ymm0, %ymm10, %ymm10 # ymm10 = ymm10[0],ymm0[1],ymm10[2],ymm0[3],ymm10[4],ymm0[5],ymm10[6],ymm0[7],ymm10[8],ymm0[9],ymm10[10],ymm0[11],ymm10[12],ymm0[13],ymm10[14],ymm0[15]
vpackusdw %ymm10, %ymm1, %ymm1
vpblendw $0xaa, %ymm0, %ymm11, %ymm10 # ymm10 = ymm11[0],ymm0[1],ymm11[2],ymm0[3],ymm11[4],ymm0[5],ymm11[6],ymm0[7],ymm11[8],ymm0[9],ymm11[10],ymm0[11],ymm11[12],ymm0[13],ymm11[14],ymm0[15]
vpblendw $0xaa, %ymm0, %ymm12, %ymm11 # ymm11 = ymm12[0],ymm0[1],ymm12[2],ymm0[3],ymm12[4],ymm0[5],ymm12[6],ymm0[7],ymm12[8],ymm0[9],ymm12[10],ymm0[11],ymm12[12],ymm0[13],ymm12[14],ymm0[15]
vpackusdw %ymm11, %ymm10, %ymm10
vpermq $0xd8, %ymm10, %ymm10   # ymm10 = ymm10[0,2,1,3]
vextracti128 $0x1, %ymm10, -0x10(%rax)
addl %r8d, %r8d
subq %r8, %rax
vmovdqu %xmm10, -0x10(%rax)
addl %edi, %edi
subq %rdi, %rax
vpermq $0xd8, %ymm1, %ymm1     # ymm1 = ymm1[0,2,1,3]
vextracti128 $0x1, %ymm1, -0x10(%rax)
addl %r9d, %r9d
subq %r9, %rax
vmovdqu %xmm1, -0x10(%rax)
vpsrld $0x10, %ymm2, %ymm1
vpsrld $0x10, %ymm3, %ymm10
vpsrld $0x10, %ymm4, %ymm11
vpsrld $0x10, %ymm5, %ymm12
vblendvps %ymm6, %ymm1, %ymm2, %ymm2
vblendvps %ymm7, %ymm10, %ymm3, %ymm3
vblendvps %ymm8, %ymm11, %ymm4, %ymm4
vblendvps %ymm9, %ymm12, %ymm5, %ymm5
negq %rdx
vpsrlq $0x20, %ymm2, %ymm1
vmovdqa 0x120(%rsp), %ymm6
vmovdqa 0x140(%rsp), %ymm7
vmovdqa 0x160(%rsp), %ymm8
vmovdqa 0x180(%rsp), %ymm9
vpsrlq $0x20, %ymm6, %ymm10
vpmuludq %ymm1, %ymm10, %ymm1
vpmuludq %ymm2, %ymm6, %ymm6
vpsrlq $0x20, %ymm6, %ymm6
vpblendd $0xaa, %ymm1, %ymm6, %ymm1 # ymm1 = ymm6[0],ymm1[1],ymm6[2],ymm1[3],ymm6[4],ymm1[5],ymm6[6],ymm1[7]
vmovdqa %ymm1, 0x120(%rsp)
vpsrlq $0x20, %ymm3, %ymm6
vpsrlq $0x20, %ymm7, %ymm10
vpmuludq %ymm6, %ymm10, %ymm6
vpmuludq %ymm3, %ymm7, %ymm7
vpsrlq $0x20, %ymm7, %ymm7
vpblendd $0xaa, %ymm6, %ymm7, %ymm6 # ymm6 = ymm7[0],ymm6[1],ymm7[2],ymm6[3],ymm7[4],ymm6[5],ymm7[6],ymm6[7]
vmovdqa %ymm6, 0x140(%rsp)
vpsrlq $0x20, %ymm4, %ymm7
vpsrlq $0x20, %ymm8, %ymm10
vpmuludq %ymm7, %ymm10, %ymm7
vpmuludq %ymm4, %ymm8, %ymm8
vpsrlq $0x20, %ymm8, %ymm8
vpblendd $0xaa, %ymm7, %ymm8, %ymm11 # ymm11 = ymm8[0],ymm7[1],ymm8[2],ymm7[3],ymm8[4],ymm7[5],ymm8[6],ymm7[7]
vmovdqa %ymm11, 0x160(%rsp)
vpsrlq $0x20, %ymm5, %ymm7
vpsrlq $0x20, %ymm9, %ymm8
vpmuludq %ymm7, %ymm8, %ymm7
vpmuludq %ymm5, %ymm9, %ymm8
vpsrlq $0x20, %ymm8, %ymm8
vpblendd $0xaa, %ymm7, %ymm8, %ymm7 # ymm7 = ymm8[0],ymm7[1],ymm8[2],ymm7[3],ymm8[4],ymm7[5],ymm8[6],ymm7[7]
vmovdqa %ymm7, 0x180(%rsp)
vmovdqa 0x220(%rsp), %ymm9
vmovdqa 0x240(%rsp), %ymm10
vmovdqa 0x260(%rsp), %ymm13
vmovdqa 0x280(%rsp), %ymm8
vpsrld $0x10, %ymm9, %ymm12
vpsrld $0x10, %ymm13, %ymm14
vmovdqa 0x80(%rsp), %ymm15
vpaddd %ymm15, %ymm12, %ymm12
vpaddd %ymm15, %ymm14, %ymm14
vpsrlvd %ymm12, %ymm1, %ymm1
vmovdqa %ymm1, 0xe0(%rsp)
vpblendw $0xaa, %ymm0, %ymm9, %ymm15 # ymm15 = ymm9[0],ymm0[1],ymm9[2],ymm0[3],ymm9[4],ymm0[5],ymm9[6],ymm0[7],ymm9[8],ymm0[9],ymm9[10],ymm0[11],ymm9[12],ymm0[13],ymm9[14],ymm0[15]
vpblendw $0xaa, %ymm0, %ymm10, %ymm12 # ymm12 = ymm10[0],ymm0[1],ymm10[2],ymm0[3],ymm10[4],ymm0[5],ymm10[6],ymm0[7],ymm10[8],ymm0[9],ymm10[10],ymm0[11],ymm10[12],ymm0[13],ymm10[14],ymm0[15]
vpsrlvd %ymm14, %ymm11, %ymm1
vmovdqa %ymm1, 0x60(%rsp)
vpblendw $0xaa, %ymm0, %ymm13, %ymm1 # ymm1 = ymm13[0],ymm0[1],ymm13[2],ymm0[3],ymm13[4],ymm0[5],ymm13[6],ymm0[7],ymm13[8],ymm0[9],ymm13[10],ymm0[11],ymm13[12],ymm0[13],ymm13[14],ymm0[15]
vmovdqa %ymm1, 0xa0(%rsp)
vpblendw $0xaa, %ymm0, %ymm8, %ymm1 # ymm1 = ymm8[0],ymm0[1],ymm8[2],ymm0[3],ymm8[4],ymm0[5],ymm8[6],ymm0[7],ymm8[8],ymm0[9],ymm8[10],ymm0[11],ymm8[12],ymm0[13],ymm8[14],ymm0[15]
vmovaps 0x2a0(%rsp), %ymm9
vmovaps %ymm9, 0x100(%rsp)
vmovdqa 0x2c0(%rsp), %ymm13
xorl %esi, %esi
vmovdqa 0x2e0(%rsp), %ymm9
vmovdqa 0x300(%rsp), %ymm11
decl 0x740(%rsp,%rsi,4)
incq %rsi
cmpq $0x20, %rsi
jne 0x6c9cc
vpsrld $0x10, %ymm10, %ymm10
vmovdqa 0x80(%rsp), %ymm14
vpaddd %ymm14, %ymm10, %ymm10
vpsrlvd %ymm10, %ymm6, %ymm6
vpmulld %ymm12, %ymm6, %ymm6
vpmulld 0xe0(%rsp), %ymm15, %ymm10
vpsrld $0x10, %ymm8, %ymm8
vpaddd %ymm14, %ymm8, %ymm8
vpsrlvd %ymm8, %ymm7, %ymm7
vpmulld %ymm1, %ymm7, %ymm1
vmovdqa 0xa0(%rsp), %ymm7
vpmulld 0x60(%rsp), %ymm7, %ymm7
vpaddd %ymm2, %ymm10, %ymm2
vpaddd 0x100(%rsp), %ymm2, %ymm2
vpaddd %ymm3, %ymm13, %ymm3
vpaddd %ymm3, %ymm6, %ymm3
vpaddd %ymm4, %ymm7, %ymm4
vpaddd %ymm4, %ymm9, %ymm4
vpaddd %ymm5, %ymm11, %ymm5
vpaddd %ymm5, %ymm1, %ymm5
leaq (%rax,%rdx,2), %rax
cmpl $0x0, 0x740(%rsp)
jns 0x6c4f6
movq 0x8(%rsp), %rbx
subq %r14, %rbx
vmovdqa %ymm2, 0x320(%rsp)
vmovdqa %ymm3, 0x340(%rsp)
vmovdqa %ymm4, 0x360(%rsp)
vmovdqa %ymm5, 0x380(%rsp)
movl $0x1f, %edi
movzbl 0x10(%rsp,%rdi), %r9d
shll $0x4, %r9d
movl 0x320(%rsp,%rdi,4), %r10d
xorl %ecx, %ecx
cmpl (%r12,%r9), %r10d
seta %cl
movq %rax, %rsi
leal (%rcx,%rcx), %r8d
movw %r10w, -0x2(%rax)
shll $0x4, %ecx
shrl %cl, %r10d
movl 0x4(%r12,%r9), %r11d
imulq %r10, %r11
movb 0xe(%r12,%r9), %cl
shrq %cl, %r11
subq %r8, %rax
addl 0x8(%r12,%r9), %r10d
movzwl 0xc(%r12,%r9), %ecx
imull %r11d, %ecx
addl %r10d, %ecx
movl %ecx, 0x320(%rsp,%rdi,4)
addq $-0x1, %rdi
jb 0x6ca91
movl %r8d, %eax
movq %rsi, %rdi
subq %rax, %rdi
movq 0x8(%rsp), %r9
addl 0x50(%rsp), %r9d
addl %r8d, %r9d
subl %esi, %r9d
xorl %ecx, %ecx
movl 0x39c(%rsp,%rcx), %r8d
movl %r8d, -0x4(%rdi,%rcx)
addq $-0x4, %rcx
addl $0x4, %r9d
cmpq $-0x80, %rcx
jne 0x6cb0c
movq 0x50(%rsp), %rdx
addq %r14, %rdx
addq %rax, %rdx
subq %rsi, %rdx
subq %rcx, %rdx
movl %ebx, %edi
movq 0xd8(%rsp), %r8
movl %r9d, (%r8)
addq %r14, %rdi
subq %rax, %rsi
addq %rcx, %rsi
vzeroupper
callq 0x4830
movq %r12, %rdi
callq 0x80732
jmp 0x6c3a7
leaq 0x320ac(%rip), %rdi     # 0x9ec16
leaq 0x3203f(%rip), %rsi     # 0x9ebb0
leaq 0x32058(%rip), %rcx     # 0x9ebd0
movl $0xcc, %edx
callq 0x42f0
leaq 0x320a9(%rip), %rdi     # 0x9ec32
leaq 0x32020(%rip), %rsi     # 0x9ebb0
leaq 0x32039(%rip), %rcx     # 0x9ebd0
movl $0xcd, %edx
callq 0x42f0
leaq 0x36118(%rip), %rdi     # 0xa2cc0
leaq 0x32001(%rip), %rsi     # 0x9ebb0
leaq 0x3201a(%rip), %rcx     # 0x9ebd0
movl $0xcb, %edx
callq 0x42f0