// File: /workspace/github_cpp_makefile_star2_O2/rpavlik[P]edid-decode/parse-base-block.cpp
// Function: edid_state::check_base_block()
void edid_state::check_base_block()
{
	data_block = "Base EDID";

	/*
	 * Allow for regular rounding of vertical and horizontal frequencies.
	 * The spec says that the pixelclock shall be rounded up, so there is
	 * no need to take rounding into account.
	 */
	if (base.has_display_range_descriptor &&
	    (min_vert_freq_hz + 0.5 < base.min_display_vert_freq_hz ||
	     (max_vert_freq_hz >= base.max_display_vert_freq_hz + 0.5 && base.max_display_vert_freq_hz) ||
	     min_hor_freq_hz + 500 < base.min_display_hor_freq_hz ||
	     (max_hor_freq_hz >= base.max_display_hor_freq_hz + 500 && base.max_display_hor_freq_hz) ||
	     (max_pixclk_khz > base.max_display_pixclk_khz && base.max_display_pixclk_khz))) {
		/*
		 * Check if it is really out of range, or if it could be a rounding error.
		 * The EDID spec is not very clear about rounding.
		 */
		bool out_of_range =
			min_vert_freq_hz + 1.0 <= base.min_display_vert_freq_hz ||
			(max_vert_freq_hz >= base.max_display_vert_freq_hz + 1.0 && base.max_display_vert_freq_hz) ||
			min_hor_freq_hz + 1000 <= base.min_display_hor_freq_hz ||
			(max_hor_freq_hz >= base.max_display_hor_freq_hz + 1000 && base.max_display_hor_freq_hz) ||
			(max_pixclk_khz >= base.max_display_pixclk_khz + 10000 && base.max_display_pixclk_khz);

		std::string err("Some timings are out of range of the Monitor Ranges:\n");
		char buf[512];

		if (min_vert_freq_hz + 0.5 < base.min_display_vert_freq_hz ||
		    (max_vert_freq_hz >= base.max_display_vert_freq_hz + 0.5 && base.max_display_vert_freq_hz)) {
			sprintf(buf, "    Vertical Freq: %.3f - %.3f Hz (Monitor: %u.000 - %u.000 Hz)\n",
				min_vert_freq_hz, max_vert_freq_hz,
				base.min_display_vert_freq_hz, base.max_display_vert_freq_hz);
			err += buf;
		}

		if (min_hor_freq_hz + 500 < base.min_display_hor_freq_hz ||
		    (max_hor_freq_hz >= base.max_display_hor_freq_hz + 500 && base.max_display_hor_freq_hz)) {
			sprintf(buf, "    Horizontal Freq: %.3f - %.3f kHz (Monitor: %.3f - %.3f kHz)\n",
				min_hor_freq_hz / 1000.0, max_hor_freq_hz / 1000.0,
				base.min_display_hor_freq_hz / 1000.0, base.max_display_hor_freq_hz / 1000.0);
			err += buf;
		}

		if (max_pixclk_khz >= base.max_display_pixclk_khz && base.max_display_pixclk_khz) {
			sprintf(buf, "    Maximum Clock: %.3f MHz (Monitor: %.3f MHz)\n",
				max_pixclk_khz / 1000.0, base.max_display_pixclk_khz / 1000.0);
			err += buf;
		}

		if (!out_of_range)
			err += "    Could be due to a Monitor Range off-by-one rounding issue\n";

		/*
		 * EDID 1.4 states (in an Errata) that explicitly defined
		 * timings supersede the monitor range definition.
		 */
		msg(!out_of_range || base.edid_minor >= 4, "%s", err.c_str());
	}
	// The base block will only go up to 255x255 cm for the display size,
	// so don't fail if one or more image sizes exceeds that.
	if (!base.max_display_width_mm && !base.max_display_height_mm &&
	    dtd_max_hsize_mm && dtd_max_vsize_mm &&
	    dtd_max_hsize_mm <= 2559 && dtd_max_vsize_mm <= 2559) {
		fail("The DTD image sizes all fit inside 255x255cm, but no display size was set.\n");
	}
	// Secondary GTF curves start at a specific frequency. Any legacy timings
	// that have a positive hsync and negative vsync must be less than that
	// frequency to avoid confusion.
	if (base.supports_sec_gtf && base.max_pos_neg_hor_freq_khz >= base.sec_gtf_start_freq)
		fail("Second GTF start frequency %u is less than the highest P/N frequency %u.\n",
		     base.sec_gtf_start_freq, base.max_pos_neg_hor_freq_khz);
	if (base.edid_minor == 3 && num_blocks > 2 && !block_map.saw_block_1)
		fail("EDID 1.3 requires a Block Map Extension in Block 1 if there are more than 2 blocks in the EDID.\n");
	if (base.edid_minor == 3 && num_blocks > 128 && !block_map.saw_block_128)
		fail("EDID 1.3 requires a Block Map Extension in Block 128 if there are more than 128 blocks in the EDID.\n");
	if (block_map.saw_block_128 && num_blocks > 255)
		fail("If there is a Block Map Extension in Block 128 then the maximum number of blocks is 255.\n");
}

// Assembly:
pushq %rbp
pushq %r14
pushq %rbx
subq $0x220, %rsp            # imm = 0x220
movq %rdi, %rbx
addq $0x30, %rdi
leaq 0xed8f(%rip), %rsi      # 0x1a4da
callq 0x3460
cmpb $0x1, 0x8d(%rbx)
jne 0xb9e4
movsd 0x60(%rbx), %xmm0
movsd 0xe8a6(%rip), %xmm2     # 0x1a010
addsd %xmm0, %xmm2
movl 0x168(%rbx), %eax
cvtsi2sd %rax, %xmm1
ucomisd %xmm2, %xmm1
ja 0xb7de
movl 0x16c(%rbx), %eax
testl %eax, %eax
je 0xb7a1
movsd 0x68(%rbx), %xmm2
cvtsi2sd %rax, %xmm3
addsd 0xe875(%rip), %xmm3     # 0x1a010
ucomisd %xmm3, %xmm2
jae 0xb7de
movl $0x1f4, %eax            # imm = 0x1F4
addl 0x54(%rbx), %eax
cmpl 0x160(%rbx), %eax
jb 0xb7de
movl 0x164(%rbx), %eax
testl %eax, %eax
je 0xb7c5
addl $0x1f4, %eax            # imm = 0x1F4
cmpl %eax, 0x58(%rbx)
jae 0xb7de
movl 0x170(%rbx), %eax
cmpl %eax, 0x70(%rbx)
setbe %cl
testl %eax, %eax
sete %al
orb %cl, %al
jne 0xb9e4
addsd 0x12ef2(%rip), %xmm0    # 0x1e6d8
movb $0x1, %bpl
ucomisd %xmm0, %xmm1
jae 0xb850
movl 0x16c(%rbx), %eax
testl %eax, %eax
je 0xb811
movsd 0x68(%rbx), %xmm0
cvtsi2sd %rax, %xmm1
addsd 0x12ecd(%rip), %xmm1    # 0x1e6d8
ucomisd %xmm1, %xmm0
jae 0xb850
movl $0x3e8, %eax            # imm = 0x3E8
addl 0x54(%rbx), %eax
cmpl 0x160(%rbx), %eax
jbe 0xb850
movl 0x164(%rbx), %eax
testl %eax, %eax
je 0xb835
addl $0x3e8, %eax            # imm = 0x3E8
cmpl %eax, 0x58(%rbx)
jae 0xb850
movl 0x170(%rbx), %eax
leal 0x2710(%rax), %ecx
cmpl %ecx, 0x70(%rbx)
setae %cl
testl %eax, %eax
setne %bpl
andb %cl, %bpl
leaq 0x1485a(%rip), %rsi     # 0x200b1
movq %rsp, %rdi
leaq 0x20(%rsp), %rdx
callq 0x75c4
movsd 0x60(%rbx), %xmm0
movsd 0x68(%rbx), %xmm1
movsd 0xe79a(%rip), %xmm2     # 0x1a010
movl 0x168(%rbx), %edx
cvtsi2sd %rdx, %xmm3
addsd %xmm0, %xmm2
ucomisd %xmm2, %xmm3
movl 0x16c(%rbx), %ecx
ja 0xb8aa
testl %ecx, %ecx
je 0xb8cb
movl %ecx, %eax
cvtsi2sd %rax, %xmm2
addsd 0xe76c(%rip), %xmm2     # 0x1a010
ucomisd %xmm2, %xmm1
jb 0xb8cb
leaq 0x14836(%rip), %rsi     # 0x200e7
leaq 0x20(%rsp), %r14
movq %r14, %rdi
movb $0x2, %al
callq 0x3070
movq %rsp, %rdi
movq %r14, %rsi
callq 0x3450
movl 0x54(%rbx), %esi
movl 0x58(%rbx), %edx
leal 0x1f4(%rsi), %edi
movl 0x160(%rbx), %ecx
movl 0x164(%rbx), %eax
cmpl %ecx, %edi
jb 0xb8fe
leal 0x1f4(%rax), %edi
cmpl %edi, %edx
setb %dil
testl %eax, %eax
sete %r8b
orb %dil, %r8b
jne 0xb953
movl %esi, %esi
cvtsi2sd %rsi, %xmm0
movsd 0xe70b(%rip), %xmm4     # 0x1a018
divsd %xmm4, %xmm0
movl %edx, %edx
cvtsi2sd %rdx, %xmm1
divsd %xmm4, %xmm1
movl %ecx, %ecx
cvtsi2sd %rcx, %xmm2
divsd %xmm4, %xmm2
movl %eax, %eax
cvtsi2sd %rax, %xmm3
divsd %xmm4, %xmm3
leaq 0x147ef(%rip), %rsi     # 0x20128
leaq 0x20(%rsp), %r14
movq %r14, %rdi
movb $0x4, %al
callq 0x3070
movq %rsp, %rdi
movq %r14, %rsi
callq 0x3450
movl 0x70(%rbx), %ecx
movl 0x170(%rbx), %eax
leal -0x1(%rax), %edx
cmpl %ecx, %edx
jae 0xb9a2
movl %ecx, %ecx
cvtsi2sd %rcx, %xmm0
movsd 0xe6a6(%rip), %xmm2     # 0x1a018
divsd %xmm2, %xmm0
movl %eax, %eax
cvtsi2sd %rax, %xmm1
divsd %xmm2, %xmm1
leaq 0x147e1(%rip), %rsi     # 0x20169
leaq 0x20(%rsp), %r14
movq %r14, %rdi
movb $0x2, %al
callq 0x3070
movq %rsp, %rdi
movq %r14, %rsi
callq 0x3450
testb %bpl, %bpl
je 0xb9b4
cmpl $0x4, 0x88(%rbx)
setae %bpl
jmp 0xb9c6
movb $0x1, %bpl
leaq 0x147dc(%rip), %rsi     # 0x2019a
movq %rsp, %rdi
callq 0x3450
movq (%rsp), %rdx
movzbl %bpl, %edi
leaq 0xf39d(%rip), %rsi      # 0x1ad72
xorl %eax, %eax
callq 0x362c
movq %rsp, %rdi
callq 0x3130
movl 0x178(%rbx), %eax
orl 0x174(%rbx), %eax
jne 0xba1c
movl 0x74(%rbx), %eax
testl %eax, %eax
je 0xba1c
cmpl $0x9ff, %eax            # imm = 0x9FF
ja 0xba1c
movl 0x78(%rbx), %eax
decl %eax
cmpl $0x9fe, %eax            # imm = 0x9FE
ja 0xba1c
leaq 0x147c6(%rip), %rsi     # 0x201d9
xorl %edi, %edi
xorl %eax, %eax
callq 0x362c
cmpb $0x1, 0x92(%rbx)
jne 0xba45
movl 0x94(%rbx), %edx
movl 0x17c(%rbx), %ecx
cmpl %edx, %ecx
jb 0xba45
leaq 0x147e9(%rip), %rsi     # 0x20225
xorl %edi, %edi
xorl %eax, %eax
callq 0x362c
movl 0x4(%rbx), %eax
movl 0x88(%rbx), %ecx
cmpl $0x3, %ecx
sete %dl
cmpl $0x3, %eax
setae %sil
andb %dl, %sil
cmpb $0x1, %sil
jne 0xba8b
cmpb $0x0, 0x978(%rbx)
je 0xba72
pushq $0x3
popq %rcx
jmp 0xba8b
leaq 0x147f6(%rip), %rsi     # 0x2026f
xorl %edi, %edi
xorl %eax, %eax
callq 0x362c
movl 0x4(%rbx), %eax
movl 0x88(%rbx), %ecx
cmpl $0x3, %ecx
sete %cl
cmpl $0x81, %eax
setae %dl
andb %cl, %dl
cmpb $0x1, %dl
jne 0xbabc
cmpb $0x0, 0x979(%rbx)
jne 0xbabc
leaq 0x14820(%rip), %rsi     # 0x202d0
xorl %edi, %edi
xorl %eax, %eax
callq 0x362c
movl 0x4(%rbx), %eax
cmpb $0x1, 0x979(%rbx)
jne 0xbadc
cmpl $0x100, %eax            # imm = 0x100
jb 0xbadc
leaq 0x14862(%rip), %rsi     # 0x20335
xorl %edi, %edi
xorl %eax, %eax
callq 0x362c
addq $0x220, %rsp            # imm = 0x220
popq %rbx
popq %r14
popq %rbp
retq
movq %rax, %rbx
movq %rsp, %rdi
callq 0x3130
movq %rbx, %rdi
callq 0x3430