// File: /workspace/github_c_makefile_star2_O2/dwelch67[P]lc3/vsim.c
// Function: sim
int sim ( void )
{
    unsigned short inst;
    unsigned short test;
    unsigned short simm;
    unsigned short dest;
    unsigned short rd,rd_data;
    unsigned short sr1,sr1_data;
    unsigned short sr2,sr2_data;
    while(1)
    {
        printf("\n");
        inst=fetch_mem(pc);
        printf("---- 0x%04X: 0x%04X ",pc,inst);
        pc=(pc+1)&MEMMASK;
        switch((inst>>12)&0xF)
        {
            case 0x0: //br
            {
                printf("br");
                if(inst&0x0800) printf("n");
                if(inst&0x0400) printf("z");
                if(inst&0x0200) printf("p");
                simm=sext9(inst);
                dest=(pc+simm)&0xFFFF;
                printf(" 0x%04X",dest);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                test=(psr&7)&((inst>>9)&7);
                if(test)
                {
                    pc=pc+sext9(inst&0x1FF);
                }
                break;
            }
            case 0x1: //add
            {
                rd=(inst>>9)&7;
                sr1=(inst>>6)&7;
                if(inst&0x20)
                {
                    simm=sext5(inst);
                    printf("add r%u,r%u,#0x%04X\n",rd,sr1,simm);

                    sr1_data=read_reg(sr1);
                    rd_data=sr1_data+simm;
                }
                else
                {
                    sr2=(inst>>0)&7;
                    printf("add r%u,r%u,r%u",rd,sr1,sr2);

                    sr1_data=read_reg(sr1);
                    sr2_data=read_reg(sr2);
                    rd_data=sr1_data+sr2_data;
                }
                write_reg(rd,rd_data);
                docc(rd_data);
                break;
            }
            case 0x2: //ld
            {
                rd=(inst>>9)&7;
                simm=sext9(inst);
                dest=(pc+simm)&0xFFFF;
                printf("ld r%u,0x%04X",rd,dest);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                rd_data=read_mem(dest);
                write_reg(rd,rd_data);
                docc(rd_data);
                break;
            }
            case 0x3: //st
            {
                rd=(inst>>9)&7;
                simm=sext9(inst);
                dest=(pc+simm)&0xFFFF;
                printf("st r%u,0x%04X",rd,dest);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                rd_data=read_reg(rd);
                write_mem(dest,rd_data);
                break;
            }
            case 0x4: //jsr/jsrr
            {
                if(inst&0x0800)
                {
                    simm=sext11(inst);
                    dest=(pc+simm)&0xFFFF;
                    printf("jsr 0x%04X",dest);
                    if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                    else            printf(" ; +%u",simm);
                    printf("\n");

                    write_reg(7,pc);
                    pc=dest;
                }
                else
                {
                    rd=(inst>>6)&7;
                    printf("jsrr r%u\n",rd);

                    write_reg(7,pc);
                    pc=read_reg(rd);
                }
                break;
            }
            case 0x5: //and
            {
                rd=(inst>>9)&7;
                sr1=(inst>>6)&7;
                if(inst&0x20)
                {
                    simm=sext5(inst);
                    printf("and r%u,r%u,#0x%04X\n",rd,sr1,simm);

                    sr1_data=read_reg(sr1);
                    rd_data=sr1_data&simm;
                }
                else
                {
                    sr2=(inst>>0)&7;
                    printf("add r%u,r%u,r%u",rd,sr1,sr2);

                    sr1_data=read_reg(sr1);
                    sr2_data=read_reg(sr2);
                    rd_data=sr1_data&sr2_data;
                }
                write_reg(rd,rd_data);
                docc(rd_data);
                break;
            }
            case 0x6: //ldr
            {
                rd=(inst>>9)&7;
                sr1=(inst>>6)&7;
                simm=sext6(inst);
                printf("ldr r%u,r%u,#0x%04X",rd,sr1,simm);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                sr1_data=read_reg(sr1);
                dest=(sr1_data+simm)&0xFFFF;
                rd_data=read_mem(dest);
                write_reg(rd,rd_data);
                docc(rd_data);
                break;
            }
            case 0x7: //str
            {
                rd=(inst>>9)&7;
                sr1=(inst>>6)&7;
                simm=sext6(inst);
                printf("str r%u,r%u,#0x%04X",rd,sr1,simm);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                sr1_data=read_reg(sr1);
                dest=(sr1_data+simm)&0xFFFF;
                rd_data=read_reg(rd);
                write_mem(dest,rd_data);
                break;
            }
            case 0x8: //rti
            {
                printf("rti\n");
                if(psr&0x8000)
                {
                    printf("exception\n");
                    exit(1);
                }
                else
                {
                    rd_data=read_reg(6);
                    pc=read_mem(rd_data);
                    write_reg(6,(rd_data+1)&0xFFFF);
                    rd_data=read_reg(6);
                    psr=read_mem(rd_data);
                    write_reg(6,(rd_data+1)&0xFFFF);
                }
                break;
            }
            case 0x9: //not
            {
                rd=(inst>>9)&7;
                sr1=(inst>>6)&7;
                printf("not r%u,r%u\n",rd,sr1);

                sr1_data=read_reg(sr1);
                rd_data = ~sr1_data;
                write_reg(rd,rd_data);
                docc(rd_data);
                break;
            }
            case 0xA: //ldi
            {
                rd=(inst>>9)&7;
                simm=sext9(inst);
                dest=(pc+simm)&0xFFFF;
                printf("ldi r%u,0x%04X",rd,dest);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                rd_data=read_mem(read_mem(dest));
                write_reg(rd,rd_data);
                docc(rd_data);
                break;
            }
            case 0xB: //sti
            {
                rd=(inst>>9)&7;
                simm=sext9(inst);
                dest=(pc+simm)&0xFFFF;
                printf("sti r%u,0x%04X",rd,dest);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                rd_data=read_reg(rd);
                write_mem(read_mem(dest),rd_data);
                break;
            }
            case 0xC: //jmp/ret
            {
                sr1=(inst>>6)&7;
                printf("jmp r%u",sr1);
                if(sr1==7) printf(" ; ret");
                printf("\n");

                pc=read_reg(sr1);
                break;
            }
            case 0xD: //undefined
            {
                printf("undefined instruction\n");
                exit(1);
                break;
            }
            case 0xE: //lea
            {
                rd=(inst>>9)&7;
                simm=sext9(inst);
                dest=(pc+simm)&0xFFFF;
                printf("lea r%u,0x%04X",rd,dest);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                write_reg(rd,dest);
                docc(dest);
                break;
            }
            case 0xF: //trap
            {
                printf("trap 0x%02X\n",inst&0xFF);
                if((inst&0xFF)==0x67)
                {
                    printf("show 0x%04X\n",reg[0]);
                }
                else
                if((inst&0xFF)==0x25)
                {
                    printf("halt\n");
                    return(0);
                }
                else
                {
                    reg[7]=pc;
                    pc=mem[inst&0xFF];
                }
                break;
            }
        }
    }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
pushq $0xa
popq %rbx
movl %ebx, %edi
callq 0x1030
movzwl 0x23d32(%rip), %edi     # 0x250c2
callq 0x11dc
movzwl 0x23d26(%rip), %esi     # 0x250c2
movzwl %ax, %r12d
leaq 0x1d26(%rip), %rdi      # 0x30cd
movl %r12d, %edx
xorl %eax, %eax
callq 0x1060
movzwl 0x23d0a(%rip), %eax     # 0x250c2
incl %eax
movw %ax, 0x23d01(%rip)      # 0x250c2
movl %r12d, %ecx
shrl $0xc, %ecx
leaq 0x1c36(%rip), %rdx      # 0x3004
movslq (%rdx,%rcx,4), %rcx
addq %rdx, %rcx
jmpq *%rcx
leaq 0x1d04(%rip), %rdi      # 0x30e2
xorl %eax, %eax
callq 0x1060
btl $0xb, %r12d
jae 0x13f4
pushq $0x6e
popq %rdi
callq 0x1030
btl $0xa, %r12d
jae 0x1403
pushq $0x7a
popq %rdi
callq 0x1030
btl $0x9, %r12d
jae 0x1412
pushq $0x70
popq %rdi
callq 0x1030
movl %r12d, %ebx
andl $0x1ff, %ebx            # imm = 0x1FF
xorl %eax, %eax
cmpw $0x100, %bx             # imm = 0x100
setb %al
shll $0x9, %eax
leal (%rax,%rbx), %r14d
addl $0xfffffe00, %r14d      # imm = 0xFFFFFE00
movzwl 0x23c88(%rip), %eax     # 0x250c2
addw %r14w, %ax
movzwl %ax, %esi
leaq 0x1cef(%rip), %rdi      # 0x3137
xorl %eax, %eax
callq 0x1060
movzwl %r14w, %esi
cmpw $0x100, %bx             # imm = 0x100
jae 0x1a68
leaq 0x1c87(%rip), %rdi      # 0x30ec
jmp 0x1a78
movl %r12d, %r13d
shrl $0x9, %r13d
andl $0x7, %r13d
andl $0x1ff, %r12d           # imm = 0x1FF
xorl %ecx, %ecx
cmpw $0x100, %r12w           # imm = 0x100
setb %cl
shll $0x9, %ecx
leal (%rcx,%r12), %edx
leal (%rcx,%r12), %r14d
addl $0xfffffe00, %r14d      # imm = 0xFFFFFE00
movl $0xffff, %ecx           # imm = 0xFFFF
andl %ecx, %r14d
leal (%rax,%rdx), %ebx
addl $0xfffffe00, %ebx       # imm = 0xFFFFFE00
movl %ebx, %edx
andl %ecx, %edx
leaq 0x1d0b(%rip), %rdi      # 0x31c0
movl %r13d, %esi
xorl %eax, %eax
callq 0x1060
cmpw $0x100, %r12w           # imm = 0x100
jae 0x18ff
leaq 0x1c1a(%rip), %rdi      # 0x30ec
movl %r14d, %esi
jmp 0x190e
movl %r12d, %r13d
shrl $0x9, %r13d
andl $0x7, %r13d
andl $0x1ff, %r12d           # imm = 0x1FF
xorl %ecx, %ecx
cmpw $0x100, %r12w           # imm = 0x100
setb %cl
shll $0x9, %ecx
leal (%rcx,%r12), %edx
leal (%rcx,%r12), %r14d
addl $0xfffffe00, %r14d      # imm = 0xFFFFFE00
movl $0xffff, %ecx           # imm = 0xFFFF
andl %ecx, %r14d
leal (%rax,%rdx), %r15d
addl $0xfffffe00, %r15d      # imm = 0xFFFFFE00
movl %r15d, %edx
andl %ecx, %edx
leaq 0x1c7a(%rip), %rdi      # 0x31a2
movl %r13d, %esi
xorl %eax, %eax
callq 0x1060
cmpw $0x100, %r12w           # imm = 0x100
jae 0x1931
leaq 0x1ba7(%rip), %rdi      # 0x30ec
movl %r14d, %esi
jmp 0x1940
btl $0xb, %r12d
jb 0x1974
shrl $0x6, %r12d
andl $0x7, %r12d
leaq 0x1bd8(%rip), %rdi      # 0x313f
movl %r12d, %esi
xorl %eax, %eax
callq 0x1060
movzwl 0x23b4a(%rip), %esi     # 0x250c2
pushq $0x7
popq %rdi
callq 0x1299
movl %r12d, %edi
jmp 0x15be
shrl $0x6, %r12d
andl $0x7, %r12d
leaq 0x1c1d(%rip), %rdi      # 0x31b1
movl %r12d, %esi
xorl %eax, %eax
callq 0x1060
cmpw $0x7, %r12w
jne 0x15b3
leaq 0x1c0d(%rip), %rdi      # 0x31b9
xorl %eax, %eax
callq 0x1060
movl %ebx, %edi
callq 0x1030
movzwl %r12w, %edi
callq 0x1267
movw %ax, 0x23af8(%rip)      # 0x250c2
jmp 0x1382
movl %r12d, %r14d
shrl $0x9, %r14d
andl $0x7, %r14d
shrl $0x6, %r12d
andl $0x7, %r12d
leaq 0x1b9d(%rip), %rdi      # 0x3186
movl %r14d, %esi
movl %r12d, %edx
xorl %eax, %eax
callq 0x1060
movl %r12d, %edi
callq 0x1267
notl %eax
movzwl %ax, %r15d
movl %r14d, %edi
movl %r15d, %esi
callq 0x1299
movl %r15d, %edi
callq 0x1332
jmp 0x1382
movl %r12d, %r13d
shrl $0x9, %r13d
andl $0x7, %r13d
andl $0x1ff, %r12d           # imm = 0x1FF
xorl %ecx, %ecx
cmpw $0x100, %r12w           # imm = 0x100
setb %cl
shll $0x9, %ecx
leal (%rcx,%r12), %edx
leal (%rcx,%r12), %r14d
addl $0xfffffe00, %r14d      # imm = 0xFFFFFE00
movl $0xffff, %ecx           # imm = 0xFFFF
andl %ecx, %r14d
leal (%rax,%rdx), %ebx
addl $0xfffffe00, %ebx       # imm = 0xFFFFFE00
movl %ebx, %edx
andl %ecx, %edx
leaq 0x1ab1(%rip), %rdi      # 0x3118
movl %r13d, %esi
xorl %eax, %eax
callq 0x1060
cmpw $0x100, %r12w           # imm = 0x100
jae 0x19d6
leaq 0x1a68(%rip), %rdi      # 0x30ec
movl %r14d, %esi
jmp 0x19e5
movl %r12d, %r13d
shrl $0x9, %r13d
andl $0x7, %r13d
andl $0x1ff, %r12d           # imm = 0x1FF
xorl %ecx, %ecx
cmpw $0x100, %r12w           # imm = 0x100
setb %cl
shll $0x9, %ecx
leal (%rcx,%r12), %edx
leal (%rcx,%r12), %r14d
addl $0xfffffe00, %r14d      # imm = 0xFFFFFE00
movl $0xffff, %ecx           # imm = 0xFFFF
andl %ecx, %r14d
leal (%rax,%rdx), %r15d
addl $0xfffffe00, %r15d      # imm = 0xFFFFFE00
movl %r15d, %edx
andl %ecx, %edx
leaq 0x1a4c(%rip), %rdi      # 0x3126
movl %r13d, %esi
xorl %eax, %eax
callq 0x1060
cmpw $0x100, %r12w           # imm = 0x100
jae 0x1a03
leaq 0x19f5(%rip), %rdi      # 0x30ec
movl %r14d, %esi
jmp 0x1a12
movl %r12d, %r13d
shrl $0x9, %r13d
andl $0x7, %r13d
movl %r12d, %r15d
shrl $0x6, %r15d
andl $0x7, %r15d
andl $0x3f, %r12d
xorl %eax, %eax
cmpw $0x20, %r12w
setb %al
shll $0x6, %eax
addl %r12d, %eax
addl $-0x40, %eax
movzwl %ax, %r14d
leaq 0x1a3b(%rip), %rdi      # 0x3172
movl %r13d, %esi
movl %r15d, %edx
movl %r14d, %ecx
xorl %eax, %eax
callq 0x1060
cmpw $0x20, %r12w
jae 0x1a22
leaq 0x1993(%rip), %rdi      # 0x30ec
movl %r14d, %esi
jmp 0x1a31
movl %r12d, %r13d
shrl $0x9, %r13d
andl $0x7, %r13d
movl %r12d, %r15d
shrl $0x6, %r15d
andl $0x7, %r15d
andl $0x3f, %r12d
xorl %eax, %eax
cmpw $0x20, %r12w
setb %al
shll $0x6, %eax
addl %r12d, %eax
addl $-0x40, %eax
movzwl %ax, %r14d
leaq 0x19c5(%rip), %rdi      # 0x315e
movl %r13d, %esi
movl %r15d, %edx
movl %r14d, %ecx
xorl %eax, %eax
callq 0x1060
cmpw $0x20, %r12w
jae 0x1aac
leaq 0x1931(%rip), %rdi      # 0x30ec
movl %r14d, %esi
jmp 0x1abb
movl %r12d, %r13d
shrl $0x9, %r13d
andl $0x7, %r13d
andl $0x1ff, %r12d           # imm = 0x1FF
xorl %ecx, %ecx
cmpw $0x100, %r12w           # imm = 0x100
setb %cl
shll $0x9, %ecx
leal (%rcx,%r12), %edx
leal (%rcx,%r12), %r14d
addl $0xfffffe00, %r14d      # imm = 0xFFFFFE00
movl $0xffff, %ecx           # imm = 0xFFFF
andl %ecx, %r14d
leal (%rax,%rdx), %ebx
addl $0xfffffe00, %ebx       # imm = 0xFFFFFE00
movl %ebx, %edx
andl %ecx, %edx
leaq 0x1985(%rip), %rdi      # 0x3193
movl %r13d, %esi
xorl %eax, %eax
callq 0x1060
cmpw $0x100, %r12w           # imm = 0x100
jae 0x1ae7
leaq 0x18c1(%rip), %rdi      # 0x30ec
movl %r14d, %esi
jmp 0x1af6
leaq 0x19ff(%rip), %rdi      # 0x3239
callq 0x1040
cmpw $0x0, 0x23879(%rip)     # 0x250c0
js 0x1ce5
pushq $0x6
popq %r12
movl %r12d, %edi
callq 0x1267
movl %eax, %r14d
movzwl %ax, %edi
callq 0x1213
movw %ax, 0x23857(%rip)      # 0x250c2
leal 0x1(%r14), %esi
movl $0xffff, %r15d          # imm = 0xFFFF
andl %r15d, %esi
movl %r12d, %edi
callq 0x1299
movl %r12d, %edi
callq 0x1267
movl %eax, %r14d
movzwl %ax, %edi
callq 0x1213
movw %ax, 0x23826(%rip)      # 0x250c0
leal 0x1(%r14), %esi
andl %r15d, %esi
movl %r12d, %edi
callq 0x1299
jmp 0x1382
movzbl %r12b, %r14d
leaq 0x1916(%rip), %rdi      # 0x31cf
movl %r14d, %esi
xorl %eax, %eax
callq 0x1060
cmpb $0x67, %r14b
je 0x1b39
cmpl $0x25, %r14d
je 0x1cbf
movzwl 0x237e4(%rip), %eax     # 0x250c2
movw %ax, 0x237d9(%rip)      # 0x250be
movl %r14d, %eax
leaq 0x37b1(%rip), %rcx      # 0x50a0
movzwl (%rcx,%rax,2), %eax
movw %ax, 0x237c8(%rip)      # 0x250c2
jmp 0x1382
movl $0x10000, %esi          # imm = 0x10000
subl %r14d, %esi
leaq 0x17d7(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
pushq $0xa
popq %r15
movl %r15d, %edi
callq 0x1030
movzwl %r13w, %edi
movzwl %bx, %r14d
movl %r15d, %ebx
jmp 0x1b24
movl $0x10000, %esi          # imm = 0x10000
subl %r14d, %esi
leaq 0x17a5(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
movl %ebx, %edi
callq 0x1030
movzwl %r13w, %edi
callq 0x1267
movl %eax, %r14d
movzwl %r15w, %edi
callq 0x1213
movzwl %r14w, %esi
movzwl %ax, %edi
callq 0x124a
jmp 0x1382
andl $0x7ff, %r12d           # imm = 0x7FF
xorl %ecx, %ecx
cmpw $0x400, %r12w           # imm = 0x400
setb %cl
shll $0xb, %ecx
leal (%rcx,%r12), %edx
leal (%rcx,%r12), %r14d
addl $0xfffff800, %r14d      # imm = 0xFFFFF800
movl $0xffff, %ecx           # imm = 0xFFFF
andl %ecx, %r14d
leal (%rax,%rdx), %ebx
addl $0xfffff800, %ebx       # imm = 0xFFFFF800
movl %ebx, %esi
andl %ecx, %esi
leaq 0x1780(%rip), %rdi      # 0x3134
xorl %eax, %eax
callq 0x1060
cmpw $0x400, %r12w           # imm = 0x400
jae 0x1b53
leaq 0x171e(%rip), %rdi      # 0x30ec
movl %r14d, %esi
jmp 0x1b62
movl $0x10000, %esi          # imm = 0x10000
subl %r14d, %esi
leaq 0x1700(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
pushq $0xa
popq %r14
movl %r14d, %edi
callq 0x1030
movzwl %bx, %edi
movl %r14d, %ebx
jmp 0x1b17
movl $0x10000, %esi          # imm = 0x10000
subl %r14d, %esi
leaq 0x16d3(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
movl %ebx, %edi
callq 0x1030
jmp 0x1a4e
movl $0x10000, %esi          # imm = 0x10000
subl %r14d, %esi
leaq 0x16b4(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
movl %ebx, %edi
callq 0x1030
movzwl %r15w, %edi
callq 0x1267
movl %eax, %r15d
addl %r14d, %r15d
movzwl %r13w, %edi
callq 0x1267
movzwl %r15w, %edi
movzwl %ax, %esi
callq 0x124a
jmp 0x1382
movl $0x10000, %eax          # imm = 0x10000
subl %esi, %eax
leaq 0x166f(%rip), %rdi      # 0x30e5
movl %eax, %esi
xorl %eax, %eax
callq 0x1060
pushq $0xa
popq %rbx
movl %ebx, %edi
callq 0x1030
shrl $0x9, %r12d
andw 0x2362b(%rip), %r12w    # 0x250c0
testb $0x7, %r12b
je 0x1382
addw %r14w, 0x2361b(%rip)    # 0x250c2
jmp 0x1382
movl $0x10000, %esi          # imm = 0x10000
subl %r14d, %esi
leaq 0x162a(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
movl %ebx, %edi
callq 0x1030
movzwl %r15w, %edi
callq 0x1267
addl %r14d, %eax
movzwl %ax, %edi
callq 0x1213
movzwl %ax, %r14d
movzwl %r13w, %edi
jmp 0x1b24
movl $0x10000, %esi          # imm = 0x10000
subl %r14d, %esi
leaq 0x15ef(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
pushq $0xa
popq %r14
movl %r14d, %edi
callq 0x1030
movzwl %bx, %edi
movl %r14d, %ebx
callq 0x1213
movzwl %ax, %edi
callq 0x1213
movzwl %r13w, %edi
movzwl %ax, %r14d
movl %r14d, %esi
callq 0x1299
movl %r14d, %edi
callq 0x1332
jmp 0x1382
movzwl 0x23570(%rip), %esi     # 0x250b0
leaq 0x1695(%rip), %rdi      # 0x31dc
xorl %eax, %eax
callq 0x1060
jmp 0x1382
movl $0x10000, %esi          # imm = 0x10000
subl %r14d, %esi
leaq 0x1583(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
pushq $0xa
popq %r14
movl %r14d, %edi
callq 0x1030
movzwl 0x23546(%rip), %esi     # 0x250c2
pushq $0x7
popq %rdi
callq 0x1299
movw %bx, 0x23537(%rip)      # 0x250c2
movl %r14d, %ebx
jmp 0x1382
movl %r12d, %eax
shrl $0x9, %eax
andl $0x7, %eax
movl %r12d, %ebx
shrl $0x6, %ebx
andl $0x7, %ebx
movzwl %ax, %r13d
movzwl %bx, %r14d
testb $0x20, %r12b
jne 0x1c29
andl $0x7, %r12d
leaq 0x154a(%rip), %rdi      # 0x3108
movl %r13d, %esi
movl %r14d, %edx
movl %r12d, %ecx
xorl %eax, %eax
callq 0x1060
movl %r14d, %edi
callq 0x1267
movl %eax, %r15d
movl %r12d, %ebx
jmp 0x1c5a
movl %r12d, %eax
shrl $0x9, %eax
andl $0x7, %eax
movl %r12d, %ebx
shrl $0x6, %ebx
andl $0x7, %ebx
movzwl %ax, %r13d
movzwl %bx, %r14d
testb $0x20, %r12b
jne 0x1c67
andl $0x7, %r12d
leaq 0x14ff(%rip), %rdi      # 0x3108
movl %r13d, %esi
movl %r14d, %edx
movl %r12d, %ecx
xorl %eax, %eax
callq 0x1060
movl %r14d, %edi
callq 0x1267
movl %eax, %r15d
movl %r12d, %ebx
jmp 0x1c98
andl $0x1f, %r12d
xorl %eax, %eax
cmpw $0x10, %r12w
setb %al
shll $0x5, %eax
leal (%rax,%r12), %r15d
addl $-0x20, %r15d
movzwl %r15w, %ecx
leaq 0x14a6(%rip), %rdi      # 0x30f3
movl %r13d, %esi
movl %r14d, %edx
xorl %eax, %eax
callq 0x1060
movzwl %bx, %edi
callq 0x1267
addl %eax, %r15d
jmp 0x1ca3
andl $0x1f, %r12d
xorl %eax, %eax
cmpw $0x10, %r12w
setb %al
shll $0x5, %eax
leal (%rax,%r12), %r15d
addl $-0x20, %r15d
movzwl %r15w, %ecx
leaq 0x14be(%rip), %rdi      # 0x3149
movl %r13d, %esi
movl %r14d, %edx
xorl %eax, %eax
callq 0x1060
movzwl %bx, %edi
callq 0x1267
andl %eax, %r15d
movzwl %r15w, %r14d
movl %r13d, %edi
movl %r14d, %esi
callq 0x1299
movl %r14d, %edi
callq 0x1332
jmp 0x137f
leaq 0x1558(%rip), %rdi      # 0x321e
callq 0x1040
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0x1540(%rip), %rdi      # 0x3223
jmp 0x1cec
leaq 0x1551(%rip), %rdi      # 0x323d
callq 0x1040
pushq $0x1
popq %rdi
callq 0x10c0