// File: /workspace/github_cpp_makefile_star2_O1/CMU-SAFARI[P]MQSim/src/ssd/Address_Mapping_Unit_Page_Level.cpp
// Function: SSD_Components::Address_Mapping_Unit_Page_Level::Allocate_address_for_preconditioning(unsigned short, std::map<unsigned long, unsigned long, std::less<unsigned long>, std::allocator<std::pair<unsigned long const, unsigned long>>>&, std::vector<double, std::allocator<double>>&)
void Address_Mapping_Unit_Page_Level::Allocate_address_for_preconditioning(const stream_id_type stream_id, std::map<LPA_type, page_status_type>& lpa_list, std::vector<double>& steady_state_distribution)
	{
		int idx = 0;
		std::vector<LPA_type>**** assigned_lpas = new std::vector<LPA_type>***[channel_count];
		for (unsigned int channel_cntr = 0; channel_cntr < channel_count; channel_cntr++) {
			assigned_lpas[channel_cntr] = new std::vector<LPA_type>**[chip_no_per_channel];
			for (unsigned int chip_cntr = 0; chip_cntr < chip_no_per_channel; chip_cntr++) {
				assigned_lpas[channel_cntr][chip_cntr] = new std::vector<LPA_type>*[die_no_per_chip];
				for (unsigned int die_cntr = 0; die_cntr < die_no_per_chip; die_cntr++) {
					assigned_lpas[channel_cntr][chip_cntr][die_cntr] = new std::vector<LPA_type>[plane_no_per_die];
				}
			}
		}

		//First: distribute LPAs to planes
		NVM::FlashMemory::Physical_Page_Address plane_address;
		for (auto lpa = lpa_list.begin(); lpa != lpa_list.end();) {
			if ((*lpa).first >= domains[stream_id]->Total_logical_pages_no) {
				PRINT_ERROR("Out of range LPA specified for preconditioning! LPA shoud be smaller than " << domains[stream_id]->Total_logical_pages_no << ", but it is " << (*lpa).first)
			}
			PPA_type ppa = domains[stream_id]->Get_ppa_for_preconditioning(stream_id, (*lpa).first);
			if (ppa != NO_LPA) {
				PRINT_ERROR("Calling address allocation for a previously allocated LPA during preconditioning!")
			}
			allocate_plane_for_preconditioning(stream_id, (*lpa).first, plane_address);
			if (LPA_type(Utils::Logical_Address_Partitioning_Unit::Get_share_of_physcial_pages_in_plane(plane_address.ChannelID, plane_address.ChipID, plane_address.DieID, plane_address.PlaneID) * page_no_per_plane)
				> assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size()) {
				assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].push_back((*lpa).first);
				lpa++;
			} else {
				lpa_list.erase(lpa++);
			}
		}

		//Second: distribute LPAs within planes based on the steady-state status of blocks
		//unsigned int safe_guard_band = ftl->GC_and_WL_Unit->Get_minimum_number_of_free_pages_before_GC();
		for (unsigned int channel_cntr = 0; channel_cntr < domains[stream_id]->Channel_no; channel_cntr++) {
			for (unsigned int chip_cntr = 0; chip_cntr < domains[stream_id]->Chip_no; chip_cntr++) {
				for (unsigned int die_cntr = 0; die_cntr < domains[stream_id]->Die_no; die_cntr++) {
					for (unsigned int plane_cntr = 0; plane_cntr < domains[stream_id]->Plane_no; plane_cntr++) {
						plane_address.ChannelID = domains[stream_id]->Channel_ids[channel_cntr];
						plane_address.ChipID = domains[stream_id]->Chip_ids[chip_cntr];
						plane_address.DieID = domains[stream_id]->Die_ids[die_cntr];
						plane_address.PlaneID = domains[stream_id]->Plane_ids[plane_cntr];

						unsigned int physical_block_consumption_goal = (unsigned int)(double(block_no_per_plane - ftl->GC_and_WL_Unit->Get_minimum_number_of_free_pages_before_GC() / 2)
							* Utils::Logical_Address_Partitioning_Unit::Get_share_of_physcial_pages_in_plane(plane_address.ChannelID, plane_address.ChipID, plane_address.DieID, plane_address.PlaneID));

						//Adjust the average
						double model_average = 0;
						std::vector<double> adjusted_steady_state_distribution;
						//Check if probability distribution is correct 
						for (unsigned int i = 0; i <= pages_no_per_block; i++) {
							model_average += steady_state_distribution[i] * double(i) / double(pages_no_per_block);
							adjusted_steady_state_distribution.push_back(steady_state_distribution[i]);
						}
						double real_average = double(assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size()) / (physical_block_consumption_goal * pages_no_per_block);
						if (std::abs(model_average - real_average) * pages_no_per_block > 0.9999) {
							int displacement_index = int((real_average - model_average) * pages_no_per_block);
							if (displacement_index > 0) {
								for (int i = 0; i < displacement_index; i++) {
									adjusted_steady_state_distribution[i] = 0;
								}
								for (int i = displacement_index; i < int(pages_no_per_block); i++) {
									adjusted_steady_state_distribution[i] = steady_state_distribution[i - displacement_index];
								}
							} else {
								displacement_index *= -1;
								for (int i = 0; i < int(pages_no_per_block) - displacement_index; i++) {
									adjusted_steady_state_distribution[i] = steady_state_distribution[i + displacement_index];
								}
								for (int i = int(pages_no_per_block) - displacement_index; i < int(pages_no_per_block); i++) {
									adjusted_steady_state_distribution[i] = 0;
								}
							}
						}

						//Check if it is possible to find a PPA for each LPA with current proability assignments 
						unsigned int total_valid_pages = 0;
						for (int valid_pages_in_block = pages_no_per_block; valid_pages_in_block >= 0; valid_pages_in_block--) {
							total_valid_pages += valid_pages_in_block * (unsigned int)(adjusted_steady_state_distribution[valid_pages_in_block] * physical_block_consumption_goal);
						}
						unsigned int pages_need_PPA = 0;//The number of LPAs that remain unassigned due to imperfect probability assignments
						if (total_valid_pages < assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size()) {
							pages_need_PPA = (unsigned int)(assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size()) - total_valid_pages;
						}
						
						unsigned int remaining_blocks_to_consume = physical_block_consumption_goal;
						for (int valid_pages_in_block = pages_no_per_block; valid_pages_in_block >= 0; valid_pages_in_block--) {
							unsigned int block_no_with_x_valid_page = (unsigned int)(adjusted_steady_state_distribution[valid_pages_in_block] * physical_block_consumption_goal);
							if (block_no_with_x_valid_page > 0 && pages_need_PPA > 0) {
								block_no_with_x_valid_page += (pages_need_PPA / valid_pages_in_block) + (pages_need_PPA % valid_pages_in_block == 0 ? 0 : 1);
								pages_need_PPA = 0;
							}

							if (block_no_with_x_valid_page <= remaining_blocks_to_consume) {
								remaining_blocks_to_consume -= block_no_with_x_valid_page;
							} else {
								block_no_with_x_valid_page = remaining_blocks_to_consume;
								remaining_blocks_to_consume = 0;
							}

							for (unsigned int block_cntr = 0; block_cntr < block_no_with_x_valid_page; block_cntr++) {
								//Assign physical addresses
								std::vector<NVM::FlashMemory::Physical_Page_Address> addresses;
								if (assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size() < valid_pages_in_block) {
									valid_pages_in_block = int(assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size());
								}
								for (int page_cntr = 0; page_cntr < valid_pages_in_block; page_cntr++) {
									NVM::FlashMemory::Physical_Page_Address addr(plane_address.ChannelID, plane_address.ChipID, plane_address.DieID, plane_address.PlaneID, 0, 0);
									addresses.push_back(addr);
								}
								block_manager->Allocate_Pages_in_block_and_invalidate_remaining_for_preconditioning(stream_id, plane_address, addresses);

								//Update mapping table
								for (auto const &address : addresses) {
									LPA_type lpa = assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].back();
									assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].pop_back();
									PPA_type ppa = Convert_address_to_ppa(address);
									flash_controller->Change_memory_status_preconditioning(&address, &lpa);
									domains[stream_id]->GlobalMappingTable[lpa].PPA = ppa;
									domains[stream_id]->GlobalMappingTable[lpa].WrittenStateBitmap = (*lpa_list.find(lpa)).second;
									domains[stream_id]->GlobalMappingTable[lpa].TimeStamp = 0;
								}
							}
						}
						if (assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size() > 0) {
							PRINT_ERROR("It is not possible to assign PPA to all LPAs in Allocate_address_for_preconditioning! It is not safe to continue preconditioning." << assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size())
						}
					}
				}
			}
		}

		for (unsigned int channel_cntr = 0; channel_cntr < channel_count; channel_cntr++) {
			for (unsigned int chip_cntr = 0; chip_cntr < chip_no_per_channel; chip_cntr++) {
				for (unsigned int die_cntr = 0; die_cntr < die_no_per_chip; die_cntr++) {
					delete[] assigned_lpas[channel_cntr][chip_cntr][die_cntr];
				}
				delete[] assigned_lpas[channel_cntr][chip_cntr];
			}
			delete[] assigned_lpas[channel_cntr];
		}
		delete[] assigned_lpas;
	}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xd8, %rsp
movq %rcx, 0x90(%rsp)
movq %rdx, 0x98(%rsp)
movl %esi, 0x40(%rsp)
movq %rdi, %r14
movl 0x64(%rdi), %ebx
leaq (,%rbx,8), %rdi
callq 0x7030
movq %rax, 0x8(%rsp)
movq %rbx, 0x88(%rsp)
testq %rbx, %rbx
je 0x2c9ac
movl 0x68(%r14), %eax
movl 0x6c(%r14), %ecx
movq %rax, 0x28(%rsp)
leaq (,%rax,8), %rax
movq %rax, 0x80(%rsp)
movq %rcx, 0x38(%rsp)
leaq (,%rcx,8), %rax
movq %rax, 0x48(%rsp)
xorl %ebx, %ebx
movq 0x80(%rsp), %rdi
callq 0x7030
movq 0x8(%rsp), %rcx
movq %rax, (%rcx,%rbx,8)
cmpq $0x0, 0x28(%rsp)
je 0x2c99b
movl 0x70(%r14), %r15d
leaq (,%r15,8), %rax
leaq (%rax,%rax,2), %rcx
addq $0x8, %rcx
movq %rcx, (%rsp)
leaq (%rax,%rax,2), %rax
addq $-0x18, %rax
movabsq $-0x5555555555555555, %rcx # imm = 0xAAAAAAAAAAAAAAAB
mulq %rcx
shrq $0x4, %rdx
leaq (%rdx,%rdx,2), %rax
leaq 0x18(,%rax,8), %rax
movq %rax, 0x30(%rsp)
xorl %r12d, %r12d
movq 0x48(%rsp), %rdi
callq 0x7030
movq 0x8(%rsp), %rcx
movq %rbx, %rbp
movq (%rcx,%rbx,8), %rcx
movq %rax, (%rcx,%r12,8)
cmpq $0x0, 0x38(%rsp)
je 0x2c98e
xorl %r13d, %r13d
movq (%rsp), %rdi
callq 0x7030
leaq 0x8(%rax), %rbx
movq %r15, (%rax)
testq %r15, %r15
je 0x2c973
movq %rbx, %rdi
xorl %esi, %esi
movq 0x30(%rsp), %rdx
callq 0x7230
movq 0x8(%rsp), %rax
movq (%rax,%rbp,8), %rax
movq (%rax,%r12,8), %rax
movq %rbx, (%rax,%r13,8)
incq %r13
cmpq %r13, 0x38(%rsp)
jne 0x2c94f
incq %r12
cmpq 0x28(%rsp), %r12
movq %rbp, %rbx
jne 0x2c92a
incq %rbx
cmpq 0x88(%rsp), %rbx
jne 0x2c8c3
xorpd %xmm0, %xmm0
movapd %xmm0, 0x10(%rsp)
movq $0x0, 0x20(%rsp)
movq 0x98(%rsp), %rax
movq 0x18(%rax), %r15
leaq 0x8(%rax), %r12
movzwl 0x40(%rsp), %ebx
cmpq %r12, %r15
movq %rbx, 0x38(%rsp)
je 0x2cb04
leaq 0x10(%rsp), %r13
leaq 0x20(%r15), %rbp
movq 0x20(%r15), %rdx
movq 0xa8(%r14), %rax
movq (%rax,%rbx,8), %rax
cmpq 0x258(%rax), %rdx
jae 0x2d379
movq 0x20(%rax), %rax
leaq (%rdx,%rdx,2), %rcx
cmpq $-0x1, (%rax,%rcx,8)
jne 0x2d3d8
movq %r14, %rdi
movl %ebx, %esi
movq %r13, %rcx
callq 0x2d452
movl 0x10(%rsp), %edi
movl 0x14(%rsp), %esi
movl 0x18(%rsp), %edx
movl 0x1c(%rsp), %ecx
callq 0x53884
movl 0x94(%r14), %eax
xorps %xmm1, %xmm1
cvtsi2sd %rax, %xmm1
mulsd %xmm0, %xmm1
cvttsd2si %xmm1, %rax
movq %rax, %rcx
sarq $0x3f, %rcx
subsd 0x285ed(%rip), %xmm1    # 0x55050
cvttsd2si %xmm1, %rdx
andq %rcx, %rdx
orq %rax, %rdx
movl 0x10(%rsp), %eax
movl 0x14(%rsp), %ecx
movq 0x8(%rsp), %rsi
movq (%rsi,%rax,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x18(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x1c(%rsp), %ecx
leaq (%rcx,%rcx,2), %rcx
movq 0x8(%rax,%rcx,8), %rsi
movq %rsi, %rdi
subq (%rax,%rcx,8), %rdi
sarq $0x3, %rdi
cmpq %rdx, %rdi
jae 0x2cac3
leaq (%rax,%rcx,8), %rdi
cmpq 0x10(%rdi), %rsi
je 0x2cae8
movq (%rbp), %rax
movq %rax, (%rsi)
addq $0x8, %rsi
movq %rsi, 0x8(%rdi)
jmp 0x2caf0
movq %r15, %rdi
callq 0x72a0
movq %rax, %rbx
movq 0x98(%rsp), %rdi
movq %r15, %rsi
callq 0x31742
movq %rbx, %r15
movq 0x38(%rsp), %rbx
jmp 0x2cafb
movq %rbp, %rdx
callq 0x3166c
movq %r15, %rdi
callq 0x72a0
movq %rax, %r15
cmpq %r12, %r15
jne 0x2c9e7
movq 0xa8(%r14), %rax
movq (%rax,%rbx,8), %rax
cmpl $0x0, 0x218(%rax)
je 0x2d213
leaq 0xc0(%rsp), %rbp
movq $0x0, 0x70(%rsp)
movq 0xa8(%r14), %rax
movq (%rax,%rbx,8), %rax
cmpl $0x0, 0x228(%rax)
je 0x2d1ec
movq $0x0, 0x78(%rsp)
movq 0xa8(%r14), %rax
movq (%rax,%rbx,8), %rax
cmpl $0x0, 0x238(%rax)
je 0x2d1c5
movq $0x0, 0x40(%rsp)
movq 0xa8(%r14), %rax
movq (%rax,%rbx,8), %rax
cmpl $0x0, 0x248(%rax)
je 0x2d19e
xorl %esi, %esi
movq 0x210(%rax), %rcx
movq 0x70(%rsp), %rdx
movl (%rcx,%rdx,4), %ecx
movl %ecx, 0x10(%rsp)
movq 0x220(%rax), %rcx
movq 0x78(%rsp), %rdx
movl (%rcx,%rdx,4), %ecx
movl %ecx, 0x14(%rsp)
movq 0x230(%rax), %rcx
movq 0x40(%rsp), %rdx
movl (%rcx,%rdx,4), %ecx
movl %ecx, 0x18(%rsp)
movq 0x240(%rax), %rax
movq %rsi, 0x80(%rsp)
movl (%rax,%rsi,4), %eax
movl %eax, 0x1c(%rsp)
movl 0x74(%r14), %ebx
movq 0x30(%r14), %rax
movq 0x48(%rax), %rdi
callq 0x403a4
shrl %eax
subl %eax, %ebx
xorps %xmm0, %xmm0
cvtsi2sd %rbx, %xmm0
movsd %xmm0, (%rsp)
movl 0x10(%rsp), %edi
movl 0x14(%rsp), %esi
movl 0x18(%rsp), %edx
movl 0x1c(%rsp), %ecx
callq 0x53884
mulsd (%rsp), %xmm0
cvttsd2si %xmm0, %rax
movq %rax, 0x30(%rsp)
xorpd %xmm0, %xmm0
movapd %xmm0, 0x50(%rsp)
movq $0x0, 0x60(%rsp)
movl 0x78(%r14), %r13d
xorpd %xmm0, %xmm0
movsd %xmm0, 0x28(%rsp)
xorl %ebx, %ebx
movl %ebx, %r15d
movq 0x90(%rsp), %rax
movq (%rax), %rax
movsd (%rax,%r15,8), %xmm0
movsd %xmm0, (%rsp)
movq 0x58(%rsp), %rsi
cmpq 0x60(%rsp), %rsi
je 0x2cc7a
movsd (%rsp), %xmm0
movsd %xmm0, (%rsi)
addq $0x8, %rsi
movq %rsi, 0x58(%rsp)
jmp 0x2cc88
leaq (%rax,%r15,8), %rdx
leaq 0x50(%rsp), %rdi
callq 0x3177a
xorps %xmm0, %xmm0
cvtsi2sd %r15, %xmm0
movsd (%rsp), %xmm1
mulsd %xmm0, %xmm1
movl %r13d, %eax
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
divsd %xmm0, %xmm1
movsd 0x28(%rsp), %xmm0
addsd %xmm1, %xmm0
movsd %xmm0, 0x28(%rsp)
incl %ebx
movl 0x78(%r14), %r13d
cmpl %r13d, %ebx
jbe 0x2cc41
movl 0x10(%rsp), %eax
movl 0x14(%rsp), %ecx
movq 0x8(%rsp), %rdx
movq (%rdx,%rax,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x18(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x1c(%rsp), %ecx
leaq (%rcx,%rcx,2), %rcx
movq 0x8(%rax,%rcx,8), %rbx
subq (%rax,%rcx,8), %rbx
sarq $0x3, %rbx
movq %rbx, %xmm1
punpckldq 0x2abba(%rip), %xmm1 # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
subpd 0x2abc2(%rip), %xmm1    # 0x578d0
movapd %xmm1, %xmm0
unpckhpd %xmm1, %xmm0            # xmm0 = xmm0[1],xmm1[1]
addsd %xmm1, %xmm0
movl %r13d, %eax
imull 0x30(%rsp), %eax
xorps %xmm1, %xmm1
cvtsi2sd %rax, %xmm1
divsd %xmm1, %xmm0
movsd 0x28(%rsp), %xmm3
movapd %xmm3, %xmm2
subsd %xmm0, %xmm2
movq %r13, (%rsp)
movl %r13d, %eax
xorps %xmm1, %xmm1
cvtsi2sd %rax, %xmm1
andpd 0x2b7dd(%rip), %xmm2    # 0x58530
mulsd %xmm1, %xmm2
ucomisd 0x2b631(%rip), %xmm2    # 0x58390
jbe 0x2ce43
subsd %xmm3, %xmm0
mulsd %xmm1, %xmm0
cvttsd2si %xmm0, %r15d
testl %r15d, %r15d
jle 0x2cdcd
movq 0x50(%rsp), %rdi
movl %r15d, %r13d
leaq (,%r13,8), %rdx
xorl %esi, %esi
callq 0x7230
cmpl %r15d, (%rsp)
jle 0x2ce43
movslq (%rsp), %rax
movq 0x90(%rsp), %rcx
movq (%rcx), %rcx
leaq (,%r13,8), %rdx
addq 0x50(%rsp), %rdx
subq %r13, %rax
xorl %esi, %esi
movsd (%rcx,%rsi,8), %xmm0
movsd %xmm0, (%rdx,%rsi,8)
incq %rsi
cmpq %rsi, %rax
jne 0x2cdb9
jmp 0x2ce43
movq (%rsp), %rax
addl %r15d, %eax
jle 0x2ce0b
movq 0x90(%rsp), %rcx
movq (%rcx), %rcx
movq 0x50(%rsp), %rdx
movl %eax, %esi
movl %r15d, %edi
negl %edi
xorl %r8d, %r8d
leal (%rdi,%r8), %r9d
movslq %r9d, %r9
movsd (%rcx,%r9,8), %xmm0
movsd %xmm0, (%rdx,%r8,8)
incq %r8
cmpq %r8, %rsi
jne 0x2cdf0
testl %r15d, %r15d
jns 0x2ce43
movslq %eax, %rdi
shlq $0x3, %rdi
addq 0x50(%rsp), %rdi
movl %r15d, %eax
movq (%rsp), %rdx
leal (%r15,%rdx), %ecx
incl %ecx
cmpl %ecx, %edx
cmovgl %edx, %ecx
notl %eax
addl %eax, %ecx
subl %edx, %ecx
leaq 0x8(,%rcx,8), %rdx
xorl %esi, %esi
callq 0x7230
movl 0x30(%rsp), %eax
movq (%rsp), %r15
testl %r15d, %r15d
js 0x2ce83
movq 0x50(%rsp), %rdx
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
xorl %ecx, %ecx
movq %r15, %rsi
movsd (%rdx,%rsi,8), %xmm1
mulsd %xmm0, %xmm1
cvttsd2si %xmm1, %rdi
imull %esi, %edi
addl %edi, %ecx
leaq -0x1(%rsi), %rdi
testq %rsi, %rsi
movq %rdi, %rsi
jg 0x2ce62
jmp 0x2ce85
xorl %ecx, %ecx
testl %r15d, %r15d
js 0x2d131
movl %ecx, %edx
movl %ebx, %esi
subl %ecx, %esi
cmpq %rdx, %rbx
movl $0x0, %ecx
cmovbel %ecx, %esi
movl %esi, 0x48(%rsp)
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
movsd %xmm0, 0x88(%rsp)
movl %r15d, %eax
movq 0x50(%rsp), %rcx
movsd (%rcx,%rax,8), %xmm0
mulsd 0x88(%rsp), %xmm0
cvttsd2si %xmm0, %rcx
testl %ecx, %ecx
je 0x2cef2
movl 0x48(%rsp), %eax
testl %eax, %eax
je 0x2cef2
xorl %edx, %edx
divl %r15d
addl %ecx, %eax
cmpl $0x1, %edx
sbbl $-0x1, %eax
movl $0x0, 0x48(%rsp)
movl %eax, %ecx
movq 0x30(%rsp), %r13
movl %r13d, %edx
subl %ecx, %edx
movl $0x0, %eax
cmovbl %eax, %edx
movl %edx, 0x28(%rsp)
cmoval %ecx, %r13d
movq %r13, 0x30(%rsp)
testl %r13d, %r13d
je 0x2d118
xorl %r13d, %r13d
xorpd %xmm0, %xmm0
movapd %xmm0, 0xc0(%rsp)
movq $0x0, 0xd0(%rsp)
movl 0x10(%rsp), %eax
movl 0x14(%rsp), %ecx
movq 0x8(%rsp), %rdx
movq (%rdx,%rax,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x18(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x1c(%rsp), %ecx
leaq (%rcx,%rcx,2), %rcx
movq 0x8(%rax,%rcx,8), %rdx
subq (%rax,%rcx,8), %rdx
sarq $0x3, %rdx
movslq %r15d, %r15
cmpq %r15, %rdx
cmovbl %edx, %r15d
movl %r15d, %ebx
testl %r15d, %r15d
jle 0x2cfa9
movapd 0x10(%rsp), %xmm0
movapd %xmm0, 0xa0(%rsp)
movq $0x0, 0xb0(%rsp)
movq %rbp, %rdi
leaq 0xa0(%rsp), %rsi
callq 0x2fdf4
decl %ebx
jne 0x2cf7a
movq 0x40(%r14), %rdi
movq (%rdi), %rax
movq 0x38(%rsp), %rsi
leaq 0x10(%rsp), %rdx
movq %rbp, %rcx
callq *0x28(%rax)
movq %r15, (%rsp)
movq 0xc0(%rsp), %rbp
movq 0xc8(%rsp), %r15
cmpq %r15, %rbp
je 0x2d0ec
movl 0x10(%rsp), %eax
movl 0x14(%rsp), %ecx
movq 0x8(%rsp), %rdx
movq (%rdx,%rax,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x18(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x1c(%rsp), %ecx
leaq (%rcx,%rcx,2), %rcx
movq 0x8(%rax,%rcx,8), %rdx
movq -0x8(%rdx), %rsi
addq $-0x8, %rdx
movq %rsi, 0xa0(%rsp)
movq %rdx, 0x8(%rax,%rcx,8)
movq (%r14), %rax
movq %r14, %rdi
movq %rbp, %rsi
callq *0x90(%rax)
movq %rax, %rbx
movq 0x38(%r14), %rdi
movq (%rdi), %rax
movq %rbp, %rsi
leaq 0xa0(%rsp), %rdx
callq *0x20(%rax)
movq 0xa8(%r14), %rax
movq 0x38(%rsp), %rcx
movq (%rax,%rcx,8), %rax
movq 0x20(%rax), %rax
movq 0xa0(%rsp), %rcx
leaq (%rcx,%rcx,2), %rcx
movq %rbx, (%rax,%rcx,8)
movq 0x98(%rsp), %rcx
movq 0x10(%rcx), %rdx
movq %r12, %rcx
testq %rdx, %rdx
je 0x2d09e
movq 0xa0(%rsp), %rsi
movq %r12, %rcx
xorl %edi, %edi
cmpq %rsi, 0x20(%rdx)
setb %dil
cmovaeq %rdx, %rcx
movq 0x10(%rdx,%rdi,8), %rdx
testq %rdx, %rdx
jne 0x2d086
movq %r12, %rdx
cmpq %r12, %rcx
je 0x2d0b9
movq 0xa0(%rsp), %rdx
cmpq 0x20(%rcx), %rdx
cmovbq %r12, %rcx
movq %rcx, %rdx
movq 0x28(%rdx), %rcx
movq 0xa0(%rsp), %rdx
leaq (%rdx,%rdx,2), %rdx
movq %rcx, 0x8(%rax,%rdx,8)
movq 0xa0(%rsp), %rcx
leaq (%rcx,%rcx,2), %rcx
movq $0x0, 0x10(%rax,%rcx,8)
addq $0x18, %rbp
jmp 0x2cfd4
movq 0xc0(%rsp), %rdi
testq %rdi, %rdi
movq (%rsp), %r15
je 0x2d102
callq 0x7370
incl %r13d
cmpl 0x30(%rsp), %r13d
leaq 0xc0(%rsp), %rbp
jne 0x2cf1d
leal -0x1(%r15), %eax
movl 0x28(%rsp), %ecx
movq %rcx, 0x30(%rsp)
testl %r15d, %r15d
movl %eax, %r15d
jg 0x2ceb4
movl 0x10(%rsp), %eax
movl 0x14(%rsp), %ecx
movq 0x8(%rsp), %rdx
movq (%rdx,%rax,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x18(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x1c(%rsp), %ecx
leaq (%rcx,%rcx,2), %rcx
movq 0x8(%rax,%rcx,8), %rdx
cmpq (%rax,%rcx,8), %rdx
jne 0x2d2f2
movq 0x50(%rsp), %rdi
testq %rdi, %rdi
movq 0x38(%rsp), %rbx
je 0x2d179
callq 0x7370
movq 0x80(%rsp), %rsi
incq %rsi
movq 0xa8(%r14), %rax
movq (%rax,%rbx,8), %rax
movl 0x248(%rax), %ecx
cmpq %rcx, %rsi
jb 0x2cb89
movq 0x40(%rsp), %rdx
incq %rdx
movq 0xa8(%r14), %rax
movq (%rax,%rbx,8), %rax
movl 0x238(%rax), %eax
movq %rdx, 0x40(%rsp)
cmpq %rax, %rdx
jb 0x2cb6f
movq 0x78(%rsp), %rdx
incq %rdx
movq 0xa8(%r14), %rax
movq (%rax,%rbx,8), %rax
movl 0x228(%rax), %eax
movq %rdx, 0x78(%rsp)
cmpq %rax, %rdx
jb 0x2cb4e
movq 0x70(%rsp), %rdx
incq %rdx
movq 0xa8(%r14), %rax
movq (%rax,%rbx,8), %rax
movl 0x218(%rax), %eax
movq %rdx, 0x70(%rsp)
cmpq %rax, %rdx
jb 0x2cb2d
cmpl $0x0, 0x64(%r14)
je 0x2d2d6
xorl %ebx, %ebx
cmpl $0x0, 0x68(%r14)
je 0x2d2b3
xorl %r12d, %r12d
cmpl $0x0, 0x6c(%r14)
je 0x2d28c
xorl %r13d, %r13d
movq 0x8(%rsp), %rax
movq (%rax,%rbx,8), %rax
movq (%rax,%r12,8), %rax
movq (%rax,%r13,8), %r15
testq %r15, %r15
je 0x2d280
movq -0x8(%r15), %rax
testq %rax, %rax
je 0x2d274
shlq $0x3, %rax
leaq (%rax,%rax,2), %rbp
movq -0x18(%r15,%rbp), %rdi
testq %rdi, %rdi
je 0x2d26e
callq 0x7370
addq $-0x18, %rbp
jne 0x2d25f
addq $-0x8, %r15
movq %r15, %rdi
callq 0x7480
incq %r13
movl 0x6c(%r14), %eax
cmpq %rax, %r13
jb 0x2d238
movq 0x8(%rsp), %rax
movq (%rax,%rbx,8), %rax
movq (%rax,%r12,8), %rdi
testq %rdi, %rdi
je 0x2d2a3
callq 0x7480
incq %r12
movl 0x68(%r14), %eax
cmpq %rax, %r12
jb 0x2d22e
movq 0x8(%rsp), %rax
movq (%rax,%rbx,8), %rdi
testq %rdi, %rdi
je 0x2d2c6
callq 0x7480
incq %rbx
movl 0x64(%r14), %eax
cmpq %rax, %rbx
jb 0x2d220
movq 0x8(%rsp), %rdi
callq 0x7480
addq $0xd8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x41cf7(%rip), %rdi     # 0x6eff0
leaq 0x292a8(%rip), %rsi     # 0x565a8
movl $0x6, %edx
callq 0x7400
movq 0x41cdf(%rip), %rdi     # 0x6eff0
leaq 0x2b65c(%rip), %rsi     # 0x58974
movl $0x81, %edx
callq 0x7400
movl 0x10(%rsp), %eax
movl 0x14(%rsp), %ecx
movq 0x8(%rsp), %rdx
movq (%rdx,%rax,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x18(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x1c(%rsp), %ecx
leaq (%rcx,%rcx,2), %rcx
movq 0x8(%rax,%rcx,8), %rsi
subq (%rax,%rcx,8), %rsi
sarq $0x3, %rsi
movq 0x41c95(%rip), %rdi     # 0x6eff0
callq 0x7280
movq %rax, %rdi
callq 0x71c0
movq 0x41c61(%rip), %rdi     # 0x6efd0
callq 0x7430
jmp 0x2d411
movq %rbx, %r15
movq 0x41c6d(%rip), %rbx     # 0x6eff0
leaq 0x2921e(%rip), %rsi     # 0x565a8
movq %rbx, %rdi
callq 0x7390
leaq 0x2b531(%rip), %rsi     # 0x588ca
movq %rbx, %rdi
callq 0x7390
movq 0xa8(%r14), %rcx
movq (%rcx,%r15,8), %rcx
movq 0x258(%rcx), %rsi
movq %rax, %rdi
callq 0x70f0
leaq 0x2b553(%rip), %rsi     # 0x58915
movq %rax, %rdi
callq 0x7390
movq (%rbp), %rsi
movq %rax, %rdi
callq 0x70f0
jmp 0x2d3fd
movq 0x41c11(%rip), %rbx     # 0x6eff0
leaq 0x291c2(%rip), %rsi     # 0x565a8
movq %rbx, %rdi
callq 0x7390
leaq 0x2b52d(%rip), %rsi     # 0x58922
movq %rbx, %rdi
callq 0x7390
movq %rax, %rdi
callq 0x71c0
movq 0x41bc4(%rip), %rdi     # 0x6efd0
callq 0x7430
movl $0x1, %edi
callq 0x7440
jmp 0x2d41d
movq %rax, %rbx
jmp 0x2d43b
jmp 0x2d426
jmp 0x2d426
movq %rax, %rbx
movq 0xc0(%rsp), %rdi
testq %rdi, %rdi
je 0x2d43b
callq 0x7370
movq 0x50(%rsp), %rdi
testq %rdi, %rdi
je 0x2d44a
callq 0x7370
movq %rbx, %rdi
callq 0x7620