// File: CMU-SAFARI[P]MQSim/src/ssd/Address_Mapping_Unit_Page_Level.cpp
// Function: SSD_Components::Address_Mapping_Unit_Page_Level::Bring_to_CMT_for_preconditioning(unsigned short, unsigned long)
int Address_Mapping_Unit_Page_Level::Bring_to_CMT_for_preconditioning(stream_id_type stream_id, LPA_type lpa)
	{
		if (domains[stream_id]->GlobalMappingTable[lpa].PPA == NO_PPA) {
			PRINT_ERROR("Touching an unallocated logical address in preconditioning!")
		}

		if (domains[stream_id]->CMT->Exists(stream_id, lpa)) {
			return domains[stream_id]->No_of_inserted_entries_in_preconditioning;
		}

		if (domains[stream_id]->CMT->Check_free_slot_availability()) {
			domains[stream_id]->CMT->Reserve_slot_for_lpn(stream_id, lpa);
			domains[stream_id]->CMT->Insert_new_mapping_info(stream_id, lpa,
				domains[stream_id]->GlobalMappingTable[lpa].PPA, domains[stream_id]->GlobalMappingTable[lpa].WrittenStateBitmap);
		} else {
			LPA_type evicted_lpa;
			domains[stream_id]->CMT->Evict_one_slot(evicted_lpa);
			domains[stream_id]->CMT->Reserve_slot_for_lpn(stream_id, lpa);
			domains[stream_id]->CMT->Insert_new_mapping_info(stream_id, lpa,
				domains[stream_id]->GlobalMappingTable[lpa].PPA, domains[stream_id]->GlobalMappingTable[lpa].WrittenStateBitmap);
		}
		domains[stream_id]->No_of_inserted_entries_in_preconditioning++;
		
		return domains[stream_id]->No_of_inserted_entries_in_preconditioning;
	}

// Assembly:
subq $0x58, %rsp
movw %si, %ax
movq %rdi, 0x48(%rsp)
movw %ax, 0x46(%rsp)
movq %rdx, 0x38(%rsp)
movq 0x48(%rsp), %rax
movq %rax, (%rsp)
movq 0xa8(%rax), %rax
movzwl 0x46(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x20(%rax), %rax
imulq $0x18, 0x38(%rsp), %rcx
addq %rcx, %rax
cmpq $-0x1, (%rax)
jne 0x4cead
movq 0x8d187(%rip), %rdi     # 0xd9ff0
leaq 0x5da78(%rip), %rsi     # 0xaa8e8
callq 0x8440
movq 0x8d174(%rip), %rdi     # 0xd9ff0
leaq 0x5fa7b(%rip), %rsi     # 0xac8fe
callq 0x8440
movq %rax, %rdi
movq 0x8d0c6(%rip), %rsi     # 0xd9f58
callq 0x8480
movq 0x8d132(%rip), %rdi     # 0xd9fd0
callq 0x84f0
movl $0x1, %edi
callq 0x8500
movq (%rsp), %rax
movq 0xa8(%rax), %rax
movzwl 0x46(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x10(%rax), %rdi
movw 0x46(%rsp), %ax
movq 0x38(%rsp), %rdx
movzwl %ax, %esi
callq 0x59760
testb $0x1, %al
jne 0x4cedd
jmp 0x4cefd
movq (%rsp), %rax
movq 0xa8(%rax), %rax
movzwl 0x46(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x18(%rax), %eax
movl %eax, 0x54(%rsp)
jmp 0x4d0b1
movq (%rsp), %rax
movq 0xa8(%rax), %rax
movzwl 0x46(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x10(%rax), %rdi
callq 0x59800
testb $0x1, %al
jne 0x4cf23
jmp 0x4cfbf
movq (%rsp), %rax
movq 0xa8(%rax), %rax
movzwl 0x46(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x10(%rax), %rdi
movw 0x46(%rsp), %ax
movq 0x38(%rsp), %rdx
movzwl %ax, %esi
callq 0x4a960
movq (%rsp), %rsi
movq 0xa8(%rsi), %rax
movzwl 0x46(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x10(%rax), %rdi
movw 0x46(%rsp), %ax
movq 0x38(%rsp), %rdx
movq 0xa8(%rsi), %rcx
movzwl 0x46(%rsp), %r8d
movq (%rcx,%r8,8), %rcx
movq 0x20(%rcx), %rcx
imulq $0x18, 0x38(%rsp), %r8
addq %r8, %rcx
movq (%rcx), %rcx
movq 0xa8(%rsi), %rsi
movzwl 0x46(%rsp), %r8d
movq (%rsi,%r8,8), %rsi
movq 0x20(%rsi), %rsi
imulq $0x18, 0x38(%rsp), %r8
addq %r8, %rsi
movq 0x8(%rsi), %r8
movzwl %ax, %esi
callq 0x4a760
jmp 0x4d07d
movq (%rsp), %rax
movq 0xa8(%rax), %rax
movzwl 0x46(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x10(%rax), %rsi
leaq 0x8(%rsp), %rdi
leaq 0x30(%rsp), %rdx
callq 0x4ab80
movq (%rsp), %rax
movq 0xa8(%rax), %rax
movzwl 0x46(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x10(%rax), %rdi
movw 0x46(%rsp), %ax
movq 0x38(%rsp), %rdx
movzwl %ax, %esi
callq 0x4a960
movq (%rsp), %rsi
movq 0xa8(%rsi), %rax
movzwl 0x46(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x10(%rax), %rdi
movw 0x46(%rsp), %ax
movq 0x38(%rsp), %rdx
movq 0xa8(%rsi), %rcx
movzwl 0x46(%rsp), %r8d
movq (%rcx,%r8,8), %rcx
movq 0x20(%rcx), %rcx
imulq $0x18, 0x38(%rsp), %r8
addq %r8, %rcx
movq (%rcx), %rcx
movq 0xa8(%rsi), %rsi
movzwl 0x46(%rsp), %r8d
movq (%rsi,%r8,8), %rsi
movq 0x20(%rsi), %rsi
imulq $0x18, 0x38(%rsp), %r8
addq %r8, %rsi
movq 0x8(%rsi), %r8
movzwl %ax, %esi
callq 0x4a760
movq (%rsp), %rax
movq 0xa8(%rax), %rcx
movzwl 0x46(%rsp), %edx
movq (%rcx,%rdx,8), %rcx
movl 0x18(%rcx), %edx
addl $0x1, %edx
movl %edx, 0x18(%rcx)
movq 0xa8(%rax), %rax
movzwl 0x46(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0x18(%rax), %eax
movl %eax, 0x54(%rsp)
movl 0x54(%rsp), %eax
addq $0x58, %rsp
retq
nopw (%rax,%rax)