// File: /workspace/github_cpp_makefile_star2_O3/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::evictRecording(int, int, bool)
void  
Predictor::evictRecording(int set, int assoc_victim , bool inNVM)
{
	if(!m_trackError)
		return;

	CacheEntry* current=NULL;
		
	if(inNVM)
	{
		//Checking NVM MT tags
		//Choose the oldest victim for the missing tags to replace from the current one 	
		/*
		uint64_t cpt_longestime = m_NVM_missing_tags[set][0]->last_time_touched;
		uint64_t index_victim = 0;
		current = m_tableNVM[set][assoc_victim];
		for(unsigned i = 0 ; i < m_NVM_missing_tags[set].size(); i++)
		{
			if(!m_NVM_missing_tags[set][i]->isValid)
			{
				index_victim = i;
				break;
			}	
		
			if(cpt_longestime > m_NVM_missing_tags[set][i]->last_time_touched){
				cpt_longestime = m_NVM_missing_tags[set][i]->last_time_touched; 
				index_victim = i;
			}	
		}

		m_NVM_missing_tags[set][index_victim]->addr = current->address;
		m_NVM_missing_tags[set][index_victim]->last_time_touched = cpt_time;
		m_NVM_missing_tags[set][index_victim]->isValid = current->isValid;
		m_NVM_missing_tags[set][index_victim]->cost_value = current->cost_value;
		*/
	}
	else
	{
		//Checking SRAM MT tags
		//Choose the oldest victim for the missing tags to replace from the current one 	
		if(!simu_parameters.enableFullSRAMtraffic)
		{
			uint64_t cpt_longestime = m_SRAM_missing_tags[set][0]->last_time_touched;
			uint64_t index_victim = 0;
			current = m_tableSRAM[set][assoc_victim];
		
			for(unsigned i = 0 ; i < m_SRAM_missing_tags[set].size(); i++)
			{
				if(!m_SRAM_missing_tags[set][i]->isValid)
				{
					index_victim = i;
					break;
				}	
		
				if(cpt_longestime > m_SRAM_missing_tags[set][i]->last_time_touched){
					cpt_longestime = m_SRAM_missing_tags[set][i]->last_time_touched; 
					index_victim = i;
				}	
			}

			m_SRAM_missing_tags[set][index_victim]->addr = current->address;
			m_SRAM_missing_tags[set][index_victim]->last_time_touched = cpt_time;
			m_SRAM_missing_tags[set][index_victim]->isValid = current->isValid;
			m_SRAM_missing_tags[set][index_victim]->cost_value = current->cost_value;
		
			if(m_policy == "Cerebron")
			{
				for(unsigned i = 0 ; i < simu_parameters.PHC_features.size() ; i++)
					m_SRAM_missing_tags[set][index_victim]->features_hash[i] = current->PHC_allocation_pred[i].first;
		
				m_SRAM_missing_tags[set][index_victim]->missPC = current->missPC;
			}		
			else if(m_policy == "SimplePerceptron")
			{
				//for(unsigned i = 0 ; i < simu_parameters.simple_perceptron_features.size() ; i++)
				//	m_SRAM_missing_tags[set][index_victim]->features_hash[i] = current->simple_perceptron_hash[i];
				
				m_SRAM_missing_tags[set][index_victim]->missPC = current->missPC;
			}		
		}
	}
}

// Assembly:
movb 0x80(%rdi), %al
xorb $0x1, %al
orb %cl, %al
jne 0x26663
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
leaq 0x1fa42(%rip), %r13     # 0x45f50
cmpb $0x0, 0xdc(%r13)
jne 0x26655
movq %rdi, %rbx
movslq %esi, %r12
movq 0x8(%rdi), %rdi
movq 0x88(%rbx), %rcx
leaq (,%r12,8), %rax
leaq (%rax,%rax,2), %r8
movq (%rcx,%r8), %rax
movq 0x8(%rcx,%r8), %rcx
movq (%rax), %rsi
movq (%rdi), %rdi
movslq %edx, %rdx
movq (%rdi,%r8), %rdi
movq (%rdi,%rdx,8), %r15
subq %rax, %rcx
je 0x26594
sarq $0x3, %rcx
movq 0x8(%rsi), %rdx
movl $0x1, %r8d
xorl %edi, %edi
xorl %ebp, %ebp
movq (%rax,%rdi,8), %rsi
cmpb $0x1, 0x14(%rsi)
jne 0x26598
movq 0x8(%rsi), %rsi
cmpq %rsi, %rdx
cmovaeq %rsi, %rdx
cmovaq %rdi, %rbp
movl %r8d, %edi
incl %r8d
cmpq %rdi, %rcx
ja 0x2656a
movq (%rax,%rbp,8), %rsi
jmp 0x2659b
xorl %ebp, %ebp
jmp 0x2659b
movq %rdi, %rbp
movq 0x8(%r15), %rax
movq %rax, (%rsi)
leaq 0x1f96f(%rip), %rax     # 0x45f18
movq (%rax), %rax
movq %rax, 0x8(%rsi)
movb (%r15), %al
movb %al, 0x14(%rsi)
cvttsd2si 0x130(%r15), %eax
movl %eax, 0x10(%rsi)
leaq 0x40(%rbx), %r14
leaq 0xf24a(%rip), %rsi      # 0x35817
movq %r14, %rdi
callq 0x50f0
testl %eax, %eax
je 0x265f5
leaq 0xf240(%rip), %rsi      # 0x35820
movq %r14, %rdi
callq 0x50f0
testl %eax, %eax
jne 0x26655
movq 0x88(%rbx), %rcx
jmp 0x26641
movq 0x1d8(%r13), %rax
movq 0x1d0(%r13), %rdx
movq 0x88(%rbx), %rcx
subq %rdx, %rax
je 0x26641
sarq $0x5, %rax
movq 0xd0(%r15), %rdx
leaq (%r12,%r12,2), %rsi
movq (%rcx,%rsi,8), %rcx
movq (%rcx,%rbp,8), %rcx
movq 0x20(%rcx), %rsi
xorl %edi, %edi
movl (%rdx,%rdi,8), %r8d
movl %r8d, (%rsi,%rdi,4)
incq %rdi
movl %edi, %r8d
cmpq %r8, %rax
ja 0x2662c
jmp 0x2664d
leaq (%r12,%r12,2), %rax
movq (%rcx,%rax,8), %rax
movq (%rax,%rbp,8), %rcx
movq 0x20(%r15), %rax
movq %rax, 0x18(%rcx)
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq