// File: /workspace/github_cpp_makefile_star2_O3/sopanpatra160[P]OOO_Superscalar_Processor_Simulator/cache.cc
// Function: cache::read(unsigned int)
unsigned int cache::read(unsigned int addr){

	//printf("Entered read \n");
	unsigned int addr_ev;
	num_r++;
	//printf("Access no. %d\n",num_r);
	calc_tag_ind(addr);

	hit=0;
	miss=0;
		//printf("level = %d\n",lev);
	if(lev == 1){

		//#1 check for the element in all the blocks of that set
		for (unsigned int j=0; j<a; j++){
			if((tag_store[ind][j]==tag) && (valid_store[ind][j]==1)){
				if(rp==2)
					lru_update(ind,j);
				else if(rp==3)
					lfu_update_block(ind,j,1);
				hit=1;
				//printf("L1 Hit \n");				
				return 1;
			}
		}
		if(vptr != NULL){
			unsigned int tag_vc = vptr->calc_tag(addr); // tag reconstruction
			unsigned int found_vc=0;
			unsigned int found_loc = 0;
			for (unsigned int j=0; j<vptr->a; j++){
				if((vptr->tag_store[0][j]==tag_vc) && (vptr->valid_store[0][j]==1)){
					found_vc = 1;
					found_loc = j;
				}
			}
			if(found_vc==1){
				//unsigned int tag_vc = vptr->calc_tag(addr);
				num_swap+=1;
				swap(found_loc,0);
				return 1;
			}
		}
		num_miss_r++; // MISS in L1
		miss=1;
		//printf("L1 Miss \n");
		
		//#2 MISS in L1 but invalid case
		for (unsigned int j=0; j<a; j++){
			if(valid_store[ind][j]==0){
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][j]=tag;
				valid_store[ind][j]=1;
				if(rp==2)
					lru_update(ind,j);
				else if(rp ==3) 
					lfu_update_block(ind,j,0);

				return 0;
			}
		}
		
		//#3 MISS IN L1 FOR ALL BITS VALID : EVICTION

		if(rp==2){
			ev_blk= lru_block2evict(ind);
		}
		
		else if(rp==3){
			ev_blk= lfu_block2evict(ind);
		}

		//See if victim cache is present
		if(vptr != NULL){
			addr_ev = ev_blk_addr(ind,tag_store[ind][ev_blk]);
			
			vptr->insert_vc(addr_ev,dirty_store[ind][ev_blk]);
			if(next!=NULL)
				next->read(addr);
			tag_store[ind][ev_blk]=tag;
			dirty_store[ind][ev_blk]=0;
		}
		
		else if(vptr == NULL){
			if(dirty_store[ind][ev_blk]==0){
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][ev_blk]=tag;
			}
			if(dirty_store[ind][ev_blk]==1){
				num_wb+=1;
				addr_ev = ev_blk_addr(ind,tag_store[ind][ev_blk]);
				if(next!=NULL)
					next->write(addr_ev);
				if(next!=NULL)
					next->read(addr);
				tag_store[ind][ev_blk]=tag;
				dirty_store[ind][ev_blk]=0;
			}
		}

		//update LRU/LFU counters
		if(rp==2){
			lru_update(ind,ev_blk);
		}
		else if(rp==3){
			lfu_update_set(ind,ev_blk);
			lfu_update_block(ind,ev_blk,0);
		}
		return 0;
	}	

	else if(lev == 2){
		//#1 check for the element in all the blocks of that set
		for (unsigned int j=0; j<a; j++){
			if((tag_store[ind][j]==tag) && (valid_store[ind][j]==1)){
				if(rp==2)
					lru_update(ind,j);
				else if(rp==3)
					lfu_update_block(ind,j,1);
				hit=1;
				return 1;
			}
		}
		miss=1;	
		num_miss_r++;
		
		//#2 MISS in L1 but invalid case
		for (unsigned int j=0; j<a; j++){
			if(valid_store[ind][j]==0){
				tag_store[ind][j]=tag;
				valid_store[ind][j]=1;
				if(rp==2)
					lru_update(ind,j);
				else 
					lfu_update_block(ind,j,0);
			}
		}
		
		//#3 MISS IN L1 FOR ALL BITS VALID : EVICTION
		if(rp==2){
			ev_blk= lru_block2evict(ind);
		}
		//LFU policy
		else if(rp==3){
			ev_blk= lfu_block2evict(ind);
		}

		if(wp==0){
			if(dirty_store[ind][ev_blk]==0){
				tag_store[ind][ev_blk]=tag;
			}
			if(dirty_store[ind][ev_blk]==1){
				num_wb+=1;
				tag_store[ind][ev_blk]=tag;
				dirty_store[ind][ev_blk]=0;
			}
		}

		if(rp==2){
			lru_update(ind,ev_blk);
		}
		else if(rp==3){
			lfu_update_set(ind,ev_blk);
			lfu_update_block(ind,ev_blk,0);
		}
		return 0;
	}
	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
incl 0x80(%rdi)
movl %esi, %r14d
movl 0x58(%rdi), %eax
movl %eax, %ecx
shrl %cl, %esi
movl 0x24(%rdi), %r8d
movl 0x60(%rdi), %ecx
addl %eax, %ecx
shll %cl, %esi
shrl %cl, %esi
movl %esi, 0x68(%rdi)
movl 0x5c(%rdi), %edx
addl %eax, %edx
movl %r14d, %edi
movl %edx, %ecx
shrl %cl, %edi
movl %edi, 0x64(%rbx)
movq $0x0, 0x9c(%rbx)
xorl %ebp, %ebp
cmpl $0x1, %r8d
je 0x199c
cmpl $0x2, %r8d
jne 0x1f27
movl 0x18(%rbx), %eax
testq %rax, %rax
je 0x1acd
movl %esi, %edx
movq 0x28(%rbx), %rcx
movq 0x30(%rbx), %rsi
movq (%rcx,%rdx,8), %r8
xorl %ecx, %ecx
cmpl %edi, (%r8,%rcx,4)
jne 0x18cf
movq (%rsi,%rdx,8), %r9
cmpl $0x1, (%r9,%rcx,4)
je 0x1b65
incq %rcx
cmpq %rcx, %rax
jne 0x18ba
incl 0x84(%rbx)
movl $0x1, 0xa0(%rbx)
testl %eax, %eax
je 0x1add
movq 0x28(%rbx), %rax
movq 0x30(%rbx), %rcx
movq 0x50(%rbx), %rdx
movq 0x48(%rbx), %rsi
movq 0x40(%rbx), %rdi
xorl %r8d, %r8d
movl 0x68(%rbx), %r9d
movq (%rcx,%r9,8), %r10
cmpl $0x0, (%r10,%r8,4)
jne 0x1987
movl 0x64(%rbx), %r10d
movq (%rax,%r9,8), %r9
movl %r10d, (%r9,%r8,4)
movl 0x68(%rbx), %r9d
movq (%rcx,%r9,8), %r9
movl $0x1, (%r9,%r8,4)
movl 0x68(%rbx), %r9d
cmpl $0x2, 0x1c(%rbx)
jne 0x1978
movq (%rdi,%r9,8), %r9
movl 0x18(%rbx), %r10d
testl %r10d, %r10d
je 0x196e
movl (%r9,%r8,4), %r11d
xorl %r14d, %r14d
movl (%r9,%r14,4), %r15d
cmpl %r11d, %r15d
jae 0x1963
incl %r15d
movl %r15d, (%r9,%r14,4)
movl 0x18(%rbx), %r10d
incq %r14
movl %r10d, %r15d
cmpq %r15, %r14
jb 0x194f
movl $0x0, (%r9,%r8,4)
jmp 0x1987
movl (%rdx,%r9,4), %r10d
incl %r10d
movq (%rsi,%r9,8), %r9
movl %r10d, (%r9,%r8,4)
incq %r8
movl 0x18(%rbx), %r9d
cmpq %r9, %r8
jb 0x1906
jmp 0x1ae0
movl 0x18(%rbx), %r8d
testq %r8, %r8
je 0x19d3
movl %esi, %r9d
movq 0x28(%rbx), %rcx
movq 0x30(%rbx), %r10
movq (%rcx,%r9,8), %r11
xorl %ecx, %ecx
cmpl %edi, (%r11,%rcx,4)
jne 0x19cb
movq (%r10,%r9,8), %r15
cmpl $0x1, (%r15,%rcx,4)
je 0x1bb1
incq %rcx
cmpq %rcx, %r8
jne 0x19b6
movq 0x8(%rbx), %rdi
testq %rdi, %rdi
je 0x1a45
movl 0x5c(%rdi), %ecx
addl 0x58(%rdi), %ecx
movl %r14d, %r9d
shrl %cl, %r9d
movl 0x18(%rdi), %r10d
movl %r9d, 0x64(%rdi)
testq %r10, %r10
je 0x1a45
movq 0x28(%rdi), %rcx
movq (%rcx), %r11
xorl %r15d, %r15d
xorl %ecx, %ecx
xorl %r12d, %r12d
cmpl %r9d, (%r11,%r15,4)
jne 0x1a23
movq 0x30(%rdi), %r13
movq (%r13), %r13
movl (%r13,%r15,4), %r13d
cmpl $0x1, %r13d
cmovel %r13d, %r12d
cmovel %r15d, %ecx
incq %r15
cmpq %r15, %r10
jne 0x1a04
cmpl $0x1, %r12d
jne 0x1a45
incl 0x7c(%rbx)
movq %rbx, %rdi
movl %ecx, %esi
xorl %edx, %edx
callq 0x1ffc
jmp 0x1f22
incl 0x84(%rbx)
movl $0x1, 0xa0(%rbx)
testl %r8d, %r8d
je 0x1a7b
movq 0x30(%rbx), %rcx
movl %esi, %r9d
movq (%rcx,%r9,8), %r10
xorl %r15d, %r15d
cmpl $0x0, (%r10,%r15,4)
je 0x1bfa
incq %r15
cmpq %r15, %r8
jne 0x1a68
movl 0x1c(%rbx), %ecx
cmpl $0x3, %ecx
je 0x1d43
cmpl $0x2, %ecx
jne 0x1d7e
testl %r8d, %r8d
je 0x1d79
movq 0x40(%rbx), %rcx
movl %esi, %r9d
movq (%rcx,%r9,8), %r9
xorl %r10d, %r10d
xorl %r11d, %r11d
movl %r11d, %ecx
movl (%r9,%rcx,4), %r15d
movl %r10d, %ecx
cmpl (%r9,%r10,4), %r15d
jb 0x1abd
movl %r11d, %ecx
incq %r10
movl %ecx, %r11d
cmpq %r10, %r8
jne 0x1aaa
jmp 0x1d7b
movl $0x1, 0xa0(%rbx)
incl 0x84(%rbx)
xorl %r9d, %r9d
movl 0x1c(%rbx), %eax
cmpl $0x2, %eax
je 0x1b2b
cmpl $0x3, %eax
jne 0x1c90
testl %r9d, %r9d
je 0x1c8b
movl 0x68(%rbx), %eax
movq 0x48(%rbx), %rcx
movq (%rcx,%rax,8), %rcx
movl %r9d, %edx
xorl %esi, %esi
xorl %edi, %edi
movl %edi, %eax
movl (%rcx,%rax,4), %r8d
movl %esi, %eax
cmpl (%rcx,%rsi,4), %r8d
ja 0x1b1c
movl %edi, %eax
incq %rsi
movl %eax, %edi
cmpq %rsi, %rdx
jne 0x1b0c
jmp 0x1c8d
testl %r9d, %r9d
je 0x1c8b
movl 0x68(%rbx), %eax
movq 0x40(%rbx), %rcx
movq (%rcx,%rax,8), %rcx
movl %r9d, %edx
xorl %esi, %esi
xorl %edi, %edi
movl %edi, %eax
movl (%rcx,%rax,4), %r8d
movl %esi, %eax
cmpl (%rcx,%rsi,4), %r8d
jb 0x1b56
movl %edi, %eax
incq %rsi
movl %eax, %edi
cmpq %rsi, %rdx
jne 0x1b46
jmp 0x1c8d
movl 0x1c(%rbx), %esi
cmpl $0x3, %esi
je 0x1f03
cmpl $0x2, %esi
jne 0x1f18
movq 0x40(%rbx), %rsi
movq (%rsi,%rdx,8), %rdx
movl (%rdx,%rcx,4), %esi
xorl %edi, %edi
movl (%rdx,%rdi,4), %r8d
cmpl %esi, %r8d
jae 0x1b9a
incl %r8d
movl %r8d, (%rdx,%rdi,4)
movl 0x18(%rbx), %eax
incq %rdi
movl %eax, %r8d
cmpq %r8, %rdi
jb 0x1b87
movl $0x0, (%rdx,%rcx,4)
jmp 0x1f18
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x1f0d
cmpl $0x2, %eax
jne 0x1f18
movq 0x40(%rbx), %rax
movq (%rax,%r9,8), %rax
movl (%rax,%rcx,4), %edx
xorl %esi, %esi
movl (%rax,%rsi,4), %edi
cmpl %edx, %edi
jae 0x1be3
incl %edi
movl %edi, (%rax,%rsi,4)
movl 0x18(%rbx), %r8d
incq %rsi
movl %r8d, %edi
cmpq %rdi, %rsi
jb 0x1bd3
movl $0x0, (%rax,%rcx,4)
jmp 0x1f18
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x1c12
movl %r14d, %esi
callq 0x1840
movl 0x68(%rbx), %r9d
movq 0x30(%rbx), %rcx
movl 0x64(%rbx), %eax
movq 0x28(%rbx), %rdx
movq (%rdx,%r9,8), %rdx
movl %eax, (%rdx,%r15,4)
movl 0x68(%rbx), %eax
movq (%rcx,%rax,8), %rax
movl $0x1, (%rax,%r15,4)
movl 0x1c(%rbx), %eax
xorl %ebp, %ebp
cmpl $0x3, %eax
je 0x1f38
cmpl $0x2, %eax
jne 0x1f27
movl 0x68(%rbx), %eax
movq 0x40(%rbx), %rcx
movq (%rcx,%rax,8), %rax
movl 0x18(%rbx), %ecx
testl %ecx, %ecx
je 0x1f52
movl (%rax,%r15,4), %edx
xorl %esi, %esi
movl (%rax,%rsi,4), %edi
cmpl %edx, %edi
jae 0x1c72
incl %edi
movl %edi, (%rax,%rsi,4)
movl 0x18(%rbx), %ecx
incq %rsi
movl %ecx, %edi
cmpq %rdi, %rsi
jb 0x1c63
movl $0x0, (%rax,%r15,4)
xorl %ebp, %ebp
jmp 0x1f27
xorl %eax, %eax
movl %eax, 0x6c(%rbx)
cmpl $0x0, 0x20(%rbx)
jne 0x1ced
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %ecx
movq (%rax,%rcx,8), %rsi
movl 0x6c(%rbx), %edx
movl (%rsi,%rdx,4), %esi
testl %esi, %esi
jne 0x1cc6
movl 0x64(%rbx), %esi
movq 0x28(%rbx), %rdi
movq (%rdi,%rcx,8), %rcx
movl %esi, (%rcx,%rdx,4)
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %edx
movq (%rax,%rcx,8), %rsi
movl (%rsi,%rdx,4), %esi
cmpl $0x1, %esi
jne 0x1ced
incl 0x74(%rbx)
movl 0x64(%rbx), %esi
movq 0x28(%rbx), %rdi
movq (%rdi,%rcx,8), %rcx
movl %esi, (%rcx,%rdx,4)
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %edx
movq (%rax,%rcx,8), %rax
movl $0x0, (%rax,%rdx,4)
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x1e48
cmpl $0x2, %eax
jne 0x1f27
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %eax
movq 0x40(%rbx), %rdx
movq (%rdx,%rcx,8), %rcx
movl 0x18(%rbx), %edx
testl %edx, %edx
je 0x1e3c
movl (%rcx,%rax,4), %esi
xorl %edi, %edi
movl (%rcx,%rdi,4), %r8d
cmpl %esi, %r8d
jae 0x1d33
incl %r8d
movl %r8d, (%rcx,%rdi,4)
movl 0x18(%rbx), %edx
incq %rdi
movl %edx, %r8d
cmpq %r8, %rdi
jb 0x1d20
jmp 0x1e3c
testl %r8d, %r8d
je 0x1d79
movq 0x48(%rbx), %rcx
movl %esi, %r9d
movq (%rcx,%r9,8), %r9
xorl %r10d, %r10d
xorl %r11d, %r11d
movl %r11d, %ecx
movl (%r9,%rcx,4), %r15d
movl %r10d, %ecx
cmpl (%r9,%r10,4), %r15d
ja 0x1d6c
movl %r11d, %ecx
incq %r10
movl %ecx, %r11d
cmpq %r10, %r8
jne 0x1d59
jmp 0x1d7b
xorl %ecx, %ecx
movl %ecx, 0x6c(%rbx)
movl %esi, %r9d
movl 0x6c(%rbx), %r10d
testq %rdi, %rdi
je 0x1e77
movq 0x28(%rbx), %rcx
movq (%rcx,%r9,8), %rcx
movl (%rcx,%r10,4), %r8d
movl %eax, %ecx
shll %cl, %esi
movl %edx, %ecx
shll %cl, %r8d
movq 0x38(%rbx), %rax
orl %esi, %r8d
movq (%rax,%r9,8), %rax
movl (%rax,%r10,4), %edx
movl %r8d, %esi
callq 0x224e
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x1dca
movl %r14d, %esi
callq 0x1840
movl 0x64(%rbx), %eax
movq 0x28(%rbx), %rcx
movl 0x68(%rbx), %edx
movq (%rcx,%rdx,8), %rcx
movl 0x6c(%rbx), %edx
movl %eax, (%rcx,%rdx,4)
movq 0x38(%rbx), %rax
movl 0x68(%rbx), %ecx
movq (%rax,%rcx,8), %rax
movl 0x6c(%rbx), %ecx
movl $0x0, (%rax,%rcx,4)
movl 0x1c(%rbx), %eax
cmpl $0x3, %eax
je 0x1e48
cmpl $0x2, %eax
jne 0x1f27
movl 0x68(%rbx), %ecx
movl 0x6c(%rbx), %eax
movq 0x40(%rbx), %rdx
movq (%rdx,%rcx,8), %rcx
movl 0x18(%rbx), %edx
testl %edx, %edx
je 0x1e3c
movl (%rcx,%rax,4), %esi
xorl %edi, %edi
movl (%rcx,%rdi,4), %r8d
cmpl %esi, %r8d
jae 0x1e31
incl %r8d
movl %r8d, (%rcx,%rdi,4)
movl 0x18(%rbx), %edx
incq %rdi
movl %edx, %r8d
cmpq %r8, %rdi
jb 0x1e1e
movl $0x0, (%rcx,%rax,4)
jmp 0x1f27
movl 0x68(%rbx), %eax
movl 0x6c(%rbx), %ecx
movq 0x48(%rbx), %rdx
movq 0x50(%rbx), %rsi
movq (%rdx,%rax,8), %rdi
movl (%rdi,%rcx,4), %ecx
movl %ecx, (%rsi,%rax,4)
movl 0x68(%rbx), %eax
movl 0x6c(%rbx), %ecx
movl (%rsi,%rax,4), %esi
incl %esi
movq (%rdx,%rax,8), %rax
movl %esi, (%rax,%rcx,4)
jmp 0x1f27
movq 0x38(%rbx), %rax
movq (%rax,%r9,8), %rcx
movl (%rcx,%r10,4), %ecx
testl %ecx, %ecx
jne 0x1ec5
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x1ea3
movl %r14d, %esi
callq 0x1840
movl 0x68(%rbx), %r9d
movl 0x6c(%rbx), %r10d
movq 0x38(%rbx), %rax
movl 0x64(%rbx), %ecx
movq 0x28(%rbx), %rdx
movq (%rdx,%r9,8), %rdx
movl %ecx, (%rdx,%r10,4)
movl 0x68(%rbx), %r9d
movl 0x6c(%rbx), %r10d
movq (%rax,%r9,8), %rax
movl (%rax,%r10,4), %ecx
movl %r9d, %esi
cmpl $0x1, %ecx
jne 0x1df3
incl 0x74(%rbx)
movq (%rbx), %rdi
testq %rdi, %rdi
je 0x1dca
movq 0x28(%rbx), %rax
movq (%rax,%r9,8), %rax
movl (%rax,%r10,4), %edx
movl 0x58(%rbx), %eax
movl 0x5c(%rbx), %ecx
addl %eax, %ecx
shll %cl, %edx
movl %eax, %ecx
shll %cl, %esi
orl %edx, %esi
callq 0x243c
jmp 0x1dba
movq 0x48(%rbx), %rax
movq (%rax,%rdx,8), %rax
jmp 0x1f15
movq 0x48(%rbx), %rax
movq (%rax,%r9,8), %rax
incl (%rax,%rcx,4)
movl $0x1, 0x9c(%rbx)
movl $0x1, %ebp
movl %ebp, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movl 0x68(%rbx), %eax
movq 0x48(%rbx), %rcx
movq 0x50(%rbx), %rdx
movl (%rdx,%rax,4), %edx
incl %edx
movq (%rcx,%rax,8), %rax
movl %edx, (%rax,%r15,4)
jmp 0x1f27
movl $0x0, (%rax,%r15,4)
jmp 0x1f27