// File: /workspace/github_cpp_makefile_star2_O2/CMU-SAFARI[P]MQSim/src/ssd/Address_Mapping_Unit_Page_Level.cpp
// Function: SSD_Components::Address_Mapping_Unit_Page_Level::Allocate_address_for_preconditioning(unsigned short, std::map<unsigned long, unsigned long, std::less<unsigned long>, std::allocator<std::pair<unsigned long const, unsigned long>>>&, std::vector<double, std::allocator<double>>&)
void Address_Mapping_Unit_Page_Level::Allocate_address_for_preconditioning(const stream_id_type stream_id, std::map<LPA_type, page_status_type>& lpa_list, std::vector<double>& steady_state_distribution)
	{
		int idx = 0;
		std::vector<LPA_type>**** assigned_lpas = new std::vector<LPA_type>***[channel_count];
		for (unsigned int channel_cntr = 0; channel_cntr < channel_count; channel_cntr++) {
			assigned_lpas[channel_cntr] = new std::vector<LPA_type>**[chip_no_per_channel];
			for (unsigned int chip_cntr = 0; chip_cntr < chip_no_per_channel; chip_cntr++) {
				assigned_lpas[channel_cntr][chip_cntr] = new std::vector<LPA_type>*[die_no_per_chip];
				for (unsigned int die_cntr = 0; die_cntr < die_no_per_chip; die_cntr++) {
					assigned_lpas[channel_cntr][chip_cntr][die_cntr] = new std::vector<LPA_type>[plane_no_per_die];
				}
			}
		}

		//First: distribute LPAs to planes
		NVM::FlashMemory::Physical_Page_Address plane_address;
		for (auto lpa = lpa_list.begin(); lpa != lpa_list.end();) {
			if ((*lpa).first >= domains[stream_id]->Total_logical_pages_no) {
				PRINT_ERROR("Out of range LPA specified for preconditioning! LPA shoud be smaller than " << domains[stream_id]->Total_logical_pages_no << ", but it is " << (*lpa).first)
			}
			PPA_type ppa = domains[stream_id]->Get_ppa_for_preconditioning(stream_id, (*lpa).first);
			if (ppa != NO_LPA) {
				PRINT_ERROR("Calling address allocation for a previously allocated LPA during preconditioning!")
			}
			allocate_plane_for_preconditioning(stream_id, (*lpa).first, plane_address);
			if (LPA_type(Utils::Logical_Address_Partitioning_Unit::Get_share_of_physcial_pages_in_plane(plane_address.ChannelID, plane_address.ChipID, plane_address.DieID, plane_address.PlaneID) * page_no_per_plane)
				> assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size()) {
				assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].push_back((*lpa).first);
				lpa++;
			} else {
				lpa_list.erase(lpa++);
			}
		}

		//Second: distribute LPAs within planes based on the steady-state status of blocks
		//unsigned int safe_guard_band = ftl->GC_and_WL_Unit->Get_minimum_number_of_free_pages_before_GC();
		for (unsigned int channel_cntr = 0; channel_cntr < domains[stream_id]->Channel_no; channel_cntr++) {
			for (unsigned int chip_cntr = 0; chip_cntr < domains[stream_id]->Chip_no; chip_cntr++) {
				for (unsigned int die_cntr = 0; die_cntr < domains[stream_id]->Die_no; die_cntr++) {
					for (unsigned int plane_cntr = 0; plane_cntr < domains[stream_id]->Plane_no; plane_cntr++) {
						plane_address.ChannelID = domains[stream_id]->Channel_ids[channel_cntr];
						plane_address.ChipID = domains[stream_id]->Chip_ids[chip_cntr];
						plane_address.DieID = domains[stream_id]->Die_ids[die_cntr];
						plane_address.PlaneID = domains[stream_id]->Plane_ids[plane_cntr];

						unsigned int physical_block_consumption_goal = (unsigned int)(double(block_no_per_plane - ftl->GC_and_WL_Unit->Get_minimum_number_of_free_pages_before_GC() / 2)
							* Utils::Logical_Address_Partitioning_Unit::Get_share_of_physcial_pages_in_plane(plane_address.ChannelID, plane_address.ChipID, plane_address.DieID, plane_address.PlaneID));

						//Adjust the average
						double model_average = 0;
						std::vector<double> adjusted_steady_state_distribution;
						//Check if probability distribution is correct 
						for (unsigned int i = 0; i <= pages_no_per_block; i++) {
							model_average += steady_state_distribution[i] * double(i) / double(pages_no_per_block);
							adjusted_steady_state_distribution.push_back(steady_state_distribution[i]);
						}
						double real_average = double(assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size()) / (physical_block_consumption_goal * pages_no_per_block);
						if (std::abs(model_average - real_average) * pages_no_per_block > 0.9999) {
							int displacement_index = int((real_average - model_average) * pages_no_per_block);
							if (displacement_index > 0) {
								for (int i = 0; i < displacement_index; i++) {
									adjusted_steady_state_distribution[i] = 0;
								}
								for (int i = displacement_index; i < int(pages_no_per_block); i++) {
									adjusted_steady_state_distribution[i] = steady_state_distribution[i - displacement_index];
								}
							} else {
								displacement_index *= -1;
								for (int i = 0; i < int(pages_no_per_block) - displacement_index; i++) {
									adjusted_steady_state_distribution[i] = steady_state_distribution[i + displacement_index];
								}
								for (int i = int(pages_no_per_block) - displacement_index; i < int(pages_no_per_block); i++) {
									adjusted_steady_state_distribution[i] = 0;
								}
							}
						}

						//Check if it is possible to find a PPA for each LPA with current proability assignments 
						unsigned int total_valid_pages = 0;
						for (int valid_pages_in_block = pages_no_per_block; valid_pages_in_block >= 0; valid_pages_in_block--) {
							total_valid_pages += valid_pages_in_block * (unsigned int)(adjusted_steady_state_distribution[valid_pages_in_block] * physical_block_consumption_goal);
						}
						unsigned int pages_need_PPA = 0;//The number of LPAs that remain unassigned due to imperfect probability assignments
						if (total_valid_pages < assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size()) {
							pages_need_PPA = (unsigned int)(assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size()) - total_valid_pages;
						}
						
						unsigned int remaining_blocks_to_consume = physical_block_consumption_goal;
						for (int valid_pages_in_block = pages_no_per_block; valid_pages_in_block >= 0; valid_pages_in_block--) {
							unsigned int block_no_with_x_valid_page = (unsigned int)(adjusted_steady_state_distribution[valid_pages_in_block] * physical_block_consumption_goal);
							if (block_no_with_x_valid_page > 0 && pages_need_PPA > 0) {
								block_no_with_x_valid_page += (pages_need_PPA / valid_pages_in_block) + (pages_need_PPA % valid_pages_in_block == 0 ? 0 : 1);
								pages_need_PPA = 0;
							}

							if (block_no_with_x_valid_page <= remaining_blocks_to_consume) {
								remaining_blocks_to_consume -= block_no_with_x_valid_page;
							} else {
								block_no_with_x_valid_page = remaining_blocks_to_consume;
								remaining_blocks_to_consume = 0;
							}

							for (unsigned int block_cntr = 0; block_cntr < block_no_with_x_valid_page; block_cntr++) {
								//Assign physical addresses
								std::vector<NVM::FlashMemory::Physical_Page_Address> addresses;
								if (assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size() < valid_pages_in_block) {
									valid_pages_in_block = int(assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size());
								}
								for (int page_cntr = 0; page_cntr < valid_pages_in_block; page_cntr++) {
									NVM::FlashMemory::Physical_Page_Address addr(plane_address.ChannelID, plane_address.ChipID, plane_address.DieID, plane_address.PlaneID, 0, 0);
									addresses.push_back(addr);
								}
								block_manager->Allocate_Pages_in_block_and_invalidate_remaining_for_preconditioning(stream_id, plane_address, addresses);

								//Update mapping table
								for (auto const &address : addresses) {
									LPA_type lpa = assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].back();
									assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].pop_back();
									PPA_type ppa = Convert_address_to_ppa(address);
									flash_controller->Change_memory_status_preconditioning(&address, &lpa);
									domains[stream_id]->GlobalMappingTable[lpa].PPA = ppa;
									domains[stream_id]->GlobalMappingTable[lpa].WrittenStateBitmap = (*lpa_list.find(lpa)).second;
									domains[stream_id]->GlobalMappingTable[lpa].TimeStamp = 0;
								}
							}
						}
						if (assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size() > 0) {
							PRINT_ERROR("It is not possible to assign PPA to all LPAs in Allocate_address_for_preconditioning! It is not safe to continue preconditioning." << assigned_lpas[plane_address.ChannelID][plane_address.ChipID][plane_address.DieID][plane_address.PlaneID].size())
						}
					}
				}
			}
		}

		for (unsigned int channel_cntr = 0; channel_cntr < channel_count; channel_cntr++) {
			for (unsigned int chip_cntr = 0; chip_cntr < chip_no_per_channel; chip_cntr++) {
				for (unsigned int die_cntr = 0; die_cntr < die_no_per_chip; die_cntr++) {
					delete[] assigned_lpas[channel_cntr][chip_cntr][die_cntr];
				}
				delete[] assigned_lpas[channel_cntr][chip_cntr];
			}
			delete[] assigned_lpas[channel_cntr];
		}
		delete[] assigned_lpas;
	}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xe8, %rsp
movq %rcx, 0x70(%rsp)
movq %rdx, 0x48(%rsp)
movl %esi, 0x58(%rsp)
movq %rdi, %r14
movl 0x64(%rdi), %eax
movq %rax, 0x68(%rsp)
leaq (,%rax,8), %rdi
callq 0x7030
movq %rax, 0x20(%rsp)
movl 0x68(%r14), %eax
movq %rax, 0x38(%rsp)
leaq (,%rax,8), %rax
movq %rax, 0x60(%rsp)
xorl %ebx, %ebx
cmpq 0x68(%rsp), %rbx
je 0x236ad
movq 0x60(%rsp), %rdi
callq 0x7030
movq %rax, %rcx
movq 0x20(%rsp), %rax
movq %rbx, 0x78(%rsp)
movq %rcx, 0x30(%rsp)
movq %rcx, (%rax,%rbx,8)
movl 0x6c(%r14), %eax
movq %rax, 0x40(%rsp)
leaq (,%rax,8), %rax
movq %rax, 0x50(%rsp)
xorl %ebp, %ebp
cmpq 0x38(%rsp), %rbp
je 0x236a0
movq 0x50(%rsp), %rdi
callq 0x7030
movq 0x30(%rsp), %rcx
movq %rax, (%rcx,%rbp,8)
movl 0x70(%r14), %r12d
imulq $0x18, %r12, %rcx
leaq 0x8(%rcx), %r15
leaq -0x18(%rcx), %rax
xorl %edx, %edx
pushq $0x18
popq %rsi
divq %rsi
negq %rdx
leaq (%rcx,%rdx), %rax
addq $-0x18, %rax
addq $0x18, %rax
movq %rax, 0x28(%rsp)
xorl %r13d, %r13d
cmpq %r13, 0x40(%rsp)
je 0x23698
movq %r15, %rdi
callq 0x7030
leaq 0x8(%rax), %rbx
movq %r12, (%rax)
testq %r12, %r12
je 0x23686
movq %rbx, %rdi
xorl %esi, %esi
movq 0x28(%rsp), %rdx
callq 0x7220
movq 0x30(%rsp), %rax
movq (%rax,%rbp,8), %rax
movq %rbx, (%rax,%r13,8)
incq %r13
jmp 0x2365c
incq %rbp
jmp 0x2360f
movq 0x78(%rsp), %rbx
incq %rbx
jmp 0x235cc
xorpd %xmm0, %xmm0
movq %rsp, %r12
movapd %xmm0, (%r12)
andq $0x0, 0x10(%r12)
movq 0x48(%rsp), %rax
movq 0x18(%rax), %rbp
leaq 0x8(%rax), %rbx
movzwl 0x58(%rsp), %r13d
cmpq %rbx, %rbp
je 0x237d7
leaq 0x20(%rbp), %r15
movq 0x20(%rbp), %rdx
movq 0xa8(%r14), %rax
movq (%rax,%r13,8), %rax
cmpq 0x258(%rax), %rdx
jae 0x23e65
movq 0x20(%rax), %rax
imulq $0x18, %rdx, %rcx
cmpq $-0x1, (%rax,%rcx)
jne 0x23e3e
movq %r14, %rdi
movl %r13d, %esi
movq %r12, %rcx
callq 0x23f82
movl (%rsp), %edi
movl 0x4(%rsp), %esi
movl 0x8(%rsp), %edx
movl 0xc(%rsp), %ecx
callq 0x40eb6
movl 0x94(%r14), %eax
cvtsi2sd %rax, %xmm1
mulsd %xmm0, %xmm1
cvttsd2si %xmm1, %rax
movq %rax, %rcx
subsd 0x1f8ff(%rip), %xmm1    # 0x43050
cvttsd2si %xmm1, %rdx
sarq $0x3f, %rcx
andq %rcx, %rdx
orq %rax, %rdx
movl (%rsp), %eax
movl 0x4(%rsp), %ecx
movq 0x20(%rsp), %rsi
movq (%rsi,%rax,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x8(%rsp), %ecx
movq (%rax,%rcx,8), %rdi
movl 0xc(%rsp), %eax
imulq $0x18, %rax, %rax
movq 0x8(%rdi,%rax), %rcx
subq (%rdi,%rax), %rcx
sarq $0x3, %rcx
cmpq %rdx, %rcx
jae 0x237b1
addq %rax, %rdi
movq %r15, %rsi
callq 0x26538
movq %rbp, %rdi
callq 0x7280
movq %rax, %rbp
jmp 0x236d3
movq %rbp, %rdi
callq 0x7280
movq %rbx, %r15
movq %rax, %rbx
movq 0x48(%rsp), %rdi
movq %rbp, %rsi
callq 0x27ff2
movq %rbx, %rbp
movq %r15, %rbx
jmp 0x236d3
movq 0xa8(%r14), %rax
movq (%rax,%r13,8), %rcx
leaq 0xa0(%rsp), %rbp
xorl %esi, %esi
movl 0x218(%rcx), %edx
cmpq %rdx, %rsi
jae 0x23d7a
xorl %edi, %edi
movq %rsi, 0xe0(%rsp)
movl 0x228(%rcx), %edx
cmpq %rdx, %rdi
jae 0x23d72
movq (%rax,%r13,8), %rcx
xorl %r8d, %r8d
movq %rdi, 0x58(%rsp)
movl 0x238(%rcx), %edx
cmpq %rdx, %r8
jae 0x23d6a
xorl %r9d, %r9d
movq %r8, 0x60(%rsp)
movq (%rax,%r13,8), %rcx
movl 0x248(%rcx), %edx
cmpq %rdx, %r9
jae 0x23d62
movq 0x210(%rcx), %rax
movl (%rax,%rsi,4), %eax
movl %eax, (%rsp)
movq 0x220(%rcx), %rax
movl (%rax,%rdi,4), %eax
movl %eax, 0x4(%rsp)
movq 0x230(%rcx), %rax
movl (%rax,%r8,4), %eax
movl %eax, 0x8(%rsp)
movq 0x240(%rcx), %rax
movq %r9, 0x68(%rsp)
movl (%rax,%r9,4), %eax
movl %eax, 0xc(%rsp)
movl 0x74(%r14), %ebx
movq 0x30(%r14), %rax
movq 0x48(%rax), %rdi
callq 0x337a8
shrl %eax
subl %eax, %ebx
cvtsi2sd %rbx, %xmm0
movsd %xmm0, 0x30(%rsp)
movl (%rsp), %edi
movl 0x4(%rsp), %esi
movl 0x8(%rsp), %edx
movl 0xc(%rsp), %ecx
callq 0x40eb6
mulsd 0x30(%rsp), %xmm0
cvttsd2si %xmm0, %rax
movq %rax, 0x28(%rsp)
andq $0x0, 0x90(%rsp)
xorpd %xmm0, %xmm0
movapd %xmm0, 0x80(%rsp)
xorl %r15d, %r15d
xorpd %xmm3, %xmm3
movl 0x78(%r14), %r12d
movl %r12d, %ebx
cmpl %r12d, %r15d
ja 0x23948
movsd %xmm3, 0x30(%rsp)
movl %r15d, %r12d
movq 0x70(%rsp), %rax
movq (%rax), %rax
leaq (%rax,%r12,8), %rsi
movsd (%rsi), %xmm0
movsd %xmm0, 0x40(%rsp)
leaq 0x80(%rsp), %rdi
callq 0x26558
cvtsi2sd %r12, %xmm0
cvtsi2sd %rbx, %xmm1
movsd 0x40(%rsp), %xmm2
mulsd %xmm0, %xmm2
divsd %xmm1, %xmm2
movsd 0x30(%rsp), %xmm3
addsd %xmm2, %xmm3
incl %r15d
jmp 0x238e9
movl (%rsp), %eax
movl 0x4(%rsp), %ecx
movq 0x20(%rsp), %rdx
movq (%rdx,%rax,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x8(%rsp), %ecx
movq (%rax,%rcx,8), %rcx
movl 0xc(%rsp), %eax
imulq $0x18, %rax, %rdx
movq 0x8(%rcx,%rdx), %rax
subq (%rcx,%rdx), %rax
sarq $0x3, %rax
movq %rax, %xmm1
punpckldq 0x21e4a(%rip), %xmm1 # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
subpd 0x21e52(%rip), %xmm1    # 0x457e0
movapd %xmm1, %xmm0
unpckhpd %xmm1, %xmm0            # xmm0 = xmm0[1],xmm1[1]
addsd %xmm1, %xmm0
movl %r12d, %ecx
imull 0x28(%rsp), %ecx
cvtsi2sd %rcx, %xmm1
divsd %xmm1, %xmm0
movapd %xmm3, %xmm2
subsd %xmm0, %xmm2
cvtsi2sd %rbx, %xmm1
andpd 0x22a40(%rip), %xmm2    # 0x46400
mulsd %xmm1, %xmm2
ucomisd 0x228d4(%rip), %xmm2    # 0x462a0
leaq 0xc0(%rsp), %r15
jbe 0x23a8b
movslq %r12d, %rcx
subsd %xmm3, %xmm0
mulsd %xmm1, %xmm0
cvttsd2si %xmm0, %edx
testl %edx, %edx
jle 0x23a2f
movq 0x80(%rsp), %rsi
movl %edx, %edx
xorl %edi, %edi
cmpq %rdi, %rdx
je 0x23a08
andq $0x0, (%rsi,%rdi,8)
incq %rdi
jmp 0x239f9
movq 0x70(%rsp), %rsi
movq (%rsi), %rsi
movq 0x80(%rsp), %rdi
cmpq %rcx, %rdx
jge 0x23a8b
movsd (%rsi), %xmm0
movsd %xmm0, (%rdi,%rdx,8)
incq %rdx
addq $0x8, %rsi
jmp 0x23a18
leal (%r12,%rdx), %esi
movq 0x70(%rsp), %rdi
movq (%rdi), %rdi
movq 0x80(%rsp), %r8
testl %esi, %esi
movl $0x0, %r9d
cmovgl %esi, %r9d
negl %edx
xorl %r10d, %r10d
cmpq %r10, %r9
je 0x23a71
leal (%rdx,%r10), %r11d
movslq %r11d, %r11
movsd (%rdi,%r11,8), %xmm0
movsd %xmm0, (%r8,%r10,8)
incq %r10
jmp 0x23a54
movq 0x80(%rsp), %rdx
movslq %esi, %rsi
cmpq %rcx, %rsi
jge 0x23a8b
andq $0x0, (%rdx,%rsi,8)
incq %rsi
jmp 0x23a7c
movq 0x80(%rsp), %rcx
movl 0x28(%rsp), %edx
cvtsi2sd %rdx, %xmm0
movsd %xmm0, 0x50(%rsp)
xorl %edx, %edx
movl %r12d, %esi
testl %esi, %esi
js 0x23ac8
movl %esi, %edi
movsd (%rcx,%rdi,8), %xmm0
mulsd 0x50(%rsp), %xmm0
cvttsd2si %xmm0, %rdi
imull %esi, %edi
addl %edx, %edi
decl %esi
movl %edi, %edx
jmp 0x23aa7
movl %edx, %ecx
movl %eax, %esi
subl %edx, %esi
cmpq %rcx, %rax
movl $0x0, %eax
cmovbel %eax, %esi
movl %esi, %eax
testl %r12d, %r12d
js 0x23cfc
movl %eax, 0x38(%rsp)
movl %r12d, %eax
movq 0x80(%rsp), %rcx
movsd (%rcx,%rax,8), %xmm0
mulsd 0x50(%rsp), %xmm0
cvttsd2si %xmm0, %rcx
testl %ecx, %ecx
je 0x23b26
movl 0x38(%rsp), %eax
testl %eax, %eax
je 0x23b26
xorl %edx, %edx
divl %r12d
addl %ecx, %eax
cmpl $0x1, %edx
sbbl $-0x1, %eax
movl $0x0, 0x38(%rsp)
movl %eax, %ecx
xorl %esi, %esi
movq 0x28(%rsp), %rax
movl %eax, %edx
subl %ecx, %edx
cmovbl %esi, %edx
movl %edx, 0x78(%rsp)
cmoval %ecx, %eax
movq %rax, 0x28(%rsp)
cmpl 0x28(%rsp), %esi
je 0x23ce7
movl %esi, 0x30(%rsp)
xorpd %xmm0, %xmm0
movapd %xmm0, 0xc0(%rsp)
andq $0x0, 0xd0(%rsp)
movl (%rsp), %eax
movl 0x4(%rsp), %ecx
movq 0x20(%rsp), %rdx
movq (%rdx,%rax,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x8(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0xc(%rsp), %ecx
imulq $0x18, %rcx, %rcx
movq 0x8(%rax,%rcx), %rdx
subq (%rax,%rcx), %rdx
sarq $0x3, %rdx
movslq %r12d, %rax
cmpq %rax, %rdx
cmovbl %edx, %r12d
testl %r12d, %r12d
movl $0x0, %ebx
cmovgl %r12d, %ebx
subl $0x1, %ebx
jb 0x23bd4
movapd (%rsp), %xmm0
movapd %xmm0, 0xa0(%rsp)
andq $0x0, 0xb0(%rsp)
movq %r15, %rdi
movq %rbp, %rsi
callq 0x2657a
jmp 0x23bab
movq 0x40(%r14), %rdi
movq (%rdi), %rax
movl %r13d, %esi
movq %rsp, %rdx
movq %r15, %rcx
callq *0x28(%rax)
movq %r12, 0x40(%rsp)
movq 0xc0(%rsp), %r15
movq 0xc8(%rsp), %r12
cmpq %r12, %r15
je 0x23cc7
movl (%rsp), %eax
movl 0x4(%rsp), %ecx
movq 0x20(%rsp), %rdx
movq (%rdx,%rax,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x8(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0xc(%rsp), %ecx
imulq $0x18, %rcx, %rcx
movq 0x8(%rax,%rcx), %rdx
movq -0x8(%rdx), %rsi
addq $-0x8, %rdx
movq %rsi, 0xa0(%rsp)
movq %rdx, 0x8(%rax,%rcx)
movq (%r14), %rax
movq %r14, %rdi
movq %r15, %rsi
callq *0x90(%rax)
movq %rax, %rbx
movq 0x38(%r14), %rdi
movq (%rdi), %rax
movq %r15, %rsi
movq %rbp, %rdx
callq *0x20(%rax)
movq 0xa8(%r14), %rax
movq (%rax,%r13,8), %rax
movq 0x20(%rax), %rax
imulq $0x18, 0xa0(%rsp), %rcx
movq %rbx, (%rax,%rcx)
movq 0x48(%rsp), %rdi
movq %rbp, %rsi
callq 0x2833a
movq 0x28(%rax), %rax
movq 0xa8(%r14), %rcx
movq (%rcx,%r13,8), %rcx
imulq $0x18, 0xa0(%rsp), %rdx
movq 0x20(%rcx), %rcx
movq %rax, 0x8(%rcx,%rdx)
imulq $0x18, 0xa0(%rsp), %rax
andq $0x0, 0x10(%rcx,%rax)
addq $0x18, %r15
jmp 0x23bfc
leaq 0xc0(%rsp), %r15
movq %r15, %rdi
callq 0x278fc
movl 0x30(%rsp), %esi
incl %esi
movq 0x40(%rsp), %r12
jmp 0x23b40
decl %r12d
movl 0x78(%rsp), %eax
movq %rax, 0x28(%rsp)
movl 0x38(%rsp), %eax
jmp 0x23adb
movl (%rsp), %eax
movl 0x4(%rsp), %ecx
movq 0x20(%rsp), %rdx
movq (%rdx,%rax,8), %rax
movq (%rax,%rcx,8), %rax
movl 0x8(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movl 0xc(%rsp), %ecx
imulq $0x18, %rcx, %rcx
movq 0x8(%rax,%rcx), %rdx
cmpq (%rax,%rcx), %rdx
jne 0x23eda
leaq 0x80(%rsp), %rdi
callq 0x2803e
movq 0x68(%rsp), %r9
incq %r9
movq 0xa8(%r14), %rax
movq 0xe0(%rsp), %rsi
movq 0x58(%rsp), %rdi
movq 0x60(%rsp), %r8
jmp 0x23837
incq %r8
jmp 0x23820
incq %rdi
jmp 0x23805
incq %rsi
jmp 0x237ec
xorl %ebx, %ebx
movl 0x64(%r14), %eax
cmpq %rax, %rbx
jae 0x23e22
xorl %r12d, %r12d
movl 0x68(%r14), %eax
cmpq %rax, %r12
jae 0x23e07
xorl %r13d, %r13d
movq %r12, 0x48(%rsp)
movl 0x6c(%r14), %eax
movq 0x20(%rsp), %rcx
movq (%rcx,%rbx,8), %rcx
movq (%rcx,%r12,8), %rdi
cmpq %rax, %r13
jae 0x23df8
movq (%rdi,%r13,8), %r15
testq %r15, %r15
je 0x23df3
movq %rbx, %r12
movq -0x8(%r15), %rax
testq %rax, %rax
je 0x23ddf
leaq -0x18(%r15), %rbp
imulq $0x18, %rax, %rbx
leaq (%rbx,%rbp), %rdi
callq 0x11f7a
addq $-0x18, %rbx
jne 0x23dd0
addq $-0x8, %r15
movq %r15, %rdi
callq 0x7430
movq %r12, %rbx
movq 0x48(%rsp), %r12
incq %r13
jmp 0x23d9d
testq %rdi, %rdi
je 0x23e02
callq 0x7430
incq %r12
jmp 0x23d8c
movq 0x20(%rsp), %rax
movq (%rax,%rbx,8), %rdi
testq %rdi, %rdi
je 0x23e1a
callq 0x7430
incq %rbx
jmp 0x23d7c
movq 0x20(%rsp), %rdi
callq 0x7430
addq $0xe8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x3e1ab(%rip), %rbx     # 0x61ff0
leaq 0x2073c(%rip), %rsi     # 0x44588
movq %rbx, %rdi
callq 0x7360
leaq 0x22997(%rip), %rsi     # 0x467f2
movq %rbx, %rdi
callq 0x7360
jmp 0x23ebe
movq 0x3e184(%rip), %rbx     # 0x61ff0
leaq 0x20715(%rip), %rsi     # 0x44588
movq %rbx, %rdi
callq 0x7360
leaq 0x22918(%rip), %rsi     # 0x4679a
movq %rbx, %rdi
callq 0x7360
movq 0xa8(%r14), %rcx
movq (%rcx,%r13,8), %rcx
movq 0x258(%rcx), %rsi
movq %rax, %rdi
callq 0x70e0
leaq 0x2293a(%rip), %rsi     # 0x467e5
movq %rax, %rdi
callq 0x7360
movq (%r15), %rsi
movq %rax, %rdi
callq 0x70e0
movq %rax, %rdi
callq 0x71a0
movq 0x3e103(%rip), %rdi     # 0x61fd0
callq 0x73d0
pushq $0x1
popq %rdi
callq 0x73e0
movq 0x3e10f(%rip), %rdi     # 0x61ff0
leaq 0x206a0(%rip), %rsi     # 0x44588
callq 0x7360
movq 0x3e0fc(%rip), %rdi     # 0x61ff0
leaq 0x22949(%rip), %rsi     # 0x46844
callq 0x7360
movl (%rsp), %ecx
movl 0x4(%rsp), %edx
movq 0x20(%rsp), %rsi
movq (%rsi,%rcx,8), %rcx
movq (%rcx,%rdx,8), %rcx
movl 0x8(%rsp), %edx
movq (%rcx,%rdx,8), %rcx
movl 0xc(%rsp), %edx
imulq $0x18, %rdx, %rdx
movq 0x8(%rcx,%rdx), %rsi
subq (%rcx,%rdx), %rsi
sarq $0x3, %rsi
movq %rax, %rdi
callq 0x7270
movq %rax, %rdi
callq 0x71a0
movq 0x3e088(%rip), %rdi     # 0x61fd0
callq 0x73d0
jmp 0x23ed2
jmp 0x23f51
movq %rax, %rbx
jmp 0x23f6c
jmp 0x23f5c
jmp 0x23f5c
jmp 0x23f5c
movq %rax, %rbx
leaq 0xc0(%rsp), %rdi
callq 0x278fc
leaq 0x80(%rsp), %rdi
callq 0x2803e
movq %rbx, %rdi
callq 0x75d0
nop