// File: /workspace/github_c_makefile_star2_O3/lucvoo[P]sparse-dev/target-riscv.c
// Function: predefine_riscv
static void predefine_riscv(const struct target *self)
{
	static const char *cmodels[CMODEL_LAST] = {
		[CMODEL_MEDANY] = "medany",
		[CMODEL_MEDLOW] = "medlow",
		[CMODEL_PIC]    = "pic",
	};
	const char *cmodel = cmodels[arch_cmodel];

	predefine("__riscv", 1, "1");
	predefine("__riscv_xlen", 1, "%d", ptr_ctype.bit_size);

	if (riscv_flags & RISCV_ATOMIC)
		predefine("__riscv_atomic", 1, "1");
	if (riscv_flags & RISCV_COMP)
		predefine("__riscv_compressed", 1, "1");
	if (riscv_flags & RISCV_DIV)
		predefine("__riscv_div", 1, "1");
	if (riscv_flags & RISCV_EMBD)
		predefine("__riscv_32e", 1, "1");
	if (riscv_flags & RISCV_FPU)
		predefine("__riscv_flen", 1, "%d", (riscv_flags & RISCV_DOUBLE) ? 64 : 32);
	if (riscv_flags & RISCV_FDIV)
		predefine("__riscv_fdiv", 1, "1");
	if (riscv_flags & RISCV_FDIV)
		predefine("__riscv_fsqrt", 1, "1");
	if (riscv_flags & RISCV_MUL)
		predefine("__riscv_mul", 1, "1");
	if ((riscv_flags & RISCV_MUL) && (riscv_flags & RISCV_DIV))
		predefine("__riscv_muldiv", 1, "1");
	if (riscv_flags & RISCV_ZICSR)
		predefine("__riscv_zicsr", 1, "1");
	if (riscv_flags & RISCV_ZIFENCEI)
		predefine("__riscv_zifencei", 1, "1");
	if (riscv_flags & RISCV_ZICBOM)
		predefine("__riscv_zicbom", 1, "1");
	if (riscv_flags & RISCV_ZIHINTPAUSE)
		predefine("__riscv_zihintpause", 1, "1");

	if (cmodel)
		predefine_strong("__riscv_cmodel_%s", cmodel);
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
leaq 0x39985(%rip), %rax     # 0x66d9c
movslq (%rax), %r14
leaq 0x2e19f(%rip), %rax     # 0x5b5c0
movq (%rax,%r14,8), %rbx
leaq 0x1aa58(%rip), %rdi     # 0x47e84
leaq 0x1ddf0(%rip), %rdx     # 0x4b223
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
leaq 0x3f0f2(%rip), %rax     # 0x6c538
movl 0x50(%rax), %ecx
leaq 0x1aa3c(%rip), %rdi     # 0x47e8c
leaq 0x1429a(%rip), %rdx     # 0x416f1
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
movl 0x40b2f(%rip), %ecx     # 0x6df98
testb $0x10, %cl
je 0x2d48e
leaq 0x1aa24(%rip), %rdi     # 0x47e99
leaq 0x1dda7(%rip), %rdx     # 0x4b223
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
movl 0x40b0a(%rip), %ecx     # 0x6df98
btl $0x8, %ecx
jae 0x2d4b4
leaq 0x1aa0d(%rip), %rdi     # 0x47ea8
leaq 0x1dd81(%rip), %rdx     # 0x4b223
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
movl 0x40ae4(%rip), %ecx     # 0x6df98
testb $0x8, %cl
je 0x2d4d9
leaq 0x1a9fb(%rip), %rdi     # 0x47ebb
leaq 0x1dd5c(%rip), %rdx     # 0x4b223
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
movl 0x40abf(%rip), %ecx     # 0x6df98
btl $0x9, %ecx
jae 0x2d4ff
leaq 0x1a9e1(%rip), %rdi     # 0x47ec7
leaq 0x1dd36(%rip), %rdx     # 0x4b223
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
movl 0x40a99(%rip), %ecx     # 0x6df98
testb $-0x20, %cl
je 0x2d52c
andl $0x40, %ecx
shrl %ecx
addl $0x20, %ecx
leaq 0x1a9c0(%rip), %rdi     # 0x47ed3
leaq 0x141d7(%rip), %rdx     # 0x416f1
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
movl 0x40a6c(%rip), %ecx     # 0x6df98
testb %cl, %cl
jns 0x2d574
leaq 0x1a9a9(%rip), %rdi     # 0x47ee0
leaq 0x1dce5(%rip), %rdx     # 0x4b223
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
movl 0x40a48(%rip), %ecx     # 0x6df98
testb %cl, %cl
jns 0x2d574
leaq 0x1a992(%rip), %rdi     # 0x47eed
leaq 0x1dcc1(%rip), %rdx     # 0x4b223
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
movl 0x40a24(%rip), %ecx     # 0x6df98
testb $0x4, %cl
je 0x2d599
leaq 0x1a97b(%rip), %rdi     # 0x47efb
leaq 0x1dc9c(%rip), %rdx     # 0x4b223
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
movl 0x409ff(%rip), %ecx     # 0x6df98
movl %ecx, %eax
notl %eax
testb $0xc, %al
jne 0x2d5c1
leaq 0x1a95f(%rip), %rdi     # 0x47f07
leaq 0x1dc74(%rip), %rdx     # 0x4b223
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
movl 0x409d7(%rip), %ecx     # 0x6df98
btl $0xa, %ecx
jae 0x2d5e7
leaq 0x1a948(%rip), %rdi     # 0x47f16
leaq 0x1dc4e(%rip), %rdx     # 0x4b223
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
movl 0x409b1(%rip), %ecx     # 0x6df98
btl $0xb, %ecx
jae 0x2d60d
leaq 0x1a930(%rip), %rdi     # 0x47f24
leaq 0x1dc28(%rip), %rdx     # 0x4b223
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
movl 0x4098b(%rip), %ecx     # 0x6df98
btl $0xc, %ecx
jae 0x2d633
leaq 0x1a91b(%rip), %rdi     # 0x47f35
leaq 0x1dc02(%rip), %rdx     # 0x4b223
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
movl 0x40965(%rip), %ecx     # 0x6df98
btl $0xd, %ecx
jae 0x2d653
leaq 0x1a904(%rip), %rdi     # 0x47f44
leaq 0x1dbdc(%rip), %rdx     # 0x4b223
movl $0x1, %esi
xorl %eax, %eax
callq 0x1eec8
movl $0x197, %eax            # imm = 0x197
btq %r14, %rax
jb 0x2d676
leaq 0x1a8f3(%rip), %rdi     # 0x47f58
movq %rbx, %rsi
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
jmp 0x1f414
addq $0x8, %rsp
popq %rbx
popq %r14
retq