// File: /workspace/github_c_makefile_star2_O0/deplinenoise[P]vlink/t_elf32ppcbe.c
// Function: ppc32_reloc_vlink2elf
static uint8_t ppc32_reloc_vlink2elf(struct Reloc *r)
/* Try to map vlink-internal representation to a valid ELF reloc type */
{
  lword m32 = 0xffffffff;
  struct RelocInsert *ri;
  uint8_t rt = R_NONE;

  if (ri = r->insert) {
    int pos = (int)ri->bpos;
    int size = (int)ri->bsiz;
    lword mask = ri->mask;
    struct RelocInsert *ri2 = ri->next;
    int f = 0;  /* field type */

    r->offset += (unsigned long)pos >> 3;
    pos &= 7;
    ri->bpos = (uint16_t)pos;

    if (pos==0 && (size==16 || size==32) && mask==-1 && ri2==NULL) {
      f = FSTD;
    }
    else if (pos==6 && size==24 && (mask&0x3ffffff)==0x3fffffc && ri2==NULL) {
      f = FB24;
    }
    else if (pos==0 && size==16 && (mask&m32)==0xffff && ri2==NULL) {
      f = FLO;
    }
    else if (pos==0 && size==16 && (mask&m32)==0xffff0000 && ri2==NULL) {
      f = FHI;
    }
    else if (pos==0 && size==16 && (mask&m32)==0xffff0000 && ri2!=NULL) {
      if (ri2->bpos==0 && ri2->bsiz==16 &&
          (ri2->mask&m32)==0x8000 && ri2->next==NULL)
        f = FHA;
    }
    else if (pos==0 && size==14 && (mask&0xffff)==0xfffc && ri2==NULL) {
      f = FB14;
      r->offset -= 2;
      ri->bpos += 16;
    }
    else if (pos==0 && size==30 && ri2==NULL) {
      f = FW30;
    }
    else
      f = 0;  /* no usable insert-field description found */

    switch (r->rtype) {

      case R_ABS:
        switch (f) {
          case FSTD: rt = size==32 ? R_PPC_ADDR32 : R_PPC_ADDR16; break;
          case FLO: rt = R_PPC_ADDR16_LO; break;
          case FHI: rt = R_PPC_ADDR16_HI; break;
          case FHA: rt = R_PPC_ADDR16_HA; break;
          case FB24: rt = R_PPC_ADDR24; break;
          case FB14: rt = R_PPC_ADDR14; break;
          case FW30: rt = R_PPC_ADDR30; break;
        }
        break;

      case R_PC:
        switch (f) {
          case FSTD:
            if (size == 32) {
              rt = R_PPC_REL32;
            }
            else if ((r->addend & 3) == 0) {
              r->offset -= 2;
              ri->bpos += 16;
              rt = R_PPC_REL14;
            }
            break;
          case FB24: rt = R_PPC_REL24; break;
          case FB14: rt = R_PPC_REL14; break;  /* @@@ BRTAKEN/BRNTAKEN */
        }
        break;

      case R_GOT:
        switch (f) {
          case FSTD:
            if (size == 16)
              rt = R_PPC_GOT16;
            break;
          case FLO: rt = R_PPC_GOT16_LO; break;
          case FHI: rt = R_PPC_GOT16_HI; break;
          case FHA: rt = R_PPC_GOT16_HA; break;
        }
        break;

      case R_PLT:
        switch (f) {
          case FSTD:
            if (size == 32)
              rt = R_PPC_PLT32;
            break;
          case FLO: rt = R_PPC_PLT16_LO; break;
          case FHI: rt = R_PPC_PLT16_HI; break;
          case FHA: rt = R_PPC_PLT16_HA; break;
        }
        break;

      case R_PLTPC:
        switch (f) {
          case FSTD:
            if (size == 32)
              rt = R_PPC_PLTREL32;
            break;
          case FB24: rt = R_PPC_PLTREL24; break;
        }
        break;

      case R_SECOFF:
        switch (f) {
          case FSTD:
            if (size == 16)
              rt = R_PPC_SECTOFF;
            break;
          case FLO: rt = R_PPC_SECTOFF_LO; break;
          case FHI: rt = R_PPC_SECTOFF_HI; break;
          case FHA: rt = R_PPC_SECTOFF_HA; break;
        }
        break;
      
      case R_COPY:
        rt = R_PPC_COPY;
        break;
      
      case R_GLOBDAT:
        rt = R_PPC_GLOB_DAT;
        break;
      
      case R_JMPSLOT:
        rt = R_PPC_JMP_SLOT;
        break;
      
      case R_LOADREL:
        rt = R_PPC_RELATIVE;
        break;
      
      case R_LOCALPC:
        if (f == FB24)
          rt = R_PPC_LOCAL24PC;
        break;

      case R_SD:
        if (f==FSTD && size==16)
          rt = R_PPC_SDAREL16;
        break;

       case R_UABS:
         rt = size==32 ? R_PPC_UADDR32 : R_PPC_UADDR16;
         break;

      /* Embedded and OS-specific relocs */

      case R_SD2:
        if (f==FSTD && size==16)
          rt = R_PPC_EMB_SDA2REL;
        break;

      case R_SD21:
        if (f==FSTD && size==16) {
          r->offset -= 2;
          ri->bpos += 16;
          rt = R_PPC_EMB_SDA21;
        }
        break;

      case R_MOSDREL:
        switch (f) {
          case FSTD:
            if (size == 16)
              rt = R_PPC_MORPHOS_DREL;
            break;
          case FLO: rt = R_PPC_MORPHOS_DREL_LO; break;
          case FHI: rt = R_PPC_MORPHOS_DREL_HI; break;
          case FHA: rt = R_PPC_MORPHOS_DREL_HA; break;
        }
        break;

      case R_AOSBREL:
        switch (f) {
          case FSTD:
            if (size == 16)
              rt = R_PPC_AMIGAOS_BREL;
            break;
          case FLO: rt = R_PPC_AMIGAOS_BREL_LO; break;
          case FHI: rt = R_PPC_AMIGAOS_BREL_HI; break;
          case FHA: rt = R_PPC_AMIGAOS_BREL_HA; break;
        }
        break;
    }
  }

  return (rt);
}

// Assembly:
pushq %rax
movq %rdi, (%rsp)
movl $0xffffffff, %eax       # imm = 0xFFFFFFFF
movq %rax, -0x8(%rsp)
movb $0x0, -0x11(%rsp)
movq (%rsp), %rax
movq 0x30(%rax), %rax
movq %rax, -0x10(%rsp)
cmpq $0x0, %rax
je 0x292fd
movq -0x10(%rsp), %rax
movzwl 0x8(%rax), %eax
movl %eax, -0x18(%rsp)
movq -0x10(%rsp), %rax
movzwl 0xa(%rax), %eax
movl %eax, -0x1c(%rsp)
movq -0x10(%rsp), %rax
movq 0x10(%rax), %rax
movq %rax, -0x28(%rsp)
movq -0x10(%rsp), %rax
movq (%rax), %rax
movq %rax, -0x30(%rsp)
movl $0x0, -0x34(%rsp)
movslq -0x18(%rsp), %rcx
shrq $0x3, %rcx
movq (%rsp), %rax
addq 0x20(%rax), %rcx
movq %rcx, 0x20(%rax)
movl -0x18(%rsp), %eax
andl $0x7, %eax
movl %eax, -0x18(%rsp)
movl -0x18(%rsp), %eax
movw %ax, %cx
movq -0x10(%rsp), %rax
movw %cx, 0x8(%rax)
cmpl $0x0, -0x18(%rsp)
jne 0x28dda
cmpl $0x10, -0x1c(%rsp)
je 0x28dbd
cmpl $0x20, -0x1c(%rsp)
jne 0x28dda
cmpq $-0x1, -0x28(%rsp)
jne 0x28dda
cmpq $0x0, -0x30(%rsp)
jne 0x28dda
movl $0x1, -0x34(%rsp)
jmp 0x28f74
cmpl $0x6, -0x18(%rsp)
jne 0x28e10
cmpl $0x18, -0x1c(%rsp)
jne 0x28e10
movq -0x28(%rsp), %rax
andq $0x3ffffff, %rax        # imm = 0x3FFFFFF
cmpq $0x3fffffc, %rax        # imm = 0x3FFFFFC
jne 0x28e10
cmpq $0x0, -0x30(%rsp)
jne 0x28e10
movl $0x5, -0x34(%rsp)
jmp 0x28f72
cmpl $0x0, -0x18(%rsp)
jne 0x28e45
cmpl $0x10, -0x1c(%rsp)
jne 0x28e45
movq -0x28(%rsp), %rax
andq -0x8(%rsp), %rax
cmpq $0xffff, %rax           # imm = 0xFFFF
jne 0x28e45
cmpq $0x0, -0x30(%rsp)
jne 0x28e45
movl $0x2, -0x34(%rsp)
jmp 0x28f70
cmpl $0x0, -0x18(%rsp)
jne 0x28e7c
cmpl $0x10, -0x1c(%rsp)
jne 0x28e7c
movq -0x28(%rsp), %rax
andq -0x8(%rsp), %rax
movl $0xffff0000, %ecx       # imm = 0xFFFF0000
cmpq %rcx, %rax
jne 0x28e7c
cmpq $0x0, -0x30(%rsp)
jne 0x28e7c
movl $0x3, -0x34(%rsp)
jmp 0x28f6e
cmpl $0x0, -0x18(%rsp)
jne 0x28eed
cmpl $0x10, -0x1c(%rsp)
jne 0x28eed
movq -0x28(%rsp), %rax
andq -0x8(%rsp), %rax
movl $0xffff0000, %ecx       # imm = 0xFFFF0000
cmpq %rcx, %rax
jne 0x28eed
cmpq $0x0, -0x30(%rsp)
je 0x28eed
movq -0x30(%rsp), %rax
movzwl 0x8(%rax), %eax
cmpl $0x0, %eax
jne 0x28eeb
movq -0x30(%rsp), %rax
movzwl 0xa(%rax), %eax
cmpl $0x10, %eax
jne 0x28eeb
movq -0x30(%rsp), %rax
movq 0x10(%rax), %rax
andq -0x8(%rsp), %rax
cmpq $0x8000, %rax           # imm = 0x8000
jne 0x28eeb
movq -0x30(%rsp), %rax
cmpq $0x0, (%rax)
jne 0x28eeb
movl $0x4, -0x34(%rsp)
jmp 0x28f6c
cmpl $0x0, -0x18(%rsp)
jne 0x28f40
cmpl $0xe, -0x1c(%rsp)
jne 0x28f40
movq -0x28(%rsp), %rax
andq $0xffff, %rax           # imm = 0xFFFF
cmpq $0xfffc, %rax           # imm = 0xFFFC
jne 0x28f40
cmpq $0x0, -0x30(%rsp)
jne 0x28f40
movl $0x6, -0x34(%rsp)
movq (%rsp), %rax
movq 0x20(%rax), %rcx
subq $0x2, %rcx
movq %rcx, 0x20(%rax)
movq -0x10(%rsp), %rax
movzwl 0x8(%rax), %ecx
addl $0x10, %ecx
movw %cx, 0x8(%rax)
jmp 0x28f6a
cmpl $0x0, -0x18(%rsp)
jne 0x28f60
cmpl $0x1e, -0x1c(%rsp)
jne 0x28f60
cmpq $0x0, -0x30(%rsp)
jne 0x28f60
movl $0x7, -0x34(%rsp)
jmp 0x28f68
movl $0x0, -0x34(%rsp)
jmp 0x28f6a
jmp 0x28f6c
jmp 0x28f6e
jmp 0x28f70
jmp 0x28f72
jmp 0x28f74
movq (%rsp), %rax
movzbl 0x38(%rax), %eax
decl %eax
movl %eax, %ecx
movq %rcx, -0x40(%rsp)
subl $0x22, %eax
ja 0x292fb
movq -0x40(%rsp), %rax
leaq 0xd9a6(%rip), %rcx      # 0x36940
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl -0x34(%rsp), %eax
decl %eax
movl %eax, %ecx
movq %rcx, -0x48(%rsp)
subl $0x6, %eax
ja 0x2900c
movq -0x48(%rsp), %rax
leaq 0xda5b(%rip), %rcx      # 0x36a1c
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl -0x1c(%rsp), %edx
movl $0x3, %eax
movl $0x1, %ecx
cmpl $0x20, %edx
cmovel %ecx, %eax
movb %al, -0x11(%rsp)
jmp 0x2900c
movb $0x4, -0x11(%rsp)
jmp 0x2900c
movb $0x5, -0x11(%rsp)
jmp 0x2900c
movb $0x6, -0x11(%rsp)
jmp 0x2900c
movb $0x2, -0x11(%rsp)
jmp 0x2900c
movb $0x7, -0x11(%rsp)
jmp 0x2900c
movb $0x25, -0x11(%rsp)
jmp 0x292fb
movl -0x34(%rsp), %eax
movl %eax, -0x4c(%rsp)
subl $0x1, %eax
je 0x29036
jmp 0x29020
movl -0x4c(%rsp), %eax
subl $0x5, %eax
je 0x2907f
jmp 0x2902b
movl -0x4c(%rsp), %eax
subl $0x6, %eax
je 0x29086
jmp 0x2908b
cmpl $0x20, -0x1c(%rsp)
jne 0x29044
movb $0x1a, -0x11(%rsp)
jmp 0x2907d
movq (%rsp), %rax
movq 0x28(%rax), %rax
andq $0x3, %rax
cmpq $0x0, %rax
jne 0x2907b
movq (%rsp), %rax
movq 0x20(%rax), %rcx
subq $0x2, %rcx
movq %rcx, 0x20(%rax)
movq -0x10(%rsp), %rax
movzwl 0x8(%rax), %ecx
addl $0x10, %ecx
movw %cx, 0x8(%rax)
movb $0xb, -0x11(%rsp)
jmp 0x2907d
jmp 0x2908b
movb $0xa, -0x11(%rsp)
jmp 0x2908b
movb $0xb, -0x11(%rsp)
jmp 0x292fb
movl -0x34(%rsp), %eax
decl %eax
movl %eax, %ecx
movq %rcx, -0x58(%rsp)
subl $0x3, %eax
ja 0x290d8
movq -0x58(%rsp), %rax
leaq 0xd95e(%rip), %rcx      # 0x36a0c
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
cmpl $0x10, -0x1c(%rsp)
jne 0x290c3
movb $0xe, -0x11(%rsp)
jmp 0x290d8
movb $0xf, -0x11(%rsp)
jmp 0x290d8
movb $0x10, -0x11(%rsp)
jmp 0x290d8
movb $0x11, -0x11(%rsp)
jmp 0x292fb
movl -0x34(%rsp), %eax
decl %eax
movl %eax, %ecx
movq %rcx, -0x60(%rsp)
subl $0x3, %eax
ja 0x29125
movq -0x60(%rsp), %rax
leaq 0xd901(%rip), %rcx      # 0x369fc
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
cmpl $0x20, -0x1c(%rsp)
jne 0x29110
movb $0x1b, -0x11(%rsp)
jmp 0x29125
movb $0x1d, -0x11(%rsp)
jmp 0x29125
movb $0x1e, -0x11(%rsp)
jmp 0x29125
movb $0x1f, -0x11(%rsp)
jmp 0x292fb
movl -0x34(%rsp), %eax
movl %eax, -0x64(%rsp)
subl $0x1, %eax
je 0x29144
jmp 0x29139
movl -0x64(%rsp), %eax
subl $0x5, %eax
je 0x29152
jmp 0x29157
cmpl $0x20, -0x1c(%rsp)
jne 0x29150
movb $0x1c, -0x11(%rsp)
jmp 0x29157
movb $0x12, -0x11(%rsp)
jmp 0x292fb
movl -0x34(%rsp), %eax
decl %eax
movl %eax, %ecx
movq %rcx, -0x70(%rsp)
subl $0x3, %eax
ja 0x291a4
movq -0x70(%rsp), %rax
leaq 0xd872(%rip), %rcx      # 0x369ec
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
cmpl $0x10, -0x1c(%rsp)
jne 0x2918f
movb $0x21, -0x11(%rsp)
jmp 0x291a4
movb $0x22, -0x11(%rsp)
jmp 0x291a4
movb $0x23, -0x11(%rsp)
jmp 0x291a4
movb $0x24, -0x11(%rsp)
jmp 0x292fb
movb $0x13, -0x11(%rsp)
jmp 0x292fb
movb $0x14, -0x11(%rsp)
jmp 0x292fb
movb $0x15, -0x11(%rsp)
jmp 0x292fb
movb $0x16, -0x11(%rsp)
jmp 0x292fb
cmpl $0x5, -0x34(%rsp)
jne 0x291dd
movb $0x17, -0x11(%rsp)
jmp 0x292fb
cmpl $0x1, -0x34(%rsp)
jne 0x291f5
cmpl $0x10, -0x1c(%rsp)
jne 0x291f5
movb $0x20, -0x11(%rsp)
jmp 0x292fb
movl -0x1c(%rsp), %edx
movl $0x19, %eax
movl $0x18, %ecx
cmpl $0x20, %edx
cmovel %ecx, %eax
movb %al, -0x11(%rsp)
jmp 0x292fb
cmpl $0x1, -0x34(%rsp)
jne 0x2922a
cmpl $0x10, -0x1c(%rsp)
jne 0x2922a
movb $0x6c, -0x11(%rsp)
jmp 0x292fb
cmpl $0x1, -0x34(%rsp)
jne 0x29262
cmpl $0x10, -0x1c(%rsp)
jne 0x29262
movq (%rsp), %rax
movq 0x20(%rax), %rcx
subq $0x2, %rcx
movq %rcx, 0x20(%rax)
movq -0x10(%rsp), %rax
movzwl 0x8(%rax), %ecx
addl $0x10, %ecx
movw %cx, 0x8(%rax)
movb $0x6d, -0x11(%rsp)
jmp 0x292fb
movl -0x34(%rsp), %eax
decl %eax
movl %eax, %ecx
movq %rcx, -0x78(%rsp)
subl $0x3, %eax
ja 0x292af
movq -0x78(%rsp), %rax
leaq 0xd757(%rip), %rcx      # 0x369dc
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
cmpl $0x10, -0x1c(%rsp)
jne 0x2929a
movb $-0x38, -0x11(%rsp)
jmp 0x292af
movb $-0x37, -0x11(%rsp)
jmp 0x292af
movb $-0x36, -0x11(%rsp)
jmp 0x292af
movb $-0x35, -0x11(%rsp)
jmp 0x292fb
movl -0x34(%rsp), %eax
decl %eax
movl %eax, %ecx
movq %rcx, -0x80(%rsp)
subl $0x3, %eax
ja 0x292f9
movq -0x80(%rsp), %rax
leaq 0xd6fd(%rip), %rcx      # 0x369cc
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
cmpl $0x10, -0x1c(%rsp)
jne 0x292e4
movb $-0x2e, -0x11(%rsp)
jmp 0x292f9
movb $-0x2d, -0x11(%rsp)
jmp 0x292f9
movb $-0x2c, -0x11(%rsp)
jmp 0x292f9
movb $-0x2b, -0x11(%rsp)
jmp 0x292fb
jmp 0x292fd
movb -0x11(%rsp), %al
popq %rcx
retq
nopw %cs:(%rax,%rax)