// File: /workspace/github_cpp_makefile_star2_O1/rpavlik[P]edid-decode/parse-base-block.cpp
// Function: edid_state::check_base_block()
void edid_state::check_base_block()
{
	data_block = "Base EDID";

	/*
	 * Allow for regular rounding of vertical and horizontal frequencies.
	 * The spec says that the pixelclock shall be rounded up, so there is
	 * no need to take rounding into account.
	 */
	if (base.has_display_range_descriptor &&
	    (min_vert_freq_hz + 0.5 < base.min_display_vert_freq_hz ||
	     (max_vert_freq_hz >= base.max_display_vert_freq_hz + 0.5 && base.max_display_vert_freq_hz) ||
	     min_hor_freq_hz + 500 < base.min_display_hor_freq_hz ||
	     (max_hor_freq_hz >= base.max_display_hor_freq_hz + 500 && base.max_display_hor_freq_hz) ||
	     (max_pixclk_khz > base.max_display_pixclk_khz && base.max_display_pixclk_khz))) {
		/*
		 * Check if it is really out of range, or if it could be a rounding error.
		 * The EDID spec is not very clear about rounding.
		 */
		bool out_of_range =
			min_vert_freq_hz + 1.0 <= base.min_display_vert_freq_hz ||
			(max_vert_freq_hz >= base.max_display_vert_freq_hz + 1.0 && base.max_display_vert_freq_hz) ||
			min_hor_freq_hz + 1000 <= base.min_display_hor_freq_hz ||
			(max_hor_freq_hz >= base.max_display_hor_freq_hz + 1000 && base.max_display_hor_freq_hz) ||
			(max_pixclk_khz >= base.max_display_pixclk_khz + 10000 && base.max_display_pixclk_khz);

		std::string err("Some timings are out of range of the Monitor Ranges:\n");
		char buf[512];

		if (min_vert_freq_hz + 0.5 < base.min_display_vert_freq_hz ||
		    (max_vert_freq_hz >= base.max_display_vert_freq_hz + 0.5 && base.max_display_vert_freq_hz)) {
			sprintf(buf, "    Vertical Freq: %.3f - %.3f Hz (Monitor: %u.000 - %u.000 Hz)\n",
				min_vert_freq_hz, max_vert_freq_hz,
				base.min_display_vert_freq_hz, base.max_display_vert_freq_hz);
			err += buf;
		}

		if (min_hor_freq_hz + 500 < base.min_display_hor_freq_hz ||
		    (max_hor_freq_hz >= base.max_display_hor_freq_hz + 500 && base.max_display_hor_freq_hz)) {
			sprintf(buf, "    Horizontal Freq: %.3f - %.3f kHz (Monitor: %.3f - %.3f kHz)\n",
				min_hor_freq_hz / 1000.0, max_hor_freq_hz / 1000.0,
				base.min_display_hor_freq_hz / 1000.0, base.max_display_hor_freq_hz / 1000.0);
			err += buf;
		}

		if (max_pixclk_khz >= base.max_display_pixclk_khz && base.max_display_pixclk_khz) {
			sprintf(buf, "    Maximum Clock: %.3f MHz (Monitor: %.3f MHz)\n",
				max_pixclk_khz / 1000.0, base.max_display_pixclk_khz / 1000.0);
			err += buf;
		}

		if (!out_of_range)
			err += "    Could be due to a Monitor Range off-by-one rounding issue\n";

		/*
		 * EDID 1.4 states (in an Errata) that explicitly defined
		 * timings supersede the monitor range definition.
		 */
		msg(!out_of_range || base.edid_minor >= 4, "%s", err.c_str());
	}
	// The base block will only go up to 255x255 cm for the display size,
	// so don't fail if one or more image sizes exceeds that.
	if (!base.max_display_width_mm && !base.max_display_height_mm &&
	    dtd_max_hsize_mm && dtd_max_vsize_mm &&
	    dtd_max_hsize_mm <= 2559 && dtd_max_vsize_mm <= 2559) {
		fail("The DTD image sizes all fit inside 255x255cm, but no display size was set.\n");
	}
	// Secondary GTF curves start at a specific frequency. Any legacy timings
	// that have a positive hsync and negative vsync must be less than that
	// frequency to avoid confusion.
	if (base.supports_sec_gtf && base.max_pos_neg_hor_freq_khz >= base.sec_gtf_start_freq)
		fail("Second GTF start frequency %u is less than the highest P/N frequency %u.\n",
		     base.sec_gtf_start_freq, base.max_pos_neg_hor_freq_khz);
	if (base.edid_minor == 3 && num_blocks > 2 && !block_map.saw_block_1)
		fail("EDID 1.3 requires a Block Map Extension in Block 1 if there are more than 2 blocks in the EDID.\n");
	if (base.edid_minor == 3 && num_blocks > 128 && !block_map.saw_block_128)
		fail("EDID 1.3 requires a Block Map Extension in Block 128 if there are more than 128 blocks in the EDID.\n");
	if (block_map.saw_block_128 && num_blocks > 255)
		fail("If there is a Block Map Extension in Block 128 then the maximum number of blocks is 255.\n");
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
subq $0x228, %rsp            # imm = 0x228
movq %rdi, %rbx
addq $0x30, %rdi
movq 0x38(%rbx), %rdx
leaq 0x12bc5(%rip), %rcx     # 0x204ca
movl $0x9, %r8d
xorl %esi, %esi
callq 0x3390
cmpb $0x1, 0x8d(%rbx)
jne 0xdbdd
movsd 0x60(%rbx), %xmm0
movsd 0x126dc(%rip), %xmm2    # 0x20008
addsd %xmm0, %xmm2
movl 0x168(%rbx), %eax
cvtsi2sd %rax, %xmm1
ucomisd %xmm2, %xmm1
ja 0xd9a0
movl 0x16c(%rbx), %eax
testl %eax, %eax
je 0xd963
movsd 0x68(%rbx), %xmm2
cvtsi2sd %rax, %xmm3
addsd 0x126ab(%rip), %xmm3    # 0x20008
ucomisd %xmm3, %xmm2
jae 0xd9a0
movl $0x1f4, %eax            # imm = 0x1F4
addl 0x54(%rbx), %eax
cmpl 0x160(%rbx), %eax
jb 0xd9a0
movl 0x164(%rbx), %eax
testl %eax, %eax
je 0xd987
addl $0x1f4, %eax            # imm = 0x1F4
cmpl %eax, 0x58(%rbx)
jae 0xd9a0
movl 0x170(%rbx), %eax
cmpl %eax, 0x70(%rbx)
setbe %cl
testl %eax, %eax
sete %al
orb %cl, %al
jne 0xdbdd
addsd 0x16d20(%rip), %xmm0    # 0x246c8
movb $0x1, %bpl
ucomisd %xmm0, %xmm1
jae 0xda15
movl 0x16c(%rbx), %eax
testl %eax, %eax
je 0xd9d6
movsd 0x68(%rbx), %xmm0
xorps %xmm1, %xmm1
cvtsi2sd %rax, %xmm1
addsd 0x16cf8(%rip), %xmm1    # 0x246c8
ucomisd %xmm1, %xmm0
jae 0xda15
movl $0x3e8, %eax            # imm = 0x3E8
addl 0x54(%rbx), %eax
cmpl 0x160(%rbx), %eax
jbe 0xda15
movl 0x164(%rbx), %eax
testl %eax, %eax
je 0xd9fa
addl $0x3e8, %eax            # imm = 0x3E8
cmpl %eax, 0x58(%rbx)
jae 0xda15
movl 0x170(%rbx), %eax
leal 0x2710(%rax), %ecx
cmpl %ecx, 0x70(%rbx)
setae %cl
testl %eax, %eax
setne %bpl
andb %cl, %bpl
leaq 0x10(%rsp), %r15
movq %r15, -0x10(%r15)
leaq 0x1863c(%rip), %rsi     # 0x26061
leaq 0x1866a(%rip), %rdx     # 0x26096
movq %rsp, %rdi
callq 0x8f6e
movsd 0x60(%rbx), %xmm0
movsd 0x125c7(%rip), %xmm1    # 0x20008
addsd %xmm0, %xmm1
movl 0x168(%rbx), %edx
xorps %xmm2, %xmm2
cvtsi2sd %rdx, %xmm2
ucomisd %xmm1, %xmm2
ja 0xda7e
movl 0x16c(%rbx), %eax
testl %eax, %eax
je 0xdaaa
movsd 0x68(%rbx), %xmm1
xorps %xmm2, %xmm2
cvtsi2sd %rax, %xmm2
addsd 0x12590(%rip), %xmm2    # 0x20008
ucomisd %xmm2, %xmm1
jb 0xdaaa
movsd 0x68(%rbx), %xmm1
movl 0x16c(%rbx), %ecx
leaq 0x18607(%rip), %rsi     # 0x26097
leaq 0x20(%rsp), %r14
movq %r14, %rdi
movb $0x2, %al
callq 0x3070
movq %rsp, %rdi
movq %r14, %rsi
callq 0x3420
movl 0x54(%rbx), %ecx
movl 0x160(%rbx), %eax
leal 0x1f4(%rcx), %edx
cmpl %eax, %edx
jb 0xdad2
movl 0x164(%rbx), %edx
testl %edx, %edx
je 0xdb38
addl $0x1f4, %edx            # imm = 0x1F4
cmpl %edx, 0x58(%rbx)
jb 0xdb38
movl %ecx, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %rcx, %xmm0
movsd 0x1252c(%rip), %xmm4    # 0x20010
divsd %xmm4, %xmm0
movl 0x58(%rbx), %ecx
movl 0x164(%rbx), %edx
xorps %xmm1, %xmm1
cvtsi2sd %rcx, %xmm1
divsd %xmm4, %xmm1
movl %eax, %eax
xorps %xmm2, %xmm2
cvtsi2sd %rax, %xmm2
divsd %xmm4, %xmm2
xorps %xmm3, %xmm3
cvtsi2sd %rdx, %xmm3
divsd %xmm4, %xmm3
leaq 0x185ba(%rip), %rsi     # 0x260d8
leaq 0x20(%rsp), %r14
movq %r14, %rdi
movb $0x4, %al
callq 0x3070
movq %rsp, %rdi
movq %r14, %rsi
callq 0x3420
movl 0x70(%rbx), %ecx
movl 0x170(%rbx), %eax
leal -0x1(%rax), %edx
cmpl %ecx, %edx
jae 0xdb8d
movl %ecx, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %rcx, %xmm0
movsd 0x124b6(%rip), %xmm2    # 0x20010
divsd %xmm2, %xmm0
movl %eax, %eax
xorps %xmm1, %xmm1
cvtsi2sd %rax, %xmm1
divsd %xmm2, %xmm1
leaq 0x185a6(%rip), %rsi     # 0x26119
leaq 0x20(%rsp), %r14
movq %r14, %rdi
movb $0x2, %al
callq 0x3070
movq %rsp, %rdi
movq %r14, %rsi
callq 0x3420
testb %bpl, %bpl
jne 0xdba8
leaq 0x185b1(%rip), %rsi     # 0x2614a
movq %rsp, %rdi
callq 0x3420
movb $0x1, %al
testb %bpl, %bpl
je 0xdbb2
cmpl $0x4, 0x88(%rbx)
setae %al
movq (%rsp), %rdx
movzbl %al, %edi
leaq 0x131a2(%rip), %rsi     # 0x20d62
xorl %eax, %eax
callq 0x37ec
movq (%rsp), %rdi
cmpq %r15, %rdi
je 0xdbdd
movq 0x10(%rsp), %rsi
incq %rsi
callq 0x3260
movl 0x178(%rbx), %eax
orl 0x174(%rbx), %eax
jne 0xdc15
movl 0x74(%rbx), %eax
testl %eax, %eax
je 0xdc15
cmpl $0x9ff, %eax            # imm = 0x9FF
ja 0xdc15
movl 0x78(%rbx), %eax
decl %eax
cmpl $0x9fe, %eax            # imm = 0x9FE
ja 0xdc15
leaq 0x1857d(%rip), %rsi     # 0x26189
xorl %edi, %edi
xorl %eax, %eax
callq 0x37ec
cmpb $0x1, 0x92(%rbx)
jne 0xdc3e
movl 0x94(%rbx), %edx
movl 0x17c(%rbx), %ecx
cmpl %edx, %ecx
jb 0xdc3e
leaq 0x185a0(%rip), %rsi     # 0x261d5
xorl %edi, %edi
xorl %eax, %eax
callq 0x37ec
cmpl $0x3, 0x88(%rbx)
jne 0xdc66
cmpl $0x3, 0x4(%rbx)
jb 0xdc66
cmpb $0x0, 0x978(%rbx)
jne 0xdc66
leaq 0x185c2(%rip), %rsi     # 0x2621f
xorl %edi, %edi
xorl %eax, %eax
callq 0x37ec
cmpl $0x3, 0x88(%rbx)
jne 0xdc91
cmpl $0x81, 0x4(%rbx)
jb 0xdc91
cmpb $0x0, 0x979(%rbx)
jne 0xdc91
leaq 0x185f8(%rip), %rsi     # 0x26280
xorl %edi, %edi
xorl %eax, %eax
callq 0x37ec
cmpb $0x1, 0x979(%rbx)
jne 0xdcb3
cmpl $0x100, 0x4(%rbx)       # imm = 0x100
jb 0xdcb3
leaq 0x1863b(%rip), %rsi     # 0x262e5
xorl %edi, %edi
xorl %eax, %eax
callq 0x37ec
addq $0x228, %rsp            # imm = 0x228
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
movq (%rsp), %rdi
cmpq %r15, %rdi
je 0xdcda
movq 0x10(%rsp), %rsi
incq %rsi
callq 0x3260
movq %rbx, %rdi
callq 0x3400