// File: /workspace/github_c_makefile_star2_O1/Ihsoh[P]ilang/compiler/assembler/ins_enc.c
// Function: ins_enc_mov_rxX_Ib
void ins_enc_mov_rxX_Ib(
	Instruction *ins,
	InstructionEncoderData *data
) {
	_CHECK_PARAMS(2);

	ParserASTNode *ins_node = data->ins_node;

	ParserASTNode *target = data->ins_node->childs[0];

	ParserASTNode *source = data->ins_node->childs[1];

	EncoderInstruction enc_ins;

	ins_init(data->ctx, ins, ins_node, &enc_ins);

	InsRegister *ins_target_reg = ASM_REG_AST_NODE_GET_REG(target);
	assert(ins_target_reg);

	switch (ASM_PARSER_CONTEXT_DATA_GET_ARCH(data->ctx)) {
		case ASM_ARCH_BIT16: {
			switch (ins_target_reg->type) {
				case INS_REGISTER_GENERAL_2BYTE: {
					ins_fill_imm16(data->ctx, ins, source, &enc_ins);
					break;
				}
				case INS_REGISTER_GENERAL_4BYTE: {
					enc_ins.legacy_prefix.operand_size_override = true;

					ins_fill_imm32(data->ctx, ins, source, &enc_ins);
					break;
				}
				case INS_REGISTER_GENERAL_8BYTE: {
					data->ctx->syntax_error_node_msg(
						data->ctx,
						ins_node,
						"instruction not supported in 64-bit mode."
					);
					break;
				}
				default: {
					assert(0);
					break;
				}
			}
			break;
		}
		case ASM_ARCH_BIT32: {
			switch (ins_target_reg->type) {
				case INS_REGISTER_GENERAL_2BYTE: {
					enc_ins.legacy_prefix.operand_size_override = true;

					ins_fill_imm16(data->ctx, ins, source, &enc_ins);
					break;
				}
				case INS_REGISTER_GENERAL_4BYTE: {
					ins_fill_imm32(data->ctx, ins, source, &enc_ins);
					break;
				}
				case INS_REGISTER_GENERAL_8BYTE: {
					data->ctx->syntax_error_node_msg(
						data->ctx,
						ins_node,
						"instruction not supported in 64-bit mode."
					);
					break;
				}
				default: {
					assert(0);
					break;
				}
			}
			break;
		}
		case ASM_ARCH_BIT64: {
			switch (ins_target_reg->type) {
				case INS_REGISTER_GENERAL_2BYTE: {
					enc_ins.legacy_prefix.operand_size_override = true;

					ins_fill_imm16(data->ctx, ins, source, &enc_ins);
					break;
				}
				case INS_REGISTER_GENERAL_4BYTE: {
					ins_fill_imm32(data->ctx, ins, source, &enc_ins);
					break;
				}
				case INS_REGISTER_GENERAL_8BYTE: {
					ins_fill_imm32(data->ctx, ins, source, &enc_ins);
					break;
				}
				default: {
					assert(0);
					break;
				}
			}
			break;
		}
		default: {
			assert(0);
			break;
		}
	}

	_output(data, &enc_ins);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
testq %rdi, %rdi
je 0x19d9f
movq %rsi, %rbx
testq %rsi, %rsi
je 0x19da8
movq (%rbx), %r12
testq %r12, %r12
je 0x19db1
cmpl $0x2, 0x44(%r12)
jne 0x19dba
movq %rdi, %r14
movq 0x48(%r12), %rax
movq (%rax), %r13
movq 0x8(%rax), %r15
movq 0x8(%rbx), %rdi
leaq -0x88(%rbp), %rcx
movq %r14, %rsi
movq %r12, %rdx
callq 0x155a6
movq 0x60(%r13), %rax
testq %rax, %rax
je 0x19dd9
movq 0x8(%rbx), %rdi
movl 0xb0(%rdi), %ecx
cmpl $0x4, %ecx
je 0x19d25
cmpl $0x2, %ecx
je 0x19cf4
cmpl $0x1, %ecx
jne 0x19df8
movl 0xc(%rax), %eax
cmpl $0x5, %eax
je 0x19d5c
cmpl $0x4, %eax
je 0x19d6b
cmpl $0x3, %eax
jne 0x19e17
leaq -0x88(%rbp), %rcx
jmp 0x19d46
movl 0xc(%rax), %eax
cmpl $0x5, %eax
je 0x19d5c
cmpl $0x4, %eax
je 0x19d53
cmpl $0x3, %eax
je 0x19d3b
leaq 0x15687(%rip), %rdi     # 0x2f394
leaq 0x18f80(%rip), %rsi     # 0x32c94
leaq 0x19747(%rip), %rcx     # 0x33462
movl $0x470, %edx            # imm = 0x470
callq 0xa0b0
movl 0xc(%rax), %eax
cmpl $0x5, %eax
je 0x19d53
cmpl $0x4, %eax
je 0x19d53
cmpl $0x3, %eax
jne 0x19e36
leaq -0x88(%rbp), %rcx
movb $0x1, 0xb(%rcx)
movq %r14, %rsi
movq %r15, %rdx
callq 0x160a9
jmp 0x19d81
leaq -0x88(%rbp), %rcx
jmp 0x19d76
leaq 0x1926f(%rip), %rdx     # 0x32fd2
movq %r12, %rsi
callq *0x58(%rdi)
jmp 0x19d81
leaq -0x88(%rbp), %rcx
movb $0x1, 0xb(%rcx)
movq %r14, %rsi
movq %r15, %rdx
callq 0x1619f
leaq -0x88(%rbp), %rsi
movq %rbx, %rdi
callq 0x181fc
addq $0x68, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0x179d4(%rip), %rdi     # 0x3177a
jmp 0x19dc1
leaq 0x1d845(%rip), %rdi     # 0x375f4
jmp 0x19dc1
leaq 0x18f39(%rip), %rdi     # 0x32cf1
jmp 0x19dc1
leaq 0x18f3f(%rip), %rdi     # 0x32d00
leaq 0x18ecc(%rip), %rsi     # 0x32c94
leaq 0x19693(%rip), %rcx     # 0x33462
movl $0x430, %edx            # imm = 0x430
callq 0xa0b0
leaq 0x196c3(%rip), %rdi     # 0x334a3
leaq 0x18ead(%rip), %rsi     # 0x32c94
leaq 0x19674(%rip), %rcx     # 0x33462
movl $0x43d, %edx            # imm = 0x43D
callq 0xa0b0
leaq 0x15595(%rip), %rdi     # 0x2f394
leaq 0x18e8e(%rip), %rsi     # 0x32c94
leaq 0x19655(%rip), %rcx     # 0x33462
movl $0x48e, %edx            # imm = 0x48E
callq 0xa0b0
leaq 0x15576(%rip), %rdi     # 0x2f394
leaq 0x18e6f(%rip), %rsi     # 0x32c94
leaq 0x19636(%rip), %rcx     # 0x33462
movl $0x455, %edx            # imm = 0x455
callq 0xa0b0
leaq 0x15557(%rip), %rdi     # 0x2f394
leaq 0x18e50(%rip), %rsi     # 0x32c94
leaq 0x19617(%rip), %rcx     # 0x33462
movl $0x487, %edx            # imm = 0x487
callq 0xa0b0