LLM4Binary/decompile-bench-makefile huggingface dataset:
// File: /workspace/github_c_makefile_star2_O2/ShinyaKato[P]skcc/preprocess.c
// Function: check_parameter
int check_parameter(struct macro_entry *macro, struct pp_token *token) {
  int parameter_size = macro->parameter_size;
  if(macro->parameter_ellipsis) parameter_size++;

  if(token->type == PP_IDENT) {
    for(int i = 0; i < parameter_size; i++) {
      if(strcmp(token->text->head, macro->parameters[i]->head) == 0) {
        return 1;
      }
    }
  }

  return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
xorl %r15d, %r15d
cmpl $0x1, (%rsi)
jne 0x50c8
movq %rsi, %rbx
movq %rdi, %r14
movl 0x10(%rdi), %r12d
cmpl $0x1, 0x14(%rdi)
sbbl $-0x1, %r12d
xorl %r15d, %r15d
testl %r12d, %r12d
cmovlel %r15d, %r12d
pushq $0x1
popq %rbp
xorl %r13d, %r13d
cmpq %r13, %r12
je 0x50c8
movq 0x10(%rbx), %rax
movq (%rax), %rdi
movq 0x18(%r14,%r13,8), %rax
movq (%rax), %rsi
callq 0x1080
incq %r13
testl %eax, %eax
jne 0x50a5
movl %ebp, %r15d
movl %r15d, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/ShinyaKato[P]skcc/preprocess.c
// Function: check_stringify_operator
int check_stringify_operator(struct macro_entry *macro) {
  struct pp_list *list = macro->replacement_list;

  for(struct pp_node *node = list->head; node != NULL; node = node->next) {
    if(node->token->type == PP_SHARP) {
      struct pp_node *target = node->next;

      if(target == NULL) return 0;
      if(target->token->type == PP_SPACE) target = target->next;
      if(!check_parameter(macro, target->token)) return 0;

      node = target;
    }
  }

  return 1;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
movq 0x418(%rdi), %r15
movq (%r15), %r14
testq %r14, %r14
je 0x5128
movq (%r14), %rax
cmpl $0x39, (%rax)
jne 0x511f
movq 0x8(%r14), %r15
testq %r15, %r15
je 0x5128
movq (%r15), %rsi
cmpl $0x3c, (%rsi)
jne 0x5111
movq 0x8(%r15), %r15
movq (%r15), %rsi
movq %rbx, %rdi
callq 0x5070
testl %eax, %eax
jne 0x5122
jmp 0x5128
movq %r14, %r15
addq $0x8, %r15
jmp 0x50e9
xorl %eax, %eax
testq %r14, %r14
sete %al
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O2/ShinyaKato[P]skcc/preprocess.c
// Function: check_concat_operator
int check_concat_operator(struct macro_entry *macro) {
  struct pp_list *list = macro->replacement_list;

  for(struct pp_node *node = list->head; node != NULL; node = node->next) {
    if(node->token->type == PP_CONCAT) {
      if(node == list->head) return 0;
      if(node->next == NULL) return 0;
    }
  }

  return 1;
}

// Assembly:
movq 0x418(%rdi), %rax
movq %rax, %rcx
movq (%rcx), %rcx
testq %rcx, %rcx
je 0x5162
movq (%rcx), %rdx
cmpl $0x3a, (%rdx)
jne 0x515c
cmpq (%rax), %rcx
je 0x5162
cmpq $0x0, 0x8(%rcx)
je 0x5162
addq $0x8, %rcx
jmp 0x5140
xorl %eax, %eax
testq %rcx, %rcx
sete %al
retq
// File: /workspace/github_c_makefile_star2_O2/ShinyaKato[P]skcc/preprocess.c
// Function: parse_text_line
void parse_text_line(struct preprocessor *pp) {
  struct pp_list *text = allocate_pp_list();

  while(1) {
    struct pp_token *token = read_pp_token(pp);
    append_pp_list(text, token);
    if(token->type == PP_NEW_LINE) {
      struct pp_token *next = peek_pp_token(pp);
      if(next->type == PP_SHARP || next->type == PP_NONE) {
        break;
      }
    }
  }

  struct pp_list *replaced = scan_macro(pp, text);
  concat_pp_list(pp->list, replaced);
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
callq 0x325c
movq %rax, %r14
movq %rbx, %rdi
callq 0x3fcd
movq %rax, %r15
movq %r14, %rdi
movq %rax, %rsi
callq 0x32b4
cmpl $0x3b, (%r15)
jne 0x547a
movq %rbx, %rdi
callq 0x3fa6
movl (%rax), %eax
cmpl $0x3e, %eax
je 0x54aa
cmpl $0x39, %eax
jne 0x547a
movq %rbx, %rdi
movq %r14, %rsi
callq 0x368f
movq (%rax), %rcx
testq %rcx, %rcx
je 0x54d0
movq 0x18(%rbx), %rdx
movq 0x8(%rdx), %rsi
movq %rcx, (%rsi)
movq 0x8(%rax), %rax
movq %rax, 0x8(%rdx)
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O2/ShinyaKato[P]skcc/preprocess.c
// Function: check_if_section
int check_if_section(struct preprocessor *pp) {
  if(check_keyword(pp, "if")) return 1;
  if(check_keyword(pp, "ifdef")) return 1;
  if(check_keyword(pp, "ifndef")) return 1;
  return 0;
}

// Assembly:
pushq %rbx
movq %rdi, %rbx
leaq 0x1b43(%rip), %rsi      # 0x7024
callq 0x400e
testl %eax, %eax
jne 0x54fd
leaq 0x1b19(%rip), %rsi      # 0x700a
movq %rbx, %rdi
callq 0x400e
testl %eax, %eax
je 0x5502
pushq $0x1
popq %rax
popq %rbx
retq
leaq 0x1b07(%rip), %rsi      # 0x7010
movq %rbx, %rdi
popq %rbx
jmp 0x400e
// File: /workspace/github_c_makefile_star2_O2/ShinyaKato[P]skcc/preprocess.c
// Function: check_group_end
int check_group_end(struct preprocessor *pp) {
  if(check_keyword(pp, "elif")) return 1;
  if(check_keyword(pp, "else")) return 1;
  if(check_keyword(pp, "endif")) return 1;
  return 0;
}

// Assembly:
pushq %rbx
movq %rdi, %rbx
leaq 0x1afa(%rip), %rsi      # 0x7017
callq 0x400e
testl %eax, %eax
jne 0x5539
leaq 0x1aef(%rip), %rsi      # 0x701c
movq %rbx, %rdi
callq 0x400e
testl %eax, %eax
je 0x553e
pushq $0x1
popq %rax
popq %rbx
retq
leaq 0x1adc(%rip), %rsi      # 0x7021
movq %rbx, %rdi
popq %rbx
jmp 0x400e
// File: /workspace/github_c_makefile_star2_O2/ShinyaKato[P]skcc/preprocess.c
// Function: preprocess
struct pp_list *preprocess(unsigned char *file) {
  struct macro_entry *arch = allocate_macro_entry();
  arch->identifier = "__x86_64__";
  insert_macro_table(arch);

  struct pp_list *list = parse_preprocessing_file(file);

  for(int i = 0; i < MACRO_TABLE_SIZE; i++) {
    if(macro_table[i] != NULL) {
      free_macro_entry(macro_table[i]);
    }
  }

  return list;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
callq 0x3301
leaq 0x1cbc(%rip), %rcx      # 0x7231
movq %rcx, 0x8(%rax)
movq %rax, %rdi
callq 0x3445
movq %rbx, %rdi
callq 0x4fb4
movq %rax, %rbx
xorl %r14d, %r14d
leaq 0x4b1a(%rip), %r15      # 0xa0b0
cmpq $0x50008, %r14          # imm = 0x50008
je 0x55b3
movq (%r14,%r15), %rdi
testq %rdi, %rdi
je 0x55ad
callq 0x3340
addq $0x8, %r14
jmp 0x5596
movq %rbx, %rax
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O2/ShinyaKato[P]skcc/main.c
// Function: main
int main(int argc, char **argv) {
  if(argc < 2) {
    error("usage: skcc [source file name]");
  }

  char *file = argv[1];
  struct pp_list *list = preprocess(file);

  /* for(struct pp_node *node = list->head; node != NULL; node = node->next) { */
  /*   struct pp_token *token = node->token; */
  /*   printf("(%d, %s)", token->type, token->name); */
  /*   if(token->type != PP_NEW_LINE && token->type != PP_SPACE && token->type != PP_NONE) { */
  /*     printf(" %s", token->text->head); */
  /*   } */
  /*   printf("\n"); */
  /* } */

  for(struct pp_node *node = list->head; node != NULL; node = node->next) {
    struct pp_token *token = node->token;
    printf("%s", token->text->head);
  }

  return 0;
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
cmpl $0x1, %edi
jg 0x55e0
leaq 0x1c6d(%rip), %rdi      # 0x723c
leaq 0x1c6d(%rip), %rdx      # 0x7243
pushq $0x5
popq %rsi
xorl %eax, %eax
callq 0x1252
movq 0x8(%rbx), %rdi
callq 0x5561
movq %rax, %rbx
leaq 0x1c6f(%rip), %r14      # 0x7262
movq (%rbx), %rbx
testq %rbx, %rbx
je 0x5615
movq (%rbx), %rax
movq 0x10(%rax), %rax
movq (%rax), %rsi
movq %r14, %rdi
xorl %eax, %eax
callq 0x1050
addq $0x8, %rbx
jmp 0x55f3
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/net.cpp
// Function: Net::Net(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
Net::Net(string n){
  netname = n;
  val ='x';
  drivers = new vector<Gate *>;
  loads = new vector<Gate *>;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r14
pushq %rbx
movq %rdi, %rbx
leaq 0x18(%rdi), %r14
leaq 0x28(%rdi), %rax
movq %rax, 0x18(%rdi)
andq $0x0, 0x20(%rdi)
movb $0x0, 0x28(%rdi)
movq %r14, %rdi
callq 0x3100
movb $0x78, 0x10(%rbx)
pushq $0x18
popq %rdi
callq 0x31a0
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
andq $0x0, 0x10(%rax)
movq %rax, (%rbx)
pushq $0x18
popq %rdi
callq 0x31a0
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
andq $0x0, 0x10(%rax)
movq %rax, 0x8(%rbx)
popq %rbx
popq %r14
popq %rbp
retq
movq %rax, %rbx
movq %r14, %rdi
callq 0x30d0
movq %rbx, %rdi
callq 0x32f0
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/net.cpp
// Function: Net::printDriversLoads()
void Net::printDriversLoads(){
  cout << " net " << name();

  cout << ", drivers: ";
  for(unsigned int i=0; i!=drivers->size();i++){
    cout << (*drivers)[i];
  }

  cout << "  loads: ";
  for(unsigned int i=0; i!=loads->size();i++){
    cout << (*loads)[i];
  }
  cout<< endl;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %rbx
subq $0x28, %rsp
movq %rdi, %rbx
movq 0x8931(%rip), %rdi      # 0xbfd0
leaq 0x497a(%rip), %rsi      # 0x8020
callq 0x3190
movq %rax, %r14
leaq 0x18(%rbx), %rsi
leaq -0x38(%rbp), %r15
movq %r15, %rdi
callq 0x3240
movq %r14, %rdi
movq %r15, %rsi
callq 0x3180
leaq -0x38(%rbp), %rdi
callq 0x30d0
movq 0x88f7(%rip), %r14      # 0xbfd0
leaq 0x4946(%rip), %rsi      # 0x8026
movq %r14, %rdi
callq 0x3190
xorl %eax, %eax
movl %eax, %r15d
movq (%rbx), %rcx
movq (%rcx), %rax
movq 0x8(%rcx), %rcx
subq %rax, %rcx
sarq $0x3, %rcx
cmpq %r15, %rcx
je 0x3715
movq (%rax,%r15,8), %rsi
movq %r14, %rdi
callq 0x3140
leal 0x1(%r15), %eax
jmp 0x36ea
movq 0x88b4(%rip), %r14      # 0xbfd0
leaq 0x490f(%rip), %rsi      # 0x8032
movq %r14, %rdi
callq 0x3190
xorl %eax, %eax
movl %eax, %r15d
movq 0x8(%rbx), %rcx
movq (%rcx), %rax
movq 0x8(%rcx), %rcx
subq %rax, %rcx
sarq $0x3, %rcx
cmpq %r15, %rcx
je 0x3759
movq (%rax,%r15,8), %rsi
movq %r14, %rdi
callq 0x3140
leal 0x1(%r15), %eax
jmp 0x372d
movq 0x8870(%rip), %rdi      # 0xbfd0
callq 0x30e0
addq $0x28, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
leaq -0x38(%rbp), %rdi
callq 0x30d0
movq %rbx, %rdi
callq 0x32f0
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/gsim.cpp
// Function: main
int main(int argc, char* argv[]){

  if(argc < 2){ //use "argc < 3" for pa6
    cerr << "Usage: ./gatesim verilog_file input_test_file" << endl;
    return 1;
  }

/*************** autoparsing **************
//note: to use the autoparsing, need to change "parse" to a pure virtual fuction, in vlg_parser.h, namely:
//  virtual Design *parse(char *filename) =0;

  VlgParserAuto auto_;
  Design* design2 = auto_.parse(argv[1]);
  ofstream output_stream("autoparsing_result.v");

  design2->dump(output_stream);
  output_stream.close();
*******************************************/

  //self parsing
  VlgParser pars;
  Design* design1= pars.parse(argv[1]);
  ofstream ofile("output.v") ; 
  
  //print results if no errors
  if(design1!=NULL){
    cout<< " parser correct " <<endl;
    design1->dump(ofile);
    delete design1;
  }
  else{ //if error, report
    cout<< " Parser reports error " <<endl;
  }


  ofile.close();

  return 0;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %rbx
subq $0x208, %rsp            # imm = 0x208
cmpl $0x1, %edi
jg 0x3984
movq 0x8688(%rip), %rdi      # 0xbff0
leaq 0x46e7(%rip), %rsi      # 0x8056
callq 0x3190
movq %rax, %rdi
callq 0x30e0
pushq $0x1
popq %rax
jmp 0x3a33
leaq 0x83fd(%rip), %rax      # 0xbd88
addq $0x10, %rax
leaq -0x10(%rbp), %rdi
movq %rax, (%rdi)
movq 0x8(%rsi), %rsi
callq 0x60d0
movq %rax, %rbx
leaq 0x46db(%rip), %rsi      # 0x8084
leaq -0x210(%rbp), %rdi
pushq $0x10
popq %rdx
callq 0x31e0
testq %rbx, %rbx
je 0x39fe
movq 0x860c(%rip), %rdi      # 0xbfd0
leaq 0x46c2(%rip), %rsi      # 0x808d
callq 0x3190
movq %rax, %rdi
callq 0x30e0
leaq -0x210(%rbp), %rsi
movq %rbx, %rdi
callq 0x4d78
movq %rbx, %rdi
callq 0x49a4
movl $0xd8, %esi
movq %rbx, %rdi
callq 0x31b0
jmp 0x3a19
movq 0x85cb(%rip), %rdi      # 0xbfd0
leaq 0x4692(%rip), %rsi      # 0x809e
callq 0x3190
movq %rax, %rdi
callq 0x30e0
leaq -0x210(%rbp), %rdi
callq 0x3250
leaq -0x210(%rbp), %rdi
callq 0x3270
xorl %eax, %eax
addq $0x208, %rsp            # imm = 0x208
popq %rbx
popq %rbp
retq
movq %rax, %rbx
leaq -0x210(%rbp), %rdi
callq 0x3270
movq %rbx, %rdi
callq 0x32f0
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/gates.cpp
// Function: Gate::Gate(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
Gate::Gate(string n){ //no delay
  delay = 1;
  inst_name = n;
  inputs = new vector<Net *>;
  delay_default=true;
  output = NULL;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r14
pushq %rbx
movq %rdi, %rbx
leaq 0x8159(%rip), %rax      # 0xbbe0
movq %rax, (%rdi)
leaq 0x28(%rdi), %rax
movq %rax, 0x18(%rdi)
andq $0x0, 0x20(%rdi)
leaq 0x18(%rdi), %r14
movb $0x0, 0x28(%rdi)
movl $0x1, 0x38(%rdi)
movq %r14, %rdi
callq 0x3100
pushq $0x18
popq %rdi
callq 0x31a0
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
andq $0x0, 0x10(%rax)
movq %rax, 0x8(%rbx)
movb $0x1, 0x3c(%rbx)
andq $0x0, 0x10(%rbx)
popq %rbx
popq %r14
popq %rbp
retq
movq %rax, %rbx
movq %r14, %rdi
callq 0x30d0
movq %rbx, %rdi
callq 0x32f0
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/gates.cpp
// Function: Gate::Gate(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>, int)
Gate::Gate(string n, int d){  // with delay provided
  inst_name = n;
  delay = d;
  inputs = new vector<Net *>;
  delay_default=false;
  output = NULL;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %edx, %r15d
movq %rdi, %rbx
leaq 0x80e3(%rip), %rax      # 0xbbe0
movq %rax, (%rdi)
leaq 0x18(%rdi), %r14
leaq 0x28(%rdi), %rax
movq %rax, 0x18(%rdi)
andq $0x0, 0x20(%rdi)
movb $0x0, 0x28(%rdi)
movq %r14, %rdi
callq 0x3100
movl %r15d, 0x38(%rbx)
pushq $0x18
popq %rdi
callq 0x31a0
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
andq $0x0, 0x10(%rax)
movq %rax, 0x8(%rbx)
movb $0x0, 0x3c(%rbx)
andq $0x0, 0x10(%rbx)
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
movq %r14, %rdi
callq 0x30d0
movq %rbx, %rdi
callq 0x32f0
nop
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/gates.cpp
// Function: Gate::dump(std::ostream&)
void Gate::dump(ostream &os) {

  if(!delay_default){
    os << "#" << delay <<" "; 
  }
  os << inst_name <<'(';
  if(output!=NULL){
    os << output->name();
  }
  for(unsigned int i=0; i!=inputs->size(); i++){
    os << ", " << ( (*inputs)[i]->name() );
  }
  os << ");" <<endl ;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movq %rsi, %rbx
movq %rdi, %r14
cmpb $0x0, 0x3c(%rdi)
jne 0x3c91
leaq 0x4447(%rip), %rsi      # 0x80b5
movq %rbx, %rdi
callq 0x3190
movl 0x38(%r14), %esi
movq %rax, %rdi
callq 0x32e0
leaq 0x45c4(%rip), %rsi      # 0x824d
movq %rax, %rdi
callq 0x3190
leaq 0x18(%r14), %rsi
movq %rbx, %rdi
callq 0x3180
pushq $0x28
popq %rsi
movq %rax, %rdi
callq 0x31f0
movq 0x10(%r14), %rsi
testq %rsi, %rsi
je 0x3cd1
leaq -0x48(%rbp), %r15
movq %r15, %rdi
callq 0x3616
movq %rbx, %rdi
movq %r15, %rsi
callq 0x3180
leaq -0x48(%rbp), %rdi
callq 0x30d0
xorl %r15d, %r15d
leaq -0x48(%rbp), %r12
movl %r15d, %r15d
movq 0x8(%r14), %rax
movq 0x8(%rax), %rcx
subq (%rax), %rcx
sarq $0x3, %rcx
cmpq %r15, %rcx
je 0x3d2c
movq %rbx, %rdi
leaq 0x43be(%rip), %rsi      # 0x80b7
callq 0x3190
movq %rax, %r13
movq 0x8(%r14), %rax
movq (%rax), %rax
movq (%rax,%r15,8), %rsi
movq %r12, %rdi
callq 0x3616
movq %r13, %rdi
movq %r12, %rsi
callq 0x3180
movq %r12, %rdi
callq 0x30d0
incl %r15d
jmp 0x3cd8
leaq 0x4387(%rip), %rsi      # 0x80ba
movq %rbx, %rdi
callq 0x3190
movq %rax, %rdi
callq 0x30e0
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
jmp 0x3d54
movq %rax, %rbx
leaq -0x48(%rbp), %rdi
callq 0x30d0
movq %rbx, %rdi
callq 0x32f0
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/gates.cpp
// Function: And::eval()
char And::eval(){
  unsigned int count1=0;
  for(unsigned i = 0; i!=inputs->size() ; i++){
    char value_in =(*inputs)[i]->getVal() ;
    if(value_in=='0'){
      return '0';
    }
    if(value_in=='1'){
      count1++;
    }
  }
  if(count1==inputs->size()){ 
    return '1';
  }
//if they is no '0' and there is at least one 'x'
return 'x';
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq 0x8(%rdi), %rax
movq (%rax), %rcx
movq 0x8(%rax), %rax
subq %rcx, %rax
sarq $0x3, %rax
xorl %edx, %edx
xorl %esi, %esi
movl %esi, %esi
cmpq %rsi, %rax
je 0x3ecd
movq (%rcx,%rsi,8), %rdi
movb 0x10(%rdi), %dil
cmpb $0x30, %dil
je 0x3ee1
xorl %r8d, %r8d
cmpb $0x31, %dil
sete %r8b
addl %r8d, %edx
incl %esi
jmp 0x3ea6
movl %edx, %ecx
cmpq %rcx, %rax
movl $0x31, %ecx
movl $0x78, %eax
cmovel %ecx, %eax
jmp 0x3ee3
movb $0x30, %al
popq %rbp
retq
nop
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/gates.cpp
// Function: Or::eval()
char Or::eval(){
  unsigned int count0=0;
  for(unsigned i = 0; i!=inputs->size() ; i++){
    char value_in =(*inputs)[i]->getVal() ;
    if(value_in=='1'){
      return '1';
    }
    if(value_in=='0'){
      count0++;
    }
  }

  if(count0==inputs->size()){ 
    return '0';
  }
//if they is no '1' and there is at least 'x'
return 'x';
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq 0x8(%rdi), %rax
movq (%rax), %rcx
movq 0x8(%rax), %rax
subq %rcx, %rax
sarq $0x3, %rax
xorl %edx, %edx
xorl %esi, %esi
movl %esi, %esi
cmpq %rsi, %rax
je 0x404b
movq (%rcx,%rsi,8), %rdi
movb 0x10(%rdi), %dil
cmpb $0x31, %dil
je 0x405f
xorl %r8d, %r8d
cmpb $0x30, %dil
sete %r8b
addl %r8d, %edx
incl %esi
jmp 0x4024
movl %edx, %ecx
cmpq %rcx, %rax
movl $0x30, %ecx
movl $0x78, %eax
cmovel %ecx, %eax
jmp 0x4061
movb $0x31, %al
popq %rbp
retq
nop
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/gates.cpp
// Function: Nor::eval()
char Nor::eval(){
  unsigned int count0=0;
  for(unsigned i = 0; i!=inputs->size() ; i++){
    char value_in =(*inputs)[i]->getVal() ;
    if(value_in=='1'){
      return '0';//'1';
    }
    if(value_in=='0'){
      count0++;
    }
  }

  if(count0==inputs->size()){ 
    return '1';//'0';
  }
//if they is no '1' and there is one 'x'
return 'x';
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq 0x8(%rdi), %rax
movq (%rax), %rcx
movq 0x8(%rax), %rax
subq %rcx, %rax
sarq $0x3, %rax
xorl %edx, %edx
xorl %esi, %esi
movl %esi, %esi
cmpq %rsi, %rax
je 0x41c9
movq (%rcx,%rsi,8), %rdi
movb 0x10(%rdi), %dil
cmpb $0x31, %dil
je 0x41dd
xorl %r8d, %r8d
cmpb $0x30, %dil
sete %r8b
addl %r8d, %edx
incl %esi
jmp 0x41a2
movl %edx, %ecx
cmpq %rcx, %rax
movl $0x31, %ecx
movl $0x78, %eax
cmovel %ecx, %eax
jmp 0x41df
movb $0x30, %al
popq %rbp
retq
nop
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/gates.cpp
// Function: Xor::eval()
char Xor::eval(){ //odd number of '1' gives true
  bool unknown=false;
  unsigned int count1=0;
  for(unsigned i = 0; i!=inputs->size() ; i++){
    char value_in =(*inputs)[i]->getVal() ;
    if(value_in=='x'){
      unknown=true;
    }
    if(value_in=='0'){
      count1++;
    }
  }
  
 
  bool isOdd=count1%2;
  if( isOdd ){ //if it is odd number
    return '1';
  }
  if(unknown){
    return 'x';
  }


return '0';
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq 0x8(%rdi), %rax
movq (%rax), %rcx
movq 0x8(%rax), %rdx
subq %rcx, %rdx
sarq $0x3, %rdx
xorl %eax, %eax
xorl %edi, %edi
xorl %esi, %esi
movl %edi, %edi
cmpq %rdi, %rdx
je 0x44cc
movq (%rcx,%rdi,8), %r8
movb 0x10(%r8), %r8b
cmpb $0x78, %r8b
sete %r9b
orb %r9b, %sil
xorl %r9d, %r9d
cmpb $0x30, %r8b
sete %r9b
addl %r9d, %eax
incl %edi
jmp 0x44a0
testb $0x1, %sil
movl $0x78, %ecx
movl $0x30, %edx
cmovnel %ecx, %edx
testb $0x1, %al
movl $0x31, %eax
cmovel %edx, %eax
popq %rbp
retq
nop
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/gates.cpp
// Function: Not::eval()
char Not::eval(){
  char value_in =(*inputs)[0]->getVal() ;

  if(value_in=='1'){
    return '0';
  }
  if(value_in=='0'){
    return '1';
  }

return 'x';
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq 0x8(%rdi), %rax
movq (%rax), %rax
movq (%rax), %rax
movb 0x10(%rax), %al
cmpb $0x30, %al
movl $0x31, %ecx
movl $0x78, %edx
cmovel %ecx, %edx
cmpb $0x31, %al
movl $0x30, %eax
cmovnel %edx, %eax
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/design.cpp
// Function: Design::Design(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
Design::Design(string n){
  desname = n;
  PINets = new vector<Net *>(); // " () " used for initializing size to 0 
  PONets = new vector<Net *>();
  WireNets = new vector<Net*>();
  all_Nets = new vector<Net*>();
  all_Gates = new vector<Gate *>();
  //pis.clear();
  //pos.clear();


}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
leaq 0x10(%rdi), %rax
movq %rax, (%rdi)
andq $0x0, 0x8(%rdi)
movb $0x0, 0x10(%rdi)
leaq 0x28(%rdi), %rax
andl $0x0, 0x28(%rdi)
andq $0x0, 0x30(%rdi)
movq %rax, 0x38(%rdi)
movq %rax, 0x40(%rdi)
andq $0x0, 0x48(%rdi)
leaq 0x58(%rdi), %rax
andl $0x0, 0x58(%rdi)
andq $0x0, 0x60(%rdi)
movq %rax, 0x68(%rdi)
movq %rax, 0x70(%rdi)
xorps %xmm0, %xmm0
movups %xmm0, 0x78(%rdi)
movups %xmm0, 0x88(%rdi)
movups %xmm0, 0x98(%rdi)
andq $0x0, 0xa8(%rdi)
callq 0x3100
pushq $0x18
popq %rdi
callq 0x31a0
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
andq $0x0, 0x10(%rax)
movq %rax, 0xb0(%rbx)
pushq $0x18
popq %rdi
callq 0x31a0
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
andq $0x0, 0x10(%rax)
movq %rax, 0xb8(%rbx)
pushq $0x18
popq %rdi
callq 0x31a0
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
andq $0x0, 0x10(%rax)
movq %rax, 0xc0(%rbx)
pushq $0x18
popq %rdi
callq 0x31a0
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
andq $0x0, 0x10(%rax)
movq %rax, 0xc8(%rbx)
pushq $0x18
popq %rdi
callq 0x31a0
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
andq $0x0, 0x10(%rax)
movq %rax, 0xd0(%rbx)
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %r14
leaq 0x98(%rbx), %rdi
leaq 0x80(%rbx), %r15
leaq 0x50(%rbx), %r12
leaq 0x20(%rbx), %r13
callq 0x53b6
movq %r15, %rdi
callq 0x53b6
movq %r12, %rdi
callq 0x54f2
movq %r13, %rdi
callq 0x556e
movq %rbx, %rdi
callq 0x30d0
movq %r14, %rdi
callq 0x32f0
nop
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/design.cpp
// Function: Design::~Design()
Design::~Design(){
  //destructor for all nets
  map<string, Net *>::iterator it_net;
  for(it_net=designNets.begin() ; it_net!=designNets.end(); it_net++){
    //cout << (it_net->second)->name() <<endl;////////////////
    delete it_net->second;
  }

 // destructor for all gates
  map<string, Gate *>::iterator it_gate;
  for(it_gate=designGates.begin() ; it_gate!=designGates.end(); it_gate++){
    //cout << (it_gate->second)->name() <<endl;////////////////
    delete it_gate->second;
  }
  
  //delete vectors
  delete PINets;
  delete PONets;
  delete WireNets;
  delete all_Nets;
  delete all_Gates;
  
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq 0x38(%rdi), %r15
leaq 0x28(%rdi), %r13
pushq $0x40
popq %r14
cmpq %r13, %r15
je 0x49ef
movq 0x40(%r15), %r12
testq %r12, %r12
je 0x49d7
movq %r12, %rdi
callq 0x35c4
movq %r12, %rdi
movq %r14, %rsi
callq 0x31b0
movq %r15, %rdi
callq 0x3110
movq %rax, %r15
jmp 0x49c1
movq 0x68(%rbx), %r14
leaq 0x58(%rbx), %r15
cmpq %r15, %r14
je 0x4a18
movq 0x40(%r14), %rdi
testq %rdi, %rdi
je 0x4a0b
movq (%rdi), %rax
callq *0x8(%rax)
movq %r14, %rdi
callq 0x3110
movq %rax, %r14
jmp 0x49f7
movq 0xb0(%rbx), %r14
testq %r14, %r14
je 0x4a2c
movq %r14, %rdi
callq 0x465e
pushq $0x18
popq %rsi
movq %r14, %rdi
callq 0x31b0
movq 0xb8(%rbx), %r14
testq %r14, %r14
je 0x4a4b
movq %r14, %rdi
callq 0x465e
pushq $0x18
popq %rsi
movq %r14, %rdi
callq 0x31b0
movq 0xc0(%rbx), %r14
testq %r14, %r14
je 0x4a6a
movq %r14, %rdi
callq 0x465e
pushq $0x18
popq %rsi
movq %r14, %rdi
callq 0x31b0
movq 0xc8(%rbx), %r14
testq %r14, %r14
je 0x4a89
movq %r14, %rdi
callq 0x465e
pushq $0x18
popq %rsi
movq %r14, %rdi
callq 0x31b0
movq 0xd0(%rbx), %r14
testq %r14, %r14
je 0x4aa8
movq %r14, %rdi
callq 0x37b6
leaq 0x50(%rbx), %r15
leaq 0x20(%rbx), %r12
pushq $0x18
popq %rsi
movq %r14, %rdi
callq 0x31b0
leaq 0x98(%rbx), %rdi
callq 0x53b6
leaq 0x80(%rbx), %rdi
callq 0x53b6
movq %r15, %rdi
callq 0x54f2
movq %r12, %rdi
callq 0x556e
movq %rbx, %rdi
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x30d0
nop
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/design.cpp
// Function: Design::addPI(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
void Design::addPI(string n){
  pis.push_back(n);
  Net* ptr_net = new Net(n);//make net
  PINets->push_back(ptr_net); 
  designNets[n]=ptr_net;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x30, %rsp
movq %rsi, %rbx
movq %rdi, %r14
addq $0x80, %rdi
callq 0x53e2
pushq $0x40
popq %rdi
callq 0x31a0
movq %rax, %r15
leaq -0x40(%rbp), %rdi
movq %rbx, %rsi
callq 0x3240
leaq -0x40(%rbp), %rsi
movq %r15, %rdi
callq 0x3554
leaq -0x40(%rbp), %rdi
callq 0x30d0
leaq -0x48(%rbp), %r12
movq %r15, (%r12)
movq 0xb0(%r14), %rdi
movq %r12, %rsi
callq 0x463a
movq (%r12), %r15
addq $0x20, %r14
movq %r14, %rdi
movq %rbx, %rsi
callq 0x541e
movq %r15, (%rax)
addq $0x30, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
leaq -0x40(%rbp), %rdi
callq 0x30d0
jmp 0x4baa
movq %rax, %rbx
pushq $0x40
popq %rsi
movq %r15, %rdi
callq 0x31b0
movq %rbx, %rdi
callq 0x32f0
nop
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/design.cpp
// Function: Design::addPO(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
void Design::addPO(string n){ 
  pos.push_back(n);
  Net* ptr_net = new Net(n);//make net
  PONets->push_back(ptr_net); 
  designNets[n]=ptr_net; 
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x30, %rsp
movq %rsi, %rbx
movq %rdi, %r14
addq $0x98, %rdi
callq 0x53e2
pushq $0x40
popq %rdi
callq 0x31a0
movq %rax, %r15
leaq -0x40(%rbp), %rdi
movq %rbx, %rsi
callq 0x3240
leaq -0x40(%rbp), %rsi
movq %r15, %rdi
callq 0x3554
leaq -0x40(%rbp), %rdi
callq 0x30d0
leaq -0x48(%rbp), %r12
movq %r15, (%r12)
movq 0xb8(%r14), %rdi
movq %r12, %rsi
callq 0x463a
movq (%r12), %r15
addq $0x20, %r14
movq %r14, %rdi
movq %rbx, %rsi
callq 0x541e
movq %r15, (%rax)
addq $0x30, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
leaq -0x40(%rbp), %rdi
callq 0x30d0
jmp 0x4c56
movq %rax, %rbx
pushq $0x40
popq %rsi
movq %r15, %rdi
callq 0x31b0
movq %rbx, %rdi
callq 0x32f0
nop
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/design.cpp
// Function: Design::findNet(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
Net* Design::findNet(string net_name){
  map<string, Net *>::iterator it;
  it=designNets.find(net_name);
  if(it!=designNets.end() ){
    return it->second;
  }
  else{
    return NULL;
  }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %rbx
pushq %rax
movq %rdi, %rbx
addq $0x20, %rdi
callq 0x5c4e
addq $0x28, %rbx
cmpq %rbx, %rax
je 0x4c8b
movq 0x40(%rax), %rax
jmp 0x4c8d
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/design.cpp
// Function: Design::addFindNet(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
Net* Design::addFindNet(string n){
  map<string, Net *>::iterator it;
  it=designNets.find(n);
  if(it!=designNets.end() ){
    return it->second;
  }
  else{
    Net* net_ptr = new Net(n);
    designNets[n]= net_ptr;
    WireNets->push_back(net_ptr);

    return net_ptr;
  }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movq %rsi, %r15
movq %rdi, %r14
leaq 0x20(%rdi), %r12
movq %r12, %rdi
callq 0x5c4e
leaq 0x28(%r14), %rcx
cmpq %rcx, %rax
je 0x4cc6
movq 0x40(%rax), %rax
jmp 0x4d1b
pushq $0x40
popq %rdi
callq 0x31a0
movq %rax, %rbx
leaq -0x48(%rbp), %rdi
movq %r15, %rsi
callq 0x3240
leaq -0x48(%rbp), %rsi
movq %rbx, %rdi
callq 0x3554
leaq -0x48(%rbp), %rdi
callq 0x30d0
leaq -0x50(%rbp), %r13
movq %rbx, (%r13)
movq %r12, %rdi
movq %r15, %rsi
callq 0x541e
movq %rbx, (%rax)
movq 0xc0(%r14), %rdi
movq %r13, %rsi
callq 0x463a
movq (%r13), %rax
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %r14
leaq -0x48(%rbp), %rdi
callq 0x30d0
jmp 0x4d3b
movq %rax, %r14
pushq $0x40
popq %rsi
movq %rbx, %rdi
callq 0x31b0
movq %r14, %rdi
callq 0x32f0
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/design.cpp
// Function: Design::findGate(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
Gate * Design::findGate(string inst_name){
  map<string, Gate*>::iterator it;
  it=designGates.find(inst_name);
  if(it!=designGates.end() ){
    return it->second;
  }
  else{
    return NULL;
  }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %rbx
pushq %rax
movq %rdi, %rbx
addq $0x50, %rdi
callq 0x5c96
addq $0x58, %rbx
cmpq %rbx, %rax
je 0x4d6f
movq 0x40(%rax), %rax
jmp 0x4d71
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/design.cpp
// Function: Design::allNets()
vector<Net *> * Design::allNets(){
  map<string, Net *>::iterator it_net;
  for(it_net=designNets.begin() ; it_net!=designNets.end(); it_net++){
     all_Nets->push_back( it_net->second );
  }
  return all_Nets;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq 0x38(%rdi), %r14
leaq 0x28(%rdi), %r15
movq 0xc8(%rbx), %rdi
cmpq %r15, %r14
je 0x5361
leaq 0x40(%r14), %rsi
callq 0x463a
movq %r14, %rdi
callq 0x3110
movq %rax, %r14
jmp 0x533f
movq %rdi, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
nop
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/design.cpp
// Function: Design::allGates()
vector<Gate *> * Design::allGates(){
  map<string, Gate *>::iterator it_gate;
  for(it_gate=designGates.begin() ; it_gate!=designGates.end(); it_gate++){
     all_Gates->push_back( it_gate->second );
  }
  return all_Gates;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq 0x68(%rdi), %r14
leaq 0x58(%rdi), %r15
movq 0xd0(%rbx), %rdi
cmpq %r15, %r14
je 0x53a7
leaq 0x40(%r14), %rsi
callq 0x3784
movq %r14, %rdi
callq 0x3110
movq %rax, %r14
jmp 0x5385
movq %rdi, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
nop
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/vlg_parser_man.cpp
// Function: errase_comments_and_spaces(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
string errase_comments_and_spaces(string s){
  bool exit = false;
  unsigned int i=0;
  while(i<s.length()){
    //delete everything after comments
    if(s[i]=='/'){
        if(s[i+1]=='/'){// if there is two adjacent "//"
          while (i!=s.length() ){ //delete all the values starting from the one located at i
            s.erase(s.begin()+i); 
            exit=true; //to exit loop
          }
          if(exit){
            break;
          }
        }
    }
    //delete repeated spaces
    if(s[i] == ' '){
       while(s[i+1] == ' ' && (i+1)<s.length() ){
         s.erase(s.begin()+i+1); 
       }
    }
    
    i++;
  }
  return s;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movq %rsi, %r14
movq %rdi, %rbx
xorl %r12d, %r12d
movl %r12d, %r15d
movq 0x8(%r14), %rcx
cmpq %r15, %rcx
jbe 0x737f
movq (%r14), %rax
movb (%rax,%r15), %dl
cmpb $0x2f, %dl
jne 0x734d
leal 0x1(%r15), %edx
cmpb $0x2f, (%rax,%rdx)
jne 0x7377
xorl %eax, %eax
cmpq %r15, %rcx
je 0x7342
movq (%r14), %rsi
addq %r15, %rsi
movq %r14, %rdi
callq 0x3210
movq 0x8(%r14), %rcx
movb $0x1, %al
jmp 0x7327
testb $0x1, %al
jne 0x737f
movq (%r14), %rax
movb (%rax,%r15), %dl
cmpb $0x20, %dl
jne 0x7377
leal 0x1(%r15), %r12d
cmpb $0x20, (%rax,%r12)
jne 0x7303
cmpq %r12, 0x8(%r14)
jbe 0x7303
leaq (%rax,%r15), %rsi
incq %rsi
movq %r14, %rdi
callq 0x3210
movq (%r14), %rax
jmp 0x7356
incl %r15d
movl %r15d, %r12d
jmp 0x7303
movq %rbx, %rdi
movq %r14, %rsi
callq 0x3230
movq %rbx, %rax
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/vlg_parser_man.cpp
// Function: remove_side_spaces(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
string remove_side_spaces(string s){
  while(s[0] == ' '){
    s.erase(s.begin()); 
  }
  unsigned int i=s.length()-1;
  while(s[i] == ' '){
    s.erase(s.begin()+i); 
  }
  return s;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
movq (%r14), %rsi
cmpb $0x20, (%rsi)
jne 0x73b8
movq %r14, %rdi
callq 0x3210
jmp 0x73a6
movl 0x8(%r14), %r15d
decl %r15d
cmpb $0x20, (%rsi,%r15)
jne 0x73d6
addq %r15, %rsi
movq %r14, %rdi
callq 0x3210
movq (%r14), %rsi
jmp 0x73bf
movq %rbx, %rdi
movq %r14, %rsi
callq 0x3230
movq %rbx, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/vlg_parser_man.cpp
// Function: isID(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
bool isID(string s){
   if( !isalpha(s[0]) && s[0]!='_'){
      return false;
   }
   for( unsigned int i =1 ; i<s.length();i++){
     if( !isalnum(s[i]) && s[i]!='_' ){
       return false;
     }
   }
   
return true;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq (%rdi), %r15
movsbl (%r15), %r14d
movl %r14d, %edi
callq 0x32b0
cmpl $0x5f, %r14d
je 0x741d
testl %eax, %eax
jne 0x741d
xorl %ebx, %ebx
jmp 0x744a
movq 0x8(%rbx), %r12
pushq $0x1
popq %rcx
movl %ecx, %r13d
cmpq %r13, %r12
setbe %bl
jbe 0x744a
movsbl (%r15,%r13), %r14d
movl %r14d, %edi
callq 0x31c0
leal 0x1(%r13), %ecx
cmpl $0x5f, %r14d
je 0x7424
testl %eax, %eax
jne 0x7424
movl %ebx, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/vlg_parser_man.cpp
// Function: has_proper_parentesis(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
bool has_proper_parentesis(string s){
    s=remove_spaces( s); //removes all spaces

    //check there is only one '(' and that it is in the second to last position
    string str2 (")");
    unsigned found = s.find(str2);
    if (found!=(s.length()-2)){
      cout<< " error: improper ')' "<<endl;
      return false;
    }
   
    //check there is not aditional ;
    string str3 ("(");
    unsigned found3 = s.find(str3);
    if (found3!=string::npos){
      cout<< " error: improper '(' "<<endl;
      return false;
    }

return true;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r14
pushq %rbx
subq $0x70, %rsp
movq %rdi, %rbx
leaq -0x78(%rbp), %r14
movq %r14, %rdi
movq %rbx, %rsi
callq 0x3240
leaq -0x38(%rbp), %rdi
movq %r14, %rsi
callq 0x761d
leaq -0x38(%rbp), %r14
movq %rbx, %rdi
movq %r14, %rsi
callq 0x3200
movq %r14, %rdi
callq 0x30d0
leaq -0x78(%rbp), %rdi
callq 0x30d0
leaq 0xe26(%rip), %rsi       # 0x82d1
leaq -0x38(%rbp), %rdi
leaq -0x58(%rbp), %rdx
callq 0x78f0
leaq -0x38(%rbp), %rsi
movq %rbx, %rdi
xorl %edx, %edx
callq 0x3330
movl %eax, %eax
movq 0x8(%rbx), %rcx
addq $-0x2, %rcx
cmpq %rcx, %rax
jne 0x751d
leaq 0xc44(%rip), %rsi       # 0x8120
leaq -0x58(%rbp), %rdi
leaq -0x11(%rbp), %rdx
callq 0x78f0
leaq -0x58(%rbp), %rsi
movq %rbx, %rdi
xorl %edx, %edx
callq 0x3330
movq 0x4ad2(%rip), %rdi      # 0xbfd0
leaq 0xde4(%rip), %rsi       # 0x82e9
callq 0x3190
movq %rax, %rdi
callq 0x30e0
leaq -0x58(%rbp), %rdi
callq 0x30d0
jmp 0x7538
movq 0x4aac(%rip), %rdi      # 0xbfd0
leaq 0xda8(%rip), %rsi       # 0x82d3
callq 0x3190
movq %rax, %rdi
callq 0x30e0
leaq -0x38(%rbp), %rdi
callq 0x30d0
xorl %eax, %eax
addq $0x70, %rsp
popq %rbx
popq %r14
popq %rbp
retq
jmp 0x755c
movq %rax, %rbx
leaq -0x58(%rbp), %rdi
callq 0x30d0
jmp 0x755f
movq %rax, %rbx
leaq -0x38(%rbp), %rdi
jmp 0x7571
movq %rax, %rbx
jmp 0x7576
movq %rax, %rbx
leaq -0x78(%rbp), %rdi
callq 0x30d0
movq %rbx, %rdi
callq 0x32f0
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/vlg_parser_man.cpp
// Function: has_proper_Semicolon(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
bool has_proper_Semicolon(string s){
    s=remove_side_spaces( s);
    string str2 (";");
    unsigned found = s.find(str2);
    if (found==(s.length()-1)){
      return true;
    }

return false;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r14
pushq %rbx
subq $0x50, %rsp
movq %rdi, %rbx
leaq -0x38(%rbp), %r14
movq %r14, %rdi
movq %rbx, %rsi
callq 0x3240
leaq -0x58(%rbp), %rdi
movq %r14, %rsi
callq 0x7396
leaq -0x58(%rbp), %r14
movq %rbx, %rdi
movq %r14, %rsi
callq 0x3200
movq %r14, %rdi
callq 0x30d0
leaq -0x38(%rbp), %rdi
callq 0x30d0
leaq 0xaed(%rip), %rsi       # 0x80bb
leaq -0x11(%rbp), %rdx
movq %r14, %rdi
callq 0x78f0
movq %rbx, %rdi
movq %r14, %rsi
xorl %edx, %edx
callq 0x3330
movl %eax, %eax
movq 0x8(%rbx), %rcx
decq %rcx
cmpq %rcx, %rax
sete %bl
movq %r14, %rdi
callq 0x30d0
movl %ebx, %eax
addq $0x50, %rsp
popq %rbx
popq %r14
popq %rbp
retq
movq %rax, %rbx
leaq -0x38(%rbp), %rdi
callq 0x30d0
movq %rbx, %rdi
callq 0x32f0
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/vlg_parser_man.cpp
// Function: remove_spaces(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
string remove_spaces(string s){
  unsigned int i=0;
  while(i!=s.length()){
    if(s[i] == ' '){
       s.erase(s.begin()+i); 
    }
    else{
       i++;
    }
  }
  return s;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
xorl %r15d, %r15d
movl %r15d, %r15d
cmpq %r15, 0x8(%r14)
je 0x7655
movq (%r14), %rsi
cmpb $0x20, (%rsi,%r15)
jne 0x7650
addq %r15, %rsi
movq %r14, %rdi
callq 0x3210
jmp 0x7633
incl %r15d
jmp 0x7630
movq %rbx, %rdi
movq %r14, %rsi
callq 0x3230
movq %rbx, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/vlg_parser_man.cpp
// Function: find_gate_type(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
int find_gate_type(string s){
  if (s=="and"){ return AND; }
  if (s=="or"){ return OR; }
  if (s=="nand"){ return NAND; }
  if (s=="nor"){ return NOR; }
  if (s=="xor"){ return XOR; }
  if (s=="not"){ return NOT; }
return 0;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %rbx
pushq %rax
movq %rdi, %rbx
leaq 0xba0(%rip), %rsi       # 0x821e
callq 0x78e0
movl %eax, %ecx
xorl %eax, %eax
testb %cl, %cl
jne 0x76e6
leaq 0xb91(%rip), %rsi       # 0x8223
movq %rbx, %rdi
callq 0x78e0
testb %al, %al
je 0x76a2
pushq $0x1
jmp 0x76e5
leaq 0xb74(%rip), %rsi       # 0x821d
movq %rbx, %rdi
callq 0x78e0
testb %al, %al
je 0x76b9
pushq $0x2
jmp 0x76e5
leaq 0xb62(%rip), %rsi       # 0x8222
movq %rbx, %rdi
callq 0x78e0
testb %al, %al
je 0x76d0
pushq $0x3
jmp 0x76e5
leaq 0xb4f(%rip), %rsi       # 0x8226
movq %rbx, %rdi
callq 0x78e0
testb %al, %al
je 0x76ed
pushq $0x4
popq %rax
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
leaq 0xb36(%rip), %rsi       # 0x822a
movq %rbx, %rdi
callq 0x78e0
movzbl %al, %eax
leal (%rax,%rax,4), %eax
jmp 0x76e6
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/vlg_parser_man.cpp
// Function: return_words(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
vector<string>* return_words(string line_of_text){ //note that this will not have additional spaces given that line of text dont have contiguous spaces
  vector<string>* words=new vector<string>();
  stringstream ss (line_of_text);
  string word;
  while (ss >> word){
//cout<<word<<endl;
    words->push_back(word);
  }
  return words;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %rbx
subq $0x1a8, %rsp            # imm = 0x1A8
movq %rdi, %r15
pushq $0x18
popq %rdi
callq 0x31a0
movq %rax, %rbx
xorps %xmm0, %xmm0
movups %xmm0, (%rax)
andq $0x0, 0x10(%rax)
leaq -0x1c0(%rbp), %r14
pushq $0x18
popq %rdx
movq %r14, %rdi
movq %r15, %rsi
callq 0x32a0
leaq -0x28(%rbp), %rax
movq %rax, -0x10(%rax)
andq $0x0, -0x8(%rax)
movb $0x0, (%rax)
leaq -0x38(%rbp), %r15
movq %r14, %rdi
movq %r15, %rsi
callq 0x3220
movq (%rax), %rcx
movq -0x18(%rcx), %rcx
testb $0x5, 0x20(%rax,%rcx)
jne 0x777c
movq %rbx, %rdi
movq %r15, %rsi
callq 0x53e2
jmp 0x7756
leaq -0x38(%rbp), %rdi
callq 0x30d0
leaq -0x1c0(%rbp), %rdi
callq 0x3130
movq %rbx, %rax
addq $0x1a8, %rsp            # imm = 0x1A8
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
leaq -0x38(%rbp), %rdi
callq 0x30d0
leaq -0x1c0(%rbp), %rdi
callq 0x3130
movq %rbx, %rdi
callq 0x32f0
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/vlg_parser_man.cpp
// Function: isDelay(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
bool isDelay(string s){
  remove_side_spaces(s);
  if(s[0]!='#'){
     return false;
  }
  else{
     s.erase(s.begin() );
     return isNum(s);
  }

}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r14
pushq %rbx
subq $0x60, %rsp
movq %rdi, %r14
leaq -0x50(%rbp), %rbx
movq %rbx, %rdi
movq %r14, %rsi
callq 0x3240
leaq -0x70(%rbp), %rdi
movq %rbx, %rsi
callq 0x7396
leaq -0x70(%rbp), %rdi
callq 0x30d0
leaq -0x50(%rbp), %rdi
callq 0x30d0
movq (%r14), %rsi
cmpb $0x23, (%rsi)
jne 0x7832
movq %r14, %rdi
callq 0x3210
leaq -0x30(%rbp), %rbx
movq %rbx, %rdi
movq %r14, %rsi
callq 0x3240
movq %rbx, %rdi
callq 0x7856
movl %eax, %r14d
leaq -0x30(%rbp), %rdi
callq 0x30d0
jmp 0x7835
xorl %r14d, %r14d
movl %r14d, %eax
addq $0x60, %rsp
popq %rbx
popq %r14
popq %rbp
retq
jmp 0x7843
movq %rax, %r14
movq %rbx, %rdi
callq 0x30d0
movq %r14, %rdi
callq 0x32f0
// File: /workspace/github_c_makefile_star2_O2/luixmao[P]verilog/vlg_parser_man.cpp
// Function: isNum(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
bool isNum(string s){
  remove_side_spaces(s);
  for( unsigned int i =0 ; i<s.length();i++){
     if(!isdigit(s[i])){
       return false;
     }
  }
  return true;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r14
pushq %rbx
subq $0x40, %rsp
movq %rdi, %rbx
leaq -0x30(%rbp), %r14
movq %r14, %rdi
movq %rbx, %rsi
callq 0x3240
leaq -0x50(%rbp), %rdi
movq %r14, %rsi
callq 0x7396
leaq -0x50(%rbp), %rdi
callq 0x30d0
leaq -0x30(%rbp), %rdi
callq 0x30d0
movq 0x8(%rbx), %rax
xorl %edx, %edx
movl %edx, %ecx
cmpq %rcx, %rax
jbe 0x78b0
movq (%rbx), %rdx
movsbl (%rdx,%rcx), %esi
addl $-0x30, %esi
leal 0x1(%rcx), %edx
cmpl $0xa, %esi
jb 0x7897
cmpq %rcx, %rax
setbe %al
addq $0x40, %rsp
popq %rbx
popq %r14
popq %rbp
retq
movq %rax, %rbx
leaq -0x30(%rbp), %rdi
callq 0x30d0
movq %rbx, %rdi
callq 0x32f0
// File: /workspace/github_c_makefile_star2_O2/orangeduck[P]mpc/examples/line_reader.c
// Function: main
int main(int argc, char **argv) {
  
  const char *input = 
    "abcHVwufvyuevuy3y436782\n"
    "\n"
    "\n"
    "rehre\n"
    "rew\n"
    "-ql.;qa\n"
    "eg";
		
  mpc_parser_t* Line = mpc_many(
    mpcf_strfold, 
    mpc_apply(mpc_re("[^\\n]*(\\n|$)"), read_line));
  
  mpc_result_t r;

  (void)argc; (void)argv;

  mpc_parse("input", input, Line, &r);
  printf("\nParsed String: %s", (char*)r.output);
  free(r.output);
  
  mpc_delete(Line);
  
  return 0;
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
leaq 0x7d0c(%rip), %rdi      # 0x9033
callq 0x44bc
leaq 0x61(%rip), %rsi        # 0x1394
movq %rax, %rdi
callq 0x33ab
leaq 0x27ca(%rip), %rdi      # 0x3b0c
movq %rax, %rsi
callq 0x36e2
movq %rax, %rbx
leaq 0x810f(%rip), %rdi      # 0x9463
leaq 0x7ca9(%rip), %rsi      # 0x9004
movq %rsp, %r14
movq %rax, %rdx
movq %r14, %rcx
callq 0x25ad
movq (%r14), %rsi
leaq 0x7ccd(%rip), %rdi      # 0x9040
xorl %eax, %eax
callq 0x10b0
movq (%r14), %rdi
callq 0x1220
movq %rbx, %rdi
callq 0x2a30
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_c_makefile_star2_O2/ohkimur[P]the-c-programming-language-2nd-edition-solutions/chapter_5/exercise_5_09/date_conversion_pointers.c
// Function: main
int main(void)
{
  int day = day_of_year(2021, 2, 12);
  printf("day of the year: %d\n", day);

  int month_invalid = day_of_year(2021, 13, 1);
  if (month_invalid == -1)
  {
    printf("Warning: invalid month detected.\n");
  }

  int day_invalid = day_of_year(2021, 12, 32);
  if (day_invalid == -2)
  {
    printf("Warning: invalid day detected.\n");
  }

  int month;
  int day_month;

  month_day(2021, 43, &month, &day_month);
  printf("month: %d, day: %d\n", month, day_month);

  month_day(2021, 365, &month, &day_month);
  printf("month: %d, day: %d\n", month, day_month);

  month_day(2021, 366, &month, &day_month);
  printf("month: %d, day: %d\n", month, day_month);

  return 0;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
pushq $0x2
popq %rsi
pushq $0xc
popq %rdx
movl $0x7e5, %edi            # imm = 0x7E5
callq 0x123e
leaq 0xe98(%rip), %rdi       # 0x2004
movl %eax, %esi
xorl %eax, %eax
callq 0x1040
pushq $0xd
popq %rsi
pushq $0x1
popq %rdx
movl $0x7e5, %edi            # imm = 0x7E5
callq 0x123e
cmpl $-0x1, %eax
jne 0x1196
leaq 0xee8(%rip), %rdi       # 0x2079
callq 0x1030
pushq $0xc
popq %rsi
pushq $0x20
popq %rdx
movl $0x7e5, %edi            # imm = 0x7E5
callq 0x123e
cmpl $-0x2, %eax
jne 0x11b7
leaq 0xee8(%rip), %rdi       # 0x209a
callq 0x1030
pushq $0x2b
popq %rsi
leaq 0xc(%rsp), %rbx
leaq 0x8(%rsp), %r14
movl $0x7e5, %edi            # imm = 0x7E5
movq %rbx, %rdx
movq %r14, %rcx
callq 0x12c0
movl (%rbx), %esi
movl (%r14), %edx
leaq 0xe39(%rip), %r15       # 0x2019
movq %r15, %rdi
xorl %eax, %eax
callq 0x1040
movl $0x7e5, %edi            # imm = 0x7E5
movl $0x16d, %esi            # imm = 0x16D
movq %rbx, %rdx
movq %r14, %rcx
callq 0x12c0
movl (%rbx), %esi
movl (%r14), %edx
movq %r15, %rdi
xorl %eax, %eax
callq 0x1040
movl $0x7e5, %edi            # imm = 0x7E5
movl $0x16e, %esi            # imm = 0x16E
movq %rbx, %rdx
movq %r14, %rcx
callq 0x12c0
movl (%rbx), %esi
movl (%r14), %edx
movq %r15, %rdi
xorl %eax, %eax
callq 0x1040
xorl %eax, %eax
addq $0x10, %rsp
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O2/ohkimur[P]the-c-programming-language-2nd-edition-solutions/chapter_5/exercise_5_09/date_conversion_pointers.c
// Function: day_of_year
int day_of_year(int year, int month, int day)
{
  int leap = (year % 4 == 0 && year % 100 != 0) || year % 400 == 0;

  // Additional checks for month.
  if (month > 12)
  {
    printf("Error: a year has 12 months, so please choose a number betweeen 1 and 12.\n");
    return -1;
  }

  // Additional checks for day.
  if (day > daytab[leap][month])
  {
    printf("Error: the %d month has a maximum of %d days.\n", month, daytab[leap][month]);
    return -2;
  }

  int i;
  for (i = 1; i < month; i++)
  {
    day += daytab[leap][i];
  }

  return day;
}

// Assembly:
movl %edx, %ecx
pushq $0x64
popq %r8
movl %edi, %eax
cltd
idivl %r8d
testb $0x3, %dil
jne 0x1259
testl %edx, %edx
je 0x1259
pushq $0x1
popq %rax
jmp 0x126c
movl $0x190, %r8d            # imm = 0x190
movl %edi, %eax
cltd
idivl %r8d
xorl %eax, %eax
testl %edx, %edx
sete %al
pushq %rax
cmpl $0xd, %esi
jl 0x1282
leaq 0xe40(%rip), %rdi       # 0x20b9
callq 0x1030
pushq $-0x1
jmp 0x12a8
leaq 0x2b47(%rip), %rdx      # 0x3dd0
movq (%rdx,%rax,8), %rax
movslq %esi, %rdi
movsbl (%rax,%rdi), %edx
cmpl %ecx, %edx
jge 0x12ad
leaq 0xd8e(%rip), %rdi       # 0x202d
xorl %eax, %eax
callq 0x1040
pushq $-0x2
popq %rcx
movl %ecx, %eax
popq %rcx
retq
pushq $0x1
popq %rdx
cmpq %rdi, %rdx
jge 0x12a9
movsbl (%rax,%rdx), %esi
addl %esi, %ecx
incq %rdx
jmp 0x12b0