// File: /workspace/github_c_makefile_star2_O0/nh13[P]ksw/src/parasail/src/nw_diag_avx2_256_16.c
// Function: arr_store_si256
static inline void arr_store_si256(
        int *array,
        __m256i vWH,
        int32_t i,
        int32_t s1Len,
        int32_t j,
        int32_t s2Len)
{
    if (0 <= i+0 && i+0 < s1Len && 0 <= j-0 && j-0 < s2Len) {
        array[1LL*(i+0)*s2Len + (j-0)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 15);
    }
    if (0 <= i+1 && i+1 < s1Len && 0 <= j-1 && j-1 < s2Len) {
        array[1LL*(i+1)*s2Len + (j-1)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 14);
    }
    if (0 <= i+2 && i+2 < s1Len && 0 <= j-2 && j-2 < s2Len) {
        array[1LL*(i+2)*s2Len + (j-2)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 13);
    }
    if (0 <= i+3 && i+3 < s1Len && 0 <= j-3 && j-3 < s2Len) {
        array[1LL*(i+3)*s2Len + (j-3)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 12);
    }
    if (0 <= i+4 && i+4 < s1Len && 0 <= j-4 && j-4 < s2Len) {
        array[1LL*(i+4)*s2Len + (j-4)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 11);
    }
    if (0 <= i+5 && i+5 < s1Len && 0 <= j-5 && j-5 < s2Len) {
        array[1LL*(i+5)*s2Len + (j-5)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 10);
    }
    if (0 <= i+6 && i+6 < s1Len && 0 <= j-6 && j-6 < s2Len) {
        array[1LL*(i+6)*s2Len + (j-6)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 9);
    }
    if (0 <= i+7 && i+7 < s1Len && 0 <= j-7 && j-7 < s2Len) {
        array[1LL*(i+7)*s2Len + (j-7)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 8);
    }
    if (0 <= i+8 && i+8 < s1Len && 0 <= j-8 && j-8 < s2Len) {
        array[1LL*(i+8)*s2Len + (j-8)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 7);
    }
    if (0 <= i+9 && i+9 < s1Len && 0 <= j-9 && j-9 < s2Len) {
        array[1LL*(i+9)*s2Len + (j-9)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 6);
    }
    if (0 <= i+10 && i+10 < s1Len && 0 <= j-10 && j-10 < s2Len) {
        array[1LL*(i+10)*s2Len + (j-10)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 5);
    }
    if (0 <= i+11 && i+11 < s1Len && 0 <= j-11 && j-11 < s2Len) {
        array[1LL*(i+11)*s2Len + (j-11)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 4);
    }
    if (0 <= i+12 && i+12 < s1Len && 0 <= j-12 && j-12 < s2Len) {
        array[1LL*(i+12)*s2Len + (j-12)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 3);
    }
    if (0 <= i+13 && i+13 < s1Len && 0 <= j-13 && j-13 < s2Len) {
        array[1LL*(i+13)*s2Len + (j-13)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 2);
    }
    if (0 <= i+14 && i+14 < s1Len && 0 <= j-14 && j-14 < s2Len) {
        array[1LL*(i+14)*s2Len + (j-14)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 1);
    }
    if (0 <= i+15 && i+15 < s1Len && 0 <= j-15 && j-15 < s2Len) {
        array[1LL*(i+15)*s2Len + (j-15)] = (int16_t)_mm256_extract_epi16_rpl(vWH, 0);
    }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
andq $-0x20, %rsp
subq $0x60, %rsp
movq %rdi, 0x48(%rsp)
vmovdqa %ymm0, 0x20(%rsp)
movl %esi, 0x1c(%rsp)
movl %edx, 0x18(%rsp)
movl %ecx, 0x14(%rsp)
movl %r8d, 0x10(%rsp)
movl 0x1c(%rsp), %ecx
addl $0x0, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9caa99
movl 0x1c(%rsp), %eax
addl $0x0, %eax
cmpl 0x18(%rsp), %eax
jge 0x9caa99
movl 0x14(%rsp), %ecx
subl $0x0, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9caa99
movl 0x14(%rsp), %eax
subl $0x0, %eax
cmpl 0x10(%rsp), %eax
jge 0x9caa99
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x7, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x0, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0x0, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0x1, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cab0a
movl 0x1c(%rsp), %eax
addl $0x1, %eax
cmpl 0x18(%rsp), %eax
jge 0x9cab0a
movl 0x14(%rsp), %ecx
subl $0x1, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cab0a
movl 0x14(%rsp), %eax
subl $0x1, %eax
cmpl 0x10(%rsp), %eax
jge 0x9cab0a
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x6, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x1, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0x1, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0x2, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cab7b
movl 0x1c(%rsp), %eax
addl $0x2, %eax
cmpl 0x18(%rsp), %eax
jge 0x9cab7b
movl 0x14(%rsp), %ecx
subl $0x2, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cab7b
movl 0x14(%rsp), %eax
subl $0x2, %eax
cmpl 0x10(%rsp), %eax
jge 0x9cab7b
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x5, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x2, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0x2, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0x3, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cabec
movl 0x1c(%rsp), %eax
addl $0x3, %eax
cmpl 0x18(%rsp), %eax
jge 0x9cabec
movl 0x14(%rsp), %ecx
subl $0x3, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cabec
movl 0x14(%rsp), %eax
subl $0x3, %eax
cmpl 0x10(%rsp), %eax
jge 0x9cabec
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x4, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x3, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0x3, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0x4, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cac5d
movl 0x1c(%rsp), %eax
addl $0x4, %eax
cmpl 0x18(%rsp), %eax
jge 0x9cac5d
movl 0x14(%rsp), %ecx
subl $0x4, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cac5d
movl 0x14(%rsp), %eax
subl $0x4, %eax
cmpl 0x10(%rsp), %eax
jge 0x9cac5d
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x3, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x4, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0x4, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0x5, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cacce
movl 0x1c(%rsp), %eax
addl $0x5, %eax
cmpl 0x18(%rsp), %eax
jge 0x9cacce
movl 0x14(%rsp), %ecx
subl $0x5, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cacce
movl 0x14(%rsp), %eax
subl $0x5, %eax
cmpl 0x10(%rsp), %eax
jge 0x9cacce
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x2, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x5, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0x5, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0x6, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cad3f
movl 0x1c(%rsp), %eax
addl $0x6, %eax
cmpl 0x18(%rsp), %eax
jge 0x9cad3f
movl 0x14(%rsp), %ecx
subl $0x6, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cad3f
movl 0x14(%rsp), %eax
subl $0x6, %eax
cmpl 0x10(%rsp), %eax
jge 0x9cad3f
vmovdqa 0x30(%rsp), %xmm0
vpextrw $0x1, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x6, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0x6, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0x7, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cada9
movl 0x1c(%rsp), %eax
addl $0x7, %eax
cmpl 0x18(%rsp), %eax
jge 0x9cada9
movl 0x14(%rsp), %ecx
subl $0x7, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cada9
movl 0x14(%rsp), %eax
subl $0x7, %eax
cmpl 0x10(%rsp), %eax
jge 0x9cada9
movl 0x30(%rsp), %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x7, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0x7, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0x8, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cae1a
movl 0x1c(%rsp), %eax
addl $0x8, %eax
cmpl 0x18(%rsp), %eax
jge 0x9cae1a
movl 0x14(%rsp), %ecx
subl $0x8, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cae1a
movl 0x14(%rsp), %eax
subl $0x8, %eax
cmpl 0x10(%rsp), %eax
jge 0x9cae1a
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x7, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x8, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0x8, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0x9, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cae8b
movl 0x1c(%rsp), %eax
addl $0x9, %eax
cmpl 0x18(%rsp), %eax
jge 0x9cae8b
movl 0x14(%rsp), %ecx
subl $0x9, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cae8b
movl 0x14(%rsp), %eax
subl $0x9, %eax
cmpl 0x10(%rsp), %eax
jge 0x9cae8b
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x6, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0x9, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0x9, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0xa, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9caefc
movl 0x1c(%rsp), %eax
addl $0xa, %eax
cmpl 0x18(%rsp), %eax
jge 0x9caefc
movl 0x14(%rsp), %ecx
subl $0xa, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9caefc
movl 0x14(%rsp), %eax
subl $0xa, %eax
cmpl 0x10(%rsp), %eax
jge 0x9caefc
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x5, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0xa, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0xa, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0xb, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9caf6d
movl 0x1c(%rsp), %eax
addl $0xb, %eax
cmpl 0x18(%rsp), %eax
jge 0x9caf6d
movl 0x14(%rsp), %ecx
subl $0xb, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9caf6d
movl 0x14(%rsp), %eax
subl $0xb, %eax
cmpl 0x10(%rsp), %eax
jge 0x9caf6d
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x4, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0xb, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0xb, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0xc, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cafde
movl 0x1c(%rsp), %eax
addl $0xc, %eax
cmpl 0x18(%rsp), %eax
jge 0x9cafde
movl 0x14(%rsp), %ecx
subl $0xc, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cafde
movl 0x14(%rsp), %eax
subl $0xc, %eax
cmpl 0x10(%rsp), %eax
jge 0x9cafde
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x3, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0xc, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0xc, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0xd, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cb04f
movl 0x1c(%rsp), %eax
addl $0xd, %eax
cmpl 0x18(%rsp), %eax
jge 0x9cb04f
movl 0x14(%rsp), %ecx
subl $0xd, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cb04f
movl 0x14(%rsp), %eax
subl $0xd, %eax
cmpl 0x10(%rsp), %eax
jge 0x9cb04f
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x2, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0xd, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0xd, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0xe, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cb0c0
movl 0x1c(%rsp), %eax
addl $0xe, %eax
cmpl 0x18(%rsp), %eax
jge 0x9cb0c0
movl 0x14(%rsp), %ecx
subl $0xe, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cb0c0
movl 0x14(%rsp), %eax
subl $0xe, %eax
cmpl 0x10(%rsp), %eax
jge 0x9cb0c0
vmovdqa 0x20(%rsp), %xmm0
vpextrw $0x1, %xmm0, %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0xe, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0xe, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movl 0x1c(%rsp), %ecx
addl $0xf, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cb12a
movl 0x1c(%rsp), %eax
addl $0xf, %eax
cmpl 0x18(%rsp), %eax
jge 0x9cb12a
movl 0x14(%rsp), %ecx
subl $0xf, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jg 0x9cb12a
movl 0x14(%rsp), %eax
subl $0xf, %eax
cmpl 0x10(%rsp), %eax
jge 0x9cb12a
movl 0x20(%rsp), %eax
movzwl %ax, %eax
movswl %ax, %edx
movq 0x48(%rsp), %rax
movl 0x1c(%rsp), %ecx
addl $0xf, %ecx
movslq %ecx, %rcx
shlq $0x0, %rcx
movslq 0x10(%rsp), %rsi
imulq %rsi, %rcx
movl 0x14(%rsp), %esi
subl $0xf, %esi
movslq %esi, %rsi
addq %rsi, %rcx
movl %edx, (%rax,%rcx,4)
movq %rbp, %rsp
popq %rbp
vzeroupper
retq
nopw %cs:(%rax,%rax)
nopl (%rax)