// File: /workspace/github_c_makefile_star2_O3/aquaxis[P]synverll/src/parser_ir_top.c
// Function: create_top_assign
int create_top_assign()
{
	TOP_SIGNAL_TREE *now_top_signal_tree;
	char *verilog = NULL;
	char *wire = NULL;
	int i;

	wire = calloc(STR_MAX, 1);

	now_top_signal_tree = top_signal_tree_top;
    while(now_top_signal_tree != NULL){
		if(now_top_signal_tree->inout == SIG_IN){
//			sprintf(wire, "assign %s = ", now_top_signal_tree->label);
			sprintf(wire, "assign %s = ", now_top_signal_tree->verilog_signal);

			switch(now_top_signal_tree->flag){
				case FLAG_ARGS:
					verilog = search_top_signal_call_args(now_top_signal_tree->module_name, now_top_signal_tree->args_num);
					if(verilog != NULL){
						now_top_signal_tree->used = 1;
						sprintf(wire, "%s%s\n", wire, verilog);
						register_top_module_assign(wire);
					}
					break;
				case FLAG_CTRL:
					if(!strcmp(now_top_signal_tree->name, "__func_start")){
						verilog = search_top_signal_func("call", now_top_signal_tree->module_name, "req");
						if(verilog != NULL){
							now_top_signal_tree->used = 1;
							sprintf(wire, "%s%s\n", wire, verilog);
							register_top_module_assign(wire);
						}
					}
					break;
				case FLAG_CALL:
					if(!strcmp(now_top_signal_tree->name, "done")){
						verilog = search_top_signal_func("func", now_top_signal_tree->call_name, "done");
						if(verilog != NULL){
							now_top_signal_tree->used = 1;
							sprintf(wire, "%s%s\n", wire, verilog);
							register_top_module_assign(wire);
						}
					}else if(!strcmp(now_top_signal_tree->name, "ready")){
						verilog = search_top_signal_func("func", now_top_signal_tree->call_name, "ready");
						if(verilog != NULL){
							now_top_signal_tree->used = 1;
							sprintf(wire, "%s%s\n", wire, verilog);
							register_top_module_assign(wire);
						}
					}else if(!strcmp(now_top_signal_tree->name, "result")){
						verilog = search_top_signal_func("func", now_top_signal_tree->call_name, "result");
						if(verilog != NULL){
							now_top_signal_tree->used = 1;
							sprintf(wire, "%s%s\n", wire, verilog);
							register_top_module_assign(wire);
						}
					}
					break;
				case FLAG_GMEM:
					if(!strcmp(now_top_signal_tree->name, "__gm_done")){
						now_top_signal_tree->used = 1;
						sprintf(wire, "%s%s\n", wire, "__gm_done;");
						register_top_module_assign(wire);
					}else if(!strcmp(now_top_signal_tree->name, "__gm_di")){
						now_top_signal_tree->used = 1;
						sprintf(wire, "%s%s\n", wire, "__gm_di;");
						register_top_module_assign(wire);
					}else if(!strcmp(now_top_signal_tree->name, "__gm_base")){
						now_top_signal_tree->used = 1;
						sprintf(wire, "%s%s\n", wire, "__gm_base;");
						register_top_module_assign(wire);
					}
					break;
				default:
					break;
			}
		}
        now_top_signal_tree = now_top_signal_tree->next_ptr;
	}

	sprintf(wire, "\n");
	register_top_module_assign(wire);

if(use_gm_if){
	sprintf(wire, "// Global Memory\n");
	register_top_module_assign(wire);

	// Global Memory
	verilog = search_top_signal_func("gm", NULL, "req");
	sprintf(wire, "assign __gm_req = %s\n", verilog);
	register_top_module_assign(wire);

	verilog = search_top_signal_func("gm", NULL, "adrs");
	sprintf(wire, "assign __gm_adrs = %s\n", verilog);
	register_top_module_assign(wire);

	verilog = search_top_signal_func("gm", NULL, "rnw");
	sprintf(wire, "assign __gm_rnw = %s\n", verilog);
	register_top_module_assign(wire);

	verilog = search_top_signal_func("gm", NULL, "do");
	sprintf(wire, "assign __gm_do = %s\n", verilog);
	register_top_module_assign(wire);

	verilog = search_top_signal_func("gm", NULL, "leng");
	sprintf(wire, "assign __gm_leng = %s\n", verilog);
	register_top_module_assign(wire);

	sprintf(wire, "\n");
	register_top_module_assign(wire);
}
	// LLVM memcpy
	verilog = search_top_signal_func("call", "llvm_memcpy", "req");
	if(verilog != NULL){
		sprintf(wire, "// LLVM memcpy\n");
		register_top_module_assign(wire);

		sprintf(wire, "assign __llvm_memcpy_req = %s\n", verilog);
		register_top_module_assign(wire);

		use_llvm_memcpy = 1;
	}

	now_top_signal_tree = top_signal_tree_top;
    while(now_top_signal_tree != NULL){
		if(now_top_signal_tree->inout == SIG_IN){
			sprintf(wire, "assign %s = ", now_top_signal_tree->verilog_signal);

			if(now_top_signal_tree->flag == FLAG_CALL && !strcmp(now_top_signal_tree->call_name, "llvm_memcpy")){
				now_top_signal_tree->used = 1;
				sprintf(wire, "%s__llvm_memcpy_%s;\n", wire, now_top_signal_tree->name);
				register_top_module_assign(wire);
			}
		}
        now_top_signal_tree = now_top_signal_tree->next_ptr;
	}

	for(i = 0; i < 5; i++){
		sprintf(wire, "assign __llvm_memcpy_args_%d = ", i);
		verilog = search_top_signal_call_args("llvm_memcpy", i);
		if(verilog != NULL){
//			now_top_signal_tree->used = 1;
			sprintf(wire, "%s%s\n", wire, verilog);
			register_top_module_assign(wire);
		}
	}

	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x10f0
movq %rax, %rbx
movq 0xa1ac(%rip), %r12      # 0x145b0
testq %r12, %r12
je 0xa5e3
leaq 0x56b8(%rip), %r13      # 0xfacc
leaq 0x58cb(%rip), %rbp      # 0xfce6
cmpl $0x0, 0x1c(%r12)
jne 0xa59f
movq 0x50(%r12), %rdx
movq %rbx, %rdi
movq %rbp, %r14
leaq 0x56d2(%rip), %rsi      # 0xfb0b
xorl %eax, %eax
callq 0x11a0
movl 0x30(%r12), %eax
decl %eax
cmpl $0x4, %eax
ja 0xa59f
movslq (%r13,%rax,4), %rax
addq %r13, %rax
jmpq *%rax
movq 0x38(%r12), %rdi
leaq 0x56b8(%rip), %rsi      # 0xfb1e
callq 0x1100
movq %r14, %rbp
testl %eax, %eax
jne 0xa59f
movq 0x28(%r12), %rsi
leaq 0x414b(%rip), %rdi      # 0xe5cd
leaq 0x5894(%rip), %rdx      # 0xfd1d
jmp 0xa567
movq 0x28(%r12), %rdi
movl 0x48(%r12), %esi
callq 0xa187
jmp 0xa56c
movq 0x38(%r12), %r15
movq %r15, %rdi
leaq 0x567f(%rip), %rsi      # 0xfb30
callq 0x1100
movl %eax, %ecx
leaq 0x567b(%rip), %rax      # 0xfb3a
testl %ecx, %ecx
je 0xa574
movq %r15, %rdi
leaq 0x5674(%rip), %rsi      # 0xfb45
callq 0x1100
movl %eax, %ecx
leaq 0x566e(%rip), %rax      # 0xfb4d
testl %ecx, %ecx
je 0xa574
movq %r15, %rdi
leaq 0x5665(%rip), %rsi      # 0xfb56
callq 0x1100
movq %r14, %rbp
movl %eax, %ecx
leaq 0x565e(%rip), %rax      # 0xfb60
testl %ecx, %ecx
jne 0xa59f
jmp 0xa574
movq 0x38(%r12), %r15
movq %r15, %rdi
movq %rbp, %rsi
callq 0x1100
testl %eax, %eax
je 0xa5af
movq %r15, %rdi
leaq 0x57c4(%rip), %rbp      # 0xfcf2
movq %rbp, %rsi
callq 0x1100
testl %eax, %eax
je 0xa5c5
movq %r15, %rdi
leaq 0x588a(%rip), %rsi      # 0xfdd2
callq 0x1100
testl %eax, %eax
movq %r14, %rbp
jne 0xa59f
movq 0x40(%r12), %rsi
leaq 0x55cb(%rip), %rdi      # 0xfb2b
leaq 0x586b(%rip), %rdx      # 0xfdd2
callq 0xa279
movq %r14, %rbp
testq %rax, %rax
je 0xa59f
movl $0x1, 0x20(%r12)
movq %rbx, %rdi
leaq 0x5591(%rip), %rsi      # 0xfb18
movq %rbx, %rdx
movq %rax, %rcx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
callq 0x9f40
movq %r14, %rbp
movq 0x8(%r12), %r12
testq %r12, %r12
jne 0xa41b
jmp 0xa5e3
movq 0x40(%r12), %rsi
leaq 0x5570(%rip), %rdi      # 0xfb2b
movq %rbp, %rdx
callq 0xa279
jmp 0xa56f
movq 0x40(%r12), %rsi
leaq 0x555a(%rip), %rdi      # 0xfb2b
movq %rbp, %rdx
callq 0xa279
testq %rax, %rax
movq %r14, %rbp
jne 0xa574
jmp 0xa59f
movw $0xa, (%rbx)
movq %rbx, %rdi
callq 0x9f40
cmpl $0x0, 0x9fc5(%rip)      # 0x145bc
je 0xa70a
movups 0x46f4(%rip), %xmm0     # 0xecf8
movups %xmm0, (%rbx)
movw $0xa, %bp
movw %bp, 0x10(%rbx)
movq %rbx, %rdi
callq 0x9f40
leaq 0x554d(%rip), %r14      # 0xfb6b
leaq 0x56f8(%rip), %rdx      # 0xfd1d
movq %r14, %rdi
xorl %esi, %esi
callq 0xa279
leaq 0x5538(%rip), %rsi      # 0xfb6e
movq %rbx, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
callq 0x9f40
leaq 0x56dd(%rip), %rdx      # 0xfd2f
movq %r14, %rdi
xorl %esi, %esi
callq 0xa279
leaq 0x5521(%rip), %rsi      # 0xfb84
movq %rbx, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
callq 0x9f40
leaq 0x56a7(%rip), %rdx      # 0xfd26
movq %r14, %rdi
xorl %esi, %esi
callq 0xa279
leaq 0x550b(%rip), %rsi      # 0xfb9b
movq %rbx, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
callq 0x9f40
leaq 0x5505(%rip), %rdx      # 0xfbb1
movq %r14, %rdi
xorl %esi, %esi
callq 0xa279
leaq 0x54f7(%rip), %rsi      # 0xfbb4
movq %rbx, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
callq 0x9f40
leaq 0x5660(%rip), %rdx      # 0xfd39
movq %r14, %rdi
xorl %esi, %esi
callq 0xa279
leaq 0x54df(%rip), %rsi      # 0xfbc9
movq %rbx, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
callq 0x9f40
movw %bp, (%rbx)
movq %rbx, %rdi
callq 0x9f40
leaq 0x3ebc(%rip), %rdi      # 0xe5cd
leaq 0x4b3e(%rip), %rsi      # 0xf256
leaq 0x55fe(%rip), %rdx      # 0xfd1d
callq 0xa279
testq %rax, %rax
je 0xa764
movq %rax, %r14
movups 0x54ad(%rip), %xmm0     # 0xfbe0
movups %xmm0, (%rbx)
movq %rbx, %rdi
callq 0x9f40
leaq 0x54ab(%rip), %rsi      # 0xfbf0
movq %rbx, %rdi
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
callq 0x9f40
movl $0x1, 0x9e54(%rip)      # 0x145b8
movq 0x9e45(%rip), %r13      # 0x145b0
testq %r13, %r13
je 0xa7e1
leaq 0x5394(%rip), %r14      # 0xfb0b
leaq 0x4ad8(%rip), %r15      # 0xf256
leaq 0x548a(%rip), %r12      # 0xfc0f
cmpl $0x0, 0x1c(%r13)
jne 0xa7d8
movq 0x50(%r13), %rdx
movq %rbx, %rdi
movq %r14, %rsi
xorl %eax, %eax
callq 0x11a0
cmpl $0x5, 0x30(%r13)
jne 0xa7d8
movq 0x40(%r13), %rdi
movq %r15, %rsi
callq 0x1100
testl %eax, %eax
jne 0xa7d8
movl $0x1, 0x20(%r13)
movq 0x38(%r13), %rcx
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
callq 0x9f40
movq 0x8(%r13), %r13
testq %r13, %r13
jne 0xa785
leaq 0x543c(%rip), %r14      # 0xfc24
leaq 0x4a67(%rip), %r15      # 0xf256
leaq 0x5322(%rip), %r12      # 0xfb18
xorl %ebp, %ebp
movq %rbx, %rdi
movq %r14, %rsi
movl %ebp, %edx
xorl %eax, %eax
callq 0x11a0
movq %r15, %rdi
movl %ebp, %esi
callq 0xa187
testq %rax, %rax
je 0xa831
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movq %rax, %rcx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
callq 0x9f40
incl %ebp
cmpl $0x5, %ebp
jne 0xa7f8
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq