// File: /workspace/github_c_makefile_star2_O0/markdryan[P]subtilis/arch/arm32/fpa_alloc.c
// Function: prv_alloc_fpa_stran_instr
static void prv_alloc_fpa_stran_instr(void *user_data, subtilis_arm_op_t *op,
				      subtilis_arm_instr_type_t type,
				      subtilis_fpa_stran_instr_t *instr,
				      subtilis_error_t *err)
{
	int dist_dest;
	int dist_base;
	size_t vreg_base;
	bool fixed_reg_base;
	size_t vreg_dest = 0;
	subtilis_arm_reg_ud_t *ud = user_data;

	/*
	 * The function calling code can generate LDFNV and STFNV when
	 * preserving fpa registers.  These instructions should be
	 * ignored for the purposes of register allocation.
	 */

	if (instr->ccode == SUBTILIS_ARM_CCODE_NV) {
		ud->instr_count++;
		return;
	}

	if (type == SUBTILIS_FPA_INSTR_STF) {
		vreg_dest = instr->dest;
		(void)subtilis_arm_reg_alloc_ensure(
		    ud, op, ud->int_regs, ud->real_regs, &instr->dest, err);
		if (err->type != SUBTILIS_ERROR_OK)
			return;
	}

	vreg_base = instr->base;
	fixed_reg_base = subtilis_arm_reg_alloc_ensure(
	    ud, op, ud->int_regs, ud->int_regs, &instr->base, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;

	if (!fixed_reg_base) {
		dist_base = subtilis_arm_reg_alloc_calculate_dist(
		    ud, vreg_base, op, &ud->int_regs->dist_walker,
		    ud->int_regs);
		if (dist_base == -1)
			ud->int_regs->phys_to_virt[instr->base] = INT_MAX;
	}

	if (type == SUBTILIS_FPA_INSTR_STF) {
		dist_dest = subtilis_arm_reg_alloc_calculate_dist(
		    ud, vreg_dest, op, &ud->real_regs->dist_walker,
		    ud->real_regs);
		if (dist_dest == -1)
			ud->real_regs->phys_to_virt[instr->dest] = INT_MAX;
		ud->real_regs->next[instr->dest] = dist_dest;
	} else {
		subtilis_arm_reg_alloc_alloc_fp_dest(ud, op, &instr->dest, err);
		if (err->type != SUBTILIS_ERROR_OK)
			return;
	}

	if (!fixed_reg_base)
		ud->int_regs->next[instr->base] = dist_base;

	ud->instr_count++;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x50, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movl %edx, -0x14(%rbp)
movq %rcx, -0x20(%rbp)
movq %r8, -0x28(%rbp)
movq $0x0, -0x48(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x50(%rbp)
movq -0x20(%rbp), %rax
cmpl $0xf, (%rax)
jne 0xa1469
movq -0x50(%rbp), %rax
movq 0x20(%rax), %rcx
addq $0x1, %rcx
movq %rcx, 0x20(%rax)
jmp 0xa1616
cmpl $0x1f, -0x14(%rbp)
jne 0xa14b4
movq -0x20(%rbp), %rax
movq 0x10(%rax), %rax
movq %rax, -0x48(%rbp)
movq -0x50(%rbp), %rdi
movq -0x10(%rbp), %rsi
movq -0x50(%rbp), %rax
movq 0x8(%rax), %rdx
movq -0x50(%rbp), %rax
movq 0x10(%rax), %rcx
movq -0x20(%rbp), %r8
addq $0x10, %r8
movq -0x28(%rbp), %r9
callq 0x774b0
movq -0x28(%rbp), %rax
cmpl $0x0, (%rax)
je 0xa14b2
jmp 0xa1616
jmp 0xa14b4
movq -0x20(%rbp), %rax
movq 0x18(%rax), %rax
movq %rax, -0x38(%rbp)
movq -0x50(%rbp), %rdi
movq -0x10(%rbp), %rsi
movq -0x50(%rbp), %rax
movq 0x8(%rax), %rdx
movq -0x50(%rbp), %rax
movq 0x8(%rax), %rcx
movq -0x20(%rbp), %r8
addq $0x18, %r8
movq -0x28(%rbp), %r9
callq 0x774b0
andb $0x1, %al
movb %al, -0x39(%rbp)
movq -0x28(%rbp), %rax
cmpl $0x0, (%rax)
je 0xa14fc
jmp 0xa1616
testb $0x1, -0x39(%rbp)
jne 0xa1551
movq -0x50(%rbp), %rdi
movq -0x38(%rbp), %rsi
movq -0x10(%rbp), %rdx
movq -0x50(%rbp), %rax
movq 0x8(%rax), %rcx
addq $0x90, %rcx
movq -0x50(%rbp), %rax
movq 0x8(%rax), %r8
callq 0x77010
movl %eax, -0x30(%rbp)
cmpl $-0x1, -0x30(%rbp)
jne 0xa154f
movq -0x50(%rbp), %rax
movq 0x8(%rax), %rax
movq 0x8(%rax), %rax
movq -0x20(%rbp), %rcx
movq 0x18(%rcx), %rcx
movq $0x7fffffff, (%rax,%rcx,8) # imm = 0x7FFFFFFF
jmp 0xa1551
cmpl $0x1f, -0x14(%rbp)
jne 0xa15c0
movq -0x50(%rbp), %rdi
movq -0x48(%rbp), %rsi
movq -0x10(%rbp), %rdx
movq -0x50(%rbp), %rax
movq 0x10(%rax), %rcx
addq $0x90, %rcx
movq -0x50(%rbp), %rax
movq 0x10(%rax), %r8
callq 0x77010
movl %eax, -0x2c(%rbp)
cmpl $-0x1, -0x2c(%rbp)
jne 0xa15a4
movq -0x50(%rbp), %rax
movq 0x10(%rax), %rax
movq 0x8(%rax), %rax
movq -0x20(%rbp), %rcx
movq 0x10(%rcx), %rcx
movq $0x7fffffff, (%rax,%rcx,8) # imm = 0x7FFFFFFF
movl -0x2c(%rbp), %edx
movq -0x50(%rbp), %rax
movq 0x10(%rax), %rax
movq 0x10(%rax), %rax
movq -0x20(%rbp), %rcx
movq 0x10(%rcx), %rcx
movl %edx, (%rax,%rcx,4)
jmp 0xa15e6
movq -0x50(%rbp), %rdi
movq -0x10(%rbp), %rsi
movq -0x20(%rbp), %rdx
addq $0x10, %rdx
movq -0x28(%rbp), %rcx
callq 0x77930
movq -0x28(%rbp), %rax
cmpl $0x0, (%rax)
je 0xa15e4
jmp 0xa1616
jmp 0xa15e6
testb $0x1, -0x39(%rbp)
jne 0xa1606
movl -0x30(%rbp), %edx
movq -0x50(%rbp), %rax
movq 0x8(%rax), %rax
movq 0x10(%rax), %rax
movq -0x20(%rbp), %rcx
movq 0x18(%rcx), %rcx
movl %edx, (%rax,%rcx,4)
movq -0x50(%rbp), %rax
movq 0x20(%rax), %rcx
addq $0x1, %rcx
movq %rcx, 0x20(%rax)
addq $0x50, %rsp
popq %rbp
retq
nopl (%rax)