LLM4Binary/decompile-bench-makefile huggingface dataset:
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/PHC.cc
// Function: PHCPredictor::drawFeatureMaps()
void
PHCPredictor::drawFeatureMaps()
{

	ofstream file("output_PHC.out");
	for(unsigned i = 0 ; i < stats_global_error.size() ; i++)
	{
		for(unsigned j =  0 ; j < stats_global_error[i].size() ; j++)
		{
			file << stats_global_error[i][j] << ",";
		}
		file << endl;
	}
	file.close();

	ofstream file1("output_PHC1.out");
	for(unsigned i = 0 ; i < stats_local_error.size() ; i++)
	{
		for(unsigned j =  0 ; j < stats_local_error[i].size() ; j++)
		{
			file1 << stats_local_error[i][j] << ",";
		}
		file1 << endl;
	}
	file1.close();

}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x408, %rsp            # imm = 0x408
movq %rdi, %rbx
leaq 0xd5c9(%rip), %rsi      # 0x296d2
leaq 0x208(%rsp), %r14
pushq $0x10
popq %rdx
movq %r14, %rdi
callq 0x5310
xorl %r13d, %r13d
leaq 0xcf0c(%rip), %r15      # 0x29032
movl %r13d, %r13d
movq 0x418(%rbx), %rcx
movq 0x420(%rbx), %rax
subq %rcx, %rax
cqto
pushq $0x18
popq %rsi
idivq %rsi
cmpq %r13, %rax
jbe 0x1c192
xorl %ebp, %ebp
imulq $0x18, %r13, %r12
movl %ebp, %ebp
movq (%rcx,%r12), %rax
movq 0x8(%rcx,%r12), %rcx
subq %rax, %rcx
sarq $0x2, %rcx
cmpq %rbp, %rcx
jbe 0x1c185
movl (%rax,%rbp,4), %esi
movq %r14, %rdi
callq 0x5560
movq %rax, %rdi
movq %r15, %rsi
callq 0x52c0
incl %ebp
movq 0x418(%rbx), %rcx
jmp 0x1c14d
movq %r14, %rdi
callq 0x5190
incl %r13d
jmp 0x1c126
leaq 0x208(%rsp), %rdi
callq 0x5420
leaq 0xd53b(%rip), %rsi      # 0x296e1
leaq 0x8(%rsp), %rdi
pushq $0x10
popq %rdx
callq 0x5310
xorl %r13d, %r13d
leaq 0x8(%rsp), %r14
leaq 0xce70(%rip), %r15      # 0x29032
movl %r13d, %r13d
movq 0x400(%rbx), %rcx
movq 0x408(%rbx), %rax
subq %rcx, %rax
cqto
pushq $0x18
popq %rsi
idivq %rsi
cmpq %r13, %rax
jbe 0x1c22e
xorl %ebp, %ebp
imulq $0x18, %r13, %r12
movl %ebp, %ebp
movq (%rcx,%r12), %rax
movq 0x8(%rcx,%r12), %rcx
subq %rax, %rcx
sarq $0x2, %rcx
cmpq %rbp, %rcx
jbe 0x1c221
movl (%rax,%rbp,4), %esi
movq %r14, %rdi
callq 0x5560
movq %rax, %rdi
movq %r15, %rsi
callq 0x52c0
incl %ebp
movq 0x400(%rbx), %rcx
jmp 0x1c1e9
movq %r14, %rdi
callq 0x5190
incl %r13d
jmp 0x1c1c2
leaq 0x8(%rsp), %rdi
callq 0x5420
leaq 0x8(%rsp), %rdi
callq 0x5620
leaq 0x208(%rsp), %rdi
callq 0x5620
addq $0x408, %rsp            # imm = 0x408
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
jmp 0x1c26b
jmp 0x1c27a
jmp 0x1c27a
jmp 0x1c26b
jmp 0x1c27a
movq %rax, %rbx
leaq 0x8(%rsp), %rdi
callq 0x5620
jmp 0x1c27d
movq %rax, %rbx
leaq 0x208(%rsp), %rdi
callq 0x5620
movq %rbx, %rdi
callq 0x5570
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Perceptron.cc
// Function: PerceptronPredictor::setBPPrediction(CacheEntry*)
void 
PerceptronPredictor::setBPPrediction(CacheEntry* current)
{
	int bp_pred=0;
	for(unsigned i = 0 ; i < m_BP_features.size() ; i++)
	{
		int hash = m_BP_features_hash[i](current->address , current->m_pc);
		bp_pred = m_BP_features[i]->getConfidence(hash,true);
		current->perceptron_BPpred[i] = bp_pred;
		current->perceptron_BPHash[i] = hash;
		if(bp_pred > simu_parameters.perceptron_bypass_threshold)
			current->predictedReused[i] = false;
		else
			current->predictedReused[i] = true;
	}
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
leaq 0xa8(%rsi), %r15
xorl %r12d, %r12d
movl %r12d, %r12d
movq 0x2c0(%r14), %rax
subq 0x2b8(%r14), %rax
sarq $0x3, %rax
cmpq %r12, %rax
jbe 0x1dda7
movq 0x2d0(%r14), %rax
movq 0x8(%rbx), %rdi
movq 0x10(%rbx), %rsi
callq *(%rax,%r12,8)
movl %eax, %r13d
movq 0x2b8(%r14), %rax
movq (%rax,%r12,8), %rdi
movl %r13d, %esi
pushq $0x1
popq %rdx
callq 0x11132
movl %eax, %ebp
movq 0x48(%rbx), %rax
movl %ebp, (%rax,%r12,4)
movq 0x78(%rbx), %rax
movl %r13d, (%rax,%r12,4)
leaq 0x201d6(%rip), %rax     # 0x3df50
movl 0x1b8(%rax), %r13d
movq %r15, %rdi
movq %r12, %rsi
callq 0x9f66
cmpl %r13d, %ebp
jle 0x1dd99
notq %rdx
andq (%rax), %rdx
jmp 0x1dd9c
orq (%rax), %rdx
movq %rdx, (%rax)
incl %r12d
jmp 0x1dd1b
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Perceptron.cc
// Function: PerceptronPredictor::setAllocPrediction(CacheEntry*)
void
PerceptronPredictor::setAllocPrediction(CacheEntry *current)
{
	int alloc_pred=0;
	for(unsigned i = 0 ; i < m_Allocation_features.size() ; i++)
	{
		int hash = m_Allocation_features_hash[i](current->address , current->m_pc);
		alloc_pred = m_Allocation_features[i]->getConfidence(hash, true);
		current->perceptron_Allocpred[i] = alloc_pred;
		current->perceptron_AllocHash[i] = hash;
//		if(alloc_pred > simu_parameters.perceptron_allocation_threshold)
//			current->predictedReused[i] = false;
//		else
//			current->predictedReused[i] = true;
	}
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movq %rsi, %rbx
movq %rdi, %r14
xorl %eax, %eax
pushq $0x1
popq %rbp
movl %eax, %r12d
movq 0x278(%r14), %rax
subq 0x270(%r14), %rax
sarq $0x3, %rax
cmpq %r12, %rax
jbe 0x1df0a
movq 0x288(%r14), %rax
movq 0x8(%rbx), %rdi
movq 0x10(%rbx), %rsi
callq *(%rax,%r12,8)
movl %eax, %r15d
movq 0x270(%r14), %rax
movq (%rax,%r12,8), %rdi
movl %r15d, %esi
movl %ebp, %edx
callq 0x11132
movq 0x60(%rbx), %rcx
movl %eax, (%rcx,%r12,4)
movq 0x90(%rbx), %rax
movl %r15d, (%rax,%r12,4)
leal 0x1(%r12), %eax
jmp 0x1deab
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Perceptron.cc
// Function: PerceptronPredictor::insertionPolicy(unsigned long, unsigned long, bool, Access)
void
PerceptronPredictor::insertionPolicy(uint64_t set, uint64_t index, bool inNVM, Access element)
{
	CacheEntry* current = get_entry(set , index , inNVM);
	current->policyInfo = m_cpt++;

	stats_allocate++;

	/** Training learning cache lines */ 
	if(current->isLearning)
	{
		if(m_enableBP)
		{
			stats_allocate_learning++;
			setBPPrediction(current);		
		}
		
		if(m_enableAllocation)
		{
			if(element.isSRAMerror && !inNVM)
			{
				for(unsigned i = 0 ; i < m_Allocation_features.size() ; i++)
				{
					if( current->perceptron_Allocpred[i] < simu_parameters.perceptron_bypass_learning)
						m_Allocation_features[i]->increaseConfidence(current->perceptron_AllocHash[i]);
				}
			}
		}
	}
	
	if(m_enableAllocation)
	{
		RD_TYPE rd_type = classifyRD(set , index , inNVM);
		if( element.isSRAMerror )
			rd_type = RD_MEDIUM;
		
		for(unsigned i = 0 ; i < m_Allocation_features.size() ; i++)
		{
			int hash = m_Allocation_features_hash[i](current->address , current->m_pc);
			m_Allocation_features[i]->recordAccess( hash  , element.isWrite() , rd_type);
		}
	}
			
	Predictor::insertionPolicy(set , index , inNVM , element);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movl %ecx, %ebp
movq %rdi, %r15
movl %ecx, %eax
movq 0x8(%rdi,%rax,8), %rax
movq (%rax), %rax
movq %rsi, 0x8(%rsp)
imulq $0x18, %rsi, %rcx
movq (%rax,%rcx), %rax
movq %rdx, 0x10(%rsp)
movq (%rax,%rdx,8), %r12
movq 0x308(%rdi), %rax
leaq 0x1(%rax), %rcx
movq %rcx, 0x308(%rdi)
movl %eax, 0x38(%r12)
incq 0x3e8(%rdi)
leaq 0x50(%rsp), %r14
cmpb $0x1, 0x148(%r12)
jne 0x1dfaa
cmpb $0x1, 0x348(%r15)
jne 0x1df91
incq 0x3f0(%r15)
movq %r15, %rdi
movq %r12, %rsi
callq 0x1dd00
cmpb $0x1, 0x349(%r15)
jne 0x1dfaa
movb 0x28(%r14), %al
xorb $0x1, %al
orb %bpl, %al
je 0x1e062
cmpb $0x1, 0x349(%r15)
movzbl %bpl, %ebp
jne 0x1e040
movq %r15, %rdi
movq 0x8(%rsp), %rsi
movq 0x10(%rsp), %rdx
movl %ebp, %ecx
callq 0x1ddb6
cmpb $0x0, 0x28(%r14)
pushq $0x1
popq %r13
cmovel %eax, %r13d
movl 0x1c(%r14), %eax
cmpl $0x3, %eax
sete %cl
cmpl $0x6, %eax
sete %dl
orb %cl, %dl
xorl %eax, %eax
movzbl %dl, %ebx
movl %eax, %r14d
movq 0x278(%r15), %rax
subq 0x270(%r15), %rax
sarq $0x3, %rax
cmpq %r14, %rax
jbe 0x1e040
movq 0x288(%r15), %rax
movq 0x8(%r12), %rdi
movq 0x10(%r12), %rsi
callq *(%rax,%r14,8)
movq 0x270(%r15), %rcx
movq (%rcx,%r14,8), %rdi
movl %eax, %esi
movl %ebx, %edx
movl %r13d, %ecx
callq 0x10ed2
leal 0x1(%r14), %eax
jmp 0x1dff4
movq %r15, %rdi
movq 0x8(%rsp), %rsi
movq 0x10(%rsp), %rdx
movl %ebp, %ecx
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x1f3a2
xorl %r13d, %r13d
leaq 0x1fee4(%rip), %rbx     # 0x3df50
movl %r13d, %r13d
movq 0x270(%r15), %rax
movq 0x278(%r15), %rcx
subq %rax, %rcx
sarq $0x3, %rcx
cmpq %r13, %rcx
jbe 0x1dfaa
movq 0x60(%r12), %rcx
movl (%rcx,%r13,4), %ecx
cmpl 0x1bc(%rbx), %ecx
jge 0x1e0b3
movq (%rax,%r13,8), %rdi
movq 0x90(%r12), %rax
movl (%rax,%r13,4), %esi
callq 0x111ac
incl %r13d
jmp 0x1e06c
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Perceptron.cc
// Function: PerceptronPredictor::evictPolicy(int, bool)
int PerceptronPredictor::evictPolicy(int set, bool inNVM)
{
	int assoc_victim = -1;
	assert(m_replacementPolicyNVM_ptr != NULL);
	assert(m_replacementPolicySRAM_ptr != NULL);

	CacheEntry* current = NULL;
	if(inNVM)
	{	
		assoc_victim = m_replacementPolicyNVM_ptr->evictPolicy(set);
		current = m_tableNVM[set][assoc_victim];
	}
	else
	{
		assoc_victim = m_replacementPolicySRAM_ptr->evictPolicy(set);
		current = m_tableSRAM[set][assoc_victim];		
	}

	if(current->isValid && current->isLearning)
	{
		for(unsigned i =  0 ; i < m_BP_features.size() ; i++)
		{
			if(current->predictedReused[i] || current->perceptron_BPpred[i] < simu_parameters.perceptron_bypass_learning)
			{
				int hash = m_BP_features_hash[i](current->address , current->m_pc);
 				m_BP_features[i]->increaseConfidence(hash);
			}
		}
		
		if(current->nbWrite == 0 && current->nbRead == 0)
			stats_nbDeadLine[stats_nbDeadLine.size()-1]++;
	}
	
	evictRecording(set , assoc_victim , inNVM);	
	return assoc_victim;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq 0x60(%rdi), %rax
testq %rax, %rax
je 0x1e1e5
movq %rdi, %r14
movq 0x68(%rdi), %rdi
testq %rdi, %rdi
je 0x1e204
movl %esi, %r13d
movslq %esi, %r12
testb %dl, %dl
cmovneq %rax, %rdi
movzbl %dl, %r15d
movq (%rdi), %rax
movl %r12d, %esi
callq *0x20(%rax)
movl %eax, %ebp
movq 0x8(%r14,%r15,8), %rax
movq (%rax), %rax
imulq $0x18, %r12, %rcx
movslq %ebp, %rdx
movq (%rax,%rcx), %rax
movq (%rax,%rdx,8), %rbx
cmpb $0x1, (%rbx)
jne 0x1e1c4
cmpb $0x1, 0x148(%rbx)
jne 0x1e1c4
movl %r13d, 0x4(%rsp)
leaq 0xa8(%rbx), %r12
xorl %r13d, %r13d
movl %r13d, %r13d
movq 0x2c0(%r14), %rax
subq 0x2b8(%r14), %rax
sarq $0x3, %rax
cmpq %r13, %rax
jbe 0x1e1a2
movq %r12, %rdi
movq %r13, %rsi
callq 0x9f66
testq %rdx, (%rax)
jne 0x1e178
movq 0x48(%rbx), %rax
movl (%rax,%r13,4), %eax
leaq 0x1fde0(%rip), %rcx     # 0x3df50
cmpl 0x1bc(%rcx), %eax
jge 0x1e19d
movq 0x2d0(%r14), %rax
movq 0x8(%rbx), %rdi
movq 0x10(%rbx), %rsi
callq *(%rax,%r13,8)
movq 0x2b8(%r14), %rcx
movq (%rcx,%r13,8), %rdi
movl %eax, %esi
callq 0x111ac
incl %r13d
jmp 0x1e137
cmpl $0x0, 0x11c(%rbx)
movl 0x4(%rsp), %r13d
jne 0x1e1c4
cmpl $0x0, 0x120(%rbx)
jne 0x1e1c4
movq 0x370(%r14), %rax
incq -0x8(%rax)
movq %r14, %rdi
movl %r13d, %esi
movl %ebp, %edx
movl %r15d, %ecx
callq 0x1f248
movl %ebp, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0xafa5(%rip), %rdi      # 0x29191
leaq 0xd27d(%rip), %rsi      # 0x2b470
leaq 0xd2b5(%rip), %rcx      # 0x2b4af
movl $0x17f, %edx            # imm = 0x17F
callq 0x51e0
leaq 0xafdf(%rip), %rdi      # 0x291ea
leaq 0xd25e(%rip), %rsi      # 0x2b470
leaq 0xd296(%rip), %rcx      # 0x2b4af
movl $0x180, %edx            # imm = 0x180
callq 0x51e0
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::insertionPolicy(unsigned long, unsigned long, bool, Access)
void
Predictor::insertionPolicy(uint64_t set, uint64_t index, bool inNVM, Access element)
{
	CacheEntry* entry = inNVM ? m_tableNVM[set][index] : m_tableSRAM[set][index];
	uint64_t block_addr = bitRemove(element.m_address , 0 , log2(BLOCK_SIZE));
	updateFUcaches(block_addr , inNVM);
	updateCachePressure();


	//Update the missing tag as a new cache line is brough into the cache 
	//Has to remove the MT entry if it exists there 
	//DPRINTF("Predictor::insertRecord Begin ");	
	if(m_trackError)
	{
		if( simu_parameters.enableFullSRAMtraffic )
		{
			//insertIntoSRAMMT(set , inNVM, element );
		}
		else
		{
			if(inNVM)
			{
				for(unsigned i = 0 ; i < m_SRAM_missing_tags[set].size(); i++)
				{
					if(m_SRAM_missing_tags[set][i]->addr == entry->address)
						m_SRAM_missing_tags[set][i]->isValid = false;
				}		
			}		
		}	
		updateBypassTag( entry , set, inNVM);
	}	
	//DPRINTF("Predictor::insertRecord Begin ");

}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movl %ecx, %ebp
movq %rsi, %rbx
movq %rdi, %r14
movl %ecx, %eax
movq 0x8(%rdi,%rax,8), %rax
movq (%rax), %rax
imulq $0x18, %rsi, %r12
movq (%rax,%r12), %rax
movq (%rax,%rdx,8), %r15
movq 0x30(%rsp), %rdi
pushq $0x6
popq %rdx
xorl %esi, %esi
callq 0x24f70
movq %r14, %rdi
movq %rax, %rsi
movl %ebp, %edx
callq 0x1f462
movq %r14, %rdi
callq 0x1f830
cmpb $0x1, 0x80(%r14)
jne 0x1f440
testb %bpl, %bpl
je 0x1f449
leaq 0x1eb4e(%rip), %rax     # 0x3df50
cmpb $0x0, 0xdc(%rax)
jne 0x1f449
movq 0x88(%r14), %rcx
movq (%rcx,%r12), %rax
movq 0x8(%rcx,%r12), %rcx
subq %rax, %rcx
sarq $0x3, %rcx
xorl %edx, %edx
movl %edx, %edx
cmpq %rdx, %rcx
jbe 0x1f449
movq (%rax,%rdx,8), %rsi
movq (%rsi), %rdi
cmpq 0x8(%r15), %rdi
jne 0x1f43c
movb $0x0, 0x14(%rsi)
incl %edx
jmp 0x1f424
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
movzbl %bpl, %ecx
movq %r14, %rdi
movq %r15, %rsi
movl %ebx, %edx
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
jmp 0x1f946
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::updateCachePressure()
void
Predictor::updateCachePressure()
{
	if(!m_trackError || !simu_parameters.enableDatasetSpilling)
		return;
		
	if( (cpt_time - stats_beginTimeFrame) > simu_parameters.MT_timeframe)
	{
		for(int i = 0 ; i < m_nb_set ; i++)
		{
			m_isNVMbusy[i] = (m_NVM_MT_counters[i] > simu_parameters.MT_counter_th) ? true : false;		
			m_isSRAMbusy[i] = (m_SRAM_MT_counters[i] > simu_parameters.MT_counter_th) ? true : false;
		
			m_NVM_MT_counters[i] = 0;
			m_SRAM_MT_counters[i] = 0;
		}

		if(simu_parameters.printDebug)
		{
			//stats_SRAMpressure.push_back(m_isSRAMbusy);
		}

		stats_beginTimeFrame = cpt_time;	
	}
}

// Assembly:
cmpb $0x1, 0x80(%rdi)
jne 0x1f945
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
leaq 0x1e701(%rip), %rcx     # 0x3df50
cmpb $0x1, 0x158(%rcx)
jne 0x1f937
movq %rdi, %rbx
leaq 0x1e6b2(%rip), %rax     # 0x3df18
movq (%rax), %rax
subq 0x268(%rdi), %rax
cmpq 0xd0(%rcx), %rax
jbe 0x1f937
leaq 0x110(%rbx), %rax
movq %rax, (%rsp)
leaq 0xe8(%rbx), %r15
xorl %r12d, %r12d
movslq 0x18(%rbx), %rax
cmpq %rax, %r12
jge 0x1f926
movq 0xd0(%rbx), %rax
movq (%rax,%r12,8), %rbp
movq %rcx, %r14
movl 0xc8(%rcx), %r13d
movq (%rsp), %rdi
movq %r12, %rsi
callq 0x9f66
cmpq %r13, %rbp
jbe 0x1f8ca
orq (%rax), %rdx
jmp 0x1f8d0
notq %rdx
andq (%rax), %rdx
movq %rdx, (%rax)
movq 0xb8(%rbx), %rax
movq (%rax,%r12,8), %r13
movl 0xc8(%r14), %ebp
movq %r15, %rdi
movq %r12, %rsi
callq 0x9f66
cmpq %rbp, %r13
jbe 0x1f8fa
orq (%rax), %rdx
jmp 0x1f900
notq %rdx
andq (%rax), %rdx
movq %rdx, (%rax)
movq 0xd0(%rbx), %rax
andq $0x0, (%rax,%r12,8)
movq 0xb8(%rbx), %rax
andq $0x0, (%rax,%r12,8)
incq %r12
movq %r14, %rcx
jmp 0x1f892
leaq 0x1e5eb(%rip), %rax     # 0x3df18
movq (%rax), %rax
movq %rax, 0x268(%rbx)
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::updateBypassTag(CacheEntry*, int, bool)
void
Predictor::updateBypassTag(CacheEntry* entry, int set, bool inNVM)
{
	uint64_t block_addr = entry->address;
	//DPRINTF(DebugCache, "Predictor::recordAllocationDecision Set %d, block_addr = 0x%lx\n ", set, block_addr);

	//Look if the entry already exists, if yes => BP Error, if No insert it
	for(unsigned i = 0 ; i < BP_missing_tags[set].size() ; i++)
	{	
		if(BP_missing_tags[set][i]->addr == block_addr)
		{
			BP_missing_tags[set][i]->last_time_touched = m_cpt_bypassTag++;
			return;		
		}
	}
	//DPRINTF(DebugCache, "Predictor::recordAllocationDecision Didn't find the entry in the BP Missing Tags\n");
	int index_oldest =0;
	uint64_t oldest = BP_missing_tags[set][0]->last_time_touched;
	for(unsigned i = 0 ; i < BP_missing_tags[set].size() ; i++)
	{
		if(!BP_missing_tags[set][i]->isValid)		
		{
			index_oldest= i;
			break;
		}
	
		if(BP_missing_tags[set][i]->last_time_touched < oldest)
		{
			index_oldest = i;
			oldest = BP_missing_tags[set][i]->last_time_touched;
		}
	}
	//DPRINTF(DebugCache, "Predictor::Insertion of the new entry at assoc %d\n", index_oldest);
	
	BP_missing_tags[set][index_oldest]->last_time_touched = m_cpt_bypassTag++;
	BP_missing_tags[set][index_oldest]->addr = block_addr;
	BP_missing_tags[set][index_oldest]->isValid = true;		
	BP_missing_tags[set][index_oldest]->allocSite = inNVM;
	BP_missing_tags[set][index_oldest]->missPC = entry->missPC;
	
	
	/*
	if(m_policy == "Cerebron")
	{
		for(int i = 0 ; i < simu_parameters.PHC_features.size() ; i++)
		{		
			BP_missing_tags[set][index_oldest]->features_hash[i] = entry->PHC_allocation_pred[i].first;
			
		}
	}*/
		
}

// Assembly:
pushq %rbx
movq 0x8(%rsi), %rax
movslq %edx, %rdx
movq 0x140(%rdi), %r8
imulq $0x18, %rdx, %r9
movq (%r8,%r9), %rdx
movq 0x8(%r8,%r9), %r8
subq %rdx, %r8
sarq $0x3, %r8
xorl %r10d, %r10d
movl %r10d, %r10d
cmpq %r10, %r8
jbe 0x1f992
movq (%rdx,%r10,8), %r9
incl %r10d
cmpq %rax, (%r9)
jne 0x1f96c
movq 0x38(%rdi), %rax
leaq 0x1(%rax), %rcx
movq %rcx, 0x38(%rdi)
movq %rax, 0x8(%r9)
jmp 0x1f9f1
movq (%rdx), %r9
movq 0x8(%r9), %r10
xorl %r9d, %r9d
xorl %r11d, %r11d
movl %r11d, %ebx
cmpq %rbx, %r8
jbe 0x1f9c8
movq (%rdx,%rbx,8), %rbx
cmpb $0x1, 0x14(%rbx)
jne 0x1f9c5
movq 0x8(%rbx), %rbx
cmpq %r10, %rbx
cmovbl %r11d, %r9d
cmovbq %rbx, %r10
incl %r11d
jmp 0x1f99f
movl %r11d, %r9d
movq 0x38(%rdi), %r8
leaq 0x1(%r8), %r10
movq %r10, 0x38(%rdi)
movslq %r9d, %rdi
movq (%rdx,%rdi,8), %rdx
movq %r8, 0x8(%rdx)
movq %rax, (%rdx)
movb $0x1, 0x14(%rdx)
movb %cl, 0x16(%rdx)
movq 0x20(%rsi), %rax
movq %rax, 0x18(%rdx)
popq %rbx
retq
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::missingTagCostValue(unsigned long, int)
int 
Predictor::missingTagCostValue(uint64_t block_addr, int set)
{
	for(unsigned i = 0 ; i < m_SRAM_missing_tags[set].size() ; i++)
	{
		if(m_SRAM_missing_tags[set][i]->addr == block_addr && m_SRAM_missing_tags[set][i]->isValid)
		{
			return m_SRAM_missing_tags[set][i]->cost_value;
		}
	}	
	return 0;
}

// Assembly:
movslq %edx, %rax
movq 0x88(%rdi), %rdx
imulq $0x18, %rax, %rax
movq (%rdx,%rax), %rcx
movq 0x8(%rdx,%rax), %rdx
subq %rcx, %rdx
sarq $0x3, %rdx
xorl %eax, %eax
xorl %edi, %edi
movl %edi, %edi
cmpq %rdi, %rdx
jbe 0x1fa35
movq (%rcx,%rdi,8), %r8
cmpq %rsi, (%r8)
jne 0x1fa2d
cmpb $0x1, 0x14(%r8)
je 0x1fa31
incl %edi
jmp 0x1fa16
movl 0x10(%r8), %eax
retq
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::missingTagMissPC(unsigned long, int)
uint64_t 
Predictor::missingTagMissPC(uint64_t block_addr, int set)
{
	assert( m_policy == "Cerebron" || m_policy == "SimplePerceptron");
	
	for(unsigned i = 0 ; i < m_SRAM_missing_tags[set].size() ; i++)
	{
		if(m_SRAM_missing_tags[set][i]->addr == block_addr && m_SRAM_missing_tags[set][i]->isValid)
		{
			return m_SRAM_missing_tags[set][i]->missPC;
		}
	}
	
	//Sanity check , shouldn't go there 
	assert(false);

	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %edx, %ebp
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x40(%rdi), %r15
leaq 0xad77(%rip), %rsi      # 0x2a7c7
movq %r15, %rdi
callq 0x9f59
testb %al, %al
jne 0x1fa6f
leaq 0xad6d(%rip), %rsi      # 0x2a7d0
movq %r15, %rdi
callq 0x9f59
testb %al, %al
je 0x1fad7
movslq %ebp, %rax
movq 0x88(%r14), %rcx
imulq $0x18, %rax, %rdx
movq (%rcx,%rdx), %rax
movq 0x8(%rcx,%rdx), %rcx
subq %rax, %rcx
sarq $0x3, %rcx
xorl %edx, %edx
movl %edx, %edx
cmpq %rdx, %rcx
jbe 0x1fab8
movq (%rax,%rdx,8), %rsi
cmpq %rbx, (%rsi)
jne 0x1faa5
cmpb $0x0, 0x14(%rsi)
jne 0x1faa9
incl %edx
jmp 0x1fa8f
movq 0x18(%rsi), %rax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
leaq 0xa9cf(%rip), %rdi      # 0x2a48e
leaq 0xbc75(%rip), %rsi      # 0x2b73b
leaq 0xbc7f(%rip), %rcx      # 0x2b74c
movl $0x168, %edx            # imm = 0x168
callq 0x51e0
leaq 0xbc24(%rip), %rdi      # 0x2b702
leaq 0xbc56(%rip), %rsi      # 0x2b73b
leaq 0xbc60(%rip), %rcx      # 0x2b74c
movl $0x15d, %edx            # imm = 0x15D
callq 0x51e0
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::missingTagFeaturesHash(unsigned long, int)
vector<int>
Predictor::missingTagFeaturesHash(uint64_t block_addr, int set)
{
	if( m_policy == "Cerebron")
	{
		for(unsigned i = 0 ; i < m_SRAM_missing_tags[set].size() ; i++)
		{
			if(m_SRAM_missing_tags[set][i]->addr == block_addr && m_SRAM_missing_tags[set][i]->isValid)
			{
				return m_SRAM_missing_tags[set][i]->features_hash;
			}
		}	
	}
	return vector<int>();
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %ecx, %ebp
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %rbx
leaq 0x40(%rsi), %rdi
leaq 0xacb4(%rip), %rsi      # 0x2a7c7
callq 0x9f59
testb %al, %al
je 0x1fb56
movslq %ebp, %rax
movq 0x88(%r15), %rcx
imulq $0x18, %rax, %rdx
movq (%rcx,%rdx), %rax
movq 0x8(%rcx,%rdx), %rcx
subq %rax, %rcx
sarq $0x3, %rcx
xorl %edx, %edx
movl %edx, %edx
cmpq %rdx, %rcx
jbe 0x1fb56
movq (%rax,%rdx,8), %rsi
cmpq %r14, (%rsi)
jne 0x1fb52
cmpb $0x0, 0x14(%rsi)
jne 0x1fb6f
incl %edx
jmp 0x1fb3c
xorps %xmm0, %xmm0
movups %xmm0, (%rbx)
andq $0x0, 0x10(%rbx)
movq %rbx, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
addq $0x20, %rsi
movq %rbx, %rdi
callq 0xa6c2
jmp 0x1fb61
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::checkBypassTag(unsigned long, int)
bool
Predictor::checkBypassTag(uint64_t block_addr , int set)
{	
	for(unsigned i = 0 ; i < BP_missing_tags[set].size() ; i++)
	{	
		if(BP_missing_tags[set][i]->addr == block_addr)
			return true;
	}
	return false;
}

// Assembly:
movslq %edx, %rax
movq 0x140(%rdi), %rdx
imulq $0x18, %rax, %rax
movq (%rdx,%rax), %rcx
movq 0x8(%rdx,%rax), %rax
subq %rcx, %rax
sarq $0x3, %rax
xorl %edi, %edi
movl %edi, %edx
cmpq %rdx, %rax
jbe 0x1fbb1
movq (%rcx,%rdx,8), %r8
leal 0x1(%rdx), %edi
cmpq %rsi, (%r8)
jne 0x1fb9e
cmpq %rdx, %rax
seta %al
retq
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::hitInSRAMMissingTags(unsigned long, int)
bool 
Predictor::hitInSRAMMissingTags(uint64_t block_addr, int id_set)
{
	/* Check if the block is in the missing tag array */ 
	if(m_trackError && !m_isWarmup){
		//An error in the SRAM part is a block that miss in the SRAM array 
		//but not in the MT array
		for(unsigned i = 0 ; i < m_SRAM_missing_tags[id_set].size() ; i++)
		{
			if(m_SRAM_missing_tags[id_set][i]->addr == block_addr && m_SRAM_missing_tags[id_set][i]->isValid)
			{
				////DPRINTF("BasePredictor::checkMissingTags Found SRAM error as %#lx is present in MT tag %i \n", block_addr ,i);  
				return true;
			}
		}	
	}
	return false;
}

// Assembly:
cmpb $0x1, 0x80(%rdi)
jne 0x1fd5b
xorl %ecx, %ecx
cmpb $0x0, 0x81(%rdi)
movl $0x0, %eax
jne 0x1fd5d
movslq %edx, %rax
movq 0x88(%rdi), %rdi
imulq $0x18, %rax, %rax
movq (%rdi,%rax), %rdx
movq 0x8(%rdi,%rax), %rdi
subq %rdx, %rdi
sarq $0x3, %rdi
movl %ecx, %ecx
cmpq %rcx, %rdi
seta %al
jbe 0x1fd5d
movq (%rdx,%rcx,8), %r8
cmpq %rsi, (%r8)
jne 0x1fd57
cmpb $0x0, 0x14(%r8)
jne 0x1fd5d
incl %ecx
jmp 0x1fd3d
xorl %eax, %eax
retq
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::hitInNVMMissingTags(unsigned long, int)
bool 
Predictor::hitInNVMMissingTags(uint64_t block_addr, int id_set)
{
	/* Check if the block is in the missing tag array */ 
	if(m_trackError && !m_isWarmup){
		//An error in the NVM part is a block that miss in the NVM array 
		//but not in the MT array
		for(unsigned i = 0 ; i < m_NVM_missing_tags[id_set].size() ; i++)
		{
			if(m_NVM_missing_tags[id_set][i]->addr == block_addr && m_NVM_missing_tags[id_set][i]->isValid)
			{
				return true;
			}
		}	
	}
	return false;
}

// Assembly:
cmpb $0x1, 0x80(%rdi)
jne 0x1fdb3
xorl %ecx, %ecx
cmpb $0x0, 0x81(%rdi)
movl $0x0, %eax
jne 0x1fdb5
movslq %edx, %rax
movq 0xa0(%rdi), %rdi
imulq $0x18, %rax, %rax
movq (%rdi,%rax), %rdx
movq 0x8(%rdi,%rax), %rdi
subq %rdx, %rdi
sarq $0x3, %rdi
movl %ecx, %ecx
cmpq %rcx, %rdi
seta %al
jbe 0x1fdb5
movq (%rdx,%rcx,8), %r8
cmpq %rsi, (%r8)
jne 0x1fdaf
cmpb $0x0, 0x14(%r8)
jne 0x1fdb5
incl %ecx
jmp 0x1fd95
xorl %eax, %eax
retq
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::openNewTimeFrame()
void
Predictor::openNewTimeFrame()
{
	if(m_isWarmup)
		return;
		
	//DPRINTF("BasePredictor::openNewTimeFrame New Time Frame Start\n");  
	stats_NVM_errors.push_back(0);
	stats_SRAM_errors.push_back(0);
	stats_BP_errors.push_back(0);
	stats_MigrationErrors.push_back(0);
	stats_nbLLCaccessPerFrame = 0;

}

// Assembly:
cmpb $0x0, 0x81(%rdi)
jne 0x1fe2f
pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
addq $0x1e0, %rdi            # imm = 0x1E0
leaq 0x4(%rsp), %r14
andl $0x0, (%r14)
movq %r14, %rsi
callq 0xeef4
leaq 0x1f8(%rbx), %rdi
andl $0x0, (%r14)
leaq 0x4(%rsp), %r14
movq %r14, %rsi
callq 0xeef4
leaq 0x210(%rbx), %rdi
andl $0x0, (%r14)
leaq 0x4(%rsp), %r14
movq %r14, %rsi
callq 0xeef4
leaq 0x228(%rbx), %rdi
andl $0x0, (%r14)
leaq 0x4(%rsp), %rsi
callq 0xeef4
andq $0x0, 0x78(%rbx)
addq $0x8, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::updatePolicy(unsigned long, unsigned long, bool, Access, bool)
void
Predictor::updatePolicy(uint64_t set, uint64_t index, bool inNVM, Access element , bool isWBrequest = false)
{	
	updateCachePressure();
	
	uint64_t block_addr = bitRemove(element.m_address , 0 , log2(BLOCK_SIZE));
	updateFUcaches(block_addr , inNVM);

	if(m_trackError)
	{
		CacheEntry* current = inNVM ? m_tableNVM[set][index] : m_tableSRAM[set][index];
		updateBypassTag( current , set , inNVM);
	}

	if(!m_isWarmup)
	{	
		stats_nbLLCaccessPerFrame++;
		//An error in the NVM side is when handling a write 
		if(inNVM && element.isWrite()){
			stats_NVM_errors[stats_NVM_errors.size()-1]++;

			if(isWBrequest)
				stats_WBerrors++;
			else
				stats_COREerrors++;
		}
	}
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movl %r8d, %ebx
movl %ecx, %ebp
movq %rdx, %r12
movq %rsi, %r15
movq %rdi, %r14
callq 0x1f830
movq 0x30(%rsp), %rdi
pushq $0x6
popq %rdx
xorl %esi, %esi
callq 0x24f70
movq %r14, %rdi
movq %rax, %rsi
movl %ebp, %edx
callq 0x1f462
cmpb $0x1, 0x80(%r14)
jne 0x1fea8
movzbl %bpl, %ecx
movq 0x8(%r14,%rcx,8), %rax
movq (%rax), %rax
imulq $0x18, %r15, %rdx
movq (%rax,%rdx), %rax
movq (%rax,%r12,8), %rsi
movq %r14, %rdi
movl %r15d, %edx
callq 0x1f946
cmpb $0x0, 0x81(%r14)
jne 0x1fee5
incq 0x78(%r14)
testb %bpl, %bpl
je 0x1fee5
leaq 0x30(%rsp), %rax
movl 0x1c(%rax), %eax
cmpl $0x6, %eax
je 0x1fecd
cmpl $0x3, %eax
jne 0x1fee5
movq 0x1e8(%r14), %rax
incl -0x4(%rax)
xorb $0x1, %bl
movzbl %bl, %eax
incq 0x258(%r14,%rax,8)
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::printBParray(int, std::basic_ofstream<char, std::char_traits<char>>&)
void
Predictor::printBParray(int set , ofstream& out)
{
	for(unsigned i = 0 ; i < BP_missing_tags[set].size() ; i++)
	{
		if(BP_missing_tags[set][i]->isValid)
		{
			string alloc_site = BP_missing_tags[set][i]->allocSite ? "NVM" : "SRAM";
			out << "Index " << i << " - Addr = " << std::hex << BP_missing_tags[set][i]->addr \
			<< std::dec << " - Time = " << BP_missing_tags[set][i]->last_time_touched << " - Allocation = " << alloc_site << endl;		
		}
	}
	
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movq %rdx, %rbx
movq %rdi, %r14
movslq %esi, %rax
xorl %r15d, %r15d
imulq $0x18, %rax, %rbp
leaq 0x8(%rsp), %r12
leaq 0xb8f7(%rip), %r13      # 0x2b80f
movl %r15d, %r15d
movq 0x140(%r14), %rcx
movq (%rcx,%rbp), %rax
movq 0x8(%rcx,%rbp), %rcx
subq %rax, %rcx
sarq $0x3, %rcx
cmpq %r15, %rcx
jbe 0x2002f
movq (%rax,%r15,8), %rax
cmpb $0x1, 0x14(%rax)
jne 0x20027
cmpb $0x0, 0x16(%rax)
leaq 0x98a8(%rip), %rsi      # 0x297fc
jne 0x1ff5d
leaq 0x98a8(%rip), %rsi      # 0x29805
movq %r12, %rdi
leaq 0x7(%rsp), %rdx
callq 0x5140
movq %rbx, %rdi
leaq 0xb87e(%rip), %rsi      # 0x2b7f2
callq 0x52c0
movq %rax, %rdi
movq %r15, %rsi
callq 0x5200
movq %rax, %rdi
leaq 0xb86b(%rip), %rsi      # 0x2b7f9
callq 0x52c0
movq (%rax), %rcx
movq -0x18(%rcx), %rcx
movl 0x18(%rax,%rcx), %edx
andl $-0x4b, %edx
orl $0x8, %edx
movl %edx, 0x18(%rax,%rcx)
movq 0x140(%r14), %rcx
movq (%rcx,%rbp), %rcx
movq (%rcx,%r15,8), %rcx
movq (%rcx), %rsi
movq %rax, %rdi
callq 0x5200
movq (%rax), %rcx
movq -0x18(%rcx), %rcx
movl 0x18(%rax,%rcx), %edx
andl $-0x4b, %edx
orl $0x2, %edx
movl %edx, 0x18(%rax,%rcx)
movq %rax, %rdi
leaq 0xb823(%rip), %rsi      # 0x2b804
callq 0x52c0
movq 0x140(%r14), %rcx
movq (%rcx,%rbp), %rcx
movq (%rcx,%r15,8), %rcx
movq 0x8(%rcx), %rsi
movq %rax, %rdi
callq 0x5200
movq %rax, %rdi
movq %r13, %rsi
callq 0x52c0
movq %rax, %rdi
movq %r12, %rsi
callq 0x5290
movq %rax, %rdi
callq 0x5190
movq %r12, %rdi
callq 0x5618
incl %r15d
jmp 0x1ff18
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
leaq 0x8(%rsp), %rdi
callq 0x5618
movq %rbx, %rdi
callq 0x5570
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::getMissPCfromBPtags(unsigned long, int)
uint64_t 
Predictor::getMissPCfromBPtags(uint64_t block_addr , int set)
{
	for(unsigned i = 0 ; i < BP_missing_tags[set].size(); i++)
	{
		if( block_addr == BP_missing_tags[set][i]->addr && BP_missing_tags[set][i]->isValid)
			return BP_missing_tags[set][i]->missPC;
	}
	assert(false);
	return 0;
}

// Assembly:
pushq %rax
movslq %edx, %rax
movq 0x140(%rdi), %rcx
imulq $0x18, %rax, %rdx
movq (%rcx,%rdx), %rax
movq 0x8(%rcx,%rdx), %rcx
subq %rax, %rcx
sarq $0x3, %rcx
xorl %edx, %edx
movl %edx, %edx
cmpq %rdx, %rcx
jbe 0x20117
movq (%rax,%rdx,8), %rdi
cmpq %rsi, (%rdi)
jne 0x2010d
cmpb $0x0, 0x14(%rdi)
jne 0x20111
incl %edx
jmp 0x200f7
movq 0x18(%rdi), %rax
popq %rcx
retq
leaq 0xa370(%rip), %rdi      # 0x2a48e
leaq 0xb616(%rip), %rsi      # 0x2b73b
leaq 0xb6f4(%rip), %rcx      # 0x2b820
movl $0x2e3, %edx            # imm = 0x2E3
callq 0x51e0
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::getAllocSitefromBPtags(unsigned long, int)
bool 
Predictor::getAllocSitefromBPtags( uint64_t addr , int set)
{
	for(unsigned i = 0 ; i < BP_missing_tags[set].size(); i++)
	{
		if( addr == BP_missing_tags[set][i]->addr && BP_missing_tags[set][i]->isValid)
			return BP_missing_tags[set][i]->allocSite;
	}
	assert(false);
	return false;
}

// Assembly:
pushq %rax
movslq %edx, %rax
movq 0x140(%rdi), %rcx
imulq $0x18, %rax, %rdx
movq (%rcx,%rdx), %rax
movq 0x8(%rcx,%rdx), %rcx
subq %rax, %rcx
sarq $0x3, %rcx
xorl %edx, %edx
movl %edx, %edx
cmpq %rdx, %rcx
jbe 0x20176
movq (%rax,%rdx,8), %rdi
cmpq %rsi, (%rdi)
jne 0x2016d
cmpb $0x0, 0x14(%rdi)
jne 0x20171
incl %edx
jmp 0x20157
movb 0x16(%rdi), %al
popq %rcx
retq
leaq 0xa311(%rip), %rdi      # 0x2a48e
leaq 0xb5b7(%rip), %rsi      # 0x2b73b
leaq 0xb6cc(%rip), %rcx      # 0x2b857
movl $0x2ef, %edx            # imm = 0x2EF
callq 0x51e0
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::getHitPerDataArray(unsigned long, int, bool)
bool
Predictor::getHitPerDataArray(uint64_t block_addr, int set , bool inNVM)
{
	uint64_t ref_time = 0;
	bool find = false;
	for(unsigned i = 0 ; i < BP_missing_tags[set].size() && !find; i++)
	{
		if( block_addr == BP_missing_tags[set][i]->addr && BP_missing_tags[set][i]->isValid)
		{
			ref_time = BP_missing_tags[set][i]->last_time_touched;
			find = true;		
		}
	}
	
	if(!find)
		return false;
	
	/*string str_inNVM = inNVM ? "TRUE" : "FALSE";
	cout << "*** Call getHitPerDataArray with inNVM =" << str_inNVM << endl;
	cout << "Block is " << std::hex << block_addr << ", ref_time = " << ref_time << endl;
	for(unsigned i = 0 ; i < BP_missing_tags[set].size() ; i++)
	{
		if(BP_missing_tags[set][i]->isValid)
		{
			string alloc_site = BP_missing_tags[set][i]->allocSite ? "NVM" : "SRAM";
			cout << "Index " << i << " - Addr = " << std::hex << BP_missing_tags[set][i]->addr \
			<< std::dec << " - Time = " << BP_missing_tags[set][i]->last_time_touched << " - Allocation = " << alloc_site << endl;		
		}
	}
	*/
	int pos = 0;
	
	for(unsigned i = 0 ; i < BP_missing_tags[set].size() ; i++)
	{
		if( BP_missing_tags[set][i]->isValid && \
			BP_missing_tags[set][i]->allocSite == inNVM && \
			ref_time < BP_missing_tags[set][i]->last_time_touched)
		{
			pos++;
		}
	}

	//cout << "pos = " << pos << endl;
	if(inNVM)
		return pos < simu_parameters.nvm_assoc ? true : false;
	else
		return pos < simu_parameters.sram_assoc ? true : false;
}

// Assembly:
movslq %edx, %rax
movq 0x140(%rdi), %rdi
imulq $0x18, %rax, %rax
movq (%rdi,%rax), %rdx
movq 0x8(%rdi,%rax), %rdi
subq %rdx, %rdi
sarq $0x3, %rdi
xorl %r8d, %r8d
xorl %r9d, %r9d
xorl %eax, %eax
movl %eax, %eax
cmpq %rax, %rdi
jbe 0x201e9
testb $0x1, %r9b
jne 0x201e9
movq (%rdx,%rax,8), %r9
cmpq %rsi, (%r9)
jne 0x201e2
cmpb $0x1, 0x14(%r9)
jne 0x201e2
movq 0x8(%r9), %r8
movb $0x1, %r9b
jmp 0x201e5
xorl %r9d, %r9d
incl %eax
jmp 0x201bc
xorl %eax, %eax
testb $0x1, %r9b
je 0x20227
xorl %esi, %esi
movl %esi, %esi
cmpq %rsi, %rdi
jbe 0x20216
movq (%rdx,%rsi,8), %r9
cmpb $0x1, 0x14(%r9)
jne 0x20212
cmpb %cl, 0x16(%r9)
jne 0x20212
cmpq 0x8(%r9), %r8
adcl $0x0, %eax
incl %esi
jmp 0x201f3
leaq 0x1dd33(%rip), %rdx     # 0x3df50
movzbl %cl, %ecx
cmpl 0x38(%rdx,%rcx,8), %eax
setl %al
retq
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::printConfig(std::ostream&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
void 
Predictor::printConfig(std::ostream& out, std::string entete)
{
//	out << entete << ":Predictor" << endl;
	out << entete << ":Predictor:SizeSRAM_MTarray:\t" << m_SRAMassoc_MT_size << endl;	
	out << entete << ":Predictor:SizeNVM_MTarray:\t" << m_NVMassoc_MT_size << endl;	
	out << entete << ":Predictor:MT_counter_th:\t" << simu_parameters.MT_counter_th << endl;	
	out << entete << ":Predictor:MT_timeframe:\t" << simu_parameters.MT_timeframe << endl;	
	out << entete << ":Predictor:MT_sampling_sets:\t" << simu_parameters.nb_MTcouters_sampling << endl;	

//	else
//		out << entete << ":Predictor:TrackingEnabled\tFALSE" << endl;

	out << entete << ":Predictor:SampledSets\t" << simu_parameters.nb_sampled_sets << endl;
	out << entete << ":Predictor:MediumRDdef\t" << simu_parameters.mediumrd_def << endl;
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
movq %rsi, %rdi
movq %rdx, %rsi
callq 0x5290
leaq 0xb645(%rip), %rsi      # 0x2b88d
movq %rax, %rdi
callq 0x52c0
movl 0x28(%r15), %esi
movq %rax, %rdi
callq 0x5560
movq %rax, %rdi
callq 0x5190
movq %r14, %rdi
movq %rbx, %rsi
callq 0x5290
leaq 0xb635(%rip), %rsi      # 0x2b8ab
movq %rax, %rdi
callq 0x52c0
movl 0x2c(%r15), %esi
movq %rax, %rdi
callq 0x5560
movq %rax, %rdi
callq 0x5190
movq %r14, %rdi
movq %rbx, %rsi
callq 0x5290
leaq 0xb624(%rip), %rsi      # 0x2b8c8
movq %rax, %rdi
callq 0x52c0
leaq 0x1dc9d(%rip), %r15     # 0x3df50
movl 0xc8(%r15), %esi
movq %rax, %rdi
callq 0x5200
movq %rax, %rdi
callq 0x5190
movq %r14, %rdi
movq %rbx, %rsi
callq 0x5290
leaq 0xb607(%rip), %rsi      # 0x2b8e3
movq %rax, %rdi
callq 0x52c0
movq 0xd0(%r15), %rsi
movq %rax, %rdi
callq 0x5200
movq %rax, %rdi
callq 0x5190
movq %r14, %rdi
movq %rbx, %rsi
callq 0x5290
leaq 0xb5f0(%rip), %rsi      # 0x2b8fd
movq %rax, %rdi
callq 0x52c0
movl 0xd8(%r15), %esi
movq %rax, %rdi
callq 0x5560
movq %rax, %rdi
callq 0x5190
movq %r14, %rdi
movq %rbx, %rsi
callq 0x5290
leaq 0xb5dd(%rip), %rsi      # 0x2b91b
movq %rax, %rdi
callq 0x52c0
movl 0x48(%r15), %esi
movq %rax, %rdi
callq 0x5560
movq %rax, %rdi
callq 0x5190
movq %r14, %rdi
movq %rbx, %rsi
callq 0x5290
leaq 0xb5c7(%rip), %rsi      # 0x2b933
movq %rax, %rdi
callq 0x52c0
movl 0x1fc(%r15), %esi
movq %rax, %rdi
callq 0x5560
movq %rax, %rdi
popq %rbx
popq %r14
popq %r15
jmp 0x5190
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.cc
// Function: Predictor::~Predictor()
Predictor::~Predictor()

{
	if(m_trackError){
		for(unsigned i = 0 ; i < BP_missing_tags.size() ; i++)
		{
			for(unsigned j = 0 ; j < BP_missing_tags[i].size() ; j++)
			{
				delete BP_missing_tags[i][j];
			}
		}
	
		for(int i = 0 ; i < m_nb_set ; i++)
		{
			for(unsigned j = 0 ; j < m_SRAM_missing_tags[i].size() ; j++)
				delete m_SRAM_missing_tags[i][j];
			/*for(unsigned j = 0 ; j < m_NVM_missing_tags[i].size() ; j++)
				delete m_NVM_missing_tags[i][j];
			*/
		}
	}
	delete m_replacementPolicyNVM_ptr;
	delete m_replacementPolicySRAM_ptr;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
leaq 0x1c121(%rip), %rax     # 0x3c9b0
movq %rax, (%rdi)
cmpb $0x1, 0x80(%rdi)
jne 0x20964
movq 0x140(%rbx), %rcx
xorl %r15d, %r15d
pushq $0x18
popq %r12
movl %r15d, %r15d
movq 0x148(%rbx), %rax
subq %rcx, %rax
cqto
idivq %r12
cmpq %r15, %rax
jbe 0x2090e
xorl %r13d, %r13d
imulq $0x18, %r15, %rbp
movl %r13d, %r13d
movq (%rcx,%rbp), %rax
movq 0x8(%rcx,%rbp), %rdx
subq %rax, %rdx
sarq $0x3, %rdx
cmpq %r13, %rdx
jbe 0x20909
movq (%rax,%r13,8), %r14
testq %r14, %r14
je 0x208f5
leaq 0x20(%r14), %rdi
callq 0xa49a
movq %r14, %rdi
callq 0x52a0
incl %r13d
movq 0x140(%rbx), %rcx
jmp 0x208cb
incl %r15d
jmp 0x208ad
xorl %r15d, %r15d
movslq 0x18(%rbx), %rax
cmpq %rax, %r15
jge 0x20964
xorl %r12d, %r12d
imulq $0x18, %r15, %r13
movl %r12d, %r12d
movq 0x88(%rbx), %rcx
movq (%rcx,%r13), %rax
movq 0x8(%rcx,%r13), %rcx
subq %rax, %rcx
sarq $0x3, %rcx
cmpq %r12, %rcx
jbe 0x2095f
movq (%rax,%r12,8), %r14
testq %r14, %r14
je 0x20952
leaq 0x20(%r14), %rdi
callq 0xa49a
movq %r14, %rdi
callq 0x52a0
incl %r12d
jmp 0x20921
incq %r15
jmp 0x20911
movq 0x60(%rbx), %rdi
testq %rdi, %rdi
je 0x20973
movq (%rdi), %rax
callq *0x8(%rax)
movq 0x68(%rbx), %rdi
testq %rdi, %rdi
je 0x20982
movq (%rdi), %rax
callq *0x8(%rax)
leaq 0x240(%rbx), %rdi
callq 0x20b84
leaq 0x228(%rbx), %rdi
callq 0xa49a
leaq 0x210(%rbx), %rdi
callq 0xa49a
leaq 0x1f8(%rbx), %rdi
callq 0xa49a
leaq 0x1e0(%rbx), %rdi
callq 0xa49a
leaq 0x188(%rbx), %rdi
callq 0x178ba
leaq 0x170(%rbx), %rdi
callq 0x20e5a
leaq 0x158(%rbx), %rdi
callq 0x20e5a
leaq 0x140(%rbx), %rdi
callq 0x20ba6
leaq 0x110(%rbx), %rdi
callq 0xe9b4
leaq 0xe8(%rbx), %rdi
callq 0xe9b4
leaq 0xd0(%rbx), %rdi
callq 0xa4a8
leaq 0xb8(%rbx), %rdi
callq 0xa4a8
leaq 0xa0(%rbx), %rdi
callq 0x20ba6
leaq 0x88(%rbx), %rdi
callq 0x20ba6
addq $0x40, %rbx
movq %rbx, %rdi
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x5618
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Predictor.hh
// Function: MissingTagEntry::initFeaturesHash(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
void initFeaturesHash(std::string policy)
		{
			if( policy == "Cerebron")	
				features_hash = std::vector<int>( simu_parameters.PHC_features.size() , 0);
			//else if (policy == "SimplePerceptron")
			//	features_hash = std::vector<int>( simu_parameters.simple_perceptron_features.size() , 0);
		}

// Assembly:
pushq %r14
pushq %rbx
subq $0x28, %rsp
movq %rsi, %rax
movq %rdi, %rbx
leaq 0x9ca1(%rip), %rsi      # 0x2a7c7
movq %rax, %rdi
callq 0x9f59
testb %al, %al
je 0x20b7c
leaq 0x1d417(%rip), %rax     # 0x3df50
movq 0x1d8(%rax), %rsi
subq 0x1d0(%rax), %rsi
sarq $0x5, %rsi
leaq 0xc(%rsp), %rdx
andl $0x0, (%rdx)
leaq 0x10(%rsp), %r14
leaq 0xb(%rsp), %rcx
movq %r14, %rdi
callq 0x9c8a
addq $0x20, %rbx
movq %rbx, %rdi
movq %r14, %rsi
callq 0xa52e
movq %r14, %rdi
callq 0xa49a
addq $0x28, %rsp
popq %rbx
popq %r14
retq
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/Prefetcher.cc
// Function: SimplePrefetcher::SimplePrefetcher(int, int, bool)
void
SimplePrefetcher::generatePrefetch(uint64_t address, bool isHit, bool isInst)
{
/*	//DPRINTF("SimplePrefetcher::generatePrefetch");
	vector<uint64_t> prefetch_addresses = getNextAddress(address);
	
	for(auto p : prefetch_addresses)
	{
		Access request;
		request.m_address = p;
		request.m_type = isInst ? MemCmd::DATA_PREFETCH : MemCmd::INST_PREFETCH;
		prefetchAddress(request);
	}
*/
}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movl %esi, 0x8(%rdi)
movl %edx, 0x10(%rdi)
movb %cl, 0x14(%rdi)
leaq 0x1b70c(%rip), %rax     # 0x3cb40
movq %rax, (%rdi)
leaq 0x18(%rdi), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 0x18(%rdi)
andq $0x0, 0x28(%rdi)
movslq %edx, %rsi
movq %rbx, %rdi
callq 0x2167c
addq $0x8, %rsp
popq %rbx
popq %r14
retq
movq %rax, %r14
movq %rbx, %rdi
callq 0x216b4
movq %r14, %rdi
callq 0x5570
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/ReplacementPolicy.cc
// Function: LRUPolicy::evictPolicy(int)
int
LRUPolicy::evictPolicy(int set)
{
	int smallest_time = m_cache_entries[set][0]->policyInfo , smallest_index = 0;

	for(int i = 0 ; i < m_assoc ; i++){
		if(!m_cache_entries[set][i]->isValid) 
			return i;
	}
	
	for(int i = 0 ; i < m_assoc ; i++){
		if(m_cache_entries[set][i]->policyInfo < smallest_time){
			smallest_time =  m_cache_entries[set][i]->policyInfo;
			smallest_index = i;
		}
	}
	return smallest_index;
}

// Assembly:
movslq %esi, %rax
movq 0x8(%rdi), %rcx
imulq $0x18, %rax, %rax
movq (%rcx,%rax), %rcx
movq (%rcx), %rax
movl 0x38(%rax), %edx
movl 0x24(%rdi), %esi
xorl %eax, %eax
testl %esi, %esi
cmovlel %eax, %esi
cmpq %rax, %rsi
je 0x21934
movq (%rcx,%rax,8), %rdi
cmpb $0x1, (%rdi)
jne 0x21954
incq %rax
jmp 0x21921
xorl %edi, %edi
xorl %eax, %eax
cmpq %rdi, %rsi
je 0x21954
movq (%rcx,%rdi,8), %r8
movl 0x38(%r8), %r8d
cmpl %edx, %r8d
cmovll %r8d, %edx
cmovll %edi, %eax
incq %rdi
jmp 0x21938
retq
nop
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/SaturationPredictor.cc
// Function: SaturationCounter::printStats(std::ostream&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>)
void SaturationCounter::printStats(std::ostream& out, string entete)
{	
	
	double migrationNVM = (double) stats_nbMigrationsFromNVM[0];
	double migrationSRAM = (double) stats_nbMigrationsFromNVM[1];
	double total = migrationNVM+migrationSRAM;

	if(total > 0){
		out << entete << ":PredictorStats:" << endl;
		out << entete << ":NBMigration\t" << total << endl;
		out << entete << ":MigrationFromNVM\t" << migrationNVM*100/total << "%" << endl;
		out << entete << ":MigrationFromSRAM\t" << migrationSRAM*100/total << "%" << endl;	
	}
	Predictor::printStats(out, entete);
}

// Assembly:
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x58, %rsp
movq %rdx, %r15
movq %rdi, %rbx
movq 0x278(%rdi), %rax
cvtdq2pd (%rax), %xmm3
movq %rsi, %r14
movapd %xmm3, %xmm1
unpckhpd %xmm3, %xmm1            # xmm1 = xmm1[1],xmm3[1]
movapd %xmm3, %xmm2
addsd %xmm1, %xmm2
xorpd %xmm0, %xmm0
ucomisd %xmm0, %xmm2
jbe 0x21f59
movq %r14, %rdi
movq %r15, %rsi
movapd %xmm1, 0x20(%rsp)
movapd %xmm2, (%rsp)
movapd %xmm3, 0x10(%rsp)
callq 0x5290
leaq 0x9d74(%rip), %rsi      # 0x2bbf8
movq %rax, %rdi
callq 0x52c0
movq %rax, %rdi
callq 0x5190
movq %r14, %rdi
movq %r15, %rsi
callq 0x5290
leaq 0x7f12(%rip), %rsi      # 0x29db8
movq %rax, %rdi
callq 0x52c0
movq %rax, %rdi
movaps (%rsp), %xmm0
callq 0x54f0
movq %rax, %rdi
callq 0x5190
movq %r14, %rdi
movq %r15, %rsi
callq 0x5290
leaq 0x7f01(%rip), %rsi      # 0x29dd5
movq %rax, %rdi
callq 0x52c0
movapd 0x10(%rsp), %xmm0
mulsd 0x7a86(%rip), %xmm0     # 0x29970
divsd (%rsp), %xmm0
movq %rax, %rdi
callq 0x54f0
leaq 0x7eea(%rip), %r12      # 0x29de8
movq %rax, %rdi
movq %r12, %rsi
callq 0x52c0
movq %rax, %rdi
callq 0x5190
movq %r14, %rdi
movq %r15, %rsi
callq 0x5290
leaq 0x7ed6(%rip), %rsi      # 0x29df9
movq %rax, %rdi
callq 0x52c0
movapd 0x20(%rsp), %xmm0
mulsd 0x7a37(%rip), %xmm0     # 0x29970
divsd (%rsp), %xmm0
movq %rax, %rdi
callq 0x54f0
movq %rax, %rdi
movq %r12, %rsi
callq 0x52c0
movq %rax, %rdi
callq 0x5190
leaq 0x38(%rsp), %r12
movq %r12, %rdi
movq %r15, %rsi
callq 0x5410
movq %rbx, %rdi
movq %r14, %rsi
movq %r12, %rdx
callq 0x20390
leaq 0x38(%rsp), %rdi
callq 0x5618
addq $0x58, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq
movq %rax, %rbx
leaq 0x38(%rsp), %rdi
callq 0x5618
movq %rbx, %rdi
callq 0x5570
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/SimpleFeatureTable.cc
// Function: SimpleFeatureTable::SimpleFeatureTable(int, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>, bool)
SimpleFeatureTable::SimpleFeatureTable( int size, string name, bool isBP)
{
	m_size = size;
	m_name = name;
	m_counter_size = simu_parameters.perceptron_counter_size;
	
	m_table.resize(size);
	for(int i = 0 ; i < m_size; i++)
		m_table[i] = new SimpleFeatureEntry();

	if(simu_parameters.perceptron_drawFeatureMaps)
	{
		stats_heatmap_counter = vector<vector<int> >(m_size, vector<int>());
		stats_counter_buffer = vector<vector<int> >(m_size, vector<int>());
	}
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x58, %rsp
movl %esi, %ebp
movq %rdi, %r13
addq $0x8, %rdi
leaq 0x18(%r13), %rax
movq %rax, 0x8(%r13)
andq $0x0, 0x10(%r13)
movb $0x0, 0x18(%r13)
leaq 0x30(%r13), %r14
leaq 0x48(%r13), %rax
movq %rax, 0x18(%rsp)
leaq 0x60(%r13), %rax
movq %rax, 0x10(%rsp)
xorps %xmm0, %xmm0
movups %xmm0, 0x30(%r13)
movups %xmm0, 0x40(%r13)
movups %xmm0, 0x50(%r13)
movups %xmm0, 0x60(%r13)
andq $0x0, 0x70(%r13)
movl %esi, (%r13)
movq %rdi, 0x38(%rsp)
movq %rdx, %rsi
callq 0x51b0
leaq 0x1bef5(%rip), %rax     # 0x3df50
movl 0x1b0(%rax), %eax
movl %eax, 0x28(%r13)
movslq %ebp, %rsi
movq %r14, %rdi
callq 0x226de
movslq (%r13), %rbp
xorl %ebx, %ebx
testl %ebp, %ebp
movl $0x0, %r12d
cmovgl %ebp, %r12d
pushq $0x8
popq %r15
cmpq %rbx, %r12
je 0x220a6
movq %r15, %rdi
callq 0x52e0
andl $0x0, 0x4(%rax)
movb $0x0, (%rax)
movq (%r14), %rcx
movq %rax, (%rcx,%rbx,8)
incq %rbx
jmp 0x22086
leaq 0x1bea3(%rip), %rax     # 0x3df50
cmpb $0x0, 0x1cc(%rax)
je 0x2214b
xorps %xmm0, %xmm0
leaq 0x20(%rsp), %rdx
movaps %xmm0, (%rdx)
andq $0x0, 0x10(%rdx)
leaq 0x40(%rsp), %rdi
leaq 0xf(%rsp), %rcx
movq %rbp, %rsi
callq 0x9ce0
leaq 0x40(%rsp), %r15
movq 0x18(%rsp), %rdi
movq %r15, %rsi
callq 0xa710
movq %r15, %rdi
callq 0x9d36
leaq 0x20(%rsp), %r15
movq %r15, %rdi
callq 0xa49a
movslq (%r13), %rsi
xorps %xmm0, %xmm0
movaps %xmm0, (%r15)
andq $0x0, 0x10(%r15)
leaq 0x40(%rsp), %rdi
leaq 0x20(%rsp), %rdx
leaq 0xf(%rsp), %rcx
callq 0x9ce0
leaq 0x40(%rsp), %rbx
movq 0x10(%rsp), %rdi
movq %rbx, %rsi
callq 0xa710
movq %rbx, %rdi
callq 0x9d36
leaq 0x20(%rsp), %rdi
callq 0xa49a
addq $0x58, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
jmp 0x2215c
movq %rax, %r13
leaq 0x20(%rsp), %rdi
callq 0xa49a
jmp 0x22170
jmp 0x2216d
movq %rax, %r13
movq 0x10(%rsp), %rdi
callq 0x9d36
movq 0x18(%rsp), %rdi
callq 0x9d36
movq %r14, %rdi
callq 0x22710
movq 0x38(%rsp), %rdi
callq 0x5618
movq %r13, %rdi
callq 0x5570
// File: /workspace/github_cpp_makefile_star2_O2/gvaumour[P]cache-simulator/src/SimpleFeatureTable.cc
// Function: SimpleFeatureTable::getCounter(int)
int
SimpleFeatureTable::getCounter(int hash)
{
	SimpleFeatureEntry* entry = lookup(hash);
	if(simu_parameters.perceptron_drawFeatureMaps)
		stats_counter_buffer[hash].push_back( entry->counter );

	return  entry->counter;
}

// Assembly:
pushq %rbp
pushq %r14
pushq %rbx
movl %esi, %ebp
movq %rdi, %r14
callq 0x221fa
movq %rax, %rbx
leaq 0x1bcd4(%rip), %rax     # 0x3df50
cmpb $0x1, 0x1cc(%rax)
jne 0x2229c
movslq %ebp, %rax
imulq $0x18, %rax, %rdi
addq 0x60(%r14), %rdi
movq %rbx, %rsi
addq $0x4, %rsi
callq 0x9f84
movl 0x4(%rbx), %eax
popq %rbx
popq %r14
popq %rbp
retq