// File: dramninjasUMD[P]BOBSim/SimpleController.cpp
// Function: BOBSim::SimpleController::AddressMapping(unsigned long, unsigned int&, unsigned int&, unsigned int&, unsigned int&)
void SimpleController::AddressMapping(uint64_t physicalAddress, unsigned &rank, unsigned &bank, unsigned &row, unsigned &col)
{
	uint64_t tempA, tempB;

	if(DEBUG_CHANNEL)DEBUGN("     == Mapped 0x"<<hex<<physicalAddress);

	switch(mappingScheme)
	{
	case BK_CLH_RW_RK_CH_CLL_BY://bank:col_high:row:rank:chan:col_low:by
		//remove low order bits
		//this includes:
		// - byte offset
		// - low order bits of column address (assumed to be 0 since it is cache aligned)
		// - channel bits (already used)
		//
		//log2(CACHE_LINE_SIZE) == (log2(Low order column bits) + log2(BUS_ALIGNMENT_SIZE))
		physicalAddress = physicalAddress >> (channelBitWidth + cacheOffset);

		//rank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rankBitWidth;
		tempB = physicalAddress << rankBitWidth;
		mappedRank = tempA ^ tempB;

		//row bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rowBitWidth;
		tempB = physicalAddress << rowBitWidth;
		mappedRow = tempA ^ tempB;

		//column bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> (colBitWidth - (cacheOffset-busOffsetBitWidth));
		tempB = physicalAddress << (colBitWidth - (cacheOffset-busOffsetBitWidth));
		mappedCol = tempA ^ tempB;

		//account for low order column bits
		mappedCol = mappedCol << (cacheOffset-busOffsetBitWidth);

		//bank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> bankBitWidth;
		tempB = physicalAddress << bankBitWidth;
		mappedBank = tempA ^ tempB;

		break;
	case CLH_RW_RK_BK_CH_CLL_BY://col_high:row:rank:bank:chan:col_low:by
		//remove low order bits
		//this includes:
		// - byte offset
		// - low order bits of column address (assumed to be 0 since it is cache aligned)
		// - channel bits (already used)
		//
		//log2(CACHE_LINE_SIZE) == (log2(Low order column bits) + log2(BUS_ALIGNMENT_SIZE))
		physicalAddress = physicalAddress >> (channelBitWidth + cacheOffset);

		//bank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> bankBitWidth;
		tempB = physicalAddress << bankBitWidth;
		mappedBank = tempA ^ tempB;

		//rank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rankBitWidth;
		tempB = physicalAddress << rankBitWidth;
		mappedRank = tempA ^ tempB;

		//row bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rowBitWidth;
		tempB = physicalAddress << rowBitWidth;
		mappedRow = tempA ^ tempB;

		//column bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> (colBitWidth - (cacheOffset-busOffsetBitWidth));
		tempB = physicalAddress << (colBitWidth - (cacheOffset-busOffsetBitWidth));
		mappedCol = tempA ^ tempB;

		//account for low order column bits
		mappedCol = mappedCol << (cacheOffset-busOffsetBitWidth);

		break;
	case RK_BK_RW_CLH_CH_CLL_BY://rank:bank:row:colhigh:chan:collow:by
		//remove low order bits
		// - byte offset
		// - low order bits of column address (assumed to be 0 since it is cache aligned)
		// - channel bits (already used)
		//
		//log2(CACHE_LINE_SIZE) == (log2(Low order column bits) + log2(BUS_ALIGNMENT_SIZE))
		physicalAddress = physicalAddress >> (channelBitWidth + cacheOffset);

		//column bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> (colBitWidth - (cacheOffset-busOffsetBitWidth));
		tempB = physicalAddress << (colBitWidth - (cacheOffset-busOffsetBitWidth));
		mappedCol = tempA ^ tempB;

		//account for low order column bits
		mappedCol = mappedCol << (cacheOffset-busOffsetBitWidth);

		//row bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rowBitWidth;
		tempB = physicalAddress << rowBitWidth;
		mappedRow = tempA ^ tempB;

		//bank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> bankBitWidth;
		tempB = physicalAddress << bankBitWidth;
		mappedBank = tempA ^ tempB;

		//rank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rankBitWidth;
		tempB = physicalAddress << rankBitWidth;
		mappedRank = tempA ^ tempB;

		break;
	case RW_CH_BK_RK_CL_BY://row:chan:bank:rank:col:by
		//remove low order bits which account for the amount of data received on the bus (8 bytes)
		physicalAddress = physicalAddress >> busOffsetBitWidth;

		//column bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> colBitWidth;
		tempB = physicalAddress << colBitWidth;
		mappedCol = tempA ^ tempB;

		//rank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rankBitWidth;
		tempB = physicalAddress << rankBitWidth;
		mappedRank = tempA ^ tempB;

		//bank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> bankBitWidth;
		tempB = physicalAddress << bankBitWidth;
		mappedBank = tempA ^ tempB;

		//channel has already been mapped so just shift off the bits
		physicalAddress = physicalAddress >> channelBitWidth;

		//row bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rowBitWidth;
		tempB = physicalAddress << rowBitWidth;
		mappedRow = tempA ^ tempB;

		break;
	case RW_BK_RK_CH_CL_BY://row:bank:rank:chan:col:byte
		//remove low order bits which account for the amount of data received on the bus (8 bytes)
		physicalAddress = physicalAddress >> busOffsetBitWidth;

		//column bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> colBitWidth;
		tempB = physicalAddress << colBitWidth;
		mappedCol = tempA ^ tempB;

		//channel has already been mapped so just shift off the bits
		physicalAddress = physicalAddress >> channelBitWidth;

		//rank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rankBitWidth;
		tempB = physicalAddress << rankBitWidth;
		mappedRank = tempA ^ tempB;

		//bank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> bankBitWidth;
		tempB = physicalAddress << bankBitWidth;
		mappedBank = tempA ^ tempB;

		//row bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rowBitWidth;
		tempB = physicalAddress << rowBitWidth;
		mappedRow = tempA ^ tempB;

		break;
	case RW_BK_RK_CLH_CH_CLL_BY://row:bank:rank:col_high:chan:col_low:byte
		//remove low order bits
		//this includes:
		// - byte offset
		// - low order bits of column address (assumed to be 0 since it is cache aligned)
		// - channel bits (already used)
		//
		//log2(CACHE_LINE_SIZE) == (log2(Low order column bits) + log2(BUS_ALIGNMENT_SIZE))
		physicalAddress = physicalAddress >> (channelBitWidth + cacheOffset);

		//column bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> (colBitWidth - (cacheOffset-busOffsetBitWidth));
		tempB = physicalAddress << (colBitWidth - (cacheOffset-busOffsetBitWidth));
		mappedCol = tempA ^ tempB;

		//account for low order column bits
		mappedCol = mappedCol << (cacheOffset-busOffsetBitWidth);

		//rank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rankBitWidth;
		tempB = physicalAddress << rankBitWidth;
		mappedRank = tempA ^ tempB;

		//bank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> bankBitWidth;
		tempB = physicalAddress << bankBitWidth;
		mappedBank = tempA ^ tempB;

		//row bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rowBitWidth;
		tempB = physicalAddress << rowBitWidth;
		mappedRow = tempA ^ tempB;

		break;
	case RW_CLH_BK_RK_CH_CLL_BY://row:col_high:bank:rank:chan:col_low:byte
		//remove low order bits
		//this includes:
		// - byte offset
		// - low order bits of column address (assumed to be 0 since it is cache aligned)
		// - channel bits (already used)
		//
		//log2(CACHE_LINE_SIZE) == (log2(Low order column bits) + log2(BUS_ALIGNMENT_SIZE))
		physicalAddress = physicalAddress >> (channelBitWidth + cacheOffset);

		//rank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rankBitWidth;
		tempB = physicalAddress << rankBitWidth;
		mappedRank = tempA ^ tempB;

		//bank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> bankBitWidth;
		tempB = physicalAddress << bankBitWidth;
		mappedBank = tempA ^ tempB;

		//column bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> (colBitWidth - (cacheOffset-busOffsetBitWidth));
		tempB = physicalAddress << (colBitWidth - (cacheOffset-busOffsetBitWidth));
		mappedCol = tempA ^ tempB;

		//account for low order column bits
		mappedCol = mappedCol << (cacheOffset-busOffsetBitWidth);

		//row bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rowBitWidth;
		tempB = physicalAddress << rowBitWidth;
		mappedRow = tempA ^ tempB;

		break;
	case CH_RW_BK_RK_CL_BY:
		//remove bits which would address the amount of data received on a request
		physicalAddress = physicalAddress >> busOffsetBitWidth;

		//column bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> colBitWidth;
		tempB = physicalAddress << colBitWidth;
		mappedCol = tempA ^ tempB;

		//rank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rankBitWidth;
		tempB = physicalAddress << rankBitWidth;
		mappedRank = tempA ^ tempB;

		//bank bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> bankBitWidth;
		tempB = physicalAddress << bankBitWidth;
		mappedBank = tempA ^ tempB;

		//row bits
		tempA = physicalAddress;
		physicalAddress = physicalAddress >> rowBitWidth;
		tempB = physicalAddress << rowBitWidth;
		mappedRow = tempA ^ tempB;

		break;
	default:
		ERROR("== ERROR - Unknown address mapping???");
		exit(1);
		break;
	};

	if(DEBUG_CHANNEL) DEBUG(" to RK:"<<hex<<mappedRank<<" BK:"<<mappedBank<<" RW:"<<mappedRow<<" CL:"<<mappedCol<<dec);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x50, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq %rdx, -0x18(%rbp)
movq %rcx, -0x20(%rbp)
movq %r8, -0x28(%rbp)
movq %r9, -0x30(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x48(%rbp)
testb $0x1, 0x10e47(%rip)     # 0x38846
je 0x27a3d
leaq 0x1096c(%rip), %rax     # 0x38374
cmpl $0x0, (%rax)
je 0x27a3b
movq 0x105b4(%rip), %rdi     # 0x37fc8
leaq 0x48bd(%rip), %rsi      # 0x2c2d8
callq 0x31c0
movq %rax, %rdi
leaq -0xe79a(%rip), %rsi     # 0x19290
callq 0x30a0
movq %rax, %rdi
movq -0x10(%rbp), %rsi
callq 0x3070
jmp 0x27a3d
movl 0x10ac9(%rip), %eax     # 0x3850c
movq %rax, -0x50(%rbp)
subq $0x7, %rax
ja 0x28486
movq -0x50(%rbp), %rax
leaq 0x464c(%rip), %rcx      # 0x2c0a8
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movq -0x48(%rbp), %rax
movq -0x10(%rbp), %rdx
movl 0x19c(%rax), %ecx
addl 0x1a0(%rax), %ecx
movl %ecx, %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x178(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x180(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
movl 0x1a0(%rax), %esi
subl 0x198(%rax), %esi
subl %esi, %ecx
movl %ecx, %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
movl 0x1a0(%rax), %esi
subl 0x198(%rax), %esi
subl %esi, %ecx
movl %ecx, %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x184(%rax)
movl 0x184(%rax), %edx
movl 0x1a0(%rax), %ecx
subl 0x198(%rax), %ecx
shll %cl, %edx
movl %edx, %ecx
movl %ecx, 0x184(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x17c(%rax)
jmp 0x284fb
movq -0x48(%rbp), %rax
movq -0x10(%rbp), %rdx
movl 0x19c(%rax), %ecx
addl 0x1a0(%rax), %ecx
movl %ecx, %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x17c(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x178(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x180(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
movl 0x1a0(%rax), %esi
subl 0x198(%rax), %esi
subl %esi, %ecx
movl %ecx, %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
movl 0x1a0(%rax), %esi
subl 0x198(%rax), %esi
subl %esi, %ecx
movl %ecx, %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x184(%rax)
movl 0x184(%rax), %edx
movl 0x1a0(%rax), %ecx
subl 0x198(%rax), %ecx
shll %cl, %edx
movl %edx, %ecx
movl %ecx, 0x184(%rax)
jmp 0x284fb
movq -0x48(%rbp), %rax
movq -0x10(%rbp), %rdx
movl 0x19c(%rax), %ecx
addl 0x1a0(%rax), %ecx
movl %ecx, %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
movl 0x1a0(%rax), %esi
subl 0x198(%rax), %esi
subl %esi, %ecx
movl %ecx, %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
movl 0x1a0(%rax), %esi
subl 0x198(%rax), %esi
subl %esi, %ecx
movl %ecx, %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x184(%rax)
movl 0x184(%rax), %edx
movl 0x1a0(%rax), %ecx
subl 0x198(%rax), %ecx
shll %cl, %edx
movl %edx, %ecx
movl %ecx, 0x184(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x180(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x17c(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x178(%rax)
jmp 0x284fb
movq -0x48(%rbp), %rax
movq -0x10(%rbp), %rdx
movl 0x198(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x184(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x178(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x17c(%rax)
movq -0x10(%rbp), %rdx
movl 0x19c(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x180(%rax)
jmp 0x284fb
movq -0x48(%rbp), %rax
movq -0x10(%rbp), %rdx
movl 0x198(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x184(%rax)
movq -0x10(%rbp), %rdx
movl 0x19c(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x178(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x17c(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x180(%rax)
jmp 0x284fb
movq -0x48(%rbp), %rax
movq -0x10(%rbp), %rdx
movl 0x19c(%rax), %ecx
addl 0x1a0(%rax), %ecx
movl %ecx, %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
movl 0x1a0(%rax), %esi
subl 0x198(%rax), %esi
subl %esi, %ecx
movl %ecx, %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
movl 0x1a0(%rax), %esi
subl 0x198(%rax), %esi
subl %esi, %ecx
movl %ecx, %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x184(%rax)
movl 0x184(%rax), %edx
movl 0x1a0(%rax), %ecx
subl 0x198(%rax), %ecx
shll %cl, %edx
movl %edx, %ecx
movl %ecx, 0x184(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x178(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x17c(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x180(%rax)
jmp 0x284fb
movq -0x48(%rbp), %rax
movq -0x10(%rbp), %rdx
movl 0x19c(%rax), %ecx
addl 0x1a0(%rax), %ecx
movl %ecx, %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x178(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x17c(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
movl 0x1a0(%rax), %esi
subl 0x198(%rax), %esi
subl %esi, %ecx
movl %ecx, %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
movl 0x1a0(%rax), %esi
subl 0x198(%rax), %esi
subl %esi, %ecx
movl %ecx, %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x184(%rax)
movl 0x184(%rax), %edx
movl 0x1a0(%rax), %ecx
subl 0x198(%rax), %ecx
shll %cl, %edx
movl %edx, %ecx
movl %ecx, 0x184(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x180(%rax)
jmp 0x284fb
movq -0x48(%rbp), %rax
movq -0x10(%rbp), %rdx
movl 0x198(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x194(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x184(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x188(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x178(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x18c(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x17c(%rax)
movq -0x10(%rbp), %rcx
movq %rcx, -0x38(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shrq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x10(%rbp)
movq -0x10(%rbp), %rdx
movl 0x190(%rax), %ecx
shlq %cl, %rdx
movq %rdx, %rcx
movq %rcx, -0x40(%rbp)
movq -0x38(%rbp), %rcx
xorq -0x40(%rbp), %rcx
movl %ecx, 0x180(%rax)
jmp 0x284fb
movq 0xfb63(%rip), %rdi      # 0x37ff0
leaq 0x1c7c(%rip), %rsi      # 0x2a110
callq 0x31c0
movq %rax, %rdi
leaq 0x3ca7(%rip), %rsi      # 0x2c14a
callq 0x31c0
movq %rax, %rdi
leaq 0x1c07(%rip), %rsi      # 0x2a0b9
callq 0x31c0
movq %rax, %rdi
movl $0x3bb, %esi            # imm = 0x3BB
callq 0x3380
movq %rax, %rdi
leaq 0x1c53(%rip), %rsi      # 0x2a121
callq 0x31c0
movq %rax, %rdi
leaq 0x2224(%rip), %rsi      # 0x2a701
callq 0x31c0
movq %rax, %rdi
movq 0xfabc(%rip), %rsi      # 0x37fa8
callq 0x3200
movl $0x1, %edi
callq 0x3270
testb $0x1, 0x10344(%rip)     # 0x38846
je 0x285cf
leaq 0xfe65(%rip), %rax      # 0x38374
cmpl $0x0, (%rax)
je 0x285cd
movq 0xfaa9(%rip), %rdi      # 0x37fc8
leaq 0x3dc4(%rip), %rsi      # 0x2c2ea
callq 0x31c0
movq %rax, %rdi
leaq -0xf2a5(%rip), %rsi     # 0x19290
callq 0x30a0
movq %rax, %rdi
movq -0x48(%rbp), %rax
movl 0x178(%rax), %esi
callq 0x32d0
movq %rax, %rdi
leaq 0x3d9c(%rip), %rsi      # 0x2c2f2
callq 0x31c0
movq %rax, %rdi
movq -0x48(%rbp), %rax
movl 0x17c(%rax), %esi
callq 0x32d0
movq %rax, %rdi
leaq 0x3d80(%rip), %rsi      # 0x2c2f7
callq 0x31c0
movq %rax, %rdi
movq -0x48(%rbp), %rax
movl 0x180(%rax), %esi
callq 0x32d0
movq %rax, %rdi
leaq 0x3d64(%rip), %rsi      # 0x2c2fc
callq 0x31c0
movq %rax, %rdi
movq -0x48(%rbp), %rax
movl 0x184(%rax), %esi
callq 0x32d0
movq %rax, %rdi
leaq -0xf2f9(%rip), %rsi     # 0x192c0
callq 0x30a0
movq %rax, %rdi
movq 0xf9e0(%rip), %rsi      # 0x37fa8
callq 0x3200
jmp 0x285cf
addq $0x50, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)