// File: /workspace/github_c_makefile_star2_O2/markdryan[P]subtilis/arch/arm32/arm_encode.c
// Function: prv_encode_vfp_tran_dbl_instr
static void prv_encode_vfp_tran_dbl_instr(void *user_data,
					  subtilis_arm_op_t *op,
					  subtilis_arm_instr_type_t type,
					  subtilis_vfp_tran_dbl_instr_t *instr,
					  subtilis_error_t *err)
{
	uint32_t word;
	subtilis_arm_encode_ud_t *ud = user_data;

	prv_check_pool(ud, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;

	switch (type) {
	case SUBTILIS_VFP_INSTR_FMDRR:
		word = 0xc400b10;
		word |= instr->dest1 & 0xf;
		word |= (instr->src1 & 0xf) << 12;
		word |= (instr->src2 & 0xf) << 16;
		break;
	case SUBTILIS_VFP_INSTR_FMRRD:
		word = 0xc500b10;
		word |= instr->src1 & 0xf;
		word |= (instr->dest1 & 0xf) << 12;
		word |= (instr->dest2 & 0xf) << 16;
		break;
	case SUBTILIS_VFP_INSTR_FMSRR:
		if (instr->dest1 + 1 != instr->dest2) {
			subtilis_error_set_assertion_failed(err);
			return;
		}
		word = 0xc400a10;
		word |= (instr->dest1 >> 1) & 0xf;
		word |= (instr->dest1 & 1) << 5;
		word |= (instr->src1 & 0xf) << 12;
		word |= (instr->src2 & 0xf) << 16;
		break;
	case SUBTILIS_VFP_INSTR_FMRRS:
		if (instr->src1 + 1 != instr->src2) {
			subtilis_error_set_assertion_failed(err);
			return;
		}
		word = 0xc500a10;
		word |= (instr->src1 >> 1) & 0xf;
		word |= (instr->src1 & 1) << 5;
		word |= (instr->dest1 & 0xf) << 12;
		word |= (instr->dest2 & 0xf) << 16;
		break;
	default:
		subtilis_error_set_assertion_failed(err);
		return;
	}

	word |= instr->ccode << 28;

	prv_ensure_code(ud, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;

	prv_add_word(ud, word, err);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %r8, %rbx
movq %rcx, %r15
movl %edx, %r12d
movq %rdi, %r14
movq %r8, %rsi
callq 0x55e87
cmpl $0x0, (%rbx)
je 0x5517b
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
addl $-0x7d, %r12d
cmpl $0x3, %r12d
ja 0x55299
leaq 0x1aac8(%rip), %rax     # 0x6fc58
movslq (%rax,%r12,4), %rcx
addq %rax, %rcx
jmpq *%rcx
movq 0x8(%r15), %rax
andl $0xf, %eax
movl 0x18(%r15), %ecx
shll $0xc, %ecx
movzwl %cx, %r12d
orq %rax, %r12
movl $0xc400b10, 0x4(%rsp)   # imm = 0xC400B10
jmp 0x551ef
movq 0x8(%r15), %rax
leaq 0x1(%rax), %rcx
cmpq 0x10(%r15), %rcx
jne 0x552ad
movl %eax, %ecx
shrl %ecx
andl $0xf, %ecx
shll $0x5, %eax
andl $0x20, %eax
orl %ecx, %eax
movl 0x18(%r15), %ecx
shll $0xc, %ecx
movzwl %cx, %r12d
orl %eax, %r12d
movl $0xc400a10, 0x4(%rsp)   # imm = 0xC400A10
pushq $0x20
jmp 0x5524b
movq 0x18(%r15), %rax
leaq 0x1(%rax), %rcx
cmpq 0x20(%r15), %rcx
jne 0x552c1
movl %eax, %ecx
shrl %ecx
andl $0xf, %ecx
shll $0x5, %eax
andl $0x20, %eax
orl %ecx, %eax
movl 0x8(%r15), %ecx
shll $0xc, %ecx
movzwl %cx, %r12d
orl %eax, %r12d
movl $0xc500a10, 0x4(%rsp)   # imm = 0xC500A10
jmp 0x55249
movq 0x18(%r15), %rax
andl $0xf, %eax
movl 0x8(%r15), %ecx
shll $0xc, %ecx
movzwl %cx, %r12d
orq %rax, %r12
movl $0xc500b10, 0x4(%rsp)   # imm = 0xC500B10
pushq $0x10
popq %rax
movq (%r15,%rax), %r13
movl (%r15), %ebp
movq %r14, %rdi
movq %rbx, %rsi
callq 0x55e8e
cmpl $0x0, (%rbx)
jne 0x5516c
andl $0xf, %r13d
shll $0x10, %r13d
orl %r13d, %r12d
movl 0x4(%rsp), %eax
orl %r12d, %eax
shll $0x1c, %ebp
orl %eax, %ebp
movq %r14, %rdi
movl %ebp, %esi
movq %rbx, %rdx
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x55e99
leaq 0x1ab50(%rip), %rdx     # 0x6fdf0
pushq $0xf
popq %rsi
movq %rbx, %rdi
movl $0x6fd, %ecx            # imm = 0x6FD
jmp 0x552d3
leaq 0x1ab3c(%rip), %rdx     # 0x6fdf0
pushq $0xf
popq %rsi
movq %rbx, %rdi
movl $0x6e8, %ecx            # imm = 0x6E8
jmp 0x552d3
leaq 0x1ab28(%rip), %rdx     # 0x6fdf0
pushq $0xf
popq %rsi
movq %rbx, %rdi
movl $0x6f3, %ecx            # imm = 0x6F3
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x1429e