// File: /workspace/github_cpp_makefile_star2_O1/akshayrajput[P]ARMV8_Simulator/./instructions.cpp
// Function: ADD(int, int, int, int, int)
void ADD(int sf, int sw,int RD,int RN,int immRM)
{
	
	//ADD stub
	printf("[log] - add instructions\n");

	assert(RD >= 0 && RD <= 31);
	assert(RN >= 0 && RN <= 31);
	
	//TODO - Add shifted operands also
	if(sf == 1 && sw == 0)
	{
		printf("[log] - adding 64 bit immediate\n");
		uint64_t result = R[RN].getData() + immRM ;
		
		if(result < R[RN].getData() )
		{
			printf("Addition overflow!!\n");
			return;
		}

		R[RD].setData(result);

	}
	else if(sf == 0 && sw == 0)
	{
		printf("[log] - adding 32 bit immediate\n");
		uint32_t result = R[RN].getLowerData() + immRM ;
		
		if(result < R[RN].getLowerData() )
		{
			printf("Addition overflow!!\n");
			return;
		}

		R[RD].setLowerData(result);

	}
	else if(sf == 1 && sw == 1)
	{
		printf("[log] - adding 64 bit register\n");
		assert(immRM >= 0 && immRM <= 31);
		uint64_t result = R[RN].getData() + R[immRM].getData() ;
		
		if(result < R[RN].getData() )
		{
			printf("Addition overflow!!\n");
			return;
		}

		R[RD].setData(result);

	}
	else if(sf == 0 && sw == 1)
	{
		printf("[log] - adding 32 bit register\n");
		assert(immRM >= 0 && immRM <= 31);
		uint32_t result = R[RN].getLowerData() + R[immRM].getData() ;
		
		if(result < R[RN].getLowerData() )
		{
			printf("Addition overflow!!\n");
			return;
		}

		R[RD].setLowerData(result);

	}
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %r8d, %ebp
movl %ecx, %r14d
movl %edx, %ebx
movl %esi, %r15d
movl %edi, %r12d
leaq 0x4d5e(%rip), %rdi      # 0x63b0
callq 0x1140
cmpl $0x20, %ebx
jae 0x1843
cmpl $0x20, %r14d
jae 0x1862
movl %r12d, %eax
xorl $0x1, %eax
movl %eax, %ecx
orl %r15d, %ecx
jne 0x16bb
leaq 0x4da9(%rip), %rdi      # 0x6427
callq 0x1140
movl %r14d, %eax
leaq 0x8a63(%rip), %r12      # 0xa0f0
leaq (%r12,%rax,8), %r15
movq %r15, %rdi
callq 0x5c86
movslq %ebp, %r14
addq %rax, %r14
movq %r15, %rdi
callq 0x5c86
cmpq %rax, %r14
jb 0x17f7
movl %ebx, %eax
leaq (%r12,%rax,8), %rdi
jmp 0x173f
movl %r15d, %ecx
orl %r12d, %ecx
je 0x1755
xorl $0x1, %r15d
orl %r15d, %eax
jne 0x1798
leaq 0x4d0d(%rip), %rdi      # 0x63e8
callq 0x1140
cmpl $0x20, %ebp
jae 0x1881
movl %r14d, %eax
leaq 0x89fd(%rip), %r13      # 0xa0f0
leaq (,%rax,8), %r15
addq %r13, %r15
movq %r15, %rdi
callq 0x5c86
movq %rax, %r12
movl %ebp, %eax
leaq (,%rax,8), %rdi
addq %r13, %rdi
callq 0x5c86
movq %rax, %r14
addq %r12, %r14
movq %r15, %rdi
callq 0x5c86
cmpq %rax, %r14
jb 0x17f7
movl %ebx, %eax
leaq (,%rax,8), %rdi
addq %r13, %rdi
movq %r14, %rsi
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x5c8e
leaq 0x4cab(%rip), %rdi      # 0x6407
callq 0x1140
movl %r14d, %eax
leaq 0x8985(%rip), %r12      # 0xa0f0
leaq (%r12,%rax,8), %r15
movq %r15, %rdi
callq 0x5c8a
movl %eax, %r14d
addl %ebp, %r14d
movq %r15, %rdi
callq 0x5c8a
cmpl %eax, %r14d
jb 0x17f7
movl %ebx, %eax
leaq (%r12,%rax,8), %rdi
movl %r14d, %esi
jmp 0x1830
orl %r15d, %r12d
jne 0x1811
leaq 0x4c25(%rip), %rdi      # 0x63c9
callq 0x1140
cmpl $0x20, %ebp
jae 0x18a0
movl %r14d, %eax
leaq 0x8934(%rip), %r13      # 0xa0f0
leaq (,%rax,8), %r15
addq %r13, %r15
movq %r15, %rdi
callq 0x5c8a
movl %eax, %r12d
movl %ebp, %eax
leaq (,%rax,8), %rdi
addq %r13, %rdi
callq 0x5c86
movq %rax, %r14
addl %r12d, %r14d
movq %r15, %rdi
callq 0x5c8a
cmpl %eax, %r14d
jae 0x1820
leaq 0x4c49(%rip), %rdi      # 0x6447
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x1140
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movl %ebx, %eax
leaq (,%rax,8), %rdi
addq %r13, %rdi
movl %r14d, %esi
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x5c94
leaq 0x48bc(%rip), %rdi      # 0x6106
leaq 0x483e(%rip), %rsi      # 0x608f
leaq 0x48c2(%rip), %rcx      # 0x611a
movl $0x97, %edx
callq 0x1080
leaq 0x48d3(%rip), %rdi      # 0x613c
leaq 0x481f(%rip), %rsi      # 0x608f
leaq 0x48a3(%rip), %rcx      # 0x611a
movl $0x98, %edx
callq 0x1080
leaq 0x48c8(%rip), %rdi      # 0x6150
leaq 0x4800(%rip), %rsi      # 0x608f
leaq 0x4884(%rip), %rcx      # 0x611a
movl $0xba, %edx
callq 0x1080
leaq 0x48a9(%rip), %rdi      # 0x6150
leaq 0x47e1(%rip), %rsi      # 0x608f
leaq 0x4865(%rip), %rcx      # 0x611a
movl $0xc9, %edx
callq 0x1080