// File: /workspace/github_cpp_makefile_star2_O2/sopanpatra160[P]OOO_Superscalar_Processor_Simulator/main.cc
// Function: Execute(cache*, cache*, cache*)
void Execute(cache *l1,cache *l2,cache *v)
{

	vector <unsigned int> delete_inst_tag_list;
	for (vector<instruction>::iterator it = execute_list.begin() ; it != execute_list.end(); ++it)
        {

		if(it->operation_type == 2 && l1size !=0)
		{
			if(it->mem_latency == 0)
			{
				l1->read(it->mem_addr);
				if ((l1->hit  ==	1) && (l2size != 0) )			it->mem_latency = 5;
				if ((l1->miss ==	1) && (l2->hit == 1) && (l2size != 0))	it->mem_latency = 10;
				if ((l1->miss ==	1) && (l2->miss== 1) && (l2size != 0)) 	it->mem_latency = 20;
				if ((l1->hit  == 1) && (l2size == 0) )			it->mem_latency = 5;
				if ((l1->miss == 1) && (l2size == 0) )                   it->mem_latency = 20;
				
				it->ex_latency ++;
			}
			else
			{
				if(it->ex_latency == it->mem_latency)
				{				
					it->state=WB;
					it->ex_duration = cycles - it->ex_begin_cycle;
					it->wb_begin_cycle = cycles;
					it->wb_duration = 1;
					
					for(vector<instruction>::iterator it1 = fake_rob.begin() ; it1 != fake_rob.end(); ++it1)
					{
						//printf("Here2 ! \n");
						if(it1->tag == it->tag)
						{
								
							*it1 = *it;
						}
					}		
					
					if(it->dest_regno != -1)
					{
						for(vector<instruction>::iterator it2 = issue_list.begin() ; it2 != issue_list.end(); ++it2)
                        			{
							//printf("Here3 ! \n");
                        				if(it2->src1_regno_new ==  it->tag)
							{
								it2->src1_ready = 1;
							}
							if(it2->src2_regno_new ==  it->tag)
                        			        {
								it2->src2_ready = 1;
                        			        }

						}
						if(it->tag == new_name[it->dest_regno])
						{
							rdy[it->dest_regno]=1;
							new_name[it->dest_regno] = it->dest_regno;
						}
					}
					
					//execute_list.erase(it);
					delete_inst_tag_list.push_back(it->tag);
				}
				
				else
				{
						//printf("Here:1\t%d\n", it->tag);
						it->ex_latency++;
				}
			}
		}

		else
		{
			if(	(it->operation_type == 0 && it->ex_latency == 1) || 
				(it->operation_type == 1 && it->ex_latency == 2) || 
				(it->operation_type == 2 && it->ex_latency ==5)
			)

			{
				//printf("Here1 ! \n");
				it->state=WB;
				it->ex_duration = cycles - it->ex_begin_cycle;
				it->wb_begin_cycle = cycles;
				it->wb_duration = 1;
				
				for(vector<instruction>::iterator it1 = fake_rob.begin() ; it1 != fake_rob.end(); ++it1)
				{
				//printf("Here2 ! \n");
					if(it1->tag == it->tag)
					{
							
						*it1 = *it;
					}
				}		
				
				if(it->dest_regno != -1)
				{
					for(vector<instruction>::iterator it2 = issue_list.begin() ; it2 != issue_list.end(); ++it2)
                	        	{
				//printf("Here3 ! \n");
                	        		if(it2->src1_regno_new ==  it->tag)
						{
							it2->src1_ready = 1;
						}
						if(it2->src2_regno_new ==  it->tag)
                	        	        {
							it2->src2_ready = 1;
                	        	        }

					}
					if(it->tag == new_name[it->dest_regno])
					{
						rdy[it->dest_regno]=1;
						new_name[it->dest_regno] = it->dest_regno;
					}
				}
				
				//execute_list.erase(it);
				delete_inst_tag_list.push_back(it->tag);
			}
			else
			{
				//printf("Here:1\t%d\n", it->tag);
				it->ex_latency++;
			}
        	}

	}

	for (unsigned int i = 0; i < delete_inst_tag_list.size(); i++) {
		for (unsigned int j = 0; j < execute_list.size(); j++) {
			if (execute_list[j].tag == delete_inst_tag_list[i]) {
				execute_list.erase(execute_list.begin() + j);

			}
		}
	}


}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rsi, %r14
movq %rdi, %r15
movq %rsp, %r12
andq $0x0, 0x10(%r12)
xorps %xmm0, %xmm0
movaps %xmm0, (%r12)
movq 0x49eb(%rip), %rbx      # 0x73e8
leaq 0x46fc(%rip), %rbp      # 0x7100
pushq $0x16
popq %r13
cmpq 0x49e1(%rip), %rbx      # 0x73f0
je 0x2c6f
movl (%rbx), %ecx
cmpl $0x2, %ecx
jne 0x2a8d
cmpl $0x0, 0x4969(%rip)      # 0x738c
je 0x2a8d
movl 0x48(%rbx), %ecx
testl %ecx, %ecx
je 0x2b37
movl 0x44(%rbx), %eax
cmpl %ecx, %eax
jne 0x2bf1
movl $0x4, 0x4c(%rbx)
movl 0x46b0(%rip), %eax      # 0x70f8
movl %eax, %ecx
subl 0x34(%rbx), %ecx
movl %ecx, 0x38(%rbx)
movl %eax, 0x3c(%rbx)
movl $0x1, 0x40(%rbx)
movq 0x493f(%rip), %rdx      # 0x73a0
movq 0x4940(%rip), %r8       # 0x73a8
leaq 0x50(%rbx), %rax
cmpq %r8, %rdx
je 0x2c0d
movl 0x50(%rdx), %ecx
cmpl (%rax), %ecx
jne 0x2a87
movq %r13, %rcx
movq %rdx, %rdi
movq %rbx, %rsi
rep  movsl (%rsi), %es:(%rdi)
addq $0x58, %rdx
jmp 0x2a6c
movl 0x44(%rbx), %eax
cmpl $0x1, %ecx
je 0x2be8
testl %ecx, %ecx
jne 0x2bfb
cmpl $0x1, %eax
jne 0x2bf1
movl $0x4, 0x4c(%rbx)
movl 0x4641(%rip), %eax      # 0x70f8
movl %eax, %ecx
subl 0x34(%rbx), %ecx
movl %ecx, 0x38(%rbx)
movl %eax, 0x3c(%rbx)
movl $0x1, 0x40(%rbx)
movq 0x48d0(%rip), %rdx      # 0x73a0
movq 0x48d1(%rip), %r8       # 0x73a8
leaq 0x50(%rbx), %rax
cmpq %r8, %rdx
je 0x2af8
movl 0x50(%rdx), %ecx
cmpl (%rax), %ecx
jne 0x2af2
movq %r13, %rcx
movq %rdx, %rdi
movq %rbx, %rsi
rep  movsl (%rsi), %es:(%rdi)
addq $0x58, %rdx
jmp 0x2adb
movslq 0x8(%rbx), %rcx
cmpq $-0x1, %rcx
je 0x2c5b
movq 0x48c3(%rip), %rdx      # 0x73d0
movq 0x48c4(%rip), %rsi      # 0x73d8
cmpq %rsi, %rdx
je 0x2c44
movl (%rax), %edi
cmpl %edi, 0x14(%rdx)
jne 0x2b28
movb $0x1, 0x4(%rdx)
cmpl %edi, 0x18(%rdx)
jne 0x2b31
movb $0x1, 0x5(%rdx)
addq $0x58, %rdx
jmp 0x2b14
movl 0x54(%rbx), %esi
movq %r15, %rdi
callq 0x165c
movl 0x9c(%r15), %eax
cmpl $0x1, %eax
sete %dl
movl 0x483f(%rip), %ecx      # 0x7394
testl %ecx, %ecx
setne %sil
andb %dl, %sil
cmpb $0x1, %sil
jne 0x2b6b
movl $0x5, 0x48(%rbx)
movl 0xa0(%r15), %edx
cmpl $0x1, %edx
jne 0x2bb3
testl %ecx, %ecx
setne %sil
cmpl $0x1, 0x9c(%r14)
sete %dil
andb %sil, %dil
cmpb $0x1, %dil
jne 0x2b99
movl $0xa, 0x48(%rbx)
testl %ecx, %ecx
setne %dil
cmpl $0x1, 0xa0(%r14)
sete %r8b
pushq $0x14
popq %rsi
testb %dil, %r8b
jne 0x2bdc
cmpl $0x1, %edx
sete %dl
xorl %edi, %edi
testl %ecx, %ecx
sete %dil
andb %dil, %dl
pushq $0x5
popq %rsi
pushq $0x14
popq %rcx
cmovnel %ecx, %esi
cmpl $0x1, %eax
movzbl %dl, %eax
cmovnel %eax, %edi
cmpb $0x1, %dil
jne 0x2bdf
movl %esi, 0x48(%rbx)
leaq 0x44(%rbx), %rcx
movl 0x44(%rbx), %eax
jmp 0x2bf5
cmpl $0x2, %eax
je 0x2aaa
leaq 0x44(%rbx), %rcx
incl %eax
movl %eax, (%rcx)
jmp 0x2c66
xorl $0x2, %ecx
movl %eax, %edx
xorl $0x5, %edx
orl %ecx, %edx
je 0x2aaa
jmp 0x2bf1
movslq 0x8(%rbx), %rcx
cmpq $-0x1, %rcx
je 0x2c5b
movq 0x47b2(%rip), %rdx      # 0x73d0
movq 0x47b3(%rip), %rsi      # 0x73d8
cmpq %rsi, %rdx
je 0x2c44
movl (%rax), %edi
cmpl %edi, 0x14(%rdx)
jne 0x2c35
movb $0x1, 0x4(%rdx)
cmpl %edi, 0x18(%rdx)
jne 0x2c3e
movb $0x1, 0x5(%rdx)
addq $0x58, %rdx
jmp 0x2c25
movl (%rax), %edx
cmpl (%rbp,%rcx,4), %edx
jne 0x2c5b
leaq 0x46ad(%rip), %rdx      # 0x7300
movb $0x1, (%rcx,%rdx)
movl %ecx, (%rbp,%rcx,4)
movq %r12, %rdi
movq %rax, %rsi
callq 0x321c
addq $0x58, %rbx
jmp 0x2a08
xorl %r15d, %r15d
pushq $0x58
popq %r12
leaq 0x476b(%rip), %r14      # 0x73e8
movl %r15d, %r15d
movq 0x8(%rsp), %rax
subq (%rsp), %rax
sarq $0x2, %rax
cmpq %r15, %rax
jbe 0x2cdd
xorl %r13d, %r13d
movl %r13d, %r13d
movq 0x4749(%rip), %rsi      # 0x73e8
movq %rbx, %rax
subq %rsi, %rax
cqto
idivq %r12
cmpq %r13, %rax
jbe 0x2cd8
imulq $0x58, %r13, %rax
movl 0x50(%rsi,%rax), %ecx
movq (%rsp), %rdx
cmpl (%rdx,%r15,4), %ecx
jne 0x2cd3
addq %rax, %rsi
movq %r14, %rdi
callq 0x31e2
movq 0x471d(%rip), %rbx      # 0x73f0
incl %r13d
jmp 0x2c95
incl %r15d
jmp 0x2c7d
movq %rsp, %rdi
callq 0x33e4
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
jmp 0x2cf6
movq %rax, %rbx
movq %rsp, %rdi
callq 0x33e4
movq %rbx, %rdi
callq 0x1150