// File: /workspace/github_c_makefile_star2_O0/xiane[P]libvphevcodec/AML_HEVCEncoder.cpp
// Function: Wave4VpuEncRegisterFrame(AMVHEVCEncHandle_s*, int)
AMVEnc_Status Wave4VpuEncRegisterFrame(AMVHEVCEncHandle *Handle, int alloc) {
    //Uint32 addr_report_buf = 0;    // [31:0]
    //Uint32 report_buf_size = 0;    // [31:0]
    //unsigned char report_endian = 0;    // [ 3:0]
    //Uint32 use_sec_axi = 0;    // [31:0]
    //Uint32 sec_axi_buf_size = 0x00012800;   // 74KB
    Uint32 temp;   // [31:0]
    Uint32 rd_ptr, wr_ptr, src_num, fb_num, i;   // [31:0
    Uint32 src_stride;
    Uint32 luma_stride, chroma_stride;
    Uint32 size_src_luma, size_src_chroma;
    Uint32 fb_width, fb_height, fb_stride;
    Uint32 fbc_luma_stride, fbc_chroma_stride;
    Uint32 size_fbc_luma, size_fbc_chroma;
    Uint32 size_fbc_luma_offset, size_fbc_chroma_offset;
    Uint32 size_mv_col, size_s2;

    Uint32 src_fb_addr[4][3];
    //Uint32 s2_addr;
    Uint32 fbc_fb_addr[32][4];

    Uint32 fb_set_start, fb_set_end;
    Uint32 fb_start_idx, fb_end_idx;
    //Uint32 addr_fb_arr[32];
    //Uint32 addr_mv_arr[8];
    rd_ptr = VpuReadReg(Handle->instance_id, W4_BS_RD_PTR);
    wr_ptr = VpuReadReg(Handle->instance_id, W4_BS_WR_PTR);

    src_num = VpuReadReg(Handle->instance_id, W4_RET_ENC_MIN_SRC_BUF_NUM);
    fb_num = VpuReadReg(Handle->instance_id, W4_RET_ENC_MIN_FB_NUM);
    VLOG(DEBUG, "Wave4VpuEncRegisterFrame, rd:0x%x, wr:0x%x, src:%d, fb:%d\n", rd_ptr, wr_ptr, src_num, fb_num);
    if (src_num > 4)
        src_num = 4;
    if (fb_num > 4)
        fb_num = 4;
    Handle->src_num = src_num;
    Handle->fb_num = fb_num;

    if (alloc) {
        memset((void*) &Handle->src_pics[i], 0, sizeof(hevc_picture_t));
        for (i = 0; i < 4; i++) {
            memset((void*) &Handle->src_pics[i].vb, 0, sizeof(vpu_buffer_t));
            memset((void*) &Handle->fb_vb[i], 0, sizeof(vpu_buffer_t));
        }
        memset((void*) &Handle->fbc_ltable_vb, 0, sizeof(vpu_buffer_t));
        memset((void*) &Handle->fbc_ctable_vb, 0, sizeof(vpu_buffer_t));
        memset((void*) &Handle->fbc_mv_vb, 0, sizeof(vpu_buffer_t));
        memset((void*) &Handle->subsample_vb, 0, sizeof(vpu_buffer_t));
    }

    src_stride = wave420l_align32(Handle->enc_width);
    luma_stride = (src_format & 0x4) ? src_stride * 2 : src_stride;
    chroma_stride = src_stride;

    // set frame buffers

    // calculate required buffer size
    size_src_luma = luma_stride * wave420l_align32(Handle->enc_height);

    size_src_chroma = luma_stride * (wave420l_align16(Handle->enc_height) / 2);

    fb_width = wave420l_align32(Handle->enc_width);
    fb_height = wave420l_align8(Handle->enc_height);
    fb_stride = src_stride;

    // bit-depth = 8
    fbc_luma_stride = wave420l_align32(wave420l_align16(fb_width&0x3fff)*4);
    fbc_chroma_stride = wave420l_align32(wave420l_align16((fb_width>>1)&0x1fff)*4);

    size_fbc_luma = fbc_luma_stride * (fb_height / 4);
    size_fbc_chroma = fbc_chroma_stride * (fb_height / 4);
    size_fbc_luma_offset = wave420l_align256(fb_width ) * wave420l_align16(fb_height) / 32;
    size_fbc_luma_offset = wave420l_align16(size_fbc_luma_offset);
    size_fbc_chroma_offset = wave420l_align256(fb_width/2) * wave420l_align16(fb_height) / 32;
    size_fbc_chroma_offset = wave420l_align16(size_fbc_chroma_offset);

    size_mv_col = wave420l_align64(fb_width) * wave420l_align64(fb_height) / 16 + 64;
    size_mv_col = wave420l_align16(size_mv_col);
    size_s2 = wave420l_align16((fb_width>>2)&0xfff) * wave420l_align8((fb_height >> 2) & 0xfff);
    size_s2 = wave420l_align16(size_s2);
    for (i = 0; i < src_num; i++) {
        if (alloc) {
            memset((void*) &Handle->src_pics[i].vb, 0, sizeof(vpu_buffer_t));
            Handle->src_pics[i].vb.size = size_src_luma + size_src_chroma;
            Handle->src_pics[i].vb.size = ((Handle->src_pics[i].vb.size + 4095) & ~4095) + 4096;
            Handle->src_pics[i].vb.cached = 1;
            if (vdi_allocate_dma_memory(Handle->instance_id, &Handle->src_pics[i].vb) < 0) {
                VLOG(ERR, "Wave4VpuEncRegisterFrame  error Handle->src_pics.vb alloc\n");
                return AMVENC_MEMORY_FAIL;
            }
            vdi_clear_memory(Handle->instance_id, Handle->src_pics[i].vb.phys_addr, Handle->src_pics[i].vb.size);
        }
        src_fb_addr[i][0] = Handle->src_pics[i].vb.phys_addr;
        src_fb_addr[i][1] = Handle->src_pics[i].vb.phys_addr + size_src_luma;
        src_fb_addr[i][2] = 0;
    }

    for (i = 0; i < fb_num; i++) {
        if (alloc) {
            memset((void*) &Handle->fb_vb[i], 0, sizeof(vpu_buffer_t));
            Handle->fb_vb[i].size = size_fbc_luma + size_fbc_chroma;
            Handle->fb_vb[i].size = ((Handle->fb_vb[i].size + 4095) & ~4095) + 4096;
            if (vdi_allocate_dma_memory(Handle->instance_id, &Handle->fb_vb[i]) < 0) {
                VLOG(ERR, "Wave4VpuEncRegisterFrame  error Handle->fb_vb alloc\n");
                return AMVENC_MEMORY_FAIL;
            }
            vdi_clear_memory(Handle->instance_id, Handle->fb_vb[i].phys_addr, Handle->fb_vb[i].size);
        }
        fbc_fb_addr[i][0] = Handle->fb_vb[i].phys_addr;
        fbc_fb_addr[i][1] = Handle->fb_vb[i].phys_addr + size_fbc_luma;
        fbc_fb_addr[i][2] = 0;
    }

    if (alloc) {
        memset((void*) &Handle->fbc_ltable_vb, 0, sizeof(vpu_buffer_t));
        Handle->fbc_ltable_vb.size = ((size_fbc_luma_offset * fb_num + 4095) & ~4095) + 4096;
        if (vdi_allocate_dma_memory(Handle->instance_id, &Handle->fbc_ltable_vb) < 0) {
            VLOG(ERR, "Wave4VpuEncRegisterFrame  error Handle->fbc_ltable_vb alloc\n");
            return AMVENC_MEMORY_FAIL;
        }
        vdi_clear_memory(Handle->instance_id, Handle->fbc_ltable_vb.phys_addr, Handle->fbc_ltable_vb.size);

        memset((void*) &Handle->fbc_ctable_vb, 0, sizeof(vpu_buffer_t));
        Handle->fbc_ctable_vb.size = ((size_fbc_chroma_offset * fb_num + 4095) & ~4095) + 4096;
        if (vdi_allocate_dma_memory(Handle->instance_id, &Handle->fbc_ctable_vb) < 0) {
            VLOG(ERR, "Wave4VpuEncRegisterFrame  error Handle->fbc_ctable_vb alloc\n");
            return AMVENC_MEMORY_FAIL;
        }
        vdi_clear_memory(Handle->instance_id, Handle->fbc_ctable_vb.phys_addr, Handle->fbc_ctable_vb.size);

        memset((void*) &Handle->fbc_mv_vb, 0, sizeof(vpu_buffer_t));
        Handle->fbc_mv_vb.size = ((size_mv_col * fb_num + 4095) & ~4095) + 4096;
        if (vdi_allocate_dma_memory(Handle->instance_id, &Handle->fbc_mv_vb) < 0) {
            VLOG(ERR, "Wave4VpuEncRegisterFrame  error Handle->fbc_mv_vb alloc\n");
            return AMVENC_MEMORY_FAIL;
        }
        vdi_clear_memory(Handle->instance_id, Handle->fbc_mv_vb.phys_addr, Handle->fbc_mv_vb.size);

        memset((void*) &Handle->subsample_vb, 0, sizeof(vpu_buffer_t));
        Handle->subsample_vb.size = ((size_s2 + 4095) & ~4095) + 4096;
        if (vdi_allocate_dma_memory(Handle->instance_id, &Handle->subsample_vb) < 0) {
            VLOG(ERR, "Wave4VpuEncRegisterFrame  error Handle->subsample_vb alloc\n");
            return AMVENC_MEMORY_FAIL;
        }
        vdi_clear_memory(Handle->instance_id, Handle->subsample_vb.phys_addr, Handle->subsample_vb.size);
    }

    temp = 0;
    temp |= (0 << 24); // [27:24] codec_std_aux
    temp |= (1 << 16); // [23:16] codec_std
    temp |= (Handle->instance_id << 0);  // [15: 0] Handle->instance_id
    VpuWriteReg(Handle->instance_id, W4_INST_INDEX, temp);

    // Work Buffer Setting
    VpuWriteReg(Handle->instance_id, W4_ADDR_WORK_BASE, Handle->work_vb.phys_addr);
    VpuWriteReg(Handle->instance_id, W4_WORK_SIZE, Handle->work_vb.size);
    VpuWriteReg(Handle->instance_id, W4_WORK_PARAM, 0);

    fb_set_end = 1;
    fb_set_start = 1;
    fb_start_idx = 0;
    fb_end_idx = fb_num - 1;
    temp = 0;
    temp |= ((fbc_luma_stride & 0xffff) << 16); // [31:16] fbc_luma_stride
    temp |= ((fbc_chroma_stride & 0xffff) << 0);  // [15: 0] fbc_chroma_stride
    VpuWriteReg(Handle->instance_id, W4_FBC_STRIDE, temp);

    temp = 0;
    temp |= (0 << 30); // [   30] fbc_disable
    temp |= (0 << 29); // [   29] nv21_flag
    temp |= (0 << 28); // [   28] bwb_flag
    temp |= (0 << 24); // [27:24] axi_id
    temp |= ((0 & 0xf) << 20); // [23:20] bwb_format[3:0]
    temp |= (0 << 16); // [   16] cbcr_interlv
    temp |= ((fb_stride & 0xffff) << 0);  // [15: 0] fb_stride
    VpuWriteReg(Handle->instance_id, W4_COMMON_PIC_INFO, temp);

    temp = 0;
    temp |= (wave420l_align32(Handle->enc_width) << 16); // [31:16]
    temp |= (wave420l_align8(Handle->enc_height) << 0);  // [15: 0]
    VpuWriteReg(Handle->instance_id, W4_PIC_SIZE, temp);

    temp = 0;
    temp |= (0xc << 20); // [25:20] fbc_mode[5:0]
    temp |= (gol_endian << 16); // [19:16] fb_endian[3:0]
    temp |= (fb_set_end << 4);  // [    4] fb_set_end
    temp |= (fb_set_start << 3);  // [    3] fb_set_start
    VpuWriteReg(Handle->instance_id, W4_SFB_OPTION, temp);
    temp = 0;
    temp |= (fb_start_idx << 8);  // [12: 8]
    temp |= (fb_end_idx << 0);  // [ 4: 0]
    VpuWriteReg(Handle->instance_id, W4_SET_FB_NUM, temp);

    for (i = 0; i < fb_num; i++) {
        VpuWriteReg(Handle->instance_id, W4_ADDR_LUMA_BASE0 +(i*16), fbc_fb_addr[i][0]);
        VpuWriteReg(Handle->instance_id, W4_ADDR_CB_BASE0 +(i*16), fbc_fb_addr[i][1]);
        VpuWriteReg(Handle->instance_id, W4_ADDR_FBC_Y_OFFSET0 +(i*16), Handle->fbc_ltable_vb.phys_addr + size_fbc_luma_offset * i);
        VpuWriteReg(Handle->instance_id, W4_ADDR_FBC_C_OFFSET0 +(i*16), Handle->fbc_ctable_vb.phys_addr + size_fbc_chroma_offset * i);
        VpuWriteReg(Handle->instance_id, W4_ADDR_MV_COL0+(i*4), Handle->fbc_mv_vb.phys_addr + size_mv_col * i);
    }

    VpuWriteReg(Handle->instance_id, W4_ADDR_SUB_SAMPLED_FB_BASE, Handle->subsample_vb.phys_addr);
    VpuWriteReg(Handle->instance_id, W4_SUB_SAMPLED_ONE_FB_SIZE, size_s2);

    // issue command request
    VpuWriteReg(Handle->instance_id, W4_VPU_BUSY_STATUS, 1);
    VpuWriteReg(Handle->instance_id, W4_RET_SUCCESS, 0);  //for debug
    VpuWriteReg(Handle->instance_id, W4_CORE_INDEX, 0);
    VpuWriteReg(Handle->instance_id, W4_COMMAND, SET_FRAMEBUF);
    VpuWriteReg(Handle->instance_id, W4_VPU_HOST_INT_REQ, 1);
    temp = VpuReadReg(Handle->instance_id, W4_VPU_BUSY_STATUS);
    VLOG(DEBUG, "W4_VPU_BUSY_STATUS :0x%x\n", temp);
    if (vdi_wait_interrupt(Handle->instance_id, VPU_BUSY_CHECK_TIMEOUT) == -1) {
        VLOG(ERR, "Wave4VpuEncRegisterFrame error time out\n");
        return AMVENC_TIMEOUT;
    }

    if (VpuReadReg(Handle->instance_id, W4_RET_SUCCESS) == 0) {
        uint32_t reasonCode = VpuReadReg(Handle->instance_id, W4_RET_FAIL_REASON);
        VLOG(ERR, "Wave4VpuEncRegisterFrame failedREASON CODE(%08x)\n", reasonCode);
        return AMVENC_HARDWARE;
    }
    temp = VpuReadReg(Handle->instance_id, W4_RET_SUCCESS);
    VLOG(DEBUG, "W4_RET_SUCCESS %x\n", temp);
    rd_ptr = VpuReadReg(Handle->instance_id, W4_BS_RD_PTR);
    wr_ptr = VpuReadReg(Handle->instance_id, W4_BS_WR_PTR);
    wr_ptr = VpuReadReg(Handle->instance_id, W4_BS_WR_PTR);
    src_num = VpuReadReg(Handle->instance_id, W4_RET_ENC_MIN_SRC_BUF_NUM);
    fb_num = VpuReadReg(Handle->instance_id, W4_RET_ENC_MIN_FB_NUM);
    VLOG(DEBUG, "Wave4VpuEncRegisterFrame, rd:0x%x, wr:0x%x, src:%d, fb:%d\n", rd_ptr, wr_ptr, src_num, fb_num);
    VLOG(DEBUG, "Wave4VpuEncRegisterFrame- End\n");
    return AMVENC_SUCCESS;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x2c0, %rsp            # imm = 0x2C0
movq %rdi, -0x10(%rbp)
movl %esi, -0x14(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x130, %esi            # imm = 0x130
callq 0x2210
movl %eax, -0x1c(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x134, %esi            # imm = 0x134
callq 0x2210
movl %eax, -0x20(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x1d8, %esi            # imm = 0x1D8
callq 0x2210
movl %eax, -0x24(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x1cc, %esi            # imm = 0x1CC
callq 0x2210
movl %eax, -0x28(%rbp)
jmp 0x6750
cmpl $0x4, -0x24(%rbp)
jbe 0x675d
movl $0x4, -0x24(%rbp)
cmpl $0x4, -0x28(%rbp)
jbe 0x676a
movl $0x4, -0x28(%rbp)
movl -0x24(%rbp), %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x24(%rax)
movl -0x28(%rbp), %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x28(%rax)
cmpl $0x0, -0x14(%rbp)
je 0x6863
movq -0x10(%rbp), %rdi
addq $0xa0, %rdi
movl -0x2c(%rbp), %eax
imulq $0x50, %rax, %rax
addq %rax, %rdi
xorl %esi, %esi
movl $0x50, %edx
callq 0x20f0
movl $0x0, -0x2c(%rbp)
cmpl $0x4, -0x2c(%rbp)
jae 0x6807
movq -0x10(%rbp), %rdi
addq $0xa0, %rdi
movl -0x2c(%rbp), %eax
imulq $0x50, %rax, %rax
addq %rax, %rdi
addq $0x20, %rdi
xorl %esi, %esi
movl $0x20, %edx
callq 0x20f0
movq -0x10(%rbp), %rdi
addq $0x1e0, %rdi            # imm = 0x1E0
movl -0x2c(%rbp), %eax
shlq $0x5, %rax
addq %rax, %rdi
xorl %esi, %esi
movl $0x20, %edx
callq 0x20f0
movl -0x2c(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x2c(%rbp)
jmp 0x67b0
movq -0x10(%rbp), %rdi
addq $0x260, %rdi            # imm = 0x260
xorl %esi, %esi
movl $0x20, %edx
callq 0x20f0
movq -0x10(%rbp), %rdi
addq $0x280, %rdi            # imm = 0x280
xorl %esi, %esi
movl $0x20, %edx
callq 0x20f0
movq -0x10(%rbp), %rdi
addq $0x2a0, %rdi            # imm = 0x2A0
xorl %esi, %esi
movl $0x20, %edx
callq 0x20f0
movq -0x10(%rbp), %rdi
addq $0x2c0, %rdi            # imm = 0x2C0
xorl %esi, %esi
movl $0x20, %edx
callq 0x20f0
movq -0x10(%rbp), %rax
movl 0xc(%rax), %eax
addl $0x1f, %eax
shrl $0x5, %eax
shll $0x5, %eax
movl %eax, -0x30(%rbp)
movl 0x2c960(%rip), %eax     # 0x331dc
andl $0x4, %eax
cmpl $0x0, %eax
je 0x6891
movl -0x30(%rbp), %eax
shll %eax
movl %eax, -0x2b8(%rbp)
jmp 0x689a
movl -0x30(%rbp), %eax
movl %eax, -0x2b8(%rbp)
movl -0x2b8(%rbp), %eax
movl %eax, -0x34(%rbp)
movl -0x30(%rbp), %eax
movl %eax, -0x38(%rbp)
movl -0x34(%rbp), %eax
movq -0x10(%rbp), %rcx
movl 0x10(%rcx), %ecx
addl $0x1f, %ecx
shrl $0x5, %ecx
shll $0x5, %ecx
imull %ecx, %eax
movl %eax, -0x3c(%rbp)
movl -0x34(%rbp), %eax
movq -0x10(%rbp), %rcx
movl 0x10(%rcx), %ecx
addl $0xf, %ecx
shrl $0x4, %ecx
shll $0x4, %ecx
shrl %ecx
imull %ecx, %eax
movl %eax, -0x40(%rbp)
movq -0x10(%rbp), %rax
movl 0xc(%rax), %eax
addl $0x1f, %eax
shrl $0x5, %eax
shll $0x5, %eax
movl %eax, -0x44(%rbp)
movq -0x10(%rbp), %rax
movl 0x10(%rax), %eax
addl $0x7, %eax
shrl $0x3, %eax
shll $0x3, %eax
movl %eax, -0x48(%rbp)
movl -0x30(%rbp), %eax
movl %eax, -0x4c(%rbp)
movl -0x44(%rbp), %eax
andl $0x3fff, %eax           # imm = 0x3FFF
addl $0xf, %eax
shrl $0x4, %eax
shll $0x4, %eax
shll $0x2, %eax
addl $0x1f, %eax
shrl $0x5, %eax
shll $0x5, %eax
movl %eax, -0x50(%rbp)
movl -0x44(%rbp), %eax
shrl %eax
andl $0x1fff, %eax           # imm = 0x1FFF
addl $0xf, %eax
shrl $0x4, %eax
shll $0x4, %eax
shll $0x2, %eax
addl $0x1f, %eax
shrl $0x5, %eax
shll $0x5, %eax
movl %eax, -0x54(%rbp)
movl -0x50(%rbp), %eax
movl -0x48(%rbp), %ecx
shrl $0x2, %ecx
imull %ecx, %eax
movl %eax, -0x58(%rbp)
movl -0x54(%rbp), %eax
movl -0x48(%rbp), %ecx
shrl $0x2, %ecx
imull %ecx, %eax
movl %eax, -0x5c(%rbp)
movl -0x44(%rbp), %eax
addl $0xff, %eax
shrl $0x8, %eax
shll $0x8, %eax
movl -0x48(%rbp), %ecx
addl $0xf, %ecx
shrl $0x4, %ecx
shll $0x4, %ecx
imull %ecx, %eax
shrl $0x5, %eax
movl %eax, -0x60(%rbp)
movl -0x60(%rbp), %eax
addl $0xf, %eax
shrl $0x4, %eax
shll $0x4, %eax
movl %eax, -0x60(%rbp)
movl -0x44(%rbp), %eax
shrl %eax
addl $0xff, %eax
shrl $0x8, %eax
shll $0x8, %eax
movl -0x48(%rbp), %ecx
addl $0xf, %ecx
shrl $0x4, %ecx
shll $0x4, %ecx
imull %ecx, %eax
shrl $0x5, %eax
movl %eax, -0x64(%rbp)
movl -0x64(%rbp), %eax
addl $0xf, %eax
shrl $0x4, %eax
shll $0x4, %eax
movl %eax, -0x64(%rbp)
movl -0x44(%rbp), %eax
addl $0x3f, %eax
shrl $0x6, %eax
shll $0x6, %eax
movl -0x48(%rbp), %ecx
addl $0x3f, %ecx
shrl $0x6, %ecx
shll $0x6, %ecx
imull %ecx, %eax
shrl $0x4, %eax
addl $0x40, %eax
movl %eax, -0x68(%rbp)
movl -0x68(%rbp), %eax
addl $0xf, %eax
shrl $0x4, %eax
shll $0x4, %eax
movl %eax, -0x68(%rbp)
movl -0x44(%rbp), %eax
shrl $0x2, %eax
andl $0xfff, %eax            # imm = 0xFFF
addl $0xf, %eax
shrl $0x4, %eax
shll $0x4, %eax
movl -0x48(%rbp), %ecx
shrl $0x2, %ecx
andl $0xfff, %ecx            # imm = 0xFFF
addl $0x7, %ecx
shrl $0x3, %ecx
shll $0x3, %ecx
imull %ecx, %eax
movl %eax, -0x6c(%rbp)
movl -0x6c(%rbp), %eax
addl $0xf, %eax
shrl $0x4, %eax
shll $0x4, %eax
movl %eax, -0x6c(%rbp)
movl $0x0, -0x2c(%rbp)
movl -0x2c(%rbp), %eax
cmpl -0x24(%rbp), %eax
jae 0x6c16
cmpl $0x0, -0x14(%rbp)
je 0x6b89
movq -0x10(%rbp), %rdi
addq $0xa0, %rdi
movl -0x2c(%rbp), %eax
imulq $0x50, %rax, %rax
addq %rax, %rdi
addq $0x20, %rdi
xorl %esi, %esi
movl $0x20, %edx
callq 0x20f0
movl -0x3c(%rbp), %ecx
addl -0x40(%rbp), %ecx
movq -0x10(%rbp), %rax
addq $0xa0, %rax
movl -0x2c(%rbp), %edx
imulq $0x50, %rdx, %rdx
addq %rdx, %rax
movl %ecx, 0x20(%rax)
movq -0x10(%rbp), %rax
addq $0xa0, %rax
movl -0x2c(%rbp), %ecx
imulq $0x50, %rcx, %rcx
addq %rcx, %rax
movl 0x20(%rax), %ecx
addl $0xfff, %ecx            # imm = 0xFFF
andl $0xfffff000, %ecx       # imm = 0xFFFFF000
addl $0x1000, %ecx           # imm = 0x1000
movq -0x10(%rbp), %rax
addq $0xa0, %rax
movl -0x2c(%rbp), %edx
imulq $0x50, %rdx, %rdx
addq %rdx, %rax
movl %ecx, 0x20(%rax)
movq -0x10(%rbp), %rax
addq $0xa0, %rax
movl -0x2c(%rbp), %ecx
imulq $0x50, %rcx, %rcx
addq %rcx, %rax
movl $0x1, 0x24(%rax)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rsi
addq $0xa0, %rsi
movl -0x2c(%rbp), %eax
imulq $0x50, %rax, %rax
addq %rax, %rsi
addq $0x20, %rsi
callq 0x2260
cmpl $0x0, %eax
jge 0x6b4d
jmp 0x6b25
leaq 0x29504(%rip), %rdi     # 0x30030
movb $0x0, %al
callq 0x2050
leaq 0x2972c(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl $0xffffffff, -0x4(%rbp) # imm = 0xFFFFFFFF
jmp 0x7537
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
addq $0xa0, %rax
movl -0x2c(%rbp), %ecx
imulq $0x50, %rcx, %rcx
addq %rcx, %rax
movq 0x28(%rax), %rax
movl %eax, %esi
movq -0x10(%rbp), %rax
addq $0xa0, %rax
movl -0x2c(%rbp), %ecx
imulq $0x50, %rcx, %rcx
addq %rcx, %rax
movl 0x20(%rax), %edx
callq 0x2170
movq -0x10(%rbp), %rax
addq $0xa0, %rax
movl -0x2c(%rbp), %ecx
imulq $0x50, %rcx, %rcx
addq %rcx, %rax
movq 0x28(%rax), %rax
movl %eax, %ecx
movl -0x2c(%rbp), %eax
movl %eax, %edx
leaq -0xa0(%rbp), %rax
imulq $0xc, %rdx, %rdx
addq %rdx, %rax
movl %ecx, (%rax)
movq -0x10(%rbp), %rax
addq $0xa0, %rax
movl -0x2c(%rbp), %ecx
imulq $0x50, %rcx, %rcx
addq %rcx, %rax
movq 0x28(%rax), %rax
movl -0x3c(%rbp), %ecx
addq %rcx, %rax
movl %eax, %ecx
movl -0x2c(%rbp), %eax
movl %eax, %edx
leaq -0xa0(%rbp), %rax
imulq $0xc, %rdx, %rdx
addq %rdx, %rax
movl %ecx, 0x4(%rax)
movl -0x2c(%rbp), %eax
movl %eax, %ecx
leaq -0xa0(%rbp), %rax
imulq $0xc, %rcx, %rcx
addq %rcx, %rax
movl $0x0, 0x8(%rax)
movl -0x2c(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x2c(%rbp)
jmp 0x6a47
movl $0x0, -0x2c(%rbp)
movl -0x2c(%rbp), %eax
cmpl -0x28(%rbp), %eax
jae 0x6dc5
cmpl $0x0, -0x14(%rbp)
je 0x6d38
movq -0x10(%rbp), %rdi
addq $0x1e0, %rdi            # imm = 0x1E0
movl -0x2c(%rbp), %eax
shlq $0x5, %rax
addq %rax, %rdi
xorl %esi, %esi
movl $0x20, %edx
callq 0x20f0
movl -0x58(%rbp), %ecx
addl -0x5c(%rbp), %ecx
movq -0x10(%rbp), %rax
addq $0x1e0, %rax            # imm = 0x1E0
movl -0x2c(%rbp), %edx
shlq $0x5, %rdx
addq %rdx, %rax
movl %ecx, (%rax)
movq -0x10(%rbp), %rax
addq $0x1e0, %rax            # imm = 0x1E0
movl -0x2c(%rbp), %ecx
shlq $0x5, %rcx
addq %rcx, %rax
movl (%rax), %ecx
addl $0xfff, %ecx            # imm = 0xFFF
andl $0xfffff000, %ecx       # imm = 0xFFFFF000
addl $0x1000, %ecx           # imm = 0x1000
movq -0x10(%rbp), %rax
addq $0x1e0, %rax            # imm = 0x1E0
movl -0x2c(%rbp), %edx
shlq $0x5, %rdx
addq %rdx, %rax
movl %ecx, (%rax)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rsi
addq $0x1e0, %rsi            # imm = 0x1E0
movl -0x2c(%rbp), %eax
shlq $0x5, %rax
addq %rax, %rsi
callq 0x2260
cmpl $0x0, %eax
jge 0x6cfd
jmp 0x6cd5
leaq 0x2938f(%rip), %rdi     # 0x3006b
movb $0x0, %al
callq 0x2050
leaq 0x2957c(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl $0xffffffff, -0x4(%rbp) # imm = 0xFFFFFFFF
jmp 0x7537
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
addq $0x1e0, %rax            # imm = 0x1E0
movl -0x2c(%rbp), %ecx
shlq $0x5, %rcx
addq %rcx, %rax
movq 0x8(%rax), %rax
movl %eax, %esi
movq -0x10(%rbp), %rax
addq $0x1e0, %rax            # imm = 0x1E0
movl -0x2c(%rbp), %ecx
shlq $0x5, %rcx
addq %rcx, %rax
movl (%rax), %edx
callq 0x2170
movq -0x10(%rbp), %rax
addq $0x1e0, %rax            # imm = 0x1E0
movl -0x2c(%rbp), %ecx
shlq $0x5, %rcx
addq %rcx, %rax
movq 0x8(%rax), %rax
movl %eax, %ecx
movl -0x2c(%rbp), %eax
movl %eax, %edx
leaq -0x2a0(%rbp), %rax
shlq $0x4, %rdx
addq %rdx, %rax
movl %ecx, (%rax)
movq -0x10(%rbp), %rax
addq $0x1e0, %rax            # imm = 0x1E0
movl -0x2c(%rbp), %ecx
shlq $0x5, %rcx
addq %rcx, %rax
movq 0x8(%rax), %rax
movl -0x58(%rbp), %ecx
addq %rcx, %rax
movl %eax, %ecx
movl -0x2c(%rbp), %eax
movl %eax, %edx
leaq -0x2a0(%rbp), %rax
shlq $0x4, %rdx
addq %rdx, %rax
movl %ecx, 0x4(%rax)
movl -0x2c(%rbp), %eax
movl %eax, %ecx
leaq -0x2a0(%rbp), %rax
shlq $0x4, %rcx
addq %rcx, %rax
movl $0x0, 0x8(%rax)
movl -0x2c(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x2c(%rbp)
jmp 0x6c1d
cmpl $0x0, -0x14(%rbp)
je 0x704f
movq -0x10(%rbp), %rdi
addq $0x260, %rdi            # imm = 0x260
xorl %esi, %esi
movl $0x20, %edx
callq 0x20f0
movl -0x60(%rbp), %ecx
imull -0x28(%rbp), %ecx
addl $0xfff, %ecx            # imm = 0xFFF
andl $0xfffff000, %ecx       # imm = 0xFFFFF000
addl $0x1000, %ecx           # imm = 0x1000
movq -0x10(%rbp), %rax
movl %ecx, 0x260(%rax)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rsi
addq $0x260, %rsi            # imm = 0x260
callq 0x2260
cmpl $0x0, %eax
jge 0x6e4e
jmp 0x6e26
leaq 0x29273(%rip), %rdi     # 0x300a0
movb $0x0, %al
callq 0x2050
leaq 0x2942b(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl $0xffffffff, -0x4(%rbp) # imm = 0xFFFFFFFF
jmp 0x7537
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movq 0x268(%rax), %rax
movl %eax, %esi
movq -0x10(%rbp), %rax
movl 0x260(%rax), %edx
callq 0x2170
movq -0x10(%rbp), %rdi
addq $0x280, %rdi            # imm = 0x280
xorl %esi, %esi
movl $0x20, %edx
callq 0x20f0
movl -0x64(%rbp), %ecx
imull -0x28(%rbp), %ecx
addl $0xfff, %ecx            # imm = 0xFFF
andl $0xfffff000, %ecx       # imm = 0xFFFFF000
addl $0x1000, %ecx           # imm = 0x1000
movq -0x10(%rbp), %rax
movl %ecx, 0x280(%rax)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rsi
addq $0x280, %rsi            # imm = 0x280
callq 0x2260
cmpl $0x0, %eax
jge 0x6eef
jmp 0x6ec7
leaq 0x2920f(%rip), %rdi     # 0x300dd
movb $0x0, %al
callq 0x2050
leaq 0x2938a(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl $0xffffffff, -0x4(%rbp) # imm = 0xFFFFFFFF
jmp 0x7537
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movq 0x288(%rax), %rax
movl %eax, %esi
movq -0x10(%rbp), %rax
movl 0x280(%rax), %edx
callq 0x2170
movq -0x10(%rbp), %rdi
addq $0x2a0, %rdi            # imm = 0x2A0
xorl %esi, %esi
movl $0x20, %edx
callq 0x20f0
movl -0x68(%rbp), %ecx
imull -0x28(%rbp), %ecx
addl $0xfff, %ecx            # imm = 0xFFF
andl $0xfffff000, %ecx       # imm = 0xFFFFF000
addl $0x1000, %ecx           # imm = 0x1000
movq -0x10(%rbp), %rax
movl %ecx, 0x2a0(%rax)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rsi
addq $0x2a0, %rsi            # imm = 0x2A0
callq 0x2260
cmpl $0x0, %eax
jge 0x6f90
jmp 0x6f68
leaq 0x291ab(%rip), %rdi     # 0x3011a
movb $0x0, %al
callq 0x2050
leaq 0x292e9(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl $0xffffffff, -0x4(%rbp) # imm = 0xFFFFFFFF
jmp 0x7537
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movq 0x2a8(%rax), %rax
movl %eax, %esi
movq -0x10(%rbp), %rax
movl 0x2a0(%rax), %edx
callq 0x2170
movq -0x10(%rbp), %rdi
addq $0x2c0, %rdi            # imm = 0x2C0
xorl %esi, %esi
movl $0x20, %edx
callq 0x20f0
movl -0x6c(%rbp), %ecx
addl $0xfff, %ecx            # imm = 0xFFF
andl $0xfffff000, %ecx       # imm = 0xFFFFF000
addl $0x1000, %ecx           # imm = 0x1000
movq -0x10(%rbp), %rax
movl %ecx, 0x2c0(%rax)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rsi
addq $0x2c0, %rsi            # imm = 0x2C0
callq 0x2260
cmpl $0x0, %eax
jge 0x702d
jmp 0x7005
leaq 0x29147(%rip), %rdi     # 0x30153
movb $0x0, %al
callq 0x2050
leaq 0x2924c(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl $0xffffffff, -0x4(%rbp) # imm = 0xFFFFFFFF
jmp 0x7537
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movq 0x2c8(%rax), %rax
movl %eax, %esi
movq -0x10(%rbp), %rax
movl 0x2c0(%rax), %edx
callq 0x2170
movl $0x0, -0x18(%rbp)
movl -0x18(%rbp), %eax
orl $0x0, %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
orl $0x10000, %eax          # imm = 0x10000
movl %eax, -0x18(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %eax
shll $0x0, %eax
orl -0x18(%rbp), %eax
movl %eax, -0x18(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x18(%rbp), %edx
movl $0x108, %esi            # imm = 0x108
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movq 0x48(%rax), %rax
movl %eax, %edx
movl $0x138, %esi            # imm = 0x138
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movl 0x40(%rax), %edx
movl $0x13c, %esi            # imm = 0x13C
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x140, %esi            # imm = 0x140
xorl %edx, %edx
callq 0x2160
movl $0x1, -0x2a8(%rbp)
movl $0x1, -0x2a4(%rbp)
movl $0x0, -0x2ac(%rbp)
movl -0x28(%rbp), %eax
subl $0x1, %eax
movl %eax, -0x2b0(%rbp)
movl $0x0, -0x18(%rbp)
movl -0x50(%rbp), %eax
andl $0xffff, %eax           # imm = 0xFFFF
shll $0x10, %eax
orl -0x18(%rbp), %eax
movl %eax, -0x18(%rbp)
movl -0x54(%rbp), %eax
andl $0xffff, %eax           # imm = 0xFFFF
shll $0x0, %eax
orl -0x18(%rbp), %eax
movl %eax, -0x18(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x18(%rbp), %edx
movl $0x154, %esi            # imm = 0x154
callq 0x2160
movl $0x0, -0x18(%rbp)
movl -0x18(%rbp), %eax
orl $0x0, %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
orl $0x0, %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
orl $0x0, %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
orl $0x0, %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
orl $0x0, %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
orl $0x0, %eax
movl %eax, -0x18(%rbp)
movl -0x4c(%rbp), %eax
andl $0xffff, %eax           # imm = 0xFFFF
shll $0x0, %eax
orl -0x18(%rbp), %eax
movl %eax, -0x18(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x18(%rbp), %edx
movl $0x120, %esi            # imm = 0x120
callq 0x2160
movl $0x0, -0x18(%rbp)
movq -0x10(%rbp), %rax
movl 0xc(%rax), %eax
addl $0x1f, %eax
shrl $0x5, %eax
shll $0x5, %eax
shll $0x10, %eax
orl -0x18(%rbp), %eax
movl %eax, -0x18(%rbp)
movq -0x10(%rbp), %rax
movl 0x10(%rax), %eax
addl $0x7, %eax
shrl $0x3, %eax
shll $0x3, %eax
shll $0x0, %eax
orl -0x18(%rbp), %eax
movl %eax, -0x18(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x18(%rbp), %edx
movl $0x124, %esi            # imm = 0x124
callq 0x2160
movl $0x0, -0x18(%rbp)
movl -0x18(%rbp), %eax
orl $0xc00000, %eax         # imm = 0xC00000
movl %eax, -0x18(%rbp)
movl 0x2bfde(%rip), %eax     # 0x331d8
shll $0x10, %eax
orl -0x18(%rbp), %eax
movl %eax, -0x18(%rbp)
movl -0x2a8(%rbp), %eax
shll $0x4, %eax
orl -0x18(%rbp), %eax
movl %eax, -0x18(%rbp)
movl -0x2a4(%rbp), %eax
shll $0x3, %eax
orl -0x18(%rbp), %eax
movl %eax, -0x18(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x18(%rbp), %edx
movl $0x10c, %esi            # imm = 0x10C
callq 0x2160
movl $0x0, -0x18(%rbp)
movl -0x2ac(%rbp), %eax
shll $0x8, %eax
orl -0x18(%rbp), %eax
movl %eax, -0x18(%rbp)
movl -0x2b0(%rbp), %eax
shll $0x0, %eax
orl -0x18(%rbp), %eax
movl %eax, -0x18(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x18(%rbp), %edx
movl $0x128, %esi            # imm = 0x128
callq 0x2160
movl $0x0, -0x2c(%rbp)
movl -0x2c(%rbp), %eax
cmpl -0x28(%rbp), %eax
jae 0x7376
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x2c(%rbp), %esi
shll $0x4, %esi
addl $0x160, %esi            # imm = 0x160
movl -0x2c(%rbp), %eax
movl %eax, %ecx
leaq -0x2a0(%rbp), %rax
shlq $0x4, %rcx
addq %rcx, %rax
movl (%rax), %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x2c(%rbp), %esi
shll $0x4, %esi
addl $0x164, %esi            # imm = 0x164
movl -0x2c(%rbp), %eax
movl %eax, %ecx
leaq -0x2a0(%rbp), %rax
shlq $0x4, %rcx
addq %rcx, %rax
movl 0x4(%rax), %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x2c(%rbp), %esi
shll $0x4, %esi
addl $0x168, %esi            # imm = 0x168
movq -0x10(%rbp), %rax
movq 0x268(%rax), %rax
movl -0x60(%rbp), %ecx
imull -0x2c(%rbp), %ecx
movl %ecx, %ecx
addq %rcx, %rax
movl %eax, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x2c(%rbp), %esi
shll $0x4, %esi
addl $0x16c, %esi            # imm = 0x16C
movq -0x10(%rbp), %rax
movq 0x288(%rax), %rax
movl -0x64(%rbp), %ecx
imull -0x2c(%rbp), %ecx
movl %ecx, %ecx
addq %rcx, %rax
movl %eax, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x2c(%rbp), %esi
shll $0x2, %esi
addl $0x1e0, %esi            # imm = 0x1E0
movq -0x10(%rbp), %rax
movq 0x2a8(%rax), %rax
movl -0x68(%rbp), %ecx
imull -0x2c(%rbp), %ecx
movl %ecx, %ecx
addq %rcx, %rax
movl %eax, %edx
callq 0x2160
movl -0x2c(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x2c(%rbp)
jmp 0x7273
movq -0x10(%rbp), %rax
movl (%rax), %edi
movq -0x10(%rbp), %rax
movq 0x2c8(%rax), %rax
movl %eax, %edx
movl $0x158, %esi            # imm = 0x158
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl -0x6c(%rbp), %edx
movl $0x15c, %esi            # imm = 0x15C
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x70, %esi
movl $0x1, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x110, %esi            # imm = 0x110
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x104, %esi            # imm = 0x104
xorl %edx, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x100, %esi            # imm = 0x100
movl $0x10, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x38, %esi
movl $0x1, %edx
callq 0x2160
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x70, %esi
callq 0x2210
movl %eax, -0x18(%rbp)
jmp 0x741e
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x1388, %esi           # imm = 0x1388
callq 0x2340
cmpl $-0x1, %eax
jne 0x745d
jmp 0x7435
leaq 0x28d53(%rip), %rdi     # 0x3018f
movb $0x0, %al
callq 0x2050
leaq 0x28e1c(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl $0xffffffdc, -0x4(%rbp) # imm = 0xFFFFFFDC
jmp 0x7537
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x110, %esi            # imm = 0x110
callq 0x2210
cmpl $0x0, %eax
jne 0x74b6
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x114, %esi            # imm = 0x114
callq 0x2210
movl %eax, -0x2b4(%rbp)
movl -0x2b4(%rbp), %esi
leaq 0x28d23(%rip), %rdi     # 0x301b8
movb $0x0, %al
callq 0x2050
leaq 0x28dc3(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl $0xffffffdb, -0x4(%rbp) # imm = 0xFFFFFFDB
jmp 0x7537
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x110, %esi            # imm = 0x110
callq 0x2210
movl %eax, -0x18(%rbp)
jmp 0x74cb
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x130, %esi            # imm = 0x130
callq 0x2210
movl %eax, -0x1c(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x134, %esi            # imm = 0x134
callq 0x2210
movl %eax, -0x20(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x134, %esi            # imm = 0x134
callq 0x2210
movl %eax, -0x20(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x1d8, %esi            # imm = 0x1D8
callq 0x2210
movl %eax, -0x24(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %edi
movl $0x1cc, %esi            # imm = 0x1CC
callq 0x2210
movl %eax, -0x28(%rbp)
jmp 0x752c
jmp 0x752e
jmp 0x7530
movl $0x1, -0x4(%rbp)
movl -0x4(%rbp), %eax
addq $0x2c0, %rsp            # imm = 0x2C0
popq %rbp
retq
nopw %cs:(%rax,%rax)