// File: /workspace/github_cpp_makefile_star2_O3/gvaumour[P]cache-simulator/src/Perceptron.cc
// Function: PerceptronPredictor::insertionPolicy(unsigned long, unsigned long, bool, Access)
void
PerceptronPredictor::insertionPolicy(uint64_t set, uint64_t index, bool inNVM, Access element)
{
	CacheEntry* current = get_entry(set , index , inNVM);
	current->policyInfo = m_cpt++;

	stats_allocate++;

	/** Training learning cache lines */ 
	if(current->isLearning)
	{
		if(m_enableBP)
		{
			stats_allocate_learning++;
			setBPPrediction(current);		
		}
		
		if(m_enableAllocation)
		{
			if(element.isSRAMerror && !inNVM)
			{
				for(unsigned i = 0 ; i < m_Allocation_features.size() ; i++)
				{
					if( current->perceptron_Allocpred[i] < simu_parameters.perceptron_bypass_learning)
						m_Allocation_features[i]->increaseConfidence(current->perceptron_AllocHash[i]);
				}
			}
		}
	}
	
	if(m_enableAllocation)
	{
		RD_TYPE rd_type = classifyRD(set , index , inNVM);
		if( element.isSRAMerror )
			rd_type = RD_MEDIUM;
		
		for(unsigned i = 0 ; i < m_Allocation_features.size() ; i++)
		{
			int hash = m_Allocation_features_hash[i](current->address , current->m_pc);
			m_Allocation_features[i]->recordAccess( hash  , element.isWrite() , rd_type);
		}
	}
			
	Predictor::insertionPolicy(set , index , inNVM , element);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movl %ecx, %ebp
movq %rdi, %r15
movl %ecx, %eax
movq 0x8(%rdi,%rax,8), %rax
movq (%rax), %rax
movq %rsi, 0x8(%rsp)
leaq (%rsi,%rsi,2), %rcx
movq (%rax,%rcx,8), %rax
movq %rdx, 0x10(%rsp)
movq (%rax,%rdx,8), %r12
movq 0x308(%rdi), %rax
leaq 0x1(%rax), %rcx
movq %rcx, 0x308(%rdi)
movl %eax, 0x38(%r12)
incq 0x3e8(%rdi)
cmpb $0x1, 0x148(%r12)
jne 0x24ccd
cmpb $0x1, 0x348(%r15)
jne 0x24c46
incq 0x3f0(%r15)
movq %r15, %rdi
movq %r12, %rsi
callq 0x24962
cmpb $0x1, 0x349(%r15)
jne 0x24ccd
leaq 0x50(%rsp), %rax
movb 0x28(%rax), %al
xorb $0x1, %al
orb %bpl, %al
jne 0x24ccd
movq 0x270(%r15), %rax
movq 0x278(%r15), %rcx
cmpq %rax, %rcx
je 0x24ccd
leaq 0x212d7(%rip), %r13     # 0x45f50
movl 0x1bc(%r13), %edx
movl $0x1, %ebx
xorl %esi, %esi
movq 0x60(%r12), %rdi
cmpl %edx, (%rdi,%rsi,4)
jge 0x24cba
movq (%rax,%rsi,8), %rdi
movq 0x90(%r12), %rax
movl (%rax,%rsi,4), %esi
callq 0x149f2
movl 0x1bc(%r13), %edx
movq 0x270(%r15), %rax
movq 0x278(%r15), %rcx
movl %ebx, %esi
movq %rcx, %rdi
subq %rax, %rdi
sarq $0x3, %rdi
incl %ebx
cmpq %rsi, %rdi
ja 0x24c87
cmpb $0x1, 0x349(%r15)
movzbl %bpl, %eax
movl %eax, 0x4(%rsp)
jne 0x24d82
movq %r15, %rdi
movq 0x8(%rsp), %rsi
movq 0x10(%rsp), %rdx
movl 0x4(%rsp), %ecx
callq 0x24a38
leaq 0x50(%rsp), %rcx
cmpb $0x0, 0x28(%rcx)
movl %eax, %r13d
movl $0x1, %r14d
cmovnel %r14d, %r13d
movq 0x278(%r15), %rax
cmpq 0x270(%r15), %rax
je 0x24d82
leaq 0x50(%rsp), %rax
movl 0x1c(%rax), %eax
cmpl $0x3, %eax
sete %cl
cmpl $0x6, %eax
sete %al
orb %cl, %al
xorl %ebp, %ebp
movzbl %al, %ebx
movq 0x288(%r15), %rax
movq 0x8(%r12), %rdi
movq 0x10(%r12), %rsi
callq *(%rax,%rbp,8)
movq 0x270(%r15), %rcx
movq (%rcx,%rbp,8), %rdi
movl %eax, %esi
movl %ebx, %edx
movl %r13d, %ecx
callq 0x14524
movq 0x278(%r15), %rax
subq 0x270(%r15), %rax
movl %r14d, %ebp
sarq $0x3, %rax
incl %r14d
cmpq %rbp, %rax
ja 0x24d3a
movq %r15, %rdi
movq 0x8(%rsp), %rsi
movq 0x10(%rsp), %rdx
movl 0x4(%rsp), %ecx
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x26664