// File: /workspace/github_c_makefile_star2_O1/enzo1982[P]smooth/libraries/libwebp/src/dsp/rescaler_sse2.c
// Function: RescalerExportRowShrink_SSE2
static void RescalerExportRowShrink_SSE2(WebPRescaler* const wrk) {
  int x_out;
  uint8_t* const dst = wrk->dst;
  rescaler_t* const irow = wrk->irow;
  const int x_out_max = wrk->dst_width * wrk->num_channels;
  const rescaler_t* const frow = wrk->frow;
  const uint32_t yscale = wrk->fy_scale * (-wrk->y_accum);
  assert(!WebPRescalerOutputDone(wrk));
  assert(wrk->y_accum <= 0);
  assert(!wrk->y_expand);
  if (yscale) {
    const int scale_xy = wrk->fxy_scale;
    const __m128i mult_xy = _mm_set_epi32(0, scale_xy, 0, scale_xy);
    const __m128i mult_y = _mm_set_epi32(0, yscale, 0, yscale);
    for (x_out = 0; x_out + 8 <= x_out_max; x_out += 8) {
      __m128i A0, A1, A2, A3, B0, B1, B2, B3;
      LoadDispatchAndMult_SSE2(irow + x_out, NULL, &A0, &A1, &A2, &A3);
      LoadDispatchAndMult_SSE2(frow + x_out, &mult_y, &B0, &B1, &B2, &B3);
      {
        const __m128i D0 = _mm_srli_epi64(B0, WEBP_RESCALER_RFIX);   // = frac
        const __m128i D1 = _mm_srli_epi64(B1, WEBP_RESCALER_RFIX);
        const __m128i D2 = _mm_srli_epi64(B2, WEBP_RESCALER_RFIX);
        const __m128i D3 = _mm_srli_epi64(B3, WEBP_RESCALER_RFIX);
        const __m128i E0 = _mm_sub_epi64(A0, D0);   // irow[x] - frac
        const __m128i E1 = _mm_sub_epi64(A1, D1);
        const __m128i E2 = _mm_sub_epi64(A2, D2);
        const __m128i E3 = _mm_sub_epi64(A3, D3);
        const __m128i F2 = _mm_slli_epi64(D2, 32);
        const __m128i F3 = _mm_slli_epi64(D3, 32);
        const __m128i G0 = _mm_or_si128(D0, F2);
        const __m128i G1 = _mm_or_si128(D1, F3);
        _mm_storeu_si128((__m128i*)(irow + x_out + 0), G0);
        _mm_storeu_si128((__m128i*)(irow + x_out + 4), G1);
        ProcessRow_SSE2(&E0, &E1, &E2, &E3, &mult_xy, dst + x_out);
      }
    }
    for (; x_out < x_out_max; ++x_out) {
      const uint32_t frac = (int)MULT_FIX_FLOOR(frow[x_out], yscale);
      const int v = (int)MULT_FIX(irow[x_out] - frac, wrk->fxy_scale);
      dst[x_out] = (v > 255) ? 255u : (uint8_t)v;
      irow[x_out] = frac;   // new fractional start
    }
  } else {
    const uint32_t scale = wrk->fxy_scale;
    const __m128i mult = _mm_set_epi32(0, scale, 0, scale);
    const __m128i zero = _mm_setzero_si128();
    for (x_out = 0; x_out + 8 <= x_out_max; x_out += 8) {
      __m128i A0, A1, A2, A3;
      LoadDispatchAndMult_SSE2(irow + x_out, NULL, &A0, &A1, &A2, &A3);
      _mm_storeu_si128((__m128i*)(irow + x_out + 0), zero);
      _mm_storeu_si128((__m128i*)(irow + x_out + 4), zero);
      ProcessRow_SSE2(&A0, &A1, &A2, &A3, &mult, dst + x_out);
    }
    for (; x_out < x_out_max; ++x_out) {
      const int v = (int)MULT_FIX(irow[x_out], scale);
      dst[x_out] = (v > 255) ? 255u : (uint8_t)v;
      irow[x_out] = 0;
    }
  }
}

// Assembly:
pushq %rbx
movl 0x40(%rdi), %eax
cmpl 0x38(%rdi), %eax
jge 0xe8e47
movl 0x18(%rdi), %r9d
testl %r9d, %r9d
jg 0xe8e66
cmpl $0x0, 0x4(%rdi)
jne 0xe8e85
movq 0x48(%rdi), %rax
movq 0x58(%rdi), %rcx
movl 0x8(%rdi), %edx
imull 0x34(%rdi), %edx
imull 0x10(%rdi), %r9d
movl 0x14(%rdi), %esi
movd %esi, %xmm0
pshufd $0x44, %xmm0, %xmm0     # xmm0 = xmm0[0,1,0,1]
testl %r9d, %r9d
je 0xe8d57
movq 0x60(%rdi), %rsi
negl %r9d
xorl %r11d, %r11d
movl %edx, %r8d
cmpl $0x8, %edx
jl 0xe8cfc
movd %r9d, %xmm1
pshufd $0x44, %xmm1, %xmm1     # xmm1 = xmm1[0,1,0,1]
xorl %r11d, %r11d
movdqa 0x452c5(%rip), %xmm2    # 0x12deb0
movdqa 0x452ad(%rip), %xmm3    # 0x12dea0
movq %r11, %r10
movdqu (%rcx,%r11,4), %xmm7
movdqu 0x10(%rcx,%r11,4), %xmm5
movdqa %xmm7, %xmm4
psrlq $0x20, %xmm4
movdqa %xmm5, %xmm6
psrlq $0x20, %xmm6
movdqu (%rsi,%r11,4), %xmm11
movdqu 0x10(%rsi,%r11,4), %xmm9
movdqa %xmm11, %xmm8
psrlq $0x20, %xmm8
movdqa %xmm9, %xmm10
psrlq $0x20, %xmm10
pmuludq %xmm1, %xmm11
pmuludq %xmm1, %xmm9
pmuludq %xmm1, %xmm8
pmuludq %xmm1, %xmm10
psrlq $0x20, %xmm11
psrlq $0x20, %xmm9
movdqa %xmm8, %xmm12
psrlq $0x20, %xmm12
psubq %xmm12, %xmm4
movdqa %xmm10, %xmm12
psrlq $0x20, %xmm12
psubq %xmm12, %xmm6
psubq %xmm11, %xmm7
psubq %xmm9, %xmm5
pand %xmm2, %xmm8
pand %xmm2, %xmm10
por %xmm11, %xmm8
por %xmm9, %xmm10
movdqu %xmm8, (%rcx,%r11,4)
movdqu %xmm10, 0x10(%rcx,%r11,4)
pmuludq %xmm0, %xmm7
pmuludq %xmm0, %xmm5
pmuludq %xmm0, %xmm4
pmuludq %xmm0, %xmm6
paddq %xmm3, %xmm7
paddq %xmm3, %xmm5
paddq %xmm3, %xmm4
paddq %xmm3, %xmm6
psrlq $0x20, %xmm7
psrlq $0x20, %xmm5
pand %xmm2, %xmm4
por %xmm7, %xmm4
pand %xmm2, %xmm6
por %xmm5, %xmm6
packssdw %xmm6, %xmm4
packuswb %xmm4, %xmm4
movq %xmm4, (%rax,%r11)
addq $0x8, %r11
addq $0x10, %r10
cmpq %r8, %r10
jbe 0xe8bf3
cmpl %edx, %r11d
jge 0xe8e45
movl %r9d, %edx
movl %r11d, %r9d
movl (%rsi,%r9,4), %r10d
imulq %rdx, %r10
shrq $0x20, %r10
movl (%rcx,%r9,4), %ebx
subl %r10d, %ebx
movl 0x14(%rdi), %r11d
imulq %rbx, %r11
subq $-0x80000000, %r11      # imm = 0x80000000
shrq $0x20, %r11
movl $0xff, %ebx
cmpl $0x100, %r11d           # imm = 0x100
jge 0xe8d42
movl %r11d, %ebx
movb %bl, (%rax,%r9)
movl %r10d, (%rcx,%r9,4)
incq %r9
cmpq %r9, %r8
jne 0xe8d0b
jmp 0xe8e45
xorl %r9d, %r9d
cmpl $0x8, %edx
jl 0xe8e04
movl %edx, %edi
xorl %r9d, %r9d
movdqa 0x45130(%rip), %xmm1    # 0x12dea0
movdqa 0x45138(%rip), %xmm2    # 0x12deb0
pxor %xmm3, %xmm3
movq %r9, %r8
movdqu (%rcx,%r9,4), %xmm5
movdqu 0x10(%rcx,%r9,4), %xmm6
movdqa %xmm5, %xmm4
psrlq $0x20, %xmm4
movdqa %xmm6, %xmm7
psrlq $0x20, %xmm7
pmuludq %xmm0, %xmm5
pmuludq %xmm0, %xmm6
pmuludq %xmm0, %xmm4
pmuludq %xmm0, %xmm7
paddq %xmm1, %xmm5
paddq %xmm1, %xmm6
paddq %xmm1, %xmm4
paddq %xmm1, %xmm7
psrlq $0x20, %xmm5
psrlq $0x20, %xmm6
pand %xmm2, %xmm4
por %xmm5, %xmm4
pand %xmm2, %xmm7
por %xmm6, %xmm7
packssdw %xmm7, %xmm4
packuswb %xmm4, %xmm4
movdqu %xmm3, (%rcx,%r9,4)
movdqu %xmm3, 0x10(%rcx,%r9,4)
movq %xmm4, (%rax,%r9)
addq $0x8, %r9
addq $0x10, %r8
cmpq %rdi, %r8
jbe 0xe8d7c
cmpl %edx, %r9d
jge 0xe8e45
movl %r9d, %edi
movl %edx, %edx
movl $0xff, %r8d
movl (%rcx,%rdi,4), %r9d
imulq %rsi, %r9
subq $-0x80000000, %r9       # imm = 0x80000000
shrq $0x20, %r9
cmpl $0x100, %r9d            # imm = 0x100
cmovgel %r8d, %r9d
movb %r9b, (%rax,%rdi)
movl $0x0, (%rcx,%rdi,4)
incq %rdi
cmpq %rdi, %rdx
jne 0xe8e14
popq %rbx
retq
leaq 0x44237(%rip), %rdi     # 0x12d085
leaq 0x4506b(%rip), %rsi     # 0x12dec0
leaq 0x45177(%rip), %rcx     # 0x12dfd3
movl $0x125, %edx            # imm = 0x125
callq 0x55710
leaq 0x4426d(%rip), %rdi     # 0x12d0da
leaq 0x4504c(%rip), %rsi     # 0x12dec0
leaq 0x45158(%rip), %rcx     # 0x12dfd3
movl $0x126, %edx            # imm = 0x126
callq 0x55710
leaq 0x442a8(%rip), %rdi     # 0x12d134
leaq 0x4502d(%rip), %rsi     # 0x12dec0
leaq 0x45139(%rip), %rcx     # 0x12dfd3
movl $0x127, %edx            # imm = 0x127
callq 0x55710