// File: /workspace/github_c_makefile_star2_O0/gplessis[P]dotdeb-redis/src/hyperloglog.c
// Function: hllDenseSum
double hllDenseSum(uint8_t *registers, double *PE, int *ezp) {
    double E = 0;
    int j, ez = 0;

    /* Redis default is to use 16384 registers 6 bits each. The code works
     * with other values by modifying the defines, but for our target value
     * we take a faster path with unrolled loops. */
    if (HLL_REGISTERS == 16384 && HLL_BITS == 6) {
        uint8_t *r = registers;
        unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9,
                      r10, r11, r12, r13, r14, r15;
        for (j = 0; j < 1024; j++) {
            /* Handle 16 registers per iteration. */
            r0 = r[0] & 63; if (r0 == 0) ez++;
            r1 = (r[0] >> 6 | r[1] << 2) & 63; if (r1 == 0) ez++;
            r2 = (r[1] >> 4 | r[2] << 4) & 63; if (r2 == 0) ez++;
            r3 = (r[2] >> 2) & 63; if (r3 == 0) ez++;
            r4 = r[3] & 63; if (r4 == 0) ez++;
            r5 = (r[3] >> 6 | r[4] << 2) & 63; if (r5 == 0) ez++;
            r6 = (r[4] >> 4 | r[5] << 4) & 63; if (r6 == 0) ez++;
            r7 = (r[5] >> 2) & 63; if (r7 == 0) ez++;
            r8 = r[6] & 63; if (r8 == 0) ez++;
            r9 = (r[6] >> 6 | r[7] << 2) & 63; if (r9 == 0) ez++;
            r10 = (r[7] >> 4 | r[8] << 4) & 63; if (r10 == 0) ez++;
            r11 = (r[8] >> 2) & 63; if (r11 == 0) ez++;
            r12 = r[9] & 63; if (r12 == 0) ez++;
            r13 = (r[9] >> 6 | r[10] << 2) & 63; if (r13 == 0) ez++;
            r14 = (r[10] >> 4 | r[11] << 4) & 63; if (r14 == 0) ez++;
            r15 = (r[11] >> 2) & 63; if (r15 == 0) ez++;

            /* Additional parens will allow the compiler to optimize the
             * code more with a loss of precision that is not very relevant
             * here (floating point math is not commutative!). */
            E += (PE[r0] + PE[r1]) + (PE[r2] + PE[r3]) + (PE[r4] + PE[r5]) +
                 (PE[r6] + PE[r7]) + (PE[r8] + PE[r9]) + (PE[r10] + PE[r11]) +
                 (PE[r12] + PE[r13]) + (PE[r14] + PE[r15]);
            r += 12;
        }
    } else {
        for (j = 0; j < HLL_REGISTERS; j++) {
            unsigned long reg;

            HLL_DENSE_GET_REGISTER(reg,registers,j);
            if (reg == 0) {
                ez++;
                /* Increment E at the end of the loop. */
            } else {
                E += PE[reg]; /* Precomputed 2^(-reg[j]). */
            }
        }
        E += ez; /* Add 2^0 'ez' times. */
    }
    *ezp = ez;
    return E;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x30, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq %rdx, -0x18(%rbp)
xorps %xmm0, %xmm0
movsd %xmm0, -0x20(%rbp)
movl $0x0, -0x28(%rbp)
movq -0x8(%rbp), %rax
movq %rax, -0x30(%rbp)
movl $0x0, -0x24(%rbp)
cmpl $0x400, -0x24(%rbp)     # imm = 0x400
jge 0x9e38f
movq -0x30(%rbp), %rax
movzbl (%rax), %eax
andl $0x3f, %eax
cltq
movq %rax, -0x38(%rbp)
cmpq $0x0, -0x38(%rbp)
jne 0x9dfcf
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl (%rax), %eax
sarl $0x6, %eax
movq -0x30(%rbp), %rcx
movzbl 0x1(%rcx), %ecx
shll $0x2, %ecx
orl %ecx, %eax
andl $0x3f, %eax
cltq
movq %rax, -0x40(%rbp)
cmpq $0x0, -0x40(%rbp)
jne 0x9dfff
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl 0x1(%rax), %eax
sarl $0x4, %eax
movq -0x30(%rbp), %rcx
movzbl 0x2(%rcx), %ecx
shll $0x4, %ecx
orl %ecx, %eax
andl $0x3f, %eax
cltq
movq %rax, -0x48(%rbp)
cmpq $0x0, -0x48(%rbp)
jne 0x9e030
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl 0x2(%rax), %eax
sarl $0x2, %eax
andl $0x3f, %eax
cltq
movq %rax, -0x50(%rbp)
cmpq $0x0, -0x50(%rbp)
jne 0x9e054
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl 0x3(%rax), %eax
andl $0x3f, %eax
cltq
movq %rax, -0x58(%rbp)
cmpq $0x0, -0x58(%rbp)
jne 0x9e075
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl 0x3(%rax), %eax
sarl $0x6, %eax
movq -0x30(%rbp), %rcx
movzbl 0x4(%rcx), %ecx
shll $0x2, %ecx
orl %ecx, %eax
andl $0x3f, %eax
cltq
movq %rax, -0x60(%rbp)
cmpq $0x0, -0x60(%rbp)
jne 0x9e0a6
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl 0x4(%rax), %eax
sarl $0x4, %eax
movq -0x30(%rbp), %rcx
movzbl 0x5(%rcx), %ecx
shll $0x4, %ecx
orl %ecx, %eax
andl $0x3f, %eax
cltq
movq %rax, -0x68(%rbp)
cmpq $0x0, -0x68(%rbp)
jne 0x9e0d7
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl 0x5(%rax), %eax
sarl $0x2, %eax
andl $0x3f, %eax
cltq
movq %rax, -0x70(%rbp)
cmpq $0x0, -0x70(%rbp)
jne 0x9e0fb
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl 0x6(%rax), %eax
andl $0x3f, %eax
cltq
movq %rax, -0x78(%rbp)
cmpq $0x0, -0x78(%rbp)
jne 0x9e11c
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl 0x6(%rax), %eax
sarl $0x6, %eax
movq -0x30(%rbp), %rcx
movzbl 0x7(%rcx), %ecx
shll $0x2, %ecx
orl %ecx, %eax
andl $0x3f, %eax
cltq
movq %rax, -0x80(%rbp)
cmpq $0x0, -0x80(%rbp)
jne 0x9e14d
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl 0x7(%rax), %eax
sarl $0x4, %eax
movq -0x30(%rbp), %rcx
movzbl 0x8(%rcx), %ecx
shll $0x4, %ecx
orl %ecx, %eax
andl $0x3f, %eax
cltq
movq %rax, -0x88(%rbp)
cmpq $0x0, -0x88(%rbp)
jne 0x9e184
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl 0x8(%rax), %eax
sarl $0x2, %eax
andl $0x3f, %eax
cltq
movq %rax, -0x90(%rbp)
cmpq $0x0, -0x90(%rbp)
jne 0x9e1ae
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl 0x9(%rax), %eax
andl $0x3f, %eax
cltq
movq %rax, -0x98(%rbp)
cmpq $0x0, -0x98(%rbp)
jne 0x9e1d5
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl 0x9(%rax), %eax
sarl $0x6, %eax
movq -0x30(%rbp), %rcx
movzbl 0xa(%rcx), %ecx
shll $0x2, %ecx
orl %ecx, %eax
andl $0x3f, %eax
cltq
movq %rax, -0xa0(%rbp)
cmpq $0x0, -0xa0(%rbp)
jne 0x9e20c
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl 0xa(%rax), %eax
sarl $0x4, %eax
movq -0x30(%rbp), %rcx
movzbl 0xb(%rcx), %ecx
shll $0x4, %ecx
orl %ecx, %eax
andl $0x3f, %eax
cltq
movq %rax, -0xa8(%rbp)
cmpq $0x0, -0xa8(%rbp)
jne 0x9e243
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x30(%rbp), %rax
movzbl 0xb(%rax), %eax
sarl $0x2, %eax
andl $0x3f, %eax
cltq
movq %rax, -0xb0(%rbp)
cmpq $0x0, -0xb0(%rbp)
jne 0x9e26d
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
movq -0x10(%rbp), %rax
movq -0x38(%rbp), %rcx
movsd (%rax,%rcx,8), %xmm0
movq -0x10(%rbp), %rax
movq -0x40(%rbp), %rcx
addsd (%rax,%rcx,8), %xmm0
movq -0x10(%rbp), %rax
movq -0x48(%rbp), %rcx
movsd (%rax,%rcx,8), %xmm1
movq -0x10(%rbp), %rax
movq -0x50(%rbp), %rcx
addsd (%rax,%rcx,8), %xmm1
addsd %xmm1, %xmm0
movq -0x10(%rbp), %rax
movq -0x58(%rbp), %rcx
movsd (%rax,%rcx,8), %xmm1
movq -0x10(%rbp), %rax
movq -0x60(%rbp), %rcx
addsd (%rax,%rcx,8), %xmm1
addsd %xmm1, %xmm0
movq -0x10(%rbp), %rax
movq -0x68(%rbp), %rcx
movsd (%rax,%rcx,8), %xmm1
movq -0x10(%rbp), %rax
movq -0x70(%rbp), %rcx
addsd (%rax,%rcx,8), %xmm1
addsd %xmm1, %xmm0
movq -0x10(%rbp), %rax
movq -0x78(%rbp), %rcx
movsd (%rax,%rcx,8), %xmm1
movq -0x10(%rbp), %rax
movq -0x80(%rbp), %rcx
addsd (%rax,%rcx,8), %xmm1
addsd %xmm1, %xmm0
movq -0x10(%rbp), %rax
movq -0x88(%rbp), %rcx
movsd (%rax,%rcx,8), %xmm1
movq -0x10(%rbp), %rax
movq -0x90(%rbp), %rcx
addsd (%rax,%rcx,8), %xmm1
addsd %xmm1, %xmm0
movq -0x10(%rbp), %rax
movq -0x98(%rbp), %rcx
movsd (%rax,%rcx,8), %xmm1
movq -0x10(%rbp), %rax
movq -0xa0(%rbp), %rcx
addsd (%rax,%rcx,8), %xmm1
addsd %xmm1, %xmm0
movq -0x10(%rbp), %rax
movq -0xa8(%rbp), %rcx
movsd (%rax,%rcx,8), %xmm1
movq -0x10(%rbp), %rax
movq -0xb0(%rbp), %rcx
addsd (%rax,%rcx,8), %xmm1
addsd %xmm1, %xmm0
addsd -0x20(%rbp), %xmm0
movsd %xmm0, -0x20(%rbp)
movq -0x30(%rbp), %rax
addq $0xc, %rax
movq %rax, -0x30(%rbp)
movl -0x24(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x24(%rbp)
jmp 0x9dfa2
movl -0x28(%rbp), %ecx
movq -0x18(%rbp), %rax
movl %ecx, (%rax)
movsd -0x20(%rbp), %xmm0
addq $0x30, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)