// File: /workspace/github_c_makefile_star2_O2/markdryan[P]subtilis/arch/arm32/arm_encode.c
// Function: prv_encode_simd_instr
static void prv_encode_simd_instr(void *user_data, subtilis_arm_op_t *op,
				  subtilis_arm_instr_type_t type,
				  subtilis_arm_reg_only_instr_t *instr,
				  subtilis_error_t *err)
{
	uint32_t word;
	subtilis_arm_encode_ud_t *ud = user_data;
	const uint32_t opcodes[] = {
	    0x06200010, // SUBTILIS_ARM_SIMD_QADD16
	    0x06200090, // SUBTILIS_ARM_SIMD_QADD8
	    0x06200030, // SUBTILIS_ARM_SIMD_QADDSUBX
	    0x06200070, // SUBTILIS_ARM_SIMD_QSUB16
	    0x062000f0, // SUBTILIS_ARM_SIMD_QSUB8
	    0x06200050, // SUBTILIS_ARM_SIMD_QSUBADDX,
	    0x06100010, // SUBTILIS_ARM_SIMD_SADD16
	    0x06100090, // SUBTILIS_ARM_SIMD_SADD8
	    0x06100030, // SUBTILIS_ARM_SIMD_SADDSUBX,
	    0x06100070, // SUBTILIS_ARM_SIMD_SSUB16
	    0x061000f0, // SUBTILIS_ARM_SIMD_SSUB8,
	    0x06100050, // SUBTILIS_ARM_SIMD_SSUBADDX
	    0x06300010, // SUBTILIS_ARM_SIMD_SHADD16
	    0x06300090, // SUBTILIS_ARM_SIMD_SHADD8
	    0x06300030, // SUBTILIS_ARM_SIMD_SHADDSUBX,
	    0x06300070, // SUBTILIS_ARM_SIMD_SHSUB16,
	    0x063000f0, // SUBTILIS_ARM_SIMD_SHSUB8,
	    0x06300050, // SUBTILIS_ARM_SIMD_SHSUBADDX,
	    0x06500010, // SUBTILIS_ARM_SIMD_UADD16,
	    0x06500090, // SUBTILIS_ARM_SIMD_UADD8,
	    0x06500030, // SUBTILIS_ARM_SIMD_UADDSUBX,
	    0x06500070, // SUBTILIS_ARM_SIMD_USUB16,
	    0x065000f0, // SUBTILIS_ARM_SIMD_USUB8,
	    0x06500050, // SUBTILIS_ARM_SIMD_USUBADDX,
	    0x06700010, // SUBTILIS_ARM_SIMD_UHADD16,
	    0x06700090, // SUBTILIS_ARM_SIMD_UHADD8,
	    0x06700030, // SUBTILIS_ARM_SIMD_UHADDSUBX,
	    0x06700070, // SUBTILIS_ARM_SIMD_UHSUB16,
	    0x067000f0, // SUBTILIS_ARM_SIMD_UHSUB8,
	    0x06700050, // SUBTILIS_ARM_SIMD_UHSUBADDX,
	    0x06600010, // SUBTILIS_ARM_SIMD_UQADD16,
	    0x06600090, // SUBTILIS_ARM_SIMD_UQADD8,
	    0x06600030, // SUBTILIS_ARM_SIMD_UQADDSUBX,
	    0x06600070, // SUBTILIS_ARM_SIMD_UQSUB16,
	    0x066000f0, // SUBTILIS_ARM_SIMD_UQSUB8,
	    0x06600050, // SUBTILIS_ARM_SIMD_UQSUBADDX,
	};
	size_t index = type - SUBTILIS_ARM_SIMD_QADD16;

	if (type > SUBTILIS_ARM_SIMD_UQSUBADDX) {
		subtilis_error_set_assertion_failed(err);
		return;
	}

	prv_check_pool(ud, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;

	word = opcodes[index];
	word |= instr->ccode << 28;
	word |= (instr->dest & 0xf) << 12;
	word |= (instr->op1 & 0xf) << 16;
	word |= (instr->op2 & 0xf);

	prv_ensure_code(ud, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;
	prv_add_word(ud, word, err);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %r8, %rbx
cmpl $0xa9, %edx
jb 0x559fc
leaq 0x1a412(%rip), %rdx     # 0x6fdf0
pushq $0xf
popq %rsi
movq %rbx, %rdi
movl $0x8be, %ecx            # imm = 0x8BE
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x1429e
movq %rcx, %r15
movl %edx, %r12d
movq %rdi, %r14
movq %rbx, %rsi
callq 0x55e87
cmpl $0x0, (%rbx)
jne 0x55a47
addl $0xffffff7b, %r12d      # imm = 0xFFFFFF7B
leaq 0x1a2c0(%rip), %rax     # 0x6fce0
movl (%rax,%r12,4), %eax
movl %eax, 0x4(%rsp)
movl (%r15), %ebp
movq 0x8(%r15), %r13
movq 0x10(%r15), %r12
movq 0x18(%r15), %r15
movq %r14, %rdi
movq %rbx, %rsi
callq 0x55e8e
cmpl $0x0, (%rbx)
je 0x55a56
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
andl $0xf, %r12d
shll $0x10, %r12d
shll $0xc, %r13d
movzwl %r13w, %eax
shll $0x1c, %ebp
orl 0x4(%rsp), %ebp
orl %eax, %ebp
andl $0xf, %r15d
orl %r12d, %r15d
orl %ebp, %r15d
movq %r14, %rdi
movl %r15d, %esi
movq %rbx, %rdx
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x55e99