// File: /workspace/github_cpp_makefile_star2_O2/CMU-SAFARI[P]MQSim/src/ssd/Address_Mapping_Unit_Page_Level.cpp
// Function: SSD_Components::Address_Mapping_Unit_Page_Level::allocate_plane_for_preconditioning(unsigned short, unsigned long, NVM::FlashMemory::Physical_Page_Address&)
void Address_Mapping_Unit_Page_Level::allocate_plane_for_preconditioning(stream_id_type stream_id, LPA_type lpn, NVM::FlashMemory::Physical_Page_Address& targetAddress)
	{
		AddressMappingDomain* domain = domains[stream_id];

		switch (domain->PlaneAllocationScheme) {
			case Flash_Plane_Allocation_Scheme_Type::CWDP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CWPD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Channel_no * domain->Chip_no * domain->Plane_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Channel_no * domain->Chip_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CDWP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CDPW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CPWD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::CPDW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)(lpn % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Channel_no) % domain->Plane_no)];
				break;
				//Static: Way first
			case Flash_Plane_Allocation_Scheme_Type::WCDP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no * domain->Die_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WCPD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no * domain->Plane_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WDCP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Die_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Die_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WDPC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Die_no * domain->Plane_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Die_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WPCD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Plane_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Plane_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::WPDC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Plane_no * domain->Die_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)(lpn % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Chip_no * domain->Plane_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Chip_no) % domain->Plane_no)];
				break;
				//Static: Die first
			case Flash_Plane_Allocation_Scheme_Type::DCWP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Die_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no * domain->Chip_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DCPW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Die_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no * domain->Plane_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DWCP:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Die_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no * domain->Channel_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DWPC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no * domain->Plane_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Die_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / (domain->Die_no * domain->Chip_no)) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DPCW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Die_no * domain->Plane_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Plane_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Die_no) % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::DPWC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Die_no * domain->Plane_no * domain->Chip_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Die_no * domain->Plane_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)(lpn % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)((lpn / domain->Die_no) % domain->Plane_no)];
				break;
				//Static: Plane first
			case Flash_Plane_Allocation_Scheme_Type::PCWD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no * domain->Chip_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PCDW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no * domain->Die_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PWCD:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no * domain->Channel_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PWDC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no * domain->Die_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Chip_no)) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PDCW:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no * domain->Channel_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			case Flash_Plane_Allocation_Scheme_Type::PDWC:
				targetAddress.ChannelID = domain->Channel_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no * domain->Chip_no)) % domain->Channel_no)];
				targetAddress.ChipID = domain->Chip_ids[(unsigned int)((lpn / (domain->Plane_no * domain->Die_no)) % domain->Chip_no)];
				targetAddress.DieID = domain->Die_ids[(unsigned int)((lpn / domain->Plane_no) % domain->Die_no)];
				targetAddress.PlaneID = domain->Plane_ids[(unsigned int)(lpn % domain->Plane_no)];
				break;
			default:
				PRINT_ERROR("Unknown plane allocation scheme type!")
		}
	}

// Assembly:
pushq %r14
pushq %rbx
pushq %rax
movq %rdx, %r8
movq 0xa8(%rdi), %rax
movl %esi, %edx
movq (%rax,%rdx,8), %rdi
movl 0x208(%rdi), %eax
cmpq $0x17, %rax
ja 0x24a4e
leaq 0x2235b(%rip), %rdx     # 0x46308
movslq (%rdx,%rax,4), %rax
addq %rdx, %rax
jmpq *%rax
movq 0x210(%rdi), %rsi
movl 0x218(%rdi), %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r9
movl (%rsi,%rdx,4), %edx
movl %edx, (%rcx)
movq 0x220(%rdi), %r10
movl 0x228(%rdi), %esi
xorl %edx, %edx
divq %rsi
movl (%r10,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %r10
imull %r9d, %esi
movq %r8, %rax
xorl %edx, %edx
divq %rsi
movl 0x238(%rdi), %r9d
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, 0x8(%rcx)
imull %esi, %r9d
jmp 0x2476d
movq 0x210(%rdi), %r10
movl 0x238(%rdi), %r9d
movl 0x248(%rdi), %esi
movl %esi, %r11d
imull %r9d, %r11d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movl 0x218(%rdi), %ebx
xorl %edx, %edx
divq %rbx
movl (%r10,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %r10
imull %ebx, %r11d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movl 0x228(%rdi), %r11d
xorl %edx, %edx
divq %r11
movl (%r10,%rdx,4), %eax
jmp 0x2451e
movq 0x210(%rdi), %rsi
movl 0x238(%rdi), %r11d
movl 0x228(%rdi), %r10d
movl %r10d, %r9d
imull %r11d, %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r9
movl 0x218(%rdi), %ebx
xorl %edx, %edx
divq %rbx
movl (%rsi,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %r14
movq %r8, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rsi
xorl %edx, %edx
divq %r10
movl (%r14,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %rax
movl (%rax,%rsi,4), %eax
movl %eax, 0x8(%rcx)
imull %ebx, %r9d
jmp 0x2476d
movq 0x210(%rdi), %rbx
movl 0x228(%rdi), %esi
movl 0x248(%rdi), %r9d
movl %r9d, %r11d
imull %esi, %r11d
movl 0x238(%rdi), %r10d
movl %r10d, %r14d
imull %r11d, %r14d
movq %r8, %rax
xorl %edx, %edx
divq %r14
movl 0x218(%rdi), %r14d
xorl %edx, %edx
divq %r14
movl (%rbx,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %rbx
movq %r8, %rax
xorl %edx, %edx
divq %rsi
movq %rax, %rsi
movl (%rbx,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %rbx
movq %r8, %rax
xorl %edx, %edx
divq %r11
xorl %edx, %edx
divq %r10
movl (%rbx,%rdx,4), %eax
jmp 0x2486a
movq 0x210(%rdi), %r9
movl 0x218(%rdi), %r10d
movq %r8, %rax
xorl %edx, %edx
divq %r10
movq %rax, %rsi
movl (%r9,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %r11
movl 0x248(%rdi), %r9d
movl %r9d, %ebx
imull %r10d, %ebx
movq %r8, %rax
xorl %edx, %edx
divq %rbx
movl 0x228(%rdi), %r10d
xorl %edx, %edx
divq %r10
movl (%r11,%rdx,4), %eax
jmp 0x24844
movq 0x210(%rdi), %r10
movl 0x238(%rdi), %r11d
movl 0x218(%rdi), %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rsi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %r10
imull %r11d, %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r9
movl 0x228(%rdi), %r11d
xorl %edx, %edx
divq %r11
movl (%r10,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %rax
movl (%rax,%rsi,4), %eax
movl %eax, 0x8(%rcx)
imull %r11d, %r9d
jmp 0x2476d
movq 0x210(%rdi), %rbx
movl 0x228(%rdi), %r11d
movl 0x238(%rdi), %r10d
movl %r10d, %r9d
imull %r11d, %r9d
movl 0x248(%rdi), %esi
movl %esi, %r14d
imull %r9d, %r14d
movq %r8, %rax
xorl %edx, %edx
divq %r14
movl 0x218(%rdi), %r14d
xorl %edx, %edx
divq %r14
movl (%rbx,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %rbx
movq %r8, %rax
xorl %edx, %edx
divq %r11
movl (%rbx,%rdx,4), %edx
movl %edx, 0x4(%rcx)
movq 0x230(%rdi), %r11
xorl %edx, %edx
divq %r10
movl (%r11,%rdx,4), %eax
movl %eax, 0x8(%rcx)
movq %r8, %rax
xorl %edx, %edx
divq %r9
jmp 0x2477b
movq 0x210(%rdi), %r9
movl 0x218(%rdi), %r10d
movq %r8, %rax
xorl %edx, %edx
divq %r10
movq %rax, %rsi
movl (%r9,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %r9
movl 0x238(%rdi), %r11d
movl %r11d, %ebx
imull %r10d, %ebx
movq %r8, %rax
xorl %edx, %edx
divq %rbx
movl 0x228(%rdi), %r10d
xorl %edx, %edx
divq %r10
movl (%r9,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %r9
movq %rsi, %rax
xorl %edx, %edx
divq %r11
movl (%r9,%rdx,4), %eax
movl %eax, 0x8(%rcx)
imull %ebx, %r10d
movq %r8, %rax
xorl %edx, %edx
divq %r10
jmp 0x24775
movq 0x210(%rdi), %rbx
movl 0x238(%rdi), %esi
movl 0x228(%rdi), %r11d
movl %r11d, %r10d
imull %esi, %r10d
movl 0x248(%rdi), %r9d
movl %r9d, %r14d
imull %r10d, %r14d
movq %r8, %rax
xorl %edx, %edx
divq %r14
movl 0x218(%rdi), %r14d
xorl %edx, %edx
divq %r14
movl (%rbx,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %rbx
movq %r8, %rax
xorl %edx, %edx
divq %rsi
movq %rdx, %rsi
xorl %edx, %edx
divq %r11
movl (%rbx,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %rax
movl (%rax,%rsi,4), %eax
jmp 0x243d2
movq 0x210(%rdi), %r9
movl 0x218(%rdi), %r11d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movq %rax, %rsi
movl (%r9,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %rbx
movl 0x248(%rdi), %r9d
movl 0x238(%rdi), %r14d
movl %r14d, %r10d
imull %r11d, %r10d
movl %r10d, %r11d
imull %r9d, %r11d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movl 0x228(%rdi), %r11d
xorl %edx, %edx
divq %r11
movl (%rbx,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %r11
movq %rsi, %rax
xorl %edx, %edx
divq %r14
movl (%r11,%rdx,4), %eax
movl %eax, 0x8(%rcx)
movq %r8, %rax
xorl %edx, %edx
divq %r10
jmp 0x24870
movq 0x210(%rdi), %r10
movl 0x228(%rdi), %r11d
movl 0x218(%rdi), %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rsi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %rax
movl (%rax,%rsi,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %rsi
imull %r11d, %r9d
movl 0x248(%rdi), %r10d
movl %r10d, %r11d
imull %r9d, %r11d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movl 0x238(%rdi), %r11d
xorl %edx, %edx
divq %r11
movl (%rsi,%rdx,4), %eax
jmp 0x246f7
movq 0x210(%rdi), %rsi
movl 0x218(%rdi), %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r9
movl (%rsi,%rdx,4), %edx
movl %edx, (%rcx)
movq 0x220(%rdi), %r10
movl 0x228(%rdi), %esi
xorl %edx, %edx
divq %rsi
movl (%r10,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %r10
imull %r9d, %esi
movl 0x248(%rdi), %r9d
movl %r9d, %r11d
imull %esi, %r11d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movl 0x238(%rdi), %r11d
xorl %edx, %edx
divq %r11
movl (%r10,%rdx,4), %eax
movl %eax, 0x8(%rcx)
movq %r8, %rax
xorl %edx, %edx
divq %rsi
jmp 0x24870
movq 0x210(%rdi), %r11
movl 0x238(%rdi), %r9d
movl 0x248(%rdi), %esi
movl %esi, %ebx
imull %r9d, %ebx
movl 0x228(%rdi), %r10d
movl %r10d, %r14d
imull %ebx, %r14d
movq %r8, %rax
xorl %edx, %edx
divq %r14
movl 0x218(%rdi), %r14d
xorl %edx, %edx
divq %r14
movl (%r11,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %r11
movq %r8, %rax
xorl %edx, %edx
divq %rbx
xorl %edx, %edx
divq %r10
movl (%r11,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %r10
movq %r8, %rax
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %edx
movl %edx, 0x8(%rcx)
jmp 0x2477b
movq 0x210(%rdi), %rsi
movl 0x248(%rdi), %r11d
movl 0x228(%rdi), %r10d
movl %r10d, %r9d
imull %r11d, %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r9
movl 0x218(%rdi), %ebx
xorl %edx, %edx
divq %rbx
movl (%rsi,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %r14
movq %r8, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rsi
xorl %edx, %edx
divq %r10
movl (%r14,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %r10
imull %ebx, %r9d
jmp 0x247e1
movq 0x210(%rdi), %r9
movl 0x218(%rdi), %r11d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movq %rax, %rsi
movl (%r9,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %rbx
movl 0x248(%rdi), %r9d
movl 0x238(%rdi), %r10d
movl %r9d, %r14d
imull %r11d, %r14d
movl %r14d, %r11d
imull %r10d, %r11d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movl 0x228(%rdi), %r11d
xorl %edx, %edx
divq %r11
movl (%rbx,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %r11
movq %r8, %rax
xorl %edx, %edx
divq %r14
xorl %edx, %edx
divq %r10
jmp 0x24866
movq 0x210(%rdi), %rbx
movl 0x248(%rdi), %esi
movl 0x228(%rdi), %r11d
movl %r11d, %r10d
imull %esi, %r10d
movl 0x238(%rdi), %r9d
movl %r9d, %r14d
imull %r10d, %r14d
movq %r8, %rax
xorl %edx, %edx
divq %r14
movl 0x218(%rdi), %r14d
xorl %edx, %edx
divq %r14
movl (%rbx,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %rbx
movq %r8, %rax
xorl %edx, %edx
divq %rsi
movq %rdx, %rsi
xorl %edx, %edx
divq %r11
movl (%rbx,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %r11
movq %r8, %rax
xorl %edx, %edx
divq %r10
xorl %edx, %edx
divq %r9
movl (%r11,%rdx,4), %eax
jmp 0x24a33
movq 0x210(%rdi), %r10
movl 0x238(%rdi), %r11d
movl 0x218(%rdi), %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rsi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %rbx
imull %r11d, %r9d
movl 0x248(%rdi), %r10d
movl %r10d, %r11d
imull %r9d, %r11d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movl 0x228(%rdi), %r11d
xorl %edx, %edx
divq %r11
movl (%rbx,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %rax
movl (%rax,%rsi,4), %eax
movl %eax, 0x8(%rcx)
movq %r8, %rax
xorl %edx, %edx
divq %r9
xorl %edx, %edx
divq %r10
jmp 0x24875
movq 0x210(%rdi), %r10
movl 0x228(%rdi), %r11d
movl 0x218(%rdi), %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rsi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %rax
movl (%rax,%rsi,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %rsi
imull %r11d, %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r9
movl 0x238(%rdi), %r10d
xorl %edx, %edx
divq %r10
movl (%rsi,%rdx,4), %eax
movl %eax, 0x8(%rcx)
imull %r10d, %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r9
movl 0x248(%rdi), %esi
xorl %edx, %edx
divq %rsi
jmp 0x24875
movq 0x210(%rdi), %r10
movl 0x248(%rdi), %r11d
movl 0x218(%rdi), %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rsi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %r10
imull %r11d, %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r9
movl 0x228(%rdi), %r11d
xorl %edx, %edx
divq %r11
movl (%r10,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %r10
imull %r11d, %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r9
movl 0x238(%rdi), %r8d
xorl %edx, %edx
divq %r8
jmp 0x24a2f
movq 0x210(%rdi), %rsi
movl 0x228(%rdi), %r11d
movl 0x248(%rdi), %r9d
movl %r9d, %r10d
imull %r11d, %r10d
movq %r8, %rax
xorl %edx, %edx
divq %r10
movl 0x218(%rdi), %ebx
xorl %edx, %edx
divq %rbx
movl (%rsi,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %r14
movq %r8, %rax
xorl %edx, %edx
divq %r11
movq %rax, %rsi
movl (%r14,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %r11
imull %ebx, %r10d
movq %r8, %rax
xorl %edx, %edx
divq %r10
movl 0x238(%rdi), %r8d
xorl %edx, %edx
divq %r8
movl (%r11,%rdx,4), %eax
movl %eax, 0x8(%rcx)
movq %rsi, %rax
xorl %edx, %edx
divq %r9
movq %rdx, %rsi
jmp 0x24a36
movq 0x210(%rdi), %r11
movl 0x228(%rdi), %ebx
movl 0x238(%rdi), %r9d
movl %r9d, %esi
imull %ebx, %esi
movq %r8, %rax
xorl %edx, %edx
divq %rsi
movl 0x218(%rdi), %r10d
xorl %edx, %edx
divq %r10
movl (%r11,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %r11
movq %r8, %rax
xorl %edx, %edx
divq %rbx
movl (%r11,%rdx,4), %edx
movl %edx, 0x4(%rcx)
movq 0x230(%rdi), %r11
xorl %edx, %edx
divq %r9
movl (%r11,%rdx,4), %eax
movl %eax, 0x8(%rcx)
imull %r10d, %esi
movq %r8, %rax
xorl %edx, %edx
divq %rsi
jmp 0x24775
movq 0x210(%rdi), %r10
movl 0x248(%rdi), %esi
movl 0x238(%rdi), %r9d
movl %r9d, %r11d
imull %esi, %r11d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movl 0x218(%rdi), %ebx
xorl %edx, %edx
divq %rbx
movl (%r10,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %r10
imull %ebx, %r11d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movl 0x228(%rdi), %r11d
xorl %edx, %edx
divq %r11
movl (%r10,%rdx,4), %eax
jmp 0x24a15
movq 0x210(%rdi), %r10
movl 0x248(%rdi), %r11d
movl 0x218(%rdi), %r9d
movq %r8, %rax
xorl %edx, %edx
divq %r11
movq %rdx, %rsi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %r10
imull %r11d, %r9d
movl 0x238(%rdi), %r11d
movl %r11d, %ebx
imull %r9d, %ebx
movq %r8, %rax
xorl %edx, %edx
divq %rbx
movl 0x228(%rdi), %ebx
xorl %edx, %edx
divq %rbx
movl (%r10,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %r10
movq %r8, %rax
xorl %edx, %edx
divq %r9
xorl %edx, %edx
divq %r11
jmp 0x24a2f
movq 0x210(%rdi), %r11
movl 0x248(%rdi), %esi
movl 0x238(%rdi), %r9d
movl %r9d, %ebx
imull %esi, %ebx
movl 0x228(%rdi), %r10d
movl %r10d, %r14d
imull %ebx, %r14d
movq %r8, %rax
xorl %edx, %edx
divq %r14
movl 0x218(%rdi), %r14d
xorl %edx, %edx
divq %r14
movl (%r11,%rdx,4), %eax
movl %eax, (%rcx)
movq 0x220(%rdi), %r11
movq %r8, %rax
xorl %edx, %edx
divq %rbx
xorl %edx, %edx
divq %r10
movl (%r11,%rdx,4), %eax
movl %eax, 0x4(%rcx)
movq 0x230(%rdi), %r10
movq %r8, %rax
xorl %edx, %edx
divq %rsi
movq %rdx, %rsi
xorl %edx, %edx
divq %r9
movl (%r10,%rdx,4), %eax
movl %eax, 0x8(%rcx)
shlq $0x2, %rsi
addq 0x240(%rdi), %rsi
movl (%rsi), %eax
movl %eax, 0xc(%rcx)
addq $0x8, %rsp
popq %rbx
popq %r14
retq
movq 0x3d59b(%rip), %rbx     # 0x61ff0
leaq 0x1fb2c(%rip), %rsi     # 0x44588
movq %rbx, %rdi
callq 0x7360
leaq 0x21ed9(%rip), %rsi     # 0x46944
movq %rbx, %rdi
callq 0x7360
movq %rax, %rdi
callq 0x71a0
movq 0x3d54e(%rip), %rdi     # 0x61fd0
callq 0x73d0
pushq $0x1
popq %rdi
callq 0x73e0
nop