// File: /workspace/github_c_makefile_star2_O2/mmcco[P]sljit/sljit_src/sljitNativeX86_common.c
// Function: sljit_emit_op_flags
int sljit_emit_op_flags(struct sljit_compiler *compiler, int op,
	int dst, long dstw,
	int src, long srcw,
	int type)
{
	u_char *inst;
	u_char cond_set = 0;
#if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
	int reg;
#else
	/* CHECK_EXTRA_REGS migh overwrite these values. */
	int dst_save = dst;
	long dstw_save = dstw;
#endif

	CHECK_ERROR();
	CHECK(check_sljit_emit_op_flags(compiler, op, dst, dstw, src, srcw, type));

	if (dst == SLJIT_UNUSED)
		return SLJIT_SUCCESS;

	ADJUST_LOCAL_OFFSET(dst, dstw);
	CHECK_EXTRA_REGS(dst, dstw, (void)0);
	if (compiler->flags_saved)
		FAIL_IF(emit_restore_flags(compiler, op & SLJIT_KEEP_FLAGS));

	type &= 0xff;
	/* setcc = jcc + 0x10. */
	cond_set = get_jump_code(type) + 0x10;

#if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
	if (GET_OPCODE(op) == SLJIT_OR && !GET_ALL_FLAGS(op) && FAST_IS_REG(dst) && dst == src) {
		inst = ensure_buf(compiler, 1 + 4 + 3);
		FAIL_IF(!inst);
		INC_SIZE(4 + 3);
		/* Set low reg to conditional flag. */
		*inst++ = (reg_map[TMP_REG1] <= 7) ? REX : REX_B;
		*inst++ = GROUP_0F;
		*inst++ = cond_set;
		*inst++ = MOD_REG | reg_lmap[TMP_REG1];
		*inst++ = REX | (reg_map[TMP_REG1] <= 7 ? 0 : REX_R) | (reg_map[dst] <= 7 ? 0 : REX_B);
		*inst++ = OR_rm8_r8;
		*inst++ = MOD_REG | (reg_lmap[TMP_REG1] << 3) | reg_lmap[dst];
		return SLJIT_SUCCESS;
	}

	reg = (op == SLJIT_MOV && FAST_IS_REG(dst)) ? dst : TMP_REG1;

	inst = ensure_buf(compiler, 1 + 4 + 4);
	FAIL_IF(!inst);
	INC_SIZE(4 + 4);
	/* Set low reg to conditional flag. */
	*inst++ = (reg_map[reg] <= 7) ? REX : REX_B;
	*inst++ = GROUP_0F;
	*inst++ = cond_set;
	*inst++ = MOD_REG | reg_lmap[reg];
	*inst++ = REX_W | (reg_map[reg] <= 7 ? 0 : (REX_B | REX_R));
	*inst++ = GROUP_0F;
	*inst++ = MOVZX_r_rm8;
	*inst = MOD_REG | (reg_lmap[reg] << 3) | reg_lmap[reg];

	if (reg != TMP_REG1)
		return SLJIT_SUCCESS;

	if (GET_OPCODE(op) < SLJIT_ADD) {
		compiler->mode32 = GET_OPCODE(op) != SLJIT_MOV;
		return emit_mov(compiler, dst, dstw, TMP_REG1, 0);
	}
#if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) \
		|| (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS)
	compiler->skip_checks = 1;
#endif
	return sljit_emit_op2(compiler, op, dst, dstw, dst, dstw, TMP_REG1, 0);
#else /* SLJIT_CONFIG_X86_64 */
	if (GET_OPCODE(op) < SLJIT_ADD && FAST_IS_REG(dst)) {
		if (reg_map[dst] <= 4) {
			/* Low byte is accessible. */
			inst = ensure_buf(compiler, 1 + 3 + 3);
			FAIL_IF(!inst);
			INC_SIZE(3 + 3);
			/* Set low byte to conditional flag. */
			*inst++ = GROUP_0F;
			*inst++ = cond_set;
			*inst++ = MOD_REG | reg_map[dst];

			*inst++ = GROUP_0F;
			*inst++ = MOVZX_r_rm8;
			*inst = MOD_REG | (reg_map[dst] << 3) | reg_map[dst];
			return SLJIT_SUCCESS;
		}

		/* Low byte is not accessible. */
		if (cpu_has_cmov == -1)
			get_cpu_features();

		if (cpu_has_cmov) {
			EMIT_MOV(compiler, TMP_REG1, 0, SLJIT_IMM, 1);
			/* a xor reg, reg operation would overwrite the flags. */
			EMIT_MOV(compiler, dst, 0, SLJIT_IMM, 0);

			inst = ensure_buf(compiler, 1 + 3);
			FAIL_IF(!inst);
			INC_SIZE(3);

			*inst++ = GROUP_0F;
			/* cmovcc = setcc - 0x50. */
			*inst++ = cond_set - 0x50;
			*inst++ = MOD_REG | (reg_map[dst] << 3) | reg_map[TMP_REG1];
			return SLJIT_SUCCESS;
		}

		inst = ensure_buf(compiler, 1 + 1 + 3 + 3 + 1);
		FAIL_IF(!inst);
		INC_SIZE(1 + 3 + 3 + 1);
		*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
		/* Set al to conditional flag. */
		*inst++ = GROUP_0F;
		*inst++ = cond_set;
		*inst++ = MOD_REG | 0 /* eax */;

		*inst++ = GROUP_0F;
		*inst++ = MOVZX_r_rm8;
		*inst++ = MOD_REG | (reg_map[dst] << 3) | 0 /* eax */;
		*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
		return SLJIT_SUCCESS;
	}

	if (GET_OPCODE(op) == SLJIT_OR && !GET_ALL_FLAGS(op) && FAST_IS_REG(dst) && dst == src && reg_map[dst] <= 4) {
		SLJIT_COMPILE_ASSERT(reg_map[SLJIT_R0] == 0, scratch_reg1_must_be_eax);
		if (dst != SLJIT_R0) {
			inst = ensure_buf(compiler, 1 + 1 + 3 + 2 + 1);
			FAIL_IF(!inst);
			INC_SIZE(1 + 3 + 2 + 1);
			/* Set low reg to conditional flag. */
			*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
			*inst++ = GROUP_0F;
			*inst++ = cond_set;
			*inst++ = MOD_REG | 0 /* eax */;
			*inst++ = OR_rm8_r8;
			*inst++ = MOD_REG | (0 /* eax */ << 3) | reg_map[dst];
			*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
		}
		else {
			inst = ensure_buf(compiler, 1 + 2 + 3 + 2 + 2);
			FAIL_IF(!inst);
			INC_SIZE(2 + 3 + 2 + 2);
			/* Set low reg to conditional flag. */
			*inst++ = XCHG_r_rm;
			*inst++ = MOD_REG | (1 /* ecx */ << 3) | reg_map[TMP_REG1];
			*inst++ = GROUP_0F;
			*inst++ = cond_set;
			*inst++ = MOD_REG | 1 /* ecx */;
			*inst++ = OR_rm8_r8;
			*inst++ = MOD_REG | (1 /* ecx */ << 3) | 0 /* eax */;
			*inst++ = XCHG_r_rm;
			*inst++ = MOD_REG | (1 /* ecx */ << 3) | reg_map[TMP_REG1];
		}
		return SLJIT_SUCCESS;
	}

	/* Set TMP_REG1 to the bit. */
	inst = ensure_buf(compiler, 1 + 1 + 3 + 3 + 1);
	FAIL_IF(!inst);
	INC_SIZE(1 + 3 + 3 + 1);
	*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
	/* Set al to conditional flag. */
	*inst++ = GROUP_0F;
	*inst++ = cond_set;
	*inst++ = MOD_REG | 0 /* eax */;

	*inst++ = GROUP_0F;
	*inst++ = MOVZX_r_rm8;
	*inst++ = MOD_REG | (0 << 3) /* eax */ | 0 /* eax */;

	*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];

	if (GET_OPCODE(op) < SLJIT_ADD)
		return emit_mov(compiler, dst, dstw, TMP_REG1, 0);

#if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) \
		|| (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS)
	compiler->skip_checks = 1;
#endif
	return sljit_emit_op2(compiler, op, dst_save, dstw_save, dst_save, dstw_save, TMP_REG1, 0);
#endif /* SLJIT_CONFIG_X86_64 */
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movl (%rdi), %eax
testl %eax, %eax
je 0x1b172
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq %r9, %r13
movl 0x50(%rsp), %r9d
cmpl $0x200, %r9d            # imm = 0x200
jae 0x1b8d7
movzbl %r9b, %r14d
cmpl $0x16, %r14d
jae 0x1b8e5
movl %r8d, %r12d
movl %edx, %r15d
movl %esi, %ebp
movq %rdi, %rbx
cmpl $0x20, %esi
jne 0x1b1aa
pushq $0x20
popq %rax
jmp 0x1b1e4
movl %ebp, %eax
andl $0xffff80ff, %eax       # imm = 0xFFFF80FF
leal -0x65(%rax), %edx
cmpl $0x3, %edx
jb 0x1b1c5
leal -0x25(%rax), %edx
cmpl $0x2, %edx
jae 0x1b91d
testw $0x3c00, %bp            # imm = 0x3C00
jne 0x1b8f3
movl %ebp, %edx
notl %edx
testw $0x4200, %dx            # imm = 0x4200
je 0x1b901
cmpl $0x5f, %eax
ja 0x1b1ff
testl %r12d, %r12d
jne 0x1b1ee
testq %r13, %r13
je 0x1b211
leaq 0x610a(%rip), %rdi      # 0x212ff
movl $0x57a, %esi            # imm = 0x57A
jmp 0x1b929
cmpl %r15d, %r12d
jne 0x1b90f
cmpq %rcx, %r13
jne 0x1b90f
movl 0x48(%rbx), %r8d
cmpl $-0x1, %r8d
je 0x1b64c
movl 0x4c(%rbx), %esi
cmpl $-0x1, %esi
je 0x1b64c
pushq $0xc
popq %r10
testl %r15d, %r15d
je 0x1b260
setg %dl
cmpl %r15d, %r8d
setge %dil
testb %dil, %dl
jne 0x1b260
movl %r10d, %edx
subl %esi, %edx
cmpl %r15d, %edx
setge %sil
cmpl $0xd, %r15d
setge %dil
orb %sil, %dil
jne 0x1b33d
testq %rcx, %rcx
jne 0x1b64c
movq 0x78(%rbx), %rdi
testq %rdi, %rdi
movq %rcx, 0x8(%rsp)
je 0x1b70d
movl %r9d, 0x14(%rsp)
btl $0x8, %ebp
leaq 0x316d(%rip), %r10      # 0x1e3f8
leaq 0x61fa(%rip), %rdx      # 0x2148c
cmovaeq %r10, %rdx
leal -0x60(%rax), %ecx
leal -0x20(%rax), %esi
cmpl $0x60, %eax
leaq 0xe9aa(%rip), %rax      # 0x29c50
leaq (%rax,%rcx,8), %rax
leaq 0xe8ff(%rip), %rcx      # 0x29bb0
leaq (%rcx,%rsi,8), %rcx
cmovaeq %rax, %rcx
movq (%rcx), %rcx
btl $0x9, %ebp
leaq 0x623a(%rip), %r8       # 0x21501
cmovaeq %r10, %r8
btl $0xe, %ebp
leaq 0x623a(%rip), %r9       # 0x21510
cmovaeq %r10, %r9
leaq 0x6377(%rip), %rsi      # 0x21658
xorl %eax, %eax
callq 0x20c0
testb $0x40, %r15b
jne 0x1b321
testb %r15b, %r15b
movq 0x8(%rsp), %rdx
js 0x1b364
testl %r15d, %r15d
je 0x1b412
movq 0x78(%rbx), %rdi
cmpl %r15d, 0x48(%rbx)
jge 0x1b44b
pushq $0xc
popq %rdx
subl %r15d, %edx
leaq 0x6246(%rip), %rsi      # 0x21562
jmp 0x1b456
movq 0x78(%rbx), %rdi
leaq 0x60d5(%rip), %rsi      # 0x21401
movq 0x8(%rsp), %rdx
xorl %eax, %eax
callq 0x20c0
jmp 0x1b516
cmpl $0x8d, %r15d
jne 0x1b3a2
testq %rcx, %rcx
js 0x1b64c
movslq 0x80(%rbx), %rdx
cmpq %rcx, %rdx
jg 0x1b269
jmp 0x1b64c
movl %r14d, 0x4(%rsp)
movl %r15d, %r14d
movq 0x78(%rbx), %rsi
andl $0x3f, %r14d
je 0x1b42d
pushq $0x5b
popq %rdi
callq 0x20a0
movq 0x78(%rbx), %rdi
cmpl 0x48(%rbx), %r14d
jle 0x1b462
pushq $0xc
popq %rdx
subl %r14d, %edx
leaq 0x61c5(%rip), %rsi      # 0x21562
jmp 0x1b46f
testb %r15b, %r15b
jns 0x1b64c
movl %r15d, %esi
andl $0x3f, %esi
je 0x1b637
cmpl %r8d, %esi
jle 0x1b3cd
cmpl $0xc, %esi
ja 0x1b64c
cmpl %edx, %esi
jle 0x1b64c
testw $0x3f00, %r15w          # imm = 0x3F00
je 0x1b63f
movl %r15d, %esi
shrl $0x8, %esi
andl $0x3f, %esi
setne %dil
cmpl %r8d, %esi
setle %r8b
testb %r8b, %dil
jne 0x1b403
cmpl $0xc, %esi
ja 0x1b64c
cmpl %edx, %esi
jle 0x1b64c
cmpq $0x4, %rcx
jb 0x1b63f
jmp 0x1b64c
movq 0x78(%rbx), %rcx
leaq 0x6001(%rip), %rdi      # 0x2141e
pushq $0x6
popq %rsi
pushq $0x1
popq %rdx
callq 0x2130
jmp 0x1b516
leaq 0x5fe3(%rip), %rax      # 0x21417
movq %rsi, %rdi
movq %rax, %rsi
xorl %eax, %eax
callq 0x20c0
movl 0x4(%rsp), %r14d
jmp 0x1b516
leal -0x1(%r15), %edx
leaq 0x6107(%rip), %rsi      # 0x2155d
xorl %eax, %eax
callq 0x20c0
jmp 0x1b516
decl %r14d
leaq 0x60f1(%rip), %rsi      # 0x2155d
movl %r14d, %edx
xorl %eax, %eax
callq 0x20c0
testw $0x3f00, %r15w          # imm = 0x3F00
movl 0x4(%rsp), %r14d
je 0x1b4bb
movq 0x78(%rbx), %rcx
leaq 0x5f78(%rip), %rdi      # 0x21406
pushq $0x3
popq %rsi
pushq $0x1
popq %rdx
callq 0x2130
movl %r15d, %edx
shrl $0x8, %edx
andl $0x3f, %edx
movq 0x78(%rbx), %rdi
cmpl 0x48(%rbx), %edx
jle 0x1b4d9
pushq $0xc
popq %rax
subl %edx, %eax
leaq 0x60ab(%rip), %rsi      # 0x21562
movl %eax, %edx
jmp 0x1b4e2
movq 0x8(%rsp), %rdx
testq %rdx, %rdx
je 0x1b50a
movq 0x78(%rbx), %rdi
leaq 0x5f40(%rip), %rsi      # 0x21410
xorl %eax, %eax
callq 0x20c0
jmp 0x1b50a
decl %edx
leaq 0x607b(%rip), %rsi      # 0x2155d
xorl %eax, %eax
callq 0x20c0
movq 0x8(%rsp), %rcx
testq %rcx, %rcx
je 0x1b50a
movq 0x78(%rbx), %rdi
pushq $0x1
popq %rdx
shll %cl, %edx
leaq 0x5f07(%rip), %rsi      # 0x2140a
xorl %eax, %eax
callq 0x20c0
movq 0x78(%rbx), %rsi
pushq $0x5d
popq %rdi
callq 0x20a0
testl %r12d, %r12d
je 0x1b6b4
movq 0x78(%rbx), %rcx
leaq 0x5fe9(%rip), %rdi      # 0x21513
pushq $0x2
popq %rsi
pushq $0x1
popq %rdx
callq 0x2130
testb $0x40, %r12b
jne 0x1b559
movq 0x78(%rbx), %rax
testb %r12b, %r12b
js 0x1b573
cmpl %r12d, 0x48(%rbx)
jge 0x1b5a5
pushq $0xc
popq %rdx
subl %r12d, %edx
leaq 0x600b(%rip), %rsi      # 0x21562
jmp 0x1b5b1
movq 0x78(%rbx), %rdi
leaq 0x5e9d(%rip), %rsi      # 0x21401
movq %r13, %rdx
xorl %eax, %eax
callq 0x20c0
jmp 0x1b6b4
movl %r14d, 0x4(%rsp)
movl %r12d, %r14d
andl $0x3f, %r14d
je 0x1b5c0
pushq $0x5b
popq %rdi
movq %rax, %rsi
callq 0x20a0
movq 0x78(%rbx), %rdi
cmpl 0x48(%rbx), %r14d
jle 0x1b5de
pushq $0xc
popq %rdx
subl %r14d, %edx
leaq 0x5fbf(%rip), %rsi      # 0x21562
jmp 0x1b5eb
leal -0x1(%r12), %edx
leaq 0x5fac(%rip), %rsi      # 0x2155d
movq %rax, %rdi
xorl %eax, %eax
callq 0x20c0
jmp 0x1b6b4
leaq 0x5e50(%rip), %rsi      # 0x21417
movq %rax, %rdi
movq %r13, %rdx
xorl %eax, %eax
callq 0x20c0
movl 0x4(%rsp), %r14d
jmp 0x1b6b4
decl %r14d
leaq 0x5f75(%rip), %rsi      # 0x2155d
movl %r14d, %edx
xorl %eax, %eax
callq 0x20c0
testw $0x3f00, %r12w          # imm = 0x3F00
movl 0x4(%rsp), %r14d
je 0x1b65d
movq 0x78(%rbx), %rcx
leaq 0x5dfc(%rip), %rdi      # 0x21406
pushq $0x3
popq %rsi
pushq $0x1
popq %rdx
callq 0x2130
movl %r12d, %edx
shrl $0x8, %edx
andl $0x3f, %edx
movq 0x78(%rbx), %rdi
cmpl 0x48(%rbx), %edx
jle 0x1b679
pushq $0xc
popq %rax
subl %edx, %eax
leaq 0x5f2f(%rip), %rsi      # 0x21562
movl %eax, %edx
jmp 0x1b682
testw $0x3f00, %r15w          # imm = 0x3F00
jne 0x1b64c
cmpl $0x4000, %r15d          # imm = 0x4000
jb 0x1b269
leaq 0x5cac(%rip), %rdi      # 0x212ff
movl $0x57e, %esi            # imm = 0x57E
jmp 0x1b929
testq %r13, %r13
je 0x1b6a8
movq 0x78(%rbx), %rdi
leaq 0x5da3(%rip), %rsi      # 0x21410
movq %r13, %rdx
xorl %eax, %eax
callq 0x20c0
jmp 0x1b6a8
decl %edx
leaq 0x5edb(%rip), %rsi      # 0x2155d
xorl %eax, %eax
callq 0x20c0
testq %r13, %r13
je 0x1b6a8
movq 0x78(%rbx), %rdi
movl %r13d, %ecx
pushq $0x1
popq %rdx
shll %cl, %edx
leaq 0x5d69(%rip), %rsi      # 0x2140a
xorl %eax, %eax
callq 0x20c0
movq 0x78(%rbx), %rsi
pushq $0x5d
popq %rdi
callq 0x20a0
cmpl $0x100, 0x14(%rsp)      # imm = 0x100
leaq 0x5ef1(%rip), %rax      # 0x215b4
leaq 0x2d2e(%rip), %rcx      # 0x1e3f8
cmovbq %rcx, %rax
leaq 0x5ee5(%rip), %rcx      # 0x215ba
leaq 0x5edb(%rip), %rdx      # 0x215b7
cmovbq %rcx, %rdx
cmpl $0xe, %r14d
cmovbq %rax, %rdx
movq 0x78(%rbx), %rdi
movl %r14d, %eax
leaq 0xe60a(%rip), %rcx      # 0x29d00
movq (%rcx,%rax,8), %rcx
leaq 0x5f69(%rip), %rsi      # 0x2166a
xorl %eax, %eax
callq 0x20c0
movq 0x8(%rsp), %rcx
testl %r15d, %r15d
je 0x1b7db
cmpl $0x8d, %r15d
jne 0x1b728
addq $0x8, %rcx
movq %rcx, 0x8(%rsp)
cmpl $0x0, 0x74(%rbx)
je 0x1b746
movl %ebp, %esi
andl $0x4000, %esi           # imm = 0x4000
movq %rbx, %rdi
callq 0x17b48
testl %eax, %eax
jne 0x1b8a6
movl %r14d, %edi
callq 0x1b935
movl %eax, %r13d
addb $0x10, %r13b
movl %ebp, %r14d
andl $0xffff80ff, %r14d      # imm = 0xFFFF80FF
cmpl $0x66, %r14d
jne 0x1b7e3
cmpl $0x100, %ebp            # imm = 0x100
setae %al
cmpl $0x40, %r15d
setge %cl
orb %al, %cl
cmpl %r12d, %r15d
setne %al
orb %cl, %al
jne 0x1b7e3
pushq $0x8
popq %rsi
movq %rbx, %rdi
callq 0x1354f
testq %rax, %rax
je 0x1b8a6
movb $0x7, (%rax)
addq $0x7, 0x60(%rbx)
movw $0xf40, 0x1(%rax)       # imm = 0xF40
movb %r13b, 0x3(%rax)
movb $-0x3e, 0x4(%rax)
movslq %r12d, %rcx
movl $0xf10f, %edx           # imm = 0xF10F
btq %r12, %rdx
setb %dl
xorb $0x41, %dl
movb %dl, 0x5(%rax)
movb $0x8, 0x6(%rax)
leaq 0x59e5(%rip), %rdx      # 0x211b0
movb (%rcx,%rdx), %cl
orb $-0x30, %cl
movb %cl, 0x7(%rax)
xorl %eax, %eax
jmp 0x1b163
movl %r15d, %eax
jmp 0x1b163
pushq $0x9
popq %rsi
movq %rbx, %rdi
callq 0x1354f
testq %rax, %rax
je 0x1b8a6
cmpl $0x40, %r15d
pushq $0xe
popq %rcx
movl %ecx, %edx
cmovll %r15d, %edx
cmpl $0x20, %ebp
cmovnel %ecx, %edx
movb $0x8, (%rax)
addq $0x8, 0x60(%rbx)
movslq %edx, %rcx
movl $0xf10f, %edx           # imm = 0xF10F
xorl %esi, %esi
btq %rcx, %rdx
setb %dl
setae %sil
xorb $0x41, %dl
movb %dl, 0x1(%rax)
movb $0xf, 0x2(%rax)
movb %r13b, 0x3(%rax)
leaq 0x5974(%rip), %rdx      # 0x211b0
movb (%rcx,%rdx), %dl
movl %edx, %edi
orb $-0x40, %dil
movb %dil, 0x4(%rax)
leal (%rsi,%rsi,4), %esi
orl $0x48, %esi
movb %sil, 0x5(%rax)
movw $0xb60f, 0x6(%rax)      # imm = 0xB60F
shlb $0x3, %dl
orb %dil, %dl
movb %dl, 0x8(%rax)
xorl %eax, %eax
cmpl $0xe, %ecx
movq 0x8(%rsp), %r9
jne 0x1b163
cmpl $0x5f, %r14d
jg 0x1b8ad
xorl %eax, %eax
cmpl $0x20, %r14d
setne %al
movl %eax, 0x70(%rbx)
pushq $0xe
popq %rcx
movq %rbx, %rdi
movl %r15d, %esi
movq %r9, %rdx
xorl %r8d, %r8d
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x14d14
movl (%rbx), %eax
jmp 0x1b163
movl $0x1, 0x84(%rbx)
movq %rbx, %rdi
movl %ebp, %esi
movl %r15d, %edx
movq %r9, %rcx
movl %r15d, %r8d
pushq $0x0
pushq $0xe
callq 0x16183
addq $0x28, %rsp
jmp 0x1b167
leaq 0x5a21(%rip), %rdi      # 0x212ff
movl $0x573, %esi            # imm = 0x573
jmp 0x1b929
leaq 0x5a13(%rip), %rdi      # 0x212ff
movl $0x574, %esi            # imm = 0x574
jmp 0x1b929
leaq 0x5a05(%rip), %rdi      # 0x212ff
movl $0x577, %esi            # imm = 0x577
jmp 0x1b929
leaq 0x59f7(%rip), %rdi      # 0x212ff
movl $0x578, %esi            # imm = 0x578
jmp 0x1b929
leaq 0x59e9(%rip), %rdi      # 0x212ff
movl $0x57c, %esi            # imm = 0x57C
jmp 0x1b929
leaq 0x59db(%rip), %rdi      # 0x212ff
movl $0x576, %esi            # imm = 0x576
xorl %eax, %eax
callq 0x2080
callq 0x2040