// File: /workspace/github_c_makefile_star2_O0/lucvoo[P]sparse-dev/compile-i386.c
// Function: emit_move
static void emit_move(struct storage *src, struct storage *dest,
		      struct symbol *ctype, const char *comment)
{
	unsigned int bits;
	unsigned int is_signed;
	unsigned int is_dest = (src->type == STOR_REG);
	const char *opname;

	if (ctype) {
		bits = ctype->bit_size;
		is_signed = is_signed_type(ctype);
	} else {
		bits = 32;
		is_signed = 0;
	}

	/*
	 * Are we moving from a register to a register?
	 * Make the new reg to be the "cache".
	 */
	if ((dest->type == STOR_REG) && (src->type == STOR_REG)) {
		struct storage *backing;

reg_reg_move:
		if (dest == src)
			return;

		backing = src->reg->contains;
		if (backing) {
			/* Is it still valid? */
			if (backing->reg != src->reg)
				backing = NULL;
			else
				backing->reg = dest->reg;
		}
		dest->reg->contains = backing;
		insn("mov", src, dest, NULL);
		return;
	}

	/*
	 * Are we moving to a register from a non-reg?
	 *
	 * See if we have the non-reg source already cached
	 * in a register..
	 */
	if (dest->type == STOR_REG) {
		if (src->reg) {
			struct reg_info *info = src->reg;
			if (info->contains == src) {
				src = reginfo_reg(info);
				goto reg_reg_move;
			}
		}
		dest->reg->contains = src;
		src->reg = dest->reg;
	}

	if (src->type == STOR_REG) {
		/* We could just mark the register dirty here and do lazy store.. */
		src->reg->contains = dest;
		dest->reg = src->reg;
	}

	if ((bits == 8) || (bits == 16)) {
		if (is_dest)
			opname = "mov";
		else
			opname = is_signed ? "movsx" : "movzx";
	} else
		opname = "mov";

	insn(opbits(opname, bits), src, dest, comment);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x50, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq %rdx, -0x18(%rbp)
movq %rcx, -0x20(%rbp)
movq -0x8(%rbp), %rax
cmpl $0x3, (%rax)
sete %al
andb $0x1, %al
movzbl %al, %eax
movl %eax, -0x2c(%rbp)
cmpq $0x0, -0x18(%rbp)
je 0x63689
movq -0x18(%rbp), %rax
movl 0x50(%rax), %eax
movl %eax, -0x24(%rbp)
movq -0x18(%rbp), %rdi
callq 0x63830
movl %eax, -0x28(%rbp)
jmp 0x63697
movl $0x20, -0x24(%rbp)
movl $0x0, -0x28(%rbp)
movq -0x10(%rbp), %rax
cmpl $0x3, (%rax)
jne 0x63734
movq -0x8(%rbp), %rax
cmpl $0x3, (%rax)
jne 0x63734
jmp 0x636b3
movq -0x10(%rbp), %rax
cmpq -0x8(%rbp), %rax
jne 0x636c2
jmp 0x63827
movq -0x8(%rbp), %rax
movq 0x10(%rax), %rax
movq 0x8(%rax), %rax
movq %rax, -0x40(%rbp)
cmpq $0x0, -0x40(%rbp)
je 0x63707
movq -0x40(%rbp), %rax
movq 0x10(%rax), %rax
movq -0x8(%rbp), %rcx
cmpq 0x10(%rcx), %rax
je 0x636f5
movq $0x0, -0x40(%rbp)
jmp 0x63705
movq -0x10(%rbp), %rax
movq 0x10(%rax), %rcx
movq -0x40(%rbp), %rax
movq %rcx, 0x10(%rax)
jmp 0x63707
movq -0x40(%rbp), %rcx
movq -0x10(%rbp), %rax
movq 0x10(%rax), %rax
movq %rcx, 0x8(%rax)
movq -0x8(%rbp), %rsi
movq -0x10(%rbp), %rdx
leaq 0xf2b8(%rip), %rdi      # 0x729de
xorl %eax, %eax
movl %eax, %ecx
callq 0x63500
jmp 0x63827
movq -0x10(%rbp), %rax
cmpl $0x3, (%rax)
jne 0x63796
movq -0x8(%rbp), %rax
cmpq $0x0, 0x10(%rax)
je 0x63776
movq -0x8(%rbp), %rax
movq 0x10(%rax), %rax
movq %rax, -0x48(%rbp)
movq -0x48(%rbp), %rax
movq 0x8(%rax), %rax
cmpq -0x8(%rbp), %rax
jne 0x63774
movq -0x48(%rbp), %rdi
callq 0x638a0
movq %rax, -0x8(%rbp)
jmp 0x636b3
jmp 0x63776
movq -0x8(%rbp), %rcx
movq -0x10(%rbp), %rax
movq 0x10(%rax), %rax
movq %rcx, 0x8(%rax)
movq -0x10(%rbp), %rax
movq 0x10(%rax), %rcx
movq -0x8(%rbp), %rax
movq %rcx, 0x10(%rax)
movq -0x8(%rbp), %rax
cmpl $0x3, (%rax)
jne 0x637bf
movq -0x10(%rbp), %rcx
movq -0x8(%rbp), %rax
movq 0x10(%rax), %rax
movq %rcx, 0x8(%rax)
movq -0x8(%rbp), %rax
movq 0x10(%rax), %rcx
movq -0x10(%rbp), %rax
movq %rcx, 0x10(%rax)
cmpl $0x8, -0x24(%rbp)
je 0x637cb
cmpl $0x10, -0x24(%rbp)
jne 0x637fc
cmpl $0x0, -0x2c(%rbp)
je 0x637de
leaq 0xf206(%rip), %rax      # 0x729de
movq %rax, -0x38(%rbp)
jmp 0x637fa
movl -0x28(%rbp), %edx
leaq 0xf200(%rip), %rax      # 0x729e8
leaq 0xf1f3(%rip), %rcx      # 0x729e2
cmpl $0x0, %edx
cmovneq %rcx, %rax
movq %rax, -0x38(%rbp)
jmp 0x63807
leaq 0xf1db(%rip), %rax      # 0x729de
movq %rax, -0x38(%rbp)
movq -0x38(%rbp), %rdi
movl -0x24(%rbp), %esi
callq 0x638d0
movq %rax, %rdi
movq -0x8(%rbp), %rsi
movq -0x10(%rbp), %rdx
movq -0x20(%rbp), %rcx
callq 0x63500
addq $0x50, %rsp
popq %rbp
retq
nopl (%rax)