// File: /workspace/github_cpp_makefile_star2_O1/CMU-SAFARI[P]MQSim/src/ssd/Address_Mapping_Unit_Page_Level.cpp
// Function: SSD_Components::Address_Mapping_Unit_Page_Level::Bring_to_CMT_for_preconditioning(unsigned short, unsigned long)
int Address_Mapping_Unit_Page_Level::Bring_to_CMT_for_preconditioning(stream_id_type stream_id, LPA_type lpa)
	{
		if (domains[stream_id]->GlobalMappingTable[lpa].PPA == NO_PPA) {
			PRINT_ERROR("Touching an unallocated logical address in preconditioning!")
		}

		if (domains[stream_id]->CMT->Exists(stream_id, lpa)) {
			return domains[stream_id]->No_of_inserted_entries_in_preconditioning;
		}

		if (domains[stream_id]->CMT->Check_free_slot_availability()) {
			domains[stream_id]->CMT->Reserve_slot_for_lpn(stream_id, lpa);
			domains[stream_id]->CMT->Insert_new_mapping_info(stream_id, lpa,
				domains[stream_id]->GlobalMappingTable[lpa].PPA, domains[stream_id]->GlobalMappingTable[lpa].WrittenStateBitmap);
		} else {
			LPA_type evicted_lpa;
			domains[stream_id]->CMT->Evict_one_slot(evicted_lpa);
			domains[stream_id]->CMT->Reserve_slot_for_lpn(stream_id, lpa);
			domains[stream_id]->CMT->Insert_new_mapping_info(stream_id, lpa,
				domains[stream_id]->GlobalMappingTable[lpa].PPA, domains[stream_id]->GlobalMappingTable[lpa].WrittenStateBitmap);
		}
		domains[stream_id]->No_of_inserted_entries_in_preconditioning++;
		
		return domains[stream_id]->No_of_inserted_entries_in_preconditioning;
	}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x38, %rsp
movq 0xa8(%rdi), %rax
movl %esi, %r15d
movq (%rax,%r15,8), %rax
movq 0x20(%rax), %rcx
leaq (%rdx,%rdx,2), %r12
cmpq $-0x1, (%rcx,%r12,8)
je 0x2af79
movq %rdx, %r14
movl %esi, %ebp
movq %rdi, %rbx
movq 0x10(%rax), %rsi
movq %r15, %rcx
shlq $0x38, %rcx
orq %rdx, %rcx
movq (%rsi), %r8
movq 0x8(%rsi), %r9
xorl %r11d, %r11d
movq %rcx, %rax
xorl %edx, %edx
divq %r9
movq (%r8,%rdx,8), %rax
testq %rax, %rax
je 0x2aeb0
movq (%rax), %r10
movq %rax, %r11
cmpq 0x8(%r10), %rcx
je 0x2aeb0
movq %rdx, %rdi
movq %r10, %r13
movq (%r10), %r10
testq %r10, %r10
je 0x2aead
movq 0x8(%r10), %r8
movq %r8, %rax
xorl %edx, %edx
divq %r9
movl $0x0, %r11d
cmpq %rdi, %rdx
jne 0x2aeb0
movq %r13, %r11
cmpq %r8, %rcx
jne 0x2ae81
jmp 0x2aeb0
xorl %r11d, %r11d
testq %r11, %r11
je 0x2aeba
movq (%r11), %rax
jmp 0x2aebc
xorl %eax, %eax
testq %rax, %rax
je 0x2aecf
movq 0x10(%rax), %rax
cmpl $0x2, 0x14(%rax)
je 0x2af5c
movl 0x50(%rsi), %eax
cmpq %rax, 0x18(%rsi)
jae 0x2aef5
movzwl %bp, %ebp
movq %rsi, %rdi
movl %ebp, %esi
movq %r14, %rdx
callq 0x299cc
movq 0xa8(%rbx), %rax
movq (%rax,%r15,8), %rax
jmp 0x2af33
leaq 0x10(%rsp), %rdi
leaq 0x8(%rsp), %rdx
callq 0x29b34
movq 0xa8(%rbx), %rax
leal (,%r15,8), %r13d
movq (%rax,%r13), %rax
movq 0x10(%rax), %rdi
movzwl %bp, %ebp
movl %ebp, %esi
movq %r14, %rdx
callq 0x299cc
movq 0xa8(%rbx), %rax
movq (%rax,%r13), %rax
movq 0x10(%rax), %rdi
movq 0x20(%rax), %rax
movq (%rax,%r12,8), %rcx
movq 0x8(%rax,%r12,8), %r8
movl %ebp, %esi
movq %r14, %rdx
callq 0x2986e
movq 0xa8(%rbx), %rax
movq (%rax,%r15,8), %rax
incl 0x18(%rax)
movq 0xa8(%rbx), %rax
movq (%rax,%r15,8), %rax
movl 0x18(%rax), %eax
addq $0x38, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x44070(%rip), %rbx     # 0x6eff0
leaq 0x2b621(%rip), %rsi     # 0x565a8
movq %rbx, %rdi
callq 0x7390
leaq 0x2d8f8(%rip), %rsi     # 0x5888e
movq %rbx, %rdi
callq 0x7390
movq %rax, %rdi
callq 0x71c0
movq 0x44023(%rip), %rdi     # 0x6efd0
callq 0x7430
movl $0x1, %edi
callq 0x7440