// File: /workspace/github_c_makefile_star2_O0/xiane[P]libvphevcodec/AML_HEVCEncoder.cpp
// Function: Wave4VpuInit(AMVHEVCEncHandle_s*, unsigned int)
AMVEnc_Status Wave4VpuInit(AMVHEVCEncHandle *Handle, Uint32 coreIdx) {
    vpu_buffer_t vb;
    Uint32 codeBase;
    Uint32* codeVaddr;
    Uint32 codeSize;
    Uint32 size;
    Uint32 i, regVal, remapSize;
    Uint32 hwOption = 0;
    uint32_t timeoutTicks = 0;

    vdi_get_common_memory(coreIdx, &vb);

    vdi_clear_memory(coreIdx, vb.phys_addr, vb.size);

    VLOG(DEBUG, "\nvdi_get_common_memory, paddr:0x%08lx\n", vb.phys_addr);

    codeSize = (vb.size & ~0xfff);

    size = sizeof(bit_code);
    if (size == 0 || size >= codeSize) {
        return AMVENC_INVALID_PARAM;
    }

    VLOG(DEBUG, "\nmonet.bin size :%d!!!\n", size);
    codeBase = (Uint32) vb.phys_addr;

    codeVaddr = (Uint32*) vb.virt_addr;

    VLOG(DEBUG, "\nVPU INIT Start!!!\n");

    //for (i=W4_CMD_REG_BASE; i<W4_CMD_REG_END; i+=4)
    //    VpuWriteReg(coreIdx, i, 0x00);

    VpuWriteMem(coreIdx, codeBase, (unsigned char* )bit_code, size);
    VLOG(DEBUG, "Code: 0x%08x, 0x%08x,0x%08x,0x%08x,\n", codeVaddr[0], codeVaddr[1], codeVaddr[2], codeVaddr[3]);
    vdi_set_bit_firmware_to_pm(coreIdx, (Uint16*) bit_code);

    regVal = 0;
    VpuWriteReg(coreIdx, W4_PO_CONF, regVal);

    regVal = VpuReadReg(coreIdx, W4_VPU_RESET_STATUS);
    VLOG(NONE, "W4_VPU_RESET_STATUS :0x%x\n", regVal);

    /* Reset All blocks */
    regVal = 0x7ffffff;
    VpuWriteReg(coreIdx, W4_VPU_RESET_REQ, regVal);    // Reset All blocks
    /* Waiting reset done */

    regVal = VpuReadReg(coreIdx, W4_VPU_RESET_STATUS);
    VLOG(NONE, "W4_VPU_RESET_STATUS :0x%x\n", regVal);

    if (vdi_wait_vpu_busy(coreIdx, VPU_BUSY_CHECK_TIMEOUT, W4_VPU_RESET_STATUS) == -1) {
        VLOG(ERR, "VPU init(W4_VPU_RESET_REQ) timeout\n");
        VpuWriteReg(coreIdx, W4_VPU_RESET_REQ, 0);
        return AMVENC_TIMEOUT;
    }

    VpuWriteReg(coreIdx, W4_VPU_RESET_REQ, 0);

    /* clear registers */
    for (i = W4_CMD_REG_BASE; i < W4_CMD_REG_END; i += 4)
        VpuWriteReg(coreIdx, i, 0x00);

    /* remap page size */
    remapSize = (codeSize >> 12) & 0x1ff;
    regVal = 0x80000000 | (0 << 16) | (W4_REMAP_CODE_INDEX << 12) | (1 << 11) | remapSize;
    VpuWriteReg(coreIdx, W4_VPU_REMAP_CTRL, regVal);
    VpuWriteReg(coreIdx, W4_VPU_REMAP_VADDR, 0x00000000); /* DO NOT CHANGE! */
    VpuWriteReg(coreIdx, W4_VPU_REMAP_PADDR, codeBase);
    VpuWriteReg(coreIdx, W4_ADDR_CODE_BASE, codeBase);
    VpuWriteReg(coreIdx, W4_CODE_SIZE, codeSize);
    VpuWriteReg(coreIdx, W4_CODE_PARAM, 0);

    regVal = VpuReadReg(coreIdx, W4_VPU_REMAP_PADDR);
    VLOG(NONE, "W4_VPU_REMAP_PADDR :0x%x\n", regVal);

    VpuWriteReg(coreIdx, W4_COMMAND_OPTION, 0);
    timeoutTicks = COMMAND_TIMEOUT * VCPU_CLOCK_IN_MHZ * (1000000 >> 15);
    timeoutTicks = timeoutTicks / 120;
    if (Handle->enc_width * Handle->enc_height <= 1280 * 720)
        timeoutTicks = timeoutTicks / 16; //  /8 == 20ms  /4 == 40 ms  /16 == 10ms
    else if (Handle->enc_width * Handle->enc_height <= 1920 * 1088)
        timeoutTicks = timeoutTicks / 8;
    else
        timeoutTicks = timeoutTicks / 2;
    VpuWriteReg(coreIdx, W4_TIMEOUT_CNT, timeoutTicks);

    VpuWriteReg(coreIdx, W4_HW_OPTION, hwOption);
    /* Interrupt */
    // for encoder interrupt
    regVal = (1 << W4_INT_ENC_PIC);
    regVal |= (1 << W4_INT_SLEEP_VPU);
    regVal |= (1 << W4_INT_SET_PARAM);
    // for decoder interrupt
    regVal |= (1 << W4_INT_DEC_PIC_HDR);
    regVal |= (1 << W4_INT_DEC_PIC);
    regVal |= (1 << W4_INT_QUERY_DEC);
    regVal |= (1 << W4_INT_SLEEP_VPU);
    regVal |= (1 << W4_INT_BSBUF_EMPTY);

    //regVal = 0xfffffefe;
    regVal = 0xfffff6ff; // remove wake up int bit 11
    VpuWriteReg(coreIdx, W4_VPU_VINT_ENABLE, regVal);

    VpuWriteReg(coreIdx, W4_VPU_BUSY_STATUS, 1);
    VpuWriteReg(coreIdx, W4_RET_SUCCESS, 0);  //for debug
    VpuWriteReg(coreIdx, W4_CORE_INDEX, 0);
    //VpuWriteReg(coreIdx, W4_INST_INDEX,  (instanceIndex&0xffff)|(codecMode<<16));
    VpuWriteReg(coreIdx, W4_INST_INDEX, 0);

    VpuWriteReg(coreIdx, W4_COMMAND, INIT_VPU);
    VpuWriteReg(coreIdx, W4_VPU_HOST_INT_REQ, 1);
    //Wave4BitIssueCommand(coreIdx,0, INIT_VPU);
    VpuWriteReg(coreIdx, W4_VPU_REMAP_CORE_START, 1);

    regVal = VpuReadReg(coreIdx, W4_VPU_BUSY_STATUS);
    VLOG(NONE, "W4_VPU_BUSY_STATUS :0x%x\n", regVal);

    //if (vdi_wait_vpu_busy(coreIdx, VPU_BUSY_CHECK_TIMEOUT, W4_VPU_BUSY_STATUS) == -1) {
    //    VLOG(ERR, "VPU init(W4_VPU_REMAP_CORE_START) timeout\n");
    //    return AMVENC_TIMEOUT;
    //}

    if (vdi_wait_interrupt(coreIdx, VPU_BUSY_CHECK_TIMEOUT) == -1) {
        VLOG(ERR, "VPU Wake timeout");
        reset_error = 1;
        return AMVENC_TIMEOUT;
    }

    regVal = VpuReadReg(coreIdx, W4_VCPU_CUR_PC);
    VLOG(NONE, "Cur PC :0x%x\n", regVal);
    regVal = VpuReadReg(coreIdx, W4_RET_SUCCESS);
    VLOG(DEBUG, "W4_RET_SUCCESS :0x%x\n", regVal);
    if (regVal == 0) {
        uint32_t reasonCode = VpuReadReg(coreIdx, W4_RET_FAIL_REASON);
        VLOG(ERR, "VPU init(W4_RET_SUCCESS) failed(%d) REASON CODE(%08x)\n", regVal, reasonCode);
        return AMVENC_HARDWARE;
    }

    VpuWriteReg(coreIdx, W4_VPU_BUSY_STATUS, 1);
    VpuWriteReg(coreIdx, W4_RET_SUCCESS, 0);  //for debug
    VpuWriteReg(coreIdx, W4_CORE_INDEX, 0);
    //VpuWriteReg(coreIdx, W4_INST_INDEX,  (instanceIndex&0xffff)|(codecMode<<16));

    VpuWriteReg(coreIdx, W4_COMMAND, GET_FW_VERSION);
    VpuWriteReg(coreIdx, W4_VPU_HOST_INT_REQ, 1);
    //Wave4BitIssueCommand(coreIdx, 0, GET_FW_VERSION);
    regVal = VpuReadReg(coreIdx, W4_VPU_BUSY_STATUS);
    VLOG(NONE, "W4_VPU_BUSY_STATUS :0x%x\n", regVal);
    if (vdi_wait_vpu_busy(coreIdx, VPU_BUSY_CHECK_TIMEOUT, W4_VPU_BUSY_STATUS) == -1) {
        VLOG(ERR, "VPU init(GET_FW_VERSION) timeout\n");
        return AMVENC_TIMEOUT;
    }
    regVal = VpuReadReg(coreIdx, W4_RET_SUCCESS);
    VLOG(NONE, "W4_RET_SUCCESS :0x%x\n", regVal);
    if (regVal == 0) {
        uint32_t reasonCode = VpuReadReg(coreIdx, W4_RET_FAIL_REASON);
        VLOG(ERR, "VPU init(GET_FW_VERSION) failed(%d) REASON CODE(%08x)\n", regVal, reasonCode);
        return AMVENC_HARDWARE;
    }

    regVal = VpuReadReg(coreIdx, W4_RET_PRODUCT_NAME);
    VLOG(DEBUG, "Product name %s\n", (Uint8*) &regVal);
    regVal = VpuReadReg(coreIdx, W4_RET_PRODUCT_VERSION);
    VLOG(DEBUG, "Product ver %x\n", regVal);

    regVal = VpuReadReg(coreIdx, W4_RET_STD_DEF0);
    VLOG(DEBUG, "Product W4_RET_STD_DEF0 %x\n", regVal);
    regVal = VpuReadReg(coreIdx, W4_RET_STD_DEF1);
    VLOG(DEBUG, "Product W4_RET_STD_DEF1 %x\n", regVal);
    regVal = VpuReadReg(coreIdx, W4_RET_CONF_FEATURE);
    VLOG(DEBUG, "Product W4_RET_CONF_FEATURE %x\n", regVal);
    regVal = VpuReadReg(coreIdx, W4_RET_CONFIG_DATE);
    VLOG(DEBUG, "Product W4_RET_CONFIG_DATE %x\n", regVal);
    regVal = VpuReadReg(coreIdx, W4_RET_CONFIG_REVISION);
    VLOG(DEBUG, "Product W4_RET_CONFIG_REVISION %x\n", regVal);
    regVal = VpuReadReg(coreIdx, W4_RET_CONFIG_TYPE);
    VLOG(DEBUG, "Product W4_RET_CONFIG_TYPE %x\n", regVal);

    regVal = VpuReadReg(coreIdx, W4_VPU_BUSY_STATUS);
    VLOG(DEBUG, "W4_VPU_BUSY_STATUS :0x%x\n", regVal);

    if (vdi_wait_vpu_busy(coreIdx, VPU_BUSY_CHECK_TIMEOUT, W4_VPU_BUSY_STATUS) == -1) {
        VLOG(ERR, "VPU init(Finish) timeout\n");
        return AMVENC_TIMEOUT;
    }
    return AMVENC_SUCCESS;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x70, %rsp
movq %rdi, -0x10(%rbp)
movl %esi, -0x14(%rbp)
movl $0x0, -0x60(%rbp)
movl $0x0, -0x64(%rbp)
movl -0x14(%rbp), %edi
leaq -0x38(%rbp), %rsi
callq 0x2190
movl -0x14(%rbp), %edi
movq -0x30(%rbp), %rax
movl %eax, %esi
movl -0x38(%rbp), %edx
callq 0x2170
jmp 0x531c
movl -0x38(%rbp), %eax
andl $0xfffff000, %eax       # imm = 0xFFFFF000
movl %eax, -0x4c(%rbp)
movl $0x22880, -0x50(%rbp)   # imm = 0x22880
cmpl $0x0, -0x50(%rbp)
je 0x533c
movl -0x50(%rbp), %eax
cmpl -0x4c(%rbp), %eax
jb 0x5348
movl $0xffffffda, -0x4(%rbp) # imm = 0xFFFFFFDA
jmp 0x58ee
jmp 0x534a
jmp 0x534c
movq -0x30(%rbp), %rax
movl %eax, -0x3c(%rbp)
movq -0x20(%rbp), %rax
movq %rax, -0x48(%rbp)
jmp 0x535d
movl -0x14(%rbp), %edi
movl -0x3c(%rbp), %esi
movl -0x50(%rbp), %ecx
leaq 0x6cbb(%rip), %rdx      # 0xc028
callq 0x2120
jmp 0x5374
movl -0x14(%rbp), %edi
leaq 0x6caa(%rip), %rsi      # 0xc028
callq 0x2280
movl $0x0, -0x58(%rbp)
movl -0x14(%rbp), %edi
movl -0x58(%rbp), %edx
xorl %esi, %esi
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x54, %esi
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x53a9
movl $0x7ffffff, -0x58(%rbp) # imm = 0x7FFFFFF
movl -0x14(%rbp), %edi
movl -0x58(%rbp), %edx
movl $0x50, %esi
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x54, %esi
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x53d2
movl -0x14(%rbp), %edi
movl $0x1388, %esi           # imm = 0x1388
movl $0x54, %edx
callq 0x2060
cmpl $-0x1, %eax
jne 0x5422
jmp 0x53eb
leaq 0x2aa26(%rip), %rdi     # 0x2fe18
movb $0x0, %al
callq 0x2050
leaq 0x2ae66(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl -0x14(%rbp), %edi
movl $0x50, %esi
xorl %edx, %edx
callq 0x2160
movl $0xffffffdc, -0x4(%rbp) # imm = 0xFFFFFFDC
jmp 0x58ee
movl -0x14(%rbp), %edi
movl $0x50, %esi
xorl %edx, %edx
callq 0x2160
movl $0x100, -0x54(%rbp)     # imm = 0x100
cmpl $0x200, -0x54(%rbp)     # imm = 0x200
jae 0x5459
movl -0x14(%rbp), %edi
movl -0x54(%rbp), %esi
xorl %edx, %edx
callq 0x2160
movl -0x54(%rbp), %eax
addl $0x4, %eax
movl %eax, -0x54(%rbp)
jmp 0x5438
movl -0x4c(%rbp), %eax
shrl $0xc, %eax
andl $0x1ff, %eax            # imm = 0x1FF
movl %eax, -0x5c(%rbp)
movl -0x5c(%rbp), %eax
orl $0x80000800, %eax       # imm = 0x80000800
movl %eax, -0x58(%rbp)
movl -0x14(%rbp), %edi
movl -0x58(%rbp), %edx
movl $0x60, %esi
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x64, %esi
xorl %edx, %edx
callq 0x2160
movl -0x14(%rbp), %edi
movl -0x3c(%rbp), %edx
movl $0x68, %esi
callq 0x2160
movl -0x14(%rbp), %edi
movl -0x3c(%rbp), %edx
movl $0x118, %esi            # imm = 0x118
callq 0x2160
movl -0x14(%rbp), %edi
movl -0x4c(%rbp), %edx
movl $0x11c, %esi            # imm = 0x11C
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x120, %esi            # imm = 0x120
xorl %edx, %edx
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x68, %esi
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x54e2
movl -0x14(%rbp), %edi
movl $0x10c, %esi            # imm = 0x10C
xorl %edx, %edx
callq 0x2160
movl $0x3a980, -0x64(%rbp)   # imm = 0x3A980
movl -0x64(%rbp), %eax
movl $0x78, %ecx
xorl %edx, %edx
divl %ecx
movl %eax, -0x64(%rbp)
movq -0x10(%rbp), %rax
movl 0xc(%rax), %eax
movq -0x10(%rbp), %rcx
imull 0x10(%rcx), %eax
cmpl $0xe1000, %eax          # imm = 0xE1000
ja 0x5528
movl -0x64(%rbp), %eax
shrl $0x4, %eax
movl %eax, -0x64(%rbp)
jmp 0x5553
movq -0x10(%rbp), %rax
movl 0xc(%rax), %eax
movq -0x10(%rbp), %rcx
imull 0x10(%rcx), %eax
cmpl $0x1fe000, %eax         # imm = 0x1FE000
ja 0x5549
movl -0x64(%rbp), %eax
shrl $0x3, %eax
movl %eax, -0x64(%rbp)
jmp 0x5551
movl -0x64(%rbp), %eax
shrl %eax
movl %eax, -0x64(%rbp)
jmp 0x5553
movl -0x14(%rbp), %edi
movl -0x64(%rbp), %edx
movl $0x134, %esi            # imm = 0x134
callq 0x2160
movl -0x14(%rbp), %edi
movl -0x60(%rbp), %edx
movl $0x124, %esi            # imm = 0x124
callq 0x2160
movl $0x8, -0x58(%rbp)
movl -0x58(%rbp), %eax
orl $0x400, %eax            # imm = 0x400
movl %eax, -0x58(%rbp)
movl -0x58(%rbp), %eax
orl $0x2, %eax
movl %eax, -0x58(%rbp)
movl -0x58(%rbp), %eax
orl $0x2, %eax
movl %eax, -0x58(%rbp)
movl -0x58(%rbp), %eax
orl $0x8, %eax
movl %eax, -0x58(%rbp)
movl -0x58(%rbp), %eax
orl $0x200, %eax            # imm = 0x200
movl %eax, -0x58(%rbp)
movl -0x58(%rbp), %eax
orl $0x400, %eax            # imm = 0x400
movl %eax, -0x58(%rbp)
movl -0x58(%rbp), %eax
orl $0x8000, %eax           # imm = 0x8000
movl %eax, -0x58(%rbp)
movl $0xfffff6ff, -0x58(%rbp) # imm = 0xFFFFF6FF
movl -0x14(%rbp), %edi
movl -0x58(%rbp), %edx
movl $0x48, %esi
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x70, %esi
movl $0x1, %edx
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x110, %esi            # imm = 0x110
xorl %edx, %edx
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x104, %esi            # imm = 0x104
xorl %edx, %edx
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x108, %esi            # imm = 0x108
xorl %edx, %edx
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x100, %esi            # imm = 0x100
movl $0x1, %edx
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x38, %esi
movl $0x1, %edx
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x6c, %esi
movl $0x1, %edx
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x70, %esi
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x565f
movl -0x14(%rbp), %edi
movl $0x1388, %esi           # imm = 0x1388
callq 0x2340
cmpl $-0x1, %eax
jne 0x56a5
jmp 0x5673
leaq 0x2a739(%rip), %rdi     # 0x2fdb3
movb $0x0, %al
callq 0x2050
leaq 0x2abde(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl $0x1, 0x2db5b(%rip)     # 0x331f4
movl $0xffffffdc, -0x4(%rbp) # imm = 0xFFFFFFDC
jmp 0x58ee
movl -0x14(%rbp), %edi
movl $0x4, %esi
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x56b7
movl -0x14(%rbp), %edi
movl $0x110, %esi            # imm = 0x110
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x56c9
cmpl $0x0, -0x58(%rbp)
jne 0x570d
movl -0x14(%rbp), %edi
movl $0x114, %esi            # imm = 0x114
callq 0x2210
movl %eax, -0x68(%rbp)
movl -0x58(%rbp), %esi
movl -0x68(%rbp), %edx
leaq 0x2a750(%rip), %rdi     # 0x2fe3c
movb $0x0, %al
callq 0x2050
leaq 0x2ab6c(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl $0xffffffdb, -0x4(%rbp) # imm = 0xFFFFFFDB
jmp 0x58ee
movl -0x14(%rbp), %edi
movl $0x70, %esi
movl $0x1, %edx
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x110, %esi            # imm = 0x110
xorl %edx, %edx
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x104, %esi            # imm = 0x104
xorl %edx, %edx
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x100, %edx            # imm = 0x100
movl %edx, %esi
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x38, %esi
movl $0x1, %edx
callq 0x2160
movl -0x14(%rbp), %edi
movl $0x70, %esi
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x5770
movl -0x14(%rbp), %edi
movl $0x1388, %esi           # imm = 0x1388
movl $0x70, %edx
callq 0x2060
cmpl $-0x1, %eax
jne 0x57b1
jmp 0x5789
leaq 0x2a6e3(%rip), %rdi     # 0x2fe73
movb $0x0, %al
callq 0x2050
leaq 0x2aac8(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl $0xffffffdc, -0x4(%rbp) # imm = 0xFFFFFFDC
jmp 0x58ee
movl -0x14(%rbp), %edi
movl $0x110, %esi            # imm = 0x110
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x57c3
cmpl $0x0, -0x58(%rbp)
jne 0x5807
movl -0x14(%rbp), %edi
movl $0x114, %esi            # imm = 0x114
callq 0x2210
movl %eax, -0x6c(%rbp)
movl -0x58(%rbp), %esi
movl -0x6c(%rbp), %edx
leaq 0x2a6af(%rip), %rdi     # 0x2fe95
movb $0x0, %al
callq 0x2050
leaq 0x2aa72(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl $0xffffffdb, -0x4(%rbp) # imm = 0xFFFFFFDB
jmp 0x58ee
movl -0x14(%rbp), %edi
movl $0x11c, %esi            # imm = 0x11C
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x5819
movl -0x14(%rbp), %edi
movl $0x120, %esi            # imm = 0x120
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x582b
movl -0x14(%rbp), %edi
movl $0x124, %esi            # imm = 0x124
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x583d
movl -0x14(%rbp), %edi
movl $0x128, %esi            # imm = 0x128
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x584f
movl -0x14(%rbp), %edi
movl $0x12c, %esi            # imm = 0x12C
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x5861
movl -0x14(%rbp), %edi
movl $0x130, %esi            # imm = 0x130
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x5873
movl -0x14(%rbp), %edi
movl $0x134, %esi            # imm = 0x134
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x5885
movl -0x14(%rbp), %edi
movl $0x138, %esi            # imm = 0x138
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x5897
movl -0x14(%rbp), %edi
movl $0x70, %esi
callq 0x2210
movl %eax, -0x58(%rbp)
jmp 0x58a9
movl -0x14(%rbp), %edi
movl $0x1388, %esi           # imm = 0x1388
movl $0x70, %edx
callq 0x2060
cmpl $-0x1, %eax
jne 0x58e7
jmp 0x58c2
leaq 0x2a603(%rip), %rdi     # 0x2fecc
movb $0x0, %al
callq 0x2050
leaq 0x2a98f(%rip), %rdi     # 0x30266
movb $0x0, %al
callq 0x2050
movl $0xffffffdc, -0x4(%rbp) # imm = 0xFFFFFFDC
jmp 0x58ee
movl $0x1, -0x4(%rbp)
movl -0x4(%rbp), %eax
addq $0x70, %rsp
popq %rbp
retq
nopw (%rax,%rax)