// File: /workspace/github_c_makefile_star2_O2/markdryan[P]subtilis/arch/arm32/vfp_alloc.c
// Function: prv_alloc_vfp_data_instr
static void prv_alloc_vfp_data_instr(void *user_data, subtilis_arm_op_t *op,
				     subtilis_arm_instr_type_t type,
				     subtilis_vfp_data_instr_t *instr,
				     subtilis_error_t *err)
{
	size_t vreg_op1;
	int dist_op1;
	size_t vreg_op2;
	int dist_op2;
	size_t vreg_dest;
	int dist_dest;
	subtilis_arm_reg_ud_t *ud = user_data;

	switch (type) {
	case SUBTILIS_VFP_INSTR_FMACS:
	case SUBTILIS_VFP_INSTR_FNMACS:
	case SUBTILIS_VFP_INSTR_FMSCS:
	case SUBTILIS_VFP_INSTR_FNMSCS:
	case SUBTILIS_VFP_INSTR_FMULS:
	case SUBTILIS_VFP_INSTR_FNMULS:
	case SUBTILIS_VFP_INSTR_FADDS:
	case SUBTILIS_VFP_INSTR_FSUBS:
	case SUBTILIS_VFP_INSTR_FDIVS:
		subtilis_error_set_assertion_failed(err);
		return;
	default:
		break;
	}

	vreg_op1 = instr->op1;
	(void)subtilis_arm_reg_alloc_ensure(ud, op, ud->int_regs, ud->real_regs,
					    &instr->op1, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;

	vreg_op2 = instr->op2;
	(void)subtilis_arm_reg_alloc_ensure(ud, op, ud->int_regs, ud->real_regs,
					    &instr->op2, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;

	dist_op2 = subtilis_arm_reg_alloc_calculate_dist(
	    ud, vreg_op2, op, &ud->real_regs->dist_walker, ud->real_regs);
	if (dist_op2 == -1)
		ud->real_regs->phys_to_virt[instr->op2] = INT_MAX;

	dist_op1 = subtilis_arm_reg_alloc_calculate_dist(
	    ud, vreg_op1, op, &ud->real_regs->dist_walker, ud->real_regs);
	if (dist_op1 == -1)
		ud->real_regs->phys_to_virt[instr->op1] = INT_MAX;

	/*
	 * Special case here for FMA.  We need to ensure the destination
	 * register not allocate it as it is read from as well as written to.
	 */

	switch (type) {
	case SUBTILIS_VFP_INSTR_FMACD:
	case SUBTILIS_VFP_INSTR_FNMACD:
	case SUBTILIS_VFP_INSTR_FMSCD:
	case SUBTILIS_VFP_INSTR_FNMSCD:
		vreg_dest = instr->dest;
		(void)subtilis_arm_reg_alloc_ensure(
		    ud, op, ud->int_regs, ud->real_regs, &instr->dest, err);
		if (err->type != SUBTILIS_ERROR_OK)
			return;
		dist_dest = subtilis_arm_reg_alloc_calculate_dist(
		    ud, vreg_dest, op, &ud->real_regs->dist_walker,
		    ud->real_regs);
		if (dist_dest == -1)
			ud->real_regs->phys_to_virt[instr->dest] = INT_MAX;
		ud->real_regs->next[instr->dest] = dist_dest;
		break;
	default:
		subtilis_arm_reg_alloc_alloc_fp_dest(ud, op, &instr->dest, err);
		if (err->type != SUBTILIS_ERROR_OK)
			return;
		break;
	}
	ud->real_regs->next[instr->op1] = dist_op1;
	ud->real_regs->next[instr->op2] = dist_op2;

	ud->instr_count++;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movq %r8, %r13
movq %rcx, %r15
movl %edx, %r12d
movq %rsi, %rbp
movq %rdi, %rbx
leal -0x5f(%r12), %eax
cmpl $0x10, %eax
ja 0x67170
movl $0x15555, %ecx          # imm = 0x15555
btl %eax, %ecx
jae 0x67170
leaq 0x9e98(%rip), %rdx      # 0x70fea
pushq $0xf
popq %rsi
movq %r13, %rdi
movl $0x16c, %ecx            # imm = 0x16C
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x132ae
leaq 0x10(%r15), %r8
movq 0x10(%r15), %r14
movq 0x8(%rbx), %rdx
movq 0x10(%rbx), %rcx
movq %rbx, %rdi
movq %rbp, %rsi
movq %r8, 0x20(%rsp)
movq %r13, %r9
callq 0x4ec63
cmpl $0x0, (%r13)
jne 0x67301
leaq 0x18(%r15), %r8
movq 0x18(%r15), %rax
movq %rax, 0x8(%rsp)
movq 0x8(%rbx), %rdx
movq 0x10(%rbx), %rcx
movq %rbx, %rdi
movq %rbp, %rsi
movq %r8, 0x18(%rsp)
movq %r13, %r9
callq 0x4ec63
cmpl $0x0, (%r13)
jne 0x67301
movq 0x10(%rbx), %r8
leaq 0x90(%r8), %rcx
movq %rbx, %rdi
movq 0x8(%rsp), %rsi
movq %rbp, %rdx
callq 0x4ea00
movq 0x10(%rbx), %r8
movl %eax, 0x8(%rsp)
cmpl $-0x1, %eax
jne 0x6720d
movq 0x8(%r8), %rax
movq 0x18(%rsp), %rcx
movq (%rcx), %rcx
movq $0x7fffffff, (%rax,%rcx,8) # imm = 0x7FFFFFFF
leaq 0x90(%r8), %rcx
movq %rbx, %rdi
movq %r14, %rsi
movq %rbp, %rdx
callq 0x4ea00
movl %eax, 0x14(%rsp)
cmpl $-0x1, %eax
jne 0x67243
movq 0x10(%rbx), %rax
movq 0x8(%rax), %rax
movq 0x20(%rsp), %rcx
movq (%rcx), %rcx
movq $0x7fffffff, (%rax,%rcx,8) # imm = 0x7FFFFFFF
addl $-0x60, %r12d
cmpl $0x6, %r12d
ja 0x672e5
pushq $0x55
popq %rax
btl %r12d, %eax
jae 0x672e5
movq 0x8(%r15), %r14
addq $0x8, %r15
movq 0x8(%rbx), %rdx
movq 0x10(%rbx), %rcx
movq %rbx, %rdi
movq %rbp, %rsi
movq %r15, %r8
movq %r13, %r9
callq 0x4ec63
cmpl $0x0, (%r13)
jne 0x67301
movq 0x10(%rbx), %r8
leaq 0x90(%r8), %rcx
movq %rbx, %rdi
movq %r14, %rsi
movq %rbp, %rdx
callq 0x4ea00
movq 0x10(%rbx), %rcx
cmpl $-0x1, %eax
jne 0x672b7
movq 0x8(%rcx), %rdx
movq (%r15), %rsi
movq $0x7fffffff, (%rdx,%rsi,8) # imm = 0x7FFFFFFF
movq 0x10(%rcx), %rcx
movq (%r15), %rdx
movl %eax, (%rcx,%rdx,4)
movq 0x20(%rsp), %rax
movq (%rax), %rax
movl 0x14(%rsp), %edx
movl %edx, (%rcx,%rax,4)
movq 0x18(%rsp), %rax
movq (%rax), %rax
movl 0x8(%rsp), %edx
movl %edx, (%rcx,%rax,4)
incq 0x20(%rbx)
jmp 0x67301
addq $0x8, %r15
movq %rbx, %rdi
movq %rbp, %rsi
movq %r15, %rdx
movq %r13, %rcx
callq 0x4eee3
cmpl $0x0, (%r13)
je 0x67310
addq $0x28, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x10(%rbx), %rax
movq 0x10(%rax), %rcx
jmp 0x672c1