// File: /workspace/github_c_makefile_star2_O0/enzo1982[P]smooth/libraries/libcpuid/cpuid_main.c
// Function: cpu_ident_apic_id
static bool cpu_ident_apic_id(logical_cpu_t logical_cpu, struct cpu_raw_data_t* raw, struct internal_apic_info_t* apic_info)
{
	bool is_apic_id_supported = false;
	uint8_t subleaf;
	uint8_t level_type = 0;
	uint8_t mask_core_shift = 0;
	uint32_t mask_smt_shift, core_plus_mask_width, package_mask, core_mask, smt_mask;
	cpu_vendor_t vendor = VENDOR_UNKNOWN;
	char vendor_str[VENDOR_STR_MAX];

	apic_info_t_constructor(apic_info, logical_cpu);

	/* Only AMD and Intel x86 CPUs support Extended Processor Topology Eumeration */
	vendor = cpuid_vendor_identify(raw->basic_cpuid[0], vendor_str);
	switch (vendor) {
		case VENDOR_INTEL:
		case VENDOR_AMD:
			is_apic_id_supported = true;
			break;
		case VENDOR_UNKNOWN:
			cpuid_set_error(ERR_CPU_UNKN);
			/* Fall through */
		default:
			is_apic_id_supported = false;
			break;
	}

	/* Documentation: Intel® 64 and IA-32 Architectures Software Developer’s Manual
	   Combined Volumes: 1, 2A, 2B, 2C, 2D, 3A, 3B, 3C, 3D and 4
	   https://cdrdv2.intel.com/v1/dl/getContent/671200
	   Examples 8-20 and 8-22 are implemented below.
	*/

	/* Check if leaf 0Bh is supported and if number of logical processors at this level type is greater than 0 */
	if (!is_apic_id_supported || (raw->basic_cpuid[0][EAX] < 11) || (EXTRACTS_BITS(raw->basic_cpuid[11][EBX], 15, 0) == 0)) {
		warnf("Warning: APIC ID are not supported, core count can be wrong if SMT is disabled and cache instances count will not be available.\n");
		return false;
	}

	/* Derive core mask offsets */
	for (subleaf = 0; (raw->intel_fn11[subleaf][EAX] != 0x0) && (raw->intel_fn11[subleaf][EBX] != 0x0) && (subleaf < MAX_INTELFN11_LEVEL); subleaf++)
		mask_core_shift = EXTRACTS_BITS(raw->intel_fn11[subleaf][EAX], 4, 0);

	/* Find mask and ID for SMT and cores */
	for (subleaf = 0; (raw->intel_fn11[subleaf][EAX] != 0x0) && (raw->intel_fn11[subleaf][EBX] != 0x0) && (subleaf < MAX_INTELFN11_LEVEL); subleaf++) {
		level_type         = EXTRACTS_BITS(raw->intel_fn11[subleaf][ECX], 15, 8);
		apic_info->apic_id = raw->intel_fn11[subleaf][EDX];
		switch (level_type) {
			case 0x01:
				mask_smt_shift    = EXTRACTS_BITS(raw->intel_fn11[subleaf][EAX], 4, 0);
				smt_mask          = ~( (-1) << mask_smt_shift);
				apic_info->smt_id = apic_info->apic_id & smt_mask;
				break;
			case 0x02:
				core_plus_mask_width = ~( (-1) << mask_core_shift);
				core_mask            = core_plus_mask_width ^ smt_mask;
				apic_info->core_id   = apic_info->apic_id & core_mask;
				break;
			default:
				break;
		}
	}

	/* Find mask and ID for packages */
	package_mask          = (-1) << mask_core_shift;
	apic_info->package_id = apic_info->apic_id & package_mask;

	return (level_type > 0);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x60, %rsp
movw %di, %ax
movw %ax, -0x4(%rbp)
movq %rsi, -0x10(%rbp)
movq %rdx, -0x18(%rbp)
movb $0x0, -0x19(%rbp)
movb $0x0, -0x1b(%rbp)
movb $0x0, -0x1c(%rbp)
movl $0xffffffff, -0x34(%rbp) # imm = 0xFFFFFFFF
movq -0x18(%rbp), %rdi
movzwl -0x4(%rbp), %esi
callq 0x1355a0
movq -0x10(%rbp), %rdi
leaq -0x50(%rbp), %rsi
callq 0x134d30
movl %eax, -0x34(%rbp)
movl -0x34(%rbp), %eax
movl %eax, -0x54(%rbp)
subl $-0x1, %eax
je 0x1341d4
jmp 0x1341c4
movl -0x54(%rbp), %eax
subl $0x1, %eax
ja 0x1341de
jmp 0x1341ce
movb $0x1, -0x19(%rbp)
jmp 0x1341e2
movl $0xfffffff9, %edi       # imm = 0xFFFFFFF9
callq 0x131660
movb $0x0, -0x19(%rbp)
testb $0x1, -0x19(%rbp)
je 0x13420c
movq -0x10(%rbp), %rax
cmpl $0xb, (%rax)
jb 0x13420c
movq -0x10(%rbp), %rax
movl 0xb4(%rax), %eax
shrl $0x0, %eax
movl %eax, %eax
andq $0xffff, %rax           # imm = 0xFFFF
cmpq $0x0, %rax
jne 0x134223
leaq 0x73d5f(%rip), %rdi     # 0x1a7f72
movb $0x0, %al
callq 0x1356a0
movb $0x0, -0x1(%rbp)
jmp 0x134400
movb $0x0, -0x1a(%rbp)
movq -0x10(%rbp), %rcx
addq $0x480, %rcx            # imm = 0x480
movzbl -0x1a(%rbp), %eax
shlq $0x4, %rax
addq %rax, %rcx
xorl %eax, %eax
cmpl $0x0, (%rcx)
movb %al, -0x55(%rbp)
je 0x134275
movq -0x10(%rbp), %rcx
addq $0x480, %rcx            # imm = 0x480
movzbl -0x1a(%rbp), %eax
shlq $0x4, %rax
addq %rax, %rcx
xorl %eax, %eax
cmpl $0x0, 0x4(%rcx)
movb %al, -0x55(%rbp)
je 0x134275
movzbl -0x1a(%rbp), %eax
cmpl $0x4, %eax
setl %al
movb %al, -0x55(%rbp)
movb -0x55(%rbp), %al
testb $0x1, %al
jne 0x13427e
jmp 0x1342ae
movq -0x10(%rbp), %rax
addq $0x480, %rax            # imm = 0x480
movzbl -0x1a(%rbp), %ecx
shlq $0x4, %rcx
addq %rcx, %rax
movl (%rax), %eax
shrl $0x0, %eax
movl %eax, %eax
andq $0x1f, %rax
movb %al, -0x1c(%rbp)
movb -0x1a(%rbp), %al
addb $0x1, %al
movb %al, -0x1a(%rbp)
jmp 0x134227
movb $0x0, -0x1a(%rbp)
movq -0x10(%rbp), %rcx
addq $0x480, %rcx            # imm = 0x480
movzbl -0x1a(%rbp), %eax
shlq $0x4, %rax
addq %rax, %rcx
xorl %eax, %eax
cmpl $0x0, (%rcx)
movb %al, -0x56(%rbp)
je 0x134300
movq -0x10(%rbp), %rcx
addq $0x480, %rcx            # imm = 0x480
movzbl -0x1a(%rbp), %eax
shlq $0x4, %rax
addq %rax, %rcx
xorl %eax, %eax
cmpl $0x0, 0x4(%rcx)
movb %al, -0x56(%rbp)
je 0x134300
movzbl -0x1a(%rbp), %eax
cmpl $0x4, %eax
setl %al
movb %al, -0x56(%rbp)
movb -0x56(%rbp), %al
testb $0x1, %al
jne 0x13430c
jmp 0x1343d3
movq -0x10(%rbp), %rax
movzbl -0x1a(%rbp), %ecx
shll $0x4, %ecx
movb 0x489(%rax,%rcx), %al
movb %al, -0x1b(%rbp)
movq -0x10(%rbp), %rax
movzbl -0x1a(%rbp), %ecx
shll $0x4, %ecx
movl 0x48c(%rax,%rcx), %ecx
movq -0x18(%rbp), %rax
movl %ecx, (%rax)
movzbl -0x1b(%rbp), %eax
movl %eax, -0x5c(%rbp)
subl $0x1, %eax
je 0x134351
jmp 0x134347
movl -0x5c(%rbp), %eax
subl $0x2, %eax
je 0x134396
jmp 0x1343c2
movq -0x10(%rbp), %rax
addq $0x480, %rax            # imm = 0x480
movzbl -0x1a(%rbp), %ecx
shlq $0x4, %rcx
addq %rcx, %rax
movl (%rax), %eax
shrl $0x0, %eax
movl %eax, %eax
andq $0x1f, %rax
movl %eax, -0x20(%rbp)
movl -0x20(%rbp), %ecx
movl $0xffffffff, %eax       # imm = 0xFFFFFFFF
shll %cl, %eax
xorl $-0x1, %eax
movl %eax, -0x30(%rbp)
movq -0x18(%rbp), %rax
movl (%rax), %ecx
andl -0x30(%rbp), %ecx
movq -0x18(%rbp), %rax
movl %ecx, 0xc(%rax)
jmp 0x1343c4
movzbl -0x1c(%rbp), %ecx
movl $0xffffffff, %eax       # imm = 0xFFFFFFFF
shll %cl, %eax
xorl $-0x1, %eax
movl %eax, -0x24(%rbp)
movl -0x24(%rbp), %eax
xorl -0x30(%rbp), %eax
movl %eax, -0x2c(%rbp)
movq -0x18(%rbp), %rax
movl (%rax), %ecx
andl -0x2c(%rbp), %ecx
movq -0x18(%rbp), %rax
movl %ecx, 0x8(%rax)
jmp 0x1343c4
jmp 0x1343c4
jmp 0x1343c6
movb -0x1a(%rbp), %al
addb $0x1, %al
movb %al, -0x1a(%rbp)
jmp 0x1342b2
movzbl -0x1c(%rbp), %ecx
movl $0xffffffff, %eax       # imm = 0xFFFFFFFF
shll %cl, %eax
movl %eax, -0x28(%rbp)
movq -0x18(%rbp), %rax
movl (%rax), %ecx
andl -0x28(%rbp), %ecx
movq -0x18(%rbp), %rax
movl %ecx, 0x4(%rax)
movzbl -0x1b(%rbp), %eax
cmpl $0x0, %eax
setg %al
andb $0x1, %al
movb %al, -0x1(%rbp)
movb -0x1(%rbp), %al
andb $0x1, %al
addq $0x60, %rsp
popq %rbp
retq
nopl (%rax,%rax)