// File: /workspace/github_c_makefile_star2_O1/markdryan[P]subtilis/arch/arm32/arm_encode.c
// Function: prv_encode_vfp_data_instr
static void prv_encode_vfp_data_instr(void *user_data, subtilis_arm_op_t *op,
				      subtilis_arm_instr_type_t type,
				      subtilis_vfp_data_instr_t *instr,
				      subtilis_error_t *err)
{
	uint32_t word = 0;
	bool float32 = false;
	subtilis_arm_encode_ud_t *ud = user_data;

	prv_check_pool(ud, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;

	switch (type) {
	case SUBTILIS_VFP_INSTR_FMACS:
		word |= 0xe000a00;
		float32 = true;
		break;
	case SUBTILIS_VFP_INSTR_FMACD:
		word |= 0xe000b00;
		break;
	case SUBTILIS_VFP_INSTR_FNMACS:
		word |= 0xe000a40;
		float32 = true;
		break;
	case SUBTILIS_VFP_INSTR_FNMACD:
		word |= 0xe000b40;
		break;
	case SUBTILIS_VFP_INSTR_FMSCS:
		word |= 0xe100a00;
		float32 = true;
		break;
	case SUBTILIS_VFP_INSTR_FMSCD:
		word |= 0xe100b00;
		break;
	case SUBTILIS_VFP_INSTR_FNMSCS:
		word |= 0xe100a40;
		float32 = true;
		break;
	case SUBTILIS_VFP_INSTR_FNMSCD:
		word |= 0xe100b40;
		break;
	case SUBTILIS_VFP_INSTR_FMULS:
		word |= 0xe200a00;
		float32 = true;
		break;
	case SUBTILIS_VFP_INSTR_FMULD:
		word |= 0xe200b00;
		break;
	case SUBTILIS_VFP_INSTR_FNMULS:
		word |= 0xe200a40;
		float32 = true;
		break;
	case SUBTILIS_VFP_INSTR_FNMULD:
		word |= 0xe200b40;
		break;
	case SUBTILIS_VFP_INSTR_FADDS:
		word |= 0xe300a00;
		float32 = true;
		break;
	case SUBTILIS_VFP_INSTR_FADDD:
		word |= 0xe300b00;
		break;
	case SUBTILIS_VFP_INSTR_FSUBS:
		word |= 0xe300a40;
		float32 = true;
		break;
	case SUBTILIS_VFP_INSTR_FSUBD:
		word |= 0xe300b40;
		break;
	case SUBTILIS_VFP_INSTR_FDIVS:
		word |= 0xe800a00;
		float32 = true;
		break;
	case SUBTILIS_VFP_INSTR_FDIVD:
		word |= 0xe800b00;
		break;
	default:
		subtilis_error_set_assertion_failed(err);
		return;
	}

	word |= instr->ccode << 28;

	if (float32) {
		word |= ((instr->op1 >> 1) & 0xf) << 16;
		word |= (instr->op1 & 1) << 7;

		word |= (instr->op2 >> 1) & 0xf;
		word |= (instr->op2 & 1) << 5;

		word |= ((instr->dest >> 1) & 0xf) << 12;
		word |= (instr->dest & 1) << 22;
	} else {
		word |= (instr->op1 & 0xf) << 16;
		word |= instr->op2 & 0xf;
		word |= (instr->dest & 0xf) << 12;
	}

	prv_ensure_code(ud, err);
	if (err->type != SUBTILIS_ERROR_OK)
		return;

	prv_add_word(ud, word, err);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movq %r8, %r14
movq %rcx, %r15
movl %edx, %r12d
movq %rdi, %rbx
xorl %esi, %esi
movq %r8, %rdx
callq 0x59d65
cmpl $0x0, (%r14)
jne 0x59128
addl $-0x5f, %r12d
cmpl $0x11, %r12d
ja 0x59180
movb $0x1, %al
leaq 0x1cc81(%rip), %rcx     # 0x75cb8
movslq (%rcx,%r12,4), %rdx
addq %rcx, %rdx
jmpq *%rdx
movl $0xe000a00, %ebp        # imm = 0xE000A00
jmp 0x590a9
movl $0xe800a00, %ebp        # imm = 0xE800A00
jmp 0x590a9
movl $0xe300a40, %ebp        # imm = 0xE300A40
jmp 0x590a9
movl $0xe200b40, %ebp        # imm = 0xE200B40
jmp 0x590a7
movl $0xe100a00, %ebp        # imm = 0xE100A00
jmp 0x590a9
movl $0xe300a00, %ebp        # imm = 0xE300A00
jmp 0x590a9
movl $0xe200b00, %ebp        # imm = 0xE200B00
jmp 0x590a7
movl $0xe000a40, %ebp        # imm = 0xE000A40
jmp 0x590a9
movl $0xe300b40, %ebp        # imm = 0xE300B40
jmp 0x590a7
movl $0xe000b40, %ebp        # imm = 0xE000B40
jmp 0x590a7
movl $0xe100b40, %ebp        # imm = 0xE100B40
jmp 0x590a7
movl $0xe000b00, %ebp        # imm = 0xE000B00
jmp 0x590a7
movl $0xe800b00, %ebp        # imm = 0xE800B00
jmp 0x590a7
movl $0xe100b00, %ebp        # imm = 0xE100B00
jmp 0x590a7
movl $0xe300b00, %ebp        # imm = 0xE300B00
xorl %eax, %eax
movl 0x10(%r15), %ecx
testb %al, %al
je 0x590f2
movl %ecx, %eax
andl $0x1e, %eax
shll $0xf, %eax
shll $0x7, %ecx
movzbl %cl, %ecx
orl %eax, %ecx
movl 0x8(%r15), %r12d
movl 0x18(%r15), %eax
movl %eax, %edx
shrl %edx
andl $0xf, %edx
orl %ecx, %edx
shll $0x5, %eax
andl $0x20, %eax
orl %edx, %eax
movl %r12d, %ecx
andl $0x1e, %ecx
shll $0xb, %ecx
orl %eax, %ecx
andl $0x1, %r12d
shll $0x16, %r12d
orl %ecx, %r12d
jmp 0x5910f
andl $0xf, %ecx
shll $0x10, %ecx
movl 0x8(%r15), %eax
movl 0x18(%r15), %edx
andl $0xf, %edx
orl %ecx, %edx
shll $0xc, %eax
movzwl %ax, %r12d
orl %edx, %r12d
movl (%r15), %r15d
movl $0x4, %esi
movq %rbx, %rdi
movq %r14, %rdx
callq 0x57496
cmpl $0x0, (%r14)
je 0x59131
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
movq 0x30(%rbx), %rax
testb $0x3, %al
je 0x5915a
leaq 0x1cd00(%rip), %rdx     # 0x75e40
movq %r14, %rdi
movl $0x5d, %esi
movl $0xfb, %ecx
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
jmp 0x145f4
shll $0x1c, %r15d
orl %ebp, %r15d
orl %r15d, %r12d
movq 0x28(%rbx), %rcx
movl %r12d, (%rcx,%rax)
addq $0x4, %rax
movq %rax, 0x30(%rbx)
jmp 0x59128
movl $0xe100a40, %ebp        # imm = 0xE100A40
jmp 0x590a9
leaq 0x1ccb9(%rip), %rdx     # 0x75e40
movq %r14, %rdi
movl $0xf, %esi
movl $0x77f, %ecx            # imm = 0x77F
jmp 0x5914d
movl $0xe200a40, %ebp        # imm = 0xE200A40
jmp 0x590a9
movl $0xe200a00, %ebp        # imm = 0xE200A00
jmp 0x590a9