// File: /workspace/github_cpp_makefile_star2_O1/jkingan[P]ladyheather/heathgps.cpp
// Function: parse_x72_val(int)
void parse_x72_val(int id)
{
char *s;
char *s2;
u32 val;
float fp_val;
int fp;
int i;

   // parse and decode the FIRST value from a message response

   fp_val = 0.0F;
   val = 0;

   s = strchr(scpi_status_line, ':');  // see if there is a ':' numeric parameter on the line
   if(s) {
      if(id == X72_SET_DDS_MSG) {  // "f" set DDS frequency offset
         fp = 1;
         fp_val = (float) atof(s+1);
      }
      else if(strchr(scpi_status_line, '.')) {  // floating point value
         fp = 1;
         fp_val = x72_float(s+1);
      }
      else {  // decimal value
         fp = 0;
         val = (u32) atohex(s+1);
      }

      if(id == X72_GET_PPS_MSG) {  // see if PPS line also has hw discipline state
         s2 = strstr(scpi_status_line, "PPSSTATE:");
         if(s2) {
            have_x72_fw_dis = 1;
            if(x72_user_dis == 0) {
               x72_state = atoi(&s2[9]);
               have_x72_state = 2;
            
               discipline_mode = DIS_MODE_NORMAL;
               if(x72_state < X72_STATE_START0) discipline_mode = DIS_MODE_UNKNOWN;
               if(x72_state > X72_STATE_SLOPECALC) discipline_mode = DIS_MODE_UNKNOWN;

               if     (x72_state == X72_STATE_START0)   discipline_mode = DIS_MODE_NORMAL; // POWERUP; !!!!! qwerty
               else if(x72_state == X72_STATE_START1)   discipline_mode = DIS_MODE_POWERUP;
               else if(x72_state == X72_STATE_START2)   discipline_mode = DIS_MODE_POWERUP;
               else if(x72_state == X72_STATE_HOLDOVER) discipline_mode = DIS_MODE_AUTO_HOLD;
               else if(x72_state == X72_STATE_JAM1)     discipline_mode = DIS_MODE_RECOVERY;
               else if(x72_state == X72_STATE_JAM2)     discipline_mode = DIS_MODE_RECOVERY;
               else if(x72_state == X72_STATE_JAM2)     discipline_mode = DIS_MODE_RECOVERY;
            }
         }
      }

      *s = 0;  // trim the rest of the line after the first val
   }

   if(x72_sync_fail(id)) {  // see if message sync was lost (invalid parameter seen for a message response)
   }
   else if(id == X72_HEALTH_MSG) {  // "w" health message values
      if(strstr(scpi_status_line, "SCONT")) {
         x72_scont = val;
         have_x72_scont = 1;
      }
      else if(strstr(scpi_status_line, "SERNUM")) {
         x72_sernum = val;
         have_x72_sernum = 1;
      }
      else if(strstr(scpi_status_line, "PWRHRS")) {
         scpi_life = val;
         have_lifetime = 1;
      }
      else if(strstr(scpi_status_line, "PWRTICKS")) {
         x72_pwrticks = val;
         have_x72_pwrticks = 1;
      }
      else if(strstr(scpi_status_line, "LHHRS")) {
         x72_lhhrs = val;
         have_x72_lhhrs = 1;
      }
      else if(strstr(scpi_status_line, "LHTICKS")) {
         x72_lhticks = val;
         have_x72_lhticks = 1;
      }
      else if(strstr(scpi_status_line, "RHHRS")) {
         x72_rhhrs = val;
         have_x72_rhhrs = 1;
      }
      else if(strstr(scpi_status_line, "RHTICKS")) {
         x72_rhticks = val;
         have_x72_rhticks = 1;
      }
      else if(strstr(scpi_status_line, "DMP17")) {
         x72_dmp17 = (double) fp_val;
         have_x72_dmp17 = 1;
      }
      else if(strstr(scpi_status_line, "DMP5")) {
         x72_dmp5 = (double) fp_val;
         have_x72_dmp5 = 1;
      }
      else if(strstr(scpi_status_line, "DHTRVOLT")) {
         x72_dhtrvolt = (double) fp_val;
         have_x72_dhtrvolt = 1;
      }
      else if(strstr(scpi_status_line, "PLMP")) {
         x72_plmp = (double) fp_val;
         have_x72_plmp = 1;
      }
      else if(strstr(scpi_status_line, "PRES")) {
         x72_pres = (double) fp_val;
         have_x72_pres = 1;
      }
      else if(strstr(scpi_status_line, "DLVTHERMC")) {
         x72_dlvthermc = (double) fp_val;
         have_x72_dlvthermc = 1;
      }
      else if(strstr(scpi_status_line, "DRVTHERMC")) {
         x72_drvthermc = (double) fp_val;
         have_x72_drvthermc = 1;
      }
      else if(strstr(scpi_status_line, "DLVOLT")) {
         x72_dlvolt = (double) fp_val;
         have_x72_dlvolt = 1;
      }
      else if(strstr(scpi_status_line, "DMVOUTC")) {
         x72_dmvoutc = (double) fp_val;
         have_x72_dmvoutc = 1;
      }
      else if(strstr(scpi_status_line, "DTEMPLO")) {
         x72_dtemplo = (double) fp_val;
         have_x72_dtemplo = 1;
      }
      else if(strstr(scpi_status_line, "DTEMPHI")) {
         x72_dtemphi = (double) fp_val;
         have_x72_dtemphi = 1;
      }
      else if(strstr(scpi_status_line, "DVOLTLO")) {
         x72_dvoltlo = (double) fp_val;
         have_x72_dvoltlo = 1;
      }
      else if(strstr(scpi_status_line, "DVOLTHI")) {
         x72_dvolthi = (double) fp_val;
         have_x72_dvolthi = 1;
      }
      else if(strstr(scpi_status_line, "IFPGACTL")) {
         x72_creg = val;
         decode_x72_creg();
         have_x72_creg = 1;
      }
      else if(strstr(scpi_status_line, "DCURTEMP")) {
         temperature = (DATA_SIZE) fp_val;
         have_temperature = 105;
      }
      else if(strstr(scpi_status_line, "DLVOUTC")) {
         x72_dlvoutc = (double) fp_val;
         have_x72_dlvoutc = 1;
      }
      else if(strstr(scpi_status_line, "DRVOUTC")) {
         x72_drvoutc = (double) fp_val;
         have_x72_drvoutc = 1;
      }
      else if(strstr(scpi_status_line, "DMV2DEMAVG")) {
         x72_dmv2demavg = (double) fp_val;
         have_x72_dmv2demavg = 1;
      }
   }
   else if(id == X72_GET_CREG_MSG) {  // "p" get control reg
      if(strstr(scpi_status_line, "CONTROL REG")) {
         x72_creg = val;
         decode_x72_creg();
         have_x72_creg = 1;
      }
   }
   else if(id == X72_GET_PPS_MSG) {  // "j" get PPS offset value
      if(strstr(scpi_status_line, "DELTA REG")) {
         last_x72_pps = x72_pps;
         x72_pps = val;
         x72_ival = i = fix_x72_tics((int) val);
         if(have_x72_pps == 0) {
            last_ival = x72_ival;
            last_x72_pps = x72_pps;
         }
         x72_pps_diff = (x72_ival - last_ival);
         last_ival = x72_ival;

///      i = fix_x72_tics(x72_ival);
         pps_offset = (OFS_SIZE) (((double) i) * 1.0E9 / x72_osc);
last_pps_offset = pps_offset;
tsip_error = 0;
// if(x72_user_dis) sprintf(debug_text6, "x72_pps:%d  val:%d  lastiv:%d  i:%d  pps_offset:%g", x72_pps, val, i, last_ival, pps_offset);  //burp
         have_pps_offset = 1;
         have_x72_pps = 1;
         ++x72_run_time;

      }
   }
   else if(id == X72_SET_DDS_MSG) {  // "f" set DDS frequency offset
      if(strstr(scpi_status_line, "CHANGE FREQUENCY")) {
         x72_dds_word = fp_val;
         have_x72_dds_word = 1;
      }
   }
   else if(id == X72_SET_DMODE_MSG) {  // "g" set discipling
      if(strstr(scpi_status_line, "DISABLED")) {
         have_x72_fw_dmode = 1;
         x72_fw_dmode = 0;
      }
      else if(strstr(scpi_status_line, "ENABLED")) {
         have_x72_fw_dmode = 1;
         x72_fw_dmode = 1;
      }
   }
   else if(id == X72_SET_FC_MSG) {  // "a" set EFC enable
      if(strstr(scpi_status_line, "DISABLED")) { 
         x72_efc = 0; 
         have_x72_efc = 1; 
      }
      else if(strstr(scpi_status_line, "ENABLED")) { 
         x72_efc = 1; 
         have_x72_efc = 1; 
      }
   }
   else if(id == X72_SET_SRVC_MSG) {  // "l" set service output pin state
      if(strstr(scpi_status_line, "HIGH")) { 
         x72_srvc = 1; 
         have_x72_srvc = 1; 
      }
      else if(strstr(scpi_status_line, "LOW")) { 
         x72_srvc = 0; 
         have_x72_srvc = 1; 
      }
   }


if(0 && debug_file) {
   if((scpi_status_line[0] == 'R') && (scpi_status_line[1] == '>')) ;  // no obvious number to show
   else if(scpi_status_line[1] == 0) ; // no obvious number to show 
   else if(fp) fprintf(debug_file, "%s -> 0x%08X -> %g\n", scpi_status_line, val, fp_val);
   else        fprintf(debug_file, "%s -> 0x%08X -> %u\n", scpi_status_line, val,  val);
}
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x10, %rsp
movl %edi, %r14d
leaq 0x2dea6b(%rip), %rdi    # 0x36cb40
movl $0x3a, %esi
callq 0x9100
testq %rax, %rax
je 0x8e0ff
movq %rax, %r15
cmpl $0x2bd, %r14d           # imm = 0x2BD
jne 0x8e109
leaq 0x1(%r15), %rdi
callq 0x9470
cvtsd2ss %xmm0, %xmm0
jmp 0x8e135
xorl %ebx, %ebx
xorps %xmm0, %xmm0
jmp 0x8e1e2
leaq 0x2dea30(%rip), %rdi    # 0x36cb40
movl $0x2e, %esi
callq 0x9100
movq %rax, %r12
leaq 0x1(%r15), %rdi
callq 0x98c6
movl %eax, %ebx
testq %r12, %r12
je 0x8e252
movd %ebx, %xmm0
xorl %ebx, %ebx
cmpl $0x2c1, %r14d           # imm = 0x2C1
jne 0x8e1da
leaq 0x2de9f5(%rip), %rdi    # 0x36cb40
leaq 0x95be6(%rip), %rsi     # 0x123d38
movd %xmm0, -0x28(%rbp)
callq 0x9090
movd -0x28(%rbp), %xmm0
testq %rax, %rax
je 0x8e1da
leaq 0x18cba7(%rip), %rcx    # 0x21ad14
movl $0x1, (%rcx)
leaq 0x18cd76(%rip), %rcx    # 0x21aef0
cmpl $0x0, (%rcx)
jne 0x8e1da
addq $0x9, %rax
movq %rax, %rdi
callq 0x95e0
movd -0x28(%rbp), %xmm0
leaq 0x18cc69(%rip), %rcx    # 0x21ae00
movl %eax, (%rcx)
movl %eax, %ecx
sarl $0x1f, %ecx
cmpl $0xa, %eax
movl $0xff, %esi
cmovll %ecx, %esi
leaq 0x18cb24(%rip), %rcx    # 0x21acd4
movl $0x2, (%rcx)
leaq 0x27f2da(%rip), %rdx    # 0x30d497
movb %sil, (%rdx)
cmpl $0x5, %eax
ja 0x8e1da
shll $0x3, %eax
movabsq $0x40402010100, %rsi    # imm = 0x40402010100
movl %eax, %ecx
shrq %cl, %rsi
movb %sil, (%rdx)
movb $0x0, (%r15)
cvtss2sd %xmm0, %xmm0
movsd %xmm0, -0x28(%rbp)
movl %r14d, %edi
callq 0x8f7f4
testl %eax, %eax
je 0x8e200
addq $0x10, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
addl $0xfffffd44, %r14d      # imm = 0xFFFFFD44
cmpl $0xd, %r14d
ja 0x8e1f3
leaq 0x91378(%rip), %rax     # 0x11f58c
movslq (%rax,%r14,4), %rcx
addq %rax, %rcx
jmpq *%rcx
leaq 0x2de91c(%rip), %rdi    # 0x36cb40
leaq 0x9a754(%rip), %rsi     # 0x12897f
callq 0x9090
testq %rax, %rax
je 0x8e43a
leaq 0x18caf8(%rip), %rax    # 0x21ad38
movl $0x0, (%rax)
leaq 0x18cab7(%rip), %rax    # 0x21ad04
jmp 0x8e8b2
pxor %xmm0, %xmm0
jmp 0x8e137
leaq 0x2de8de(%rip), %rdi    # 0x36cb40
leaq 0x95a96(%rip), %rsi     # 0x123cff
callq 0x9090
testq %rax, %rax
je 0x8e1f3
leaq 0x18cb5e(%rip), %rax    # 0x21add8
movl %ebx, (%rax)
callq 0x8f79d
leaq 0x18c9e8(%rip), %rax    # 0x21ac70
jmp 0x8e8b2
leaq 0x2de8ac(%rip), %rdi    # 0x36cb40
leaq 0x95b64(%rip), %rsi     # 0x123dff
callq 0x9090
testq %rax, %rax
je 0x8e1f3
leaq 0x18cbf8(%rip), %rax    # 0x21aea8
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18ca18(%rip), %rax    # 0x21acd8
jmp 0x8e8b2
leaq 0x2de874(%rip), %rdi    # 0x36cb40
leaq 0x95a6f(%rip), %rsi     # 0x123d42
callq 0x9090
testq %rax, %rax
je 0x8e46d
leaq 0x18caf4(%rip), %rax    # 0x21addc
movl %ebx, (%rax)
leaq 0x18c983(%rip), %rax    # 0x21ac74
jmp 0x8e8b2
leaq 0x2de843(%rip), %rdi    # 0x36cb40
leaq 0x9a67b(%rip), %rsi     # 0x12897f
callq 0x9090
testq %rax, %rax
je 0x8e49e
leaq 0x18c9ff(%rip), %rax    # 0x21ad18
movl $0x1, (%rax)
leaq 0x18caea(%rip), %rax    # 0x21ae10
movl $0x0, (%rax)
jmp 0x8e1f3
leaq 0x2de808(%rip), %rdi    # 0x36cb40
leaq 0x959cc(%rip), %rsi     # 0x123d0b
callq 0x9090
testq %rax, %rax
je 0x8e1f3
leaq 0x18caa8(%rip), %rax    # 0x21adfc
movl (%rax), %ecx
movl %ecx, 0x2de88c(%rip)    # 0x36cbe8
leaq 0x18c905(%rip), %rcx    # 0x21ac68
movsd (%rcx), %xmm0
cvttsd2si %xmm0, %ecx
movl %ecx, %edx
shrl $0x1f, %edx
addl %ecx, %edx
sarl %edx
xorl %esi, %esi
cmpl %ebx, %edx
cmovll %ecx, %esi
movl %ebx, (%rax)
movl %ebx, %ecx
subl %esi, %ecx
leaq 0x18cbb4(%rip), %rax    # 0x21af3c
movl %ecx, (%rax)
leaq 0x18c93f(%rip), %rax    # 0x21acd0
cmpl $0x0, (%rax)
jne 0x8e3a2
movl %ecx, 0x2e3b04(%rip)    # 0x371ea0
movl %ebx, 0x2de846(%rip)    # 0x36cbe8
movl %ecx, %edx
subl 0x2e3af6(%rip), %edx    # 0x371ea0
movl %edx, 0x2de83c(%rip)    # 0x36cbec
movl %ecx, 0x2e3aea(%rip)    # 0x371ea0
cvtsi2sd %ecx, %xmm1
mulsd 0x7ac66(%rip), %xmm1    # 0x109028
divsd %xmm0, %xmm1
leaq 0x27e3eb(%rip), %rcx    # 0x30c7b8
movsd %xmm1, (%rcx)
leaq 0x27e570(%rip), %rcx    # 0x30c948
movsd %xmm1, (%rcx)
leaq 0x1b0b8d(%rip), %rcx    # 0x23ef70
movl $0x0, (%rcx)
leaq 0x27ee48(%rip), %rcx    # 0x30d238
movl $0x1, %edx
movl %edx, (%rcx)
movl %edx, (%rax)
incl 0x2de7f1(%rip)          # 0x36cbf0
jmp 0x8e1f3
leaq 0x2de735(%rip), %rdi    # 0x36cb40
leaq 0x95a06(%rip), %rsi     # 0x123e18
callq 0x9090
testq %rax, %rax
je 0x8e4d6
leaq 0x18c915(%rip), %rax    # 0x21ad3c
movl $0x1, %ecx
movl %ecx, (%rax)
leaq 0x18c8d3(%rip), %rax    # 0x21ad08
jmp 0x8e4cf
leaq 0x2de6ff(%rip), %rdi    # 0x36cb40
leaq 0x959c8(%rip), %rsi     # 0x123e10
callq 0x9090
testq %rax, %rax
je 0x8e1f3
leaq 0x18c8db(%rip), %rax    # 0x21ad38
movl $0x1, %ecx
movl %ecx, (%rax)
leaq 0x18c899(%rip), %rax    # 0x21ad04
jmp 0x8e4cf
leaq 0x2de6cc(%rip), %rdi    # 0x36cb40
leaq 0x958cd(%rip), %rsi     # 0x123d48
callq 0x9090
testq %rax, %rax
je 0x8e50b
leaq 0x18c950(%rip), %rax    # 0x21ade0
movl %ebx, (%rax)
leaq 0x18c7df(%rip), %rax    # 0x21ac78
jmp 0x8e8b2
leaq 0x2de69b(%rip), %rdi    # 0x36cb40
leaq 0x95964(%rip), %rsi     # 0x123e10
callq 0x9090
testq %rax, %rax
je 0x8e1f3
leaq 0x18c857(%rip), %rax    # 0x21ad18
movl $0x1, %ecx
movl %ecx, (%rax)
leaq 0x18c941(%rip), %rax    # 0x21ae10
movl %ecx, (%rax)
jmp 0x8e1f3
leaq 0x2de663(%rip), %rdi    # 0x36cb40
leaq 0x98f09(%rip), %rsi     # 0x1273ed
callq 0x9090
testq %rax, %rax
je 0x8e1f3
leaq 0x18c843(%rip), %rax    # 0x21ad3c
movl $0x0, (%rax)
leaq 0x18c802(%rip), %rax    # 0x21ad08
jmp 0x8e8b2
leaq 0x2de62e(%rip), %rdi    # 0x36cb40
leaq 0x95836(%rip), %rsi     # 0x123d4f
callq 0x9090
testq %rax, %rax
je 0x8e538
leaq 0x27ef32(%rip), %rax    # 0x30d45c
movl %ebx, (%rax)
leaq 0x27ed95(%rip), %rax    # 0x30d2c8
jmp 0x8e8b2
leaq 0x2de601(%rip), %rdi    # 0x36cb40
leaq 0x95810(%rip), %rsi     # 0x123d56
callq 0x9090
testq %rax, %rax
je 0x8e565
leaq 0x18c88d(%rip), %rax    # 0x21ade4
movl %ebx, (%rax)
leaq 0x18c71c(%rip), %rax    # 0x21ac7c
jmp 0x8e8b2
leaq 0x2de5d4(%rip), %rdi    # 0x36cb40
leaq 0x957ec(%rip), %rsi     # 0x123d5f
callq 0x9090
testq %rax, %rax
je 0x8e592
leaq 0x18c864(%rip), %rax    # 0x21ade8
movl %ebx, (%rax)
leaq 0x18c6f3(%rip), %rax    # 0x21ac80
jmp 0x8e8b2
leaq 0x2de5a7(%rip), %rdi    # 0x36cb40
leaq 0x957c5(%rip), %rsi     # 0x123d65
callq 0x9090
testq %rax, %rax
je 0x8e5bf
leaq 0x18c83b(%rip), %rax    # 0x21adec
movl %ebx, (%rax)
leaq 0x18c6ca(%rip), %rax    # 0x21ac84
jmp 0x8e8b2
leaq 0x2de57a(%rip), %rdi    # 0x36cb40
leaq 0x957a0(%rip), %rsi     # 0x123d6d
callq 0x9090
testq %rax, %rax
je 0x8e5ec
leaq 0x18c812(%rip), %rax    # 0x21adf0
movl %ebx, (%rax)
leaq 0x18c6a1(%rip), %rax    # 0x21ac88
jmp 0x8e8b2
leaq 0x2de54d(%rip), %rdi    # 0x36cb40
leaq 0x95779(%rip), %rsi     # 0x123d73
callq 0x9090
testq %rax, %rax
je 0x8e619
leaq 0x18c7e9(%rip), %rax    # 0x21adf4
movl %ebx, (%rax)
leaq 0x18c678(%rip), %rax    # 0x21ac8c
jmp 0x8e8b2
leaq 0x2de520(%rip), %rdi    # 0x36cb40
leaq 0x95754(%rip), %rsi     # 0x123d7b
callq 0x9090
testq %rax, %rax
je 0x8e64d
leaq 0x18c7f0(%rip), %rax    # 0x21ae28
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c648(%rip), %rax    # 0x21ac90
jmp 0x8e8b2
leaq 0x2de4ec(%rip), %rdi    # 0x36cb40
leaq 0x95726(%rip), %rsi     # 0x123d81
callq 0x9090
testq %rax, %rax
je 0x8e681
leaq 0x18c7c4(%rip), %rax    # 0x21ae30
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c618(%rip), %rax    # 0x21ac94
jmp 0x8e8b2
leaq 0x2de4b8(%rip), %rdi    # 0x36cb40
leaq 0x956f7(%rip), %rsi     # 0x123d86
callq 0x9090
testq %rax, %rax
je 0x8e6b5
leaq 0x18c798(%rip), %rax    # 0x21ae38
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c5e8(%rip), %rax    # 0x21ac98
jmp 0x8e8b2
leaq 0x2de484(%rip), %rdi    # 0x36cb40
leaq 0x8f7ac(%rip), %rsi     # 0x11de6f
callq 0x9090
testq %rax, %rax
je 0x8e6e9
leaq 0x18c76c(%rip), %rax    # 0x21ae40
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c5b8(%rip), %rax    # 0x21ac9c
jmp 0x8e8b2
leaq 0x2de450(%rip), %rdi    # 0x36cb40
leaq 0x9206e(%rip), %rsi     # 0x120765
callq 0x9090
testq %rax, %rax
je 0x8e71d
leaq 0x18c740(%rip), %rax    # 0x21ae48
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c588(%rip), %rax    # 0x21aca0
jmp 0x8e8b2
leaq 0x2de41c(%rip), %rdi    # 0x36cb40
leaq 0x95664(%rip), %rsi     # 0x123d8f
callq 0x9090
testq %rax, %rax
je 0x8e751
leaq 0x18c714(%rip), %rax    # 0x21ae50
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c558(%rip), %rax    # 0x21aca4
jmp 0x8e8b2
leaq 0x2de3e8(%rip), %rdi    # 0x36cb40
leaq 0x9563a(%rip), %rsi     # 0x123d99
callq 0x9090
testq %rax, %rax
je 0x8e785
leaq 0x18c6e8(%rip), %rax    # 0x21ae58
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c528(%rip), %rax    # 0x21aca8
jmp 0x8e8b2
leaq 0x2de3b4(%rip), %rdi    # 0x36cb40
leaq 0x95610(%rip), %rsi     # 0x123da3
callq 0x9090
testq %rax, %rax
je 0x8e7b9
leaq 0x18c6bc(%rip), %rax    # 0x21ae60
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c4f8(%rip), %rax    # 0x21acac
jmp 0x8e8b2
leaq 0x2de380(%rip), %rdi    # 0x36cb40
leaq 0x955e3(%rip), %rsi     # 0x123daa
callq 0x9090
testq %rax, %rax
je 0x8e7ed
leaq 0x18c690(%rip), %rax    # 0x21ae68
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c4c8(%rip), %rax    # 0x21acb0
jmp 0x8e8b2
leaq 0x2de34c(%rip), %rdi    # 0x36cb40
leaq 0x955b7(%rip), %rsi     # 0x123db2
callq 0x9090
testq %rax, %rax
je 0x8e821
leaq 0x18c664(%rip), %rax    # 0x21ae70
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c498(%rip), %rax    # 0x21acb4
jmp 0x8e8b2
leaq 0x2de318(%rip), %rdi    # 0x36cb40
leaq 0x9558b(%rip), %rsi     # 0x123dba
callq 0x9090
testq %rax, %rax
je 0x8e852
leaq 0x18c638(%rip), %rax    # 0x21ae78
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c468(%rip), %rax    # 0x21acb8
jmp 0x8e8b2
leaq 0x2de2e7(%rip), %rdi    # 0x36cb40
leaq 0x95562(%rip), %rsi     # 0x123dc2
callq 0x9090
testq %rax, %rax
je 0x8e883
leaq 0x18c60f(%rip), %rax    # 0x21ae80
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c43b(%rip), %rax    # 0x21acbc
jmp 0x8e8b2
leaq 0x2de2b6(%rip), %rdi    # 0x36cb40
leaq 0x95539(%rip), %rsi     # 0x123dca
callq 0x9090
testq %rax, %rax
je 0x8e8bd
leaq 0x18c5e6(%rip), %rax    # 0x21ae88
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c40e(%rip), %rax    # 0x21acc0
movl $0x1, (%rax)
jmp 0x8e1f3
leaq 0x2de27c(%rip), %rdi    # 0x36cb40
leaq 0x95507(%rip), %rsi     # 0x123dd2
callq 0x9090
testq %rax, %rax
jne 0x8e273
leaq 0x2de260(%rip), %rdi    # 0x36cb40
leaq 0x954f4(%rip), %rsi     # 0x123ddb
callq 0x9090
testq %rax, %rax
je 0x8e913
leaq 0x27e120(%rip), %rax    # 0x30ca18
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x27e944(%rip), %rax    # 0x30d24c
movl $0x69, (%rax)
jmp 0x8e1f3
leaq 0x2de226(%rip), %rdi    # 0x36cb40
leaq 0x954c3(%rip), %rsi     # 0x123de4
callq 0x9090
testq %rax, %rax
je 0x8e947
leaq 0x18c55e(%rip), %rax    # 0x21ae90
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c382(%rip), %rax    # 0x21acc4
jmp 0x8e8b2
leaq 0x2de1f2(%rip), %rdi    # 0x36cb40
leaq 0x95497(%rip), %rsi     # 0x123dec
callq 0x9090
testq %rax, %rax
je 0x8e97b
leaq 0x18c532(%rip), %rax    # 0x21ae98
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c352(%rip), %rax    # 0x21acc8
jmp 0x8e8b2
leaq 0x2de1be(%rip), %rdi    # 0x36cb40
leaq 0x9546b(%rip), %rsi     # 0x123df4
callq 0x9090
testq %rax, %rax
je 0x8e1f3
leaq 0x18c502(%rip), %rax    # 0x21aea0
movsd -0x28(%rbp), %xmm0
movsd %xmm0, (%rax)
leaq 0x18c31e(%rip), %rax    # 0x21accc
jmp 0x8e8b2