LLM4Binary/decompile-bench-makefile huggingface dataset:
// File: ArashPartow[P]exprtk-extras/exprtk_vector_benchmark.cpp
// Function: void run_benchmark<double>(unsigned long const&)
void run_benchmark(const std::size_t& vec_size)
{
   T total_time = 0.0;

   for (std::size_t i = 0; i < global_expression_list_size; ++i)
   {
      total_time +=
      run_expression_benchmark<T>(vec_size,
                                  global_expression_list[i].e,
                                  global_expression_list[i].cost);
   }

   unsigned long long total_flops = 0;

   for (std::size_t i = 0; i < global_expression_list_size; ++i)
   {
      total_flops += global_expression_list[i].cost;
   }

   total_flops *= (rounds * vec_size);

   printf("Total Time:%10.7f FLOP: %llu Perf: %7.4fGFLOPS\n",
          total_time,
          total_flops,
          total_flops / (1e9 * total_time));
}

// Assembly:
subq $0x28, %rsp
movq %rdi, 0x20(%rsp)
xorps %xmm0, %xmm0
movsd %xmm0, 0x18(%rsp)
movq $0x0, 0x10(%rsp)
cmpq $0x28, 0x10(%rsp)
jae 0x11c980
movq 0x20(%rsp), %rax
movq (%rax), %rdi
leaq 0x5155ee(%rip), %rsi    # 0x631f30
imulq $0x28, 0x10(%rsp), %rax
addq %rax, %rsi
addq $0x8, %rsi
leaq 0x5155da(%rip), %rdx    # 0x631f30
imulq $0x28, 0x10(%rsp), %rax
addq %rax, %rdx
callq 0x11cf60
addsd 0x18(%rsp), %xmm0
movsd %xmm0, 0x18(%rsp)
movq 0x10(%rsp), %rax
addq $0x1, %rax
movq %rax, 0x10(%rsp)
jmp 0x11c92b
movq $0x0, 0x8(%rsp)
movq $0x0, (%rsp)
cmpq $0x28, (%rsp)
jae 0x11c9c2
leaq 0x515591(%rip), %rax    # 0x631f30
imulq $0x28, (%rsp), %rcx
addq %rcx, %rax
movq (%rax), %rax
addq 0x8(%rsp), %rax
movq %rax, 0x8(%rsp)
movq (%rsp), %rax
addq $0x1, %rax
movq %rax, (%rsp)
jmp 0x11c991
movq 0x20(%rsp), %rax
movq (%rax), %rax
movq 0x8(%rsp), %rcx
imulq %rcx, %rax
imulq $0x7d0, %rax, %rax      # imm = 0x7D0
movq %rax, 0x8(%rsp)
movsd 0x18(%rsp), %xmm0
movq 0x8(%rsp), %rsi
movq %rsi, %xmm1
movaps 0x3386da(%rip), %xmm2   # 0x4550d0
punpckldq %xmm2, %xmm1    # xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
movapd 0x3386de(%rip), %xmm2   # 0x4550e0
subpd %xmm2, %xmm1
movaps %xmm1, %xmm2
unpckhpd %xmm1, %xmm1            # xmm1 = xmm1[1,1]
addsd %xmm2, %xmm1
movsd 0x3385ef(%rip), %xmm2   # 0x455008
mulsd 0x18(%rsp), %xmm2
divsd %xmm2, %xmm1
leaq 0x33de26(%rip), %rdi    # 0x45a850
movb $0x2, %al
callq 0x1130b0
addq $0x28, %rsp
retq
nopw %cs:(%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/shared/mips_test_framework.cpp
// Function: mips_test_begin_suite
void mips_test_begin_suite()
{
    if(sg_started){
        fprintf(stderr, "Error:mips_test_begin_suite - Test suite has already been started\n");
        exit(1);
    }
    
    // Build up a list of known instruction names
    for(unsigned i=0; i<sg_instructionsCount; i++){
        sg_knownInstructions.insert(std::string(sg_instructionsArray[i].instruction));
    }
    
    sg_started=true;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x70, %rsp
testb $0x1, 0x15b61(%rip)     # 0x192b0
je 0x3773
movq 0x15878(%rip), %rax     # 0x18fd0
movq (%rax), %rdi
leaq 0xe8ae(%rip), %rsi      # 0x12010
movb $0x0, %al
callq 0x33c0
movl $0x1, %edi
callq 0x3320
movl $0x0, -0x4(%rbp)
cmpl $0x36, -0x4(%rbp)
jae 0x382f
movl -0x4(%rbp), %eax
shlq $0x4, %rax
leaq 0x152ae(%rip), %rcx     # 0x18a40
movq (%rax,%rcx), %rax
movq %rax, -0x60(%rbp)
leaq -0x29(%rbp), %rdi
movq %rdi, -0x58(%rbp)
callq 0x3450
movq -0x60(%rbp), %rsi
movq -0x58(%rbp), %rdx
leaq -0x28(%rbp), %rdi
callq 0x4250
jmp 0x37ba
leaq 0x15abf(%rip), %rdi     # 0x19280
leaq -0x28(%rbp), %rsi
callq 0x4200
movb %dl, -0x69(%rbp)
movq %rax, -0x68(%rbp)
jmp 0x37d3
movb -0x69(%rbp), %al
movq -0x68(%rbp), %rcx
movq %rcx, -0x50(%rbp)
movb %al, -0x48(%rbp)
leaq -0x28(%rbp), %rdi
callq 0x3170
leaq -0x29(%rbp), %rdi
callq 0x32c0
movl -0x4(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x4(%rbp)
jmp 0x377a
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x38(%rbp)
movl %eax, -0x3c(%rbp)
jmp 0x3824
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x38(%rbp)
movl %eax, -0x3c(%rbp)
leaq -0x28(%rbp), %rdi
callq 0x3170
leaq -0x29(%rbp), %rdi
callq 0x32c0
jmp 0x383c
movb $0x1, 0x15a7a(%rip)     # 0x192b0
addq $0x70, %rsp
popq %rbp
retq
movq -0x38(%rbp), %rdi
callq 0x3440
nopw %cs:(%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/shared/mips_test_framework.cpp
// Function: mips_test_end_test
void mips_test_end_test(int testId, int passed, const char *msg)
{
    if(!sg_started){
        fprintf(stderr, "Error:mips_test_finish_test - Test suite has not been started with mips_test_begin_suite.");
        exit(1);
    }
    
    if(sg_tests.size()==0){
        fprintf(stderr, "Error:mips_test_finish_test - No tests have been started.\n");
        exit(1);
    }
    if(sg_tests.back().testId!=testId){
        fprintf(stderr, "Error:mips_test_finish_test - Attempt to finish test %u, but last test started was %u.\n", testId, sg_tests.back().testId);
        exit(1);
    }
    if(sg_tests.back().status!=-1){
        fprintf(stderr, "Error:mips_test_finish_test - Attempt to finish test %u, but it already finished with status %u.\n", testId, sg_tests.back().status);
        exit(1);  
    }
    
    sg_tests.back().status=passed ? 1 : 0;
    if(msg){
        sg_tests.back().message=msg;
    }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x40, %rsp
movl %edi, -0x4(%rbp)
movl %esi, -0x8(%rbp)
movq %rdx, -0x10(%rbp)
testb $0x1, 0x15827(%rip)     # 0x192b0
jne 0x3aad
movq 0x1553e(%rip), %rax     # 0x18fd0
movq (%rax), %rdi
leaq 0xe6e3(%rip), %rsi      # 0x1217f
movb $0x0, %al
callq 0x33c0
movl $0x1, %edi
callq 0x3320
leaq 0x157b4(%rip), %rdi     # 0x19268
callq 0x4300
cmpq $0x0, %rax
jne 0x3ae1
movq 0x1550a(%rip), %rax     # 0x18fd0
movq (%rax), %rdi
leaq 0xe709(%rip), %rsi      # 0x121d9
movb $0x0, %al
callq 0x33c0
movl $0x1, %edi
callq 0x3320
leaq 0x15780(%rip), %rdi     # 0x19268
callq 0x4330
movl (%rax), %eax
cmpl -0x4(%rbp), %eax
je 0x3b35
movq 0x154d5(%rip), %rax     # 0x18fd0
movq (%rax), %rax
movq %rax, -0x20(%rbp)
movl -0x4(%rbp), %eax
movl %eax, -0x14(%rbp)
leaq 0x15759(%rip), %rdi     # 0x19268
callq 0x4330
movq -0x20(%rbp), %rdi
movl -0x14(%rbp), %edx
movl (%rax), %ecx
leaq 0xe6f0(%rip), %rsi      # 0x12214
movb $0x0, %al
callq 0x33c0
movl $0x1, %edi
callq 0x3320
leaq 0x1572c(%rip), %rdi     # 0x19268
callq 0x4330
cmpl $-0x1, 0x28(%rax)
je 0x3b89
movq 0x15482(%rip), %rax     # 0x18fd0
movq (%rax), %rax
movq %rax, -0x30(%rbp)
movl -0x4(%rbp), %eax
movl %eax, -0x24(%rbp)
leaq 0x15706(%rip), %rdi     # 0x19268
callq 0x4330
movq -0x30(%rbp), %rdi
movl -0x24(%rbp), %edx
movl 0x28(%rax), %ecx
leaq 0xe6f4(%rip), %rsi      # 0x1226c
movb $0x0, %al
callq 0x33c0
movl $0x1, %edi
callq 0x3320
movl -0x8(%rbp), %edx
xorl %eax, %eax
movl $0x1, %ecx
cmpl $0x0, %edx
cmovnel %ecx, %eax
movl %eax, -0x34(%rbp)
leaq 0x156c5(%rip), %rdi     # 0x19268
callq 0x4330
movl -0x34(%rbp), %ecx
movl %ecx, 0x28(%rax)
cmpq $0x0, -0x10(%rbp)
je 0x3bd9
movq -0x10(%rbp), %rax
movq %rax, -0x40(%rbp)
leaq 0x156a4(%rip), %rdi     # 0x19268
callq 0x4330
movq -0x40(%rbp), %rsi
movq %rax, %rdi
addq $0x30, %rdi
callq 0x33a0
addq $0x40, %rsp
popq %rbp
retq
nop
// File: martinferianc[P]CPUSimulator-EIE2/src/shared/mips_mem_ram.cpp
// Function: mips_mem_create_ram
mips_mem_h mips_mem_create_ram(
                                          uint32_t cbMem	//!< Total number of bytes of ram
){
    if(cbMem>0x20000000){
        return 0; // No more than 512MB of RAM
    }
    
    uint8_t *data=(uint8_t*)malloc(cbMem);
    if(data==0)
        return 0;
    
    struct mips_mem_provider *mem=(struct mips_mem_provider*)malloc(sizeof(struct mips_mem_provider));
    if(mem==0){
        free(data);
        return 0;
    }
    
    mem->length=cbMem;
    mem->data=data;
    
    return mem;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movl %edi, -0xc(%rbp)
cmpl $0x20000000, -0xc(%rbp) # imm = 0x20000000
jbe 0x790e
movq $0x0, -0x8(%rbp)
jmp 0x7972
movl -0xc(%rbp), %eax
movl %eax, %edi
callq 0x3380
movq %rax, -0x18(%rbp)
cmpq $0x0, -0x18(%rbp)
jne 0x792d
movq $0x0, -0x8(%rbp)
jmp 0x7972
movl $0x10, %edi
callq 0x3380
movq %rax, -0x20(%rbp)
cmpq $0x0, -0x20(%rbp)
jne 0x7955
movq -0x18(%rbp), %rdi
callq 0x3310
movq $0x0, -0x8(%rbp)
jmp 0x7972
movl -0xc(%rbp), %ecx
movq -0x20(%rbp), %rax
movl %ecx, (%rax)
movq -0x18(%rbp), %rcx
movq -0x20(%rbp), %rax
movq %rcx, 0x8(%rax)
movq -0x20(%rbp), %rax
movq %rax, -0x8(%rbp)
movq -0x8(%rbp), %rax
addq $0x20, %rsp
popq %rbp
retq
nopl (%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/shared/mips_mem_ram.cpp
// Function: mips_mem_read
mips_error mips_mem_read(
                         mips_mem_h mem,		//!< Handle to target memory
                         uint32_t address,	//!< Byte address to start transaction at
                         uint32_t length,	//!< Number of bytes to transfer
                         uint8_t *dataOut	//!< Receives the target bytes
)
{
    return mips_mem_read_write(
                               false,	// we want to read
                               mem,
                               address,
                               length,
                               dataOut
                               );
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movl %esi, -0xc(%rbp)
movl %edx, -0x10(%rbp)
movq %rcx, -0x18(%rbp)
movq -0x8(%rbp), %rsi
movl -0xc(%rbp), %edx
movl -0x10(%rbp), %ecx
movq -0x18(%rbp), %r8
xorl %edi, %edi
callq 0x79c0
addq $0x20, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/shared/mips_mem_ram.cpp
// Function: mips_mem_read_write(bool, mips_mem_provider*, unsigned int, unsigned int, unsigned char*)
static mips_error mips_mem_read_write(
                                      bool write,
                                      mips_mem_h mem,
                                      uint32_t address,
                                      uint32_t length,
                                      uint8_t *dataOut
                                      )
{
    if(mem==0){
        return mips_ErrorInvalidHandle;
    }
    
    if( (length!=1) && (length!=2) && (length!=4) ){
        return mips_ExceptionInvalidLength;
    }
    
    if(0 != (address % length) ){
        return mips_ExceptionInvalidAlignment;
    }
    if(((address+length) > mem->length) || (address > (UINT32_MAX - length))){	// A subtle bug here, maybe?
        return mips_ExceptionInvalidAddress;
    }
    
    if(write){
        for(unsigned i=0; i<length; i++){
            mem->data[address+i]=dataOut[i];
        }
    }else{
        for(unsigned i=0; i<length; i++){
            dataOut[i]=mem->data[address+i];
        }
    }
    return mips_Success;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movb %dil, %al
andb $0x1, %al
movb %al, -0x5(%rbp)
movq %rsi, -0x10(%rbp)
movl %edx, -0x14(%rbp)
movl %ecx, -0x18(%rbp)
movq %r8, -0x20(%rbp)
cmpq $0x0, -0x10(%rbp)
jne 0x79ed
movl $0x1002, -0x4(%rbp)     # imm = 0x1002
jmp 0x7aca
cmpl $0x1, -0x18(%rbp)
je 0x7a0b
cmpl $0x2, -0x18(%rbp)
je 0x7a0b
cmpl $0x4, -0x18(%rbp)
je 0x7a0b
movl $0x2001, -0x4(%rbp)     # imm = 0x2001
jmp 0x7aca
movl -0x14(%rbp), %eax
xorl %edx, %edx
divl -0x18(%rbp)
xorl %eax, %eax
cmpl %edx, %eax
je 0x7a25
movl $0x2003, -0x4(%rbp)     # imm = 0x2003
jmp 0x7aca
movl -0x14(%rbp), %eax
addl -0x18(%rbp), %eax
movq -0x10(%rbp), %rcx
cmpl (%rcx), %eax
ja 0x7a42
movl -0x14(%rbp), %eax
movl $0xffffffff, %ecx       # imm = 0xFFFFFFFF
subl -0x18(%rbp), %ecx
cmpl %ecx, %eax
jbe 0x7a4b
movl $0x2002, -0x4(%rbp)     # imm = 0x2002
jmp 0x7aca
testb $0x1, -0x5(%rbp)
je 0x7a8a
movl $0x0, -0x24(%rbp)
movl -0x24(%rbp), %eax
cmpl -0x18(%rbp), %eax
jae 0x7a88
movq -0x20(%rbp), %rax
movl -0x24(%rbp), %ecx
movb (%rax,%rcx), %dl
movq -0x10(%rbp), %rax
movq 0x8(%rax), %rax
movl -0x14(%rbp), %ecx
addl -0x24(%rbp), %ecx
movl %ecx, %ecx
movb %dl, (%rax,%rcx)
movl -0x24(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x24(%rbp)
jmp 0x7a58
jmp 0x7ac3
movl $0x0, -0x28(%rbp)
movl -0x28(%rbp), %eax
cmpl -0x18(%rbp), %eax
jae 0x7ac1
movq -0x10(%rbp), %rax
movq 0x8(%rax), %rax
movl -0x14(%rbp), %ecx
addl -0x28(%rbp), %ecx
movl %ecx, %ecx
movb (%rax,%rcx), %dl
movq -0x20(%rbp), %rax
movl -0x28(%rbp), %ecx
movb %dl, (%rax,%rcx)
movl -0x28(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x28(%rbp)
jmp 0x7a91
jmp 0x7ac3
movl $0x0, -0x4(%rbp)
movl -0x4(%rbp), %eax
popq %rbp
retq
nop
// File: martinferianc[P]CPUSimulator-EIE2/src/shared/mips_mem_ram.cpp
// Function: mips_mem_write
mips_error mips_mem_write(
                          mips_mem_h mem,	//! Handle to target memory
                          uint32_t address,		//! Byte address to start transaction at
                          uint32_t length,			//! Number of bytes to transfer
                          const uint8_t *dataIn	//! Receives the target bytes
)
{
    return mips_mem_read_write(
                               true,	// we want to write
                               mem,
                               address,
                               length,
                               (uint8_t*)dataIn
                               );
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movl %esi, -0xc(%rbp)
movl %edx, -0x10(%rbp)
movq %rcx, -0x18(%rbp)
movq -0x8(%rbp), %rsi
movl -0xc(%rbp), %edx
movl -0x10(%rbp), %ecx
movq -0x18(%rbp), %r8
movl $0x1, %edi
callq 0x79c0
addq $0x20, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/shared/mips_mem_ram.cpp
// Function: mips_mem_free
void mips_mem_free(mips_mem_h mem)
{
    if(mem){
        free(mem->data);
        mem->data=0;
        free(mem);
    }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x10, %rsp
movq %rdi, -0x8(%rbp)
cmpq $0x0, -0x8(%rbp)
je 0x7b45
movq -0x8(%rbp), %rax
movq 0x8(%rax), %rdi
callq 0x3310
movq -0x8(%rbp), %rax
movq $0x0, 0x8(%rax)
movq -0x8(%rbp), %rdi
callq 0x3310
addq $0x10, %rsp
popq %rbp
retq
nopl (%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu.cpp
// Function: mips_cpu_create
mips_cpu_h mips_cpu_create(mips_mem_h mem){
	if (mem==0)
		return NULL;

	mips_cpu_h state = new mips_cpu_impl;
	state->hi = 0;
	state->lo = 0;
	state->pc = 0;
	state->pcN = 4;
	state->mem=mem;
	for (unsigned i = 0; i < 32; ++i)
		state->regs[i]=0;

	return state;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x10(%rbp)
cmpq $0x0, -0x10(%rbp)
jne 0x7b6d
movq $0x0, -0x8(%rbp)
jmp 0x7be4
movl $0xa8, %edi
callq 0x3270
movq %rax, -0x18(%rbp)
movq -0x18(%rbp), %rax
movl $0x0, 0x4(%rax)
movq -0x18(%rbp), %rax
movl $0x0, 0x8(%rax)
movq -0x18(%rbp), %rax
movl $0x0, (%rax)
movq -0x18(%rbp), %rax
movl $0x4, 0xc(%rax)
movq -0x10(%rbp), %rcx
movq -0x18(%rbp), %rax
movq %rcx, 0xa0(%rax)
movl $0x0, -0x1c(%rbp)
cmpl $0x20, -0x1c(%rbp)
jae 0x7bdc
movq -0x18(%rbp), %rax
movl -0x1c(%rbp), %ecx
movl $0x0, 0x10(%rax,%rcx,4)
movl -0x1c(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x1c(%rbp)
jmp 0x7bbc
movq -0x18(%rbp), %rax
movq %rax, -0x8(%rbp)
movq -0x8(%rbp), %rax
addq $0x20, %rsp
popq %rbp
retq
nop
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu.cpp
// Function: mips_cpu_reset
mips_error mips_cpu_reset(mips_cpu_h state){
	if (state==0)
		return mips_ErrorInvalidHandle;

	state->pc = 0;
	state->pcN = 4;
	state->hi = 0;
	state->lo = 0;
	for (unsigned i = 0; i < 32; ++i)
		state->regs[i]=0;

	return mips_Success;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x10(%rbp)
cmpq $0x0, -0x10(%rbp)
jne 0x7c08
movl $0x1002, -0x4(%rbp)     # imm = 0x1002
jmp 0x7c61
movq -0x10(%rbp), %rax
movl $0x0, (%rax)
movq -0x10(%rbp), %rax
movl $0x4, 0xc(%rax)
movq -0x10(%rbp), %rax
movl $0x0, 0x4(%rax)
movq -0x10(%rbp), %rax
movl $0x0, 0x8(%rax)
movl $0x0, -0x14(%rbp)
cmpl $0x20, -0x14(%rbp)
jae 0x7c5a
movq -0x10(%rbp), %rax
movl -0x14(%rbp), %ecx
movl $0x0, 0x10(%rax,%rcx,4)
movl -0x14(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x14(%rbp)
jmp 0x7c3a
movl $0x0, -0x4(%rbp)
movl -0x4(%rbp), %eax
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu.cpp
// Function: mips_cpu_get_register
mips_error mips_cpu_get_register(mips_cpu_h state, unsigned index, uint32_t* value){
	if(state==0)
		return mips_ErrorInvalidHandle;

	if(index>31)
		return mips_ErrorInvalidArgument;

	*value = state->regs[index];
	return mips_Success;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x10(%rbp)
movl %esi, -0x14(%rbp)
movq %rdx, -0x20(%rbp)
cmpq $0x0, -0x10(%rbp)
jne 0x7c8f
movl $0x1002, -0x4(%rbp)     # imm = 0x1002
jmp 0x7cb6
cmpl $0x1f, -0x14(%rbp)
jbe 0x7c9e
movl $0x1001, -0x4(%rbp)     # imm = 0x1001
jmp 0x7cb6
movq -0x10(%rbp), %rax
movl -0x14(%rbp), %ecx
movl 0x10(%rax,%rcx,4), %ecx
movq -0x20(%rbp), %rax
movl %ecx, (%rax)
movl $0x0, -0x4(%rbp)
movl -0x4(%rbp), %eax
popq %rbp
retq
nopl (%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu.cpp
// Function: mips_cpu_set_register
mips_error mips_cpu_set_register(mips_cpu_h state, unsigned index, uint32_t value){
	if(state==0)
		return mips_ErrorInvalidHandle;

	if(index>31)
		return mips_ErrorInvalidArgument;

	if(index!=0)
		state->regs[index]=value;

	return mips_Success;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x10(%rbp)
movl %esi, -0x14(%rbp)
movl %edx, -0x18(%rbp)
cmpq $0x0, -0x10(%rbp)
jne 0x7cde
movl $0x1002, -0x4(%rbp)     # imm = 0x1002
jmp 0x7d08
cmpl $0x1f, -0x14(%rbp)
jbe 0x7ced
movl $0x1001, -0x4(%rbp)     # imm = 0x1001
jmp 0x7d08
cmpl $0x0, -0x14(%rbp)
je 0x7d01
movl -0x18(%rbp), %edx
movq -0x10(%rbp), %rax
movl -0x14(%rbp), %ecx
movl %edx, 0x10(%rax,%rcx,4)
movl $0x0, -0x4(%rbp)
movl -0x4(%rbp), %eax
popq %rbp
retq
nopl (%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu.cpp
// Function: mips_cpu_set_pc
mips_error mips_cpu_set_pc(mips_cpu_h state, uint32_t pc){
	if(state==0)
		return mips_ErrorInvalidHandle;

	state->pc = pc;
	state->pcN = pc + 4;
	return mips_Success;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x10(%rbp)
movl %esi, -0x14(%rbp)
cmpq $0x0, -0x10(%rbp)
jne 0x7d2b
movl $0x1002, -0x4(%rbp)     # imm = 0x1002
jmp 0x7d48
movl -0x14(%rbp), %ecx
movq -0x10(%rbp), %rax
movl %ecx, (%rax)
movl -0x14(%rbp), %ecx
addl $0x4, %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0xc(%rax)
movl $0x0, -0x4(%rbp)
movl -0x4(%rbp), %eax
popq %rbp
retq
nopl (%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu.cpp
// Function: mips_cpu_get_pc
mips_error mips_cpu_get_pc(mips_cpu_h state, uint32_t *pc){
	if(state==0)
		return mips_ErrorInvalidHandle;

	*pc = state->pc;
	return mips_Success;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x10(%rbp)
movq %rsi, -0x18(%rbp)
cmpq $0x0, -0x10(%rbp)
jne 0x7d6c
movl $0x1002, -0x4(%rbp)     # imm = 0x1002
jmp 0x7d7f
movq -0x10(%rbp), %rax
movl (%rax), %ecx
movq -0x18(%rbp), %rax
movl %ecx, (%rax)
movl $0x0, -0x4(%rbp)
movl -0x4(%rbp), %eax
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu.cpp
// Function: debug_level_2(mips_cpu_impl* const&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&)
void debug_level_2(const mips_cpu_h& state, const string& instruction){
	cout<<endl<<"Executed instruction: "<<instruction<<endl;
	cout<<"Next PC:="<<state->pc<<endl;
	cout<<"HI: "<<state->hi<<" LO: "<<state->lo<<endl;
	for (int i = 0; i < 32; ++i){
		if (i % 4 == 0)
			cout<<endl;
		cout<<"R["<<i<<"]"<<":= "<<state->regs[i]<<"\t";
	}
	cout<<endl;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq 0x10fa1(%rip), %rdi     # 0x18fc8
movq 0x10f8a(%rip), %rsi     # 0x18fb8
callq 0x32a0
movq %rax, %rdi
leaq 0xaa6b(%rip), %rsi      # 0x12aa8
callq 0x3260
movq %rax, %rdi
movq -0x10(%rbp), %rsi
callq 0x3240
movq %rax, %rdi
movq 0x10f60(%rip), %rsi     # 0x18fb8
callq 0x32a0
movq 0x10f64(%rip), %rdi     # 0x18fc8
leaq 0xaa54(%rip), %rsi      # 0x12abf
callq 0x3260
movq %rax, %rdi
movq -0x8(%rbp), %rax
movq (%rax), %rax
movl (%rax), %esi
callq 0x3390
movq %rax, %rdi
movq 0x10f2d(%rip), %rsi     # 0x18fb8
callq 0x32a0
movq 0x10f31(%rip), %rdi     # 0x18fc8
leaq 0xaa2b(%rip), %rsi      # 0x12ac9
callq 0x3260
movq %rax, %rdi
movq -0x8(%rbp), %rax
movq (%rax), %rax
movl 0x4(%rax), %esi
callq 0x3390
movq %rax, %rdi
leaq 0xaa0f(%rip), %rsi      # 0x12ace
callq 0x3260
movq %rax, %rdi
movq -0x8(%rbp), %rax
movq (%rax), %rax
movl 0x8(%rax), %esi
callq 0x3390
movq %rax, %rdi
movq 0x10ed8(%rip), %rsi     # 0x18fb8
callq 0x32a0
movl $0x0, -0x14(%rbp)
cmpl $0x20, -0x14(%rbp)
jge 0x8189
movl -0x14(%rbp), %eax
movl $0x4, %ecx
cltd
idivl %ecx
cmpl $0x0, %edx
jne 0x8119
movq 0x10ebb(%rip), %rdi     # 0x18fc8
movq 0x10ea4(%rip), %rsi     # 0x18fb8
callq 0x32a0
movq 0x10ea8(%rip), %rdi     # 0x18fc8
leaq 0xab7d(%rip), %rsi      # 0x12ca4
callq 0x3260
movq %rax, %rdi
movl -0x14(%rbp), %esi
callq 0x3430
movq %rax, %rdi
leaq 0xa993(%rip), %rsi      # 0x12ad4
callq 0x3260
movq %rax, %rdi
leaq 0xa986(%rip), %rsi      # 0x12ad6
callq 0x3260
movq %rax, %rdi
movq -0x8(%rbp), %rax
movq (%rax), %rax
movslq -0x14(%rbp), %rcx
movl 0x10(%rax,%rcx,4), %esi
callq 0x3390
movq %rax, %rdi
leaq 0xa9aa(%rip), %rsi      # 0x12b20
callq 0x3260
movl -0x14(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x14(%rbp)
jmp 0x80ec
movq 0x10e38(%rip), %rdi     # 0x18fc8
movq 0x10e21(%rip), %rsi     # 0x18fb8
callq 0x32a0
addq $0x20, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu.cpp
// Function: debug_level_3(mips_cpu_impl* const&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, _IO_FILE*)
void debug_level_3(const mips_cpu_h& state, const string& instruction, FILE* file){
	if (file == NULL) perror ("Error opening file");
	fprintf(state->dest,"Executed instruction: %s", instruction.c_str());
	fprintf(state->dest,"Next PC:= %i \n", state->pc);
	for (int i = 0; i < 32; ++i){
		if (i % 4 == 0)
			fprintf(state->dest,"\n");
		fprintf(state->dest,"R[%i]:= %i \t",i, state->regs[i]);
	}
	cout<<endl;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x30, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq %rdx, -0x18(%rbp)
cmpq $0x0, -0x18(%rbp)
jne 0x81d7
leaq 0xa908(%rip), %rdi      # 0x12ada
callq 0x3200
movq -0x8(%rbp), %rax
movq (%rax), %rax
movq 0x98(%rax), %rax
movq %rax, -0x28(%rbp)
movq -0x10(%rbp), %rdi
callq 0x3110
movq -0x28(%rbp), %rdi
movq %rax, %rdx
leaq 0xa8ed(%rip), %rsi      # 0x12aed
movb $0x0, %al
callq 0x33c0
movq -0x8(%rbp), %rax
movq (%rax), %rax
movq 0x98(%rax), %rdi
movq -0x8(%rbp), %rax
movq (%rax), %rax
movl (%rax), %edx
leaq 0xa8e1(%rip), %rsi      # 0x12b06
movb $0x0, %al
callq 0x33c0
movl $0x0, -0x1c(%rbp)
cmpl $0x20, -0x1c(%rbp)
jge 0x829e
movl -0x1c(%rbp), %eax
movl $0x4, %ecx
cltd
idivl %ecx
cmpl $0x0, %edx
jne 0x8265
movq -0x8(%rbp), %rax
movq (%rax), %rax
movq 0x98(%rax), %rdi
leaq 0xa8b5(%rip), %rsi      # 0x12b13
movb $0x0, %al
callq 0x33c0
movq -0x8(%rbp), %rax
movq (%rax), %rax
movq 0x98(%rax), %rdi
movl -0x1c(%rbp), %edx
movq -0x8(%rbp), %rax
movq (%rax), %rax
movslq -0x1c(%rbp), %rcx
movl 0x10(%rax,%rcx,4), %ecx
leaq 0xa889(%rip), %rsi      # 0x12b15
movb $0x0, %al
callq 0x33c0
movl -0x1c(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x1c(%rbp)
jmp 0x8233
movq 0x10d23(%rip), %rdi     # 0x18fc8
movq 0x10d0c(%rip), %rsi     # 0x18fb8
callq 0x32a0
addq $0x30, %rsp
popq %rbp
retq
nopw (%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu.cpp
// Function: mips_cpu_set_debug_level
mips_error mips_cpu_set_debug_level(mips_cpu_h state, unsigned level, FILE *dest){
	if ((level>=4) || (state ==0))
		return mips_ErrorInvalidArgument;
	state->level = level;
	state->dest = dest;
	return mips_Success;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x10(%rbp)
movl %esi, -0x14(%rbp)
movq %rdx, -0x20(%rbp)
cmpl $0x4, -0x14(%rbp)
jae 0x82dc
cmpq $0x0, -0x10(%rbp)
jne 0x82e5
movl $0x1001, -0x4(%rbp)     # imm = 0x1001
jmp 0x8308
movl -0x14(%rbp), %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x90(%rax)
movq -0x20(%rbp), %rcx
movq -0x10(%rbp), %rax
movq %rcx, 0x98(%rax)
movl $0x0, -0x4(%rbp)
movl -0x4(%rbp), %eax
popq %rbp
retq
nopl (%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu_decode.cpp
// Function: mips_decode(unsigned int const&, unsigned int*)
mips_error mips_decode(const uint32_t& instruction, uint32_t* instruction_data){
	uint32_t opcode = (instruction >> 2 ) & 0x3F;
	if (opcode==0)
		return mips_decode_R(instruction, instruction_data);
	if ((opcode==2) || (opcode==3) || (opcode==26))
		return mips_decode_J(instruction, instruction_data);
	return mips_decode_I(instruction, instruction_data);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x10(%rbp)
movq %rsi, -0x18(%rbp)
movq -0x10(%rbp), %rax
movl (%rax), %eax
shrl $0x2, %eax
andl $0x3f, %eax
movl %eax, -0x1c(%rbp)
cmpl $0x0, -0x1c(%rbp)
jne 0x8377
movq -0x10(%rbp), %rdi
movq -0x18(%rbp), %rsi
callq 0x83c0
movl %eax, -0x4(%rbp)
jmp 0x83ab
cmpl $0x2, -0x1c(%rbp)
je 0x8389
cmpl $0x3, -0x1c(%rbp)
je 0x8389
cmpl $0x1a, -0x1c(%rbp)
jne 0x839b
movq -0x10(%rbp), %rdi
movq -0x18(%rbp), %rsi
callq 0x8480
movl %eax, -0x4(%rbp)
jmp 0x83ab
movq -0x10(%rbp), %rdi
movq -0x18(%rbp), %rsi
callq 0x8530
movl %eax, -0x4(%rbp)
movl -0x4(%rbp), %eax
addq $0x20, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu_decode.cpp
// Function: mips_decode_R(unsigned int const&, unsigned int*)
mips_error mips_decode_R(const uint32_t& instruction, uint32_t* instruction_data){
	instruction_data[0] = (uint32_t)(instruction >> 2) & 0x3F; 																		 //OPcode
	instruction_data[1] = (uint32_t)(((instruction >> 13) & 0x7) | ((instruction << 3) & 0x18)) ;  //Source 1
	instruction_data[2] = (uint32_t)(instruction >> 8) & 0x1F; 																		 //Source 2
	instruction_data[3] = (uint32_t)(instruction >> 19) & 0x1F; 																	 //Destination
	instruction_data[4] = (uint32_t)(((instruction >> 14) & 0x1C) | ((instruction >> 30) & 0x3)) ; //Shift
	instruction_data[5] = (uint32_t)(instruction >> 24) & 0x3F; 																	 //Function
	instruction_data[6] = 6; 																																			 //Relevant data size: 6
	instruction_data[7] = 0; 																																			 //R-type
	return mips_Success;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movl (%rax), %ecx
shrl $0x2, %ecx
andl $0x3f, %ecx
movq -0x10(%rbp), %rax
movl %ecx, (%rax)
movq -0x8(%rbp), %rax
movl (%rax), %ecx
shrl $0xd, %ecx
andl $0x7, %ecx
movq -0x8(%rbp), %rax
movl (%rax), %eax
shll $0x3, %eax
andl $0x18, %eax
orl %eax, %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x4(%rax)
movq -0x8(%rbp), %rax
movl (%rax), %ecx
shrl $0x8, %ecx
andl $0x1f, %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x8(%rax)
movq -0x8(%rbp), %rax
movl (%rax), %ecx
shrl $0x13, %ecx
andl $0x1f, %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0xc(%rax)
movq -0x8(%rbp), %rax
movl (%rax), %ecx
shrl $0xe, %ecx
andl $0x1c, %ecx
movq -0x8(%rbp), %rax
movl (%rax), %eax
shrl $0x1e, %eax
andl $0x3, %eax
orl %eax, %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x10(%rax)
movq -0x8(%rbp), %rax
movl (%rax), %ecx
shrl $0x18, %ecx
andl $0x3f, %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x14(%rax)
movq -0x10(%rbp), %rax
movl $0x6, 0x18(%rax)
movq -0x10(%rbp), %rax
movl $0x0, 0x1c(%rax)
xorl %eax, %eax
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu_decode.cpp
// Function: mips_decode_J(unsigned int const&, unsigned int*)
mips_error mips_decode_J(const uint32_t& instruction, uint32_t* instruction_data){
	instruction_data[0] = (uint32_t)(instruction >> 2)  & 0x3F; 																		//OPcode
	instruction_data[1] =
		(uint32_t)(((instruction << 22) & 0xC000000) |
		((instruction >> 24) & 0xFF) |
		((instruction >> 8) & 0xFF00) |
		((instruction << 8) & 0xFF0000)); 																		  											//Memory address
	instruction_data[2] = 0; 																																				//Leave Blank
	instruction_data[3] = 0; 																																				//Leave Blank
	instruction_data[4] = 0; 																																				//Leave Blank
	instruction_data[5] = 0; 																																				//Leave Blank
	instruction_data[6] = 2; 																																				//Relevant data size: 2
	instruction_data[7] = 2; 																																			  //J-type
	return mips_Success;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movl (%rax), %ecx
shrl $0x2, %ecx
andl $0x3f, %ecx
movq -0x10(%rbp), %rax
movl %ecx, (%rax)
movq -0x8(%rbp), %rax
movl (%rax), %ecx
shll $0x16, %ecx
andl $0xc000000, %ecx        # imm = 0xC000000
movq -0x8(%rbp), %rax
movl (%rax), %eax
shrl $0x18, %eax
andl $0xff, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl (%rax), %eax
shrl $0x8, %eax
andl $0xff00, %eax           # imm = 0xFF00
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl (%rax), %eax
shll $0x8, %eax
andl $0xff0000, %eax         # imm = 0xFF0000
orl %eax, %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x4(%rax)
movq -0x10(%rbp), %rax
movl $0x0, 0x8(%rax)
movq -0x10(%rbp), %rax
movl $0x0, 0xc(%rax)
movq -0x10(%rbp), %rax
movl $0x0, 0x10(%rax)
movq -0x10(%rbp), %rax
movl $0x0, 0x14(%rax)
movq -0x10(%rbp), %rax
movl $0x2, 0x18(%rax)
movq -0x10(%rbp), %rax
movl $0x2, 0x1c(%rax)
xorl %eax, %eax
popq %rbp
retq
nopw (%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu_decode.cpp
// Function: mips_decode_I(unsigned int const&, unsigned int*)
mips_error mips_decode_I(const uint32_t& instruction, uint32_t* instruction_data){
	instruction_data[0] = (uint32_t)(instruction >> 2) & 0x3F; 																		  //OPcode
	instruction_data[1] = (uint32_t)(((instruction << 3) & 0x18) | ((instruction >> 13) & 0x7)) ;   //Source 1
	instruction_data[2] = (uint32_t)(instruction >> 8) & 0x1F; 																			//Destination
	instruction_data[3] = (uint32_t)(((instruction >> 24) & 0xFF) | ((instruction >> 8) & 0xFF00)); //Immediate Constant
	instruction_data[4] = 0; 																																				//Leave Blank
	instruction_data[5] = 0; 																																				//Leave Blank
	instruction_data[6] = 4; 																																				//Relevant data size: 4
	instruction_data[7] = 1; 																																				//I-type
	return mips_Success;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movl (%rax), %ecx
shrl $0x2, %ecx
andl $0x3f, %ecx
movq -0x10(%rbp), %rax
movl %ecx, (%rax)
movq -0x8(%rbp), %rax
movl (%rax), %ecx
shll $0x3, %ecx
andl $0x18, %ecx
movq -0x8(%rbp), %rax
movl (%rax), %eax
shrl $0xd, %eax
andl $0x7, %eax
orl %eax, %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x4(%rax)
movq -0x8(%rbp), %rax
movl (%rax), %ecx
shrl $0x8, %ecx
andl $0x1f, %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x8(%rax)
movq -0x8(%rbp), %rax
movl (%rax), %ecx
shrl $0x18, %ecx
andl $0xff, %ecx
movq -0x8(%rbp), %rax
movl (%rax), %eax
shrl $0x8, %eax
andl $0xff00, %eax           # imm = 0xFF00
orl %eax, %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0xc(%rax)
movq -0x10(%rbp), %rax
movl $0x0, 0x10(%rax)
movq -0x10(%rbp), %rax
movl $0x0, 0x14(%rax)
movq -0x10(%rbp), %rax
movl $0x4, 0x18(%rax)
movq -0x10(%rbp), %rax
movl $0x1, 0x1c(%rax)
xorl %eax, %eax
popq %rbp
retq
nopl (%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu_execute.cpp
// Function: mips_execute(mips_cpu_impl*, mips_mem_provider*, unsigned int&, unsigned int&, unsigned int const*, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>&, unsigned int&, unsigned int&)
mips_error mips_execute(mips_cpu_h state, mips_mem_h mem, uint32_t& hi, uint32_t& lo, const uint32_t* instruction_data, string& instruction, uint32_t& pcN, uint32_t& pc){
	uint32_t type = instruction_data[7];
	switch (type) {
		case 0: return mips_execute_R(state, hi, lo, instruction_data, instruction, pcN, pc);
		case 1: return mips_execute_I(state, mem, instruction_data, instruction, pcN, pc);
		case 2: return mips_execute_J(state, instruction_data, instruction, pcN, pc);
	}
	return mips_InternalError;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x50, %rsp
movq 0x18(%rbp), %rax
movq 0x10(%rbp), %rax
movq %rdi, -0x10(%rbp)
movq %rsi, -0x18(%rbp)
movq %rdx, -0x20(%rbp)
movq %rcx, -0x28(%rbp)
movq %r8, -0x30(%rbp)
movq %r9, -0x38(%rbp)
movq -0x30(%rbp), %rax
movl 0x1c(%rax), %eax
movl %eax, -0x3c(%rbp)
movl -0x3c(%rbp), %eax
movl %eax, -0x40(%rbp)
testl %eax, %eax
je 0x8632
jmp 0x861e
movl -0x40(%rbp), %eax
subl $0x1, %eax
je 0x865c
jmp 0x8628
movl -0x40(%rbp), %eax
subl $0x2, %eax
je 0x867e
jmp 0x869c
movq -0x10(%rbp), %rdi
movq -0x20(%rbp), %rsi
movq -0x28(%rbp), %rdx
movq -0x30(%rbp), %rcx
movq -0x38(%rbp), %r8
movq 0x10(%rbp), %r9
movq 0x18(%rbp), %rax
movq %rax, (%rsp)
callq 0x86b0
movl %eax, -0x4(%rbp)
jmp 0x86a3
movq -0x10(%rbp), %rdi
movq -0x18(%rbp), %rsi
movq -0x30(%rbp), %rdx
movq -0x38(%rbp), %rcx
movq 0x10(%rbp), %r8
movq 0x18(%rbp), %r9
callq 0xa2d0
movl %eax, -0x4(%rbp)
jmp 0x86a3
movq -0x10(%rbp), %rdi
movq -0x30(%rbp), %rsi
movq -0x38(%rbp), %rdx
movq 0x10(%rbp), %rcx
movq 0x18(%rbp), %r8
callq 0xbb40
movl %eax, -0x4(%rbp)
jmp 0x86a3
movl $0x3000, -0x4(%rbp)     # imm = 0x3000
movl -0x4(%rbp), %eax
addq $0x50, %rsp
popq %rbp
retq
nopl (%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu_execute.cpp
// Function: mips_execute_J(mips_cpu_impl*, unsigned int const*, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>&, unsigned int&, unsigned int&)
mips_error mips_execute_J(mips_cpu_h state, const uint32_t* instruction_data, string& instruction, uint32_t& pcN, uint32_t& pc){

	switch(instruction_data[0]){
		case 0b000010:
			return mips_execute_J_X(state, instruction_data, "JUMP", instruction, pcN, pc);
		case 0b000011:
			return mips_execute_J_X(state, instruction_data, "JAL", instruction, pcN, pc);
		default:
		break;
	}

	instruction = "Invalid instruction format";
	return mips_ExceptionInvalidInstruction;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0xd0, %rsp
movq %rdi, -0x10(%rbp)
movq %rsi, -0x18(%rbp)
movq %rdx, -0x20(%rbp)
movq %rcx, -0x28(%rbp)
movq %r8, -0x30(%rbp)
movq -0x18(%rbp), %rax
movl (%rax), %eax
movl %eax, -0x90(%rbp)
subl $0x2, %eax
je 0xbb86
jmp 0xbb72
movl -0x90(%rbp), %eax
subl $0x3, %eax
je 0xbc41
jmp 0xbd0b
movq -0x10(%rbp), %rax
movq %rax, -0xa8(%rbp)
movq -0x18(%rbp), %rax
movq %rax, -0xa0(%rbp)
leaq -0x51(%rbp), %rdi
movq %rdi, -0x98(%rbp)
callq 0x3450
movq -0x98(%rbp), %rdx
leaq 0x70e1(%rip), %rsi      # 0x12c9b
leaq -0x50(%rbp), %rdi
callq 0x4250
jmp 0xbbc5
movq -0xa0(%rbp), %rsi
movq -0xa8(%rbp), %rdi
movq -0x20(%rbp), %rcx
movq -0x28(%rbp), %r8
movq -0x30(%rbp), %r9
leaq -0x50(%rbp), %rdx
callq 0xe2f0
movl %eax, -0xac(%rbp)
jmp 0xbbf0
movl -0xac(%rbp), %eax
movl %eax, -0x4(%rbp)
leaq -0x50(%rbp), %rdi
callq 0x3170
leaq -0x51(%rbp), %rdi
callq 0x32c0
jmp 0xbd24
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x60(%rbp)
movl %eax, -0x64(%rbp)
jmp 0xbc33
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x60(%rbp)
movl %eax, -0x64(%rbp)
leaq -0x50(%rbp), %rdi
callq 0x3170
leaq -0x51(%rbp), %rdi
callq 0x32c0
jmp 0xbd30
movq -0x10(%rbp), %rax
movq %rax, -0xc8(%rbp)
movq -0x18(%rbp), %rax
movq %rax, -0xc0(%rbp)
leaq -0x89(%rbp), %rdi
movq %rdi, -0xb8(%rbp)
callq 0x3450
movq -0xb8(%rbp), %rdx
leaq 0x6ab1(%rip), %rsi      # 0x12729
leaq -0x88(%rbp), %rdi
callq 0x4250
jmp 0xbc86
movq -0xc0(%rbp), %rsi
movq -0xc8(%rbp), %rdi
movq -0x20(%rbp), %rcx
movq -0x28(%rbp), %r8
movq -0x30(%rbp), %r9
leaq -0x88(%rbp), %rdx
callq 0xe2f0
movl %eax, -0xcc(%rbp)
jmp 0xbcb4
movl -0xcc(%rbp), %eax
movl %eax, -0x4(%rbp)
leaq -0x88(%rbp), %rdi
callq 0x3170
leaq -0x89(%rbp), %rdi
callq 0x32c0
jmp 0xbd24
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x60(%rbp)
movl %eax, -0x64(%rbp)
jmp 0xbcfd
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x60(%rbp)
movl %eax, -0x64(%rbp)
leaq -0x88(%rbp), %rdi
callq 0x3170
leaq -0x89(%rbp), %rdi
callq 0x32c0
jmp 0xbd30
jmp 0xbd0d
movq -0x20(%rbp), %rdi
leaq 0x6f68(%rip), %rsi      # 0x12c80
callq 0x33a0
movl $0x2005, -0x4(%rbp)     # imm = 0x2005
movl -0x4(%rbp), %eax
addq $0xd0, %rsp
popq %rbp
retq
movq -0x60(%rbp), %rdi
callq 0x3440
nopl (%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu_execute_help.cpp
// Function: highestOneBitPosition(unsigned int)
size_t highestOneBitPosition(uint32_t a) {
    size_t bits=0;
    while (a!=0) {
        ++bits;
        a>>=1;
    };
    return bits;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movl %edi, -0x4(%rbp)
movq $0x0, -0x10(%rbp)
cmpl $0x0, -0x4(%rbp)
je 0xe4fb
movq -0x10(%rbp), %rax
addq $0x1, %rax
movq %rax, -0x10(%rbp)
movl -0x4(%rbp), %eax
shrl %eax
movl %eax, -0x4(%rbp)
jmp 0xe4df
movq -0x10(%rbp), %rax
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/mips_cpu_execute_help.cpp
// Function: subtraction_overflow(unsigned int, unsigned int)
bool subtraction_overflow(uint32_t a, uint32_t b){
  if (highestOneBitPosition(a)!=highestOneBitPosition(b)) {
    int32_t temp = int32_t(a) - int32_t(b);
    if (highestOneBitPosition(temp)!=highestOneBitPosition(a))
      return true;
    else
      return false;
  } else
      return false;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movl %edi, -0x8(%rbp)
movl %esi, -0xc(%rbp)
movl -0x8(%rbp), %edi
callq 0xe4d0
movq %rax, -0x18(%rbp)
movl -0xc(%rbp), %edi
callq 0xe4d0
movq %rax, %rcx
movq -0x18(%rbp), %rax
cmpq %rcx, %rax
je 0xe573
movl -0x8(%rbp), %eax
subl -0xc(%rbp), %eax
movl %eax, -0x10(%rbp)
movl -0x10(%rbp), %edi
callq 0xe4d0
movq %rax, -0x20(%rbp)
movl -0x8(%rbp), %edi
callq 0xe4d0
movq %rax, %rcx
movq -0x20(%rbp), %rax
cmpq %rcx, %rax
je 0xe56d
movb $0x1, -0x1(%rbp)
jmp 0xe577
movb $0x0, -0x1(%rbp)
jmp 0xe577
movb $0x0, -0x1(%rbp)
movb -0x1(%rbp), %al
andb $0x1, %al
addq $0x20, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/test_mips.cpp
// Function: load_memory(mips_mem_provider*&, std::vector<test, std::allocator<test>>)
mips_error load_memory(mips_mem_h& mem, const vector<test> instructions){
  mips_error err = mips_Success;
  for (int i = 0; i < (int)instructions.size(); ++i){
    err = mips_mem_write(mem, 0+(4*i),4, (uint8_t*)&instructions[i].instruction_code);
    if (err!=mips_Success)
    return err;
  }
  return err;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x40, %rsp
movq %rsi, -0x28(%rbp)
movq %rdi, -0x10(%rbp)
movq %rsi, -0x18(%rbp)
movl $0x0, -0x1c(%rbp)
movl $0x0, -0x20(%rbp)
movq -0x28(%rbp), %rdi
movl -0x20(%rbp), %eax
movl %eax, -0x2c(%rbp)
callq 0xff60
movq %rax, %rcx
movl -0x2c(%rbp), %eax
cmpl %ecx, %eax
jge 0xea91
movq -0x28(%rbp), %rdi
movq -0x10(%rbp), %rax
movq (%rax), %rax
movq %rax, -0x38(%rbp)
movl -0x20(%rbp), %eax
shll $0x2, %eax
addl $0x0, %eax
movl %eax, -0x30(%rbp)
movslq -0x20(%rbp), %rsi
callq 0xff90
movq -0x38(%rbp), %rdi
movl -0x30(%rbp), %esi
movq %rax, %rcx
movl $0x4, %edx
callq 0x7ad0
movl %eax, -0x1c(%rbp)
cmpl $0x0, -0x1c(%rbp)
je 0xea84
movl -0x1c(%rbp), %eax
movl %eax, -0x4(%rbp)
jmp 0xea97
jmp 0xea86
movl -0x20(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x20(%rbp)
jmp 0xea22
movl -0x1c(%rbp), %eax
movl %eax, -0x4(%rbp)
movl -0x4(%rbp), %eax
addq $0x40, %rsp
popq %rbp
retq
// File: martinferianc[P]CPUSimulator-EIE2/src/test_mips.cpp
// Function: print_registers(unsigned int const*)
void print_registers(const uint32_t *array){
  for (size_t i = 0; i < 32; i++) {
    if (i % 4 == 0)
    cout<<endl;
    cout<<"R["<<i<<"]"<<":= "<<array[i]<<"\t";
  }
  cout<<endl;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x10, %rsp
movq %rdi, -0x8(%rbp)
movq $0x0, -0x10(%rbp)
cmpq $0x20, -0x10(%rbp)
jae 0xeb50
movq -0x10(%rbp), %rax
andq $0x3, %rax
cmpq $0x0, %rax
jne 0xeae0
movq 0xa4f4(%rip), %rdi      # 0x18fc8
movq 0xa4dd(%rip), %rsi      # 0x18fb8
callq 0x32a0
movq 0xa4e1(%rip), %rdi      # 0x18fc8
leaq 0x41b6(%rip), %rsi      # 0x12ca4
callq 0x3260
movq %rax, %rdi
movq -0x10(%rbp), %rsi
callq 0x30a0
movq %rax, %rdi
leaq 0x3fcb(%rip), %rsi      # 0x12ad4
callq 0x3260
movq %rax, %rdi
leaq 0x3fbe(%rip), %rsi      # 0x12ad6
callq 0x3260
movq %rax, %rdi
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movl (%rax,%rcx,4), %esi
callq 0x3390
movq %rax, %rdi
leaq 0x3fe6(%rip), %rsi      # 0x12b20
callq 0x3260
movq -0x10(%rbp), %rax
addq $0x1, %rax
movq %rax, -0x10(%rbp)
jmp 0xeab4
movq 0xa471(%rip), %rdi      # 0x18fc8
movq 0xa45a(%rip), %rsi      # 0x18fb8
callq 0x32a0
addq $0x10, %rsp
popq %rbp
retq
nopl (%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/test_mips.cpp
// Function: load_registers(unsigned int*, mips_cpu_impl*)
void load_registers(uint32_t* array, mips_cpu_h cpu){
  for (size_t i = 0; i < 32; i++) {
    uint32_t* reg = new uint32_t;
    mips_cpu_get_register(cpu, i, reg);
    array[i] = uint32_t(*reg);
    delete reg;
  }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x30, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq $0x0, -0x18(%rbp)
cmpq $0x20, -0x18(%rbp)
jae 0xebed
movl $0x4, %edi
callq 0x3270
movq %rax, -0x20(%rbp)
movq -0x10(%rbp), %rdi
movq -0x18(%rbp), %rax
movl %eax, %esi
movq -0x20(%rbp), %rdx
callq 0x7c70
movq -0x20(%rbp), %rax
movl (%rax), %edx
movq -0x8(%rbp), %rax
movq -0x18(%rbp), %rcx
movl %edx, (%rax,%rcx,4)
movq -0x20(%rbp), %rax
movq %rax, -0x28(%rbp)
cmpq $0x0, %rax
je 0xebdd
movq -0x28(%rbp), %rdi
movl $0x4, %esi
callq 0x3280
jmp 0xebdf
movq -0x18(%rbp), %rax
addq $0x1, %rax
movq %rax, -0x18(%rbp)
jmp 0xeb88
addq $0x30, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: martinferianc[P]CPUSimulator-EIE2/src/test_mips.cpp
// Function: test::str[abi:cxx11]()
string str(){
    stringstream ss;
    ss<<std::hex<<instruction_code<<" "
    <<instruction_name<<" "
    <<" R2: "<<instruction_r1
    <<" R3: "<<instruction_r2
    <<" Ex. Result: "<<instruction_result;
    return ss.str();
  }

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x210, %rsp            # imm = 0x210
movq %rdi, -0x1c8(%rbp)
movq %rdi, %rax
movq %rax, -0x1c0(%rbp)
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x10(%rbp), %rax
movq %rax, -0x1b8(%rbp)
leaq -0x198(%rbp), %rdi
callq 0x31b0
leaq -0x188(%rbp), %rdi
leaq -0x2e9(%rip), %rsi      # 0xfea0
callq 0x30e0
movq %rax, -0x1b0(%rbp)
jmp 0x10197
movq -0x1b0(%rbp), %rdi
movq -0x1b8(%rbp), %rax
movl (%rax), %esi
callq 0x3390
movq %rax, -0x1d0(%rbp)
jmp 0x101b5
movq -0x1d0(%rbp), %rdi
leaq 0x2b05(%rip), %rsi      # 0x12cc8
callq 0x3260
movq %rax, -0x1d8(%rbp)
jmp 0x101d1
movq -0x1d8(%rbp), %rdi
movq -0x1b8(%rbp), %rsi
addq $0x8, %rsi
callq 0x3240
movq %rax, -0x1e0(%rbp)
jmp 0x101f1
movq -0x1e0(%rbp), %rdi
leaq 0x2ac9(%rip), %rsi      # 0x12cc8
callq 0x3260
movq %rax, -0x1e8(%rbp)
jmp 0x1020d
movq -0x1e8(%rbp), %rdi
leaq 0x2d71(%rip), %rsi      # 0x12f8c
callq 0x3260
movq %rax, -0x1f0(%rbp)
jmp 0x10229
movq -0x1f0(%rbp), %rdi
movq -0x1b8(%rbp), %rax
movl 0x2c(%rax), %esi
callq 0x3390
movq %rax, -0x1f8(%rbp)
jmp 0x10248
movq -0x1f8(%rbp), %rdi
leaq 0x2d3c(%rip), %rsi      # 0x12f92
callq 0x3260
movq %rax, -0x200(%rbp)
jmp 0x10264
movq -0x200(%rbp), %rdi
movq -0x1b8(%rbp), %rax
movl 0x30(%rax), %esi
callq 0x3390
movq %rax, -0x208(%rbp)
jmp 0x10283
movq -0x208(%rbp), %rdi
leaq 0x2d07(%rip), %rsi      # 0x12f98
callq 0x3260
movq %rax, -0x210(%rbp)
jmp 0x1029f
movq -0x210(%rbp), %rdi
movq -0x1b8(%rbp), %rax
movl 0x28(%rax), %esi
callq 0x3390
jmp 0x102b7
movq -0x1c8(%rbp), %rdi
leaq -0x198(%rbp), %rsi
callq 0x3250
jmp 0x102cc
leaq -0x198(%rbp), %rdi
callq 0x31d0
movq -0x1c0(%rbp), %rax
addq $0x210, %rsp            # imm = 0x210
popq %rbp
retq
movq %rax, %rcx
movl %edx, %eax
movq %rcx, -0x1a0(%rbp)
movl %eax, -0x1a4(%rbp)
leaq -0x198(%rbp), %rdi
callq 0x31d0
movq -0x1a0(%rbp), %rdi
callq 0x3440
nopw %cs:(%rax,%rax)
nopl (%rax)
// File: coduin[P]epiphany-bin-info/epiphany-bin-info.cpp
// Function: operator<<(std::ostream&, addr const&)
ostream& operator<<(ostream& stream, const addr& addr) {
    if (isExtmem(addr.val)) {
        outputSetWhite();
        stream << ashex(addr.val);
        outputReset();
    } else {
        stream << ashex(addr.val);
    }
    return stream;
}

// Assembly:
subq $0x48, %rsp
movq %rdi, 0x40(%rsp)
movq %rsi, 0x38(%rsp)
movq 0x38(%rsp), %rax
movl (%rax), %edi
callq 0x2560
testb $0x1, %al
jne 0x26a0
jmp 0x2701
callq 0x2580
movq 0x40(%rsp), %rax
movq %rax, 0x10(%rsp)
movq 0x38(%rsp), %rax
movl (%rax), %esi
leaq 0x34(%rsp), %rdi
movq %rdi, 0x18(%rsp)
callq 0x4720
movq 0x10(%rsp), %rdi
movq 0x18(%rsp), %rsi
callq 0x25e0
jmp 0x26d6
leaq 0x34(%rsp), %rdi
callq 0x4740
callq 0x25c0
jmp 0x2756
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x28(%rsp)
movl %eax, 0x24(%rsp)
leaq 0x34(%rsp), %rdi
callq 0x4740
jmp 0x2760
movq 0x40(%rsp), %rax
movq %rax, (%rsp)
movq 0x38(%rsp), %rax
movl (%rax), %esi
leaq 0x20(%rsp), %rdi
movq %rdi, 0x8(%rsp)
callq 0x4720
movq (%rsp), %rdi
movq 0x8(%rsp), %rsi
callq 0x25e0
jmp 0x2730
leaq 0x20(%rsp), %rdi
callq 0x4740
jmp 0x2756
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x28(%rsp)
movl %eax, 0x24(%rsp)
leaq 0x20(%rsp), %rdi
callq 0x4740
jmp 0x2760
movq 0x40(%rsp), %rax
addq $0x48, %rsp
retq
movq 0x28(%rsp), %rdi
callq 0x23a0
nopw (%rax,%rax)
// File: coduin[P]epiphany-bin-info/epiphany-bin-info.cpp
// Function: demangle(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&)
string demangle(const string& name) {
    string ret;
    int status;
    char* realname = 0;

    realname = abi::__cxa_demangle(name.c_str(), 0, 0, &status);

    if (status == 0)
        ret = realname;
    else
        ret = name;

    if (realname)
        free(realname);
    return ret;
}

// Assembly:
subq $0x48, %rsp
movq %rdi, (%rsp)
movq %rdi, %rax
movq %rax, 0x8(%rsp)
movq %rdi, 0x40(%rsp)
movq %rsi, 0x38(%rsp)
movb $0x0, 0x37(%rsp)
callq 0x2310
movq $0x0, 0x28(%rsp)
movq 0x38(%rsp), %rdi
callq 0x20e0
movq %rax, %rdi
xorl %eax, %eax
movl %eax, %edx
leaq 0x30(%rsp), %rcx
movq %rdx, %rsi
callq 0x21a0
movq %rax, 0x10(%rsp)
jmp 0x27c2
movq 0x10(%rsp), %rax
movq %rax, 0x28(%rsp)
cmpl $0x0, 0x30(%rsp)
jne 0x27fe
movq (%rsp), %rdi
movq 0x28(%rsp), %rsi
callq 0x2300
jmp 0x27e3
jmp 0x2810
movq (%rsp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x20(%rsp)
movl %eax, 0x1c(%rsp)
callq 0x2140
jmp 0x2841
movq (%rsp), %rdi
movq 0x38(%rsp), %rsi
callq 0x2040
jmp 0x280e
jmp 0x2810
cmpq $0x0, 0x28(%rsp)
je 0x2822
movq 0x28(%rsp), %rdi
callq 0x2280
movb $0x1, 0x37(%rsp)
testb $0x1, 0x37(%rsp)
jne 0x2837
movq (%rsp), %rdi
callq 0x2140
movq 0x8(%rsp), %rax
addq $0x48, %rsp
retq
movq 0x20(%rsp), %rdi
callq 0x23a0
nopl (%rax,%rax)
// File: coduin[P]epiphany-bin-info/epiphany-bin-info.cpp
// Function: isEpiphanyElf(Elf32_Ehdr*)
bool isEpiphanyElf(Elf32_Ehdr* ehdr) {
    return ehdr && memcmp(ehdr->e_ident, ELFMAG, SELFMAG) == 0 &&
           ehdr->e_ident[EI_CLASS] == ELFCLASS32 && ehdr->e_type == ET_EXEC &&
           ehdr->e_version == EV_CURRENT &&
           ehdr->e_machine == EM_ADAPTEVA_EPIPHANY;
}

// Assembly:
movq %rdi, -0x8(%rsp)
xorl %eax, %eax
cmpq $0x0, -0x8(%rsp)
movb %al, -0x9(%rsp)
je 0x28ce
movq -0x8(%rsp), %rax
movl (%rax), %eax
subl $0x464c457f, %eax       # imm = 0x464C457F
setne %al
movzbl %al, %ecx
xorl %eax, %eax
cmpl $0x0, %ecx
movb %al, -0x9(%rsp)
jne 0x28ce
movq -0x8(%rsp), %rax
movzbl 0x4(%rax), %ecx
xorl %eax, %eax
cmpl $0x1, %ecx
movb %al, -0x9(%rsp)
jne 0x28ce
movq -0x8(%rsp), %rax
movzwl 0x10(%rax), %ecx
xorl %eax, %eax
cmpl $0x2, %ecx
movb %al, -0x9(%rsp)
jne 0x28ce
movq -0x8(%rsp), %rcx
xorl %eax, %eax
cmpl $0x1, 0x14(%rcx)
movb %al, -0x9(%rsp)
jne 0x28ce
movq -0x8(%rsp), %rax
movzwl 0x12(%rax), %eax
cmpl $0x1223, %eax           # imm = 0x1223
sete %al
movb %al, -0x9(%rsp)
movb -0x9(%rsp), %al
andb $0x1, %al
retq
nopw %cs:(%rax,%rax)