// File: /workspace/github_c_makefile_star2_O0/mjosaarinen[P]brutus/crypto_aead/scream10v3/sse/scream.c
// Function: LBoxInv16P
static void LBoxInv16P(v16qi *X) {
  int j;
  static const v16qi tables[8] = 
    {
      {0x00, 0x05, 0xf6, 0xf3, 0x39, 0x3c, 0xcf, 0xca, 0xae, 0xab, 0x58, 0x5d, 0x97, 0x92, 0x61, 0x64, },
      {0x00, 0xdc, 0xae, 0x72, 0x29, 0xf5, 0x87, 0x5b, 0x82, 0x5e, 0x2c, 0xf0, 0xab, 0x77, 0x05, 0xd9, },
      {0x00, 0x9e, 0x04, 0x9a, 0xd1, 0x4f, 0xd5, 0x4b, 0x13, 0x8d, 0x17, 0x89, 0xc2, 0x5c, 0xc6, 0x58, },
      {0x00, 0xe7, 0x77, 0x90, 0x2a, 0xcd, 0x5d, 0xba, 0x63, 0x84, 0x14, 0xf3, 0x49, 0xae, 0x3e, 0xd9, },
      {0x00, 0xbf, 0xe5, 0x5a, 0xd6, 0x69, 0x33, 0x8c, 0xd8, 0x67, 0x3d, 0x82, 0x0e, 0xb1, 0xeb, 0x54, },
      {0x00, 0x6a, 0x7e, 0x14, 0x7b, 0x11, 0x05, 0x6f, 0x86, 0xec, 0xf8, 0x92, 0xfd, 0x97, 0x83, 0xe9, },
      {0x00, 0x54, 0xbe, 0xea, 0xd8, 0x8c, 0x66, 0x32, 0xa5, 0xf1, 0x1b, 0x4f, 0x7d, 0x29, 0xc3, 0x97, },
      {0x00, 0x1e, 0xb9, 0xa7, 0x19, 0x07, 0xa0, 0xbe, 0xa8, 0xb6, 0x11, 0x0f, 0xb1, 0xaf, 0x08, 0x16, },
    };

  for (j=0; j<8; j+=2) {

    // Evaluate 2 series LBoxes in parallel, with 16-bit input
    // (X[4*j], X[4*j+2]) and (X[4*j+1], X[4*j+3]) ie (A,B) and (C,D)

#define A (X[j])
#define B (X[j+8])
#define C (X[j+1])
#define D (X[j+9])

    v16qi in[4] = {A, B, C, D};
    v16qi t0, t1;

    /* READ macro forces reload from memory */
#define READ(t,x)                                                       \
    __asm("movdqa %[tbl],%[data]\n":                                    \
          [data] "=x" (x):                                              \
          [tbl] "m" (t));                             

    v16qi table;

    READ(tables[0], table);

    t0 = shift_right(in[0]) & V(0xf);
    t1 = shift_right(in[2]) & V(0xf);

    A  = __builtin_ia32_pshufb128(table, t0);
    C  = __builtin_ia32_pshufb128(table, t1);

    READ(tables[1], table);

    B  = __builtin_ia32_pshufb128(table, t0);
    D  = __builtin_ia32_pshufb128(table, t1);

    READ(tables[2], table);

    in[0] &= V(0xf);
    in[2] &= V(0xf);

    A ^= __builtin_ia32_pshufb128(table, in[0]);
    C ^= __builtin_ia32_pshufb128(table, in[2]);

    READ(tables[3], table);

    B ^= __builtin_ia32_pshufb128(table, in[0]);
    D ^= __builtin_ia32_pshufb128(table, in[2]);

    READ(tables[4], table);

    t0 = shift_right(in[1]) & V(0xf);
    t1 = shift_right(in[3]) & V(0xf);

    A ^= __builtin_ia32_pshufb128(table, t0);
    C ^= __builtin_ia32_pshufb128(table, t1);

    READ(tables[5], table);

    B ^= __builtin_ia32_pshufb128(table, t0);
    D ^= __builtin_ia32_pshufb128(table, t1);

    READ(tables[6], table);

    in[1] &= V(0xf);
    in[3] &= V(0xf);

    A ^= __builtin_ia32_pshufb128(table, in[1]);
    C ^= __builtin_ia32_pshufb128(table, in[3]);

    READ(tables[7], table);

    B ^= __builtin_ia32_pshufb128(table, in[1]);
    D ^= __builtin_ia32_pshufb128(table, in[3]);

#undef READ
#undef A
#undef B
#undef C
#undef D
  }
}

// Assembly:
subq $0x98, %rsp
movq %rdi, 0x90(%rsp)
movl $0x0, 0x8c(%rsp)
cmpl $0x8, 0x8c(%rsp)
jge 0x54fb
movq 0x90(%rsp), %rax
movslq 0x8c(%rsp), %rcx
shlq $0x4, %rcx
vmovdqa (%rax,%rcx), %xmm0
vmovdqa %xmm0, 0x40(%rsp)
movq 0x90(%rsp), %rcx
movslq 0x8c(%rsp), %rax
shlq $0x4, %rax
vmovdqa 0x80(%rax,%rcx), %xmm0
vmovdqa %xmm0, 0x50(%rsp)
movq 0x90(%rsp), %rcx
movslq 0x8c(%rsp), %rax
shlq $0x4, %rax
vmovdqa 0x10(%rax,%rcx), %xmm0
vmovdqa %xmm0, 0x60(%rsp)
movq 0x90(%rsp), %rcx
movslq 0x8c(%rsp), %rax
shlq $0x4, %rax
vmovdqa 0x90(%rax,%rcx), %xmm0
vmovdqa %xmm0, 0x70(%rsp)
movdqa 0x687b(%rip), %xmm0     # 0xb8c0
vmovaps %xmm0, 0x10(%rsp)
vmovdqa 0x40(%rsp), %xmm0
vpsrld $0x4, %xmm0, %xmm1
vmovdqa 0x5fa2(%rip), %xmm0     # 0xb000
vmovaps %xmm0, -0x80(%rsp)
vmovdqa %xmm0, (%rsp)
vmovdqa (%rsp), %xmm2
vpand %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, 0x30(%rsp)
vmovdqa 0x60(%rsp), %xmm1
vpsrld $0x4, %xmm1, %xmm1
vmovdqa %xmm0, -0x10(%rsp)
vmovdqa -0x10(%rsp), %xmm2
vpand %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, 0x20(%rsp)
vmovdqa 0x10(%rsp), %xmm1
vmovdqa 0x30(%rsp), %xmm2
vpshufb %xmm2, %xmm1, %xmm1
movq 0x90(%rsp), %rax
movslq 0x8c(%rsp), %rcx
shlq $0x4, %rcx
vmovdqa %xmm1, (%rax,%rcx)
vmovdqa 0x10(%rsp), %xmm1
vmovdqa 0x20(%rsp), %xmm2
vpshufb %xmm2, %xmm1, %xmm1
movq 0x90(%rsp), %rcx
movslq 0x8c(%rsp), %rax
shlq $0x4, %rax
vmovdqa %xmm1, 0x10(%rax,%rcx)
movdqa 0x67da(%rip), %xmm1     # 0xb8d0
vmovaps %xmm1, 0x10(%rsp)
vmovdqa 0x10(%rsp), %xmm1
vmovdqa 0x30(%rsp), %xmm2
vpshufb %xmm2, %xmm1, %xmm1
movq 0x90(%rsp), %rcx
movslq 0x8c(%rsp), %rax
shlq $0x4, %rax
vmovdqa %xmm1, 0x80(%rax,%rcx)
vmovdqa 0x10(%rsp), %xmm1
vmovdqa 0x20(%rsp), %xmm2
vpshufb %xmm2, %xmm1, %xmm1
movq 0x90(%rsp), %rcx
movslq 0x8c(%rsp), %rax
shlq $0x4, %rax
vmovdqa %xmm1, 0x90(%rax,%rcx)
movdqa 0x6780(%rip), %xmm1     # 0xb8e0
vmovaps %xmm1, 0x10(%rsp)
vmovdqa %xmm0, -0x20(%rsp)
vmovdqa -0x20(%rsp), %xmm2
vmovdqa 0x40(%rsp), %xmm1
vpand %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, 0x40(%rsp)
vmovdqa %xmm0, -0x30(%rsp)
vmovdqa -0x30(%rsp), %xmm2
vmovdqa 0x60(%rsp), %xmm1
vpand %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, 0x60(%rsp)
vmovdqa 0x10(%rsp), %xmm1
vmovdqa 0x40(%rsp), %xmm2
vpshufb %xmm2, %xmm1, %xmm2
movq 0x90(%rsp), %rax
movslq 0x8c(%rsp), %rcx
shlq $0x4, %rcx
vmovdqa (%rax,%rcx), %xmm1
vpxor %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, (%rax,%rcx)
vmovdqa 0x10(%rsp), %xmm1
vmovdqa 0x60(%rsp), %xmm2
vpshufb %xmm2, %xmm1, %xmm2
movq 0x90(%rsp), %rcx
movslq 0x8c(%rsp), %rax
shlq $0x4, %rax
vmovdqa 0x10(%rax,%rcx), %xmm1
vpxor %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, 0x10(%rax,%rcx)
movdqa 0x66e2(%rip), %xmm1     # 0xb8f0
vmovaps %xmm1, 0x10(%rsp)
vmovdqa 0x10(%rsp), %xmm1
vmovdqa 0x40(%rsp), %xmm2
vpshufb %xmm2, %xmm1, %xmm2
movq 0x90(%rsp), %rcx
movslq 0x8c(%rsp), %rax
shlq $0x4, %rax
vmovdqa 0x80(%rax,%rcx), %xmm1
vpxor %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, 0x80(%rax,%rcx)
vmovdqa 0x10(%rsp), %xmm1
vmovdqa 0x60(%rsp), %xmm2
vpshufb %xmm2, %xmm1, %xmm2
movq 0x90(%rsp), %rcx
movslq 0x8c(%rsp), %rax
shlq $0x4, %rax
vmovdqa 0x90(%rax,%rcx), %xmm1
vpxor %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, 0x90(%rax,%rcx)
movdqa 0x666e(%rip), %xmm1     # 0xb900
vmovaps %xmm1, 0x10(%rsp)
vmovdqa 0x50(%rsp), %xmm1
vpsrld $0x4, %xmm1, %xmm1
vmovdqa %xmm0, -0x40(%rsp)
vmovdqa -0x40(%rsp), %xmm2
vpand %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, 0x30(%rsp)
vmovdqa 0x70(%rsp), %xmm1
vpsrld $0x4, %xmm1, %xmm1
vmovdqa %xmm0, -0x50(%rsp)
vmovdqa -0x50(%rsp), %xmm2
vpand %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, 0x20(%rsp)
vmovdqa 0x10(%rsp), %xmm1
vmovdqa 0x30(%rsp), %xmm2
vpshufb %xmm2, %xmm1, %xmm2
movq 0x90(%rsp), %rax
movslq 0x8c(%rsp), %rcx
shlq $0x4, %rcx
vmovdqa (%rax,%rcx), %xmm1
vpxor %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, (%rax,%rcx)
vmovdqa 0x10(%rsp), %xmm1
vmovdqa 0x20(%rsp), %xmm2
vpshufb %xmm2, %xmm1, %xmm2
movq 0x90(%rsp), %rcx
movslq 0x8c(%rsp), %rax
shlq $0x4, %rax
vmovdqa 0x10(%rax,%rcx), %xmm1
vpxor %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, 0x10(%rax,%rcx)
movdqa 0x65c6(%rip), %xmm1     # 0xb910
vmovaps %xmm1, 0x10(%rsp)
vmovdqa 0x10(%rsp), %xmm1
vmovdqa 0x30(%rsp), %xmm2
vpshufb %xmm2, %xmm1, %xmm2
movq 0x90(%rsp), %rcx
movslq 0x8c(%rsp), %rax
shlq $0x4, %rax
vmovdqa 0x80(%rax,%rcx), %xmm1
vpxor %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, 0x80(%rax,%rcx)
vmovdqa 0x10(%rsp), %xmm1
vmovdqa 0x20(%rsp), %xmm2
vpshufb %xmm2, %xmm1, %xmm2
movq 0x90(%rsp), %rcx
movslq 0x8c(%rsp), %rax
shlq $0x4, %rax
vmovdqa 0x90(%rax,%rcx), %xmm1
vpxor %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, 0x90(%rax,%rcx)
movdqa 0x6552(%rip), %xmm1     # 0xb920
vmovaps %xmm1, 0x10(%rsp)
vmovdqa %xmm0, -0x60(%rsp)
vmovdqa -0x60(%rsp), %xmm2
vmovdqa 0x50(%rsp), %xmm1
vpand %xmm2, %xmm1, %xmm1
vmovdqa %xmm1, 0x50(%rsp)
vmovdqa %xmm0, -0x70(%rsp)
vmovdqa -0x70(%rsp), %xmm0
vpand 0x70(%rsp), %xmm0, %xmm0
vmovdqa %xmm0, 0x70(%rsp)
vmovdqa 0x10(%rsp), %xmm0
vmovdqa 0x50(%rsp), %xmm1
vpshufb %xmm1, %xmm0, %xmm0
movq 0x90(%rsp), %rax
movslq 0x8c(%rsp), %rcx
shlq $0x4, %rcx
addq %rcx, %rax
vpxor (%rax), %xmm0, %xmm0
vmovdqa %xmm0, (%rax)
vmovdqa 0x10(%rsp), %xmm0
vmovdqa 0x70(%rsp), %xmm1
vpshufb %xmm1, %xmm0, %xmm0
movq 0x90(%rsp), %rax
movl 0x8c(%rsp), %ecx
addl $0x1, %ecx
movslq %ecx, %rcx
shlq $0x4, %rcx
addq %rcx, %rax
vpxor (%rax), %xmm0, %xmm0
vmovdqa %xmm0, (%rax)
movdqa 0x64bb(%rip), %xmm0     # 0xb930
vmovdqa %xmm0, 0x10(%rsp)
vmovdqa 0x10(%rsp), %xmm0
vmovdqa 0x50(%rsp), %xmm1
vpshufb %xmm1, %xmm0, %xmm0
movq 0x90(%rsp), %rax
movl 0x8c(%rsp), %ecx
addl $0x8, %ecx
movslq %ecx, %rcx
shlq $0x4, %rcx
addq %rcx, %rax
vpxor (%rax), %xmm0, %xmm0
vmovdqa %xmm0, (%rax)
vmovdqa 0x10(%rsp), %xmm0
vmovdqa 0x70(%rsp), %xmm1
vpshufb %xmm1, %xmm0, %xmm0
movq 0x90(%rsp), %rax
movl 0x8c(%rsp), %ecx
addl $0x9, %ecx
movslq %ecx, %rcx
shlq $0x4, %rcx
addq %rcx, %rax
vpxor (%rax), %xmm0, %xmm0
vmovdqa %xmm0, (%rax)
movl 0x8c(%rsp), %eax
addl $0x2, %eax
movl %eax, 0x8c(%rsp)
jmp 0x4faa
addq $0x98, %rsp
retq
nopw %cs:(%rax,%rax)