// File: /workspace/github_cpp_makefile_star2_O1/luooofan[P]hblzbd_compiler/src/Pass/generate_arm_from_ssa.cpp
// Function: GenerateArmFromSSA::ResolveImm2Reg(ArmBasicBlock*, int, bool)
Reg* GenerateArmFromSSA::ResolveImm2Reg(ArmBasicBlock* armbb, int imm, bool record) {
  auto vreg = NewVirtualReg();
  Instruction* inst = nullptr;
  if (Operand2::CheckImm8m(imm)) {
    // NOTE: 寄存器分配后立即数值可能会变
    inst = new Move(vreg, new Operand2(imm), armbb);
  } else {
    if (imm < 0 && Operand2::CheckImm8m(-imm - 1)) {  // mvn
      inst = new Move(vreg, new Operand2(-imm - 1), armbb, true);
    } else {  // use ldr pseudo-inst instead of mov.
      inst = new LdrPseudo(vreg, imm, armbb);
    }
  }
  MyAssert(nullptr != inst);
  if (record) {
    this->sp_fixup.insert(inst);
  }
  return vreg;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movl %ecx, %ebp
movl %edx, %r12d
movq %rsi, %r15
movq %rdi, %r14
movl $0x40, %edi
callq 0x8290
movq %rax, %rbx
movl 0x50(%r14), %eax
leal 0x1(%rax), %ecx
movl %ecx, 0x50(%r14)
leaq 0x30(%rbx), %rcx
movq %rcx, (%rbx)
movq $0x1, 0x8(%rbx)
xorps %xmm0, %xmm0
movups %xmm0, 0x10(%rbx)
movl $0x3f800000, 0x20(%rbx) # imm = 0x3F800000
movups %xmm0, 0x28(%rbx)
movl %eax, 0x38(%rbx)
movq $0x0, 0x8(%rsp)
movl %r12d, %edi
callq 0xa656
testb %al, %al
je 0x4cbf6
movl %ebp, 0x4(%rsp)
movl $0x28, %edi
callq 0x8290
movq %rax, %r13
movl $0x18, %edi
callq 0x8290
movq %rax, %rbp
movb $0x1, (%rax)
movl %r12d, 0x4(%rax)
xorps %xmm0, %xmm0
movups %xmm0, 0x8(%rax)
movq %r13, %rdi
movq %r15, %rsi
movl $0x1, %edx
callq 0xa6a8
leaq 0x418f5(%rip), %rax     # 0x8e4c0
leaq 0x10(%rax), %rcx
movq %rcx, (%r13)
movw $0x0, 0x14(%r13)
movq %rbx, 0x18(%r13)
movq %rbp, 0x20(%r13)
movq %r13, %rdi
callq *0x28(%rax)
movq %r13, 0x8(%rsp)
movl 0x4(%rsp), %ebp
jmp 0x4ccd0
testl %r12d, %r12d
jns 0x4cc7a
movl %r12d, %r13d
notl %r13d
movl %r13d, %edi
callq 0xa656
testb %al, %al
je 0x4cc7a
movl %ebp, 0x4(%rsp)
movl $0x28, %edi
callq 0x8290
movq %rax, %r12
movl $0x18, %edi
callq 0x8290
movq %rax, %rbp
movb $0x1, (%rax)
movl %r13d, 0x4(%rax)
xorps %xmm0, %xmm0
movups %xmm0, 0x8(%rax)
movq %r12, %rdi
movq %r15, %rsi
movl $0x1, %edx
callq 0xa6a8
leaq 0x41870(%rip), %rax     # 0x8e4c0
leaq 0x10(%rax), %rcx
movq %rcx, (%r12)
movw $0x1, 0x14(%r12)
movq %rbx, 0x18(%r12)
movq %rbp, 0x20(%r12)
movq %r12, %rdi
callq *0x28(%rax)
movq %r12, 0x8(%rsp)
jmp 0x4cbed
movl $0x48, %edi
callq 0x8290
movq %rax, %r13
movq %rax, %rdi
movq %r15, %rsi
movl $0x1, %edx
callq 0xa6a8
leaq 0x41732(%rip), %rax     # 0x8e3d0
addq $0x10, %rax
movq %rax, (%r13)
movq %rbx, 0x18(%r13)
movq %r13, %rax
addq $0x30, %rax
movq %rax, 0x20(%r13)
movq $0x0, 0x28(%r13)
movb $0x0, 0x30(%r13)
movl %r12d, 0x40(%r13)
movb $0x1, 0x44(%r13)
movq %r13, 0x8(%rsp)
cmpq $0x0, 0x8(%rsp)
je 0x4cd0b
testb %bpl, %bpl
je 0x4ccf9
addq $0xd0, %r14
leaq 0x10(%rsp), %rdx
movq %r14, (%rdx)
leaq 0x8(%rsp), %rsi
movq %r14, %rdi
callq 0xc724
movq %rbx, %rax
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x432de(%rip), %rdi     # 0x8fff0
leaq 0x2244f(%rip), %rsi     # 0x6f168
callq 0x8280
leaq 0x25b6b(%rip), %rsi     # 0x72890
movq %rax, %rdi
callq 0x8280
leaq 0x2368c(%rip), %rsi     # 0x703c0
movq %rax, %rdi
callq 0x8280
movq %rax, %rdi
movl $0x4e, %esi
callq 0x8520
movq %rax, %rdi
callq 0x8180
movl $0xff, %edi
callq 0x8380
movq %rax, %rbx
movl $0x28, %esi
movq %r12, %rdi
jmp 0x4cd7d
movq %rax, %rbx
movl $0x48, %esi
jmp 0x4cd7a
movq %rax, %rbx
movl $0x28, %esi
movq %r13, %rdi
callq 0x82a0
movq %rbx, %rdi
callq 0x8540