// File: /workspace/github_c_makefile_star2_O1/mbitsnbites[P]SoftFP/softfloat.c
// Function: float32_muladd
float32 float32_muladd(float32 a, float32 b, float32 c, int flags,
                       float_status *status)
{
    flag aSign, bSign, cSign, zSign;
    int_fast16_t aExp, bExp, cExp, pExp, zExp, expDiff;
    uint32_t aSig, bSig, cSig;
    flag pInf, pZero, pSign;
    uint64_t pSig64, cSig64, zSig64;
    uint32_t pSig;
    int shiftcount;
    flag signflip, infzero;

    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);
    c = float32_squash_input_denormal(c, status);
    aSig = extractFloat32Frac(a);
    aExp = extractFloat32Exp(a);
    aSign = extractFloat32Sign(a);
    bSig = extractFloat32Frac(b);
    bExp = extractFloat32Exp(b);
    bSign = extractFloat32Sign(b);
    cSig = extractFloat32Frac(c);
    cExp = extractFloat32Exp(c);
    cSign = extractFloat32Sign(c);

    infzero = ((aExp == 0 && aSig == 0 && bExp == 0xff && bSig == 0) ||
               (aExp == 0xff && aSig == 0 && bExp == 0 && bSig == 0));

    /* It is implementation-defined whether the cases of (0,inf,qnan)
     * and (inf,0,qnan) raise InvalidOperation or not (and what QNaN
     * they return if they do), so we have to hand this information
     * off to the target-specific pick-a-NaN routine.
     */
    if (((aExp == 0xff) && aSig) ||
        ((bExp == 0xff) && bSig) ||
        ((cExp == 0xff) && cSig)) {
        return propagateFloat32MulAddNaN(a, b, c, infzero, status);
    }

    if (infzero) {
        float_raise(float_flag_invalid, status);
        return float32_default_nan;
    }

    if (flags & float_muladd_negate_c) {
        cSign ^= 1;
    }

    signflip = (flags & float_muladd_negate_result) ? 1 : 0;

    /* Work out the sign and type of the product */
    pSign = aSign ^ bSign;
    if (flags & float_muladd_negate_product) {
        pSign ^= 1;
    }
    pInf = (aExp == 0xff) || (bExp == 0xff);
    pZero = ((aExp | aSig) == 0) || ((bExp | bSig) == 0);

    if (cExp == 0xff) {
        if (pInf && (pSign ^ cSign)) {
            /* addition of opposite-signed infinities => InvalidOperation */
            float_raise(float_flag_invalid, status);
            return float32_default_nan;
        }
        /* Otherwise generate an infinity of the same sign */
        return packFloat32(cSign ^ signflip, 0xff, 0);
    }

    if (pInf) {
        return packFloat32(pSign ^ signflip, 0xff, 0);
    }

    if (pZero) {
        if (cExp == 0) {
            if (cSig == 0) {
                /* Adding two exact zeroes */
                if (pSign == cSign) {
                    zSign = pSign;
                } else if (status->float_rounding_mode == float_round_down) {
                    zSign = 1;
                } else {
                    zSign = 0;
                }
                return packFloat32(zSign ^ signflip, 0, 0);
            }
            /* Exact zero plus a denorm */
            if (status->flush_to_zero) {
                float_raise(float_flag_output_denormal, status);
                return packFloat32(cSign ^ signflip, 0, 0);
            }
        }
        /* Zero plus something non-zero : just return the something */
        if (flags & float_muladd_halve_result) {
            if (cExp == 0) {
                normalizeFloat32Subnormal(cSig, &cExp, &cSig);
            }
            /* Subtract one to halve, and one again because roundAndPackFloat32
             * wants one less than the true exponent.
             */
            cExp -= 2;
            cSig = (cSig | 0x00800000) << 7;
            return roundAndPackFloat32(cSign ^ signflip, cExp, cSig, status);
        }
        return packFloat32(cSign ^ signflip, cExp, cSig);
    }

    if (aExp == 0) {
        normalizeFloat32Subnormal(aSig, &aExp, &aSig);
    }
    if (bExp == 0) {
        normalizeFloat32Subnormal(bSig, &bExp, &bSig);
    }

    /* Calculate the actual result a * b + c */

    /* Multiply first; this is easy. */
    /* NB: we subtract 0x7e where float32_mul() subtracts 0x7f
     * because we want the true exponent, not the "one-less-than"
     * flavour that roundAndPackFloat32() takes.
     */
    pExp = aExp + bExp - 0x7e;
    aSig = (aSig | 0x00800000) << 7;
    bSig = (bSig | 0x00800000) << 8;
    pSig64 = (uint64_t)aSig * bSig;
    if ((int64_t)(pSig64 << 1) >= 0) {
        pSig64 <<= 1;
        pExp--;
    }

    zSign = pSign ^ signflip;

    /* Now pSig64 is the significand of the multiply, with the explicit bit in
     * position 62.
     */
    if (cExp == 0) {
        if (!cSig) {
            /* Throw out the special case of c being an exact zero now */
            shift64RightJamming(pSig64, 32, &pSig64);
            pSig = pSig64;
            if (flags & float_muladd_halve_result) {
                pExp--;
            }
            return roundAndPackFloat32(zSign, pExp - 1,
                                       pSig, status);
        }
        normalizeFloat32Subnormal(cSig, &cExp, &cSig);
    }

    cSig64 = (uint64_t)cSig << (62 - 23);
    cSig64 |= LIT64(0x4000000000000000);
    expDiff = pExp - cExp;

    if (pSign == cSign) {
        /* Addition */
        if (expDiff > 0) {
            /* scale c to match p */
            shift64RightJamming(cSig64, expDiff, &cSig64);
            zExp = pExp;
        } else if (expDiff < 0) {
            /* scale p to match c */
            shift64RightJamming(pSig64, -expDiff, &pSig64);
            zExp = cExp;
        } else {
            /* no scaling needed */
            zExp = cExp;
        }
        /* Add significands and make sure explicit bit ends up in posn 62 */
        zSig64 = pSig64 + cSig64;
        if ((int64_t)zSig64 < 0) {
            shift64RightJamming(zSig64, 1, &zSig64);
        } else {
            zExp--;
        }
    } else {
        /* Subtraction */
        if (expDiff > 0) {
            shift64RightJamming(cSig64, expDiff, &cSig64);
            zSig64 = pSig64 - cSig64;
            zExp = pExp;
        } else if (expDiff < 0) {
            shift64RightJamming(pSig64, -expDiff, &pSig64);
            zSig64 = cSig64 - pSig64;
            zExp = cExp;
            zSign ^= 1;
        } else {
            zExp = pExp;
            if (cSig64 < pSig64) {
                zSig64 = pSig64 - cSig64;
            } else if (pSig64 < cSig64) {
                zSig64 = cSig64 - pSig64;
                zSign ^= 1;
            } else {
                /* Exact zero */
                zSign = signflip;
                if (status->float_rounding_mode == float_round_down) {
                    zSign ^= 1;
                }
                return packFloat32(zSign, 0, 0);
            }
        }
        --zExp;
        /* Normalize to put the explicit bit back into bit 62. */
        shiftcount = countLeadingZeros64(zSig64) - 1;
        zSig64 <<= shiftcount;
        zExp -= shiftcount;
    }
    if (flags & float_muladd_halve_result) {
        zExp--;
    }

    shift64RightJamming(zSig64, 32, &zSig64);
    return roundAndPackFloat32(zSign, zExp, zSig64, status);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movl %ecx, -0x4(%rsp)
movl %edx, %ecx
movb 0x5(%r8), %al
testb %al, %al
je 0xbab1
testl $0x7f800000, %edi       # imm = 0x7F800000
setne %dl
testl $0x7fffff, %edi         # imm = 0x7FFFFF
sete %r10b
orb %dl, %r10b
jne 0xbab1
orb $0x40, 0x2(%r8)
andl $0x80000000, %edi       # imm = 0x80000000
testb %al, %al
je 0xbad8
testl $0x7f800000, %esi       # imm = 0x7F800000
setne %dl
testl $0x7fffff, %esi         # imm = 0x7FFFFF
sete %r10b
orb %dl, %r10b
jne 0xbad8
orb $0x40, 0x2(%r8)
andl $0x80000000, %esi       # imm = 0x80000000
testb %al, %al
je 0xbafd
testl $0x7f800000, %ecx       # imm = 0x7F800000
setne %al
testl $0x7fffff, %ecx         # imm = 0x7FFFFF
sete %dl
orb %al, %dl
jne 0xbafd
orb $0x40, 0x2(%r8)
andl $0x80000000, %ecx       # imm = 0x80000000
movl $0x7fffff, %edx         # imm = 0x7FFFFF
movl %edi, %r14d
andl %edx, %r14d
movl %edi, %r12d
shrl $0x17, %r12d
movl $0xff, %r11d
andl %r11d, %r12d
movl %esi, %r15d
andl %edx, %r15d
movl %esi, %r10d
shrl $0x17, %r10d
andl %r11d, %r10d
movl %r12d, %eax
orl %r14d, %eax
movl %r10d, %ebx
xorl %r11d, %ebx
orl %r15d, %eax
orl %ebx, %eax
jne 0xbb3f
xorl %ebx, %ebx
jmp 0xbb55
movl %r12d, %eax
xorl $0xff, %eax
movl %r15d, %ebx
orl %r14d, %ebx
orl %r10d, %ebx
orl %eax, %ebx
setne %bl
cmpl %r11d, %r10d
sete %al
cmpl %r11d, %r12d
sete %r13b
testl %r14d, %r14d
setne %r9b
testl %r15d, %r15d
setne %bpl
testb %r13b, %r9b
jne 0xbb9c
andb %al, %bpl
jne 0xbb9c
movl %ecx, %eax
shrl $0x17, %eax
andl %r11d, %eax
andl %ecx, %edx
cmpl $0xff, %eax
setne %r9b
testl %edx, %edx
sete %r11b
orb %r9b, %r11b
jne 0xbc6a
movl $0x7fc00000, %r9d       # imm = 0x7FC00000
movl %edi, %edx
andl %r9d, %edx
movl $0x7f800000, %eax       # imm = 0x7F800000
cmpl %eax, %edx
sete %r10b
testl $0x3fffff, %edi         # imm = 0x3FFFFF
setne %r11b
andb %r10b, %r11b
movl %esi, %r10d
andl %r9d, %r10d
cmpl %eax, %r10d
sete %bpl
testl $0x3fffff, %esi         # imm = 0x3FFFFF
setne %bl
andb %bpl, %bl
andl %ecx, %r9d
cmpl %eax, %r9d
sete %al
testl $0x3fffff, %ecx         # imm = 0x3FFFFF
setne %bpl
testb %r11b, %r11b
jne 0xbbf9
testb %bl, %bl
jne 0xbbf9
andb %bpl, %al
je 0xbbfe
orb $0x1, 0x2(%r8)
movl $0x7fc00000, %eax       # imm = 0x7FC00000
cmpb $0x0, 0x6(%r8)
jne 0xbd35
leal (%rdi,%rdi), %r8d
leal (%rsi,%rsi), %eax
movl $0xff800000, %ebp       # imm = 0xFF800000
cmpl %ebp, %eax
setae %al
orb %bl, %al
movzbl %al, %ebx
movl $0x2, %eax
subl %ebx, %eax
xorl %ebx, %ebx
testb %r11b, %r11b
cmovnel %ebx, %eax
cmpl %ebp, %r8d
cmovael %ebx, %eax
cmpl $0x2, %eax
je 0xbce2
cmpl $0x1, %eax
jne 0xbcfe
movl %esi, %eax
orl $0x400000, %eax         # imm = 0x400000
testl $0x3fffff, %esi         # imm = 0x3FFFFF
cmovel %esi, %eax
cmpl $0x7f800000, %r10d      # imm = 0x7F800000
cmovnel %esi, %eax
jmp 0xbd35
testb %bl, %bl
je 0xbcd6
shrl $0x1f, %ecx
movl $0xff, %r9d
cmpq %r9, %r12
sete %r11b
cmpq %r9, %r10
sete %r13b
movl -0x4(%rsp), %ebp
movl %ebp, %ebx
andb $0x1, %bl
xorb %cl, %bl
movl %ebp, %r9d
shrb $0x2, %r9b
andb $0x1, %r9b
xorl %edi, %esi
shrl $0x1f, %esi
shrb %bpl
andb $0x1, %bpl
xorb %sil, %bpl
orb %r11b, %r13b
movl %r12d, %ecx
orl %r14d, %ecx
sete %cl
movl %r10d, %esi
orl %r15d, %esi
sete %sil
cmpl $0xff, %eax
jne 0xbd19
cmpb %bl, %bpl
setne %al
andb %al, %r13b
cmpb $0x1, %r13b
jne 0xbd27
orb $0x1, 0x2(%r8)
movl $0x7fc00000, %eax       # imm = 0x7FC00000
jmp 0xbd35
movl %ecx, %eax
orl $0x400000, %eax         # imm = 0x400000
testl $0x3fffff, %ecx         # imm = 0x3FFFFF
cmovel %ecx, %eax
cmpl $0x7f800000, %r9d       # imm = 0x7F800000
cmovnel %ecx, %eax
jmp 0xbd35
movl %edi, %eax
orl $0x400000, %eax         # imm = 0x400000
testl $0x3fffff, %edi         # imm = 0x3FFFFF
cmovel %edi, %eax
cmpl $0x7f800000, %edx       # imm = 0x7F800000
cmovnel %edi, %eax
jmp 0xbd35
testb %r13b, %r13b
je 0xbd40
xorb %r9b, %bpl
movzbl %bpl, %eax
jmp 0xbd2d
xorb %r9b, %bl
movzbl %bl, %eax
shll $0x1f, %eax
orl $0x7f800000, %eax       # imm = 0x7F800000
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
orb %sil, %cl
je 0xbd63
testq %rax, %rax
je 0xbd76
testb $0x8, -0x4(%rsp)
jne 0xbd8e
xorb %r9b, %bl
movzbl %bl, %ecx
shll $0x1f, %ecx
shll $0x17, %eax
orl %ecx, %eax
orl %edx, %eax
jmp 0xbd35
testq %r12, %r12
jne 0xbdbf
testl %r14d, %r14d
je 0xbdaa
bsrl %r14d, %esi
xorl $0x1f, %esi
jmp 0xbdaf
testl %edx, %edx
je 0xbdd2
cmpb $0x0, 0x4(%r8)
je 0xbd4a
orb $-0x80, 0x2(%r8)
xorb %r9b, %bl
movzbl %bl, %eax
jmp 0xbde7
testq %rax, %rax
jne 0xbfba
testl %edx, %edx
je 0xbfa6
bsrl %edx, %eax
xorl $0x1f, %eax
jmp 0xbfab
movl $0x20, %esi
leal -0x8(%rsi), %ecx
shll %cl, %r14d
movl $0x9, %ecx
subl %esi, %ecx
movslq %ecx, %r12
testq %r10, %r10
jne 0xbe04
testl %r15d, %r15d
je 0xbdef
bsrl %r15d, %esi
xorl $0x1f, %esi
jmp 0xbdf4
cmpb %bl, %bpl
je 0xbde0
cmpb $0x1, 0x1(%r8)
sete %bpl
xorb %r9b, %bpl
movzbl %bpl, %eax
shll $0x1f, %eax
jmp 0xbd35
movl $0x20, %esi
leal -0x8(%rsi), %ecx
shll %cl, %r15d
movl $0x9, %ecx
subl %esi, %ecx
movslq %ecx, %r10
addq %r12, %r10
shll $0x7, %r14d
orl $0x40000000, %r14d      # imm = 0x40000000
shll $0x8, %r15d
orl $0x80000000, %r15d      # imm = 0x80000000
imulq %r14, %r15
xorl %ecx, %ecx
movq %r15, %r14
addq %r15, %r14
setns %cl
cmovsq %r15, %r14
subq %rcx, %r10
addq $-0x7e, %r10
movl %ebp, %edi
xorb %r9b, %dil
testq %rax, %rax
jne 0xbe5e
testl %edx, %edx
je 0xbf3a
bsrl %edx, %eax
xorl $0x1f, %eax
leal -0x8(%rax), %ecx
shll %cl, %edx
movl $0x9, %ecx
subl %eax, %ecx
movslq %ecx, %rax
orq $0x800000, %rdx         # imm = 0x800000
shlq $0x27, %rdx
movq %r10, %rsi
subq %rax, %rsi
cmpb %bl, %bpl
jne 0xbea6
testq %rsi, %rsi
jle 0xbee6
cmpq $0x3f, %rsi
jg 0xbf67
movq %rdx, %rax
movl %esi, %ecx
shrq %cl, %rax
negb %sil
movl %esi, %ecx
shlq %cl, %rdx
xorl %ecx, %ecx
testq %rdx, %rdx
setne %cl
orq %rax, %rcx
movq %rcx, %rdx
jmp 0xbfe0
testq %rsi, %rsi
jle 0xbf15
movl $0x1, %eax
cmpq $0x3f, %rsi
jg 0xbed1
movq %rdx, %r9
movl %esi, %ecx
shrq %cl, %r9
negb %sil
movl %esi, %ecx
shlq %cl, %rdx
xorl %eax, %eax
testq %rdx, %rdx
setne %al
orq %r9, %rax
subq %rax, %r14
movq %r14, %rsi
testq %rsi, %rsi
je 0xbf24
bsrq %rsi, %rax
xorq $0x3f, %rax
jmp 0xbf29
jns 0xbfdd
cmpq $-0x3f, %rsi
jl 0xbfd2
movl %esi, %ecx
negb %cl
movq %r14, %r9
shrq %cl, %r9
movl %esi, %ecx
shlq %cl, %r14
xorl %ecx, %ecx
testq %r14, %r14
setne %cl
orq %r9, %rcx
jmp 0xbfda
js 0xbf6e
movq %rdx, %rsi
subq %r14, %rsi
jae 0xbf97
subq %rdx, %r14
jmp 0xbed4
movl $0x40, %eax
leal -0x1(%rax), %ecx
shlq %cl, %rsi
subq %rax, %r10
movq %rsi, %r14
jmp 0xbff7
movq %r14, %rax
shrq $0x20, %rax
xorl %edx, %edx
testl $0xfffffffe, %r14d      # imm = 0xFFFFFFFE
setne %dl
orl %eax, %edx
movl -0x4(%rsp), %eax
shll $0x1c, %eax
sarl $0x1f, %eax
cltq
leaq (%rax,%r10), %rsi
decq %rsi
jmp 0xc018
movl $0x1, %edx
jmp 0xbfe0
cmpq $-0x3f, %rsi
jl 0xc02e
movl %esi, %ecx
negb %cl
movq %r14, %r9
shrq %cl, %r9
movl %esi, %ecx
shlq %cl, %r14
xorl %ecx, %ecx
testq %r14, %r14
setne %cl
orq %r9, %rcx
jmp 0xc036
jbe 0xc048
xorb $0x1, %dil
jmp 0xbed7
movl $0x20, %eax
leal -0x8(%rax), %ecx
shll %cl, %edx
movl $0x9, %ecx
subl %eax, %ecx
movslq %ecx, %rax
addq $-0x2, %rax
shll $0x7, %edx
orl $0x40000000, %edx       # imm = 0x40000000
xorb %r9b, %bl
movzbl %bl, %edi
movq %rax, %rsi
jmp 0xc01c
xorl %ecx, %ecx
testq %r14, %r14
setne %cl
movq %rcx, %r14
movq %rax, %r10
addq %rdx, %r14
js 0xbfea
decq %r10
jmp 0xbff7
movq %r14, %rax
shrq %rax
andl $0x1, %r14d
orq %rax, %r14
movl -0x4(%rsp), %eax
shll $0x1c, %eax
sarl $0x1f, %eax
movslq %eax, %rsi
addq %r10, %rsi
movq %r14, %rax
shrq $0x20, %rax
xorl %edx, %edx
testl %r14d, %r14d
setne %dl
orl %eax, %edx
movzbl %dil, %edi
movq %r8, %rcx
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
jmp 0x9e9b
xorl %ecx, %ecx
testq %r14, %r14
setne %cl
subq %rcx, %rdx
xorb $0x1, %dil
movq %rdx, %rsi
movq %rax, %r10
jmp 0xbed7
cmpb $0x1, 0x1(%r8)
sete %al
xorb %al, %r9b
movzbl %r9b, %eax
jmp 0xbde7