// File: /workspace/github_c_makefile_star2_O1/dwelch67[P]lc3/vsim.c
// Function: sim
int sim ( void )
{
    unsigned short inst;
    unsigned short test;
    unsigned short simm;
    unsigned short dest;
    unsigned short rd,rd_data;
    unsigned short sr1,sr1_data;
    unsigned short sr2,sr2_data;
    while(1)
    {
        printf("\n");
        inst=fetch_mem(pc);
        printf("---- 0x%04X: 0x%04X ",pc,inst);
        pc=(pc+1)&MEMMASK;
        switch((inst>>12)&0xF)
        {
            case 0x0: //br
            {
                printf("br");
                if(inst&0x0800) printf("n");
                if(inst&0x0400) printf("z");
                if(inst&0x0200) printf("p");
                simm=sext9(inst);
                dest=(pc+simm)&0xFFFF;
                printf(" 0x%04X",dest);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                test=(psr&7)&((inst>>9)&7);
                if(test)
                {
                    pc=pc+sext9(inst&0x1FF);
                }
                break;
            }
            case 0x1: //add
            {
                rd=(inst>>9)&7;
                sr1=(inst>>6)&7;
                if(inst&0x20)
                {
                    simm=sext5(inst);
                    printf("add r%u,r%u,#0x%04X\n",rd,sr1,simm);

                    sr1_data=read_reg(sr1);
                    rd_data=sr1_data+simm;
                }
                else
                {
                    sr2=(inst>>0)&7;
                    printf("add r%u,r%u,r%u",rd,sr1,sr2);

                    sr1_data=read_reg(sr1);
                    sr2_data=read_reg(sr2);
                    rd_data=sr1_data+sr2_data;
                }
                write_reg(rd,rd_data);
                docc(rd_data);
                break;
            }
            case 0x2: //ld
            {
                rd=(inst>>9)&7;
                simm=sext9(inst);
                dest=(pc+simm)&0xFFFF;
                printf("ld r%u,0x%04X",rd,dest);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                rd_data=read_mem(dest);
                write_reg(rd,rd_data);
                docc(rd_data);
                break;
            }
            case 0x3: //st
            {
                rd=(inst>>9)&7;
                simm=sext9(inst);
                dest=(pc+simm)&0xFFFF;
                printf("st r%u,0x%04X",rd,dest);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                rd_data=read_reg(rd);
                write_mem(dest,rd_data);
                break;
            }
            case 0x4: //jsr/jsrr
            {
                if(inst&0x0800)
                {
                    simm=sext11(inst);
                    dest=(pc+simm)&0xFFFF;
                    printf("jsr 0x%04X",dest);
                    if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                    else            printf(" ; +%u",simm);
                    printf("\n");

                    write_reg(7,pc);
                    pc=dest;
                }
                else
                {
                    rd=(inst>>6)&7;
                    printf("jsrr r%u\n",rd);

                    write_reg(7,pc);
                    pc=read_reg(rd);
                }
                break;
            }
            case 0x5: //and
            {
                rd=(inst>>9)&7;
                sr1=(inst>>6)&7;
                if(inst&0x20)
                {
                    simm=sext5(inst);
                    printf("and r%u,r%u,#0x%04X\n",rd,sr1,simm);

                    sr1_data=read_reg(sr1);
                    rd_data=sr1_data&simm;
                }
                else
                {
                    sr2=(inst>>0)&7;
                    printf("add r%u,r%u,r%u",rd,sr1,sr2);

                    sr1_data=read_reg(sr1);
                    sr2_data=read_reg(sr2);
                    rd_data=sr1_data&sr2_data;
                }
                write_reg(rd,rd_data);
                docc(rd_data);
                break;
            }
            case 0x6: //ldr
            {
                rd=(inst>>9)&7;
                sr1=(inst>>6)&7;
                simm=sext6(inst);
                printf("ldr r%u,r%u,#0x%04X",rd,sr1,simm);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                sr1_data=read_reg(sr1);
                dest=(sr1_data+simm)&0xFFFF;
                rd_data=read_mem(dest);
                write_reg(rd,rd_data);
                docc(rd_data);
                break;
            }
            case 0x7: //str
            {
                rd=(inst>>9)&7;
                sr1=(inst>>6)&7;
                simm=sext6(inst);
                printf("str r%u,r%u,#0x%04X",rd,sr1,simm);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                sr1_data=read_reg(sr1);
                dest=(sr1_data+simm)&0xFFFF;
                rd_data=read_reg(rd);
                write_mem(dest,rd_data);
                break;
            }
            case 0x8: //rti
            {
                printf("rti\n");
                if(psr&0x8000)
                {
                    printf("exception\n");
                    exit(1);
                }
                else
                {
                    rd_data=read_reg(6);
                    pc=read_mem(rd_data);
                    write_reg(6,(rd_data+1)&0xFFFF);
                    rd_data=read_reg(6);
                    psr=read_mem(rd_data);
                    write_reg(6,(rd_data+1)&0xFFFF);
                }
                break;
            }
            case 0x9: //not
            {
                rd=(inst>>9)&7;
                sr1=(inst>>6)&7;
                printf("not r%u,r%u\n",rd,sr1);

                sr1_data=read_reg(sr1);
                rd_data = ~sr1_data;
                write_reg(rd,rd_data);
                docc(rd_data);
                break;
            }
            case 0xA: //ldi
            {
                rd=(inst>>9)&7;
                simm=sext9(inst);
                dest=(pc+simm)&0xFFFF;
                printf("ldi r%u,0x%04X",rd,dest);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                rd_data=read_mem(read_mem(dest));
                write_reg(rd,rd_data);
                docc(rd_data);
                break;
            }
            case 0xB: //sti
            {
                rd=(inst>>9)&7;
                simm=sext9(inst);
                dest=(pc+simm)&0xFFFF;
                printf("sti r%u,0x%04X",rd,dest);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                rd_data=read_reg(rd);
                write_mem(read_mem(dest),rd_data);
                break;
            }
            case 0xC: //jmp/ret
            {
                sr1=(inst>>6)&7;
                printf("jmp r%u",sr1);
                if(sr1==7) printf(" ; ret");
                printf("\n");

                pc=read_reg(sr1);
                break;
            }
            case 0xD: //undefined
            {
                printf("undefined instruction\n");
                exit(1);
                break;
            }
            case 0xE: //lea
            {
                rd=(inst>>9)&7;
                simm=sext9(inst);
                dest=(pc+simm)&0xFFFF;
                printf("lea r%u,0x%04X",rd,dest);
                if(simm&0x8000) printf(" ; -%u",(simm^0xFFFF)+1);
                else            printf(" ; +%u",simm);
                printf("\n");

                write_reg(rd,dest);
                docc(dest);
                break;
            }
            case 0xF: //trap
            {
                printf("trap 0x%02X\n",inst&0xFF);
                if((inst&0xFF)==0x67)
                {
                    printf("show 0x%04X\n",reg[0]);
                }
                else
                if((inst&0xFF)==0x25)
                {
                    printf("halt\n");
                    return(0);
                }
                else
                {
                    reg[7]=pc;
                    pc=mem[inst&0xFF];
                }
                break;
            }
        }
    }
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl $0xa, %edi
callq 0x1030
movzwl 0x23cd0(%rip), %esi     # 0x250c2
incl 0x3c98(%rip)            # 0x5090
leaq 0x3ca1(%rip), %rax      # 0x50a0
movzwl (%rax,%rsi,2), %r15d
leaq 0x1c39(%rip), %rdi      # 0x3044
movl %r15d, %edx
xorl %eax, %eax
callq 0x1060
movzwl 0x23ca6(%rip), %esi     # 0x250c2
leaq 0x1caa(%rip), %rdi      # 0x30cd
movl %r15d, %edx
xorl %eax, %eax
callq 0x1060
movzwl 0x23c8e(%rip), %eax     # 0x250c2
incl %eax
movw %ax, 0x23c85(%rip)      # 0x250c2
movl %r15d, %ecx
shrl $0xc, %ecx
leaq 0x1bba(%rip), %rdx      # 0x3004
movslq (%rdx,%rcx,4), %rcx
addq %rdx, %rcx
jmpq *%rcx
leaq 0x1c88(%rip), %rdi      # 0x30e2
xorl %eax, %eax
callq 0x1060
btl $0xb, %r15d
jae 0x1472
movl $0x6e, %edi
callq 0x1030
btl $0xa, %r15d
jae 0x1483
movl $0x7a, %edi
callq 0x1030
btl $0x9, %r15d
jae 0x1494
movl $0x70, %edi
callq 0x1030
movl %r15d, %r14d
andl $0x1ff, %r14d           # imm = 0x1FF
xorl %eax, %eax
cmpl $0x100, %r14d           # imm = 0x100
setb %al
shll $0x9, %eax
leal (%rax,%r14), %ebx
addl $0xfffffe00, %ebx       # imm = 0xFFFFFE00
movzwl 0x23c04(%rip), %eax     # 0x250c2
addw %bx, %ax
movzwl %ax, %esi
leaq 0x1c6c(%rip), %rdi      # 0x3137
xorl %eax, %eax
callq 0x1060
movzwl %bx, %esi
cmpl $0x100, %r14d           # imm = 0x100
jae 0x1d86
leaq 0x1c03(%rip), %rdi      # 0x30ec
jmp 0x1d96
movl %r15d, %r12d
shrl $0x9, %r12d
andl $0x7, %r12d
andl $0x1ff, %r15d           # imm = 0x1FF
xorl %ecx, %ecx
cmpl $0x100, %r15d           # imm = 0x100
setb %cl
shll $0x9, %ecx
leal (%rcx,%r15), %r14d
addl $0xfffffe00, %r14d      # imm = 0xFFFFFE00
orl %r15d, %ecx
movl $0xffff, %edx           # imm = 0xFFFF
andl %edx, %r14d
leal (%rax,%rcx), %r13d
addl $0xfffffe00, %r13d      # imm = 0xFFFFFE00
movl %r13d, %ebx
andl %edx, %ebx
leaq 0x1c84(%rip), %rdi      # 0x31c0
movl %r12d, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
cmpl $0x100, %r15d           # imm = 0x100
jae 0x1b18
leaq 0x1b90(%rip), %rdi      # 0x30ec
movl %r14d, %esi
jmp 0x1b27
movl %r15d, %r12d
shrl $0x9, %r12d
andl $0x7, %r12d
andl $0x1ff, %r15d           # imm = 0x1FF
xorl %ecx, %ecx
cmpl $0x100, %r15d           # imm = 0x100
setb %cl
shll $0x9, %ecx
leal (%rcx,%r15), %r14d
addl $0xfffffe00, %r14d      # imm = 0xFFFFFE00
orl %r15d, %ecx
movl $0xffff, %edx           # imm = 0xFFFF
andl %edx, %r14d
leal (%rax,%rcx), %ebx
addl $0xfffffe00, %ebx       # imm = 0xFFFFFE00
andl %edx, %ebx
leaq 0x1bf5(%rip), %rdi      # 0x31a2
movl %r12d, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
cmpl $0x100, %r15d           # imm = 0x100
jae 0x1b68
leaq 0x1b1f(%rip), %rdi      # 0x30ec
movl %r14d, %esi
jmp 0x1b77
btl $0xb, %r15d
jb 0x1bea
shrl $0x6, %r15d
andl $0x7, %r15d
leaq 0x1b50(%rip), %rdi      # 0x313f
movl %r15d, %esi
xorl %eax, %eax
callq 0x1060
movzwl 0x23ac2(%rip), %edx     # 0x250c2
movw %dx, 0x23ab7(%rip)      # 0x250be
leaq 0x1a9c(%rip), %rdi      # 0x30aa
movl $0x7, %esi
xorl %eax, %eax
callq 0x1060
leaq 0x23a8f(%rip), %rax     # 0x250b0
movzwl (%rax,%r15,2), %ebx
jmp 0x166e
shrl $0x6, %r15d
andl $0x7, %r15d
leaq 0x1b7a(%rip), %rdi      # 0x31b1
movl %r15d, %esi
xorl %eax, %eax
callq 0x1060
cmpw $0x7, %r15w
jne 0x1656
leaq 0x1b6a(%rip), %rdi      # 0x31b9
xorl %eax, %eax
callq 0x1060
movl $0xa, %edi
callq 0x1030
movl %r15d, %eax
leaq 0x23a46(%rip), %rcx     # 0x250b0
movzwl (%rcx,%rax,2), %ebx
leaq 0x1a1f(%rip), %rdi      # 0x3094
movl %r15d, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
movw %bx, 0x23a3a(%rip)      # 0x250c2
jmp 0x13e1
movl %r15d, %ebx
shrl $0x9, %ebx
andl $0x7, %ebx
shrl $0x6, %r15d
andl $0x7, %r15d
leaq 0x1ae1(%rip), %rdi      # 0x3186
movl %ebx, %esi
movl %r15d, %edx
xorl %eax, %eax
callq 0x1060
leaq 0x239f8(%rip), %r12     # 0x250b0
movzwl (%r12,%r15,2), %r14d
leaq 0x19d0(%rip), %rdi      # 0x3094
movl %r15d, %esi
movl %r14d, %edx
xorl %eax, %eax
callq 0x1060
xorl $0xffff, %r14d          # imm = 0xFFFF
movw %r14w, (%r12,%rbx,2)
leaq 0x19c6(%rip), %rdi      # 0x30aa
movl %ebx, %esi
jmp 0x1ea0
movl %r15d, %r12d
shrl $0x9, %r12d
andl $0x7, %r12d
andl $0x1ff, %r15d           # imm = 0x1FF
xorl %ecx, %ecx
cmpl $0x100, %r15d           # imm = 0x100
setb %cl
shll $0x9, %ecx
leal (%rcx,%r15), %r14d
addl $0xfffffe00, %r14d      # imm = 0xFFFFFE00
orl %r15d, %ecx
movl $0xffff, %edx           # imm = 0xFFFF
andl %edx, %r14d
leal (%rax,%rcx), %ebx
addl $0xfffffe00, %ebx       # imm = 0xFFFFFE00
andl %edx, %ebx
leaq 0x19e4(%rip), %rdi      # 0x3118
movl %r12d, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
cmpl $0x100, %r15d           # imm = 0x100
jae 0x1c4d
leaq 0x1998(%rip), %rdi      # 0x30ec
movl %r14d, %esi
jmp 0x1c5c
movl %r15d, %r12d
shrl $0x9, %r12d
andl $0x7, %r12d
andl $0x1ff, %r15d           # imm = 0x1FF
xorl %ecx, %ecx
cmpl $0x100, %r15d           # imm = 0x100
setb %cl
shll $0x9, %ecx
leal (%rcx,%r15), %r14d
addl $0xfffffe00, %r14d      # imm = 0xFFFFFE00
orl %r15d, %ecx
movl $0xffff, %edx           # imm = 0xFFFF
andl %edx, %r14d
leal (%rax,%rcx), %ebx
addl $0xfffffe00, %ebx       # imm = 0xFFFFFE00
andl %edx, %ebx
leaq 0x1981(%rip), %rdi      # 0x3126
movl %r12d, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
cmpl $0x100, %r15d           # imm = 0x100
jae 0x1caf
leaq 0x1927(%rip), %rdi      # 0x30ec
movl %r14d, %esi
jmp 0x1cbe
movl %r15d, %r12d
shrl $0x9, %r12d
andl $0x7, %r12d
movl %r15d, %r13d
shrl $0x6, %r13d
andl $0x7, %r13d
andl $0x3f, %r15d
xorl %eax, %eax
cmpw $0x20, %r15w
setb %al
shll $0x6, %eax
addl %r15d, %eax
addl $-0x40, %eax
movzwl %ax, %ebx
leaq 0x196e(%rip), %rdi      # 0x3172
movl %r12d, %esi
movl %r13d, %edx
movl %ebx, %ecx
xorl %eax, %eax
callq 0x1060
cmpw $0x20, %r15w
jae 0x1d03
leaq 0x18c7(%rip), %rdi      # 0x30ec
movl %ebx, %esi
jmp 0x1d11
movl %r15d, %r13d
shrl $0x9, %r13d
andl $0x7, %r13d
movl %r15d, %ebx
shrl $0x6, %ebx
andl $0x7, %ebx
movzwl %r13w, %esi
testb $0x20, %r15b
movl %esi, -0x2c(%rbp)
jne 0x1dc9
andl $0x7, %r15d
movzwl %bx, %edx
movl %edx, -0x30(%rbp)
leaq 0x18a6(%rip), %rdi      # 0x3108
movl %r15d, %ecx
xorl %eax, %eax
callq 0x1060
leaq 0x2383d(%rip), %r14     # 0x250b0
movzwl (%r14,%rbx,2), %r12d
movzwl %r12w, %edx
leaq 0x1811(%rip), %rbx      # 0x3094
movq %rbx, %rdi
movl -0x30(%rbp), %esi
xorl %eax, %eax
callq 0x1060
movq %rbx, %rdi
movl %r15d, %ebx
jmp 0x1e0a
movl %r15d, %r13d
shrl $0x9, %r13d
andl $0x7, %r13d
movl %r15d, %ebx
shrl $0x6, %ebx
andl $0x7, %ebx
movzwl %r13w, %edx
testb $0x20, %r15b
movl %edx, -0x2c(%rbp)
jne 0x1e39
andl $0x7, %r15d
movzwl %bx, %r12d
leaq 0x1839(%rip), %rdi      # 0x3108
movl %edx, %esi
movl %r12d, %edx
movl %r15d, %ecx
xorl %eax, %eax
callq 0x1060
leaq 0x237cb(%rip), %rax     # 0x250b0
movzwl (%rax,%rbx,2), %r14d
movzwl %r14w, %edx
leaq 0x179f(%rip), %rbx      # 0x3094
movq %rbx, %rdi
movl %r12d, %esi
xorl %eax, %eax
callq 0x1060
movq %rbx, %rdi
movl %r15d, %ebx
jmp 0x1e73
movl %r15d, %r13d
shrl $0x9, %r13d
andl $0x7, %r13d
movl %r15d, %ebx
shrl $0x6, %ebx
andl $0x7, %ebx
andl $0x3f, %r15d
xorl %eax, %eax
cmpw $0x20, %r15w
setb %al
shll $0x6, %eax
addl %r15d, %eax
addl $-0x40, %eax
movzwl %ax, %r14d
leaq 0x181b(%rip), %rdi      # 0x315e
movl %r13d, %esi
movl %ebx, %edx
movl %r14d, %ecx
xorl %eax, %eax
callq 0x1060
cmpw $0x20, %r15w
jae 0x1eb7
leaq 0x1788(%rip), %rdi      # 0x30ec
movl %r14d, %esi
jmp 0x1ec6
movl %r15d, %r13d
shrl $0x9, %r13d
andl $0x7, %r13d
andl $0x1ff, %r15d           # imm = 0x1FF
xorl %ecx, %ecx
cmpl $0x100, %r15d           # imm = 0x100
setb %cl
shll $0x9, %ecx
leal (%rcx,%r15), %r14d
addl $0xfffffe00, %r14d      # imm = 0xFFFFFE00
orl %r15d, %ecx
movl $0xffff, %edx           # imm = 0xFFFF
andl %edx, %r14d
leal (%rax,%rcx), %ebx
addl $0xfffffe00, %ebx       # imm = 0xFFFFFE00
andl %edx, %ebx
leaq 0x17de(%rip), %rdi      # 0x3193
movl %r13d, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
cmpl $0x100, %r15d           # imm = 0x100
jae 0x1f2f
leaq 0x1717(%rip), %rdi      # 0x30ec
movl %r14d, %esi
jmp 0x1f3e
leaq 0x36bc(%rip), %r12      # 0x50a0
leaq 0x184e(%rip), %rdi      # 0x3239
callq 0x1040
cmpw $0x0, 0x236c8(%rip)     # 0x250c0
js 0x204d
movzwl 0x236b7(%rip), %ebx     # 0x250bc
leaq 0x1688(%rip), %r15      # 0x3094
movq %r15, %rdi
movl $0x6, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
incl 0x2367d(%rip)           # 0x250a0
movzwl (%r12,%rbx,2), %r14d
leaq 0x1630(%rip), %rdi      # 0x305f
movl %ebx, %esi
movl %r14d, %edx
xorl %eax, %eax
callq 0x1060
movw %r14w, 0x2367f(%rip)    # 0x250c2
incl %ebx
movw %bx, 0x23670(%rip)      # 0x250bc
movl $0xffff, %eax           # imm = 0xFFFF
andl %eax, %ebx
leaq 0x1650(%rip), %r13      # 0x30aa
movq %r13, %rdi
movl $0x6, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
movzwl 0x2364a(%rip), %ebx     # 0x250bc
movq %r15, %rdi
movl $0x6, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
incl 0x23617(%rip)           # 0x250a0
movzwl (%r12,%rbx,2), %r14d
leaq 0x15ca(%rip), %rdi      # 0x305f
movl %ebx, %esi
movl %r14d, %edx
xorl %eax, %eax
callq 0x1060
movw %r14w, 0x23617(%rip)    # 0x250c0
incl %ebx
movw %bx, 0x2360a(%rip)      # 0x250bc
movl $0xffff, %eax           # imm = 0xFFFF
andl %eax, %ebx
movq %r13, %rdi
movl $0x6, %esi
movl %ebx, %edx
jmp 0x1d7a
movzbl %r15b, %ebx
leaq 0x16fc(%rip), %rdi      # 0x31cf
movl %ebx, %esi
xorl %eax, %eax
callq 0x1060
cmpb $0x67, %r15b
je 0x1fc0
movzbl %r15b, %eax
cmpl $0x25, %eax
je 0x2027
movzwl 0x235c8(%rip), %eax     # 0x250c2
movw %ax, 0x235bd(%rip)      # 0x250be
leaq 0x3598(%rip), %rax      # 0x50a0
movzwl (%rax,%rbx,2), %eax
movw %ax, 0x235af(%rip)      # 0x250c2
jmp 0x13e1
movl $0x10000, %esi          # imm = 0x10000
subl %r14d, %esi
leaq 0x15be(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
movl $0xa, %edi
callq 0x1030
movl %r12d, %eax
leaq 0x2356e(%rip), %rcx     # 0x250b0
movw %r13w, (%rcx,%rax,2)
leaq 0x155c(%rip), %rdi      # 0x30aa
movl %r12d, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
movzwl %r13w, %edi
callq 0x1394
jmp 0x13e1
movl $0x10000, %esi          # imm = 0x10000
subl %r14d, %esi
leaq 0x156e(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
leaq 0x150f(%rip), %r15      # 0x3094
movl $0xa, %edi
callq 0x1030
movl %r12d, %eax
leaq 0x23517(%rip), %rcx     # 0x250b0
movzwl (%rcx,%rax,2), %r14d
movq %r15, %rdi
movl %r12d, %esi
movl %r14d, %edx
xorl %eax, %eax
callq 0x1060
incl 0x234ec(%rip)           # 0x250a0
movl %ebx, %eax
leaq 0x34e3(%rip), %r12      # 0x50a0
movzwl (%r12,%rax,2), %r15d
leaq 0x1496(%rip), %rdi      # 0x305f
movl %ebx, %esi
movl %r15d, %edx
xorl %eax, %eax
callq 0x1060
incl 0x234c9(%rip)           # 0x250a4
leaq 0x1497(%rip), %rdi      # 0x3079
movl %r15d, %esi
jmp 0x1d77
andl $0x7ff, %r15d           # imm = 0x7FF
xorl %ecx, %ecx
cmpl $0x400, %r15d           # imm = 0x400
setb %cl
shll $0xb, %ecx
leal (%rcx,%r15), %ebx
addl $0xfffff800, %ebx       # imm = 0xFFFFF800
orl %r15d, %ecx
movl $0xffff, %edx           # imm = 0xFFFF
andl %edx, %ebx
leal (%rax,%rcx), %r14d
addl $0xfffff800, %r14d      # imm = 0xFFFFF800
movl %r14d, %esi
andl %edx, %esi
leaq 0x1509(%rip), %rdi      # 0x3134
xorl %eax, %eax
callq 0x1060
cmpl $0x400, %r15d           # imm = 0x400
jae 0x1fda
leaq 0x14a6(%rip), %rdi      # 0x30ec
movl %ebx, %esi
jmp 0x1fe8
movl $0x10000, %esi          # imm = 0x10000
subl %r14d, %esi
leaq 0x1489(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
movl $0xa, %edi
callq 0x1030
incl 0x2342d(%rip)           # 0x250a0
movl %ebx, %eax
leaq 0x3424(%rip), %rcx      # 0x50a0
movzwl (%rcx,%rax,2), %r14d
leaq 0x13d7(%rip), %rdi      # 0x305f
movl %ebx, %esi
movl %r14d, %edx
xorl %eax, %eax
callq 0x1060
leaq 0x23415(%rip), %rax     # 0x250b0
movw %r14w, (%rax,%r12,2)
leaq 0x1403(%rip), %rdi      # 0x30aa
movl %r12d, %esi
jmp 0x1ea0
movl $0x10000, %esi          # imm = 0x10000
subl %r14d, %esi
leaq 0x1427(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
leaq 0x13c8(%rip), %r15      # 0x3094
movl $0xa, %edi
callq 0x1030
leaq 0x233d3(%rip), %rax     # 0x250b0
movzwl (%rax,%r12,2), %r14d
movq %r15, %rdi
movl %r12d, %esi
movl %r14d, %edx
xorl %eax, %eax
callq 0x1060
incl 0x233ac(%rip)           # 0x250a4
leaq 0x137a(%rip), %rdi      # 0x3079
movl %ebx, %esi
jmp 0x1d77
movl $0x10000, %esi          # imm = 0x10000
subl %ebx, %esi
leaq 0x13d4(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
leaq 0x23391(%rip), %r14     # 0x250b0
movl $0xa, %edi
callq 0x1030
movl %r13d, %eax
movq %r14, %r15
movzwl (%r14,%rax,2), %r14d
leaq 0x1359(%rip), %rdi      # 0x3094
movl %r13d, %esi
movl %r14d, %edx
xorl %eax, %eax
callq 0x1060
addl %r14d, %ebx
movl %r12d, %eax
movzwl (%r15,%rax,2), %r14d
leaq 0x133a(%rip), %rdi      # 0x3094
movl %r12d, %esi
movl %r14d, %edx
xorl %eax, %eax
callq 0x1060
incl 0x23337(%rip)           # 0x250a4
movzwl %bx, %esi
leaq 0x1302(%rip), %rdi      # 0x3079
movl %r14d, %edx
xorl %eax, %eax
callq 0x1060
jmp 0x13e1
movl $0x10000, %eax          # imm = 0x10000
subl %esi, %eax
leaq 0x1351(%rip), %rdi      # 0x30e5
movl %eax, %esi
xorl %eax, %eax
callq 0x1060
movl $0xa, %edi
callq 0x1030
shrl $0x9, %r15d
andw 0x2330d(%rip), %r15w    # 0x250c0
testb $0x7, %r15b
je 0x13e1
addw %bx, 0x232fe(%rip)      # 0x250c2
jmp 0x13e1
andl $0x1f, %r15d
xorl %eax, %eax
cmpw $0x10, %r15w
setb %al
shll $0x5, %eax
leal (%rax,%r15), %r12d
addl $-0x20, %r12d
movzwl %r12w, %ecx
leaq 0x1306(%rip), %rdi      # 0x30f3
movl %r13d, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
movl %ebx, %r15d
leaq 0x232ad(%rip), %r14     # 0x250b0
leaq 0x128a(%rip), %rdi      # 0x3094
movzwl %bx, %eax
movzwl (%r14,%rax,2), %ebx
movl %r15d, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
addl %ebx, %r12d
movw %r12w, (%r14,%r13,2)
movzwl %r12w, %ebx
leaq 0x1279(%rip), %rdi      # 0x30aa
movl -0x2c(%rbp), %esi
jmp 0x1fab
andl $0x1f, %r15d
xorl %eax, %eax
cmpw $0x10, %r15w
setb %al
shll $0x5, %eax
leal (%rax,%r15), %r14d
addl $-0x20, %r14d
movzwl %r14w, %ecx
leaq 0x12ec(%rip), %rdi      # 0x3149
movl %r13d, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
movl %ebx, %r15d
leaq 0x1221(%rip), %rdi      # 0x3094
movzwl %bx, %eax
leaq 0x23233(%rip), %r12     # 0x250b0
movzwl (%r12,%rax,2), %ebx
movl %r15d, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
andl %ebx, %r14d
movw %r14w, (%r12,%r13,2)
leaq 0x120d(%rip), %rdi      # 0x30aa
movl -0x2c(%rbp), %esi
movl %r14d, %edx
xorl %eax, %eax
callq 0x1060
movl %r14d, %edi
callq 0x1394
jmp 0x13e1
movl $0x10000, %esi          # imm = 0x10000
subl %r14d, %esi
leaq 0x121f(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
movl $0xa, %edi
callq 0x1030
leaq 0x231d2(%rip), %r12     # 0x250b0
movzwl (%r12,%rbx,2), %r15d
leaq 0x11aa(%rip), %rdi      # 0x3094
movl %ebx, %esi
movl %r15d, %edx
xorl %eax, %eax
callq 0x1060
incl 0x231a4(%rip)           # 0x250a0
addl %r15d, %r14d
movzwl %r14w, %esi
leaq 0x3196(%rip), %rax      # 0x50a0
movzwl (%rax,%rsi,2), %ebx
leaq 0x114a(%rip), %rdi      # 0x305f
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
movw %bx, (%r12,%r13,2)
leaq 0x1180(%rip), %rdi      # 0x30aa
movl %r13d, %esi
jmp 0x1fab
movl $0x10000, %esi          # imm = 0x10000
subl %r14d, %esi
leaq 0x11a7(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
movl $0xa, %edi
callq 0x1030
incl 0x2314b(%rip)           # 0x250a0
movl %ebx, %eax
leaq 0x3142(%rip), %r12      # 0x50a0
movzwl (%r12,%rax,2), %r14d
leaq 0x10f5(%rip), %r15      # 0x305f
movq %r15, %rdi
movl %ebx, %esi
movl %r14d, %edx
xorl %eax, %eax
callq 0x1060
incl 0x23121(%rip)           # 0x250a0
movzwl (%r12,%r14,2), %ebx
movq %r15, %rdi
movl %r14d, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
movl %r13d, %eax
leaq 0x23113(%rip), %rcx     # 0x250b0
movw %bx, (%rcx,%rax,2)
leaq 0x1102(%rip), %rdi      # 0x30aa
movl %r13d, %esi
movl %ebx, %edx
xorl %eax, %eax
callq 0x1060
movl %ebx, %edi
callq 0x1394
jmp 0x13e1
movzwl 0x230e9(%rip), %esi     # 0x250b0
leaq 0x120e(%rip), %rdi      # 0x31dc
xorl %eax, %eax
callq 0x1060
jmp 0x13e1
movl $0x10000, %esi          # imm = 0x10000
subl %ebx, %esi
leaq 0x10fd(%rip), %rdi      # 0x30e5
xorl %eax, %eax
callq 0x1060
movl $0xa, %edi
callq 0x1030
movzwl 0x230c2(%rip), %edx     # 0x250c2
movw %dx, 0x230b7(%rip)      # 0x250be
leaq 0x109c(%rip), %rdi      # 0x30aa
movl $0x7, %esi
xorl %eax, %eax
callq 0x1060
movw %r14w, 0x230a0(%rip)    # 0x250c2
jmp 0x13e1
leaq 0x11f0(%rip), %rdi      # 0x321e
callq 0x1040
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0x11d8(%rip), %rdi      # 0x3223
jmp 0x2054
leaq 0x11e9(%rip), %rdi      # 0x323d
callq 0x1040
movl $0x1, %edi
callq 0x10c0