// File: /workspace/github_c_makefile_star2_O0/buptlxb[P]xRay/disasm/instr_set/opcodes_FPU.c
// Function: D8_
void __bea_callspec__ D8_(PDISASM pMyDisasm)
{
    long MyMODRM;
    char (*pRegistersFPU)[8][8] ;

    GV.DECALAGE_EIP = 0;
    if (!Security(1, pMyDisasm)) {return;}
    MyMODRM = *((UInt8*)(UIntPtr) (GV.EIP_+1));
    pRegistersFPU = &RegistersFPU_Masm;
    if (GV.SYNTAX_ == NasmSyntax) {
        pRegistersFPU = &RegistersFPU_Nasm;
    }
    if (MyMODRM <= 0xbf) {
        GV.MemDecoration = Arg2dword;
        GV.REGOPCODE = ((*((UInt8*)(UIntPtr) (GV.EIP_+1))) >> 3) & 0x7;
        if (GV.REGOPCODE == 0) {
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fadd ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else if (GV.REGOPCODE == 1) {
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fmul ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else if (GV.REGOPCODE == 2) {
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+COMPARISON_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fcom ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
            (*pMyDisasm).Argument1.AccessMode = READ;
        }
        else if (GV.REGOPCODE == 3) {
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+COMPARISON_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fcomp ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
            (*pMyDisasm).Argument1.AccessMode = READ;
        }
        else if (GV.REGOPCODE == 4) {
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fsub ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else if (GV.REGOPCODE == 5) {
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fsubr ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else if (GV.REGOPCODE == 6) {
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fdiv ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else if (GV.REGOPCODE == 7) {
            MOD_RM(&(*pMyDisasm).Argument2, pMyDisasm);
            (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fdivr ");
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REG0;
            (*pMyDisasm).Argument1.ArgSize = 80;
        }
        else {
            FailDecode(pMyDisasm);
        }
    }
    else {
        if ((MyMODRM & 0xf0) == 0xc0) {
            if (((MyMODRM & 0xf) >=0) && ((MyMODRM & 0xf) <=7)) {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fadd ");
                #endif
            }
            else {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fmul ");
                #endif
            }
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Argument1.ArgMnemonic, (*pRegistersFPU)[0]);
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REGS[0];
            (*pMyDisasm).Argument1.ArgSize = 80;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Argument2.ArgMnemonic, (*pRegistersFPU)[(MyMODRM & 0xf)%8]);
            #endif
            (*pMyDisasm).Argument2.ArgType = REGISTER_TYPE+FPU_REG+REGS[(MyMODRM & 0xf)%8];
            (*pMyDisasm).Argument2.ArgSize = 80;
        }
        else if ((MyMODRM & 0xf0) == 0xd0) {
            if (((MyMODRM & 0xf) >=0) && ((MyMODRM & 0xf) <=7)) {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+COMPARISON_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fcom ");
                #endif
            }
            else {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+COMPARISON_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fcomp ");
                #endif
            }
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Argument1.ArgMnemonic, (*pRegistersFPU)[0]);
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REGS[0];
            (*pMyDisasm).Argument1.ArgSize = 80;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Argument2.ArgMnemonic, (*pRegistersFPU)[(MyMODRM & 0xf)%8]);
            #endif
            (*pMyDisasm).Argument2.ArgType = REGISTER_TYPE+FPU_REG+REGS[(MyMODRM & 0xf)%8];
            (*pMyDisasm).Argument2.ArgSize = 80;
        }
        else if ((MyMODRM & 0xf0) == 0xe0) {
            if (((MyMODRM & 0xf) >=0) && ((MyMODRM & 0xf) <=7)) {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fsub ");
                #endif
            }
            else {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fsubr ");
                #endif
            }
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Argument1.ArgMnemonic, (*pRegistersFPU)[0]);
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REGS[0];
            (*pMyDisasm).Argument1.ArgSize = 80;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Argument2.ArgMnemonic, (*pRegistersFPU)[(MyMODRM & 0xf)%8]);
            #endif
            (*pMyDisasm).Argument2.ArgType = REGISTER_TYPE+FPU_REG+REGS[(MyMODRM & 0xf)%8];
            (*pMyDisasm).Argument2.ArgSize = 80;
        }
        else if ((MyMODRM & 0xf0) == 0xf0) {
            if (((MyMODRM & 0xf) >=0) && ((MyMODRM & 0xf) <=7)) {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fdiv ");
                #endif
            }
            else {
                (*pMyDisasm).Instruction.Category = FPU_INSTRUCTION+ARITHMETIC_INSTRUCTION;
                #ifndef BEA_LIGHT_DISASSEMBLY
                   (void) strcpy ((*pMyDisasm).Instruction.Mnemonic, "fdivr ");
                #endif
            }
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Argument1.ArgMnemonic, (*pRegistersFPU)[0]);
            #endif
            (*pMyDisasm).Argument1.ArgType = REGISTER_TYPE+FPU_REG+REGS[0];
            (*pMyDisasm).Argument1.ArgSize = 80;
            #ifndef BEA_LIGHT_DISASSEMBLY
               (void) strcpy ((*pMyDisasm).Argument2.ArgMnemonic, (*pRegistersFPU)[(MyMODRM & 0xf)%8]);
            #endif
            (*pMyDisasm).Argument2.ArgType = REGISTER_TYPE+FPU_REG+REGS[(MyMODRM & 0xf)%8];
            (*pMyDisasm).Argument2.ArgSize = 80;
        }
    }
    GV.EIP_ += GV.DECALAGE_EIP+2;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x20, %rsp
movq %rdi, -0x8(%rbp)
movq -0x8(%rbp), %rax
movl $0x0, 0x244(%rax)
movq -0x8(%rbp), %rsi
movl $0x1, %edi
callq 0x4d340
cmpl $0x0, %eax
jne 0x27302
jmp 0x27b6e
movq -0x8(%rbp), %rax
movq 0x1f0(%rax), %rax
movzbl 0x1(%rax), %eax
movq %rax, -0x10(%rbp)
leaq 0x3b6e4(%rip), %rax     # 0x62a00
movq %rax, -0x18(%rbp)
movq -0x8(%rbp), %rax
cmpl $0x200, 0x24c(%rax)     # imm = 0x200
jne 0x2733b
leaq 0x3b709(%rip), %rax     # 0x62a40
movq %rax, -0x18(%rbp)
cmpq $0xbf, -0x10(%rbp)
jg 0x276d0
movq -0x8(%rbp), %rax
movl $0x67, 0x210(%rax)
movq -0x8(%rbp), %rax
movq 0x1f0(%rax), %rax
movzbl 0x1(%rax), %ecx
sarl $0x3, %ecx
andl $0x7, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x240(%rax)
movq -0x8(%rbp), %rax
cmpl $0x0, 0x240(%rax)
jne 0x273db
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a71f(%rip), %rsi     # 0x51ad4
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x276cb
movq -0x8(%rbp), %rax
cmpl $0x1, 0x240(%rax)
jne 0x27440
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a6c0(%rip), %rsi     # 0x51ada
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x276c9
movq -0x8(%rbp), %rax
cmpl $0x2, 0x240(%rax)
jne 0x274b3
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x2000d, 0x60(%rax)    # imm = 0x2000D
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a661(%rip), %rsi     # 0x51ae0
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
movq -0x8(%rbp), %rax
movl $0x1, 0xe8(%rax)
jmp 0x276c7
movq -0x8(%rbp), %rax
cmpl $0x3, 0x240(%rax)
jne 0x27526
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x2000d, 0x60(%rax)    # imm = 0x2000D
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a5f4(%rip), %rsi     # 0x51ae6
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
movq -0x8(%rbp), %rax
movl $0x1, 0xe8(%rax)
jmp 0x276c5
movq -0x8(%rbp), %rax
cmpl $0x4, 0x240(%rax)
jne 0x2758b
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a588(%rip), %rsi     # 0x51aed
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x276c3
movq -0x8(%rbp), %rax
cmpl $0x5, 0x240(%rax)
jne 0x275f0
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a529(%rip), %rsi     # 0x51af3
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x276c1
movq -0x8(%rbp), %rax
cmpl $0x6, 0x240(%rax)
jne 0x27652
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a4cb(%rip), %rsi     # 0x51afa
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x276bf
movq -0x8(%rbp), %rax
cmpl $0x7, 0x240(%rax)
jne 0x276b4
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x8(%rbp), %rsi
callq 0x4dbc0
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a46f(%rip), %rsi     # 0x51b00
callq 0x81c0
movq -0x8(%rbp), %rax
movl $0x20040001, 0xdc(%rax) # imm = 0x20040001
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
jmp 0x276bd
movq -0x8(%rbp), %rdi
callq 0x30050
jmp 0x276bf
jmp 0x276c1
jmp 0x276c3
jmp 0x276c5
jmp 0x276c7
jmp 0x276c9
jmp 0x276cb
jmp 0x27b4b
movq -0x10(%rbp), %rax
andq $0xf0, %rax
cmpq $0xc0, %rax
jne 0x277ee
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x0, %rax
jl 0x27727
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x7, %rax
jg 0x27727
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a3b4(%rip), %rsi     # 0x51ad4
callq 0x81c0
jmp 0x2774a
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a395(%rip), %rsi     # 0x51ada
callq 0x81c0
movq -0x8(%rbp), %rdi
addq $0x9c, %rdi
movq -0x18(%rbp), %rsi
callq 0x81c0
movl 0x3b73c(%rip), %ecx     # 0x62ea0
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0xdc(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x18(%rbp), %rsi
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
shlq $0x3, %rdx
addq %rdx, %rsi
callq 0x81c0
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
leaq 0x3b6d8(%rip), %rax     # 0x62ea0
movl (%rax,%rdx,4), %ecx
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0x144(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0x148(%rax)
jmp 0x27b49
movq -0x10(%rbp), %rax
andq $0xf0, %rax
cmpq $0xd0, %rax
jne 0x2790c
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x0, %rax
jl 0x27845
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x7, %rax
jg 0x27845
movq -0x8(%rbp), %rax
movl $0x2000d, 0x60(%rax)    # imm = 0x2000D
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a2a2(%rip), %rsi     # 0x51ae0
callq 0x81c0
jmp 0x27868
movq -0x8(%rbp), %rax
movl $0x2000d, 0x60(%rax)    # imm = 0x2000D
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a283(%rip), %rsi     # 0x51ae6
callq 0x81c0
movq -0x8(%rbp), %rdi
addq $0x9c, %rdi
movq -0x18(%rbp), %rsi
callq 0x81c0
movl 0x3b61e(%rip), %ecx     # 0x62ea0
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0xdc(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x18(%rbp), %rsi
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
shlq $0x3, %rdx
addq %rdx, %rsi
callq 0x81c0
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
leaq 0x3b5ba(%rip), %rax     # 0x62ea0
movl (%rax,%rdx,4), %ecx
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0x144(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0x148(%rax)
jmp 0x27b47
movq -0x10(%rbp), %rax
andq $0xf0, %rax
cmpq $0xe0, %rax
jne 0x27a2a
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x0, %rax
jl 0x27963
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x7, %rax
jg 0x27963
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a191(%rip), %rsi     # 0x51aed
callq 0x81c0
jmp 0x27986
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a172(%rip), %rsi     # 0x51af3
callq 0x81c0
movq -0x8(%rbp), %rdi
addq $0x9c, %rdi
movq -0x18(%rbp), %rsi
callq 0x81c0
movl 0x3b500(%rip), %ecx     # 0x62ea0
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0xdc(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x18(%rbp), %rsi
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
shlq $0x3, %rdx
addq %rdx, %rsi
callq 0x81c0
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
leaq 0x3b49c(%rip), %rax     # 0x62ea0
movl (%rax,%rdx,4), %ecx
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0x144(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0x148(%rax)
jmp 0x27b45
movq -0x10(%rbp), %rax
andq $0xf0, %rax
cmpq $0xf0, %rax
jne 0x27b43
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x0, %rax
jl 0x27a81
movq -0x10(%rbp), %rax
andq $0xf, %rax
cmpq $0x7, %rax
jg 0x27a81
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a080(%rip), %rsi     # 0x51afa
callq 0x81c0
jmp 0x27aa4
movq -0x8(%rbp), %rax
movl $0x20002, 0x60(%rax)    # imm = 0x20002
movq -0x8(%rbp), %rdi
addq $0x60, %rdi
addq $0x8, %rdi
leaq 0x2a061(%rip), %rsi     # 0x51b00
callq 0x81c0
movq -0x8(%rbp), %rdi
addq $0x9c, %rdi
movq -0x18(%rbp), %rsi
callq 0x81c0
movl 0x3b3e2(%rip), %ecx     # 0x62ea0
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0xdc(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0xe0(%rax)
movq -0x8(%rbp), %rdi
addq $0x104, %rdi            # imm = 0x104
movq -0x18(%rbp), %rsi
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
shlq $0x3, %rdx
addq %rdx, %rsi
callq 0x81c0
movq -0x10(%rbp), %rax
andq $0xf, %rax
movl $0x8, %ecx
cqto
idivq %rcx
leaq 0x3b37e(%rip), %rax     # 0x62ea0
movl (%rax,%rdx,4), %ecx
addl $0x20040000, %ecx       # imm = 0x20040000
movq -0x8(%rbp), %rax
movl %ecx, 0x144(%rax)
movq -0x8(%rbp), %rax
movl $0x50, 0x148(%rax)
jmp 0x27b45
jmp 0x27b47
jmp 0x27b49
jmp 0x27b4b
movq -0x8(%rbp), %rax
movl 0x244(%rax), %eax
addl $0x2, %eax
movl %eax, %eax
movl %eax, %ecx
movq -0x8(%rbp), %rax
addq 0x1f0(%rax), %rcx
movq %rcx, 0x1f0(%rax)
addq $0x20, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)