// File: /workspace/github_c_makefile_star2_O2/samtools[P]htslib/htscodecs/htscodecs/rANS_static32x16pr_avx512.c
// Function: rans_compress_O0_32x16_avx512
unsigned char *rans_compress_O0_32x16_avx512(unsigned char *in,
                                             unsigned int in_size,
                                             unsigned char *out,
                                             unsigned int *out_size) {
    unsigned char *cp, *out_end;
    RansEncSymbol syms[256];
    RansState ransN[32] __attribute__((aligned(64)));
    uint8_t* ptr;
    uint32_t F[256+MAGIC] = {0};
    int i, j, tab_size = 0, x, z;
    // -20 for order/size/meta
    uint32_t bound = rans_compress_bound_4x16(in_size,0)-20;

    if (!out) {
        *out_size = bound;
        out = malloc(*out_size);
    }
    if (!out || bound > *out_size)
        return NULL;

    // If "out" isn't word aligned, tweak out_end/ptr to ensure it is.
    // We already added more round in bound to allow for this.
    if (((size_t)out)&1)
        bound--;
    ptr = out_end = out + bound;

    if (in_size == 0)
        goto empty;

    // Compute statistics
    if (hist8(in, in_size, F) < 0)
        return NULL;

    // Normalise so frequences sum to power of 2
    uint32_t fsum = in_size;
    uint32_t max_val = round2(fsum);
    if (max_val > TOTFREQ)
        max_val = TOTFREQ;

    if (normalise_freq(F, fsum, max_val) < 0)
        return NULL;
    fsum=max_val;

    cp = out;
    cp += encode_freq(cp, F);
    tab_size = cp-out;
    //write(2, out+4, cp-(out+4));

    if (normalise_freq(F, fsum, TOTFREQ) < 0)
        return NULL;

    // Encode statistics and build lookup tables for SIMD encoding.
    uint32_t SB[256], SA[256], SD[256], SC[256];
    for (x = j = 0; j < 256; j++) {
        if (F[j]) {
            RansEncSymbolInit(&syms[j], x, F[j], TF_SHIFT);
            SB[j] = syms[j].x_max;
            SA[j] = syms[j].rcp_freq;
            SD[j] = (syms[j].cmpl_freq<<0) | ((syms[j].rcp_shift-32)<<16);
            SC[j] = syms[j].bias;
            x += F[j];
        }
    }

    for (z = 0; z < 32; z++)
      RansEncInit(&ransN[z]);

    z = i = in_size&(32-1);
    while (z-- > 0)
      RansEncPutSymbol(&ransN[z], &ptr, &syms[in[in_size-(i-z)]]);

#define LOAD512(a,b)                                     \
    __m512i a##1 = _mm512_load_si512((__m512i *)&b[0]); \
    __m512i a##2 = _mm512_load_si512((__m512i *)&b[16]);

#define STORE512(a,b)                           \
    _mm512_store_si512((__m256i *)&b[0], a##1); \
    _mm512_store_si512((__m256i *)&b[16], a##2);

    LOAD512(Rv, ransN);

    uint16_t *ptr16 = (uint16_t *)ptr;
    for (i=(in_size &~(32-1)); i>0; i-=32) {
        uint8_t *c = &in[i-32];

        // GATHER versions
        // Much faster now we have an efficient loadu mechanism in place,
        // BUT...
        // Try this for avx2 variant too?  Better way to populate the mm256
        // regs for mix of avx2 and avx512 opcodes.
        __m256i c12 = _mm256_loadu_si256((__m256i const *)c);
        __m512i c1 = _mm512_cvtepu8_epi32(_mm256_extracti128_si256(c12,0));
        __m512i c2 = _mm512_cvtepu8_epi32(_mm256_extracti128_si256(c12,1));
#define SET512(a,b) \
        __m512i a##1 = _mm512_i32gather_epi32x(c1, b, 4); \
        __m512i a##2 = _mm512_i32gather_epi32x(c2, b, 4)

        SET512(xmax, SB);

        uint16_t gt_mask1 = _mm512_cmpgt_epi32_mask(Rv1, xmax1);
        int pc1 = _mm_popcnt_u32(gt_mask1);
        __m512i Rp1 = _mm512_and_si512(Rv1, _mm512_set1_epi32(0xffff));
        __m512i Rp2 = _mm512_and_si512(Rv2, _mm512_set1_epi32(0xffff));
        uint16_t gt_mask2 = _mm512_cmpgt_epi32_mask(Rv2, xmax2);
        SET512(SDv,  SD);
        int pc2 = _mm_popcnt_u32(gt_mask2);

        Rp1 = _mm512_maskz_compress_epi32(gt_mask1, Rp1);
        Rp2 = _mm512_maskz_compress_epi32(gt_mask2, Rp2);

        _mm512_mask_cvtepi32_storeu_epi16(ptr16-pc2, (1<<pc2)-1, Rp2);
        ptr16 -= pc2;
        _mm512_mask_cvtepi32_storeu_epi16(ptr16-pc1, (1<<pc1)-1, Rp1);
        ptr16 -= pc1;

        SET512(rfv,  SA);
        Rv1 = _mm512_mask_srli_epi32(Rv1, gt_mask1, Rv1, 16);
        Rv2 = _mm512_mask_srli_epi32(Rv2, gt_mask2, Rv2, 16);

        // interleaved form of this, helps on icc a bit
        //rfv1 = _mm512_mulhi_epu32(Rv1, rfv1);
        //rfv2 = _mm512_mulhi_epu32(Rv2, rfv2);

        // Alternatives here:
        // SHIFT right/left instead of AND: (very marginally slower)
        //   rf1_hm = _mm512_and_epi32(
        //           rf1_hm, _mm512_set1_epi64((uint64_t)0xffffffff00000000));
        // vs
        //   rf1_hm = _mm512_srli_epi64(rf1_hm, 32);
        //   rf1_hm = _mm512_slli_epi64(rf1_hm, 32);
        __m512i rf1_hm = _mm512_mul_epu32(_mm512_srli_epi64(Rv1,  32),
                                          _mm512_srli_epi64(rfv1, 32));
        __m512i rf2_hm = _mm512_mul_epu32(_mm512_srli_epi64(Rv2,  32),
                                          _mm512_srli_epi64(rfv2, 32));
        __m512i rf1_lm = _mm512_srli_epi64(_mm512_mul_epu32(Rv1, rfv1), 32);
        __m512i rf2_lm = _mm512_srli_epi64(_mm512_mul_epu32(Rv2, rfv2), 32);
        rf1_hm = _mm512_and_epi32(rf1_hm,
                                  _mm512_set1_epi64((uint64_t)0xffffffff<<32));
        rf2_hm = _mm512_and_epi32(rf2_hm,
                                  _mm512_set1_epi64((uint64_t)0xffffffff<<32));
        rfv1 = _mm512_or_epi32(rf1_lm, rf1_hm);
        rfv2 = _mm512_or_epi32(rf2_lm, rf2_hm);

        // Or a pure masked blend approach, sadly slower.
        // rfv1 = _mm512_mask_blend_epi32(0x5555,
        //            _mm512_mul_epu32(
        //                _mm512_srli_epi64(Rv1, 32),
        //                _mm512_srli_epi64(rfv1, 32)),
        //            _mm512_srli_epi64(
        //                _mm512_mul_epu32(Rv1, rfv1),
        //                32));
        // rfv2 = _mm512_mask_blend_epi32(0xaaaa,
        //            _mm512_srli_epi64(
        //                _mm512_mul_epu32(Rv2, rfv2),
        //                32),
        //            _mm512_mul_epu32(
        //                _mm512_srli_epi64(Rv2, 32),
        //                _mm512_srli_epi64(rfv2, 32)));

        SET512(biasv, SC);
        __m512i shiftv1 = _mm512_srli_epi32(SDv1, 16);
        __m512i shiftv2 = _mm512_srli_epi32(SDv2, 16);

        __m512i qv1 = _mm512_srlv_epi32(rfv1, shiftv1);
        __m512i qv2 = _mm512_srlv_epi32(rfv2, shiftv2);

        qv1 = _mm512_mullo_epi32(qv1,
                  _mm512_and_si512(SDv1,_mm512_set1_epi32(0xffff)));
        qv1 = _mm512_add_epi32(qv1, biasv1);
        Rv1 = _mm512_add_epi32(Rv1, qv1);

        qv2 = _mm512_mullo_epi32(qv2,
                  _mm512_and_si512(SDv2, _mm512_set1_epi32(0xffff)));
        qv2 = _mm512_add_epi32(qv2, biasv2);
        Rv2 = _mm512_add_epi32(Rv2, qv2);
    }
    ptr = (uint8_t *)ptr16;
    STORE512(Rv, ransN);

    for (z = 32-1; z >= 0; z--)
        RansEncFlush(&ransN[z], &ptr);

 empty:
    // Finalise block size and return it
    *out_size = (out_end - ptr) + tab_size;

    memmove(out + tab_size, ptr, out_end-ptr);

    return out;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
andq $-0x40, %rsp
subq $0x2f40, %rsp           # imm = 0x2F40
movq %rcx, %r13
movq %rdx, %r15
movl %esi, %ebx
movq %rdi, %r12
leaq 0x2a0(%rsp), %rdi
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
movq %rbx, 0x40(%rsp)
movl %ebx, %edi
xorl %esi, %esi
callq 0x4edbc
leal -0x14(%rax), %ebx
testq %r15, %r15
je 0x566f0
cmpl (%r13), %ebx
jbe 0x5670d
jmp 0x56a89
movl %ebx, (%r13)
movl %ebx, %edi
movq %rax, %r14
callq 0x4680
movq %rax, %r15
movq %r14, %rax
testq %r15, %r15
je 0x56a89
movq %r13, 0x38(%rsp)
addl $-0x15, %eax
testb $0x1, %r15b
cmovel %ebx, %eax
addq %r15, %rax
movq %rax, 0x28(%rsp)
movq 0x40(%rsp), %r13
testl %r13d, %r13d
je 0x56820
movq %rax, 0x30(%rsp)
movl %r13d, %ebx
cmpl $0x7a121, %r13d         # imm = 0x7A121
jb 0x5682f
pushq $0x4
popq %rsi
movl $0x3006f, %edi          # imm = 0x3006F
callq 0x6426c
testq %rax, %rax
je 0x56a89
movq 0x40(%rsp), %rdx
andl $-0x10, %edx
xorl %ecx, %ecx
cmpq %rdx, %rcx
jae 0x567e0
movzwl (%r12,%rcx), %esi
movzwl 0x2(%r12,%rcx), %edi
movzwl 0x4(%r12,%rcx), %r8d
movzwl 0x6(%r12,%rcx), %r9d
incl (%rax,%rsi,4)
incl 0x40094(%rax,%rdi,4)
incl 0x80128(%rax,%r8,4)
incl (%rax,%r9,4)
movzwl 0x8(%r12,%rcx), %esi
movzwl 0xa(%r12,%rcx), %edi
movzwl 0xc(%r12,%rcx), %r8d
movzwl 0xe(%r12,%rcx), %r9d
incl 0x40094(%rax,%rsi,4)
incl (%rax,%rdi,4)
incl 0x40094(%rax,%r8,4)
incl 0x80128(%rax,%r9,4)
addq $0x10, %rcx
jmp 0x56767
movzbl (%r12,%rcx), %edx
incq %rcx
incl 0x2a0(%rsp,%rdx,4)
cmpq %rbx, %rcx
jb 0x567d1
xorl %ecx, %ecx
cmpq $0x10000, %rcx          # imm = 0x10000
je 0x56927
movl 0x40094(%rax,%rcx,4), %edx
addl (%rax,%rcx,4), %edx
addl 0x80128(%rax,%rcx,4), %edx
movzbl %cl, %esi
addl %edx, 0x2a0(%rsp,%rsi,4)
movl %ecx, %esi
shrl $0x8, %esi
addl %edx, 0x2a0(%rsp,%rsi,4)
incq %rcx
jmp 0x567e7
movq %r15, 0x20(%rsp)
xorl %edx, %edx
movq %rax, %r13
jmp 0x56e2f
leaq 0xf00(%rsp), %rdi
xorl %r14d, %r14d
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
leaq 0x6c0(%rsp), %rdi
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
leaq 0xae0(%rsp), %rdi
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
movl %r13d, %eax
andl $0x7fff8, %eax          # imm = 0x7FFF8
cmpq %rax, %r14
jae 0x568f7
movzbl (%r12,%r14), %ecx
incl 0x2a0(%rsp,%rcx,4)
movzbl 0x1(%r12,%r14), %ecx
incl 0xf00(%rsp,%rcx,4)
movzbl 0x2(%r12,%r14), %ecx
incl 0x6c0(%rsp,%rcx,4)
movzbl 0x3(%r12,%r14), %ecx
incl 0xae0(%rsp,%rcx,4)
movzbl 0x4(%r12,%r14), %ecx
incl 0x2a0(%rsp,%rcx,4)
movzbl 0x5(%r12,%r14), %ecx
incl 0xf00(%rsp,%rcx,4)
movzbl 0x6(%r12,%r14), %ecx
incl 0x6c0(%rsp,%rcx,4)
movzbl 0x7(%r12,%r14), %ecx
incl 0xae0(%rsp,%rcx,4)
addq $0x8, %r14
jmp 0x56876
movzbl (%r12,%r14), %eax
incq %r14
incl 0x2a0(%rsp,%rax,4)
cmpq %rbx, %r14
jb 0x568e8
xorl %eax, %eax
cmpq $0x100, %rax            # imm = 0x100
je 0x5692f
movl 0x6c0(%rsp,%rax,4), %ecx
addl 0xf00(%rsp,%rax,4), %ecx
addl 0xae0(%rsp,%rax,4), %ecx
addl %ecx, 0x2a0(%rsp,%rax,4)
incq %rax
jmp 0x568fe
movq %rax, %rdi
callq 0x64291
movq 0x40(%rsp), %rsi
leal -0x1(%rsi), %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x8, %eax
orl %ecx, %eax
movl %eax, %ebx
shrl $0x10, %ebx
orl %eax, %ebx
incl %ebx
movl $0x1000, %eax           # imm = 0x1000
cmpl %eax, %ebx
cmovael %eax, %ebx
leaq 0x2a0(%rsp), %rdi
movl %ebx, %edx
callq 0x56e66
testl %eax, %eax
js 0x56a89
leaq 0x2a0(%rsp), %rsi
movq %r15, %rdi
callq 0x5962c
cltq
addq %r15, %rax
movq %rax, 0x18(%rsp)
xorl %r14d, %r14d
cmpq $0x100, %r14            # imm = 0x100
je 0x569ca
movl 0x2a0(%rsp,%r14,4), %esi
testl %esi, %esi
je 0x569c5
movq 0x18(%rsp), %r13
movq %r13, %rdi
callq 0x596aa
movl %eax, %eax
addq %rax, %r13
movq %r13, 0x18(%rsp)
incq %r14
jmp 0x56999
leaq 0x2a0(%rsp), %rdi
movl %ebx, %esi
movl $0x1000, %edx           # imm = 0x1000
callq 0x56e66
xorl %ebx, %ebx
testl %eax, %eax
js 0x56a89
movq %r15, 0x20(%rsp)
movq 0x18(%rsp), %rax
subl %r15d, %eax
movq %rax, 0x18(%rsp)
xorl %r14d, %r14d
xorl %r13d, %r13d
cmpq $0x400, %r13            # imm = 0x400
je 0x56a90
movl 0x2a0(%rsp,%r13), %r15d
testl %r15d, %r15d
je 0x56a7c
leaq (%rsp,%r14), %rdi
addq $0xf00, %rdi            # imm = 0xF00
movl %ebx, %esi
movl %r15d, %edx
pushq $0xc
popq %rcx
callq 0x56f89
movl 0xf00(%rsp,%r13,4), %eax
movl 0xf04(%rsp,%r13,4), %ecx
movl %eax, 0x2b00(%rsp,%r13)
movl %ecx, 0x2700(%rsp,%r13)
movl 0xf0c(%rsp,%r13,4), %eax
movl $0xffe00000, %ecx       # imm = 0xFFE00000
addl %ecx, %eax
movl %eax, 0x2300(%rsp,%r13)
movl 0xf08(%rsp,%r13,4), %eax
movl %eax, 0x1f00(%rsp,%r13)
addl %r15d, %ebx
addq $0x4, %r13
addq $0x10, %r14
jmp 0x56a00
xorl %ebx, %ebx
jmp 0x56e54
xorl %eax, %eax
cmpq $0x20, %rax
je 0x56aa8
movl $0x8000, 0x6c0(%rsp,%rax,4) # imm = 0x8000
incq %rax
jmp 0x56a92
movq 0x40(%rsp), %rax
movl %eax, %ecx
andl $-0x20, %ecx
andl $0x1f, %eax
movq %rcx, 0x40(%rsp)
leal -0x20(%rcx), %r13d
orq $0x1f, %r13
leaq (%rsp,%rax,4), %rbx
addq $0x6bc, %rbx            # imm = 0x6BC
leaq 0x28(%rsp), %r15
testq %rax, %rax
jle 0x56b05
leaq -0x1(%rax), %r14
addl %r13d, %eax
movzbl (%r12,%rax), %eax
shll $0x4, %eax
leaq (%rsp,%rax), %rdx
addq $0xf00, %rdx            # imm = 0xF00
movq %rbx, %rdi
movq %r15, %rsi
callq 0x57080
addq $-0x4, %rbx
movq %r14, %rax
jmp 0x56ad2
vmovdqa64 0x6c0(%rsp), %zmm3
vmovdqa64 0x700(%rsp), %zmm2
movq 0x28(%rsp), %r13
movslq 0x40(%rsp), %rax
testq %rax, %rax
jle 0x56df9
leaq -0x20(%rax), %r15
vpmovzxbd -0x20(%r12,%rax), %zmm0
vmovdqa64 %zmm0, 0xc0(%rsp)
vpmovzxbd -0x10(%r12,%rax), %zmm1
vmovdqa64 %zmm1, 0x180(%rsp)
vmovdqa64 %zmm2, 0x40(%rsp)
leaq 0x2b00(%rsp), %rbx
movq %rbx, %rdi
vmovdqa64 %zmm3, 0x100(%rsp)
callq 0x570b9
vmovdqa64 %zmm0, 0x80(%rsp)
vmovdqa64 0x180(%rsp), %zmm0
movq %rbx, %rdi
callq 0x570b9
vmovdqa64 0x80(%rsp), %zmm1
vpcmpltd 0x100(%rsp), %zmm1, %k1
kmovw %k1, 0x80(%rsp)
kmovw %k1, %eax
popcntl %eax, %ebx
vpcmpltd 0x40(%rsp), %zmm0, %k1
kmovw %k1, 0x140(%rsp)
vmovaps 0xc0(%rsp), %zmm0
leaq 0x2300(%rsp), %r14
movq %r14, %rdi
callq 0x570b9
vmovaps %zmm0, 0x240(%rsp)
vmovaps 0x180(%rsp), %zmm0
movq %r14, %rdi
callq 0x570b9
vmovaps %zmm0, 0x200(%rsp)
kmovw 0x140(%rsp), %k1
kmovw %k1, %eax
popcntl %eax, %ecx
vpbroadcastd 0x2b155(%rip), %zmm1 # 0x81d60
vpandq 0x100(%rsp), %zmm1, %zmm0
vpandq 0x40(%rsp), %zmm1, %zmm1
vpcompressd %zmm1, %zmm1 {%k1} {z}
leal (%rcx,%rcx), %eax
subq %rax, %r13
pushq $-0x1
popq %rdx
movl %edx, %eax
shll %cl, %eax
notl %eax
kmovw %eax, %k1
vpmovdw %zmm1, (%r13) {%k1}
kmovw 0x80(%rsp), %k1
vpcompressd %zmm0, %zmm0 {%k1} {z}
leal (%rbx,%rbx), %eax
subq %rax, %r13
movl %edx, %eax
movl %ebx, %ecx
shll %cl, %eax
notl %eax
kmovw %eax, %k1
vpmovdw %zmm0, (%r13) {%k1}
vmovaps 0xc0(%rsp), %zmm0
leaq 0x2700(%rsp), %rbx
movq %rbx, %rdi
callq 0x570b9
vmovaps %zmm0, 0x1c0(%rsp)
vmovdqa64 0x180(%rsp), %zmm0
movq %rbx, %rdi
callq 0x570b9
vmovdqa64 0x100(%rsp), %zmm5
kmovw 0x80(%rsp), %k1
vpsrld $0x10, %zmm5, %zmm5 {%k1}
vmovdqa64 %zmm5, 0x100(%rsp)
vmovdqa64 0x40(%rsp), %zmm4
kmovw 0x140(%rsp), %k1
vpsrld $0x10, %zmm4, %zmm4 {%k1}
vmovdqa64 %zmm4, 0x40(%rsp)
vpsrlq $0x20, %zmm5, %zmm1
vmovdqa64 0x1c0(%rsp), %zmm6
vpsrlq $0x20, %zmm6, %zmm2
vpmuludq %zmm1, %zmm2, %zmm1
vpsrlq $0x20, %zmm4, %zmm2
vpsrlq $0x20, %zmm0, %zmm3
vpmuludq %zmm2, %zmm3, %zmm2
vpmuludq %zmm5, %zmm6, %zmm3
vpsrlq $0x20, %zmm3, %zmm3
vpmuludq %zmm4, %zmm0, %zmm0
vpsrlq $0x20, %zmm0, %zmm0
movw $0xaaaa, %ax            # imm = 0xAAAA
kmovw %eax, %k1
vpord %zmm1, %zmm3, %zmm3 {%k1}
vmovdqa64 %zmm3, 0x80(%rsp)
vpord %zmm2, %zmm0, %zmm0 {%k1}
vmovdqa64 %zmm0, 0x140(%rsp)
vmovaps 0xc0(%rsp), %zmm0
leaq 0x1f00(%rsp), %rbx
movq %rbx, %rdi
callq 0x570b9
vmovaps %zmm0, 0xc0(%rsp)
vmovdqa64 0x180(%rsp), %zmm0
movq %rbx, %rdi
callq 0x570b9
vmovdqa64 0x240(%rsp), %zmm3
vpsrld $0x10, %zmm3, %zmm1
vmovdqa64 0x80(%rsp), %zmm2
vpsrlvd %zmm1, %zmm2, %zmm1
vmovdqa64 0x200(%rsp), %zmm4
vpsrld $0x10, %zmm4, %zmm2
vmovdqa64 0x140(%rsp), %zmm5
vpsrlvd %zmm2, %zmm5, %zmm2
vpbroadcastd 0x2afab(%rip), %zmm5 # 0x81d60
vpandq %zmm5, %zmm3, %zmm3
vpmulld %zmm3, %zmm1, %zmm1
vmovdqa64 0xc0(%rsp), %zmm3
vpaddd 0x100(%rsp), %zmm3, %zmm3
vpaddd %zmm1, %zmm3, %zmm3
vpandq %zmm5, %zmm4, %zmm1
vpmulld %zmm1, %zmm2, %zmm1
vpaddd 0x40(%rsp), %zmm0, %zmm0
vpaddd %zmm1, %zmm0, %zmm2
movq %r15, %rax
jmp 0x56b1f
vmovdqa64 %zmm3, 0x6c0(%rsp)
vmovdqa64 %zmm2, 0x700(%rsp)
pushq $0x1f
popq %rax
movq 0x18(%rsp), %rdx
testl %eax, %eax
js 0x56e2a
movl %eax, %ecx
movl 0x6c0(%rsp,%rcx,4), %ecx
movl %ecx, -0x4(%r13)
addq $-0x4, %r13
decl %eax
jmp 0x56e11
movq 0x30(%rsp), %rax
subq %r13, %rax
movslq %edx, %rdi
movq %rax, %rdx
addl %edi, %eax
movq 0x38(%rsp), %rcx
movl %eax, (%rcx)
movq 0x20(%rsp), %rbx
addq %rbx, %rdi
movq %r13, %rsi
vzeroupper
callq 0x4830
movq %rbx, %rax
leaq -0x28(%rbp), %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq