// File: luooofan[P]hblzbd_compiler/src/Pass/generate_arm_from_ssa.cpp
// Function: GenerateArmFromSSA::ConvertMod2And(ArmBasicBlock*, arm::Reg*, Value*, int)
bool GenerateArmFromSSA::ConvertMod2And(ArmBasicBlock* armbb, Reg* rd, Value* val, int imm) {
  // 如果是0 应该生成报错
  if (0 == imm) {
    MyAssert(0);
  }
  auto eval_n = [](int imm) {
    int n = 0;
    while (imm > 1) {
      imm >>= 1;
      ++n;
    }
    return n;
  };
  // 如果是2的幂次方 生成一条and rd rm n-1的指令
  // FIXME: 这样做并不适用于被除数是负数的情况
  // if (0 == (imm & (imm - 1))) {
  //   std::cout << "Warning Mod" << std::endl;
  //   auto rm = ResolveValue2Reg(armbb, val);
  //   new BinaryInst(BinaryInst::OpCode::AND, rd, rm, ResolveImm2Operand2(armbb, imm - 1), armbb);
  //   return true;
  // }
  if (0 == (imm & (imm - 1))) {
    // 1. asr vreg, rn, #31;  i.e. mov vreg, rn, ASR #31;
    auto vreg = NewVirtualReg();
    auto rn = ResolveValue2Reg(armbb, val);
    new Move(vreg, new Operand2(rn, new Shift(Shift::OpCode::ASR, 31)), armbb);
    // 2. add vreg2, rn, vreg, lsr #(32-n);
    auto vreg2 = NewVirtualReg();
    auto n = eval_n(imm);
    auto op2 = new Operand2(vreg, new Shift(Shift::OpCode::LSR, 32 - n));
    new BinaryInst(BinaryInst::OpCode::ADD, vreg2, rn, op2, armbb);
    // 3. bic vreg2, vreg2, #(2^n-1);  i.e. bfc vreg2, #0, #n;
    new BinaryInst(BinaryInst::OpCode::BIC, vreg2, vreg2, ResolveImm2Operand2(armbb, imm - 1), armbb);
    // 4. sub rd, rn, vreg2
    new BinaryInst(BinaryInst::OpCode::SUB, rd, rn, new Operand2(vreg2), armbb);
  }
  return false;
}

// Assembly:
subq $0xf8, %rsp
movq %rdi, 0xf0(%rsp)
movq %rsi, 0xe8(%rsp)
movq %rdx, 0xe0(%rsp)
movq %rcx, 0xd8(%rsp)
movl %r8d, 0xd4(%rsp)
movq 0xf0(%rsp), %rax
movq %rax, 0x90(%rsp)
xorl %eax, %eax
cmpl 0xd4(%rsp), %eax
jne 0xacaf1
movq 0x9f547(%rip), %rdi     # 0x14bfe8
leaq 0x4d650(%rip), %rsi     # 0xfa0f8
callq 0x8330
movq %rax, %rdi
leaq 0x50f12(%rip), %rsi     # 0xfd9c9
callq 0x8330
movq %rax, %rdi
leaq 0x4e924(%rip), %rsi     # 0xfb3ea
callq 0x8330
movq %rax, %rdi
movl $0xf6, %esi
callq 0x8650
movq %rax, %rdi
movq 0x9f49e(%rip), %rsi     # 0x14bf80
callq 0x8380
movl $0xff, %edi
callq 0x8460
movl 0xd4(%rsp), %ecx
movl 0xd4(%rsp), %eax
subl $0x1, %eax
andl %eax, %ecx
xorl %eax, %eax
cmpl %ecx, %eax
jne 0xacf12
movq 0x90(%rsp), %rdi
callq 0xaaf80
movq 0x90(%rsp), %rdi
movq %rax, 0xc8(%rsp)
movq 0xe8(%rsp), %rsi
movq 0xd8(%rsp), %rdx
callq 0xabf80
movq %rax, 0xc0(%rsp)
movl $0x28, %edi
callq 0x8340
movq %rax, 0x78(%rsp)
movq 0xc8(%rsp), %rax
movq %rax, 0x80(%rsp)
movl $0x18, %edi
callq 0x8340
movq %rax, 0x88(%rsp)
jmp 0xacb7b
movq 0xc0(%rsp), %rax
movq %rax, 0x68(%rsp)
movl $0x18, %edi
callq 0x8340
movq %rax, 0x70(%rsp)
jmp 0xacb99
movq 0x70(%rsp), %rdi
xorl %esi, %esi
movl $0x1f, %edx
callq 0xb2340
jmp 0xacbac
movq 0x70(%rsp), %rdx
movq 0x68(%rsp), %rsi
movq 0x88(%rsp), %rdi
callq 0xb2370
jmp 0xacbc5
movq 0x88(%rsp), %rdx
movq 0x80(%rsp), %rsi
movq 0x78(%rsp), %rdi
movq 0xe8(%rsp), %rcx
xorl %r8d, %r8d
movl $0x1, %r9d
callq 0xb2060
jmp 0xacbf2
movq 0x90(%rsp), %rdi
callq 0xaaf80
movq %rax, 0xa8(%rsp)
movl 0xd4(%rsp), %esi
leaq 0xd3(%rsp), %rdi
callq 0xacf30
movl %eax, 0xa4(%rsp)
movl $0x18, %edi
movq %rdi, 0x48(%rsp)
callq 0x8340
movq 0x48(%rsp), %rdi
movq %rax, 0x50(%rsp)
movq 0xc8(%rsp), %rax
movq %rax, 0x58(%rsp)
callq 0x8340
movq %rax, 0x60(%rsp)
jmp 0xacc54
movq 0x60(%rsp), %rdi
movl 0xa4(%rsp), %eax
movl $0x20, %edx
subl %eax, %edx
movl $0x2, %esi
callq 0xb2340
jmp 0xacc73
movq 0x60(%rsp), %rdx
movq 0x58(%rsp), %rsi
movq 0x50(%rsp), %rdi
callq 0xb2370
jmp 0xacc89
movq 0x50(%rsp), %rax
movq %rax, 0x98(%rsp)
movl $0x38, %edi
callq 0x8340
movq %rax, %rdi
movq %rdi, %rax
movq %rax, 0x40(%rsp)
movq 0xa8(%rsp), %rdx
movq 0xc0(%rsp), %rcx
movq 0x98(%rsp), %r8
movq 0xe8(%rsp), %r9
xorl %esi, %esi
callq 0xb23b0
jmp 0xaccd4
movl $0x38, %edi
callq 0x8340
movq 0x90(%rsp), %rdi
movq %rax, 0x20(%rsp)
movq 0xa8(%rsp), %rax
movq %rax, 0x28(%rsp)
movq %rax, 0x30(%rsp)
movq 0xe8(%rsp), %rsi
movl 0xd4(%rsp), %edx
decl %edx
xorl %ecx, %ecx
callq 0xab2c0
movq %rax, 0x38(%rsp)
jmp 0xacd1c
movq 0x38(%rsp), %r8
movq 0x28(%rsp), %rcx
movq 0x30(%rsp), %rdx
movq 0x20(%rsp), %rdi
movq 0xe8(%rsp), %r9
movl $0x9, %esi
callq 0xb23b0
jmp 0xacd44
movl $0x38, %edi
callq 0x8340
movq %rax, (%rsp)
movq 0xe0(%rsp), %rax
movq %rax, 0x8(%rsp)
movq 0xc0(%rsp), %rax
movq %rax, 0x10(%rsp)
movl $0x18, %edi
callq 0x8340
movq %rax, 0x18(%rsp)
jmp 0xacd7d
movq 0x18(%rsp), %rdi
movq 0xa8(%rsp), %rsi
callq 0x78090
jmp 0xacd91
movq 0x18(%rsp), %r8
movq 0x10(%rsp), %rcx
movq 0x8(%rsp), %rdx
movq (%rsp), %rdi
movq 0xe8(%rsp), %r9
movl $0x1, %esi
callq 0xb23b0
jmp 0xacdb8
jmp 0xacf12
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0xb8(%rsp)
movl %eax, 0xb4(%rsp)
jmp 0xace1e
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0xb8(%rsp)
movl %eax, 0xb4(%rsp)
jmp 0xace0c
movq 0x70(%rsp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0xb8(%rsp)
movl %eax, 0xb4(%rsp)
movl $0x18, %esi
callq 0x8350
movq 0x88(%rsp), %rdi
movl $0x18, %esi
callq 0x8350
movq 0x78(%rsp), %rdi
movl $0x28, %esi
callq 0x8350
jmp 0xacf1e
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0xb8(%rsp)
movl %eax, 0xb4(%rsp)
jmp 0xace6b
movq 0x60(%rsp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0xb8(%rsp)
movl %eax, 0xb4(%rsp)
movl $0x18, %esi
callq 0x8350
movq 0x50(%rsp), %rdi
movl $0x18, %esi
callq 0x8350
jmp 0xacf1e
movq 0x40(%rsp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0xb8(%rsp)
movl %eax, 0xb4(%rsp)
movl $0x38, %esi
callq 0x8350
jmp 0xacf1e
movq 0x20(%rsp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0xb8(%rsp)
movl %eax, 0xb4(%rsp)
movl $0x38, %esi
callq 0x8350
jmp 0xacf1e
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0xb8(%rsp)
movl %eax, 0xb4(%rsp)
jmp 0xacf02
movq 0x18(%rsp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0xb8(%rsp)
movl %eax, 0xb4(%rsp)
movl $0x18, %esi
callq 0x8350
movq (%rsp), %rdi
movl $0x38, %esi
callq 0x8350
jmp 0xacf1e
xorl %eax, %eax
andb $0x1, %al
addq $0xf8, %rsp
retq
movq 0xb8(%rsp), %rdi
callq 0x8670
nopl (%rax,%rax)