// File: /workspace/github_c_makefile_star2_O3/enzo1982[P]smooth/libraries/libcpuid/cpuid_main.c
// Function: update_cache_instances
static void update_cache_instances(struct internal_cache_instances_t* caches,
                                   struct internal_apic_info_t* apic_info,
                                   struct internal_id_info_t* id_info,
                                   bool debugf_is_needed)
{
	uint32_t cache_id_index = 0;
	cache_type_t level;

	for (level = 0; level < NUM_CACHE_TYPES; level++) {
		if (id_info->cache_mask[level] == 0x00000000) {
			apic_info->cache_id[level] = -1;
			continue;
		}
		apic_info->cache_id[level] = apic_info->apic_id & id_info->cache_mask[level];
		cache_id_index             = apic_info->cache_id[level] % CACHES_HTABLE_SIZE;
		if ((caches->htable[level][cache_id_index].cache_id == 0) || (caches->htable[level][cache_id_index].cache_id == apic_info->cache_id[level])) {
			if (caches->htable[level][cache_id_index].num_logical_cpu == 0)
				caches->instances[level]++;
			caches->htable[level][cache_id_index].cache_id = apic_info->cache_id[level];
			caches->htable[level][cache_id_index].num_logical_cpu++;
		}
		else {
			warnf("update_cache_instances: collision at index %u (cache ID is %i, not %i)\n",
				cache_id_index, caches->htable[level][cache_id_index].cache_id, apic_info->cache_id[level]);
		}
	}

	if (debugf_is_needed)
		debugf(3, "Logical CPU %4u: APIC ID %4i, package ID %4i, core ID %4i, thread %i, L1I$ ID %4i, L1D$ ID %4i, L2$ ID %4i, L3$ ID %4i, L4$ ID %4i\n",
			apic_info->logical_cpu, apic_info->apic_id, apic_info->package_id, apic_info->core_id, apic_info->smt_id,
			apic_info->cache_id[L1I], apic_info->cache_id[L1D], apic_info->cache_id[L2], apic_info->cache_id[L3], apic_info->cache_id[L4]);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %ecx, 0x4(%rsp)
movq %rdx, %r14
movq %rsi, %rbx
movq %rdi, %r15
movl $0x3, %r13d
leaq 0x4b3c6(%rip), %r12     # 0x1147d0
xorl %ebp, %ebp
movl 0x14(%r14,%rbp,4), %ecx
testl %ecx, %ecx
je 0xc944b
andl (%rbx), %ecx
movl %ecx, 0x10(%rbx,%rbp,4)
leal 0xff(%rcx), %eax
testl %ecx, %ecx
cmovnsl %ecx, %eax
andl $0xffffff00, %eax       # imm = 0xFFFFFF00
movl %ecx, %esi
subl %eax, %esi
leaq (%r15,%rsi,8), %rax
movl (%rax,%r13,4), %edx
testl %edx, %edx
je 0xc9455
cmpl %ecx, %edx
je 0xc9455
movq %r12, %rdi
xorl %eax, %eax
callq 0xc9b82
jmp 0xc947a
movl $0xffffffff, 0x10(%rbx,%rbp,4) # imm = 0xFFFFFFFF
jmp 0xc947a
movzwl -0x4(%rax,%r13,4), %edx
testw %dx, %dx
jne 0xc946e
incb (%r15,%rbp)
movl 0x10(%rbx,%rbp,4), %ecx
movzwl -0x4(%rax,%r13,4), %edx
movl %ecx, (%rax,%r13,4)
incl %edx
movw %dx, -0x4(%rax,%r13,4)
incq %rbp
addq $0x200, %r13            # imm = 0x200
cmpq $0x5, %rbp
jne 0xc940c
cmpb $0x0, 0x4(%rsp)
je 0xc94da
movzwl 0x24(%rbx), %edx
movl (%rbx), %ecx
movl 0x4(%rbx), %r8d
movl 0x8(%rbx), %r9d
movl 0xc(%rbx), %r10d
movl 0x10(%rbx), %r11d
movl 0x14(%rbx), %r14d
movl 0x18(%rbx), %r15d
movl 0x1c(%rbx), %r12d
movl 0x20(%rbx), %ebx
leaq 0x4b35b(%rip), %rsi     # 0x114818
movl $0x3, %edi
xorl %eax, %eax
pushq %rbx
pushq %r12
pushq %r15
pushq %r14
pushq %r11
pushq %r10
callq 0xc9c3a
addq $0x38, %rsp
jmp 0xc94de
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq