// File: /workspace/github_c_makefile_star2_O0/markdryan[P]subtilis/arch/arm32/arm_reg_alloc.c
// Function: subtilis_arm_reg_alloc_ensure
bool subtilis_arm_reg_alloc_ensure(subtilis_arm_reg_ud_t *ud,
				   subtilis_arm_op_t *current,
				   subtilis_arm_reg_class_t *int_regs,
				   subtilis_arm_reg_class_t *regs,
				   subtilis_arm_reg_t *reg,
				   subtilis_error_t *err)
{
	size_t assigned;
	subtilis_arm_reg_t target_reg;

	if (regs->is_fixed(*reg)) {
		/*
		 * Register has fixed use and is unavailable to user's code
		 * Physical register has already been allocated, e.g., r12, r13
		 */
		if (*reg >= regs->max_regs)
			return true;

		assigned = regs->phys_to_virt[*reg];
		if (assigned != *reg) {
			prv_allocate_fixed(ud, current, int_regs, regs, reg,
					   err);
			if (err->type != SUBTILIS_ERROR_OK)
				return false;
			prv_load_spilled_reg(ud, current, regs, *reg, *reg,
					     err);
			if (err->type != SUBTILIS_ERROR_OK)
				return false;
		}
	} else {
		assigned = prv_virt_to_phys(regs, reg);
		if (assigned != INT_MAX) {
			*reg = assigned;
		} else {
			target_reg = *reg;
			prv_allocate_floating(ud, current, int_regs, regs,
					      &target_reg, SIZE_MAX, err);
			if (err->type != SUBTILIS_ERROR_OK)
				return false;
			prv_load_spilled_reg(ud, current, regs, *reg,
					     target_reg, err);
			if (err->type != SUBTILIS_ERROR_OK)
				return false;
			*reg = target_reg;
		}
	}

	return false;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x50, %rsp
movq %rdi, -0x10(%rbp)
movq %rsi, -0x18(%rbp)
movq %rdx, -0x20(%rbp)
movq %rcx, -0x28(%rbp)
movq %r8, -0x30(%rbp)
movq %r9, -0x38(%rbp)
movq -0x28(%rbp), %rax
movq 0x70(%rax), %rax
movq -0x30(%rbp), %rcx
movq (%rcx), %rdi
callq *%rax
testb $0x1, %al
jne 0x774ea
jmp 0x77592
movq -0x30(%rbp), %rax
movq (%rax), %rax
movq -0x28(%rbp), %rcx
cmpq (%rcx), %rax
jb 0x77503
movb $0x1, -0x1(%rbp)
jmp 0x7763c
movq -0x28(%rbp), %rax
movq 0x8(%rax), %rax
movq -0x30(%rbp), %rcx
movq (%rcx), %rcx
movq (%rax,%rcx,8), %rax
movq %rax, -0x40(%rbp)
movq -0x40(%rbp), %rax
movq -0x30(%rbp), %rcx
cmpq (%rcx), %rax
je 0x7758d
movq -0x10(%rbp), %rdi
movq -0x18(%rbp), %rsi
movq -0x20(%rbp), %rdx
movq -0x28(%rbp), %rcx
movq -0x30(%rbp), %r8
movq -0x38(%rbp), %r9
callq 0x77230
movq -0x38(%rbp), %rax
cmpl $0x0, (%rax)
je 0x77556
movb $0x0, -0x1(%rbp)
jmp 0x7763c
movq -0x10(%rbp), %rdi
movq -0x18(%rbp), %rsi
movq -0x28(%rbp), %rdx
movq -0x30(%rbp), %rax
movq (%rax), %rcx
movq -0x30(%rbp), %rax
movq (%rax), %r8
movq -0x38(%rbp), %r9
callq 0x77650
movq -0x38(%rbp), %rax
cmpl $0x0, (%rax)
je 0x7758b
movb $0x0, -0x1(%rbp)
jmp 0x7763c
jmp 0x7758d
jmp 0x77638
movq -0x28(%rbp), %rdi
movq -0x30(%rbp), %rsi
callq 0x772c0
movq %rax, -0x40(%rbp)
cmpq $0x7fffffff, -0x40(%rbp) # imm = 0x7FFFFFFF
je 0x775ba
movq -0x40(%rbp), %rcx
movq -0x30(%rbp), %rax
movq %rcx, (%rax)
jmp 0x77636
movq -0x30(%rbp), %rax
movq (%rax), %rax
movq %rax, -0x48(%rbp)
movq -0x10(%rbp), %rdi
movq -0x18(%rbp), %rsi
movq -0x20(%rbp), %rdx
movq -0x28(%rbp), %rcx
movq -0x38(%rbp), %rax
leaq -0x48(%rbp), %r8
movq $-0x1, %r9
movq %rax, (%rsp)
callq 0x77330
movq -0x38(%rbp), %rax
cmpl $0x0, (%rax)
je 0x775fc
movb $0x0, -0x1(%rbp)
jmp 0x7763c
movq -0x10(%rbp), %rdi
movq -0x18(%rbp), %rsi
movq -0x28(%rbp), %rdx
movq -0x30(%rbp), %rax
movq (%rax), %rcx
movq -0x48(%rbp), %r8
movq -0x38(%rbp), %r9
callq 0x77650
movq -0x38(%rbp), %rax
cmpl $0x0, (%rax)
je 0x7762b
movb $0x0, -0x1(%rbp)
jmp 0x7763c
movq -0x48(%rbp), %rcx
movq -0x30(%rbp), %rax
movq %rcx, (%rax)
jmp 0x77638
movb $0x0, -0x1(%rbp)
movb -0x1(%rbp), %al
andb $0x1, %al
addq $0x50, %rsp
popq %rbp
retq
nopw (%rax,%rax)