// File: CMU-SAFARI[P]MQSim/src/ssd/NVM_PHY_ONFI_NVDDR2.cpp
// Function: SSD_Components::NVM_PHY_ONFI_NVDDR2::Execute_simulator_event(MQSimEngine::Sim_Event*)
void NVM_PHY_ONFI_NVDDR2::Execute_simulator_event(MQSimEngine::Sim_Event* ev)
	{
		DieBookKeepingEntry* dieBKE = (DieBookKeepingEntry*)ev->Parameters;
		flash_channel_ID_type channel_id = dieBKE->ActiveTransactions.front()->Address.ChannelID;
		ONFI_Channel_NVDDR2* targetChannel = channels[channel_id];
		NVM::FlashMemory::Flash_Chip* targetChip = targetChannel->Chips[dieBKE->ActiveTransactions.front()->Address.ChipID];
		ChipBookKeepingEntry *chipBKE = &bookKeepingTable[channel_id][targetChip->ChipID];

		switch ((NVDDR2_SimEventType)ev->Type) {
			case NVDDR2_SimEventType::READ_CMD_ADDR_TRANSFERRED:
				//DEBUG2("Chip " << targetChip->ChannelID << ", " << targetChip->ChipID << ", " << dieBKE->ActiveTransactions.front()->Address.DieID << ": READ_CMD_ADDR_TRANSFERRED ")
				targetChip->EndCMDXfer(dieBKE->ActiveCommand);
				for (auto tr : dieBKE->ActiveTransactions) {
					tr->STAT_execution_time = dieBKE->Expected_finish_time - Simulator->Time();
				}
				chipBKE->OngoingDieCMDTransfers.pop();
				chipBKE->No_of_active_dies++;
				if (chipBKE->OngoingDieCMDTransfers.size() > 0) {
					perform_interleaved_cmd_data_transfer(targetChip, chipBKE->OngoingDieCMDTransfers.front());
					return;
				} else {
					chipBKE->Status = ChipStatus::READING;
					targetChannel->SetStatus(BusChannelStatus::IDLE, targetChip);
				}
				break;
			case NVDDR2_SimEventType::ERASE_SETUP_COMPLETED:
				//DEBUG2("Chip " << targetChip->ChannelID << ", " << targetChip->ChipID << ", " << dieBKE->ActiveTransactions.front()->Address.DieID << ": ERASE_SETUP_COMPLETED ")
				targetChip->EndCMDXfer(dieBKE->ActiveCommand);
				for (auto &tr : dieBKE->ActiveTransactions) {
					tr->STAT_execution_time = dieBKE->Expected_finish_time - Simulator->Time();
				}
				chipBKE->OngoingDieCMDTransfers.pop();
				chipBKE->No_of_active_dies++;
				if (chipBKE->OngoingDieCMDTransfers.size() > 0) {
					perform_interleaved_cmd_data_transfer(targetChip, chipBKE->OngoingDieCMDTransfers.front());
					return;
				} else {
					chipBKE->Status = ChipStatus::ERASING;
					targetChannel->SetStatus(BusChannelStatus::IDLE, targetChip);
				}
				break;
			case NVDDR2_SimEventType::PROGRAM_CMD_ADDR_DATA_TRANSFERRED:
			case NVDDR2_SimEventType::PROGRAM_COPYBACK_CMD_ADDR_TRANSFERRED:
				//DEBUG2("Chip " << targetChip->ChannelID << ", " << targetChip->ChipID << ", " << dieBKE->ActiveTransactions.front()->Address.DieID <<  ": PROGRAM_CMD_ADDR_DATA_TRANSFERRED " )
				targetChip->EndCMDDataInXfer(dieBKE->ActiveCommand);
				for (auto &tr : dieBKE->ActiveTransactions) {
					tr->STAT_execution_time = dieBKE->Expected_finish_time - Simulator->Time();
				}
				chipBKE->OngoingDieCMDTransfers.pop();
				chipBKE->No_of_active_dies++;
				if (chipBKE->OngoingDieCMDTransfers.size() > 0)
				{
					perform_interleaved_cmd_data_transfer(targetChip, chipBKE->OngoingDieCMDTransfers.front());
					return;
				} else {
					chipBKE->Status = ChipStatus::WRITING;
					targetChannel->SetStatus(BusChannelStatus::IDLE, targetChip);
				}
				break;
			case NVDDR2_SimEventType::READ_DATA_TRANSFERRED:
				//DEBUG2("Chip " << targetChip->ChannelID << ", " << targetChip->ChipID << ", " << dieBKE->ActiveTransactions.front()->Address.DieID << ": READ_DATA_TRANSFERRED ")
				targetChip->EndDataOutXfer(dieBKE->ActiveCommand);
				copy_read_data_to_transaction((NVM_Transaction_Flash_RD*)dieBKE->ActiveTransfer, dieBKE->ActiveCommand);
	#if 0
				if (tr->ExecutionMode != ExecutionModeType::COPYBACK)
	#endif
				broadcastTransactionServicedSignal(dieBKE->ActiveTransfer);

				for (std::list<NVM_Transaction_Flash*>::iterator it = dieBKE->ActiveTransactions.begin();
					it != dieBKE->ActiveTransactions.end(); it++) {
					if ((*it) == dieBKE->ActiveTransfer) {
						dieBKE->ActiveTransactions.erase(it);
						break;
					}
				}
				dieBKE->ActiveTransfer = NULL;
				if (dieBKE->ActiveTransactions.size() == 0) {
					dieBKE->ClearCommand();
				}

				chipBKE->WaitingReadTXCount--;
				if (chipBKE->No_of_active_dies == 0) {
					if (chipBKE->WaitingReadTXCount == 0) {
						chipBKE->Status = ChipStatus::IDLE;
					} else {
						chipBKE->Status = ChipStatus::WAIT_FOR_DATA_OUT;
					}
				}
				if (chipBKE->Status == ChipStatus::IDLE) {
					if (dieBKE->Suspended) {
						send_resume_command_to_chip(targetChip, chipBKE);
					}
				}
				targetChannel->SetStatus(BusChannelStatus::IDLE, targetChip);
				break;
			default:
				PRINT_ERROR("Unknown simulation event specified for NVM_PHY_ONFI_NVDDR2!")
		}

		/* Copyback requests are prioritized over other type of requests since they need very short transfer time.
		In addition, they are just used for GC purpose. */
		if (WaitingCopybackWrites[channel_id].size() > 0) {
			DieBookKeepingEntry* waitingBKE = WaitingCopybackWrites[channel_id].front();
			targetChip = channels[channel_id]->Chips[waitingBKE->ActiveTransactions.front()->Address.ChipID];
			ChipBookKeepingEntry* waitingChipBKE = &bookKeepingTable[channel_id][targetChip->ChipID];
			if (waitingBKE->ActiveTransactions.size() > 1) {
				Stats::IssuedMultiplaneCopybackProgramCMD++;
				waitingBKE->ActiveCommand->CommandCode = CMD_PROGRAM_PAGE_COPYBACK_MULTIPLANE;
			} else {
				Stats::IssuedCopybackProgramCMD++;
				waitingBKE->ActiveCommand->CommandCode = CMD_PROGRAM_PAGE_COPYBACK;
			}
			targetChip->StartCMDXfer();
			waitingChipBKE->Status = ChipStatus::CMD_IN;
			Simulator->Register_sim_event(Simulator->Time() + this->channels[channel_id]->ProgramCommandTime[waitingBKE->ActiveTransactions.size()],
				this, waitingBKE, (int)NVDDR2_SimEventType::PROGRAM_COPYBACK_CMD_ADDR_TRANSFERRED);
			waitingChipBKE->OngoingDieCMDTransfers.push(waitingBKE);

			waitingBKE->Expected_finish_time = Simulator->Time() + this->channels[channel_id]->ProgramCommandTime[waitingBKE->ActiveTransactions.size()]
				+ targetChip->Get_command_execution_latency(waitingBKE->ActiveCommand->CommandCode, waitingBKE->ActiveCommand->Address[0].PageID);
			if (waitingChipBKE->Expected_command_exec_finish_time < waitingBKE->Expected_finish_time) {
				waitingChipBKE->Expected_command_exec_finish_time = waitingBKE->Expected_finish_time;
			}

			WaitingCopybackWrites[channel_id].pop_front();
			channels[channel_id]->SetStatus(BusChannelStatus::BUSY, targetChip);

			return;
		} else if (WaitingMappingRead_TX[channel_id].size() > 0) {
			NVM_Transaction_Flash_RD* waitingTR = (NVM_Transaction_Flash_RD*)WaitingMappingRead_TX[channel_id].front();
			WaitingMappingRead_TX[channel_id].pop_front();
			transfer_read_data_from_chip(&bookKeepingTable[channel_id][waitingTR->Address.ChipID],
				&(bookKeepingTable[channel_id][waitingTR->Address.ChipID].Die_book_keeping_records[waitingTR->Address.DieID]), waitingTR);

			return;
		} else if (WaitingReadTX[channel_id].size() > 0) {
			NVM_Transaction_Flash_RD* waitingTR = (NVM_Transaction_Flash_RD*)WaitingReadTX[channel_id].front();
			WaitingReadTX[channel_id].pop_front();
			transfer_read_data_from_chip(&bookKeepingTable[channel_id][waitingTR->Address.ChipID],
				&(bookKeepingTable[channel_id][waitingTR->Address.ChipID].Die_book_keeping_records[waitingTR->Address.DieID]), waitingTR);

			return;
		} else if (WaitingGCRead_TX[channel_id].size() > 0) {
			NVM_Transaction_Flash_RD* waitingTR = (NVM_Transaction_Flash_RD*)WaitingGCRead_TX[channel_id].front();
			WaitingGCRead_TX[channel_id].pop_front();
			transfer_read_data_from_chip(&bookKeepingTable[channel_id][waitingTR->Address.ChipID],
				&(bookKeepingTable[channel_id][waitingTR->Address.ChipID].Die_book_keeping_records[waitingTR->Address.DieID]), waitingTR);
			return;
		}

		//If the execution reaches here, then the bus channel became idle
		broadcastChannelIdleSignal(channel_id);
	}

	inline void NVM_PHY_ONFI_NVDDR2::handle_ready_signal_from_chip(NVM::FlashMemory::Flash_Chip* chip, NVM::FlashMemory::Flash_Command* command)
	{
		ChipBookKeepingEntry *chipBKE = &_my_instance->bookKeepingTable[chip->ChannelID][chip->ChipID];
		DieBookKeepingEntry *dieBKE = &(chipBKE->Die_book_keeping_records[command->Address[0].DieID]);

		switch (command->CommandCode)
		{
		case CMD_READ_PAGE:
		case CMD_READ_PAGE_MULTIPLANE:
			DEBUG("Chip " << chip->ChannelID << ", " << chip->ChipID << ": finished  read command")
			chipBKE->No_of_active_dies--;
			if (chipBKE->No_of_active_dies == 0)//After finishing the last command, the chip state is changed
				chipBKE->Status = ChipStatus::WAIT_FOR_DATA_OUT;

			for (std::list<NVM_Transaction_Flash*>::iterator it = dieBKE->ActiveTransactions.begin();
				it != dieBKE->ActiveTransactions.end(); it++)
			{
				chipBKE->WaitingReadTXCount++;
				if (_my_instance->channels[chip->ChannelID]->GetStatus() == BusChannelStatus::IDLE)
					_my_instance->transfer_read_data_from_chip(chipBKE, dieBKE, (*it));
				else
				{
					switch (dieBKE->ActiveTransactions.front()->Source)
					{
					case Transaction_Source_Type::CACHE:
					case Transaction_Source_Type::USERIO:
						_my_instance->WaitingReadTX[chip->ChannelID].push_back((*it));
						break;
					case Transaction_Source_Type::GC_WL:
						_my_instance->WaitingGCRead_TX[chip->ChannelID].push_back((*it));
						break;
					case Transaction_Source_Type::MAPPING:
						_my_instance->WaitingMappingRead_TX[chip->ChannelID].push_back((*it));
						break;
					}
				}
			}
			break;
		case CMD_READ_PAGE_COPYBACK:
		case CMD_READ_PAGE_COPYBACK_MULTIPLANE:
			chipBKE->No_of_active_dies--;
			if (chipBKE->No_of_active_dies == 0)
				chipBKE->Status = ChipStatus::WAIT_FOR_COPYBACK_CMD;
			if (_my_instance->channels[chip->ChannelID]->GetStatus() == BusChannelStatus::IDLE)
			{
				if (dieBKE->ActiveTransactions.size() > 1)
				{
					Stats::IssuedMultiplaneCopybackProgramCMD++;
					dieBKE->ActiveCommand->CommandCode = CMD_PROGRAM_PAGE_COPYBACK_MULTIPLANE;
				}
				else
				{
					Stats::IssuedCopybackProgramCMD++;
					dieBKE->ActiveCommand->CommandCode = CMD_PROGRAM_PAGE_COPYBACK;
				}

				for (std::list<NVM_Transaction_Flash*>::iterator it = dieBKE->ActiveTransactions.begin();
					it != dieBKE->ActiveTransactions.end(); it++)
				{
					(*it)->STAT_transfer_time += _my_instance->channels[chip->ChannelID]->ProgramCommandTime[dieBKE->ActiveTransactions.size()];
				}
				chip->StartCMDXfer();
				chipBKE->Status = ChipStatus::CMD_IN;
				Simulator->Register_sim_event(Simulator->Time() + _my_instance->channels[chip->ChannelID]->ProgramCommandTime[dieBKE->ActiveTransactions.size()],
					_my_instance, dieBKE, (int)NVDDR2_SimEventType::PROGRAM_COPYBACK_CMD_ADDR_TRANSFERRED);
				chipBKE->OngoingDieCMDTransfers.push(dieBKE);
				_my_instance->channels[chip->ChannelID]->SetStatus(BusChannelStatus::BUSY, chip);

				dieBKE->Expected_finish_time = Simulator->Time() + _my_instance->channels[chip->ChannelID]->ProgramCommandTime[dieBKE->ActiveTransactions.size()]
					+ chip->Get_command_execution_latency(dieBKE->ActiveCommand->CommandCode, dieBKE->ActiveCommand->Address[0].PageID);
				if (chipBKE->Expected_command_exec_finish_time < dieBKE->Expected_finish_time)
					chipBKE->Expected_command_exec_finish_time = dieBKE->Expected_finish_time;
#if 0	
				//Copyback data should be read out in order to get rid of bit error propagation
				Simulator->RegisterEvent(Simulator->Time() + channels[targetChip->ChannelID]->ProgramCommandTime + NVDDR2DataOutTransferTime(targetTransaction->SizeInByte, channels[targetChip->ChannelID]),
					this, targetTransaction, (int)NVDDR2_SimEventType::READ_DATA_TRANSFERRED);
				targetTransaction->STAT_TransferTime += NVDDR2DataOutTransferTime(targetTransaction->SizeInByte, channels[targetChip->ChannelID]);
#endif
			}
			else _my_instance->WaitingCopybackWrites->push_back(dieBKE);
			break;
		case CMD_PROGRAM_PAGE:
		case CMD_PROGRAM_PAGE_MULTIPLANE:
		case CMD_PROGRAM_PAGE_COPYBACK:
		case CMD_PROGRAM_PAGE_COPYBACK_MULTIPLANE:
		{
			DEBUG("Chip " << chip->ChannelID << ", " << chip->ChipID << ": finished program command")
			int i = 0;
			for (std::list<NVM_Transaction_Flash*>::iterator it = dieBKE->ActiveTransactions.begin();
				it != dieBKE->ActiveTransactions.end(); it++, i++)
			{
				((NVM_Transaction_Flash_WR*)(*it))->Content = command->Meta_data[i].LPA;
				_my_instance->broadcastTransactionServicedSignal(*it);
			}
			dieBKE->ActiveTransactions.clear();
			dieBKE->ClearCommand();

			chipBKE->No_of_active_dies--;
			if (chipBKE->No_of_active_dies == 0 && chipBKE->WaitingReadTXCount == 0)
				chipBKE->Status = ChipStatus::IDLE;
			//Since the time required to send the resume command is very small, we ignore it
			if (chipBKE->Status == ChipStatus::IDLE)
				if (chipBKE->HasSuspend)
					_my_instance->send_resume_command_to_chip(chip, chipBKE);
			break;
		}
		case CMD_ERASE_BLOCK:
		case CMD_ERASE_BLOCK_MULTIPLANE:
			DEBUG("Chip " << chip->ChannelID << ", " << chip->ChipID << ": finished erase command")
			for (std::list<NVM_Transaction_Flash*>::iterator it = dieBKE->ActiveTransactions.begin();
				it != dieBKE->ActiveTransactions.end(); it++)
				_my_instance->broadcastTransactionServicedSignal(*it);
			dieBKE->ActiveTransactions.clear();
			dieBKE->ClearCommand();

			chipBKE->No_of_active_dies--;
			if (chipBKE->No_of_active_dies == 0 && chipBKE->WaitingReadTXCount == 0)
				chipBKE->Status = ChipStatus::IDLE;
			//Since the time required to send the resume command is very small, we ignore it
			if (chipBKE->Status == ChipStatus::IDLE)
				if (chipBKE->HasSuspend)
					_my_instance->send_resume_command_to_chip(chip, chipBKE);
			break;
		default:
			break;
		}

		if (_my_instance->channels[chip->ChannelID]->GetStatus() == BusChannelStatus::IDLE)
			_my_instance->broadcastChannelIdleSignal(chip->ChannelID);
		else if (chipBKE->Status == ChipStatus::IDLE)
			_my_instance->broadcastChipIdleSignal(chip);
	}

	inline void NVM_PHY_ONFI_NVDDR2::transfer_read_data_from_chip(ChipBookKeepingEntry* chipBKE, DieBookKeepingEntry* dieBKE, NVM_Transaction_Flash* tr)
	{
		//DEBUG2("Chip " << tr->Address.ChannelID << ", " << tr->Address.ChipID << ": transfer read data started for LPA: " << tr->LPA)
		dieBKE->ActiveTransfer = tr;
		channels[tr->Address.ChannelID]->Chips[tr->Address.ChipID]->StartDataOutXfer();
		chipBKE->Status = ChipStatus::DATA_OUT;
		Simulator->Register_sim_event(Simulator->Time() + NVDDR2DataOutTransferTime(tr->Data_and_metadata_size_in_byte, channels[tr->Address.ChannelID]),
			this, dieBKE, (int)NVDDR2_SimEventType::READ_DATA_TRANSFERRED);

		tr->STAT_transfer_time += NVDDR2DataOutTransferTime(tr->Data_and_metadata_size_in_byte, channels[tr->Address.ChannelID]);
		channels[tr->Address.ChannelID]->SetStatus(BusChannelStatus::BUSY, channels[tr->Address.ChannelID]->Chips[tr->Address.ChipID]);
	}

	void NVM_PHY_ONFI_NVDDR2::perform_interleaved_cmd_data_transfer(NVM::FlashMemory::Flash_Chip* chip, DieBookKeepingEntry* bookKeepingEntry)
	{
		ONFI_Channel_NVDDR2* target_channel = channels[bookKeepingEntry->ActiveTransactions.front()->Address.ChannelID];
		/*if (target_channel->Status == BusChannelStatus::BUSY)
			PRINT_ERROR("Requesting communication on a busy bus!")*/

		switch (bookKeepingEntry->ActiveTransactions.front()->Type)
		{
			case Transaction_Type::READ:
				chip->StartCMDXfer();
				bookKeepingTable[chip->ChannelID][chip->ChipID].Status = ChipStatus::CMD_IN;
				Simulator->Register_sim_event(Simulator->Time() + bookKeepingEntry->DieInterleavedTime,
					this, bookKeepingEntry, (int)NVDDR2_SimEventType::READ_CMD_ADDR_TRANSFERRED);
				break;
			case Transaction_Type::WRITE:
				if (((NVM_Transaction_Flash_WR*)bookKeepingEntry->ActiveTransactions.front())->RelatedRead == NULL) {
					chip->StartCMDDataInXfer();
					bookKeepingTable[chip->ChannelID][chip->ChipID].Status = ChipStatus::CMD_DATA_IN;
					Simulator->Register_sim_event(Simulator->Time() + bookKeepingEntry->DieInterleavedTime,
						this, bookKeepingEntry, (int)NVDDR2_SimEventType::PROGRAM_CMD_ADDR_DATA_TRANSFERRED);
				} else {
					chip->StartCMDXfer();
					bookKeepingTable[chip->ChannelID][chip->ChipID].Status = ChipStatus::CMD_IN;
					Simulator->Register_sim_event(Simulator->Time() + bookKeepingEntry->DieInterleavedTime, this,
						bookKeepingEntry, (int)NVDDR2_SimEventType::READ_CMD_ADDR_TRANSFERRED);
				}
				break;
			case Transaction_Type::ERASE:
				chip->StartCMDXfer();
				bookKeepingTable[chip->ChannelID][chip->ChipID].Status = ChipStatus::CMD_IN;
				Simulator->Register_sim_event(Simulator->Time() + bookKeepingEntry->DieInterleavedTime,
					this, bookKeepingEntry, (int)NVDDR2_SimEventType::ERASE_SETUP_COMPLETED);
				break;
			default:
				PRINT_ERROR("NVMController_NVDDR2: Uknown flash transaction type!")
		}
		target_channel->SetStatus(BusChannelStatus::BUSY, chip);
	}

	inline void NVM_PHY_ONFI_NVDDR2::send_resume_command_to_chip(NVM::FlashMemory::Flash_Chip* chip, ChipBookKeepingEntry* chipBKE)
	{
		//DEBUG2("Chip " << chip->ChannelID << ", " << chip->ChipID << ": resume command " )
		for (unsigned int i = 0; i < die_no_per_chip; i++) {
			DieBookKeepingEntry *dieBKE = &chipBKE->Die_book_keeping_records[i];
			//Since the time required to send the resume command is very small, MQSim ignores it to simplify the simulation
			dieBKE->PrepareResume();
			chipBKE->PrepareResume();
			chip->Resume(dieBKE->ActiveCommand->Address[0].DieID);
			switch (dieBKE->ActiveCommand->CommandCode) {
				case CMD_READ_PAGE:
				case CMD_READ_PAGE_MULTIPLANE:
				case CMD_READ_PAGE_COPYBACK:
				case CMD_READ_PAGE_COPYBACK_MULTIPLANE:
					chipBKE->Status = ChipStatus::READING;
					break;
				case CMD_PROGRAM_PAGE:
				case CMD_PROGRAM_PAGE_MULTIPLANE:
				case CMD_PROGRAM_PAGE_COPYBACK:
				case CMD_PROGRAM_PAGE_COPYBACK_MULTIPLANE:
					chipBKE->Status = ChipStatus::WRITING;
					break;
				case CMD_ERASE_BLOCK:
				case CMD_ERASE_BLOCK_MULTIPLANE:
					chipBKE->Status = ChipStatus::ERASING;
					break;
			}

		}
	}
}

// Assembly:
subq $0x188, %rsp            # imm = 0x188
movq %rdi, 0x180(%rsp)
movq %rsi, 0x178(%rsp)
movq 0x180(%rsp), %rax
movq %rax, 0x90(%rsp)
movq 0x178(%rsp), %rax
movq 0x10(%rax), %rax
movq %rax, 0x170(%rsp)
movq 0x170(%rsp), %rdi
addq $0x8, %rdi
callq 0x7fe10
movq %rax, %rcx
movq 0x90(%rsp), %rax
movq (%rcx), %rcx
movl 0x38(%rcx), %ecx
movl %ecx, 0x16c(%rsp)
movq 0x88(%rax), %rax
movl 0x16c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq %rax, 0x160(%rsp)
movq 0x160(%rsp), %rax
movq 0x8(%rax), %rax
movq %rax, 0x88(%rsp)
movq 0x170(%rsp), %rdi
addq $0x8, %rdi
callq 0x7fe10
movq 0x88(%rsp), %rcx
movq %rax, %rdx
movq 0x90(%rsp), %rax
movq (%rdx), %rdx
movl 0x3c(%rdx), %edx
movq (%rcx,%rdx,8), %rcx
movq %rcx, 0x158(%rsp)
movq 0x90(%rax), %rax
movl 0x16c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x158(%rsp), %rcx
movl 0x30(%rcx), %ecx
shlq $0x7, %rcx
addq %rcx, %rax
movq %rax, 0x150(%rsp)
movq 0x178(%rsp), %rax
movl 0x18(%rax), %eax
movq %rax, 0x98(%rsp)
subq $0x4, %rax
ja 0x904e6
movq 0x98(%rsp), %rax
leaq 0x1e738(%rip), %rcx     # 0xae5e8
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movq 0x158(%rsp), %rdi
movq 0x170(%rsp), %rax
movq (%rax), %rsi
callq 0x91e50
movq 0x170(%rsp), %rax
addq $0x8, %rax
movq %rax, 0x148(%rsp)
movq 0x148(%rsp), %rdi
callq 0x7ff20
movq %rax, 0x140(%rsp)
movq 0x148(%rsp), %rdi
callq 0x5d430
movq %rax, 0x138(%rsp)
leaq 0x140(%rsp), %rdi
leaq 0x138(%rsp), %rsi
callq 0x80030
testb $0x1, %al
jne 0x8ff2a
jmp 0x8ff89
leaq 0x140(%rsp), %rdi
callq 0x7fda0
movq (%rax), %rax
movq %rax, 0x130(%rsp)
movq 0x170(%rsp), %rax
movq 0x50(%rax), %rax
movq %rax, 0x80(%rsp)
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq 0x80(%rsp), %rcx
subq %rax, %rcx
movq 0x130(%rsp), %rax
movq %rcx, 0x28(%rax)
leaq 0x140(%rsp), %rdi
callq 0x80050
jmp 0x8ff0f
movq 0x150(%rsp), %rdi
addq $0x28, %rdi
callq 0x91f40
movq 0x150(%rsp), %rax
movl 0x7c(%rax), %ecx
addl $0x1, %ecx
movl %ecx, 0x7c(%rax)
movq 0x150(%rsp), %rdi
addq $0x28, %rdi
callq 0x91aa0
cmpq $0x0, %rax
jbe 0x8fffa
movq 0x158(%rsp), %rax
movq %rax, 0x78(%rsp)
movq 0x150(%rsp), %rdi
addq $0x28, %rdi
callq 0x91f50
movq 0x90(%rsp), %rdi
movq 0x78(%rsp), %rsi
movq (%rax), %rdx
callq 0x90bb0
jmp 0x90b99
movq 0x150(%rsp), %rax
movl $0x4, (%rax)
movq 0x160(%rsp), %rdi
movq 0x158(%rsp), %rdx
movl $0x1, %esi
callq 0x91d60
jmp 0x90531
movq 0x158(%rsp), %rdi
movq 0x170(%rsp), %rax
movq (%rax), %rsi
callq 0x91e50
movq 0x170(%rsp), %rax
addq $0x8, %rax
movq %rax, 0x128(%rsp)
movq 0x128(%rsp), %rdi
callq 0x7ff20
movq %rax, 0x120(%rsp)
movq 0x128(%rsp), %rdi
callq 0x5d430
movq %rax, 0x118(%rsp)
leaq 0x120(%rsp), %rdi
leaq 0x118(%rsp), %rsi
callq 0x80030
testb $0x1, %al
jne 0x90098
jmp 0x900f1
leaq 0x120(%rsp), %rdi
callq 0x7fda0
movq %rax, 0x110(%rsp)
movq 0x170(%rsp), %rax
movq 0x50(%rax), %rax
movq %rax, 0x70(%rsp)
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq 0x70(%rsp), %rcx
subq %rax, %rcx
movq 0x110(%rsp), %rax
movq (%rax), %rax
movq %rcx, 0x28(%rax)
leaq 0x120(%rsp), %rdi
callq 0x80050
jmp 0x9007d
movq 0x150(%rsp), %rdi
addq $0x28, %rdi
callq 0x91f40
movq 0x150(%rsp), %rax
movl 0x7c(%rax), %ecx
addl $0x1, %ecx
movl %ecx, 0x7c(%rax)
movq 0x150(%rsp), %rdi
addq $0x28, %rdi
callq 0x91aa0
cmpq $0x0, %rax
jbe 0x90162
movq 0x158(%rsp), %rax
movq %rax, 0x68(%rsp)
movq 0x150(%rsp), %rdi
addq $0x28, %rdi
callq 0x91f50
movq 0x90(%rsp), %rdi
movq 0x68(%rsp), %rsi
movq (%rax), %rdx
callq 0x90bb0
jmp 0x90b99
movq 0x150(%rsp), %rax
movl $0x6, (%rax)
movq 0x160(%rsp), %rdi
movq 0x158(%rsp), %rdx
movl $0x1, %esi
callq 0x91d60
jmp 0x90531
movq 0x158(%rsp), %rdi
movq 0x170(%rsp), %rax
movq (%rax), %rsi
callq 0x91f60
movq 0x170(%rsp), %rax
addq $0x8, %rax
movq %rax, 0x108(%rsp)
movq 0x108(%rsp), %rdi
callq 0x7ff20
movq %rax, 0x100(%rsp)
movq 0x108(%rsp), %rdi
callq 0x5d430
movq %rax, 0xf8(%rsp)
leaq 0x100(%rsp), %rdi
leaq 0xf8(%rsp), %rsi
callq 0x80030
testb $0x1, %al
jne 0x90200
jmp 0x90259
leaq 0x100(%rsp), %rdi
callq 0x7fda0
movq %rax, 0xf0(%rsp)
movq 0x170(%rsp), %rax
movq 0x50(%rax), %rax
movq %rax, 0x60(%rsp)
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq 0x60(%rsp), %rcx
subq %rax, %rcx
movq 0xf0(%rsp), %rax
movq (%rax), %rax
movq %rcx, 0x28(%rax)
leaq 0x100(%rsp), %rdi
callq 0x80050
jmp 0x901e5
movq 0x150(%rsp), %rdi
addq $0x28, %rdi
callq 0x91f40
movq 0x150(%rsp), %rax
movl 0x7c(%rax), %ecx
addl $0x1, %ecx
movl %ecx, 0x7c(%rax)
movq 0x150(%rsp), %rdi
addq $0x28, %rdi
callq 0x91aa0
cmpq $0x0, %rax
jbe 0x902ca
movq 0x158(%rsp), %rax
movq %rax, 0x58(%rsp)
movq 0x150(%rsp), %rdi
addq $0x28, %rdi
callq 0x91f50
movq 0x90(%rsp), %rdi
movq 0x58(%rsp), %rsi
movq (%rax), %rdx
callq 0x90bb0
jmp 0x90b99
movq 0x150(%rsp), %rax
movl $0x5, (%rax)
movq 0x160(%rsp), %rdi
movq 0x158(%rsp), %rdx
movl $0x1, %esi
callq 0x91d60
jmp 0x90531
movq 0x158(%rsp), %rdi
movq 0x170(%rsp), %rax
movq (%rax), %rsi
callq 0x92050
movq 0x170(%rsp), %rax
movq 0x40(%rax), %rdi
movq 0x170(%rsp), %rax
movq (%rax), %rsi
callq 0x8fcc0
movq 0x90(%rsp), %rdi
movq 0x170(%rsp), %rax
movq 0x40(%rax), %rsi
callq 0x8bc80
movq 0x170(%rsp), %rdi
addq $0x8, %rdi
callq 0x7ff20
movq %rax, 0xe8(%rsp)
movq 0x170(%rsp), %rdi
addq $0x8, %rdi
callq 0x5d430
movq %rax, 0xe0(%rsp)
leaq 0xe8(%rsp), %rdi
leaq 0xe0(%rsp), %rsi
callq 0x80030
testb $0x1, %al
jne 0x90391
jmp 0x9040f
leaq 0xe8(%rsp), %rdi
callq 0x7fda0
movq (%rax), %rax
movq 0x170(%rsp), %rcx
cmpq 0x40(%rcx), %rax
jne 0x903f1
movq 0x170(%rsp), %rax
addq $0x8, %rax
movq %rax, 0x50(%rsp)
leaq 0xd8(%rsp), %rdi
leaq 0xe8(%rsp), %rsi
callq 0x7fc80
movq 0x50(%rsp), %rdi
movq 0xd8(%rsp), %rsi
callq 0x7fdc0
movq %rax, 0xd0(%rsp)
jmp 0x9040f
jmp 0x903f3
leaq 0xe8(%rsp), %rdi
xorl %esi, %esi
callq 0x91c50
movq %rax, 0xc8(%rsp)
jmp 0x9035d
movq 0x170(%rsp), %rax
movq $0x0, 0x40(%rax)
movq 0x170(%rsp), %rdi
addq $0x8, %rdi
callq 0x91c80
cmpq $0x0, %rax
jne 0x90443
movq 0x170(%rsp), %rdi
callq 0x92130
movq 0x150(%rsp), %rax
movl 0x78(%rax), %ecx
addl $-0x1, %ecx
movl %ecx, 0x78(%rax)
movq 0x150(%rsp), %rax
cmpl $0x0, 0x7c(%rax)
jne 0x90490
movq 0x150(%rsp), %rax
cmpl $0x0, 0x78(%rax)
jne 0x90480
movq 0x150(%rsp), %rax
movl $0x0, (%rax)
jmp 0x9048e
movq 0x150(%rsp), %rax
movl $0x7, (%rax)
jmp 0x90490
movq 0x150(%rsp), %rax
cmpl $0x0, (%rax)
jne 0x904ca
movq 0x170(%rsp), %rax
testb $0x1, 0x49(%rax)
je 0x904c8
movq 0x90(%rsp), %rdi
movq 0x158(%rsp), %rsi
movq 0x150(%rsp), %rdx
callq 0x92190
jmp 0x904ca
movq 0x160(%rsp), %rdi
movq 0x158(%rsp), %rdx
movl $0x1, %esi
callq 0x91d60
jmp 0x90531
movq 0x49b03(%rip), %rdi     # 0xd9ff0
leaq 0x1a3f4(%rip), %rsi     # 0xaa8e8
callq 0x8440
movq 0x49af0(%rip), %rdi     # 0xd9ff0
leaq 0x1e1a6(%rip), %rsi     # 0xae6ad
callq 0x8440
movq %rax, %rdi
movq 0x49a42(%rip), %rsi     # 0xd9f58
callq 0x8480
movq 0x49aae(%rip), %rdi     # 0xd9fd0
callq 0x84f0
movl $0x1, %edi
callq 0x8500
movq 0x90(%rsp), %rax
movq 0xb0(%rax), %rdi
movl 0x16c(%rsp), %eax
imulq $0x18, %rax, %rax
addq %rax, %rdi
callq 0x922f0
cmpq $0x0, %rax
jbe 0x9086d
movq 0x90(%rsp), %rax
movq 0xb0(%rax), %rdi
movl 0x16c(%rsp), %eax
imulq $0x18, %rax, %rax
addq %rax, %rdi
callq 0x92320
movq %rax, %rcx
movq 0x90(%rsp), %rax
movq (%rcx), %rcx
movq %rcx, 0xc0(%rsp)
movq 0x88(%rax), %rax
movl 0x16c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x8(%rax), %rax
movq %rax, 0x48(%rsp)
movq 0xc0(%rsp), %rdi
addq $0x8, %rdi
callq 0x7fe10
movq 0x48(%rsp), %rcx
movq %rax, %rdx
movq 0x90(%rsp), %rax
movq (%rdx), %rdx
movl 0x3c(%rdx), %edx
movq (%rcx,%rdx,8), %rcx
movq %rcx, 0x158(%rsp)
movq 0x90(%rax), %rax
movl 0x16c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x158(%rsp), %rcx
movl 0x30(%rcx), %ecx
shlq $0x7, %rcx
addq %rcx, %rax
movq %rax, 0xb8(%rsp)
movq 0xc0(%rsp), %rdi
addq $0x8, %rdi
callq 0x91c80
cmpq $0x1, %rax
jbe 0x90652
leaq 0x4a16b(%rip), %rax     # 0xda798
movq (%rax), %rcx
addq $0x1, %rcx
leaq 0x4a15d(%rip), %rax     # 0xda798
movq %rcx, (%rax)
movq 0xc0(%rsp), %rax
movq (%rax), %rax
movq $0x85111, (%rax)        # imm = 0x85111
jmp 0x9067c
leaq 0x4a157(%rip), %rax     # 0xda7b0
movq (%rax), %rcx
addq $0x1, %rcx
leaq 0x4a149(%rip), %rax     # 0xda7b0
movq %rcx, (%rax)
movq 0xc0(%rsp), %rax
movq (%rax), %rax
movq $0x8510, (%rax)         # imm = 0x8510
movq 0x158(%rsp), %rdi
callq 0x91cb0
movq 0xb8(%rsp), %rax
movl $0x1, (%rax)
callq 0x46500
movq %rax, 0x10(%rsp)
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq %rax, %rcx
movq 0x90(%rsp), %rax
movq %rcx, 0x8(%rsp)
movq 0x88(%rax), %rax
movl 0x16c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq %rax, 0x18(%rsp)
movq 0xc0(%rsp), %rdi
addq $0x8, %rdi
callq 0x91c80
movq 0x8(%rsp), %rsi
movq 0x10(%rsp), %rdi
movq 0x90(%rsp), %rdx
movq %rax, %rcx
movq 0x18(%rsp), %rax
addq 0x78(%rax,%rcx,8), %rsi
movq 0xc0(%rsp), %rcx
movl $0x3, %r8d
callq 0x46c60
movq 0xb8(%rsp), %rdi
addq $0x28, %rdi
leaq 0xc0(%rsp), %rsi
callq 0x91cf0
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq %rax, %rcx
movq 0x90(%rsp), %rax
movq %rcx, 0x28(%rsp)
movq 0x88(%rax), %rax
movl 0x16c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq %rax, 0x20(%rsp)
movq 0xc0(%rsp), %rdi
addq $0x8, %rdi
callq 0x91c80
movq 0x20(%rsp), %rcx
movq %rax, %rdx
movq 0x28(%rsp), %rax
addq 0x78(%rcx,%rdx,8), %rax
movq %rax, 0x40(%rsp)
movq 0x158(%rsp), %rax
movq %rax, 0x30(%rsp)
movq 0xc0(%rsp), %rax
movq (%rax), %rax
movq (%rax), %rax
movq %rax, 0x38(%rsp)
movq 0xc0(%rsp), %rax
movq (%rax), %rdi
addq $0x8, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x45760
movq 0x30(%rsp), %rdi
movq 0x38(%rsp), %rsi
movl 0x14(%rax), %edx
callq 0x457a0
movq 0x40(%rsp), %rcx
addq %rax, %rcx
movq 0xc0(%rsp), %rax
movq %rcx, 0x50(%rax)
movq 0xb8(%rsp), %rax
movq 0x10(%rax), %rax
movq 0xc0(%rsp), %rcx
cmpq 0x50(%rcx), %rax
jae 0x9081d
movq 0xc0(%rsp), %rax
movq 0x50(%rax), %rcx
movq 0xb8(%rsp), %rax
movq %rcx, 0x10(%rax)
movq 0x90(%rsp), %rax
movq 0xb0(%rax), %rdi
movl 0x16c(%rsp), %eax
imulq $0x18, %rax, %rax
addq %rax, %rdi
callq 0x92350
movq 0x90(%rsp), %rax
movq 0x88(%rax), %rax
movl 0x16c(%rsp), %ecx
movq (%rax,%rcx,8), %rdi
movq 0x158(%rsp), %rdx
xorl %esi, %esi
callq 0x91d60
jmp 0x90b99
movq 0x90(%rsp), %rax
movq 0xa8(%rax), %rdi
movl 0x16c(%rsp), %eax
imulq $0x108, %rax, %rax      # imm = 0x108
addq %rax, %rdi
addq $0x8, %rdi
callq 0x91c80
cmpq $0x0, %rax
jbe 0x90974
movq 0x90(%rsp), %rax
movq 0xa8(%rax), %rdi
movl 0x16c(%rsp), %eax
imulq $0x108, %rax, %rax      # imm = 0x108
addq %rax, %rdi
addq $0x8, %rdi
callq 0x7fe10
movq %rax, %rcx
movq 0x90(%rsp), %rax
movq (%rcx), %rcx
movq %rcx, 0xb0(%rsp)
movq 0xa8(%rax), %rdi
movl 0x16c(%rsp), %eax
imulq $0x108, %rax, %rax      # imm = 0x108
addq %rax, %rdi
callq 0x7f0a0
movq 0x90(%rsp), %rdi
movq 0x90(%rdi), %rax
movl 0x16c(%rsp), %ecx
movq (%rax,%rcx,8), %rsi
movq 0xb0(%rsp), %rax
movl 0x3c(%rax), %eax
shlq $0x7, %rax
addq %rax, %rsi
movq 0x90(%rdi), %rax
movl 0x16c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0xb0(%rsp), %rcx
movl 0x3c(%rcx), %ecx
shlq $0x7, %rcx
addq %rcx, %rax
movq 0x8(%rax), %rdx
movq 0xb0(%rsp), %rax
movl 0x40(%rax), %eax
imulq $0x68, %rax, %rax
addq %rax, %rdx
movq 0xb0(%rsp), %rcx
callq 0x92380
jmp 0x90b99
movq 0x90(%rsp), %rax
movq 0x98(%rax), %rdi
movl 0x16c(%rsp), %eax
imulq $0x108, %rax, %rax      # imm = 0x108
addq %rax, %rdi
addq $0x8, %rdi
callq 0x91c80
cmpq $0x0, %rax
jbe 0x90a7b
movq 0x90(%rsp), %rax
movq 0x98(%rax), %rdi
movl 0x16c(%rsp), %eax
imulq $0x108, %rax, %rax      # imm = 0x108
addq %rax, %rdi
addq $0x8, %rdi
callq 0x7fe10
movq %rax, %rcx
movq 0x90(%rsp), %rax
movq (%rcx), %rcx
movq %rcx, 0xa8(%rsp)
movq 0x98(%rax), %rdi
movl 0x16c(%rsp), %eax
imulq $0x108, %rax, %rax      # imm = 0x108
addq %rax, %rdi
callq 0x7f0a0
movq 0x90(%rsp), %rdi
movq 0x90(%rdi), %rax
movl 0x16c(%rsp), %ecx
movq (%rax,%rcx,8), %rsi
movq 0xa8(%rsp), %rax
movl 0x3c(%rax), %eax
shlq $0x7, %rax
addq %rax, %rsi
movq 0x90(%rdi), %rax
movl 0x16c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0xa8(%rsp), %rcx
movl 0x3c(%rcx), %ecx
shlq $0x7, %rcx
addq %rcx, %rax
movq 0x8(%rax), %rdx
movq 0xa8(%rsp), %rax
movl 0x40(%rax), %eax
imulq $0x68, %rax, %rax
addq %rax, %rdx
movq 0xa8(%rsp), %rcx
callq 0x92380
jmp 0x90b99
movq 0x90(%rsp), %rax
movq 0xa0(%rax), %rdi
movl 0x16c(%rsp), %eax
imulq $0x108, %rax, %rax      # imm = 0x108
addq %rax, %rdi
addq $0x8, %rdi
callq 0x91c80
cmpq $0x0, %rax
jbe 0x90b7f
movq 0x90(%rsp), %rax
movq 0xa0(%rax), %rdi
movl 0x16c(%rsp), %eax
imulq $0x108, %rax, %rax      # imm = 0x108
addq %rax, %rdi
addq $0x8, %rdi
callq 0x7fe10
movq %rax, %rcx
movq 0x90(%rsp), %rax
movq (%rcx), %rcx
movq %rcx, 0xa0(%rsp)
movq 0xa0(%rax), %rdi
movl 0x16c(%rsp), %eax
imulq $0x108, %rax, %rax      # imm = 0x108
addq %rax, %rdi
callq 0x7f0a0
movq 0x90(%rsp), %rdi
movq 0x90(%rdi), %rax
movl 0x16c(%rsp), %ecx
movq (%rax,%rcx,8), %rsi
movq 0xa0(%rsp), %rax
movl 0x3c(%rax), %eax
shlq $0x7, %rax
addq %rax, %rsi
movq 0x90(%rdi), %rax
movl 0x16c(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0xa0(%rsp), %rcx
movl 0x3c(%rcx), %ecx
shlq $0x7, %rcx
addq %rcx, %rax
movq 0x8(%rax), %rdx
movq 0xa0(%rsp), %rax
movl 0x40(%rax), %eax
imulq $0x68, %rax, %rax
addq %rax, %rdx
movq 0xa0(%rsp), %rcx
callq 0x92380
jmp 0x90b99
jmp 0x90b81
jmp 0x90b83
jmp 0x90b85
movq 0x90(%rsp), %rdi
movl 0x16c(%rsp), %esi
callq 0x8bd50
addq $0x188, %rsp            # imm = 0x188
retq
nopw %cs:(%rax,%rax)