// File: NishadSaraf[P]Championship-Simulator/src/main.cc
// Function: finish_warmup()
void finish_warmup()
{
    uint64_t elapsed_second = (uint64_t)(time(NULL) - start_time),
             elapsed_minute = elapsed_second / 60,
             elapsed_hour = elapsed_minute / 60;
    elapsed_minute -= elapsed_hour*60;
    elapsed_second -= (elapsed_hour*3600 + elapsed_minute*60);

    // reset core latency
    SCHEDULING_LATENCY = 6;
    EXEC_LATENCY = 1;
    PAGE_TABLE_LATENCY = 100;
    SWAP_LATENCY = 100000;

    cout << endl;
    for (uint32_t i=0; i<NUM_CPUS; i++) {
        cout << "Warmup complete CPU " << i << " instructions: " << ooo_cpu[i].num_retired << " cycles: " << current_core_cycle[i];
        cout << " (Simulation time: " << elapsed_hour << " hr " << elapsed_minute << " min " << elapsed_second << " sec) " << endl;

        ooo_cpu[i].begin_sim_cycle = current_core_cycle[i]; 
        ooo_cpu[i].begin_sim_instr = ooo_cpu[i].num_retired;

        // reset branch stats
        ooo_cpu[i].num_branch = 0;
        ooo_cpu[i].branch_mispredictions = 0;

        reset_cache_stats(i, &ooo_cpu[i].L1I);
        reset_cache_stats(i, &ooo_cpu[i].L1D);
        reset_cache_stats(i, &ooo_cpu[i].L2C);
        reset_cache_stats(i, &uncore.LLC);
    }
    cout << endl;

    // reset DRAM stats
    uncore.DRAM.RQ.ROW_BUFFER_HIT = 0;
    uncore.DRAM.RQ.ROW_BUFFER_MISS = 0;
    uncore.DRAM.WQ.ROW_BUFFER_HIT = 0;
    uncore.DRAM.WQ.ROW_BUFFER_MISS = 0;

    // set actual cache latency
    for (uint32_t i=0; i<NUM_CPUS; i++) {
        ooo_cpu[i].ITLB.LATENCY = ITLB_LATENCY;
        ooo_cpu[i].DTLB.LATENCY = DTLB_LATENCY;
        ooo_cpu[i].STLB.LATENCY = STLB_LATENCY;
        ooo_cpu[i].L1I.LATENCY  = L1I_LATENCY;
        ooo_cpu[i].L1D.LATENCY  = L1D_LATENCY;
        ooo_cpu[i].L2C.LATENCY  = L2C_LATENCY;
    }
    uncore.LLC.LATENCY = LLC_LATENCY;
}

// Assembly:
subq $0x28, %rsp
xorl %eax, %eax
movl %eax, %edi
callq 0x31d0
subq 0x1d0d4(%rip), %rax     # 0x29348
movq %rax, 0x20(%rsp)
movq 0x20(%rsp), %rax
movl $0x3c, %ecx
xorl %edx, %edx
divq %rcx
movq %rax, 0x18(%rsp)
movq 0x18(%rsp), %rax
movl $0x3c, %ecx
xorl %edx, %edx
divq %rcx
movq %rax, 0x10(%rsp)
imulq $0x3c, 0x10(%rsp), %rcx
movq 0x18(%rsp), %rax
subq %rcx, %rax
movq %rax, 0x18(%rsp)
imulq $0xe10, 0x10(%rsp), %rcx # imm = 0xE10
imulq $0x3c, 0x18(%rsp), %rax
addq %rax, %rcx
movq 0x20(%rsp), %rax
subq %rcx, %rax
movq %rax, 0x20(%rsp)
leaq 0x83bf6(%rip), %rax     # 0x8fed0
movl $0x6, (%rax)
leaq 0x83bed(%rip), %rax     # 0x8fed4
movl $0x1, (%rax)
movl $0x64, 0x1d061(%rip)    # 0x29358
movl $0x186a0, 0x1d05b(%rip) # imm = 0x186A0
movq 0x1ccc8(%rip), %rdi     # 0x28fd0
movq 0x1cca9(%rip), %rsi     # 0x28fb8
callq 0x3250
movl $0x0, 0xc(%rsp)
cmpl $0x1, 0xc(%rsp)
jae 0xc557
movq 0x1cca2(%rip), %rdi     # 0x28fd0
leaq 0x171f0(%rip), %rsi     # 0x23525
callq 0x3220
movq %rax, %rdi
movl 0xc(%rsp), %esi
callq 0x32c0
movq %rax, %rdi
leaq 0x171ea(%rip), %rsi     # 0x2353a
callq 0x3220
movq %rax, %rdi
movl 0xc(%rsp), %eax
movl %eax, %ecx
leaq 0x1eedb(%rip), %rax     # 0x2b240
imulq $0x64c80, %rcx, %rcx    # imm = 0x64C80
addq %rcx, %rax
movq 0x918(%rax), %rsi
callq 0x3080
movq %rax, %rdi
leaq 0x171c5(%rip), %rsi     # 0x2354a
callq 0x3220
movq %rax, %rdi
movl 0xc(%rsp), %eax
movl %eax, %ecx
leaq 0x83b26(%rip), %rax     # 0x8fec0
movq (%rax,%rcx,8), %rsi
callq 0x3080
movq 0x1cc26(%rip), %rdi     # 0x28fd0
leaq 0x171a3(%rip), %rsi     # 0x23554
callq 0x3220
movq %rax, %rdi
movq 0x10(%rsp), %rsi
callq 0x3080
movq %rax, %rdi
leaq 0x1719b(%rip), %rsi     # 0x23568
callq 0x3220
movq %rax, %rdi
movq 0x18(%rsp), %rsi
callq 0x3080
movq %rax, %rdi
leaq 0x17184(%rip), %rsi     # 0x2356d
callq 0x3220
movq %rax, %rdi
movq 0x20(%rsp), %rsi
callq 0x3080
movq %rax, %rdi
leaq 0x1716e(%rip), %rsi     # 0x23573
callq 0x3220
movq %rax, %rdi
movq 0x1cba4(%rip), %rsi     # 0x28fb8
callq 0x3250
movl 0xc(%rsp), %eax
movl %eax, %ecx
leaq 0x83a9a(%rip), %rax     # 0x8fec0
movq (%rax,%rcx,8), %rcx
movl 0xc(%rsp), %eax
movl %eax, %edx
leaq 0x1ee09(%rip), %rax     # 0x2b240
imulq $0x64c80, %rdx, %rdx    # imm = 0x64C80
addq %rdx, %rax
movq %rcx, 0x8c0(%rax)
movl 0xc(%rsp), %eax
movl %eax, %ecx
leaq 0x1edeb(%rip), %rax     # 0x2b240
imulq $0x64c80, %rcx, %rcx    # imm = 0x64C80
addq %rcx, %rax
movq 0x918(%rax), %rcx
movl 0xc(%rsp), %eax
movl %eax, %edx
leaq 0x1edcd(%rip), %rax     # 0x2b240
imulq $0x64c80, %rdx, %rdx    # imm = 0x64C80
addq %rdx, %rax
movq %rcx, 0x8c8(%rax)
movl 0xc(%rsp), %eax
movl %eax, %ecx
leaq 0x1edaf(%rip), %rax     # 0x2b240
imulq $0x64c80, %rcx, %rcx    # imm = 0x64C80
addq %rcx, %rax
movq $0x0, 0x3680(%rax)
movl 0xc(%rsp), %eax
movl %eax, %ecx
leaq 0x1ed8d(%rip), %rax     # 0x2b240
imulq $0x64c80, %rcx, %rcx    # imm = 0x64C80
addq %rcx, %rax
movq $0x0, 0x3688(%rax)
movl 0xc(%rsp), %edi
movl 0xc(%rsp), %eax
leaq 0x1ed69(%rip), %rsi     # 0x2b240
imulq $0x64c80, %rax, %rax    # imm = 0x64C80
addq %rax, %rsi
addq $0x34188, %rsi          # imm = 0x34188
callq 0xc0e0
movl 0xc(%rsp), %edi
movl 0xc(%rsp), %eax
leaq 0x1ed44(%rip), %rsi     # 0x2b240
imulq $0x64c80, %rax, %rax    # imm = 0x64C80
addq %rax, %rsi
addq $0x44530, %rsi          # imm = 0x44530
callq 0xc0e0
movl 0xc(%rsp), %edi
movl 0xc(%rsp), %eax
leaq 0x1ed1f(%rip), %rsi     # 0x2b240
imulq $0x64c80, %rax, %rax    # imm = 0x64C80
addq %rax, %rsi
addq $0x548d8, %rsi          # imm = 0x548D8
callq 0xc0e0
movl 0xc(%rsp), %edi
leaq 0x8399e(%rip), %rsi     # 0x8fee0
callq 0xc0e0
movl 0xc(%rsp), %eax
addl $0x1, %eax
movl %eax, 0xc(%rsp)
jmp 0xc31c
movq 0x1ca72(%rip), %rdi     # 0x28fd0
movq 0x1ca53(%rip), %rsi     # 0x28fb8
callq 0x3250
leaq 0x8396f(%rip), %rax     # 0x8fee0
movq $0x0, 0x1a320(%rax)
leaq 0x8395d(%rip), %rax     # 0x8fee0
movq $0x0, 0x1a328(%rax)
leaq 0x8394b(%rip), %rax     # 0x8fee0
movq $0x0, 0x18680(%rax)
leaq 0x83939(%rip), %rax     # 0x8fee0
movq $0x0, 0x18688(%rax)
movl $0x0, 0x8(%rsp)
cmpl $0x1, 0x8(%rsp)
jae 0xc69b
movl 0x8(%rsp), %eax
movl %eax, %ecx
leaq 0x1ec6e(%rip), %rax     # 0x2b240
imulq $0x64c80, %rcx, %rcx    # imm = 0x64C80
addq %rcx, %rax
movl $0x1, 0xaa1c(%rax)
movl 0x8(%rsp), %eax
movl %eax, %ecx
leaq 0x1ec4d(%rip), %rax     # 0x2b240
imulq $0x64c80, %rcx, %rcx    # imm = 0x64C80
addq %rcx, %rax
movl $0x1, 0x1adc4(%rax)
movl 0x8(%rsp), %eax
movl %eax, %ecx
leaq 0x1ec2c(%rip), %rax     # 0x2b240
imulq $0x64c80, %rcx, %rcx    # imm = 0x64C80
addq %rcx, %rax
movl $0x8, 0x2b16c(%rax)
movl 0x8(%rsp), %eax
movl %eax, %ecx
leaq 0x1ec0b(%rip), %rax     # 0x2b240
imulq $0x64c80, %rcx, %rcx    # imm = 0x64C80
addq %rcx, %rax
movl $0x1, 0x3b514(%rax)
movl 0x8(%rsp), %eax
movl %eax, %ecx
leaq 0x1ebea(%rip), %rax     # 0x2b240
imulq $0x64c80, %rcx, %rcx    # imm = 0x64C80
addq %rcx, %rax
movl $0x4, 0x4b8bc(%rax)
movl 0x8(%rsp), %eax
movl %eax, %ecx
leaq 0x1ebc9(%rip), %rax     # 0x2b240
imulq $0x64c80, %rcx, %rcx    # imm = 0x64C80
addq %rcx, %rax
movl $0x8, 0x5bc64(%rax)
movl 0x8(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x8(%rsp)
jmp 0xc5ba
leaq 0x8383e(%rip), %rax     # 0x8fee0
movl $0x14, 0x738c(%rax)
addq $0x28, %rsp
retq
nopw %cs:(%rax,%rax)