// File: /workspace/github_cpp_makefile_star2_O2/sopanpatra160[P]OOO_Superscalar_Processor_Simulator/cache.cc
// Function: cache::print_statistics()
void cache::print_statistics(){
	mr = (((float)num_miss_r+(float)num_miss_w)/((float)num_r+(float)num_w));
	unsigned int num_mem_traff = num_miss_r + num_miss_w + num_wb;
	//printf("\n%s","====== Simulation results (raw) ======\n");
	if(lev==1){
		printf("a. number of L%d reads: %d\n",lev,num_r);
		printf("b. number of L%d read misses: %d\n",lev,num_miss_r);
		printf("c. number of L%d writes: %d\n",lev,num_w);
		printf("d. number of L%d write misses: %d\n",lev,num_miss_w);
		printf("e. L%d miss rate: %.4f\n",lev,mr);
		printf("f. number of swaps:     %d\n",num_swap);
	}
	if(lev==0)
	{
			printf("g. number of victim cache writeback:     %d\n",num_wb_v);


	}

	if(lev==2){
		printf("h. number of L%d reads: %d\n",lev,num_r);
		printf("i. number of L%d read misses: %d\n",lev,num_miss_r);
		printf("j. number of L%d writes: %d\n",lev,num_w);
		printf("k. number of L%d write misses: %d\n",lev,num_miss_w);
		if(cs!=0)
			printf("l. L%d miss rate: %.4f\n",lev,mr);
		else
			printf("l. L%d miss rate: 0\n",lev);
		if(cs!=0)
			printf("m. number of L2 writeback: %d\n",num_wb);
		else
			printf("m. number of L2 writeback: 0\n");
			
		printf("%s %d\n","n. total memory traffic:",num_mem_traff);

	}

}

// Assembly:
pushq %rbp
pushq %rbx
pushq %rax
movq %rdi, %rbx
movl 0x84(%rdi), %ecx
cvtsi2ss %rcx, %xmm0
movl 0x8c(%rdi), %esi
cvtsi2ss %rsi, %xmm1
addss %xmm0, %xmm1
movl 0x80(%rdi), %edx
cvtsi2ss %rdx, %xmm0
movl 0x88(%rdi), %eax
cvtsi2ss %rax, %xmm2
movl 0x24(%rdi), %eax
addss %xmm0, %xmm2
divss %xmm2, %xmm1
movss %xmm1, 0x90(%rdi)
leal (%rsi,%rcx), %ebp
addl 0x74(%rdi), %ebp
cmpl $0x1, %eax
jne 0x242f
leaq 0x1c65(%rip), %rdi      # 0x4018
pushq $0x1
popq %rsi
xorl %eax, %eax
callq 0x1040
movl 0x24(%rbx), %esi
movl 0x84(%rbx), %edx
leaq 0x1c67(%rip), %rdi      # 0x4034
xorl %eax, %eax
callq 0x1040
movl 0x24(%rbx), %esi
movl 0x88(%rbx), %edx
leaq 0x1c72(%rip), %rdi      # 0x4056
xorl %eax, %eax
callq 0x1040
movl 0x24(%rbx), %esi
movl 0x8c(%rbx), %edx
leaq 0x1c78(%rip), %rdi      # 0x4073
xorl %eax, %eax
callq 0x1040
movl 0x24(%rbx), %esi
cvtss2sd 0x90(%rbx), %xmm0
leaq 0x1c82(%rip), %rdi      # 0x4096
movb $0x1, %al
callq 0x1040
movl 0x7c(%rbx), %esi
leaq 0x1c89(%rip), %rdi      # 0x40ae
xorl %eax, %eax
callq 0x1040
movl 0x24(%rbx), %eax
testl %eax, %eax
jne 0x2447
movl 0x78(%rbx), %esi
leaq 0x1c8d(%rip), %rdi      # 0x40ca
xorl %eax, %eax
callq 0x1040
movl 0x24(%rbx), %eax
cmpl $0x2, %eax
jne 0x24c9
movl 0x80(%rbx), %edx
leaq 0x1c9e(%rip), %rdi      # 0x40f7
pushq $0x2
popq %rsi
xorl %eax, %eax
callq 0x1040
movl 0x24(%rbx), %esi
movl 0x84(%rbx), %edx
leaq 0x1ca0(%rip), %rdi      # 0x4113
xorl %eax, %eax
callq 0x1040
movl 0x24(%rbx), %esi
movl 0x88(%rbx), %edx
leaq 0x1cab(%rip), %rdi      # 0x4135
xorl %eax, %eax
callq 0x1040
movl 0x24(%rbx), %esi
movl 0x8c(%rbx), %edx
leaq 0x1cb1(%rip), %rdi      # 0x4152
xorl %eax, %eax
callq 0x1040
cmpl $0x0, 0x14(%rbx)
movl 0x24(%rbx), %esi
je 0x24d0
cvtss2sd 0x90(%rbx), %xmm0
leaq 0x1cb5(%rip), %rdi      # 0x4175
movb $0x1, %al
callq 0x1040
jmp 0x24de
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
leaq 0x1cb6(%rip), %rdi      # 0x418d
xorl %eax, %eax
callq 0x1040
cmpl $0x0, 0x14(%rbx)
je 0x24f7
movl 0x74(%rbx), %esi
leaq 0x1cb4(%rip), %rdi      # 0x41a2
xorl %eax, %eax
callq 0x1040
jmp 0x2503
leaq 0x1cf4(%rip), %rdi      # 0x41f2
callq 0x1110
leaq 0x1cb7(%rip), %rdi      # 0x41c1
leaq 0x1cb7(%rip), %rsi      # 0x41c8
movl %ebp, %edx
xorl %eax, %eax
addq $0x8, %rsp
popq %rbx
popq %rbp
jmp 0x1040