// File: /workspace/github_cpp_makefile_star2_O3/jkingan[P]ladyheather/heathgps.cpp
// Function: show_prs_status(int, int, int)
int show_prs_status(int row,int col, int max_row)
{
int p_low, p_high;

   if(have_prs_lm) {
      if     (prs_lm == 0) vidstr(row,col, GREEN,       "PPS: ON,Unfilt ");
      else if(prs_lm == 1) vidstr(row,col, GREEN,       "PPS: ON,Filter ");
      else if(prs_lm == 2) vidstr(row,col, YELLOW,      "PPS: LOW=Locked");
      else if(prs_lm == 3) vidstr(row,col, YELLOW,      "PPS: HI=Locked ");
      else                 vidstr(row,col, RED,         "PPS: ???       ");
      if(++row > max_row) return row;
   }

   if(have_prs_st == 0) return row;

   if(prs_st[5] & 0x18) {
      if(prs_st[5] & 0x08) {
         vidstr(row,col, RED,    "EEPROM: WR ERR");
         if(++row > max_row) return row;
      }
      if(prs_st[5] & 0x10) {
         vidstr(row,col, RED,    "EEPROM: CORRUPT");
         if(++row > max_row) return row;
      }
   }
   else {
      vidstr(row,col, GREEN,  "EEPROM: OK    ");
      if(++row > max_row) return row;
   }

   if(prs_st[5] & 0x01) {
      vidstr(row,col, RED,    "Lamp restarted");
      if(++row > max_row) return row;
   }
   if(prs_st[5] & 0x02) {
      vidstr(row,col, RED,    "Watchdog error");
      if(++row > max_row) return row;
   }
   if(prs_st[5] & 0x04) {
      vidstr(row,col, RED,    "Interrupt err ");
      if(++row > max_row) return row;
   }
   if(prs_st[5] & 0x80) {
      vidstr(row,col, YELLOW, "Unit reset    ");
      if(++row > max_row) return row;
   }



   p_low = prs_st[0] & 0x05;
   p_high= prs_st[0] & 0x0A;
   if(have_prs_ep && (prs_ep == 0)) {
      vidstr(row,col, RED,       "Power: DISABLED");
   }
   else if(p_low || p_high) {
      if(p_low && p_high) vidstr(row,col, RED,         "Power:  BAD    ");
      else if(p_low)      vidstr(row,col, RED,         "Power:  LOW    ");
      else if(p_high)     vidstr(row,col, RED,         "Power:  HIGH   ");
      else                vidstr(row,col, RED,         "Power:  ???    ");
   }
   else vidstr(row,col, GREEN,       "Power:  OK     ");
   if(++row > max_row) return row;

   if(have_prs_fc2) {
      sprintf(out, "Cycles: %-7d", prs_pwr_cycles);
      vidstr(row,col, GREEN, out);
      if(++row > max_row) return row;

      sprintf(out, "FC wrt: %-7d", prs_fc_writes);
      vidstr(row,col, GREEN, out);
      if(++row > max_row) return row;
   }

   if     (prs_st[0] & 0x10) vidstr(row,col, RED,    "Light:  LOW   ");
   else if(prs_st[0] & 0x20) vidstr(row,col, RED,    "Light:  HIGH  ");
   else                      vidstr(row,col, GREEN,  "Light:  OK    ");
   if(++row > max_row) return row;

   if     (prs_st[0] & 0x40) vidstr(row,col, RED,    "GateV:  LOW   ");
   else if(prs_st[0] & 0x80) vidstr(row,col, RED,    "GateV:  HIGH  ");
   else                      vidstr(row,col, GREEN,  "GateV:  OK    ");
   if(++row > max_row) return row;



   if(prs_st[1] & 0x01) vidstr(row,col, RED,         "Synth:  UNLK  ");
   else                 vidstr(row,col, GREEN,       "Synth:  OK"   );
   if(++row > max_row) return row;

   if     (prs_st[1] & 0x02) vidstr(row,col, RED,    "RF VAR: LOW   ");
   else if(prs_st[1] & 0x04) vidstr(row,col, RED,    "RF VAR: HIGH  ");
   else                      vidstr(row,col, GREEN,  "RF VAR: OK    ");
   if(++row > max_row) return row;

   if     (prs_st[1] & 0x08) vidstr(row,col, RED,    "RF VCO: LOW   ");
   else if(prs_st[1] & 0x10) vidstr(row,col, RED,    "RF VCO: HIGH  ");
   else                      vidstr(row,col, GREEN,  "RF VCO: OK    ");
   if(++row > max_row) return row;

   if     (prs_st[1] & 0x20) vidstr(row,col, RED,    "RF AGC: LOW   ");
   else if(prs_st[1] & 0x40) vidstr(row,col, RED,    "RF AGC: HIGH  ");
   else                      vidstr(row,col, GREEN,  "RF AGC: OK    ");
   if(++row > max_row) return row;

   if(prs_st[1] & 0x80) {
      vidstr(row,col, RED,    "Bad PLL param  ");
      if(++row > max_row) return row;
   }


   if(prs_st[2]) {
      if(prs_st[2] & 0x03) {
         if     (prs_st[2] & 0x01) vidstr(row,col, RED,    "Lamp T: LOW   ");
         else if(prs_st[2] & 0x02) vidstr(row,col, RED,    "Lamp T: HIGH  ");
         if(++row > max_row) return row;
      }

      if(prs_st[2] & 0x0C) {
         if     (prs_st[2] & 0x04) vidstr(row,col, RED,    "Xtal T: LOW   ");
         else if(prs_st[2] & 0x08) vidstr(row,col, RED,    "Xtal T: HIGH  ");
         if(++row > max_row) return row;
      }

      if(prs_st[2] & 0x30) {
         if     (prs_st[2] & 0x10) vidstr(row,col, RED,    "Cell T: LOW   ");
         else if(prs_st[2] & 0x20) vidstr(row,col, RED,    "Cell T: HIGH  ");
         if(++row > max_row) return row;
      }

      if(prs_st[2] & 0xC0) {
         if     (prs_st[2] & 0x40) vidstr(row,col, RED,    "Case T: LOW   ");
         else if(prs_st[2] & 0x80) vidstr(row,col, RED,    "Case T: HIGH  ");
         if(++row > max_row) return row;
      }
   }
   else {
      vidstr(row,col, GREEN,  "Temps:  ALL OK");
      if(++row > max_row) return row;
   }



   if     (prs_st[3] & 0x01) vidstr(row,col, YELLOW, "FLL:    OFF   ");
   else                      vidstr(row,col, GREEN,  "FLL:    ON    ");
   if(++row > max_row) return row;

   if     (prs_st[3] & 0x02) vidstr(row,col, YELLOW, "F-Lock: DISABL");
   else                      vidstr(row,col, GREEN,  "F-Lock: ENABLE");
   if(++row > max_row) return row;

   if     (prs_st[3] & 0x04) vidstr(row,col, RED,    "EFC V:  LOW   ");
   else if(prs_st[3] & 0x08) vidstr(row,col, RED,    "EFC V:  HIGH  ");
   else                      vidstr(row,col, GREEN,  "EFC V:  OK    ");
   if(++row > max_row) return row;

   if     (prs_st[3] & 0x10) vidstr(row,col, RED,    "Cal V:  LOW   ");
   else if(prs_st[3] & 0x20) vidstr(row,col, RED,    "Cal V:  HIGH  ");
   else                      vidstr(row,col, GREEN,  "Cal V:  OK    ");
   if(++row > max_row) return row;



   if(prs_st[4] & 0x01) {
      vidstr(row,col, YELLOW, "PLL diaabled  ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x02) {
      vidstr(row,col, YELLOW, "PLL acquiring ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x04) {
      vidstr(row,col, GREEN,  "PLL active    ");
      if(++row > max_row) return row;
   }
   else {
      vidstr(row,col, YELLOW, "PLL inactive  ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x08) {
      vidstr(row,col, YELLOW, "PPS input err ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x10) {
      vidstr(row,col, YELLOW, "PPS input slow");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x20) {
      vidstr(row,col, YELLOW, "PLL restarted ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x40) {
      vidstr(row,col, RED,    "Fctrl saturate");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x80) {
      vidstr(row,col, YELLOW, "NO PPS input  ");
      if(++row > max_row) return row;
   }

   return row;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %edx, %r14d
movl %esi, %ebx
movl %edi, %r15d
leaq 0x1642f5(%rip), %rax    # 0x21aa8c
cmpl $0x0, (%rax)
je 0xb6819
leaq 0x164365(%rip), %rax    # 0x21ab08
movl (%rax), %eax
cmpq $0x3, %rax
ja 0xb67f3
leaq 0x69606(%rip), %rcx     # 0x11fdb8
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
leaq 0x721c7(%rip), %rcx     # 0x128989
jmp 0xb67e7
leaq 0x721de(%rip), %rcx     # 0x1289a9
jmp 0xb67d4
leaq 0x721e5(%rip), %rcx     # 0x1289b9
movl %r15d, %edi
movl %ebx, %esi
movl $0xe, %edx
jmp 0xb6804
leaq 0x721b2(%rip), %rcx     # 0x128999
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6804
leaq 0x721cf(%rip), %rcx     # 0x1289c9
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xb6f19
leaq 0x164268(%rip), %rax    # 0x21aa88
cmpl $0x0, (%rax)
je 0xb6f19
leaq 0x1642c0(%rip), %r13    # 0x21aaf0
movl 0x14(%r13), %eax
testb $0x18, %al
je 0xb6841
testb $0x8, %al
jne 0xb6868
movl %r15d, %r12d
jmp 0xb688f
leaq 0x721b0(%rip), %rcx     # 0x1289f8
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
callq 0xe787
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
movl %r12d, %r15d
jl 0xb68ba
jmp 0xb6f19
leaq 0x7216a(%rip), %rcx     # 0x1289d9
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xb6f16
movl 0x14(%r13), %eax
testb $0x10, %al
je 0xb68ba
leaq 0x7214e(%rip), %rcx     # 0x1289e8
movl %r12d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
movl %r15d, %r12d
jge 0xb6f19
movl 0x14(%r13), %eax
testb $0x1, %al
jne 0xb68c7
movl %r12d, %r15d
jmp 0xb68ef
leaq 0x72139(%rip), %rcx     # 0x128a07
movl %r12d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xb6f19
movl 0x14(%r13), %eax
testb $0x2, %al
jne 0xb68f8
movl %r15d, %r12d
jmp 0xb691f
leaq 0x72117(%rip), %rcx     # 0x128a16
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xb6f16
movl 0x14(%r13), %eax
testb $0x4, %al
jne 0xb6928
movl %r12d, %r15d
jmp 0xb6950
leaq 0x720f6(%rip), %rcx     # 0x128a25
movl %r12d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xb6f19
movl 0x14(%r13), %eax
testb %al, %al
jns 0xb697a
leaq 0x720d9(%rip), %rcx     # 0x128a34
movl %r15d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe787
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xb6f19
leaq 0x16415f(%rip), %rax    # 0x21aae0
cmpl $0x0, (%rax)
je 0xb699b
leaq 0x1641eb(%rip), %rax    # 0x21ab78
cmpl $0x0, (%rax)
jne 0xb699b
leaq 0x720aa(%rip), %rcx     # 0x128a43
jmp 0xb69ee
movl (%r13), %eax
testb $0xf, %al
je 0xb69ba
testb $0xa, %al
sete %cl
testb $0x5, %al
sete %dl
orb %cl, %dl
jne 0xb69cd
leaq 0x7209b(%rip), %rcx     # 0x128a53
jmp 0xb69ee
leaq 0x720d2(%rip), %rcx     # 0x128a93
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb69f8
testb $0x5, %al
je 0xb69da
leaq 0x7208b(%rip), %rcx     # 0x128a63
jmp 0xb69ee
testb $0xa, %al
je 0xb69e7
leaq 0x7208e(%rip), %rcx     # 0x128a73
jmp 0xb69ee
leaq 0x72095(%rip), %rcx     # 0x128a83
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xb6f16
leaq 0x164087(%rip), %rax    # 0x21aa98
cmpl $0x0, (%rax)
je 0xb6aa8
leaq 0x1640ff(%rip), %rax    # 0x21ab20
movl (%rax), %edx
leaq 0x2857f6(%rip), %r13    # 0x33c220
leaq 0x72072(%rip), %rsi     # 0x128aa3
movq %r13, %rdi
xorl %eax, %eax
callq 0x9060
movl %r12d, %edi
movl %ebx, %esi
movl $0xa, %edx
movq %r13, %rcx
callq 0xe787
leal 0x2(%r15), %r12d
cmpl %r14d, %r12d
jle 0xb6a5e
movl %r12d, %r15d
jmp 0xb6f19
leaq 0x1640bf(%rip), %rax    # 0x21ab24
movl (%rax), %edx
leaq 0x2857b2(%rip), %r13    # 0x33c220
leaq 0x7203b(%rip), %rsi     # 0x128ab0
movq %r13, %rdi
xorl %eax, %eax
callq 0x9060
movl %r12d, %edi
movl %ebx, %esi
movl $0xa, %edx
movq %r13, %rcx
callq 0xe787
addl $0x3, %r15d
movl %r15d, %r12d
cmpl %r14d, %r15d
leaq 0x16404e(%rip), %r13    # 0x21aaf0
jg 0xb6f19
movl (%r13), %eax
testb $0x10, %al
jne 0xb6ac7
testb $0x20, %al
jne 0xb6ad0
leaq 0x72020(%rip), %rcx     # 0x128adb
movl %r12d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6ae1
leaq 0x71fef(%rip), %rcx     # 0x128abd
jmp 0xb6ad7
leaq 0x71ff5(%rip), %rcx     # 0x128acc
movl %r12d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xb6f19
movl (%r13), %eax
testb $0x40, %al
jne 0xb6b13
testb %al, %al
js 0xb6b1c
leaq 0x72001(%rip), %rcx     # 0x128b08
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6b2d
leaq 0x71fd0(%rip), %rcx     # 0x128aea
jmp 0xb6b23
leaq 0x71fd6(%rip), %rcx     # 0x128af9
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x2(%r12), %r15d
cmpl %r14d, %r15d
jg 0xb6f19
testb $0x1, 0x4(%r13)
jne 0xb6b5a
leaq 0x71fd8(%rip), %rcx     # 0x128b26
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6b6b
leaq 0x71fb6(%rip), %rcx     # 0x128b17
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x3(%r12), %r15d
cmpl %r14d, %r15d
jg 0xb6f19
movl 0x4(%r13), %eax
testb $0x2, %al
jne 0xb6b9d
testb $0x4, %al
jne 0xb6ba6
leaq 0x71fbe(%rip), %rcx     # 0x128b4f
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6bb7
leaq 0x71f8d(%rip), %rcx     # 0x128b31
jmp 0xb6bad
leaq 0x71f93(%rip), %rcx     # 0x128b40
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x4(%r12), %r15d
cmpl %r14d, %r15d
jg 0xb6f19
movl 0x4(%r13), %eax
testb $0x8, %al
jne 0xb6be9
testb $0x10, %al
jne 0xb6bf2
leaq 0x71f9f(%rip), %rcx     # 0x128b7c
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6c03
leaq 0x71f6e(%rip), %rcx     # 0x128b5e
jmp 0xb6bf9
leaq 0x71f74(%rip), %rcx     # 0x128b6d
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x5(%r12), %r15d
cmpl %r14d, %r15d
jg 0xb6f19
movl 0x4(%r13), %eax
testb $0x20, %al
jne 0xb6c35
testb $0x40, %al
jne 0xb6c3e
leaq 0x71f80(%rip), %rcx     # 0x128ba9
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6c4f
leaq 0x71f4f(%rip), %rcx     # 0x128b8b
jmp 0xb6c45
leaq 0x71f55(%rip), %rcx     # 0x128b9a
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x6(%r12), %r15d
cmpl %r14d, %r15d
jg 0xb6f19
testb $-0x80, 0x4(%r13)
je 0xb6c8f
leaq 0x71f48(%rip), %rcx     # 0x128bb8
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
addl $0x7, %r12d
movl %r12d, %r15d
cmpl %r14d, %r12d
jg 0xb6f19
movl 0x8(%r13), %eax
testl %eax, %eax
je 0xb6cac
testb $0x3, %al
je 0xb6cd7
testb $0x1, %al
jne 0xb6cdc
testb $0x2, %al
je 0xb6cf2
leaq 0x71f2d(%rip), %rcx     # 0x128bd7
jmp 0xb6ce3
leaq 0x71f8d(%rip), %rcx     # 0x128c40
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
callq 0xe787
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
movl %r12d, %r15d
jl 0xb6dc2
jmp 0xb6f19
movl %r15d, %r12d
jmp 0xb6d03
leaq 0x71ee5(%rip), %rcx     # 0x128bc8
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xb6f16
movl 0x8(%r13), %eax
testb $0xc, %al
je 0xb6d18
testb $0x4, %al
jne 0xb6d1d
testb $0x8, %al
je 0xb6d33
leaq 0x71edf(%rip), %rcx     # 0x128bf5
jmp 0xb6d24
movl %r12d, %r15d
jmp 0xb6d45
leaq 0x71ec2(%rip), %rcx     # 0x128be6
movl %r12d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xb6f19
movl 0x8(%r13), %eax
testb $0x30, %al
je 0xb6d5a
testb $0x10, %al
jne 0xb6d5f
testb $0x20, %al
je 0xb6d75
leaq 0x71ebb(%rip), %rcx     # 0x128c13
jmp 0xb6d66
movl %r15d, %r12d
jmp 0xb6d86
leaq 0x71e9e(%rip), %rcx     # 0x128c04
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xb6f16
movl 0x8(%r13), %eax
testb $-0x40, %al
je 0xb6dc2
testb $0x40, %al
jne 0xb6d9b
testb %al, %al
jns 0xb6db1
leaq 0x71e98(%rip), %rcx     # 0x128c31
jmp 0xb6da2
leaq 0x71e80(%rip), %rcx     # 0x128c22
movl %r12d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
movl %r15d, %r12d
jge 0xb6f19
testb $0x1, 0xc(%r13)
jne 0xb6ddc
leaq 0x71e8e(%rip), %rcx     # 0x128c5e
movl %r12d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6ded
leaq 0x71e6c(%rip), %rcx     # 0x128c4f
movl %r12d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe787
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xb6f19
leaq 0x163ce9(%rip), %rax    # 0x21aaf0
testb $0x2, 0xc(%rax)
jne 0xb6e20
leaq 0x71e68(%rip), %rcx     # 0x128c7c
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6e31
leaq 0x71e46(%rip), %rcx     # 0x128c6d
movl %r15d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe787
leal 0x2(%r12), %r15d
cmpl %r14d, %r15d
jg 0xb6f19
leaq 0x163ca5(%rip), %rax    # 0x21aaf0
movl 0xc(%rax), %eax
testb $0x4, %al
jne 0xb6e69
testb $0x8, %al
jne 0xb6e72
leaq 0x71e4c(%rip), %rcx     # 0x128ca9
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6e83
leaq 0x71e1b(%rip), %rcx     # 0x128c8b
jmp 0xb6e79
leaq 0x71e21(%rip), %rcx     # 0x128c9a
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x3(%r12), %r15d
cmpl %r14d, %r15d
jg 0xb6f19
leaq 0x163c53(%rip), %rax    # 0x21aaf0
movl 0xc(%rax), %eax
testb $0x10, %al
jne 0xb6ebb
testb $0x20, %al
jne 0xb6ec4
leaq 0x71e27(%rip), %rcx     # 0x128cd6
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6ed5
leaq 0x71df6(%rip), %rcx     # 0x128cb8
jmp 0xb6ecb
leaq 0x71dfc(%rip), %rcx     # 0x128cc7
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x4(%r12), %r15d
cmpl %r14d, %r15d
jg 0xb6f19
leaq 0x163c05(%rip), %rax    # 0x21aaf0
movl 0x10(%rax), %eax
testb $0x1, %al
jne 0xb6ef7
movl %r15d, %r12d
jmp 0xb6f35
leaq 0x71de7(%rip), %rcx     # 0x128ce5
movl %r15d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe787
addl $0x5, %r12d
cmpl %r14d, %r12d
jle 0xb6f2b
movl %r12d, %r15d
movl %r15d, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0x163bbe(%rip), %rax    # 0x21aaf0
movl 0x10(%rax), %eax
testb $0x2, %al
jne 0xb6f3e
movl %r12d, %r15d
jmp 0xb6f68
leaq 0x71daf(%rip), %rcx     # 0x128cf4
movl %r12d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe787
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xb6f19
leaq 0x163b8b(%rip), %rax    # 0x21aaf0
movl 0x10(%rax), %eax
leal 0x1(%r15), %r12d
testb $0x4, %al
jne 0xb6f83
leaq 0x71d9b(%rip), %rcx     # 0x128d12
movl %r15d, %edi
movl %ebx, %esi
movl $0xe, %edx
jmp 0xb6f94
leaq 0x71d79(%rip), %rcx     # 0x128d03
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
callq 0xe787
cmpl %r14d, %r15d
jge 0xb6a56
leaq 0x163b47(%rip), %rax    # 0x21aaf0
movl 0x10(%rax), %eax
testb $0x8, %al
jne 0xb6fb5
movl %r12d, %r15d
jmp 0xb6fe2
leaq 0x71d65(%rip), %rcx     # 0x128d21
movl %r12d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe787
addl $0x2, %r15d
cmpl %r14d, %r12d
jge 0xb6f19
leaq 0x163b11(%rip), %rax    # 0x21aaf0
movl 0x10(%rax), %eax
testb $0x10, %al
jne 0xb6feb
movl %r15d, %r12d
jmp 0xb7018
leaq 0x71d3e(%rip), %rcx     # 0x128d30
movl %r15d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe787
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xb6f16
leaq 0x163adb(%rip), %rax    # 0x21aaf0
movl 0x10(%rax), %eax
testb $0x20, %al
jne 0xb7021
movl %r12d, %r15d
jmp 0xb704f
leaq 0x71d17(%rip), %rcx     # 0x128d3f
movl %r12d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe787
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xb6f19
leaq 0x163aa4(%rip), %rax    # 0x21aaf0
movl 0x10(%rax), %eax
testb $0x40, %al
jne 0xb7058
movl %r15d, %r12d
jmp 0xb7085
leaq 0x71cef(%rip), %rcx     # 0x128d4e
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe787
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xb6a56
leaq 0x163a6e(%rip), %rax    # 0x21aaf0
movl 0x10(%rax), %eax
testb %al, %al
jns 0xb6a56
leaq 0x71cc9(%rip), %rcx     # 0x128d5d
movl %r12d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe787
incl %r12d
jmp 0xb6a56