// File: /workspace/github_cpp_makefile_star2_O1/eniac[P]Mantis/src/compile/compile_c.cpp
// Function: generateMacroXorVersionBits(std::__cxx11::basic_ostringstream<char, std::char_traits<char>, std::allocator<char>>&, std::__cxx11::basic_ostringstream<char, std::char_traits<char>, std::allocator<char>>&, int, int)
void generateMacroXorVersionBits(ostringstream& oss_reaction_mirror, ostringstream& oss_preprocessor, int ing_iso_opt, int egr_iso_opt) {
    // Remember the current version bit values for reaction and measurement
    // We always pack field args and use mantis_mv_bit to index the replicas
    oss_reaction_mirror << "  static unsigned int __mantis__mv_ing = 0;\n";
    oss_reaction_mirror << "  static unsigned int __mantis__mv_egr = 0;\n";
    if(((unsigned int)ing_iso_opt) & 0b1) {
        // Create macros for flip version bit
        oss_preprocessor << "\n#define "
                        << "__mantis__flip_mv_ing "
                        << "__mantis__mv_ing=__mantis__mv_ing^0x1"
                        << "\n";        
    } 
    if (((unsigned int)ing_iso_opt) & 0b10) {
        oss_reaction_mirror << "  static unsigned int __mantis__vv_ing = 0x0;\n";
        oss_preprocessor << "\n#define "
                        << "__mantis__flip_vv_ing "
                        << "__mantis__vv_ing=__mantis__vv_ing^0x1"
                        << "\n";         
    }
    if(((unsigned int)egr_iso_opt) & 0b1) {
        oss_preprocessor << "\n#define "
                        << "__mantis__flip_mv_egr "
                        << "__mantis__mv_egr=__mantis__mv_egr^0x1"
                        << "\n";        
    } 
    if (((unsigned int)egr_iso_opt) & 0b10) {
        oss_reaction_mirror << "  static unsigned int __mantis__vv_egr = 0x0;\n";
        oss_preprocessor << "\n#define "
                        << "__mantis__flip_vv_egr "
                        << "__mantis__vv_egr=__mantis__vv_egr^0x1"
                        << "\n";         
    }    
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movl %ecx, %r15d
movl %edx, %r12d
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x328b1(%rip), %rsi     # 0x775b0
movl $0x2c, %edx
callq 0x2e440
leaq 0x328cd(%rip), %rsi     # 0x775dd
movl $0x2c, %edx
movq %r14, %rdi
callq 0x2e440
testb $0x1, %r12b
je 0x44d73
leaq 0x328e0(%rip), %rsi     # 0x7760a
movl $0x9, %edx
movq %rbx, %rdi
callq 0x2e440
leaq 0x328d6(%rip), %rsi     # 0x77614
movl $0x16, %edx
movq %rbx, %rdi
callq 0x2e440
leaq 0x328d9(%rip), %rsi     # 0x7762b
movl $0x25, %edx
movq %rbx, %rdi
callq 0x2e440
leaq 0x3105e(%rip), %rsi     # 0x75dc4
movl $0x1, %edx
movq %rbx, %rdi
callq 0x2e440
testb $0x2, %r12b
je 0x44ddd
leaq 0x328d1(%rip), %rsi     # 0x77651
movl $0x2e, %edx
movq %r14, %rdi
callq 0x2e440
leaq 0x32876(%rip), %rsi     # 0x7760a
movl $0x9, %edx
movq %rbx, %rdi
callq 0x2e440
leaq 0x328d8(%rip), %rsi     # 0x77680
movl $0x16, %edx
movq %rbx, %rdi
callq 0x2e440
leaq 0x328db(%rip), %rsi     # 0x77697
movl $0x25, %edx
movq %rbx, %rdi
callq 0x2e440
leaq 0x30ff4(%rip), %rsi     # 0x75dc4
movl $0x1, %edx
movq %rbx, %rdi
callq 0x2e440
testb $0x1, %r15b
je 0x44e33
leaq 0x32820(%rip), %rsi     # 0x7760a
movl $0x9, %edx
movq %rbx, %rdi
callq 0x2e440
leaq 0x328bf(%rip), %rsi     # 0x776bd
movl $0x16, %edx
movq %rbx, %rdi
callq 0x2e440
leaq 0x328c2(%rip), %rsi     # 0x776d4
movl $0x25, %edx
movq %rbx, %rdi
callq 0x2e440
leaq 0x30f9e(%rip), %rsi     # 0x75dc4
movl $0x1, %edx
movq %rbx, %rdi
callq 0x2e440
testb $0x2, %r15b
jne 0x44e42
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
leaq 0x328b1(%rip), %rsi     # 0x776fa
movl $0x2e, %edx
movq %r14, %rdi
callq 0x2e440
leaq 0x327ad(%rip), %rsi     # 0x7760a
movl $0x9, %edx
movq %rbx, %rdi
callq 0x2e440
leaq 0x328b8(%rip), %rsi     # 0x77729
movl $0x16, %edx
movq %rbx, %rdi
callq 0x2e440
leaq 0x328bb(%rip), %rsi     # 0x77740
movl $0x25, %edx
movq %rbx, %rdi
callq 0x2e440
leaq 0x30f2b(%rip), %rsi     # 0x75dc4
movl $0x1, %edx
movq %rbx, %rdi
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
jmp 0x2e440