// File: /workspace/github_c_makefile_star2_O0/enzo1982[P]smooth/libraries/libcpuid/cpuid_main.c
// Function: load_features_common
static void load_features_common(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
{
	const struct feature_map_t matchtable_edx1[] = {
		{  0, CPU_FEATURE_FPU },
		{  1, CPU_FEATURE_VME },
		{  2, CPU_FEATURE_DE },
		{  3, CPU_FEATURE_PSE },
		{  4, CPU_FEATURE_TSC },
		{  5, CPU_FEATURE_MSR },
		{  6, CPU_FEATURE_PAE },
		{  7, CPU_FEATURE_MCE },
		{  8, CPU_FEATURE_CX8 },
		{  9, CPU_FEATURE_APIC },
		{ 11, CPU_FEATURE_SEP },
		{ 12, CPU_FEATURE_MTRR },
		{ 13, CPU_FEATURE_PGE },
		{ 14, CPU_FEATURE_MCA },
		{ 15, CPU_FEATURE_CMOV },
		{ 16, CPU_FEATURE_PAT },
		{ 17, CPU_FEATURE_PSE36 },
		{ 19, CPU_FEATURE_CLFLUSH },
		{ 23, CPU_FEATURE_MMX },
		{ 24, CPU_FEATURE_FXSR },
		{ 25, CPU_FEATURE_SSE },
		{ 26, CPU_FEATURE_SSE2 },
		{ 28, CPU_FEATURE_HT },
	};
	const struct feature_map_t matchtable_ecx1[] = {
		{  0, CPU_FEATURE_PNI },
		{  1, CPU_FEATURE_PCLMUL },
		{  3, CPU_FEATURE_MONITOR },
		{  9, CPU_FEATURE_SSSE3 },
		{ 12, CPU_FEATURE_FMA3 },
		{ 13, CPU_FEATURE_CX16 },
		{ 19, CPU_FEATURE_SSE4_1 },
		{ 20, CPU_FEATURE_SSE4_2 },
		{ 22, CPU_FEATURE_MOVBE },
		{ 23, CPU_FEATURE_POPCNT },
		{ 25, CPU_FEATURE_AES },
		{ 26, CPU_FEATURE_XSAVE },
		{ 27, CPU_FEATURE_OSXSAVE },
		{ 28, CPU_FEATURE_AVX },
		{ 29, CPU_FEATURE_F16C },
		{ 30, CPU_FEATURE_RDRAND },
		{ 31, CPU_FEATURE_HYPERVISOR },
	};
	const struct feature_map_t matchtable_ebx7[] = {
		{  3, CPU_FEATURE_BMI1 },
		{  5, CPU_FEATURE_AVX2 },
		{  8, CPU_FEATURE_BMI2 },
		{ 18, CPU_FEATURE_RDSEED },
		{ 19, CPU_FEATURE_ADX },
		{ 29, CPU_FEATURE_SHA_NI },
	};
	const struct feature_map_t matchtable_edx81[] = {
		{ 11, CPU_FEATURE_SYSCALL },
		{ 27, CPU_FEATURE_RDTSCP },
		{ 29, CPU_FEATURE_LM },
	};
	const struct feature_map_t matchtable_ecx81[] = {
		{  0, CPU_FEATURE_LAHF_LM },
		{  5, CPU_FEATURE_ABM },
	};
	const struct feature_map_t matchtable_edx87[] = {
		{  8, CPU_FEATURE_CONSTANT_TSC },
	};
	if (raw->basic_cpuid[0][EAX] >= 1) {
		match_features(matchtable_edx1, COUNT_OF(matchtable_edx1), raw->basic_cpuid[1][EDX], data);
		match_features(matchtable_ecx1, COUNT_OF(matchtable_ecx1), raw->basic_cpuid[1][ECX], data);
	}
	if (raw->basic_cpuid[0][EAX] >= 7) {
		match_features(matchtable_ebx7, COUNT_OF(matchtable_ebx7), raw->basic_cpuid[7][EBX], data);
	}
	if (raw->ext_cpuid[0][EAX] >= 0x80000001) {
		match_features(matchtable_edx81, COUNT_OF(matchtable_edx81), raw->ext_cpuid[1][EDX], data);
		match_features(matchtable_ecx81, COUNT_OF(matchtable_ecx81), raw->ext_cpuid[1][ECX], data);
	}
	if (raw->ext_cpuid[0][EAX] >= 0x80000007) {
		match_features(matchtable_edx87, COUNT_OF(matchtable_edx87), raw->ext_cpuid[7][EDX], data);
	}
	if (data->flags[CPU_FEATURE_SSE]) {
		/* apply guesswork to check if the SSE unit width is 128 bit */
		switch (data->vendor) {
			case VENDOR_AMD:
				data->sse_size = (data->ext_family >= 16 && data->ext_family != 17) ? 128 : 64;
				break;
			case VENDOR_INTEL:
				data->sse_size = (data->family == 6 && data->ext_model >= 15) ? 128 : 64;
				break;
			default:
				break;
		}
		/* leave the CPU_FEATURE_128BIT_SSE_AUTH 0; the advanced per-vendor detection routines
		 * will set it accordingly if they detect the needed bit */
	}
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x1d0, %rsp            # imm = 0x1D0
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
leaq -0xd0(%rbp), %rdi
leaq 0x71d4f(%rip), %rsi     # 0x1a70a0
movl $0xb8, %edx
callq 0x593a0
leaq -0x160(%rbp), %rdi
leaq 0x71df7(%rip), %rsi     # 0x1a7160
movl $0x88, %edx
callq 0x593a0
leaq -0x190(%rbp), %rdi
leaq 0x71e6f(%rip), %rsi     # 0x1a71f0
movl $0x30, %edx
callq 0x593a0
movq 0x71e8e(%rip), %rax     # 0x1a7220
movq %rax, -0x1b0(%rbp)
movq 0x71e88(%rip), %rax     # 0x1a7228
movq %rax, -0x1a8(%rbp)
movq 0x71e82(%rip), %rax     # 0x1a7230
movq %rax, -0x1a0(%rbp)
movq 0x72d74(%rip), %rax     # 0x1a8130
movq %rax, -0x1c0(%rbp)
movq 0x72d6e(%rip), %rax     # 0x1a8138
movq %rax, -0x1b8(%rbp)
movq 0x71f48(%rip), %rax     # 0x1a7320
movq %rax, -0x1c8(%rbp)
movq -0x8(%rbp), %rax
cmpl $0x1, (%rax)
jb 0x135420
leaq -0xd0(%rbp), %rdi
movq -0x8(%rbp), %rax
movl 0x1c(%rax), %edx
movq -0x10(%rbp), %rcx
movl $0x17, %esi
callq 0x135600
leaq -0x160(%rbp), %rdi
movq -0x8(%rbp), %rax
movl 0x18(%rax), %edx
movq -0x10(%rbp), %rcx
movl $0x11, %esi
callq 0x135600
movq -0x8(%rbp), %rax
cmpl $0x7, (%rax)
jb 0x135445
leaq -0x190(%rbp), %rdi
movq -0x8(%rbp), %rax
movl 0x74(%rax), %edx
movq -0x10(%rbp), %rcx
movl $0x6, %esi
callq 0x135600
movq -0x8(%rbp), %rax
cmpl $0x80000001, 0x200(%rax) # imm = 0x80000001
jb 0x135493
leaq -0x1b0(%rbp), %rdi
movq -0x8(%rbp), %rax
movl 0x21c(%rax), %edx
movq -0x10(%rbp), %rcx
movl $0x3, %esi
callq 0x135600
leaq -0x1c0(%rbp), %rdi
movq -0x8(%rbp), %rax
movl 0x218(%rax), %edx
movq -0x10(%rbp), %rcx
movl $0x2, %esi
callq 0x135600
movq -0x8(%rbp), %rax
cmpl $0x80000007, 0x200(%rax) # imm = 0x80000007
jb 0x1354c2
leaq -0x1c8(%rbp), %rdi
movq -0x8(%rbp), %rax
movl 0x27c(%rax), %edx
movq -0x10(%rbp), %rcx
movl $0x1, %esi
callq 0x135600
movq -0x10(%rbp), %rax
cmpb $0x0, 0x6f(%rax)
je 0x13558e
movq -0x10(%rbp), %rax
movl 0x54(%rax), %eax
movl %eax, -0x1cc(%rbp)
testl %eax, %eax
je 0x13553f
jmp 0x1354e3
movl -0x1cc(%rbp), %eax
subl $0x1, %eax
jne 0x13558a
jmp 0x1354f4
movq -0x10(%rbp), %rcx
xorl %eax, %eax
cmpl $0x10, 0xe4(%rcx)
movb %al, -0x1cd(%rbp)
jl 0x13551d
movq -0x10(%rbp), %rax
cmpl $0x11, 0xe4(%rax)
setne %al
movb %al, -0x1cd(%rbp)
movb -0x1cd(%rbp), %dl
movl $0x40, %ecx
movl $0x80, %eax
testb $0x1, %dl
cmovnel %eax, %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x190(%rax)
jmp 0x13558c
movq -0x10(%rbp), %rcx
xorl %eax, %eax
cmpl $0x6, 0xd8(%rcx)
movb %al, -0x1ce(%rbp)
jne 0x135568
movq -0x10(%rbp), %rax
cmpl $0xf, 0xe8(%rax)
setge %al
movb %al, -0x1ce(%rbp)
movb -0x1ce(%rbp), %dl
movl $0x40, %ecx
movl $0x80, %eax
testb $0x1, %dl
cmovnel %eax, %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x190(%rax)
jmp 0x13558c
jmp 0x13558c
jmp 0x13558e
addq $0x1d0, %rsp            # imm = 0x1D0
popq %rbp
retq
nopw (%rax,%rax)