// File: /workspace/github_c_makefile_star2_O3/samtools[P]htslib/htscodecs/htscodecs/rANS_static32x16pr_avx512.c
// Function: rans_compress_O1_32x16_avx512
unsigned char *rans_compress_O1_32x16_avx512(unsigned char *in,
                                             unsigned int in_size,
                                             unsigned char *out,
                                             unsigned int *out_size) {
    unsigned char *cp, *out_end, *out_free = NULL;
    unsigned int tab_size;
    uint32_t bound = rans_compress_bound_4x16(in_size,1)-20;
    int z;
    RansState ransN[32] __attribute__((aligned(64)));

    if (in_size < 32) // force O0 instead
        return NULL;

    if (!out) {
        *out_size = bound;
        out = malloc(*out_size);
    }
    if (!out || bound > *out_size)
        return NULL;

    if (((size_t)out)&1)
        bound--;
    out_end = out + bound;

    RansEncSymbol (*syms)[256] = htscodecs_tls_alloc(256 * (sizeof(*syms)));
    if (!syms) {
        free(out_free);
        return NULL;
    }

    cp = out;
    int shift = encode_freq1(in, in_size, 32, syms, &cp);
    if (shift < 0) {
        free(out_free);
        htscodecs_tls_free(syms);
        return NULL;
    }
    tab_size = cp - out;

    for (z = 0; z < 32; z++)
      RansEncInit(&ransN[z]);

    uint8_t* ptr = out_end;

    int iN[32] __attribute__((aligned(64)));
    int isz4 = in_size/32;
    for (z = 0; z < 32; z++)
        iN[z] = (z+1)*isz4-2;

    uint32_t lN[32] __attribute__((aligned(64)));
    for (z = 0; z < 32; z++)
        lN[z] = in[iN[z]+1];

    // Deal with the remainder
    z = 32-1;
    lN[z] = in[in_size-1];
    for (iN[z] = in_size-2; iN[z] > 32*isz4-2; iN[z]--) {
        unsigned char c = in[iN[z]];
        RansEncPutSymbol(&ransN[z], &ptr, &syms[c][lN[z]]);
        lN[z] = c;
    }

    LOAD512(Rv, ransN);

    uint16_t *ptr16 = (uint16_t *)ptr;
    LOAD512(iN, iN);
    LOAD512(last, lN);

    __m512i c1 = _mm512_i32gather_epi32x1(iN1, in);
    __m512i c2 = _mm512_i32gather_epi32x1(iN2, in);

    // We cache the next 64-bytes locally and transpose.
    // This means we can load 32 ints from t32[x] with load instructions
    // instead of gathers.  The copy, transpose and expand is easier done
    // in scalar code.
#define BATCH 64
    uint8_t t32[BATCH][32] __attribute__((aligned(64)));
    int next_batch;
    if (iN[0] > BATCH) {
        int i, j;
        for (i = 0; i < BATCH; i++)
            // memcpy(c[i], &in[iN[i]-32], 32); fast mode
            for (j = 0; j < 32; j++)
                t32[BATCH-1-i][j] = in[iN[j]-1-i];
        next_batch = BATCH;
    } else {
        next_batch = -1;
    }

    for (; iN[0] >= 0; iN[0]--) {
        // Note, consider doing the same approach for the AVX2 encoder.
        // Maybe we can also get gather working well there?
        // Gather here is still a major latency bottleneck, consuming
        // around 40% of CPU cycles overall.

        // FIXME: maybe we need to cope with in[31] read over-flow
        // on loop cycles 0, 1, 2 where gather reads 32-bits instead of
        // 8 bits.  Use set instead there on c2?

        // index into syms[0][0] array, used for x_max, rcp_freq, and bias
        __m512i vidx1 = _mm512_slli_epi32(c1, 8);
        __m512i vidx2 = _mm512_slli_epi32(c2, 8);
        vidx1 = _mm512_add_epi32(vidx1, last1);
        vidx2 = _mm512_add_epi32(vidx2, last2);
        vidx1 = _mm512_slli_epi32(vidx1, 2);
        vidx2 = _mm512_slli_epi32(vidx2, 2);

        // ------------------------------------------------------------
        //      for (z = NX-1; z >= 0; z--) {
        //          if (ransN[z] >= x_max[z]) {
        //              *--ptr16 = ransN[z] & 0xffff;
        //              ransN[z] >>= 16;
        //          }
        //      }

#define SET512x(a,x) \
        __m512i a##1 = _mm512_i32gather_epi32x(vidx1, &syms[0][0].x, 4); \
        __m512i a##2 = _mm512_i32gather_epi32x(vidx2, &syms[0][0].x, 4)

        // Start of next loop, moved here to remove latency.
        // last[z] = c[z]
        // iN[z]--
        // c[z] = in[iN[z]]
        last1 = c1;
        last2 = c2;
        iN1 = _mm512_sub_epi32(iN1, _mm512_set1_epi32(1));
        iN2 = _mm512_sub_epi32(iN2, _mm512_set1_epi32(1));

        // Code below is equivalent to this:
        // c1 = _mm512_i32gather_epi32(iN1, in, 1);
        // c2 = _mm512_i32gather_epi32(iN2, in, 1);

        // Better when we have a power of 2
        if (next_batch >= 0) {
            if (--next_batch < 0 && iN[0] > BATCH) {
                // Load 32 BATCH blocks of data.
                // Executed once every BATCH cycles
                int i, j;
                uint8_t c[32][BATCH];
                iN[0] += BATCH;
                for (j = 0; j < 32; j++) {
                    iN[j] -= BATCH;
                    memcpy(c[j], &in[iN[j]-BATCH], BATCH);
                }
                // transpose matrix from 32xBATCH to BATCHx32
                for (j = 0; j < 32; j++) {
                    for (i = 0; i < BATCH; i+=16) {
                        int z;
                        for (z = 0; z < 16; z++)
                            t32[i+z][j] = c[j][i+z];
                    }
                }
                next_batch = BATCH-1;
            }
            if (next_batch >= 0) {
                // Copy from our of our pre-loaded BATCHx32 tables
                // Executed every cycles
                __m128i c1_ = _mm_load_si128((__m128i *)&t32[next_batch][0]);
                __m128i c2_ = _mm_load_si128((__m128i *)&t32[next_batch][16]);
                c1 = _mm512_cvtepu8_epi32(c1_);
                c2 = _mm512_cvtepu8_epi32(c2_);
            }
        }

        if (next_batch < 0 && iN[0]) {
            // no pre-loaded data as within BATCHx32 of input end
            c1 = _mm512_i32gather_epi32x1(iN1, in);
            c2 = _mm512_i32gather_epi32x1(iN2, in);

            // Speeds up clang, even though not needed any more.
            // Harmless to leave here.
            c1 = _mm512_and_si512(c1, _mm512_set1_epi32(0xff));
            c2 = _mm512_and_si512(c2, _mm512_set1_epi32(0xff));
        }
        // End of "equivalent to" code block

        SET512x(xmax, x_max); // high latency

        uint16_t gt_mask1 = _mm512_cmpgt_epi32_mask(Rv1, xmax1);
        int pc1 = _mm_popcnt_u32(gt_mask1);
        __m512i Rp1 = _mm512_and_si512(Rv1, _mm512_set1_epi32(0xffff));
        __m512i Rp2 = _mm512_and_si512(Rv2, _mm512_set1_epi32(0xffff));
        uint16_t gt_mask2 = _mm512_cmpgt_epi32_mask(Rv2, xmax2);
        SET512x(SDv, cmpl_freq); // good
        int pc2 = _mm_popcnt_u32(gt_mask2);

        Rp1 = _mm512_maskz_compress_epi32(gt_mask1, Rp1);
        Rp2 = _mm512_maskz_compress_epi32(gt_mask2, Rp2);

        _mm512_mask_cvtepi32_storeu_epi16(ptr16-pc2, (1<<pc2)-1, Rp2);
        ptr16 -= pc2;
        _mm512_mask_cvtepi32_storeu_epi16(ptr16-pc1, (1<<pc1)-1, Rp1);
        ptr16 -= pc1;

        Rv1 = _mm512_mask_srli_epi32(Rv1, gt_mask1, Rv1, 16);
        Rv2 = _mm512_mask_srli_epi32(Rv2, gt_mask2, Rv2, 16);

        // ------------------------------------------------------------
        // uint32_t q = (uint32_t) (((uint64_t)ransN[z] * rcp_freq[z])
        //                          >> rcp_shift[z]);
        // ransN[z] = ransN[z] + bias[z] + q * cmpl_freq[z];
        SET512x(rfv, rcp_freq); // good-ish

        __m512i rf1_hm = _mm512_mul_epu32(_mm512_srli_epi64(Rv1, 32),
                                          _mm512_srli_epi64(rfv1, 32));
        __m512i rf2_hm = _mm512_mul_epu32(_mm512_srli_epi64(Rv2, 32),
                                          _mm512_srli_epi64(rfv2, 32));
        __m512i rf1_lm = _mm512_srli_epi64(_mm512_mul_epu32(Rv1, rfv1), 32);
        __m512i rf2_lm = _mm512_srli_epi64(_mm512_mul_epu32(Rv2, rfv2), 32);

        const __m512i top32 = _mm512_set1_epi64((uint64_t)0xffffffff00000000);
        rf1_hm = _mm512_and_epi32(rf1_hm, top32);
        rf2_hm = _mm512_and_epi32(rf2_hm, top32);
        rfv1 = _mm512_or_epi32(rf1_lm, rf1_hm);
        rfv2 = _mm512_or_epi32(rf2_lm, rf2_hm);

        SET512x(biasv, bias); // good
        __m512i shiftv1 = _mm512_srli_epi32(SDv1, 16);
        __m512i shiftv2 = _mm512_srli_epi32(SDv2, 16);

        shiftv1 = _mm512_sub_epi32(shiftv1, _mm512_set1_epi32(32));
        shiftv2 = _mm512_sub_epi32(shiftv2, _mm512_set1_epi32(32));

        __m512i qv1 = _mm512_srlv_epi32(rfv1, shiftv1);
        __m512i qv2 = _mm512_srlv_epi32(rfv2, shiftv2);

        const __m512i bot16 = _mm512_set1_epi32(0xffff);
        qv1 = _mm512_mullo_epi32(qv1, _mm512_and_si512(SDv1, bot16));
        qv2 = _mm512_mullo_epi32(qv2, _mm512_and_si512(SDv2, bot16));

        qv1 = _mm512_add_epi32(qv1, biasv1);
        Rv1 = _mm512_add_epi32(Rv1, qv1);

        qv2 = _mm512_add_epi32(qv2, biasv2);
        Rv2 = _mm512_add_epi32(Rv2, qv2);
    }

    STORE512(Rv, ransN);
    STORE512(last, lN);

    ptr = (uint8_t *)ptr16;

    for (z = 32-1; z>=0; z--)
        RansEncPutSymbol(&ransN[z], &ptr, &syms[0][lN[z]]);

    for (z = 32-1; z >= 0; z--)
        RansEncFlush(&ransN[z], &ptr);

    // Finalise block size and return it
    *out_size = (out_end - ptr) + tab_size;

//    cp = out;
//    *cp++ = (in_size>> 0) & 0xff;
//    *cp++ = (in_size>> 8) & 0xff;
//    *cp++ = (in_size>>16) & 0xff;
//    *cp++ = (in_size>>24) & 0xff;

    memmove(out + tab_size, ptr, out_end-ptr);

    htscodecs_tls_free(syms);
    return out;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
andq $-0x40, %rsp
subq $0x1480, %rsp           # imm = 0x1480
movq %rcx, %rbx
movq %rdx, %r15
movl %esi, %r14d
movq %rdi, %r13
movl %esi, %edi
movl $0x1, %esi
callq 0x61e28
cmpl $0x20, %r14d
jb 0x70242
movl %eax, %ecx
movq %rbx, 0x110(%rsp)
leal -0x14(%rcx), %ebx
testq %r15, %r15
je 0x6df71
movq 0x110(%rsp), %rax
cmpl (%rax), %ebx
jbe 0x6df9a
jmp 0x70242
movq 0x110(%rsp), %rax
movl %ebx, (%rax)
movl %ebx, %edi
movq %r14, %r15
movq %rcx, %r14
callq 0x4680
movq %r14, %rcx
movq %r15, %r14
movq %rax, %r15
testq %rax, %rax
je 0x70242
addl $-0x15, %ecx
testb $0x1, %r15b
cmovel %ebx, %ecx
movq %rcx, 0x108(%rsp)
movl $0x100000, %edi         # imm = 0x100000
callq 0x7e144
testq %rax, %rax
je 0x70242
movq %rax, 0x38(%rsp)
movl $0x100, %edi            # imm = 0x100
movl $0x400, %esi            # imm = 0x400
callq 0x7e245
testq %rax, %rax
je 0x70238
movq %rax, 0x40(%rsp)
leaq 0x440(%rsp), %rdi
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
movl %r14d, %ebx
movq %r14, %rax
leaq (%rbx,%r13), %r14
movq %rax, 0x30(%rsp)
cmpl $0x7a120, %eax          # imm = 0x7A120
jbe 0x6e170
movl $0x100, %edi            # imm = 0x100
movl $0x40c, %esi            # imm = 0x40C
callq 0x7e245
testq %rax, %rax
je 0x6e8b9
leaq -0x8(%r14), %rdx
xorl %ecx, %ecx
xorl %esi, %esi
movq 0x40(%rsp), %r12
leaq (%rcx,%r13), %rdi
addq $0x8, %rdi
movzbl -0x8(%rdi), %r9d
movzbl -0x7(%rdi), %r10d
movzbl -0x6(%rdi), %r11d
movzbl -0x5(%rdi), %r8d
movzbl %sil, %esi
shll $0xa, %esi
addq %r12, %rsi
incl (%rsi,%r9,4)
imulq $0x40c, %r9, %rsi       # imm = 0x40C
addq %rax, %rsi
incl (%rsi,%r10,4)
shll $0xa, %r10d
addq %r12, %r10
incl (%r10,%r11,4)
imulq $0x40c, %r11, %rsi      # imm = 0x40C
addq %rax, %rsi
incl (%rsi,%r8,4)
movzbl -0x4(%rdi), %r9d
movzbl -0x3(%rdi), %r10d
movzbl -0x2(%rdi), %r11d
movzbl -0x1(%rdi), %esi
shll $0xa, %r8d
addq %r12, %r8
incl (%r8,%r9,4)
imulq $0x40c, %r9, %r8        # imm = 0x40C
addq %rax, %r8
incl (%r8,%r10,4)
shll $0xa, %r10d
addq %r12, %r10
incl (%r10,%r11,4)
imulq $0x40c, %r11, %r8       # imm = 0x40C
addq %rax, %r8
incl (%r8,%rsi,4)
addq $0x8, %rcx
cmpq %rdx, %rdi
jb 0x6e034
leaq (%rcx,%r13), %rdx
cmpq %r14, %rdx
movq %r12, %rdi
jae 0x6e101
movl %esi, %edx
movzbl (%r13,%rcx), %esi
movzbl %dl, %edx
shll $0xa, %edx
addq %rdi, %rdx
incl (%rdx,%rsi,4)
incq %rcx
movl %esi, %edx
cmpq %rcx, %rbx
jne 0x6e0e5
incl 0x440(%rsp,%rsi,4)
xorl %ecx, %ecx
movq %rax, %rdx
movq %rdi, %rsi
movq 0x30(%rsp), %rbx
xorl %r8d, %r8d
xorl %edi, %edi
movl (%rsi,%r8,4), %r9d
addl (%rdx,%r8,4), %r9d
movl %r9d, (%rsi,%r8,4)
addl %r9d, %edi
incq %r8
cmpq $0x100, %r8             # imm = 0x100
jne 0x6e11a
addl %edi, 0x440(%rsp,%rcx,4)
incq %rcx
addq $0x400, %rsi            # imm = 0x400
addq $0x40c, %rdx            # imm = 0x40C
cmpq $0x100, %rcx            # imm = 0x100
jne 0x6e115
movq %rax, %rdi
callq 0x7e26a
movq 0x40(%rsp), %r11
movq 0x108(%rsp), %rsi
jmp 0x6e2b1
leaq -0x8(%r14), %rcx
xorl %eax, %eax
xorl %edx, %edx
movq 0x40(%rsp), %r11
leaq (%rax,%r13), %rsi
addq $0x8, %rsi
movzbl -0x8(%rsi), %r9d
movzbl -0x7(%rsi), %r10d
movzbl -0x6(%rsi), %r8d
movzbl -0x5(%rsi), %edi
movzbl %dl, %edx
shll $0xa, %edx
addq %r11, %rdx
incl (%rdx,%r9,4)
shll $0xa, %r9d
addq %r11, %r9
incl (%r9,%r10,4)
shll $0xa, %r10d
addq %r11, %r10
incl (%r10,%r8,4)
shll $0xa, %r8d
addq %r11, %r8
incl (%r8,%rdi,4)
movzbl -0x4(%rsi), %r9d
movzbl -0x3(%rsi), %r10d
movzbl -0x2(%rsi), %r8d
movzbl -0x1(%rsi), %edx
shll $0xa, %edi
addq %r11, %rdi
incl (%rdi,%r9,4)
shll $0xa, %r9d
addq %r11, %r9
incl (%r9,%r10,4)
shll $0xa, %r10d
addq %r11, %r10
incl (%r10,%r8,4)
shll $0xa, %r8d
addq %r11, %r8
incl (%r8,%rdx,4)
addq $0x8, %rax
cmpq %rcx, %rsi
jb 0x6e17d
leaq (%rax,%r13), %rcx
cmpq %r14, %rcx
jae 0x6e238
movl %edx, %ecx
movzbl (%r13,%rax), %edx
movzbl %cl, %ecx
shll $0xa, %ecx
addq %r11, %rcx
incl (%rcx,%rdx,4)
incq %rax
movl %edx, %ecx
cmpq %rax, %rbx
jne 0x6e21c
incl 0x440(%rsp,%rdx,4)
xorl %eax, %eax
movq %r11, %rcx
movq 0x108(%rsp), %rsi
movq 0x30(%rsp), %rbx
vpxor %xmm0, %xmm0, %xmm0
xorl %edx, %edx
vpaddd (%rcx,%rdx,4), %zmm0, %zmm0
addq $0x10, %rdx
cmpq $0x100, %rdx            # imm = 0x100
jne 0x6e257
vextracti64x4 $0x1, %zmm0, %ymm1
vpaddd %zmm1, %zmm0, %zmm0
vextracti128 $0x1, %ymm0, %xmm1
vpaddd %xmm1, %xmm0, %xmm0
vpshufd $0xee, %xmm0, %xmm1     # xmm1 = xmm0[2,3,2,3]
vpaddd %xmm1, %xmm0, %xmm0
vpshufd $0x55, %xmm0, %xmm1     # xmm1 = xmm0[1,1,1,1]
vpaddd %xmm1, %xmm0, %xmm0
vmovd %xmm0, %edx
addl %edx, 0x440(%rsp,%rax,4)
incq %rax
addq $0x400, %rcx            # imm = 0x400
cmpq $0x100, %rax            # imm = 0x100
jne 0x6e251
leaq (%r15,%rsi), %rax
movq %rax, 0x60(%rsp)
movl %ebx, %eax
shrl $0x5, %eax
movl %eax, 0x68(%rsp)
movl %eax, %eax
leaq (%rax,%r13), %rcx
movl $0x1f, %edx
movzbl (%rcx), %esi
incl (%r11,%rsi,4)
addq %rax, %rcx
decq %rdx
jne 0x6e2ce
movl 0x440(%rsp), %eax
movl $0x1, 0x440(%rsp)
leaq 0x1(%r15), %r9
movb $0x0, (%r15)
xorl %ecx, %ecx
movl $0x1, %edx
xorl %esi, %esi
movq %r9, %r8
movq %r8, %rdi
cmpl $0x0, 0x440(%rsp,%rcx,4)
je 0x6e316
testl %esi, %esi
je 0x6e32a
decl %esi
movq %rdi, %r8
incq %rcx
incq %rdx
cmpq $0x100, %rcx            # imm = 0x100
jne 0x6e303
jmp 0x6e37c
leaq 0x1(%rdi), %r8
movb %cl, (%rdi)
xorl %esi, %esi
testq %rcx, %rcx
je 0x6e319
cmpl $0x0, 0x43c(%rsp,%rcx,4)
je 0x6e319
leal 0x1(%rcx), %r8d
movl %r8d, %esi
cmpq $0xfe, %rcx
ja 0x6e36f
movq %rdx, %rsi
cmpl $0x0, 0x440(%rsp,%rsi,4)
je 0x6e36f
incq %rsi
cmpq $0x100, %rsi            # imm = 0x100
jne 0x6e354
movl $0x100, %esi            # imm = 0x100
subl %r8d, %esi
movb %sil, 0x1(%rdi)
addq $0x2, %rdi
jmp 0x6e316
movq %r15, 0x118(%rsp)
addl $0x1f, %eax
movb $0x0, (%r8)
subl %r9d, %r8d
incl %r8d
movslq %r8d, %rcx
movq %r9, 0x28(%rsp)
addq %r9, %rcx
movq %rcx, 0x10(%rsp)
leaq 0x440(%rsp), %r14
movl %eax, (%r14)
leaq 0xc40(%rsp), %r15
xorl %r12d, %r12d
movl $0x400, %edx            # imm = 0x400
movq %r15, %rdi
xorl %esi, %esi
vzeroupper
callq 0x4260
movq %r14, %rdi
movq 0x40(%rsp), %rbx
movq %rbx, %rsi
movq %r14, %rdx
movq %r15, %rcx
callq 0x62f73
movq %rbx, %rdi
movl %eax, %ecx
movl $0x1, %r15d
movl $0x1, %r8d
shll %cl, %r8d
movl $0x8000, %eax           # imm = 0x8000
movl %ecx, 0x70(%rsp)
shrl %cl, %eax
shll $0x10, %eax
movl %eax, 0x50(%rsp)
leal -0x1(%r8), %eax
movq %rax, 0x18(%rsp)
vpmovsxbd 0x31b71(%rip), %xmm0 # 0x9ff88
vmovd 0x2db31(%rip), %xmm1    # 0x9bf50
vpbroadcastb 0x31dd8(%rip), %xmm4 # 0xa0200
movq %rbx, %r14
movl 0x440(%rsp,%r12,4), %edx
testl %edx, %edx
je 0x6e810
movl 0xc40(%rsp,%r12,4), %eax
movl $0x400, %ecx            # imm = 0x400
cmpl %ecx, %eax
movl $0x400, %ecx            # imm = 0x400
cmovbl %eax, %ecx
cmpl $0xa, 0x70(%rsp)
cmovnel %eax, %ecx
movq %r12, %rbx
shlq $0xa, %rbx
addq %rdi, %rbx
movq %rcx, 0x8(%rsp)
shlq $0x1f, %rcx
movb $0x1, %r10b
movq %r12, %rdi
movslq %edx, %r9
xorl %r12d, %r12d
movq %rcx, %rax
xorl %edx, %edx
divq %r9
movq %rax, %rsi
movl $0x40000000, %eax       # imm = 0x40000000
xorl %edx, %edx
idivl %r9d
movslq %eax, %r9
addq %rsi, %r9
xorl %edx, %edx
xorl %esi, %esi
xorl %eax, %eax
movl (%r14,%r12,4), %r11d
testq %r11, %r11
je 0x6e4c8
cmpl %r11d, %esi
cmovbl %r12d, %eax
cmovbel %r11d, %esi
imulq %r9, %r11
shrq $0x1f, %r11
cmpl $0x2, %r11d
cmovbl %r15d, %r11d
movl %r11d, (%r14,%r12,4)
addl %edx, %r11d
movl %r11d, %edx
incq %r12
cmpq $0x100, %r12            # imm = 0x100
jne 0x6e49a
movq 0x8(%rsp), %rsi
subl %edx, %esi
cltq
testl %esi, %esi
jg 0x6e573
jns 0x6e56c
movl (%rbx,%rax,4), %r9d
movl %esi, %r11d
negl %r11d
cmpl %r11d, %r9d
jbe 0x6e50c
movl %r9d, %r12d
shrl %r12d
cmpl %r11d, %r12d
setb %r11b
testb %r11b, %r10b
je 0x6e57c
testb $0x1, %r10b
movl $0x0, %r10d
jne 0x6e473
addl %r9d, %esi
movl $0x1, (%rbx,%rax,4)
decl %esi
je 0x6e56c
xorl %ecx, %ecx
movq 0x10(%rsp), %r11
movl (%r14,%rcx,4), %edx
cmpl $0x2, %edx
jb 0x6e55a
movl %esi, %r9d
negl %r9d
movl $0x1, %r10d
subl %edx, %r10d
cmpl %r9d, %edx
cmoval %esi, %r10d
addl %r10d, %edx
movl %edx, (%r14,%rcx,4)
subl %r10d, %esi
cmpq $0xfe, %rcx
ja 0x6e58b
incq %rcx
testl %esi, %esi
jne 0x6e531
jmp 0x6e58b
movq 0x10(%rsp), %r11
jmp 0x6e58b
leaq (%rbx,%rax,4), %rcx
movl (%rcx), %r9d
jmp 0x6e580
leaq (%rbx,%rax,4), %rcx
movq 0x10(%rsp), %r11
addl %esi, %r9d
movl %r9d, (%rcx)
cmpl $0x0, (%rbx,%rax,4)
je 0x6e8b9
movq 0x8(%rsp), %rax
movl %eax, 0x440(%rsp,%rdi,4)
xorl %ecx, %ecx
xorl %esi, %esi
movq %r11, %rax
cmpl $0x0, 0x440(%rsp,%rcx,4)
je 0x6e5e6
movl (%rbx,%rcx,4), %edx
testl %edx, %edx
je 0x6e5de
testl %esi, %esi
je 0x6e5cd
decl %esi
movslq %esi, %rdx
subq %rdx, %rax
movb %dl, (%rax)
incq %rax
movl (%rbx,%rcx,4), %edx
cmpl $0x7f, %edx
ja 0x6e5f7
movb %dl, (%rax)
movl $0x1, %edx
jmp 0x6e6aa
incl %esi
movb $0x0, (%rax)
incq %rax
incq %rcx
cmpq $0x100, %rcx            # imm = 0x100
jne 0x6e5a8
jmp 0x6e6c4
cmpl $0x3fff, %edx           # imm = 0x3FFF
ja 0x6e61b
movl %edx, %esi
shrl $0x7, %esi
orb $-0x80, %sil
movb %sil, (%rax)
andb $0x7f, %dl
movb %dl, 0x1(%rax)
movl $0x2, %edx
jmp 0x6e6aa
cmpl $0x1fffff, %edx         # imm = 0x1FFFFF
ja 0x6e649
movl %edx, %esi
shrl $0xe, %esi
orb $-0x80, %sil
movb %sil, (%rax)
movl %edx, %esi
shrl $0x7, %esi
orb $-0x80, %sil
movb %sil, 0x1(%rax)
andb $0x7f, %dl
movb %dl, 0x2(%rax)
movl $0x3, %edx
jmp 0x6e6aa
cmpl $0xfffffff, %edx        # imm = 0xFFFFFFF
ja 0x6e684
movl %edx, %esi
shrl $0x15, %esi
orb $-0x80, %sil
movb %sil, (%rax)
movl %edx, %esi
shrl $0xe, %esi
orb $-0x80, %sil
movb %sil, 0x1(%rax)
movl %edx, %esi
shrl $0x7, %esi
orb $-0x80, %sil
movb %sil, 0x2(%rax)
andb $0x7f, %dl
movb %dl, 0x3(%rax)
movl $0x4, %edx
jmp 0x6e6aa
vmovd %edx, %xmm2
vpbroadcastd %xmm2, %xmm2
vpsrlvd %xmm0, %xmm2, %xmm2
vpshufb %xmm1, %xmm2, %xmm2
vpor %xmm4, %xmm2, %xmm2
vmovd %xmm2, (%rax)
andb $0x7f, %dl
movb %dl, 0x4(%rax)
movl $0x5, %edx
addq %rdx, %rax
incq %rcx
movl $0x0, %esi
cmpq $0x100, %rcx            # imm = 0x100
jne 0x6e5a8
jmp 0x6e6d5
testl %esi, %esi
je 0x6e6d5
decl %esi
movslq %esi, %rcx
subq %rcx, %rax
movb %cl, (%rax)
incq %rax
movl 0x440(%rsp,%rdi,4), %ecx
movl %r8d, %edx
notl %edx
testl %edx, %ecx
je 0x6e720
xorl %edx, %edx
cmpl %r8d, %ecx
jae 0x6e6f7
xorl %edx, %edx
addl %ecx, %ecx
incl %edx
cmpl %r8d, %ecx
jb 0x6e6ee
vpbroadcastd %edx, %zmm2
xorl %ecx, %ecx
vmovdqu64 (%r14,%rcx,4), %zmm3
vpsllvd %zmm2, %zmm3, %zmm3
vmovdqu64 %zmm3, (%r14,%rcx,4)
addq $0x10, %rcx
cmpq $0x100, %rcx            # imm = 0x100
jne 0x6e6ff
movl %r8d, 0x440(%rsp,%rdi,4)
cmpl $0x10, 0x70(%rsp)
ja 0x703be
subl %r11d, %eax
cltq
addq %rax, %r11
movq %r11, 0x10(%rsp)
xorl %r10d, %r10d
xorl %r11d, %r11d
movq 0x38(%rsp), %rcx
movl %r8d, %eax
subl %r11d, %eax
jb 0x7039c
movl (%rbx,%r10,4), %r9d
cmpl %r9d, %eax
jb 0x7037a
movq %rdi, %rax
shlq $0xc, %rax
addq %rcx, %rax
movq %r10, %r12
shlq $0x4, %r12
addq %rax, %r12
movl 0x50(%rsp), %eax
imull %r9d, %eax
decl %eax
movl %eax, (%r12)
movl %r8d, %eax
subl %r9d, %eax
movw %ax, 0xc(%r12)
cmpl $0x2, %r9d
jae 0x6e7b4
movl $0xffffffff, 0x4(%r12)  # imm = 0xFFFFFFFF
movq 0x18(%rsp), %rax
addl %r11d, %eax
movl %eax, 0x8(%r12)
movw $0x20, %si
jmp 0x6e7ee
movl $0x1e, %esi
leal -0x1e(%rsi), %ecx
movl $0x1, %eax
shll %cl, %eax
incl %esi
cmpl %r9d, %eax
jb 0x6e7b9
movl $0x1, %eax
movl %esi, %ecx
shlq %cl, %rax
addq %r9, %rax
decq %rax
xorl %edx, %edx
divq %r9
movl %eax, 0x4(%r12)
movl %r11d, 0x8(%r12)
movq 0x38(%rsp), %rcx
movw %si, 0xe(%r12)
addl (%rbx,%r10,4), %r11d
incq %r10
cmpq $0x100, %r10            # imm = 0x100
jne 0x6e74b
movq %rdi, %r12
movq 0x40(%rsp), %rdi
incq %r12
addq $0x400, %r14            # imm = 0x400
cmpq $0x100, %r12            # imm = 0x100
jne 0x6e42b
movl 0x70(%rsp), %eax
shlb $0x4, %al
movq 0x118(%rsp), %r14
movb %al, (%r14)
movq 0x10(%rsp), %rax
movq %rax, %rbx
subq %r14, %rbx
cmpq $0x3e9, %rbx            # imm = 0x3E9
jl 0x6e8cb
vmovdqa %xmm4, 0x50(%rsp)
movq %rax, %rsi
movq 0x28(%rsp), %rdi
subq %rdi, %rsi
leaq 0x240(%rsp), %rcx
movq %rsi, %r12
xorl %edx, %edx
vzeroupper
callq 0x61ed5
movq %rax, %r9
testq %rax, %rax
movq 0x60(%rsp), %r15
je 0x6ea8f
movl 0x240(%rsp), %edx
leal 0x6(%rdx), %eax
cmpq %rax, %rbx
jbe 0x6ea8f
orb $0x1, (%r14)
cmpl $0x7f, %r12d
ja 0x6e8d5
movq 0x28(%rsp), %rbx
movb %r12b, (%rbx)
movl $0x1, %eax
vmovdqa 0x50(%rsp), %xmm1
jmp 0x6e9af
movq 0x40(%rsp), %rdi
vzeroupper
callq 0x7e26a
jmp 0x70238
movq 0x60(%rsp), %r15
jmp 0x6ea9c
cmpl $0x3fff, %r12d          # imm = 0x3FFF
movq 0x28(%rsp), %rbx
vmovdqa 0x50(%rsp), %xmm1
movl %r12d, %eax
ja 0x6e907
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x1(%r14)
andb $0x7f, %r12b
movb %r12b, 0x2(%r14)
movl $0x2, %eax
jmp 0x6e9af
cmpl $0x1fffff, %r12d        # imm = 0x1FFFFF
ja 0x6e934
shrl $0xe, %eax
orb $-0x80, %al
movb %al, 0x1(%r14)
movl %r12d, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x2(%r14)
andb $0x7f, %r12b
movb %r12b, 0x3(%r14)
movl $0x3, %eax
jmp 0x6e9af
cmpl $0xfffffff, %r12d       # imm = 0xFFFFFFF
ja 0x6e96d
shrl $0x15, %eax
orb $-0x80, %al
movb %al, 0x1(%r14)
movl %r12d, %eax
shrl $0xe, %eax
orb $-0x80, %al
movb %al, 0x2(%r14)
movl %r12d, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x3(%r14)
andb $0x7f, %r12b
movb %r12b, 0x4(%r14)
movl $0x4, %eax
jmp 0x6e9af
shrl $0x1c, %eax
movl %r12d, %ecx
shrl $0x15, %ecx
movl %r12d, %edi
shrl $0xe, %edi
movl %r12d, %esi
vmovd %eax, %xmm0
vpinsrb $0x1, %ecx, %xmm0, %xmm0
vpinsrb $0x2, %edi, %xmm0, %xmm0
shrl $0x7, %esi
vpinsrb $0x3, %esi, %xmm0, %xmm0
vpor %xmm1, %xmm0, %xmm0
vmovd %xmm0, 0x1(%r14)
andb $0x7f, %r12b
movb %r12b, 0x5(%r14)
movl $0x5, %eax
addq %rax, %rbx
cmpl $0x7f, %edx
ja 0x6e9c3
movb %dl, (%rbx)
movl $0x1, %eax
jmp 0x6ea70
cmpl $0x3fff, %edx           # imm = 0x3FFF
ja 0x6e9e5
movl %edx, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, (%rbx)
movl %edx, %eax
andb $0x7f, %al
movb %al, 0x1(%rbx)
movl $0x2, %eax
jmp 0x6ea70
cmpl $0x1fffff, %edx         # imm = 0x1FFFFF
ja 0x6ea0e
movl %edx, %eax
shrl $0xe, %eax
orb $-0x80, %al
movb %al, (%rbx)
movl %edx, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x1(%rbx)
movl %edx, %eax
andb $0x7f, %al
movb %al, 0x2(%rbx)
movl $0x3, %eax
jmp 0x6ea70
cmpl $0xfffffff, %edx        # imm = 0xFFFFFFF
ja 0x6ea41
movl %edx, %eax
shrl $0x15, %eax
orb $-0x80, %al
movb %al, (%rbx)
movl %edx, %eax
shrl $0xe, %eax
orb $-0x80, %al
movb %al, 0x1(%rbx)
movl %edx, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x2(%rbx)
movl %edx, %eax
andb $0x7f, %al
movb %al, 0x3(%rbx)
movl $0x4, %eax
jmp 0x6ea70
vmovd %edx, %xmm0
vpbroadcastd %xmm0, %xmm0
vpsrlvd 0x2d4ed(%rip), %xmm0, %xmm0 # 0x9bf40
vpshufb 0x2d4f4(%rip), %xmm0, %xmm0 # 0x9bf50
vpor %xmm1, %xmm0, %xmm0
vmovd %xmm0, (%rbx)
movl %edx, %eax
andb $0x7f, %al
movb %al, 0x4(%rbx)
movl $0x5, %eax
addq %rax, %rbx
movq %rbx, %rdi
movq %r9, %rsi
movq %rdx, %r14
movq %r9, %r12
callq 0x43c0
movq %r12, %r9
addq %r14, %rbx
movq %rbx, 0x10(%rsp)
movq %r9, %rdi
callq 0x45c0
movq 0x40(%rsp), %rdi
vzeroupper
callq 0x7e26a
cmpl $0x0, 0x70(%rsp)
movq 0x30(%rsp), %r11
js 0x70238
vbroadcastss 0x314c2(%rip), %zmm0 # 0x9ff80
vmovaps %zmm0, 0x240(%rsp)
movl 0x68(%rsp), %eax
vpbroadcastd %eax, %zmm1
vpmulld 0x31766(%rip), %zmm1, %zmm2 # 0xa0240
vpbroadcastd 0x314b4(%rip), %zmm3 # 0x9ff98
vmovaps %zmm0, 0x280(%rsp)
vpaddd %zmm3, %zmm2, %zmm0
vpmulld 0x31784(%rip), %zmm1, %zmm1 # 0xa0280
vmovdqa64 %zmm0, 0x180(%rsp)
vpaddd %zmm3, %zmm1, %zmm0
vmovdqa64 %zmm0, 0x1c0(%rsp)
xorl %eax, %eax
vpmovsxdq 0x180(%rsp,%rax,4), %zmm0
vmovq %xmm0, %rcx
movzbl 0x1(%r13,%rcx), %ecx
vmovd %ecx, %xmm1
vpextrq $0x1, %xmm0, %rcx
vextracti128 $0x1, %ymm0, %xmm2
vpinsrb $0x1, 0x1(%r13,%rcx), %xmm1, %xmm1
vmovq %xmm2, %rcx
vpinsrb $0x2, 0x1(%r13,%rcx), %xmm1, %xmm1
vpextrq $0x1, %xmm2, %rcx
vextracti32x4 $0x2, %zmm0, %xmm2
vpinsrb $0x3, 0x1(%r13,%rcx), %xmm1, %xmm1
vmovq %xmm2, %rcx
vpinsrb $0x4, 0x1(%r13,%rcx), %xmm1, %xmm1
vpextrq $0x1, %xmm2, %rcx
vpmovsxdq 0x1a0(%rsp,%rax,4), %zmm2
vpinsrb $0x5, 0x1(%r13,%rcx), %xmm1, %xmm1
vextracti32x4 $0x3, %zmm0, %xmm0
vmovq %xmm0, %rcx
vpinsrb $0x6, 0x1(%r13,%rcx), %xmm1, %xmm1
vpextrq $0x1, %xmm0, %rcx
vpinsrb $0x7, 0x1(%r13,%rcx), %xmm1, %xmm0
vmovq %xmm2, %rcx
vpinsrb $0x8, 0x1(%r13,%rcx), %xmm0, %xmm0
vpextrq $0x1, %xmm2, %rcx
vpinsrb $0x9, 0x1(%r13,%rcx), %xmm0, %xmm0
vextracti128 $0x1, %ymm2, %xmm1
vmovq %xmm1, %rcx
vpinsrb $0xa, 0x1(%r13,%rcx), %xmm0, %xmm0
vpextrq $0x1, %xmm1, %rcx
vpinsrb $0xb, 0x1(%r13,%rcx), %xmm0, %xmm0
vextracti32x4 $0x2, %zmm2, %xmm1
vmovq %xmm1, %rcx
vpinsrb $0xc, 0x1(%r13,%rcx), %xmm0, %xmm0
vpextrq $0x1, %xmm1, %rcx
vpinsrb $0xd, 0x1(%r13,%rcx), %xmm0, %xmm0
vextracti32x4 $0x3, %zmm2, %xmm1
vmovq %xmm1, %rcx
vpinsrb $0xe, 0x1(%r13,%rcx), %xmm0, %xmm0
vpextrq $0x1, %xmm1, %rcx
vpinsrb $0xf, 0x1(%r13,%rcx), %xmm0, %xmm0
vpmovzxbd %xmm0, %zmm0    # zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
vmovdqa64 %zmm0, 0x340(%rsp,%rax,4)
addq $0x10, %rax
cmpq $0x20, %rax
jne 0x6eb14
leal -0x1(%r11), %eax
movzbl (%r13,%rax), %edx
movl %edx, 0x3bc(%rsp)
leal -0x2(%r11), %ecx
andl $-0x20, %r11d
addl $-0x2, %r11d
movl %ecx, 0x1fc(%rsp)
cmpl %r11d, %ecx
jle 0x6ecea
movl 0x2bc(%rsp), %eax
movq 0x38(%rsp), %r10
movl %ecx, %ecx
movl %edx, %esi
movzbl (%r13,%rcx), %edx
movl %edx, %edi
shll $0xc, %edi
addq %r10, %rdi
shlq $0x4, %rsi
xorl %ecx, %ecx
cmpl (%rsi,%rdi), %eax
seta %cl
leal (%rcx,%rcx), %r8d
movw %ax, -0x2(%r15)
shll $0x4, %ecx
shrl %cl, %eax
movl 0x4(%rsi,%rdi), %r9d
imulq %rax, %r9
movb 0xe(%rsi,%rdi), %cl
shrq %cl, %r9
addl 0x8(%rsi,%rdi), %eax
subq %r8, %r15
movzwl 0xc(%rsi,%rdi), %esi
imull %r9d, %esi
addl %eax, %esi
movl %esi, 0x2bc(%rsp)
movl %edx, 0x3bc(%rsp)
movl 0x1fc(%rsp), %ecx
decl %ecx
movl %ecx, 0x1fc(%rsp)
movl %esi, %eax
cmpl %r11d, %ecx
jg 0x6ec77
movq %r15, 0x60(%rsp)
vmovdqa64 0x240(%rsp), %zmm23
vmovdqa64 0x280(%rsp), %zmm24
vmovdqa64 0x180(%rsp), %zmm6
vmovdqa64 0x1c0(%rsp), %zmm8
vmovdqa64 0x340(%rsp), %zmm13
vmovdqa64 0x380(%rsp), %zmm15
vmovdqa 0x180(%rsp), %ymm2
vmovdqa 0x1a0(%rsp), %ymm3
vmovdqa 0x1c0(%rsp), %ymm0
vmovdqu 0x1e0(%rsp), %xmm1
movq 0x1f0(%rsp), %rax
movl 0x1f8(%rsp), %ecx
movl 0x1fc(%rsp), %edx
vmovdqa %ymm2, 0x440(%rsp)
vmovdqa %ymm3, 0xc40(%rsp)
movslq 0xc5c(%rsp), %rsi
movzbl (%r13,%rsi), %r14d
movslq 0xc58(%rsp), %rsi
movzbl (%r13,%rsi), %r12d
movslq 0xc54(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movl %esi, 0x50(%rsp)
movslq 0xc50(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movl %esi, 0x18(%rsp)
movslq 0xc4c(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movl %esi, 0x8(%rsp)
movslq 0xc48(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movl %esi, 0x70(%rsp)
movslq 0xc44(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movl %esi, 0x40(%rsp)
movslq 0xc40(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movl %esi, 0x30(%rsp)
movslq 0x45c(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movl %esi, 0x28(%rsp)
movslq 0x458(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movl %esi, 0x68(%rsp)
movslq 0x454(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movl %esi, 0xd0(%rsp)
movslq 0x450(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movl %esi, 0xc0(%rsp)
movslq 0x44c(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movl %esi, 0xb0(%rsp)
movslq 0x448(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movl %esi, 0xa0(%rsp)
movslq 0x444(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movl %esi, 0x90(%rsp)
movslq 0x440(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movl %esi, 0x80(%rsp)
movq %rax, 0xc50(%rsp)
movl %ecx, 0xc58(%rsp)
movl %edx, 0xc5c(%rsp)
vmovdqa %ymm0, 0x440(%rsp)
vmovdqu %xmm1, 0xc40(%rsp)
movslq 0xc5c(%rsp), %rax
movzbl (%r13,%rax), %eax
movl %eax, 0xd8(%rsp)
movslq 0xc58(%rsp), %rax
movzbl (%r13,%rax), %eax
movl %eax, 0xc8(%rsp)
movslq 0xc54(%rsp), %rax
movzbl (%r13,%rax), %eax
movl %eax, 0xb8(%rsp)
movslq 0xc50(%rsp), %rax
movzbl (%r13,%rax), %eax
movl %eax, 0xa8(%rsp)
movslq 0xc4c(%rsp), %rax
movzbl (%r13,%rax), %eax
movl %eax, 0x98(%rsp)
movslq 0xc48(%rsp), %rax
movzbl (%r13,%rax), %eax
movl %eax, 0x88(%rsp)
movslq 0xc44(%rsp), %rax
movzbl (%r13,%rax), %eax
movl %eax, 0x300(%rsp)
movslq 0xc40(%rsp), %rax
movzbl (%r13,%rax), %r15d
movslq 0x45c(%rsp), %rax
movzbl (%r13,%rax), %eax
movslq 0x458(%rsp), %rcx
movzbl (%r13,%rcx), %ecx
movslq 0x454(%rsp), %rdx
movzbl (%r13,%rdx), %edx
movslq 0x450(%rsp), %rsi
movzbl (%r13,%rsi), %edi
movslq 0x44c(%rsp), %rsi
movzbl (%r13,%rsi), %r8d
movslq 0x448(%rsp), %rsi
movzbl (%r13,%rsi), %r9d
movslq 0x444(%rsp), %rsi
movzbl (%r13,%rsi), %r10d
movslq 0x440(%rsp), %r11
movl 0x180(%rsp), %esi
movl $0xffffffff, %ebx       # imm = 0xFFFFFFFF
cmpl $0x41, %esi
jl 0x6f15f
movl %r12d, 0x24(%rsp)
movl %r14d, 0x2c0(%rsp)
leaq 0xc20(%rsp), %rsi
xorl %ebx, %ebx
movl %ebx, %r14d
notl %r14d
vpbroadcastd %r14d, %zmm2
xorl %r14d, %r14d
vpaddd 0x180(%rsp,%r14,4), %zmm2, %zmm0
vpmovsxdq %ymm0, %zmm1
vmovq %xmm1, %r12
movzbl (%r13,%r12), %r12d
vmovd %r12d, %xmm3
vpextrq $0x1, %xmm1, %r12
vextracti128 $0x1, %ymm1, %xmm4
vpinsrb $0x1, (%r13,%r12), %xmm3, %xmm3
vmovq %xmm4, %r12
vpinsrb $0x2, (%r13,%r12), %xmm3, %xmm3
vpextrq $0x1, %xmm4, %r12
vextracti32x4 $0x2, %zmm1, %xmm4
vpinsrb $0x3, (%r13,%r12), %xmm3, %xmm3
vmovq %xmm4, %r12
vpinsrb $0x4, (%r13,%r12), %xmm3, %xmm3
vpextrq $0x1, %xmm4, %r12
vextracti64x4 $0x1, %zmm0, %ymm0
vpinsrb $0x5, (%r13,%r12), %xmm3, %xmm3
vextracti32x4 $0x3, %zmm1, %xmm1
vmovq %xmm1, %r12
vpinsrb $0x6, (%r13,%r12), %xmm3, %xmm3
vpextrq $0x1, %xmm1, %r12
vpinsrb $0x7, (%r13,%r12), %xmm3, %xmm1
vpmovsxdq %ymm0, %zmm0
vmovq %xmm0, %r12
vpinsrb $0x8, (%r13,%r12), %xmm1, %xmm1
vpextrq $0x1, %xmm0, %r12
vpinsrb $0x9, (%r13,%r12), %xmm1, %xmm1
vextracti128 $0x1, %ymm0, %xmm3
vmovq %xmm3, %r12
vpinsrb $0xa, (%r13,%r12), %xmm1, %xmm1
vpextrq $0x1, %xmm3, %r12
vpinsrb $0xb, (%r13,%r12), %xmm1, %xmm1
vextracti32x4 $0x2, %zmm0, %xmm3
vmovq %xmm3, %r12
vpinsrb $0xc, (%r13,%r12), %xmm1, %xmm1
vpextrq $0x1, %xmm3, %r12
vpinsrb $0xd, (%r13,%r12), %xmm1, %xmm1
vextracti32x4 $0x3, %zmm0, %xmm0
vmovq %xmm0, %r12
vpinsrb $0xe, (%r13,%r12), %xmm1, %xmm1
vpextrq $0x1, %xmm0, %r12
vpinsrb $0xf, (%r13,%r12), %xmm1, %xmm0
vmovdqa %xmm0, (%rsi,%r14)
addq $0x10, %r14
cmpq $0x20, %r14
jne 0x6f003
incq %rbx
addq $-0x20, %rsi
cmpq $0x40, %rbx
jne 0x6eff4
movl $0x40, %ebx
movl 0x180(%rsp), %esi
movl 0x2c0(%rsp), %r14d
movl 0x24(%rsp), %r12d
testl %esi, %esi
js 0x70256
vmovd 0x80(%rsp), %xmm0
movzbl (%r13,%r11), %r11d
vmovd %r11d, %xmm1
vpinsrb $0x1, 0x90(%rsp), %xmm0, %xmm0
vpinsrb $0x1, %r10d, %xmm1, %xmm1
vpinsrb $0x2, 0xa0(%rsp), %xmm0, %xmm0
vpinsrb $0x2, %r9d, %xmm1, %xmm1
vpinsrb $0x3, 0xb0(%rsp), %xmm0, %xmm0
vpinsrb $0x3, %r8d, %xmm1, %xmm1
vpinsrb $0x4, 0xc0(%rsp), %xmm0, %xmm0
vpinsrb $0x4, %edi, %xmm1, %xmm1
vpinsrb $0x5, 0xd0(%rsp), %xmm0, %xmm0
vpinsrb $0x5, %edx, %xmm1, %xmm1
vpinsrb $0x6, 0x68(%rsp), %xmm0, %xmm0
vpinsrb $0x6, %ecx, %xmm1, %xmm1
vpinsrb $0x7, 0x28(%rsp), %xmm0, %xmm0
vpinsrb $0x7, %eax, %xmm1, %xmm1
vpinsrb $0x8, 0x30(%rsp), %xmm0, %xmm0
vpinsrb $0x8, %r15d, %xmm1, %xmm1
vpinsrb $0x9, 0x40(%rsp), %xmm0, %xmm0
vpinsrb $0x9, 0x300(%rsp), %xmm1, %xmm1
vpinsrb $0xa, 0x70(%rsp), %xmm0, %xmm0
vpinsrb $0xa, 0x88(%rsp), %xmm1, %xmm1
vpinsrb $0xb, 0x8(%rsp), %xmm0, %xmm0
vpinsrb $0xb, 0x98(%rsp), %xmm1, %xmm1
vpinsrb $0xc, 0x18(%rsp), %xmm0, %xmm0
vpinsrb $0xc, 0xa8(%rsp), %xmm1, %xmm1
vpinsrb $0xd, 0x50(%rsp), %xmm0, %xmm0
vpinsrb $0xd, 0xb8(%rsp), %xmm1, %xmm1
vpinsrb $0xe, %r12d, %xmm0, %xmm0
vpinsrb $0xe, 0xc8(%rsp), %xmm1, %xmm1
vpinsrb $0xf, %r14d, %xmm0, %xmm0
vpinsrb $0xf, 0xd8(%rsp), %xmm1, %xmm1
vpmovzxbd %xmm0, %zmm21   # zmm21 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
vpmovzxbd %xmm1, %zmm22   # zmm22 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
leaq -0x80(%r13), %rdi
vpternlogd $0xff, %zmm16, %zmm16, %zmm16
movw $0xaaaa, %ax            # imm = 0xAAAA
kmovw %eax, %k1
vpmovsxbq 0x31174(%rip), %zmm5 # 0xa0418
vpmovsxbq 0x30d22(%rip), %zmm7 # 0x9ffd0
vpbroadcastd 0x31148(%rip), %zmm18 # 0xa0400
vpbroadcastd 0x30cc2(%rip), %zmm17 # 0x9ff84
movq %rdi, 0x120(%rsp)
vmovdqa64 %zmm22, %zmm19
vmovdqa64 %zmm21, %zmm20
vpslld $0xa, %zmm21, %zmm0
vpslld $0x2, %zmm13, %zmm1
vpaddd %zmm0, %zmm1, %zmm14
vpslld $0xa, %zmm22, %zmm0
vpslld $0x2, %zmm15, %zmm1
vpaddd %zmm0, %zmm1, %zmm13
vpaddd %zmm16, %zmm6, %zmm6
vpaddd %zmm16, %zmm8, %zmm8
testl %ebx, %ebx
vmovdqa64 %zmm6, 0x300(%rsp)
vmovdqa64 %zmm8, 0x2c0(%rsp)
js 0x6f595
jne 0x6f58c
cmpl $0x41, %esi
jb 0x6f58c
addl $0x40, %esi
movl %esi, 0x180(%rsp)
leaq 0x180(%rsp), %rax
xorl %ecx, %ecx
movslq (%rax), %rdx
leal -0x40(%rdx), %esi
movl %esi, (%rax)
vmovdqu64 (%rdi,%rdx), %zmm0
vmovdqu64 %zmm0, 0xc40(%rsp,%rcx,4)
addq $0x10, %rcx
addq $0x4, %rax
cmpq $0x200, %rcx            # imm = 0x200
jne 0x6f345
xorl %eax, %eax
movq %rax, %rcx
shlq $0x6, %rcx
addq %rsp, %rcx
addq $0xc40, %rcx            # imm = 0xC40
xorl %edx, %edx
vpbroadcastq %rdx, %zmm3
vmovdqa (%rdx,%rcx), %xmm2
movq %rdx, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0x0, %xmm2, (%rax,%rsi)
vporq %zmm7, %zmm3, %zmm0
vpextrq $0x1, %xmm0, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0x1, %xmm2, (%rax,%rsi)
vextracti128 $0x1, %ymm0, %xmm1
vmovq %xmm1, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0x2, %xmm2, (%rax,%rsi)
vpextrq $0x1, %xmm1, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0x3, %xmm2, (%rax,%rsi)
vextracti32x4 $0x2, %zmm0, %xmm1
vmovq %xmm1, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0x4, %xmm2, (%rax,%rsi)
vpextrq $0x1, %xmm1, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0x5, %xmm2, (%rax,%rsi)
vextracti32x4 $0x3, %zmm0, %xmm0
vmovq %xmm0, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0x6, %xmm2, (%rax,%rsi)
vpextrq $0x1, %xmm0, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0x7, %xmm2, (%rax,%rsi)
vporq %zmm5, %zmm3, %zmm0
vmovq %xmm0, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0x8, %xmm2, (%rax,%rsi)
vpextrq $0x1, %xmm0, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0x9, %xmm2, (%rax,%rsi)
vextracti128 $0x1, %ymm0, %xmm1
vmovq %xmm1, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0xa, %xmm2, (%rax,%rsi)
vpextrq $0x1, %xmm1, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0xb, %xmm2, (%rax,%rsi)
vextracti32x4 $0x2, %zmm0, %xmm1
vmovq %xmm1, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0xc, %xmm2, (%rax,%rsi)
vpextrq $0x1, %xmm1, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0xd, %xmm2, (%rax,%rsi)
vextracti32x4 $0x3, %zmm0, %xmm0
vmovq %xmm0, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0xe, %xmm2, (%rax,%rsi)
vpextrq $0x1, %xmm0, %rsi
shlq $0x5, %rsi
addq %rsp, %rsi
addq $0x440, %rsi            # imm = 0x440
vpextrb $0xf, %xmm2, (%rax,%rsi)
cmpq $0x30, %rdx
leaq 0x10(%rdx), %rdx
jb 0x6f382
incq %rax
cmpq $0x20, %rax
jne 0x6f36f
movl $0x3f, %ebx
jmp 0x6f877
subl $0x1, %ebx
jae 0x6f877
movl $0xffffffff, 0x24(%rsp) # imm = 0xFFFFFFFF
testl %esi, %esi
je 0x6f893
vmovdqa %ymm6, 0xc40(%rsp)
vextracti64x4 $0x1, %zmm6, 0xe0(%rsp)
movslq 0xfc(%rsp), %rax
movzbl (%r13,%rax), %eax
movl %eax, 0x50(%rsp)
movslq 0xf8(%rsp), %rcx
movzbl (%r13,%rcx), %eax
movl %eax, 0x18(%rsp)
movslq 0xf4(%rsp), %rdx
movzbl (%r13,%rdx), %eax
movl %eax, 0x8(%rsp)
movslq 0xf0(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movslq 0xec(%rsp), %rdi
movzbl (%r13,%rdi), %edi
movslq 0xe8(%rsp), %r8
movzbl (%r13,%r8), %r8d
movslq 0xe4(%rsp), %r9
movzbl (%r13,%r9), %r9d
movslq 0xe0(%rsp), %r10
movzbl (%r13,%r10), %r10d
movslq 0xc5c(%rsp), %r11
movzbl (%r13,%r11), %r11d
movslq 0xc58(%rsp), %rbx
movzbl (%r13,%rbx), %ebx
movslq 0xc54(%rsp), %r14
movzbl (%r13,%r14), %r14d
movslq 0xc50(%rsp), %r15
movzbl (%r13,%r15), %r15d
movslq 0xc4c(%rsp), %r12
movzbl (%r13,%r12), %r12d
movslq 0xc48(%rsp), %rax
movzbl (%r13,%rax), %eax
movslq 0xc44(%rsp), %rcx
movzbl (%r13,%rcx), %ecx
movslq 0xc40(%rsp), %rdx
movzbl (%r13,%rdx), %edx
vmovd %edx, %xmm0
vpinsrb $0x1, %ecx, %xmm0, %xmm0
vpinsrb $0x2, %eax, %xmm0, %xmm0
vpinsrb $0x3, %r12d, %xmm0, %xmm0
vpinsrb $0x4, %r15d, %xmm0, %xmm0
vpinsrb $0x5, %r14d, %xmm0, %xmm0
vpinsrb $0x6, %ebx, %xmm0, %xmm0
vpinsrb $0x7, %r11d, %xmm0, %xmm0
vpinsrb $0x8, %r10d, %xmm0, %xmm0
vpinsrb $0x9, %r9d, %xmm0, %xmm0
vpinsrb $0xa, %r8d, %xmm0, %xmm0
vpinsrb $0xb, %edi, %xmm0, %xmm0
vpinsrb $0xc, %esi, %xmm0, %xmm0
vpinsrb $0xd, 0x8(%rsp), %xmm0, %xmm0
vpinsrb $0xe, 0x18(%rsp), %xmm0, %xmm0
vpinsrb $0xf, 0x50(%rsp), %xmm0, %xmm0
vmovdqa %ymm8, 0xc40(%rsp)
vextracti64x4 $0x1, %zmm8, 0xe0(%rsp)
movslq 0xfc(%rsp), %rax
movzbl (%r13,%rax), %eax
movl %eax, 0x50(%rsp)
movslq 0xf8(%rsp), %rcx
movzbl (%r13,%rcx), %eax
movl %eax, 0x18(%rsp)
movslq 0xf4(%rsp), %rdx
movzbl (%r13,%rdx), %eax
movl %eax, 0x8(%rsp)
movslq 0xf0(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movslq 0xec(%rsp), %rdi
movzbl (%r13,%rdi), %edi
movslq 0xe8(%rsp), %r8
movzbl (%r13,%r8), %r8d
movslq 0xe4(%rsp), %r9
movzbl (%r13,%r9), %r9d
movslq 0xe0(%rsp), %r10
movzbl (%r13,%r10), %r10d
movslq 0xc5c(%rsp), %r11
movzbl (%r13,%r11), %r11d
movslq 0xc58(%rsp), %rbx
movzbl (%r13,%rbx), %ebx
movslq 0xc54(%rsp), %r14
movzbl (%r13,%r14), %r14d
movslq 0xc50(%rsp), %r15
movzbl (%r13,%r15), %r15d
movslq 0xc4c(%rsp), %r12
movzbl (%r13,%r12), %r12d
movslq 0xc48(%rsp), %rax
movzbl (%r13,%rax), %eax
movslq 0xc44(%rsp), %rcx
movzbl (%r13,%rcx), %ecx
movslq 0xc40(%rsp), %rdx
movzbl (%r13,%rdx), %edx
vmovd %edx, %xmm1
vpinsrb $0x1, %ecx, %xmm1, %xmm1
vpinsrb $0x2, %eax, %xmm1, %xmm1
vpinsrb $0x3, %r12d, %xmm1, %xmm1
vpinsrb $0x4, %r15d, %xmm1, %xmm1
vpinsrb $0x5, %r14d, %xmm1, %xmm1
vpinsrb $0x6, %ebx, %xmm1, %xmm1
vpinsrb $0x7, %r11d, %xmm1, %xmm1
vpinsrb $0x8, %r10d, %xmm1, %xmm1
vpinsrb $0x9, %r9d, %xmm1, %xmm1
vpinsrb $0xa, %r8d, %xmm1, %xmm1
vpinsrb $0xb, %edi, %xmm1, %xmm1
vpinsrb $0xc, %esi, %xmm1, %xmm1
vpinsrb $0xd, 0x8(%rsp), %xmm1, %xmm1
vpinsrb $0xe, 0x18(%rsp), %xmm1, %xmm1
vpinsrb $0xf, 0x50(%rsp), %xmm1, %xmm1
vpmovzxbd %xmm0, %zmm21   # zmm21 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
vpmovzxbd %xmm1, %zmm22   # zmm22 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
jmp 0x6f89f
movl %ebx, 0x24(%rsp)
movl %ebx, %eax
shlq $0x5, %rax
vpmovzxbd 0x440(%rsp,%rax), %zmm21
vpmovzxbd 0x450(%rsp,%rax), %zmm22
jmp 0x6f89f
vmovdqa64 %zmm19, %zmm22
vmovdqa64 %zmm20, %zmm21
vmovd %xmm14, %eax
cltq
movq %rax, 0x50(%rsp)
vpextrd $0x1, %xmm14, %eax
movslq %eax, %rdi
movq %rdi, 0x80(%rsp)
vextracti128 $0x1, %ymm14, %xmm0
vmovd %xmm0, %eax
movslq %eax, %r10
movq %r10, 0xc0(%rsp)
vpextrd $0x1, %xmm0, %eax
vpextrd $0x2, %xmm0, %ecx
movslq %eax, %r11
movq %r11, 0xd0(%rsp)
movslq %ecx, %r8
movq %r8, 0xd8(%rsp)
vpextrd $0x3, %xmm0, %eax
movslq %eax, %r9
movq %r9, 0x160(%rsp)
vextracti32x4 $0x2, %zmm14, %xmm0
vmovd %xmm0, %eax
movslq %eax, %rbx
movq %rbx, 0x8(%rsp)
vpextrd $0x1, %xmm0, %eax
vpextrd $0x2, %xmm0, %esi
movslq %eax, %r14
movq %r14, 0x68(%rsp)
vextracti32x4 $0x3, %zmm14, %xmm1
vmovd %xmm1, %eax
movslq %eax, %r15
movq %r15, 0x138(%rsp)
vpextrd $0x1, %xmm1, %eax
vpextrd $0x2, %xmm1, %edx
movslq %eax, %rcx
movq %rcx, 0x30(%rsp)
movslq %edx, %r12
movq %r12, 0x40(%rsp)
vpextrd $0x3, %xmm1, %eax
cltq
movq %rax, 0x70(%rsp)
movq 0x38(%rsp), %rdx
vmovd (%rdx,%r15,4), %xmm1
vpinsrd $0x1, (%rdx,%rcx,4), %xmm1, %xmm1
vpinsrd $0x2, (%rdx,%r12,4), %xmm1, %xmm1
vpinsrd $0x3, (%rdx,%rax,4), %xmm1, %xmm15
movslq %esi, %rax
movq %rax, 0x28(%rsp)
vmovd (%rdx,%rbx,4), %xmm1
vpinsrd $0x1, (%rdx,%r14,4), %xmm1, %xmm1
vpinsrd $0x2, (%rdx,%rax,4), %xmm1, %xmm1
vpextrd $0x3, %xmm0, %eax
cltq
movq %rax, 0xc8(%rsp)
vpinsrd $0x3, (%rdx,%rax,4), %xmm1, %xmm4
vmovd (%rdx,%r10,4), %xmm0
vpinsrd $0x1, (%rdx,%r11,4), %xmm0, %xmm0
vpinsrd $0x2, (%rdx,%r8,4), %xmm0, %xmm0
vpinsrd $0x3, (%rdx,%r9,4), %xmm0, %xmm9
vpextrd $0x2, %xmm14, %eax
cltq
movq %rax, 0x88(%rsp)
movq 0x50(%rsp), %rcx
vmovd (%rdx,%rcx,4), %xmm0
vpinsrd $0x1, (%rdx,%rdi,4), %xmm0, %xmm0
vpinsrd $0x2, (%rdx,%rax,4), %xmm0, %xmm0
vpextrd $0x3, %xmm14, %eax
cltq
movq %rax, 0x18(%rsp)
vpinsrd $0x3, (%rdx,%rax,4), %xmm0, %xmm8
vmovd %xmm13, %eax
movslq %eax, %r15
vpextrd $0x1, %xmm13, %eax
cltq
movq %rax, 0x128(%rsp)
vpextrd $0x2, %xmm13, %eax
vpextrd $0x3, %xmm13, %ecx
movslq %eax, %r12
movslq %ecx, %rbx
movq %rbx, 0x148(%rsp)
vextracti128 $0x1, %ymm13, %xmm0
vmovd %xmm0, %eax
movslq %eax, %r14
vpextrd $0x1, %xmm0, %eax
movslq %eax, %r11
movq %r11, 0x140(%rsp)
vextracti32x4 $0x2, %zmm13, %xmm1
vmovd %xmm1, %eax
vpextrd $0x1, %xmm1, %ecx
movslq %eax, %r10
movq %r10, 0xb0(%rsp)
movslq %ecx, %r9
movq %r9, 0xa8(%rsp)
vpextrd $0x2, %xmm1, %eax
movslq %eax, %r8
movq %r8, 0xb8(%rsp)
vpextrd $0x3, %xmm1, %eax
movslq %eax, %rdi
movq %rdi, 0x150(%rsp)
vextracti32x4 $0x3, %zmm13, %xmm1
vmovd %xmm1, %eax
vpextrd $0x1, %xmm1, %ecx
movslq %eax, %rsi
movq %rsi, 0x158(%rsp)
movslq %ecx, %rcx
movq %rcx, 0x98(%rsp)
vpextrd $0x2, %xmm1, %eax
cltq
movq %rax, 0xa0(%rsp)
vmovd (%rdx,%rsi,4), %xmm2
vpinsrd $0x1, (%rdx,%rcx,4), %xmm2, %xmm2
vpinsrd $0x2, (%rdx,%rax,4), %xmm2, %xmm2
vpextrd $0x3, %xmm1, %eax
cltq
movq %rax, 0x90(%rsp)
vpinsrd $0x3, (%rdx,%rax,4), %xmm2, %xmm1
vmovd (%rdx,%r10,4), %xmm2
vpinsrd $0x1, (%rdx,%r9,4), %xmm2, %xmm2
vpinsrd $0x2, (%rdx,%r8,4), %xmm2, %xmm2
vpinsrd $0x3, (%rdx,%rdi,4), %xmm2, %xmm2
vpextrd $0x2, %xmm0, %ecx
movslq %ecx, %r9
vmovd (%rdx,%r14,4), %xmm3
movq %r14, 0x168(%rsp)
vpinsrd $0x1, (%rdx,%r11,4), %xmm3, %xmm3
vpinsrd $0x2, (%rdx,%r9,4), %xmm3, %xmm3
movq %r9, 0x170(%rsp)
vpextrd $0x3, %xmm0, %ecx
movslq %ecx, %rax
movq %rax, 0x130(%rsp)
vpinsrd $0x3, (%rdx,%rax,4), %xmm3, %xmm0
vmovd (%rdx,%r15,4), %xmm3
movq %r15, %r11
movq %r15, 0x178(%rsp)
movq 0x128(%rsp), %rsi
vpinsrd $0x1, (%rdx,%rsi,4), %xmm3, %xmm3
vpinsrd $0x2, (%rdx,%r12,4), %xmm3, %xmm3
movq %r12, %r8
vinserti128 $0x1, %xmm1, %ymm2, %ymm1
vpinsrd $0x3, (%rdx,%rbx,4), %xmm3, %xmm2
movq 0x138(%rsp), %rbx
vmovd 0xc(%rdx,%rbx,4), %xmm3
movq 0x30(%rsp), %rax
vpinsrd $0x1, 0xc(%rdx,%rax,4), %xmm3, %xmm3
movq 0x40(%rsp), %rax
vpinsrd $0x2, 0xc(%rdx,%rax,4), %xmm3, %xmm3
vinserti128 $0x1, %xmm0, %ymm2, %ymm0
movq 0x70(%rsp), %rax
vpinsrd $0x3, 0xc(%rdx,%rax,4), %xmm3, %xmm14
movq 0x8(%rsp), %rax
vmovd 0xc(%rdx,%rax,4), %xmm2
movq 0x68(%rsp), %rax
vpinsrd $0x1, 0xc(%rdx,%rax,4), %xmm2, %xmm2
movq 0x28(%rsp), %rax
vpinsrd $0x2, 0xc(%rdx,%rax,4), %xmm2, %xmm2
vinserti64x4 $0x1, %ymm1, %zmm0, %zmm1
movq 0xc8(%rsp), %rax
vpinsrd $0x3, 0xc(%rdx,%rax,4), %xmm2, %xmm0
vmovdqa %ymm0, 0x420(%rsp)
movq 0xc0(%rsp), %rax
vmovd 0xc(%rdx,%rax,4), %xmm0
movq 0xd0(%rsp), %rax
vpinsrd $0x1, 0xc(%rdx,%rax,4), %xmm0, %xmm0
movq 0xd8(%rsp), %rax
vpinsrd $0x2, 0xc(%rdx,%rax,4), %xmm0, %xmm0
vpcmpgtd %zmm1, %zmm24, %k2
kmovw %k2, %ecx
popcntl %ecx, %ecx
leal (%rcx,%rcx), %r12d
movq 0x60(%rsp), %rax
subq %r12, %rax
movq 0x160(%rsp), %r15
vpinsrd $0x3, 0xc(%rdx,%r15,4), %xmm0, %xmm13
movq 0x50(%rsp), %rdi
vmovd 0xc(%rdx,%rdi,4), %xmm0
movq 0x80(%rsp), %rdi
vpinsrd $0x1, 0xc(%rdx,%rdi,4), %xmm0, %xmm0
movq 0x88(%rsp), %rdi
vpinsrd $0x2, 0xc(%rdx,%rdi,4), %xmm0, %xmm0
movq 0x18(%rsp), %r10
vpinsrd $0x3, 0xc(%rdx,%r10,4), %xmm0, %xmm6
movl $0xffffffff, %r12d      # imm = 0xFFFFFFFF
shll %cl, %r12d
notl %r12d
kmovw %r12d, %k4
movq 0x158(%rsp), %rdi
vmovd 0xc(%rdx,%rdi,4), %xmm0
movq 0x98(%rsp), %rcx
vpinsrd $0x1, 0xc(%rdx,%rcx,4), %xmm0, %xmm0
movq 0xa0(%rsp), %rcx
vpinsrd $0x2, 0xc(%rdx,%rcx,4), %xmm0, %xmm0
movq 0x90(%rsp), %rcx
vpinsrd $0x3, 0xc(%rdx,%rcx,4), %xmm0, %xmm0
vmovdqa %xmm0, 0x230(%rsp)
vinserti128 $0x1, %xmm15, %ymm4, %ymm0
movq 0xb0(%rsp), %rcx
vmovd 0xc(%rdx,%rcx,4), %xmm1
movq 0xa8(%rsp), %rcx
vpinsrd $0x1, 0xc(%rdx,%rcx,4), %xmm1, %xmm1
movq 0xb8(%rsp), %rcx
vpinsrd $0x2, 0xc(%rdx,%rcx,4), %xmm1, %xmm1
movq 0x150(%rsp), %r10
vpinsrd $0x3, 0xc(%rdx,%r10,4), %xmm1, %xmm1
vmovdqa %ymm1, 0x400(%rsp)
vinserti128 $0x1, %xmm9, %ymm8, %ymm1
vmovd 0xc(%rdx,%r14,4), %xmm2
movq 0x140(%rsp), %r14
vpinsrd $0x1, 0xc(%rdx,%r14,4), %xmm2, %xmm2
vpinsrd $0x2, 0xc(%rdx,%r9,4), %xmm2, %xmm2
movq 0x130(%rsp), %r9
vpinsrd $0x3, 0xc(%rdx,%r9,4), %xmm2, %xmm2
vmovdqa %xmm2, 0x220(%rsp)
vinserti64x4 $0x1, %ymm0, %zmm1, %zmm0
vmovd 0xc(%rdx,%r11,4), %xmm1
vpinsrd $0x1, 0xc(%rdx,%rsi,4), %xmm1, %xmm1
vpcmpgtd %zmm0, %zmm23, %k3
vpinsrd $0x2, 0xc(%rdx,%r8,4), %xmm1, %xmm0
movq %r8, %r11
kmovw %k3, %ecx
popcntl %ecx, %ecx
movq 0x148(%rsp), %r8
vpinsrd $0x3, 0xc(%rdx,%r8,4), %xmm0, %xmm0
vmovdqa %ymm0, 0x3e0(%rsp)
vpandq %zmm18, %zmm24, %zmm0
vpcompressd %zmm0, %zmm0 {%k2} {z}
vpmovdw %zmm0, (%rax) {%k4}
movl $0xffffffff, %r12d      # imm = 0xFFFFFFFF
shll %cl, %r12d
addl %ecx, %ecx
subq %rcx, %rax
notl %r12d
kmovw %r12d, %k4
vpandq %zmm18, %zmm23, %zmm0
vpcompressd %zmm0, %zmm0 {%k3} {z}
movq %rax, 0x60(%rsp)
vpmovdw %zmm0, (%rax) {%k4}
vmovd 0x4(%rdx,%rbx,4), %xmm9
vmovd 0x8(%rdx,%rbx,4), %xmm0
movq 0x30(%rsp), %rax
vpinsrd $0x1, 0x4(%rdx,%rax,4), %xmm9, %xmm1
vpinsrd $0x1, 0x8(%rdx,%rax,4), %xmm0, %xmm0
movq 0x40(%rsp), %rax
vpinsrd $0x2, 0x4(%rdx,%rax,4), %xmm1, %xmm1
vpinsrd $0x2, 0x8(%rdx,%rax,4), %xmm0, %xmm0
movq 0x70(%rsp), %rax
vpinsrd $0x3, 0x4(%rdx,%rax,4), %xmm1, %xmm1
vmovdqa %xmm1, 0x40(%rsp)
vpinsrd $0x3, 0x8(%rdx,%rax,4), %xmm0, %xmm0
vmovdqa %xmm0, 0x70(%rsp)
movq 0x8(%rsp), %rax
vmovd 0x4(%rdx,%rax,4), %xmm0
vmovd 0x8(%rdx,%rax,4), %xmm1
movq 0x68(%rsp), %rax
vpinsrd $0x1, 0x4(%rdx,%rax,4), %xmm0, %xmm0
vpinsrd $0x1, 0x8(%rdx,%rax,4), %xmm1, %xmm1
movq 0x28(%rsp), %rax
vpinsrd $0x2, 0x4(%rdx,%rax,4), %xmm0, %xmm0
vpinsrd $0x2, 0x8(%rdx,%rax,4), %xmm1, %xmm1
movq 0xc8(%rsp), %rax
vpinsrd $0x3, 0x4(%rdx,%rax,4), %xmm0, %xmm12
vpinsrd $0x3, 0x8(%rdx,%rax,4), %xmm1, %xmm11
movq 0xc0(%rsp), %rax
vmovd 0x4(%rdx,%rax,4), %xmm0
vmovd 0x8(%rdx,%rax,4), %xmm1
movq 0xd0(%rsp), %rax
vpinsrd $0x1, 0x4(%rdx,%rax,4), %xmm0, %xmm0
vpinsrd $0x1, 0x8(%rdx,%rax,4), %xmm1, %xmm1
movq 0xd8(%rsp), %rax
vpinsrd $0x2, 0x4(%rdx,%rax,4), %xmm0, %xmm0
vpinsrd $0x2, 0x8(%rdx,%rax,4), %xmm1, %xmm1
vpinsrd $0x3, 0x4(%rdx,%r15,4), %xmm0, %xmm4
vpinsrd $0x3, 0x8(%rdx,%r15,4), %xmm1, %xmm10
movq 0x50(%rsp), %rax
vmovd 0x4(%rdx,%rax,4), %xmm0
vmovd 0x8(%rdx,%rax,4), %xmm1
movq 0x80(%rsp), %rax
vpinsrd $0x1, 0x4(%rdx,%rax,4), %xmm0, %xmm0
vpinsrd $0x1, 0x8(%rdx,%rax,4), %xmm1, %xmm1
movq 0x88(%rsp), %rax
vpinsrd $0x2, 0x4(%rdx,%rax,4), %xmm0, %xmm0
vpinsrd $0x2, 0x8(%rdx,%rax,4), %xmm1, %xmm1
movq 0x18(%rsp), %rax
vpinsrd $0x3, 0x4(%rdx,%rax,4), %xmm0, %xmm2
vpinsrd $0x3, 0x8(%rdx,%rax,4), %xmm1, %xmm3
vmovdqa 0x420(%rsp), %ymm0
vinserti128 $0x1, %xmm14, %ymm0, %ymm1
vinserti128 $0x1, %xmm13, %ymm6, %ymm6
vmovd 0x4(%rdx,%rdi,4), %xmm13
vmovd 0x8(%rdx,%rdi,4), %xmm0
movq 0x98(%rsp), %rax
vpinsrd $0x1, 0x4(%rdx,%rax,4), %xmm13, %xmm13
vpinsrd $0x1, 0x8(%rdx,%rax,4), %xmm0, %xmm0
movq 0xa0(%rsp), %rax
vpinsrd $0x2, 0x4(%rdx,%rax,4), %xmm13, %xmm13
vpinsrd $0x2, 0x8(%rdx,%rax,4), %xmm0, %xmm0
movq 0x90(%rsp), %rax
vpinsrd $0x3, 0x4(%rdx,%rax,4), %xmm13, %xmm13
vpinsrd $0x3, 0x8(%rdx,%rax,4), %xmm0, %xmm9
movq 0xb0(%rsp), %rax
vmovd 0x4(%rdx,%rax,4), %xmm15
movq 0xa8(%rsp), %rcx
vpinsrd $0x1, 0x4(%rdx,%rcx,4), %xmm15, %xmm15
vmovd 0x8(%rdx,%rax,4), %xmm8
vpinsrd $0x1, 0x8(%rdx,%rcx,4), %xmm8, %xmm8
movq 0xb8(%rsp), %rax
vpinsrd $0x2, 0x4(%rdx,%rax,4), %xmm15, %xmm15
vpinsrd $0x2, 0x8(%rdx,%rax,4), %xmm8, %xmm8
vpinsrd $0x3, 0x4(%rdx,%r10,4), %xmm15, %xmm15
vinserti64x4 $0x1, %ymm1, %zmm6, %zmm25
vpinsrd $0x3, 0x8(%rdx,%r10,4), %xmm8, %xmm6
vmovdqa 0x400(%rsp), %ymm0
vinserti128 $0x1, 0x230(%rsp), %ymm0, %ymm0
movq 0x168(%rsp), %rax
vmovd 0x4(%rdx,%rax,4), %xmm8
vpinsrd $0x1, 0x4(%rdx,%r14,4), %xmm8, %xmm8
vmovd 0x8(%rdx,%rax,4), %xmm14
vpinsrd $0x1, 0x8(%rdx,%r14,4), %xmm14, %xmm14
movq 0x170(%rsp), %rax
vpinsrd $0x2, 0x4(%rdx,%rax,4), %xmm8, %xmm8
vpinsrd $0x2, 0x8(%rdx,%rax,4), %xmm14, %xmm14
vpinsrd $0x3, 0x4(%rdx,%r9,4), %xmm8, %xmm8
vmovdqa 0x3e0(%rsp), %ymm1
vinserti128 $0x1, 0x220(%rsp), %ymm1, %ymm1
vpinsrd $0x3, 0x8(%rdx,%r9,4), %xmm14, %xmm14
vinserti64x4 $0x1, %ymm0, %zmm1, %zmm26
movq 0x178(%rsp), %rax
vmovd 0x4(%rdx,%rax,4), %xmm1
vmovd 0x8(%rdx,%rax,4), %xmm0
vpinsrd $0x1, 0x4(%rdx,%rsi,4), %xmm1, %xmm1
vpinsrd $0x1, 0x8(%rdx,%rsi,4), %xmm0, %xmm0
vinserti128 $0x1, 0x40(%rsp), %ymm12, %ymm12
vinserti128 $0x1, %xmm4, %ymm2, %ymm2
vinserti64x4 $0x1, %ymm12, %zmm2, %zmm2
vinserti128 $0x1, %xmm13, %ymm15, %ymm4
vpinsrd $0x2, 0x4(%rdx,%r11,4), %xmm1, %xmm1
vpinsrd $0x3, 0x4(%rdx,%r8,4), %xmm1, %xmm1
vinserti128 $0x1, %xmm8, %ymm1, %ymm1
vinserti64x4 $0x1, %ymm4, %zmm1, %zmm1
vinserti128 $0x1, 0x70(%rsp), %ymm11, %ymm4
vinserti128 $0x1, %xmm10, %ymm3, %ymm3
vinserti64x4 $0x1, %ymm4, %zmm3, %zmm3
vpsrld $0x10, %zmm23, %zmm23 {%k3}
vpsrld $0x10, %zmm24, %zmm24 {%k2}
vpsrlq $0x20, %zmm23, %zmm4
vpsrlq $0x20, %zmm2, %zmm8
vpmuludq %zmm4, %zmm8, %zmm4
vpsrlq $0x20, %zmm24, %zmm8
vpsrlq $0x20, %zmm1, %zmm10
vpmuludq %zmm8, %zmm10, %zmm8
vpmuludq %zmm23, %zmm2, %zmm2
vpsrlq $0x20, %zmm2, %zmm2
vpord %zmm4, %zmm2, %zmm2 {%k1}
vpmuludq %zmm24, %zmm1, %zmm1
vpsrlq $0x20, %zmm1, %zmm1
vpord %zmm8, %zmm1, %zmm1 {%k1}
vinserti128 $0x1, %xmm9, %ymm6, %ymm4
vpinsrd $0x2, 0x8(%rdx,%r11,4), %xmm0, %xmm0
vpinsrd $0x3, 0x8(%rdx,%r8,4), %xmm0, %xmm0
vinserti128 $0x1, %xmm14, %ymm0, %ymm0
vinserti64x4 $0x1, %ymm4, %zmm0, %zmm0
vpsrld $0x10, %zmm25, %zmm4
vpsrld $0x10, %zmm26, %zmm6
vpaddd %zmm17, %zmm4, %zmm4
vpsrlvd %zmm4, %zmm2, %zmm2
vpaddd %zmm17, %zmm6, %zmm4
vpsrlvd %zmm4, %zmm1, %zmm1
vpandq %zmm18, %zmm25, %zmm4
vpmulld %zmm4, %zmm2, %zmm2
vpandq %zmm18, %zmm26, %zmm4
vpmulld %zmm4, %zmm1, %zmm1
vpaddd %zmm3, %zmm23, %zmm3
vpaddd %zmm2, %zmm3, %zmm23
vpaddd %zmm0, %zmm24, %zmm0
vpaddd %zmm0, %zmm1, %zmm24
movl 0x180(%rsp), %eax
leal -0x1(%rax), %esi
movl %esi, 0x180(%rsp)
vmovdqa64 %zmm20, %zmm13
vmovdqa64 %zmm19, %zmm15
testl %eax, %eax
vmovdqa64 0x300(%rsp), %zmm6
vmovdqa64 0x2c0(%rsp), %zmm8
movq 0x120(%rsp), %rdi
movl 0x24(%rsp), %ebx
jg 0x6f2ca
jmp 0x70267
movq 0x38(%rsp), %rdi
callq 0x7e26a
xorl %ebx, %ebx
movq %rbx, %rax
leaq -0x28(%rbp), %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
vmovdqa64 %zmm15, %zmm19
vmovdqa64 %zmm13, %zmm20
movq 0x38(%rsp), %rdx
movq 0x10(%rsp), %rax
movq 0x118(%rsp), %rbx
subq %rbx, %rax
vmovdqa64 %zmm23, 0x240(%rsp)
vmovdqa64 %zmm24, 0x280(%rsp)
vmovdqa64 %zmm20, 0x340(%rsp)
vmovdqa64 %zmm19, 0x380(%rsp)
movq %rdx, %r11
movl $0x1f, %edx
movq 0x60(%rsp), %r14
movl 0x340(%rsp,%rdx,4), %r8d
shlq $0x4, %r8
movl 0x240(%rsp,%rdx,4), %r9d
xorl %ecx, %ecx
cmpl (%r11,%r8), %r9d
seta %cl
movq %r14, %rsi
leal (%rcx,%rcx), %edi
movw %r9w, -0x2(%r14)
shll $0x4, %ecx
shrl %cl, %r9d
movl 0x4(%r11,%r8), %r10d
imulq %r9, %r10
movb 0xe(%r11,%r8), %cl
shrq %cl, %r10
subq %rdi, %r14
addl 0x8(%r11,%r8), %r9d
movzwl 0xc(%r11,%r8), %ecx
imull %r10d, %ecx
addl %r9d, %ecx
movl %ecx, 0x240(%rsp,%rdx,4)
addq $-0x1, %rdx
jb 0x702a4
movl %edi, %ecx
movq %rsi, %r8
subq %rcx, %r8
movq 0x108(%rsp), %rdx
movq 0x10(%rsp), %r10
addl %edx, %r10d
addl %edi, %r10d
subl %esi, %r10d
xorl %r9d, %r9d
movl 0x2bc(%rsp,%r9), %edi
movl %edi, -0x4(%r8,%r9)
addq $-0x4, %r9
addl $0x4, %r10d
cmpq $-0x80, %r9
jne 0x70326
addq %rbx, %rdx
addq %rcx, %rdx
subq %rsi, %rdx
subq %r9, %rdx
movl %eax, %edi
movq 0x110(%rsp), %rax
movl %r10d, (%rax)
addq %rbx, %rdi
subq %rcx, %rsi
addq %r9, %rsi
vzeroupper
callq 0x4830
movq 0x38(%rsp), %rdi
callq 0x7e26a
jmp 0x70244
leaq 0x2bb51(%rip), %rdi     # 0x9bed2
leaq 0x2bac8(%rip), %rsi     # 0x9be50
leaq 0x2bae1(%rip), %rcx     # 0x9be70
movl $0xcd, %edx
vzeroupper
callq 0x42f0
leaq 0x2bb13(%rip), %rdi     # 0x9beb6
leaq 0x2baa6(%rip), %rsi     # 0x9be50
leaq 0x2babf(%rip), %rcx     # 0x9be70
movl $0xcc, %edx
vzeroupper
callq 0x42f0
leaq 0x2fc9b(%rip), %rdi     # 0xa0060
leaq 0x2ba84(%rip), %rsi     # 0x9be50
leaq 0x2ba9d(%rip), %rcx     # 0x9be70
movl $0xcb, %edx
vzeroupper
callq 0x42f0