LLM4Binary/decompile-bench-makefile huggingface dataset:
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_CMPEQI
INSTR(CMPEQI) {
  int32_t imm = (int32_t)(int8_t)i->imm;
  I32 r0 = LOAD_REG_I32(0);
  I32 eq = CMPEQ_IMM_I32(r0, imm);
  STORE_T_I32(eq);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x10(%rbp), %rax
movw 0x10(%rax), %ax
movsbl %al, %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movl 0x20(%rax), %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
cmpl -0x14(%rbp), %eax
sete %al
andb $0x1, %al
movzbl %al, %eax
movl %eax, -0x1c(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x1c(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_CMPEQ
INSTR(CMPEQ) {
  I32 rm = LOAD_REG_I32(i->rm);
  I32 rn = LOAD_REG_I32(i->rn);
  I32 eq = CMPEQ_I32(rn, rm);
  STORE_T_I32(eq);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
cmpl -0x14(%rbp), %eax
sete %al
andb $0x1, %al
movzbl %al, %eax
movl %eax, -0x1c(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x1c(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_CMPPZ
INSTR(CMPPZ) {
  I32 rn = LOAD_REG_I32(i->rn);
  I32 r = CMPSGE_IMM_I32(rn, 0);
  STORE_T_I32(r);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
cmpl $0x0, -0x14(%rbp)
setge %al
andb $0x1, %al
movzbl %al, %eax
movl %eax, -0x18(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x18(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_CMPSTR
INSTR(CMPSTR) {
  // if any diff is zero, the bytes match
  I32 rm = LOAD_REG_I32(i->rm);
  I32 rn = LOAD_REG_I32(i->rn);
  I32 diff = XOR_I32(rn, rm);
  I32 b4_eq = CMPEQ_IMM_I32(AND_I32(diff, 0xff000000), 0);
  I32 b3_eq = CMPEQ_IMM_I32(AND_I32(diff, 0x00ff0000), 0);
  I32 b2_eq = CMPEQ_IMM_I32(AND_I32(diff, 0x0000ff00), 0);
  I32 b1_eq = CMPEQ_IMM_I32(AND_I32(diff, 0x000000ff), 0);
  I32 r = OR_I32(OR_I32(OR_I32(b1_eq, b2_eq), b3_eq), b4_eq);
  STORE_T_I32(r);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
xorl -0x14(%rbp), %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %eax
andl $0xff000000, %eax       # imm = 0xFF000000
cmpl $0x0, %eax
sete %al
andb $0x1, %al
movzbl %al, %eax
movl %eax, -0x20(%rbp)
movl -0x1c(%rbp), %eax
andl $0xff0000, %eax         # imm = 0xFF0000
cmpl $0x0, %eax
sete %al
andb $0x1, %al
movzbl %al, %eax
movl %eax, -0x24(%rbp)
movl -0x1c(%rbp), %eax
andl $0xff00, %eax           # imm = 0xFF00
cmpl $0x0, %eax
sete %al
andb $0x1, %al
movzbl %al, %eax
movl %eax, -0x28(%rbp)
movl -0x1c(%rbp), %eax
andl $0xff, %eax
cmpl $0x0, %eax
sete %al
andb $0x1, %al
movzbl %al, %eax
movl %eax, -0x2c(%rbp)
movl -0x2c(%rbp), %eax
orl -0x28(%rbp), %eax
orl -0x24(%rbp), %eax
orl -0x20(%rbp), %eax
movl %eax, -0x30(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x30(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw (%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_DIV0S
INSTR(DIV0S) {
  I32 rm = LOAD_REG_I32(i->rm);
  I32 rn = LOAD_REG_I32(i->rn);
  I32 qm = XOR_I32(rn, rm);

  // update Q == M flag
  STORE_QM_I32(NOT_I32(qm));

  // msb of Q ^ M -> T
  I32 r = LSHR_IMM_I32(qm, 31);
  STORE_T_I32(r);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
xorl -0x14(%rbp), %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %ecx
xorl $-0x1, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x154(%rax)
movl -0x1c(%rbp), %eax
shrl $0x1f, %eax
movl %eax, -0x20(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x20(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_DIV1
INSTR(DIV1) {
  I32 rm = LOAD_REG_I32(i->rm);
  I32 rn = LOAD_REG_I32(i->rn);

  // if Q == M, r0 = ~Rm and C = 1; else, r0 = Rm and C = 0
  I32 qm = ASHR_IMM_I32(LOAD_QM_I32(), 31);
  I32 r0 = XOR_I32(rm, qm);
  I32 carry = LSHR_IMM_I32(qm, 31);

  // initialize output bit as (Q == M) ^ Rn
  qm = XOR_I32(qm, rn);

  // shift Rn left by 1 and add T
  rn = OR_I32(SHL_IMM_I32(rn, 1), LOAD_T_I32());

  // add or subtract Rm based on r0 and C
  I32 rd = ADD_I32(ADD_I32(rn, r0), carry);
  STORE_REG_I32(i->rn, rd);

  // if C is cleared, invert output bit
  carry = LSHR_IMM_I32(
      OR_I32(AND_I32(rn, r0), AND_I32(OR_I32(rn, r0), NOT_I32(rd))), 31);
  qm = SELECT_I32(carry, qm, NOT_I32(qm));
  STORE_QM_I32(qm);

  // set T to output bit (which happens to be Q == M)
  STORE_T_I32(LSHR_IMM_I32(qm, 31));

  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x18(%rbp)
movq -0x8(%rbp), %rax
movl 0x154(%rax), %eax
sarl $0x1f, %eax
movl %eax, -0x1c(%rbp)
movl -0x14(%rbp), %eax
xorl -0x1c(%rbp), %eax
movl %eax, -0x20(%rbp)
movl -0x1c(%rbp), %eax
shrl $0x1f, %eax
movl %eax, -0x24(%rbp)
movl -0x1c(%rbp), %eax
xorl -0x18(%rbp), %eax
movl %eax, -0x1c(%rbp)
movl -0x18(%rbp), %eax
shll %eax
movq -0x8(%rbp), %rcx
movl 0x14c(%rcx), %ecx
andl $0x1, %ecx
orl %ecx, %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
addl -0x20(%rbp), %eax
addl -0x24(%rbp), %eax
movl %eax, -0x28(%rbp)
movl -0x28(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movl -0x18(%rbp), %eax
andl -0x20(%rbp), %eax
movl -0x18(%rbp), %ecx
orl -0x20(%rbp), %ecx
movl -0x28(%rbp), %edx
xorl $-0x1, %edx
andl %edx, %ecx
orl %ecx, %eax
shrl $0x1f, %eax
movl %eax, -0x24(%rbp)
cmpl $0x0, -0x24(%rbp)
je 0x4eed
movl -0x1c(%rbp), %eax
movl %eax, -0x2c(%rbp)
jmp 0x4ef6
movl -0x1c(%rbp), %eax
xorl $-0x1, %eax
movl %eax, -0x2c(%rbp)
movl -0x2c(%rbp), %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x154(%rax)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x1c(%rbp), %esi
shrl $0x1f, %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_DMULS
INSTR(DMULS) {
  I64 rm = SEXT_I32_I64(LOAD_REG_I32(i->rm));
  I64 rn = SEXT_I32_I64(LOAD_REG_I32(i->rn));
  I64 p = SMUL_I64(rm, rn);
  I32 low = TRUNCATE_I64_I32(p);
  I32 high = TRUNCATE_I64_I32(LSHR_IMM_I64(p, 32));
  STORE_MACL_I32(low);
  STORE_MACH_I32(high);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movslq 0x20(%rax,%rcx,4), %rax
movq %rax, -0x18(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movslq 0x20(%rax,%rcx,4), %rax
movq %rax, -0x20(%rbp)
movq -0x18(%rbp), %rax
imulq -0x20(%rbp), %rax
movq %rax, -0x28(%rbp)
movq -0x28(%rbp), %rax
movl %eax, -0x2c(%rbp)
movq -0x28(%rbp), %rax
shrq $0x20, %rax
movl %eax, -0x30(%rbp)
movl -0x2c(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x1c(%rax)
movl -0x30(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x18(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_DMULU
INSTR(DMULU) {
  I64 rm = ZEXT_I32_I64(LOAD_REG_I32(i->rm));
  I64 rn = ZEXT_I32_I64(LOAD_REG_I32(i->rn));
  I64 p = UMUL_I64(rm, rn);
  I32 low = TRUNCATE_I64_I32(p);
  I32 high = TRUNCATE_I64_I32(LSHR_IMM_I64(p, 32));
  STORE_MACL_I32(low);
  STORE_MACH_I32(high);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movq %rax, -0x18(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movq %rax, -0x20(%rbp)
movq -0x18(%rbp), %rax
imulq -0x20(%rbp), %rax
movq %rax, -0x28(%rbp)
movq -0x28(%rbp), %rax
movl %eax, -0x2c(%rbp)
movq -0x28(%rbp), %rax
shrq $0x20, %rax
movl %eax, -0x30(%rbp)
movl -0x2c(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x1c(%rax)
movl -0x30(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x18(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_DT
INSTR(DT) {
  I32 rn = LOAD_REG_I32(i->rn);
  I32 v = SUB_IMM_I32(rn, 1);
  STORE_REG_I32(i->rn, v);
  STORE_T_I32(CMPEQ_IMM_I32(v, 0));
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %eax
subl $0x1, %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
cmpl $0x0, -0x18(%rbp)
sete %al
andb $0x1, %al
movzbl %al, %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_EXTSB
INSTR(EXTSB) {
  I8 rm = LOAD_REG_I8(i->rm);
  I32 v = SEXT_I8_I32(rm);
  STORE_REG_I32(i->rn, v);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movb %al, -0x11(%rbp)
movsbl -0x11(%rbp), %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_EXTUW
INSTR(EXTUW) {
  I32 rm = LOAD_REG_I16(i->rm);
  I32 v = ZEXT_I16_I32(rm);
  STORE_REG_I32(i->rn, v);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
cwtl
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %eax
movzwl %ax, %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_MULL
INSTR(MULL) {
  I32 rm = LOAD_REG_I32(i->rm);
  I32 rn = LOAD_REG_I32(i->rn);
  I32 v = SMUL_I32(rn, rm);
  STORE_MACL_I32(v);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
imull -0x14(%rbp), %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x1c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_MULS
INSTR(MULS) {
  I32 rm = SEXT_I16_I32(LOAD_REG_I16(i->rm));
  I32 rn = SEXT_I16_I32(LOAD_REG_I16(i->rn));
  I32 v = SMUL_I32(rn, rm);
  STORE_MACL_I32(v);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
cwtl
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
cwtl
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
imull -0x14(%rbp), %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x1c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw (%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_NEG
INSTR(NEG) {
  I32 rm = LOAD_REG_I32(i->rm);
  I32 v = NEG_I32(rm);
  STORE_REG_I32(i->rn, v);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
xorl %eax, %eax
subl -0x14(%rbp), %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_NEGC
INSTR(NEGC) {
  I32 t = LOAD_T_I32();
  I32 rm = LOAD_REG_I32(i->rm);
  I32 v = SUB_I32(NEG_I32(rm), t);
  STORE_REG_I32(i->rn, v);
  I32 c = OR_I32(t, rm);
  STORE_T_I32(c);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %eax
andl $0x1, %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x18(%rbp)
xorl %eax, %eax
subl -0x18(%rbp), %eax
subl -0x14(%rbp), %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movl -0x14(%rbp), %eax
orl -0x18(%rbp), %eax
movl %eax, -0x20(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x20(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nop
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_SUBC
INSTR(SUBC) {
  I32 rm = LOAD_REG_I32(i->rm);
  I32 rn = LOAD_REG_I32(i->rn);
  I32 v = SUB_I32(SUB_I32(rn, rm), LOAD_T_I32());
  STORE_REG_I32(i->rn, v);

  // compute carry flag, taken from Hacker's Delight
  I32 c = OR_I32(AND_I32(NOT_I32(rn), rm), AND_I32(OR_I32(NOT_I32(rn), rm), v));
  STORE_T_I32(c);

  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
subl -0x14(%rbp), %eax
movq -0x8(%rbp), %rcx
movl 0x14c(%rcx), %ecx
andl $0x1, %ecx
subl %ecx, %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movl -0x18(%rbp), %eax
xorl $-0x1, %eax
andl -0x14(%rbp), %eax
movl -0x18(%rbp), %ecx
xorl $-0x1, %ecx
orl -0x14(%rbp), %ecx
andl -0x1c(%rbp), %ecx
orl %ecx, %eax
movl %eax, -0x20(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x20(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nop
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_ANDI
INSTR(ANDI) {
  I32 r0 = LOAD_REG_I32(0);
  I32 mask = i->imm;
  I32 v = AND_I32(r0, mask);
  STORE_REG_I32(0, v);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movl 0x20(%rax), %eax
movl %eax, -0x14(%rbp)
movq -0x10(%rbp), %rax
movzwl 0x10(%rax), %eax
movl %eax, -0x18(%rbp)
movl -0x14(%rbp), %eax
andl -0x18(%rbp), %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x20(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_ANDB
INSTR(ANDB) {
  I32 r0 = LOAD_REG_I32(0);
  I32 gbr = LOAD_GBR_I32();
  I32 addr = ADD_I32(r0, gbr);
  I8 data = LOAD_I8(addr);
  I8 mask = i->imm;
  I8 v = AND_I8(data, mask);
  STORE_I8(addr, v);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movl 0x20(%rax), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movl 0x10(%rax), %eax
movl %eax, -0x18(%rbp)
movl -0x14(%rbp), %eax
addl -0x18(%rbp), %eax
movl %eax, -0x1c(%rbp)
movq -0x8(%rbp), %rax
movq 0x160(%rax), %rax
movslq -0x1c(%rbp), %rcx
movq -0x8(%rbp), %rdx
andq 0x168(%rdx), %rcx
movb (%rax,%rcx), %al
movb %al, -0x1d(%rbp)
movq -0x10(%rbp), %rax
movw 0x10(%rax), %ax
movb %al, -0x1e(%rbp)
movsbl -0x1d(%rbp), %eax
movsbl -0x1e(%rbp), %ecx
andl %ecx, %eax
movb %al, -0x1f(%rbp)
movb -0x1f(%rbp), %dl
movq -0x8(%rbp), %rax
movq 0x160(%rax), %rax
movslq -0x1c(%rbp), %rcx
movq -0x8(%rbp), %rsi
andq 0x168(%rsi), %rcx
movb %dl, (%rax,%rcx)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_NOT
INSTR(NOT) {
  I32 rm = LOAD_REG_I32(i->rm);
  I32 v = NOT_I32(rm);
  STORE_REG_I32(i->rn, v);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %eax
xorl $-0x1, %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw (%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_ORI
INSTR(ORI) {
  I32 r0 = LOAD_REG_I32(0);
  I32 v = OR_IMM_I32(r0, (uint32_t)i->imm);
  STORE_REG_I32(0, v);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movl 0x20(%rax), %eax
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %eax
movq -0x10(%rbp), %rcx
movzwl 0x10(%rcx), %ecx
orl %ecx, %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x20(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nop
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_ORB
INSTR(ORB) {
  I32 r0 = LOAD_REG_I32(0);
  I32 gbr = LOAD_GBR_I32();
  I32 addr = ADD_I32(r0, gbr);
  I8 v = OR_IMM_I8(LOAD_I8(addr), (uint8_t)i->imm);
  STORE_I8(addr, v);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movl 0x20(%rax), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movl 0x10(%rax), %eax
movl %eax, -0x18(%rbp)
movl -0x14(%rbp), %eax
addl -0x18(%rbp), %eax
movl %eax, -0x1c(%rbp)
movq -0x8(%rbp), %rax
movq 0x160(%rax), %rax
movslq -0x1c(%rbp), %rcx
movq -0x8(%rbp), %rdx
andq 0x168(%rdx), %rcx
movsbl (%rax,%rcx), %eax
movq -0x10(%rbp), %rcx
movw 0x10(%rcx), %cx
movzbl %cl, %ecx
orl %ecx, %eax
movb %al, -0x1d(%rbp)
movb -0x1d(%rbp), %dl
movq -0x8(%rbp), %rax
movq 0x160(%rax), %rax
movslq -0x1c(%rbp), %rcx
movq -0x8(%rbp), %rsi
andq 0x168(%rsi), %rcx
movb %dl, (%rax,%rcx)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_TAS
INSTR(TAS) {
  I32 addr = LOAD_REG_I32(i->rn);
  I8 v = LOAD_I8(addr);
  STORE_I8(addr, OR_I8(v, (uint8_t)0x80));
  I8 r = CMPEQ_I8(v, 0);
  STORE_T_I32(r);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movq 0x160(%rax), %rax
movslq -0x14(%rbp), %rcx
movq -0x8(%rbp), %rdx
andq 0x168(%rdx), %rcx
movb (%rax,%rcx), %al
movb %al, -0x15(%rbp)
movsbl -0x15(%rbp), %eax
orl $0x80, %eax
movb %al, %dl
movq -0x8(%rbp), %rax
movq 0x160(%rax), %rax
movslq -0x14(%rbp), %rcx
movq -0x8(%rbp), %rsi
andq 0x168(%rsi), %rcx
movb %dl, (%rax,%rcx)
movsbl -0x15(%rbp), %eax
cmpl $0x0, %eax
sete %al
andb $0x1, %al
movzbl %al, %eax
movb %al, -0x16(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movsbl -0x16(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_TST
INSTR(TST) {
  I32 rm = LOAD_REG_I32(i->rm);
  I32 rn = LOAD_REG_I32(i->rn);
  I32 r = CMPEQ_IMM_I32(AND_I32(rn, rm), 0);
  STORE_T_I32(r);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
andl -0x14(%rbp), %eax
cmpl $0x0, %eax
sete %al
andb $0x1, %al
movzbl %al, %eax
movl %eax, -0x1c(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x1c(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nop
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_TSTI
INSTR(TSTI) {
  I32 r0 = LOAD_REG_I32(0);
  uint32_t imm = (uint32_t)i->imm;
  I32 r = CMPEQ_IMM_I32(AND_I32(r0, imm), 0);
  STORE_T_I32(r);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movl 0x20(%rax), %eax
movl %eax, -0x14(%rbp)
movq -0x10(%rbp), %rax
movzwl 0x10(%rax), %eax
movl %eax, -0x18(%rbp)
movl -0x14(%rbp), %eax
andl -0x18(%rbp), %eax
cmpl $0x0, %eax
sete %al
andb $0x1, %al
movzbl %al, %eax
movl %eax, -0x1c(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x1c(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_TSTB
INSTR(TSTB) {
  I32 r0 = LOAD_REG_I32(0);
  I32 gbr = LOAD_GBR_I32();
  I32 addr = ADD_I32(r0, gbr);
  I8 v = LOAD_I8(addr);
  I8 imm = (uint8_t)i->imm;
  I8 r = CMPEQ_IMM_I8(AND_I8(v, imm), 0);
  STORE_T_I32(r);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movl 0x20(%rax), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movl 0x10(%rax), %eax
movl %eax, -0x18(%rbp)
movl -0x14(%rbp), %eax
addl -0x18(%rbp), %eax
movl %eax, -0x1c(%rbp)
movq -0x8(%rbp), %rax
movq 0x160(%rax), %rax
movslq -0x1c(%rbp), %rcx
movq -0x8(%rbp), %rdx
andq 0x168(%rdx), %rcx
movb (%rax,%rcx), %al
movb %al, -0x1d(%rbp)
movq -0x10(%rbp), %rax
movw 0x10(%rax), %ax
movb %al, -0x1e(%rbp)
movsbl -0x1d(%rbp), %eax
movsbl -0x1e(%rbp), %ecx
andl %ecx, %eax
cmpl $0x0, %eax
sete %al
andb $0x1, %al
movzbl %al, %eax
movb %al, -0x1f(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movsbl -0x1f(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_ROTL
INSTR(ROTL) {
  I32 rn = LOAD_REG_I32(i->rn);
  I32 rn_msb = AND_I32(LSHR_IMM_I32(rn, 31), 0x1);
  I32 v = OR_I32(SHL_IMM_I32(rn, 1), rn_msb);
  STORE_REG_I32(i->rn, v);
  STORE_T_I32(rn_msb);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %eax
shrl $0x1f, %eax
andl $0x1, %eax
movl %eax, -0x18(%rbp)
movl -0x14(%rbp), %eax
shll %eax
orl -0x18(%rbp), %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x18(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_ROTR
INSTR(ROTR) {
  I32 rn = LOAD_REG_I32(i->rn);
  I32 rn_lsb = AND_IMM_I32(rn, 0x1);
  I32 v = OR_I32(SHL_IMM_I32(rn_lsb, 31), LSHR_IMM_I32(rn, 1));
  STORE_REG_I32(i->rn, v);
  STORE_T_I32(rn_lsb);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %eax
andl $0x1, %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
shll $0x1f, %eax
movl -0x14(%rbp), %ecx
shrl %ecx
orl %ecx, %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x18(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_ROTCL
INSTR(ROTCL) {
  I32 rn = LOAD_REG_I32(i->rn);
  I32 rn_msb = AND_IMM_I32(LSHR_IMM_I32(rn, 31), 0x1);
  I32 v = OR_I32(SHL_IMM_I32(rn, 1), LOAD_T_I32());
  STORE_REG_I32(i->rn, v);
  STORE_T_I32(rn_msb);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %eax
shrl $0x1f, %eax
andl $0x1, %eax
movl %eax, -0x18(%rbp)
movl -0x14(%rbp), %eax
shll %eax
movq -0x8(%rbp), %rcx
movl 0x14c(%rcx), %ecx
andl $0x1, %ecx
orl %ecx, %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x18(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_ROTCR
INSTR(ROTCR) {
  I32 rn = LOAD_REG_I32(i->rn);
  I32 rn_lsb = AND_IMM_I32(rn, 0x1);
  I32 v = OR_I32(SHL_IMM_I32(LOAD_T_I32(), 31), LSHR_IMM_I32(rn, 1));
  STORE_REG_I32(i->rn, v);
  STORE_T_I32(rn_lsb);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %eax
andl $0x1, %eax
movl %eax, -0x18(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %eax
andl $0x1, %eax
shll $0x1f, %eax
movl -0x14(%rbp), %ecx
shrl %ecx
orl %ecx, %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x18(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_SHAD
INSTR(SHAD) {
  // when Rm >= 0, Rn << Rm
  // when Rm < 0, Rn >> Rm
  // when shifting right > 32, Rn = (Rn >= 0 ? 0 : -1)
  I32 rn = LOAD_REG_I32(i->rn);
  I32 rm = LOAD_REG_I32(i->rm);
  STORE_REG_I32(i->rn, ASHD_I32(rn, rm));
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
andl $0x80000000, %eax       # imm = 0x80000000
cmpl $0x0, %eax
je 0x5f2f
movl -0x18(%rbp), %eax
andl $0x1f, %eax
cmpl $0x0, %eax
je 0x5f1e
movl -0x14(%rbp), %eax
movl -0x18(%rbp), %edx
andl $0x1f, %edx
xorl %ecx, %ecx
subl %edx, %ecx
sarl %cl, %eax
movl %eax, -0x1c(%rbp)
jmp 0x5f27
movl -0x14(%rbp), %eax
sarl $0x1f, %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %eax
movl %eax, -0x20(%rbp)
jmp 0x5f3d
movl -0x14(%rbp), %eax
movl -0x18(%rbp), %ecx
andl $0x1f, %ecx
shll %cl, %eax
movl %eax, -0x20(%rbp)
movl -0x20(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nop
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_SHAL
INSTR(SHAL) {
  I32 rn = LOAD_REG_I32(i->rn);
  I32 rn_msb = AND_I32(LSHR_IMM_I32(rn, 31), 0x1);
  I32 v = SHL_IMM_I32(rn, 1);
  STORE_REG_I32(i->rn, v);
  STORE_T_I32(rn_msb);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %eax
shrl $0x1f, %eax
andl $0x1, %eax
movl %eax, -0x18(%rbp)
movl -0x14(%rbp), %eax
shll %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x18(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nop
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_SHAR
INSTR(SHAR) {
  I32 rn = LOAD_REG_I32(i->rn);
  I32 rn_lsb = AND_IMM_I32(rn, 0x1);
  I32 v = ASHR_IMM_I32(rn, 1);
  STORE_REG_I32(i->rn, v);
  STORE_T_I32(rn_lsb);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %eax
andl $0x1, %eax
movl %eax, -0x18(%rbp)
movl -0x14(%rbp), %eax
sarl %eax
movl %eax, -0x1c(%rbp)
movl -0x1c(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x18(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_SHLD
INSTR(SHLD) {
  // when Rm >= 0, Rn << Rm
  // when Rm < 0, Rn >> Rm
  // when shifting right >= 32, Rn = 0
  I32 rn = LOAD_REG_I32(i->rn);
  I32 rm = LOAD_REG_I32(i->rm);
  STORE_REG_I32(i->rn, LSHD_I32(rn, rm));
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
andl $0x80000000, %eax       # imm = 0x80000000
cmpl $0x0, %eax
je 0x60cd
movl -0x18(%rbp), %eax
andl $0x1f, %eax
cmpl $0x0, %eax
je 0x60be
movl -0x14(%rbp), %eax
movl -0x18(%rbp), %edx
andl $0x1f, %edx
xorl %ecx, %ecx
subl %edx, %ecx
sarl %cl, %eax
movl %eax, -0x1c(%rbp)
jmp 0x60c5
xorl %eax, %eax
movl %eax, -0x1c(%rbp)
jmp 0x60c5
movl -0x1c(%rbp), %eax
movl %eax, -0x20(%rbp)
jmp 0x60db
movl -0x14(%rbp), %eax
movl -0x18(%rbp), %ecx
andl $0x1f, %ecx
shll %cl, %eax
movl %eax, -0x20(%rbp)
movl -0x20(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_SHLL
INSTR(SHLL) {
  I32 rn = LOAD_REG_I32(i->rn);
  I32 rn_msb = AND_IMM_I32(LSHR_IMM_I32(rn, 31), 1);
  STORE_REG_I32(i->rn, SHL_IMM_I32(rn, 1));
  STORE_T_I32(rn_msb);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %eax
shrl $0x1f, %eax
andl $0x1, %eax
movl %eax, -0x18(%rbp)
movl -0x14(%rbp), %edx
shll %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %ecx
andl $-0x2, %ecx
movl -0x18(%rbp), %esi
movl $0x1, %eax
xorl %edx, %edx
cmpl $0x0, %esi
cmovel %edx, %eax
orl %eax, %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_BFS
INSTR(BFS) {
  I32 cond = LOAD_T_I32();
  uint32_t dest_addr = ((int8_t)i->disp * 2) + ctx->pc + 4;
  DELAY_INSTR();
  BRANCH_FALSE_IMM_I32(cond, dest_addr);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %eax
andl $0x1, %eax
movl %eax, -0x14(%rbp)
movq -0x10(%rbp), %rax
movw 0xe(%rax), %ax
movsbl %al, %eax
shll %eax
movq -0x8(%rbp), %rcx
addl 0x4(%rcx), %eax
addl $0x4, %eax
movl %eax, -0x18(%rbp)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movq -0x8(%rbp), %rax
movl %ecx, (%rax)
cmpl $0x0, -0x14(%rbp)
jne 0x6498
movl -0x18(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x4(%rax)
jmp 0x64a5
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw (%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_BTS
INSTR(BTS) {
  I32 cond = LOAD_T_I32();
  uint32_t dest_addr = ((int8_t)i->disp * 2) + ctx->pc + 4;
  DELAY_INSTR();
  BRANCH_TRUE_IMM_I32(cond, dest_addr);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %eax
andl $0x1, %eax
movl %eax, -0x14(%rbp)
movq -0x10(%rbp), %rax
movw 0xe(%rax), %ax
movsbl %al, %eax
shll %eax
movq -0x8(%rbp), %rcx
addl 0x4(%rcx), %eax
addl $0x4, %eax
movl %eax, -0x18(%rbp)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movq -0x8(%rbp), %rax
movl %ecx, (%rax)
cmpl $0x0, -0x14(%rbp)
je 0x6568
movl -0x18(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x4(%rax)
jmp 0x6575
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw (%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_BRA
INSTR(BRA) {
  int32_t disp = ((i->disp & 0xfff) << 20) >>
                 20;  // 12-bit displacement must be sign extended
  uint32_t dest_addr = (disp * 2) + ctx->pc + 4;
  DELAY_INSTR();
  BRANCH_IMM_I32(dest_addr);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x10(%rbp), %rax
movzwl 0xe(%rax), %eax
andl $0xfff, %eax            # imm = 0xFFF
shll $0x14, %eax
sarl $0x14, %eax
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %eax
shll %eax
movq -0x8(%rbp), %rcx
addl 0x4(%rcx), %eax
addl $0x4, %eax
movl %eax, -0x18(%rbp)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movq -0x8(%rbp), %rax
movl %ecx, (%rax)
movl -0x18(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x4(%rax)
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_BRAF
INSTR(BRAF) {
  I32 rn = LOAD_REG_I32(i->rn);
  I32 dest_addr = ADD_IMM_I32(rn, ctx->pc + 4);
  DELAY_INSTR();
  BRANCH_I32(dest_addr);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %eax
movq -0x8(%rbp), %rcx
movl 0x4(%rcx), %ecx
addl $0x4, %ecx
addl %ecx, %eax
movl %eax, -0x18(%rbp)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movq -0x8(%rbp), %rax
movl %ecx, (%rax)
movl -0x18(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_BSR
INSTR(BSR) {
  int32_t disp = ((i->disp & 0xfff) << 20) >>
                 20;  // 12-bit displacement must be sign extended
  uint32_t ret_addr = ctx->pc + 4;
  uint32_t dest_addr = ret_addr + disp * 2;
  DELAY_INSTR();
  STORE_PR_IMM_I32(ret_addr);
  BRANCH_IMM_I32(dest_addr);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x10(%rbp), %rax
movzwl 0xe(%rax), %eax
andl $0xfff, %eax            # imm = 0xFFF
shll $0x14, %eax
sarl $0x14, %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %eax
addl $0x4, %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %eax
movl -0x14(%rbp), %ecx
shll %ecx
addl %ecx, %eax
movl %eax, -0x1c(%rbp)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movq -0x8(%rbp), %rax
movl %ecx, (%rax)
movl -0x18(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0xc(%rax)
movl -0x1c(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_BSRF
INSTR(BSRF) {
  I32 rn = LOAD_REG_I32(i->rn);
  uint32_t ret_addr = ctx->pc + 4;
  I32 dest_addr = ADD_IMM_I32(rn, ret_addr);
  DELAY_INSTR();
  STORE_PR_IMM_I32(ret_addr);
  BRANCH_I32(dest_addr);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %eax
addl $0x4, %eax
movl %eax, -0x18(%rbp)
movl -0x14(%rbp), %eax
addl -0x18(%rbp), %eax
movl %eax, -0x1c(%rbp)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movq -0x8(%rbp), %rax
movl %ecx, (%rax)
movl -0x18(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0xc(%rax)
movl -0x1c(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_JSR
INSTR(JSR) {
  I32 dest_addr = LOAD_REG_I32(i->rn);
  uint32_t ret_addr = ctx->pc + 4;
  DELAY_INSTR();
  STORE_PR_IMM_I32(ret_addr);
  BRANCH_I32(dest_addr);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %eax
addl $0x4, %eax
movl %eax, -0x18(%rbp)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movq -0x8(%rbp), %rax
movl %ecx, (%rax)
movl -0x18(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0xc(%rax)
movl -0x14(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_LDCMSR
INSTR(LDCMSR) {
  I32 addr = LOAD_REG_I32(i->rm);
  I32 v = LOAD_I32(addr);
  STORE_SR_I32(v);
  // reload Rm, sr store could have swapped banks
  addr = LOAD_REG_I32(i->rm);
  STORE_REG_I32(i->rm, ADD_I32(addr, 4));
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movq 0x160(%rax), %rax
movslq -0x14(%rbp), %rcx
movq -0x8(%rbp), %rdx
andq 0x168(%rdx), %rcx
movl (%rax,%rcx), %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %edx
addl $0x4, %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_LDCMGBR
INSTR(LDCMGBR) {
  I32 addr = LOAD_REG_I32(i->rm);
  I32 v = LOAD_I32(addr);
  STORE_GBR_I32(v);
  STORE_REG_I32(i->rm, ADD_I32(addr, 4));
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movq 0x160(%rax), %rax
movslq -0x14(%rbp), %rcx
movq -0x8(%rbp), %rdx
andq 0x168(%rdx), %rcx
movl (%rax,%rcx), %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x10(%rax)
movl -0x14(%rbp), %edx
addl $0x4, %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xa(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nop
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_RTE
INSTR(RTE) {
  I32 ssr = LOAD_SSR_I32();
  I32 spc = LOAD_SPC_I32();
  STORE_SR_I32(ssr);
  BRANCH_I32(spc);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movl 0x150(%rax), %eax
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rax
movl 0x8(%rax), %eax
movl %eax, -0x18(%rbp)
movl -0x14(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x14c(%rax)
movl -0x18(%rbp), %ecx
movq -0x8(%rbp), %rax
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopl (%rax)
// File: /workspace/github_c_makefile_star2_O0/inolen[P]gdb_server/./sh4.h
// Function: sh4_STCMSR
INSTR(STCMSR) {
  I32 addr = SUB_IMM_I32(LOAD_REG_I32(i->rn), 4);
  STORE_REG_I32(i->rn, addr);
  I32 v = LOAD_SR_I32();
  STORE_I32(addr, v);
  NEXT_INSTR();
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl 0x20(%rax,%rcx,4), %eax
subl $0x4, %eax
movl %eax, -0x14(%rbp)
movl -0x14(%rbp), %edx
movq -0x8(%rbp), %rax
movq -0x10(%rbp), %rcx
movzwl 0xc(%rcx), %ecx
movl %edx, 0x20(%rax,%rcx,4)
movq -0x8(%rbp), %rax
movl 0x14c(%rax), %eax
movl %eax, -0x18(%rbp)
movl -0x18(%rbp), %edx
movq -0x8(%rbp), %rax
movq 0x160(%rax), %rax
movslq -0x14(%rbp), %rcx
movq -0x8(%rbp), %rsi
andq 0x168(%rsi), %rcx
movl %edx, (%rax,%rcx)
movq -0x8(%rbp), %rax
movl 0x4(%rax), %ecx
addl $0x2, %ecx
movl %ecx, 0x4(%rax)
popq %rbp
retq
nopw %cs:(%rax,%rax)