// File: /workspace/github_cpp_makefile_star2_O2/jkingan[P]ladyheather/heathgps.cpp
// Function: show_prs_status(int, int, int)
int show_prs_status(int row,int col, int max_row)
{
int p_low, p_high;

   if(have_prs_lm) {
      if     (prs_lm == 0) vidstr(row,col, GREEN,       "PPS: ON,Unfilt ");
      else if(prs_lm == 1) vidstr(row,col, GREEN,       "PPS: ON,Filter ");
      else if(prs_lm == 2) vidstr(row,col, YELLOW,      "PPS: LOW=Locked");
      else if(prs_lm == 3) vidstr(row,col, YELLOW,      "PPS: HI=Locked ");
      else                 vidstr(row,col, RED,         "PPS: ???       ");
      if(++row > max_row) return row;
   }

   if(have_prs_st == 0) return row;

   if(prs_st[5] & 0x18) {
      if(prs_st[5] & 0x08) {
         vidstr(row,col, RED,    "EEPROM: WR ERR");
         if(++row > max_row) return row;
      }
      if(prs_st[5] & 0x10) {
         vidstr(row,col, RED,    "EEPROM: CORRUPT");
         if(++row > max_row) return row;
      }
   }
   else {
      vidstr(row,col, GREEN,  "EEPROM: OK    ");
      if(++row > max_row) return row;
   }

   if(prs_st[5] & 0x01) {
      vidstr(row,col, RED,    "Lamp restarted");
      if(++row > max_row) return row;
   }
   if(prs_st[5] & 0x02) {
      vidstr(row,col, RED,    "Watchdog error");
      if(++row > max_row) return row;
   }
   if(prs_st[5] & 0x04) {
      vidstr(row,col, RED,    "Interrupt err ");
      if(++row > max_row) return row;
   }
   if(prs_st[5] & 0x80) {
      vidstr(row,col, YELLOW, "Unit reset    ");
      if(++row > max_row) return row;
   }



   p_low = prs_st[0] & 0x05;
   p_high= prs_st[0] & 0x0A;
   if(have_prs_ep && (prs_ep == 0)) {
      vidstr(row,col, RED,       "Power: DISABLED");
   }
   else if(p_low || p_high) {
      if(p_low && p_high) vidstr(row,col, RED,         "Power:  BAD    ");
      else if(p_low)      vidstr(row,col, RED,         "Power:  LOW    ");
      else if(p_high)     vidstr(row,col, RED,         "Power:  HIGH   ");
      else                vidstr(row,col, RED,         "Power:  ???    ");
   }
   else vidstr(row,col, GREEN,       "Power:  OK     ");
   if(++row > max_row) return row;

   if(have_prs_fc2) {
      sprintf(out, "Cycles: %-7d", prs_pwr_cycles);
      vidstr(row,col, GREEN, out);
      if(++row > max_row) return row;

      sprintf(out, "FC wrt: %-7d", prs_fc_writes);
      vidstr(row,col, GREEN, out);
      if(++row > max_row) return row;
   }

   if     (prs_st[0] & 0x10) vidstr(row,col, RED,    "Light:  LOW   ");
   else if(prs_st[0] & 0x20) vidstr(row,col, RED,    "Light:  HIGH  ");
   else                      vidstr(row,col, GREEN,  "Light:  OK    ");
   if(++row > max_row) return row;

   if     (prs_st[0] & 0x40) vidstr(row,col, RED,    "GateV:  LOW   ");
   else if(prs_st[0] & 0x80) vidstr(row,col, RED,    "GateV:  HIGH  ");
   else                      vidstr(row,col, GREEN,  "GateV:  OK    ");
   if(++row > max_row) return row;



   if(prs_st[1] & 0x01) vidstr(row,col, RED,         "Synth:  UNLK  ");
   else                 vidstr(row,col, GREEN,       "Synth:  OK"   );
   if(++row > max_row) return row;

   if     (prs_st[1] & 0x02) vidstr(row,col, RED,    "RF VAR: LOW   ");
   else if(prs_st[1] & 0x04) vidstr(row,col, RED,    "RF VAR: HIGH  ");
   else                      vidstr(row,col, GREEN,  "RF VAR: OK    ");
   if(++row > max_row) return row;

   if     (prs_st[1] & 0x08) vidstr(row,col, RED,    "RF VCO: LOW   ");
   else if(prs_st[1] & 0x10) vidstr(row,col, RED,    "RF VCO: HIGH  ");
   else                      vidstr(row,col, GREEN,  "RF VCO: OK    ");
   if(++row > max_row) return row;

   if     (prs_st[1] & 0x20) vidstr(row,col, RED,    "RF AGC: LOW   ");
   else if(prs_st[1] & 0x40) vidstr(row,col, RED,    "RF AGC: HIGH  ");
   else                      vidstr(row,col, GREEN,  "RF AGC: OK    ");
   if(++row > max_row) return row;

   if(prs_st[1] & 0x80) {
      vidstr(row,col, RED,    "Bad PLL param  ");
      if(++row > max_row) return row;
   }


   if(prs_st[2]) {
      if(prs_st[2] & 0x03) {
         if     (prs_st[2] & 0x01) vidstr(row,col, RED,    "Lamp T: LOW   ");
         else if(prs_st[2] & 0x02) vidstr(row,col, RED,    "Lamp T: HIGH  ");
         if(++row > max_row) return row;
      }

      if(prs_st[2] & 0x0C) {
         if     (prs_st[2] & 0x04) vidstr(row,col, RED,    "Xtal T: LOW   ");
         else if(prs_st[2] & 0x08) vidstr(row,col, RED,    "Xtal T: HIGH  ");
         if(++row > max_row) return row;
      }

      if(prs_st[2] & 0x30) {
         if     (prs_st[2] & 0x10) vidstr(row,col, RED,    "Cell T: LOW   ");
         else if(prs_st[2] & 0x20) vidstr(row,col, RED,    "Cell T: HIGH  ");
         if(++row > max_row) return row;
      }

      if(prs_st[2] & 0xC0) {
         if     (prs_st[2] & 0x40) vidstr(row,col, RED,    "Case T: LOW   ");
         else if(prs_st[2] & 0x80) vidstr(row,col, RED,    "Case T: HIGH  ");
         if(++row > max_row) return row;
      }
   }
   else {
      vidstr(row,col, GREEN,  "Temps:  ALL OK");
      if(++row > max_row) return row;
   }



   if     (prs_st[3] & 0x01) vidstr(row,col, YELLOW, "FLL:    OFF   ");
   else                      vidstr(row,col, GREEN,  "FLL:    ON    ");
   if(++row > max_row) return row;

   if     (prs_st[3] & 0x02) vidstr(row,col, YELLOW, "F-Lock: DISABL");
   else                      vidstr(row,col, GREEN,  "F-Lock: ENABLE");
   if(++row > max_row) return row;

   if     (prs_st[3] & 0x04) vidstr(row,col, RED,    "EFC V:  LOW   ");
   else if(prs_st[3] & 0x08) vidstr(row,col, RED,    "EFC V:  HIGH  ");
   else                      vidstr(row,col, GREEN,  "EFC V:  OK    ");
   if(++row > max_row) return row;

   if     (prs_st[3] & 0x10) vidstr(row,col, RED,    "Cal V:  LOW   ");
   else if(prs_st[3] & 0x20) vidstr(row,col, RED,    "Cal V:  HIGH  ");
   else                      vidstr(row,col, GREEN,  "Cal V:  OK    ");
   if(++row > max_row) return row;



   if(prs_st[4] & 0x01) {
      vidstr(row,col, YELLOW, "PLL diaabled  ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x02) {
      vidstr(row,col, YELLOW, "PLL acquiring ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x04) {
      vidstr(row,col, GREEN,  "PLL active    ");
      if(++row > max_row) return row;
   }
   else {
      vidstr(row,col, YELLOW, "PLL inactive  ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x08) {
      vidstr(row,col, YELLOW, "PPS input err ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x10) {
      vidstr(row,col, YELLOW, "PPS input slow");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x20) {
      vidstr(row,col, YELLOW, "PLL restarted ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x40) {
      vidstr(row,col, RED,    "Fctrl saturate");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x80) {
      vidstr(row,col, YELLOW, "NO PPS input  ");
      if(++row > max_row) return row;
   }

   return row;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %edx, %r14d
movl %esi, %ebx
movl %edi, %r15d
leaq 0x15e99d(%rip), %rax    # 0x204a8c
cmpl $0x0, (%rax)
je 0xa615f
leaq 0x15ea0d(%rip), %rax    # 0x204b08
movl (%rax), %eax
cmpq $0x3, %rax
ja 0xa613b
leaq 0x63bf2(%rip), %rcx     # 0x109cfc
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
leaq 0x6c7b4(%rip), %rcx     # 0x1128ce
jmp 0xa6137
leaq 0x6c7cb(%rip), %rcx     # 0x1128ee
jmp 0xa612c
leaq 0x6c7d2(%rip), %rcx     # 0x1128fe
pushq $0xe
jmp 0xa6144
leaq 0x6c7a7(%rip), %rcx     # 0x1128de
pushq $0xa
jmp 0xa6144
leaq 0x6c7cc(%rip), %rcx     # 0x11290e
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xa67cd
leaq 0x15e922(%rip), %rax    # 0x204a88
cmpl $0x0, (%rax)
je 0xa67cd
leaq 0x15e97a(%rip), %r13    # 0x204af0
movl 0x14(%r13), %eax
testb $0x18, %al
je 0xa6187
testb $0x8, %al
jne 0xa61ac
movl %r15d, %r12d
jmp 0xa61d1
leaq 0x6c7af(%rip), %rcx     # 0x11293d
pushq $0xa
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
movl %r12d, %r15d
jl 0xa61fa
jmp 0xa67cd
leaq 0x6c76b(%rip), %rcx     # 0x11291e
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xa67ca
movl 0x14(%r13), %eax
testb $0x10, %al
je 0xa61fa
leaq 0x6c751(%rip), %rcx     # 0x11292d
pushq $0xc
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
movl %r15d, %r12d
jge 0xa67cd
movl 0x14(%r13), %eax
testb $0x1, %al
jne 0xa6207
movl %r12d, %r15d
jmp 0xa622d
leaq 0x6c73e(%rip), %rcx     # 0x11294c
pushq $0xc
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xa67cd
movl 0x14(%r13), %eax
testb $0x2, %al
jne 0xa6236
movl %r15d, %r12d
jmp 0xa625b
leaq 0x6c71e(%rip), %rcx     # 0x11295b
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xa67ca
movl 0x14(%r13), %eax
testb $0x4, %al
jne 0xa6264
movl %r12d, %r15d
jmp 0xa628a
leaq 0x6c6ff(%rip), %rcx     # 0x11296a
pushq $0xc
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xa67cd
movl 0x14(%r13), %eax
testb %al, %al
jns 0xa62b2
leaq 0x6c6e4(%rip), %rcx     # 0x112979
pushq $0xe
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xa67cd
leaq 0x15e827(%rip), %rax    # 0x204ae0
cmpl $0x0, (%rax)
je 0xa62d3
leaq 0x15e8b3(%rip), %rax    # 0x204b78
cmpl $0x0, (%rax)
jne 0xa62d3
leaq 0x6c6b7(%rip), %rcx     # 0x112988
jmp 0xa631e
movl (%r13), %eax
testb $0xf, %al
je 0xa62f2
testb $0xa, %al
sete %cl
testb $0x5, %al
sete %dl
orb %cl, %dl
jne 0xa62fd
leaq 0x6c6a8(%rip), %rcx     # 0x112998
jmp 0xa631e
leaq 0x6c6df(%rip), %rcx     # 0x1129d8
pushq $0xa
jmp 0xa6320
testb $0x5, %al
je 0xa630a
leaq 0x6c6a0(%rip), %rcx     # 0x1129a8
jmp 0xa631e
testb $0xa, %al
je 0xa6317
leaq 0x6c6a3(%rip), %rcx     # 0x1129b8
jmp 0xa631e
leaq 0x6c6aa(%rip), %rcx     # 0x1129c8
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xa67ca
leaq 0x15e759(%rip), %rax    # 0x204a98
cmpl $0x0, (%rax)
je 0xa63d2
leaq 0x15e7d1(%rip), %rax    # 0x204b20
movl (%rax), %edx
leaq 0x27fec8(%rip), %r13    # 0x326220
leaq 0x6c689(%rip), %rsi     # 0x1129e8
movq %r13, %rdi
xorl %eax, %eax
callq 0x9060
pushq $0xa
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
movq %r13, %rcx
callq 0xe2d2
leal 0x2(%r15), %r12d
cmpl %r14d, %r12d
jle 0xa638a
movl %r12d, %r15d
jmp 0xa67cd
leaq 0x15e793(%rip), %rax    # 0x204b24
movl (%rax), %edx
leaq 0x27fe86(%rip), %r13    # 0x326220
leaq 0x6c654(%rip), %rsi     # 0x1129f5
movq %r13, %rdi
xorl %eax, %eax
callq 0x9060
pushq $0xa
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
movq %r13, %rcx
callq 0xe2d2
addl $0x3, %r15d
movl %r15d, %r12d
cmpl %r14d, %r15d
leaq 0x15e724(%rip), %r13    # 0x204af0
jg 0xa67cd
movl (%r13), %eax
testb $0x10, %al
jne 0xa63e9
testb $0x20, %al
jne 0xa63f2
leaq 0x6c63b(%rip), %rcx     # 0x112a20
pushq $0xa
jmp 0xa63fb
leaq 0x6c612(%rip), %rcx     # 0x112a02
jmp 0xa63f9
leaq 0x6c618(%rip), %rcx     # 0x112a11
pushq $0xc
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xa67cd
movl (%r13), %eax
testb $0x40, %al
jne 0xa642b
testb %al, %al
js 0xa6434
leaq 0x6c626(%rip), %rcx     # 0x112a4d
pushq $0xa
jmp 0xa643d
leaq 0x6c5fd(%rip), %rcx     # 0x112a2f
jmp 0xa643b
leaq 0x6c603(%rip), %rcx     # 0x112a3e
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x2(%r12), %r15d
cmpl %r14d, %r15d
jg 0xa67cd
testb $0x1, 0x4(%r13)
jne 0xa6468
leaq 0x6c607(%rip), %rcx     # 0x112a6b
pushq $0xa
jmp 0xa6471
leaq 0x6c5ed(%rip), %rcx     # 0x112a5c
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x3(%r12), %r15d
cmpl %r14d, %r15d
jg 0xa67cd
movl 0x4(%r13), %eax
testb $0x2, %al
jne 0xa64a1
testb $0x4, %al
jne 0xa64aa
leaq 0x6c5f7(%rip), %rcx     # 0x112a94
pushq $0xa
jmp 0xa64b3
leaq 0x6c5ce(%rip), %rcx     # 0x112a76
jmp 0xa64b1
leaq 0x6c5d4(%rip), %rcx     # 0x112a85
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x4(%r12), %r15d
cmpl %r14d, %r15d
jg 0xa67cd
movl 0x4(%r13), %eax
testb $0x8, %al
jne 0xa64e3
testb $0x10, %al
jne 0xa64ec
leaq 0x6c5e2(%rip), %rcx     # 0x112ac1
pushq $0xa
jmp 0xa64f5
leaq 0x6c5b9(%rip), %rcx     # 0x112aa3
jmp 0xa64f3
leaq 0x6c5bf(%rip), %rcx     # 0x112ab2
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x5(%r12), %r15d
cmpl %r14d, %r15d
jg 0xa67cd
movl 0x4(%r13), %eax
testb $0x20, %al
jne 0xa6525
testb $0x40, %al
jne 0xa652e
leaq 0x6c5cd(%rip), %rcx     # 0x112aee
pushq $0xa
jmp 0xa6537
leaq 0x6c5a4(%rip), %rcx     # 0x112ad0
jmp 0xa6535
leaq 0x6c5aa(%rip), %rcx     # 0x112adf
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x6(%r12), %r15d
cmpl %r14d, %r15d
jg 0xa67cd
testb $-0x80, 0x4(%r13)
je 0xa657b
leaq 0x6c59f(%rip), %rcx     # 0x112afd
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
addl $0x7, %r12d
movl %r12d, %r15d
cmpl %r14d, %r12d
jg 0xa67cd
movl 0x8(%r13), %eax
testl %eax, %eax
je 0xa6598
testb $0x3, %al
je 0xa65c1
testb $0x1, %al
jne 0xa65c6
testb $0x2, %al
je 0xa65da
leaq 0x6c586(%rip), %rcx     # 0x112b1c
jmp 0xa65cd
leaq 0x6c5e6(%rip), %rcx     # 0x112b85
pushq $0xa
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
movl %r12d, %r15d
jl 0xa66a4
jmp 0xa67cd
movl %r15d, %r12d
jmp 0xa65eb
leaq 0x6c540(%rip), %rcx     # 0x112b0d
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xa67ca
movl 0x8(%r13), %eax
testb $0xc, %al
je 0xa6600
testb $0x4, %al
jne 0xa6605
testb $0x8, %al
je 0xa6619
leaq 0x6c53c(%rip), %rcx     # 0x112b3a
jmp 0xa660c
movl %r12d, %r15d
jmp 0xa662b
leaq 0x6c51f(%rip), %rcx     # 0x112b2b
pushq $0xc
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xa67cd
movl 0x8(%r13), %eax
testb $0x30, %al
je 0xa6640
testb $0x10, %al
jne 0xa6645
testb $0x20, %al
je 0xa6659
leaq 0x6c51a(%rip), %rcx     # 0x112b58
jmp 0xa664c
movl %r15d, %r12d
jmp 0xa666a
leaq 0x6c4fd(%rip), %rcx     # 0x112b49
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xa67ca
movl 0x8(%r13), %eax
testb $-0x40, %al
je 0xa66a4
testb $0x40, %al
jne 0xa667f
testb %al, %al
jns 0xa6693
leaq 0x6c4f9(%rip), %rcx     # 0x112b76
jmp 0xa6686
leaq 0x6c4e1(%rip), %rcx     # 0x112b67
pushq $0xc
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
movl %r15d, %r12d
jge 0xa67cd
testb $0x1, 0xc(%r13)
jne 0xa66b6
leaq 0x6c4f1(%rip), %rcx     # 0x112ba3
pushq $0xa
jmp 0xa66bf
leaq 0x6c4d7(%rip), %rcx     # 0x112b94
pushq $0xe
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xa67cd
leaq 0x15e411(%rip), %rax    # 0x204af0
testb $0x2, 0xc(%rax)
jne 0xa66f0
leaq 0x6c4d5(%rip), %rcx     # 0x112bc1
pushq $0xa
jmp 0xa66f9
leaq 0x6c4bb(%rip), %rcx     # 0x112bb2
pushq $0xe
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x2(%r12), %r15d
cmpl %r14d, %r15d
jg 0xa67cd
leaq 0x15e3d7(%rip), %rax    # 0x204af0
movl 0xc(%rax), %eax
testb $0x4, %al
jne 0xa672f
testb $0x8, %al
jne 0xa6738
leaq 0x6c4c3(%rip), %rcx     # 0x112bee
pushq $0xa
jmp 0xa6741
leaq 0x6c49a(%rip), %rcx     # 0x112bd0
jmp 0xa673f
leaq 0x6c4a0(%rip), %rcx     # 0x112bdf
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x3(%r12), %r15d
cmpl %r14d, %r15d
jg 0xa67cd
leaq 0x15e393(%rip), %rax    # 0x204af0
movl 0xc(%rax), %eax
testb $0x10, %al
jne 0xa6773
testb $0x20, %al
jne 0xa677c
leaq 0x6c4ac(%rip), %rcx     # 0x112c1b
pushq $0xa
jmp 0xa6785
leaq 0x6c483(%rip), %rcx     # 0x112bfd
jmp 0xa6783
leaq 0x6c489(%rip), %rcx     # 0x112c0c
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x4(%r12), %r15d
cmpl %r14d, %r15d
jg 0xa67cd
leaq 0x15e34f(%rip), %rax    # 0x204af0
movl 0x10(%rax), %eax
testb $0x1, %al
jne 0xa67ad
movl %r15d, %r12d
jmp 0xa67e9
leaq 0x6c476(%rip), %rcx     # 0x112c2a
pushq $0xe
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
addl $0x5, %r12d
cmpl %r14d, %r12d
jle 0xa67df
movl %r12d, %r15d
movl %r15d, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0x15e30a(%rip), %rax    # 0x204af0
movl 0x10(%rax), %eax
testb $0x2, %al
jne 0xa67f2
movl %r12d, %r15d
jmp 0xa681a
leaq 0x6c440(%rip), %rcx     # 0x112c39
pushq $0xe
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xa67cd
leaq 0x15e2d9(%rip), %rax    # 0x204af0
movl 0x10(%rax), %eax
leal 0x1(%r15), %r12d
testb $0x4, %al
jne 0xa682d
leaq 0x6c42e(%rip), %rcx     # 0x112c57
pushq $0xe
jmp 0xa6836
leaq 0x6c414(%rip), %rcx     # 0x112c48
pushq $0xa
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
cmpl %r14d, %r15d
jge 0xa6382
leaq 0x15e29f(%rip), %rax    # 0x204af0
movl 0x10(%rax), %eax
testb $0x8, %al
jne 0xa685d
movl %r12d, %r15d
jmp 0xa6888
leaq 0x6c402(%rip), %rcx     # 0x112c66
pushq $0xe
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
addl $0x2, %r15d
cmpl %r14d, %r12d
jge 0xa67cd
leaq 0x15e26b(%rip), %rax    # 0x204af0
movl 0x10(%rax), %eax
testb $0x10, %al
jne 0xa6891
movl %r15d, %r12d
jmp 0xa68bc
leaq 0x6c3dd(%rip), %rcx     # 0x112c75
pushq $0xe
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xa67ca
leaq 0x15e237(%rip), %rax    # 0x204af0
movl 0x10(%rax), %eax
testb $0x20, %al
jne 0xa68c5
movl %r12d, %r15d
jmp 0xa68f1
leaq 0x6c3b8(%rip), %rcx     # 0x112c84
pushq $0xe
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xa67cd
leaq 0x15e202(%rip), %rax    # 0x204af0
movl 0x10(%rax), %eax
testb $0x40, %al
jne 0xa68fa
movl %r15d, %r12d
jmp 0xa6925
leaq 0x6c392(%rip), %rcx     # 0x112c93
pushq $0xc
popq %rdx
movl %r15d, %edi
movl %ebx, %esi
callq 0xe2d2
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xa6382
leaq 0x15e1ce(%rip), %rax    # 0x204af0
movl 0x10(%rax), %eax
testb %al, %al
jns 0xa6382
leaq 0x6c36e(%rip), %rcx     # 0x112ca2
pushq $0xe
popq %rdx
movl %r12d, %edi
movl %ebx, %esi
callq 0xe2d2
incl %r12d
jmp 0xa6382