// File: /workspace/github_c_makefile_star2_O3/mmcco[P]sljit/sljit_src/sljitNativeX86_common.c
// Function: sljit_emit_op_flags
int sljit_emit_op_flags(struct sljit_compiler *compiler, int op,
	int dst, long dstw,
	int src, long srcw,
	int type)
{
	u_char *inst;
	u_char cond_set = 0;
#if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
	int reg;
#else
	/* CHECK_EXTRA_REGS migh overwrite these values. */
	int dst_save = dst;
	long dstw_save = dstw;
#endif

	CHECK_ERROR();
	CHECK(check_sljit_emit_op_flags(compiler, op, dst, dstw, src, srcw, type));

	if (dst == SLJIT_UNUSED)
		return SLJIT_SUCCESS;

	ADJUST_LOCAL_OFFSET(dst, dstw);
	CHECK_EXTRA_REGS(dst, dstw, (void)0);
	if (compiler->flags_saved)
		FAIL_IF(emit_restore_flags(compiler, op & SLJIT_KEEP_FLAGS));

	type &= 0xff;
	/* setcc = jcc + 0x10. */
	cond_set = get_jump_code(type) + 0x10;

#if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
	if (GET_OPCODE(op) == SLJIT_OR && !GET_ALL_FLAGS(op) && FAST_IS_REG(dst) && dst == src) {
		inst = ensure_buf(compiler, 1 + 4 + 3);
		FAIL_IF(!inst);
		INC_SIZE(4 + 3);
		/* Set low reg to conditional flag. */
		*inst++ = (reg_map[TMP_REG1] <= 7) ? REX : REX_B;
		*inst++ = GROUP_0F;
		*inst++ = cond_set;
		*inst++ = MOD_REG | reg_lmap[TMP_REG1];
		*inst++ = REX | (reg_map[TMP_REG1] <= 7 ? 0 : REX_R) | (reg_map[dst] <= 7 ? 0 : REX_B);
		*inst++ = OR_rm8_r8;
		*inst++ = MOD_REG | (reg_lmap[TMP_REG1] << 3) | reg_lmap[dst];
		return SLJIT_SUCCESS;
	}

	reg = (op == SLJIT_MOV && FAST_IS_REG(dst)) ? dst : TMP_REG1;

	inst = ensure_buf(compiler, 1 + 4 + 4);
	FAIL_IF(!inst);
	INC_SIZE(4 + 4);
	/* Set low reg to conditional flag. */
	*inst++ = (reg_map[reg] <= 7) ? REX : REX_B;
	*inst++ = GROUP_0F;
	*inst++ = cond_set;
	*inst++ = MOD_REG | reg_lmap[reg];
	*inst++ = REX_W | (reg_map[reg] <= 7 ? 0 : (REX_B | REX_R));
	*inst++ = GROUP_0F;
	*inst++ = MOVZX_r_rm8;
	*inst = MOD_REG | (reg_lmap[reg] << 3) | reg_lmap[reg];

	if (reg != TMP_REG1)
		return SLJIT_SUCCESS;

	if (GET_OPCODE(op) < SLJIT_ADD) {
		compiler->mode32 = GET_OPCODE(op) != SLJIT_MOV;
		return emit_mov(compiler, dst, dstw, TMP_REG1, 0);
	}
#if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) \
		|| (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS)
	compiler->skip_checks = 1;
#endif
	return sljit_emit_op2(compiler, op, dst, dstw, dst, dstw, TMP_REG1, 0);
#else /* SLJIT_CONFIG_X86_64 */
	if (GET_OPCODE(op) < SLJIT_ADD && FAST_IS_REG(dst)) {
		if (reg_map[dst] <= 4) {
			/* Low byte is accessible. */
			inst = ensure_buf(compiler, 1 + 3 + 3);
			FAIL_IF(!inst);
			INC_SIZE(3 + 3);
			/* Set low byte to conditional flag. */
			*inst++ = GROUP_0F;
			*inst++ = cond_set;
			*inst++ = MOD_REG | reg_map[dst];

			*inst++ = GROUP_0F;
			*inst++ = MOVZX_r_rm8;
			*inst = MOD_REG | (reg_map[dst] << 3) | reg_map[dst];
			return SLJIT_SUCCESS;
		}

		/* Low byte is not accessible. */
		if (cpu_has_cmov == -1)
			get_cpu_features();

		if (cpu_has_cmov) {
			EMIT_MOV(compiler, TMP_REG1, 0, SLJIT_IMM, 1);
			/* a xor reg, reg operation would overwrite the flags. */
			EMIT_MOV(compiler, dst, 0, SLJIT_IMM, 0);

			inst = ensure_buf(compiler, 1 + 3);
			FAIL_IF(!inst);
			INC_SIZE(3);

			*inst++ = GROUP_0F;
			/* cmovcc = setcc - 0x50. */
			*inst++ = cond_set - 0x50;
			*inst++ = MOD_REG | (reg_map[dst] << 3) | reg_map[TMP_REG1];
			return SLJIT_SUCCESS;
		}

		inst = ensure_buf(compiler, 1 + 1 + 3 + 3 + 1);
		FAIL_IF(!inst);
		INC_SIZE(1 + 3 + 3 + 1);
		*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
		/* Set al to conditional flag. */
		*inst++ = GROUP_0F;
		*inst++ = cond_set;
		*inst++ = MOD_REG | 0 /* eax */;

		*inst++ = GROUP_0F;
		*inst++ = MOVZX_r_rm8;
		*inst++ = MOD_REG | (reg_map[dst] << 3) | 0 /* eax */;
		*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
		return SLJIT_SUCCESS;
	}

	if (GET_OPCODE(op) == SLJIT_OR && !GET_ALL_FLAGS(op) && FAST_IS_REG(dst) && dst == src && reg_map[dst] <= 4) {
		SLJIT_COMPILE_ASSERT(reg_map[SLJIT_R0] == 0, scratch_reg1_must_be_eax);
		if (dst != SLJIT_R0) {
			inst = ensure_buf(compiler, 1 + 1 + 3 + 2 + 1);
			FAIL_IF(!inst);
			INC_SIZE(1 + 3 + 2 + 1);
			/* Set low reg to conditional flag. */
			*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
			*inst++ = GROUP_0F;
			*inst++ = cond_set;
			*inst++ = MOD_REG | 0 /* eax */;
			*inst++ = OR_rm8_r8;
			*inst++ = MOD_REG | (0 /* eax */ << 3) | reg_map[dst];
			*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
		}
		else {
			inst = ensure_buf(compiler, 1 + 2 + 3 + 2 + 2);
			FAIL_IF(!inst);
			INC_SIZE(2 + 3 + 2 + 2);
			/* Set low reg to conditional flag. */
			*inst++ = XCHG_r_rm;
			*inst++ = MOD_REG | (1 /* ecx */ << 3) | reg_map[TMP_REG1];
			*inst++ = GROUP_0F;
			*inst++ = cond_set;
			*inst++ = MOD_REG | 1 /* ecx */;
			*inst++ = OR_rm8_r8;
			*inst++ = MOD_REG | (1 /* ecx */ << 3) | 0 /* eax */;
			*inst++ = XCHG_r_rm;
			*inst++ = MOD_REG | (1 /* ecx */ << 3) | reg_map[TMP_REG1];
		}
		return SLJIT_SUCCESS;
	}

	/* Set TMP_REG1 to the bit. */
	inst = ensure_buf(compiler, 1 + 1 + 3 + 3 + 1);
	FAIL_IF(!inst);
	INC_SIZE(1 + 3 + 3 + 1);
	*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
	/* Set al to conditional flag. */
	*inst++ = GROUP_0F;
	*inst++ = cond_set;
	*inst++ = MOD_REG | 0 /* eax */;

	*inst++ = GROUP_0F;
	*inst++ = MOVZX_r_rm8;
	*inst++ = MOD_REG | (0 << 3) /* eax */ | 0 /* eax */;

	*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];

	if (GET_OPCODE(op) < SLJIT_ADD)
		return emit_mov(compiler, dst, dstw, TMP_REG1, 0);

#if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) \
		|| (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS)
	compiler->skip_checks = 1;
#endif
	return sljit_emit_op2(compiler, op, dst_save, dstw_save, dst_save, dstw_save, TMP_REG1, 0);
#endif /* SLJIT_CONFIG_X86_64 */
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %r8, (%rsp)
movl (%rdi), %r15d
testl %r15d, %r15d
je 0x1d81d
movl %r15d, %eax
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movl 0x50(%rsp), %eax
cmpl $0x200, %eax            # imm = 0x200
jae 0x1dfcd
movzbl %al, %eax
movl %eax, 0xc(%rsp)
cmpl $0x16, %eax
movq (%rsp), %r15
jae 0x1dfdb
movq %r9, %r13
movq %rcx, %rbp
movl %edx, %r14d
movl %esi, %r12d
movq %rdi, %rbx
movl $0x20, %eax
cmpl $0x20, %esi
je 0x1d898
movl %r12d, %eax
andl $0xffff80ff, %eax       # imm = 0xFFFF80FF
leal -0x65(%rax), %ecx
cmpl $0x3, %ecx
jb 0x1d875
leal -0x25(%rax), %ecx
cmpl $0x2, %ecx
jae 0x1e013
testl $0x3c00, %r12d          # imm = 0x3C00
jne 0x1dfe9
movl %r12d, %ecx
notl %ecx
testl $0x4200, %ecx           # imm = 0x4200
je 0x1dff7
cmpl $0x5f, %eax
ja 0x1d8b3
testl %r15d, %r15d
jne 0x1d8a2
testq %r13, %r13
je 0x1d8c5
leaq 0x5a96(%rip), %rdi      # 0x2333f
movl $0x57a, %esi            # imm = 0x57A
jmp 0x1e01f
cmpl %r14d, %r15d
jne 0x1e005
cmpq %rbp, %r13
jne 0x1e005
movl 0x48(%rbx), %ecx
cmpl $-0x1, %ecx
je 0x1dcee
movl 0x4c(%rbx), %esi
cmpl $-0x1, %esi
je 0x1dcee
testl %r14d, %r14d
je 0x1d910
setg %dl
cmpl %r14d, %ecx
setge %dil
testb %dil, %dl
jne 0x1d910
movl $0xc, %edx
subl %esi, %edx
cmpl %r14d, %edx
setge %sil
cmpl $0xd, %r14d
setge %dil
orb %sil, %dil
jne 0x1d9e1
testq %rbp, %rbp
jne 0x1dcee
movq 0x78(%rbx), %rdi
testq %rdi, %rdi
je 0x1ddb0
btl $0x8, %r12d
leaq 0x2b06(%rip), %r10      # 0x20438
leaq 0x5b93(%rip), %rdx      # 0x234cc
cmovaeq %r10, %rdx
leal -0x60(%rax), %ecx
leal -0x20(%rax), %esi
cmpl $0x60, %eax
leaq 0xa303(%rip), %rax      # 0x27c50
leaq (%rax,%rcx,8), %rax
leaq 0xa258(%rip), %rcx      # 0x27bb0
leaq (%rcx,%rsi,8), %rcx
cmovaeq %rax, %rcx
movq (%rcx), %rcx
btl $0x9, %r12d
leaq 0x5bd2(%rip), %r8       # 0x23541
cmovaeq %r10, %r8
btl $0xe, %r12d
leaq 0x5bd1(%rip), %r9       # 0x23550
cmovaeq %r10, %r9
leaq 0x5d0e(%rip), %rsi      # 0x23698
xorl %eax, %eax
callq 0x20c0
testb $0x40, %r14b
jne 0x1d9c7
testb %r14b, %r14b
js 0x1da08
testl %r14d, %r14d
je 0x1dab3
movq 0x78(%rbx), %rdi
cmpl %r14d, 0x48(%rbx)
jge 0x1daf2
movl $0xc, %edx
subl %r14d, %edx
leaq 0x5be0(%rip), %rsi      # 0x235a2
jmp 0x1dafd
movq 0x78(%rbx), %rdi
leaq 0x5a6f(%rip), %rsi      # 0x23441
movq %rbp, %rdx
xorl %eax, %eax
callq 0x20c0
jmp 0x1dbc2
cmpl $0x8d, %r14d
jne 0x1da45
testq %rbp, %rbp
js 0x1dcee
movslq 0x80(%rbx), %rcx
cmpq %rbp, %rcx
jg 0x1d919
jmp 0x1dcee
movl %r14d, %r15d
movq 0x78(%rbx), %rsi
andl $0x3f, %r15d
je 0x1dad2
movl $0x5b, %edi
callq 0x20a0
movq 0x78(%rbx), %rdi
cmpl 0x48(%rbx), %r15d
jle 0x1db09
movl $0xc, %edx
subl %r15d, %edx
leaq 0x5b62(%rip), %rsi      # 0x235a2
jmp 0x1db16
testb %r14b, %r14b
jns 0x1dcee
movl %r14d, %esi
andl $0x3f, %esi
je 0x1dcd8
cmpl %ecx, %esi
jle 0x1da6f
cmpl $0xc, %esi
ja 0x1dcee
cmpl %edx, %esi
jle 0x1dcee
testl $0x3f00, %r14d          # imm = 0x3F00
je 0x1dce1
movl %r14d, %esi
shrl $0x8, %esi
andl $0x3f, %esi
setne %dil
cmpl %ecx, %esi
setle %cl
testb %cl, %dil
jne 0x1daa4
cmpl $0xc, %esi
ja 0x1dcee
cmpl %edx, %esi
jle 0x1dcee
cmpq $0x4, %rbp
jb 0x1dce1
jmp 0x1dcee
movq 0x78(%rbx), %rcx
leaq 0x59a0(%rip), %rdi      # 0x2345e
movl $0x6, %esi
movl $0x1, %edx
callq 0x2130
jmp 0x1dbc2
leaq 0x597e(%rip), %rax      # 0x23457
movq %rsi, %rdi
movq %rax, %rsi
movq %rbp, %rdx
xorl %eax, %eax
callq 0x20c0
movq (%rsp), %r15
jmp 0x1dbc2
leal -0x1(%r14), %edx
leaq 0x5aa0(%rip), %rsi      # 0x2359d
xorl %eax, %eax
callq 0x20c0
jmp 0x1dbc2
decl %r15d
leaq 0x5a8a(%rip), %rsi      # 0x2359d
movl %r15d, %edx
xorl %eax, %eax
callq 0x20c0
testl $0x3f00, %r14d          # imm = 0x3F00
movq (%rsp), %r15
je 0x1db68
movq 0x78(%rbx), %rcx
leaq 0x5911(%rip), %rdi      # 0x23446
movl $0x3, %esi
movl $0x1, %edx
callq 0x2130
movl %r14d, %edx
shrl $0x8, %edx
andl $0x3f, %edx
movq 0x78(%rbx), %rdi
cmpl 0x48(%rbx), %edx
jle 0x1db84
movl $0xc, %eax
subl %edx, %eax
leaq 0x5a3e(%rip), %rsi      # 0x235a2
movl %eax, %edx
jmp 0x1db8d
testq %rbp, %rbp
je 0x1dbb4
movq 0x78(%rbx), %rdi
leaq 0x58d8(%rip), %rsi      # 0x23450
movq %rbp, %rdx
xorl %eax, %eax
callq 0x20c0
jmp 0x1dbb4
decl %edx
leaq 0x5a10(%rip), %rsi      # 0x2359d
xorl %eax, %eax
callq 0x20c0
testq %rbp, %rbp
je 0x1dbb4
movq 0x78(%rbx), %rdi
movl $0x1, %edx
movl %ebp, %ecx
shll %cl, %edx
leaq 0x589d(%rip), %rsi      # 0x2344a
xorl %eax, %eax
callq 0x20c0
movq 0x78(%rbx), %rsi
movl $0x5d, %edi
callq 0x20a0
testl %r15d, %r15d
je 0x1dd5a
movq 0x78(%rbx), %rcx
leaq 0x597d(%rip), %rdi      # 0x23553
movl $0x2, %esi
movl $0x1, %edx
callq 0x2130
testb $0x40, %r15b
jne 0x1dc0b
movq 0x78(%rbx), %rax
testb %r15b, %r15b
js 0x1dc25
cmpl %r15d, 0x48(%rbx)
jge 0x1dc53
movl $0xc, %edx
subl %r15d, %edx
leaq 0x5999(%rip), %rsi      # 0x235a2
jmp 0x1dc5e
movq 0x78(%rbx), %rdi
leaq 0x582b(%rip), %rsi      # 0x23441
movq %r13, %rdx
xorl %eax, %eax
callq 0x20c0
jmp 0x1dd5a
andl $0x3f, %r15d
je 0x1dc6d
movl $0x5b, %edi
movq %rax, %rsi
callq 0x20a0
movq 0x78(%rbx), %rdi
cmpl 0x48(%rbx), %r15d
jle 0x1dc79
movl $0xc, %edx
subl %r15d, %edx
leaq 0x5951(%rip), %rsi      # 0x235a2
jmp 0x1dc86
leal -0x1(%r15), %edx
leaq 0x593f(%rip), %rsi      # 0x2359d
movq %rax, %rdi
xorl %eax, %eax
callq 0x20c0
jmp 0x1dd5a
leaq 0x57e3(%rip), %rsi      # 0x23457
movq %rax, %rdi
jmp 0x1dc16
decl %r15d
leaq 0x591a(%rip), %rsi      # 0x2359d
movl %r15d, %edx
xorl %eax, %eax
callq 0x20c0
movq (%rsp), %r15
testl $0x3f00, %r15d          # imm = 0x3F00
je 0x1dcff
movq 0x78(%rbx), %rcx
leaq 0x57a1(%rip), %rdi      # 0x23446
movl $0x3, %esi
movl $0x1, %edx
callq 0x2130
movl %r15d, %edx
shrl $0x8, %edx
andl $0x3f, %edx
movq 0x78(%rbx), %rdi
cmpl 0x48(%rbx), %edx
jle 0x1dd1b
movl $0xc, %eax
subl %edx, %eax
leaq 0x58ce(%rip), %rsi      # 0x235a2
movl %eax, %edx
jmp 0x1dd24
testl $0x3f00, %r14d          # imm = 0x3F00
jne 0x1dcee
cmpl $0x4000, %r14d          # imm = 0x4000
jb 0x1d919
leaq 0x564a(%rip), %rdi      # 0x2333f
movl $0x57e, %esi            # imm = 0x57E
jmp 0x1e01f
testq %r13, %r13
je 0x1dd4c
movq 0x78(%rbx), %rdi
leaq 0x5741(%rip), %rsi      # 0x23450
movq %r13, %rdx
xorl %eax, %eax
callq 0x20c0
jmp 0x1dd4c
decl %edx
leaq 0x5879(%rip), %rsi      # 0x2359d
xorl %eax, %eax
callq 0x20c0
testq %r13, %r13
je 0x1dd4c
movq 0x78(%rbx), %rdi
movl $0x1, %edx
movl %r13d, %ecx
shll %cl, %edx
leaq 0x5705(%rip), %rsi      # 0x2344a
xorl %eax, %eax
callq 0x20c0
movq 0x78(%rbx), %rsi
movl $0x5d, %edi
callq 0x20a0
cmpl $0x100, 0x50(%rsp)      # imm = 0x100
leaq 0x588b(%rip), %rax      # 0x235f4
leaq 0x26c8(%rip), %rcx      # 0x20438
cmovbq %rcx, %rax
leaq 0x587f(%rip), %rcx      # 0x235fa
leaq 0x5875(%rip), %rdx      # 0x235f7
cmovbq %rcx, %rdx
movl 0xc(%rsp), %ecx
cmpl $0xe, %ecx
cmovbq %rax, %rdx
movq 0x78(%rbx), %rdi
movl %ecx, %eax
leaq 0x9f62(%rip), %rcx      # 0x27d00
movq (%rcx,%rax,8), %rcx
leaq 0x5901(%rip), %rsi      # 0x236aa
xorl %eax, %eax
callq 0x20c0
testl %r14d, %r14d
je 0x1df7c
cmpl $0x8d, %r14d
jne 0x1ddc6
addq $0x8, %rbp
cmpl $0x0, 0x74(%rbx)
je 0x1de03
movl $0x7, %esi
movq %rbx, %rdi
callq 0x15218
testq %rax, %rax
je 0x1df8c
movl %r12d, %ecx
movb $0x6, (%rax)
addq $0x6, 0x60(%rbx)
andl $0x4000, %ecx           # imm = 0x4000
movl $0x648d489d, 0x1(%rax)  # imm = 0x648D489D
movw $0xf824, 0x5(%rax)      # imm = 0xF824
movl %ecx, 0x74(%rbx)
movq %rbp, 0x10(%rsp)
movl 0xc(%rsp), %edi
callq 0x1e02b
movl %eax, %r13d
addb $0x10, %r13b
movl %r12d, %ebp
andl $0xffff80ff, %ebp       # imm = 0xFFFF80FF
cmpl $0x66, %ebp
movq (%rsp), %r15
jne 0x1dea4
cmpl $0x100, %r12d           # imm = 0x100
setae %al
cmpl $0x40, %r14d
setge %cl
orb %al, %cl
cmpl %r15d, %r14d
setne %al
orb %cl, %al
jne 0x1dea4
movl $0x8, %esi
movq %rbx, %rdi
callq 0x15218
testq %rax, %rax
je 0x1df84
movb $0x7, (%rax)
addq $0x7, 0x60(%rbx)
movw $0xf40, 0x1(%rax)       # imm = 0xF40
movb %r13b, 0x3(%rax)
movb $-0x3e, 0x4(%rax)
movslq %r15d, %rcx
movl $0xf10f, %edx           # imm = 0xF10F
btq %r15, %rdx
setb %dl
xorb $0x41, %dl
movb %dl, 0x5(%rax)
movb $0x8, 0x6(%rax)
leaq 0x535d(%rip), %rdx      # 0x231f0
movb (%rcx,%rdx), %cl
orb $-0x30, %cl
movb %cl, 0x7(%rax)
xorl %r15d, %r15d
jmp 0x1d80b
movl $0x9, %esi
movq %rbx, %rdi
callq 0x15218
testq %rax, %rax
je 0x1df84
cmpl $0x40, %r14d
movl $0xe, %ecx
cmovll %r14d, %ecx
movl $0xe, %edx
cmpl $0x20, %r12d
cmovnel %edx, %ecx
movb $0x8, (%rax)
addq $0x8, 0x60(%rbx)
movslq %ecx, %rcx
movl $0xf10f, %edx           # imm = 0xF10F
xorl %esi, %esi
btq %rcx, %rdx
setb %dl
setae %sil
xorb $0x41, %dl
movb %dl, 0x1(%rax)
movb $0xf, 0x2(%rax)
movb %r13b, 0x3(%rax)
leaq 0x52eb(%rip), %rdx      # 0x231f0
movb (%rcx,%rdx), %dl
movl %edx, %edi
orb $-0x40, %dil
movb %dil, 0x4(%rax)
leal (%rsi,%rsi,4), %esi
addl $0x48, %esi
movb %sil, 0x5(%rax)
movw $0xb60f, 0x6(%rax)      # imm = 0xB60F
shlb $0x3, %dl
orb %dil, %dl
movb %dl, 0x8(%rax)
xorl %r15d, %r15d
cmpl $0xe, %ecx
jne 0x1d80b
cmpl $0x5f, %ebp
jg 0x1df9d
xorl %eax, %eax
cmpl $0x20, %ebp
setne %al
movl %eax, 0x70(%rbx)
testl %r14d, %r14d
movq 0x10(%rsp), %r9
je 0x1d80b
xorl %r15d, %r15d
movq %rbx, %rdi
movl $0x1, %esi
movl $0xe, %edx
xorl %ecx, %ecx
movl %r14d, %r8d
callq 0x15da2
testq %rax, %rax
je 0x1df84
movb $-0x77, (%rax)
jmp 0x1d80b
movl %r14d, %r15d
jmp 0x1d80b
movl (%rbx), %r15d
jmp 0x1d80b
movl (%rbx), %r15d
testl %r15d, %r15d
jne 0x1d80b
jmp 0x1de03
movl $0x1, 0x84(%rbx)
movq %rbx, %rdi
movl %r12d, %esi
movl %r14d, %edx
movq 0x10(%rsp), %rcx
movl %r14d, %r8d
movq %rcx, %r9
pushq $0x0
pushq $0xe
callq 0x1804b
addq $0x28, %rsp
jmp 0x1d812
leaq 0x536b(%rip), %rdi      # 0x2333f
movl $0x573, %esi            # imm = 0x573
jmp 0x1e01f
leaq 0x535d(%rip), %rdi      # 0x2333f
movl $0x574, %esi            # imm = 0x574
jmp 0x1e01f
leaq 0x534f(%rip), %rdi      # 0x2333f
movl $0x577, %esi            # imm = 0x577
jmp 0x1e01f
leaq 0x5341(%rip), %rdi      # 0x2333f
movl $0x578, %esi            # imm = 0x578
jmp 0x1e01f
leaq 0x5333(%rip), %rdi      # 0x2333f
movl $0x57c, %esi            # imm = 0x57C
jmp 0x1e01f
leaq 0x5325(%rip), %rdi      # 0x2333f
movl $0x576, %esi            # imm = 0x576
xorl %eax, %eax
callq 0x2080
callq 0x2040