// File: /workspace/github_cpp_makefile_star2_O1/jkingan[P]ladyheather/heathgps.cpp
// Function: show_prs_status(int, int, int)
int show_prs_status(int row,int col, int max_row)
{
int p_low, p_high;

   if(have_prs_lm) {
      if     (prs_lm == 0) vidstr(row,col, GREEN,       "PPS: ON,Unfilt ");
      else if(prs_lm == 1) vidstr(row,col, GREEN,       "PPS: ON,Filter ");
      else if(prs_lm == 2) vidstr(row,col, YELLOW,      "PPS: LOW=Locked");
      else if(prs_lm == 3) vidstr(row,col, YELLOW,      "PPS: HI=Locked ");
      else                 vidstr(row,col, RED,         "PPS: ???       ");
      if(++row > max_row) return row;
   }

   if(have_prs_st == 0) return row;

   if(prs_st[5] & 0x18) {
      if(prs_st[5] & 0x08) {
         vidstr(row,col, RED,    "EEPROM: WR ERR");
         if(++row > max_row) return row;
      }
      if(prs_st[5] & 0x10) {
         vidstr(row,col, RED,    "EEPROM: CORRUPT");
         if(++row > max_row) return row;
      }
   }
   else {
      vidstr(row,col, GREEN,  "EEPROM: OK    ");
      if(++row > max_row) return row;
   }

   if(prs_st[5] & 0x01) {
      vidstr(row,col, RED,    "Lamp restarted");
      if(++row > max_row) return row;
   }
   if(prs_st[5] & 0x02) {
      vidstr(row,col, RED,    "Watchdog error");
      if(++row > max_row) return row;
   }
   if(prs_st[5] & 0x04) {
      vidstr(row,col, RED,    "Interrupt err ");
      if(++row > max_row) return row;
   }
   if(prs_st[5] & 0x80) {
      vidstr(row,col, YELLOW, "Unit reset    ");
      if(++row > max_row) return row;
   }



   p_low = prs_st[0] & 0x05;
   p_high= prs_st[0] & 0x0A;
   if(have_prs_ep && (prs_ep == 0)) {
      vidstr(row,col, RED,       "Power: DISABLED");
   }
   else if(p_low || p_high) {
      if(p_low && p_high) vidstr(row,col, RED,         "Power:  BAD    ");
      else if(p_low)      vidstr(row,col, RED,         "Power:  LOW    ");
      else if(p_high)     vidstr(row,col, RED,         "Power:  HIGH   ");
      else                vidstr(row,col, RED,         "Power:  ???    ");
   }
   else vidstr(row,col, GREEN,       "Power:  OK     ");
   if(++row > max_row) return row;

   if(have_prs_fc2) {
      sprintf(out, "Cycles: %-7d", prs_pwr_cycles);
      vidstr(row,col, GREEN, out);
      if(++row > max_row) return row;

      sprintf(out, "FC wrt: %-7d", prs_fc_writes);
      vidstr(row,col, GREEN, out);
      if(++row > max_row) return row;
   }

   if     (prs_st[0] & 0x10) vidstr(row,col, RED,    "Light:  LOW   ");
   else if(prs_st[0] & 0x20) vidstr(row,col, RED,    "Light:  HIGH  ");
   else                      vidstr(row,col, GREEN,  "Light:  OK    ");
   if(++row > max_row) return row;

   if     (prs_st[0] & 0x40) vidstr(row,col, RED,    "GateV:  LOW   ");
   else if(prs_st[0] & 0x80) vidstr(row,col, RED,    "GateV:  HIGH  ");
   else                      vidstr(row,col, GREEN,  "GateV:  OK    ");
   if(++row > max_row) return row;



   if(prs_st[1] & 0x01) vidstr(row,col, RED,         "Synth:  UNLK  ");
   else                 vidstr(row,col, GREEN,       "Synth:  OK"   );
   if(++row > max_row) return row;

   if     (prs_st[1] & 0x02) vidstr(row,col, RED,    "RF VAR: LOW   ");
   else if(prs_st[1] & 0x04) vidstr(row,col, RED,    "RF VAR: HIGH  ");
   else                      vidstr(row,col, GREEN,  "RF VAR: OK    ");
   if(++row > max_row) return row;

   if     (prs_st[1] & 0x08) vidstr(row,col, RED,    "RF VCO: LOW   ");
   else if(prs_st[1] & 0x10) vidstr(row,col, RED,    "RF VCO: HIGH  ");
   else                      vidstr(row,col, GREEN,  "RF VCO: OK    ");
   if(++row > max_row) return row;

   if     (prs_st[1] & 0x20) vidstr(row,col, RED,    "RF AGC: LOW   ");
   else if(prs_st[1] & 0x40) vidstr(row,col, RED,    "RF AGC: HIGH  ");
   else                      vidstr(row,col, GREEN,  "RF AGC: OK    ");
   if(++row > max_row) return row;

   if(prs_st[1] & 0x80) {
      vidstr(row,col, RED,    "Bad PLL param  ");
      if(++row > max_row) return row;
   }


   if(prs_st[2]) {
      if(prs_st[2] & 0x03) {
         if     (prs_st[2] & 0x01) vidstr(row,col, RED,    "Lamp T: LOW   ");
         else if(prs_st[2] & 0x02) vidstr(row,col, RED,    "Lamp T: HIGH  ");
         if(++row > max_row) return row;
      }

      if(prs_st[2] & 0x0C) {
         if     (prs_st[2] & 0x04) vidstr(row,col, RED,    "Xtal T: LOW   ");
         else if(prs_st[2] & 0x08) vidstr(row,col, RED,    "Xtal T: HIGH  ");
         if(++row > max_row) return row;
      }

      if(prs_st[2] & 0x30) {
         if     (prs_st[2] & 0x10) vidstr(row,col, RED,    "Cell T: LOW   ");
         else if(prs_st[2] & 0x20) vidstr(row,col, RED,    "Cell T: HIGH  ");
         if(++row > max_row) return row;
      }

      if(prs_st[2] & 0xC0) {
         if     (prs_st[2] & 0x40) vidstr(row,col, RED,    "Case T: LOW   ");
         else if(prs_st[2] & 0x80) vidstr(row,col, RED,    "Case T: HIGH  ");
         if(++row > max_row) return row;
      }
   }
   else {
      vidstr(row,col, GREEN,  "Temps:  ALL OK");
      if(++row > max_row) return row;
   }



   if     (prs_st[3] & 0x01) vidstr(row,col, YELLOW, "FLL:    OFF   ");
   else                      vidstr(row,col, GREEN,  "FLL:    ON    ");
   if(++row > max_row) return row;

   if     (prs_st[3] & 0x02) vidstr(row,col, YELLOW, "F-Lock: DISABL");
   else                      vidstr(row,col, GREEN,  "F-Lock: ENABLE");
   if(++row > max_row) return row;

   if     (prs_st[3] & 0x04) vidstr(row,col, RED,    "EFC V:  LOW   ");
   else if(prs_st[3] & 0x08) vidstr(row,col, RED,    "EFC V:  HIGH  ");
   else                      vidstr(row,col, GREEN,  "EFC V:  OK    ");
   if(++row > max_row) return row;

   if     (prs_st[3] & 0x10) vidstr(row,col, RED,    "Cal V:  LOW   ");
   else if(prs_st[3] & 0x20) vidstr(row,col, RED,    "Cal V:  HIGH  ");
   else                      vidstr(row,col, GREEN,  "Cal V:  OK    ");
   if(++row > max_row) return row;



   if(prs_st[4] & 0x01) {
      vidstr(row,col, YELLOW, "PLL diaabled  ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x02) {
      vidstr(row,col, YELLOW, "PLL acquiring ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x04) {
      vidstr(row,col, GREEN,  "PLL active    ");
      if(++row > max_row) return row;
   }
   else {
      vidstr(row,col, YELLOW, "PLL inactive  ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x08) {
      vidstr(row,col, YELLOW, "PPS input err ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x10) {
      vidstr(row,col, YELLOW, "PPS input slow");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x20) {
      vidstr(row,col, YELLOW, "PLL restarted ");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x40) {
      vidstr(row,col, RED,    "Fctrl saturate");
      if(++row > max_row) return row;
   }

   if(prs_st[4] & 0x80) {
      vidstr(row,col, YELLOW, "NO PPS input  ");
      if(++row > max_row) return row;
   }

   return row;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %edx, %r14d
movl %esi, %ebx
movl %edi, %r15d
leaq 0x1647c2(%rip), %rax    # 0x21aa8c
cmpl $0x0, (%rax)
je 0xb634c
leaq 0x164832(%rip), %rax    # 0x21ab08
movl (%rax), %eax
cmpq $0x3, %rax
ja 0xb6326
leaq 0x699fb(%rip), %rcx     # 0x11fce0
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
leaq 0x725c9(%rip), %rcx     # 0x1288be
jmp 0xb631a
leaq 0x725e0(%rip), %rcx     # 0x1288de
jmp 0xb6307
leaq 0x725e7(%rip), %rcx     # 0x1288ee
movl %r15d, %edi
movl %ebx, %esi
movl $0xe, %edx
jmp 0xb6337
leaq 0x725b4(%rip), %rcx     # 0x1288ce
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6337
leaq 0x725d1(%rip), %rcx     # 0x1288fe
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xb676d
leaq 0x164735(%rip), %rax    # 0x21aa88
cmpl $0x0, (%rax)
je 0xb676d
leaq 0x16478d(%rip), %r13    # 0x21aaf0
movl 0x14(%r13), %eax
testb $0x18, %al
je 0xb63af
testb $0x8, %al
je 0xb6395
leaq 0x72598(%rip), %rcx     # 0x12890e
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xb676d
testb $0x10, 0x14(%r13)
je 0xb63d5
leaq 0x7257a(%rip), %rcx     # 0x12891d
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
jmp 0xb63c0
leaq 0x72577(%rip), %rcx     # 0x12892d
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xb676d
testb $0x1, 0x14(%r13)
je 0xb6402
leaq 0x72559(%rip), %rcx     # 0x12893c
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xb676d
testb $0x2, 0x14(%r13)
je 0xb642f
leaq 0x7253b(%rip), %rcx     # 0x12894b
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xb676d
testb $0x4, 0x14(%r13)
je 0xb645c
leaq 0x7251d(%rip), %rcx     # 0x12895a
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xb676d
testb $-0x80, 0x14(%r13)
je 0xb6489
leaq 0x724ff(%rip), %rcx     # 0x128969
movl %r15d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xb676d
leaq 0x164650(%rip), %rax    # 0x21aae0
cmpl $0x0, (%rax)
je 0xb64aa
leaq 0x1646dc(%rip), %rax    # 0x21ab78
cmpl $0x0, (%rax)
jne 0xb64aa
leaq 0x724d0(%rip), %rcx     # 0x128978
jmp 0xb64fd
movl (%r13), %eax
testb $0xf, %al
je 0xb64c9
testb $0xa, %al
sete %cl
testb $0x5, %al
sete %dl
orb %cl, %dl
jne 0xb64dc
leaq 0x724c1(%rip), %rcx     # 0x128988
jmp 0xb64fd
leaq 0x724f8(%rip), %rcx     # 0x1289c8
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6507
testb $0x5, %al
je 0xb64e9
leaq 0x724b1(%rip), %rcx     # 0x128998
jmp 0xb64fd
testb $0xa, %al
je 0xb64f6
leaq 0x724b4(%rip), %rcx     # 0x1289a8
jmp 0xb64fd
leaq 0x724bb(%rip), %rcx     # 0x1289b8
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x1(%r15), %r12d
cmpl %r14d, %r15d
jge 0xb6569
leaq 0x16457c(%rip), %rax    # 0x21aa98
cmpl $0x0, (%rax)
je 0xb65bb
leaq 0x1645f4(%rip), %rax    # 0x21ab20
movl (%rax), %edx
leaq 0x285ceb(%rip), %r13    # 0x33c220
leaq 0x7249c(%rip), %rsi     # 0x1289d8
movq %r13, %rdi
xorl %eax, %eax
callq 0x9060
movl %r12d, %edi
movl %ebx, %esi
movl $0xa, %edx
movq %r13, %rcx
callq 0xe7d0
leal 0x2(%r15), %r12d
cmpl %r14d, %r12d
jle 0xb6571
movl %r12d, %r15d
jmp 0xb676d
movl %r12d, %r15d
jmp 0xb676d
leaq 0x1645ac(%rip), %rax    # 0x21ab24
movl (%rax), %edx
leaq 0x285c9f(%rip), %r13    # 0x33c220
leaq 0x7245d(%rip), %rsi     # 0x1289e5
movq %r13, %rdi
xorl %eax, %eax
callq 0x9060
movl %r12d, %edi
movl %ebx, %esi
movl $0xa, %edx
movq %r13, %rcx
callq 0xe7d0
addl $0x3, %r15d
movl %r15d, %r12d
cmpl %r14d, %r15d
leaq 0x16453b(%rip), %r13    # 0x21aaf0
jg 0xb676d
movl (%r13), %eax
testb $0x10, %al
jne 0xb65da
testb $0x20, %al
jne 0xb65e3
leaq 0x72442(%rip), %rcx     # 0x128a10
movl %r12d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb65f4
leaq 0x72411(%rip), %rcx     # 0x1289f2
jmp 0xb65ea
leaq 0x72417(%rip), %rcx     # 0x128a01
movl %r12d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x1(%r12), %r15d
cmpl %r14d, %r12d
jge 0xb676d
movl (%r13), %eax
testb $0x40, %al
jne 0xb6626
testb %al, %al
js 0xb662f
leaq 0x72423(%rip), %rcx     # 0x128a3d
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6640
leaq 0x723f2(%rip), %rcx     # 0x128a1f
jmp 0xb6636
leaq 0x723f8(%rip), %rcx     # 0x128a2e
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x2(%r12), %r15d
cmpl %r14d, %r15d
jg 0xb676d
testb $0x1, 0x4(%r13)
jne 0xb666d
leaq 0x723fa(%rip), %rcx     # 0x128a5b
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb667e
leaq 0x723d8(%rip), %rcx     # 0x128a4c
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x3(%r12), %r15d
cmpl %r14d, %r15d
jg 0xb676d
movl 0x4(%r13), %eax
testb $0x2, %al
jne 0xb66b0
testb $0x4, %al
jne 0xb66b9
leaq 0x723e0(%rip), %rcx     # 0x128a84
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb66ca
leaq 0x723af(%rip), %rcx     # 0x128a66
jmp 0xb66c0
leaq 0x723b5(%rip), %rcx     # 0x128a75
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x4(%r12), %r15d
cmpl %r14d, %r15d
jg 0xb676d
movl 0x4(%r13), %eax
testb $0x8, %al
jne 0xb66fc
testb $0x10, %al
jne 0xb6705
leaq 0x723c1(%rip), %rcx     # 0x128ab1
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6716
leaq 0x72390(%rip), %rcx     # 0x128a93
jmp 0xb670c
leaq 0x72396(%rip), %rcx     # 0x128aa2
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x5(%r12), %r15d
cmpl %r14d, %r15d
jg 0xb676d
movl 0x4(%r13), %eax
testb $0x20, %al
jne 0xb6744
testb $0x40, %al
jne 0xb674d
leaq 0x723a6(%rip), %rcx     # 0x128ade
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb675e
leaq 0x72375(%rip), %rcx     # 0x128ac0
jmp 0xb6754
leaq 0x7237b(%rip), %rcx     # 0x128acf
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x6(%r12), %r15d
cmpl %r14d, %r15d
jle 0xb677f
movl %r15d, %eax
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
testb $-0x80, 0x4(%r13)
je 0xb67a8
leaq 0x72360(%rip), %rcx     # 0x128aed
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
addl $0x7, %r12d
movl %r12d, %r15d
cmpl %r14d, %r12d
jg 0xb676d
movl 0x8(%r13), %eax
testl %eax, %eax
je 0xb67c5
testb $0x3, %al
je 0xb6812
testb $0x1, %al
jne 0xb67ec
testb $0x2, %al
je 0xb6802
leaq 0x72349(%rip), %rcx     # 0x128b0c
jmp 0xb67f3
leaq 0x723a9(%rip), %rcx     # 0x128b75
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xb676d
jmp 0xb68e1
leaq 0x7230a(%rip), %rcx     # 0x128afd
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xb676d
movl 0x8(%r13), %eax
testb $0xc, %al
je 0xb6851
testb $0x4, %al
jne 0xb682b
testb $0x8, %al
je 0xb6841
leaq 0x72301(%rip), %rcx     # 0x128b2a
jmp 0xb6832
leaq 0x722e9(%rip), %rcx     # 0x128b1b
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xb676d
movq %r13, %r12
movl 0x8(%r13), %eax
testb $0x30, %al
je 0xb686d
testb $0x10, %al
jne 0xb6872
testb $0x20, %al
je 0xb6888
leaq 0x722dd(%rip), %rcx     # 0x128b48
jmp 0xb6879
movq %r12, %rax
jmp 0xb689b
leaq 0x722c0(%rip), %rcx     # 0x128b39
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
movq %r12, %rax
jge 0xb676d
movl 0x8(%rax), %eax
testb $-0x40, %al
je 0xb68b3
testb $0x40, %al
jne 0xb68b8
testb %al, %al
jns 0xb68ce
leaq 0x722b5(%rip), %rcx     # 0x128b66
jmp 0xb68bf
movq %r12, %r13
jmp 0xb68e1
leaq 0x72298(%rip), %rcx     # 0x128b57
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
movq %r12, %r13
jge 0xb676d
movq %r13, %r12
testb $0x1, 0xc(%r13)
jne 0xb68fe
leaq 0x722a1(%rip), %rcx     # 0x128b93
movl %r15d, %edi
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb690f
leaq 0x7227f(%rip), %rcx     # 0x128b84
movl %r15d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe7d0
leal 0x1(%r15), %edi
cmpl %r14d, %r15d
jge 0xb6993
testb $0x2, 0xc(%r12)
jne 0xb6935
leaq 0x72285(%rip), %rcx     # 0x128bb1
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6943
leaq 0x72266(%rip), %rcx     # 0x128ba2
movl %ebx, %esi
movl $0xe, %edx
callq 0xe7d0
leal 0x2(%r15), %edi
cmpl %r14d, %edi
jg 0xb6993
movl 0xc(%r12), %eax
testb $0x4, %al
jne 0xb696e
testb $0x8, %al
jne 0xb6977
leaq 0x72279(%rip), %rcx     # 0x128bde
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb6985
leaq 0x7224b(%rip), %rcx     # 0x128bc0
jmp 0xb697e
leaq 0x72251(%rip), %rcx     # 0x128bcf
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x3(%r15), %edi
cmpl %r14d, %edi
jle 0xb699b
movl %edi, %r15d
jmp 0xb676d
movl 0xc(%r12), %eax
testb $0x10, %al
jne 0xb69b8
testb $0x20, %al
jne 0xb69c1
leaq 0x7225c(%rip), %rcx     # 0x128c0b
movl %ebx, %esi
movl $0xa, %edx
jmp 0xb69cf
leaq 0x7222e(%rip), %rcx     # 0x128bed
jmp 0xb69c8
leaq 0x72234(%rip), %rcx     # 0x128bfc
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x4(%r15), %r13d
cmpl %r14d, %r13d
jle 0xb69e5
movl %r13d, %r15d
jmp 0xb676d
testb $0x1, 0x10(%r12)
jne 0xb69f2
movq %r12, %rax
jmp 0xb6a1b
leaq 0x72221(%rip), %rcx     # 0x128c1a
movl %r13d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe7d0
addl $0x5, %r15d
movl %r15d, %r13d
cmpl %r14d, %r15d
movq %r12, %rax
jg 0xb676d
testb $0x2, 0x10(%rax)
jne 0xb6a26
movq %r12, %rax
jmp 0xb6a4f
leaq 0x721fc(%rip), %rcx     # 0x128c29
movl %r13d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe7d0
leal 0x1(%r13), %r15d
cmpl %r14d, %r13d
movl %r15d, %r13d
movq %r12, %rax
jge 0xb676d
leal 0x1(%r13), %r15d
testb $0x4, 0x10(%rax)
jne 0xb6a6c
leaq 0x721e7(%rip), %rcx     # 0x128c47
movl %r13d, %edi
movl %ebx, %esi
movl $0xe, %edx
jmp 0xb6a7d
leaq 0x721c5(%rip), %rcx     # 0x128c38
movl %r13d, %edi
movl %ebx, %esi
movl $0xa, %edx
callq 0xe7d0
cmpl %r14d, %r13d
jge 0xb676d
testb $0x8, 0x10(%r12)
jne 0xb6a98
movq %r12, %rax
jmp 0xb6ac1
leaq 0x721b7(%rip), %rcx     # 0x128c56
movl %r15d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe7d0
addl $0x2, %r13d
cmpl %r14d, %r15d
movl %r13d, %r15d
movq %r12, %rax
jge 0xb676d
testb $0x10, 0x10(%rax)
jne 0xb6acc
movq %r12, %rax
jmp 0xb6af5
leaq 0x72192(%rip), %rcx     # 0x128c65
movl %r15d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
movq %r12, %rax
jge 0xb676d
testb $0x20, 0x10(%rax)
jne 0xb6b00
movq %r12, %rax
jmp 0xb6b29
leaq 0x7216d(%rip), %rcx     # 0x128c74
movl %r15d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
movq %r12, %rax
jge 0xb676d
testb $0x40, 0x10(%rax)
je 0xb6b55
leaq 0x7214d(%rip), %rcx     # 0x128c83
movl %r15d, %edi
movl %ebx, %esi
movl $0xc, %edx
callq 0xe7d0
leal 0x1(%r15), %eax
cmpl %r14d, %r15d
movl %eax, %r15d
jge 0xb676d
testb $-0x80, 0x10(%r12)
je 0xb676d
leaq 0x7212a(%rip), %rcx     # 0x128c92
movl %r15d, %edi
movl %ebx, %esi
movl $0xe, %edx
callq 0xe7d0
incl %r15d
jmp 0xb676d