// File: /workspace/github_c_makefile_star2_O0/mmcco[P]sljit/sljit_src/sljitNativeX86_common.c
// Function: sljit_emit_op_flags
int sljit_emit_op_flags(struct sljit_compiler *compiler, int op,
	int dst, long dstw,
	int src, long srcw,
	int type)
{
	u_char *inst;
	u_char cond_set = 0;
#if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
	int reg;
#else
	/* CHECK_EXTRA_REGS migh overwrite these values. */
	int dst_save = dst;
	long dstw_save = dstw;
#endif

	CHECK_ERROR();
	CHECK(check_sljit_emit_op_flags(compiler, op, dst, dstw, src, srcw, type));

	if (dst == SLJIT_UNUSED)
		return SLJIT_SUCCESS;

	ADJUST_LOCAL_OFFSET(dst, dstw);
	CHECK_EXTRA_REGS(dst, dstw, (void)0);
	if (compiler->flags_saved)
		FAIL_IF(emit_restore_flags(compiler, op & SLJIT_KEEP_FLAGS));

	type &= 0xff;
	/* setcc = jcc + 0x10. */
	cond_set = get_jump_code(type) + 0x10;

#if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
	if (GET_OPCODE(op) == SLJIT_OR && !GET_ALL_FLAGS(op) && FAST_IS_REG(dst) && dst == src) {
		inst = ensure_buf(compiler, 1 + 4 + 3);
		FAIL_IF(!inst);
		INC_SIZE(4 + 3);
		/* Set low reg to conditional flag. */
		*inst++ = (reg_map[TMP_REG1] <= 7) ? REX : REX_B;
		*inst++ = GROUP_0F;
		*inst++ = cond_set;
		*inst++ = MOD_REG | reg_lmap[TMP_REG1];
		*inst++ = REX | (reg_map[TMP_REG1] <= 7 ? 0 : REX_R) | (reg_map[dst] <= 7 ? 0 : REX_B);
		*inst++ = OR_rm8_r8;
		*inst++ = MOD_REG | (reg_lmap[TMP_REG1] << 3) | reg_lmap[dst];
		return SLJIT_SUCCESS;
	}

	reg = (op == SLJIT_MOV && FAST_IS_REG(dst)) ? dst : TMP_REG1;

	inst = ensure_buf(compiler, 1 + 4 + 4);
	FAIL_IF(!inst);
	INC_SIZE(4 + 4);
	/* Set low reg to conditional flag. */
	*inst++ = (reg_map[reg] <= 7) ? REX : REX_B;
	*inst++ = GROUP_0F;
	*inst++ = cond_set;
	*inst++ = MOD_REG | reg_lmap[reg];
	*inst++ = REX_W | (reg_map[reg] <= 7 ? 0 : (REX_B | REX_R));
	*inst++ = GROUP_0F;
	*inst++ = MOVZX_r_rm8;
	*inst = MOD_REG | (reg_lmap[reg] << 3) | reg_lmap[reg];

	if (reg != TMP_REG1)
		return SLJIT_SUCCESS;

	if (GET_OPCODE(op) < SLJIT_ADD) {
		compiler->mode32 = GET_OPCODE(op) != SLJIT_MOV;
		return emit_mov(compiler, dst, dstw, TMP_REG1, 0);
	}
#if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) \
		|| (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS)
	compiler->skip_checks = 1;
#endif
	return sljit_emit_op2(compiler, op, dst, dstw, dst, dstw, TMP_REG1, 0);
#else /* SLJIT_CONFIG_X86_64 */
	if (GET_OPCODE(op) < SLJIT_ADD && FAST_IS_REG(dst)) {
		if (reg_map[dst] <= 4) {
			/* Low byte is accessible. */
			inst = ensure_buf(compiler, 1 + 3 + 3);
			FAIL_IF(!inst);
			INC_SIZE(3 + 3);
			/* Set low byte to conditional flag. */
			*inst++ = GROUP_0F;
			*inst++ = cond_set;
			*inst++ = MOD_REG | reg_map[dst];

			*inst++ = GROUP_0F;
			*inst++ = MOVZX_r_rm8;
			*inst = MOD_REG | (reg_map[dst] << 3) | reg_map[dst];
			return SLJIT_SUCCESS;
		}

		/* Low byte is not accessible. */
		if (cpu_has_cmov == -1)
			get_cpu_features();

		if (cpu_has_cmov) {
			EMIT_MOV(compiler, TMP_REG1, 0, SLJIT_IMM, 1);
			/* a xor reg, reg operation would overwrite the flags. */
			EMIT_MOV(compiler, dst, 0, SLJIT_IMM, 0);

			inst = ensure_buf(compiler, 1 + 3);
			FAIL_IF(!inst);
			INC_SIZE(3);

			*inst++ = GROUP_0F;
			/* cmovcc = setcc - 0x50. */
			*inst++ = cond_set - 0x50;
			*inst++ = MOD_REG | (reg_map[dst] << 3) | reg_map[TMP_REG1];
			return SLJIT_SUCCESS;
		}

		inst = ensure_buf(compiler, 1 + 1 + 3 + 3 + 1);
		FAIL_IF(!inst);
		INC_SIZE(1 + 3 + 3 + 1);
		*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
		/* Set al to conditional flag. */
		*inst++ = GROUP_0F;
		*inst++ = cond_set;
		*inst++ = MOD_REG | 0 /* eax */;

		*inst++ = GROUP_0F;
		*inst++ = MOVZX_r_rm8;
		*inst++ = MOD_REG | (reg_map[dst] << 3) | 0 /* eax */;
		*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
		return SLJIT_SUCCESS;
	}

	if (GET_OPCODE(op) == SLJIT_OR && !GET_ALL_FLAGS(op) && FAST_IS_REG(dst) && dst == src && reg_map[dst] <= 4) {
		SLJIT_COMPILE_ASSERT(reg_map[SLJIT_R0] == 0, scratch_reg1_must_be_eax);
		if (dst != SLJIT_R0) {
			inst = ensure_buf(compiler, 1 + 1 + 3 + 2 + 1);
			FAIL_IF(!inst);
			INC_SIZE(1 + 3 + 2 + 1);
			/* Set low reg to conditional flag. */
			*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
			*inst++ = GROUP_0F;
			*inst++ = cond_set;
			*inst++ = MOD_REG | 0 /* eax */;
			*inst++ = OR_rm8_r8;
			*inst++ = MOD_REG | (0 /* eax */ << 3) | reg_map[dst];
			*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
		}
		else {
			inst = ensure_buf(compiler, 1 + 2 + 3 + 2 + 2);
			FAIL_IF(!inst);
			INC_SIZE(2 + 3 + 2 + 2);
			/* Set low reg to conditional flag. */
			*inst++ = XCHG_r_rm;
			*inst++ = MOD_REG | (1 /* ecx */ << 3) | reg_map[TMP_REG1];
			*inst++ = GROUP_0F;
			*inst++ = cond_set;
			*inst++ = MOD_REG | 1 /* ecx */;
			*inst++ = OR_rm8_r8;
			*inst++ = MOD_REG | (1 /* ecx */ << 3) | 0 /* eax */;
			*inst++ = XCHG_r_rm;
			*inst++ = MOD_REG | (1 /* ecx */ << 3) | reg_map[TMP_REG1];
		}
		return SLJIT_SUCCESS;
	}

	/* Set TMP_REG1 to the bit. */
	inst = ensure_buf(compiler, 1 + 1 + 3 + 3 + 1);
	FAIL_IF(!inst);
	INC_SIZE(1 + 3 + 3 + 1);
	*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];
	/* Set al to conditional flag. */
	*inst++ = GROUP_0F;
	*inst++ = cond_set;
	*inst++ = MOD_REG | 0 /* eax */;

	*inst++ = GROUP_0F;
	*inst++ = MOVZX_r_rm8;
	*inst++ = MOD_REG | (0 << 3) /* eax */ | 0 /* eax */;

	*inst++ = XCHG_EAX_r + reg_map[TMP_REG1];

	if (GET_OPCODE(op) < SLJIT_ADD)
		return emit_mov(compiler, dst, dstw, TMP_REG1, 0);

#if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) \
		|| (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS)
	compiler->skip_checks = 1;
#endif
	return sljit_emit_op2(compiler, op, dst_save, dstw_save, dst_save, dstw_save, TMP_REG1, 0);
#endif /* SLJIT_CONFIG_X86_64 */
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x60, %rsp
movl 0x10(%rbp), %eax
movq %rdi, -0x10(%rbp)
movl %esi, -0x14(%rbp)
movl %edx, -0x18(%rbp)
movq %rcx, -0x20(%rbp)
movl %r8d, -0x24(%rbp)
movq %r9, -0x30(%rbp)
movb $0x0, -0x39(%rbp)
movq -0x10(%rbp), %rax
cmpl $0x0, (%rax)
je 0x2904c
movq -0x10(%rbp), %rax
movl (%rax), %eax
movl %eax, -0x4(%rbp)
jmp 0x2944e
jmp 0x2904e
movq -0x10(%rbp), %rdi
movl -0x14(%rbp), %esi
movl -0x18(%rbp), %edx
movq -0x20(%rbp), %rcx
movl -0x24(%rbp), %r8d
movq -0x30(%rbp), %r9
movl 0x10(%rbp), %eax
movl %eax, (%rsp)
callq 0x29460
cmpl $0x0, -0x18(%rbp)
jne 0x29081
movl $0x0, -0x4(%rbp)
jmp 0x2944e
cmpl $0x8d, -0x18(%rbp)
jne 0x29096
movq -0x20(%rbp), %rax
addq $0x8, %rax
movq %rax, -0x20(%rbp)
movq -0x10(%rbp), %rax
cmpl $0x0, 0x74(%rax)
je 0x290cb
jmp 0x290a2
movq -0x10(%rbp), %rdi
movl -0x14(%rbp), %esi
andl $0x4000, %esi           # imm = 0x4000
callq 0x21db0
cmpl $0x0, %eax
je 0x290c7
movq -0x10(%rbp), %rax
movl (%rax), %eax
movl %eax, -0x4(%rbp)
jmp 0x2944e
jmp 0x290c9
jmp 0x290cb
movl 0x10(%rbp), %eax
andl $0xff, %eax
movl %eax, 0x10(%rbp)
movl 0x10(%rbp), %edi
callq 0x29e90
movzbl %al, %eax
addl $0x10, %eax
movb %al, -0x39(%rbp)
movl -0x14(%rbp), %eax
andl $0xffff80ff, %eax       # imm = 0xFFFF80FF
cmpl $0x66, %eax
jne 0x29244
movl -0x14(%rbp), %eax
andl $0x7f00, %eax           # imm = 0x7F00
cmpl $0x0, %eax
jne 0x29244
cmpl $0x3f, -0x18(%rbp)
jg 0x29244
movl -0x18(%rbp), %eax
cmpl -0x24(%rbp), %eax
jne 0x29244
movq -0x10(%rbp), %rdi
movl $0x8, %esi
callq 0x1a330
movq %rax, -0x38(%rbp)
cmpq $0x0, -0x38(%rbp)
jne 0x29146
movq -0x10(%rbp), %rax
movl (%rax), %eax
movl %eax, -0x4(%rbp)
jmp 0x2944e
jmp 0x29148
movq -0x38(%rbp), %rax
movq %rax, %rcx
addq $0x1, %rcx
movq %rcx, -0x38(%rbp)
movb $0x7, (%rax)
movq -0x10(%rbp), %rax
movq 0x60(%rax), %rcx
addq $0x7, %rcx
movq %rcx, 0x60(%rax)
movq -0x38(%rbp), %rax
movq %rax, %rcx
addq $0x1, %rcx
movq %rcx, -0x38(%rbp)
movb $0x40, (%rax)
movq -0x38(%rbp), %rax
movq %rax, %rcx
addq $0x1, %rcx
movq %rcx, -0x38(%rbp)
movb $0xf, (%rax)
movb -0x39(%rbp), %cl
movq -0x38(%rbp), %rax
movq %rax, %rdx
addq $0x1, %rdx
movq %rdx, -0x38(%rbp)
movb %cl, (%rax)
movzbl 0x75e5(%rip), %eax      # 0x3078e
orl $0xc0, %eax
movb %al, %cl
movq -0x38(%rbp), %rax
movq %rax, %rdx
addq $0x1, %rdx
movq %rdx, -0x38(%rbp)
movb %cl, (%rax)
movslq -0x18(%rbp), %rcx
leaq 0x7594(%rip), %rax      # 0x30760
movzbl (%rax,%rcx), %edx
movl $0x41, %eax
xorl %ecx, %ecx
cmpl $0x7, %edx
cmovlel %ecx, %eax
orl $0x40, %eax
movb %al, %cl
movq -0x38(%rbp), %rax
movq %rax, %rdx
addq $0x1, %rdx
movq %rdx, -0x38(%rbp)
movb %cl, (%rax)
movq -0x38(%rbp), %rax
movq %rax, %rcx
addq $0x1, %rcx
movq %rcx, -0x38(%rbp)
movb $0x8, (%rax)
movzbl 0x7582(%rip), %eax      # 0x3078e
shll $0x3, %eax
orl $0xc0, %eax
movslq -0x18(%rbp), %rdx
leaq 0x7561(%rip), %rcx      # 0x30780
movzbl (%rcx,%rdx), %ecx
orl %ecx, %eax
movb %al, %cl
movq -0x38(%rbp), %rax
movq %rax, %rdx
addq $0x1, %rdx
movq %rdx, -0x38(%rbp)
movb %cl, (%rax)
movl $0x0, -0x4(%rbp)
jmp 0x2944e
cmpl $0x20, -0x14(%rbp)
jne 0x29258
cmpl $0x3f, -0x18(%rbp)
jg 0x29258
movl -0x18(%rbp), %eax
movl %eax, -0x44(%rbp)
jmp 0x29262
movl $0xe, %eax
movl %eax, -0x44(%rbp)
jmp 0x29262
movl -0x44(%rbp), %eax
movl %eax, -0x40(%rbp)
movq -0x10(%rbp), %rdi
movl $0x9, %esi
callq 0x1a330
movq %rax, -0x38(%rbp)
cmpq $0x0, -0x38(%rbp)
jne 0x2928f
movq -0x10(%rbp), %rax
movl (%rax), %eax
movl %eax, -0x4(%rbp)
jmp 0x2944e
jmp 0x29291
movq -0x38(%rbp), %rax
movq %rax, %rcx
addq $0x1, %rcx
movq %rcx, -0x38(%rbp)
movb $0x8, (%rax)
movq -0x10(%rbp), %rax
movq 0x60(%rax), %rcx
addq $0x8, %rcx
movq %rcx, 0x60(%rax)
movslq -0x40(%rbp), %rcx
leaq 0x74a2(%rip), %rax      # 0x30760
movzbl (%rax,%rcx), %edx
movl $0x41, %eax
movl $0x40, %ecx
cmpl $0x7, %edx
cmovlel %ecx, %eax
movb %al, %cl
movq -0x38(%rbp), %rax
movq %rax, %rdx
addq $0x1, %rdx
movq %rdx, -0x38(%rbp)
movb %cl, (%rax)
movq -0x38(%rbp), %rax
movq %rax, %rcx
addq $0x1, %rcx
movq %rcx, -0x38(%rbp)
movb $0xf, (%rax)
movb -0x39(%rbp), %cl
movq -0x38(%rbp), %rax
movq %rax, %rdx
addq $0x1, %rdx
movq %rdx, -0x38(%rbp)
movb %cl, (%rax)
movslq -0x40(%rbp), %rcx
leaq 0x746a(%rip), %rax      # 0x30780
movzbl (%rax,%rcx), %eax
orl $0xc0, %eax
movb %al, %cl
movq -0x38(%rbp), %rax
movq %rax, %rdx
addq $0x1, %rdx
movq %rdx, -0x38(%rbp)
movb %cl, (%rax)
movslq -0x40(%rbp), %rcx
leaq 0x7423(%rip), %rax      # 0x30760
movzbl (%rax,%rcx), %edx
movl $0x45, %eax
xorl %ecx, %ecx
cmpl $0x7, %edx
cmovlel %ecx, %eax
orl $0x48, %eax
movb %al, %cl
movq -0x38(%rbp), %rax
movq %rax, %rdx
addq $0x1, %rdx
movq %rdx, -0x38(%rbp)
movb %cl, (%rax)
movq -0x38(%rbp), %rax
movq %rax, %rcx
addq $0x1, %rcx
movq %rcx, -0x38(%rbp)
movb $0xf, (%rax)
movq -0x38(%rbp), %rax
movq %rax, %rcx
addq $0x1, %rcx
movq %rcx, -0x38(%rbp)
movb $-0x4a, (%rax)
movslq -0x40(%rbp), %rcx
leaq 0x73ed(%rip), %rax      # 0x30780
movzbl (%rax,%rcx), %eax
shll $0x3, %eax
orl $0xc0, %eax
movslq -0x40(%rbp), %rdx
leaq 0x73d6(%rip), %rcx      # 0x30780
movzbl (%rcx,%rdx), %ecx
orl %ecx, %eax
movb %al, %cl
movq -0x38(%rbp), %rax
movb %cl, (%rax)
cmpl $0xe, -0x40(%rbp)
je 0x293ca
movl $0x0, -0x4(%rbp)
jmp 0x2944e
movl -0x14(%rbp), %eax
andl $0xffff80ff, %eax       # imm = 0xFFFF80FF
cmpl $0x60, %eax
jge 0x29410
movl -0x14(%rbp), %eax
andl $0xffff80ff, %eax       # imm = 0xFFFF80FF
cmpl $0x20, %eax
setne %al
andb $0x1, %al
movzbl %al, %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x70(%rax)
movq -0x10(%rbp), %rdi
movl -0x18(%rbp), %esi
movq -0x20(%rbp), %rdx
movl $0xe, %ecx
xorl %eax, %eax
movl %eax, %r8d
callq 0x1d0a0
movl %eax, -0x4(%rbp)
jmp 0x2944e
movq -0x10(%rbp), %rax
movl $0x1, 0x84(%rax)
movq -0x10(%rbp), %rdi
movl -0x14(%rbp), %esi
movl -0x18(%rbp), %edx
movq -0x20(%rbp), %rcx
movl -0x18(%rbp), %r8d
movq -0x20(%rbp), %r9
xorl %eax, %eax
movl $0xe, (%rsp)
movq $0x0, 0x8(%rsp)
callq 0x1f8d0
movl %eax, -0x4(%rbp)
movl -0x4(%rbp), %eax
addq $0x60, %rsp
popq %rbp
retq
nopw (%rax,%rax)