// File: /workspace/github_cpp_makefile_star2_O3/CMU-SAFARI[P]Register-Interval/main.cpp
// Function: main
int main(int argc, char **argv)
{
	int REGNUM=atoi(argv[1]); //REGNUM is the allowed number of registers in register-intervals

        //At first the graphviz dot code (the output of nvidisasm tool) will be parsed and the CFG will be generated.
	vector<basicBlock*> basic_blocks = create_control_flow_graph(argv[2]);
        
        basic_blocks_log(basic_blocks, argv[2]);//generates a log file

        //Register-interval creation algorithm (pass one) will construct the initial register-intervals from basic blocks and CFG
	auto intervals = RegisterIntervalCreationPass::registerIntervalCreationPassOne(basic_blocks, REGNUM);

        //In the following loop, pass two of register-interval creation algorithm will be repeated until no changes occur
	int Size, i = 0;
	do
	{
		registerInterval_log(intervals, i++, argv[2]);

		Size = intervals.size();
		intervals = RegisterIntervalCreationPass::registerIntervalCreationPassTwo(intervals, REGNUM);
	} while (intervals.size() < Size); //Pass 2 of register-interval creation algorithm will be done until the CFG can not be reduced anymore

	return 0;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xb8, %rsp
movq %rsi, %rbx
movq 0x8(%rsi), %rdi
callq 0x2310
movl %eax, -0x2c(%rbp)
movq 0x10(%rbx), %rsi
leaq -0xa8(%rbp), %r15
movq %r15, %rdi
callq 0x5b2b
leaq -0x90(%rbp), %rdi
movq %r15, %rsi
callq 0x8ecc
movq 0x10(%rbx), %rsi
leaq -0x90(%rbp), %rdi
callq 0x6d8a
movq -0x90(%rbp), %rdi
testq %rdi, %rdi
je 0x599d
callq 0x21c0
leaq -0x78(%rbp), %rdi
leaq -0xa8(%rbp), %rsi
callq 0x8ecc
leaq -0x48(%rbp), %rdi
leaq -0x78(%rbp), %rsi
movl -0x2c(%rbp), %edx
callq 0x319a
movq -0x78(%rbp), %rdi
testq %rdi, %rdi
je 0x59cb
callq 0x21c0
leaq -0xd8(%rbp), %r15
leaq -0x48(%rbp), %r12
leaq -0xc0(%rbp), %r13
movq %r15, %rdi
movq %r12, %rsi
callq 0x8d52
movq 0x10(%rbx), %rdx
movq %r15, %rdi
callq 0x7464
movq -0xd8(%rbp), %rdi
testq %rdi, %rdi
je 0x5a05
callq 0x21c0
movq -0x40(%rbp), %r14
subq -0x48(%rbp), %r14
movq %r13, %rdi
movq %r12, %rsi
callq 0x8d52
leaq -0x60(%rbp), %rdi
movq %r13, %rsi
movl -0x2c(%rbp), %edx
callq 0x4a66
movq -0x48(%rbp), %rdi
movq -0x60(%rbp), %rax
movq %rax, -0x48(%rbp)
movups -0x58(%rbp), %xmm0
movups %xmm0, -0x40(%rbp)
xorps %xmm0, %xmm0
movaps %xmm0, -0x60(%rbp)
movq $0x0, -0x50(%rbp)
testq %rdi, %rdi
je 0x5a62
callq 0x21c0
movq -0x60(%rbp), %rdi
testq %rdi, %rdi
je 0x5a62
callq 0x21c0
movq -0xc0(%rbp), %rdi
testq %rdi, %rdi
je 0x5a73
callq 0x21c0
movq -0x48(%rbp), %rdi
movq -0x40(%rbp), %rax
subq %rdi, %rax
sarq $0x3, %rax
shrq $0x3, %r14
movslq %r14d, %rcx
cmpq %rcx, %rax
jb 0x59dd
testq %rdi, %rdi
je 0x5a9c
callq 0x21c0
movq -0xa8(%rbp), %rdi
testq %rdi, %rdi
je 0x5aad
callq 0x21c0
xorl %eax, %eax
addq $0xb8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq %rax, %rbx
movq -0x78(%rbp), %rdi
jmp 0x5b08
jmp 0x5ad8
movq %rax, %rbx
movq -0x90(%rbp), %rdi
jmp 0x5b08
movq %rax, %rbx
jmp 0x5b12
jmp 0x5aeb
movq %rax, %rbx
movq -0xd8(%rbp), %rdi
jmp 0x5afa
movq %rax, %rbx
jmp 0x5b04
movq %rax, %rbx
movq -0xc0(%rbp), %rdi
testq %rdi, %rdi
je 0x5b04
callq 0x21c0
movq -0x48(%rbp), %rdi
testq %rdi, %rdi
je 0x5b12
callq 0x21c0
movq -0xa8(%rbp), %rdi
testq %rdi, %rdi
je 0x5b23
callq 0x21c0
movq %rbx, %rdi
callq 0x2370