// File: /workspace/github_cpp_makefile_star2_O2/j-faria[P]kima/eigen/Eigen/src/Core/products/GeneralBlockPanelKernel.h
// Function: void Eigen::internal::evaluateProductBlockingSizesHeuristic<double, double, 4, long>(long&, long&, long&, long)
void evaluateProductBlockingSizesHeuristic(Index& k, Index& m, Index& n, Index num_threads = 1)
{
  typedef gebp_traits<LhsScalar,RhsScalar> Traits;

  // Explanations:
  // Let's recall that the product algorithms form mc x kc vertical panels A' on the lhs and
  // kc x nc blocks B' on the rhs. B' has to fit into L2/L3 cache. Moreover, A' is processed
  // per mr x kc horizontal small panels where mr is the blocking size along the m dimension
  // at the register level. This small horizontal panel has to stay within L1 cache.
  std::ptrdiff_t l1, l2, l3;
  manage_caching_sizes(GetAction, &l1, &l2, &l3);
  #ifdef EIGEN_VECTORIZE_AVX512
  // We need to find a rationale for that, but without this adjustment,
  // performance with AVX512 is pretty bad, like -20% slower.
  // One reason is that with increasing packet-size, the blocking size k
  // has to become pretty small if we want that 1 lhs panel fit within L1.
  // For instance, with the 3pX4 kernel and double, the size of the lhs+rhs panels are:
  //   k*(3*64 + 4*8) Bytes, with l1=32kBytes, and k%8=0, we have k=144.
  // This is quite small for a good reuse of the accumulation registers.
  l1 *= 4;
  #endif

  if (num_threads > 1) {
    typedef typename Traits::ResScalar ResScalar;
    enum {
      kdiv = KcFactor * (Traits::mr * sizeof(LhsScalar) + Traits::nr * sizeof(RhsScalar)),
      ksub = Traits::mr * Traits::nr * sizeof(ResScalar),
      kr = 8,
      mr = Traits::mr,
      nr = Traits::nr
    };
    // Increasing k gives us more time to prefetch the content of the "C"
    // registers. However once the latency is hidden there is no point in
    // increasing the value of k, so we'll cap it at 320 (value determined
    // experimentally).
    const Index k_cache = (numext::mini<Index>)((l1-ksub)/kdiv, 320);
    if (k_cache < k) {
      k = k_cache - (k_cache % kr);
      eigen_internal_assert(k > 0);
    }

    const Index n_cache = (l2-l1) / (nr * sizeof(RhsScalar) * k);
    const Index n_per_thread = numext::div_ceil(n, num_threads);
    if (n_cache <= n_per_thread) {
      // Don't exceed the capacity of the l2 cache.
      eigen_internal_assert(n_cache >= static_cast<Index>(nr));
      n = n_cache - (n_cache % nr);
      eigen_internal_assert(n > 0);
    } else {
      n = (numext::mini<Index>)(n, (n_per_thread + nr - 1) - ((n_per_thread + nr - 1) % nr));
    }

    if (l3 > l2) {
      // l3 is shared between all cores, so we'll give each thread its own chunk of l3.
      const Index m_cache = (l3-l2) / (sizeof(LhsScalar) * k * num_threads);
      const Index m_per_thread = numext::div_ceil(m, num_threads);
      if(m_cache < m_per_thread && m_cache >= static_cast<Index>(mr)) {
        m = m_cache - (m_cache % mr);
        eigen_internal_assert(m > 0);
      } else {
        m = (numext::mini<Index>)(m, (m_per_thread + mr - 1) - ((m_per_thread + mr - 1) % mr));
      }
    }
  }
  else {
    // In unit tests we do not want to use extra large matrices,
    // so we reduce the cache size to check the blocking strategy is not flawed
#ifdef EIGEN_DEBUG_SMALL_PRODUCT_BLOCKS
    l1 = 9*1024;
    l2 = 32*1024;
    l3 = 512*1024;
#endif

    // Early return for small problems because the computation below are time consuming for small problems.
    // Perhaps it would make more sense to consider k*n*m??
    // Note that for very tiny problem, this function should be bypassed anyway
    // because we use the coefficient-based implementation for them.
    if((numext::maxi)(k,(numext::maxi)(m,n))<48)
      return;

    typedef typename Traits::ResScalar ResScalar;
    enum {
      k_peeling = 8,
      k_div = KcFactor * (Traits::mr * sizeof(LhsScalar) + Traits::nr * sizeof(RhsScalar)),
      k_sub = Traits::mr * Traits::nr * sizeof(ResScalar)
    };

    // ---- 1st level of blocking on L1, yields kc ----

    // Blocking on the third dimension (i.e., k) is chosen so that an horizontal panel
    // of size mr x kc of the lhs plus a vertical panel of kc x nr of the rhs both fits within L1 cache.
    // We also include a register-level block of the result (mx x nr).
    // (In an ideal world only the lhs panel would stay in L1)
    // Moreover, kc has to be a multiple of 8 to be compatible with loop peeling, leading to a maximum blocking size of:
    const Index max_kc = numext::maxi<Index>(((l1-k_sub)/k_div) & (~(k_peeling-1)),1);
    const Index old_k = k;
    if(k>max_kc)
    {
      // We are really blocking on the third dimension:
      // -> reduce blocking size to make sure the last block is as large as possible
      //    while keeping the same number of sweeps over the result.
      k = (k%max_kc)==0 ? max_kc
                        : max_kc - k_peeling * ((max_kc-1-(k%max_kc))/(k_peeling*(k/max_kc+1)));

      eigen_internal_assert(((old_k/k) == (old_k/max_kc)) && "the number of sweeps has to remain the same");
    }

    // ---- 2nd level of blocking on max(L2,L3), yields nc ----

    // TODO find a reliable way to get the actual amount of cache per core to use for 2nd level blocking, that is:
    //      actual_l2 = max(l2, l3/nb_core_sharing_l3)
    // The number below is quite conservative: it is better to underestimate the cache size rather than overestimating it)
    // For instance, it corresponds to 6MB of L3 shared among 4 cores.
    #ifdef EIGEN_DEBUG_SMALL_PRODUCT_BLOCKS
    const Index actual_l2 = l3;
    #else
    const Index actual_l2 = 1572864; // == 1.5 MB
    #endif

    // Here, nc is chosen such that a block of kc x nc of the rhs fit within half of L2.
    // The second half is implicitly reserved to access the result and lhs coefficients.
    // When k<max_kc, then nc can arbitrarily growth. In practice, it seems to be fruitful
    // to limit this growth: we bound nc to growth by a factor x1.5.
    // However, if the entire lhs block fit within L1, then we are not going to block on the rows at all,
    // and it becomes fruitful to keep the packed rhs blocks in L1 if there is enough remaining space.
    Index max_nc;
    const Index lhs_bytes = m * k * sizeof(LhsScalar);
    const Index remaining_l1 = l1- k_sub - lhs_bytes;
    if(remaining_l1 >= Index(Traits::nr*sizeof(RhsScalar))*k)
    {
      // L1 blocking
      max_nc = remaining_l1 / (k*sizeof(RhsScalar));
    }
    else
    {
      // L2 blocking
      max_nc = (3*actual_l2)/(2*2*max_kc*sizeof(RhsScalar));
    }
    // WARNING Below, we assume that Traits::nr is a power of two.
    Index nc = numext::mini<Index>(actual_l2/(2*k*sizeof(RhsScalar)), max_nc) & (~(Traits::nr-1));
    if(n>nc)
    {
      // We are really blocking over the columns:
      // -> reduce blocking size to make sure the last block is as large as possible
      //    while keeping the same number of sweeps over the packed lhs.
      //    Here we allow one more sweep if this gives us a perfect match, thus the commented "-1"
      n = (n%nc)==0 ? nc
                    : (nc - Traits::nr * ((nc/*-1*/-(n%nc))/(Traits::nr*(n/nc+1))));
    }
    else if(old_k==k)
    {
      // So far, no blocking at all, i.e., kc==k, and nc==n.
      // In this case, let's perform a blocking over the rows such that the packed lhs data is kept in cache L1/L2
      // TODO: part of this blocking strategy is now implemented within the kernel itself, so the L1-based heuristic here should be obsolete.
      Index problem_size = k*n*sizeof(LhsScalar);
      Index actual_lm = actual_l2;
      Index max_mc = m;
      if(problem_size<=1024)
      {
        // problem is small enough to keep in L1
        // Let's choose m such that lhs's block fit in 1/3 of L1
        actual_lm = l1;
      }
      else if(l3!=0 && problem_size<=32768)
      {
        // we have both L2 and L3, and problem is small enough to be kept in L2
        // Let's choose m such that lhs's block fit in 1/3 of L2
        actual_lm = l2;
        max_mc = (numext::mini<Index>)(576,max_mc);
      }
      Index mc = (numext::mini<Index>)(actual_lm/(3*k*sizeof(LhsScalar)), max_mc);
      if (mc > Traits::mr) mc -= mc % Traits::mr;
      else if (mc==0) return;
      m = (m%mc)==0 ? mc
                    : (mc - Traits::mr * ((mc/*-1*/-(m%mc))/(Traits::mr*(m/mc+1))));
    }
  }
}

// Assembly:
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rcx, %r12
movq %rdx, %r14
movq %rsi, %rbx
movq %rdi, %r15
leaq 0x10(%rsp), %rsi
leaq 0x8(%rsp), %rdx
movq %rsp, %rcx
xorl %edi, %edi
callq 0x18fcd
cmpq $0x2, %r12
jl 0x18d81
movq 0x10(%rsp), %rsi
leaq -0x80(%rsi), %rax
movl $0x100, %ecx            # imm = 0x100
cqto
idivq %rcx
movl $0x140, %ecx            # imm = 0x140
cmpq %rcx, %rax
cmovlq %rax, %rcx
movq (%r15), %rdi
cmpq %rdi, %rcx
jge 0x18d2e
pushq $0x8
popq %rdi
movq %rcx, %rax
cqto
idivq %rdi
subq %rdx, %rcx
movq %rcx, (%r15)
movq %rcx, %rdi
movq 0x8(%rsp), %r8
movq %r8, %rax
subq %rsi, %rax
shlq $0x5, %rdi
xorl %edx, %edx
divq %rdi
movq %rax, %rcx
movq (%r14), %r9
leaq (%r12,%r9), %rax
decq %rax
cqto
idivq %r12
pushq $0x4
popq %rdi
cmpq %rax, %rcx
jle 0x18e2c
movq %rax, %rsi
addq $0x3, %rsi
movq %rsi, %rax
cqto
idivq %rdi
subq %rdx, %rsi
cmpq %r9, %rsi
cmovgeq %r9, %rsi
movq %rsi, %rcx
jmp 0x18e37
movq (%rbx), %rsi
movq (%r14), %rax
cmpq %rax, %rsi
cmovgq %rsi, %rax
movq (%r15), %rcx
cmpq %rax, %rcx
cmovgq %rcx, %rax
cmpq $0x30, %rax
jl 0x18fc1
movq 0x10(%rsp), %rdi
leaq -0x80(%rdi), %r8
movl $0x100, %r9d            # imm = 0x100
movq %r8, %rax
cqto
idivq %r9
andq $-0x8, %rax
cmpq $0x2, %rax
pushq $0x1
popq %r9
cmovgeq %rax, %r9
movq %rcx, %r10
cmpq %r9, %rcx
jle 0x18e07
movq %rcx, %rax
xorl %edx, %edx
divq %r9
movq %r9, %r10
testq %rdx, %rdx
je 0x18e01
notq %rdx
addq %r9, %rdx
leaq 0x8(,%rax,8), %rsi
movq %rdx, %rax
cqto
idivq %rsi
shlq $0x3, %rax
movq %r9, %r10
subq %rax, %r10
movq %r10, (%r15)
movq (%rbx), %rsi
movq %rsi, %rax
imulq %r10, %rax
shlq $0x3, %rax
subq %rax, %r8
movq %r10, %rax
shlq $0x5, %rax
cmpq %rax, %r8
jge 0x18e96
shlq $0x5, %r9
movl $0x480000, %eax         # imm = 0x480000
jmp 0x18ea1
movq %rcx, %rax
cqto
idivq %rdi
subq %rdx, %rcx
movq %rcx, (%r14)
movq (%rsp), %rax
subq %r8, %rax
jle 0x18fc1
leaq -0x1(%r12), %rcx
movq (%r15), %rsi
imulq %r12, %rsi
shlq $0x3, %rsi
xorl %edx, %edx
divq %rsi
movq %rax, %rsi
movq (%rbx), %r8
addq %r8, %rcx
movq %rcx, %rax
cqto
idivq %r12
movq %rax, %rcx
cmpq %rax, %rsi
setge %al
cmpq $0x4, %rsi
setl %dl
orb %al, %dl
jne 0x18eff
movabsq $0x7ffffffffffffffc, %rax # imm = 0x7FFFFFFFFFFFFFFC
andq %rax, %rsi
movq %rsi, (%rbx)
jmp 0x18fc1
leaq (,%r10,8), %r9
movq %r8, %rax
xorl %edx, %edx
divq %r9
movq %rax, %r9
movq %r10, %r8
shlq $0x4, %r8
movl $0x180000, %eax         # imm = 0x180000
xorl %edx, %edx
divq %r8
movq %rax, %r8
cmpq %rax, %r9
cmovlq %r9, %r8
andq $-0x4, %r8
movq (%r14), %rax
cmpq %r8, %rax
jle 0x18f1a
cqto
idivq %r8
testq %rdx, %rdx
je 0x18ef7
movq %r8, %rcx
subq %rdx, %rcx
leaq 0x4(,%rax,4), %rsi
movq %rcx, %rax
cqto
idivq %rsi
shlq $0x2, %rax
subq %rax, %r8
movq %r8, (%r14)
jmp 0x18fc1
addq $0x3, %rcx
movq %rcx, %rax
cqto
idivq %rdi
subq %rdx, %rcx
cmpq %r8, %rcx
cmovgeq %r8, %rcx
jmp 0x18fbe
cmpq %r10, %rcx
jne 0x18fc1
imulq %rcx, %rax
shlq $0x3, %rax
movq %rsi, %r8
cmpq $0x401, %rax            # imm = 0x401
jl 0x18f64
movl $0x180000, %edi         # imm = 0x180000
cmpq $0x8000, %rax           # imm = 0x8000
ja 0x18f61
cmpq $0x0, (%rsp)
movq %rsi, %r8
je 0x18f64
movq 0x8(%rsp), %rdi
movl $0x240, %r8d            # imm = 0x240
cmpq %r8, %rsi
cmovlq %rsi, %r8
jmp 0x18f64
movq %rsi, %r8
imulq $0x18, %rcx, %rcx
movq %rdi, %rax
xorl %edx, %edx
divq %rcx
movq %rax, %rcx
cmpq %rax, %r8
cmovlq %r8, %rcx
cmpq $0x5, %rcx
jl 0x18f8f
movabsq $0x7ffffffffffffffc, %rax # imm = 0x7FFFFFFFFFFFFFFC
andq %rax, %rcx
jmp 0x18f94
testq %rcx, %rcx
je 0x18fc1
movq %rsi, %rax
cqto
idivq %rcx
testq %rdx, %rdx
je 0x18fbe
movq %rcx, %rsi
subq %rdx, %rsi
leaq 0x4(,%rax,4), %rdi
movq %rsi, %rax
cqto
idivq %rdi
shlq $0x2, %rax
subq %rax, %rcx
movq %rcx, (%rbx)
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
retq