// File: jkingan[P]ladyheather/heathgps.cpp
// Function: x72_sw_discipline()
void x72_sw_discipline()
{
   // X72 software discipline algorithm state dispatcher

   if(x72_restore_timeout > 0) {  // message sync lost, pause disciplining
      --x72_restore_timeout;
      return;
   }

   if(x72_user_dis == 0) {
//    x72_user_state = x72_state = X72_STATE_DISCIPLINE;
      return;  // not doing software disciplning
   }


//sprintf(debug_text, "X72 state: %d  disci:%d  rblock:%04X  have_pps:%d  x72_pps:%d  dds:%g", x72_user_state, x72_user_dis, x72_creg & 0x0002, have_x72_pps, x72_pps, last_x72_dds);
   discipline_mode = DIS_MODE_AUTO_HOLD;
   if(x72_creg & 0x0002) {
      return;  // Rb not locked
   }
   if(x72_creg & 0x0008) {
      discipline_mode = DIS_MODE_NORMAL;
      return;  // PPS output not enabled
   }

   x72_state = x72_user_state;  // so firmware diciplining state display code works with software disciplining
   have_x72_state = 1;

   // dispatch to X72 sw discipline state handler
   if     (x72_user_state == X72_STATE_START0)     x72_init_state0();
   else if(x72_user_state == X72_STATE_START1)     x72_init_state1();
   else if(x72_user_state == X72_STATE_START2)     ;  // not used
   else if(x72_user_state == X72_STATE_HOLDOVER)   x72_holdover_state();  // not used
   else if(x72_user_state == X72_STATE_JAM1)       x72_jam1_state();      // not used
   else if(x72_user_state == X72_STATE_JAM2) {
      discipline_mode = DIS_MODE_NORMAL;  // !!! comment out to show TIC updates as holdover marks at the top of the plot
      x72_jam2_state();
   }
   else if(x72_user_state == X72_STATE_DISCIPLINE) {
      discipline_mode = DIS_MODE_NORMAL;
      x72_discipline_state();
   }
   else if(x72_user_state == X72_STATE_PIDCALC)    ;  // not used
   else if(x72_user_state == X72_STATE_PIDUPDATE)  ;  // not used
   else if(x72_user_state == X72_STATE_SLOPECALC)  x72_slopecalc_state();  // not used
   else x72_init_state0();

}

// Assembly:
pushq %rbp
movq %rsp, %rbp
cmpl $0x0, 0x309929(%rip)    # 0x3cbda4
jle 0xc2491
movl 0x309921(%rip), %eax    # 0x3cbda4
addl $-0x1, %eax
movl %eax, 0x309918(%rip)    # 0x3cbda4
jmp 0xc25c3
leaq 0x1b7c38(%rip), %rax    # 0x27a0d0
cmpl $0x0, (%rax)
jne 0xc24a2
jmp 0xc25c3
leaq 0x2aa1ce(%rip), %rax    # 0x36c677
movb $0x2, (%rax)
leaq 0x1b7b05(%rip), %rax    # 0x279fb8
movl (%rax), %eax
andl $0x2, %eax
cmpl $0x0, %eax
je 0xc24c2
jmp 0xc25c3
leaq 0x1b7aef(%rip), %rax    # 0x279fb8
movl (%rax), %eax
andl $0x8, %eax
cmpl $0x0, %eax
je 0xc24e2
leaq 0x2aa19d(%rip), %rax    # 0x36c677
movb $0x0, (%rax)
jmp 0xc25c3
movl 0x3098cc(%rip), %ecx    # 0x3cbdb4
leaq 0x1b7af1(%rip), %rax    # 0x279fe0
movl %ecx, (%rax)
leaq 0x1b79bc(%rip), %rax    # 0x279eb4
movl $0x1, (%rax)
cmpl $0x0, 0x3098af(%rip)    # 0x3cbdb4
jne 0xc2511
callq 0x10a300
jmp 0xc25c3
cmpl $0x1, 0x30989c(%rip)    # 0x3cbdb4
jne 0xc2524
callq 0x10a3d0
jmp 0xc25c1
cmpl $0x2, 0x309889(%rip)    # 0x3cbdb4
jne 0xc2532
jmp 0xc25bf
cmpl $0x3, 0x30987b(%rip)    # 0x3cbdb4
jne 0xc2542
callq 0x10a420
jmp 0xc25bd
cmpl $0x4, 0x30986b(%rip)    # 0x3cbdb4
jne 0xc2552
callq 0x10a6d0
jmp 0xc25bb
cmpl $0x5, 0x30985b(%rip)    # 0x3cbdb4
jne 0xc256c
leaq 0x2aa115(%rip), %rax    # 0x36c677
movb $0x0, (%rax)
callq 0x10a740
jmp 0xc25b9
cmpl $0x6, 0x309841(%rip)    # 0x3cbdb4
jne 0xc2586
leaq 0x2aa0fb(%rip), %rax    # 0x36c677
movb $0x0, (%rax)
callq 0x10a790
jmp 0xc25b7
cmpl $0x7, 0x309827(%rip)    # 0x3cbdb4
jne 0xc2591
jmp 0xc25b5
cmpl $0x8, 0x30981c(%rip)    # 0x3cbdb4
jne 0xc259c
jmp 0xc25b3
cmpl $0x9, 0x309811(%rip)    # 0x3cbdb4
jne 0xc25ac
callq 0x10a520
jmp 0xc25b1
callq 0x10a300
jmp 0xc25b3
jmp 0xc25b5
jmp 0xc25b7
jmp 0xc25b9
jmp 0xc25bb
jmp 0xc25bd
jmp 0xc25bf
jmp 0xc25c1
jmp 0xc25c3
popq %rbp
retq
nopw %cs:(%rax,%rax)