// File: /workspace/github_c_makefile_star2_O3/aquaxis[P]synverll/src/parser_ir_top.c
// Function: create_top_module
int create_top_module()
{
	MODULE_TREE *now_module_tree = NULL;
	MEMORY_TREE *now_memory_tree = NULL;
	CALL_TREE *now_call_tree = NULL;
	CALL_SIGNAL_TREE *now_call_signal_tree = NULL;
	char *module_name;
	char *call_signal_name;
	int args_num;
	char *label;
	char *verilog_signal;
	char *verilog_wire;
	char *verilog_module;
	int inout;

	printf("[Create top Module]\n");

	call_signal_name	= calloc(STR_MAX, 1);
	label				= calloc(STR_MAX, 1);
	verilog_signal		= calloc(STR_MAX, 1);
	verilog_wire		= calloc(STR_MAX, 1);
	verilog_module		= calloc(STR_MAX, 1);

    now_module_tree = module_tree_top;
    while(now_module_tree != NULL){
		// 初期化
		args_num = 0;
		module_name = calloc(strlen(now_module_tree->module_name)+1,1);
		strcpy(module_name, convname(sep_p(now_module_tree->module_name)));

		// モジュール宣言
		sprintf(verilog_module, "%s u_%s(\n", module_name, module_name);
		register_top_module_decl(verilog_module);

		// 制御信号の生成
		sprintf(verilog_module, "\t// system signals\n");
		register_top_module_decl(verilog_module);
		{
			sprintf(verilog_module, "\t.__func_clock(system_clock),\n");
			register_top_module_decl(verilog_module);
			sprintf(verilog_module, "\t.__func_reset(system_reset),\n");
			register_top_module_decl(verilog_module);
			// __func_start(in)
			sprintf(label, "__func_start");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_CTRL, SIG_IN, 0, NULL, 0, verilog_signal, verilog_wire);
			// ToDo: 接続されるべき信号を検索してWired OR宣言を生成する。
			// __func_done(out)
			sprintf(label, "__func_done");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_CTRL, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __func_ready(out)
			sprintf(label, "__func_ready");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_CTRL, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
		}

		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// メモリバスの生成
		sprintf(verilog_module, "\t// memory bus\n");
		register_top_module_decl(verilog_module);
		if(now_module_tree->is_module_gm_if){
			use_gm_if = 1;

			// __gm_base(in)
			sprintf(label, "__gm_base");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [31:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_IN, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_req(out)
			sprintf(label, "__gm_req");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_rnw(out)
			sprintf(label, "__gm_rnw");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_done(in)
			sprintf(label, "__gm_done");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_IN, 0, NULL, 0, verilog_signal, verilog_wire);
			// ToDo: 接続されるべき信号を検索してWired OR宣言を生成する。
			// __gm_adrs(out)
			sprintf(label, "__gm_adrs");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [31:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_leng(out)
			sprintf(label, "__gm_leng");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [1:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
			// __gm_di(in)
			sprintf(label, "__gm_di");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [31:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_IN, 0, NULL, 0, verilog_signal, verilog_wire);
			// ToDo: 接続されるべき信号を検索してWired OR宣言を生成する。
			// __gm_do(out)
			sprintf(label, "__gm_do");
			sprintf(verilog_signal, "%s%s", module_name, label);
			sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
			register_top_module_decl(verilog_module);
			sprintf(verilog_wire, "wire [31:0] %s;", verilog_signal);
			register_top_signal_tree(label, module_name, label, FLAG_GMEM, SIG_OUT, 0, NULL, 0, verilog_signal, verilog_wire);
		}

		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// メモリアドレスの生成
		sprintf(verilog_module, "\t// base address\n");
		register_top_module_decl(verilog_module);
		{
			now_memory_tree = now_module_tree->memory_tree_ptr;
			while(now_memory_tree != NULL){
				if(now_memory_tree->flag == MEMORY_FLAG_GLOBAL){
					sprintf(label, "%s", convname(sep_p(now_memory_tree->label)));
//					sprintf(verilog_signal, "%s%s", module_name, label);
					sprintf(verilog_module, "\t.__base_%s(__base_%s),\n", label, label);
					register_top_module_decl(verilog_module);
//					sprintf(verilog_wire, "wire [31:0] %s", module_name);
//					register_top_signal_tree(label, verilog_signal, 0, 0, verilog_wire);
				}
				now_memory_tree = now_memory_tree->next_ptr;
			}
		}
		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// 引数の生成
		sprintf(verilog_module, "\t// arguments\n");
		register_top_module_decl(verilog_module);
		args_num = 0;
		{
			now_memory_tree = now_module_tree->memory_tree_ptr;
			while(now_memory_tree != NULL){
				if(now_memory_tree->flag == MEMORY_FLAG_REGISTER){
					sprintf(label, "__args_%s", convname(sep_p(now_memory_tree->label)));
					sprintf(verilog_signal, "%s%s", module_name, label);
					sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
					register_top_module_decl(verilog_module);
//					sprintf(verilog_wire, "wire [31:0] %s", verilog_signal);
//					register_top_signal_tree(label, module_name, label, 0, 0, 0, verilog_signal, verilog_wire);

					if(now_memory_tree->size > 0){
						sprintf(verilog_wire, "wire [%d:0] %s;", now_memory_tree->size*8-1, verilog_signal);
					}else{
						sprintf(verilog_wire, "wire %s;", verilog_signal);
					}
					register_top_signal_tree(label, module_name, convname(sep_p(now_memory_tree->label)), FLAG_ARGS, SIG_IN, now_memory_tree->size, NULL, args_num, verilog_signal, verilog_wire);
					// ToDo: 接続されるべき信号を検索してWired OR宣言を生成する。
					args_num ++;
				}
				now_memory_tree = now_memory_tree->next_ptr;
			}
		}
		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// CALL命令の生成
		sprintf(verilog_module, "\t// call instruction\n");
		register_top_module_decl(verilog_module);
		{
			now_call_tree = now_module_tree->call_tree_ptr;
			while(now_call_tree != NULL){
				now_call_signal_tree = now_call_tree->signal_top_ptr;
				while(now_call_signal_tree != NULL){
					if(
						!strcmp(now_call_signal_tree->signal_name, "req") ||
						!strcmp(now_call_signal_tree->signal_name, "ready") ||
						!strcmp(now_call_signal_tree->signal_name, "done") ||
						!strcmp(now_call_signal_tree->signal_name, "result")
					){
						sprintf(label, "__call_%s_%s", convname(sep_p(now_call_tree->call_name)), now_call_signal_tree->signal_name);
					}else{
						sprintf(label, "__call_%s_%s_%d", convname(sep_p(now_call_tree->call_name)), now_call_signal_tree->signal_name, now_call_signal_tree->num);
					}
					sprintf(verilog_signal, "%s%s", module_name, label);
					sprintf(verilog_module, "\t.%s(%s),\n", label, verilog_signal);
					register_top_module_decl(verilog_module);
					if(now_call_signal_tree->size > 0){
						sprintf(verilog_wire, "wire [%d:0] %s;", now_call_signal_tree->size-1, verilog_signal);
					}else{
						sprintf(verilog_wire, "wire %s;", verilog_signal);
					}
					if(
						!strcmp(now_call_signal_tree->signal_name, "done") ||
						!strcmp(now_call_signal_tree->signal_name, "ready") ||
						!strcmp(now_call_signal_tree->signal_name, "result")
					){
						inout = SIG_IN;
					}else{
						inout = SIG_OUT;
					}
					register_top_signal_tree(label, module_name, now_call_signal_tree->signal_name, FLAG_CALL, inout, 0, convname(sep_p(now_call_tree->call_name)), now_call_signal_tree->num, verilog_signal, verilog_wire);
					now_call_signal_tree = now_call_signal_tree->next_ptr;
				}
				sprintf(verilog_module, "\n");
				now_call_tree = now_call_tree->next_ptr;
			}
		}

		sprintf(verilog_module, "\n");
		register_top_module_decl(verilog_module);

		// 戻り値の生成
		sprintf(verilog_module, "\t// return value\n");
		register_top_module_decl(verilog_module);

		{
			now_memory_tree = now_module_tree->memory_tree_ptr;
			while(now_memory_tree != NULL){
				if(now_memory_tree->flag == MEMORY_FLAG_RETURN){
					if(strcmp(now_memory_tree->type, "void")){
						sprintf(verilog_signal, "%s__func_result", module_name);
						sprintf(verilog_module, "\t.%s(%s)\n", "__func_result", verilog_signal);
						register_top_module_decl(verilog_module);

						if(now_memory_tree->size > 0){
							sprintf(verilog_wire, "wire [%d:0] %s;", now_memory_tree->size*8-1,verilog_signal);
						}else{
							sprintf(verilog_wire, "wire %s;", verilog_signal);
						}

						register_top_signal_tree("__func_result", module_name, verilog_signal, FLAG_RETURN, SIG_OUT, now_memory_tree->size, verilog_signal, 0, verilog_signal, verilog_wire);
					}
				}
				now_memory_tree = now_memory_tree->next_ptr;
			}
		}

//		sprintf(verilog_module, "\n");
//		register_top_module_decl(verilog_module);
//		sprintf(verilog_module, "\t.__dummy()\n");
//		register_top_module_decl(verilog_module);
		sprintf(verilog_module, ");\n");
		register_top_module_decl(verilog_module);

        now_module_tree = now_module_tree->next_ptr;

        free(module_name);
    }

    free(call_signal_name);
    free(verilog_signal);

	return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x38, %rsp
leaq 0x557e(%rip), %rdi      # 0x1000d
callq 0x1070
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x10f0
movq %rax, %rbx
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x10f0
movq %rax, %r14
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x10f0
movq %rax, %rbp
movl $0x400, %edi            # imm = 0x400
movl $0x1, %esi
callq 0x10f0
movq %rax, %r13
leaq 0x9a8d(%rip), %rax      # 0x14570
movq (%rax), %r12
testq %r12, %r12
je 0xb71a
movq %rbp, 0x28(%rsp)
movq %r13, 0x18(%rsp)
movq %r14, 0x20(%rsp)
movq 0x10(%r12), %r15
movq %r15, %rdi
callq 0x1090
leaq 0x1(%rax), %rdi
movl $0x1, %esi
callq 0x10f0
movq %rax, 0x8(%rsp)
movzbl (%r15), %eax
cmpl $0x40, %eax
movq %r12, 0x10(%rsp)
je 0xab31
cmpl $0x25, %eax
jne 0xab34
incq %r15
movq %r15, %rdi
callq 0x139f
movq 0x8(%rsp), %r12
movq %r12, %rdi
movq %rax, %rsi
callq 0x1060
movq %r13, %rdi
leaq 0x5119(%rip), %rsi      # 0xfc6f
movq %r12, %rdx
movq %r12, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movups 0x5107(%rip), %xmm0     # 0xfc79
movups %xmm0, (%r13)
movl $0xa736c, 0x10(%r13)    # imm = 0xA736C
movq %r13, %rdi
callq 0x9e8c
movups 0x50ff(%rip), %xmm0     # 0xfc8d
movups %xmm0, (%r13)
movups 0x5102(%rip), %xmm0     # 0xfc9c
movups %xmm0, 0xf(%r13)
movq %r13, %rdi
callq 0x9e8c
movups 0x50fe(%rip), %xmm0     # 0xfcac
movups %xmm0, (%r13)
movups 0x5101(%rip), %xmm0     # 0xfcbb
movups %xmm0, 0xf(%r13)
movq %r13, %rdi
callq 0x9e8c
movabsq $0x735f636e75665f5f, %rax # imm = 0x735F636E75665F5F
movq %rax, (%rbx)
movabsq $0x74726174735f63, %rax # imm = 0x74726174735F63
movq %rax, 0x5(%rbx)
movq %r14, %rdi
leaq 0x3654(%rip), %rsi      # 0xe240
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x50c8(%rip), %rsi      # 0xfccb
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movq %rbp, %rdi
leaq 0x50b4(%rip), %rsi      # 0xfcd6
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
xorl %r15d, %r15d
pushq %r15
pushq %r15
callq 0xa010
addq $0x20, %rsp
movabsq $0x645f636e75665f5f, %rax # imm = 0x645F636E75665F5F
movq %rax, (%rbx)
movl $0x656e6f, 0x8(%rbx)    # imm = 0x656E6F
movq %r14, %rdi
leaq 0x35cf(%rip), %rsi      # 0xe240
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x5043(%rip), %rsi      # 0xfccb
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movq %rbp, %rdi
leaq 0x502f(%rip), %rsi      # 0xfcd6
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x1, %ecx
movl $0x1, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa010
addq $0x20, %rsp
movabsq $0x725f636e75665f5f, %rax # imm = 0x725F636E75665F5F
movq %rax, (%rbx)
movabsq $0x79646165725f63, %rax # imm = 0x79646165725F63
movq %rax, 0x5(%rbx)
movq %r14, %rdi
leaq 0x3543(%rip), %rsi      # 0xe240
xorl %r15d, %r15d
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4fb4(%rip), %rsi      # 0xfccb
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movq %rbp, %rdi
leaq 0x4fa0(%rip), %rsi      # 0xfcd6
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x1, %ecx
movl $0x1, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa010
addq $0x20, %rsp
movw $0xa, (%r13)
movq %r13, %rdi
callq 0x9e8c
movups 0x4f7b(%rip), %xmm0     # 0xfcf8
movups %xmm0, (%r13)
movq %r13, %rdi
callq 0x9e8c
movq 0x10(%rsp), %rax
cmpl %r15d, 0x28(%rax)
je 0xb1ae
movl $0x1, 0x9819(%rip)      # 0x145bc
movw $0x65, %ax
movw %ax, 0x8(%rbx)
movabsq $0x7361625f6d675f5f, %rax # imm = 0x7361625F6D675F5F
movq %rax, (%rbx)
movq %r14, %rdi
leaq 0x347e(%rip), %rsi      # 0xe240
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4ef2(%rip), %rsi      # 0xfccb
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movq %rbp, %rdi
leaq 0x4f10(%rip), %rsi      # 0xfd08
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa010
addq $0x20, %rsp
movabsq $0x7165725f6d675f5f, %rax # imm = 0x7165725F6D675F5F
movq %rax, (%rbx)
movb %r15b, 0x8(%rbx)
movq %r14, %rdi
leaq 0x33ff(%rip), %rsi      # 0xe240
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4e73(%rip), %rsi      # 0xfccb
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movq %rbp, %rdi
leaq 0x4e5f(%rip), %rsi      # 0xfcd6
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
movl $0x1, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa010
addq $0x20, %rsp
movabsq $0x776e725f6d675f5f, %rax # imm = 0x776E725F6D675F5F
movq %rax, (%rbx)
movb %r15b, 0x8(%rbx)
movq %r14, %rdi
leaq 0x337d(%rip), %rsi      # 0xe240
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4df1(%rip), %rsi      # 0xfccb
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movq %rbp, %rdi
leaq 0x4ddd(%rip), %rsi      # 0xfcd6
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
movl $0x1, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa010
addq $0x20, %rsp
movabsq $0x6e6f645f6d675f5f, %rax # imm = 0x6E6F645F6D675F5F
movq %rax, (%rbx)
movw $0x65, %ax
movw %ax, 0x8(%rbx)
movq %r14, %rdi
leaq 0x32f7(%rip), %rsi      # 0xe240
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4d6b(%rip), %rsi      # 0xfccb
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movq %rbp, %rdi
leaq 0x4d57(%rip), %rsi      # 0xfcd6
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa010
addq $0x20, %rsp
movabsq $0x7264615f6d675f5f, %rax # imm = 0x7264615F6D675F5F
movq %rax, (%rbx)
movw $0x73, 0x8(%rbx)
movq %r14, %rdi
leaq 0x3276(%rip), %rsi      # 0xe240
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4cea(%rip), %rsi      # 0xfccb
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movq %rbp, %rdi
leaq 0x4d08(%rip), %rsi      # 0xfd08
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
movl $0x1, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa010
addq $0x20, %rsp
movabsq $0x6e656c5f6d675f5f, %rax # imm = 0x6E656C5F6D675F5F
movq %rax, (%rbx)
movw $0x67, 0x8(%rbx)
movq %r14, %rdi
leaq 0x31f2(%rip), %rsi      # 0xe240
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4c66(%rip), %rsi      # 0xfccb
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movq %rbp, %rdi
leaq 0x4cba(%rip), %rsi      # 0xfd3e
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
movl $0x1, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa010
addq $0x20, %rsp
movabsq $0x69645f6d675f5f, %rax # imm = 0x69645F6D675F5F
movq %rax, (%rbx)
movq %r14, %rdi
leaq 0x3174(%rip), %rsi      # 0xe240
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4be8(%rip), %rsi      # 0xfccb
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movq %rbp, %rdi
leaq 0x4c06(%rip), %rsi      # 0xfd08
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa010
addq $0x20, %rsp
movabsq $0x6f645f6d675f5f, %rax # imm = 0x6F645F6D675F5F
movq %rax, (%rbx)
movq %r14, %rdi
leaq 0x30f9(%rip), %rsi      # 0xe240
movq %r12, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4b6d(%rip), %rsi      # 0xfccb
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movq %rbp, %rdi
leaq 0x4b8b(%rip), %rsi      # 0xfd08
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movq %rbx, %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $0x2, %ecx
movl $0x1, %r8d
xorl %r9d, %r9d
pushq %rbp
pushq %r14
pushq %r15
pushq %r15
callq 0xa010
addq $0x20, %rsp
movw $0xa, %r15w
movw %r15w, (%r13)
movq %r13, %rdi
callq 0x9e8c
movw %r15w, 0x10(%r13)
movups 0x4b81(%rip), %xmm0     # 0xfd4d
movups %xmm0, (%r13)
movq %r13, %rdi
callq 0x9e8c
movq 0x10(%rsp), %r12
movq 0x18(%r12), %r15
testq %r15, %r15
je 0xb238
cmpl $0x1, 0x10(%r15)
jne 0xb232
movq 0x18(%r15), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xb200
cmpl $0x25, %eax
jne 0xb203
incq %rdi
callq 0x139f
movq %rbx, %rdi
movq %rax, %rsi
callq 0x1060
movq %r13, %rdi
leaq 0x4b42(%rip), %rsi      # 0xfd5f
movq %rbx, %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movq 0x8(%r15), %r15
jmp 0xb1e3
movw $0xa, (%r13)
movq %r13, %rdi
callq 0x9e8c
movabsq $0x75677261202f2f09, %rax # imm = 0x75677261202F2F09
movq %rax, (%r13)
movabsq $0xa73746e656d75, %rax  # imm = 0xA73746E656D75
movq %rax, 0x7(%r13)
movq %r13, %rdi
callq 0x9e8c
movq 0x18(%r12), %r15
testq %r15, %r15
je 0xb375
xorl %r12d, %r12d
cmpl $0x4, 0x10(%r15)
jne 0xb368
movq 0x18(%r15), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xb298
cmpl $0x25, %eax
jne 0xb29b
incq %rdi
callq 0x139f
movq %rbx, %rdi
leaq 0x4add(%rip), %rsi      # 0xfd87
movq %rax, %rdx
xorl %eax, %eax
callq 0x11a0
movq %r14, %rdi
leaq 0x2f82(%rip), %rsi      # 0xe240
movq 0x8(%rsp), %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x49f4(%rip), %rsi      # 0xfccb
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movl 0x44(%r15), %eax
testl %eax, %eax
jle 0xb311
leal -0x1(,%rax,8), %edx
movq %rbp, %rdi
leaq 0x4a8c(%rip), %rsi      # 0xfd91
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
jmp 0xb325
movq %rbp, %rdi
leaq 0x49bb(%rip), %rsi      # 0xfcd6
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movq 0x18(%r15), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xb336
cmpl $0x25, %eax
jne 0xb339
incq %rdi
callq 0x139f
movl 0x44(%r15), %r9d
movq %rbx, %rdi
movq 0x8(%rsp), %rsi
movq %rax, %rdx
movl $0x3, %ecx
xorl %r8d, %r8d
pushq %rbp
pushq %r14
pushq %r12
pushq $0x0
callq 0xa010
addq $0x20, %rsp
incl %r12d
movq 0x8(%r15), %r15
testq %r15, %r15
jne 0xb27c
movw $0xa, (%r13)
movq %r13, %rdi
callq 0x9e8c
movabsq $0xa6e6f69746375, %rax  # imm = 0xA6E6F69746375
movq %rax, 0xe(%r13)
movups 0x4a08(%rip), %xmm0     # 0xfda1
movups %xmm0, (%r13)
movq %r13, %rdi
callq 0x9e8c
movq 0x10(%rsp), %rax
movq 0x20(%rax), %r14
testq %r14, %r14
leaq 0x4912(%rip), %r13      # 0xfccb
je 0xb5da
movq 0x20(%r14), %r12
testq %r12, %r12
je 0xb5c3
movq %r14, 0x30(%rsp)
movq 0x10(%r12), %r15
movq %r15, %rdi
leaq 0x493d(%rip), %rsi      # 0xfd1d
callq 0x1100
testl %eax, %eax
je 0xb462
movq %r15, %rdi
leaq 0x48ff(%rip), %rsi      # 0xfcf2
callq 0x1100
testl %eax, %eax
je 0xb462
movq %r15, %rdi
leaq 0x48e0(%rip), %rsi      # 0xfce6
callq 0x1100
testl %eax, %eax
je 0xb462
movq %r15, %rdi
leaq 0x49b9(%rip), %rsi      # 0xfdd2
callq 0x1100
testl %eax, %eax
je 0xb462
movq 0x10(%r14), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xb433
cmpl $0x25, %eax
jne 0xb436
incq %rdi
leaq 0x2e03(%rip), %r15      # 0xe240
callq 0x139f
movq 0x10(%r12), %rcx
movl 0x28(%r12), %r8d
movq %rbx, %rdi
leaq 0x468a(%rip), %rsi      # 0xfae0
movq %rax, %rdx
xorl %eax, %eax
callq 0x11a0
jmp 0xb49b
movq 0x10(%r14), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xb473
cmpl $0x25, %eax
jne 0xb476
incq %rdi
leaq 0x2dc3(%rip), %r15      # 0xe240
callq 0x139f
movq 0x10(%r12), %rcx
movq %rbx, %rdi
leaq 0x31b6(%rip), %rsi      # 0xe647
movq %rax, %rdx
xorl %eax, %eax
callq 0x11a0
movq 0x20(%rsp), %r14
movq %r14, %rdi
movq %r15, %rsi
movq 0x8(%rsp), %rdx
movq %rbx, %rcx
xorl %eax, %eax
callq 0x11a0
movq 0x18(%rsp), %r15
movq %r15, %rdi
movq %r13, %rsi
movq %rbx, %r13
movq %rbx, %rdx
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r15, %rdi
callq 0x9e8c
movl 0x24(%r12), %edx
testl %edx, %edx
jle 0xb4f9
decl %edx
movq %rbp, %rdi
leaq 0x48a4(%rip), %rsi      # 0xfd91
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
jmp 0xb50d
movq %rbp, %rdi
leaq 0x47d3(%rip), %rsi      # 0xfcd6
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movq 0x10(%r12), %rbp
movq %rbp, %rdi
leaq 0x47ca(%rip), %rsi      # 0xfce6
callq 0x1100
xorl %r15d, %r15d
testl %eax, %eax
movq %r13, %rbx
movq 0x30(%rsp), %r14
je 0xb564
movq %rbp, %rdi
leaq 0x47b8(%rip), %rsi      # 0xfcf2
callq 0x1100
testl %eax, %eax
leaq 0x4783(%rip), %r13      # 0xfccb
je 0xb56b
movq %rbp, %rdi
leaq 0x487e(%rip), %rsi      # 0xfdd2
callq 0x1100
xorl %r15d, %r15d
testl %eax, %eax
setne %r15b
jmp 0xb56b
leaq 0x4760(%rip), %r13      # 0xfccb
movq 0x10(%r14), %rdi
movzbl (%rdi), %eax
cmpl $0x40, %eax
je 0xb57c
cmpl $0x25, %eax
jne 0xb57f
incq %rdi
callq 0x139f
movl 0x28(%r12), %r10d
movq %rbx, %rdi
movq 0x8(%rsp), %rsi
movq %rbp, %rdx
movl $0x5, %ecx
movl %r15d, %r8d
xorl %r9d, %r9d
movq 0x28(%rsp), %rbp
pushq %rbp
pushq 0x28(%rsp)
pushq %r10
pushq %rax
callq 0xa010
addq $0x20, %rsp
movq 0x8(%r12), %r12
testq %r12, %r12
jne 0xb3d1
movq 0x18(%rsp), %rax
movw $0xa, (%rax)
movq 0x8(%r14), %r14
testq %r14, %r14
jne 0xb3bf
movq 0x18(%rsp), %r13
movw $0xa, %r14w
movw %r14w, (%r13)
movq %r13, %rdi
callq 0x9e8c
movw %r14w, 0x10(%r13)
movups 0x47ba(%rip), %xmm0     # 0xfdb7
movups %xmm0, (%r13)
movq %r13, %rdi
callq 0x9e8c
movq 0x10(%rsp), %r12
movq 0x18(%r12), %r15
testq %r15, %r15
movq 0x20(%rsp), %r14
je 0xb6f2
cmpl $0x5, 0x10(%r15)
jne 0xb6e5
movq 0x20(%r15), %rdi
leaq 0x29cc(%rip), %rsi      # 0xe004
callq 0x1100
testl %eax, %eax
je 0xb6e5
movq %r14, %rdi
leaq 0x477a(%rip), %rsi      # 0xfdc9
movq 0x8(%rsp), %rdx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
leaq 0x4774(%rip), %rsi      # 0xfdd9
leaq 0x475f(%rip), %rdx      # 0xfdcb
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
movq %r13, %rdi
callq 0x9e8c
movl 0x44(%r15), %eax
testl %eax, %eax
jle 0xb6a3
leal -0x1(,%rax,8), %edx
movq %rbp, %rdi
leaq 0x46fa(%rip), %rsi      # 0xfd91
movq %r14, %rcx
xorl %eax, %eax
callq 0x11a0
jmp 0xb6b7
movq %rbp, %rdi
leaq 0x4629(%rip), %rsi      # 0xfcd6
movq %r14, %rdx
xorl %eax, %eax
callq 0x11a0
movl 0x44(%r15), %r9d
leaq 0x4709(%rip), %rdi      # 0xfdcb
movq 0x8(%rsp), %rsi
movq %r14, %rdx
movl $0x6, %ecx
movl $0x1, %r8d
pushq %rbp
pushq %r14
pushq $0x0
pushq %r14
callq 0xa010
addq $0x20, %rsp
movq 0x8(%r15), %r15
testq %r15, %r15
jne 0xb622
movl $0xa3b29, (%r13)        # imm = 0xA3B29
movq %r13, %rdi
callq 0x9e8c
movq 0x8(%r12), %r12
movq 0x8(%rsp), %rdi
callq 0x1030
testq %r12, %r12
jne 0xaafe
movq %r14, %rdi
callq 0x1030
xorl %eax, %eax
addq $0x38, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq