// File: /workspace/github_cpp_makefile_star2_O1/MPSLab-ASU[P]DiRAC/./src/network.cc
// Function: MultiCastController_InputNetwork::execute()
void MultiCastController_InputNetwork::execute()
{
  if(!isRowWise_controller) {
    assert(((*config==0) || (*forward==0)) && "Column-wise controller cannot "
      "operate on data in both config and forward mode simultanously!");
  }

  // Do the follownig for the controller of an input/InOut network
  // if configuration of the controller is needed
  if(*config)
  {
    bus_forward_colWiseControllers = 0;
    counter_tag_match = 0;
    if((isRowWise_controller) && (*forward == 0) && (*rowTagIn == rowId) ||
       (!isRowWise_controller) && (*forward == 0) && (*colTagIn == colId))
    {
      // self-configure the controller
      if(counter_config == 0)
        configVal = *dataIn;
      else if(counter_config == 1)
        start_offset = *dataIn;
      else if (counter_config == 2)
        cnt_keepVal = *dataIn;
      else if (counter_config == 3)
        cnt_skipVal = *dataIn;
      counter_config++;
      bus_config_colWiseControllers = 0;

      // we don't need the following code in synthesized logic implementation
      // since counter_config should be of 2 bits
      if(counter_config == 4) counter_config = 0;
    }
    else if((isRowWise_controller) && (*forward) && (*rowTagIn == rowId))
    // forward the configuration to column-wise controllers
    {
      dataOut = *dataIn;
      colTagOut = *colTagIn;
      bus_config_colWiseControllers = 1;
    }
    else
      bus_config_colWiseControllers = 0;
  }
  // need to forward the data?
  else if((*config == 0) && (*forward == 1))
  {
    uint8_t inputTag = (isRowWise_controller) ? (*rowTagIn) : (*colTagIn);
    bus_config_colWiseControllers = 0;
    // After "offset" cycles, raise config value till "keepVal" Cycles
    // then, config value is 0 (i.e. no match) for "skipVal" cycles.
    // This repeats afterward till reconfiguration of controller
    // i.e., raise values for "keepVal" cycles, and skip for "skipVal" cycles.
    // When configVal is raised (during a total of "keepVal" cycles),
    // the configVal is compared with incoming tag of controller
    // If tag matches, data is forwarded further.
    if((counter_tag_match >= start_offset) &&
       (counter_tag_match < start_offset + cnt_keepVal) &&
       (configVal == inputTag))
    {
      dataOut = *dataIn;
      colTagOut = (isRowWise_controller) ? (*colTagIn) : 0;
      bus_forward_colWiseControllers = 1;
    }
    else
    {
      bus_forward_colWiseControllers = 0;
    }
    counter_tag_match++;
    if(counter_tag_match == start_offset + cnt_keepVal + cnt_skipVal)
      counter_tag_match = start_offset;
  }
  else
  {
    bus_config_colWiseControllers = 0;
    bus_forward_colWiseControllers = 0;
    counter_config = 0;
  }
}

// Assembly:
movb 0x35(%rdi), %al
testb %al, %al
jne 0x4115c0
movq (%rdi), %rcx
cmpb $0x0, (%rcx)
je 0x4115c0
movq 0x8(%rdi), %rcx
cmpb $0x0, (%rcx)
jne 0x411729
movq (%rdi), %rcx
cmpb $0x1, (%rcx)
jne 0x411632
movb $0x0, 0x1b(%rdi)
movw $0x0, 0x3c(%rdi)
testb %al, %al
je 0x4115f0
movq 0x8(%rdi), %rcx
cmpb $0x0, (%rcx)
jne 0x4115ec
movq 0x20(%rdi), %rcx
movzbl (%rcx), %ecx
cmpw %cx, 0x36(%rdi)
je 0x411606
testb %al, %al
jne 0x411663
movq 0x8(%rdi), %rcx
cmpb $0x0, (%rcx)
jne 0x41165f
movq 0x28(%rdi), %rcx
movzbl (%rcx), %ecx
cmpw %cx, 0x38(%rdi)
jne 0x41165f
movzbl 0x3a(%rdi), %eax
cmpq $0x3, %rax
ja 0x411717
leaq 0x184a39(%rip), %rcx    # 0x596054
movslq (%rcx,%rax,4), %rdx
addq %rcx, %rdx
jmpq *%rdx
movq 0x10(%rdi), %rcx
movb (%rcx), %cl
movb %cl, 0x31(%rdi)
jmp 0x411717
movq 0x8(%rdi), %rcx
cmpb $0x1, (%rcx)
jne 0x411697
movl %eax, %ecx
xorb $0x1, %cl
movzbl %cl, %ecx
movq 0x20(%rdi,%rcx,8), %rcx
movb (%rcx), %r8b
movb $0x0, 0x1a(%rdi)
movzwl 0x3c(%rdi), %edx
movzbl 0x32(%rdi), %ecx
cmpl %ecx, %edx
jae 0x4116a2
xorl %esi, %esi
jmp 0x4116d6
testb %al, %al
je 0x411692
movq 0x8(%rdi), %rax
cmpb $0x1, (%rax)
jne 0x411692
movq 0x20(%rdi), %rax
movzbl (%rax), %eax
cmpw %ax, 0x36(%rdi)
jne 0x411692
movq 0x10(%rdi), %rax
movq 0x28(%rdi), %rcx
movzwl (%rax), %eax
movw %ax, 0x18(%rdi)
movb (%rcx), %al
movb %al, 0x30(%rdi)
movb $0x1, 0x1a(%rdi)
retq
movb $0x0, 0x1a(%rdi)
retq
movw $0x0, 0x1a(%rdi)
movb $0x0, 0x3a(%rdi)
retq
movzbl 0x33(%rdi), %r9d
addl %ecx, %r9d
xorl %esi, %esi
cmpl %edx, %r9d
jbe 0x4116d6
cmpb %r8b, 0x31(%rdi)
jne 0x4116d6
movq 0x10(%rdi), %rsi
movzwl (%rsi), %esi
movw %si, 0x18(%rdi)
testb %al, %al
je 0x4116ce
movq 0x28(%rdi), %rax
movb (%rax), %al
jmp 0x4116d0
xorl %eax, %eax
movb %al, 0x30(%rdi)
movb $0x1, %sil
movb %sil, 0x1b(%rdi)
incl %edx
movw %dx, 0x3c(%rdi)
movzwl %dx, %eax
movzbl 0x33(%rdi), %edx
addl %ecx, %edx
movzbl 0x34(%rdi), %esi
addl %edx, %esi
cmpl %eax, %esi
jne 0x411728
movw %cx, 0x3c(%rdi)
retq
movq 0x10(%rdi), %rcx
movb (%rcx), %cl
movb %cl, 0x33(%rdi)
jmp 0x411717
movq 0x10(%rdi), %rcx
movb (%rcx), %cl
movb %cl, 0x34(%rdi)
jmp 0x411717
movq 0x10(%rdi), %rcx
movb (%rcx), %cl
movb %cl, 0x32(%rdi)
incl %eax
movb %al, 0x3a(%rdi)
movb $0x0, 0x1a(%rdi)
cmpb $0x4, %al
je 0x41169d
retq
pushq %rax
leaq 0x184933(%rip), %rdi    # 0x596064
leaq 0x1849b1(%rip), %rsi    # 0x5960e9
leaq 0x1849bb(%rip), %rcx    # 0x5960fa
movl $0x52, %edx
callq 0x4d75c0
nop