// File: /workspace/github_c_makefile_star2_O2/Mithreindeir[P]ewcc/src/debug.c
// Function: bb_debug
void bb_debug(struct bb *bb)
{
	if (!bb) return;
	if (bb->visited) return;
	bb->visited = 1;
	printf("Basic Block:\n");
	printf("------------------------------------\n");
	struct ir_stmt *stmt = bb->blk;
	int ln = 0;
	while (stmt && ln < bb->len) {
		printf("%2d: ", ++ln);
		ir_stmt_debug(stmt);
		printf("\n");
		stmt = stmt->next;
	}
	printf("Local Register Allocation:\n");
	color_graph(bb->graph, bb->nvert, 4);
	for (int i = 0; i < bb->nvert; i++)
		printf("Temp R%d = Machine Reg %d\n", bb->graph[i]->ocolor, bb->graph[i]->color);
	printf("------------------------------------\n");
	stmt = bb->blk;
	ln = 0;
	while (stmt && ln < bb->len) {
		if (stmt->result && stmt->result->type == oper_reg) {
			for (int i = 0; i < bb->nvert; i++) {
				if (bb->graph[i]->ocolor == stmt->result->val.virt_reg) {
					stmt->result->val.virt_reg = bb->graph[i]->color;
				}
			}
		}
		if (stmt->arg1 && stmt->arg1->type == oper_reg) {
			for (int i = 0; i < bb->nvert; i++) {
				if (bb->graph[i]->ocolor == stmt->arg1->val.virt_reg) {
					stmt->arg1->val.virt_reg = bb->graph[i]->color;
				}
			}
		}
		if (stmt->arg2 && stmt->arg2->type == oper_reg) {
			for (int i = 0; i < bb->nvert; i++) {
				if (bb->graph[i]->ocolor == stmt->arg2->val.virt_reg) {
					stmt->arg2->val.virt_reg = bb->graph[i]->color;
				}
			}
		}
		stmt = stmt->next;
		ln++;
	}
	printf("\n");
	for (int i = 0; i < bb->nsucc; i++) {
		bb_debug(bb->succ[i]);
	}
}

// Assembly:
testq %rdi, %rdi
je 0x224d
pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
movq %rdi, %rbx
cmpl $0x0, 0x9c(%rdi)
je 0x224e
popq %rbx
popq %r12
popq %r14
popq %r15
popq %rbp
retq
movl $0x1, 0x9c(%rbx)
leaq 0x5f7c(%rip), %rdi      # 0x81db
callq 0x2060
leaq 0x5f98(%rip), %rdi      # 0x8203
callq 0x2060
pushq $0x1
popq %r14
leaq 0x5ed5(%rip), %r15      # 0x8150
pushq $0xa
popq %rbp
movq %rbx, %r12
movq (%r12), %r12
testq %r12, %r12
je 0x22b8
leal -0x1(%r14), %eax
cmpl 0x10(%rbx), %eax
jge 0x22b8
movq %r15, %rdi
movl %r14d, %esi
xorl %eax, %eax
callq 0x2080
movq %r12, %rdi
callq 0x2405
movl %ebp, %edi
callq 0x2040
addq $0x28, %r12
incl %r14d
jmp 0x2281
leaq 0x5f29(%rip), %rdi      # 0x81e8
callq 0x2060
movq 0x70(%rbx), %rdi
movl 0x78(%rbx), %esi
pushq $0x4
popq %rdx
callq 0x3e25
leaq 0x5e7c(%rip), %r14      # 0x8156
xorl %r15d, %r15d
movslq 0x78(%rbx), %rax
cmpq %rax, %r15
jge 0x2302
movq 0x70(%rbx), %rax
movq (%rax,%r15,8), %rax
movl (%rax), %esi
movl 0x4(%rax), %edx
movq %r14, %rdi
xorl %eax, %eax
callq 0x2080
incq %r15
jmp 0x22dd
leaq 0x5efa(%rip), %rdi      # 0x8203
callq 0x2060
xorl %eax, %eax
movq %rbx, %rcx
movq (%rcx), %rcx
testq %rcx, %rcx
je 0x23db
cmpl 0x10(%rbx), %eax
jge 0x23db
movq 0x8(%rcx), %rdx
testq %rdx, %rdx
je 0x2336
cmpl $0x0, (%rdx)
je 0x235a
movq 0x10(%rcx), %rdx
testq %rdx, %rdx
je 0x2344
cmpl $0x0, (%rdx)
je 0x2385
movq 0x18(%rcx), %rdx
testq %rdx, %rdx
je 0x2352
cmpl $0x0, (%rdx)
je 0x23b0
addq $0x28, %rcx
incl %eax
jmp 0x2313
xorl %edx, %edx
movslq 0x78(%rbx), %rsi
cmpq %rsi, %rdx
jge 0x2336
movq 0x70(%rbx), %rsi
movq (%rsi,%rdx,8), %rsi
movl (%rsi), %r8d
movq 0x8(%rcx), %rdi
cmpl 0x8(%rdi), %r8d
jne 0x2380
movl 0x4(%rsi), %esi
movl %esi, 0x8(%rdi)
incq %rdx
jmp 0x235c
xorl %edx, %edx
movslq 0x78(%rbx), %rsi
cmpq %rsi, %rdx
jge 0x2344
movq 0x70(%rbx), %rsi
movq (%rsi,%rdx,8), %rsi
movl (%rsi), %r8d
movq 0x10(%rcx), %rdi
cmpl 0x8(%rdi), %r8d
jne 0x23ab
movl 0x4(%rsi), %esi
movl %esi, 0x8(%rdi)
incq %rdx
jmp 0x2387
xorl %edx, %edx
movslq 0x78(%rbx), %rsi
cmpq %rsi, %rdx
jge 0x2352
movq 0x70(%rbx), %rsi
movq (%rsi,%rdx,8), %rsi
movl (%rsi), %r8d
movq 0x18(%rcx), %rdi
cmpl 0x8(%rdi), %r8d
jne 0x23d6
movl 0x4(%rsi), %esi
movl %esi, 0x8(%rdi)
incq %rdx
jmp 0x23b2
pushq $0xa
popq %rdi
callq 0x2040
xorl %r14d, %r14d
movslq 0x38(%rbx), %rax
cmpq %rax, %r14
jge 0x2245
movq 0x28(%rbx), %rax
movq (%rax,%r14,8), %rdi
callq 0x222c
incq %r14
jmp 0x23e6