// File: /workspace/github_c_makefile_star2_O1/Ihsoh[P]ilang/compiler/assembler/ins_enc.c
// Function: ins_enc_opcode_rXX
void ins_enc_opcode_rXX(
	Instruction *ins,
	InstructionEncoderData *data
) {
	_CHECK_PARAMS(1);

	ParserASTNode *ins_node = data->ins_node;

	ParserASTNode *target = data->ins_node->childs[0];

	EncoderInstruction enc_ins;

	ins_init(data->ctx, ins, ins_node, &enc_ins);

	int arch = ASM_PARSER_CONTEXT_DATA_GET_ARCH(data->ctx);

	InsRegister *target_reg = ASM_REG_AST_NODE_GET_REG(target);

	switch (arch) {
		case ASM_ARCH_BIT16: {
			switch (target_reg->type) {
				case INS_REGISTER_GENERAL_2BYTE: {
					// 无需操作数大小前缀。
					break;
				}
				case INS_REGISTER_GENERAL_4BYTE: {
					enc_ins.legacy_prefix.operand_size_override = true;
					break;
				}
				case INS_REGISTER_GENERAL_8BYTE: {
					data->ctx->syntax_error_node_msg(
						data->ctx,
						ins_node,
						"instruction not supported in 16-bit mode."
					);
					break;
				}
				default: {
					assert(0);
					break;
				}
			}
			break;
		}
		case ASM_ARCH_BIT32: {
			switch (target_reg->type) {
				case INS_REGISTER_GENERAL_2BYTE: {
					enc_ins.legacy_prefix.operand_size_override = true;
					break;
				}
				case INS_REGISTER_GENERAL_4BYTE: {
					// 无需操作数大小前缀。
					break;
				}
				case INS_REGISTER_GENERAL_8BYTE: {
					data->ctx->syntax_error_node_msg(
						data->ctx,
						ins_node,
						"instruction not supported in 32-bit mode."
					);
					break;
				}
				default: {
					assert(0);
					break;
				}
			}
			break;
		}
		case ASM_ARCH_BIT64: {
			switch (target_reg->type) {
				case INS_REGISTER_GENERAL_2BYTE: {
					enc_ins.legacy_prefix.operand_size_override = true;
					break;
				}
				case INS_REGISTER_GENERAL_4BYTE: {
					data->ctx->syntax_error_node_msg(
						data->ctx,
						ins_node,
						"instruction not supported in 64-bit mode."
					);
					break;
				}
				case INS_REGISTER_GENERAL_8BYTE: {
					// 无需操作数大小前缀。
					break;
				}
				default: {
					assert(0);
					break;
				}
			}
			break;
		}
		default: {
			assert(0);
			break;
		}
	}

	_output(data, &enc_ins);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %rbx
subq $0x68, %rsp
testq %rdi, %rdi
je 0x18c15
movq %rsi, %rbx
testq %rsi, %rsi
je 0x18c1e
movq (%rbx), %r14
testq %r14, %r14
je 0x18c27
cmpl $0x1, 0x44(%r14)
jne 0x18c30
movq %rdi, %rsi
movq 0x48(%r14), %rax
movq (%rax), %r15
movq 0x8(%rbx), %rdi
leaq -0x78(%rbp), %rcx
movq %r14, %rdx
callq 0x155a6
movq 0x8(%rbx), %rdi
movl 0xb0(%rdi), %ecx
movq 0x60(%r15), %rax
cmpl $0x4, %ecx
je 0x18bc3
cmpl $0x2, %ecx
je 0x18b92
cmpl $0x1, %ecx
jne 0x18c4f
movl 0xc(%rax), %eax
cmpl $0x3, %eax
je 0x18bfe
cmpl $0x5, %eax
je 0x18bf1
cmpl $0x4, %eax
je 0x18bd9
leaq 0x1681a(%rip), %rdi     # 0x2f394
leaq 0x1a113(%rip), %rsi     # 0x32c94
leaq 0x1a409(%rip), %rcx     # 0x32f91
movl $0x190, %edx            # imm = 0x190
callq 0xa0b0
movl 0xc(%rax), %eax
cmpl $0x5, %eax
je 0x18bdf
cmpl $0x4, %eax
je 0x18bfe
cmpl $0x3, %eax
je 0x18bd9
leaq 0x167e9(%rip), %rdi     # 0x2f394
leaq 0x1a0e2(%rip), %rsi     # 0x32c94
leaq 0x1a3d8(%rip), %rcx     # 0x32f91
movl $0x1a9, %edx            # imm = 0x1A9
callq 0xa0b0
movl 0xc(%rax), %eax
cmpl $0x5, %eax
je 0x18bfe
cmpl $0x4, %eax
je 0x18be8
cmpl $0x3, %eax
jne 0x18c6e
movb $0x1, -0x6d(%rbp)
jmp 0x18bfe
leaq 0x1a2e4(%rip), %rdx     # 0x32eca
jmp 0x18bf8
leaq 0x1a3e3(%rip), %rdx     # 0x32fd2
jmp 0x18bf8
leaq 0x1a2a8(%rip), %rdx     # 0x32ea0
movq %r14, %rsi
callq *0x58(%rdi)
leaq -0x78(%rbp), %rsi
movq %rbx, %rdi
callq 0x181fc
addq $0x68, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
leaq 0x18b5e(%rip), %rdi     # 0x3177a
jmp 0x18c37
leaq 0x1e9cf(%rip), %rdi     # 0x375f4
jmp 0x18c37
leaq 0x1a0c3(%rip), %rdi     # 0x32cf1
jmp 0x18c37
leaq 0x1a33b(%rip), %rdi     # 0x32f72
leaq 0x1a056(%rip), %rsi     # 0x32c94
leaq 0x1a34c(%rip), %rcx     # 0x32f91
movl $0x16e, %edx            # imm = 0x16E
callq 0xa0b0
leaq 0x1673e(%rip), %rdi     # 0x2f394
leaq 0x1a037(%rip), %rsi     # 0x32c94
leaq 0x1a32d(%rip), %rcx     # 0x32f91
movl $0x1c9, %edx            # imm = 0x1C9
callq 0xa0b0
leaq 0x1671f(%rip), %rdi     # 0x2f394
leaq 0x1a018(%rip), %rsi     # 0x32c94
leaq 0x1a30e(%rip), %rcx     # 0x32f91
movl $0x1c2, %edx            # imm = 0x1C2
callq 0xa0b0