// File: /workspace/github_c_makefile_star2_O1/Ihsoh[P]ilang/compiler/assembler/ins_enc.c
// Function: ins_enc_Ap
void ins_enc_Ap(
	Instruction *ins,
	InstructionEncoderData *data
) {
	_CHECK_PARAMS(1);

	ParserASTNode *ins_node = data->ins_node;

	ParserASTNode *oprd = ins_node->childs[0];

	EncoderInstruction enc_ins;
	
	ins_init(data->ctx, ins, ins_node, &enc_ins);

	int addr_size = ASM_DIRECT_ADDRESS_AST_NODE_GET_ADDR_SIZE(oprd);

	uint64_t base = ASM_DIRECT_ADDRESS_AST_NODE_GET_BASE(oprd);
	uint64_t offset = ASM_DIRECT_ADDRESS_AST_NODE_GET_OFFSET(oprd);

	switch (ASM_PARSER_CONTEXT_DATA_GET_ARCH(data->ctx)) {
		case ASM_ARCH_BIT16: {
			if (addr_size == ASM_MEM_ADDR_SIZE_UNKNOWN
					|| addr_size == ASM_MEM_ADDR_SIZE_16) {
				ins_add_uint16_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint16_t) offset
				);

				ins_add_uint16_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint16_t) base
				);
			} else if (addr_size == ASM_MEM_ADDR_SIZE_32) {
				enc_ins.legacy_prefix.operand_size_override = true;

				ins_add_uint32_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint32_t) offset
				);

				ins_add_uint16_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint16_t) base
				);
			} else {
				assert(0);
			}
			break;
		}
		case ASM_ARCH_BIT32: {
			if (addr_size == ASM_MEM_ADDR_SIZE_16) {
				enc_ins.legacy_prefix.operand_size_override = true;

				ins_add_uint16_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint16_t) offset
				);

				ins_add_uint16_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint16_t) base
				);
			} else if (addr_size == ASM_MEM_ADDR_SIZE_32
					|| addr_size == ASM_MEM_ADDR_SIZE_UNKNOWN) {
				ins_add_uint32_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint32_t) offset
				);

				ins_add_uint16_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint16_t) base
				);
			} else {
				assert(0);
			}
			break;
		}
		case ASM_ARCH_BIT64: {
			data->ctx->syntax_error_node_msg(
				data->ctx,
				ins_node,
				"instruction not supported in 64-bit mode."
			);
			break;
		}
		default: {
			assert(0);
			break;
		}
	}

	_output(data, &enc_ins);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
testq %rdi, %rdi
je 0x1b86e
movq %rsi, %rbx
testq %rsi, %rsi
je 0x1b877
movq (%rbx), %r15
testq %r15, %r15
je 0x1b880
cmpl $0x1, 0x44(%r15)
jne 0x1b889
movq %rdi, %r14
movq 0x48(%r15), %rax
movq (%rax), %r12
movq 0x8(%rbx), %rdi
leaq -0x88(%rbp), %rcx
movq %r14, %rsi
movq %r15, %rdx
callq 0x155a6
movq 0x8(%rbx), %rdi
movl 0xb0(%rdi), %edx
cmpl $0x4, %edx
je 0x1b7f9
movl 0x60(%r12), %eax
movq 0x70(%r12), %r15
movq 0x80(%r12), %rcx
cmpl $0x2, %edx
je 0x1b7c1
cmpl $0x1, %edx
jne 0x1b8a8
cmpl $0x1, %eax
ja 0x1b81c
movl $0xffff, %r13d          # imm = 0xFFFF
andl %r13d, %ecx
leaq -0x88(%rbp), %r12
jmp 0x1b7dc
cmpl $0x1, %eax
jne 0x1b808
leaq -0x88(%rbp), %r12
movb $0x1, 0xb(%r12)
movl $0xffff, %r13d          # imm = 0xFFFF
andl %r13d, %ecx
movq %r14, %rsi
movq %r12, %rdx
callq 0x16430
movq 0x8(%rbx), %rdi
andl %r13d, %r15d
movq %r14, %rsi
movq %r12, %rdx
movl %r15d, %ecx
jmp 0x1b84b
leaq 0x177d2(%rip), %rdx     # 0x32fd2
movq %r15, %rsi
callq *0x58(%rdi)
jmp 0x1b850
testl $0xfffffffd, %eax       # imm = 0xFFFFFFFD
jne 0x1b8c7
leaq -0x88(%rbp), %r12
jmp 0x1b832
cmpl $0x2, %eax
jne 0x1b8e6
leaq -0x88(%rbp), %r12
movb $0x1, 0xb(%r12)
movq %r14, %rsi
movq %r12, %rdx
callq 0x1647a
movq 0x8(%rbx), %rdi
movzwl %r15w, %ecx
movq %r14, %rsi
movq %r12, %rdx
callq 0x16430
leaq -0x88(%rbp), %rsi
movq %rbx, %rdi
callq 0x181fc
addq $0x68, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0x15f05(%rip), %rdi     # 0x3177a
jmp 0x1b890
leaq 0x1bd76(%rip), %rdi     # 0x375f4
jmp 0x1b890
leaq 0x1746a(%rip), %rdi     # 0x32cf1
jmp 0x1b890
leaq 0x176e2(%rip), %rdi     # 0x32f72
leaq 0x173fd(%rip), %rsi     # 0x32c94
leaq 0x18313(%rip), %rcx     # 0x33bb1
movl $0x837, %edx            # imm = 0x837
callq 0xa0b0
leaq 0x13ae5(%rip), %rdi     # 0x2f394
leaq 0x173de(%rip), %rsi     # 0x32c94
leaq 0x182f4(%rip), %rcx     # 0x33bb1
movl $0x89a, %edx            # imm = 0x89A
callq 0xa0b0
leaq 0x13ac6(%rip), %rdi     # 0x2f394
leaq 0x173bf(%rip), %rsi     # 0x32c94
leaq 0x182d5(%rip), %rcx     # 0x33bb1
movl $0x88d, %edx            # imm = 0x88D
callq 0xa0b0
leaq 0x13aa7(%rip), %rdi     # 0x2f394
leaq 0x173a0(%rip), %rsi     # 0x32c94
leaq 0x182b6(%rip), %rcx     # 0x33bb1
movl $0x868, %edx            # imm = 0x868
callq 0xa0b0