// File: /workspace/github_c_makefile_star2_O2/mjosaarinen[P]brutus/crypto_aead/aezv3/ref/rijndael-alg-fst.c
// Function: rijndaelEncryptRound
void rijndaelEncryptRound(const u32 rk[/*4*(Nr + 1)*/], int Nr, u8 block[16], int rounds) {
	int r;
	u32 s0, s1, s2, s3, t0, t1, t2, t3;

    /*
	 * map byte array block to cipher state
	 * and add initial round key:
	 */
	s0 = GETU32(block     ) ^ rk[0];
	s1 = GETU32(block +  4) ^ rk[1];
	s2 = GETU32(block +  8) ^ rk[2];
	s3 = GETU32(block + 12) ^ rk[3];
    rk += 4;

    /*
	 * Nr - 1 full rounds:
	 */
	for (r = (rounds < Nr ? rounds : Nr - 1); r > 0; r--) {
		t0 =
			Te0[(s0 >> 24)       ] ^
			Te1[(s1 >> 16) & 0xff] ^
			Te2[(s2 >>  8) & 0xff] ^
			Te3[(s3      ) & 0xff] ^
			rk[0];
		t1 =
			Te0[(s1 >> 24)       ] ^
			Te1[(s2 >> 16) & 0xff] ^
			Te2[(s3 >>  8) & 0xff] ^
			Te3[(s0      ) & 0xff] ^
			rk[1];
		t2 =
			Te0[(s2 >> 24)       ] ^
			Te1[(s3 >> 16) & 0xff] ^
			Te2[(s0 >>  8) & 0xff] ^
			Te3[(s1      ) & 0xff] ^
			rk[2];
		t3 =
			Te0[(s3 >> 24)       ] ^
			Te1[(s0 >> 16) & 0xff] ^
			Te2[(s1 >>  8) & 0xff] ^
			Te3[(s2      ) & 0xff] ^
			rk[3];

		s0 = t0;
		s1 = t1;
		s2 = t2;
		s3 = t3;
		rk += 4;

    }

    /*
	 * apply last round and
	 * map cipher state to byte array block:
	 */
	if (rounds == Nr) {
    	t0 =
    		(Te4[(s0 >> 24)       ] & 0xff000000) ^
    		(Te4[(s1 >> 16) & 0xff] & 0x00ff0000) ^
    		(Te4[(s2 >>  8) & 0xff] & 0x0000ff00) ^
    		(Te4[(s3      ) & 0xff] & 0x000000ff) ^
    		rk[0];
    	t1 =
    		(Te4[(s1 >> 24)       ] & 0xff000000) ^
    		(Te4[(s2 >> 16) & 0xff] & 0x00ff0000) ^
    		(Te4[(s3 >>  8) & 0xff] & 0x0000ff00) ^
    		(Te4[(s0      ) & 0xff] & 0x000000ff) ^
    		rk[1];
    	t2 =
    		(Te4[(s2 >> 24)       ] & 0xff000000) ^
    		(Te4[(s3 >> 16) & 0xff] & 0x00ff0000) ^
    		(Te4[(s0 >>  8) & 0xff] & 0x0000ff00) ^
    		(Te4[(s1      ) & 0xff] & 0x000000ff) ^
    		rk[2];
    	t3 =
    		(Te4[(s3 >> 24)       ] & 0xff000000) ^
    		(Te4[(s0 >> 16) & 0xff] & 0x00ff0000) ^
    		(Te4[(s1 >>  8) & 0xff] & 0x0000ff00) ^
    		(Te4[(s2      ) & 0xff] & 0x000000ff) ^
    		rk[3];
		
		s0 = t0;
		s1 = t1;
		s2 = t2;
		s3 = t3;
	}

	PUTU32(block     , s0);
	PUTU32(block +  4, s1);
	PUTU32(block +  8, s2);
	PUTU32(block + 12, s3);
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movzbl (%rdx), %eax
movzbl 0x1(%rdx), %r8d
vmovd %r8d, %xmm0
vpinsrb $0x4, 0x4(%rdx), %xmm0, %xmm0
vpinsrb $0x8, 0x9(%rdx), %xmm0, %xmm0
vpinsrb $0xc, 0xc(%rdx), %xmm0, %xmm0
movzbl 0x3(%rdx), %r8d
vpsllvd 0xb38(%rip), %xmm0, %xmm0 # 0x4010
vmovd %eax, %xmm1
vpinsrb $0x4, 0x5(%rdx), %xmm1, %xmm1
vpinsrb $0x8, 0x8(%rdx), %xmm1, %xmm1
vpinsrb $0xc, 0xd(%rdx), %xmm1, %xmm1
vpsllvd 0xb26(%rip), %xmm1, %xmm1 # 0x4020
movzbl 0x2(%rdx), %eax
vmovd %eax, %xmm2
vpinsrb $0x1, 0x6(%rdx), %xmm2, %xmm2
vpinsrb $0x2, 0xa(%rdx), %xmm2, %xmm2
vpinsrb $0x3, 0xe(%rdx), %xmm2, %xmm2
vpshufb 0xb10(%rip), %xmm2, %xmm2 # 0x4030
vpternlogd $0xfe, %xmm0, %xmm1, %xmm2
vmovd %r8d, %xmm0
vpinsrb $0x4, 0x7(%rdx), %xmm0, %xmm0
vpinsrb $0x8, 0xb(%rdx), %xmm0, %xmm0
movq %rdx, -0x8(%rsp)
vpinsrb $0xc, 0xf(%rdx), %xmm0, %xmm0
vpternlogd $0x56, (%rdi), %xmm2, %xmm0
leal -0x1(%rsi), %edx
movq %rsi, -0x18(%rsp)
cmpl %esi, %ecx
movl %ecx, -0x10(%rsp)
cmovll %ecx, %edx
addq $0x10, %rdi
leaq 0x1f67(%rip), %rsi      # 0x54d0
movl $0x3fc, %ebp            # imm = 0x3FC
leaq 0x235b(%rip), %r14      # 0x58d0
movl $0xff, %r15d
leaq 0x274e(%rip), %r12      # 0x5cd0
leaq 0x2b47(%rip), %rcx      # 0x60d0
vpextrd $0x1, %xmm0, %r13d
vmovd %xmm0, %r10d
vpextrd $0x2, %xmm0, %r11d
vpextrd $0x3, %xmm0, %r9d
testl %edx, %edx
jle 0x369e
movl %r10d, %ebx
movl %r13d, %r8d
shrl $0xe, %r8d
andl %ebp, %r8d
movl %r11d, %eax
shrl $0xe, %eax
andl %ebp, %eax
vmovd (%r8,%r14), %xmm0
vpinsrd $0x1, (%rax,%r14), %xmm0, %xmm0
shrl $0x18, %ebx
movl %r10d, %eax
movl %r9d, %r8d
shrl $0xe, %r8d
andl %ebp, %r8d
vpinsrd $0x2, (%r8,%r14), %xmm0, %xmm0
movl %r10d, %r8d
shrl $0xe, %r10d
andl %ebp, %r10d
vpinsrd $0x3, (%r10,%r14), %xmm0, %xmm1
movl %r9d, %r10d
vmovd (%rsi,%rbx,4), %xmm0
movl %r13d, %ebx
shrl $0x18, %ebx
vpinsrd $0x1, (%rsi,%rbx,4), %xmm0, %xmm0
movl %r11d, %ebx
shrl $0x18, %ebx
vpinsrd $0x2, (%rsi,%rbx,4), %xmm0, %xmm0
movl %r9d, %ebx
shrl $0x18, %r9d
vpinsrd $0x3, (%rsi,%r9,4), %xmm0, %xmm2
movl %r11d, %r9d
shrl $0x8, %r9d
andl %r15d, %r9d
vmovd (%r12,%r9,4), %xmm0
shrl $0x8, %ebx
andl %r15d, %ebx
vpinsrd $0x1, (%r12,%rbx,4), %xmm0, %xmm0
shrl $0x8, %r8d
andl %r15d, %r8d
vpinsrd $0x2, (%r12,%r8,4), %xmm0, %xmm0
movl %r13d, %r8d
shrl $0x8, %r13d
andl %r15d, %r13d
vpinsrd $0x3, (%r12,%r13,4), %xmm0, %xmm3
andl %r15d, %r10d
vmovd (%rcx,%r10,4), %xmm0
andl %r15d, %eax
vpinsrd $0x1, (%rcx,%rax,4), %xmm0, %xmm0
andl %r15d, %r8d
vpinsrd $0x2, (%rcx,%r8,4), %xmm0, %xmm0
andl %r15d, %r11d
vpinsrd $0x3, (%rcx,%r11,4), %xmm0, %xmm0
vpternlogd $0x96, %xmm2, %xmm1, %xmm3
vpternlogd $0x96, (%rdi), %xmm3, %xmm0
decl %edx
addq $0x10, %rdi
jmp 0x3589
movq -0x18(%rsp), %rax
cmpl %eax, -0x10(%rsp)
jne 0x37dd
movl %r10d, %eax
movq %rax, -0x10(%rsp)
leaq 0x9e4(%rip), %rbx       # 0x40a0
movl %r13d, %r8d
shrl $0xe, %r8d
movl $0x3fc, %esi            # imm = 0x3FC
andl %esi, %r8d
movl %r11d, %r14d
shrl $0x8, %r14d
movl $0xff, %ebp
andl %ebp, %r14d
movl %r9d, %eax
andl %ebp, %eax
movq %rax, -0x18(%rsp)
movl %r11d, %r15d
shrl $0xe, %r15d
andl %esi, %r15d
movl %r10d, %r12d
movl %r9d, %ecx
shrl $0xe, %ecx
andl %esi, %ecx
vmovd (%r8,%rbx), %xmm0
movl %r10d, %edx
shrl $0xe, %r10d
andl %esi, %r10d
movl %r13d, %r8d
shrl $0x18, %r8d
vpinsrd $0x1, (%rbx,%r8,4), %xmm0, %xmm0
movl %r9d, %r8d
shrl $0x8, %r8d
andl %ebp, %r8d
andl %ebp, %r12d
shrl $0x8, %edx
andl %ebp, %edx
movl %r13d, %esi
andl %ebp, %esi
shrl $0x8, %r13d
andl %ebp, %r13d
movl %r11d, %eax
andl %ebp, %r11d
vpinsrd $0x2, (%rcx,%rbx), %xmm0, %xmm0
shrl $0x18, %r9d
vpinsrd $0x3, (%rbx,%r9,4), %xmm0, %xmm0
movq -0x10(%rsp), %rcx
shrl $0x18, %ecx
vmovd (%rbx,%rcx,4), %xmm1
vpinsrd $0x1, (%r15,%rbx), %xmm1, %xmm1
shrl $0x18, %eax
vpinsrd $0x2, (%rbx,%rax,4), %xmm1, %xmm1
vpinsrd $0x3, (%r10,%rbx), %xmm1, %xmm1
vmovd (%rbx,%r14,4), %xmm2
vpinsrd $0x1, (%rbx,%r8,4), %xmm2, %xmm2
vpinsrd $0x2, (%rbx,%rdx,4), %xmm2, %xmm2
vpinsrd $0x3, (%rbx,%r13,4), %xmm2, %xmm2
movq -0x18(%rsp), %rax
vmovd (%rbx,%rax,4), %xmm3
vpinsrd $0x1, (%rbx,%r12,4), %xmm3, %xmm3
vpinsrd $0x2, (%rbx,%rsi,4), %xmm3, %xmm3
vpinsrd $0x3, (%rbx,%r11,4), %xmm3, %xmm3
vpandq 0x8ca(%rip){1to2}, %xmm1, %xmm1 # 0x4080
vpternlogq $0xf8, 0x8c7(%rip){1to2}, %xmm0, %xmm1 # 0x4088
vpternlogd $0xec, 0x8c4(%rip){1to4}, %xmm1, %xmm2 # 0x4090
vpandd 0x8be(%rip){1to4}, %xmm3, %xmm0 # 0x4094
vpternlogd $0x56, (%rdi), %xmm2, %xmm0
vmovd %xmm0, %eax
movl %eax, %ecx
shrl $0x18, %ecx
movq -0x8(%rsp), %rdx
movb %cl, (%rdx)
movl %eax, %ecx
shrl $0x10, %ecx
movb %cl, 0x1(%rdx)
movb %ah, 0x2(%rdx)
movb %al, 0x3(%rdx)
vpextrd $0x1, %xmm0, %eax
movl %eax, %ecx
shrl $0x18, %ecx
movb %cl, 0x4(%rdx)
movl %eax, %ecx
shrl $0x10, %ecx
movb %cl, 0x5(%rdx)
movb %ah, 0x6(%rdx)
movb %al, 0x7(%rdx)
vpextrd $0x2, %xmm0, %eax
movl %eax, %ecx
shrl $0x18, %ecx
movb %cl, 0x8(%rdx)
movl %eax, %ecx
shrl $0x10, %ecx
movb %cl, 0x9(%rdx)
movb %ah, 0xa(%rdx)
movb %al, 0xb(%rdx)
vpextrd $0x3, %xmm0, %eax
movl %eax, %ecx
shrl $0x18, %ecx
movb %cl, 0xc(%rdx)
movl %eax, %ecx
shrl $0x10, %ecx
movb %cl, 0xd(%rdx)
movb %ah, 0xe(%rdx)
movb %al, 0xf(%rdx)
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq