// File: /workspace/github_c_makefile_star2_O0/enzo1982[P]smooth/libraries/libcpuid/recog_intel.c
// Function: decode_intel_sgx_features
static void decode_intel_sgx_features(const struct cpu_raw_data_t* raw, struct cpu_id_t* data)
{
	struct cpu_epc_t epc;
	int i;

	if (raw->basic_cpuid[0][EAX] < 0x12) return; // no 12h leaf
	if (raw->basic_cpuid[0x12][EAX] == 0) return; // no sub-leafs available, probably it's disabled by BIOS

	// decode sub-leaf 0:
	if (raw->basic_cpuid[0x12][EAX] & 1) data->sgx.flags[INTEL_SGX1] = 1;
	if (raw->basic_cpuid[0x12][EAX] & 2) data->sgx.flags[INTEL_SGX2] = 1;
	if (data->sgx.flags[INTEL_SGX1] || data->sgx.flags[INTEL_SGX2])
		data->sgx.present = 1;
	data->sgx.misc_select = raw->basic_cpuid[0x12][EBX];
	data->sgx.max_enclave_32bit = (raw->basic_cpuid[0x12][EDX]     ) & 0xff;
	data->sgx.max_enclave_64bit = (raw->basic_cpuid[0x12][EDX] >> 8) & 0xff;

	// decode sub-leaf 1:
	data->sgx.secs_attributes = raw->intel_fn12h[1][EAX] | (((uint64_t) raw->intel_fn12h[1][EBX]) << 32);
	data->sgx.secs_xfrm       = raw->intel_fn12h[1][ECX] | (((uint64_t) raw->intel_fn12h[1][EDX]) << 32);

	// decode higher-order subleafs, whenever present:
	data->sgx.num_epc_sections = -1;
	for (i = 0; i < 1000000; i++) {
		epc = cpuid_get_epc(i, raw);
		if (epc.length == 0) {
			debugf(2, "SGX: epc section request for %d returned null, no more EPC sections.\n", i);
			data->sgx.num_epc_sections = i;
			break;
		}
	}
	if (data->sgx.num_epc_sections == -1) {
		debugf(1, "SGX: warning: seems to be infinitude of EPC sections.\n");
		data->sgx.num_epc_sections = 1000000;
	}
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x40, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
movq -0x8(%rbp), %rax
cmpl $0x12, (%rax)
jae 0x13a12e
jmp 0x13a2ee
movq -0x8(%rbp), %rax
cmpl $0x0, 0x120(%rax)
jne 0x13a140
jmp 0x13a2ee
movq -0x8(%rbp), %rax
movl 0x120(%rax), %eax
andl $0x1, %eax
cmpl $0x0, %eax
je 0x13a15d
movq -0x10(%rbp), %rax
movb $0x1, 0x1ae(%rax)
movq -0x8(%rbp), %rax
movl 0x120(%rax), %eax
andl $0x2, %eax
cmpl $0x0, %eax
je 0x13a17a
movq -0x10(%rbp), %rax
movb $0x1, 0x1af(%rax)
movq -0x10(%rbp), %rax
movzbl 0x1ae(%rax), %eax
cmpl $0x0, %eax
jne 0x13a19a
movq -0x10(%rbp), %rax
movzbl 0x1af(%rax), %eax
cmpl $0x0, %eax
je 0x13a1a8
movq -0x10(%rbp), %rax
movl $0x1, 0x1a8(%rax)
movq -0x8(%rbp), %rax
movl 0x124(%rax), %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x1c0(%rax)
movq -0x8(%rbp), %rax
movl 0x12c(%rax), %eax
andl $0xff, %eax
movb %al, %cl
movq -0x10(%rbp), %rax
movb %cl, 0x1ac(%rax)
movq -0x8(%rbp), %rax
movl 0x12c(%rax), %eax
shrl $0x8, %eax
andl $0xff, %eax
movb %al, %cl
movq -0x10(%rbp), %rax
movb %cl, 0x1ad(%rax)
movq -0x8(%rbp), %rax
movl 0x4d0(%rax), %eax
movl %eax, %ecx
movq -0x8(%rbp), %rax
movl 0x4d4(%rax), %eax
shlq $0x20, %rax
orq %rax, %rcx
movq -0x10(%rbp), %rax
movq %rcx, 0x1c8(%rax)
movq -0x8(%rbp), %rax
movl 0x4d8(%rax), %eax
movl %eax, %ecx
movq -0x8(%rbp), %rax
movl 0x4dc(%rax), %eax
shlq $0x20, %rax
orq %rax, %rcx
movq -0x10(%rbp), %rax
movq %rcx, 0x1d0(%rax)
movq -0x10(%rbp), %rax
movl $0xffffffff, 0x1bc(%rax) # imm = 0xFFFFFFFF
movl $0x0, -0x24(%rbp)
cmpl $0xf4240, -0x24(%rbp)   # imm = 0xF4240
jge 0x13a2c0
movl -0x24(%rbp), %edi
movq -0x8(%rbp), %rsi
callq 0x1384d0
movq %rax, -0x38(%rbp)
movq %rdx, -0x30(%rbp)
movq -0x38(%rbp), %rax
movq %rax, -0x20(%rbp)
movq -0x30(%rbp), %rax
movq %rax, -0x18(%rbp)
cmpq $0x0, -0x18(%rbp)
jne 0x13a2b3
movl -0x24(%rbp), %edx
movl $0x2, %edi
leaq 0x81df1(%rip), %rsi     # 0x1bc08e
movb $0x0, %al
callq 0x135780
movl -0x24(%rbp), %ecx
movq -0x10(%rbp), %rax
movl %ecx, 0x1bc(%rax)
jmp 0x13a2c0
jmp 0x13a2b5
movl -0x24(%rbp), %eax
addl $0x1, %eax
movl %eax, -0x24(%rbp)
jmp 0x13a25a
movq -0x10(%rbp), %rax
cmpl $-0x1, 0x1bc(%rax)
jne 0x13a2ee
movl $0x1, %edi
leaq 0x81dfb(%rip), %rsi     # 0x1bc0d4
movb $0x0, %al
callq 0x135780
movq -0x10(%rbp), %rax
movl $0xf4240, 0x1bc(%rax)   # imm = 0xF4240
addq $0x40, %rsp
popq %rbp
retq
nopw %cs:(%rax,%rax)