// File: /workspace/github_cpp_makefile_star2_O2/stacksmith[P]picoasm/cassembler.cpp
// Function: CAssembler::addInstruction(instrNumber, CSourceLine, int)
bool CAssembler::addInstruction( instrNumber instr, CSourceLine sourceLine, int offset )
{
	unsigned int address = sourceLine.m_address ;
	string s1 = sourceLine.getColumn( offset + 1 ) ;
	string s2 = sourceLine.getColumn( offset + 2 ) ;
	string s3 = sourceLine.getColumn( offset + 3 ) ;
	int line = sourceLine.m_lineNr ;
	
	uint32_t code ;
	string s ;
	bool b ;
	switch( instr ) {
		
	case ENABLE:
	case DISABLE:
		if ( toUpper( s1 ) != "INTERRUPT" ) {
			error( line , "'INTERRUPT' expected" ) ;
			return FALSE ;
		}
		if ( instr == ENABLE )
			code = instrENABLE_INTERRUPT ;
		else
			code = instrDISABLE_INTERRUPT ;
		
		break ;
	case RETURNI:
		if ( toUpper( s1 ) == "ENABLE" ) {
			code = instrRETURNI_ENABLE ;
		} else if ( toUpper( s1 ) == "DISABLE" ) {
			code = instrRETURNI_DISABLE ;
		} else {
			error( line , "'ENABLE' or 'DISABLE' expected" ) ;
		}
			
		break ;
	
	case CALL:
	case JUMP:
	case RETURN:
		b = TRUE ;
		if ( toUpper( s1 ) == "C" ) {
			switch( instr ) {
			case CALL    : code = instrCALLC ; break ;
			case JUMP    : code = instrJUMPC ; break ;
			case RETURN  : code = instrRETURNC ; break ;
			default: error( line , "'CALL', 'JUMP' or 'RETURN' expected" ) ; return FALSE ;
			}
		} else if ( toUpper( s1 ) == "NC" ) {
			switch( instr ) {
			case CALL    : code = instrCALLNC ; break ;
			case JUMP    : code = instrJUMPNC ; break ;
			case RETURN  : code = instrRETURNNC ; break ;
			default: error( line , "'CALL', 'JUMP' or 'RETURN' expected" ) ; return FALSE ;
			}
		} else if ( toUpper( s1 ) == "NZ" ) {
			switch( instr ) {
			case CALL    : code = instrCALLNZ ; break ;
			case JUMP    : code = instrJUMPNZ ; break ;
			case RETURN  : code = instrRETURNNZ ; break ;
			default: error( line , "'CALL', 'JUMP' or 'RETURN' expected" ) ; return FALSE ;
			}
		} else if ( toUpper( s1 ) == "Z" ) {
			switch( instr ) {
			case CALL    : code = instrCALLZ ; break ;
			case JUMP    : code = instrJUMPZ ; break ;
			case RETURN  : code = instrRETURNZ ; break ;
			default: error( line , "'CALL', 'JUMP' or 'RETURN' expected" ) ; return FALSE ;
			}
		} else {
			switch( instr ) {
			case CALL    : code = instrCALL ; break ;
			case JUMP    : code = instrJUMP ; break ;
			case RETURN  : code = instrRETURN ; break ;
			default: error( line , "'CALL', 'JUMP' or 'RETURN' expected" ) ; return FALSE ;
			}
			b = FALSE ;
		}
		
		
		if ( instr != RETURN ) {
			if ( b ) {
				if ( s2 != "," ) {
					error( line , "Comma expected" ) ;
					return FALSE ;
				}
				s = s3 ;
			} else
				s = s1 ;
		
			s = translateLabel( s )  ;
			int labelVal ;
		
			if ( sscanf( s.c_str(), "%d", &labelVal ) != 1 )  {
				error( line , "Invalid label" ) ;
				return FALSE ;
			}
		
			code |= labelVal ;
		}
		break ;
	default:
		int reg = getRegister( translateRegister( s1 ) ) ;
		if ( reg < 0 ) {
			error( line , "Registername expected" ) ;
			return FALSE ;
		}
		
		switch ( instr ) {
		case RL:	code = instrRL_SX | instrROTATE |( reg << 8 ) ; break ;
		case RR:	code = instrRR_SX | instrROTATE | ( reg << 8 ) ; break ;
		case SL0:	code = instrSL0_SX | instrROTATE | ( reg << 8 ) ; break ;
		case SL1:	code = instrSL1_SX | instrROTATE | ( reg << 8 ) ; break ;
		case SLA:	code = instrSLA_SX | instrROTATE | ( reg << 8 ) ; break ;
		case SLX:	code = instrSLX_SX | instrROTATE | ( reg << 8 ) ; break ;
		case SR0:	code = instrSR0_SX | instrROTATE | ( reg << 8 ) ; break ;
		case SR1:	code = instrSR1_SX | instrROTATE | ( reg << 8 ) ; break ;
		case SRA:	code = instrSRA_SX | instrROTATE | ( reg << 8 ) ; break ;
		case SRX:	code = instrSRX_SX | instrROTATE |( reg << 8 ) ; break ;
		default:
			if ( s2 != "," ) {
				error( line , "Comma expected" ) ;
				return FALSE ;
			}
			
			switch( instr ) {
			case STORE:
			case OUTPUT:
			case INPUT:
			case FETCH:
				if ( sourceLine.getColumn( offset + 3 ) == "(" ) {
					if ( !sourceLine.isColumn( offset + 5 ) || sourceLine.getColumn( offset + 5 ) != ")" ) {
						error( line , "')' expected" ) ;
						return FALSE ;
					}
				
					int reg2 = getRegister( translateRegister( sourceLine.getColumn( offset + 4 ) ) ) ;
					if ( reg2 < 0 ) {
						error( line , "Register expected" ) ;
						return FALSE ;
					}
					switch( instr ) {
						case STORE : code = instrSTORE_SX_SY | ( reg << 8 ) | (reg2 << 4) ; break ;
						case OUTPUT: code = instrOUTPUT_SX_SY | ( reg << 8 ) | (reg2 << 4) ; break ;
						case INPUT : code = instrINPUT_SX_SY | ( reg << 8 ) | (reg2 << 4) ; break ;
						case FETCH : code = instrFETCH_SX_SY | ( reg << 8 ) | (reg2 << 4) ; break ;
						default: error( line , "'STORE', 'OUTPUT', 'INPUT' or 'FETCH' expected" ) ; return FALSE ;
					}
				} else {
				
					unsigned int value ;
					if ( sscanf( translateConstant( s3 ).c_str(), "%X", &value ) != 1 ) {
						error( line , "Value expected" ) ;
						return FALSE ;
					}
					
					switch( instr ) {
						case STORE : code = instrSTORE_SX_SS | ( reg << 8 ) | value ; break ;
						case OUTPUT: code = instrOUTPUT_SX_PP | ( reg << 8 ) | value ; break ;
						case INPUT : code = instrINPUT_SX_PP | ( reg << 8 ) | value ; break ;
						case FETCH : code = instrFETCH_SX_SS | ( reg << 8 ) | value ; break ;
						default: error( line , "'STORE', 'OUTPUT', 'INPUT' or 'FETCH' expected" ) ; return FALSE ;
					}
				}
				break ;
			default:
				int reg2 = getRegister( translateRegister( s3 ) ) ;
		
				if ( reg2 < 0 ) {
					unsigned int value ;
					if ( sscanf( translateConstant( s3 ).c_str(), "%X", &value ) != 1 ) {
						error( line , "Value expected" ) ;
						return FALSE ;
					}
					switch( instr ) {
					case ADD     : code = instrADD_SX_KK | ( reg << 8 ) | ( value ) ; break ;
					case ADDCY   : code = instrADDCY_SX_KK | ( reg << 8 ) | ( value ) ; break ;
					case AND     : code = instrAND_SX_KK | ( reg << 8 ) | ( value ) ; break ;
					case COMPARE : code = instrCOMPARE_SX_KK | ( reg << 8 ) | ( value ) ; break ;
					case LOAD    : code = instrLOAD_SX_KK | ( reg << 8 ) | ( value ) ; break ;
					case OR      : code = instrOR_SX_KK | ( reg << 8 ) | ( value ) ; break ;
					case SUB     : code = instrSUB_SX_KK | ( reg << 8 ) | ( value ) ; break ;
					case SUBCY   : code = instrSUBCY_SX_KK | ( reg << 8 ) | ( value ) ; break ;
					case TEST    : code = instrTEST_SX_KK | ( reg << 8 ) | ( value ) ; break ;
					case XOR     : code = instrXOR_SX_KK | ( reg << 8 ) | ( value ) ; break ;
					default      : error( line , "Unknown instruction" )  ; return FALSE ;
					}
				} else {
				  
					switch( instr ) {
					case ADD    : code = instrADD_SX_SY | ( reg << 8 ) | ( reg2  << 4 ) ; break ;
					case ADDCY  : code = instrADDCY_SX_SY | ( reg << 8 ) | ( reg2 << 4 ) ; break ;
					case AND    : code = instrAND_SX_SY | ( reg << 8 ) | (  reg2 << 4 ) ; break  ;
					case COMPARE: code = instrCOMPARE_SX_SY | ( reg << 8 ) | ( reg2 << 4 ) ; break ;
					case LOAD   : code = instrLOAD_SX_SY | ( reg << 8 ) | ( reg2 << 4 ) ; break ;
					case OR     : code = instrOR_SX_SY | ( reg << 8 ) | ( reg2 << 4 ) ; break ;
					case SUB    : code = instrSUB_SX_SY | ( reg << 8 ) | ( reg2 << 4 ) ; break ;
					case SUBCY  : code = instrSUBCY_SX_SY | ( reg << 8 ) | ( reg2 << 4 ) ; break ;
					case TEST   : code = instrTEST_SX_SY | ( reg << 8 ) | ( reg2 << 4 ) ; break ;
					case XOR    : code = instrXOR_SX_SY | ( reg << 8 ) | ( reg2 << 4 ) ; break ;
					default     : error( line , "Unknown instruction" ) ; return FALSE ;
					}	
				}
			}
		}
	}

	
	m_code->setInstruction( address, code, line ) ;
	
	return TRUE ;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x2c8, %rsp            # imm = 0x2C8
movl %ecx, %r13d
movq %rdx, %r14
movl %esi, %r12d
movq %rdi, -0x40(%rbp)
movl 0x20(%rdx), %ebx
leal 0x1(%r13), %edx
leaq -0x88(%rbp), %rdi
movq %r14, %rsi
callq 0x407856
leal 0x2(%r13), %edx
leaq -0xf0(%rbp), %rdi
movq %r14, %rsi
callq 0x407856
movl %ebx, -0x64(%rbp)
leal 0x3(%r13), %ebx
leaq -0xd0(%rbp), %rdi
movq %r14, %rsi
movl %ebx, %edx
callq 0x407856
movl (%r14), %r15d
leaq -0xa0(%rbp), %rax
movq %rax, -0x10(%rax)
andq $0x0, -0x8(%rax)
movb $0x0, (%rax)
cmpl $0xe, %r12d
ja 0x406188
movl $0x2208, %eax           # imm = 0x2208
btl %r12d, %eax
jb 0x405fbc
pushq $0x60
popq %rax
btl %r12d, %eax
jae 0x40603b
leaq -0x290(%rbp), %rdi
leaq -0x88(%rbp), %rsi
callq 0x47e0a0
leaq -0x60(%rbp), %rdi
leaq -0x290(%rbp), %rsi
callq 0x405208
leaq 0x17b90d(%rip), %rsi    # 0x581891
leaq -0x60(%rbp), %rbx
movq %rbx, %rdi
callq 0x4078a9
movl %eax, %r14d
movq %rbx, %rdi
callq 0x47b9c0
leaq -0x290(%rbp), %rdi
callq 0x47b9c0
testb %r14b, %r14b
je 0x40622d
leaq 0x17b6b3(%rip), %rdx    # 0x58166a
jmp 0x4064d5
leaq -0x230(%rbp), %rdi
leaq -0x88(%rbp), %rsi
callq 0x47e0a0
leaq -0x60(%rbp), %rdi
leaq -0x230(%rbp), %rsi
callq 0x405208
leaq 0x17b904(%rip), %rsi    # 0x5818ea
leaq -0x60(%rbp), %rbx
movq %rbx, %rdi
callq 0x407845
movl %eax, %r14d
movq %rbx, %rdi
callq 0x47b9c0
leaq -0x230(%rbp), %rdi
callq 0x47b9c0
testb %r14b, %r14b
je 0x40610d
cmpl $0x3, %r12d
je 0x4062c9
cmpl $0x9, %r12d
je 0x4062be
cmpl $0xd, %r12d
movl $0x2b800, %r12d         # imm = 0x2B800
je 0x406566
jmp 0x40639d
cmpl $0xe, %r12d
jne 0x406188
leaq -0x270(%rbp), %rdi
leaq -0x88(%rbp), %rsi
callq 0x47e0a0
leaq -0x60(%rbp), %rdi
leaq -0x270(%rbp), %rsi
callq 0x405208
leaq 0x17b8b2(%rip), %rsi    # 0x581921
leaq -0x60(%rbp), %rbx
movq %rbx, %rdi
callq 0x407845
movl %eax, %r14d
movq %rbx, %rdi
callq 0x47b9c0
leaq -0x270(%rbp), %rdi
callq 0x47b9c0
movl $0x38001, %r12d         # imm = 0x38001
testb %r14b, %r14b
jne 0x406566
leaq -0x250(%rbp), %rdi
leaq -0x88(%rbp), %rsi
callq 0x47e0a0
leaq -0x60(%rbp), %rdi
leaq -0x250(%rbp), %rsi
callq 0x405208
leaq 0x17b846(%rip), %rsi    # 0x581911
movq %rbx, %rdi
callq 0x407845
movl %eax, %r14d
movq %rbx, %rdi
callq 0x47b9c0
leaq -0x250(%rbp), %rdi
callq 0x47b9c0
movl $0x38000, %r12d         # imm = 0x38000
testb %r14b, %r14b
jne 0x406566
leaq 0x17b57f(%rip), %rdx    # 0x58167f
movl %r15d, %esi
callq 0x405312
jmp 0x406566
leaq -0x210(%rbp), %rdi
leaq -0x88(%rbp), %rsi
callq 0x47e0a0
leaq -0x60(%rbp), %rdi
leaq -0x210(%rbp), %rsi
callq 0x405208
leaq 0x17b7bc(%rip), %rsi    # 0x5818f3
movq %rbx, %rdi
callq 0x407845
movl %eax, %r14d
movq %rbx, %rdi
callq 0x47b9c0
leaq -0x210(%rbp), %rdi
callq 0x47b9c0
testb %r14b, %r14b
je 0x406247
cmpl $0x3, %r12d
je 0x40636d
cmpl $0x9, %r12d
je 0x406362
cmpl $0xd, %r12d
movl $0x2bc00, %r12d         # imm = 0x2BC00
jne 0x40639d
jmp 0x406566
leaq -0x190(%rbp), %rdi
leaq -0x88(%rbp), %rsi
callq 0x47e0a0
movq %r12, -0x90(%rbp)
movl %r15d, -0x34(%rbp)
leaq -0x2f0(%rbp), %rdi
leaq -0x190(%rbp), %rdx
movq -0x40(%rbp), %rsi
callq 0x405da0
leaq -0x2f0(%rbp), %r15
movq %r15, %rsi
callq 0x405366
movl %eax, %r12d
movq %r15, %rdi
callq 0x47b9c0
leaq -0x190(%rbp), %rdi
callq 0x47b9c0
movl %r12d, -0x2c(%rbp)
testl %r12d, %r12d
js 0x4062d4
movq -0x90(%rbp), %r12
leal -0x10(%r12), %eax
cmpl $0x9, %eax
ja 0x40645f
leaq 0x17b1dc(%rip), %rcx    # 0x5813e8
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
movl -0x34(%rbp), %r15d
jmpq *%rax
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl $0x20002, %r12d         # imm = 0x20002
jmp 0x406566
cmpl $0x6, %r12d
movl $0x0, %r12d
sete %r12b
orl $0x3c000, %r12d         # imm = 0x3C000
jmp 0x406566
leaq -0x1f0(%rbp), %rdi
leaq -0x88(%rbp), %rsi
callq 0x47e0a0
leaq -0x60(%rbp), %rdi
leaq -0x1f0(%rbp), %rsi
callq 0x405208
leaq 0x17b68c(%rip), %rsi    # 0x5818fd
movq %rbx, %rdi
callq 0x407845
movl %eax, %r14d
movq %rbx, %rdi
callq 0x47b9c0
leaq -0x1f0(%rbp), %rdi
callq 0x47b9c0
testb %r14b, %r14b
je 0x4062ef
cmpl $0x3, %r12d
je 0x4063b4
cmpl $0x9, %r12d
je 0x4063a9
cmpl $0xd, %r12d
movl $0x2b400, %r12d         # imm = 0x2B400
jne 0x40639d
jmp 0x406566
movl $0x35800, %r12d         # imm = 0x35800
jmp 0x4064b7
movl $0x31800, %r12d         # imm = 0x31800
jmp 0x4064b7
leaq 0x17b3f5(%rip), %rbx    # 0x5816d0
movl -0x34(%rbp), %r15d
movl %r15d, %esi
movq %rbx, %rdx
callq 0x405312
jmp 0x4064dd
leaq -0x1d0(%rbp), %rdi
leaq -0x88(%rbp), %rsi
callq 0x47e0a0
leaq -0x60(%rbp), %rdi
leaq -0x1d0(%rbp), %rsi
callq 0x405208
leaq 0x17b5ee(%rip), %rsi    # 0x581907
movq %rbx, %rdi
callq 0x407845
movl %eax, %r14d
movq %rbx, %rdi
callq 0x47b9c0
leaq -0x1d0(%rbp), %rdi
callq 0x47b9c0
testb %r14b, %r14b
je 0x406378
cmpl $0x3, %r12d
je 0x4064b1
cmpl $0x9, %r12d
je 0x40649e
cmpl $0xd, %r12d
movl $0x2b000, %r12d         # imm = 0x2B000
jne 0x40639d
jmp 0x406566
movl $0x35c00, %r12d         # imm = 0x35C00
jmp 0x4064b7
movl $0x31c00, %r12d         # imm = 0x31C00
jmp 0x4064b7
cmpl $0x3, %r12d
je 0x4065da
cmpl $0xd, %r12d
je 0x4064a6
cmpl $0x9, %r12d
jne 0x40639d
movl $0x34000, %r12d         # imm = 0x34000
jmp 0x4065e0
leaq 0x17b2fa(%rip), %rdx    # 0x58169e
jmp 0x4064d5
movl $0x35400, %r12d         # imm = 0x35400
jmp 0x4064b7
movl $0x31400, %r12d         # imm = 0x31400
jmp 0x4064b7
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl $0x20000, %r12d         # imm = 0x20000
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl $0x2000a, %r12d         # imm = 0x2000A
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl $0x20006, %r12d         # imm = 0x20006
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl $0x20007, %r12d         # imm = 0x20007
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl $0x2000f, %r12d         # imm = 0x2000F
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl $0x2000c, %r12d         # imm = 0x2000C
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl $0x20004, %r12d         # imm = 0x20004
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl $0x2000e, %r12d         # imm = 0x2000E
jmp 0x406566
leaq 0x17b0ea(%rip), %rsi    # 0x581550
leaq -0xf0(%rbp), %rdi
callq 0x4078a9
testb %al, %al
movl -0x34(%rbp), %r15d
je 0x4065f8
leaq 0x17b0cd(%rip), %rbx    # 0x581552
jmp 0x4062df
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl $0x20008, %r12d         # imm = 0x20008
jmp 0x406566
movl $0x35000, %r12d         # imm = 0x35000
jmp 0x4064b7
movl $0x2a000, %r12d         # imm = 0x2A000
jmp 0x406566
movl $0x31000, %r12d         # imm = 0x31000
leaq 0x17b092(%rip), %rsi    # 0x581550
leaq -0xf0(%rbp), %rdi
callq 0x4078a9
testb %al, %al
je 0x4064e4
leaq 0x17b07d(%rip), %rdx    # 0x581552
movl %r15d, %esi
callq 0x405312
xorl %ebx, %ebx
jmp 0x406582
leaq -0xb0(%rbp), %rdi
leaq -0xd0(%rbp), %rsi
callq 0x47b5f0
leaq -0x1b0(%rbp), %rdi
leaq -0xb0(%rbp), %rsi
callq 0x47e0a0
leaq -0x60(%rbp), %rdi
leaq -0x1b0(%rbp), %rdx
movq -0x40(%rbp), %rsi
callq 0x405e60
leaq -0xb0(%rbp), %rbx
leaq -0x60(%rbp), %r14
movq %rbx, %rdi
movq %r14, %rsi
callq 0x47ba10
movq %r14, %rdi
callq 0x47b9c0
leaq -0x1b0(%rbp), %rdi
callq 0x47b9c0
movq (%rbx), %rdi
leaq 0x18ba22(%rip), %rsi    # 0x591f74
leaq -0x60(%rbp), %rdx
xorl %eax, %eax
callq 0x4d44b0
cmpl $0x1, %eax
jne 0x4065c6
orl -0x60(%rbp), %r12d
movq -0x40(%rbp), %rax
movq 0x80(%rax), %rdi
movb $0x1, %bl
movzwl -0x64(%rbp), %esi
movl %r12d, %edx
movl %r15d, %ecx
callq 0x40ad90
leaq -0xb0(%rbp), %rdi
callq 0x47b9c0
leaq -0xd0(%rbp), %rdi
callq 0x47b9c0
leaq -0xf0(%rbp), %rdi
callq 0x47b9c0
leaq -0x88(%rbp), %rdi
callq 0x47b9c0
movl %ebx, %eax
addq $0x2c8, %rsp            # imm = 0x2C8
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
leaq 0x17b0f5(%rip), %rdx    # 0x5816c2
movl %r15d, %esi
callq 0x405312
jmp 0x4064dd
movl $0x30000, %r12d         # imm = 0x30000
leaq -0xb0(%rbp), %rdi
leaq -0x88(%rbp), %rsi
callq 0x47b5f0
jmp 0x4064f7
cmpl $0x1a, %r12d
ja 0x4067d8
movl $0x4001180, %eax        # imm = 0x4001180
btl %r12d, %eax
jae 0x4067d8
leaq -0x60(%rbp), %rdi
movq %r14, %rsi
movl %ebx, %edx
callq 0x407856
leaq 0x17b1ec(%rip), %rsi    # 0x581812
leaq -0x60(%rbp), %rbx
movq %rbx, %rdi
callq 0x407845
movl %eax, %r15d
movq %rbx, %rdi
callq 0x47b9c0
testb %r15b, %r15b
je 0x406737
movq 0x10(%r14), %rax
subq 0x8(%r14), %rax
leal 0x5(%r13), %edx
sarq $0x5, %rax
leaq 0x17b089(%rip), %rbx    # 0x5816e6
cmpq %rdx, %rax
movl -0x34(%rbp), %r15d
jbe 0x4062df
leaq -0x60(%rbp), %rdi
movq %r14, %rsi
callq 0x407856
leaq 0x19d518(%rip), %rsi    # 0x5a3b95
leaq -0x60(%rbp), %rdi
callq 0x4078a9
movl %eax, %r15d
leaq -0x60(%rbp), %rdi
callq 0x47b9c0
testb %r15b, %r15b
movl -0x34(%rbp), %r15d
jne 0x4062df
addl $0x4, %r13d
leaq -0x170(%rbp), %rdi
movq %r14, %rsi
movl %r13d, %edx
callq 0x407856
leaq -0x2d0(%rbp), %rdi
leaq -0x170(%rbp), %rdx
movq -0x40(%rbp), %rsi
callq 0x405da0
leaq -0x2d0(%rbp), %r14
movq %r14, %rsi
callq 0x405366
movl %eax, %ebx
movq %r14, %rdi
callq 0x47b9c0
leaq -0x170(%rbp), %rdi
callq 0x47b9c0
testl %ebx, %ebx
js 0x40699f
cmpl $0x7, %r12d
je 0x406a2b
cmpl $0x8, %r12d
je 0x406a05
cmpl $0xc, %r12d
je 0x406a18
cmpl $0x1a, %r12d
jne 0x406a44
movl -0x2c(%rbp), %eax
shll $0x8, %eax
shll $0x4, %ebx
orl %eax, %ebx
orl $0x2f000, %ebx          # imm = 0x2F000
jmp 0x406a3c
leaq -0x150(%rbp), %rdi
leaq -0xd0(%rbp), %rsi
callq 0x47e0a0
movl -0x34(%rbp), %r15d
leaq -0x60(%rbp), %rdi
leaq -0x150(%rbp), %rdx
movq -0x40(%rbp), %rsi
callq 0x405e00
movq (%rbx), %rdi
leaq 0x17adae(%rip), %rsi    # 0x58151a
leaq -0x30(%rbp), %rdx
xorl %eax, %eax
callq 0x4d44b0
movl %eax, %r14d
movq %rbx, %rdi
callq 0x47b9c0
leaq -0x150(%rbp), %rdi
callq 0x47b9c0
cmpl $0x1, %r14d
jne 0x406863
cmpl $0x7, %r12d
je 0x40697b
cmpl $0x8, %r12d
je 0x40694b
cmpl $0xc, %r12d
je 0x406963
cmpl $0x1a, %r12d
jne 0x406993
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl -0x30(%rbp), %r12d
orl $0x2e000, %r12d         # imm = 0x2E000
jmp 0x406566
leaq -0x130(%rbp), %rdi
leaq -0xd0(%rbp), %rsi
callq 0x47e0a0
leaq -0x2b0(%rbp), %rdi
leaq -0x130(%rbp), %rdx
movq -0x40(%rbp), %rsi
callq 0x405da0
leaq -0x2b0(%rbp), %rbx
movq %rbx, %rsi
callq 0x405366
movl %eax, %r14d
movq %rbx, %rdi
callq 0x47b9c0
leaq -0x130(%rbp), %rdi
callq 0x47b9c0
testl %r14d, %r14d
js 0x406877
cmpl $0xb, %r12d
ja 0x406914
movl %r12d, %eax
leaq 0x17abcf(%rip), %rcx    # 0x581410
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl -0x2c(%rbp), %eax
shll $0x8, %eax
shll $0x4, %r14d
orl %eax, %r14d
orl $0x19000, %r14d         # imm = 0x19000
jmp 0x406b0c
leaq 0x17adbd(%rip), %rdx    # 0x581627
movl %r15d, %esi
callq 0x405312
jmp 0x4064dd
leaq -0x110(%rbp), %rdi
leaq -0xd0(%rbp), %rsi
callq 0x47e0a0
leaq -0x60(%rbp), %rdi
leaq -0x110(%rbp), %rdx
movq -0x40(%rbp), %rsi
callq 0x405e00
leaq -0x60(%rbp), %rbx
movq (%rbx), %rdi
leaq 0x17ac6e(%rip), %rsi    # 0x58151a
leaq -0x30(%rbp), %rdx
xorl %eax, %eax
callq 0x4d44b0
movl %eax, %r14d
movq %rbx, %rdi
callq 0x47b9c0
leaq -0x110(%rbp), %rdi
callq 0x47b9c0
cmpl $0x1, %r14d
jne 0x4069ab
leaq 0x17ae55(%rip), %rdx    # 0x581734
cmpl $0xb, %r12d
ja 0x4069bf
movl %r12d, %eax
leaq 0x17ab5d(%rip), %rcx    # 0x581450
movslq (%rcx,%rax,4), %rax
addq %rcx, %rax
jmpq *%rax
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl -0x30(%rbp), %r12d
orl $0x18000, %r12d         # imm = 0x18000
jmp 0x406566
addl $-0x1b, %r12d
cmpl $0x3, %r12d
ja 0x4069f1
leaq 0x17ab17(%rip), %rax    # 0x581440
movslq (%rax,%r12,4), %rcx
addq %rax, %rcx
jmpq *%rcx
movl -0x2c(%rbp), %eax
shll $0x8, %eax
shll $0x4, %r14d
orl %eax, %r14d
orl $0x1d000, %r14d         # imm = 0x1D000
jmp 0x406b0c
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl -0x30(%rbp), %r12d
orl $0x4000, %r12d          # imm = 0x4000
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl -0x30(%rbp), %r12d
orl $0x2c000, %r12d         # imm = 0x2C000
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl -0x30(%rbp), %r12d
orl $0x6000, %r12d          # imm = 0x6000
jmp 0x406566
leaq 0x17ad6b(%rip), %rdx    # 0x581705
jmp 0x40686a
leaq 0x17ad4d(%rip), %rdx    # 0x5816f3
jmp 0x406a4b
leaq 0x17ac75(%rip), %rdx    # 0x581627
movl %r15d, %esi
callq 0x405312
jmp 0x4064dd
addl $-0x1b, %r12d
cmpl $0x3, %r12d
ja 0x4069b2
leaq 0x17aab0(%rip), %rax    # 0x581480
movslq (%rax,%r12,4), %rcx
addq %rax, %rcx
jmpq *%rcx
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl -0x30(%rbp), %r12d
orl $0x1c000, %r12d         # imm = 0x1C000
jmp 0x406bc2
leaq 0x17ad3c(%rip), %rdx    # 0x581734
movl %r15d, %esi
callq 0x405312
jmp 0x4064dd
movl -0x2c(%rbp), %eax
shll $0x8, %eax
shll $0x4, %ebx
orl %eax, %ebx
orl $0x5000, %ebx           # imm = 0x5000
jmp 0x406a3c
movl -0x2c(%rbp), %eax
shll $0x8, %eax
shll $0x4, %ebx
orl %eax, %ebx
orl $0x2d000, %ebx          # imm = 0x2D000
jmp 0x406a3c
movl -0x2c(%rbp), %eax
shll $0x8, %eax
shll $0x4, %ebx
orl %eax, %ebx
orl $0x7000, %ebx           # imm = 0x7000
movl %ebx, %r12d
jmp 0x406566
leaq 0x17acba(%rip), %rdx    # 0x581705
movl %r15d, %esi
callq 0x405312
jmp 0x4064dd
movl -0x2c(%rbp), %eax
shll $0x8, %eax
shll $0x4, %r14d
orl %eax, %r14d
orl $0x15000, %r14d         # imm = 0x15000
jmp 0x406b0c
movl -0x2c(%rbp), %eax
shll $0x8, %eax
shll $0x4, %r14d
orl %eax, %r14d
orl $0xb000, %r14d          # imm = 0xB000
jmp 0x406b0c
movl -0x2c(%rbp), %eax
shll $0x8, %eax
shll $0x4, %r14d
orl %eax, %r14d
orl $0x1000, %r14d          # imm = 0x1000
jmp 0x406b0c
movl -0x2c(%rbp), %eax
shll $0x8, %eax
shll $0x4, %r14d
orl %eax, %r14d
orl $0x1b000, %r14d         # imm = 0x1B000
jmp 0x406b0c
movl -0x2c(%rbp), %eax
shll $0x8, %eax
shll $0x4, %r14d
orl %eax, %r14d
orl $0xd000, %r14d          # imm = 0xD000
jmp 0x406b0c
movl -0x2c(%rbp), %eax
shll $0x8, %eax
shll $0x4, %r14d
orl %eax, %r14d
orl $0x13000, %r14d         # imm = 0x13000
jmp 0x406b0c
movl -0x2c(%rbp), %eax
shll $0x8, %eax
shll $0x4, %r14d
orl %eax, %r14d
orl $0xf000, %r14d          # imm = 0xF000
jmp 0x406b0c
movl -0x2c(%rbp), %eax
shll $0x8, %eax
shll $0x4, %r14d
orl %eax, %r14d
orl $0x1f000, %r14d         # imm = 0x1F000
movl %r14d, %r12d
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl -0x30(%rbp), %r12d
orl $0x14000, %r12d         # imm = 0x14000
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl -0x30(%rbp), %r12d
orl $0xa000, %r12d          # imm = 0xA000
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl -0x30(%rbp), %r12d
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl -0x30(%rbp), %r12d
orl $0x1a000, %r12d         # imm = 0x1A000
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl -0x30(%rbp), %r12d
orl $0xc000, %r12d          # imm = 0xC000
jmp 0x406566
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl -0x30(%rbp), %r12d
orl $0x12000, %r12d         # imm = 0x12000
jmp 0x406bc2
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl -0x30(%rbp), %r12d
orl $0xe000, %r12d          # imm = 0xE000
jmp 0x406bc2
movl -0x2c(%rbp), %r12d
shll $0x8, %r12d
orl -0x30(%rbp), %r12d
orl $0x1e000, %r12d         # imm = 0x1E000
movl -0x34(%rbp), %r15d
jmp 0x406566
jmp 0x406cc1
movq %rax, %rbx
leaq -0x110(%rbp), %rdi
jmp 0x406cae
jmp 0x406cc1
movq %rax, %rbx
leaq -0x170(%rbp), %rdi
jmp 0x406cae
jmp 0x406cc1
movq %rax, %rbx
leaq -0x130(%rbp), %rdi
jmp 0x406cae
jmp 0x406cc1
jmp 0x406cc1
jmp 0x406cc1
movq %rax, %rbx
leaq -0x150(%rbp), %rdi
jmp 0x406cae
jmp 0x406cc1
jmp 0x406cc1
movq %rax, %rbx
leaq -0x1d0(%rbp), %rdi
jmp 0x406cae
jmp 0x406cc1
jmp 0x406cc1
movq %rax, %rbx
leaq -0x250(%rbp), %rdi
jmp 0x406cae
jmp 0x406cc1
movq %rax, %rbx
leaq -0x1f0(%rbp), %rdi
jmp 0x406cae
jmp 0x406cc1
movq %rax, %rbx
leaq -0x1b0(%rbp), %rdi
jmp 0x406cae
jmp 0x406cc1
movq %rax, %rbx
leaq -0x190(%rbp), %rdi
jmp 0x406cae
movq %rax, %rbx
leaq -0x270(%rbp), %rdi
jmp 0x406cae
jmp 0x406cc1
jmp 0x406cc1
movq %rax, %rbx
leaq -0x210(%rbp), %rdi
jmp 0x406cae
jmp 0x406cc1
movq %rax, %rbx
leaq -0x290(%rbp), %rdi
jmp 0x406cae
jmp 0x406cc1
movq %rax, %rbx
leaq -0x230(%rbp), %rdi
callq 0x47b9c0
jmp 0x406cc4
jmp 0x406cc1
movq %rax, %rbx
jmp 0x406cdc
movq %rax, %rbx
jmp 0x406ce8
movq %rax, %rbx
leaq -0xb0(%rbp), %rdi
callq 0x47b9c0
leaq -0xd0(%rbp), %rdi
callq 0x47b9c0
leaq -0xf0(%rbp), %rdi
callq 0x47b9c0
leaq -0x88(%rbp), %rdi
callq 0x47b9c0
movq %rbx, %rdi
callq 0x4ad3d0