LLM4Binary/decompile-bench-makefile huggingface dataset:
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float32_unordered_quiet
int float32_unordered_quiet(float32 a, float32 b, float_status *status)
{
    a = float32_squash_input_denormal(a, status);
    b = float32_squash_input_denormal(b, status);

    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
       ) {
        if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
            float_raise(float_flag_invalid, status);
        }
        return 1;
    }
    return 0;
}

// Assembly:
cmpb $0x0, 0x5(%rdx)
je 0xce15
testl $0x7f800000, %edi       # imm = 0x7F800000
setne %al
testl $0x7fffff, %edi         # imm = 0x7FFFFF
sete %cl
orb %al, %cl
jne 0xcdf9
orb $0x40, 0x2(%rdx)
xorl %edi, %edi
testl $0x7f800000, %esi       # imm = 0x7F800000
setne %al
testl $0x7fffff, %esi         # imm = 0x7FFFFF
sete %cl
orb %al, %cl
jne 0xce15
orb $0x40, 0x2(%rdx)
xorl %esi, %esi
movl %edi, %eax
notl %eax
testl $0x7f800000, %eax       # imm = 0x7F800000
sete %al
testl $0x7fffff, %edi         # imm = 0x7FFFFF
setne %cl
testb %cl, %al
jne 0xce4b
movl %esi, %eax
notl %eax
testl $0x7f800000, %eax       # imm = 0x7F800000
setne %cl
testl $0x7fffff, %esi         # imm = 0x7FFFFF
sete %r8b
xorl %eax, %eax
orb %cl, %r8b
jne 0xce91
movl %edi, %eax
andl $0x7fc00000, %eax       # imm = 0x7FC00000
cmpl $0x7f800000, %eax       # imm = 0x7F800000
sete %al
testl $0x3fffff, %edi         # imm = 0x3FFFFF
setne %cl
testb %cl, %al
jne 0xce88
movl %esi, %eax
andl $0x7fc00000, %eax       # imm = 0x7FC00000
cmpl $0x7f800000, %eax       # imm = 0x7F800000
setne %al
testl $0x3fffff, %esi         # imm = 0x3FFFFF
sete %cl
orb %al, %cl
movl $0x1, %eax
jne 0xce91
orb $0x1, 0x2(%rdx)
movl $0x1, %eax
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_int32
int32 float64_to_int32(float64 a, float_status *status)
{
    flag aSign;
    int_fast16_t aExp, shiftCount;
    uint64_t aSig;
    a = float64_squash_input_denormal(a, status);

    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( ( aExp == 0x7FF ) && aSig ) aSign = 0;
    if ( aExp ) aSig |= LIT64( 0x0010000000000000 );
    shiftCount = 0x42C - aExp;
    if ( 0 < shiftCount ) shift64RightJamming( aSig, shiftCount, &aSig );
    return roundAndPackInt32(aSign, aSig, status);

}

// Assembly:
movq %rsi, %rdx
movabsq $0xfffffffffffff, %rcx  # imm = 0xFFFFFFFFFFFFF
cmpb $0x0, 0x5(%rsi)
je 0xced2
movabsq $0x7ff0000000000000, %rax # imm = 0x7FF0000000000000
testq %rax, %rdi
setne %al
testq %rcx, %rdi
sete %sil
orb %al, %sil
jne 0xced2
orb $0x40, 0x2(%rdx)
movabsq $-0x8000000000000000, %rax # imm = 0x8000000000000000
andq %rax, %rdi
movq %rdi, %r8
andq %rcx, %r8
movq %rdi, %rax
shrq $0x34, %rax
movq %rax, %r9
movq %r8, %r10
andq $0x7ff, %r9             # imm = 0x7FF
je 0xcf2f
leaq (%rcx,%r8), %rsi
incq %rsi
cmpl $0x42b, %r9d            # imm = 0x42B
ja 0xcf38
movl $0x1, %r10d
cmpl $0x3ed, %r9d            # imm = 0x3ED
jb 0xcf2f
movb $0x2c, %cl
subb %r9b, %cl
movq %rsi, %r10
shrq %cl, %r10
addb $0x14, %al
movl %eax, %ecx
shlq %cl, %rsi
xorl %eax, %eax
testq %rsi, %rsi
setne %al
orq %r10, %rax
movq %rax, %rsi
jmp 0xcf38
xorl %esi, %esi
testq %r10, %r10
setne %sil
shrq $0x3f, %rdi
xorl %eax, %eax
cmpl $0x7ff, %r9d            # imm = 0x7FF
cmovnel %edi, %eax
testq %r8, %r8
cmovel %edi, %eax
movl %eax, %edi
jmp 0xa573
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_int32_round_to_zero
int32 float64_to_int32_round_to_zero(float64 a, float_status *status)
{
    flag aSign;
    int_fast16_t aExp, shiftCount;
    uint64_t aSig, savedASig;
    int32_t z;
    a = float64_squash_input_denormal(a, status);

    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( 0x41E < aExp ) {
        if ( ( aExp == 0x7FF ) && aSig ) aSign = 0;
        goto invalid;
    }
    else if ( aExp < 0x3FF ) {
        if (aExp || aSig) {
            status->float_exception_flags |= float_flag_inexact;
        }
        return 0;
    }
    aSig |= LIT64( 0x0010000000000000 );
    shiftCount = 0x433 - aExp;
    savedASig = aSig;
    aSig >>= shiftCount;
    z = aSig;
    if ( aSign ) z = - z;
    if ( ( z < 0 ) ^ aSign ) {
 invalid:
        float_raise(float_flag_invalid, status);
        return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
    }
    if ( ( aSig<<shiftCount ) != savedASig ) {
        status->float_exception_flags |= float_flag_inexact;
    }
    return z;

}

// Assembly:
movabsq $0xfffffffffffff, %rax  # imm = 0xFFFFFFFFFFFFF
cmpb $0x0, 0x5(%rsi)
je 0xcf90
movabsq $0x7ff0000000000000, %rcx # imm = 0x7FF0000000000000
testq %rcx, %rdi
setne %cl
testq %rax, %rdi
sete %dl
orb %cl, %dl
jne 0xcf90
orb $0x40, 0x2(%rsi)
movabsq $-0x8000000000000000, %rcx # imm = 0x8000000000000000
andq %rcx, %rdi
movq %rdi, %rcx
andq %rax, %rcx
movq %rdi, %r8
shrq $0x34, %r8
andl $0x7ff, %r8d            # imm = 0x7FF
movq %rdi, %rdx
shrq $0x3f, %rdx
cmpq $0x41f, %r8             # imm = 0x41F
jb 0xcfd9
movzbl %dl, %eax
xorl %edx, %edx
cmpl $0x7ff, %r8d            # imm = 0x7FF
cmovnel %eax, %edx
testq %rcx, %rcx
cmovel %eax, %edx
orb $0x1, 0x2(%rsi)
cmpb $0x1, %dl
movl $0x80000000, %eax       # imm = 0x80000000
sbbl $0x0, %eax
retq
cmpl $0x3fe, %r8d            # imm = 0x3FE
ja 0xcfee
xorl %eax, %eax
orq %rcx, %r8
je 0xcfed
orb $0x20, 0x2(%rsi)
retq
leaq (%rax,%rcx), %r9
incq %r9
movl $0x433, %ecx            # imm = 0x433
subq %r8, %rcx
movq %r9, %r8
shrq %cl, %r8
movl %r8d, %eax
negl %eax
testq %rdi, %rdi
cmovnsl %r8d, %eax
movl %eax, %edi
shrl $0x1f, %edi
cmpl %edx, %edi
jne 0xcfc9
shlq %cl, %r8
cmpq %r9, %r8
jne 0xcfe9
jmp 0xcfed
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_int16_round_to_zero
int_fast16_t float64_to_int16_round_to_zero(float64 a, float_status *status)
{
    flag aSign;
    int_fast16_t aExp, shiftCount;
    uint64_t aSig, savedASig;
    int32 z;

    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( 0x40E < aExp ) {
        if ( ( aExp == 0x7FF ) && aSig ) {
            aSign = 0;
        }
        goto invalid;
    }
    else if ( aExp < 0x3FF ) {
        if ( aExp || aSig ) {
            status->float_exception_flags |= float_flag_inexact;
        }
        return 0;
    }
    aSig |= LIT64( 0x0010000000000000 );
    shiftCount = 0x433 - aExp;
    savedASig = aSig;
    aSig >>= shiftCount;
    z = aSig;
    if ( aSign ) {
        z = - z;
    }
    if ( ( (int16_t)z < 0 ) ^ aSign ) {
 invalid:
        float_raise(float_flag_invalid, status);
        return aSign ? (int32_t) 0xffff8000 : 0x7FFF;
    }
    if ( ( aSig<<shiftCount ) != savedASig ) {
        status->float_exception_flags |= float_flag_inexact;
    }
    return z;
}

// Assembly:
movabsq $0xfffffffffffff, %r8   # imm = 0xFFFFFFFFFFFFF
movq %rdi, %rcx
andq %r8, %rcx
movq %rdi, %rdx
shrq $0x34, %rdx
andl $0x7ff, %edx            # imm = 0x7FF
movq %rdi, %rax
shrq $0x3f, %rax
cmpq $0x40f, %rdx            # imm = 0x40F
jb 0xd07c
movzbl %al, %eax
xorl %edi, %edi
cmpl $0x7ff, %edx            # imm = 0x7FF
cmovnel %eax, %edi
testq %rcx, %rcx
cmovel %eax, %edi
movl %edi, %eax
orb $0x1, 0x2(%rsi)
testb %al, %al
movl $0x7fff, %ecx           # imm = 0x7FFF
movq $-0x8000, %rax          # imm = 0x8000
cmoveq %rcx, %rax
retq
cmpl $0x3fe, %edx            # imm = 0x3FE
ja 0xd090
orq %rcx, %rdx
je 0xd08d
orb $0x20, 0x2(%rsi)
xorl %eax, %eax
retq
addq %rcx, %r8
incq %r8
movl $0x433, %ecx            # imm = 0x433
subq %rdx, %rcx
movq %r8, %r9
shrq %cl, %r9
movl %r9d, %edx
negl %edx
testq %rdi, %rdi
cmovnsl %r9d, %edx
movl %edx, %edi
shrl $0xf, %edi
andl $0x1, %edi
cmpl %eax, %edi
jne 0xd065
shlq %cl, %r9
cmpq %r8, %r9
je 0xd0c8
orb $0x20, 0x2(%rsi)
movslq %edx, %rax
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_int64
int64 float64_to_int64(float64 a, float_status *status)
{
    flag aSign;
    int_fast16_t aExp, shiftCount;
    uint64_t aSig, aSigExtra;
    a = float64_squash_input_denormal(a, status);

    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( aExp ) aSig |= LIT64( 0x0010000000000000 );
    shiftCount = 0x433 - aExp;
    if ( shiftCount <= 0 ) {
        if ( 0x43E < aExp ) {
            float_raise(float_flag_invalid, status);
            if (    ! aSign
                 || (    ( aExp == 0x7FF )
                      && ( aSig != LIT64( 0x0010000000000000 ) ) )
               ) {
                return LIT64( 0x7FFFFFFFFFFFFFFF );
            }
            return (int64_t) LIT64( 0x8000000000000000 );
        }
        aSigExtra = 0;
        aSig <<= - shiftCount;
    }
    else {
        shift64ExtraRightJamming( aSig, 0, shiftCount, &aSig, &aSigExtra );
    }
    return roundAndPackInt64(aSign, aSig, aSigExtra, status);

}

// Assembly:
movq %rsi, %r8
movabsq $0xfffffffffffff, %rax  # imm = 0xFFFFFFFFFFFFF
cmpb $0x0, 0x5(%rsi)
je 0xd10e
movabsq $0x7ff0000000000000, %rcx # imm = 0x7FF0000000000000
testq %rcx, %rdi
setne %cl
testq %rax, %rdi
sete %dl
orb %cl, %dl
jne 0xd10e
orb $0x40, 0x2(%r8)
movabsq $0x7fffffffffffffff, %rcx # imm = 0x7FFFFFFFFFFFFFFF
incq %rcx
andq %rcx, %rdi
movq %rdi, %r9
andq %rax, %r9
movq %rdi, %rcx
shrq $0x34, %rcx
movq %rcx, %rsi
andq $0x7ff, %rsi            # imm = 0x7FF
je 0xd196
leaq (%rax,%r9), %rdx
incq %rdx
cmpq $0x433, %rsi            # imm = 0x433
jb 0xd154
cmpl $0x43f, %esi            # imm = 0x43F
jb 0xd175
movabsq $0x7fffffffffffffff, %rax # imm = 0x7FFFFFFFFFFFFFFF
orb $0x1, 0x2(%r8)
testq %rdi, %rdi
js 0xd1b0
retq
cmpl $0x3f4, %esi            # imm = 0x3F4
jb 0xd188
addb $0xd, %cl
movq %rdx, %rax
shlq %cl, %rax
movb $0x33, %cl
subb %sil, %cl
shrq %cl, %rdx
movq %rdx, %rsi
movq %rax, %rdx
jmp 0xd1a0
addq $-0x433, %rsi           # imm = 0xFBCD
movl %esi, %ecx
shlq %cl, %rdx
movq %rdx, %rsi
xorl %edx, %edx
jmp 0xd1a0
movl $0x1, %r9d
cmpl $0x3f3, %esi            # imm = 0x3F3
je 0xd19e
xorl %edx, %edx
testq %r9, %r9
setne %dl
xorl %esi, %esi
shrq $0x3f, %rdi
movzbl %dil, %edi
movq %r8, %rcx
jmp 0xa825
leaq 0x1(%rax), %rcx
cmpl $0x7ff, %esi            # imm = 0x7FF
cmovneq %rcx, %rax
testq %r9, %r9
cmoveq %rcx, %rax
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_int64_round_to_zero
int64 float64_to_int64_round_to_zero(float64 a, float_status *status)
{
    flag aSign;
    int_fast16_t aExp, shiftCount;
    uint64_t aSig;
    int64 z;
    a = float64_squash_input_denormal(a, status);

    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( aExp ) aSig |= LIT64( 0x0010000000000000 );
    shiftCount = aExp - 0x433;
    if ( 0 <= shiftCount ) {
        if ( 0x43E <= aExp ) {
            if ( float64_val(a) != LIT64( 0xC3E0000000000000 ) ) {
                float_raise(float_flag_invalid, status);
                if (    ! aSign
                     || (    ( aExp == 0x7FF )
                          && ( aSig != LIT64( 0x0010000000000000 ) ) )
                   ) {
                    return LIT64( 0x7FFFFFFFFFFFFFFF );
                }
            }
            return (int64_t) LIT64( 0x8000000000000000 );
        }
        z = aSig<<shiftCount;
    }
    else {
        if ( aExp < 0x3FE ) {
            if (aExp | aSig) {
                status->float_exception_flags |= float_flag_inexact;
            }
            return 0;
        }
        z = aSig>>( - shiftCount );
        if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) {
            status->float_exception_flags |= float_flag_inexact;
        }
    }
    if ( aSign ) z = - z;
    return z;

}

// Assembly:
movabsq $0xfffffffffffff, %rax  # imm = 0xFFFFFFFFFFFFF
cmpb $0x0, 0x5(%rsi)
je 0xd204
movabsq $0x7ff0000000000000, %rcx # imm = 0x7FF0000000000000
testq %rcx, %rdi
setne %cl
testq %rax, %rdi
sete %dl
orb %cl, %dl
jne 0xd204
orb $0x40, 0x2(%rsi)
movabsq $0x7fffffffffffffff, %rcx # imm = 0x7FFFFFFFFFFFFFFF
incq %rcx
andq %rcx, %rdi
movq %rdi, %rcx
andq %rax, %rcx
movq %rdi, %rdx
shrq $0x34, %rdx
andl $0x7ff, %edx            # imm = 0x7FF
leaq 0x1(%rax,%rcx), %r8
movq %r8, %r9
cmoveq %rcx, %r9
leaq -0x433(%rdx), %rax
cmpq $0x433, %rdx            # imm = 0x433
jb 0xd258
cmpl $0x43e, %edx            # imm = 0x43E
jb 0xd26c
movabsq $0x7fffffffffffffff, %rax # imm = 0x7FFFFFFFFFFFFFFF
movabsq $-0x3c20000000000000, %r8 # imm = 0xC3E0000000000000
cmpq %r8, %rdi
jne 0xd29c
incq %rax
retq
cmpl $0x3fd, %edx            # imm = 0x3FD
ja 0xd276
orq %rdx, %r9
je 0xd269
orb $0x20, 0x2(%rsi)
xorl %eax, %eax
retq
movl %eax, %ecx
shlq %cl, %r8
movq %r8, %rdx
jmp 0xd28e
movb $0x33, %cl
subb %dl, %cl
movq %r8, %rdx
shrq %cl, %rdx
movl %eax, %ecx
shlq %cl, %r8
testq %r8, %r8
je 0xd28e
orb $0x20, 0x2(%rsi)
movq %rdx, %rax
negq %rax
testq %rdi, %rdi
cmovnsq %rdx, %rax
retq
orb $0x1, 0x2(%rsi)
testq %rdi, %rdi
jns 0xd29b
cmpl $0x7ff, %edx            # imm = 0x7FF
sete %dl
testq %rcx, %rcx
setne %cl
testb %dl, %cl
je 0xd254
jmp 0xd29b
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float16_to_float32
float32 float16_to_float32(float16 a, flag ieee, float_status *status)
{
    flag aSign;
    int_fast16_t aExp;
    uint32_t aSig;

    aSign = extractFloat16Sign(a);
    aExp = extractFloat16Exp(a);
    aSig = extractFloat16Frac(a);

    if (aExp == 0x1f && ieee) {
        if (aSig) {
            return commonNaNToFloat32(float16ToCommonNaN(a, status), status);
        }
        return packFloat32(aSign, 0xff, 0);
    }
    if (aExp == 0) {
        if (aSig == 0) {
            return packFloat32(aSign, 0, 0);
        }

        normalizeFloat16Subnormal(aSig, &aExp, &aSig);
        aExp--;
    }
    return packFloat32( aSign, aExp + 0x70, aSig << 13);
}

// Assembly:
movl %edi, %eax
shrl $0xf, %eax
movl %edi, %ecx
shrl $0xa, %ecx
andl $0x1f, %ecx
movl %edi, %r8d
andl $0x3ff, %r8d            # imm = 0x3FF
cmpw $0x1f, %cx
setne %r9b
testl %esi, %esi
sete %sil
orb %r9b, %sil
jne 0xd339
testl %r8d, %r8d
je 0xd343
movzwl %di, %ecx
movl %ecx, %esi
andl $0x7e00, %esi           # imm = 0x7E00
cmpl $0x7c00, %esi           # imm = 0x7C00
setne %sil
testl $0x1ff, %ecx            # imm = 0x1FF
sete %dil
orb %sil, %dil
jne 0xd311
orb $0x1, 0x2(%rdx)
shlq $0x36, %rcx
movq %rcx, %rsi
shrq $0x29, %rsi
shll $0x1f, %eax
cmpb $0x0, 0x6(%rdx)
leal 0x7f800000(%rax,%rsi), %eax
movl $0x7fc00000, %edx       # imm = 0x7FC00000
cmovnel %edx, %eax
testq %rcx, %rcx
cmovel %edx, %eax
retq
testw %cx, %cx
je 0xd34c
movzwl %cx, %ecx
jmp 0xd365
shll $0x1f, %eax
orl $0x7f800000, %eax       # imm = 0x7F800000
retq
testl %r8d, %r8d
je 0xd37a
bsrl %r8d, %edx
xorl $0x1f, %edx
leal -0x15(%rdx), %ecx
shll %cl, %r8d
movl $0x15, %ecx
subl %edx, %ecx
shll $0xd, %r8d
shll $0x1f, %eax
addl %r8d, %eax
shll $0x17, %ecx
addl %ecx, %eax
addl $0x38000000, %eax       # imm = 0x38000000
retq
shll $0x1f, %eax
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float32_to_float16
float16 float32_to_float16(float32 a, flag ieee, float_status *status)
{
    flag aSign;
    int_fast16_t aExp;
    uint32_t aSig;

    a = float32_squash_input_denormal(a, status);

    aSig = extractFloat32Frac( a );
    aExp = extractFloat32Exp( a );
    aSign = extractFloat32Sign( a );
    if ( aExp == 0xFF ) {
        if (aSig) {
            /* Input is a NaN */
            if (!ieee) {
                float_raise(float_flag_invalid, status);
                return packFloat16(aSign, 0, 0);
            }
            return commonNaNToFloat16(
                float32ToCommonNaN(a, status), status);
        }
        /* Infinity */
        if (!ieee) {
            float_raise(float_flag_invalid, status);
            return packFloat16(aSign, 0x1f, 0x3ff);
        }
        return packFloat16(aSign, 0x1f, 0);
    }
    if (aExp == 0 && aSig == 0) {
        return packFloat16(aSign, 0, 0);
    }
    /* Decimal point between bits 22 and 23. Note that we add the 1 bit
     * even if the input is denormal; however this is harmless because
     * the largest possible single-precision denormal is still smaller
     * than the smallest representable half-precision denormal, and so we
     * will end up ignoring aSig and returning via the "always return zero"
     * codepath.
     */
    aSig |= 0x00800000;
    aExp -= 0x71;

    return roundAndPackFloat16(aSign, aExp, aSig, ieee, status);
}

// Assembly:
movq %rdx, %r8
cmpb $0x0, 0x5(%rdx)
je 0xd3a8
testl $0x7f800000, %edi       # imm = 0x7F800000
setne %al
testl $0x7fffff, %edi         # imm = 0x7FFFFF
sete %cl
orb %al, %cl
jne 0xd3a8
orb $0x40, 0x2(%r8)
andl $0x80000000, %edi       # imm = 0x80000000
movl %edi, %edx
andl $0x7fffff, %edx         # imm = 0x7FFFFF
movl %edi, %r9d
shrl $0x17, %r9d
movl $0xff, %ecx
andl %ecx, %r9d
movl %edi, %eax
shrl $0x1f, %eax
cmpl %ecx, %r9d
jne 0xd41b
testl %edx, %edx
je 0xd441
testb %sil, %sil
je 0xd44f
movl %edi, %ecx
andl $0x7fc00000, %ecx       # imm = 0x7FC00000
cmpl $0x7f800000, %ecx       # imm = 0x7F800000
setne %cl
testl $0x3fffff, %edi         # imm = 0x3FFFFF
sete %dl
orb %cl, %dl
jne 0xd3f5
orb $0x1, 0x2(%r8)
shrl $0xd, %edi
andl $0x3ff, %edi            # imm = 0x3FF
shll $0xf, %eax
cmpb $0x0, 0x6(%r8)
leal 0x7c00(%rax,%rdi), %eax
movl $0xfe00, %ecx           # imm = 0xFE00
cmovnel %ecx, %eax
testl %edi, %edi
cmovel %ecx, %eax
retq
movl %r9d, %ecx
orl %edx, %ecx
je 0xd454
pushq %rax
orl $0x800000, %edx         # imm = 0x800000
addq $-0x71, %r9
movzbl %al, %edi
movzbl %sil, %ecx
movq %r9, %rsi
callq 0xd466
addq $0x8, %rsp
retq
testb %sil, %sil
je 0xd458
shll $0xf, %eax
orl $0x7c00, %eax           # imm = 0x7C00
retq
orb $0x1, 0x2(%r8)
shll $0xf, %eax
retq
orb $0x1, 0x2(%r8)
shll $0xf, %eax
orl $0x7fff, %eax           # imm = 0x7FFF
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float16_to_float64
float64 float16_to_float64(float16 a, flag ieee, float_status *status)
{
    flag aSign;
    int_fast16_t aExp;
    uint32_t aSig;

    aSign = extractFloat16Sign(a);
    aExp = extractFloat16Exp(a);
    aSig = extractFloat16Frac(a);

    if (aExp == 0x1f && ieee) {
        if (aSig) {
            return commonNaNToFloat64(
                float16ToCommonNaN(a, status), status);
        }
        return packFloat64(aSign, 0x7ff, 0);
    }
    if (aExp == 0) {
        if (aSig == 0) {
            return packFloat64(aSign, 0, 0);
        }

        normalizeFloat16Subnormal(aSig, &aExp, &aSig);
        aExp--;
    }
    return packFloat64(aSign, aExp + 0x3f0, ((uint64_t)aSig) << 42);
}

// Assembly:
movl %edi, %eax
shrl $0xf, %eax
movl %edi, %ecx
shrl $0xa, %ecx
andl $0x1f, %ecx
movl %edi, %r8d
andl $0x3ff, %r8d            # imm = 0x3FF
cmpw $0x1f, %cx
setne %r9b
testl %esi, %esi
sete %sil
orb %r9b, %sil
jne 0xd65f
movabsq $0x7ff0000000000000, %rcx # imm = 0x7FF0000000000000
testl %r8d, %r8d
je 0xd669
movzwl %di, %esi
movl %esi, %edi
andl $0x7e00, %edi           # imm = 0x7E00
cmpl $0x7c00, %edi           # imm = 0x7C00
setne %dil
testl $0x1ff, %esi            # imm = 0x1FF
sete %r8b
orb %dil, %r8b
jne 0xd630
orb $0x1, 0x2(%rdx)
shlq $0x36, %rsi
movq %rsi, %rdi
shrq $0xc, %rdi
shlq $0x3f, %rax
orq %rdi, %rax
orq %rcx, %rax
cmpb $0x0, 0x6(%rdx)
movabsq $0x7ff8000000000000, %rcx # imm = 0x7FF8000000000000
cmovneq %rcx, %rax
testq %rsi, %rsi
cmoveq %rcx, %rax
retq
testw %cx, %cx
je 0xd671
movzwl %cx, %ecx
jmp 0xd68d
shlq $0x3f, %rax
orq %rcx, %rax
retq
testl %r8d, %r8d
je 0xd6b0
bsrl %r8d, %edx
xorl $0x1f, %edx
leal -0x15(%rdx), %ecx
shll %cl, %r8d
movl $0x15, %ecx
subl %edx, %ecx
movslq %ecx, %rcx
shlq $0x2a, %r8
shlq $0x3f, %rax
addq %r8, %rax
shlq $0x34, %rcx
movabsq $0x3f00000000000000, %rdx # imm = 0x3F00000000000000
addq %rax, %rdx
addq %rcx, %rdx
movq %rdx, %rax
retq
shlq $0x3f, %rax
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_float16
float16 float64_to_float16(float64 a, flag ieee, float_status *status)
{
    flag aSign;
    int_fast16_t aExp;
    uint64_t aSig;
    uint32_t zSig;

    a = float64_squash_input_denormal(a, status);

    aSig = extractFloat64Frac(a);
    aExp = extractFloat64Exp(a);
    aSign = extractFloat64Sign(a);
    if (aExp == 0x7FF) {
        if (aSig) {
            /* Input is a NaN */
            if (!ieee) {
                float_raise(float_flag_invalid, status);
                return packFloat16(aSign, 0, 0);
            }
            return commonNaNToFloat16(
                float64ToCommonNaN(a, status), status);
        }
        /* Infinity */
        if (!ieee) {
            float_raise(float_flag_invalid, status);
            return packFloat16(aSign, 0x1f, 0x3ff);
        }
        return packFloat16(aSign, 0x1f, 0);
    }
    shift64RightJamming(aSig, 29, &aSig);
    zSig = aSig;
    if (aExp == 0 && zSig == 0) {
        return packFloat16(aSign, 0, 0);
    }
    /* Decimal point between bits 22 and 23. Note that we add the 1 bit
     * even if the input is denormal; however this is harmless because
     * the largest possible single-precision denormal is still smaller
     * than the smallest representable half-precision denormal, and so we
     * will end up ignoring aSig and returning via the "always return zero"
     * codepath.
     */
    zSig |= 0x00800000;
    aExp -= 0x3F1;

    return roundAndPackFloat16(aSign, aExp, zSig, ieee, status);
}

// Assembly:
movq %rdx, %r8
movabsq $0xfffffffffffff, %rcx  # imm = 0xFFFFFFFFFFFFF
cmpb $0x0, 0x5(%rdx)
je 0xd6f4
movabsq $0x7ff0000000000000, %rax # imm = 0x7FF0000000000000
testq %rax, %rdi
setne %al
testq %rcx, %rdi
sete %dl
orb %al, %dl
jne 0xd6f4
orb $0x40, 0x2(%r8)
movabsq $-0x8000000000000000, %rax # imm = 0x8000000000000000
andq %rax, %rdi
andq %rdi, %rcx
movq %rdi, %r9
shrq $0x34, %r9
movl $0x7ff, %edx            # imm = 0x7FF
andq %rdx, %r9
movq %rdi, %rax
shrq $0x3f, %rax
cmpq %rdx, %r9
jne 0xd77c
testq %rcx, %rcx
je 0xd7b6
testb %sil, %sil
je 0xd7c4
movabsq $0x7ff8000000000000, %rcx # imm = 0x7FF8000000000000
andq %rdi, %rcx
movabsq $0x7ff0000000000000, %rdx # imm = 0x7FF0000000000000
cmpq %rdx, %rcx
setne %cl
movq %rdi, %rdx
shlq $0xd, %rdx
sete %dl
orb %cl, %dl
jne 0xd754
orb $0x1, 0x2(%r8)
shrq $0x2a, %rdi
andl $0x3ff, %edi            # imm = 0x3FF
shll $0xf, %eax
cmpb $0x0, 0x6(%r8)
leal 0x7c00(%rax,%rdi), %eax
movl $0xfe00, %ecx           # imm = 0xFE00
cmovnel %ecx, %eax
testq %rdi, %rdi
cmovel %ecx, %eax
retq
shrq $0x1d, %rcx
xorl %edx, %edx
shlq $0x23, %rdi
setne %dl
orq %rcx, %rdx
movq %rdx, %rcx
orq %r9, %rcx
je 0xd7c9
pushq %rax
orl $0x800000, %edx         # imm = 0x800000
addq $-0x3f1, %r9            # imm = 0xFC0F
movzbl %al, %edi
movzbl %sil, %ecx
movq %r9, %rsi
callq 0xd466
addq $0x8, %rsp
retq
testb %sil, %sil
je 0xd7cd
shll $0xf, %eax
orl $0x7c00, %eax           # imm = 0x7C00
retq
orb $0x1, 0x2(%r8)
shll $0xf, %eax
retq
orb $0x1, 0x2(%r8)
shll $0xf, %eax
orl $0x7fff, %eax           # imm = 0x7FFF
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_floatx80
floatx80 float64_to_floatx80(float64 a, float_status *status)
{
    flag aSign;
    int_fast16_t aExp;
    uint64_t aSig;

    a = float64_squash_input_denormal(a, status);
    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( aExp == 0x7FF ) {
        if (aSig) {
            return commonNaNToFloatx80(float64ToCommonNaN(a, status), status);
        }
        return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
    }
    return
        packFloatx80(
            aSign, aExp + 0x3C00, ( aSig | LIT64( 0x0010000000000000 ) )<<11 );

}

// Assembly:
movabsq $-0x8000000000000000, %rax # imm = 0x8000000000000000
movabsq $0xfffffffffffff, %r8   # imm = 0xFFFFFFFFFFFFF
cmpb $0x0, 0x5(%rsi)
je 0xd816
movabsq $0x7ff0000000000000, %rcx # imm = 0x7FF0000000000000
testq %rcx, %rdi
setne %cl
testq %r8, %rdi
sete %dl
orb %cl, %dl
jne 0xd816
orb $0x40, 0x2(%rsi)
andq %rax, %rdi
andq %rdi, %r8
movq %rdi, %r9
shrq $0x34, %r9
movq %rdi, %rdx
shrq $0x3f, %rdx
andq $0x7ff, %r9             # imm = 0x7FF
je 0xd8bc
cmpl $0x7ff, %r9d            # imm = 0x7FF
jne 0xd8dd
testq %r8, %r8
je 0xd8f5
movabsq $0x7ff8000000000000, %rcx # imm = 0x7FF8000000000000
andq %rdi, %rcx
movabsq $0x7ff0000000000000, %r8 # imm = 0x7FF0000000000000
cmpq %r8, %rcx
setne %cl
movq %rdi, %r8
shlq $0xd, %r8
sete %r8b
orb %cl, %r8b
jne 0xd87b
orb $0x1, 0x2(%rsi)
shlq $0xc, %rdi
cmpb $0x0, 0x6(%rsi)
setne %cl
testq %rdi, %rdi
sete %sil
orb %cl, %sil
shrq %rdi
orq %rax, %rdi
movzwl %dx, %ecx
shll $0xf, %ecx
orl $0x7fff, %ecx           # imm = 0x7FFF
testb %sil, %sil
movabsq $-0x4000000000000000, %rax # imm = 0xC000000000000000
cmoveq %rdi, %rax
movl $0xffff, %edx           # imm = 0xFFFF
cmovel %ecx, %edx
retq
testq %r8, %r8
je 0xd902
bsrq %r8, %rcx
xorl $0x3f, %ecx
addl $0xf5, %ecx
movzbl %cl, %ecx
shlq %cl, %r8
movl $0x1, %r9d
subl %ecx, %r9d
shlq $0xb, %r8
orq %r8, %rax
movzwl %dx, %ecx
shll $0xf, %ecx
leal (%r9,%rcx), %edx
addl $0x3c00, %edx           # imm = 0x3C00
retq
movzwl %dx, %edx
shll $0xf, %edx
orl $0x7fff, %edx           # imm = 0x7FFF
retq
movzwl %dx, %edx
shll $0xf, %edx
xorl %eax, %eax
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_to_float128
float128 float64_to_float128(float64 a, float_status *status)
{
    flag aSign;
    int_fast16_t aExp;
    uint64_t aSig, zSig0, zSig1;

    a = float64_squash_input_denormal(a, status);
    aSig = extractFloat64Frac( a );
    aExp = extractFloat64Exp( a );
    aSign = extractFloat64Sign( a );
    if ( aExp == 0x7FF ) {
        if (aSig) {
            return commonNaNToFloat128(float64ToCommonNaN(a, status), status);
        }
        return packFloat128( aSign, 0x7FFF, 0, 0 );
    }
    if ( aExp == 0 ) {
        if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );
        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
        --aExp;
    }
    shift128Right( aSig, 0, 4, &zSig0, &zSig1 );
    return packFloat128( aSign, aExp + 0x3C00, zSig0, zSig1 );

}

// Assembly:
movabsq $-0x8000000000000000, %rdx # imm = 0x8000000000000000
movabsq $0xfffffffffffff, %rax  # imm = 0xFFFFFFFFFFFFF
cmpb $0x0, 0x5(%rsi)
je 0xd948
movabsq $0x7ff0000000000000, %rcx # imm = 0x7FF0000000000000
testq %rcx, %rdi
setne %cl
testq %rax, %rdi
sete %r8b
orb %cl, %r8b
jne 0xd948
orb $0x40, 0x2(%rsi)
andq %rdx, %rdi
andq %rdi, %rax
movq %rdi, %rcx
shrq $0x34, %rcx
andq %rdi, %rdx
andq $0x7ff, %rcx            # imm = 0x7FF
je 0xd9d8
cmpl $0x7ff, %ecx            # imm = 0x7FF
jne 0xd9f5
movabsq $0x7fff000000000000, %rcx # imm = 0x7FFF000000000000
testq %rax, %rax
je 0xda18
movabsq $0x7ff8000000000000, %rax # imm = 0x7FF8000000000000
andq %rdi, %rax
movabsq $0x7ff0000000000000, %r8 # imm = 0x7FF0000000000000
cmpq %r8, %rax
setne %al
movq %rdi, %r8
shlq $0xd, %r8
sete %r8b
orb %al, %r8b
jne 0xd9ae
orb $0x1, 0x2(%rsi)
movq %rdi, %r8
shrq $0x4, %r8
shlq $0x3c, %rdi
orq %rcx, %r8
orq %rdx, %r8
xorl %eax, %eax
cmpb $0x0, 0x6(%rsi)
movabsq $0x7fff800000000000, %rdx # imm = 0x7FFF800000000000
cmoveq %r8, %rdx
cmoveq %rdi, %rax
retq
testq %rax, %rax
je 0xda21
bsrq %rax, %rcx
xorl $0x3f, %ecx
addl $0xf5, %ecx
movzbl %cl, %ecx
shlq %cl, %rax
negl %ecx
movslq %ecx, %rcx
movq %rax, %rsi
shrq $0x4, %rsi
shlq $0x3c, %rax
shlq $0x30, %rcx
addq %rdx, %rsi
movabsq $0x3c00000000000000, %rdx # imm = 0x3C00000000000000
addq %rcx, %rdx
addq %rsi, %rdx
retq
orq %rcx, %rdi
xorl %eax, %eax
movq %rdi, %rdx
retq
xorl %eax, %eax
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/./softfloat-specialize.h
// Function: propagateFloat64NaN
static float64 propagateFloat64NaN(float64 a, float64 b, float_status *status)
{
    flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
    flag aIsLargerSignificand;
    uint64_t av, bv;

    aIsQuietNaN = float64_is_quiet_nan( a );
    aIsSignalingNaN = float64_is_signaling_nan( a );
    bIsQuietNaN = float64_is_quiet_nan( b );
    bIsSignalingNaN = float64_is_signaling_nan( b );
    av = float64_val(a);
    bv = float64_val(b);

    if (aIsSignalingNaN | bIsSignalingNaN) {
        float_raise(float_flag_invalid, status);
    }

    if (status->default_nan_mode)
        return float64_default_nan;

    if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
        aIsLargerSignificand = 0;
    } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) {
        aIsLargerSignificand = 1;
    } else {
        aIsLargerSignificand = (av < bv) ? 1 : 0;
    }

    if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
                aIsLargerSignificand)) {
        return float64_maybe_silence_nan(b);
    } else {
        return float64_maybe_silence_nan(a);
    }
}

// Assembly:
pushq %r15
pushq %r14
pushq %rbx
movabsq $0x7ff8000000000000, %rax # imm = 0x7FF8000000000000
movabsq $0x7ff0000000000000, %rcx # imm = 0x7FF0000000000000
movq %rdi, %r8
andq %rax, %r8
cmpq %rcx, %r8
sete %r9b
movq %rdi, %r10
shlq $0xd, %r10
setne %r11b
andb %r9b, %r11b
movq %rsi, %r9
andq %rax, %r9
cmpq %rcx, %r9
sete %bl
movq %rsi, %r10
shlq $0xd, %r10
setne %r10b
andb %bl, %r10b
movl %r11d, %ebx
orb %r10b, %bl
cmpb $0x1, %bl
jne 0xdc38
orb $0x1, 0x2(%rdx)
cmpb $0x0, 0x6(%rdx)
jne 0xdcd2
leaq (%rdi,%rdi), %r14
leaq (%rsi,%rsi), %rbx
cmpq %rbx, %r14
jae 0xdc53
xorl %eax, %eax
jmp 0xdc5d
movb $0x1, %al
ja 0xdc5d
cmpq %rsi, %rdi
setb %al
movabsq $-0x10000000000001, %r15 # imm = 0xFFEFFFFFFFFFFFFF
movabsq $0x7ffffffffffff, %rdx  # imm = 0x7FFFFFFFFFFFF
testb %r11b, %r11b
je 0xdcaa
xorl %r11d, %r11d
cmpq %r15, %rbx
seta %r11b
xorl %ebx, %ebx
testb %al, %al
sete %bl
testb %r10b, %r10b
cmovel %r11d, %ebx
cmpb $0x1, %bl
je 0xdcbd
leaq 0x1(%rdx), %rax
orq %rdi, %rax
testq %rdx, %rdi
cmoveq %rdi, %rax
cmpq %rcx, %r8
cmovneq %rdi, %rax
jmp 0xdcd2
leaq 0x1(%r15), %r11
cmpq %r11, %r14
jb 0xdcbd
cmpq %r15, %rbx
jbe 0xdc93
orb %r10b, %al
jne 0xdc93
leaq 0x1(%rdx), %rax
orq %rsi, %rax
testq %rdx, %rsi
cmoveq %rsi, %rax
cmpq %rcx, %r9
cmovneq %rsi, %rax
popq %rbx
popq %r14
popq %r15
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_trunc_to_int
float64 float64_trunc_to_int(float64 a, float_status *status)
{
    int oldmode;
    float64 res;
    oldmode = status->float_rounding_mode;
    status->float_rounding_mode = float_round_to_zero;
    res = float64_round_to_int(a, status);
    status->float_rounding_mode = oldmode;
    return res;
}

// Assembly:
pushq %rbp
pushq %rbx
pushq %rax
movq %rsi, %rbx
movb 0x1(%rsi), %bpl
movb $0x3, 0x1(%rsi)
callq 0xda24
movb %bpl, 0x1(%rbx)
addq $0x8, %rsp
popq %rbx
popq %rbp
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/./softfloat-macros.h
// Function: shift128RightJamming
static inline void
 shift128RightJamming(
     uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr)
{
    uint64_t z0, z1;
    int8 negCount = ( - count ) & 63;

    if ( count == 0 ) {
        z1 = a1;
        z0 = a0;
    }
    else if ( count < 64 ) {
        z1 = ( a0<<negCount ) | ( a1>>count ) | ( ( a1<<negCount ) != 0 );
        z0 = a0>>count;
    }
    else {
        if ( count == 64 ) {
            z1 = a0 | ( a1 != 0 );
        }
        else if ( count < 128 ) {
            z1 = ( a0>>( count & 63 ) ) | ( ( ( a0<<negCount ) | a1 ) != 0 );
        }
        else {
            z1 = ( ( a0 | a1 ) != 0 );
        }
        z0 = 0;
    }
    *z1Ptr = z1;
    *z0Ptr = z0;

}

// Assembly:
movq %rcx, %rax
testq %rdx, %rdx
je 0xee58
movl %edx, %r9d
negb %r9b
andb $0x3f, %r9b
cmpq $0x3f, %rdx
jg 0xee17
movq %rdi, %r10
movl %r9d, %ecx
shlq %cl, %r10
movq %rsi, %r11
movl %edx, %ecx
shrq %cl, %r11
orq %r10, %r11
movl %r9d, %ecx
shlq %cl, %rsi
xorl %r9d, %r9d
testq %rsi, %rsi
setne %r9b
orq %r11, %r9
movl %edx, %ecx
shrq %cl, %rdi
movq %r9, %rsi
jmp 0xee58
cmpq $0x40, %rdx
jne 0xee2a
xorl %ecx, %ecx
testq %rsi, %rsi
setne %cl
orq %rdi, %rcx
jmp 0xee53
cmpq $0x7f, %rdx
ja 0xee4b
movq %rdi, %r10
movl %edx, %ecx
shrq %cl, %r10
movl %r9d, %ecx
shlq %cl, %rdi
xorl %ecx, %ecx
orq %rsi, %rdi
setne %cl
orq %r10, %rcx
jmp 0xee53
xorl %ecx, %ecx
orq %rdi, %rsi
setne %cl
xorl %edi, %edi
movq %rcx, %rsi
movq %rsi, (%r8)
movq %rdi, (%rax)
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_eq
int float64_eq(float64 a, float64 b, float_status *status)
{
    uint64_t av, bv;
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
        float_raise(float_flag_invalid, status);
        return 0;
    }
    av = float64_val(a);
    bv = float64_val(b);
    return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );

}

// Assembly:
movabsq $0x7ff0000000000000, %rcx # imm = 0x7FF0000000000000
movabsq $0xfffffffffffff, %rax  # imm = 0xFFFFFFFFFFFFF
cmpb $0x0, 0x5(%rdx)
je 0xf247
movabsq $-0x8000000000000000, %r8 # imm = 0x8000000000000000
testq %rcx, %rdi
setne %r9b
testq %rax, %rdi
sete %r10b
orb %r9b, %r10b
jne 0xf22d
orb $0x40, 0x2(%rdx)
andq %r8, %rdi
testq %rcx, %rsi
setne %r9b
testq %rax, %rsi
sete %r10b
orb %r9b, %r10b
jne 0xf247
orb $0x40, 0x2(%rdx)
andq %r8, %rsi
movq %rdi, %r8
notq %r8
testq %r8, %rcx
sete %r8b
testq %rax, %rdi
setne %r9b
testb %r9b, %r8b
jne 0xf298
movq %rsi, %r8
notq %r8
testq %r8, %rcx
setne %cl
testq %rax, %rsi
sete %al
orb %cl, %al
je 0xf298
cmpq %rsi, %rdi
sete %al
orq %rdi, %rsi
movabsq $-0x8000000000000000, %rcx # imm = 0x8000000000000000
decq %rcx
testq %rcx, %rsi
sete %cl
orb %al, %cl
movzbl %cl, %eax
retq
orb $0x1, 0x2(%rdx)
xorl %eax, %eax
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_le
int float64_le(float64 a, float64 b, float_status *status)
{
    flag aSign, bSign;
    uint64_t av, bv;
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
        float_raise(float_flag_invalid, status);
        return 0;
    }
    aSign = extractFloat64Sign( a );
    bSign = extractFloat64Sign( b );
    av = float64_val(a);
    bv = float64_val(b);
    if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
    return ( av == bv ) || ( aSign ^ ( av < bv ) );

}

// Assembly:
movabsq $0x7ff0000000000000, %rcx # imm = 0x7FF0000000000000
movabsq $0xfffffffffffff, %rax  # imm = 0xFFFFFFFFFFFFF
cmpb $0x0, 0x5(%rdx)
je 0xf2f7
movabsq $-0x8000000000000000, %r8 # imm = 0x8000000000000000
testq %rcx, %rdi
setne %r9b
testq %rax, %rdi
sete %r10b
orb %r9b, %r10b
jne 0xf2dd
orb $0x40, 0x2(%rdx)
andq %r8, %rdi
testq %rcx, %rsi
setne %r9b
testq %rax, %rsi
sete %r10b
orb %r9b, %r10b
jne 0xf2f7
orb $0x40, 0x2(%rdx)
andq %r8, %rsi
movq %rdi, %r8
notq %r8
testq %r8, %rcx
sete %r8b
testq %rax, %rdi
setne %r9b
testb %r9b, %r8b
jne 0xf341
movq %rsi, %r8
notq %r8
testq %r8, %rcx
setne %cl
testq %rax, %rsi
sete %al
orb %cl, %al
je 0xf341
movq %rsi, %rax
xorq %rdi, %rax
js 0xf349
cmpq %rsi, %rdi
sete %cl
setb %dl
testq %rdi, %rdi
sets %al
xorb %dl, %al
jmp 0xf365
orb $0x1, 0x2(%rdx)
xorl %eax, %eax
jmp 0xf367
testq %rdi, %rdi
sets %cl
orq %rdi, %rsi
movabsq $-0x8000000000000000, %rax # imm = 0x8000000000000000
decq %rax
testq %rax, %rsi
sete %al
orb %cl, %al
movzbl %al, %eax
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_unordered
int float64_unordered(float64 a, float64 b, float_status *status)
{
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
        float_raise(float_flag_invalid, status);
        return 1;
    }
    return 0;
}

// Assembly:
movabsq $0x7ff0000000000000, %rcx # imm = 0x7FF0000000000000
movabsq $0xfffffffffffff, %rax  # imm = 0xFFFFFFFFFFFFF
cmpb $0x0, 0x5(%rdx)
je 0xf483
testq %rcx, %rdi
setne %r8b
testq %rax, %rdi
sete %r9b
orb %r8b, %r9b
jne 0xf46a
orb $0x40, 0x2(%rdx)
xorl %edi, %edi
testq %rcx, %rsi
setne %r8b
testq %rax, %rsi
sete %r9b
orb %r8b, %r9b
jne 0xf483
orb $0x40, 0x2(%rdx)
xorl %esi, %esi
movq %rdi, %r8
notq %r8
testq %r8, %rcx
sete %r8b
testq %rax, %rdi
setne %dil
testb %dil, %r8b
jne 0xf4b6
movq %rsi, %rdi
notq %rdi
testq %rdi, %rcx
setne %cl
testq %rax, %rsi
sete %sil
xorl %eax, %eax
orb %cl, %sil
jne 0xf4bf
orb $0x1, 0x2(%rdx)
movl $0x1, %eax
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: float64_unordered_quiet
int float64_unordered_quiet(float64 a, float64 b, float_status *status)
{
    a = float64_squash_input_denormal(a, status);
    b = float64_squash_input_denormal(b, status);

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
       ) {
        if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
            float_raise(float_flag_invalid, status);
        }
        return 1;
    }
    return 0;
}

// Assembly:
movabsq $0x7ff0000000000000, %rcx # imm = 0x7FF0000000000000
movabsq $0xfffffffffffff, %rax  # imm = 0xFFFFFFFFFFFFF
cmpb $0x0, 0x5(%rdx)
je 0xf822
testq %rcx, %rdi
setne %r8b
testq %rax, %rdi
sete %r9b
orb %r8b, %r9b
jne 0xf809
orb $0x40, 0x2(%rdx)
xorl %edi, %edi
testq %rcx, %rsi
setne %r8b
testq %rax, %rsi
sete %r9b
orb %r8b, %r9b
jne 0xf822
orb $0x40, 0x2(%rdx)
xorl %esi, %esi
movq %rdi, %r8
notq %r8
testq %r8, %rcx
sete %r8b
testq %rax, %rdi
setne %r9b
testb %r9b, %r8b
jne 0xf856
movq %rsi, %r8
notq %r8
testq %r8, %rcx
setne %r8b
testq %rax, %rsi
sete %r9b
xorl %eax, %eax
orb %r8b, %r9b
jne 0xf8a5
movabsq $0x7ff8000000000000, %rax # imm = 0x7FF8000000000000
movq %rdi, %r8
andq %rax, %r8
cmpq %rcx, %r8
sete %r8b
shlq $0xd, %rdi
setne %dil
testb %dil, %r8b
jne 0xf89c
movabsq $0x7ffffffffffff, %rdi  # imm = 0x7FFFFFFFFFFFF
andq %rsi, %rax
cmpq %rcx, %rax
setne %al
testq %rdi, %rsi
sete %cl
orb %al, %cl
movl $0x1, %eax
jne 0xf8a5
orb $0x1, 0x2(%rdx)
movl $0x1, %eax
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: floatx80_to_int32
int32 floatx80_to_int32(floatx80 a, float_status *status)
{
    flag aSign;
    int32 aExp, shiftCount;
    uint64_t aSig;

    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0;
    shiftCount = 0x4037 - aExp;
    if ( shiftCount <= 0 ) shiftCount = 1;
    shift64RightJamming( aSig, shiftCount, &aSig );
    return roundAndPackInt32(aSign, aSig, status);

}

// Assembly:
movl %esi, %eax
andl $0x7fff, %eax           # imm = 0x7FFF
movzwl %ax, %r8d
cmpl $0x3ff8, %eax           # imm = 0x3FF8
jb 0xf8e6
movl $0x4037, %eax           # imm = 0x4037
subl %r8d, %eax
cmpl $0x2, %eax
movl $0x1, %ecx
cmovgel %eax, %ecx
movq %rdi, %r9
shrq %cl, %r9
negb %cl
movq %rdi, %r10
shlq %cl, %r10
xorl %eax, %eax
testq %r10, %r10
setne %al
orq %r9, %rax
jmp 0xf8ee
xorl %eax, %eax
testq %rdi, %rdi
setne %al
shlq %rdi
movzwl %si, %esi
shrl $0xf, %esi
xorl %ecx, %ecx
testq %rdi, %rdi
cmovel %esi, %ecx
cmpl $0x7fff, %r8d           # imm = 0x7FFF
cmovnel %esi, %ecx
movl %ecx, %edi
movq %rax, %rsi
jmp 0xa573
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: floatx80_to_int32_round_to_zero
int32 floatx80_to_int32_round_to_zero(floatx80 a, float_status *status)
{
    flag aSign;
    int32 aExp, shiftCount;
    uint64_t aSig, savedASig;
    int32_t z;

    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( 0x401E < aExp ) {
        if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0;
        goto invalid;
    }
    else if ( aExp < 0x3FFF ) {
        if (aExp || aSig) {
            status->float_exception_flags |= float_flag_inexact;
        }
        return 0;
    }
    shiftCount = 0x403E - aExp;
    savedASig = aSig;
    aSig >>= shiftCount;
    z = aSig;
    if ( aSign ) z = - z;
    if ( ( z < 0 ) ^ aSign ) {
 invalid:
        float_raise(float_flag_invalid, status);
        return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
    }
    if ( ( aSig<<shiftCount ) != savedASig ) {
        status->float_exception_flags |= float_flag_inexact;
    }
    return z;

}

// Assembly:
movzwl %si, %r8d
movl %esi, %r9d
andl $0x7fff, %r9d           # imm = 0x7FFF
shrl $0xf, %r8d
cmpl $0x401f, %r9d           # imm = 0x401F
jb 0xf95b
shlq %rdi
movzbl %r8b, %eax
xorl %r8d, %r8d
testq %rdi, %rdi
cmovel %eax, %r8d
cmpl $0x7fff, %r9d           # imm = 0x7FFF
cmovnel %eax, %r8d
orb $0x1, 0x2(%rdx)
cmpb $0x1, %r8b
movl $0x80000000, %eax       # imm = 0x80000000
sbbl $0x0, %eax
retq
cmpl $0x3ffe, %r9d           # imm = 0x3FFE
ja 0xf970
xorl %eax, %eax
orq %r9, %rdi
je 0xf96f
orb $0x20, 0x2(%rdx)
retq
movl $0x403e, %ecx           # imm = 0x403E
subl %r9d, %ecx
movq %rdi, %r9
shrq %cl, %r9
movl %r9d, %eax
negl %eax
testw %si, %si
cmovnsl %r9d, %eax
movl %eax, %esi
shrl $0x1f, %esi
movzwl %r8w, %r10d
cmpl %r10d, %esi
jne 0xf94a
shlq %cl, %r9
cmpq %rdi, %r9
jne 0xf96b
jmp 0xf96f
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: floatx80_to_int64
int64 floatx80_to_int64(floatx80 a, float_status *status)
{
    flag aSign;
    int32 aExp, shiftCount;
    uint64_t aSig, aSigExtra;

    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    shiftCount = 0x403E - aExp;
    if ( shiftCount <= 0 ) {
        if ( shiftCount ) {
            float_raise(float_flag_invalid, status);
            if (    ! aSign
                 || (    ( aExp == 0x7FFF )
                      && ( aSig != LIT64( 0x8000000000000000 ) ) )
               ) {
                return LIT64( 0x7FFFFFFFFFFFFFFF );
            }
            return (int64_t) LIT64( 0x8000000000000000 );
        }
        aSigExtra = 0;
    }
    else {
        shift64ExtraRightJamming( aSig, 0, shiftCount, &aSig, &aSigExtra );
    }
    return roundAndPackInt64(aSign, aSig, aSigExtra, status);

}

// Assembly:
movq %rdx, %r8
movq %rdi, %rdx
movl %esi, %edi
andl $0x7fff, %edi           # imm = 0x7FFF
cmpl $0x403e, %edi           # imm = 0x403E
jb 0xf9c7
cmpl $0x403e, %edi           # imm = 0x403E
jne 0xf9e5
movq %rdx, %rcx
xorl %edx, %edx
jmp 0xfa13
cmpl $0x3fff, %edi           # imm = 0x3FFF
jb 0xf9fa
leal 0x2(%rdi), %ecx
movq %rdx, %rax
shlq %cl, %rax
movb $0x3e, %cl
subb %dil, %cl
shrq %cl, %rdx
movq %rdx, %rcx
jmp 0xfa10
movabsq $0x7fffffffffffffff, %rax # imm = 0x7FFFFFFFFFFFFFFF
orb $0x1, 0x2(%r8)
testw %si, %si
js 0xfa27
retq
cmpl $0x3ffe, %edi           # imm = 0x3FFE
jne 0xfa06
xorl %ecx, %ecx
jmp 0xfa13
xorl %eax, %eax
testq %rdx, %rdx
setne %al
xorl %ecx, %ecx
movq %rax, %rdx
movzwl %si, %eax
shrl $0xf, %eax
movzbl %al, %edi
movq %rcx, %rsi
movq %r8, %rcx
jmp 0xa825
leaq 0x1(%rax), %rcx
cmpq %rcx, %rdx
cmoveq %rcx, %rax
cmpl $0x7fff, %edi           # imm = 0x7FFF
cmovneq %rcx, %rax
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: floatx80_to_int64_round_to_zero
int64 floatx80_to_int64_round_to_zero(floatx80 a, float_status *status)
{
    flag aSign;
    int32 aExp, shiftCount;
    uint64_t aSig;
    int64 z;

    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    shiftCount = aExp - 0x403E;
    if ( 0 <= shiftCount ) {
        aSig &= LIT64( 0x7FFFFFFFFFFFFFFF );
        if ( ( a.high != 0xC03E ) || aSig ) {
            float_raise(float_flag_invalid, status);
            if ( ! aSign || ( ( aExp == 0x7FFF ) && aSig ) ) {
                return LIT64( 0x7FFFFFFFFFFFFFFF );
            }
        }
        return (int64_t) LIT64( 0x8000000000000000 );
    }
    else if ( aExp < 0x3FFF ) {
        if (aExp | aSig) {
            status->float_exception_flags |= float_flag_inexact;
        }
        return 0;
    }
    z = aSig>>( - shiftCount );
    if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) {
        status->float_exception_flags |= float_flag_inexact;
    }
    if ( aSign ) z = - z;
    return z;

}

// Assembly:
movl %esi, %r8d
andl $0x7fff, %r8d           # imm = 0x7FFF
cmpl $0x403e, %r8d           # imm = 0x403E
jb 0xfa9f
movabsq $0x7fffffffffffffff, %rax # imm = 0x7FFFFFFFFFFFFFFF
movzwl %si, %ecx
cmpl $0xc03e, %ecx           # imm = 0xC03E
setne %cl
leaq (,%rdi,2), %r9
testq %r9, %r9
setne %r9b
orb %cl, %r9b
cmpb $0x1, %r9b
jne 0xfa9b
testq %rax, %rdi
setne %cl
orb $0x1, 0x2(%rdx)
cmpl $0x7fff, %r8d           # imm = 0x7FFF
sete %dl
testw %si, %si
jns 0xfae1
andb %cl, %dl
jne 0xfae1
incq %rax
retq
cmpl $0x3ffe, %r8d           # imm = 0x3FFE
ja 0xfab7
movl %r8d, %eax
orq %rdi, %rax
je 0xfab4
orb $0x20, 0x2(%rdx)
xorl %eax, %eax
retq
leal 0x2(%r8), %eax
movb $0x3e, %cl
subb %r8b, %cl
movq %rdi, %r8
shrq %cl, %r8
movl %eax, %ecx
shlq %cl, %rdi
testq %rdi, %rdi
je 0xfad4
orb $0x20, 0x2(%rdx)
movq %r8, %rax
negq %rax
testw %si, %si
cmovnsq %r8, %rax
retq
// File: /workspace/github_c_makefile_star2_O3/mbitsnbites[P]SoftFP/softfloat.c
// Function: floatx80_to_float32
float32 floatx80_to_float32(floatx80 a, float_status *status)
{
    flag aSign;
    int32 aExp;
    uint64_t aSig;

    aSig = extractFloatx80Frac( a );
    aExp = extractFloatx80Exp( a );
    aSign = extractFloatx80Sign( a );
    if ( aExp == 0x7FFF ) {
        if ( (uint64_t) ( aSig<<1 ) ) {
            return commonNaNToFloat32(floatx80ToCommonNaN(a, status), status);
        }
        return packFloat32( aSign, 0xFF, 0 );
    }
    shift64RightJamming( aSig, 33, &aSig );
    if ( aExp || aSig ) aExp -= 0x3F81;
    return roundAndPackFloat32(aSign, aExp, aSig, status);

}

// Assembly:
movq %rdx, %rcx
movzwl %si, %eax
movl $0x7fff, %edx           # imm = 0x7FFF
andl %edx, %esi
shrl $0xf, %eax
cmpl %edx, %esi
jne 0xfb68
leaq (,%rdi,2), %rdx
testq %rdx, %rdx
je 0xfba0
movabsq $0x7fffffffffffffff, %rdx # imm = 0x7FFFFFFFFFFFFFFF
leaq (,%rdi,4), %rsi
testq %rsi, %rsi
je 0xfb34
movabsq $0x3fffffffffffffff, %rsi # imm = 0x3FFFFFFFFFFFFFFF
incq %rsi
andq %rdi, %rsi
jne 0xfb34
orb $0x1, 0x2(%rcx)
leaq (%rdi,%rdi), %rsi
incq %rdx
shll $0x1f, %eax
testq %rdi, %rdi
cmovsq %rsi, %rdx
movl $0x80000000, %esi       # imm = 0x80000000
cmovsl %eax, %esi
shrq $0x29, %rdx
leal 0x7f800000(%rsi,%rdx), %eax
movl $0x7fc00000, %edx       # imm = 0x7FC00000
cmovel %edx, %eax
cmpb $0x0, 0x6(%rcx)
cmovnel %edx, %eax
retq
movzwl %si, %r8d
movq %rdi, %rsi
shrq $0x21, %rsi
xorl %edx, %edx
shlq $0x1f, %rdi
setne %dl
orq %rsi, %rdx
leaq -0x3f81(%r8), %rdi
testq %rdx, %rdx
movq %rdi, %rsi
cmoveq %rdx, %rsi
testw %r8w, %r8w
cmovneq %rdi, %rsi
movzwl %ax, %edi
jmp 0x9f46
shll $0x1f, %eax
orl $0x7f800000, %eax       # imm = 0x7F800000
retq