// File: /workspace/github_c_makefile_star2_O0/Ihsoh[P]ilang/compiler/assembler/ins_enc.c
// Function: ins_enc_Ap
void ins_enc_Ap(
	Instruction *ins,
	InstructionEncoderData *data
) {
	_CHECK_PARAMS(1);

	ParserASTNode *ins_node = data->ins_node;

	ParserASTNode *oprd = ins_node->childs[0];

	EncoderInstruction enc_ins;
	
	ins_init(data->ctx, ins, ins_node, &enc_ins);

	int addr_size = ASM_DIRECT_ADDRESS_AST_NODE_GET_ADDR_SIZE(oprd);

	uint64_t base = ASM_DIRECT_ADDRESS_AST_NODE_GET_BASE(oprd);
	uint64_t offset = ASM_DIRECT_ADDRESS_AST_NODE_GET_OFFSET(oprd);

	switch (ASM_PARSER_CONTEXT_DATA_GET_ARCH(data->ctx)) {
		case ASM_ARCH_BIT16: {
			if (addr_size == ASM_MEM_ADDR_SIZE_UNKNOWN
					|| addr_size == ASM_MEM_ADDR_SIZE_16) {
				ins_add_uint16_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint16_t) offset
				);

				ins_add_uint16_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint16_t) base
				);
			} else if (addr_size == ASM_MEM_ADDR_SIZE_32) {
				enc_ins.legacy_prefix.operand_size_override = true;

				ins_add_uint32_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint32_t) offset
				);

				ins_add_uint16_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint16_t) base
				);
			} else {
				assert(0);
			}
			break;
		}
		case ASM_ARCH_BIT32: {
			if (addr_size == ASM_MEM_ADDR_SIZE_16) {
				enc_ins.legacy_prefix.operand_size_override = true;

				ins_add_uint16_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint16_t) offset
				);

				ins_add_uint16_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint16_t) base
				);
			} else if (addr_size == ASM_MEM_ADDR_SIZE_32
					|| addr_size == ASM_MEM_ADDR_SIZE_UNKNOWN) {
				ins_add_uint32_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint32_t) offset
				);

				ins_add_uint16_to_ext(
					data->ctx,
					ins,
					&enc_ins,
					(uint16_t) base
				);
			} else {
				assert(0);
			}
			break;
		}
		case ASM_ARCH_BIT64: {
			data->ctx->syntax_error_node_msg(
				data->ctx,
				ins_node,
				"instruction not supported in 64-bit mode."
			);
			break;
		}
		default: {
			assert(0);
			break;
		}
	}

	_output(data, &enc_ins);
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0xa0, %rsp
movq %rdi, -0x8(%rbp)
movq %rsi, -0x10(%rbp)
cmpq $0x0, -0x8(%rbp)
je 0x2423c
jmp 0x2425b
leaq 0x258c3(%rip), %rdi     # 0x49b06
leaq 0x26dd6(%rip), %rsi     # 0x4b020
movl $0x837, %edx            # imm = 0x837
leaq 0x27ce7(%rip), %rcx     # 0x4bf3d
callq 0xa0b0
cmpq $0x0, -0x10(%rbp)
je 0x24264
jmp 0x24283
leaq 0x2bd84(%rip), %rdi     # 0x4ffef
leaq 0x26dae(%rip), %rsi     # 0x4b020
movl $0x837, %edx            # imm = 0x837
leaq 0x27cbf(%rip), %rcx     # 0x4bf3d
callq 0xa0b0
movq -0x10(%rbp), %rax
cmpq $0x0, (%rax)
je 0x2428f
jmp 0x242ae
leaq 0x26de7(%rip), %rdi     # 0x4b07d
leaq 0x26d83(%rip), %rsi     # 0x4b020
movl $0x837, %edx            # imm = 0x837
leaq 0x27c94(%rip), %rcx     # 0x4bf3d
callq 0xa0b0
movq -0x10(%rbp), %rax
movq (%rax), %rax
cmpl $0x1, 0x44(%rax)
jne 0x242bd
jmp 0x242dc
leaq 0x2703a(%rip), %rdi     # 0x4b2fe
leaq 0x26d55(%rip), %rsi     # 0x4b020
movl $0x837, %edx            # imm = 0x837
leaq 0x27c66(%rip), %rcx     # 0x4bf3d
callq 0xa0b0
movq -0x10(%rbp), %rax
movq (%rax), %rax
movq %rax, -0x18(%rbp)
movq -0x18(%rbp), %rax
movq 0x48(%rax), %rax
movq (%rax), %rax
movq %rax, -0x20(%rbp)
movq -0x10(%rbp), %rax
movq 0x8(%rax), %rdi
movq -0x8(%rbp), %rsi
movq -0x18(%rbp), %rdx
leaq -0x80(%rbp), %rcx
callq 0x1a9e0
movq -0x20(%rbp), %rax
movl 0x60(%rax), %eax
movl %eax, -0x84(%rbp)
movq -0x20(%rbp), %rax
movq 0x70(%rax), %rax
movq %rax, -0x90(%rbp)
movq -0x20(%rbp), %rax
movq 0x80(%rax), %rax
movq %rax, -0x98(%rbp)
movq -0x10(%rbp), %rax
movq 0x8(%rax), %rax
movl 0xb0(%rax), %eax
movl %eax, -0x9c(%rbp)
subl $0x1, %eax
je 0x2437d
jmp 0x24358
movl -0x9c(%rbp), %eax
subl $0x2, %eax
je 0x24441
jmp 0x24369
movl -0x9c(%rbp), %eax
subl $0x4, %eax
je 0x24502
jmp 0x24525
cmpl $0x0, -0x84(%rbp)
je 0x2438f
cmpl $0x1, -0x84(%rbp)
jne 0x243cf
movq -0x10(%rbp), %rax
movq 0x8(%rax), %rdi
movq -0x8(%rbp), %rsi
movq -0x98(%rbp), %rax
leaq -0x80(%rbp), %rdx
movzwl %ax, %ecx
callq 0x1be20
movq -0x10(%rbp), %rax
movq 0x8(%rax), %rdi
movq -0x8(%rbp), %rsi
movq -0x90(%rbp), %rax
leaq -0x80(%rbp), %rdx
movzwl %ax, %ecx
callq 0x1be20
jmp 0x2443c
cmpl $0x2, -0x84(%rbp)
jne 0x2441b
movb $0x1, -0x75(%rbp)
movq -0x10(%rbp), %rax
movq 0x8(%rax), %rdi
movq -0x8(%rbp), %rsi
movq -0x98(%rbp), %rax
movl %eax, %ecx
leaq -0x80(%rbp), %rdx
callq 0x1be80
movq -0x10(%rbp), %rax
movq 0x8(%rax), %rdi
movq -0x8(%rbp), %rsi
movq -0x90(%rbp), %rax
leaq -0x80(%rbp), %rdx
movzwl %ax, %ecx
callq 0x1be20
jmp 0x2443a
leaq 0x23043(%rip), %rdi     # 0x47465
leaq 0x26bf7(%rip), %rsi     # 0x4b020
movl $0x868, %edx            # imm = 0x868
leaq 0x27b08(%rip), %rcx     # 0x4bf3d
callq 0xa0b0
jmp 0x2443c
jmp 0x24544
cmpl $0x1, -0x84(%rbp)
jne 0x2448e
movb $0x1, -0x75(%rbp)
movq -0x10(%rbp), %rax
movq 0x8(%rax), %rdi
movq -0x8(%rbp), %rsi
movq -0x98(%rbp), %rax
leaq -0x80(%rbp), %rdx
movzwl %ax, %ecx
callq 0x1be20
movq -0x10(%rbp), %rax
movq 0x8(%rax), %rdi
movq -0x8(%rbp), %rsi
movq -0x90(%rbp), %rax
leaq -0x80(%rbp), %rdx
movzwl %ax, %ecx
callq 0x1be20
jmp 0x24500
cmpl $0x2, -0x84(%rbp)
je 0x244a0
cmpl $0x0, -0x84(%rbp)
jne 0x244df
movq -0x10(%rbp), %rax
movq 0x8(%rax), %rdi
movq -0x8(%rbp), %rsi
movq -0x98(%rbp), %rax
movl %eax, %ecx
leaq -0x80(%rbp), %rdx
callq 0x1be80
movq -0x10(%rbp), %rax
movq 0x8(%rax), %rdi
movq -0x8(%rbp), %rsi
movq -0x90(%rbp), %rax
leaq -0x80(%rbp), %rdx
movzwl %ax, %ecx
callq 0x1be20
jmp 0x244fe
leaq 0x22f7f(%rip), %rdi     # 0x47465
leaq 0x26b33(%rip), %rsi     # 0x4b020
movl $0x88d, %edx            # imm = 0x88D
leaq 0x27a44(%rip), %rcx     # 0x4bf3d
callq 0xa0b0
jmp 0x24500
jmp 0x24544
movq -0x10(%rbp), %rax
movq 0x8(%rax), %rax
movq 0x58(%rax), %rax
movq -0x10(%rbp), %rcx
movq 0x8(%rcx), %rdi
movq -0x18(%rbp), %rsi
leaq 0x26e3d(%rip), %rdx     # 0x4b35e
callq *%rax
jmp 0x24544
leaq 0x22f39(%rip), %rdi     # 0x47465
leaq 0x26aed(%rip), %rsi     # 0x4b020
movl $0x89a, %edx            # imm = 0x89A
leaq 0x279fe(%rip), %rcx     # 0x4bf3d
callq 0xa0b0
movq -0x10(%rbp), %rdi
leaq -0x80(%rbp), %rsi
callq 0x1e570
addq $0xa0, %rsp
popq %rbp
retq
nopw (%rax,%rax)