// File: /workspace/github_c_makefile_star2_O3/samtools[P]htslib/htscodecs/htscodecs/rANS_static32x16pr_avx2.c
// Function: rans_uncompress_O0_32x16_avx2
unsigned char *rans_uncompress_O0_32x16_avx2(unsigned char *in,
                                             unsigned int in_size,
                                             unsigned char *out,
                                             unsigned int out_sz) {
    if (in_size < 16) // 4-states at least
        return NULL;

    if (out_sz >= INT_MAX)
        return NULL; // protect against some overflow cases

#ifdef FUZZING_BUILD_MODE_UNSAFE_FOR_PRODUCTION
    if (out_sz > 100000)
        return NULL;
#endif

    /* Load in the static tables */
    unsigned char *cp = in, *out_free = NULL;
    unsigned char *cp_end = in + in_size;
    int i;
    uint32_t s3[TOTFREQ] __attribute__((aligned(32))); // For TF_SHIFT <= 12

    if (!out)
        out_free = out = malloc(out_sz);
    if (!out)
        return NULL;

    // Precompute reverse lookup of frequency.
    uint32_t F[256] = {0}, fsum;
    int fsz = decode_freq(cp, cp_end, F, &fsum);
    if (!fsz)
        goto err;
    cp += fsz;

    normalise_freq_shift(F, fsum, TOTFREQ);

    // Build symbols; fixme, do as part of decode, see the _d variant
    if (rans_F_to_s3(F, TF_SHIFT, s3))
        goto err;

    if (cp_end - cp < NX * 4)
        goto err;

    int z;
    RansState R[NX] __attribute__((aligned(32)));
    for (z = 0; z < NX; z++) {
        RansDecInit(&R[z], &cp);
        if (R[z] < RANS_BYTE_L)
            goto err;
    }

    uint16_t *sp = (uint16_t *)cp;
    uint8_t overflow[64+64] = {0};
    cp_end -= 64;

    // Protect against running off the end of in buffer.
    // We copy it to a worst-case local buffer when near the end.
    if ((uint8_t *)sp > cp_end) {
        memmove(overflow, sp, cp_end+64 - (uint8_t *)sp);
        sp = (uint16_t *)overflow;
        cp_end = overflow + sizeof(overflow) - 64;
    }

    int out_end = (out_sz&~(NX-1));
    const uint32_t mask = (1u << TF_SHIFT)-1;

    __m256i maskv  = _mm256_set1_epi32(mask); // set mask in all lanes
    LOAD(Rv, R);

    for (i=0; i < out_end; i+=NX) {
        //for (z = 0; z < NX; z++)
        //  m[z] = R[z] & mask;
        __m256i masked1 = _mm256_and_si256(Rv1, maskv);
	__m256i masked2 = _mm256_and_si256(Rv2, maskv);
        __m256i masked3 = _mm256_and_si256(Rv3, maskv);
        __m256i masked4 = _mm256_and_si256(Rv4, maskv);

	//  S[z] = s3[m[z]];
	__m256i Sv1 = _mm256_i32gather_epi32x((int *)s3, masked1, sizeof(*s3));
        __m256i Sv2 = _mm256_i32gather_epi32x((int *)s3, masked2, sizeof(*s3));
        __m256i Sv3 = _mm256_i32gather_epi32x((int *)s3, masked3, sizeof(*s3));
        __m256i Sv4 = _mm256_i32gather_epi32x((int *)s3, masked4, sizeof(*s3));

        //  f[z] = S[z]>>(TF_SHIFT+8);
        __m256i fv1 = _mm256_srli_epi32(Sv1, TF_SHIFT+8);
        __m256i fv2 = _mm256_srli_epi32(Sv2, TF_SHIFT+8);

        //  b[z] = (S[z]>>8) & mask;
        __m256i bv1 = _mm256_and_si256(_mm256_srli_epi32(Sv1, 8), maskv);
        __m256i bv2 = _mm256_and_si256(_mm256_srli_epi32(Sv2, 8), maskv);

        //  s[z] = S[z] & 0xff;
        __m256i sv1 = _mm256_and_si256(Sv1, _mm256_set1_epi32(0xff));
        __m256i sv2 = _mm256_and_si256(Sv2, _mm256_set1_epi32(0xff));

        //  R[z] = f[z] * (R[z] >> TF_SHIFT) + b[z];
        Rv1 = _mm256_add_epi32(
                  _mm256_mullo_epi32(
                      _mm256_srli_epi32(Rv1,TF_SHIFT), fv1), bv1);
        Rv2 = _mm256_add_epi32(
                  _mm256_mullo_epi32(
                      _mm256_srli_epi32(Rv2,TF_SHIFT), fv2), bv2);

        // Tricky one:  out[i+z] = s[z];
        //             ---h---g ---f---e  ---d---c ---b---a
        //             ---p---o ---n---m  ---l---k ---j---i
        // packs_epi32 -p-o-n-m -h-g-f-e  -l-k-j-i -d-c-b-a
        // permute4x64 -p-o-n-m -l-k-j-i  -h-g-f-e -d-c-b-a
        // packs_epi16 ponmlkji ponmlkji  hgfedcba hgfedcba
        sv1 = _mm256_packus_epi32(sv1, sv2);
        sv1 = _mm256_permute4x64_epi64(sv1, 0xd8);

        // Protect against running off the end of in buffer.
        // We copy it to a worst-case local buffer when near the end.
        if ((uint8_t *)sp > cp_end) {
            memmove(overflow, sp, cp_end+64 - (uint8_t *)sp);
            sp = (uint16_t *)overflow;
            cp_end = overflow + sizeof(overflow) - 64;
        }

        __m256i Vv1 = _mm256_cvtepu16_epi32(_mm_loadu_si128((__m128i *)sp));
        sv1 = _mm256_packus_epi16(sv1, sv1);

        // c =  R[z] < RANS_BYTE_L;

// The lack of unsigned comparisons means we have to jump through hoops.
// in AVX2 land the second version comes out best (and first in SSE land).

//#define _mm256_cmplt_epu32_imm(a,b) _mm256_andnot_si256(_mm256_cmpeq_epi32(_mm256_max_epu32((a),_mm256_set1_epi32(b)), (a)), _mm256_set1_epi32(-1));

#define _mm256_cmplt_epu32_imm(a,b) _mm256_cmpgt_epi32(_mm256_set1_epi32((b)-0x80000000), _mm256_xor_si256((a), _mm256_set1_epi32(0x80000000)))

        __m256i renorm_mask1, renorm_mask2;
        renorm_mask1 = _mm256_cmplt_epu32_imm(Rv1, RANS_BYTE_L);
        renorm_mask2 = _mm256_cmplt_epu32_imm(Rv2, RANS_BYTE_L);

        // y = (R[z] << 16) | V[z];
        unsigned int imask1 = _mm256_movemask_ps((__m256)renorm_mask1);
        __m256i idx1 = _mm256_load_si256((const __m256i*)permute[imask1]);
        __m256i Yv1 = _mm256_slli_epi32(Rv1, 16);
        Vv1 = _mm256_permutevar8x32_epi32(Vv1, idx1);
        __m256i Yv2 = _mm256_slli_epi32(Rv2, 16);

        // Shuffle the renorm values to correct lanes and incr sp pointer
        unsigned int imask2 = _mm256_movemask_ps((__m256)renorm_mask2);
        sp += _mm_popcnt_u32(imask1);

        __m256i idx2 = _mm256_load_si256((const __m256i*)permute[imask2]);
        __m256i Vv2 = _mm256_cvtepu16_epi32(_mm_loadu_si128((__m128i *)sp));
        sp += _mm_popcnt_u32(imask2);

        Yv1 = _mm256_or_si256(Yv1, Vv1);
        Vv2 = _mm256_permutevar8x32_epi32(Vv2, idx2);
        Yv2 = _mm256_or_si256(Yv2, Vv2);

        // R[z] = c ? Y[z] : R[z];
        Rv1 = _mm256_blendv_epi8(Rv1, Yv1, renorm_mask1);
        Rv2 = _mm256_blendv_epi8(Rv2, Yv2, renorm_mask2);

        // ------------------------------------------------------------
        //  f[z] = S[z]>>(TF_SHIFT+8);
        __m256i fv3 = _mm256_srli_epi32(Sv3, TF_SHIFT+8);
        __m256i fv4 = _mm256_srli_epi32(Sv4, TF_SHIFT+8);

        //  b[z] = (S[z]>>8) & mask;
        __m256i bv3 = _mm256_and_si256(_mm256_srli_epi32(Sv3, 8), maskv);
        __m256i bv4 = _mm256_and_si256(_mm256_srli_epi32(Sv4, 8), maskv);

        //  s[z] = S[z] & 0xff;
        __m256i sv3 = _mm256_and_si256(Sv3, _mm256_set1_epi32(0xff));
        __m256i sv4 = _mm256_and_si256(Sv4, _mm256_set1_epi32(0xff));

        //  R[z] = f[z] * (R[z] >> TF_SHIFT) + b[z];
        Rv3 = _mm256_add_epi32(_mm256_mullo_epi32(_mm256_srli_epi32(Rv3,TF_SHIFT),fv3),bv3);
        Rv4 = _mm256_add_epi32(_mm256_mullo_epi32(_mm256_srli_epi32(Rv4,TF_SHIFT),fv4),bv4);

        // Tricky one:  out[i+z] = s[z];
        //             ---h---g ---f---e  ---d---c ---b---a
        //             ---p---o ---n---m  ---l---k ---j---i
        // packs_epi32 -p-o-n-m -h-g-f-e  -l-k-j-i -d-c-b-a
        // permute4x64 -p-o-n-m -l-k-j-i  -h-g-f-e -d-c-b-a
        // packs_epi16 ponmlkji ponmlkji  hgfedcba hgfedcba
        sv3 = _mm256_packus_epi32(sv3, sv4);
        sv3 = _mm256_permute4x64_epi64(sv3, 0xd8);

        // c =  R[z] < RANS_BYTE_L;
        __m256i renorm_mask3, renorm_mask4;
        renorm_mask3 = _mm256_cmplt_epu32_imm(Rv3, RANS_BYTE_L);
        sv3 = _mm256_packus_epi16(sv3, sv3);
        renorm_mask4 = _mm256_cmplt_epu32_imm(Rv4, RANS_BYTE_L);

        // y = (R[z] << 16) | V[z];
        __m256i Vv3 = _mm256_cvtepu16_epi32(_mm_loadu_si128((__m128i *)sp));

        *(uint64_t *)&out[i+0]  = _mm256_extract_epi64(sv1, 0);
        *(uint64_t *)&out[i+8]  = _mm256_extract_epi64(sv1, 2);
        *(uint64_t *)&out[i+16] = _mm256_extract_epi64(sv3, 0);
        *(uint64_t *)&out[i+24] = _mm256_extract_epi64(sv3, 2);

        __m256i Yv3 = _mm256_slli_epi32(Rv3, 16);
        unsigned int imask3 = _mm256_movemask_ps((__m256)renorm_mask3);
        __m256i idx3 = _mm256_load_si256((const __m256i*)permute[imask3]);

        // Shuffle the renorm values to correct lanes and incr sp pointer
        Vv3 = _mm256_permutevar8x32_epi32(Vv3, idx3);
        __m256i Yv4 = _mm256_slli_epi32(Rv4, 16);
        unsigned int imask4 = _mm256_movemask_ps((__m256)renorm_mask4);
        sp += _mm_popcnt_u32(imask3);

        __m256i idx4 = _mm256_load_si256((const __m256i*)permute[imask4]);
        __m256i Vv4 = _mm256_cvtepu16_epi32(_mm_loadu_si128((__m128i *)sp));

        //Vv = _mm256_and_si256(Vv, renorm_mask);  (blend does the AND anyway)
        Yv3 = _mm256_or_si256(Yv3, Vv3);
        Vv4 = _mm256_permutevar8x32_epi32(Vv4, idx4);
        Yv4 = _mm256_or_si256(Yv4, Vv4);
        sp += _mm_popcnt_u32(imask4);

        // R[z] = c ? Y[z] : R[z];
        Rv3 = _mm256_blendv_epi8(Rv3, Yv3, renorm_mask3);
        Rv4 = _mm256_blendv_epi8(Rv4, Yv4, renorm_mask4);
    }

    STORE(Rv, R);
    //_mm256_store_si256((__m256i *)&R[0], Rv1);
    //_mm256_store_si256((__m256i *)&R[8], Rv2);
    //_mm256_store_si256((__m256i *)&R[16], Rv3);
    //_mm256_store_si256((__m256i *)&R[24], Rv4);

    for (z = out_sz & (NX-1); z-- > 0; )
      out[out_end + z] = s3[R[z] & mask];

    //fprintf(stderr, "    0 Decoded %d bytes\n", (int)(cp-in)); //c-size

    return out;

 err:
    free(out_free);
    return NULL;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
andq $-0x20, %rsp
subq $0x46c0, %rsp           # imm = 0x46C0
movl %ecx, %r14d
cmpl $0x10, %esi
setb %al
cmpl $0x7fffffff, %ecx       # imm = 0x7FFFFFFF
setae %cl
orb %al, %cl
jne 0x68c0c
movl %esi, %r15d
movq %rdi, %rbx
xorl %r13d, %r13d
testq %rdx, %rdx
je 0x68362
xorl %eax, %eax
jmp 0x68376
movl %r14d, %edi
callq 0x4680
movq %rax, %rdx
testq %rax, %rax
je 0x68c0c
movq %r14, 0x30(%rsp)
movq %rax, 0x40(%rsp)
movq %rdx, 0x28(%rsp)
movl %r15d, %r12d
leaq (%rbx,%r12), %r15
leaq 0x2a0(%rsp), %rdi
movl $0x400, %edx            # imm = 0x400
xorl %esi, %esi
callq 0x4260
leaq 0x1(%rbx), %rax
movzbl (%rbx), %ecx
xorl %edx, %edx
movl %ecx, %esi
movl $0x1, 0x2a0(%rsp,%rsi,4)
testl %edx, %edx
je 0x683cc
cmpl $0xfe, %ecx
jg 0x6844f
decl %edx
incl %ecx
jmp 0x683e6
incl %ecx
movzbl (%rax), %esi
cmpl %esi, %ecx
jne 0x683df
movzbl 0x1(%rax), %edx
addq $0x2, %rax
jmp 0x683e6
incq %rax
xorl %edx, %edx
movl %esi, %ecx
testl %ecx, %ecx
je 0x683f3
leaq 0x2(%rax), %rsi
cmpq %r15, %rsi
jb 0x683a9
testl %ecx, %ecx
je 0x6844a
xorl %r13d, %r13d
movl %ecx, %esi
movl $0x1, 0x2a0(%rsp,%rsi,4)
cmpq %r15, %rax
jae 0x6844f
testl %edx, %edx
je 0x6841e
cmpl $0xfe, %ecx
jg 0x6844f
decl %edx
incl %ecx
jmp 0x68441
incl %ecx
movzbl (%rax), %esi
leaq 0x1(%rax), %rdi
xorl %edx, %edx
cmpl %esi, %ecx
jne 0x6843c
cmpq %r15, %rdi
jae 0x6844f
movzbl 0x1(%rax), %edx
addq $0x2, %rax
jmp 0x68441
movq %rdi, %rax
movl %esi, %ecx
testl %ecx, %ecx
je 0x6844a
cmpq %r15, %rax
jb 0x683fa
subl %ebx, %eax
movslq %eax, %r13
addq %rbx, %r13
xorl %ecx, %ecx
xorl %eax, %eax
cmpl $0x0, 0x2a0(%rsp,%rcx,4)
je 0x684d6
movq %r15, %rdx
subq %r13, %rdx
cmpq $0x6, %rdx
jl 0x684a6
xorl %edi, %edi
xorl %edx, %edx
movzbl (%r13,%rdi), %r8d
movl %edx, %esi
shll $0x7, %esi
movl %r8d, %edx
andl $0x7f, %edx
orl %esi, %edx
leaq 0x1(%rdi), %rsi
testb %r8b, %r8b
jns 0x68494
cmpl $0x5, %edi
movq %rsi, %rdi
jne 0x68470
addq %r13, %rsi
movl %edx, 0x2a0(%rsp,%rcx,4)
subl %r13d, %esi
movslq %esi, %rsi
jmp 0x684d1
cmpq %r15, %r13
jae 0x684c2
movsbl (%r13), %edx
testl %edx, %edx
js 0x684e8
movl %edx, 0x2a0(%rsp,%rcx,4)
movl $0x1, %esi
jmp 0x684d1
movl $0x0, 0x2a0(%rsp,%rcx,4)
xorl %edx, %edx
xorl %esi, %esi
addq %rsi, %r13
addl %edx, %eax
incq %rcx
cmpq $0x100, %rcx            # imm = 0x100
jne 0x68456
jmp 0x6850e
xorl %edx, %edx
movq %r13, %rsi
movzbl (%rsi), %edi
incq %rsi
movl %edx, %r8d
shll $0x7, %r8d
movl %edi, %edx
andl $0x7f, %edx
orl %r8d, %edx
testb %dil, %dil
jns 0x68497
cmpq %r15, %rsi
jb 0x684ed
jmp 0x68497
subq %rbx, %r13
testl %r13d, %r13d
je 0x68bff
movslq %r13d, %rcx
testl $0xffffefff, %eax       # imm = 0xFFFFEFFF
je 0x6856b
xorl %edx, %edx
cmpl $0xfff, %eax            # imm = 0xFFF
ja 0x6853d
xorl %edx, %edx
leal (%rax,%rax), %esi
incl %edx
cmpl $0x800, %eax            # imm = 0x800
movl %esi, %eax
jb 0x6852f
vmovd %edx, %xmm0
vpbroadcastd %xmm0, %ymm0
xorl %eax, %eax
vmovdqu 0x2a0(%rsp,%rax,4), %ymm1
vpsllvd %ymm0, %ymm1, %ymm1
vmovdqu %ymm1, 0x2a0(%rsp,%rax,4)
addq $0x8, %rax
cmpq $0x100, %rax            # imm = 0x100
jne 0x68548
addq %rcx, %rbx
xorl %eax, %eax
xorl %edx, %edx
movl 0x2a0(%rsp,%rax,4), %esi
movl $0x1000, %edi           # imm = 0x1000
subl %edx, %edi
leal -0x1(%rsi), %r8d
cmpl %edi, %r8d
jae 0x685a6
movl %esi, %edi
shll $0x14, %edi
addl %eax, %edi
movslq %edx, %rdx
movl %edi, 0x6a0(%rsp,%rdx,4)
incl %edx
addl $0x100, %edi            # imm = 0x100
decl %esi
jne 0x68590
incq %rax
cmpq $0x100, %rax            # imm = 0x100
jne 0x68572
cmpl $0x1000, %edx           # imm = 0x1000
jne 0x68bff
subq %rcx, %r12
cmpq $0x80, %r12
jl 0x68bff
xorl %eax, %eax
movl (%rbx,%rax), %ecx
movl %ecx, 0x60(%rsp,%rax)
cmpl $0x8000, %ecx           # imm = 0x8000
jb 0x68bff
addq $0x4, %rax
cmpq $0x80, %rax
jne 0x685cf
vpxor %xmm0, %xmm0, %xmm0
vmovdqa %ymm0, 0x280(%rsp)
vmovdqa %ymm0, 0x260(%rsp)
vmovdqa %ymm0, 0x240(%rsp)
vmovdqa %ymm0, 0x220(%rsp)
addq $-0x40, %r15
addq %rax, %rbx
cmpq %r15, %rbx
jbe 0x68649
subq %rax, %r12
leaq 0x220(%rsp), %r14
movq %r14, %rdi
movq %rbx, %rsi
movq %r12, %rdx
vzeroupper
callq 0x4830
leaq 0x260(%rsp), %r15
movq %r14, %rbx
movq 0x28(%rsp), %rax
movq 0x30(%rsp), %rcx
vmovdqa 0x60(%rsp), %ymm1
vmovdqa 0x80(%rsp), %ymm0
vmovdqa 0xa0(%rsp), %ymm15
vmovdqa 0xc0(%rsp), %ymm14
andl $0x7fffffe0, %ecx       # imm = 0x7FFFFFE0
movq %rcx, 0x38(%rsp)
je 0x68ba4
movl %ecx, %r12d
vbroadcastsd 0x37927(%rip), %ymm2 # 0x9ffb8
vmovaps %ymm2, 0x200(%rsp)
vpbroadcastd 0x378e9(%rip), %ymm11 # 0x9ff8c
vpbroadcastd 0x378e4(%rip), %ymm12 # 0x9ff90
xorl %r13d, %r13d
vpbroadcastd 0x378dc(%rip), %ymm13 # 0x9ff94
leaq 0x358c1(%rip), %r14     # 0x9df80
vmovdqa %ymm11, 0x120(%rsp)
vmovdqa %ymm12, 0x100(%rsp)
vmovdqa %ymm13, 0xe0(%rsp)
vmovdqa 0x200(%rsp), %ymm8
vpand %ymm1, %ymm8, %ymm2
vmovdqa %ymm2, (%rsp)
movslq 0x4(%rsp), %r11
movslq 0xc(%rsp), %rcx
movslq 0x14(%rsp), %rdx
movslq 0x1c(%rsp), %rsi
movslq (%rsp), %rdi
movslq 0x8(%rsp), %r8
movslq 0x10(%rsp), %r9
movslq 0x18(%rsp), %r10
vmovd 0x6a0(%rsp,%rdi,4), %xmm2
vpinsrd $0x1, 0x6a0(%rsp,%r11,4), %xmm2, %xmm2
vpand %ymm0, %ymm8, %ymm5
vmovd 0x6a0(%rsp,%r8,4), %xmm3
vpinsrd $0x1, 0x6a0(%rsp,%rcx,4), %xmm3, %xmm6
vpand %ymm8, %ymm15, %ymm4
vmovd 0x6a0(%rsp,%r9,4), %xmm3
vpinsrd $0x1, 0x6a0(%rsp,%rdx,4), %xmm3, %xmm7
vpand %ymm8, %ymm14, %ymm3
vmovd 0x6a0(%rsp,%r10,4), %xmm8
vpinsrd $0x1, 0x6a0(%rsp,%rsi,4), %xmm8, %xmm8
vmovdqa %ymm5, (%rsp)
movslq 0x4(%rsp), %r11
movslq 0xc(%rsp), %rcx
movslq 0x14(%rsp), %rdx
movslq 0x1c(%rsp), %rsi
movslq (%rsp), %rdi
movslq 0x8(%rsp), %r8
movslq 0x10(%rsp), %r9
movslq 0x18(%rsp), %r10
vmovd 0x6a0(%rsp,%rdi,4), %xmm5
vpinsrd $0x1, 0x6a0(%rsp,%r11,4), %xmm5, %xmm5
vinserti128 $0x1, %xmm7, %ymm2, %ymm2
vmovd 0x6a0(%rsp,%r8,4), %xmm7
vpinsrd $0x1, 0x6a0(%rsp,%rcx,4), %xmm7, %xmm7
vinserti128 $0x1, %xmm8, %ymm6, %ymm6
vmovd 0x6a0(%rsp,%r9,4), %xmm8
vpinsrd $0x1, 0x6a0(%rsp,%rdx,4), %xmm8, %xmm8
vpunpcklqdq %ymm6, %ymm2, %ymm2 # ymm2 = ymm2[0],ymm6[0],ymm2[2],ymm6[2]
vmovd 0x6a0(%rsp,%r10,4), %xmm6
vpinsrd $0x1, 0x6a0(%rsp,%rsi,4), %xmm6, %xmm6
vmovdqa %ymm4, (%rsp)
movslq 0x4(%rsp), %r11
movslq 0xc(%rsp), %rcx
movslq 0x14(%rsp), %rdx
movslq 0x1c(%rsp), %rsi
movslq (%rsp), %rdi
movslq 0x8(%rsp), %r8
movslq 0x10(%rsp), %r9
movslq 0x18(%rsp), %r10
vmovd 0x6a0(%rsp,%rdi,4), %xmm4
vpinsrd $0x1, 0x6a0(%rsp,%r11,4), %xmm4, %xmm9
vinserti128 $0x1, %xmm8, %ymm5, %ymm4
vmovd 0x6a0(%rsp,%r8,4), %xmm5
vpinsrd $0x1, 0x6a0(%rsp,%rcx,4), %xmm5, %xmm5
vinserti128 $0x1, %xmm6, %ymm7, %ymm6
vmovd 0x6a0(%rsp,%r9,4), %xmm7
vpinsrd $0x1, 0x6a0(%rsp,%rdx,4), %xmm7, %xmm7
vpunpcklqdq %ymm6, %ymm4, %ymm4 # ymm4 = ymm4[0],ymm6[0],ymm4[2],ymm6[2]
vmovd 0x6a0(%rsp,%r10,4), %xmm6
vpinsrd $0x1, 0x6a0(%rsp,%rsi,4), %xmm6, %xmm6
vmovdqa %ymm3, (%rsp)
movslq 0x4(%rsp), %r11
movslq 0xc(%rsp), %rcx
movslq 0x14(%rsp), %rdx
movslq 0x1c(%rsp), %rsi
movslq (%rsp), %rdi
movslq 0x8(%rsp), %r8
movslq 0x10(%rsp), %r9
movslq 0x18(%rsp), %r10
vmovd 0x6a0(%rsp,%rdi,4), %xmm3
vpinsrd $0x1, 0x6a0(%rsp,%r11,4), %xmm3, %xmm3
vinserti128 $0x1, %xmm7, %ymm9, %ymm7
vmovd 0x6a0(%rsp,%r8,4), %xmm8
vpinsrd $0x1, 0x6a0(%rsp,%rcx,4), %xmm8, %xmm8
vinserti128 $0x1, %xmm6, %ymm5, %ymm5
vmovd 0x6a0(%rsp,%r9,4), %xmm6
vpinsrd $0x1, 0x6a0(%rsp,%rdx,4), %xmm6, %xmm6
vpunpcklqdq %ymm5, %ymm7, %ymm9 # ymm9 = ymm7[0],ymm5[0],ymm7[2],ymm5[2]
vmovd 0x6a0(%rsp,%r10,4), %xmm5
vpinsrd $0x1, 0x6a0(%rsp,%rsi,4), %xmm5, %xmm5
vinserti128 $0x1, %xmm6, %ymm3, %ymm3
vinserti128 $0x1, %xmm5, %ymm8, %ymm5
vpunpcklqdq %ymm5, %ymm3, %ymm8 # ymm8 = ymm3[0],ymm5[0],ymm3[2],ymm5[2]
vpsrld $0x14, %ymm2, %ymm3
vpsrld $0x14, %ymm4, %ymm5
vpsrld $0x8, %ymm2, %ymm6
vpsrld $0x8, %ymm4, %ymm7
vpsrld $0xc, %ymm1, %ymm1
vpmulld %ymm1, %ymm3, %ymm1
vpand %ymm6, %ymm11, %ymm3
vpaddd %ymm3, %ymm1, %ymm6
vpsrld $0xc, %ymm0, %ymm0
vpmulld %ymm0, %ymm5, %ymm0
vpand %ymm7, %ymm11, %ymm1
vpaddd %ymm1, %ymm0, %ymm0
vmovdqa %ymm0, 0x40(%rsp)
vpand %ymm2, %ymm12, %ymm0
vpand %ymm4, %ymm12, %ymm1
vpackusdw %ymm1, %ymm0, %ymm0
vpermq $0xd8, %ymm0, %ymm7     # ymm7 = ymm0[0,2,1,3]
cmpq %r15, %rbx
jbe 0x68a51
subq %rbx, %r15
addq $0x40, %r15
movq %rbx, %rsi
movq %r14, %rbx
movq %r12, %r14
leaq 0x220(%rsp), %r12
movq %r12, %rdi
movq %r15, %rdx
vmovdqa %ymm14, 0x1e0(%rsp)
vmovdqa %ymm15, 0x1c0(%rsp)
vmovdqa %ymm9, 0x1a0(%rsp)
vmovdqa %ymm8, 0x180(%rsp)
vmovdqa %ymm7, 0x160(%rsp)
vmovdqa %ymm6, 0x140(%rsp)
vzeroupper
callq 0x4830
vmovdqa 0x140(%rsp), %ymm6
vmovdqa 0x160(%rsp), %ymm7
vmovdqa 0x180(%rsp), %ymm8
vmovdqa 0x1a0(%rsp), %ymm9
vmovdqa 0x1c0(%rsp), %ymm15
vmovdqa 0x1e0(%rsp), %ymm14
vmovdqa 0xe0(%rsp), %ymm13
vmovdqa 0x100(%rsp), %ymm12
vmovdqa 0x120(%rsp), %ymm11
movq 0x28(%rsp), %rax
movq %r12, %rcx
movq %r14, %r12
movq %rbx, %r14
movq %rcx, %rbx
leaq 0x260(%rsp), %r15
vpmovzxwd (%rbx), %ymm0
vpminud %ymm13, %ymm6, %ymm1
vpcmpeqd %ymm1, %ymm6, %ymm1
vmovmskps %ymm1, %edx
popcntl %edx, %ecx
shll $0x5, %edx
vmovdqa (%rdx,%r14), %ymm2
vpermd %ymm0, %ymm2, %ymm0
vpslld $0x10, %ymm6, %ymm2
vpor %ymm2, %ymm0, %ymm0
vmovdqa 0x40(%rsp), %ymm10
vpslld $0x10, %ymm10, %ymm2
vpminud %ymm13, %ymm10, %ymm3
vpcmpeqd %ymm3, %ymm10, %ymm3
vmovmskps %ymm3, %esi
leaq (%rbx,%rcx,2), %rcx
popcntl %esi, %edx
shll $0x5, %esi
vmovdqa (%rsi,%r14), %ymm4
vpmovzxwd (%rcx), %ymm5
vpermd %ymm5, %ymm4, %ymm4
vpor %ymm2, %ymm4, %ymm2
vblendvps %ymm1, %ymm0, %ymm6, %ymm1
leaq (%rcx,%rdx,2), %rsi
vblendvps %ymm3, %ymm2, %ymm10, %ymm0
vpsrld $0x14, %ymm9, %ymm2
vpsrld $0x14, %ymm8, %ymm3
vpsrld $0x8, %ymm9, %ymm4
vpsrld $0x8, %ymm8, %ymm5
vpsrld $0xc, %ymm15, %ymm6
vpmulld %ymm6, %ymm2, %ymm2
vpand %ymm4, %ymm11, %ymm4
vpaddd %ymm4, %ymm2, %ymm2
vpsrld $0xc, %ymm14, %ymm4
vpmulld %ymm4, %ymm3, %ymm3
vpand %ymm5, %ymm11, %ymm4
vpaddd %ymm4, %ymm3, %ymm3
vpand %ymm12, %ymm9, %ymm4
vpand %ymm12, %ymm8, %ymm5
vpackusdw %ymm5, %ymm4, %ymm4
vpermq $0xd8, %ymm4, %ymm4     # ymm4 = ymm4[0,2,1,3]
vpackuswb %ymm4, %ymm7, %ymm4
vpmovzxwd (%rsi), %ymm5
vpermq $0xd8, %ymm4, %ymm4     # ymm4 = ymm4[0,2,1,3]
vmovdqu %ymm4, (%rax,%r13)
vpslld $0x10, %ymm2, %ymm4
vpminud %ymm13, %ymm2, %ymm6
vpcmpeqd %ymm6, %ymm2, %ymm6
vmovmskps %ymm6, %ecx
popcntl %ecx, %edx
shll $0x5, %ecx
vmovdqa (%rcx,%r14), %ymm7
vpermd %ymm5, %ymm7, %ymm5
vpor %ymm4, %ymm5, %ymm4
vpslld $0x10, %ymm3, %ymm5
vpminud %ymm13, %ymm3, %ymm7
vpcmpeqd %ymm7, %ymm3, %ymm7
vmovmskps %ymm7, %ecx
leaq (%rsi,%rdx,2), %rsi
popcntl %ecx, %edx
shll $0x5, %ecx
vmovdqa (%rcx,%r14), %ymm8
vpmovzxwd (%rsi), %ymm9
vpermd %ymm9, %ymm8, %ymm8
vpor %ymm5, %ymm8, %ymm5
leaq (%rsi,%rdx,2), %rbx
vblendvps %ymm6, %ymm4, %ymm2, %ymm15
vblendvps %ymm7, %ymm5, %ymm3, %ymm14
addq $0x20, %r13
cmpq %r12, %r13
jb 0x686da
vmovdqa %ymm1, 0x60(%rsp)
vmovdqa %ymm0, 0x80(%rsp)
vmovdqa %ymm15, 0xa0(%rsp)
vmovdqa %ymm14, 0xc0(%rsp)
movq 0x30(%rsp), %rdi
testb $0x1f, %dil
je 0x68c0e
andl $0x1f, %edi
incq %rdi
movq 0x38(%rsp), %rsi
addq %rax, %rsi
movl $0xfff, %edx            # imm = 0xFFF
movl 0x58(%rsp,%rdi,4), %ecx
andl %edx, %ecx
movb 0x6a0(%rsp,%rcx,4), %cl
movb %cl, -0x2(%rsi,%rdi)
decq %rdi
cmpq $0x1, %rdi
ja 0x68be3
jmp 0x68c0e
movq 0x40(%rsp), %rdi
vzeroupper
callq 0x45c0
xorl %eax, %eax
leaq -0x28(%rbp), %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
vzeroupper
retq