// File: /workspace/github_c_makefile_star2_O1/samtools[P]htslib/htscodecs/htscodecs/rANS_static32x16pr_avx512.c
// Function: rans_compress_O1_32x16_avx512
unsigned char *rans_compress_O1_32x16_avx512(unsigned char *in,
                                             unsigned int in_size,
                                             unsigned char *out,
                                             unsigned int *out_size) {
    unsigned char *cp, *out_end, *out_free = NULL;
    unsigned int tab_size;
    uint32_t bound = rans_compress_bound_4x16(in_size,1)-20;
    int z;
    RansState ransN[32] __attribute__((aligned(64)));

    if (in_size < 32) // force O0 instead
        return NULL;

    if (!out) {
        *out_size = bound;
        out = malloc(*out_size);
    }
    if (!out || bound > *out_size)
        return NULL;

    if (((size_t)out)&1)
        bound--;
    out_end = out + bound;

    RansEncSymbol (*syms)[256] = htscodecs_tls_alloc(256 * (sizeof(*syms)));
    if (!syms) {
        free(out_free);
        return NULL;
    }

    cp = out;
    int shift = encode_freq1(in, in_size, 32, syms, &cp);
    if (shift < 0) {
        free(out_free);
        htscodecs_tls_free(syms);
        return NULL;
    }
    tab_size = cp - out;

    for (z = 0; z < 32; z++)
      RansEncInit(&ransN[z]);

    uint8_t* ptr = out_end;

    int iN[32] __attribute__((aligned(64)));
    int isz4 = in_size/32;
    for (z = 0; z < 32; z++)
        iN[z] = (z+1)*isz4-2;

    uint32_t lN[32] __attribute__((aligned(64)));
    for (z = 0; z < 32; z++)
        lN[z] = in[iN[z]+1];

    // Deal with the remainder
    z = 32-1;
    lN[z] = in[in_size-1];
    for (iN[z] = in_size-2; iN[z] > 32*isz4-2; iN[z]--) {
        unsigned char c = in[iN[z]];
        RansEncPutSymbol(&ransN[z], &ptr, &syms[c][lN[z]]);
        lN[z] = c;
    }

    LOAD512(Rv, ransN);

    uint16_t *ptr16 = (uint16_t *)ptr;
    LOAD512(iN, iN);
    LOAD512(last, lN);

    __m512i c1 = _mm512_i32gather_epi32x1(iN1, in);
    __m512i c2 = _mm512_i32gather_epi32x1(iN2, in);

    // We cache the next 64-bytes locally and transpose.
    // This means we can load 32 ints from t32[x] with load instructions
    // instead of gathers.  The copy, transpose and expand is easier done
    // in scalar code.
#define BATCH 64
    uint8_t t32[BATCH][32] __attribute__((aligned(64)));
    int next_batch;
    if (iN[0] > BATCH) {
        int i, j;
        for (i = 0; i < BATCH; i++)
            // memcpy(c[i], &in[iN[i]-32], 32); fast mode
            for (j = 0; j < 32; j++)
                t32[BATCH-1-i][j] = in[iN[j]-1-i];
        next_batch = BATCH;
    } else {
        next_batch = -1;
    }

    for (; iN[0] >= 0; iN[0]--) {
        // Note, consider doing the same approach for the AVX2 encoder.
        // Maybe we can also get gather working well there?
        // Gather here is still a major latency bottleneck, consuming
        // around 40% of CPU cycles overall.

        // FIXME: maybe we need to cope with in[31] read over-flow
        // on loop cycles 0, 1, 2 where gather reads 32-bits instead of
        // 8 bits.  Use set instead there on c2?

        // index into syms[0][0] array, used for x_max, rcp_freq, and bias
        __m512i vidx1 = _mm512_slli_epi32(c1, 8);
        __m512i vidx2 = _mm512_slli_epi32(c2, 8);
        vidx1 = _mm512_add_epi32(vidx1, last1);
        vidx2 = _mm512_add_epi32(vidx2, last2);
        vidx1 = _mm512_slli_epi32(vidx1, 2);
        vidx2 = _mm512_slli_epi32(vidx2, 2);

        // ------------------------------------------------------------
        //      for (z = NX-1; z >= 0; z--) {
        //          if (ransN[z] >= x_max[z]) {
        //              *--ptr16 = ransN[z] & 0xffff;
        //              ransN[z] >>= 16;
        //          }
        //      }

#define SET512x(a,x) \
        __m512i a##1 = _mm512_i32gather_epi32x(vidx1, &syms[0][0].x, 4); \
        __m512i a##2 = _mm512_i32gather_epi32x(vidx2, &syms[0][0].x, 4)

        // Start of next loop, moved here to remove latency.
        // last[z] = c[z]
        // iN[z]--
        // c[z] = in[iN[z]]
        last1 = c1;
        last2 = c2;
        iN1 = _mm512_sub_epi32(iN1, _mm512_set1_epi32(1));
        iN2 = _mm512_sub_epi32(iN2, _mm512_set1_epi32(1));

        // Code below is equivalent to this:
        // c1 = _mm512_i32gather_epi32(iN1, in, 1);
        // c2 = _mm512_i32gather_epi32(iN2, in, 1);

        // Better when we have a power of 2
        if (next_batch >= 0) {
            if (--next_batch < 0 && iN[0] > BATCH) {
                // Load 32 BATCH blocks of data.
                // Executed once every BATCH cycles
                int i, j;
                uint8_t c[32][BATCH];
                iN[0] += BATCH;
                for (j = 0; j < 32; j++) {
                    iN[j] -= BATCH;
                    memcpy(c[j], &in[iN[j]-BATCH], BATCH);
                }
                // transpose matrix from 32xBATCH to BATCHx32
                for (j = 0; j < 32; j++) {
                    for (i = 0; i < BATCH; i+=16) {
                        int z;
                        for (z = 0; z < 16; z++)
                            t32[i+z][j] = c[j][i+z];
                    }
                }
                next_batch = BATCH-1;
            }
            if (next_batch >= 0) {
                // Copy from our of our pre-loaded BATCHx32 tables
                // Executed every cycles
                __m128i c1_ = _mm_load_si128((__m128i *)&t32[next_batch][0]);
                __m128i c2_ = _mm_load_si128((__m128i *)&t32[next_batch][16]);
                c1 = _mm512_cvtepu8_epi32(c1_);
                c2 = _mm512_cvtepu8_epi32(c2_);
            }
        }

        if (next_batch < 0 && iN[0]) {
            // no pre-loaded data as within BATCHx32 of input end
            c1 = _mm512_i32gather_epi32x1(iN1, in);
            c2 = _mm512_i32gather_epi32x1(iN2, in);

            // Speeds up clang, even though not needed any more.
            // Harmless to leave here.
            c1 = _mm512_and_si512(c1, _mm512_set1_epi32(0xff));
            c2 = _mm512_and_si512(c2, _mm512_set1_epi32(0xff));
        }
        // End of "equivalent to" code block

        SET512x(xmax, x_max); // high latency

        uint16_t gt_mask1 = _mm512_cmpgt_epi32_mask(Rv1, xmax1);
        int pc1 = _mm_popcnt_u32(gt_mask1);
        __m512i Rp1 = _mm512_and_si512(Rv1, _mm512_set1_epi32(0xffff));
        __m512i Rp2 = _mm512_and_si512(Rv2, _mm512_set1_epi32(0xffff));
        uint16_t gt_mask2 = _mm512_cmpgt_epi32_mask(Rv2, xmax2);
        SET512x(SDv, cmpl_freq); // good
        int pc2 = _mm_popcnt_u32(gt_mask2);

        Rp1 = _mm512_maskz_compress_epi32(gt_mask1, Rp1);
        Rp2 = _mm512_maskz_compress_epi32(gt_mask2, Rp2);

        _mm512_mask_cvtepi32_storeu_epi16(ptr16-pc2, (1<<pc2)-1, Rp2);
        ptr16 -= pc2;
        _mm512_mask_cvtepi32_storeu_epi16(ptr16-pc1, (1<<pc1)-1, Rp1);
        ptr16 -= pc1;

        Rv1 = _mm512_mask_srli_epi32(Rv1, gt_mask1, Rv1, 16);
        Rv2 = _mm512_mask_srli_epi32(Rv2, gt_mask2, Rv2, 16);

        // ------------------------------------------------------------
        // uint32_t q = (uint32_t) (((uint64_t)ransN[z] * rcp_freq[z])
        //                          >> rcp_shift[z]);
        // ransN[z] = ransN[z] + bias[z] + q * cmpl_freq[z];
        SET512x(rfv, rcp_freq); // good-ish

        __m512i rf1_hm = _mm512_mul_epu32(_mm512_srli_epi64(Rv1, 32),
                                          _mm512_srli_epi64(rfv1, 32));
        __m512i rf2_hm = _mm512_mul_epu32(_mm512_srli_epi64(Rv2, 32),
                                          _mm512_srli_epi64(rfv2, 32));
        __m512i rf1_lm = _mm512_srli_epi64(_mm512_mul_epu32(Rv1, rfv1), 32);
        __m512i rf2_lm = _mm512_srli_epi64(_mm512_mul_epu32(Rv2, rfv2), 32);

        const __m512i top32 = _mm512_set1_epi64((uint64_t)0xffffffff00000000);
        rf1_hm = _mm512_and_epi32(rf1_hm, top32);
        rf2_hm = _mm512_and_epi32(rf2_hm, top32);
        rfv1 = _mm512_or_epi32(rf1_lm, rf1_hm);
        rfv2 = _mm512_or_epi32(rf2_lm, rf2_hm);

        SET512x(biasv, bias); // good
        __m512i shiftv1 = _mm512_srli_epi32(SDv1, 16);
        __m512i shiftv2 = _mm512_srli_epi32(SDv2, 16);

        shiftv1 = _mm512_sub_epi32(shiftv1, _mm512_set1_epi32(32));
        shiftv2 = _mm512_sub_epi32(shiftv2, _mm512_set1_epi32(32));

        __m512i qv1 = _mm512_srlv_epi32(rfv1, shiftv1);
        __m512i qv2 = _mm512_srlv_epi32(rfv2, shiftv2);

        const __m512i bot16 = _mm512_set1_epi32(0xffff);
        qv1 = _mm512_mullo_epi32(qv1, _mm512_and_si512(SDv1, bot16));
        qv2 = _mm512_mullo_epi32(qv2, _mm512_and_si512(SDv2, bot16));

        qv1 = _mm512_add_epi32(qv1, biasv1);
        Rv1 = _mm512_add_epi32(Rv1, qv1);

        qv2 = _mm512_add_epi32(qv2, biasv2);
        Rv2 = _mm512_add_epi32(Rv2, qv2);
    }

    STORE512(Rv, ransN);
    STORE512(last, lN);

    ptr = (uint8_t *)ptr16;

    for (z = 32-1; z>=0; z--)
        RansEncPutSymbol(&ransN[z], &ptr, &syms[0][lN[z]]);

    for (z = 32-1; z >= 0; z--)
        RansEncFlush(&ransN[z], &ptr);

    // Finalise block size and return it
    *out_size = (out_end - ptr) + tab_size;

//    cp = out;
//    *cp++ = (in_size>> 0) & 0xff;
//    *cp++ = (in_size>> 8) & 0xff;
//    *cp++ = (in_size>>16) & 0xff;
//    *cp++ = (in_size>>24) & 0xff;

    memmove(out + tab_size, ptr, out_end-ptr);

    htscodecs_tls_free(syms);
    return out;
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
andq $-0x40, %rsp
subq $0x1400, %rsp           # imm = 0x1400
movq %rcx, %r12
movq %rdx, %r14
movl %esi, %ebx
movq %rdi, %r13
movl %esi, %edi
movl $0x1, %esi
callq 0x64798
movq %rbx, 0x20(%rsp)
cmpl $0x20, %ebx
jb 0x71036
movl %eax, %r15d
leal -0x14(%r15), %ebx
testq %r14, %r14
jne 0x7056d
movl %ebx, (%r12)
movl %ebx, %edi
callq 0x4680
movq %rax, %r14
testq %r14, %r14
je 0x71036
cmpl (%r12), %ebx
ja 0x71036
movq %r12, 0x178(%rsp)
addl $-0x15, %r15d
testb $0x1, %r14b
cmovel %ebx, %r15d
movq %r15, 0x110(%rsp)
movl $0x100000, %edi         # imm = 0x100000
callq 0x8060c
testq %rax, %rax
je 0x71036
movq %rax, %r12
movl $0x100, %edi            # imm = 0x100
movl $0x400, %esi            # imm = 0x400
callq 0x8070d
testq %rax, %rax
movq %r14, 0x50(%rsp)
movq %r13, 0x58(%rsp)
je 0x706f1
movq %rax, %r15
leaq 0xbc0(%rsp), %rdi
movl $0x420, %edx            # imm = 0x420
xorl %esi, %esi
callq 0x4260
movq 0x20(%rsp), %rax
movl %eax, %ebx
addq %r13, %rbx
cmpl $0x7a120, %eax          # imm = 0x7A120
jbe 0x706f8
movl $0x100, %edi            # imm = 0x100
movl $0x40c, %esi            # imm = 0x40C
callq 0x8070d
testq %rax, %rax
je 0x70e4a
leaq -0x8(%rbx), %rsi
xorl %edx, %edx
movq %r13, %rcx
cmpq %r13, %rsi
jbe 0x706bf
movzbl (%rcx), %r8d
movzbl 0x1(%rcx), %r9d
movzbl 0x2(%rcx), %r10d
movzbl 0x3(%rcx), %edi
movzbl %dl, %edx
shll $0xa, %edx
addq %r15, %rdx
incl (%rdx,%r8,4)
imulq $0x40c, %r8, %rdx       # imm = 0x40C
addq %rax, %rdx
incl (%rdx,%r9,4)
shll $0xa, %r9d
addq %r15, %r9
incl (%r9,%r10,4)
imulq $0x40c, %r10, %rdx      # imm = 0x40C
addq %rax, %rdx
incl (%rdx,%rdi,4)
movzbl 0x4(%rcx), %r8d
movzbl 0x5(%rcx), %r9d
movzbl 0x6(%rcx), %r10d
movzbl 0x7(%rcx), %edx
shll $0xa, %edi
addq %r15, %rdi
incl (%rdi,%r8,4)
imulq $0x40c, %r8, %rdi       # imm = 0x40C
addq %rax, %rdi
incl (%rdi,%r9,4)
shll $0xa, %r9d
addq %r15, %r9
incl (%r9,%r10,4)
addq $0x8, %rcx
imulq $0x40c, %r10, %rdi      # imm = 0x40C
addq %rax, %rdi
incl (%rdi,%rdx,4)
cmpq %rsi, %rcx
jb 0x7062a
cmpq %rbx, %rcx
jae 0x707f5
subq %rcx, %rbx
xorl %esi, %esi
movq 0x50(%rsp), %r14
movzbl (%rcx,%rsi), %edi
movzbl %dl, %edx
shll $0xa, %edx
addq %r15, %rdx
incl (%rdx,%rdi,4)
incq %rsi
movl %edi, %edx
cmpq %rsi, %rbx
jne 0x706d2
jmp 0x707fc
movb $0x1, %al
jmp 0x70e59
leaq -0x8(%rbx), %rcx
xorl %edx, %edx
movq %r13, %rax
cmpq %r13, %rcx
jbe 0x7078f
movzbl (%rax), %r8d
movzbl 0x1(%rax), %r9d
movzbl 0x2(%rax), %edi
movzbl 0x3(%rax), %esi
movzbl %dl, %edx
shll $0xa, %edx
addq %r15, %rdx
incl (%rdx,%r8,4)
shll $0xa, %r8d
addq %r15, %r8
incl (%r8,%r9,4)
shll $0xa, %r9d
addq %r15, %r9
incl (%r9,%rdi,4)
shll $0xa, %edi
addq %r15, %rdi
incl (%rdi,%rsi,4)
movzbl 0x4(%rax), %r8d
movzbl 0x5(%rax), %r9d
movzbl 0x6(%rax), %edi
movzbl 0x7(%rax), %edx
shll $0xa, %esi
addq %r15, %rsi
incl (%rsi,%r8,4)
shll $0xa, %r8d
addq %r15, %r8
incl (%r8,%r9,4)
shll $0xa, %r9d
addq %r15, %r9
incl (%r9,%rdi,4)
addq $0x8, %rax
shll $0xa, %edi
addq %r15, %rdi
incl (%rdi,%rdx,4)
cmpq %rcx, %rax
jb 0x7070a
cmpq %rbx, %rax
jae 0x707b5
subq %rax, %rbx
xorl %ecx, %ecx
movzbl (%rax,%rcx), %esi
movzbl %dl, %edx
shll $0xa, %edx
addq %r15, %rdx
incl (%rdx,%rsi,4)
incq %rcx
movl %esi, %edx
cmpq %rcx, %rbx
jne 0x70799
jmp 0x707b7
movl %edx, %esi
movzbl %sil, %eax
incl 0xbc0(%rsp,%rax,4)
xorl %eax, %eax
movq %r15, %rcx
xorl %esi, %esi
xorl %edx, %edx
addl (%rcx,%rsi,4), %edx
incq %rsi
cmpq $0x100, %rsi            # imm = 0x100
jne 0x707cb
addl %edx, 0xbc0(%rsp,%rax,4)
incq %rax
addq $0x400, %rcx            # imm = 0x400
cmpq $0x100, %rax            # imm = 0x100
jne 0x707c7
jmp 0x70858
movl %edx, %edi
movq 0x50(%rsp), %r14
movzbl %dil, %ecx
incl 0xbc0(%rsp,%rcx,4)
xorl %ecx, %ecx
movq %rax, %rdx
movq %r15, %rsi
xorl %r8d, %r8d
xorl %edi, %edi
movl (%rsi,%r8,4), %r9d
addl (%rdx,%r8,4), %r9d
movl %r9d, (%rsi,%r8,4)
addl %r9d, %edi
incq %r8
cmpq $0x100, %r8             # imm = 0x100
jne 0x70814
addl %edi, 0xbc0(%rsp,%rcx,4)
incq %rcx
addq $0x400, %rsi            # imm = 0x400
addq $0x40c, %rdx            # imm = 0x40C
cmpq $0x100, %rcx            # imm = 0x100
jne 0x7080f
movq %rax, %rdi
callq 0x80732
movq 0x20(%rsp), %rax
shrl $0x5, %eax
movl %eax, %eax
leaq (%rax,%r13), %rcx
movl $0x1f, %edx
movzbl (%rcx), %esi
incl (%r15,%rsi,4)
addq %rax, %rcx
decq %rdx
jne 0x7086b
movl 0xbc0(%rsp), %eax
movl $0x1, 0xbc0(%rsp)
leaq 0x1(%r14), %r9
movb $0x0, (%r14)
xorl %ecx, %ecx
movl $0x1, %edx
xorl %esi, %esi
movq %r9, %r8
movq %r8, %rdi
cmpl $0x0, 0xbc0(%rsp,%rcx,4)
je 0x708b3
testl %esi, %esi
je 0x708c7
decl %esi
movq %rdi, %r8
incq %rcx
incq %rdx
cmpq $0x100, %rcx            # imm = 0x100
jne 0x708a0
jmp 0x70919
leaq 0x1(%rdi), %r8
movb %cl, (%rdi)
xorl %esi, %esi
testq %rcx, %rcx
je 0x708b6
cmpl $0x0, 0xbbc(%rsp,%rcx,4)
je 0x708b6
leal 0x1(%rcx), %r8d
movl %r8d, %esi
cmpq $0xfe, %rcx
ja 0x7090c
movq %rdx, %rsi
cmpl $0x0, 0xbc0(%rsp,%rsi,4)
je 0x7090c
incq %rsi
cmpq $0x100, %rsi            # imm = 0x100
jne 0x708f1
movl $0x100, %esi            # imm = 0x100
subl %r8d, %esi
movb %sil, 0x1(%rdi)
addq $0x2, %rdi
jmp 0x708b3
addl $0x1f, %eax
movb $0x0, (%r8)
subl %r9d, %r8d
incl %r8d
movslq %r8d, %rcx
movq %r9, 0x18(%rsp)
addq %r9, %rcx
movq %rcx, 0x28(%rsp)
leaq 0xbc0(%rsp), %rbx
movl %eax, (%rbx)
leaq 0x3c0(%rsp), %r14
movl $0x400, %edx            # imm = 0x400
movq %r14, %rdi
xorl %esi, %esi
callq 0x4260
movq %rbx, %rdi
movq %r15, %rsi
movq %rbx, %rdx
movq %r14, %rcx
callq 0x658ea
xorl %edx, %edx
movl %eax, %ecx
movl $0x1, %edi
movl $0x1, %r8d
shll %cl, %r8d
movl $0x8000, %eax           # imm = 0x8000
shrl %cl, %eax
shll $0x10, %eax
movl %eax, 0x10(%rsp)
leal -0x1(%r8), %eax
movq %rax, 0x38(%rsp)
movq %r15, %r14
movq %r15, 0x60(%rsp)
movl %ecx, 0x40(%rsp)
movl 0xbc0(%rsp,%rdx,4), %eax
testl %eax, %eax
je 0x70adc
movq %rdx, %rsi
movl 0x3c0(%rsp,%rdx,4), %edx
movl $0x400, %r9d            # imm = 0x400
cmpl %r9d, %edx
movl $0x400, %r13d           # imm = 0x400
cmovbl %edx, %r13d
cmpl $0xa, %ecx
cmovnel %edx, %r13d
movq %r15, %rcx
movq %rsi, 0x120(%rsp)
movq %rsi, %r15
shlq $0xa, %r15
addq %rcx, %r15
movq %r13, %rcx
shlq $0x1f, %rcx
movb $0x1, %r11b
movslq %eax, %r9
xorl %r10d, %r10d
movq %rcx, %rax
xorl %edx, %edx
divq %r9
movq %rax, %rsi
movl $0x40000000, %eax       # imm = 0x40000000
xorl %edx, %edx
idivl %r9d
movslq %eax, %rdx
addq %rsi, %rdx
xorl %eax, %eax
xorl %esi, %esi
xorl %r9d, %r9d
movl (%r14,%r10,4), %ebx
testq %rbx, %rbx
je 0x70a3f
cmpl %ebx, %esi
cmovbl %r10d, %r9d
cmovbel %ebx, %esi
imulq %rdx, %rbx
shrq $0x1f, %rbx
cmpl $0x2, %ebx
cmovbl %edi, %ebx
movl %ebx, (%r14,%r10,4)
addl %eax, %ebx
movl %ebx, %eax
incq %r10
cmpq $0x100, %r10            # imm = 0x100
jne 0x70a17
movl %r13d, %esi
subl %eax, %esi
movslq %r9d, %rdx
testl %esi, %esi
jg 0x70ae3
jns 0x70af6
movl (%r15,%rdx,4), %r9d
movl %esi, %r10d
negl %r10d
cmpl %r10d, %r9d
jbe 0x70a81
movl %r9d, %ebx
shrl %ebx
cmpl %r10d, %ebx
setb %r10b
testb %r10b, %r11b
je 0x70aec
testb $0x1, %r11b
movl $0x0, %r11d
jne 0x709ef
addl %r9d, %esi
movl $0x1, (%r15,%rdx,4)
decl %esi
je 0x70af6
xorl %eax, %eax
movl (%r14,%rax,4), %ecx
cmpl $0x2, %ecx
jb 0x70acb
movl %esi, %r9d
negl %r9d
movl $0x1, %r10d
subl %ecx, %r10d
cmpl %r9d, %ecx
cmoval %esi, %r10d
addl %r10d, %ecx
movl %ecx, (%r14,%rax,4)
subl %r10d, %esi
cmpq $0xfe, %rax
ja 0x70af6
incq %rax
testl %esi, %esi
jne 0x70aa2
jmp 0x70af6
xorl %eax, %eax
jmp 0x70da8
leaq (%r15,%rdx,4), %rax
movl (%rax), %r9d
jmp 0x70af0
leaq (%r15,%rdx,4), %rax
addl %esi, %r9d
movl %r9d, (%rax)
cmpl $0x0, (%r15,%rdx,4)
je 0x70d90
movq 0x120(%rsp), %rax
movl %r13d, 0xbc0(%rsp,%rax,4)
xorl %ecx, %ecx
xorl %edx, %edx
movq 0x28(%rsp), %r9
movq %r9, %rax
cmpl $0x0, 0xbc0(%rsp,%rcx,4)
je 0x70c2f
cmpl $0x0, (%r14,%rcx,4)
je 0x70b58
testl %edx, %edx
je 0x70b43
decl %edx
movslq %edx, %rdx
subq %rdx, %rax
movb %dl, (%rax)
incq %rax
movl (%r14,%rcx,4), %edx
cmpl $0x7f, %edx
ja 0x70b65
movb %dl, (%rax)
movl $0x1, %edx
jmp 0x70c2a
incl %edx
movb $0x0, (%rax)
incq %rax
jmp 0x70c2f
movl %edx, %esi
cmpl $0x3fff, %edx           # imm = 0x3FFF
ja 0x70b89
shrl $0x7, %esi
orb $-0x80, %sil
movb %sil, (%rax)
andb $0x7f, %dl
movb %dl, 0x1(%rax)
movl $0x2, %edx
jmp 0x70c2a
cmpl $0x1fffff, %edx         # imm = 0x1FFFFF
ja 0x70bb5
shrl $0xe, %esi
orb $-0x80, %sil
movb %sil, (%rax)
movl %edx, %esi
shrl $0x7, %esi
orb $-0x80, %sil
movb %sil, 0x1(%rax)
andb $0x7f, %dl
movb %dl, 0x2(%rax)
movl $0x3, %edx
jmp 0x70c2a
cmpl $0xfffffff, %edx        # imm = 0xFFFFFFF
ja 0x70bee
shrl $0x15, %esi
orb $-0x80, %sil
movb %sil, (%rax)
movl %edx, %esi
shrl $0xe, %esi
orb $-0x80, %sil
movb %sil, 0x1(%rax)
movl %edx, %esi
shrl $0x7, %esi
orb $-0x80, %sil
movb %sil, 0x2(%rax)
andb $0x7f, %dl
movb %dl, 0x3(%rax)
movl $0x4, %edx
jmp 0x70c2a
shrl $0x1c, %esi
orb $-0x80, %sil
movb %sil, (%rax)
movl %edx, %esi
shrl $0x15, %esi
orb $-0x80, %sil
movb %sil, 0x1(%rax)
movl %edx, %esi
shrl $0xe, %esi
orb $-0x80, %sil
movb %sil, 0x2(%rax)
movl %edx, %esi
shrl $0x7, %esi
orb $-0x80, %sil
movb %sil, 0x3(%rax)
andb $0x7f, %dl
movb %dl, 0x4(%rax)
movl $0x5, %edx
addq %rdx, %rax
xorl %edx, %edx
incq %rcx
cmpq $0x100, %rcx            # imm = 0x100
jne 0x70b1d
testl %edx, %edx
je 0x70c50
decl %edx
movslq %edx, %rcx
subq %rcx, %rax
movb %cl, (%rax)
incq %rax
movq 0x120(%rsp), %rcx
movl 0xbc0(%rsp,%rcx,4), %edx
movl %r8d, %ecx
notl %ecx
testl %ecx, %edx
je 0x70c8c
xorl %ecx, %ecx
cmpl %r8d, %edx
jae 0x70c7a
xorl %ecx, %ecx
addl %edx, %edx
incl %ecx
cmpl %r8d, %edx
jb 0x70c71
xorl %edx, %edx
shll %cl, (%r14,%rdx,4)
incq %rdx
cmpq $0x100, %rdx            # imm = 0x100
jne 0x70c7c
movq 0x120(%rsp), %rdx
movl %r8d, 0xbc0(%rsp,%rdx,4)
cmpl $0x10, 0x40(%rsp)
ja 0x72556
subl %r9d, %eax
cltq
addq %rax, %r9
movq %r9, 0x28(%rsp)
xorl %r10d, %r10d
xorl %r13d, %r13d
movl %r8d, %eax
subl %r13d, %eax
jb 0x72518
movl (%r15,%r10,4), %r9d
cmpl %r9d, %eax
jb 0x72537
movq %rdx, %rax
shlq $0xc, %rax
addq %r12, %rax
movq %r10, %r11
shlq $0x4, %r11
addq %rax, %r11
movl 0x10(%rsp), %eax
imull %r9d, %eax
decl %eax
movl %eax, (%r11)
movl %r8d, %eax
subl %r9d, %eax
movw %ax, 0xc(%r11)
cmpl $0x2, %r9d
jae 0x70d1e
movl $0xffffffff, 0x4(%r11)  # imm = 0xFFFFFFFF
movw $0x0, 0xe(%r11)
movq 0x38(%rsp), %rax
addl %r13d, %eax
jmp 0x70d60
movl $0x1e, %esi
leal -0x1e(%rsi), %ecx
movl $0x1, %eax
shll %cl, %eax
incl %esi
cmpl %r9d, %eax
jb 0x70d23
movl $0x1, %eax
movl %esi, %ecx
shlq %cl, %rax
addq %r9, %rax
decq %rax
xorl %edx, %edx
divq %r9
movl %eax, 0x4(%r11)
addl $-0x20, %esi
movw %si, 0xe(%r11)
movl %r13d, %eax
movq 0x120(%rsp), %rdx
movl %eax, 0x8(%r11)
addw $0x20, 0xe(%r11)
addl (%r15,%r10,4), %r13d
incq %r10
cmpq $0x100, %r10            # imm = 0x100
jne 0x70cba
xorl %eax, %eax
movq 0x58(%rsp), %r13
movq 0x60(%rsp), %r15
movl 0x40(%rsp), %ecx
jmp 0x70da8
movb $0x1, %al
movq 0x58(%rsp), %r13
movq 0x60(%rsp), %r15
movl 0x40(%rsp), %ecx
movq 0x120(%rsp), %rdx
testb %al, %al
jne 0x70e4a
incq %rdx
addq $0x400, %r14            # imm = 0x400
cmpq $0x100, %rdx            # imm = 0x100
jne 0x7099d
movl %ecx, %eax
shlb $0x4, %al
movq 0x50(%rsp), %r14
movb %al, (%r14)
movq 0x28(%rsp), %rax
movq %rax, %rbx
subq %r14, %rbx
cmpq $0x3e9, %rbx            # imm = 0x3E9
jl 0x7101b
movq %rax, %rsi
movq 0x18(%rsp), %rdi
subq %rdi, %rsi
leaq 0x280(%rsp), %rcx
movq %rsi, 0x10(%rsp)
xorl %edx, %edx
callq 0x64845
movq %rax, %rcx
testq %rax, %rax
je 0x71013
movl 0x280(%rsp), %edx
leal 0x6(%rdx), %eax
cmpq %rax, %rbx
jle 0x71013
orb $0x1, (%r14)
movq 0x10(%rsp), %rsi
cmpl $0x7f, %esi
ja 0x70e63
movq 0x18(%rsp), %rdi
movb %sil, (%rdi)
movl $0x1, %eax
jmp 0x70f25
movq %r15, %rdi
callq 0x80732
movb $0x1, %al
movq 0x50(%rsp), %r14
movq %r14, 0x28(%rsp)
jmp 0x7102a
cmpl $0x3fff, %esi           # imm = 0x3FFF
movq 0x18(%rsp), %rdi
movl %esi, %eax
ja 0x70e8d
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x1(%r14)
andb $0x7f, %sil
movb %sil, 0x2(%r14)
movl $0x2, %eax
jmp 0x70f25
cmpl $0x1fffff, %esi         # imm = 0x1FFFFF
ja 0x70eb8
shrl $0xe, %eax
orb $-0x80, %al
movb %al, 0x1(%r14)
movl %esi, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x2(%r14)
andb $0x7f, %sil
movb %sil, 0x3(%r14)
movl $0x3, %eax
jmp 0x70f25
cmpl $0xfffffff, %esi        # imm = 0xFFFFFFF
ja 0x70eee
shrl $0x15, %eax
orb $-0x80, %al
movb %al, 0x1(%r14)
movl %esi, %eax
shrl $0xe, %eax
orb $-0x80, %al
movb %al, 0x2(%r14)
movl %esi, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x3(%r14)
andb $0x7f, %sil
movb %sil, 0x4(%r14)
movl $0x4, %eax
jmp 0x70f25
shrl $0x1c, %eax
orb $-0x80, %al
movb %al, 0x1(%r14)
movl %esi, %eax
shrl $0x15, %eax
orb $-0x80, %al
movb %al, 0x2(%r14)
movl %esi, %eax
shrl $0xe, %eax
orb $-0x80, %al
movb %al, 0x3(%r14)
movl %esi, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x4(%r14)
andb $0x7f, %sil
movb %sil, 0x5(%r14)
movl $0x5, %eax
addq %rax, %rdi
cmpl $0x7f, %edx
ja 0x70f39
movb %dl, (%rdi)
movl $0x1, %eax
jmp 0x70fe4
movl %edx, %eax
cmpl $0x3fff, %edx           # imm = 0x3FFF
ja 0x70f5b
shrl $0x7, %eax
orb $-0x80, %al
movb %al, (%rdi)
movl %edx, %eax
andb $0x7f, %al
movb %al, 0x1(%rdi)
movl $0x2, %eax
jmp 0x70fe4
cmpl $0x1fffff, %edx         # imm = 0x1FFFFF
ja 0x70f82
shrl $0xe, %eax
orb $-0x80, %al
movb %al, (%rdi)
movl %edx, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x1(%rdi)
movl %edx, %eax
andb $0x7f, %al
movb %al, 0x2(%rdi)
movl $0x3, %eax
jmp 0x70fe4
cmpl $0xfffffff, %edx        # imm = 0xFFFFFFF
ja 0x70fb3
shrl $0x15, %eax
orb $-0x80, %al
movb %al, (%rdi)
movl %edx, %eax
shrl $0xe, %eax
orb $-0x80, %al
movb %al, 0x1(%rdi)
movl %edx, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x2(%rdi)
movl %edx, %eax
andb $0x7f, %al
movb %al, 0x3(%rdi)
movl $0x4, %eax
jmp 0x70fe4
shrl $0x1c, %eax
orb $-0x80, %al
movb %al, (%rdi)
movl %edx, %eax
shrl $0x15, %eax
orb $-0x80, %al
movb %al, 0x1(%rdi)
movl %edx, %eax
shrl $0xe, %eax
orb $-0x80, %al
movb %al, 0x2(%rdi)
movl %edx, %eax
shrl $0x7, %eax
orb $-0x80, %al
movb %al, 0x3(%rdi)
movl %edx, %eax
andb $0x7f, %al
movb %al, 0x4(%rdi)
movl $0x5, %eax
addq %rax, %rdi
movq %rcx, 0x10(%rsp)
movq 0x10(%rsp), %rsi
movq %rdx, 0x120(%rsp)
movq %rdi, %rbx
callq 0x43c0
movq 0x10(%rsp), %rcx
addq 0x120(%rsp), %rbx
movq %rbx, 0x28(%rsp)
movq %rcx, %rdi
callq 0x45c0
movq %r15, %rdi
callq 0x80732
movl 0x40(%rsp), %eax
shrl $0x1f, %eax
testb %al, %al
je 0x7104a
movq %r12, %rdi
callq 0x80732
xorl %ebx, %ebx
movq %rbx, %rax
leaq -0x28(%rbp), %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movq 0x110(%rsp), %rax
addq %rax, %r14
xorl %ecx, %ecx
movl $0x8000, 0x280(%rsp,%rcx,4) # imm = 0x8000
incq %rcx
cmpq $0x20, %rcx
jne 0x71057
movq 0x20(%rsp), %r11
movl %r11d, %ecx
shrl $0x5, %ecx
leal -0x2(%rcx), %edx
xorl %esi, %esi
movl %edx, 0x1c0(%rsp,%rsi,4)
incq %rsi
addl %ecx, %edx
cmpq $0x20, %rsi
jne 0x7107b
xorl %ecx, %ecx
movslq 0x1c0(%rsp,%rcx,4), %rdx
movzbl 0x1(%r13,%rdx), %edx
movl %edx, 0x300(%rsp,%rcx,4)
incq %rcx
cmpq $0x20, %rcx
jne 0x7108f
leal -0x1(%r11), %ecx
movzbl (%r13,%rcx), %ecx
movl %ecx, 0x37c(%rsp)
leal -0x2(%r11), %ecx
andl $-0x20, %r11d
addl $-0x2, %r11d
movl %ecx, 0x23c(%rsp)
cmpl %r11d, %ecx
jle 0x71151
movl %ecx, %ecx
movzbl (%r13,%rcx), %edx
movl 0x37c(%rsp), %esi
movl %edx, %edi
shll $0xc, %edi
addq %r12, %rdi
shlq $0x4, %rsi
movl 0x2fc(%rsp), %r8d
xorl %ecx, %ecx
cmpl (%rsi,%rdi), %r8d
seta %cl
leal (%rcx,%rcx), %r9d
movw %r8w, -0x2(%r14)
shll $0x4, %ecx
shrl %cl, %r8d
movl 0x4(%rsi,%rdi), %r10d
imulq %r8, %r10
movb 0xe(%rsi,%rdi), %cl
shrq %cl, %r10
subq %r9, %r14
addl 0x8(%rsi,%rdi), %r8d
movzwl 0xc(%rsi,%rdi), %ecx
imull %r10d, %ecx
addl %r8d, %ecx
movl %ecx, 0x2fc(%rsp)
movl %edx, 0x37c(%rsp)
movl 0x23c(%rsp), %ecx
decl %ecx
jmp 0x710ca
vmovdqa64 0x280(%rsp), %zmm24
vmovdqa64 0x2c0(%rsp), %zmm25
vmovdqa64 0x1c0(%rsp), %zmm8
vmovdqa64 0x200(%rsp), %zmm10
vmovdqa64 0x300(%rsp), %zmm12
vmovdqa64 0x340(%rsp), %zmm13
vmovdqa 0x1c0(%rsp), %ymm1
vmovdqa 0x1e0(%rsp), %ymm3
vmovdqa 0x200(%rsp), %ymm0
vmovdqu 0x220(%rsp), %xmm2
movq 0x230(%rsp), %rcx
movl 0x238(%rsp), %edx
movl 0x23c(%rsp), %esi
vmovdqa %ymm1, 0xbc0(%rsp)
vmovdqa %ymm3, 0x3c0(%rsp)
movslq 0x3dc(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0x10(%rsp)
movslq 0x3d8(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0x120(%rsp)
movslq 0x3d4(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0x20(%rsp)
movslq 0x3d0(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0x18(%rsp)
movslq 0x3cc(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0x38(%rsp)
movslq 0x3c8(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0x60(%rsp)
movslq 0x3c4(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0xd0(%rsp)
movslq 0x3c0(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0xc0(%rsp)
movslq 0xbdc(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0x40(%rsp)
movslq 0xbd8(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0xd8(%rsp)
movslq 0xbd4(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0xc8(%rsp)
movslq 0xbd0(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0xa8(%rsp)
movslq 0xbcc(%rsp), %rdi
movzbl (%r13,%rdi), %r9d
movslq 0xbc8(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0xb8(%rsp)
movslq 0xbc4(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0x98(%rsp)
movslq 0xbc0(%rsp), %rdi
movzbl (%r13,%rdi), %eax
movl %eax, 0x80(%rsp)
movq %rcx, 0x3d0(%rsp)
movl %edx, 0x3d8(%rsp)
movl %esi, 0x3dc(%rsp)
vmovdqa %ymm0, 0xbc0(%rsp)
vmovdqu %xmm2, 0x3c0(%rsp)
movslq 0x3dc(%rsp), %rcx
movzbl (%r13,%rcx), %esi
movslq 0x3d8(%rsp), %rcx
movzbl (%r13,%rcx), %edi
movslq 0x3d4(%rsp), %rcx
movzbl (%r13,%rcx), %eax
movl %eax, 0xa0(%rsp)
movslq 0x3d0(%rsp), %rcx
movzbl (%r13,%rcx), %eax
movl %eax, 0x78(%rsp)
movslq 0x3cc(%rsp), %rcx
movzbl (%r13,%rcx), %eax
movl %eax, 0xb0(%rsp)
movslq 0x3c8(%rsp), %rcx
movzbl (%r13,%rcx), %eax
movl %eax, 0x88(%rsp)
movslq 0x3c4(%rsp), %rcx
movzbl (%r13,%rcx), %eax
movl %eax, 0x34(%rsp)
movslq 0x3c0(%rsp), %rcx
movzbl (%r13,%rcx), %r10d
movslq 0xbdc(%rsp), %rcx
movzbl (%r13,%rcx), %eax
movl %eax, 0x90(%rsp)
movslq 0xbd8(%rsp), %rcx
movzbl (%r13,%rcx), %eax
movl %eax, 0x70(%rsp)
movslq 0xbd4(%rsp), %rcx
movzbl (%r13,%rcx), %eax
movl %eax, 0x160(%rsp)
movslq 0xbd0(%rsp), %rcx
movzbl (%r13,%rcx), %ebx
movslq 0xbcc(%rsp), %rcx
movzbl (%r13,%rcx), %eax
movl %eax, 0x150(%rsp)
movslq 0xbc8(%rsp), %rcx
movzbl (%r13,%rcx), %r11d
movslq 0xbc4(%rsp), %rcx
movzbl (%r13,%rcx), %eax
movslq 0xbc0(%rsp), %r15
cmpl $0x41, 0x1c0(%rsp)
movl $0xffffffff, %edx       # imm = 0xFFFFFFFF
jl 0x714ba
movl %edi, 0x260(%rsp)
movl %r9d, 0x118(%rsp)
movl %esi, %r9d
leaq 0x13a0(%rsp), %r8
xorl %r13d, %r13d
movq 0x58(%rsp), %rdi
movl %r13d, %ecx
notl %ecx
xorl %edx, %edx
movl 0x1c0(%rsp,%rdx,4), %esi
addl %ecx, %esi
movslq %esi, %rsi
movb (%rdi,%rsi), %sil
movb %sil, (%r8,%rdx)
incq %rdx
cmpq $0x20, %rdx
jne 0x71474
incq %r13
addq $-0x20, %r8
cmpq $0x40, %r13
jne 0x7146d
movl $0x40, %edx
movq 0x58(%rsp), %r13
movl %r9d, %esi
movl 0x118(%rsp), %r9d
movl 0x260(%rsp), %edi
movl 0x1c0(%rsp), %r8d
testl %r8d, %r8d
js 0x72401
vmovd 0x80(%rsp), %xmm0
movzbl (%r13,%r15), %ecx
vmovd %ecx, %xmm1
vmovd 0xc0(%rsp), %xmm2
vmovd 0xa8(%rsp), %xmm3
vpinsrd $0x1, 0x98(%rsp), %xmm0, %xmm0
vmovd %r10d, %xmm4
vmovd %ebx, %xmm5
vpinsrd $0x1, %eax, %xmm1, %xmm1
vpinsrd $0x1, 0xd0(%rsp), %xmm2, %xmm2
vpinsrd $0x1, 0xc8(%rsp), %xmm3, %xmm3
vpinsrd $0x2, 0xb8(%rsp), %xmm0, %xmm0
vmovd 0x18(%rsp), %xmm6
vmovd 0x78(%rsp), %xmm7
vpinsrd $0x1, 0x34(%rsp), %xmm4, %xmm4
vpinsrd $0x1, 0x160(%rsp), %xmm5, %xmm5
vpinsrd $0x2, %r11d, %xmm1, %xmm1
vpinsrd $0x1, 0x20(%rsp), %xmm6, %xmm6
vpinsrd $0x2, 0x60(%rsp), %xmm2, %xmm2
vpinsrd $0x2, 0xd8(%rsp), %xmm3, %xmm3
vpinsrd $0x3, %r9d, %xmm0, %xmm0
vpinsrd $0x1, 0xa0(%rsp), %xmm7, %xmm7
vpinsrd $0x2, 0x88(%rsp), %xmm4, %xmm4
vpinsrd $0x2, 0x70(%rsp), %xmm5, %xmm5
vpinsrd $0x3, 0x150(%rsp), %xmm1, %xmm1
vpinsrd $0x2, 0x120(%rsp), %xmm6, %xmm6
vpinsrd $0x3, 0x38(%rsp), %xmm2, %xmm2
vpinsrd $0x3, 0x40(%rsp), %xmm3, %xmm3
vpinsrd $0x2, %edi, %xmm7, %xmm7
vpinsrd $0x3, 0xb0(%rsp), %xmm4, %xmm4
vpinsrd $0x3, 0x90(%rsp), %xmm5, %xmm5
vpinsrd $0x3, 0x10(%rsp), %xmm6, %xmm6
vinserti128 $0x1, %xmm3, %ymm0, %ymm0
vpinsrd $0x3, %esi, %xmm7, %xmm3
vinserti128 $0x1, %xmm5, %ymm1, %ymm1
vinserti128 $0x1, %xmm6, %ymm2, %ymm2
vinserti128 $0x1, %xmm3, %ymm4, %ymm3
vinserti64x4 $0x1, %ymm2, %zmm0, %zmm20
vinserti64x4 $0x1, %ymm3, %zmm1, %zmm22
leaq -0x80(%r13), %rcx
movq %rcx, 0x180(%rsp)
vpternlogd $0xff, %zmm17, %zmm17, %zmm17
movw $0xaaaa, %cx            # imm = 0xAAAA
kmovw %ecx, %k1
vpbroadcastd 0x2d67e(%rip), %zmm16 # 0x9eca8
vpbroadcastd 0x316cc(%rip), %zmm19 # 0xa2d00
vpbroadcastd 0x2d662(%rip), %zmm18 # 0x9eca0
movl %edx, %ecx
vmovdqa64 %zmm22, %zmm21
vmovdqa64 %zmm20, %zmm23
movl $0xffffffff, %edx       # imm = 0xFFFFFFFF
testl %ecx, %ecx
js 0x7174b
subl $0x1, %ecx
setae %dl
cmpl $0x41, %r8d
setl %sil
orb %dl, %sil
jne 0x71718
addl $0x40, %r8d
movl %r8d, 0x1c0(%rsp)
leaq 0x1c0(%rsp), %rcx
xorl %edx, %edx
movq 0x180(%rsp), %r8
movslq (%rcx), %rsi
leal -0x40(%rsi), %edi
movl %edi, (%rcx)
vmovdqu64 (%r8,%rsi), %zmm0
vmovdqu64 %zmm0, 0x3c0(%rsp,%rdx,4)
addq $0x10, %rdx
addq $0x4, %rcx
cmpq $0x200, %rdx            # imm = 0x200
jne 0x7168e
leaq 0xbc0(%rsp), %rcx
leaq 0x3c0(%rsp), %rdx
xorl %esi, %esi
movq %rcx, %rdi
movq %rdx, %r8
xorl %r9d, %r9d
movq %rdi, %r10
xorl %r11d, %r11d
movb (%r8,%r11), %bl
movb %bl, (%r10)
incq %r11
addq $0x20, %r10
cmpq $0x10, %r11
jne 0x716d7
leaq 0x10(%r9), %r10
addq $0x10, %r8
addq $0x200, %rdi            # imm = 0x200
cmpq $0x30, %r9
movq %r10, %r9
jb 0x716d1
incq %rsi
addq $0x40, %rdx
incq %rcx
cmpq $0x20, %rsi
jne 0x716c8
movl $0x3f, %ecx
movl $0xffffffff, %edx       # imm = 0xFFFFFFFF
vmovdqa64 %zmm21, %zmm22
vmovdqa64 %zmm23, %zmm20
testl %ecx, %ecx
js 0x7174b
movl %ecx, %edx
shlq $0x5, %rdx
vpmovzxbd 0xbc0(%rsp,%rdx), %zmm20
vpmovzxbd 0xbd0(%rsp,%rdx), %zmm22
movl %ecx, %edx
vpslld $0xa, %zmm23, %zmm0
vpslld $0x2, %zmm12, %zmm1
vpaddd %zmm0, %zmm1, %zmm14
vpslld $0xa, %zmm21, %zmm0
vpslld $0x2, %zmm13, %zmm1
vpaddd %zmm0, %zmm1, %zmm12
vpaddd %zmm17, %zmm8, %zmm8
vpaddd %zmm17, %zmm10, %zmm10
testl %edx, %edx
movl %edx, 0x34(%rsp)
movq %r14, 0x150(%rsp)
jns 0x71a67
cmpl $0x0, 0x1c0(%rsp)
je 0x71a67
vmovdqa %ymm8, 0x3c0(%rsp)
vextracti64x4 $0x1, %zmm8, 0xe0(%rsp)
movslq 0xfc(%rsp), %rcx
movzbl (%r13,%rcx), %ecx
movslq 0xf8(%rsp), %rdx
movzbl (%r13,%rdx), %edx
movslq 0xf4(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movslq 0xf0(%rsp), %rdi
movzbl (%r13,%rdi), %edi
vmovd %edi, %xmm0
movslq 0xec(%rsp), %rdi
movzbl (%r13,%rdi), %edi
vpinsrd $0x1, %esi, %xmm0, %xmm0
movslq 0xe8(%rsp), %rsi
movzbl (%r13,%rsi), %esi
vpinsrd $0x2, %edx, %xmm0, %xmm0
movslq 0xe4(%rsp), %rdx
movzbl (%r13,%rdx), %edx
vpinsrd $0x3, %ecx, %xmm0, %xmm2
movslq 0xe0(%rsp), %rcx
movzbl (%r13,%rcx), %ecx
vmovd %ecx, %xmm0
movslq 0x3dc(%rsp), %rcx
movzbl (%r13,%rcx), %ecx
vpinsrd $0x1, %edx, %xmm0, %xmm0
movslq 0x3d8(%rsp), %rdx
movzbl (%r13,%rdx), %edx
vpinsrd $0x2, %esi, %xmm0, %xmm0
movslq 0x3d4(%rsp), %rsi
movzbl (%r13,%rsi), %esi
vpinsrd $0x3, %edi, %xmm0, %xmm4
movslq 0x3d0(%rsp), %rdi
movzbl (%r13,%rdi), %edi
vmovd %edi, %xmm0
movslq 0x3cc(%rsp), %rdi
vpinsrd $0x1, %esi, %xmm0, %xmm0
movzbl (%r13,%rdi), %esi
movslq 0x3c8(%rsp), %rdi
vpinsrd $0x2, %edx, %xmm0, %xmm0
movzbl (%r13,%rdi), %edx
movslq 0x3c4(%rsp), %rdi
vpinsrd $0x3, %ecx, %xmm0, %xmm6
movzbl (%r13,%rdi), %ecx
movslq 0x3c0(%rsp), %rdi
movzbl (%r13,%rdi), %edi
vmovd %edi, %xmm0
vpinsrd $0x1, %ecx, %xmm0, %xmm0
vpinsrd $0x2, %edx, %xmm0, %xmm0
vpinsrd $0x3, %esi, %xmm0, %xmm7
vmovdqa %ymm10, 0x3c0(%rsp)
vextracti64x4 $0x1, %zmm10, 0xe0(%rsp)
movslq 0xfc(%rsp), %rcx
movzbl (%r13,%rcx), %ecx
movslq 0xf8(%rsp), %rdx
movzbl (%r13,%rdx), %edx
movslq 0xf4(%rsp), %rsi
movzbl (%r13,%rsi), %esi
movslq 0xf0(%rsp), %rdi
movzbl (%r13,%rdi), %edi
vmovd %edi, %xmm0
movslq 0xec(%rsp), %rdi
vpinsrd $0x1, %esi, %xmm0, %xmm0
movzbl (%r13,%rdi), %esi
movslq 0xe8(%rsp), %rdi
vpinsrd $0x2, %edx, %xmm0, %xmm0
movzbl (%r13,%rdi), %edx
movslq 0xe4(%rsp), %rdi
vpinsrd $0x3, %ecx, %xmm0, %xmm0
movzbl (%r13,%rdi), %ecx
movslq 0xe0(%rsp), %rdi
movzbl (%r13,%rdi), %edi
vmovd %edi, %xmm1
movslq 0x3dc(%rsp), %rdi
movzbl (%r13,%rdi), %edi
vpinsrd $0x1, %ecx, %xmm1, %xmm1
movslq 0x3d8(%rsp), %rcx
movzbl (%r13,%rcx), %ecx
vpinsrd $0x2, %edx, %xmm1, %xmm1
movslq 0x3d4(%rsp), %rdx
movzbl (%r13,%rdx), %edx
vpinsrd $0x3, %esi, %xmm1, %xmm1
movslq 0x3d0(%rsp), %rsi
movzbl (%r13,%rsi), %esi
vmovd %esi, %xmm3
movslq 0x3cc(%rsp), %rsi
movzbl (%r13,%rsi), %esi
vpinsrd $0x1, %edx, %xmm3, %xmm3
movslq 0x3c8(%rsp), %rdx
movzbl (%r13,%rdx), %edx
vpinsrd $0x2, %ecx, %xmm3, %xmm3
movslq 0x3c4(%rsp), %rcx
movzbl (%r13,%rcx), %ecx
vpinsrd $0x3, %edi, %xmm3, %xmm3
movslq 0x3c0(%rsp), %rdi
movzbl (%r13,%rdi), %edi
vmovd %edi, %xmm5
vpinsrd $0x1, %ecx, %xmm5, %xmm5
vpinsrd $0x2, %edx, %xmm5, %xmm5
vpinsrd $0x3, %esi, %xmm5, %xmm5
vinserti128 $0x1, %xmm2, %ymm4, %ymm2
vinserti128 $0x1, %xmm6, %ymm7, %ymm4
vinserti64x4 $0x1, %ymm2, %zmm4, %zmm2
vinserti128 $0x1, %xmm0, %ymm1, %ymm0
vinserti128 $0x1, %xmm3, %ymm5, %ymm1
vinserti64x4 $0x1, %ymm0, %zmm1, %zmm0
vpandq %zmm16, %zmm2, %zmm20
vpandq %zmm16, %zmm0, %zmm22
vmovd %xmm14, %ecx
movslq %ecx, %rdi
movq %rdi, 0xd8(%rsp)
vpextrd $0x1, %xmm14, %ecx
movslq %ecx, %r8
movq %r8, 0x1b0(%rsp)
vextracti128 $0x1, %ymm14, %xmm0
vmovd %xmm0, %ecx
movslq %ecx, %r11
movq %r11, 0x38(%rsp)
vpextrd $0x1, %xmm0, %ecx
vpextrd $0x2, %xmm0, %edx
movslq %ecx, %rbx
movq %rbx, 0xc0(%rsp)
movslq %edx, %r10
movq %r10, 0xa0(%rsp)
vpextrd $0x3, %xmm0, %ecx
movslq %ecx, %r9
movq %r9, 0x10(%rsp)
vextracti32x4 $0x2, %zmm14, %xmm0
vmovd %xmm0, %ecx
movslq %ecx, %rax
movq %rax, 0x20(%rsp)
vpextrd $0x1, %xmm0, %ecx
vpextrd $0x2, %xmm0, %edx
movslq %ecx, %r15
movq %r15, 0x120(%rsp)
vextracti32x4 $0x3, %zmm14, %xmm1
vmovd %xmm1, %ecx
movslq %ecx, %r14
movq %r14, 0x190(%rsp)
vpextrd $0x1, %xmm1, %ecx
vpextrd $0x2, %xmm1, %esi
movslq %ecx, %r13
movq %r13, 0x18(%rsp)
movslq %esi, %rsi
movq %rsi, 0x60(%rsp)
vpextrd $0x3, %xmm1, %ecx
movslq %ecx, %rcx
movq %rcx, 0x40(%rsp)
vmovd (%r12,%r14,4), %xmm1
vpinsrd $0x1, (%r12,%r13,4), %xmm1, %xmm1
vpinsrd $0x2, (%r12,%rsi,4), %xmm1, %xmm1
vpinsrd $0x3, (%r12,%rcx,4), %xmm1, %xmm15
movslq %edx, %rcx
movq %rcx, 0xc8(%rsp)
vmovd (%r12,%rax,4), %xmm1
vpinsrd $0x1, (%r12,%r15,4), %xmm1, %xmm1
vpinsrd $0x2, (%r12,%rcx,4), %xmm1, %xmm1
vpextrd $0x3, %xmm0, %ecx
movslq %ecx, %rax
movq %rax, 0xb8(%rsp)
vpinsrd $0x3, (%r12,%rax,4), %xmm1, %xmm6
vmovd (%r12,%r11,4), %xmm0
vpinsrd $0x1, (%r12,%rbx,4), %xmm0, %xmm0
vpinsrd $0x2, (%r12,%r10,4), %xmm0, %xmm0
vpinsrd $0x3, (%r12,%r9,4), %xmm0, %xmm4
vpextrd $0x2, %xmm14, %ecx
movslq %ecx, %rax
movq %rax, 0x70(%rsp)
vmovd (%r12,%rdi,4), %xmm0
vpinsrd $0x1, (%r12,%r8,4), %xmm0, %xmm0
vpinsrd $0x2, (%r12,%rax,4), %xmm0, %xmm0
vpextrd $0x3, %xmm14, %ecx
movslq %ecx, %rax
movq %rax, 0xd0(%rsp)
vpinsrd $0x3, (%r12,%rax,4), %xmm0, %xmm14
vmovd %xmm12, %ecx
movslq %ecx, %rbx
vpextrd $0x1, %xmm12, %ecx
movslq %ecx, %r13
vpextrd $0x2, %xmm12, %ecx
vpextrd $0x3, %xmm12, %edx
movslq %ecx, %r15
movslq %edx, %r11
movq %r11, 0x198(%rsp)
vextracti128 $0x1, %ymm12, %xmm0
vmovd %xmm0, %ecx
movslq %ecx, %r10
movq %r10, 0x78(%rsp)
vpextrd $0x1, %xmm0, %ecx
movslq %ecx, %r14
vextracti32x4 $0x2, %zmm12, %xmm1
vmovd %xmm1, %ecx
vpextrd $0x1, %xmm1, %edx
movslq %ecx, %r9
movq %r9, 0x90(%rsp)
movslq %edx, %r8
movq %r8, 0x88(%rsp)
vpextrd $0x2, %xmm1, %ecx
movslq %ecx, %rdi
movq %rdi, 0xa8(%rsp)
vpextrd $0x3, %xmm1, %ecx
movslq %ecx, %rsi
movq %rsi, 0xb0(%rsp)
vextracti32x4 $0x3, %zmm12, %xmm1
vmovd %xmm1, %ecx
vpextrd $0x1, %xmm1, %edx
movq %r12, %rax
movslq %ecx, %r12
movq %r12, 0x1a0(%rsp)
movslq %edx, %rdx
movq %rdx, 0x1a8(%rsp)
vpextrd $0x2, %xmm1, %ecx
movslq %ecx, %rcx
movq %rcx, 0x98(%rsp)
vmovd (%rax,%r12,4), %xmm2
movq %rax, %r12
vpinsrd $0x1, (%rax,%rdx,4), %xmm2, %xmm2
vpinsrd $0x2, (%rax,%rcx,4), %xmm2, %xmm2
vpextrd $0x3, %xmm1, %ecx
movslq %ecx, %rax
movq %rax, 0x80(%rsp)
vpinsrd $0x3, (%r12,%rax,4), %xmm2, %xmm1
vmovd (%r12,%r9,4), %xmm2
vpinsrd $0x1, (%r12,%r8,4), %xmm2, %xmm2
vpinsrd $0x2, (%r12,%rdi,4), %xmm2, %xmm2
vpinsrd $0x3, (%r12,%rsi,4), %xmm2, %xmm2
vpextrd $0x2, %xmm0, %ecx
movslq %ecx, %rdi
vmovd (%r12,%r10,4), %xmm3
vpinsrd $0x1, (%r12,%r14,4), %xmm3, %xmm3
movq %r14, %r8
movq %r14, 0x1b8(%rsp)
vpinsrd $0x2, (%r12,%rdi,4), %xmm3, %xmm3
vpextrd $0x3, %xmm0, %ecx
movslq %ecx, %rax
movq %rax, 0x188(%rsp)
vpinsrd $0x3, (%r12,%rax,4), %xmm3, %xmm0
vmovd (%r12,%rbx,4), %xmm3
movq %rbx, %rdx
movq %rbx, 0x118(%rsp)
movq %r13, %rsi
vpinsrd $0x1, (%r12,%r13,4), %xmm3, %xmm3
vpinsrd $0x2, (%r12,%r15,4), %xmm3, %xmm3
movq %r15, %r9
vinserti128 $0x1, %xmm1, %ymm2, %ymm1
vpinsrd $0x3, (%r12,%r11,4), %xmm3, %xmm2
movq 0x190(%rsp), %r10
vmovd 0xc(%r12,%r10,4), %xmm3
movq 0x18(%rsp), %rax
vpinsrd $0x1, 0xc(%r12,%rax,4), %xmm3, %xmm3
movq 0x60(%rsp), %rax
vpinsrd $0x2, 0xc(%r12,%rax,4), %xmm3, %xmm3
vinserti128 $0x1, %xmm0, %ymm2, %ymm0
movq 0x40(%rsp), %rax
vpinsrd $0x3, 0xc(%r12,%rax,4), %xmm3, %xmm12
movq 0x20(%rsp), %rax
vmovd 0xc(%r12,%rax,4), %xmm2
movq 0x120(%rsp), %rax
vpinsrd $0x1, 0xc(%r12,%rax,4), %xmm2, %xmm2
movq 0xc8(%rsp), %rax
vpinsrd $0x2, 0xc(%r12,%rax,4), %xmm2, %xmm2
vinserti64x4 $0x1, %ymm1, %zmm0, %zmm1
movq 0xb8(%rsp), %rax
vpinsrd $0x3, 0xc(%r12,%rax,4), %xmm2, %xmm13
movq 0x38(%rsp), %rax
vmovd 0xc(%r12,%rax,4), %xmm0
movq 0xc0(%rsp), %rax
vpinsrd $0x1, 0xc(%r12,%rax,4), %xmm0, %xmm0
movq 0xa0(%rsp), %rax
vpinsrd $0x2, 0xc(%r12,%rax,4), %xmm0, %xmm0
vpcmpgtd %zmm1, %zmm25, %k2
kmovw %k2, %ecx
popcntl %ecx, %ecx
leal (%rcx,%rcx), %r15d
movq 0x150(%rsp), %r14
subq %r15, %r14
movq 0x10(%rsp), %rax
vpinsrd $0x3, 0xc(%r12,%rax,4), %xmm0, %xmm7
movq 0xd8(%rsp), %rax
vmovd 0xc(%r12,%rax,4), %xmm0
movq 0x1b0(%rsp), %r13
vpinsrd $0x1, 0xc(%r12,%r13,4), %xmm0, %xmm0
movq 0x70(%rsp), %rax
vpinsrd $0x2, 0xc(%r12,%rax,4), %xmm0, %xmm0
movq 0xd0(%rsp), %rax
vpinsrd $0x3, 0xc(%r12,%rax,4), %xmm0, %xmm2
movl $0xffffffff, %r15d      # imm = 0xFFFFFFFF
shll %cl, %r15d
notl %r15d
kmovw %r15d, %k4
movq 0x1a0(%rsp), %r11
vmovd 0xc(%r12,%r11,4), %xmm0
movq 0x1a8(%rsp), %rbx
vpinsrd $0x1, 0xc(%r12,%rbx,4), %xmm0, %xmm0
movq 0x98(%rsp), %rax
vpinsrd $0x2, 0xc(%r12,%rax,4), %xmm0, %xmm0
movq 0x80(%rsp), %rax
vpinsrd $0x3, 0xc(%r12,%rax,4), %xmm0, %xmm0
vmovdqa %xmm0, 0x150(%rsp)
vinserti128 $0x1, %xmm15, %ymm6, %ymm0
movq 0x90(%rsp), %rax
vmovd 0xc(%r12,%rax,4), %xmm1
movq 0x88(%rsp), %rax
vpinsrd $0x1, 0xc(%r12,%rax,4), %xmm1, %xmm1
movq 0xa8(%rsp), %rax
vpinsrd $0x2, 0xc(%r12,%rax,4), %xmm1, %xmm1
movq 0xb0(%rsp), %rax
vpinsrd $0x3, 0xc(%r12,%rax,4), %xmm1, %xmm1
vmovdqa %ymm1, 0x260(%rsp)
vinserti128 $0x1, %xmm4, %ymm14, %ymm1
movq 0x78(%rsp), %rax
vmovd 0xc(%r12,%rax,4), %xmm3
vpinsrd $0x1, 0xc(%r12,%r8,4), %xmm3, %xmm3
vpinsrd $0x2, 0xc(%r12,%rdi,4), %xmm3, %xmm3
movq 0x188(%rsp), %r8
vpinsrd $0x3, 0xc(%r12,%r8,4), %xmm3, %xmm3
vmovdqa %xmm3, 0x160(%rsp)
vinserti64x4 $0x1, %ymm0, %zmm1, %zmm0
vmovd 0xc(%r12,%rdx,4), %xmm1
vpinsrd $0x1, 0xc(%r12,%rsi,4), %xmm1, %xmm1
vpcmpgtd %zmm0, %zmm24, %k3
vpinsrd $0x2, 0xc(%r12,%r9,4), %xmm1, %xmm0
kmovw %k3, %ecx
popcntl %ecx, %ecx
movq 0x198(%rsp), %rdx
vpinsrd $0x3, 0xc(%r12,%rdx,4), %xmm0, %xmm0
vmovdqa %ymm0, 0x3a0(%rsp)
vpandq %zmm19, %zmm25, %zmm0
vpcompressd %zmm0, %zmm0 {%k2} {z}
vpmovdw %zmm0, (%r14) {%k4}
movl $0xffffffff, %r15d      # imm = 0xFFFFFFFF
shll %cl, %r15d
addl %ecx, %ecx
subq %rcx, %r14
notl %r15d
kmovw %r15d, %k4
vpandq %zmm19, %zmm24, %zmm0
vpcompressd %zmm0, %zmm0 {%k3} {z}
vpmovdw %zmm0, (%r14) {%k4}
vmovd 0x4(%r12,%r10,4), %xmm3
vmovd 0x8(%r12,%r10,4), %xmm0
movq 0x18(%rsp), %rax
vpinsrd $0x1, 0x4(%r12,%rax,4), %xmm3, %xmm1
vpinsrd $0x1, 0x8(%r12,%rax,4), %xmm0, %xmm0
movq 0x60(%rsp), %rax
vpinsrd $0x2, 0x4(%r12,%rax,4), %xmm1, %xmm1
vpinsrd $0x2, 0x8(%r12,%rax,4), %xmm0, %xmm0
movq 0x40(%rsp), %rax
vpinsrd $0x3, 0x4(%r12,%rax,4), %xmm1, %xmm1
vmovdqa %xmm1, 0x60(%rsp)
vpinsrd $0x3, 0x8(%r12,%rax,4), %xmm0, %xmm0
vmovdqa %xmm0, 0x40(%rsp)
movq 0x20(%rsp), %rax
vmovd 0x4(%r12,%rax,4), %xmm0
vmovd 0x8(%r12,%rax,4), %xmm1
movq 0x120(%rsp), %rax
vpinsrd $0x1, 0x4(%r12,%rax,4), %xmm0, %xmm0
vpinsrd $0x1, 0x8(%r12,%rax,4), %xmm1, %xmm1
movq 0xc8(%rsp), %rax
vpinsrd $0x2, 0x4(%r12,%rax,4), %xmm0, %xmm0
vpinsrd $0x2, 0x8(%r12,%rax,4), %xmm1, %xmm1
movq 0xb8(%rsp), %rax
vpinsrd $0x3, 0x4(%r12,%rax,4), %xmm0, %xmm6
vpinsrd $0x3, 0x8(%r12,%rax,4), %xmm1, %xmm0
vmovdqa %ymm0, 0x120(%rsp)
movq 0x38(%rsp), %rcx
vmovd 0x4(%r12,%rcx,4), %xmm0
vmovd 0x8(%r12,%rcx,4), %xmm1
movq 0xc0(%rsp), %rcx
vpinsrd $0x1, 0x4(%r12,%rcx,4), %xmm0, %xmm0
vpinsrd $0x1, 0x8(%r12,%rcx,4), %xmm1, %xmm1
movq 0xa0(%rsp), %rcx
vpinsrd $0x2, 0x4(%r12,%rcx,4), %xmm0, %xmm0
vpinsrd $0x2, 0x8(%r12,%rcx,4), %xmm1, %xmm1
movq 0x10(%rsp), %rcx
vpinsrd $0x3, 0x4(%r12,%rcx,4), %xmm0, %xmm9
vpinsrd $0x3, 0x8(%r12,%rcx,4), %xmm1, %xmm11
movq 0xd8(%rsp), %rcx
vmovd 0x4(%r12,%rcx,4), %xmm0
vmovd 0x8(%r12,%rcx,4), %xmm1
vpinsrd $0x1, 0x4(%r12,%r13,4), %xmm0, %xmm0
vpinsrd $0x1, 0x8(%r12,%r13,4), %xmm1, %xmm1
movq 0x70(%rsp), %rax
vpinsrd $0x2, 0x4(%r12,%rax,4), %xmm0, %xmm0
vpinsrd $0x2, 0x8(%r12,%rax,4), %xmm1, %xmm1
movq 0xd0(%rsp), %rax
vpinsrd $0x3, 0x4(%r12,%rax,4), %xmm0, %xmm3
vpinsrd $0x3, 0x8(%r12,%rax,4), %xmm1, %xmm5
vinserti128 $0x1, %xmm12, %ymm13, %ymm12
vinserti128 $0x1, %xmm7, %ymm2, %ymm7
vmovd 0x4(%r12,%r11,4), %xmm2
vmovd 0x8(%r12,%r11,4), %xmm13
vpinsrd $0x1, 0x4(%r12,%rbx,4), %xmm2, %xmm2
vpinsrd $0x1, 0x8(%r12,%rbx,4), %xmm13, %xmm13
movq 0x58(%rsp), %r13
movq 0x98(%rsp), %rax
vpinsrd $0x2, 0x4(%r12,%rax,4), %xmm2, %xmm2
vpinsrd $0x2, 0x8(%r12,%rax,4), %xmm13, %xmm13
movq 0x80(%rsp), %rax
vpinsrd $0x3, 0x4(%r12,%rax,4), %xmm2, %xmm2
vpinsrd $0x3, 0x8(%r12,%rax,4), %xmm13, %xmm13
movq 0x90(%rsp), %rax
vmovd 0x4(%r12,%rax,4), %xmm4
movq 0x88(%rsp), %rcx
vpinsrd $0x1, 0x4(%r12,%rcx,4), %xmm4, %xmm4
vmovdqa64 %zmm8, %zmm15
vmovd 0x8(%r12,%rax,4), %xmm8
vpinsrd $0x1, 0x8(%r12,%rcx,4), %xmm8, %xmm8
movq 0xa8(%rsp), %rax
vpinsrd $0x2, 0x4(%r12,%rax,4), %xmm4, %xmm4
vpinsrd $0x2, 0x8(%r12,%rax,4), %xmm8, %xmm8
movq 0xb0(%rsp), %rax
vpinsrd $0x3, 0x4(%r12,%rax,4), %xmm4, %xmm1
vinserti64x4 $0x1, %ymm12, %zmm7, %zmm26
vpinsrd $0x3, 0x8(%r12,%rax,4), %xmm8, %xmm7
vmovdqa 0x260(%rsp), %ymm0
vinserti128 $0x1, 0x150(%rsp), %ymm0, %ymm8
movq 0x78(%rsp), %rax
vmovd 0x4(%r12,%rax,4), %xmm4
movq 0x1b8(%rsp), %rcx
vpinsrd $0x1, 0x4(%r12,%rcx,4), %xmm4, %xmm4
vmovd 0x8(%r12,%rax,4), %xmm14
vpinsrd $0x1, 0x8(%r12,%rcx,4), %xmm14, %xmm14
vpinsrd $0x2, 0x4(%r12,%rdi,4), %xmm4, %xmm4
vpinsrd $0x2, 0x8(%r12,%rdi,4), %xmm14, %xmm14
vpinsrd $0x3, 0x4(%r12,%r8,4), %xmm4, %xmm4
vmovdqa 0x3a0(%rsp), %ymm0
vinserti128 $0x1, 0x160(%rsp), %ymm0, %ymm12
vpinsrd $0x3, 0x8(%r12,%r8,4), %xmm14, %xmm14
vinserti64x4 $0x1, %ymm8, %zmm12, %zmm8
movq 0x118(%rsp), %rax
vmovd 0x4(%r12,%rax,4), %xmm12
vmovd 0x8(%r12,%rax,4), %xmm0
vpinsrd $0x1, 0x4(%r12,%rsi,4), %xmm12, %xmm12
vpinsrd $0x1, 0x8(%r12,%rsi,4), %xmm0, %xmm0
vinserti128 $0x1, 0x60(%rsp), %ymm6, %ymm6
vinserti128 $0x1, %xmm9, %ymm3, %ymm3
vinserti64x4 $0x1, %ymm6, %zmm3, %zmm3
vinserti128 $0x1, %xmm2, %ymm1, %ymm1
vpinsrd $0x2, 0x4(%r12,%r9,4), %xmm12, %xmm2
vpinsrd $0x3, 0x4(%r12,%rdx,4), %xmm2, %xmm2
vinserti128 $0x1, %xmm4, %ymm2, %ymm2
vinserti64x4 $0x1, %ymm1, %zmm2, %zmm1
vmovdqa 0x120(%rsp), %ymm2
vinserti128 $0x1, 0x40(%rsp), %ymm2, %ymm2
vinserti128 $0x1, %xmm11, %ymm5, %ymm4
vinserti64x4 $0x1, %ymm2, %zmm4, %zmm2
vpsrld $0x10, %zmm24, %zmm24 {%k3}
vpsrld $0x10, %zmm25, %zmm25 {%k2}
vpsrlq $0x20, %zmm24, %zmm4
vpsrlq $0x20, %zmm3, %zmm5
vpmuludq %zmm4, %zmm5, %zmm4
vpsrlq $0x20, %zmm25, %zmm5
vpsrlq $0x20, %zmm1, %zmm6
vpmuludq %zmm5, %zmm6, %zmm5
vpmuludq %zmm24, %zmm3, %zmm3
vpsrlq $0x20, %zmm3, %zmm3
vpord %zmm4, %zmm3, %zmm3 {%k1}
vpmuludq %zmm25, %zmm1, %zmm1
vpsrlq $0x20, %zmm1, %zmm1
vpord %zmm5, %zmm1, %zmm1 {%k1}
vinserti128 $0x1, %xmm13, %ymm7, %ymm4
vpinsrd $0x2, 0x8(%r12,%r9,4), %xmm0, %xmm0
vpinsrd $0x3, 0x8(%r12,%rdx,4), %xmm0, %xmm0
vinserti128 $0x1, %xmm14, %ymm0, %ymm0
vinserti64x4 $0x1, %ymm4, %zmm0, %zmm0
vpsrld $0x10, %zmm26, %zmm4
vpsrld $0x10, %zmm8, %zmm5
vpaddd %zmm18, %zmm4, %zmm4
vpsrlvd %zmm4, %zmm3, %zmm3
vpaddd %zmm18, %zmm5, %zmm4
vpsrlvd %zmm4, %zmm1, %zmm1
vpandq %zmm19, %zmm26, %zmm4
vpmulld %zmm4, %zmm3, %zmm3
vpandq %zmm19, %zmm8, %zmm4
vmovdqa64 %zmm15, %zmm8
vpmulld %zmm4, %zmm1, %zmm1
vpaddd %zmm2, %zmm24, %zmm2
vpaddd %zmm3, %zmm2, %zmm24
vpaddd %zmm0, %zmm25, %zmm0
vpaddd %zmm0, %zmm1, %zmm25
movl 0x1c0(%rsp), %ecx
leal -0x1(%rcx), %r8d
movl %r8d, 0x1c0(%rsp)
vmovdqa64 %zmm23, %zmm12
vmovdqa64 %zmm21, %zmm13
testl %ecx, %ecx
movl 0x34(%rsp), %edx
jg 0x7163e
jmp 0x7240d
vmovdqa64 %zmm13, %zmm21
vmovdqa64 %zmm12, %zmm23
movq 0x28(%rsp), %r15
movq %r15, %r13
movq 0x50(%rsp), %rbx
subq %rbx, %r13
vmovdqa64 %zmm24, 0x280(%rsp)
vmovdqa64 %zmm25, 0x2c0(%rsp)
vmovdqa64 %zmm23, 0x300(%rsp)
vmovdqa64 %zmm21, 0x340(%rsp)
movl $0x1f, %edi
movl 0x300(%rsp,%rdi,4), %r9d
shlq $0x4, %r9
movl 0x280(%rsp,%rdi,4), %r10d
xorl %ecx, %ecx
cmpl (%r12,%r9), %r10d
seta %cl
movq %r14, %rsi
leal (%rcx,%rcx), %r8d
movw %r10w, -0x2(%r14)
shll $0x4, %ecx
shrl %cl, %r10d
movl 0x4(%r12,%r9), %r11d
imulq %r10, %r11
movb 0xe(%r12,%r9), %cl
shrq %cl, %r11
subq %r8, %r14
addl 0x8(%r12,%r9), %r10d
movzwl 0xc(%r12,%r9), %ecx
imull %r11d, %ecx
addl %r10d, %ecx
movl %ecx, 0x280(%rsp,%rdi,4)
addq $-0x1, %rdi
jb 0x72442
movl %r8d, %eax
movq %rsi, %rdi
subq %rax, %rdi
addl 0x110(%rsp), %r15d
addl %r8d, %r15d
subl %esi, %r15d
xorl %ecx, %ecx
movl 0x2fc(%rsp,%rcx), %r8d
movl %r8d, -0x4(%rdi,%rcx)
addq $-0x4, %rcx
addl $0x4, %r15d
cmpq $-0x80, %rcx
jne 0x724bd
movq 0x110(%rsp), %rdx
addq %rbx, %rdx
addq %rax, %rdx
subq %rsi, %rdx
subq %rcx, %rdx
movl %r13d, %edi
movq 0x178(%rsp), %r8
movl %r15d, (%r8)
addq %rbx, %rdi
subq %rax, %rsi
addq %rcx, %rsi
vzeroupper
callq 0x4830
movq %r12, %rdi
callq 0x80732
jmp 0x71038
leaq 0x2c6f7(%rip), %rdi     # 0x9ec16
leaq 0x2c68a(%rip), %rsi     # 0x9ebb0
leaq 0x2c6a3(%rip), %rcx     # 0x9ebd0
movl $0xcc, %edx
callq 0x42f0
leaq 0x2c6f4(%rip), %rdi     # 0x9ec32
leaq 0x2c66b(%rip), %rsi     # 0x9ebb0
leaq 0x2c684(%rip), %rcx     # 0x9ebd0
movl $0xcd, %edx
callq 0x42f0
leaq 0x30763(%rip), %rdi     # 0xa2cc0
leaq 0x2c64c(%rip), %rsi     # 0x9ebb0
leaq 0x2c665(%rip), %rcx     # 0x9ebd0
movl $0xcb, %edx
callq 0x42f0