LLM4Binary/decompile-bench-makefile huggingface dataset:
// File: CMU-SAFARI[P]MQSim/src/ssd/Host_Interface_SATA.cpp
// Function: SSD_Components::Input_Stream_Manager_SATA::Input_Stream_Manager_SATA(SSD_Components::Host_Interface_Base*, unsigned short, unsigned long, unsigned long)
Input_Stream_Manager_SATA::Input_Stream_Manager_SATA(Host_Interface_Base* host_interface, uint16_t ncq_depth,
		LHA_type start_logical_sector_address, LHA_type end_logical_sector_address) :
		ncq_depth(ncq_depth), Input_Stream_Manager_Base(host_interface)
	{
		if (end_logical_sector_address < start_logical_sector_address) {
			PRINT_ERROR("Error in allocating address range to a stream in host interface: the start address should be smaller than the end address.")
		}
		Input_Stream_SATA* input_stream = new Input_Stream_SATA(start_logical_sector_address, end_logical_sector_address, 0, 0);
		this->input_streams.push_back(input_stream);
	}

// Assembly:
subq $0x68, %rsp
movw %dx, %ax
movq %rdi, 0x60(%rsp)
movq %rsi, 0x58(%rsp)
movw %ax, 0x56(%rsp)
movq %rcx, 0x48(%rsp)
movq %r8, 0x40(%rsp)
movq 0x60(%rsp), %rdi
movq %rdi, 0x18(%rsp)
movq 0x58(%rsp), %rsi
callq 0x848a0
movq 0x18(%rsp), %rax
leaq 0x503a0(%rip), %rcx     # 0xd9980
addq $0x10, %rcx
movq %rcx, (%rax)
movw 0x56(%rsp), %cx
movw %cx, 0x28(%rax)
movq 0x40(%rsp), %rax
cmpq 0x48(%rsp), %rax
jae 0x89666
movq 0x509ed(%rip), %rdi     # 0xd9ff0
leaq 0x212de(%rip), %rsi     # 0xaa8e8
callq 0x8440
jmp 0x89611
movq 0x509d8(%rip), %rdi     # 0xd9ff0
leaq 0x24b87(%rip), %rsi     # 0xae1a6
callq 0x8440
movq %rax, 0x10(%rsp)
jmp 0x8962b
movq 0x10(%rsp), %rdi
movq 0x50921(%rip), %rsi     # 0xd9f58
callq 0x8480
jmp 0x8963e
movq 0x5098b(%rip), %rdi     # 0xd9fd0
callq 0x84f0
jmp 0x8964c
movl $0x1, %edi
callq 0x8500
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x38(%rsp)
movl %eax, 0x34(%rsp)
jmp 0x896db
movl $0xc8, %edi
callq 0x8450
movq %rax, 0x8(%rsp)
jmp 0x89677
movq 0x8(%rsp), %rdi
movq 0x48(%rsp), %rsi
movq 0x40(%rsp), %rdx
xorl %eax, %eax
movl %eax, %r8d
movq %r8, %rcx
callq 0x8b290
jmp 0x89695
movq 0x18(%rsp), %rdi
movq 0x8(%rsp), %rax
movq %rax, 0x28(%rsp)
addq $0x10, %rdi
movq 0x28(%rsp), %rax
movq %rax, 0x20(%rsp)
leaq 0x20(%rsp), %rsi
callq 0x87e00
jmp 0x896be
addq $0x68, %rsp
retq
movq 0x8(%rsp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x38(%rsp)
movl %eax, 0x34(%rsp)
callq 0x8410
movq 0x18(%rsp), %rdi
callq 0x84390
movq 0x38(%rsp), %rdi
callq 0x8770
nop
// File: CMU-SAFARI[P]MQSim/src/ssd/Host_Interface_SATA.cpp
// Function: SSD_Components::Request_Fetch_Unit_SATA::Process_pcie_write_message(unsigned long, void*, unsigned int)
void Request_Fetch_Unit_SATA::Process_pcie_write_message(uint64_t address, void * payload, unsigned int payload_size)
	{
		Host_Interface_SATA* hi = (Host_Interface_SATA*)host_interface;
		uint64_t val = (uint64_t)payload;
		switch (address)
		{
			case NCQ_SUBMISSION_REGISTER:
				((Input_Stream_Manager_SATA*)(hi->input_stream_manager))->Submission_queue_tail_pointer_update((uint16_t)val);
				break;
			case NCQ_COMPLETION_REGISTER:
				((Input_Stream_Manager_SATA*)(hi->input_stream_manager))->Completion_queue_head_pointer_update((uint16_t)val);
				break;
			default:
				throw std::invalid_argument("Unknown register is written in Request_Fetch_Unit_SATA!");
		}
	}

// Assembly:
subq $0x58, %rsp
movq %rdi, 0x50(%rsp)
movq %rsi, 0x48(%rsp)
movq %rdx, 0x40(%rsp)
movl %ecx, 0x3c(%rsp)
movq 0x50(%rsp), %rax
movq 0x8(%rax), %rax
movq %rax, 0x30(%rsp)
movq 0x40(%rsp), %rax
movq %rax, 0x28(%rsp)
movq 0x48(%rsp), %rax
movq %rax, 0x10(%rsp)
subq $0x1000, %rax           # imm = 0x1000
je 0x89d92
jmp 0x89d83
movq 0x10(%rsp), %rax
subq $0x1003, %rax           # imm = 0x1003
je 0x89daa
jmp 0x89dc2
movq 0x30(%rsp), %rax
movq 0x50(%rax), %rdi
movq 0x28(%rsp), %rax
movzwl %ax, %esi
callq 0x8b490
jmp 0x89e17
movq 0x30(%rsp), %rax
movq 0x50(%rax), %rdi
movq 0x28(%rsp), %rax
movzwl %ax, %esi
callq 0x8b580
jmp 0x89e17
movl $0x10, %edi
callq 0x8200
movq %rax, %rdi
movq %rdi, %rax
movq %rax, 0x8(%rsp)
leaq 0x246c8(%rip), %rsi     # 0xae4a6
callq 0x87d0
jmp 0x89de5
movq 0x8(%rsp), %rdi
movq 0x501d7(%rip), %rsi     # 0xd9fc8
movq 0x501b8(%rip), %rdx     # 0xd9fb0
callq 0x8710
movq 0x8(%rsp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x20(%rsp)
movl %eax, 0x1c(%rsp)
callq 0x8330
jmp 0x89e1c
addq $0x58, %rsp
retq
movq 0x20(%rsp), %rdi
callq 0x8770
nopw %cs:(%rax,%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/Host_Interface_SATA.cpp
// Function: SSD_Components::Request_Fetch_Unit_SATA::Fetch_next_request(unsigned short)
void Request_Fetch_Unit_SATA::Fetch_next_request(stream_id_type stream_id)
	{
		DMA_Req_Item* dma_req_item = new DMA_Req_Item;
		dma_req_item->Type = DMA_Req_Type::REQUEST_INFO;
		dma_req_item->object = (void *)SATA_STREAM_ID;
		dma_list.push_back(dma_req_item);

		Host_Interface_SATA* hi = (Host_Interface_SATA*)host_interface;
		Input_Stream_SATA* im = ((Input_Stream_SATA*)hi->input_stream_manager->input_streams[SATA_STREAM_ID]);
		host_interface->Send_read_message_to_host(im->Submission_queue_base_address + im->Submission_head * sizeof(Submission_Queue_Entry), sizeof(Submission_Queue_Entry));
	}

// Assembly:
subq $0x38, %rsp
movw %si, %ax
movq %rdi, 0x30(%rsp)
movw %ax, 0x2e(%rsp)
movq 0x30(%rsp), %rax
movq %rax, 0x8(%rsp)
movl $0x10, %edi
callq 0x8450
movq 0x8(%rsp), %rdi
movq %rax, 0x20(%rsp)
movq 0x20(%rsp), %rax
movl $0x0, (%rax)
movq 0x20(%rsp), %rax
movq $0x0, 0x8(%rax)
addq $0x10, %rdi
leaq 0x20(%rsp), %rsi
callq 0x88310
movq 0x8(%rsp), %rax
movq 0x8(%rax), %rax
movq %rax, 0x18(%rsp)
movq 0x18(%rsp), %rax
movq 0x50(%rax), %rdi
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq %rax, %rcx
movq 0x8(%rsp), %rax
movq (%rcx), %rcx
movq %rcx, 0x10(%rsp)
movq 0x8(%rax), %rdi
movq 0x10(%rsp), %rax
movq 0x58(%rax), %rsi
movq 0x10(%rsp), %rax
movzwl 0x68(%rax), %eax
imulq $0x48, %rax, %rax
addq %rax, %rsi
movl $0x48, %edx
callq 0x846f0
addq $0x38, %rsp
retq
nopw %cs:(%rax,%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/Host_Interface_SATA.cpp
// Function: SSD_Components::Request_Fetch_Unit_SATA::Send_completion_queue_element(SSD_Components::User_Request*, unsigned short)
void Request_Fetch_Unit_SATA::Send_completion_queue_element(User_Request* request, uint16_t sq_head_value)
	{
		Host_Interface_SATA* hi = (Host_Interface_SATA*)host_interface;
		Completion_Queue_Entry* cqe = new Completion_Queue_Entry;
		cqe->SQ_Head = sq_head_value;
		cqe->SQ_ID = FLOW_ID_TO_Q_ID(SATA_STREAM_ID);
		cqe->SF_P = 0x0001 & current_phase;
		cqe->Command_Identifier = ((Submission_Queue_Entry*)request->IO_command_info)->Command_Identifier;
		Input_Stream_SATA* im = ((Input_Stream_SATA*)hi->input_stream_manager->input_streams[SATA_STREAM_ID]);
		host_interface->Send_write_message_to_host(im->Completion_queue_base_address + im->Completion_tail * sizeof(Completion_Queue_Entry), cqe, sizeof(Completion_Queue_Entry));
		number_of_sent_cqe++;
		if (number_of_sent_cqe % ncq_depth == 0) {
			if (current_phase == 0xffff) {//According to protocol specification, the value of the Phase Tag is inverted each pass through the Completion Queue
				current_phase = 0xfffe;
			} else {
				current_phase = 0xffff;
			}
		}
	}

// Assembly:
subq $0x38, %rsp
movw %dx, %ax
movq %rdi, 0x30(%rsp)
movq %rsi, 0x28(%rsp)
movw %ax, 0x26(%rsp)
movq 0x30(%rsp), %rax
movq %rax, (%rsp)
movq 0x8(%rax), %rax
movq %rax, 0x18(%rsp)
movl $0x10, %edi
callq 0x8450
movq %rax, %rcx
movq (%rsp), %rax
movq %rcx, 0x10(%rsp)
movw 0x26(%rsp), %dx
movq 0x10(%rsp), %rcx
movw %dx, 0x8(%rcx)
movq 0x10(%rsp), %rcx
movw $0x1, 0xa(%rcx)
movzwl 0x28(%rax), %eax
andl $0x1, %eax
movw %ax, %cx
movq 0x10(%rsp), %rax
movw %cx, 0xe(%rax)
movq 0x28(%rsp), %rax
movq 0x70(%rax), %rax
movw 0x2(%rax), %cx
movq 0x10(%rsp), %rax
movw %cx, 0xc(%rax)
movq 0x18(%rsp), %rax
movq 0x50(%rax), %rdi
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq %rax, %rcx
movq (%rsp), %rax
movq (%rcx), %rcx
movq %rcx, 0x8(%rsp)
movq 0x8(%rax), %rdi
movq 0x8(%rsp), %rax
movq 0x60(%rax), %rsi
movq 0x8(%rsp), %rax
movzwl 0x70(%rax), %eax
shlq $0x4, %rax
addq %rax, %rsi
movq 0x10(%rsp), %rdx
movl $0x10, %ecx
callq 0x84780
movq (%rsp), %rcx
movl 0x2c(%rcx), %eax
addl $0x1, %eax
movl %eax, 0x2c(%rcx)
movl 0x2c(%rcx), %eax
movzwl 0x30(%rcx), %ecx
xorl %edx, %edx
divl %ecx
cmpl $0x0, %edx
jne 0x8a385
movq (%rsp), %rax
movzwl 0x28(%rax), %eax
cmpl $0xffff, %eax           # imm = 0xFFFF
jne 0x8a379
movq (%rsp), %rax
movw $0xfffe, 0x28(%rax)     # imm = 0xFFFE
jmp 0x8a383
movq (%rsp), %rax
movw $0xffff, 0x28(%rax)     # imm = 0xFFFF
jmp 0x8a385
addq $0x38, %rsp
retq
nopw (%rax,%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/Host_Interface_SATA.cpp
// Function: SSD_Components::Host_Interface_SATA::Validate_simulation_config()
void Host_Interface_SATA::Validate_simulation_config()
	{
		Host_Interface_Base::Validate_simulation_config();
		if (this->input_stream_manager == NULL) {
			throw std::logic_error("Input stream manager is not set for Host Interface");
		}
		if (this->request_fetch_unit == NULL) {
			throw std::logic_error("Request fetch unit is not set for Host Interface");
		}
	}

// Assembly:
subq $0x38, %rsp
movq %rdi, 0x30(%rsp)
movq 0x30(%rsp), %rdi
movq %rdi, 0x18(%rsp)
callq 0x846e0
movq 0x18(%rsp), %rax
cmpq $0x0, 0x50(%rax)
jne 0x8a5c9
movl $0x10, %edi
callq 0x8200
movq %rax, %rdi
movq %rdi, %rax
movq %rax, 0x10(%rsp)
leaq 0x23ccd(%rip), %rsi     # 0xae25d
callq 0x8610
jmp 0x8a597
movq 0x10(%rsp), %rdi
movq 0x4fa1d(%rip), %rsi     # 0xd9fc0
movq 0x4f9e6(%rip), %rdx     # 0xd9f90
callq 0x8710
movq 0x10(%rsp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x28(%rsp)
movl %eax, 0x24(%rsp)
callq 0x8330
jmp 0x8a62f
movq 0x18(%rsp), %rax
cmpq $0x0, 0x58(%rax)
jne 0x8a62a
movl $0x10, %edi
callq 0x8200
movq %rax, %rdi
movq %rdi, %rax
movq %rax, 0x8(%rsp)
leaq 0x23c9f(%rip), %rsi     # 0xae290
callq 0x8610
jmp 0x8a5f8
movq 0x8(%rsp), %rdi
movq 0x4f9bc(%rip), %rsi     # 0xd9fc0
movq 0x4f985(%rip), %rdx     # 0xd9f90
callq 0x8710
movq 0x8(%rsp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x28(%rsp)
movl %eax, 0x24(%rsp)
callq 0x8330
jmp 0x8a62f
addq $0x38, %rsp
retq
movq 0x28(%rsp), %rdi
callq 0x8770
nopl (%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/Host_Interface_SATA.cpp
// Function: SSD_Components::Input_Stream_Manager_SATA::Handle_new_arrived_request(SSD_Components::User_Request*)
inline void Input_Stream_Manager_SATA::Handle_new_arrived_request(User_Request* request)
	{
		((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Submission_head_informed_to_host++;
		if (((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Submission_head_informed_to_host == ncq_depth) {
			((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Submission_head_informed_to_host = 0;
		}
		if (request->Type == UserRequestType::READ) {
			((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Waiting_user_requests.push_back(request);
			((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->STAT_number_of_read_requests++;
			segment_user_request(request);

			((Host_Interface_SATA*)host_interface)->broadcast_user_request_arrival_signal(request);
		} else {//This is a write request
			((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Waiting_user_requests.push_back(request);
			((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->STAT_number_of_write_requests++;
			((Host_Interface_SATA*)host_interface)->request_fetch_unit->Fetch_write_data(request);
		}
	}

// Assembly:
subq $0x18, %rsp
movq %rdi, 0x10(%rsp)
movq %rsi, 0x8(%rsp)
movq 0x10(%rsp), %rdi
movq %rdi, (%rsp)
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq (%rsp), %rdi
movq (%rax), %rax
movw 0x6a(%rax), %cx
addw $0x1, %cx
movw %cx, 0x6a(%rax)
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq (%rsp), %rcx
movq (%rax), %rax
movzwl 0x6a(%rax), %eax
movzwl 0x28(%rcx), %ecx
cmpl %ecx, %eax
jne 0x8b3c1
movq (%rsp), %rdi
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq (%rax), %rax
movw $0x0, 0x6a(%rax)
movq 0x8(%rsp), %rax
cmpl $0x0, 0x64(%rax)
jne 0x8b42e
movq (%rsp), %rdi
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq (%rax), %rdi
addq $0x78, %rdi
leaq 0x8(%rsp), %rsi
callq 0x6c210
movq (%rsp), %rdi
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq (%rsp), %rdi
movq (%rax), %rax
movl 0x8(%rax), %ecx
addl $0x1, %ecx
movl %ecx, 0x8(%rax)
movq 0x8(%rsp), %rsi
movq (%rdi), %rax
callq *0x28(%rax)
movq (%rsp), %rax
movq 0x8(%rax), %rdi
movq 0x8(%rsp), %rsi
callq 0x87ff0
jmp 0x8b487
movq (%rsp), %rdi
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq (%rax), %rdi
addq $0x78, %rdi
leaq 0x8(%rsp), %rsi
callq 0x6c210
movq (%rsp), %rdi
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq %rax, %rcx
movq (%rsp), %rax
movq (%rcx), %rcx
movl 0xc(%rcx), %edx
addl $0x1, %edx
movl %edx, 0xc(%rcx)
movq 0x8(%rax), %rax
movq 0x58(%rax), %rdi
movq 0x8(%rsp), %rsi
movq (%rdi), %rax
callq *0x18(%rax)
addq $0x18, %rsp
retq
nopl (%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/Host_Interface_SATA.cpp
// Function: SSD_Components::Input_Stream_Manager_SATA::Submission_queue_tail_pointer_update(unsigned short)
inline void Input_Stream_Manager_SATA::Submission_queue_tail_pointer_update(uint16_t tail_pointer_value)
	{
		((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Submission_tail = tail_pointer_value;
		((Host_Interface_SATA*)host_interface)->request_fetch_unit->Fetch_next_request(SATA_STREAM_ID);
		((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->On_the_fly_requests++;
		((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Submission_head++;
		if (((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Submission_head == ncq_depth) {
			((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Submission_head = 0;
		}
	}

// Assembly:
subq $0x28, %rsp
movw %si, %ax
movq %rdi, 0x20(%rsp)
movw %ax, 0x1e(%rsp)
movq 0x20(%rsp), %rdi
movq %rdi, 0x10(%rsp)
movw 0x1e(%rsp), %ax
movw %ax, 0xe(%rsp)
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movw 0xe(%rsp), %dx
movq %rax, %rcx
movq 0x10(%rsp), %rax
movq (%rcx), %rcx
movw %dx, 0x6c(%rcx)
movq 0x8(%rax), %rax
movq 0x58(%rax), %rdi
movq (%rdi), %rax
xorl %esi, %esi
callq *0x10(%rax)
movq 0x10(%rsp), %rdi
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq 0x10(%rsp), %rdi
movq (%rax), %rax
movw 0xc0(%rax), %cx
addw $0x1, %cx
movw %cx, 0xc0(%rax)
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq 0x10(%rsp), %rdi
movq (%rax), %rax
movw 0x68(%rax), %cx
addw $0x1, %cx
movw %cx, 0x68(%rax)
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq 0x10(%rsp), %rcx
movq (%rax), %rax
movzwl 0x68(%rax), %eax
movzwl 0x28(%rcx), %ecx
cmpl %ecx, %eax
jne 0x8b56f
movq 0x10(%rsp), %rdi
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq (%rax), %rax
movw $0x0, 0x68(%rax)
addq $0x28, %rsp
retq
nopw %cs:(%rax,%rax)
nop
// File: CMU-SAFARI[P]MQSim/src/ssd/Host_Interface_SATA.cpp
// Function: SSD_Components::Input_Stream_Manager_SATA::Completion_queue_head_pointer_update(unsigned short)
inline void Input_Stream_Manager_SATA::Completion_queue_head_pointer_update(uint16_t head_pointer_value)
	{
		((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Completion_head = head_pointer_value;

		if (((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Completed_user_requests.size() > 0) {
			User_Request* request = ((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Completed_user_requests.front();
			((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Completed_user_requests.pop_front();
			inform_host_request_completed(request);
		}
	}

// Assembly:
subq $0x28, %rsp
movw %si, %ax
movq %rdi, 0x20(%rsp)
movw %ax, 0x1e(%rsp)
movq 0x20(%rsp), %rdi
movq %rdi, 0x8(%rsp)
movw 0x1e(%rsp), %ax
movw %ax, 0x6(%rsp)
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movw 0x6(%rsp), %cx
movq 0x8(%rsp), %rdi
movq (%rax), %rax
movw %cx, 0x6e(%rax)
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq (%rax), %rdi
addq $0x90, %rdi
callq 0x709b0
cmpq $0x0, %rax
jbe 0x8b63e
movq 0x8(%rsp), %rdi
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq (%rax), %rdi
addq $0x90, %rdi
callq 0x88890
movq 0x8(%rsp), %rdi
movq (%rax), %rax
movq %rax, 0x10(%rsp)
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq (%rax), %rdi
addq $0x90, %rdi
callq 0x888c0
movq 0x8(%rsp), %rdi
movq 0x10(%rsp), %rsi
callq 0x8bae0
addq $0x28, %rsp
retq
nopw %cs:(%rax,%rax)
nopl (%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/Host_Interface_SATA.cpp
// Function: SSD_Components::Input_Stream_Manager_SATA::inform_host_request_completed(SSD_Components::User_Request*)
inline void Input_Stream_Manager_SATA::inform_host_request_completed(User_Request* request)
	{
		((Request_Fetch_Unit_SATA*)((Host_Interface_SATA*)host_interface)->request_fetch_unit)->Send_completion_queue_element(request, ((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Submission_head_informed_to_host);
		((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Completion_tail++;//Next free slot in the completion queue
		
		//Circular queue implementation
		if (((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Completion_tail == ncq_depth) {
			((Input_Stream_SATA*)input_streams[SATA_STREAM_ID])->Completion_tail = 0;
		}
	}

// Assembly:
subq $0x28, %rsp
movq %rdi, 0x20(%rsp)
movq %rsi, 0x18(%rsp)
movq 0x20(%rsp), %rdi
movq %rdi, 0x10(%rsp)
movq 0x8(%rdi), %rax
movq 0x58(%rax), %rax
movq %rax, (%rsp)
movq 0x18(%rsp), %rax
movq %rax, 0x8(%rsp)
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq (%rsp), %rdi
movq 0x8(%rsp), %rsi
movq (%rax), %rax
movzwl 0x6a(%rax), %edx
callq 0x8a270
movq 0x10(%rsp), %rdi
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq 0x10(%rsp), %rdi
movq (%rax), %rax
movw 0x70(%rax), %cx
addw $0x1, %cx
movw %cx, 0x70(%rax)
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq 0x10(%rsp), %rcx
movq (%rax), %rax
movzwl 0x70(%rax), %eax
movzwl 0x28(%rcx), %ecx
cmpl %ecx, %eax
jne 0x8bb92
movq 0x10(%rsp), %rdi
addq $0x10, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x85300
movq (%rax), %rax
movw $0x0, 0x70(%rax)
addq $0x28, %rsp
retq
nopw (%rax,%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/NVM_PHY_ONFI.cpp
// Function: SSD_Components::NVM_PHY_ONFI::broadcastTransactionServicedSignal(SSD_Components::NVM_Transaction_Flash*)
void NVM_PHY_ONFI::broadcastTransactionServicedSignal(NVM_Transaction_Flash* transaction)
	{
		for (std::vector<TransactionServicedHandlerType>::iterator it = connectedTransactionServicedHandlers.begin();
			it != connectedTransactionServicedHandlers.end(); it++) {
			(*it)(transaction);
		}
		delete transaction;//This transaction has been consumed and no more needed
	}

// Assembly:
subq $0x38, %rsp
movq %rdi, 0x30(%rsp)
movq %rsi, 0x28(%rsp)
movq 0x30(%rsp), %rdi
movq %rdi, 0x8(%rsp)
addq $0x40, %rdi
callq 0x8bef0
movq %rax, 0x20(%rsp)
movq 0x8(%rsp), %rdi
addq $0x40, %rdi
callq 0x8bf60
movq %rax, 0x18(%rsp)
leaq 0x20(%rsp), %rdi
leaq 0x18(%rsp), %rsi
callq 0x8bf20
testb $0x1, %al
jne 0x8bcce
jmp 0x8bcf5
leaq 0x20(%rsp), %rdi
callq 0x8bf90
movq (%rax), %rax
movq 0x28(%rsp), %rdi
callq *%rax
leaq 0x20(%rsp), %rdi
xorl %esi, %esi
callq 0x8bfa0
movq %rax, 0x10(%rsp)
jmp 0x8bca6
movq 0x28(%rsp), %rax
movq %rax, (%rsp)
cmpq $0x0, %rax
je 0x8bd0d
movq (%rsp), %rdi
callq 0x8410
addq $0x38, %rsp
retq
nopw %cs:(%rax,%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/NVM_PHY_ONFI_NVDDR2.cpp
// Function: SSD_Components::NVM_PHY_ONFI_NVDDR2::Setup_triggers()
void NVM_PHY_ONFI_NVDDR2::Setup_triggers()
	{
		Sim_Object::Setup_triggers();
		for (unsigned int i = 0; i < channel_count; i++) {
			for (unsigned int j = 0; j < chip_no_per_channel; j++) {
				channels[i]->Chips[j]->Connect_to_chip_ready_signal(handle_ready_signal_from_chip);
			}
		}
	}

// Assembly:
subq $0x18, %rsp
movq %rdi, 0x10(%rsp)
movq 0x10(%rsp), %rdi
movq %rdi, (%rsp)
callq 0x205c0
movl $0x0, 0xc(%rsp)
movq (%rsp), %rcx
movl 0xc(%rsp), %eax
cmpl 0x2c(%rcx), %eax
jae 0x8e408
movl $0x0, 0x8(%rsp)
movq (%rsp), %rcx
movl 0x8(%rsp), %eax
cmpl 0x30(%rcx), %eax
jae 0x8e3f9
movq (%rsp), %rax
movq 0x88(%rax), %rax
movl 0xc(%rsp), %ecx
movq (%rax,%rcx,8), %rax
movq 0x8(%rax), %rax
movl 0x8(%rsp), %ecx
movq (%rax,%rcx,8), %rdi
leaq 0x2c79(%rip), %rsi      # 0x91060
callq 0x437a0
movl 0x8(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x8(%rsp)
jmp 0x8e3b4
jmp 0x8e3fb
movl 0xc(%rsp), %eax
addl $0x1, %eax
movl %eax, 0xc(%rsp)
jmp 0x8e39f
addq $0x18, %rsp
retq
nopl (%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/NVM_PHY_ONFI_NVDDR2.cpp
// Function: SSD_Components::NVM_PHY_ONFI_NVDDR2::Is_chip_busy_with_stream(SSD_Components::NVM_Transaction_Flash*)
NVM_Transaction_Flash* NVM_PHY_ONFI_NVDDR2::Is_chip_busy_with_stream(NVM_Transaction_Flash* transaction)
	{
		ChipBookKeepingEntry* chipBKE = &bookKeepingTable[transaction->Address.ChannelID][transaction->Address.ChipID];
		stream_id_type stream_id = transaction->Stream_id;

		for (unsigned int die_id = 0; die_id < die_no_per_chip; die_id++) {
			for (auto &tr : chipBKE->Die_book_keeping_records[die_id].ActiveTransactions) {
				if (tr->Stream_id == stream_id) {
					return tr;
				}
			}
		}

		return NULL;
	}

// Assembly:
subq $0x58, %rsp
movq %rdi, 0x48(%rsp)
movq %rsi, 0x40(%rsp)
movq 0x48(%rsp), %rax
movq %rax, 0x8(%rsp)
movq 0x90(%rax), %rax
movq 0x40(%rsp), %rcx
movl 0x38(%rcx), %ecx
movq (%rax,%rcx,8), %rax
movq 0x40(%rsp), %rcx
movl 0x3c(%rcx), %ecx
shlq $0x7, %rcx
addq %rcx, %rax
movq %rax, 0x38(%rsp)
movq 0x40(%rsp), %rax
movw (%rax), %ax
movw %ax, 0x36(%rsp)
movl $0x0, 0x30(%rsp)
movq 0x8(%rsp), %rcx
movl 0x30(%rsp), %eax
cmpl 0x34(%rcx), %eax
jae 0x8e638
movq 0x38(%rsp), %rax
movq 0x8(%rax), %rax
movl 0x30(%rsp), %ecx
imulq $0x68, %rcx, %rcx
addq %rcx, %rax
addq $0x8, %rax
movq %rax, 0x28(%rsp)
movq 0x28(%rsp), %rdi
callq 0x7ff20
movq %rax, 0x20(%rsp)
movq 0x28(%rsp), %rdi
callq 0x5d430
movq %rax, 0x18(%rsp)
leaq 0x20(%rsp), %rdi
leaq 0x18(%rsp), %rsi
callq 0x80030
testb $0x1, %al
jne 0x8e5e6
jmp 0x8e626
leaq 0x20(%rsp), %rdi
callq 0x7fda0
movq %rax, 0x10(%rsp)
movq 0x10(%rsp), %rax
movq (%rax), %rax
movzwl (%rax), %eax
movzwl 0x36(%rsp), %ecx
cmpl %ecx, %eax
jne 0x8e618
movq 0x10(%rsp), %rax
movq (%rax), %rax
movq %rax, 0x50(%rsp)
jmp 0x8e641
jmp 0x8e61a
leaq 0x20(%rsp), %rdi
callq 0x80050
jmp 0x8e5d1
jmp 0x8e628
movl 0x30(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x30(%rsp)
jmp 0x8e584
movq $0x0, 0x50(%rsp)
movq 0x50(%rsp), %rax
addq $0x58, %rsp
retq
nopl (%rax,%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/NVM_PHY_ONFI_NVDDR2.cpp
// Function: SSD_Components::copy_read_data_to_transaction(SSD_Components::NVM_Transaction_Flash_RD*, NVM::FlashMemory::Flash_Command*)
void copy_read_data_to_transaction(NVM_Transaction_Flash_RD* read_transaction, NVM::FlashMemory::Flash_Command* command)
	{
		int i = 0;
		for (auto &address : command->Address) {
			// check if we are not reading a page that has not been written before
			if (address.PlaneID == read_transaction->Address.PlaneID &&
				   command->Meta_data[i].LPA != NO_LPA) {
				read_transaction->LPA = command->Meta_data[i].LPA;
			}
			i++;
		}
	}

// Assembly:
subq $0x38, %rsp
movq %rdi, 0x30(%rsp)
movq %rsi, 0x28(%rsp)
movl $0x0, 0x24(%rsp)
movq 0x28(%rsp), %rax
addq $0x8, %rax
movq %rax, 0x18(%rsp)
movq 0x18(%rsp), %rdi
callq 0x59e10
movq %rax, 0x10(%rsp)
movq 0x18(%rsp), %rdi
callq 0x59e40
movq %rax, 0x8(%rsp)
leaq 0x10(%rsp), %rdi
leaq 0x8(%rsp), %rsi
callq 0x59e70
testb $0x1, %al
jne 0x8fd17
jmp 0x8fd88
leaq 0x10(%rsp), %rdi
callq 0x59eb0
movq %rax, (%rsp)
movq (%rsp), %rax
movl 0xc(%rax), %eax
movq 0x30(%rsp), %rcx
cmpl 0x44(%rcx), %eax
jne 0x8fd6e
movq 0x28(%rsp), %rdi
addq $0x20, %rdi
movslq 0x24(%rsp), %rsi
callq 0x45990
cmpq $-0x1, (%rax)
je 0x8fd6e
movq 0x28(%rsp), %rdi
addq $0x20, %rdi
movslq 0x24(%rsp), %rsi
callq 0x45990
movq (%rax), %rcx
movq 0x30(%rsp), %rax
movq %rcx, 0x58(%rax)
movl 0x24(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x24(%rsp)
leaq 0x10(%rsp), %rdi
callq 0x59f50
jmp 0x8fd02
addq $0x38, %rsp
retq
nopl (%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/NVM_PHY_ONFI_NVDDR2.h
// Function: SSD_Components::DieBookKeepingEntry::PrepareSuspend()
void PrepareSuspend()
		{
			SuspendedCommand = ActiveCommand;
			RemainingExecTime = Expected_finish_time - Simulator->Time();
			SuspendedTransactions.insert(SuspendedTransactions.begin(), ActiveTransactions.begin(), ActiveTransactions.end());
			Suspended = true;
			ActiveCommand = NULL;
			ActiveTransactions.clear();
			Free = true;
		}

// Assembly:
subq $0x48, %rsp
movq %rdi, 0x40(%rsp)
movq 0x40(%rsp), %rax
movq %rax, 0x10(%rsp)
movq (%rax), %rcx
movq %rcx, 0x20(%rax)
movq 0x50(%rax), %rax
movq %rax, (%rsp)
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq 0x10(%rsp), %rdi
movq %rax, %rcx
movq (%rsp), %rax
subq %rcx, %rax
movq %rax, 0x58(%rdi)
movq %rdi, %rax
addq $0x28, %rax
movq %rax, 0x8(%rsp)
addq $0x28, %rdi
callq 0x7ff20
movq %rax, 0x30(%rsp)
leaq 0x38(%rsp), %rdi
leaq 0x30(%rsp), %rsi
callq 0x7fc80
movq 0x10(%rsp), %rdi
addq $0x8, %rdi
callq 0x7ff20
movq 0x10(%rsp), %rdi
movq %rax, 0x28(%rsp)
addq $0x8, %rdi
callq 0x5d430
movq 0x8(%rsp), %rdi
movq %rax, 0x20(%rsp)
movq 0x38(%rsp), %rsi
movq 0x28(%rsp), %rdx
movq 0x20(%rsp), %rcx
callq 0x93d50
movq 0x10(%rsp), %rdi
movq %rax, 0x18(%rsp)
movb $0x1, 0x49(%rdi)
movq $0x0, (%rdi)
addq $0x8, %rdi
callq 0x5d190
movq 0x10(%rsp), %rax
movb $0x1, 0x48(%rax)
addq $0x48, %rsp
retq
nopw %cs:(%rax,%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/ONFI_Channel_Base.h
// Function: SSD_Components::ONFI_Channel_Base::SetStatus(SSD_Components::BusChannelStatus, NVM::FlashMemory::Flash_Chip*)
void SetStatus(BusChannelStatus new_status, NVM::FlashMemory::Flash_Chip* target_chip)
		{
			if (((status == BusChannelStatus::IDLE && new_status == BusChannelStatus::IDLE)
				|| (status == BusChannelStatus::BUSY && new_status == BusChannelStatus::BUSY))
				&& (current_active_chip != target_chip)) {
				PRINT_ERROR("Bus " << ChannelID << ": illegal bus status transition!")
			}

			status = new_status;
			if (status == BusChannelStatus::BUSY) {
				current_active_chip = target_chip;
			} else {
				current_active_chip = NULL;
			}
		}

// Assembly:
subq $0x28, %rsp
movq %rdi, 0x20(%rsp)
movl %esi, 0x1c(%rsp)
movq %rdx, 0x10(%rsp)
movq 0x20(%rsp), %rax
movq %rax, 0x8(%rsp)
cmpl $0x1, 0x14(%rax)
jne 0x91d89
cmpl $0x1, 0x1c(%rsp)
je 0x91d9f
movq 0x8(%rsp), %rax
cmpl $0x0, 0x14(%rax)
jne 0x91e18
cmpl $0x0, 0x1c(%rsp)
jne 0x91e18
movq 0x8(%rsp), %rax
movq 0x18(%rax), %rax
cmpq 0x10(%rsp), %rax
je 0x91e18
movq 0x4823a(%rip), %rdi     # 0xd9ff0
leaq 0x18b2b(%rip), %rsi     # 0xaa8e8
callq 0x8440
movq 0x48227(%rip), %rdi     # 0xd9ff0
leaq 0x1c854(%rip), %rsi     # 0xae624
callq 0x8440
movq %rax, %rdi
movq 0x8(%rsp), %rax
movl (%rax), %esi
callq 0x85b0
movq %rax, %rdi
leaq 0x1c930(%rip), %rsi     # 0xae71e
callq 0x8440
movq %rax, %rdi
movq 0x4815b(%rip), %rsi     # 0xd9f58
callq 0x8480
movq 0x481c7(%rip), %rdi     # 0xd9fd0
callq 0x84f0
movl $0x1, %edi
callq 0x8500
movq 0x8(%rsp), %rax
movl 0x1c(%rsp), %ecx
movl %ecx, 0x14(%rax)
cmpl $0x0, 0x14(%rax)
jne 0x91e3a
movq 0x8(%rsp), %rax
movq 0x10(%rsp), %rcx
movq %rcx, 0x18(%rax)
jmp 0x91e47
movq 0x8(%rsp), %rax
movq $0x0, 0x18(%rax)
addq $0x28, %rsp
retq
nopl (%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/../nvm_chip/flash_memory/Flash_Chip.h
// Function: NVM::FlashMemory::Flash_Chip::EndCMDXfer(NVM::FlashMemory::Flash_Command*)
void EndCMDXfer(Flash_Command* command)//End transferring write data to the Flash chip
			{
				this->STAT_totalXferTime += (Simulator->Time() - this->lastTransferStart);
				if (this->idleDieNo != die_no)
					STAT_totalOverlappedXferExecTime += (Simulator->Time() - lastTransferStart);
				this->Dies[command->Address[0].DieID]->STAT_TotalXferTime += (Simulator->Time() - lastTransferStart);

				start_command_execution(command);

				this->lastTransferStart = INVALID_TIME;
			}

// Assembly:
subq $0x28, %rsp
movq %rdi, 0x20(%rsp)
movq %rsi, 0x18(%rsp)
movq 0x20(%rsp), %rax
movq %rax, 0x10(%rsp)
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq 0x10(%rsp), %rcx
subq 0x98(%rcx), %rax
addq 0xe0(%rcx), %rax
movq %rax, 0xe0(%rcx)
movl 0x3c(%rcx), %eax
cmpl 0x48(%rcx), %eax
je 0x91ec1
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq %rax, %rcx
movq 0x10(%rsp), %rax
subq 0x98(%rax), %rcx
addq 0xe8(%rax), %rcx
movq %rcx, 0xe8(%rax)
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq %rax, %rcx
movq 0x10(%rsp), %rax
subq 0x98(%rax), %rcx
movq %rcx, (%rsp)
movq 0x40(%rax), %rax
movq %rax, 0x8(%rsp)
movq 0x18(%rsp), %rdi
addq $0x8, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x45760
movq (%rsp), %rcx
movq 0x10(%rsp), %rdi
movq %rax, %rdx
movq 0x8(%rsp), %rax
movl 0x8(%rdx), %edx
movq (%rax,%rdx,8), %rax
addq 0x58(%rax), %rcx
movq %rcx, 0x58(%rax)
movq 0x18(%rsp), %rsi
callq 0x44410
movq 0x10(%rsp), %rax
movq $-0x1, 0x98(%rax)
addq $0x28, %rsp
retq
nopl (%rax,%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/../nvm_chip/flash_memory/Flash_Chip.h
// Function: NVM::FlashMemory::Flash_Chip::EndDataOutXfer(NVM::FlashMemory::Flash_Command*)
void EndDataOutXfer(Flash_Command* command)
			{
				this->STAT_totalXferTime += (Simulator->Time() - this->lastTransferStart);
				if (this->idleDieNo != die_no)
					STAT_totalOverlappedXferExecTime += (Simulator->Time() - lastTransferStart);
				this->Dies[command->Address[0].DieID]->STAT_TotalXferTime += (Simulator->Time() - lastTransferStart);

				this->lastTransferStart = INVALID_TIME;
			}

// Assembly:
subq $0x28, %rsp
movq %rdi, 0x20(%rsp)
movq %rsi, 0x18(%rsp)
movq 0x20(%rsp), %rax
movq %rax, 0x10(%rsp)
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq 0x10(%rsp), %rcx
subq 0x98(%rcx), %rax
addq 0xe0(%rcx), %rax
movq %rax, 0xe0(%rcx)
movl 0x3c(%rcx), %eax
cmpl 0x48(%rcx), %eax
je 0x920c1
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq %rax, %rcx
movq 0x10(%rsp), %rax
subq 0x98(%rax), %rcx
addq 0xe8(%rax), %rcx
movq %rcx, 0xe8(%rax)
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq %rax, %rcx
movq 0x10(%rsp), %rax
subq 0x98(%rax), %rcx
movq %rcx, 0x8(%rsp)
movq 0x40(%rax), %rax
movq %rax, (%rsp)
movq 0x18(%rsp), %rdi
addq $0x8, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x45760
movq (%rsp), %rcx
movq 0x8(%rsp), %rdx
movq %rax, %rsi
movq 0x10(%rsp), %rax
movl 0x8(%rsi), %esi
movq (%rcx,%rsi,8), %rcx
addq 0x58(%rcx), %rdx
movq %rdx, 0x58(%rcx)
movq $-0x1, 0x98(%rax)
addq $0x28, %rsp
retq
nopl (%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/NVM_PHY_ONFI_NVDDR2.h
// Function: SSD_Components::DieBookKeepingEntry::ClearCommand()
void ClearCommand()
		{
			delete ActiveCommand;
			ActiveCommand = NULL;
			ActiveTransactions.clear();
			Free = true;
		}

// Assembly:
subq $0x18, %rsp
movq %rdi, 0x10(%rsp)
movq 0x10(%rsp), %rax
movq %rax, (%rsp)
movq (%rax), %rax
movq %rax, 0x8(%rsp)
cmpq $0x0, %rax
je 0x92164
movq 0x8(%rsp), %rdi
callq 0x94300
movq 0x8(%rsp), %rdi
callq 0x8410
movq (%rsp), %rdi
movq $0x0, (%rdi)
addq $0x8, %rdi
callq 0x5d190
movq (%rsp), %rax
movb $0x1, 0x48(%rax)
addq $0x18, %rsp
retq
nopw %cs:(%rax,%rax)
nop
// File: CMU-SAFARI[P]MQSim/src/ssd/NVM_PHY_ONFI_NVDDR2.cpp
// Function: SSD_Components::NVM_PHY_ONFI_NVDDR2::send_resume_command_to_chip(NVM::FlashMemory::Flash_Chip*, SSD_Components::ChipBookKeepingEntry*)
inline void NVM_PHY_ONFI_NVDDR2::send_resume_command_to_chip(NVM::FlashMemory::Flash_Chip* chip, ChipBookKeepingEntry* chipBKE)
	{
		//DEBUG2("Chip " << chip->ChannelID << ", " << chip->ChipID << ": resume command " )
		for (unsigned int i = 0; i < die_no_per_chip; i++) {
			DieBookKeepingEntry *dieBKE = &chipBKE->Die_book_keeping_records[i];
			//Since the time required to send the resume command is very small, MQSim ignores it to simplify the simulation
			dieBKE->PrepareResume();
			chipBKE->PrepareResume();
			chip->Resume(dieBKE->ActiveCommand->Address[0].DieID);
			switch (dieBKE->ActiveCommand->CommandCode) {
				case CMD_READ_PAGE:
				case CMD_READ_PAGE_MULTIPLANE:
				case CMD_READ_PAGE_COPYBACK:
				case CMD_READ_PAGE_COPYBACK_MULTIPLANE:
					chipBKE->Status = ChipStatus::READING;
					break;
				case CMD_PROGRAM_PAGE:
				case CMD_PROGRAM_PAGE_MULTIPLANE:
				case CMD_PROGRAM_PAGE_COPYBACK:
				case CMD_PROGRAM_PAGE_COPYBACK_MULTIPLANE:
					chipBKE->Status = ChipStatus::WRITING;
					break;
				case CMD_ERASE_BLOCK:
				case CMD_ERASE_BLOCK_MULTIPLANE:
					chipBKE->Status = ChipStatus::ERASING;
					break;
			}

		}
	}

// Assembly:
subq $0x48, %rsp
movq %rdi, 0x40(%rsp)
movq %rsi, 0x38(%rsp)
movq %rdx, 0x30(%rsp)
movq 0x40(%rsp), %rax
movq %rax, 0x18(%rsp)
movl $0x0, 0x2c(%rsp)
movq 0x18(%rsp), %rcx
movl 0x2c(%rsp), %eax
cmpl 0x34(%rcx), %eax
jae 0x922dc
movq 0x30(%rsp), %rax
movq 0x8(%rax), %rax
movl 0x2c(%rsp), %ecx
imulq $0x68, %rcx, %rcx
addq %rcx, %rax
movq %rax, 0x20(%rsp)
movq 0x20(%rsp), %rdi
callq 0x94990
movq 0x30(%rsp), %rdi
callq 0x94a60
movq 0x38(%rsp), %rax
movq %rax, 0x8(%rsp)
movq 0x20(%rsp), %rax
movq (%rax), %rdi
addq $0x8, %rdi
xorl %eax, %eax
movl %eax, %esi
callq 0x45760
movq 0x8(%rsp), %rdi
movl 0x8(%rax), %esi
callq 0x44930
movq 0x20(%rsp), %rax
movq (%rax), %rax
movq (%rax), %rax
movq %rax, 0x10(%rsp)
subq $0x30, %rax
je 0x922a5
jmp 0x92238
movq 0x10(%rsp), %rax
subq $0x32, %rax
je 0x922a5
jmp 0x92245
movq 0x10(%rsp), %rax
subq $0x35, %rax
je 0x922a5
jmp 0x92252
movq 0x10(%rsp), %rax
subq $0x321, %rax            # imm = 0x321
je 0x922a5
jmp 0x92261
movq 0x10(%rsp), %rax
addq $-0x60d0, %rax          # imm = 0x9F30
subq $0x2, %rax
jb 0x922bf
jmp 0x92274
movq 0x10(%rsp), %rax
addq $-0x8010, %rax          # imm = 0xFFFF7FF0
subq $0x2, %rax
jb 0x922b2
jmp 0x92287
movq 0x10(%rsp), %rax
subq $0x8510, %rax           # imm = 0x8510
je 0x922b2
jmp 0x92296
movq 0x10(%rsp), %rax
subq $0x85111, %rax          # imm = 0x85111
je 0x922b2
jmp 0x922ca
movq 0x30(%rsp), %rax
movl $0x4, (%rax)
jmp 0x922ca
movq 0x30(%rsp), %rax
movl $0x5, (%rax)
jmp 0x922ca
movq 0x30(%rsp), %rax
movl $0x6, (%rax)
jmp 0x922cc
movl 0x2c(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x2c(%rsp)
jmp 0x921b5
addq $0x48, %rsp
retq
nopw %cs:(%rax,%rax)
nopl (%rax,%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/NVM_PHY_ONFI_NVDDR2.cpp
// Function: SSD_Components::NVM_PHY_ONFI_NVDDR2::transfer_read_data_from_chip(SSD_Components::ChipBookKeepingEntry*, SSD_Components::DieBookKeepingEntry*, SSD_Components::NVM_Transaction_Flash*)
inline void NVM_PHY_ONFI_NVDDR2::transfer_read_data_from_chip(ChipBookKeepingEntry* chipBKE, DieBookKeepingEntry* dieBKE, NVM_Transaction_Flash* tr)
	{
		//DEBUG2("Chip " << tr->Address.ChannelID << ", " << tr->Address.ChipID << ": transfer read data started for LPA: " << tr->LPA)
		dieBKE->ActiveTransfer = tr;
		channels[tr->Address.ChannelID]->Chips[tr->Address.ChipID]->StartDataOutXfer();
		chipBKE->Status = ChipStatus::DATA_OUT;
		Simulator->Register_sim_event(Simulator->Time() + NVDDR2DataOutTransferTime(tr->Data_and_metadata_size_in_byte, channels[tr->Address.ChannelID]),
			this, dieBKE, (int)NVDDR2_SimEventType::READ_DATA_TRANSFERRED);

		tr->STAT_transfer_time += NVDDR2DataOutTransferTime(tr->Data_and_metadata_size_in_byte, channels[tr->Address.ChannelID]);
		channels[tr->Address.ChannelID]->SetStatus(BusChannelStatus::BUSY, channels[tr->Address.ChannelID]->Chips[tr->Address.ChipID]);
	}

// Assembly:
subq $0x38, %rsp
movq %rdi, 0x30(%rsp)
movq %rsi, 0x28(%rsp)
movq %rdx, 0x20(%rsp)
movq %rcx, 0x18(%rsp)
movq 0x30(%rsp), %rax
movq %rax, 0x10(%rsp)
movq 0x18(%rsp), %rdx
movq 0x20(%rsp), %rcx
movq %rdx, 0x40(%rcx)
movq 0x88(%rax), %rax
movq 0x18(%rsp), %rcx
movl 0x38(%rcx), %ecx
movq (%rax,%rcx,8), %rax
movq 0x8(%rax), %rax
movq 0x18(%rsp), %rcx
movl 0x3c(%rcx), %ecx
movq (%rax,%rcx,8), %rdi
callq 0x94950
movq 0x28(%rsp), %rax
movl $0x3, (%rax)
callq 0x46500
movq %rax, 0x8(%rsp)
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq 0x8(%rsp), %rdi
movq 0x10(%rsp), %rcx
movq %rax, %rsi
movq 0x18(%rsp), %rax
movl 0x50(%rax), %eax
movq 0x88(%rcx), %rcx
movq 0x18(%rsp), %rdx
movl 0x38(%rdx), %edx
movq (%rcx,%rdx,8), %rcx
xorl %edx, %edx
divl 0xd8(%rcx)
movq 0x10(%rsp), %rdx
shrl %eax
movl %eax, %eax
movq 0x88(%rdx), %rcx
movq 0x18(%rsp), %r8
movl 0x38(%r8), %r8d
movq (%rcx,%r8,8), %rcx
imulq 0x20(%rcx), %rax
addq %rax, %rsi
movq 0x20(%rsp), %rcx
xorl %r8d, %r8d
callq 0x46c60
movq 0x10(%rsp), %rcx
movq 0x18(%rsp), %rax
movl 0x50(%rax), %eax
movq 0x88(%rcx), %rcx
movq 0x18(%rsp), %rdx
movl 0x38(%rdx), %edx
movq (%rcx,%rdx,8), %rcx
xorl %edx, %edx
divl 0xd8(%rcx)
movl %eax, %ecx
movq 0x10(%rsp), %rax
shrl %ecx
movl %ecx, %ecx
movl %ecx, %edx
movq 0x88(%rax), %rcx
movq 0x18(%rsp), %rsi
movl 0x38(%rsi), %esi
movq (%rcx,%rsi,8), %rcx
imulq 0x20(%rcx), %rdx
movq 0x18(%rsp), %rcx
addq 0x30(%rcx), %rdx
movq %rdx, 0x30(%rcx)
movq 0x88(%rax), %rcx
movq 0x18(%rsp), %rdx
movl 0x38(%rdx), %edx
movq (%rcx,%rdx,8), %rdi
movq 0x88(%rax), %rax
movq 0x18(%rsp), %rcx
movl 0x38(%rcx), %ecx
movq (%rax,%rcx,8), %rax
movq 0x8(%rax), %rax
movq 0x18(%rsp), %rcx
movl 0x3c(%rcx), %ecx
movq (%rax,%rcx,8), %rdx
xorl %esi, %esi
callq 0x91d60
addq $0x38, %rsp
retq
nopl (%rax,%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/NVM_PHY_ONFI_NVDDR2.h
// Function: SSD_Components::DieBookKeepingEntry::PrepareResume()
void PrepareResume()
		{
			ActiveCommand = SuspendedCommand;
			Expected_finish_time = Simulator->Time() + RemainingExecTime;
			ActiveTransactions.insert(ActiveTransactions.begin(), SuspendedTransactions.begin(), SuspendedTransactions.end());
			Suspended = false;
			SuspendedCommand = NULL;
			SuspendedTransactions.clear();
			Free = false;
		}

// Assembly:
subq $0x48, %rsp
movq %rdi, 0x40(%rsp)
movq 0x40(%rsp), %rax
movq %rax, 0x10(%rsp)
movq 0x20(%rax), %rcx
movq %rcx, (%rax)
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq 0x10(%rsp), %rdi
addq 0x58(%rdi), %rax
movq %rax, 0x50(%rdi)
movq %rdi, %rax
addq $0x8, %rax
movq %rax, 0x8(%rsp)
addq $0x8, %rdi
callq 0x7ff20
movq %rax, 0x30(%rsp)
leaq 0x38(%rsp), %rdi
leaq 0x30(%rsp), %rsi
callq 0x7fc80
movq 0x10(%rsp), %rdi
addq $0x28, %rdi
callq 0x7ff20
movq 0x10(%rsp), %rdi
movq %rax, 0x28(%rsp)
addq $0x28, %rdi
callq 0x5d430
movq 0x8(%rsp), %rdi
movq %rax, 0x20(%rsp)
movq 0x38(%rsp), %rsi
movq 0x28(%rsp), %rdx
movq 0x20(%rsp), %rcx
callq 0x93d50
movq 0x10(%rsp), %rdi
movq %rax, 0x18(%rsp)
movb $0x0, 0x49(%rdi)
movq $0x0, 0x20(%rdi)
addq $0x28, %rdi
callq 0x5d190
movq 0x10(%rsp), %rax
movb $0x0, 0x48(%rax)
addq $0x48, %rsp
retq
nopl (%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/Queue_Probe.cpp
// Function: SSD_Components::Queue_Probe::EnqueueRequest(SSD_Components::NVM_Transaction*)
void Queue_Probe::EnqueueRequest(NVM_Transaction* transaction)
	{
		if (transaction == NULL)
			PRINT_ERROR("Inserting a null object to queue!")

		currentObjectsInQueue[transaction] = Simulator->Time();
		nRequests++;
		nRequestsEpoch++;
		setCount(count + 1);
	}

// Assembly:
subq $0x28, %rsp
movq %rdi, 0x20(%rsp)
movq %rsi, 0x18(%rsp)
movq 0x20(%rsp), %rax
movq %rax, 0x10(%rsp)
cmpq $0x0, 0x18(%rsp)
jne 0x96dcb
movq 0x43269(%rip), %rdi     # 0xd9ff0
leaq 0x13b5a(%rip), %rsi     # 0xaa8e8
callq 0x8440
movq 0x43256(%rip), %rdi     # 0xd9ff0
leaq 0x179bf(%rip), %rsi     # 0xae760
callq 0x8440
movq %rax, %rdi
movq 0x431a8(%rip), %rsi     # 0xd9f58
callq 0x8480
movq 0x43214(%rip), %rdi     # 0xd9fd0
callq 0x84f0
movl $0x1, %edi
callq 0x8500
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq 0x10(%rsp), %rdi
movq %rax, 0x8(%rsp)
addq $0x80, %rdi
leaq 0x18(%rsp), %rsi
callq 0x985e0
movq 0x8(%rsp), %rcx
movq 0x10(%rsp), %rdi
movq %rcx, (%rax)
movq 0x8(%rdi), %rax
addq $0x1, %rax
movq %rax, 0x8(%rdi)
movq 0x30(%rdi), %rax
addq $0x1, %rax
movq %rax, 0x30(%rdi)
movl (%rdi), %esi
addl $0x1, %esi
callq 0x96e30
addq $0x28, %rsp
retq
nopw (%rax,%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/Queue_Probe.cpp
// Function: SSD_Components::Queue_Probe::setCount(int)
void Queue_Probe::setCount(int val)
	{
		sim_time_type n = Simulator->Time();
		states[count].totalTime += n - lastCountChange;
		statesEpoch[count].totalTime += n - lastCountChange;

		lastCountChange = n;
		count = val;
		if (count > maxQueueLength) {
			maxQueueLength = count;
		}
		while (count + 1 > states.size()) {
			states.push_back(StateStatistics());
		}
		states[count].nEnterances++;
		while (count + 1 > statesEpoch.size()) {
			statesEpoch.push_back(StateStatistics());
		}
		statesEpoch[count].nEnterances++;
	}

// Assembly:
subq $0x78, %rsp
movq %rdi, 0x70(%rsp)
movl %esi, 0x6c(%rsp)
movq 0x70(%rsp), %rax
movq %rax, 0x38(%rsp)
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq %rax, %rcx
movq 0x38(%rsp), %rax
movq %rcx, 0x60(%rsp)
movq 0x60(%rsp), %rcx
subq 0x20(%rax), %rcx
movq %rcx, 0x28(%rsp)
movq %rax, %rdi
addq $0x50, %rdi
movl (%rax), %eax
movl %eax, %esi
callq 0x98640
movq 0x28(%rsp), %rdx
movq %rax, %rcx
movq 0x38(%rsp), %rax
addq 0x8(%rcx), %rdx
movq %rdx, 0x8(%rcx)
movq 0x60(%rsp), %rcx
subq 0x20(%rax), %rcx
movq %rcx, 0x30(%rsp)
movq %rax, %rdi
addq $0x68, %rdi
movl (%rax), %eax
movl %eax, %esi
callq 0x98640
movq 0x30(%rsp), %rdx
movq 0x38(%rsp), %rcx
addq 0x8(%rax), %rdx
movq %rdx, 0x8(%rax)
movq 0x60(%rsp), %rax
movq %rax, 0x20(%rcx)
movl 0x6c(%rsp), %eax
movl %eax, (%rcx)
movl (%rcx), %eax
cmpl 0xb8(%rcx), %eax
jbe 0x96eea
movq 0x38(%rsp), %rax
movl (%rax), %ecx
movl %ecx, 0xb8(%rax)
jmp 0x96eec
movq 0x38(%rsp), %rdi
movl (%rdi), %eax
addl $0x1, %eax
movl %eax, %eax
movq %rax, 0x20(%rsp)
addq $0x50, %rdi
callq 0x98660
movq %rax, %rcx
movq 0x20(%rsp), %rax
cmpq %rcx, %rax
jbe 0x96f3c
movq 0x38(%rsp), %rax
addq $0x50, %rax
movq %rax, 0x18(%rsp)
leaq 0x50(%rsp), %rdi
callq 0x96c10
movq 0x18(%rsp), %rdi
leaq 0x50(%rsp), %rsi
callq 0x985b0
jmp 0x96eec
movq 0x38(%rsp), %rax
movq %rax, %rdi
addq $0x50, %rdi
movl (%rax), %eax
movl %eax, %esi
callq 0x98640
movq (%rax), %rcx
addq $0x1, %rcx
movq %rcx, (%rax)
movq 0x38(%rsp), %rdi
movl (%rdi), %eax
addl $0x1, %eax
movl %eax, %eax
movq %rax, 0x10(%rsp)
addq $0x68, %rdi
callq 0x98660
movq %rax, %rcx
movq 0x10(%rsp), %rax
cmpq %rcx, %rax
jbe 0x96fab
movq 0x38(%rsp), %rax
addq $0x68, %rax
movq %rax, 0x8(%rsp)
leaq 0x40(%rsp), %rdi
callq 0x96c10
movq 0x8(%rsp), %rdi
leaq 0x40(%rsp), %rsi
callq 0x985b0
jmp 0x96f5b
movq 0x38(%rsp), %rax
movq %rax, %rdi
addq $0x68, %rdi
movl (%rax), %eax
movl %eax, %esi
callq 0x98640
movq (%rax), %rcx
addq $0x1, %rcx
movq %rcx, (%rax)
addq $0x78, %rsp
retq
nop
// File: CMU-SAFARI[P]MQSim/src/ssd/Queue_Probe.cpp
// Function: SSD_Components::Queue_Probe::DequeueRequest(SSD_Components::NVM_Transaction*)
void Queue_Probe::DequeueRequest(NVM_Transaction* transaction)
	{
		nDepartures++;
		nDeparturesEpoch++;

		if (transaction == NULL)
			throw std::logic_error("Object can not be null if accurateTimingEnabled=ture");
		sim_time_type et = currentObjectsInQueue[transaction];
		currentObjectsInQueue.erase(transaction);
		sim_time_type tc = Simulator->Time() - et;
		totalWaitingTime += tc;
		if (tc > maxWaitingTime)
			maxWaitingTime = tc;
		totalWaitingTimeEpoch += tc;
		setCount(count - 1);
	}

// Assembly:
subq $0x48, %rsp
movq %rdi, 0x40(%rsp)
movq %rsi, 0x38(%rsp)
movq 0x40(%rsp), %rax
movq %rax, 0x10(%rsp)
movq 0x10(%rax), %rcx
addq $0x1, %rcx
movq %rcx, 0x10(%rax)
movq 0x38(%rax), %rcx
addq $0x1, %rcx
movq %rcx, 0x38(%rax)
cmpq $0x0, 0x38(%rsp)
jne 0x97060
movl $0x10, %edi
callq 0x8200
movq %rax, %rdi
movq %rdi, %rax
movq %rax, 0x8(%rsp)
leaq 0x1775e(%rip), %rsi     # 0xae782
callq 0x8610
jmp 0x9702b
movq 0x8(%rsp), %rdi
movq 0x42f89(%rip), %rsi     # 0xd9fc0
movq 0x42f52(%rip), %rdx     # 0xd9f90
callq 0x8710
movq 0x8(%rsp), %rdi
movq %rax, %rcx
movl %edx, %eax
movq %rcx, 0x30(%rsp)
movl %eax, 0x2c(%rsp)
callq 0x8330
jmp 0x970fd
movq 0x10(%rsp), %rdi
addq $0x80, %rdi
leaq 0x38(%rsp), %rsi
callq 0x985e0
movq 0x10(%rsp), %rdi
movq (%rax), %rax
movq %rax, 0x20(%rsp)
addq $0x80, %rdi
leaq 0x38(%rsp), %rsi
callq 0x98610
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq 0x10(%rsp), %rcx
subq 0x20(%rsp), %rax
movq %rax, 0x18(%rsp)
movq 0x18(%rsp), %rax
addq 0x18(%rcx), %rax
movq %rax, 0x18(%rcx)
movq 0x18(%rsp), %rax
cmpq 0xc0(%rcx), %rax
jbe 0x970dc
movq 0x10(%rsp), %rax
movq 0x18(%rsp), %rcx
movq %rcx, 0xc0(%rax)
movq 0x10(%rsp), %rdi
movq 0x18(%rsp), %rax
addq 0x40(%rdi), %rax
movq %rax, 0x40(%rdi)
movl (%rdi), %esi
subl $0x1, %esi
callq 0x96e30
addq $0x48, %rsp
retq
movq 0x30(%rsp), %rdi
callq 0x8770
nopw (%rax,%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/Queue_Probe.cpp
// Function: SSD_Components::Queue_Probe::ResetEpochStatistics()
void Queue_Probe::ResetEpochStatistics()
	{
		nRequestsEpoch = 0;
		nDeparturesEpoch = 0;
		totalWaitingTimeEpoch = 0;
		epochStartTime = Simulator->Time();

		for(unsigned int i = 0; i < statesEpoch.size(); i++) {
			statesEpoch[i].totalTime = 0;
			statesEpoch[i].nEnterances = 0;
		}
	}

// Assembly:
subq $0x28, %rsp
movq %rdi, 0x20(%rsp)
movq 0x20(%rsp), %rax
movq %rax, 0x10(%rsp)
movq $0x0, 0x30(%rax)
movq $0x0, 0x38(%rax)
movq $0x0, 0x40(%rax)
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movq %rax, %rcx
movq 0x10(%rsp), %rax
movq %rcx, 0x48(%rax)
movl $0x0, 0x1c(%rsp)
movq 0x10(%rsp), %rdi
movl 0x1c(%rsp), %eax
movq %rax, 0x8(%rsp)
addq $0x68, %rdi
callq 0x98660
movq %rax, %rcx
movq 0x8(%rsp), %rax
cmpq %rcx, %rax
jae 0x971c4
movq 0x10(%rsp), %rdi
addq $0x68, %rdi
movl 0x1c(%rsp), %eax
movl %eax, %esi
callq 0x98640
movq 0x10(%rsp), %rdi
movq $0x0, 0x8(%rax)
addq $0x68, %rdi
movl 0x1c(%rsp), %eax
movl %eax, %esi
callq 0x98640
movq $0x0, (%rax)
movl 0x1c(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x1c(%rsp)
jmp 0x9715c
addq $0x28, %rsp
retq
nopl (%rax)
// File: CMU-SAFARI[P]MQSim/src/ssd/Queue_Probe.cpp
// Function: SSD_Components::Queue_Probe::AvgQueueLength()
double Queue_Probe::AvgQueueLength()
	{
		sim_time_type sum = 0;
		for (unsigned int len = 0; len < states.size(); len++)
			sum += states[len].totalTime * len;
		return (double)sum / (double)Simulator->Time();
	}

// Assembly:
subq $0x58, %rsp
movq %rdi, 0x50(%rsp)
movq 0x50(%rsp), %rax
movq %rax, 0x38(%rsp)
movq $0x0, 0x48(%rsp)
movl $0x0, 0x44(%rsp)
movq 0x38(%rsp), %rdi
movl 0x44(%rsp), %eax
movq %rax, 0x30(%rsp)
addq $0x50, %rdi
callq 0x98660
movq %rax, %rcx
movq 0x30(%rsp), %rax
cmpq %rcx, %rax
jae 0x97fbf
movq 0x38(%rsp), %rdi
addq $0x50, %rdi
movl 0x44(%rsp), %eax
movl %eax, %esi
callq 0x98640
movq 0x8(%rax), %rax
movl 0x44(%rsp), %ecx
imulq %rcx, %rax
addq 0x48(%rsp), %rax
movq %rax, 0x48(%rsp)
movl 0x44(%rsp), %eax
addl $0x1, %eax
movl %eax, 0x44(%rsp)
jmp 0x97f64
movq 0x48(%rsp), %xmm0
movaps 0x139e4(%rip), %xmm1    # 0xab9b0
movaps %xmm1, (%rsp)
punpckldq %xmm1, %xmm0    # xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
movapd 0x139e4(%rip), %xmm1    # 0xab9c0
movaps %xmm1, 0x10(%rsp)
subpd %xmm1, %xmm0
movaps %xmm0, %xmm1
unpckhpd %xmm0, %xmm0            # xmm0 = xmm0[1,1]
addsd %xmm1, %xmm0
movsd %xmm0, 0x28(%rsp)
callq 0x46500
movq %rax, %rdi
callq 0x46c50
movaps (%rsp), %xmm3
movaps 0x10(%rsp), %xmm2
movsd 0x28(%rsp), %xmm0
movq %rax, %xmm1
punpckldq %xmm3, %xmm1    # xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
subpd %xmm2, %xmm1
movaps %xmm1, %xmm2
unpckhpd %xmm1, %xmm1            # xmm1 = xmm1[1,1]
addsd %xmm2, %xmm1
divsd %xmm1, %xmm0
addq $0x58, %rsp
retq
nopw %cs:(%rax,%rax)