// File: /workspace/github_c_makefile_star2_O0/intel[P]pf-bb-config/fpga_lte/fpga_lte_cfg_app.c
// Function: print_static_reg_debug_info
static inline void
print_static_reg_debug_info(void *mmio_base)
{
	uint8_t i, q_id;
	uint32_t fid;
	uint32_t version_id = fpga_reg_read_32(mmio_base,
			FPGA_LTE_FEC_VERSION_ID);
	uint16_t config = fpga_reg_read_16(mmio_base,
			FPGA_LTE_FEC_CONFIGURATION);
	uint8_t qmap_done = fpga_reg_read_8(mmio_base,
			FPGA_LTE_FEC_QUEUE_PF_VF_MAP_DONE);
	uint16_t lb_factor = fpga_reg_read_16(mmio_base,
			FPGA_LTE_FEC_LOAD_BALANCE_FACTOR);
	uint16_t ring_desc_len = fpga_reg_read_16(mmio_base,
			FPGA_LTE_FEC_RING_DESC_LEN);
	uint16_t flr_time_out = fpga_reg_read_16(mmio_base,
			FPGA_LTE_FEC_FLR_TIME_OUT);

	printf("FEC FPGA RTL v%u.%u\n",
		((uint16_t)(version_id >> 16)), ((uint16_t)version_id));
	printf("UL.DL Weights = %u.%u\n",
			((uint8_t)config), ((uint8_t)(config >> 8)));
	printf("UL.DL Load Balance = %u.%u\n",
			((uint8_t)lb_factor), ((uint8_t)(lb_factor >> 8)));
	printf("Queue-PF/VF Mapping Table = %s\n",
			(qmap_done > 0) ? "READY" : "NOT-READY");
	printf("Ring Descriptor Size = %u bytes\n",
			ring_desc_len*FPGA_RING_DESC_LEN_UNIT_BYTES);
	printf("FLR Timeout = %f usec\n",
			(float)flr_time_out*FPGA_FLR_TIMEOUT_UNIT);

	printf("\n--------+-----+-----+-----+-----+-----+-----+-----+-----+-----+\n");
	printf("        |  PF | VF0 | VF1 | VF2 | VF3 | VF4 | VF5 | VF6 | VF7 |\n");
	printf("--------+-----+-----+-----+-----+-----+-----+-----+-----+-----+\n");

	for (q_id = 0; q_id < FPGA_TOTAL_NUM_QUEUES; q_id++) {

		printf("%s-Q'%02u |",
			(q_id < FPGA_NUM_UL_QUEUES) ? "UL" : "DL", q_id);

		fid = fpga_reg_read_32(mmio_base,
				FPGA_LTE_FEC_QUEUE_MAP + (q_id << 2));

		for (i = 0; i < 9; ++i) {

			if (!((fid >> 16) & (0x80)) && i == 0) {
				printf("  X  |");
				continue;
			}

			if (((((fid >> 16) & (0x7f)) + 1) == i) &&
					((fid >> 16) & (0x80)))
				printf("  X  |");
			else
				printf("     |");
		}
		printf("\n");
	}
	printf("--------+-----+-----+-----+-----+-----+-----+-----+-----+-----+\n\n");
}

// Assembly:
pushq %rbp
movq %rsp, %rbp
subq $0x30, %rsp
movq %rdi, -0x8(%rbp)
movq -0x8(%rbp), %rdi
xorl %esi, %esi
movl %esi, -0x24(%rbp)
callq 0x121a0
movl %eax, -0x14(%rbp)
movq -0x8(%rbp), %rdi
movl $0x4, %esi
callq 0x121d0
movw %ax, -0x16(%rbp)
movq -0x8(%rbp), %rdi
movl $0x8, %esi
callq 0x12200
movb %al, -0x17(%rbp)
movq -0x8(%rbp), %rdi
movl $0xa, %esi
callq 0x121d0
movw %ax, -0x1a(%rbp)
movq -0x8(%rbp), %rdi
movl $0xc, %esi
callq 0x121d0
movw %ax, -0x1c(%rbp)
movq -0x8(%rbp), %rdi
movl $0xe, %esi
callq 0x121d0
movw %ax, %cx
movl -0x24(%rbp), %eax
movw %cx, -0x1e(%rbp)
movl -0x14(%rbp), %ecx
movl %ecx, %esi
shrl $0x10, %esi
movzwl %cx, %edx
leaq 0x11f17(%rip), %rdi     # 0x23ee5
movb %al, -0x1f(%rbp)
callq 0xd140
movb -0x1f(%rbp), %al
movzwl -0x16(%rbp), %edx
movb %dl, %cl
movzbl %cl, %esi
shrl $0x8, %edx
leaq 0x11f0e(%rip), %rdi     # 0x23efa
callq 0xd140
movb -0x1f(%rbp), %al
movzwl -0x1a(%rbp), %edx
movb %dl, %cl
movzbl %cl, %esi
shrl $0x8, %edx
leaq 0x11f0a(%rip), %rdi     # 0x23f11
callq 0xd140
movb -0x1f(%rbp), %al
movzbl -0x17(%rbp), %ecx
testl %ecx, %ecx
leaq 0x11f35(%rip), %rcx     # 0x23f51
leaq 0x11f2a(%rip), %rsi     # 0x23f4d
cmovgq %rcx, %rsi
leaq 0x11eff(%rip), %rdi     # 0x23f2d
callq 0xd140
movb -0x1f(%rbp), %al
movzwl -0x1c(%rbp), %esi
shll $0x5, %esi
leaq 0x11f13(%rip), %rdi     # 0x23f57
callq 0xd140
movzwl -0x1e(%rbp), %eax
cvtsi2ss %eax, %xmm0
cvtss2sd %xmm0, %xmm0
movsd 0x11dbb(%rip), %xmm1    # 0x23e18
mulsd %xmm1, %xmm0
leaq 0x11f10(%rip), %rdi     # 0x23f78
movb $0x1, %al
callq 0xd140
leaq 0x11f19(%rip), %rdi     # 0x23f8f
movb $0x0, %al
callq 0xd140
leaq 0x11f4d(%rip), %rdi     # 0x23fd1
movb $0x0, %al
callq 0xd140
leaq 0x11efe(%rip), %rdi     # 0x23f90
movb $0x0, %al
callq 0xd140
movb $0x0, -0xa(%rbp)
movzbl -0xa(%rbp), %eax
cmpl $0x40, %eax
jge 0x1218a
movzbl -0xa(%rbp), %ecx
leaq 0x11f6c(%rip), %rsi     # 0x24021
leaq 0x11f62(%rip), %rax     # 0x2401e
cmpl $0x20, %ecx
cmovlq %rax, %rsi
movzbl -0xa(%rbp), %edx
leaq 0x11f44(%rip), %rdi     # 0x24012
movb $0x0, %al
callq 0xd140
movq -0x8(%rbp), %rdi
movzbl -0xa(%rbp), %esi
shll $0x2, %esi
addl $0x40, %esi
callq 0x121a0
movl %eax, -0x10(%rbp)
movb $0x0, -0x9(%rbp)
movzbl -0x9(%rbp), %eax
cmpl $0x9, %eax
jge 0x1216f
movl -0x10(%rbp), %eax
shrl $0x10, %eax
andl $0x80, %eax
cmpl $0x0, %eax
jne 0x12121
movzbl -0x9(%rbp), %eax
cmpl $0x0, %eax
jne 0x12121
leaq 0x11f0c(%rip), %rdi     # 0x24024
movb $0x0, %al
callq 0xd140
jmp 0x12165
movl -0x10(%rbp), %eax
shrl $0x10, %eax
andl $0x7f, %eax
addl $0x1, %eax
movzbl -0x9(%rbp), %ecx
cmpl %ecx, %eax
jne 0x12155
movl -0x10(%rbp), %eax
shrl $0x10, %eax
andl $0x80, %eax
cmpl $0x0, %eax
je 0x12155
leaq 0x11ed8(%rip), %rdi     # 0x24024
movb $0x0, %al
callq 0xd140
jmp 0x12163
leaq 0x11ecf(%rip), %rdi     # 0x2402b
movb $0x0, %al
callq 0xd140
jmp 0x12165
movb -0x9(%rbp), %al
addb $0x1, %al
movb %al, -0x9(%rbp)
jmp 0x120ef
leaq 0x11efc(%rip), %rdi     # 0x24072
movb $0x0, %al
callq 0xd140
movb -0xa(%rbp), %al
addb $0x1, %al
movb %al, -0xa(%rbp)
jmp 0x1209d
leaq 0x11ea1(%rip), %rdi     # 0x24032
movb $0x0, %al
callq 0xd140
addq $0x30, %rsp
popq %rbp
retq
nop