// File: /workspace/github_c_makefile_star2_O2/mbitsnbites[P]SoftFP/./softfp_template_icvt.h
// Function: internal_cvt_sf32_i128
static ICVT_INT glue(glue(glue(internal_cvt_sf, F_SIZE), _i), ICVT_SIZE)(F_UINT a, RoundingModeEnum rm,
                                                                         uint32_t *pfflags, BOOL is_unsigned)
{
    uint32_t a_sign, addend, rnd_bits;
    int32_t a_exp;
    F_UINT a_mant;
    ICVT_UINT r, r_max;

    a_sign = a >> (F_SIZE - 1);
    a_exp = (a >> MANT_SIZE) & EXP_MASK;
    a_mant = a & MANT_MASK;
    if (a_exp == EXP_MASK && a_mant != 0)
        a_sign = 0; /* NaN is like +infinity */
    if (a_exp == 0) {
        a_exp = 1;
    } else {
        a_mant |= (F_UINT)1 << MANT_SIZE;
    }
    a_mant <<= RND_SIZE;
    a_exp = a_exp - (EXP_MASK / 2) - MANT_SIZE;

    if (is_unsigned)
        r_max = (ICVT_UINT)a_sign - 1;
    else
        r_max = ((ICVT_UINT)1 << (ICVT_SIZE - 1)) - (ICVT_UINT)(a_sign ^ 1);
    if (a_exp >= 0) {
        if (a_exp <= (ICVT_SIZE - 1 - MANT_SIZE)) {
            r = (ICVT_UINT)(a_mant >> RND_SIZE) << a_exp;
            if (r > r_max)
                goto overflow;
        } else {
        overflow:
            *pfflags |= FFLAG_INVALID_OP;
            return r_max;
        }
    } else {
        a_mant = rshift_rnd(a_mant, -a_exp);

        switch(rm) {
        case RM_RNE:
        case RM_RMM:
            addend = (1 << (RND_SIZE - 1));
            break;
        case RM_RTZ:
            addend = 0;
            break;
        default:
        case RM_RDN:
        case RM_RUP:
            if (a_sign ^ (rm & 1))
                addend = (1 << RND_SIZE) - 1;
            else
                addend = 0;
            break;
        }
        
        rnd_bits = a_mant & ((1 << RND_SIZE ) - 1);
        a_mant = (a_mant + addend) >> RND_SIZE;
        /* half way: select even result */
        if (rm == RM_RNE && rnd_bits == (1 << (RND_SIZE - 1)))
            a_mant &= ~1;
        if (a_mant > r_max)
            goto overflow;
        r = a_mant;
        if (rnd_bits != 0)
            *pfflags |= FFLAG_INEXACT;
    }
    if (a_sign)
        r = -r;
    return r;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %edi, %eax
shrl $0x1f, %edi
movl %eax, %r9d
shrl $0x17, %r9d
movl $0xff, %r10d
andl %r10d, %r9d
andl $0x7fffff, %eax         # imm = 0x7FFFFF
xorl %r8d, %r8d
cmpl %r10d, %r9d
movl %edi, %r13d
cmovel %r8d, %r13d
testl %eax, %eax
cmovel %edi, %r13d
leal 0x800000(%rax), %edi
leal -0x96(%r9), %r10d
testl %r9d, %r9d
movl $0xffffff6b, %r12d      # imm = 0xFFFFFF6B
cmovnel %r10d, %r12d
cmovel %eax, %edi
movq %r13, %rax
addq $-0x1, %rax
adcq $-0x1, %r8
movl %r13d, %ebx
xorl $0x1, %ebx
negq %rbx
movabsq $-0x8000000000000000, %r14 # imm = 0x8000000000000000
sbbq $0x0, %r14
movq %rdx, %r15
testl %ecx, %ecx
cmovneq %rax, %rbx
cmovneq %r8, %r14
testl %r12d, %r12d
js 0x56e7
movl %edi, %edi
movzbl %r12b, %edx
xorl %esi, %esi
callq 0x133f0
cmpl $0x68, %r12d
ja 0x573f
movq %rax, %rcx
cmpq %rax, %rbx
movq %r14, %rax
sbbq %rdx, %rax
jae 0x5751
jmp 0x573f
movl %esi, %ebp
shll $0x7, %edi
negl %r12d
movl %r12d, %esi
callq 0x479a
pushq $0x40
popq %rcx
testl %ebp, %ebp
je 0x571c
cmpl $0x4, %ebp
je 0x571c
cmpl $0x1, %ebp
jne 0x570c
xorl %ecx, %ecx
jmp 0x571c
movl %ebp, %ecx
andl $0x1, %ecx
xorl %edx, %edx
cmpl %ecx, %r13d
pushq $0x7f
popq %rcx
cmovel %edx, %ecx
addl %eax, %ecx
andl $0x7f, %eax
shrl $0x7, %ecx
movl %eax, %esi
xorl $0x40, %esi
movl %ecx, %edx
andl $-0x2, %edx
orl %esi, %ebp
cmovnel %ecx, %edx
cmpq %rdx, %rbx
movq %r14, %rcx
sbbq $0x0, %rcx
jae 0x5745
orb $0x10, (%r15)
jmp 0x5768
movl %edx, %ecx
xorl %edx, %edx
testl %eax, %eax
je 0x5751
orb $0x1, (%r15)
xorl %r14d, %r14d
movq %rcx, %rbx
negq %rbx
sbbq %rdx, %r14
testl %r13d, %r13d
cmoveq %rcx, %rbx
cmoveq %rdx, %r14
movq %rbx, %rax
movq %r14, %rdx
addq $0x8, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq