// File: /workspace/github_c_makefile_star2_O3/mvermeulen[P]wspy/cpu_info.c
// Function: inventory_cpu
int inventory_cpu(void){
  unsigned int eax,ebx,ecx,edx;
  int i;
  int nwarn = 0;
  struct stat statbuf;
  FILE *fp;

  cpu_info = calloc(1,sizeof(struct cpu_info));

  // vendor string
  union cpuid0_vendor {
    struct { unsigned int ebx, edx, ecx; };
    char vendor[12];
  } cpuid_0;
  
  __cpuid(0,eax,ebx,ecx,edx);
  cpuid_0.ebx = ebx;
  cpuid_0.ecx = ecx;  
  cpuid_0.edx = edx;
  if (!strncmp(cpuid_0.vendor,"AuthenticAMD",12))
    cpu_info->vendor = VENDOR_AMD;
  else if (!strncmp(cpuid_0.vendor,"GenuineIntel",12))
    cpu_info->vendor = VENDOR_INTEL;
  else {
    cpu_info->vendor = VENDOR_UNKNOWN;
    warning("unknown cpu %16s\n",cpuid_0.vendor);
  }
  
  // model and family
  union cpuid1_modelinfo {
    struct {
      unsigned int step: 4;
      unsigned int model: 4;
      unsigned int family: 4;
      unsigned int ptype: 2;
      unsigned int pad1: 2;
      unsigned int emodel: 4;
      unsigned int efamily: 8;
      unsigned int pad2: 4;
    };
    unsigned int eax;
  } cpuid_1;

  __cpuid(1,eax,ebx,ecx,edx);
  cpuid_1.eax = eax;
  cpu_info->family = (cpuid_1.family==0xf)?
    cpuid_1.family+cpuid_1.efamily:
    cpuid_1.family;
  cpu_info->model = ((cpuid_1.family==0x6)||(cpuid_1.family==0xf))?
    (cpuid_1.emodel<<4) + cpuid_1.model:
    cpuid_1.model;

  // number of cores
  cpu_info->num_cores = get_nprocs();
  cpu_info->coreinfo = calloc(cpu_info->num_cores,
			      sizeof(struct cpu_core_info));

  // specify the core type
  for (i=0;i<cpu_info->num_cores;i++){
    if (cpu_info->vendor == VENDOR_AMD){
      if ((cpu_info->family == 0x17) || (cpu_info->family == 0x19)){
	// Zen
	cpu_info->coreinfo[i].vendor = CORE_AMD_ZEN;
      } else if (cpu_info->family == 0x1a) {
	// Zen5
	cpu_info->coreinfo[i].vendor = CORE_AMD_ZEN5;
      } else {
	cpu_info->coreinfo[i].vendor = CORE_AMD_UNKNOWN;
	if (nwarn == 0){
	  warning("unimplemented AMD CPU, family %x, model %x\n",
		  cpu_info->family,cpu_info->model);
	  nwarn++;
	}
      }
    } else if (cpu_info->vendor == VENDOR_INTEL){
      if ((cpu_info->family == 6) &&
	  ((cpu_info->model == 0xba)||(cpu_info->model == 0xb7)||
	   (cpu_info->model == 0x9a)||(cpu_info->model == 0x97)||
	   (cpu_info->model == 0xa7))){
	cpu_info->coreinfo[i].vendor = CORE_INTEL_CORE;
      } else {
	cpu_info->coreinfo[i].vendor = CORE_INTEL_UNKNOWN;
	if (nwarn == 0){
	  warning("unimplemented Intel CPU, family %x, model %x\n",
		  cpu_info->family,cpu_info->model);
	}
	nwarn++;
      }
    }
    cpu_info->coreinfo->is_available = 0;
    cpu_info->coreinfo->is_counter_started = 0;
  }
  // fix up hybrid cores for Raptor Lake and Alder Lake
  if (cpu_info->vendor == VENDOR_INTEL &&
      cpu_info->family == 6 &&
      ((cpu_info->model == 0xba)||(cpu_info->model == 0xb7)||
       (cpu_info->model == 0x9a)||(cpu_info->model == 0x97))){
    if (stat("/sys/devices/cpu_atom/cpus",&statbuf) != -1){
      cpu_info->is_hybrid = 1;
      if (fp = fopen("/sys/devices/cpu_atom/cpus","r")){
	int low,high;
	if (fscanf(fp,"%d-%d",&low,&high) == 2){
	  for (i=low;i<=high;i++){
	    cpu_info->coreinfo[i].vendor = CORE_INTEL_ATOM;
	  }
	}
	fclose(fp);
      }
    }
    if (stat("/sys/devices/cpu_core/cpus",&statbuf) != -1){
      if (fp = fopen("/sys/devices/cpu_core/cpus","r")){
	int low,high;
	if (fscanf(fp,"%d-%d",&low,&high) == 2){
	  for (i=low;i<=high;i++){
	    cpu_info->coreinfo[i].vendor = CORE_INTEL_CORE;
	  }
	}
	fclose(fp);
      }
    }    
  }
  // check affinity mask for available CPUs
  cpu_set_t set;
  cpu_info->num_cores_available;
  CPU_ZERO(&set);
  if (sched_getaffinity(getpid(),sizeof(set),&set) == -1){
    fatal("unable to get CPU affinity\n");
  }
  for (i=0;i<cpu_info->num_cores;i++){
    if (CPU_ISSET(i,&set)){
      cpu_info->coreinfo[i].is_available = 1;
      cpu_info->num_cores_available++;
    }
  }
  
  return 0;
}

// Assembly:
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x128, %rsp            # imm = 0x128
movl $0x1, %edi
movl $0x28, %esi
callq 0x3190
movq %rax, %rsi
xorl %eax, %eax
xchgq %rbx, %rdi
cpuid
xchgq %rbx, %rdi
movl %edi, 0x4(%rsp)
movl %ecx, 0xc(%rsp)
movl %edx, 0x8(%rsp)
movabsq $0x69746e6568747541, %rax # imm = 0x69746E6568747541
xorq 0x4(%rsp), %rax
movq %rsi, 0xa475(%rip)      # 0x13160
movl %ecx, %ecx
xorq $0x444d4163, %rcx       # imm = 0x444D4163
orq %rax, %rcx
je 0x8d34
movabsq $0x49656e69756e6547, %rax # imm = 0x49656E69756E6547
xorq 0x4(%rsp), %rax
movl 0xc(%rsp), %ecx
xorq $0x6c65746e, %rcx       # imm = 0x6C65746E
orq %rax, %rcx
je 0x8d3c
leaq 0x4d42(%rip), %rdi      # 0xda61
leaq 0x4(%rsp), %rsi
xorl %eax, %eax
callq 0x9337
movq 0xa42e(%rip), %rsi      # 0x13160
jmp 0x8d42
movl $0x1, (%rsi)
jmp 0x8d42
movl $0x2, (%rsi)
movl $0x1, %eax
xchgq %rbx, %rdi
cpuid
xchgq %rbx, %rdi
movl %eax, %ecx
shrl $0x8, %ecx
andl $0xf, %ecx
movl %eax, %edx
shrl $0x14, %edx
movzbl %dl, %edx
addl $0xf, %edx
cmpl $0xf, %ecx
cmovnel %ecx, %edx
movl %edx, 0x4(%rsi)
je 0x8d72
cmpl $0x6, %ecx
jne 0x8d87
movl %eax, %ecx
shrl $0xc, %ecx
andl $0xf0, %ecx
shrl $0x4, %eax
andl $0xf, %eax
orl %ecx, %eax
jmp 0x8d8d
shrl $0x4, %eax
andl $0xf, %eax
movl %eax, 0x8(%rsi)
callq 0x3340
movl %eax, %ebx
movq 0xa3c2(%rip), %r15      # 0x13160
movl %eax, 0xc(%r15)
movl %eax, %edi
movl $0x60, %esi
callq 0x3190
movq %rax, 0x18(%r15)
testl %ebx, %ebx
je 0x8ec7
movl $0xffffff69, %ebp       # imm = 0xFFFFFF69
movabsq $0x900010009, %rbx      # imm = 0x900010009
xorl %r12d, %r12d
xorl %r13d, %r13d
xorl %r14d, %r14d
movl (%r15), %eax
cmpl $0x2, %eax
je 0x8e07
cmpl $0x1, %eax
jne 0x8e8e
movl 0x4(%r15), %esi
cmpl $0x17, %esi
je 0x8df6
cmpl $0x1a, %esi
je 0x8e57
cmpl $0x19, %esi
jne 0x8e65
movq 0x18(%r15), %rax
movl $0x2, (%rax,%r12)
jmp 0x8e8e
movl 0x4(%r15), %esi
cmpl $0x6, %esi
jne 0x8e2f
movl 0x8(%r15), %eax
addl %ebp, %eax
cmpl $0x23, %eax
ja 0x8e2f
btq %rax, %rbx
jae 0x8e2f
movq 0x18(%r15), %rax
movl $0x6, (%rax,%r12)
jmp 0x8e8e
movq 0x18(%r15), %rax
movl $0x4, (%rax,%r12)
testl %r14d, %r14d
jne 0x8e52
movl 0x8(%r15), %edx
leaq 0x4c54(%rip), %rdi      # 0xda9f
xorl %eax, %eax
callq 0x9337
incl %r14d
jmp 0x8e8e
movq 0x18(%r15), %rax
movl $0x3, (%rax,%r12)
jmp 0x8e8e
movq 0x18(%r15), %rax
movl $0x1, (%rax,%r12)
testl %r14d, %r14d
jne 0x8e8e
movl 0x8(%r15), %edx
leaq 0x4bf2(%rip), %rdi      # 0xda73
xorl %eax, %eax
callq 0x9337
movl $0x1, %r14d
movq 0xa2cb(%rip), %rax      # 0x13160
movq 0x18(%rax), %rax
andb $-0x2, 0x4(%rax)
movq 0xa2bc(%rip), %rax      # 0x13160
movq 0x18(%rax), %rax
andb $-0x3, 0x4(%rax)
incq %r13
movq 0xa2aa(%rip), %r15      # 0x13160
movl 0xc(%r15), %eax
addq $0x60, %r12
cmpq %rax, %r13
jb 0x8dd2
cmpl $0x2, (%r15)
jne 0x9031
cmpl $0x6, 0x4(%r15)
jne 0x9031
movl $0xffffff69, %eax       # imm = 0xFFFFFF69
addl 0x8(%r15), %eax
cmpl $0x23, %eax
ja 0x9031
movabsq $0x900000009, %rcx      # imm = 0x900000009
btq %rax, %rcx
jae 0x9031
leaq 0x4bc4(%rip), %rdi      # 0xdacd
leaq 0x98(%rsp), %rsi
callq 0x31e0
cmpl $-0x1, %eax
je 0x8fa1
movq 0xa23a(%rip), %rax      # 0x13160
orb $0x1, 0x14(%rax)
leaq 0x4b9c(%rip), %rdi      # 0xdacd
leaq 0x33e6(%rip), %rsi      # 0xc31e
callq 0x3250
testq %rax, %rax
je 0x8fa1
movq %rax, %rbx
leaq 0x4b9c(%rip), %rsi      # 0xdae8
leaq 0x10(%rsp), %rdx
movq %rsp, %rcx
movq %rax, %rdi
xorl %eax, %eax
callq 0x3060
cmpl $0x2, %eax
jne 0x8f99
movslq 0x10(%rsp), %rax
cmpl (%rsp), %eax
jg 0x8f99
movq 0xa1ec(%rip), %rdx      # 0x13160
leaq (%rax,%rax,2), %rcx
decq %rax
shlq $0x5, %rcx
addq 0x18(%rdx), %rcx
movl $0x5, (%rcx)
movslq (%rsp), %rdx
incq %rax
addq $0x60, %rcx
cmpq %rdx, %rax
jl 0x8f83
movq %rbx, %rdi
callq 0x30a0
leaq 0x4b46(%rip), %rdi      # 0xdaee
leaq 0x98(%rsp), %rsi
callq 0x31e0
cmpl $-0x1, %eax
je 0x9031
leaq 0x4b2d(%rip), %rdi      # 0xdaee
leaq 0x3356(%rip), %rsi      # 0xc31e
callq 0x3250
testq %rax, %rax
je 0x9031
movq %rax, %rbx
leaq 0x4b0c(%rip), %rsi      # 0xdae8
leaq 0x10(%rsp), %rdx
movq %rsp, %rcx
movq %rax, %rdi
xorl %eax, %eax
callq 0x3060
cmpl $0x2, %eax
jne 0x9029
movslq 0x10(%rsp), %rax
cmpl (%rsp), %eax
jg 0x9029
movq 0xa15c(%rip), %rdx      # 0x13160
leaq (%rax,%rax,2), %rcx
decq %rax
shlq $0x5, %rcx
addq 0x18(%rdx), %rcx
movl $0x6, (%rcx)
movslq (%rsp), %rdx
incq %rax
addq $0x60, %rcx
cmpq %rdx, %rax
jl 0x9013
movq %rbx, %rdi
callq 0x30a0
xorps %xmm0, %xmm0
leaq 0x10(%rsp), %rbx
movaps %xmm0, 0x70(%rbx)
movaps %xmm0, 0x60(%rbx)
movaps %xmm0, 0x50(%rbx)
movaps %xmm0, 0x40(%rbx)
movaps %xmm0, 0x30(%rbx)
movaps %xmm0, 0x20(%rbx)
movaps %xmm0, 0x10(%rbx)
movaps %xmm0, (%rbx)
callq 0x3090
movl $0x80, %esi
movl %eax, %edi
movq %rbx, %rdx
callq 0x32d0
cmpl $-0x1, %eax
jne 0x907f
leaq 0x4a91(%rip), %rdi      # 0xdb09
xorl %eax, %eax
callq 0x913b
movq 0xa0da(%rip), %rax      # 0x13160
cmpl $0x0, 0xc(%rax)
je 0x90cf
movl $0x4, %ecx
xorl %edx, %edx
cmpq $0x3ff, %rdx            # imm = 0x3FF
ja 0x90c0
movq %rdx, %rsi
shrq $0x6, %rsi
movq 0x10(%rsp,%rsi,8), %rsi
btq %rdx, %rsi
jae 0x90c0
movq 0x18(%rax), %rax
orb $0x1, (%rax,%rcx)
movq 0xa0a3(%rip), %rax      # 0x13160
incl 0x10(%rax)
incq %rdx
movl 0xc(%rax), %esi
addq $0x60, %rcx
cmpq %rsi, %rdx
jb 0x9093
xorl %eax, %eax
addq $0x128, %rsp            # imm = 0x128
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
nop