low complexity bit parallel architectures for polynomial basis multiplication over gf 2m representing the field elements with respect to the polynomial or standard basis we consider bit parallel architectures for multiplication over the finite field gf 2m in this effect first we derive a new formulation for polynomial basis multiplication in terms of the reduction matrix q the main advantage of this new formulation is that it can be used with any field defining irreducible polynomial using this formulation we then develop a generalized architecture for the multiplier and analyze the time and gate complexities of the proposed multiplier as a function of degree m and the reduction matrix q to the best of our knowledge this is the first time that these complexities are given in terms of q unlike most other articles on bit parallel finite field multipliers here we also consider the number of signals to be routed in hardware implementation and we show that compared to the well known mastrovito s multiplier the proposed architecture has fewer routed signals the proposed generalized architecture is further optimized for three special types of polynomials namely equally spaced polynomials trinomials and pentanomials we have obtained explicit formulas and complexities of the multipliers for these three special irreducible polynomials this makes it very easy for a designer to implement the proposed multipliers using hardware description languages like vhdl and verilog with minimum knowledge of finite field arithmetic

five six and seven term karatsuba like formulae the karatsuba ofman algorithm starts with a way to multiply two 2 term i e linear polynomials using three scalar multiplications there is also a way to multiply two 3 term i e quadratic polynomials using six scalar multiplications these are used within recursive constructions to multiply two higher degree polynomials in subquadratic time we present division free formulae which multiply two 5 term polynomials with 13 scalar multiplications two 6 term polynomials with 17 scalar multiplications and two 7 term polynomials with 22 scalar multiplications these formulae may be mixed with the 2 term and 3 term formulae within recursive constructions leading to improved bounds for many other degrees using only the 6 term formula leads to better asymptotic performance than standard karatsuba the new formulae work in any characteristic but simplify in characteristic 2 we describe their application to elliptic curve arithmetic over binary fields we include some timing data

mastrovito multiplier for general irreducible polynomials we present a new formulation of the mastrovito multiplication matrix for the field gf 2 sup m generated by an arbitrary irreducible polynomial we study in detail several specific types of irreducible polynomials e g trinomials all one polynomials and equally spaced polynomials and obtain the time and space complexity of these designs particular examples illustrating the properties of the proposed architecture are also given the complexity results established in this paper match the best complexity results known to date the most important new result is the space complexity of the mastrovito multiplier for an equally spaced polynomial which is found as m sup 2 spl delta xor gates and m sup 2 and gates where spl delta is the spacing factor

a new approach to subquadratic space complexity parallel multipliers for extended binary fields based on toeplitz matrix vector products and coordinate transformation techniques we present a new scheme for subquadratic space complexity parallel multiplication in gf 2n using the shifted polynomial basis both the space complexity and the asymptotic gate delay of the proposed multiplier are better than those of the best existing subquadratic space complexity parallel multipliers for example with n being a power of 2 the space complexity is about 8 percent better while the asymptotic gate delay is about 33 percent better respectively another advantage of the proposed matrix vector product approach is that it can also be used to design subquadratic space complexity polynomial dual weakly dual and triangular basis parallel multipliers to the best of our knowledge this is the first time that subquadratic space complexity parallel multipliers are proposed for dual weakly dual and triangular bases a recursive design algorithm is also proposed for efficient construction of the proposed subquadratic space complexity multipliers this design algorithm can be modified for the construction of most of the subquadratic space complexity multipliers previously reported in the literature

mastrovito form of non recursive karatsuba multiplier for all trinomials we present a new type of bit parallel non recursive karatsuba multiplier over gf 2 m generated by an arbitrary irreducible trinomial this design effectively exploits mastrovito approach and shifted polynomial basis spb to reduce the time complexity and karatsuba algorithm to reduce its space complexity we show that this type of multiplier is only one t x slower than the fastest bit parallel multiplier for all trinomials where t x is the delay of one 2 input xor gate meanwhile its space complexity is roughly 3 4 of those multipliers to the best of our knowledge it is the first time that our scheme has reached such a time delay bound this result outperforms previously proposed non recursive karatsuba multipliers

interaction of sine gordon kinks with defects the two bounce resonance a model of soliton defect interactions in the sine gordon equations is studied using singular perturbation theory melnikov theory is used to derive a critical velocity for strong interactions which is shown to be exponentially small for weak defects matched asymptotic expansions for nearly heteroclinic orbits are constructed for the initial value problem which are then used to derive analytical formulas for the locations of the well known two and three bounce resonance windows as well as several other phenomena seen in numerical simulations

low complexity bit parallel canonical and normal basis multipliers for a class of finite fields we present a new low complexity bit parallel canonical basis multiplier for the field gf 2m generated by an all one polynomial the proposed canonical basis multiplier requires m sup 2 1 xor gates and m sup 2 and gates we also extend this canonical basis multiplier to obtain a new bit parallel normal basis multiplier

systematic design of original and modified mastrovito multipliers for general irreducible polynomials this paper considers the design of bit parallel dedicated finite field multipliers using standard basis an explicit algorithm is proposed for efficient construction of mastrovito product matrix based on which we present a systematic design of mastrovito multiplier applicable to gf 2 sup m generated by an arbitrary irreducible polynomial this design effectively exploits the spatial correlation of elements in mastrovito product matrix to reduce the complexity using a similar methodology we propose a systematic design of modified mastrovito multiplier which is suitable for gf 2 sup m generated by high hamming weight irreducible polynomials for both original and modified mastrovito multipliers the developed multiplier architectures are highly modular which is desirable for vlsi hardware implementation applying the proposed algorithm and design approach we study the mastrovito multipliers for several special irreducible polynomials such as trinomial and equally spaced polynomial and the obtained complexity results match the best known results moreover we have discovered several new special irreducible polynomials which also lead to low complexity mastrovito multipliers

efficient algorithms and architectures for field multiplication using gaussian normal bases recently implementations of normal basis multiplication over the extended binary field gf 2 sup m have received considerable attention a class of low complexity normal bases called gaussian normal bases has been included in a number of standards such as ieee and nist for an elliptic curve digital signature algorithm the multiplication algorithms presented there are slow in software since they rely on bit wise inner product operations in this paper we present two vector level software algorithms which essentially eliminate such bit wise operations for gaussian normal bases our analysis and timing results show that the software implementation of the proposed algorithm is faster than previously reported normal basis multiplication algorithms the proposed algorithm is also more memory efficient compared with its look up table based counterpart moreover two new digit level multiplier architectures are proposed and it is shown that they outperform the existing normal basis multiplier structures as compared with similar digit level normal basis multipliers the proposed multiplier with serial output requires the fewest number of xor gates and the one with parallel output is the fastest multiplier

gf 2 sup m multiplication and division over the dual basis in this paper an algorithm for gf 2 sup m multiplication division is presented and a new more generalized definition of duality is proposed from these the bit serial berlekamp multiplier is derived and shown to be a specific case of a more general class of multipliers furthermore it is shown that hardware efficient bit parallel dual basis multipliers can also be designed these multipliers have a regular structure are easily extended to different gf 2 sup m and hence suitable for vlsi implementations as in the bit serial case these bit parallel multipliers can also be hardwired to carry out constant multiplication these constant multipliers have reduced hardware requirements and are also simple to design in addition the multiplication division algorithm also allows a bit serial systolic finite field divider to be designed this divider is modular independent of the defining irreducible polynomial for the field easily expanded to different gf 2 sup m and its longest delay path is independent of m

a generalized method for constructing subquadratic complexity gf 2 sup k multipliers we introduce a generalized method for constructing subquadratic complexity multipliers for even characteristic field extensions the construction is obtained by recursively extending short convolution algorithms and nesting them to obtain the short convolution algorithms the winograd short convolution algorithm is reintroduced and analyzed in the context of polynomial multiplication we present a recursive construction technique that extends any d point multiplier into an n d sup k point multiplier with area that is subquadratic and delay that is logarithmic in the bit length n we present a thorough analysis that establishes the exact space and time complexities of these multipliers using the recursive construction method we obtain six new constructions among which one turns out to be identical to the karatsuba multiplier all six algorithms have subquadratic space complexities and two of the algorithms have significantly better time complexities than the karatsuba algorithm

low complexity bit parallel multiplier for gf 2 sup m defined by all one polynomials using redundant representation this paper presents a new bit parallel multiplier for the finite field gf 2 sup m defined by an irreducible all one polynomial in order to reduce the complexity of the multiplier we introduce a redundant representation and use the well known multiplication method proposed by karatsuba the main idea is to combine the redundant representation and the karatsuba method to design an efficient bit parallel multiplier as a result the proposed multiplier requires about 25 percent fewer and xor gates than the previously proposed multipliers using an all one polynomial while it has almost the same time delay as the previously proposed ones

low complexity bit parallel multipliers for a class of finite fields new implementations of bit parallel multipliers for a class of finite fields are proposed the class of finite fields is constructed with irreducible aops all one polynomials and esps equally spaced polynomials the size and time complexities of our proposed multipliers are lower than or equal to those of the previously proposed multipliers of the same class

a chinese remainder theorem approach to bit parallel gf 2 n polynomial basis multipliers for irreducible trinomials we show that the step modulo the degree n field generating irreducible polynomial in the classical definition of the gf 2 n multiplication operation can be avoided this leads to an alternative representation of the finite field multiplication operation combining this representation and the chinese remainder theorem we design bit parallel gf 2 n multipliers for irreducible trinomials u n u k 1 on gf 2 where 1 for some values of n our architectures have the same time complexity as the fastest bit parallel multipliers the quadratic multipliers but their space complexities are reduced take the special irreducible trinomial u 2k u k 1 for example the space complexity of the proposed design is reduced by about 1 8 while the time complexity matches the best result our experimental results show that among the 539 values of n such that 4 and x n x k 1 is irreducible over gf 2 for some k in the range 1 the proposed multipliers beat the current fastest parallel multipliers for 290 values of n when n 1 3 le k le n 2 they have the same time complexity but the space complexities are reduced by 8 4 percent on average

hodge classes on abelian varieties of low dimension in this paper we study hodge classes on complex abelian varieties x if dimx then it is wellknown that every hodge class on x is a linear combination of products of divisor classes in the authors showed that if x is simple of dimension then every hodge class is a linear combination of products of divisor classes and weil classesif there are any the notion of a weil class shall be briey reviewed in the aim of this note is to extend this to arbitrary abelian varieties of dimension in order to state our main results let us describe some special cases a the abelian variety x is isogenous to a product x x where x is an elliptic curve with complex multiplication by an imaginary quadratic eld k and where x is a simple abelian threefold such that there exists an embedding k endx b the abelian variety x is simple of dimension such that endx is a eld containing an imaginary quadratic eld k which acts on the tangent space tx with multiplicities see x for further explanation c the abelian variety x is simple of dimension with d endx a denite quaternion algebra over q type iii in the albert classication note that for every d n q the subalgebra q d is an imaginary quadratic eld d the abelian variety x is simple of dimension with endx q

parallel multipliers based on special irreducible pentanomials the state of the art galois field gf 2 sup m multipliers offer advantageous space and time complexities when the field is generated by so special irreducible polynomial to date the best complexity results have been obtained when the irreducible polynomial is either a trinomial or an equally spaced polynomial esp unfortunately there exist only a few irreducible esps in the range of interest for most of the applications e g error correcting codes computer algebra and elliptic curve cryptography furthermore it is not always possible to find an irreducible trinomial of degree m in this range for those cases where neither an irreducible trinomial nor an irreducible esp exists the use of irreducible pentanomials has been suggested irreducible pentanomials are abundant and there are several eligible candidates for a given m we promote the use of two special types of irreducible pentanomials we propose new mastrovito and dual basis multiplier architectures based on these special irreducible pentanomials and give rigorous analyses of their space and time complexity

mastrovito multiplier for all trinomials an efficient algorithm for the multiplication in gf 2 sup m was introduced by mastrovito the space complexity of the mastrovito multiplier for the irreducible trinomial x sup m x 1 was given as m sup 2 1 xor and m sup 2 and gales in this paper we describe an architecture based on a new formulation of the multiplication matrix and show that the mastrovito multiplier for the generating trinomial x sup m x sup n 1 where m spl ne 2n also requires m sup 2 1 xor and m sup 2 and gates however m sup 2 x sup m 2 xor gates are sufficient when the generating trinomial is of the form x sup m x sup m 2 1 for an even m we also calculate the time complexity of the proposed mastrovito multiplier and give design examples for the irreducible trinomials x sup 7 x sup 4 1 and x sup 6 x sup 3 1

a new construction of massey omura parallel multiplier over gf 2 sup m the massey omura multiplier of gf 2 sup m uses a normal basis and its bit parallel version is usually implemented using m identical combinational logic blocks whose inputs are cyclically shifted from one another in the past it was shown that for a class of finite fields defined by irreducible all one polynomials the parallel massey omura multiplier had redundancy and a modified architecture of lower circuit complexity was proposed in this article it is shown that not only does this type of multiplier contain redundancy in that special class of finite fields but it also has redundancy in fields gf 2 sup m defined by any irreducible polynomial by removing the redundancy we propose a new architecture for the normal basis parallel multiplier which is applicable to any arbitrary finite field and has significantly lower circuit complexity compared to the original massey omura normal basis parallel multiplier the proposed multiplier structure is also modular and hence suitable for vlsi realization when applied to fields defined by the irreducible all one polynomials the multiplier s circuit complexity matches the best result available in the open literature

fast bit parallel gf 2 sup n multiplier for all trinomials based on a new representation of gf 2 sup n we present two multipliers for all irreducible trinomials space complexities of the multipliers match the best results the time complexity of one multiplier is t sub a 1 log sub 2 n t sub x for all irreducible trinomials where t sub a and t sub x are the delay of one 2 input and and xor gates respectively

a novel architecture for galois fields gf 2 m multipliers based on mastrovito scheme in this paper a new gf 2m multiplier for standard basis representation is developed the proposed multiplier implements the mastrovito multiplication scheme and can be designed for every field gf 2m a minimum area implementation of the first block of mastrovito multiplier and a high speed delay driven tree architecture for the second block of the mastrovito multiplier are employed in the new circuit multiplier complexity and delay are analytically evaluated for many polynomial classes timing and area occupation performances of the proposed multiplier are also calculated for many fields used in reed solomon codes applications and compared with those of previously proposed solutions the comparison shows that the proposed multiplier outperforms previous architectures for every considered gf 2m field the effectiveness of the proposed solution in a real application is verified by implementing in a 0 25 mum cmos technology the key equation solving block of a 255 239 reed solomon decoder the use of the proposed multiplier in this application results in a substantial speed improvement without any penalty in the silicon area occupation

modular construction of low complexity parallel multipliers for a class of finite fields gf 2 sup m structures for parallel multipliers of a class of fields gf 2 sup m based on irreducible all one polynomials aop and equally spaced polynomials esp are presented the structures are simple and modular which is important for hardware realization relationships between an irreducible aop and the corresponding irreducible esps have been exploited to construct esp based multipliers of large fields by a regular expansion of the basic modules of the aop based multiplier of a small field some features of the structures also enable a fast implementation of squaring and multiplication algorithms and therefore make fast exponentiation and inversion possible it is shown that if for a certain degree an irreducible aop as well as an irreducible esp exist then from the complexity point of view it is advantageous to use the esp based parallel multiplier

stability of stationary fronts in a non linear wave equation with spatial inhomogeneity we consider inhomogeneous non linear wave equations of the type u u v u x u 0 the spatial real axis is divided in intervals i i 0 n 1 and on each individual interval the potential is homogeneous i e v u x v u for x i by varying the lengths of the middle intervals typically one can obtain large families of stationary front or solitary wave solutions in these families the lengths are functions of the energies associated with the potentials v in this paper we show that the existence of an eigenvalue zero of the linearisation operator about such a front or stationary wave is related to zeroes of the determinant of a jacobian associated to the length functions furthermore the methods by which the result is obtained is fully constructive and can subsequently be used to deduce the stability and instability of stationary fronts or solitary waves as will be illustrated in examples 2012 elsevier inc