five six and seven term karatsuba like formulae the karatsuba ofman algorithm starts with a way to multiply two 2 term i e linear polynomials using three scalar multiplications there is also a way to multiply two 3 term i e quadratic polynomials using six scalar multiplications these are used within recursive constructions to multiply two higher degree polynomials in subquadratic time we present division free formulae which multiply two 5 term polynomials with 13 scalar multiplications two 6 term polynomials with 17 scalar multiplications and two 7 term polynomials with 22 scalar multiplications these formulae may be mixed with the 2 term and 3 term formulae within recursive constructions leading to improved bounds for many other degrees using only the 6 term formula leads to better asymptotic performance than standard karatsuba the new formulae work in any characteristic but simplify in characteristic 2 we describe their application to elliptic curve arithmetic over binary fields we include some timing data

eventual practical stability of impulsive differential equations with time delay in terms of two measurements in this paper we introduce a new stability eventual practical stability for impulsive differential equations with time delay by using lyapunov functions and comparison principle we will get some criteria of eventual practical stability eventual practical quasistability and strong eventual practical stability for impulsive differential equations with time delay in terms of two measurements

mastrovito multiplier for general irreducible polynomials we present a new formulation of the mastrovito multiplication matrix for the field gf 2 sup m generated by an arbitrary irreducible polynomial we study in detail several specific types of irreducible polynomials e g trinomials all one polynomials and equally spaced polynomials and obtain the time and space complexity of these designs particular examples illustrating the properties of the proposed architecture are also given the complexity results established in this paper match the best complexity results known to date the most important new result is the space complexity of the mastrovito multiplier for an equally spaced polynomial which is found as m sup 2 spl delta xor gates and m sup 2 and gates where spl delta is the spacing factor

low complexity multiplication in a finite field using ring representation elements of a finite field gf 2 sup m are represented as elements in a ring in which multiplication is more time efficient this leads to faster multipliers with a modest increase in the number of xor and and gates needed to construct the multiplier such multipliers are used in error control coding and cryptography we consider rings modulo trinomials and 4 term polynomials in each case we show that our multiplier is faster than multipliers over elements in a finite field defined by irreducible pentanomials these results are especially significant in the field of elliptic curve cryptography where pentanomials are used to define finite fields finally an efficient systolic implementation of a multiplier for elements in a ring defined by x sup n x 1 is presented

a new approach to subquadratic space complexity parallel multipliers for extended binary fields based on toeplitz matrix vector products and coordinate transformation techniques we present a new scheme for subquadratic space complexity parallel multiplication in gf 2n using the shifted polynomial basis both the space complexity and the asymptotic gate delay of the proposed multiplier are better than those of the best existing subquadratic space complexity parallel multipliers for example with n being a power of 2 the space complexity is about 8 percent better while the asymptotic gate delay is about 33 percent better respectively another advantage of the proposed matrix vector product approach is that it can also be used to design subquadratic space complexity polynomial dual weakly dual and triangular basis parallel multipliers to the best of our knowledge this is the first time that subquadratic space complexity parallel multipliers are proposed for dual weakly dual and triangular bases a recursive design algorithm is also proposed for efficient construction of the proposed subquadratic space complexity multipliers this design algorithm can be modified for the construction of most of the subquadratic space complexity multipliers previously reported in the literature

a new representation of elements of finite fields gf 2 sup m yielding small complexity arithmetic circuits let f sub 2 denote the binary field and f sub 2m an algebraic extension of degree m 1 over f sub 2 traditionally elements of f sub 2m are either represented as powers of a primitive element of f sub 2m together with 0 or by an expansion in a basis of the vector space f sub 2m over f sub 2 we propose a new representation based on an isomorphism from f sub 2m into the residue polynomial ring module x sup n 1 the new representation simultaneously satisfies the properties of various traditional representations which leads in some cases to architectures of parallel in parallel out arithmetic circuits adder multiplier exponentiator inverter squarer divider with average to small complexity we show that the implementation of all the arithmetic circuits designed for the new representation on an integrated circuit sometimes has smaller complexity than the implementation of all the arithmetic circuits designed for other representations in addition we derive a serial multiplier for the field f sub 2m which comprises the least number of gates of all the serial multipliers known to the author when m 1 is a prime such that 2 is primitive in the field z sub m 1

dynamic behaviour of beams and rectangular plates under moving loads abstract a theory concerning the dynamic response of finite elastic structures rayleigh beams and plates having arbitrary end supports and under an arbitrary number of moving masses is developed the versatile solution technique presented is based on modified generalized finite integral transforms and the modified struble s method various analytical results are presented numerical examples are given and the results compare favourably with existing ones the efficiency of the solution technique is demonstrated and discussed

low space complexity multiplication over binary fields with dickson polynomial representation we study dickson bases for binary field representation such a representation seems interesting when no optimal normal basis exists for the field we express the product of two field elements as toeplitz or hankel matrix vector products this provides a parallel multiplier which is subquadratic in space and logarithmic in time using the matrix vector formulation of the field multiplication we also present sequential multiplier structures with linear space complexity

low complexity bit parallel canonical and normal basis multipliers for a class of finite fields we present a new low complexity bit parallel canonical basis multiplier for the field gf 2m generated by an all one polynomial the proposed canonical basis multiplier requires m sup 2 1 xor gates and m sup 2 and gates we also extend this canonical basis multiplier to obtain a new bit parallel normal basis multiplier

new low complexity bit parallel finite field multipliers using weakly dual bases new structures of bit parallel weakly dual basis wdb multipliers over the binary ground field are proposed an upper bound on the size complexity of bit parallel multiplier using an arbitrary generating polynomial is given when the generating polynomial is an irreducible trinomial x sup m x sup k 1 1 spl les k spl les m 2 the structure of the proposed bit parallel multiplier requires only m sup 2 two input and gates and at most m sup 2 1 xor gates the time delay is no greater than t sub a log sub 2 m 2 t sub x where t sub a and t sub x are the time delays of an and gate and an xor gate respectively

a modified massey omura parallel multiplier for a class of finite fields a massey omura parallel multiplier of finite fields gf 2 sup m contains m identical blocks whose inputs are cyclically shifted versions of one another it is shown that for fields gf 2 sup m generated by irreducible all one polynomials a portion of the block is independent of the input cyclic shift hence the multiplier contains redundancy by removing the redundancy a modified parallel multiplier is presented which is modular and has a lower circuit complexity

schmi gf 2 n shifted polynomial basis multipliers based on subquadratic toeplitz matrix vector product approach for all irreducible pentanomials besides karatsuba s algorithm optimal toeplitz matrix vector product tmvp formulae is another approach to design gf 2 n subquadratic multipliers however when gf 2 n elements are represented using a polynomial basis or its generalization shifted polynomial basis this approach is currently appliable only to fields gf 2 n generated by an irreducible trinomial or a special type of irreducible pentanomials but not to a general irreducible pentanomial the reason is that no transformation matrix which transforms the mastrovito matrix into a toeplitz matrix has been found in this article we propose such a transformation matrix and its inverse matrix for an arbitrary irreducible pentanomial

subquadratic space complexity binary field multiplier using double polynomial representation this paper deals with binary field multiplication we use the bivariate representation of binary field called double polynomial system dps presented in this concept generalizes the composite field representation to every finite field as shown in the main interest of dps representation is that it enables to use lagrange approach for multiplication and in the best case fast fourier transform approach which optimizes lagrange approach we use here a different strategy from to perform reduction and we also propose in this paper some new approaches for constructing dps we focus on dps which provides a simpler and more efficient method for coefficient reduction this enables us to avoid a multiplication required in the montgomery reduction approach of and thus to improve the complexity of the dps multiplier the resulting algorithm proposed in the present paper is subquadratic in space o n1 31 and logarithmic in time the space complexity is 33 percent better than in and 18 percent faster it is asymptotically more efficient than the best known method specifiably more efficient than when n 3 000 furthermore our proposal is available for every n and not only for n a power of two or three

concurrent error detection and correction in gaussian normal basis multiplier over gf 2 m fault based cryptanalysis has been developed to effectively break both private key and public key cryptosystems making robust finite field multiplication a very important research topic in recent years however no robust normal basis multiplier has been proposed in the literature therefore this investigation presents a semisystolic gaussian normal basis multiplier based on the proposed gaussian normal basis multiplier both concurrent error detection and correction capabilities can be easily achieved using time redundancy technology with no hardware modification

gf 2 sup m multiplication and division over the dual basis in this paper an algorithm for gf 2 sup m multiplication division is presented and a new more generalized definition of duality is proposed from these the bit serial berlekamp multiplier is derived and shown to be a specific case of a more general class of multipliers furthermore it is shown that hardware efficient bit parallel dual basis multipliers can also be designed these multipliers have a regular structure are easily extended to different gf 2 sup m and hence suitable for vlsi implementations as in the bit serial case these bit parallel multipliers can also be hardwired to carry out constant multiplication these constant multipliers have reduced hardware requirements and are also simple to design in addition the multiplication division algorithm also allows a bit serial systolic finite field divider to be designed this divider is modular independent of the defining irreducible polynomial for the field easily expanded to different gf 2 sup m and its longest delay path is independent of m

a new architecture for a parallel finite field multiplier with low complexity based on composite fields a bit parallel structure for a multiplier with low complexity in galois fields is introduced the multiplier operates over composite fields gf 2 sup n sup m with k nm the karatsuba ofman algorithm a karatsuba and y ofmanis 1963 is investigated and applied to the multiplication of polynomials over gf 2 sup n it is shown that this operation has a complexity of order o k sup log23 under certain constraints regarding k a complete set of primitive field polynomials for composite fields is provided which perform module reduction with low complexity as a result multipliers for fields gf 2 sup k up to k 32 with low gate counts and low delays are listed the architectures are highly modular and thus well suited for vlsi implementation

a generalized method for constructing subquadratic complexity gf 2 sup k multipliers we introduce a generalized method for constructing subquadratic complexity multipliers for even characteristic field extensions the construction is obtained by recursively extending short convolution algorithms and nesting them to obtain the short convolution algorithms the winograd short convolution algorithm is reintroduced and analyzed in the context of polynomial multiplication we present a recursive construction technique that extends any d point multiplier into an n d sup k point multiplier with area that is subquadratic and delay that is logarithmic in the bit length n we present a thorough analysis that establishes the exact space and time complexities of these multipliers using the recursive construction method we obtain six new constructions among which one turns out to be identical to the karatsuba multiplier all six algorithms have subquadratic space complexities and two of the algorithms have significantly better time complexities than the karatsuba algorithm

dynamic stability of stepped beams under moving loads abstract the dynamic stability of a stepped beam subjected to a moving mass is investigated in this study the equations of motion for transverse vibrations of the beam are developed in distributed parameter and finite element forms the impulsive parametric excitation theory is used to predict the stability of the beam when subjected to periodic parametric excitations the accuracy of the theory is verified by obtaining the stability boundaries of a simply supported beam and comparing the results with the results reported in the literature stability maps are then obtained for clamped free uniform beams as well as clamped free stepped beams it is found that the stability of certain beam modes can be improved by providing the beam with appropriately spaced steps it is shown that better stability characteristics can be obtained by using piezoelectric actuators stability analyses of beams with periodic piezoelectric and or viscoelastic steps are a natural extension of the present work

vlsi architectures for computing multiplications and inverses in gf 2 m finite field arithmetic logic is central in the implementation of reed solomon coders and in some cryptographic algorithms there is a need for good multiplication and inversion algorithms that can be easily realized on vlsi chips massey and omura 1 recently developed a new multiplication algorithm for galois fields based on a normal basis representation in this paper a pipeline structure is developed to realize the massey omura multiplier in the finite field gf 2m with the simple squaring property of the normal basis representation used together with this multiplier a pipeline architecture is also developed for computing inverse elements in gf 2m the designs developed for the massey omura multiplier and the computation of inverse elements are regular simple expandable and therefore naturally suitable for vlsi implementation

architecture for a low complexity rate adaptive reed solomon encoder multiple error correcting reed solomon rs codes have many practical applications the complexity of an rs encoder depends on multiplications in the finite field over which the code is defined we consider a triangular basis for representing the field elements and present an architecture for a rate adaptive rs encoder using a triangular basis multiplication algorithm the architecture supports pipeline and bit serial operations and has a low circuit complexity

comments on a new architecture for a parallel finite field multiplier with low complexity based on composite field in this comment we show that the gate complexity of karatsuba polynomial multipliers presented in the above paper can be reduced by exploring the common subexpressions

low latency digit serial systolic double basis multiplier over mbi gf 2 m using subquadratic toeplitz matrix vector product approach recently in cryptography and security the multipliers with subquadratic space complexity for trinomials and some specific pentanomials have been proposed for such kind of multipliers alternatively we use double basis multiplication which combines the polynomial basis and the modified polynomial basis to develop a new efficient digit serial systolic multiplier the proposed multiplier depends on trinomials and almost equally space pentanomials aesps and utilizes the subquadratic toeplitz matrix vector product scheme to derive a low latency digit serial systolic architecture if the selected digit size is d bits the proposed digit serial multiplier for both polynomials i e trinomials and aesps requires the latency of 2 left lceil sqrt m over d right rceil while traditional ones take at least o left left lceil m over d right rceil right clock cycles analytical and application specific integrated circuit asic synthesis results indicate that both the area and the time times area complexities of our proposed architecture are significantly lower than the existing digit serial systolic multipliers

efficient multiplier architectures for galois fields gf 2 sup 4n this contribution introduces a new class of multipliers for finite fields gf 2 sup n sup 4 the architecture is based on a modified version of the karatsuba ofman algorithm koa by determining optimized field polynomials of degree four the last stage of the koa and the module reduction can be combined this saves computation and area in vlsi implementations the new algorithm leads to architectures which show a considerably improved gate complexity compared to traditional approaches and reduced delay if compared with koa based architectures with separate module reduction the new multipliers lead to highly modular architectures and are thus well suited for vlsi implementations three types of field polynomials are introduced and conditions for their existence are established for the small fields where n 2 3 8 which are of primary technical interest optimized field polynomials were determined by an exhaustive search for each field order exact space and time complexities are provided

dynamics of a flexible beam carrying a moving mass using perturbation numerical and time frequency analysis techniques abstract the dynamic behaviour of a flexible cantilever beam carrying a moving mass spring is investigated this system is an idealization of an important class of problems that are characterized by interaction between a continuously distributed mass and stiffness sub system the beam and a lumped mass and stiffness sub system the moving mass spring inertial non linearities form the coupling between the two resulting in internal resonance behavior under certain parametric conditions the dynamics of the system are described by coupled non linear partial differential equations where the coupling terms have to be evaluated at the position of the moving mass the equations of motion are solved numerically using the galerkin method and an automatic ode solver the numerical results are compared with a closed form analytical solution obtained using a perturbation method and a parametric analysis of the system is performed using the perturbation solution the spectral behavior of the system is investigated using time frequency analysis

mastrovito multiplier for all trinomials an efficient algorithm for the multiplication in gf 2 sup m was introduced by mastrovito the space complexity of the mastrovito multiplier for the irreducible trinomial x sup m x 1 was given as m sup 2 1 xor and m sup 2 and gales in this paper we describe an architecture based on a new formulation of the multiplication matrix and show that the mastrovito multiplier for the generating trinomial x sup m x sup n 1 where m spl ne 2n also requires m sup 2 1 xor and m sup 2 and gates however m sup 2 x sup m 2 xor gates are sufficient when the generating trinomial is of the form x sup m x sup m 2 1 for an even m we also calculate the time complexity of the proposed mastrovito multiplier and give design examples for the irreducible trinomials x sup 7 x sup 4 1 and x sup 6 x sup 3 1

a new construction of massey omura parallel multiplier over gf 2 sup m the massey omura multiplier of gf 2 sup m uses a normal basis and its bit parallel version is usually implemented using m identical combinational logic blocks whose inputs are cyclically shifted from one another in the past it was shown that for a class of finite fields defined by irreducible all one polynomials the parallel massey omura multiplier had redundancy and a modified architecture of lower circuit complexity was proposed in this article it is shown that not only does this type of multiplier contain redundancy in that special class of finite fields but it also has redundancy in fields gf 2 sup m defined by any irreducible polynomial by removing the redundancy we propose a new architecture for the normal basis parallel multiplier which is applicable to any arbitrary finite field and has significantly lower circuit complexity compared to the original massey omura normal basis parallel multiplier the proposed multiplier structure is also modular and hence suitable for vlsi realization when applied to fields defined by the irreducible all one polynomials the multiplier s circuit complexity matches the best result available in the open literature

fast bit parallel gf 2 sup n multiplier for all trinomials based on a new representation of gf 2 sup n we present two multipliers for all irreducible trinomials space complexities of the multipliers match the best results the time complexity of one multiplier is t sub a 1 log sub 2 n t sub x for all irreducible trinomials where t sub a and t sub x are the delay of one 2 input and and xor gates respectively

a novel architecture for galois fields gf 2 m multipliers based on mastrovito scheme in this paper a new gf 2m multiplier for standard basis representation is developed the proposed multiplier implements the mastrovito multiplication scheme and can be designed for every field gf 2m a minimum area implementation of the first block of mastrovito multiplier and a high speed delay driven tree architecture for the second block of the mastrovito multiplier are employed in the new circuit multiplier complexity and delay are analytically evaluated for many polynomial classes timing and area occupation performances of the proposed multiplier are also calculated for many fields used in reed solomon codes applications and compared with those of previously proposed solutions the comparison shows that the proposed multiplier outperforms previous architectures for every considered gf 2m field the effectiveness of the proposed solution in a real application is verified by implementing in a 0 25 mum cmos technology the key equation solving block of a 255 239 reed solomon decoder the use of the proposed multiplier in this application results in a substantial speed improvement without any penalty in the silicon area occupation

modular construction of low complexity parallel multipliers for a class of finite fields gf 2 sup m structures for parallel multipliers of a class of fields gf 2 sup m based on irreducible all one polynomials aop and equally spaced polynomials esp are presented the structures are simple and modular which is important for hardware realization relationships between an irreducible aop and the corresponding irreducible esps have been exploited to construct esp based multipliers of large fields by a regular expansion of the basic modules of the aop based multiplier of a small field some features of the structures also enable a fast implementation of squaring and multiplication algorithms and therefore make fast exponentiation and inversion possible it is shown that if for a certain degree an irreducible aop as well as an irreducible esp exist then from the complexity point of view it is advantageous to use the esp based parallel multiplier