an interpolating memory unit for function evaluation analysis and design a technique for the evaluation of a general continuous function f x is presented and the design of an interpolating memory as an implementation of the technique is described the technique partitions the domain of f x into segments and defines an interpolating or approximating function for each the implementation is a memory subsystem that holds the parameters of the approximating functions and yields an interpolated function value on each read reference polynomial interpolating functions are considered in particular hardware requirements memory and computational logic are analyzed in terms of the required precision it is shown that as long as f x has d 1 derivatives where d is the degree of the interpolating polynomial d 1 additional bits of precision of the computed f x are obtained for each additional address bit used in the interpolating memory this establishes a tradeoff between memory and computational logic which can be exploited in the design of a unit for a specific function for any precision requirement furthermore a single unit can be designed for any class of functions that have the required derivatives two examples of implementations for particular functions are presented

a new unitary operator for a pair of coupled oscillators using the iwop integration within ordered product technique a new unitary operator is found that is useful in diagonizing the hamiltonian of a pair of coupled harmonic oscillators the coordinate representation of the unitary operator is presented and is well applied to obtain the wave function of energy eigenstate of the coupled oscillator

powering by a table look up and a multiplication with operand modification an efficient method for generating a power of an operand i e x sup p for an operand x and a given p is proposed it is applicable to ps in the form of spl plusmn 2 sup k where k is any integer and of spl plusmn 2 k sub 1 spl plusmn 2 k sub 2 where k sub 1 is any integer and k sub 2 is any nonnegative integer the reciprocal the square root the reciprocal square root the reciprocal square the reciprocal cube and so forth are included the method is a modification of the piecewise linear approximation a power of an operand is generated through a table look up and a multiplication with operand modification the same accuracy is achieved as the piecewise linear approximation the multiplication and an addition required for the piecewise linear approximation are replaced by only one double sized multiplication with a slight modification of the operand and hence one clock cycle may be reduced the required table size is reduced because only one coefficient instead of two has to be stored

signed digit addition and related operations with threshold logic assuming signed digit number representations we investigate the implementation of some addition related operations assuming linear threshold networks we measure the depth and size of the networks in terms of linear threshold gates we show first that a depth 2 network with o n size weight and fan in complexities can perform signed digit symmetric functions consequently assuming radix 2 signed digit representation we show that the two operand addition can be performed by a threshold network of depth 2 having o n size complexity and o 1 weight and fan in complexities furthermore we show that assuming radix 2n 1 signed digit representations the multioperand addition can be computed by a depth 2 network with o n sup 3 size with the weight and fan in complexities being polynomially bounded finally we show that multiplication can be performed by a linear threshold network of depth 3 with the size of o n sup 3 requiring o n sup 3 weights and o n sup 2 log n fan in

division using a logarithmic exponential transform to form a short reciprocal two trees are used sequentially to calculate an approximation to 1 a where 1 a 2 these trees calculate the logarithm and exponential and the division reciprocation process can be described by 1 a e lna for bit skip accuracy of six to 10 this logarithmic exponential method uses significantly less hardware with respect to the scheme in 3 and the delays may be greater or less than those of 3 depending on the method used and the minimum bit skip

normally ordered expansion of the inverse of the coordinate operator and the momentum operator we derive the normally ordered expansion formulae of 1 n and 1 n by virtue of the method of integral within an ordered product of operators in the sense of the principal value integral where are the coordinate and momentum operator respectively application of the new formula is briefly discussed

a geometric approach to maximum speed n dimensional continuous linear interpolation in rectangular grids an algorithm for the linear interpolation of multi input functions sampled on rectangular grids is presented a geometric approach is adopted and the mathematics is thoroughly developed we show that the algorithm is optimum in fact when the number n of inputs grows to infinity its computational requirement is o n log n which is the same as the lower bound on the cost of continuous linear interpolation procedures

a simple derivation of the class operator of the su 2 group an elementary derivation of the class operator of the su 2 group is presented considerably simplifying the recent calculations of fan and ren

weyl ordering quantum mechanical operators by virtue of the iwwp technique the properties of weyl ordered products of operators are investigated and the technique of integration within weyl ordered product iwwp is introduced the overcompleteness relation of the coherent state is then recast into weyl ordered form in so doing a new approach for weyl ordering quantum mechanical operators is presented

an observation of quadratic algebra dual family of nonlinear coherent states and their non classical properties in the generalized isotonic oscillator in this paper we construct nonlinear coherent states for the generalized isotonic oscillator and study their non classical properties in detail by transforming the deformed ladder operators suitably which generate the quadratic algebra we obtain heisenberg algebra from the algebra we define two non unitary and one unitary displacement type operators while the action of one of the non unitary type operators reproduces the original nonlinear coherent states the other one fails to produce a new set of nonlinear coherent states dual pair we show that these dual states are not normalizable for the nonlinear coherent states we evaluate the parameter a3 and examine the non classical nature of the states through quadratic and amplitude squared squeezing effect further we derive analytical formula for the p function q function and the wigner function for the nonlinear coherent states all of them confirm the non classicality of the nonlinear coherent states in addition to the above we obtain the

a general proof for overlapped multiple bit scanning multiplications because of recent advances in technology multibit scanning implementations can be considered that exceed three bit and four bit groupings the generalized proof for the multibit overlapped scanning multiplication is introduced and the multiplication process is discussed the proofs are intended to establish the correctness of the decode and the actions taken to produce the multiplication of any valid scheme proposed in the past and to dictate the correct decode and actions taken for any overlapped s bit scanning algorithm such that s is a natural number greater than or equal to two the multiplication is considered to be between two fractional numbers which are represented in two s complement form

a hybrid number system processor with geometric and complex arithmetic capabilities the architecture design and performance of a hybrid number system processor are described the processor performs multiplication division square root and square in the logarithmic number system lns domain however the input output addition and subtraction are all executed in the 32 b ieee standard floating point number system with the lns multiplier and pipelined architecture the processor is able to perform the geometric and complex arithmetic very effectively the processor is also shown to compare well to an existing 32 b floating point dsp digital signal processor chip for the same level of cmos technology the performance ratios between the hybrid number system and the floating point processor are shown to be 6 4 1 and 8 1 for division and square root respectively for the complex fft fast fourier transform algorithm the ratio is around 2 1

normally ordering some multimode exponential operators by virtue of the iwop technique the author shows that the technique of integration within an ordered product iwop provides one with a very simple approach to deriving the normal product form of some multimode exponential operators which greatly simplifies the calculations of normalising some state vectors in hilbert space

high speed vlsi multiplication algorithm with a redundant binary addition tree a high speed vlsi multiplication algorithm internally using redundant binary representation is proposed in n bit binary integer multiplication n partial products are first generated and then added up pairwise by means of a binary tree of redundant binary adders since parallel addition of two n digit redundant binary numbers can be performed in a constant time independent of n without carry propagation n bit multiplication can be performed in a time proportional to log2 n the computation time is almost the same as that by a multiplier with a wallace tree in which three partial products will be converted into two in contrast to our two to one conversion and is much shorter than that by an array multiplier for longer operands the number of computation elements of an n bit multiplier based on the algorithm is proportional to n2 it is almost the same as those of conventional ones furthermore since the multiplier has a regular cellular array structure similar to an array multiplier it is suitable for vlsi implementation thus the multiplier is excellent in both computation speed and regularity in layout it can be implemented on a vlsi chip with an area proportional to n2 log2 n the algorithm can be directly applied to both unsigned and 2 s complement binary integer multiplication

a generalization of the construction of the class operator it is shown that the construction of the class operator for su 2 is a partial case of a much more general problem that of decomposing an operator into components transforming under conjugation according to a given irreducible representation the problem is solved generally for arbitrary compact groups and some possibilities for extensions of this procedure to the case of non compact groups are indicated

on the efficiency of shortened cyclic single burst correcting codes shortened cyclic codes that are capable of correcting up to a single burst of errors are considered the efficiency of such codes has been analized by how well they approximate the reiger bound i e by the burst correcting efficiency of the code although the efficiency is still an important parameter it is shown that this one is not necessarily the most important consideration when choosing a single burst correcting code it is shown that in some natural practical applications like in a gilbert elliot channel it is more important to optimize the rate of the code with respect to its guard space a goal closely related to the gallager bound the concepts of all around non all around and partial all around single burst correcting codes are introduced and illustrated with examples some from existing constructions and some from new ones tables are presented showing that in many cases the new codes have better parameters than the existing ones for the same burst correcting capability

permutation operators in hilbert space gained via iwop technique a kind of permutation operators in hilbert space are derived in terms of the technique of integration within ordered product iwop these operators are shown to be quantum maps imaged by certain permutation transformations in classical space some operator identities about the relationship between permutation operators and transposition operators are also derived

on multiple burst correcting mds codes it is well known that binary random error correcting mds codes are trivial however the same is not true for burst correcting codes we present properties of mds codes for multiple burst correcting codes over the binary field generalizing those of random error correcting codes

new efficient structure for a modular multiplier for rns modular multiplication is a very important arithmetic operation in residue based real time computing systems in realizing these multipliers rom based structures are more efficient for small moduli due to the exponential growth of rom sizes implementations with arithmetic components are more suitable for medium and large moduli this paper presents a new modular multiplier that can deal efficiently with medium and large size moduli the design of this modular multiplier that multiplies two n bit residue digits consists basically of a n spl times n binary multiplier a n 1 k spl times k binary multiplier k n three n bit adders and a small size combinational circuit when compared with the most competitive published work the new multiplier reduces significantly both time delay and hardware requirements the design is very suitable for vlsi realization

hardware implementation trade offs of polynomial approximations and interpolations this paper examines the hardware implementation trade offs when evaluating functions via piecewise polynomial approximations and interpolations for precisions of up to 24 bits in polynomial approximations polynomials are evaluated using stored coefficients polynomial interpolations however require the coefficients to be computed on the fly by using stored function values although it is known that interpolations require less memory than approximations but at the expense of additional computations the trade offs in memory area delay and power consumption between the two approaches have not been examined in detail this work quantitatively analyzes these trade offs for optimized approximations and interpolations across different functions and target precisions hardware architectures for degree 1 and degree 2 approximations and interpolations are described the results show that the extent of memory savings realized by using interpolation is significantly lower than what is commonly believed furthermore experimental results on a field programmable gate array fpga show that for high output precision degree 1 interpolations offer considerable area and power savings over degree 1 approximations but similar savings are not realized when degree 2 interpolations and approximations are compared the availability of both interpolation based and approximation based designs offers a richer set of design trade offs than what is available using either interpolation or approximation alone

linear quantum transformation and normal product calculation of boson exponential quadratic operators in this work we present a general approach for deriving the normal product form of multi mode boson exponential quadratic operators from the viewpoint of linear quantum transformations in boson fock space the simplicity and generality of our formula are shown by some examples

weighted class operators a new approach to tensor operators for compact groups weighted class operators defined by averaging conjugation operators within fixed representation of a compact group against a weight function living on a conjugacy class are discussed and their connection to the tensor operators is studied making extensive use of the theory of induced representations we prove several results for weighted class operators and in particular identify them for weight functions being suitable matrix elements of the given group with irreducible tensor operators the results complement and extend those obtained earlier by the authors a orlowski and a strasburger j phys a 27 1971 1976 1994 and others

statistical properties of a generalized photon modulated thermal state in this paper we introduce a new kind of quantum state generalized photon modulated thermal states gpmts which are obtained by repeatedly acting the superposed operation a coherent superposition of photon subtraction and addition on the thermal state it is found that the normalization factor of gpmts is a legendre polynomial moreover we present the analytical expressions of several quasi probability distributions for gpmts and calculate the corresponding tomogram and photocount distribution as well

generalized multi mode bosonic realization of the su 1 1 algebra and its corresponding squeezing operator by constructing a generalized multi partite entangled state representation and introducing the ket bra integral in this representation we find a new set of generalized bosonic realization of the generators of the su 1 1 algebra which can compose a generalized multi mode squeezing operator this operator squeezes the multi partite entangled state in a natural way then the corresponding multi mode squeezed vacuum states r is obtained based on this the variances of the n mode quadratures and the higher order squeezing in r are evaluated in addition we examine the violation of the bell inequality for r by using the formalism of wigner representation

nonlinear conserved charge coherent state and its relation to nonlinear entangled state by suitably averaging over u 1 group action on a two mode nonlinear coherent state we derive the nonlinear conserved charge coherent state based on it a new nonlinear entangled state f g and its deductive state are introduced their completeness relation is proved a new two mode nonlinear squeezing operator in f g representation is obtained which in turn leads to a nonlinear negative binomial state

generation of a precise binary logarithm with difference grouping programmable logic array the design algorithm of a differential group programmable logic array dgpla to generate the precise binary logarithm function is suggested it can reach an optimal condition such that the number of bits in a pla is minimized while the error is still kept as small as possible thus the space in the pla is saved estimated at only 15 94 percent of the space for a readonly memory rom counterpart

general approach to functional forms for the exponential quadratic operators in coordinate momentum space in a recent paper nieto m m 1996 quantum semiclass opt 8 1061 quant ph 9605032 the one dimensional squeezed and harmonic oscillator time displacement operators were reordered in coordinate momentum space in this paper we give a general approach for reordering the multidimensional exponential quadratic operator eqo in coordinate momentum space an explicit computational formula is provided and applied to the single mode and double mode eqo through the squeezed operator and the time displacement operator of the harmonic oscillator

anticommutator analogues of certain identities involving repeated commutators the generalization of the baker hausdorff lemma and its anticommutator analogue is formulated additionally the anticommutator analogues of several well known operator identities involving repeated commutators are derived it is pointed out that these are more convenient for application whenever the operators in question satisfy simpler repeated anticommutator relations and in particular when they anticommute than the repeated commutator relations the diagonalization of two spin 1 hamiltonians in which the anticommutator analogue of the baker hausdorff lemma is used to good advantage is presented

hardware designs for exactly rounded elementary functions this paper presents hardware designs that produce exactly rounded results for the functions of reciprocal square root 2 sup x and log sub 2 x these designs use polynomial approximation in which the terms in the approximation are generated in parallel and then summed by using a multi operand adder to reduce the number of terms in the approximation the input interval is partitioned into subintervals of equal size and different coefficients are used for each subinterval the coefficients used in the approximation are initially determined based on the chebyshev series approximation they are then adjusted to obtain exactly rounded results for all inputs hardware designs are presented and delay and area comparisons are made based on the degree of the approximating polynomial and the accuracy of the final result for single precision floating point numbers a design that produces exactly rounded results for all four functions has an estimated delay of 80 ns and a total chip area of 98 mm sup 2 in a 1 0 micron cmos technology allowing the results to have a maximum error of one unit in the last place reduces the computational delay by 5 to 30 and the area requirements by 33 to 77

multipartite entangled state of continuum variables generated by an optical network we construct a kind of new multipartite entangled states of continuum variables which are related to unitary group u n using the technique of integral within an ordered product of operators we prove that such states make up a complete representation in multimode fock space the new state can be generated by an optical network whose operation on an incoming photon distributes the photon among the outputs according to the unitary group transform the potential use of the new state in quantum teleportation is briefly discussed

canonical coherent state representation of some squeeze operators using the iwop technique integration within an ordered product the authors find canonical coherent state representations of two kinds of squeeze operators these representations manifestly show that they are quantum maps imaged by certain symplectic transformations in coordinate momentum phase space in terms of this formalism the coherent state propagator of parametric amplifiers is easily obtained

normal ordering expansion of n dimensional radial coordinate operators gained by virtue of the iwop technique by virtue of the technique of integration within an ordered product of operators we derive the normal ordering expansion of the power of radial coordinate operators in the n dimensional coordinate space the use of bessel function has greatly simplified the calculation moreover the use of kummer s first formula for the confluent hypergeometric function makes the result neat and concise

optimal left to right binary signed digit recoding this paper describes new methods for producing optimal binary signed digit representations this can be useful in the fast computation of exponentiations contrary to existing algorithms the digits are scanned from left to right i e from the most significant position to the least significant position this may lead to better performances in both hardware and software

bures fidelity for diagonalizable quadratic hamiltonians in multi mode systems fidelity as a measure of the distinguishability of states is an important concept in quantum mechanics quantum optics and quantum information theory recently the explicit expressions of fidelity for single mode squeezed states have been given however in experimental studies especially in non degenerate parametric down conversion two photons are generated and one studies two or more mode systems in this paper we study the bures fidelity for thermal states of a diagonalizable quadratic hamiltonian in multi mode fock space to the best of our knowledge no one has yet attempted to give an explicit general formula of fidelity of mixed states in multi mode systems

permutation operators in hilbert space gained via the iwop technique fermion case for the case of fermions permutation operators in hilbert space are derived in terms of the fermion coherent state and the technique of integration within ordered products with the integration variables being grassmann numbers these operators are shown to be quantum maps imaged by a certain permutation transformation of the numbers some new fermi operator identities are also obtained with the use of the same technique

new applications of the coherent state in calculating the class operator of the rotation group the authors show by exploiting the properties of the coherent state and the integration within the ordered product technique that it is possible to derive an explicit expression for the class operator of the su 2 group which has not been obtained before

squeezing in the triatomic linear molecule model revealed by virtue of the iwop technique for a typical triatomic linear molecule with different atomic masses one finds a unitary operator which is closely related to squeezing transformations caused by frequency jumps the coordinate representation of the unitary operator is identified which provides an alternative approach for calculating the wavefunction of internal motion of the molecule the author also shows that the unitary operator is equivalent to a two mode squeezing rotating combination operator multiplied from the right by two single mode squeezing operators the discussion is mainly based on the technique of integration within an ordered product iwop of operators

anticommutator analogue of the baker hausdorff lemma the anticommutator analogue of the baker hausdorff lemma is formulated and proved by the differential equation method it is pointed out that this analogue when suitably transformed is more convenient for application whenever the operators in question satisfy simpler repeated anticommutator than repeated commutator relations

normally ordering the dirac s radial momentum operator and the power of radial coordinate operators by virtue of the iwop technique by virtue of the technique of integration within an ordered product of operators we derive the normal ordering expansion of the dirac s radial momentum operator to realize this goal we also derive some operator identities of the power of radial coordinate operators they are useful in calculating expectation values in the coherent state

hybrid signed digit number systems a unified framework for redundant number representations with bounded carry propagation chains a novel hybrid number representation is proposed it includes the two s complement representation and the signed digit representation as special cases the hybrid number representations proposed are capable of bounding the maximum length of carry propagation chains during addition to any desired value between 1 and the entire word length the framework reveals a continuum of number representations between the two extremes of two s complement and signed digit number systems and allows a unified performance analysis of the entire spectrum of implementations of adders multipliers and alike we present several static cmos implementations of a two operand adder which employ the proposed representations we then derive quantitative estimates of area in terms of the required number of transistors and the maximum carry propagation delay for such an adder the analysis clearly illustrates the trade offs between area and execution time associated with each of the possible representations we also discuss adder trees for parallel multipliers and show that the proposed representations lead to compact adder trees with fast execution times in practice the area available to a designer is often limited in such cases the designer can select the particular hybrid representation that yields the most suitable implementation fastest lowest power consumption etc while satisfying the area constraint similarly if the worst case delay is predetermined the designer can select a hybrid representation that minimizes area or power under the delay constraint

a hardwired generalized algorithm for generating the logarithm base k by iteration a number of previous works of computing the binary logarithm have been developed by a series of line approximations with moderate errors 1 3 in this paper a generalized iterative method for the logarithm of base k evalution is proposed we suggest that an integral constant k is used as a comparative index in each iteration no table lookup is required it can yield a more accurate and rapidly convergent value and can be easily implemented either by software or a hardwired device a numerical example is illustrated for the process of calculation the accuracy is analyzed and plotted by using two schemes in which eight iteration cycle and 16 iteration cycle length are used respectively

reviewing high radix signed digit adders higher radix values of the form beta 2 r have been employed traditionally for recoding of multipliers and for determining quotient and root digits in iterative division and square root algorithms usually only for quite moderate values of r like 2 or 3 for fast additions in particular for the accumulation of many terms generally redundant representations are employed most often binary carry save or borrow save but in a number of publications it has been suggested to recode the addends into a higher radix it is shown that there are no speed advantages in doing so if the radix is a power of 2 on the contrary there are significant savings in using standard 4 to 2 adders even saving half of the operations in multi operand addition

multiplexer based array multipliers a new algorithm for the multiplication of two n bit numbers based on the synchronous computation of the partial sums of the two operands is presented the proposed algorithm permits an efficient realization of the parallel multiplication using iterative arrays at the same time it permits high speed operation multiplier arrays for positive numbers and numbers in two s complement form based on the proposed technique are implemented also an efficient pipeline form of the proposed multiplication scheme is introduced all multipliers obtained have low circuit complexity permitting high speed operation and the interconnections of the cells are regular well suited for vlsi realization

similarity transformation for fermi operators the normally ordered hilbert space image of the complex linear similarity transformation in grassmann number phase space is derived in fermionic coherent state representation though keeping the anticommutator of fermi operators invariant the quantum mechanical images of classical transformations are generally not unitary remarkably although kets and bras produced by the non unitary similarity transformations are not hermitian conjugates they still form a complete basis the derivation of the normally ordered operator which engenders the similarity transformation is facilitated by virtue of the technique of integration within order products

on line error detectable high speed multiplier using redundant binary representation and three rail logic an on line error detectable high speed multiplier is described it is based on the multiplication algorithm which we have previously proposed in the algorithm the redundant binary representation each of whose digits is 0 1 or 1 is used the multiplier consists of an input encoder a multiplication block and an error checker the input encoder encodes each primary input bit into the 1 out of 2 code the multiplication block is designed by means of the three rail logic the three rail logic is a logic design technique in which three mutually exclusive conditions calculated in a circuit are encoded in 1 out of 3 code and the circuit is designed to be inverter free the error checker is a totally self checking two rail checker and produces a bit pair as an error indicator the multiplier can perform n bit multiplication in a time proportional to log 2 n and has a regular cellular array structure suitable for vlsi implementation furthermore we can detect any error caused by unidirectional stuck at faults on gate output lines in normal operation by observing the error indicator many errors caused by other faults can be also detected we can develop various on line error detectable high speed arithmetic circuits using the redundant binary representation and the three rail logic

interleaved memory function interpolators with application to an accurate lns arithmetic unit this paper describes a new method for polynomial interpolation in hardware with advantages demonstrated by its application to an accurate logarithmic number system lns arithmetic unit the use of an interleaved memory reduces storage requirements by allowing each stored function value to be used in interpolation across several segments this strategy can be shown to always use fewer words of memory than an optimized polynomial with stored polynomial coefficients interleaved memory function interpolators are then applied to the specific goal of an accurate logarithmic number system arithmetic unit many accuracy requirements for the lns arithmetic unit are possible although a round to nearest would be desirable it cannot be easily achieved the goal suggested is to insure that the worst case lns relative error is smaller than the worst case floating point fp relative error using the interleaved memory interpolator the detailed design of an lns arithmetic unit is performed using a second order polynomial interpolator including approximately 91k bits of rom this arithmetic unit has better accuracy and less complexity than previous lns units

on the evaluation of the class operator for the rotation group a simple derivation is given of the explicit value of the class operator for the rotation group so 3

normally ordered fermi operator realization of the sun group the mapping of the sun group transformation in grassmann number space into unitary normally ordered and antinormally ordered fermi operator realizations in hilbert space are investigated the unitary fermi operators are evaluated in fermion coherent state representation using the integration within ordered product technique for a fermionic system some new fermi operator identities are thus obtained

similarity transformations in one and two mode fock space the normally ordered hilbert space image of the general complex linear similarity transformation in phase space is obtained in a coherent state representation although preserving the commutator of a and a these quantum mechanical images of classical transformations are generally not unitary remarkably although the kets and bras produced by the non unitary similarity transformations are not hermitian conjugates squeezed state analogues produced using the similarity transformation still satisfy an overcompleteness relation the results are extended to two mode fock space and simple examples of the utility of the similarity transformation are presented the evaluation of the normally ordered operators is greatly facilitated by the use of integration within ordered products

burst decoding of cyclic codes based on circulant parity check matrices an error burst correcting algorithm is developed based on a circulant parity check matrix of a cyclic code the proposed algorithm is more efficient than error trapping if the code rate is less than about 2 3 it is shown that for any n k cyclic code there is an n n circulant parity check matrix such that the algorithm applied to this matrix corrects error bursts of lengths up to the error burst correction limit of the cyclic code this same matrix can be used to efficiently correct erasure bursts of lengths up to n k the error burst correction capabilities of a class of cyclic low density parity check ldpc codes constructed from finite geometries are also considered

generalized bogolyubov transformation bosonic case the formalism of the generalized fermionic bogolyubov transformation previously by fan and vanderlinde 1990 is extended to the bosonic case the corresponding bosonic quasi particle and quasi vacuum state are derived the bosonic generalized bogolyubov operator is decomposed as a normal product form by the technique of integration within an ordered product iwop

novel burst error correction algorithms for reed solomon codes in this paper we present three novel burst error correcting algorithms for an n k reed solomon code the algorithmic complexities are of the same order as error and erasure decoding o rn where r n k in particular their hardware implementation shares elements of blahut error and erasure decoding in contrast all existing single burst error correcting algorithms which are equivalent to the proposed first algorithm have complexity o r2n the first algorithm corrects the shortest single burst with length f up to r 1 the algorithm follows the key characterization that the ending locations of all candidate bursts can be purely determined by the roots of a polynomial which is a linear function of syndromes and moreover the shortest burst is associated with the longest sequence of consecutive roots the algorithmic miscorrection probability is bounded by q r 1 f where q denotes the field size the second algorithm extends the first one to correct the shortest burst with length f r 3 and additionally a random symbol error the algorithmic miscorrection probability is bounded by q r 3 f the third algorithm probabilistically corrects the shortest burst with length f r 1 2 and additionally a small constant random symbol errors the algorithmic miscorrection and failure probabilities are both bounded by q r 1 2 f our simulation results for 60 40 and 30 16 shortened reed solomon codes verify that the miscorrection probability for three algorithms and the failure probability for the third algorithm all decay exponentially at the rate of q 1 with respect to the length of burst