What is the DAC segment shuffling architecture of the MAX5884?
The architecture of the MAX5884 uses segmentation to create desired output currents. A discussion of this technique is needed to understand the impact of segment shuffling on a DAC.
Segmentation employs multiple current sources of equal weight which are combined to increase the total current for a specific input code. As an example, let us examine a fully segmented 8-bit DAC. The design would employ 255 current sources (2^N -1, where N is the number of input bits). All of these current sources are designed to generate the same amount of current. As the digital input code is increased, a corresponding increase of the number of current sources would be steered to the output. Consider the case of a midscale major carry transition 0b0111 1111 -> 0b1000 0000 -> 0b0111 1111 this would cause only one current source to switch, first ‘on’ and then ‘off’, while 127 current sources would not switch.
In practice, the ‘matched’ sources will have some error in the magnitude of the generated current. As a result, a given input code will always use the same current sources to create the output. The advantage of that would be that the error is constant for a given code, and the SFDR performance will be limited by the absolute linearity of the device.
However, if the segments employed are shuffled, that is, a constant number of current sources create a given output current, but the specific sources used for any given code will change, the matching error in the current sources will be averaged over time. The effect is to decorrelate linearity from the observed SFDR performance. The ‘negative’ impact is that the linearity errors, and the increase of required switching, results in an increase in the noise floor (or noise spectral density); the errors are spread across the full Nyquist bandwidth rather than collecting in specific frequency bins. The result is improved SFDR with slightly higher noise floor.