Hzou9/PCBSchemaGen-Benchmarks huggingface dataset:
PCB schematic design task (Easy, Sensing)
Task: Design a resistor divider to scale a high-voltage input to a low-voltage sense node for single-end ADC measurement, you don't need to provide other functions.
Input nodes: VIN
Output nodes: VSENSE
Input voltage: 60 V
Output voltage: 3.3 V
Components: Resistors
Sub-module name: VDIV_BUS_SENSE
PCB schematic design task (Easy, Sensing)
Task: Design an isolated voltage sensing front-end using a resistor divider with an isolated amplifier to measure a high-voltage bus and output an isolated differential low-voltage sense signal. Use only AMC1350 and passive components; you do not need to model or provide the isolated VDD1/GND1 supply rails (assume they are provided externally).
Input nodes: VIN
Output nodes: OUTP, OUTN
Input voltage: 400 V
Output voltage: 3.3 (diff) V
Components: AMC1350
Sub-module name: ISO_AMP_HV_SENSE
PCB schematic design task (Easy, Sensing)
Task: Design a differential-to-single-ended amplifier using one op-amp with a VREF offset. Assume VREF=1.65 V and differential input VINP-VINN = +/-2.0 V. Use a standard differential amplifier with matched pairs R1=R3 and R2=R4, and choose the gain so that VOUT stays within 0 to 3.0 V.
Input nodes: VINP, VINN, VREF
Output nodes: VOUT
Input voltage: 2 V
Output voltage: 3 V
Components: OPA328
Sub-module name: DIFF2SE_VREF
PCB schematic design task (Easy, Sensing)
Task: Design a Hall-effect isolated current sensing circuit that measures line current through an integrated isolated current path and outputs an isolated analog signal, the isolation barrier and amplifier are already provided within the chip.
Input nodes: LINE_IN
Output nodes: ISNS_ISO
Input voltage: 50A V
Output voltage: 3.3V V
Components: ACS37010
Sub-module name: ISENSE_HALL_ISO
PCB schematic design task (Easy, AuxPower)
Task: Design an LDO-based supply that converts a DC input into a regulated low-voltage rail.
Input nodes: VIN
Output nodes: VOUT
Input voltage: 12 V
Output voltage: 3.3 V
Components: TLV1117-33
Sub-module name: LDO_AUX_LOGIC
PCB schematic design task (Easy, AuxPower)
Task: Design a low voltage auxilary buck regulator using chip that converts a DC input into a regulated low-voltage rail. if EN is left floating it defaults to enabled,please connect EN to NC.
Input nodes: VIN
Output nodes: VOUT
Input voltage: 12 V
Output voltage: 3.3 V
Components: TPS54302
Sub-module name: BUCK_AUX_LOGIC
PCB schematic design task (Medium, AuxPower)
Task: Design an isolated DC-DC module that generates isolated positive and negative gate-drive supply rails for isolated gate drivers or sensors.
Input nodes: VIN
Output nodes: VISO+, VISO-
Input voltage: 12 V
Output voltage: 15.0,-9.0 V
Components: MGJ2D121505
Sub-module name: MJISO_DCDC_GATE_SUPPLY
PCB schematic design task (Medium, PowerStage)
Task: Implement a TO-247-3 MOSFET half-bridge power stage with a switching phase output. Note that at least 8 decoupling caps for high dv/dt loop is needed, gate driver is NOT needed for this task.
Input nodes: VBUS+, GATE_H, GATE_L
Output nodes: VSW
Input voltage: 400 V
Output voltage: 400 V
Components: IMW65R015M2H
Sub-module name: HB_TO2473_STAGE
PCB schematic design task (Medium, PowerStage)
Task: Implement a TO-247-4 SiC MOSFET half-bridge stage with Kelvin source connection. Note that at least 8 decoupling caps for high dv/dt loop is needed , gate driver is NOT needed for this task.
Input nodes: VBUS+, GATE_H, GATE_L
Output nodes: VSW
Input voltage: 400 V
Output voltage: 400 V
Components: IMZA65R015M2H
Sub-module name: HB_TO2474K_SIC_STAGE
PCB schematic design task (Medium, PowerStage)
Task: Implement a TOLL MOSFET half-bridge stage with Kelvin source connection. Note that at least 8 decoupling caps for high dv/dt loop is needed, gate driver is NOT needed for this task.
Input nodes: VBUS+, GATE_H, GATE_L
Output nodes: VSW
Input voltage: 400 V
Output voltage: 400 V
Components: IMT65R033M2H
Sub-module name: HB_TOLL_STAGE
PCB schematic design task (Medium, PowerStage)
Task: Implement a TOLT top-side-cooled MOSFET half-bridge stage with Kelvin source connection. Note that at least 8 decoupling caps for high dv/dt loop is needed, gate driver is NOT needed for this task.
Input nodes: VBUS+, GATE_H, GATE_L
Output nodes: VSW
Input voltage: 400 V
Output voltage: 400 V
Components: IMLT65R015M2H
Sub-module name: HB_TOLT_TOPCOOL_STAGE
PCB schematic design task (Medium, PowerStage)
Task: Implement a QFN-8*8 integrated half-bridge power stage. Note that at least 8 decoupling caps for high dv/dt loop is needed, gate driver is NOT needed for this task.
Input nodes: VBUS+, GATE_H, GATE_L
Output nodes: VSW
Input voltage: 48 V
Output voltage: 48 V
Components: BSC052N08NS5
Sub-module name: HB_QFN_INTEGRATED_STAGE
PCB schematic design task (Medium, Driver)
Task: Design a low-side gate driver that drives a MOSFET gate from a logic-level PWM signal, do not include power MOSFET,please include gate resistor.
Input nodes: PWM, VCC
Output nodes: GATE
Input voltage: 48.0, 9.0 V
Output voltage: 12 V
Components: UCC27511
Sub-module name: DRV_LOW_SIDE
PCB schematic design task (Medium, Driver)
Task: Design a bootstrap high-side/low-side half-bridge gate driver that generates HO/LO outputs from logic PWM inputs, noted that the bootstrap freewheeling diode is integrated in the driver, do not add bootstrap diode again, do not include power MOSFET,please include gate resistor
Input nodes: PWM_H, PWM_L, VCC
Output nodes: HO, LO, VB, VS
Input voltage: 12 V
Output voltage: 12 V
Components: UCC27211
Sub-module name: DRV_BOOTSTRAP_HB
PCB schematic design task (Medium, Driver)
Task: Design an isolated gate driver that transfers PWM across an isolation barrier to drive a MOSFET gate, the secondary side of the gate driver is driven by isolated bipolar +15/-9V power supply, do not include power MOSFET, please include gate resistor
Input nodes: PWM, VCC1, VCC2, VEE2
Output nodes: OUT
Input voltage: 3.3 V
Output voltage: 15.0,-9.0 V
Components: UCC5390E
Sub-module name: DRV_ISOLATED_GATE
PCB schematic design task (Medium, Driver)
Task: Design a protected isolated gate driver with DESAT detection, Miller clamp, fault reporting, and enable control, the secondary side of the gate driver is driven by isolated bipolar +15/-9V power supply, do not include power MOSFET. OUTH and OUTL must each use a series turn-on/off resistor.
Input nodes: PWM, VCC, EN/FLT, VDD, VEE
Output nodes: OUT, FLT, DESAT, CLAMP
Input voltage: 5 V
Output voltage: 15.0,-9.0 V
Components: UCC21710
Sub-module name: DRV_PROTECTED_DESAT
PCB schematic design task (Hard, DC-DC)
Task: Design a synchronous buck converter using a half-bridge power stage. Include appropriate gate drivers and gate resistor structures that can individually control the turn-on and turn-off speed. Include appropriate power supply for gate drivers.
Input nodes: VIN, PWM_H, PWM_L
Output nodes: VOUT
Input voltage: 200 V
Output voltage: 100 V
Components: IMZA65R015M2H
Sub-module name: CONV_BUCK_SYNC
PCB schematic design task (Hard, DC-DC)
Task: Design a synchronous boost converter using a half-bridge power stage. Include appropriate gate drivers and gate resistor structures that can individually control the turn-on and turn-off speed. Include appropriate power supply for gate drivers.
Input nodes: VIN, PWM_H, PWM_L
Output nodes: VOUT
Input voltage: 100 V
Output voltage: 200 V
Components: IMZA65R015M2H
Sub-module name: CONV_BOOST_SYNC
PCB schematic design task (Hard, DC-DC)
Task: Design a 4-switch buck-boost converter using two half-bridges. Include appropriate gate drivers and gate resistor structures that can individually control the turn-on and turn-off speed. Include appropriate power supply for gate drivers.
Input nodes: VIN, PWM_1_H, PWM_1_L, PWM_2_H, PWM_2_L
Output nodes: VOUT
Input voltage: 200 V
Output voltage: 200 V
Components: IMZA65R015M2H
Sub-module name: CONV_4SW_BUCKBOOST
PCB schematic design task (Hard, DC-DC)
Task: Design a dual active bridge converter with one full bridge on primary side, one full bridge on secondary side. On the primary side, place one DC blocking capacitor and one external series inductor between one leg midpoint and the transformer primary terminal; the other leg midpoint connects directly to the other transformer primary terminal. Leave the port for transformers. Include appropriate gate drivers and gate resistor structures that can individually control the turn-on and turn-off speed. Include appropriate power supply for gate drivers.
Input nodes: VIN, PWM_PRI_H, PWM_PRI_L, PWM_SEC_H, PWM_SEC_L
Output nodes: VSW_1, VSW_2
Input voltage: 400 V
Output voltage: 400 V
Components: IMZA65R015M2H
Sub-module name: CONV_DAB_ISOLATED
PCB schematic design task (Hard, DC-DC)
Task: Design an LLC resonant converter with a half-bridge on the primary side and an isolated transformer output. On the primary side, place one DC blocking capacitor and one resonant inductor in series between the half-bridge switch node and the transformer primary terminal; the other transformer primary terminal connects to the half-bridge DC bus midpoint. Leave the port for transformers. Include appropriate gate drivers and gate resistor structures that can individually control the turn-on and turn-off speed. Include appropriate power supply for gate drivers.
Input nodes: VIN, PWM_H, PWM_L
Output nodes: VSW_1, VSW_2
Input voltage: 400 V
Output voltage: 12 V
Components: IMZA65R015M2H
Sub-module name: CONV_LLC_RESONANT
PCB schematic design task (Hard, DC-AC)
Task: Design a 3-phase motor drive using three half-bridges. Include appropriate gate drivers and gate resistor structures that can individually control the turn-on and turn-off speed. Include appropriate power supply for gate drivers.
Input nodes: VIN, PWM_1_H, PWM_1_L, PWM_2_H, PWM_2_L, PWM_3_H, PWM_3_L
Output nodes: VSW_1, VSW_2, VSW_3
Input voltage: 400 V
Output voltage: 230 V
Components: IMZA65R015M2H
Sub-module name: DRIVE_3PH_MOTOR
PCB schematic design task (Hard, DC-AC)
Task: Design a single-phase grid-tied inverter from a DC link input. Include appropriate gate drivers and gate resistor structures that can individually control the turn-on and turn-off speed. Include appropriate power supply for gate drivers.
Input nodes: VIN, GRID_L, GRID_N, PWM_1_H, PWM_1_L, PWM_2_H, PWM_2_L
Output nodes: VSW_1, VSW_2
Input voltage: 400 V
Output voltage: 230 V
Components: IMZA65R015M2H
Sub-module name: INV_GRID_1PH
PCB schematic design task (Easy, Comm)
Task: Design a non-isolated CAN bus transceiver circuit using SN65HVD230. Include a 120 ohm termination resistor between CANH and CANL, and a 100nF decoupling capacitor on VCC. The RS pin should be connected to GND for high-speed mode. Connect TXD and RXD to the MCU side.
Input nodes: TXD, RXD
Output nodes: CANH, CANL
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: SN65HVD230
Sub-module name: CAN_TRANSCEIVER
PCB schematic design task (Easy, Filter)
Task: Design a 400V DC-link pi filter (C-L-C with damping resistor) for high-voltage bus filtering using film capacitors and a power inductor.
Input nodes: VBUS_IN, PGND
Output nodes: VBUS_FILT
Input voltage: 400 V
Output voltage: 400 V
Components: C_film, Inductor_power
Sub-module name: FILTER_HV_PI
PCB schematic design task (Easy, Filter)
Task: Design a second-order Sallen-Key antialiasing low-pass filter for ADC front-end using OPA328. Include VREF biasing for single-supply operation.
Input nodes: VIN, VDD, GND, VREF
Output nodes: VOUT
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: OPA328
Sub-module name: FILTER_AA_SALLENKEY
PCB schematic design task (Easy, Sensing)
Task: Design an NTC thermistor temperature sensing circuit with pull-up voltage divider and RC filtering for ADC input.
Input nodes: VDD, GND
Output nodes: TEMP_ADC
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: NTC, R, C
Sub-module name: SENSE_NTC_TEMP
PCB schematic design task (Easy, Sensing)
Task: Design a bidirectional shunt current sense amplifier using INA240A1. Include input filtering and VREF biasing.
Input nodes: IP+, IP-, VDD, GND, VREF
Output nodes: ISENSE
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: INA240A1
Sub-module name: ISENSE_SHUNT_INA240
PCB schematic design task (Easy, Sensing)
Task: Design a bridge signal instrumentation amplifier using INA333 for strain gauge or load cell measurement. Include gain-setting resistor and VREF biasing.
Input nodes: VINP, VINN, VREF, VDD, GND
Output nodes: VOUT
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: INA333
Sub-module name: SENSE_BRIDGE_INA333
PCB schematic design task (Easy, Sensing)
Task: Design a PT100 RTD digital temperature converter using MAX31865 with SPI output interface. Include reference resistor and filtering.
Input nodes: RTDIN+, RTDIN-, VDD, GND, SCLK, MOSI, CS
Output nodes: MISO
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: MAX31865
Sub-module name: SENSE_RTD_MAX31865
PCB schematic design task (Easy, Sensing)
Task: Design a K-type thermocouple analog amplifier using AD8495 with built-in cold junction compensation.
Input nodes: TC+, TC-, VDD, GND
Output nodes: VOUT
Input voltage: 5 V
Output voltage: 5 V
Components: AD8495
Sub-module name: SENSE_THERMOCOUPLE_AD8495
PCB schematic design task (Easy, DataConv)
Task: Design a 12-bit SPI ADC circuit using ADS7042 with input RC antialiasing filter and reference decoupling.
Input nodes: AIN, VDD, GND, SCLK, CS
Output nodes: MISO
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: ADS7042
Sub-module name: SPI_ADC_ADS7042
PCB schematic design task (Easy, DataConv)
Task: Design a 12-bit SPI DAC with output buffer using MCP4921 and OPA328. Include RC output filtering.
Input nodes: VDD, GND, SCLK, MOSI, CS, VREF
Output nodes: VOUT
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: MCP4921, OPA328
Sub-module name: SPI_DAC_MCP4921_BUF
PCB schematic design task (Easy, DataConv)
Task: Design a precision 3.3V voltage reference using REF3033 with input and output decoupling filtering.
Input nodes: VIN, GND
Output nodes: VREF
Input voltage: 5 V
Output voltage: 3.3 V
Components: REF3033
Sub-module name: VREF_PRECISION_REF3033
PCB schematic design task (Medium, MCU)
Task: Design an STM32F103C8T6 minimum system with power supply decoupling, reset circuit, SWD debug interface, BOOT configuration, and CAN peripheral connections.
Input nodes: VDD3V3, GND, NRST
Output nodes: TIM, CAN, SPI, GPIO
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: STM32F103C8T6
Sub-module name: MCU_STM32_MIN_SYSTEM_PWR
PCB schematic design task (Medium, MCU)
Task: Design an STM32F103C8T6 minimum system with power supply decoupling, reset circuit, SWD debug interface, crystal oscillator, and UART connections.
Input nodes: VDD3V3, GND
Output nodes: SPI, UART, GPIO
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: STM32F103C8T6
Sub-module name: MCU_STM32_MIN_SYSTEM
PCB schematic design task (Medium, MCU)
Task: Design a crystal oscillator network (8MHz Pierce oscillator) with load capacitors and series damping resistor for MCU clock input.
Input nodes: XIN, XOUT, GND
Output nodes: XIN, XOUT
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: Crystal, C_load
Sub-module name: MCU_CRYSTAL_NETWORK
PCB schematic design task (Medium, Comm)
Task: Design an RS485 half-duplex transceiver circuit using SP3485. Include termination resistor, bus biasing resistors, and ESD protection.
Input nodes: VDD3V3, GND, TXD, RXD, DE_RE
Output nodes: A, B
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: SP3485
Sub-module name: RS485_HALF_DUPLEX
PCB schematic design task (Medium, Comm)
Task: Design a USB to UART bridge circuit using CP2102N with USB ESD protection using TPD4E05U06. Include decoupling and crystal.
Input nodes: VBUS, D+, D-, GND
Output nodes: TXD, RXD
Input voltage: 5 V
Output voltage: 3.3 V
Components: CP2102N, TPD4E05U06
Sub-module name: USB_UART_BRIDGE
PCB schematic design task (Medium, Isolation)
Task: Design a 4-channel SPI digital isolator using ISO7741 with 3 forward channels and 1 reverse channel. Include decoupling on both sides.
Input nodes: VDD1, GND1, VDD2, GND2, MOSI_IN, SCLK_IN, CS_IN, MISO_IN
Output nodes: MOSI_ISO, SCLK_ISO, CS_ISO, MISO_ISO
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: ISO7741
Sub-module name: ISO_SPI_4CH
PCB schematic design task (Medium, Isolation)
Task: Design a bidirectional I2C digital isolator using ADUM1250. Include decoupling and pull-up resistors on both sides.
Input nodes: VDD1, GND1, VDD2, GND2, SDA1, SCL1
Output nodes: SDA2, SCL2
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: ADUM1250
Sub-module name: ISO_I2C_BIDIR
PCB schematic design task (Medium, Storage)
Task: Design a SPI NOR Flash circuit using W25Q64JV. Include decoupling, CS pull-up, and HOLD/WP pin handling.
Input nodes: VDD, GND, SCLK, MOSI, CS
Output nodes: MISO
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: W25Q64JV
Sub-module name: SPI_FLASH_W25Q64
PCB schematic design task (Medium, Storage)
Task: Design an I2C EEPROM circuit using AT24C256. Include address configuration, write protect, and I2C pull-up resistors.
Input nodes: VDD, GND, SDA, SCL, WP
Output nodes: SDA, SCL
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: AT24C256
Sub-module name: I2C_EEPROM_AT24C256
PCB schematic design task (Medium, PowerMgmt)
Task: Design an I2C power monitor circuit using INA226 with high-side shunt resistor and bus voltage filtering.
Input nodes: VDD, GND, VBUS+, VBUS-, SDA, SCL
Output nodes: ALERT
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: INA226
Sub-module name: PWR_MONITOR_INA226
PCB schematic design task (Medium, PowerMgmt)
Task: Design a power tree with Buck regulator (TPS54302) for 3.3V digital rail followed by LDO (TLV1117-33) for 3.3V low-noise analog rail from 12V input.
Input nodes: VIN12, GND
Output nodes: V3P3_DIG, V3P3_ANA
Input voltage: 12 V
Output voltage: 3.3 V
Components: TPS54302, TLV1117-33
Sub-module name: PWR_TREE_12V_3V3D_3V3A
PCB schematic design task (Medium, Comm)
Task: Design a fully isolated CAN interface using ISO7741 digital isolator, SN65HVD230 CAN transceiver, and NXE1S0303MC isolated DC-DC power supply.
Input nodes: VDD, GND, TXD, RXD
Output nodes: CANH, CANL
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: ISO7741, SN65HVD230, NXE1S0303MC
Sub-module name: CAN_ISOLATED_FULL
PCB schematic design task (Medium, BMS)
Task: Design a 5-series battery cell AFE using BQ76920 with RC cell sampling network, cell balancing resistors, I2C interface, and NTC temperature sensing.
Input nodes: CELL0, CELL1, CELL2, CELL3, CELL4, CELL5, PACK+, PACK-, SDA, SCL
Output nodes: ALERT, CHG, DSG
Input voltage: 20 V
Output voltage: 3.3 V
Components: BQ76920
Sub-module name: BMS_AFE_5S_BQ76920
PCB schematic design task (Hard, BMS-System)
Task: Design a complete 5S BMS system with BQ76920 AFE, BQ76200 high-side charge/discharge FET driver, and SN65HVD230 CAN bus communication interface.
Input nodes: CELL0, CELL1, CELL2, CELL3, CELL4, CELL5, PACK+, PACK-, CAN_TXD, CAN_RXD
Output nodes: CANH, CANL, CHG, DSG
Input voltage: 20 V
Output voltage: 3.3 V
Components: BQ76920, BQ76200, SN65HVD230
Sub-module name: BMS_5S_FULL_SYSTEM
PCB schematic design task (Hard, Motor-System)
Task: Design a complete BLDC FOC controller with STM32F103C8T6 MCU, three isolated gate drivers (UCC5390E), six SiC MOSFETs (IMZA65R015M2H) forming three half-bridges, and two current sense amplifiers (INA240A1).
Input nodes: VIN, PWM, GND
Output nodes: VSW_A, VSW_B, VSW_C
Input voltage: 400 V
Output voltage: 400 V
Components: STM32F103C8T6, UCC5390E, IMZA65R015M2H, INA240A1
Sub-module name: BLDC_FOC_CONTROLLER
PCB schematic design task (Hard, DAQ-System)
Task: Design a 4-channel isolated data acquisition system with four ADS7042 ADCs, ISO7741 SPI isolator, NXE1S0303MC isolated DC-DC power, and REF3033 precision reference.
Input nodes: AIN1, AIN2, AIN3, AIN4, VDD, GND, SCLK, MOSI, CS
Output nodes: MISO
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: ADS7042, ISO7741, NXE1S0303MC, REF3033
Sub-module name: ISOLATED_DAQ_4CH
PCB schematic design task (Hard, IoT-System)
Task: Design an IoT sensor node with STM32F103C8T6 MCU, SN65HVD230 CAN transceiver, TPS54302 Buck regulator, and TLV1117-33 LDO for power management.
Input nodes: VIN12, GND
Output nodes: CANH, CANL, TEMP_ADC
Input voltage: 12 V
Output voltage: 3.3 V
Components: STM32F103C8T6, SN65HVD230, TPS54302, TLV1117-33
Sub-module name: IOT_SENSOR_NODE
PCB schematic design task (Hard, Charger-System)
Task: Design a Li-ion battery charger system with BQ25895 charge controller, INA226 power monitor, and TPD4E05U06 USB ESD protection.
Input nodes: VBUS, D+, D-, GND
Output nodes: BAT, SYS
Input voltage: 5 V
Output voltage: 4.2 V
Components: BQ25895, INA226, TPD4E05U06
Sub-module name: LI_ION_CHARGER_FULL
PCB schematic design task (Hard, Converter-System)
Task: Design a DAB converter with MCU control using the P20 DAB base topology plus STM32F103C8T6 MCU, SN65HVD230 CAN transceiver, and INA240A1 current sense amplifier.
Input nodes: VIN, PWM, GND, CAN_TXD, CAN_RXD
Output nodes: VOUT, CANH, CANL
Input voltage: 400 V
Output voltage: 400 V
Components: STM32F103C8T6, SN65HVD230, INA240A1, IMZA65R015M2H
Sub-module name: DAB_WITH_CONTROL
PCB schematic design task (Hard, Comm)
Task: Design a SPI Ethernet controller circuit using W5500. Include RJ45 magnetic interface connections, decoupling, and ESD protection.
Input nodes: VDD, GND, SCLK, MOSI, CS, MISO
Output nodes: TXP, TXN, RXP, RXN
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: W5500
Sub-module name: ETHERNET_SPI_W5500
PCB schematic design task (Medium, Motor-System)
Task: Design a stepper motor driver system using DRV8825 with TPS54302 for motor power supply. Include current limiting configuration and MCU control interface.
Input nodes: VDD, GND, STEP, DIR, VMOT
Output nodes: A1, A2, B1, B2
Input voltage: 12 V
Output voltage: 12 V
Components: DRV8825, TPS54302
Sub-module name: STEPPER_DRIVER_FULL
PCB schematic design task (Medium, PowerMgmt)
Task: Design a voltage supervisor and watchdog reset circuit using TPS3808 with adjustable threshold and delay.
Input nodes: VDD, GND, SENSE
Output nodes: RESET
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: TPS3808
Sub-module name: VOLTAGE_SUPERVISOR
PCB schematic design task (Medium, Memory)
Task: Design an SDRAM interface circuit using W9825G6KH with 16-bit data bus, address bus, control signals, and power supply decoupling.
Input nodes: VDD, GND, CLK, CKE, CS, RAS, CAS, WE, DQM, ADDR, DATA
Output nodes: DATA
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: W9825G6KH
Sub-module name: SDRAM_INTERFACE_W9825G6
PCB schematic design task (Medium, HighSpeed)
Task: Design a PCIe x1 endpoint connector interface with differential TX/RX pairs, 100MHz reference clock, PERST# reset, and power rail connections with ESD protection.
Input nodes: REFCLK+, REFCLK-, PERST, 3V3, 12V, GND
Output nodes: PETp0, PETn0, PERp0, PERn0
Input voltage: 3.3 V
Output voltage: 3.3 V
Components: Connector
Sub-module name: PCIE_X1_ENDPOINT
PCB schematic design task (Medium, PowerMgmt)
Task: Design a P-MOSFET reverse polarity protection circuit with gate voltage divider, TVS protection, and indicator LED.
Input nodes: VIN, GND
Output nodes: VOUT
Input voltage: 12 V
Output voltage: 12 V
Components: PMOS, R, C
Sub-module name: REVERSE_POLARITY_PMOS
PCB schematic design task (Hard, DigitalPower)
Task: Design a complete MCU digital synchronous buck system with STM32F103C8T6 MCU, two UCC5390E isolated gate drivers, two IMZA65R015M2H SiC MOSFETs, INA240A1 current sense, and SN65HVD230 CAN transceiver.
Input nodes: VIN, PWM, GND, CAN_TXD, CAN_RXD
Output nodes: VOUT, CANH, CANL
Input voltage: 200 V
Output voltage: 100 V
Components: STM32F103C8T6, UCC5390E, IMZA65R015M2H, INA240A1, SN65HVD230
Sub-module name: MCU_SYNC_BUCK_SYSTEM
PCB schematic design task (Hard, DigitalMotor)
Task: Design a complete MCU 3-phase inverter system with STM32F103C8T6 MCU, six UCC5390E isolated gate drivers, six IMZA65R015M2H SiC MOSFETs, three INA240A1 current sense amplifiers, three MGJ2D121505SC isolated gate supplies, SN65HVD230 CAN transceiver, and TPS54302 auxiliary supply.
Input nodes: VIN, PWM, GND, CAN_TXD, CAN_RXD
Output nodes: VSW_A, VSW_B, VSW_C, CANH, CANL
Input voltage: 400 V
Output voltage: 400 V
Components: STM32F103C8T6, UCC5390E, IMZA65R015M2H, INA240A1, MGJ2D121505SC, SN65HVD230, TPS54302
Sub-module name: MCU_3PH_INVERTER_FULL