==References==ZISC genesis and succession==See also==* Content-addressable memory* One instruction set computer* TrueNorth==External links==*US Patent for ZISC hardware, issued to IBM/G.Paillet on April 15, 1997*Image Processing Using RBF like Neural Networks: A ZISC-036 Based Fully Parallel Implementation Solving Real World and Real Complexity Industrial Problems by K. Madani, G. de Trémiolles, and P. Tannhof*From CISC to RISC to ZISC by S. Liebman on lsmarketing.com*Neural Networks on Silicon at aboutAI.net*NeuroMem CM1K chip, successor of the ZISC, designed by G.Paillet/General Vision*CogniMem Technologies Inc. Massively Parallel Hardware Acceleration for Pattern Recognition
* Complex instruction set computer (CISC)* Reduced instruction set computer (RISC)* Minimal instruction set computer (MISC)* Ultimate RISC (URISC, OISC)* (NISC)* Transport triggered architecture (TTA)*US Patent for ZISC hardware, issued to IBM/G.Paillet on April 15, 1997*Image Processing Using RBF like Neural Networks: A ZISC-036 Based Fully Parallel Implementation Solving Real World and Real Complexity Industrial Problems by K. Madani, G. de Trémiolles, and P. Tannhof*From CISC to RISC to ZISC by S. Liebman on lsmarketing.com*Neural Networks on Silicon at aboutAI.net*CogniMem Technologies Inc. Massively Parallel Hardware Acceleration for Pattern Recognition