HDTenEightyP/NetNews huggingface dataset:
From: grant@Cadence.COM (Grant Erwin)
Subject: HPGL/2 from Construct
Organization: Cadence Design Systems, Inc.
Date: Thu, 30 Jul 1992 22:41:42 GMT

I am having difficulty using the HPGL/2 output option from layoutplot,
which is the plotting software used with Construct, Valid's former product.
HPGL/2, as you may know, is sort of a hybrid between vector plot languages
such as HPGL and raster formats.  In layoutplot, a generic file format
is produced as per the name specified in the plot.cmd file.  Then, the
file is run through a language-specific filter, and that output is then
sent to the plotter.  This works fine with HPGL.  In fact, Valid had the
good sense to produce a screen view utility with this.  Oddly enough, it
acts upon the generic file format mentioned before, not the actual HPGL file.
It would have been really useful then.
        Anyhow, the HPGL/2 output does not have this utility.  What HPGL/2
does allow is the use of versatec stipple files to be loaded into the
output file to provide a fill pattern for boundaries.  They are much more
useful than the cross-hatch patterns used in HPGL to fill a boundary.  The
patterns are loaded for each layer at the top of the file, and then they are
acted upon each time a boundary is declared. This makes this output
file very memory efficient, especially when compared to its big
brothers, the versatec files, which can be hundreds of megs in size.
Otherwise, the process to produce an HPGL file and an HPGL/2 file using
layoutplot and the associated filter programs are very similar.
        All of this would be well and good except that the HPGL/2 output has
some bugs which prevent the first stipple pattern to be used on all but a
few of the boundaries declared, and none of the subsequent fill patterns.
Additionally, some streaks show up in larger files, and some boundaries get
filled by a dark grey, others not at all.  All in all, not very usable.  By the
way, I sent such files down to HP in San Diego, who design the HPGL/2 plotters
(among them the Design Jet plotter, p/n C1633B, which acommodates both HPGL
and HPGL/2), and they duplicated the errors on any and all HP plotters which
support HPGL/2.
        So my question is, have any Valid Construct users tried to use the
HPGL/ 2 option in layoutplot (version 4.0), and have they had successes,
failures, or work-arounds? If so, PLEASE PLEASE contact me at (503) 626-8245
ext. 262 or email me at uunet!gasco!rabbit!cascade!jeff.
Thanks in advance.  Jeff W.
Newsgroups: comp.lsi.cad
From: padma@cirrus.com (Padma Akkiraju)
Subject: Esim
Originator: padma@ss119
Organization: Cirrus Logic Inc.  Fremont, California
Date: Mon, 27 Jul 1992 23:19:54 GMT

I came to know that Esim ,switch level simulator for 
MOS circuits can handle transmission gates. I need
info on from where I can get Esim?

thanks

Please reply directly to padma@cirrus.com


-- 
padma
From: sc@ecs.soton.ac.uk (Cheng Shi)
Newsgroups: comp.lsi.cad
Subject: PLA (Multi-Level???)
Keywords: PLA
Date: 28 Jul 92 08:56:14 GMT

Has anyone heard of a Multi-Level PLA?  In my memory, PLA is a
two-level logic.  However, is it possible to implement multi-level
logic on a PLA?

Thanks.

 
-- 
----------------------------------------------------------------------------
Cheng Shi						sc@uk.ac.soton.ecs
Department of Electronics & Computer Science, University of Southampton,
England,  SO9 5NH					Tel: +44 703 593127
Newsgroups: comp.lsi.cad
From: padma@cirrus.com (Padma Akkiraju)
Subject: Switch Level Simulator Irsim: cannot handle feedback loops:help
Originator: padma@ss119
Organization: Cirrus Logic Inc.  Fremont, California
Date: Mon, 27 Jul 1992 22:38:11 GMT


I wanted to do some swich level simulation, and started using irsim.
I have problems with feedback loops. 
For example a latch. The moment clock is turned off,
the previous value should be held in the latch. But it does not.

Has anybody experienced similar problem?. 

If irsim cannot handle it, can any body suggest any other
switch level simulator which is free of such type of problems?.

Please send me e-mail directly to padma@cirrus.com

thanks 

padma



-- 
padma
Organization: The Pennylvania State University
Date: Wed, 22 Jul 1992 08:31:38 EDT
From: Ernie Oporto <EAO102@psuvm.psu.edu>
Newsgroups: comp.lsi.cad
Subject: preparation for graduation?

I've heard the types of software people are using on the job.  Is it
considered great for a someone just graduating to have had some
experience with cad tools?  I'm currently taking a course where I'm
learning to use Octtools as an independent studies course, but I have
never taken an internship.  Do you think possible employers will look
on my having taken this as something in my favor?  Also, will any
companies train me in stuff like Cadence (or whatever they use) or
will they expect me to have used that already.

  _____)           ______        _)       _)  EAO102@PSUVM.PSU.EDU
                               __       __    OPORTO@CORVETTE.ECE.PSU.EDU
______    ______            ___      ___      Ernie "SHOKK" Oporto
                               __       __    Lab Computer Attendant
(_______ _      _ ________ _     _) _     _)  for PSU's CAC Department
Newsgroups: comp.lsi.cad
From: kjchang@hplabsz.hpl.hp.com (K. J. Chang)
Subject: Re: Printing Magic layout
Date: Wed, 22 Jul 1992 20:49:32 GMT
Organization: Hewlett-Packard Laboratories Palo Alto,CA

In article <35981@sdcc12.ucsd.edu> carlos@ucsd.edu writes:
>
>In article <1992Jul17.213053.27448@zip.eecs.umich.edu>, cyc@z.eecs.umich.edu (Yi-Chieh Chang) writes:
>|> I just installed Magic6.3 on my machine (HP720) and it runs all
>|> right. However, I can't print the layout on my laser printer. What
>|> is the command to print the magic layout on regular laser printer ?
>|> Thanks for your help.
>|> 
>|> Yi-Chieh 
>
>You need a program called flea. Anyone out there know an ftp site that
>has the latest version of flea?

"xwd" and "xpr" in HP720 can dump any X11 images into laser printers.
Do you have "xwd" and "xpr" in your HP720?

>
>
>-- 
>         ______    ____      ______      __        _______    _______
>        / ____/\  / __ |    / __  /\    / /\      / ___  /\  / _____/\
>       / / ___\/ / /_| |   / /_/ / /   / / /     / /  / / / /_/_____\/
>      / /_/__   / / _| |  / / _\ \/   / /_/__   / /__/ / / _\___/ /\
>     /______/\ /_/ / |_| /_/ /  \_\  /______/\ /______/ / /______/ /
>     \______\/ \_\/  |_| \_\/    \_\ \______\/ \______\/  \______\/
>
>Carlos Vedovato,INET carlos@ucsd.edu | The more complex the mind, the greater
>      BITNET [backbone]!ucsd!carlos  | the need for the simplicity of play.
>UCSD grad, ECE Dept. (619)534-5669   | -- Kirk, "Shore Leave" stardate 3025.8


-- 
K J Chang, Hewlett-Packard ICBD R & D,                      (())_-_(())
Palo Alto, CA 94304                                          | (* *) | 
Internet: kjchang@hpl.hp.com           a UCLA Bruin  -->    {  \_@_/  }
voice mail: (415)857-4604                                     `-----'  
Newsgroups: comp.lsi.cad
From: hutching%elan.utah.edu@cs.utah.edu (Brad Hutchings)
Subject: Carver Mead's VLSI tools
Date: 21 Jul 92 11:42:57 MDT
Organization: University of Utah CS Dept

Hi,

Can some kind soul tell me where I can download Carver Mead's Analog
VLSI design tools?

Thanks,

Brad

hutching@cs.utah.edu
From: engp1261@nuscc.nus.sg (Lee Teng Kiat)
Newsgroups: comp.lsi.cad
Subject: Spice2 vs. Spice3
Date: 23 Jul 92 07:28:47 GMT
Reply-To: engp1261@nuscc.nus.sg
Organization: Dept. of EE, National Univ. of Singapore

Hello, I am recently trying out spice3 and I ran into problem with a
spice2 input deck. The deck consists of just a bunch of subcircuits
and a few voltage/current sources; and I was only trying to do a DC
analysis. The complaint from spice3 is that a voltage source (vb)
was not in the circuit and hence doAnalyses couldn't proceed. Is there
something I am missing about the differences between spice2 and spice3
decks? According to the man pages, the input deck for spice2 is 
compatible with spice3. I am totally lost here. Any pointer would be
much appreciated.

Kiat
engp1261@nuscc.nus.sg

p.s. I can't do a debug on spice3 cos we don't have enough disk space
     to build with -g.
Newsgroups: comp.lsi.cad
From: odkahn@eos.ncsu.edu (Opher D. Kahn)
Subject: Finding the misII logic optimizer ?
Organization: North Carolina State University
Date: Thu, 23 Jul 1992 16:33:20 GMT

Can anyone tell me where I can get the misII logic optimizer
and standard scripts (I think they originated in Berkeley)?

-- 
 Opher D. Kahn 
Newsgroups: comp.lsi.cad
From: zhou@ifi.unizh.ch (Hongbo Zhou)
Subject: Prof. Tom Leighton, Thang Bui
Keywords: Graph Bisection Algorithms
Organization: University of Zurich, Department of Computer Science
Date: Tue, 28 Jul 92 17:17:13 GMT

Hi, there,

I would like to contact the following people for some technical problems.

Prof. Tom Leighton
Math Dept. & Lab for Comput. Sci., MIT


Prof. Thang Bui
Comput. Sci. Dept., Penn State Uni.


It would be greatly appreciated if some kind souls who know them could
give me their e-address.


Thanks a lot in advance!

_________________________
Honbo Zhou
Uni. of Zurich, Swissland

Xref: sparky comp.lsi.cad:817 comp.lsi.testing:167 comp.lang.vhdl:376 comp.cad.cadence:187
Newsgroups: comp.lsi.cad
Subject: Re: Simulation Benchmarks
From: michele@deis21.cineca.it (Michele Favalli)
Date: 25 Jul 92 09:56:25 +0100
Distribution: world
Organization: *********************************************************

There are the ISCAS85 (combinational) and ISCAS89 (sequential) benchmarks. 
They are described at gate level and each gate is characterized only by its 
logic function (i.e. there is no delay parameter). The circuits are 
available via anonymous ftp at mcnc.org. 

I don't know if there are functional benchmarks in the literature. 

Best regards 

Michele Favalli 

============================================================================== 

Michele Favalli 
DEIS - University of Bologna                 tel. 39-51-644-3082 
Viale Risorgimento 2                         fax. 39-51-644-3073
40136 Bologna - ITALY                        e-mail: michele@deis16.cineca.it 

==============================================================================
 
Newsgroups: comp.lsi.cad
From: reuver@mikro.ee.tu-berlin.de (Dirk Reuver)
Subject: Re: Carver Mead's VLSI tools
Organization: ZRZ/TU-Berlin
Distribution: tub
Date: Thu, 23 Jul 1992 16:29:18 GMT

In <1992Jul21.114257.17515@hellgate.utah.edu> hutching%elan.utah.edu@cs.utah.edu (Brad Hutchings) writes:

>Can some kind soul tell me where I can download Carver Mead's Analog
>VLSI design tools?

Try hobiecat.pcmp.caltech.edu
I got it from there.

Dirk


__________________________________________________________________________
Dirk Reuver    DD6RE                  Phone:  +49 30 314 26705
Institute for Microelectronics        FAX:    +49 30 314 24597
Technical University Berlin           Email:  reuver@mikro.ee.tu-berlin.de
                    "You say tomato, I say tomato"
Newsgroups: comp.lsi.cad
From: dermer@ssd.intel.com (Greg Dermer)
Subject: spice info at cad.berkeley.edu ?
Organization: Supercomputer Systems Divison, Intel Corp.
Date: Tue, 21 Jul 1992 17:02:48 GMT

It used to be (as recently as June) that there was miscellaneous
information about spice3 (bug fixes, documentation etc NOT spice3
itself!) available via anonymous ftp from cad.berkeley.edu .
Anonymous access has apparently been terminated.  Does anyone know
1) whether this service will be reinstated, or, 2) whether similar
information is available elsewhere?

Greg Dermer                            dermer@ssd.intel.com
Supercomputer Systems Division         (503) 629-4363
Intel Corp. 
5200 NE Elam Young Parkway
Hillsboro OR 97124-6497
From: cvedovat@sdcc3.ucsd.edu (Carlos Vedovato)
Newsgroups: comp.lsi.cad
Subject: Re: Printing Magic layout
Date: 22 Jul 92 19:41:04 GMT
Reply-To: carlos@ucsd.edu


In article <1992Jul17.213053.27448@zip.eecs.umich.edu>, cyc@z.eecs.umich.edu (Yi-Chieh Chang) writes:
|> I just installed Magic6.3 on my machine (HP720) and it runs all
|> right. However, I can't print the layout on my laser printer. What
|> is the command to print the magic layout on regular laser printer ?
|> Thanks for your help.
|> 
|> Yi-Chieh 

You need a program called flea. Anyone out there know an ftp site that
has the latest version of flea?


-- 
         ______    ____      ______      __        _______    _______
        / ____/\  / __ |    / __  /\    / /\      / ___  /\  / _____/\
       / / ___\/ / /_| |   / /_/ / /   / / /     / /  / / / /_/_____\/
      / /_/__   / / _| |  / / _\ \/   / /_/__   / /__/ / / _\___/ /\
     /______/\ /_/ / |_| /_/ /  \_\  /______/\ /______/ / /______/ /
     \______\/ \_\/  |_| \_\/    \_\ \______\/ \______\/  \______\/

Carlos Vedovato,INET carlos@ucsd.edu | The more complex the mind, the greater
      BITNET [backbone]!ucsd!carlos  | the need for the simplicity of play.
UCSD grad, ECE Dept. (619)534-5669   | -- Kirk, "Shore Leave" stardate 3025.8
Newsgroups: comp.lsi.cad
Subject: Re: spice info at cad.berkeley.edu ?
From: marcello@deis16.cineca.it (Marcello Dalpasso)
Date: 22 Jul 92 09:20:23 +0100
Distribution: world
Organization: *********************************************************

These infos can be currently found via anon ftp at ic.berkeley.edu
in /pub/spice3

-- 
	Marcello Dalpasso (e-mail: marcello@deis16.cineca.it)
	D.E.I.S. - Department of Electronics and Computer Science	
	Viale Risorgimento 2, I-40136 Bologna, Italy			
	Phone: +39-51-644-3015 (fax: +39-51-644-3073)
From: kerm@garfield.ncat.edu (Cary Burnette)
Newsgroups: comp.lsi.cad
Subject: FLEA on a DECstation
Date: 22 Jul 92 23:41:19 GMT
Reply-To: kerm@garfield.ncat.edu (Cary Burnette)
Organization: North Carolina A&T State University


Hello:

 Has anyone compiled Flea, the circuit plotting package, on
a DECstation running ULTRIX 4.2A?  I am having problems and
need some assistance.

 Thanks for any help

 Cary

----
 Dept. of Electrical Engineering            | kerm@garfield.ncat.edu
 McNair Hall                                | 
 North Carolina A&T State University        | Phone: (919)334-7648 
 Greensboro, NC   27411                     | FAX:   (919)334-7662
From: kmartin@prism.gatech.EDU (Kevin Martin)
Newsgroups: comp.lsi.cad
Subject: Looking for software to convert from DXF to CIF format files.
Date: 21 Jul 92 22:37:35 GMT
Distribution: mod,na,usa
Organization: Georgia Institute of Technology

Does anyone know about software (public donmain, shareware, or commercially
availible) that can convert DXf format files (created via Autocad or the like) into
CIF format?  

Any information, clues, or suggestions would be appreciated

Thanks

-- 
Kevin Martin
Georgia Institute of Technology, Atlanta Georgia, 30332
uucp:	  ...!{decvax,hplabs,ncar,purdue,rutgers}!gatech!prism!kmartin
Internet: kmartin@prism.gatech.edu
Newsgroups: comp.lsi,comp.lsi.cad
From: burman@sol.cs.wmich.edu (SURENDRA BURMAN)
Subject: Programmable Multichip Modules
Keywords: Programmable, MCMs
Organization: Western Michigan Univ. Comp. Sci. Dept.
Date: Wed, 22 Jul 1992 21:29:49 GMT

I am looking for references on programmable multichip modules
including researchers, manufacturers, designers etc. Any pointers
in this direction will be  highly appreciated.

I'll post the summary if needed.


thanks,

S. Burman
burman@cs.wmich.edu
616-387-5645
Newsgroups: comp.lsi,comp.lsi.cad
From: burman@sol.cs.wmich.edu (SURENDRA BURMAN)
Subject: Info wanted on Mosaic Systems, Inc.
Keywords: SRAMS
Organization: Western Michigan Univ. Comp. Sci. Dept.
Distribution: usa
Date: Thu, 23 Jul 1992 17:15:14 GMT

Does anyone know if Mosaic Systems, Inc., Michigan still exists
in the market. I am trying to contact them regarding some
information on SRAMS. Any pointers in this direction will
be highly appreciated.

Thanks in advance.

-- Burman
burman@cs.wmich.edu	
Newsgroups: comp.lsi
From: harry@neuron6.jpl.nasa.gov (Harry Langenbacher)
Subject: Re: question on Mosis Analog Run
Organization: JPL Pasadena CA
Distribution: usa
Date: Tue, 28 Jul 1992 18:21:34 GMT

In article <28330001@hpuplca.nsr.hp.com> jeff@hpuplca.nsr.hp.com (     Jeff Gruszynski) writes:
>> In comp.lsi, pakst5@gl.pitt.edu (Paul A Kwan) writes:
>> 
>> 
>>       I have been working on a Analog BiCMOS chip, can I send it
>>     to Mosis for an ORBIT ANALOG run ?  Or is ORBIT ANALOG just for CMOS only ?
>>     My answer to the first question is Yes, but I am not 100% sure.
>> 
>>     Any help is appreciated.
>>     Thanks.
>> 
>>     paul
>
>You should contact Vance Tyree at USC-ISI, the MOSIS clearinghouse,
>about this.  They're on Internet, though I don't remember which system
>address to use.  You can also contact them by phone:  they're 310 area
>code in Marina del Rey.
>
>
>Jeff

The mosis orbit analog run is 2 micron 2-poly cmos nwell with capability
for an npn bipolar xistor in the well.

To get info from mosis,
send e-mail to mosis@mosis.edu and let the first line of your message be:

REQUEST: ATTENTION

Then enter the text of your message, and then

REQUEST: END

All text between "REQUEST: ATTENTION"
and the next REQUEST: is sent to an electronic mailbox that is monitored  by  a
MOSIS  staff  member  and  redistributed  to  an appropriate staff member for a
response.
-- 
Harry Langenbacher 818-354-9513 harry%neuron6@jpl-mil.jpl.nasa.gov
Concurrent Processing Devices Group, FAX 818-393-4540
JPL,  M/S 302-231, 4800 Oak Grove Dr, Pasadena CA 91109        USA
Xref: sparky comp.lsi:503 comp.arch:8488
From: jcooley@seqp4.sequoia.com (John Cooley)
Newsgroups: comp.lsi,comp.arch
Subject: Evil Synopsys
Date: 31 Jul 92 13:38:17 GMT
Organization: Sequoia Systems Inc., Marlboro, Mass.


> From: wyle@synopsys.com (Mitch Wyle)
>
> I am about to post the following press information to biz.comp.software:
> 
> Subject: (Jan 24)   SYNOPSYS PORTS SYNTHESIS AND SIMULATION TOOLS
> Subject: (March 16) SYNOPSYS ADDS VHDL DEBUGGING TO VHDL SYSTEM SIMULATOR
> Subject: (April 13) SYNOPSYS INTEGRATES HIGH-LEVEL DESIGN TOOLS
> Subject: (May 4)    SYNOPSYS INTRODUCES TEST COMPILER PLUS
> Subject: (May 11)   TEXAS INSTRUMENTS ENDORSES SYNOPSYS VHDL SYSTEM SIMULATOR
> Subject: (June 1)   SYNOPSYS SIGNS AGREEMENT WITH NEC ELECTRONICS INC.
> Subject: (June 8)   SYNOPSYS INTRODUCES BREAKTHROUGH IN SYNTHESIS TECHNOLOGY
> Subject: (June 22)  SYNOPSYS TO ACQUIRE MAJORITY INTEREST
> Subject: (July 8)   Y. HIRANO NAMED PRESIDENT OF NEWLY ESTABLISHED NIHON
> 
> Please send flames, comments, and opinions to me: wyle@synopsys.com


I am SHOCKED and OFFENDED at this flagrant and irresponsible posting
on comp.cad.cadence by their evil arch-rival software competitor: SYNOPSYS!

And, worst yet, it's something from their marketting department!

Does Synopsys have no respect for Cadence's software tools?

The next thing you know, you'll have that joker posting notices again on
comp.cad.cadence for Synopsys users to join the E-mail Synopsys User Group!

Something's gotta be done!  <chuckle chuckle>

===========================================================================
Trapped trying to figure out a Synopsys bug?  Want to hear how others dealt
with it ?  Join the E-Mail Synopsys Users Group!  To join, E-mail me today! 
===========================================================================
     !!!     "It's not a BUG,    |           jcooley@sequoia.com
    /o o\  /  it's a FEATURE!"   |         jcooley@sds.sequoia.com
   (  >  )                       |        "Yes, We make trees here!"
    \ - /       |
    _] [_       |        "This here ain't no one's opinion 'cept my own."
Newsgroups: comp.lsi
From: sriram@sol.UUCP (Mysore Sriram)
Newsgroups: comp.lsi
Subject: Wanted: Info Sources for Electronic Packaging/MCMs
Date: 17 Jul 92 16:17:27 GMT
Organization: Vista Technologies, Inc. Schaumburg, IL 60173 USA


Subject: Wanted: Info sources for Electronic Packaging/MCMs

I'm interested in establishing contact with people in academia and industry
working in the packaging area, particularly in Multichip modules. I'm
working towards my Ph.D., and my thesis is on MCM routing algorithms. I'm
also working as a summer intern on a project involving package design, and
the analysis of the various interacting parameters - electrical, thermal,
mechanical, manufacturing, etc. - and tradeoffs involved in designing an
electronic package.

If any of you is working on similar problems, or knows of any good sources
of up-to-date data on packaging techniques, materials, processes and CAD
tools, I would appreciate hearing from you. I'll collate and summarize the
responses I receive and post them on this net, for the benefit of other
subscribers.

M. Sriram

msriram@logos.vlsi.uiuc.edu, sriram@vistatech.com

(708) 706-9300 (Work phone)
Newsgroups: comp.lsi
From: zincke@seas.gwu.edu (Chris Zincke)
Subject: Magic ftp site
Organization: George Washington University
Distribution: USA
Date: Mon, 27 Jul 1992 20:41:54 GMT


Hello,

I am looking for cell libraries accessible via ftp, for magic.  I am
mainly looking for small digital stuff (i.e. filp-flops, shift reg.,
clocks) but I am also looking for opamps.  I want libraries for 2
micron (or larger) technology.  Are there any public ftp sites where
one could obtain these libraries?

Any information would be greatly appreciated.

Chris Zincke


Newsgroups: comp.lsi
From: sridevan@elec.uq.oz.au (Sri Parameswaran)
Subject: Octtools - where to find it
Organization: Prentice Centre, University of Queensland
Date: Mon, 27 Jul 1992 05:08:52 GMT

Dear Netters!

Could someone tell me where I could get Octtools fairly quickly?



Thanks
Sri
-------------------------------------------------------------------------
Sri Parameswaran
Dept. of Electrical Engineering, University of Queensland,
St. Lucia, Australia.

Phone: +61-7-365-4190		Fax:   +61-7-365-4999
ACSnet: sridevan@s1.elec.uq.oz	INTERNET: sridevan@s1.elec.uq.oz.au
				UUCP:     uunet!elec.uq.oz.au!sridevan


--

Thanks
Sri
-------------------------------------------------------------------------
From: jeff@hpuplca.nsr.hp.com (     Jeff Gruszynski)
Newsgroups: comp.lsi
Subject: Re: question on Mosis Analog Run
Date: 27 Jul 92 23:21:31 GMT
Organization: Hewlett-Packard Neely Golden Gate Area (Northern Calif.)

> In comp.lsi, pakst5@gl.pitt.edu (Paul A Kwan) writes:
> 
> 
>       I have been working on a Analog BiCMOS chip, can I send it
>     to Mosis for an ORBIT ANALOG run ?  Or is ORBIT ANALOG just for CMOS only ?
>     My answer to the first question is Yes, but I am not 100% sure.
> 
>     Any help is appreciated.
>     Thanks.
> 
>     paul

You should contact Vance Tyree at USC-ISI, the MOSIS clearinghouse,
about this.  They're on Internet, though I don't remember which system
address to use.  You can also contact them by phone:  they're 310 area
code in Marina del Rey.


Jeff
Newsgroups: comp.lsi,comp.lsi.cad
From: burman@sol.cs.wmich.edu (SURENDRA BURMAN)
Subject: Proceedings of First International Conf. on MCM
Keywords: MCM
Organization: Western Michigan Univ. Comp. Sci. Dept.
Date: Sat, 25 Jul 1992 01:56:50 GMT

 I am looking for the Proceedings of the First International
 Conference on Multichip Modules held in Denver, Colorado, last April.
 Does anybody know where I can buy a copy of this proceedings?

 Any suggestions will be appreciated.

 Thanks in advance.

 -- Burman
 burman@cs.wmich.edu
Newsgroups: comp.lsi
From: schuppan@infotech.tu-chemnitz.de (Holger Schuppan)
Subject: Wanted: Documentation on Algotronix CAL
Organization: University of Technology Chemnitz, FRG
Date: Thu, 30 Jul 1992 09:46:18 GMT

Dear netters,
I'm looking for documentations on Algotronix CAL chips, 
including some information about development tools, prices
and addresses of distributors.
Any pointers are very welcome.
Thanks in advance,
 Holger 
	  email : schuppan@infotech.tu-chemnitz.de

	  address:  Holger Schuppan
		    neuroTECH GmbH
		    Ruhrorter Str. 9
		    D-W-4200 Oberhausen 1