From: hutchens@cod.nosc.mil (Chris G. Hutchens)
Newsgroups: misc.jobs.resumes
Subject: MSEE seeks circuit designer opportunity.
Date: 1 Sep 92 21:25:32 GMT
Distribution: usa
Organization: Naval Ocean Systems Center, San Diego


August 29, 1992
                                          Sanjay B. Patil
                                          3845 La Cresta Drive
                                          San Diego, CA 92107



Dear Sir/Madam:


       The opportunity to join an on-the-go company in the
rapidly growing semiconductor industry intrigues me.  In
the hope that an association with your firm will be
mutually beneficial, I enclose my resume.

       Since June 1992, I am working as a circuit designer
for Naval Command, Control and Ocean Surveillance Center
(NRaD), San Diego.  Work at NRaD involves design of bulk
CMOS analog/digital integrated circuits.  It involves
SPICE level simulations, layout (Magic, Mentor Graphics),
and IC testing on probe station (HP 4145).  Prior to
this, for two years, I have been a research assistant to
various departments at Oklahoma State University.  In
those positions, I have worked on design of CMOS
digital/analog integrated circuits.  My thesis involves
IC design, simulation, fabrication, and testing.  My
college background has included a variety of
communication, signal processing, and digital/analog
CMOS/BiCMOS IC design courses.

       I have a reputation as a organized, self reliant
person who functions well without supervision.  I would
expect you to utilize me to the limit of my abilities.

       I have enclosed my resume for your perusal.  I look
forward to discussing my potential contributions to your
company.  I can be reached either at (619) 222-2371 or at
(619) 553-2680.


                                          Sincerely,



                                          Sanjay B. Patil





                                SANJAY B. PATIL

                             3845 La Cresta Drive
                              San Diego, CA 92107
                               H: (619) 222-2371
                               W: (619) 553-2680
                         E-mail: hutchens@cod.nosc.mil


OBJECTIVE:

       Seeking circuit designer position.

EDUCATION:

       MASTER OF SCIENCE (May. 1992)
       Electrical & Computer Engineering,
       Oklahoma State University, Stillwater.
       GPA: 3.5 on a 4.0 Scale

       BACHELOR OF ELECTRICAL ENGINEERING (1987)
       College of Engineering, University of Poona, India.
       First Class With Distinction

       DIPLOMA IN ELECTRICAL ENGINEERING (1984)
       Government Polytechnic, Board of Technical
       Examination, Bombay, India.
       State Rank Holder (81%)

JOB RELATED EXPERIENCE:

       Circuit Designer. (1992-Present), Naval Command,
       Control and Ocean Surveillance Center (NRaD), San
       Diego.  Design of integrated circuit for potential
       signal processing algorithm.  Work involves gate
       level circuit design of integrated circuits,  SPICE
       level simulations, layouts (MAGIC, Mentor),  and
       integrated circuit testing on probe station.

       Research Assistant (1991, June 1992), Dept. of
       Electrical & Computer Engg., OSU. Assisted in VLSI
       Implementation of analog olfactory cortex model, a
       research project for Naval Ocean System Center, San
       Diego.  Custom analog/digital circuit design,
       layout, and testing.

       Teaching Assistant (FALL-1991), Dept. of Electrical
       & Computer Engineering, OSU. Graded graduate level
       CMOS analog IC design class.

       Research Assistant (1990-1991), College of Business
       Administration, OSU. Developed neural network
       bibliographies; worked on word processing.

PROJECTS:
       - Designed, laid-out and fabricated FIR filter with
       an application in echo cancellation IC chip in HDTV
       technology using VLSI CAD tool LAGER.

       - Designed and laid-out a single chip microcomputer
       VLSI implementation that provides continuous real-
       time background monitoring of linear
       electromechanical system.

       - Performed in depth SPICE simulation and analysis
       on variety of analog circuits  to verify and
       conceive current mode analog processing approach.

       - Researched and presented a report on long term,
       non-volatile, on board analog EEPROM with an
       application as a weight storage element in
       artificial neural networks.

       - Reviewed and simulated Four Quadrant Analog
       Multipliers with an application as a weighing
       function in artificial neural networks.

COURSE WORK:

       Digital VLSI Systems          Digital System Testing
       Advanced VLSI Design          Adv. CMOS System IC Design
       Local Area Networks           Digital Signal Processing

       CMOS Analog IC Design:  MOS transistor fabrication,
       film deposition, lithography, etching, ion
       Implantation, epitaxy etc. MOS parameters,
       equations for 1, 2 and 3 level models and SPICE
       modeling, short channel and narrow channel effects,
       mobility degradation, temperature effects, small
       signal and large signal models, and device
       characterization.

THESIS:

       VLSI Implementation of  Olfactory Cortex Model.
       Proposes a  hardware implementation of Granger-
       Lynch's olfactory model in bulk CMOS analog
       integrated circuits.

PUBLICATIONS:

       - "A Hierarchical Clustering Network Based On a
       Model of Olfactory Processing", Analog Integrated
       Circuits and Signal Processing,  Submitted.

       - "Squashing Function Based on Inherent Nonlinear
       Property of a MOS Device," 5th Oklahoma Symposium
       on Artificial Intelligence, Nov. 1991.

       - "Simulation of an Olfactory Neural Paradigm
       Suitable for Electronic Clustering," 5th Oklahoma
       Symposium on Artificial Intelligence, Nov. 1991.

       - "Neural Processing in Silicon," Oklahoma State
       University Research Symposium, March 1991.

COMPUTER SKILLS

       Languages - C, BASIC, FORTRAN, COBOL, LISP, 8086/8
                     Assembly
       Systems Used - VAX 11/780, IBM 3090, Sun
                     Workstations, IBM RT
       Operating Systems - UNIX, MS-DOS, VMS
       Software/VLSI CAD Tools - MAGIC, Mentor Graphics,
       VHDL, LAGER, SPICE, THOR, IRSIM, PCPLUS, PCSCHEME,
                     MATRIXx.

PREVIOUS EXPERIENCE:

       Design Executive, Switchgears (1988-89), SIEMENS
       LTD., Bombay, India.  Designed switchgear products
       from their conceptual stage to full product launch,
       built and tested prototypes.

       Production Engineer, Switch Boards (1987-88),
       SIEMENS LTD., Bombay, India. Coordinated
       manufacturing and production activity on an
       assembly line to meet schedules within quality and
       cost objectives.

REFERENCES:

       Available upon request.
Newsgroups: misc.jobs.resumes