HDTenEightyP/NetNews huggingface dataset:
From: cmhui@cucs18.cs.cuhk.hk (Hui Chau Man)
Newsgroups: comp.sys.intel
Subject: Is there any i860 C++ Compiler
Date: 20 Jul 92 06:45:22 GMT
Organization: Faculty of Engineering, The Chinese U. of Hong Kong

Dear Netters,

Do anyone know whether there are any i860 C++ Compiler on the market.

Best Regards

C.M. Hui
Dept. of Computer Science
The Chinese University of Hongkong
Shatin, N.T.
Hongkong

Internet: cmhui@cucs18.cs.cuhk.hk
FAX: (852) 6035024
From: friedman@col.hp.com (John Friedman)
Newsgroups: comp.sys.intel
Subject: Re: i960 differences
Date: 21 Jul 92 15:54:01 GMT
Organization: HP Colorado Springs Division

singer@ll.mit.edu (Matthew R. Singer) writes:
> Can someone tell me the difference between it 80960KA and 80960CA parts?

There are plenty!!!

I would suggest calling the Intel literature hotline (800-548-4725) and
getting the data sheets, harware reference manulas, software refernce
manual, user's Manual, etc...

Personally, I've found the CA to be much easier and flexible to work with,
and I've worked with them both.

John Friedman
friedman@col.hp.com
Newsgroups: comp.sys.intel
From: ankleand@mtl.mit.edu (Andrew Karanicolas)
Subject: History of Intel CPU Chip Introduction
Organization: MIT Microsystems Technology Laboratories
Date: Fri, 24 Jul 1992 08:11:47 GMT

Could someone give me the dates as to when some of the popular Intel
CPUs were commercially introduced?  The month and year would be great
though the year is fine.  In particular, for the CPU chips:

	8085
	8086
	80186
	80286
	80386
	80486

BTW, this is to settle an argument :)

-- 
Andrew Karanicolas
MIT Microsystems Technology Laboratory
ankleand@mtl.mit.edu
From: johna@psdcae1.gvg.tek.com (John Abt)
Newsgroups: comp.sys.intel
Subject: Re: AMD and INTEL
Date: 28 Jul 92 16:11:09 GMT
Article-I.D.: gold.4932
Organization: Grass Valley Group, Grass Valley, CA

I've been trying to follow the Intel vs AMD wars but am
having a little trouble keeping up. Right now I have 2
questions (which I'm sure are shared by many):

1. Has the dispute over the AMD 386 been put to rest?
   Is there on-going court action which could affect
   AMD's ability to market the 386?

2. What's the prognosis on the AMD 486? I would have thought
   that AMD had a parallel "clean room" project as insurance,
   but now I'm beginning to wonder. I heard rumors they were
   trying to cut a deal with Chips to buy some clean room
   microcode (or possibly buy the whole company). Is AMD
   looking at a significant delay in their 486 plans?

John Abt

 
Newsgroups: comp.sys.intel
From: morton@qucdntri.ee.queensu.ca
Subject: "586" rumours?
Organization: Queen's University EE Department
Date: Wed, 29 Jul 1992 15:05:49 GMT

Anybody heard any more rumours on the "586" coming out soon? What I've heard,
is that Intel has gone to a completely new architecture, and micro-instruction
set, while putting a 386 chip on board for backwards compatability. 

This makes a lot of sense to me. Anybody want to confirm/deny this rumour, 
or provide any more?

		Stephen
From: doug@UC780.UMD.EDU (Deac Moo of the UGC)
Newsgroups: comp.sys.intel
Subject: Re: 486sx questions
Date: 31 Jul 92 15:09:36 GMT
Reply-To: doug@UC780.UMD.EDU
Organization: The University of Maryland, University College

In article <DOCONNOR.92Jul30130104@potato.sedona.intel.com>, doconnor@sedona.intel.com (Dennis O'Connor) writes:

>Both the Intel486(tm) SX and DX have 32-bit external busses.
>The Intel486 DX has an FPU, the Intel486 SX does not. And the pinouts
>are a tiny bit different. If your 486SX board has the right stuff ( either
>a "Vacancy" socket or signal-routing jumpers ) you can upgrade
>it to an Overdrive processor ( equivalent to a clock-doubled 486DX ),
>or maybe to a DX.

Ohhh. Ok. Now I am confused... so you can go from S(u)X to a DX2? I thought
the only upgrade path before was from S(u)X to DX? ...

Not that Intel doesn't get roasted enough already, but it's pretty hellaciously
confusing these days. 

		
                               ******
   Net postings: Demonstrating the lack of quality psychotherapy in the world.
From: S_JUFFA@iravcl.ira.uka.de (|S| Norbert Juffa)
Newsgroups: comp.sys.intel
Subject: Re: 386/486 clock (1x or 2x)?
Date: 23 Jul 1992 14:42:53 GMT
Organization: University of Karlsruhe (FRG) - Informatik Rechnerabt.
Distribution: world
NNTP-Posting-Host: irav1.ira.uka.de
X-News-Reader: VMS NEWS 1.23

In <RFowler.288@kelvin.jpl.nasa.gov> RFowler@kelvin.jpl.nasa.gov writes:

> In comp.ibm.pc.hardware there is a thread about weather the 486DX uses a 1x 
> or a 2x clock.  I (perhaps mistakenly) said it used a 2x clock, (all of the 
> motherbords I've seen had a 2x occilator) could some one with a real data 
> book clarify?
> 
> The 386 does(?) use a 2x clock?

The 386 uses a 2x clock, while the 486 uses a 1x clock. However, there are
chip sets used in 486 machines that like to have a 2x clock as input, they
put out a 1x clock to the 486 though. Maybe they hope to make the CPU clock
input more stable that way, I don't know. There are 486 motherboards that
let you select if you want to run with a 2x or 1x oscillator. Sorry, can't
remember the manufacturer now.

>     _________________________________________________________________
>                         
>                         HONDA -- The only way to fly
>     o          
>   _/\_>   -A proud owner (just wish they were made in the USA)
>  O,> / O   [with all respects to Ohio MINE were made in Japan]
>            
>                            CM400T/XL500R/VF500F
>                              '79   '82    '84
>                            
>      Slower trafic keep right (SUCKzukies, HDs, etc.) ->->->->->->->
>     _________________________________________________________________

Norbert
-----------------------------------------------------------------------------
Norbert Juffa      email: S_JUFFA@IRAVCL.IRA.UKA.DE        Live and let live!
From: lhalie@mswe.dnet.ms.philips.nl
Newsgroups: comp.sys.intel
Subject: How to use C++ in Intel/RMX environment ?
Date: 21 Jul 92 10:16:18 GMT
Organization: Philips Medical Systems Nederland

Hello,

At Philips Medical Systems in Best (Holland) we develop software for Intel 
target systems under RMX control. 
At the moment we use C and PLM, but we want to use C++ in future projects.

I have the following questions :

    - are there any C++ crosscompilers available, or under development 
      somewhere, producing Intel object format for 8086, 80186, 80286 or 80386
    - are there tools to convert C++ object files to the Intel formats, so 
      that they can be linked to the RMX libraries and contain debug 
      information for ICE and softscope


I am looking forward to some answers or advise

    	Louis Halie, 
    	PMSN Best Holland
    		 
#! rnews 959
From: lhalie@mswe.dnet.ms.philips.nl
Newsgroups: comp.realtime
Subject: How to use C++ with Intel/RMX ?
Date: 21 Jul 92 11:17:57 +0100
Organization: Philips Medical Systems Nederland

Hello,

At Philips Medical Systems in Best (Holland) we develop software for Intel 
target systems under RMX control. 
At the moment we use C and PLM, but we want to use C++ in future projects.

I have the following questions :

    - are there any C++ crosscompilers available, or under development 
      somewhere, producing Intel object format for 8086, 80186, 80286 or 80386
    - are there tools to convert C++ object files to the Intel formats, so 
      that they can be linked to the RMX libraries and contain debug 
      information for ICE and softscope


I am looking forward to some answers or advise

    	Louis Halie, 
    	PMSN Best Holland
From: bigras@mala.bc.ca
Newsgroups: comp.sys.intel
Subject: Re: 486sx questions
Date: 31 Jul 92 01:40:39 -0700
Organization: Malaspina College

In article <DOCONNOR.92Jul30130104@potato.sedona.intel.com>, doconnor@sedona.intel.com (Dennis O'Connor) writes:
> 
> ifaq570@ccwf.cc.utexas.edu (Allen Kitchen) writes:
> ]	 Sorry bud, but to upgrade from the  486SX to the 486DX, you will
> ] need to buy an entire new motherboard.  Reason for this is that the SX is
> ] a 16 bit memory bus, just like the 386. The DX is a 32 bit part, meaning
> ] the memory is set up to be 32 bits wide. 
> 
> ARG ! NO NO NO !
> 
> Both the Intel486(tm) SX and DX have 32-bit external busses.
> The Intel486 DX has an FPU, the Intel486 SX does not. And the pinouts
> are a tiny bit different. If your 486SX board has the right stuff ( either
> a "Vacancy" socket or signal-routing jumpers ) you can upgrade
> it to an Overdrive processor ( equivalent to a clock-doubled 486DX ),
> or maybe to a DX.
> 
> In contrast, I think the Cyrix "486" part has only a 16-bit bus.
> 
> 
> --
> Dennis O'Connor			doconnor@sedona.intel.com

Maybe if the dummies who name intel products
could standardize their naming conventions
{ wait for the P5slx/2 } this type of confusion
would be less common.

Tony Bigras

ok
From: dana@locus.com (Dana H. Myers)
Newsgroups: comp.sys.intel
Subject: Re: 386/486 clock (1x or 2x)?
Date: 23 Jul 92 21:28:27 GMT
Organization: Locus Computing Corporation, Los Angeles, California

In article <1992Jul22.210053.10960@gandalf.ca> jmclaugh@gandalf.ca (Jim Mclaughlin) writes:
>In article <TMH.92Jul22194404@keks.first.gmd.de> tmh@keks.first.gmd.de (Thomas Hoberg) writes:
>>
>>Hmm, I was always under the impression that even the 486 used a 2x
>>clock up until the 486DX[2]50, which uses a 1x clock. Anyway I have a
>>66MHz oscillator on my 486/33 motherboard.
>>---
>I'm looking at page 2-177 of the 1992 Intel Microprocessor data book
>
>For the 50 MHz 486 part the minimum input frequency is 16MHz, and the
>maximum input frequency is 50MHz.  There is a note for this saying that
>it is a 1x CLK to Intel 486.  The spec also calls for the clock symetry
>to be no worse than 56-44, with .1% stability.
>
>For those out there with a 2x oscillator on the motherboard, it is likely
>that the support chip set needs the 2x, cause the CPU don't.....


Also, keep in mind a 2x clock may be divided by a simple clocked flip-flop
to derive the clean 1x clock.

-- 
 * Dana H. Myers KK6JQ 		| Views expressed here are	*
 * (213) 337-5136 		| mine and do not necessarily	*
 * dana@locus.com  DoD #466 	| reflect those of my employer	*
 * "Dammit Bones, spare me the lecture and give me the shot!"   *
From: davidsen@ariel.crd.GE.COM (william E Davidsen)
Newsgroups: comp.sys.intel
Subject: Re: "586" rumours?
Date: 30 Jul 92 16:06:56 GMT
Reply-To: davidsen@crd.ge.com (bill davidsen)
Organization: GE Corporate R&D Center, Schenectady NY

In article <1992Jul29.100549.1@qucdntri.ee.queensu.ca>, morton@qucdntri.ee.queensu.ca writes:
| Anybody heard any more rumours on the "586" coming out soon? What I've heard,
| is that Intel has gone to a completely new architecture, and micro-instruction
| set, while putting a 386 chip on board for backwards compatability. 

Fact: Intel says the chip will be delayed until 1Q93.
Rumor: Intel can't decide what to call it (I doubt that)
Runor: Intel can't get the yield up to useful levels. (I can't think of
       any other reason to delay, can you).

Fact: EE Times published a diagram which had a 386, RISC CPU, and FPU
      along with the usual cache and memory stuff.
Rumor: in CISC mode the chip is no faster than a 486 (same speed)
Rumor: in CISC mode the chip a 2X faster than a 486
Rumor: The FPU is 7X faster than a 486
Rumor: The FPU is 2X faster than a 486
Rumor: The FPU doesn't use IEEE arithmetic internally (I don't believe
       that for a moment)
Rumor: the CPU and FPU are from an 860
Rumor: the CPU and FPU are from an 960
Rumor: The CPU is a new RISC and Intel will drop the (pick one) 860 or 960

Fact: there are more rumors than facts
Fact: The rumors contradict each other

Opinion: Intel is being really silly about this, solid info on
         performance levels would allow corporate planners to think
         about the Intel based chip where now they think about RISC. I
         would say Intel isn't aiming at this market, but RISC+CISC only
         fits in a new O/S with DOS processes, unless they think people
         will buy the chip to use the RISC for Windows3 service. The
         future of the P5 looks like {UNIX,OS/2,NT}.
-- 
bill davidsen, GE Corp. R&D Center; Box 8; Schenectady NY 12345
	It never ceases to amaze me that otherwise rational people, able to
	understand calculus, compound interest, and the income tax form, can
	continue to believe that poker is a game of chance.
From: johna@psdcae1.gvg.tek.com (John Abt)
Newsgroups: comp.sys.intel
Subject: Re: "586" rumours?
Date: 29 Jul 92 23:14:53 GMT
Organization: Grass Valley Group, Grass Valley, CA

In article <1992Jul29.161432.188094@zeus.calpoly.edu> mneideng@thidwick.acs.calpoly.edu (Mark Neidengard) writes:

>Yes, there IS a 586 coming out.....it's more commonly known by it's Intel
>name, the P5. 

Your right - there has been so much publicity - the whole world knows what
the "P5" is. Of course there will be a lot more publicity between now and
Q1 (or whenever) - and the name "P5" will be defactoed in there big-time.
"586" already sounds horribly antiquated.

So, will Intel change the name (again) when they decide who wins the "name
the P5" contest??

And if they do, what if a competitor then uses the name "P5"??  

I feel an infinite series comming on... :-)
From: mneideng@thidwick.acs.calpoly.edu (Mark Neidengard)
Newsgroups: comp.sys.intel
Subject: Successor to i860?
Date: 24 Jul 92 05:15:17 GMT
Organization: Academic Computing Services, Cal Poly San Luis Obispo

This goes out to all the people in the know at or around Intel: Does Intel
have any plans to further improve the i860, or to produce future generations
of the design?  Or does it have some other RISC chip simmering on the back
burner besides the Px (x86) line?

Inquiring minds wanna know..

Mark Neidengard
mneideng@cosmos.acs.calpoly.edu
"In the name of the Prophet-PHIGS!"
	Cry of the Turkish fig-peddler
	(apologies to Edgar Allan Poe)
From: tmh@keks.first.gmd.de (Thomas Hoberg)
Newsgroups: comp.sys.intel
Subject: Re: 386/486 clock (1x or 2x)?
Date: 22 Jul 92 17:44:04 GMT
Organization: GMD-FIRST, Berlin
In-reply-to: debra@wsinis07.info.win.tue.nl's message of 22 Jul 92 07:34:59 GMT

In article <3713@svin02.info.win.tue.nl> debra@wsinis07.info.win.tue.nl (Paul De Bra) writes:
   In article <RFowler.288@kelvin.jpl.nasa.gov> RFowler@kelvin.jpl.nasa.gov (Robert A. Fowler) writes:
   >In comp.ibm.pc.hardware there is a thread about weather the 486DX uses a 1x 
   >or a 2x clock.  I (perhaps mistakenly) said it used a 2x clock, (all of the 
   >motherbords I've seen had a 2x occilator) could some one with a real data 
   >book clarify?

   The 386 uses a 2x clock, whereas the 486 uses a 1x clock.
   A 2x clock has the advantage of delivering a perfectly symmetrical
   1x clock after halving. A 1x clock needs better clock circuitry to
   make sure it is symmetrical.

Hmm, I was always under the impression that even the 486 used a 2x
clock up until the 486DX[2]50, which uses a 1x clock. Anyway I have a
66MHz oscillator on my 486/33 motherboard.
---
Thomas M. Hoberg   | Internet: tmh@first.gmd.de
1000 Berlin 41     |           tmh@cs.tu-berlin.de
Wielandstr. 4      |
Germany            | BITNET:   tmh@tub.bitnet 
+49-30-851-50-21   |
From: G_Jin@lbl.gov (Jin Guojun[ITG])
Newsgroups: comp.sys.intel
Subject: Ada compiler for Intel 520
Date: 30 Jul 1992 16:49:35 GMT
Organization: Lawrence Berkeley Laboratory
Distribution: world
NNTP-Posting-Host: 128.3.196.93

Can anyone provide information about the Intel/520 computer?
What is this machine, and who distributes the Ada compiler for
the Intel/520 computer?

Thanks for advise.

jin guojun
From: ccdvu@uqvax.cc.uq.oz.au
Newsgroups: comp.sys.intel.ipsc310
Subject: please ignore
Date: 23 Jul 92 12:10:20 AEST
Organization: University Of Queensland

testing
From: tmh@keks.first.gmd.de (Thomas Hoberg)
Newsgroups: comp.sys.intel
Subject: Intel Micro 2000 (was:Re: "586" rumours?)
Date: 31 Jul 92 03:15:29 GMT
Organization: GMD-FIRST, Berlin
In-reply-to: davidsen@ariel.crd.GE.COM's message of 30 Jul 92 16:06:56 GMT

I remember reading something in BYTE some years ago about Intels
Project 2000 (The article was called "A talk with Intel", I believe.
The baseline was, that a chip for the year 2000 would include more
than one processor and big caches. When you look at todays
workstation, you'll find a CPU+FPU(+Cache and so forth) and a graphics
accellerator and a DSP for sound and communications. There are in my
opinion right now two things that limit graphics accellerators
performance and versatility: 1) CPU <-> GX throughput, 2) memory
bandwidth. I see the versatility of graphics accellerators hamperd by
the fact, that they a) either work only on dedicated frame buffer
memory or b) have to do DMA on *physical* addresses. A graphics
accellerator included within the CPU would not have that problem. It
might have a separate set of address/data lines for the frame buffer
and use the normal CPU bus to do graphics operations on offscreen
areas. So including a RISC based graphics accellerator on the same die
as a 386 compatible unit seems like a good idea to me. The same goes
for a DSP unit. While you are add it you might add another 386 unit or
a 860 like floating point pipeline. To make things work, you might
include some kind of (big) local cache, that can be used as a
scratch-pad area for communication between the differnt units. You
might partition that scratch-pad and put a cross-bar like interface
before it, so that memory contention between the diffrent units for
the scratch pad area is low. Remember that once you go off the chip
you loose throughput bad.

I find it hard to believe that people find it so difficult to imagine
what might go into the P5 or it's successors--the path is pretty
clear. Like CPU's integrated that whole bunch of LSI logic that made
up the CPU of a PDP-11/45, tomorrows CPUs should integrate all those
pin monsters that we see in a NextStation or a Sparcstation (to make
an even bigger pin monster--but they are probably working on
interconnect, too).

Comments anyone?
---
Thomas M. Hoberg   | Internet: tmh@first.gmd.de
1000 Berlin 41     |           tmh@cs.tu-berlin.de
Wielandstr. 4      |
Germany            | BITNET:   tmh@tub.bitnet 
+49-30-851-50-21   |
From: slonim@ilx057 (Slonim Edwin)
Newsgroups: comp.sys.intel
Subject: Re: Is there any i860 C++ Compiler
Date: 23 Jul 92 11:45:21 GMT
Organization: Intel
X-Newsreader: Tin 1.1 PL4

cmhui@cucs18.cs.cuhk.hk (Hui Chau Man) writes:
: Dear Netters,
: 
: Do anyone know whether there are any i860 C++ Compiler on the market.
: 
: Best Regards
: 
: C.M. Hui
: Dept. of Computer Science
: The Chinese University of Hongkong
: Shatin, N.T.
: Hongkong
: 
: Internet: cmhui@cucs18.cs.cuhk.hk
: FAX: (852) 6035024


Despite having been very involved with the i860, I can state that we have
never heard of such a compiler.  However there are many (older) C++ compilers
that are really pre-processors, producing ordinary C which can then be
compiler by an i860 C compiler.

Good luck,
        Edwin
--
Edwin Slonim, Intel Software Products, Haifa, Israel, slonim@iil.intel.com
"God is real unless declared integer"-anon   Disc: my own firmly held opinion
   phone (011)+972-435-5910, fax (011)+972-435-5674 voicemail (916)351-2005
From: debra@wsinis07.info.win.tue.nl (Paul De Bra)
Newsgroups: comp.sys.intel
Subject: Re: 386/486 clock (1x or 2x)?
Date: 22 Jul 92 07:34:59 GMT
Reply-To: debra@info.win.tue.nl
Organization: Eindhoven University of Technology, the Netherlands

In article <RFowler.288@kelvin.jpl.nasa.gov> RFowler@kelvin.jpl.nasa.gov (Robert A. Fowler) writes:
>In comp.ibm.pc.hardware there is a thread about weather the 486DX uses a 1x 
>or a 2x clock.  I (perhaps mistakenly) said it used a 2x clock, (all of the 
>motherbords I've seen had a 2x occilator) could some one with a real data 
>book clarify?

The 386 uses a 2x clock, whereas the 486 uses a 1x clock.
A 2x clock has the advantage of delivering a perfectly symmetrical
1x clock after halving. A 1x clock needs better clock circuitry to
make sure it is symmetrical.

A 2x clock makes it difficult to drive a 50Mhz cpu (using 100Mhz oscillator)
without interference with the FM radio frequencies. (Maybe that's why
nobody sells 50Mhz 386's)

I can tell you from experience that listening to a distant radio station
at frequency 99.9Mhz is difficult when parked in the lot in front of a
major PC vendor's development lab. And they are not even using
100Mhz oscillators (but the 25 and 50Mhz ones have overtones).

Paul.
Newsgroups: comp.sys.intel
From: mneideng@thidwick.acs.calpoly.edu (Mark Neidengard)
Subject: Re: "586" rumours?
Organization: Academic Computing Services, Cal Poly San Luis Obispo
Date: Wed, 29 Jul 1992 16:14:32 GMT

In article <1992Jul29.100549.1@qucdntri.ee.queensu.ca> morton@qucdntri.ee.queensu.ca writes:
>Anybody heard any more rumours on the "586" coming out soon? What I've heard,
>is that Intel has gone to a completely new architecture, and micro-instruction
>set, while putting a 386 chip on board for backwards compatability. 
>
>This makes a lot of sense to me. Anybody want to confirm/deny this rumour, 
>or provide any more?

Yes, there IS a 586 coming out.....it's more commonly known by it's Intel
name, the P5.  It's supposedly gonna be a superscalar chip, with around 100
MIPS of performance, and backwards compatibility.  This fact has been the
topic of discussion all across the industry for MANY months.

Mark Neidengard
mneideng@cosmos.acs.calpoly.edu
"The other 'P'?  Well, that's not that simple..."
		Naughty by Nature
Newsgroups: comp.sys.intel
From: etlmike@jerry.ericsson.se (Mike Wilcox)
Subject: Re: 486sx questions
Organization: Ericsson Ltd., Cellular Systems & Special Networks.
	<64705@hydra.gatech.EDU>
Date: Fri, 31 Jul 1992 17:30:00 GMT

In article <64705@hydra.gatech.EDU> gt7080a@prism.gatech.EDU (Nathan I. Laredo) writes:

   In article <76814@ut-emx.uucp> ifaq570@ccwf.cc.utexas.edu (Allen Kitchen) writes:
   >
   >	Sorry bud, but to upgrade from the  486SX to the 486DX, you will
   >need to buy an entire new motherboard.  Reason for this is that the SX is
   >a 16 bit memory bus, just like the 386.  The DX is a 32 bit part, meaning
.....
   particular motherboard.   The 486SX is NOT 16 bits... it's a true 32
   bit chip, with the 8k on chip cache, as well as all the other features
   of the 486DX, only it runs at a slower clock and has the math coprocessor
   missing or disabled (depending on what intel now does).

   You might check to see if there are extra jumpers around the socket for
   the 486.  If your motherboard only has a slot for a weitek math coprocessor,
   there's a good chance that it will support the processor upgrade since
   there's no slot for a 487.   Motherboards that have this feature are usually

Yup, I have to agree - I have a no-name motherboard, with a 486SX-20
chip. It has a slot for a Weitek co-processor (which is a smaller
socket than the 486SX's socket).

The manual for this motherboard tells me which jumpers (there are 3)
to use depending on which 486 I have. In fact, there is a set of
jumper settings for having a 487SX around, but doesn't tell me how to
set up the chips, & I haven't investigated this any further.
Indeed the manual also tells me the various BIOS settings I should use
depending on the speed of the chip, allowing for 486SX-20, 486SX-25,
486DX-33 and 486DX-50.

So far I figure my best expansion path is to get rid of the 486SX-20
sometime in the future, and replace it with a DX2 of some description
and a new crystal. If anyone has any comments (+ve or -ve), I'd
love to hear them.

Mike


--
Mike Wilcox                    Guildford, Surrey, England.
CME 20 Design Dept.            Tel:   +44-483-303666
Ericsson Cellular Systems.     Email: etlmike@deep-thought.ericsson.se
Newsgroups: comp.sys.intel