From: liren@leland.Stanford.EDU (Liren Chen)
Subject: Job Openings in EE/CS
Organization: DSG, Stanford University, CA 94305, USA
Distribution: na
Date: Mon, 11 Jan 93 21:30:28 GMT

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The following is the list of job openings in LSI Logic Corporation
(Fortran 500), Milpitas, CA.  The openings require a degree in EE
or CS.  There are few openings for the entry-level graduates from
top schools.


If you are interested in any position, please send your resume (no
cover letter, mention req #) to  

	J. Chen
	P.O.Box 13346
	Palo Alto, CA 94309




			
  TITLE           MANAGER      SNE    SFT REQ #      QUALIFICATIONS/JOB
DESCRIPTION         

HEADLAND PRODUCTS                                 

Software Engr III   D. Gulsen    EX 1   23902          BSEE, BSCS or equiv.  5+
                                                  yrs exp in software eng.
                                                  Must have graphics driver
                                                  developing exp on PC systems
                                                  (windows or OS/2).  Maint,                                                      debug and enhance existing
                                                  software for graphics prod.
                                                  Design and develop new
                                                  modules for optimized drivers
                                                  and programs.

Design Eng III      T. Wilson    EX 1   23348          BSEE, MSEE pref with 3+
                                                  yrs in VLSI design, and 1+
                                                  yrs VHDL, Synopsis, etc.
                                                  Participate in the
                                                  architectural dev and 
                                                  behavioral implementation of
                                                  large combined graphics and
                                                  video ASICs.

Design Eng IV       T. Wilson    EX 1   25201          BSEE or equiv wwith 5+
                                                  yrs exp in related field and                                                    1+ yrs exp in VHDL design,
                                                  modeling or dev.  Develop a
                                                  test bench spec for verifying
                                                  graphics devices for various
                                                  operation environ, i.e. 80x86
                                                  CPUs.

Software Eng II     S. Glickman  EX 1   25156          BSEE/CS or equiv with 2+
                                                  yrs exp in X86 assembly and C
                                                  language.  Fix software bugs
                                                  in VGA BIOS, VGA utilities
                                                  and VGA windows drivers.

_______________________________________________________________________________


                                 EX/              
JOB TITLE           MANAGER      SNE    SFT REQ #      QUALIFICATIONS/JOB       DESCRIPTION                                       

INTEGRATED SILICON ENGINEERING

Software Eng III    D. Yamamoto  EX 1   17795          MS, PhD in EE or CS or
                                                  equiv.  Exp in IC layout  and
                                                  CAD.  Resp for adv research
                                                  in variable die, cell based
                                                  layout tool, and compaction.

Software Eng III    N. Modi      EX 1   20699          BSEE/CS or MSEE/CS pref
                                                  or equiv plus 4+ yrs of CAD                                                     software infrastructure and
                                                  applications exp.  Enhance,
                                                  maintain and support the data
                                                  manager.  Also work on the
                                                  delay predictor.

Software Eng III    J. Perkins-Chang    EX  1     22735          BS/MS in CS/EE
                                                  or equiv.  Maintain and
                                                  enhance the software for the
                                                  Memory Complier.  Work on the
                                                  Artwork database access and
                                                  storage routines.

Software Eng III    P. Filseth   EX 1   22740          MSEE/CS or equiv.
                                                  Develop and maintenance of
                                                  model generation tools, high-
                                                  level simulation software and                                                   RTL-level logic synthesis
                                                  tools.

CAD Eng             J. Chan      EX 1   22747          MSEE/MSCS or equiv.  Exp
                                                  in software programming in C,
                                                  UNIX, User Interface Program,
                                                  CAD Algorithms, especially in
                                                  Layout.  Take over Floorplan
                                                  Manager and support Layout
                                                  Production.

Software Eng II     J. Li        EX 1   22761          MSEE/CS or equiv with
                                                  software programming in C,
                                                  UNIX, GUI Package, CAD and
                                                  Layout Algorithms.  Support
                                                  layout production,
                                                  microprocessor group and                                                        Minnesota design center.

Software Eng II     C. Ho        EX 1   22762          MSEE/CS, PhD or equiv
                                                  with exp in UNIX, C, IC
                                                  design, VLSI, CAD and Layout.
                                                  Takeover floorplan graphic
                                                  user interface; provide new
                                                  features for hierarchial
                                                  layout capabilities.

Software Eng II     C. Ho        EX 1   22764          MSEE/CS or equiv with
                                                  exp in UNIX, C, VLSI, CAD and
                                                  Layout.  Research and develop
                                                  new tool for determining the
                                                  routability at early layout
                                                  stage. 
                                                                                Customer Admin Spec I            B. Lillard SNE   1    23870          College
                                                  degree or equiv with 1+ yrs
                                                  of help desk exp.  Handle
                                                  first level techincal
                                                  computer problem analysis and
                                                  resolution.

_______________________________________________________________________________


                                 EX/              
JOB TITLE           MANAGER      SNE    SFT REQ #      QUALIFICATIONS/JOB       DESCRIPTION                                       

LOGIC PRODUCTS                                                                  
*Design Eng III     B. Ulicki    EX 1   15190          BSEE/CS, MSEE pref or
                                                  equiv with 5+ yrs exp in
                                                  semiconductor IC design and
                                                  some teaching exp.  Teach 
                                                  monthly Customer Training
                                                  classes for ASIC Design Tools
                                                  and LSI Design Practices.
                                                  Dev new classes for both
                                                  Software and Silicon
                                                  Products.
                                       
*Design Eng Mgr I   S. Zarrinkameh  EX  1   20023      BS/MSEE or equiv.  Have
                                                  knowledge of several CAD                                                        tools, Logic design, indepth
                                                  understanding of ASICs, and
                                                  customer interface and                                                          support exp.  Contribute to
                                                  the dev of strategies for
                                                  servicing design tools
                                                  customers.  Service customers
                                                  through the design tools
                                                  technical support hotline.
                                                  Handle problem investigation,
                                                  verification and debugging.
                                                  Coach AE's in career growth
                                                  and supervise employees day-
                                                  to-day activities.
                                       
*Design Eng III     R. Abrishami EX 1   21281          MSEE or equiv with 
                                                  emphasis in VLSI circuit                                                        design and technology.
                                                  Proficiency in using design
                                                  auto tools, Logic and circuit                                                   simulation and customer
                                                  interface.  Define, design
                                                  and perform tech eval tests
                                                  to measure perf of existing
                                                  and new VLSI tech using SPICE
                                                  and other simulation tools.
                                                  
*Design Eng III     F. Lee       EX 1   21283          MSEE or equiv with
                                                  emphasis in VLSI circuit
                                                  design and tech.  Have exp in
                                                  VLSI ASIC, cell-based and/or
                                                  custom circuit design.
                                                  Define, design and perform
                                                  tech eval tests to measure                                                      perf of existing and new VLSI
                                                  tech.
                                                                                *Design Eng III     S. Favre     EX 1   21285          BSEE/CS, MSEE/CS or
                                                  equiv with 3+ yrs exp
                                                  programming interfaces to
                                                  commercial EDA software.
                                                  Write translators from C-MDE
                                                  libraries to other EDA
                                                  systems.

*Design Eng II      R. Leung     EX 1   21289          See description below.
                                                  
*Design Eng II      R. Leung     EX 1   21290          BSEE, MSEE pref.  Design
                                                  gate array and cell based PML
                                                  and custom cells.

*Design Eng II      R. Leung     EX 1   21294          BSEE or MSEE or equiv
                                                  with 2+ yrs exp in CMOS
                                                  circuit design.  Develop cell                                                   library, run SPICE
                                                  simulation, supervise layout
                                                  and perform verification.
                                                  Requires some customer
                                                  support work.

*Design Eng Mgr I   R. Abrishami EX 1   22099          BSEE or MSEE or equiv
                                                  with emphasis in the areas of
                                                  design automation tools and
                                                  their applications.  Working
                                                  knowledge of ASIC design                                                        concepts, methodologies and
                                                  technologies.  Successful
                                                  track record in managing tech
                                                  proj.  Define, design and
                                                  perform design tool eval and
                                                  verification test for
                                                  internally developed as well
                                                  as 3rd party tools.

*Design Eng III     R. Fulton    EX 1   23706          BSEE, MSEE a plus or
                                                  equiv.  Exp in ASIC CMOS
                                                  design, ASIC app eng or ASIC
                                                  circuit design.  Research and
                                                  dev of ASIC technologies,
                                                  ASIC app methodologies and
                                                  procedures, ASIC EDA software
                                                  app.                          *Design Eng III     R. Fulton    EX 1   23709          BSEE, MSEE pref or
                                                  equiv.  Exp in one of the
                                                  following:  ASIC CMOS design,
                                                  apps eng, or ASIC circuit
                                                  design.  Research and dev of
                                                  ASIC tech, ASIC app
                                                  methodologies and procedures,
                                                  ASIC EDA software apps.

*Design Eng IV      R. Abrishami EX 1   23710          BSEE, MSEE pref or equiv
                                                  with detailed knowledge of
                                                  design auto tools and their
                                                  applications.  Define, design
                                                  and perform design tool eval
                                                  and verification tests for
                                                  internally developed as well                                                    as 3rd party tools.

Design Eng II       P. Rowbottom EX 1   23714          BS/MS-EE or CS or equiv.
                                                  Exp in VHDL modeling from
                                                  gates to a high level of
                                                  abstraction.  Help define 
                                                  VHDL modeling methodology,
                                                  create and maintain adv
                                                  technology libraries.

_______________________________________________________________________________

                                       7          
                                 EX/                                            JOB TITLE           MANAGER      SNE    SFT REQ #      QUALIFICATIONS/JOB
DESCRIPTION

MARKETING                                         

Design Eng III                   T. Oke EX  1     22340          BSEE/CS,
                                                  MSEE/CS pref or equiv with 3+
                                                  yrs exp in ASIC design, VLSI
                                                  logic design and CAD tools.
                                                  Specify, dev and demonstrate
                                                  adv ASIC design methodologies
                                                  req for implementing Test
                                                  Systems on a system-on-a-chip
                                                  designs.

Design Eng III      H. Nguyen    EX 1   22771          BS/MSEE  or equiv with
                                                  3+ yrs in design pref ASIC.                                                     Design/support VLSI functions
                                                  for the CORE library,
                                                  including logic design,
                                                  simulation, AC timing
                                                  analysis and system
                                                  verification.  

Design Eng III                   T. Oke EX  1     23170          BSEE/CS, 
                                                  MSEE/CS pref with 3+ yrs exp
                                                  in ASIC design, VLSI logic
                                                  design and CAD tools.  You
                                                  will specify, dev and
                                                  demonstrate ASIC design
                                                  methodologies req for
                                                  building systems-on-a-chip.

_______________________________________________________________________________


                                 EX/              
JOB TITLE           MANAGER      SNE    SFT REQ #      QUALIFICATIONS/JOB
DESCRIPTION                                       
MIS                                               

CAM Develop Eng II  M. Kleidon   EX 1   14609          BSCS/EEE or other
                                                  science/engineering
                                                  discipline or equiv.  Work
                                                  exp with comp systems pref in
                                                  a manuf environ.  Knowledge
                                                  of SUN/UNIX, C programming.
                                                  Be resp for database adm of
                                                  LSI Logic's Advanced
                                                  Manufacturing Data
                                                  Acquisition and Analysis
                                                  system.                       
CAM System Admin II M. Kleidon   EX 1   15750          BS in Engineering or
                                                  Science related discipline or
                                                  equiv with exp in a computing
                                                  support environ.  Be resp for
                                                  installation, oper and maint
                                                  of a data aquisition and
                                                  analysis system.

CAM Develop Eng II  M. Kleidon   EX 1   21000          BSCS/EE or other 
                                                  science/engineering
                                                  discipline or equiv.
                                                  Knowledge of VAX/VMS,
                                                  SUN/UNIX, DCL, and shell
                                                  programming.  Be resp for the
                                                  database adm of LSI Logic's
                                                  product spec capture and                                                        control system.

_______________________________________________________________________________

                                                                                PRODUCT ENGINEERING                               

Yield Enhance Eng II             E. Sugasawara    EX   1    15223          BSEE
                                                  /MSEE or equiv and 2+ yrs exp
                                                  in yield enhancement and
                                                  product engineering.  Must
                                                  have CMOS device physics,
                                                  device testing, D.C.
                                                  parametirc testing and
                                                  failure analysis.             
Product Eng         D. Li        EX 1   20461          BSEE, MSEE or Physics or
                                                  Material Science or equiv
                                                  with 2+ yrs of semi conductor
                                                  processing, testing,
                                                  characterization, product or
                                                  design exp.  Support the 300K                                                   process qualification and
                                                  500K process development.

_______________________________________________________________________________

                                                  
RESEARCH AND DEVELOPMENT                                                        
*Proc Dev Eng IV    A. Kapoor    EX 1   21802          MS or equiv with 5+ yrs
                                                  exp in device modeling for
                                                  circuit simulation.  Support
                                                  circuit simulation by
                                                  producing models for NMOS and
                                                  PMOS devises.

_______________________________________________________________________________


                                 EX/              
JOB TITLE           MANAGER      SNE    SFT REQ #      QUALIFICATIONS/JOB
DESCRIPTION                                       
                                                                                SALES

*Design Eng III     D. Nguyen    EX 1   22546          BSEE or equiv with 3+
                                                  yrs digital design exp.
                                                  Support cust base in Bay
                                                  Area/Northern California. 

_______________________________________________________________________________