From: jj@alice.att.com (J. Johnston)
Newsgroups: rec.audio
Subject: Re: CD/LD jitter: I certainly do get it! (Was: Kerry doesn't get it...)
Date: 4 Jan 93 15:39:06 GMT
Article-I.D.: alice.24545
Reply-To: jj@alice.UUCP (The Grouch)
Organization: NJ State Home for Bewildered Terminals

In article <1993Jan3.220805.9323@smab.se> hans@smab.se (Hans C Larsson) writes:
>The receiver has to Phase Lock on a square wave which might not
>be very "square".
So what?  The noise in the link is not very large, so the lack
of squareness isn't very important.  The only question is 
"Does the link have sufficient bandwidth to convey the data?"

There is, of course, a second problem if you're working in an
atomic bomb blast or with 1000 foot cables, and that's "is
the SNR on the line good enough to recover the bits".  That's
rarely a problem under most normal setups.  My setup at work
uses a 60' cable on the SPDIF output of my computer interface,
and I get neither jitter problems nor noise problems.

>From this you will get time-shift on the samples on the *RECEIVING*
>end since (virtually) all D/A-converters lacks any significant
>amount of buffer memory *COMBINED* with re-clocking of the signal.
>(The only exception that I know of is the (horrendously expensive)
>Technics SH-X1000 D/A converter).
Of course, using a two-stage PLL and a trivially SMALL amount
of buffering will solve this problem outright.  This "re-clocking"
doesn't involve doing any digital manipulation at all, all that's
necessary is that the SPECTRUM of the sampling jitter is reduced.
This is trivially done by using a very low-pass loop filter on the
second PLL, and an intellegent circuit topology.

>Note that any amount of buffer memory is useless without
>re-clocking of the signal.
Note that I don't quite know what you mean by "re-clocking",
and that a very small amount, 5 or 10 samples worth, is all
that's necessary in the case wher one uses a rational clocking
arrangement.

>I guess that re-clocking might be tricky since the receiver must
>let his clock "drift" to avoid long term buffer under/over-flow.
It doesn't have to do any such thing, and they don't.  You can
trivially do "re-clocking" by using a two-stage PLL, with
5 or 10 samples worth of buffer, so that you reduce the
badwidth of the jitter. Despite the utterly falacious nonsense
spouted forth as rigorous science here, a drift of one part
in 10 to the 4 is absolutely inaudible IF the spectrum of the
jitter contains no elements above 1 Hz, for instance.

The "amount" of the jitter is nearly irrelevant. What matters
is the AMPLITUDE SPECTRUM OF the jitter.  Think about it,
a clock off 1 part in 10 to the 4 has a linearly increasing
jitter, and a huge one,  by the definitions you're using,
but strangely enough, it just doesn't matter in real life,
even if you beat it against the original source, which is
pretty hard if you're playing back the CD.

>A simple way is to use a good transport...
Why?  The way to do it right is to use a good DAC.  As long
as the transport gets the bits right, it shouldn't matter.
If you find it does, it's your DAC that's responsible,
and THAT is what you should examine.
-- 
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"Extremism in the defense of liberty is no vice" - AuH2O for President