From: patel@crhc.uiuc.edu (Janak H. Patel)
Newsgroups: comp.lsi.testing
Subject: To Test or Not to Test?
Keywords: yield test cost
Date: 28 Aug 92 18:57:18 GMT
Organization: Center for Reliable and High-Performance Computing, University of Illinois at Urbana-Champaign
NNTP-Posting-Host: bashful.crhc.uiuc.edu

OK folks, all of you have convinced me that the cure to the name
confusion of this group is to create enough traffic on this group.

I am taking Justin Harlow's question one step further:
To test or not to test? (independent of the yield).

To take an extreme position, Test does not add any visible value to a
product.  Testing has no effect on the performance of a chip.  It does
not make a chip more reliable.  In this sense, testing is like buying
an insurance.  Testing costs are like paying the premium for an insurance.
Most of us have some kind of insurance: auto, home, health, life etc.
Think for a moment, the money spent for the premium does not add any value
to your car, health, life etc.  Yes, it does buy you some abstract
values, such as "peace of mind", but nothing tangible that you can
lay your hands on.  Aha, but you say, you can put a value to an
insurance by reasoning "what if I didn't have insurance?".
Now we get into probablities and worst case analysis - e.g. what if
I had a dent in my car, a total wreck of my car etc? 

Similarly, putting a value on testing is very hard, nothing tangible
is gained - a "peace of mind", yes, but nothing concrete.  This is
why I think it is hard to sell "testing" and "testability" to the
designers or their managers.  Designers don't see any concrete
gain by adding in testability - it just comes in their way!
And since it is hard to put a dollar value on the benefits of
testing, mangagers are not motivated to insist on having testability
in design.  Testing (like insurance) plays an important role in
"total risk management".  One can analyze worst case scenarios, such
as "what if I did not test (or tested poorly) and I shipped
lots of defective parts?"

For high yield (very close to 100%) parts, the answer is very clear,
"I hardly ever ship a defective part, so why do I need testing?"
In reality, this does happen.  I know two manufactureres who do not
test some chips.  These chips are high volume, mature process, and
very low cost.  Any testing would just increase the cost. (one also
told me that testing would increase defects in such a chip!)
In fact they told me that the cost of test would far outweigh the cost of the
chip and the package.  If you can't think of such a chip,
look up a $1 LCD watch.  At the retail price of $1 for the complete
package, the chip is bound to cost no more than a few cents.
So yes, there are real life situations where testing does not make sense.

Then there are chips with low yield, aggressive design and large number of
gates, such as microprocessors, where it is very easy to justify
testing and testability benefits.

However, a vast majority of ASIC designs fall between these two
extremes.  It is here where the situation is very murkey.  It is
not very easy to sell testability and high coverage to these group.
What if you did only a functional test with 60% coverage?

Best case is that,
(a) you don't ship very many defective chips. (just lucky!) or,
(b) the customers are not very mad at receiving bad chips, or
(c) the customers don't know that it is your chip that is bad in the board
    (they may attribute the defect to the board manufacturing process rather
     than to your chip manufaturing process)
It is very hard to sell testability or high coverage to this group.

Worst case is,
(a) very low yield, or
(b) lots of returns from the customer and you are surprised! or
(c) You get a bad reputation for low quality
It is relatively easy to sell testability and high coverage to this group.

The "best cases" defined above are far from rare, in fact some
tell me that it is the norm in their facility.  The "worst cases" are
rare at present, but are increasing with the size of the ASICs.

I have said enough!  Now let us hear from the rest.

-Janak Patel
University of Illinois
patel@crhc.uiuc.edu
Newsgroups: comp.lsi.testing