HDTenEightyP/NetNews huggingface dataset:
From: cheeyong@kolmogoroff.iss.nus.sg (Lim Chee Yong)
Newsgroups: comp.specification
Subject: Request for ISO IS9074/8807 & TR10167
Date: 26 Aug 92 03:21:43 GMT
Organization: Institute of Systems Science, NUS, Singapore
Originator: cheeyong@kolmogoroff


Hello netters,

Not sure whether this is a FAQ, anyway here it goes :

I am looking for the electronic copies for the following
ISO standards that I can ftp directly. 

1) ISO Information Processing Systems - Open Systems Inter-
   connection - Estelle - A Formal Description Technique
   based on an Extended State Transition Model. 
   ISO IS 9074, 1988

2) ISO Information Processing Systems - Open Systems Inter-
   connection - LOTOS - A Formal Description Technique based
   on the Temporal Ordering of Observational Behaviour.
   ISO IS 8807, 1988

3) ISO Information Processing Systems - Open Systems Inter-
   connection - Guidelines for the Application of Estelle,
   LOTOS and SDL.
   ISO TR 10167, 1990

Any pointers given will be very much appreciated !

Thanks in advance. Reply by e-mail please.


-- 
Lim Chee Yong				 Phone    : 65 - 772 - 3695
Institute of Systems Science  		 Fax      : 65 - 778 - 2571 
National University of Singapore         Internet : cheeyong@iss.nus.sg
Kent Ridge, Singapore 0511               Bitnet   : isslcy@nusvm.bitnet
Newsgroups: comp.specification
From: ard@tid.es (Antonio Ruiz Delgado)
Subject: SDL 92
Reply-To: ard@tid.es
Organization: Telefonica I+D
X-Newsreader: Tin 1.1 PL4
Date: Fri, 28 Aug 1992 12:26:02 GMT

Hi

We are interested in our Labs in the new object-orientated SDL that
the CCITT is expected to recommend at the Plenary Feb 1993 (A revised
draft is already available)

Does anybody know if any of the SDL tool developers is currently working 
on (or at least thinking of!) the upgrading of the tools to meet the new 
features offered by the language?


============================================================
Antonio Ruiz Delgado             E-mail: ard@tid.es
Telefonica I+D
SPAIN
============================================================
From: cliff@cs.man.ac.uk (Cliff B Jones)
Newsgroups: comp.specification
Subject: Re: Questions on modules and state in BSI VDM
Date: 28 Aug 92 14:45:38 GMT
Organization: Dept Computer Science, University of Manchester, U.K.

In article <1992Aug21.130630.4998@bohra.cpg.oz.au> als@bohra.cpg.oz.au (Anthony Shipman) writes:
>I have been trying to come to grips with modules and state as described
>in "The VDM-SL Reference Guide" by Dawes and now I'm thoroughly confused.
>

I rate John Dawes' book on VDM-SL as very useful but the material on
modules could be improved!

>I can import types, values, functions and operations from a module but what do
>I do with the state?
>
>Suppose I have a module ...
>
>What is the type that I use for the variable?  
>How do I use the post-condition of an operation from the imported module if its
>signature refers to fields of the state but I only have a single variable 
>containing the state?
>

The whole idea of the module in VDM is that it is a "closed" object
which can only be manipulated via operations which are exported. It is
therefore reasonable that the only "type" which is generated is for
the whole state. In fact, the story is a bit more complicated because
- assuming that the (operations of the) importing module are specified
implicitly - one cannot "invoke" operations from a logical expression.
This problem is overcome by permitting the "quoting" of
pre/post-conditions.

>
>Is there a better explanation of modules (outside of the standard)?
>

You might get some idea from the examples in Section 9.1 of
	
@book{Jones90a,
	author	    =	"C.~B.~Jones",
	title	    =	"Systematic Software Development using VDM",
	edition =	{Second},
	publisher   =	"Prentice Hall International",
	year	    =	"1990",
	length =	"333 pages"
}

>While I'm at it how come function types have to be duplicated
>in import and export module signatures all over the place?  In a spec of
>practical (non-academic) size one change to a function may mean editing
>a large number of modules.  If readability is a concern then a listing
>from a CASE tool can include the duplicated signatures. The info is 
>mechanically derivable so I shouldn't have to do it.
>-- 
I'm inclined to your view here - but those on the committee who voted
for the more verbose versions could also point out that the redundant
material could be generated by tools!

cliff jones

PS
In a later posting, you ask about the status of modules in the
standard (a draft of which is being sent out right now). The current
position is that they will be presented in an "informative"
("non-normative") Appendix. The argument for this is that while
"flat-VDM" has been extensively used, the same is not true for the
module concept. There is much debate in general (I don't think any
specification language could claim to have solved all of the problems)
and in the VDM community in particular about the role of
modularization. See for example the papers in the "Formal Aspects of
Computing" Vol 4, No 1, 1992.
From: sjv@doc.ic.ac.uk
Newsgroups: comp.specification
Subject: Re: Looking for paper about quantification
Date: 3 Sep 92 12:26:21 GMT
Organization: Imperial College
NNTP-Posting-Host: dse-mac-l1-85.doc.ic.ac.uk

In article <BtyBLw.42q@dcs.glasgow.ac.uk> areid@dcs.glasgow.ac.uk (Alastair
Reid) described an idea for avoiding the paradoxes associated with empty
carriers for many-sorted algebras, and I posted a reply describing the
constructivists' technique of attaching finite sets of variables to equations
or sequents.

I said that I didn't know of a reference for the technique, but I've now found
that it is described quite straightforwardly in Lambek and Scott's book
"Introduction to Higher Order Categorical Logic", section II.1. In their
historical comments, they attribute it to Mostowski (1951).

Steve Vickers
From: brendan@cs.uq.oz.au (Brendan Mahony)
Newsgroups: comp.specification
Subject: Re: Linear and Branching Time Temporal Logic
Date: 24 Aug 92 00:06:03 GMT
Reply-To: brendan@cs.uq.oz.au

In <172o80INNk2k@iraul1.ira.uka.de> zundel@i10s7 (Armin Zundel) writes:

>Hello everyone! 

>after reading some papers about temporal logic I had some problems to
>decide when to use linear time logics and when to use branching time
>logics. I decided to read 

>"Sometimes" and "Not Never" revisited: On Branching versus Linear Time
>Temporal Logic 
>by E.a. Emerson and J.Y. Halpern.

>Now I'm even more confused. I just want so specify distributed systems.
>Can anyone tell me what real life properties can be specified with
>linear time logic and which can be specified in branching time logic. 

A brief summary from what I have gleaned of temporal/tense logics.

Linear:

	+ describe behaviours of individual histories (functions of time)
	+ corresponds to use of a function
		TIME --> STATE/EVENT
	  in classical predicate calculus
	+ good for describing a class of behaviours which are acceptable
	- difficult to specify required alternative behaviours
		e.g. both the bzzt and spht events must be available

Branching:

	+ describes collections of histories (relations of time)
	+ in classical predicat calculus corresponds to use of a 
	  uniquely identified set of time stamped observations
		(ID --> TIME cross STATE/EVENT)
	  with a casality thread (or accessibility or time-branching relation)
		(ID <--> ID)
	  which determines the allowed futures for each time stamped
	  observation.
	  The usual special case is
		TIMETREE ::= STATE/EVENT \cross listof TIMETREE 
	+ good for describing a range of reuired alternative behaviours

Branching time is linear time + possibility. That is linear time
discusses the properties of a single observation of a system, whilst
branching time discusses the properties of all the possible observations
of a system.

A simple branching time logic which brings this out has the following
modalities:

	predicate - true of this time and this observation
	F - will occur sometime in the future
	G - will always be the case in the future
	<> - will occur in some observation of the system
	[] - will occur in every observation of the system

This makes all the concerns orthogonal in the language.

E.g.
	both the bzzt and spht events must be available now
		<> bzzt \land <> spht

	always both the bzzt and spht events must be available
		G(<> bzzt \land <> spht)

	eventually both the bzzt and spht events must be available
		F(<> bzzt \land <> spht)

	(necessarily) both the bzzt and spht events must eventually be available
		[]F bzzt \land []F spht

The usual branching time sometime is then <>F, the usual always []G.
--
When soldiers form lines or hollow squares, you call it reason.
When wild geese in flight take the form of a letter V, you say instinct.
When the homogeneous atoms of a mineral arrange themselves into shapes
mathematically perfect you have nothing to say. You have not even invented a name to conceal your heroic unreason."
From: als@bohra.cpg.oz.au (Anthony Shipman)
Newsgroups: comp.specification
Subject: inconsistency with lambda in VDM
Date: 27 Aug 92 07:35:59 GMT
Organization: Computer Power Software

I can give an explicit definition for a function with no arguments:

	f: () -> T

but according to the grammar for VDM-SL it doesn't seem to be possible
to write a lambda expression for a function with the above type.

What have I missed?

(I know such functions aren't useful. This is more an academic query.)

Regards

-- 
Anthony Shipman                 "You've got to be taught before it's too late,
CP Software Export Pty Ltd,      Before you are six or seven or eight,
19 Cato St., East Hawthorn,      To hate all the people your relatives hate,
Melbourne, Australia, 3121       You've got to be carefully taught."  R&H
Newsgroups: comp.specification
From: als@bohra.cpg.oz.au (Anthony Shipman)
Newsgroups: comp.specification
Subject: Re: Questions on modules and state in BSI VDM
Date: 31 Aug 92 10:07:49 GMT
Organization: Computer Power Software

cliff@cs.man.ac.uk (Cliff B Jones) writes:
>modules could be improved!

>>I can import types, values, functions and operations from a module but what do
>>I do with the state?
>>
>>Suppose I have a module ...
>>
>>What is the type that I use for the variable?  
>>How do I use the post-condition of an operation from the imported module if its
>>signature refers to fields of the state but I only have a single variable 
>>containing the state?
>>

>The whole idea of the module in VDM is that it is a "closed" object
>which can only be manipulated via operations which are exported. It is
>therefore reasonable that the only "type" which is generated is for
>the whole state. 

	But what is the type name for the whole type?  How do I declare a
	variable of that type? etc.

	In section 9.1 of your book your examples do not use the whole
	state.  For example your MBAG module imports and uses just the type Bag
	which is only a component of the state of the BAG module.  Your quoted
	pre/post-conditions operate on a Bag object rather than on the
	state object.  There does not appear to much of a purpose for the state
	declaration.  The same effect could be achieved with a module that
	exported only a type and functions that operated on that type.

	Then in the CDICT module you refer to LDICT.State which is the name of
	the state id of the LDICT module.  This is the heart of the matter.
	I cannot find anywhere in [Dawes] a clear statement that the state id
	is a bona fide type name of some record type, that furthermore can be
	referenced outside of the module even though it is not explicitly
	exported.

	Furthermore your example for the STORE operation in CDICT appears to 
	have an error.  From

		type Cdict = LDICT.State*

		cd : Cdict

		.... post-STOREL(i, a, hd ?cd, ld)

	I conclude that the type of the third argument of the post-condition
	must be of type LDICT.State but in actual fact it is of type Ldict, 
	the state's field type.  What if there is more than one field?  All of
	your examples only have one field.

	I would be happy to refer to a type MODULE.State and declare state
	variables of that type but then how to do I quote postconditions which
	typically refer to components of the state?  Presumably the components
	are supposed to be hidden within the module and not exported.

	I hope this clarifies my confusion.

		In fact, the story is a bit more complicated because
>- assuming that the (operations of the) importing module are specified
>implicitly - one cannot "invoke" operations from a logical expression.
>This problem is overcome by permitting the "quoting" of
>pre/post-conditions.

Regards
-- 
Anthony Shipman                 "You've got to be taught before it's too late,
CP Software Export Pty Ltd,      Before you are six or seven or eight,
19 Cato St., East Hawthorn,      To hate all the people your relatives hate,
Melbourne, Australia, 3121       You've got to be carefully taught."  R&H
From: als@bohra.cpg.oz.au (Anthony Shipman)
Newsgroups: comp.specification
Subject: modules in VDM
Date: 27 Aug 92 07:23:23 GMT
Organization: Computer Power Software

Recently I posted some questions about the module facilities in VDM-SL.
I received a reply that said that they are not very usable and have been
removed from the draft ISO standard for VDM-SL.

Can anybody confirm or add anything to this?


Thanks
-- 
Anthony Shipman                 "You've got to be taught before it's too late,
CP Software Export Pty Ltd,      Before you are six or seven or eight,
19 Cato St., East Hawthorn,      To hate all the people your relatives hate,
Melbourne, Australia, 3121       You've got to be carefully taught."  R&H
Newsgroups: comp.parallel
From: Simon.Moore@cl.cam.ac.uk (Simon Moore)
Subject: Re: Synchonizing watches
Apparently-To: comp-parallel@uknet
Reply-To: Simon.Moore@cl.cam.ac.uk (Simon Moore)
Organization: U of Cambridge Computer Lab, UK
Date: Fri, 4 Sep 92 10:26:52 GMT

In article <1992Sep3.201927.25562@hubcap.clemson.edu>, leo@nas.nasa.gov
(Leo Dagum) writes:
|> In article <1992Sep3.123226.14205@hubcap.clemson.edu>
steve@hubcap.clemson.edu ("Steve" Stevenson) writes:
|> >[I saw this on sci.logic. I thought it was a nice problem for this group.
|> >  steve]
|> >>From: dougs@tvnews.tv.tek.com (Doug Stevens)
|> >>Message-ID: <1992Sep1.234452.26917@tvnews.tv.tek.com>
|> >
|> >[....]
|> 
|> Unless I'm missing something, this is fairly straightforward.
|> 
|> 1) A zeroes watch, calls B and hangs up.
|> 2) B waits till phone ends ringing then calls A and hangs up.
|> 3) B calls A again and hangs up.
|> 4) A times the first call back, and now knows (AB + BA), when he gets
|>    the second call back, he now knows BA as well (and therefore AB).
|> 5) A sets his watch back by AB, and calls B
|> 6) B picks up the phone and zeroes his watch, they now have (approximately)
|>    synchronized watches.
|> 7) Bob's your uncle.

I have a problem with this - B could place the second call (number 3) at
any time and therefore A is unable to determine the delay BA.  For example,
if B places the second call to A 1 second after the first, then all A will
see is two calls 1 second apart.

Bob isn't my uncle?

 - Simon

[Simon Moore][University of Cambridge, Computer Laboratory][swm11@uk.ac.cam.cl]

Newsgroups: comp.parallel
From: mln@sunkj.larc.nasa.gov (Michael L Nelson)
Subject: Re: Synchonizing watches
Organization: NASA Langley Research Center, Hampton, VA  USA
Date: Fri, 4 Sep 1992 15:09:29 GMT

I must be missing something here, because this looks quite simple.

-A & B already know this procedure.

A: says "Bing" to B
   B responds with "Bing" to A

this is ABBA time - the total delay

A:
1. says "Bong"
2. waits, say N minutes (N > ABBA) 
3. says "Bong" again

B already knows what N is, and can then determine
What AB is (Bong2 - Bong1 - N)

B tells A what AB time is.

A says "Bang" and waits AB time before zeroing
the watch

When B hears "Bang", B immediately zero's the watch

synchronized

Michael Nelson

Newsgroups: comp.parallel
From: tony@iti.org (Anthony Skjellum)
Subject: pvm_mail/pvm_request and comp.distributed
Summary: pvm_mail provides a mailing list for PVM and distributed computing
Keywords: pvm_mail mailing list, new newsgroup proposed
Organization: Clemson University
Date: 25 Aug 92 15:45:38 GMT


Dear comp.parallel, I have received significant responses (positive)
about the pvm_mail@helios.llnl.gov mailing list.

PLEASE SEND REQUESTS to pvm_request@helios.llnl.gov, NOT pvm_mail.
People get upset about the large number of administrative requests
likely to be generated by such mistakes.  Several well-meaning people
have done this already.

I have gotten enough mail to suggest that we set up comp.distributed
immediately.  Dave Forslund and I have discussed this briefly, we will
have some time of rotating moderator between interested, responsible
parties.  For now, I am going to propose the group, and tell you if
/where we need votes to get it approved.

Again, please use the mailing list politely.
- Tony Skjellum


--
 	.	.	.	.	.	.	.	.	.      .
"They also serve who only stand and wait." - J. Milton

Anthony Skjellum, LLNL, (510)422-1161; FAX: (510)423-2993; tony@helios.llnl.gov

Newsgroups: comp.parallel
From: levie@dutiws.TWI.TUDelft.NL (M.Levie.TA-tel-7230)
Subject: C&T
Organization: Delft University of Technology
Date: 31 Aug 92 11:22:20 GMT


Hi There,

I'm looking for the adress of a company called C&T. Their name was mentioned
in earlier postings on transputer kits.

If anyone can help me, please do :)

Thanks a million,

M.Levie

levie@dutiws.twi.tudelft.nl

Newsgroups: comp.parallel
From: bminor@afit.af.mil (Bryan M. Minor)
Subject: Re: AFS Summary
Apparently-To: hypercube@hubcap.clemson.edu
Organization: Air Force Institute of Technology
Date: Thu, 27 Aug 1992 20:05:58 GMT

I have the opportunity to use three different Silicon Graphics machines:

    4D/320, 4D/440, 4D/480

Supposedly the 320 has 2 R3000 processors, the 440 has 4 R4000 processors,
and the 480 has 8 processors.  What I am interested in knowing is how fast
are these machines compared to a Sun SPARC 2 with 32 Mb, and is trying to
program parallel codes on them worthwhile.  Are they MIMD or SIMD Parrallel
machines?  If you are going to program on them, what language is best,
ie. C/C++ or Fortran 90.  I really want to get into parallel programing
and my current research project seems to lend itself to it.  Are these good
machines for getting exposed to parallel programing?  Thanks alot for your
time!

Newsgroups: comp.parallel
From: zone@ens.ens-lyon.fr (Olivier Zone)
Subject: Block tridiagonal inverse
Apparently-To: comp-parallel@uunet.uu.net
Organization: Ecole Normale Superieure de Lyon, France
Date: Tue, 25 Aug 1992 16:09:22 GMT

Hello,
I would appreciate any references to obtain the inverse/solution 
for block (tri)diagonal matrix on parallel machines.

Thanks.
e-mail: oz@mema.ucl.ac.be

Olivier


Newsgroups: comp.parallel
From: lan@cs.uh.edu (Lan Zhang )
Subject: look for information about SIMD to MIMD program transformation
Organization: Computer Science dept.,  Univ. of Houston (Main Campus)
Date: Fri, 28 Aug 1992 22:18:11 GMT

I am looking for any information about SIMD to MIMD program
transformation. Thank you in advance for sending me such informations.

I appreciate it.


---
Lan Zhang

Dept. of Computer Science
Univ. of Houston

Newsgroups: comp.parallel,sci.logic
From: steve@hubcap.clemson.edu ("Steve" Stevenson)
Subject: Synchonizing watches
Organization: Clemson University
Date: Wed, 2 Sep 92 08:27:17 -0400

[I saw this on sci.logic. I thought it was a nice problem for this group.
  steve]
>From: dougs@tvnews.tv.tek.com (Doug Stevens)
>Message-ID: <1992Sep1.234452.26917@tvnews.tv.tek.com>

[....]

A and B are two people at two ends of a very slow telephone connection. 
They are both completely cut off from the world except for their connection 
with each other.  In particular, they have no idea what time it is in the 
real world.

There is a delay AB in the transmission of what is being said by
A to B, and a delay BA in the transmission of what is being said
by B to A. The delay AB does not equal the delay BA. The delays, for the
purpose of this problem, are on the order of minutes in each direction.

Both A and B have watches. Before they begin to talk, the watches are not
set to the correct time, nor are they set to the same time.

The problem is to devise a procedure such that A and B can, via their 
telephone connection only, accurately synchronize their watches (to
within a few seconds). The watches do not have to reflect time in the
real world, but must match each other. Both A and B will know the procedure 
before the call begins, and each will know whether he is A or B.

Thanks for any help.

Newsgroups: comp.parallel
From: vanscoy@cs.wvu.wvnet.edu (Frances L VanScoy)
Subject: parallel course design advice
Organization: Clemson University
Distribution: usa
Date: 25 Aug 92 17:15:50 GMT



Next semester I'm scheduled to teach a service course for graduate
students in science and engineering on programming a parallel computing
system.

Does anyone have any advice on topics to include in such a course or
a text book to choose?

Frances Van Scoy
Department of Statistics and Computer Science
West Virginia University
Morgantown, WV  26506-6330

Newsgroups: comp.parallel
From: joel@ssd.intel.com (Joel Clark)
Subject: Re: New book on commercial uses of parallel processing
Organization: Supercomputer Systems Division, Intel Corp.
Date: Tue, 25 Aug 1992 22:09:07 GMT

In article <1992Aug25.191326.339@hubcap.clemson.edu> vanzandt@netcom.com (John Van Zandt) writes:
>
>
>             "Parallel Processing in Information Systems"
>                                  by 
>                            John Van Zandt
>
>John Van Zandt is the 21st Century Computer Architect for Computer Sciences
>Corporation working with the Numerical Aerodynamic Simulation Systems
>Division of NASA.  He has been the Director of Future Systems at Sequent 
>Computer Systems, one of the pioneering companies in parallel processing. 
>Prior to that he was the Engineering Manager at Intel Scientific Computers, 
                          ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>another leader in parallel processing.
>

I was very suprised to see this (and resented it).  A commercial posting on
the net, from the author, advertising his own book with pricing etc.

Or maybe it was the few (3? at the most 4) months he was Engineering Manager
here.  Not really enough to contribute anything but a lot of confusion.

joel clark
Intel Supercompter Systems Division

NOTE: I am speaking personally, NOT as a representative of INTEL




Newsgroups: comp.parallel
From: henrik@mpci.llnl.gov (Henrik Klagges)
Subject: Re: Silicon Graphics Workstations
Organization: Clemson University
Date: 31 Aug 92 19:02:10 GMT


bminor@afit.af.mil (Bryan M. Minor) writes:
>Supposedly the 320 has 2 R3000 processors, the 440 has 4 R4000 processors,
The 440 has the R3000 running at 4X MHz, but no R4000.
Cheers, Henrik
IBM Research
MPCI at LLNL


Newsgroups: comp.parallel