From: davidme@qdpii.comp.qdpi.oz.au (David Meiklejohn)
Subject: MIPS (was: DIR)
Organization: Qld Dept Primary Industries
Date: Mon, 17 Aug 1992 13:58:15 GMT

In article <185@future.sbc.com> mk9629@future.UUCP (Mike R. Kraml) writes:
>In article <1992Aug13.014759.3055@usl.edu> das9674@usl.edu (Stephenson Daniel A) writes:
>>I beleive the full 50Mhz 486 runs a little over 40 MIPS, maybe 41-42.          
>
>   I kind of doubt it, the 486/50 dx2 which does run internally at 50MHZ
>   averages 9 MIPs on the C&T MIPS benchmark, which, I believe does a 
>   pretty good job with a general instruction, integer, memory to memory,
>   register to register, and register to memory instruction mix.  Granted
>   the straight 50 will do better on the memory access tests, however, 
>   its only a fraction of the equation.  Overall, you could probably 
>   expect around 10-12 MIPS (using a decent MIPS benchmark) on the 
>   50 MHZ 486 DX chip.  Sorry, couldn't resist.  Mike...

Excuse me, but could you define "decent MIPS benchmark"?

As far as I'm aware, there are two common definitions of MIPS.  Firstly,
there's native MIPS, which is how many (million) of that particular cpu's
instructions are executed per second.  This has to be based on carefull
statistical analysis of "typical" code, as used in "typical" applications.
However, because different cpus have different instruction sets, they will use
a different number of instructions to do the same amount of work.  For example,
a 386 can accomplish with a single string move instruction what would would
take hundreds of repetitions of a loop on a 68000.  The 386 would be doing
fewer instructions per second, but would also complete the move faster than
the 68000.  That's an extreme example.  In general, it's not too bad to compare
x86 and 680x0 mips, often called "cisc mips", but you can't compare that to a
risc cpu, which needs more, simpler, but faster, instructions.  So, risc
systems will generally do more native mips than a cisc, but does that make it
faster?  The mips rating tells you nothing at all here.

So, to get more "meaningful" mips figures for comparison, the relative
performance is scaled to what a VAX 11/780 (or 750?  - one or the other) does.
It's considered a 1 MIPS machine, even though a recent article in comp.arch
stated that, with modern compilers, the 780 would rate at 1.3 MIPS these days.
However, that's our reference point, and a machine as fast as a VAX is defined
to do 1 VAX MIPS.  Just to confuse things, DEC refer to this as a Vax Unit of
Performance, or VUP.  How do you scale performance to get VAX MIPS?  You need
a standard benchmark, and the standard here is Dhrystones.  For MIPS ratings,
you use the old 1.1 version, despite it's known problems with dead code and
hence dependency on compiler optimisations.  You take this number and divide
by 1760, since that's what a VAX does, or did when it was a "hot" machine,
anyway.

Now, the C&T benchmark sounds like it's trying to measure native mips, since
you refer to an instruction mix.  The funny thing is that Dan's figure of
40 mips on a DX/50 is probably native mips too, but probably based on average
instructions through the integer unit running out of on-chip cache.  In other
words, no memory accesses.

The point of all this is that both these could be right, and both wrong.
Talking about "mips" doesn't say what you're measuring, so it's useless.  The
only useful form is VAX mips, which is hardly a great benchmark, but at least
you know what's being measured and how.

I see that some real benchmarks have been posted - good to see!  As another
data point, here are some results based on a pre-optimised version of Dhrystone
2.1, which supposedly greatly reduces dependency on compiler optimisations.
I think this is worth including, since the Intel and Motorola versions are
compiled from the same code, with common and mature compilers.

Running under DOS isn't fair on a 486 - you want 32-bit code in a linear
address space, so, after compiling with "cc" as shipped with SCO UNIX SVR3.2
v2, I get

  486/25 (64k cache)  : 25073 dhrystones

I don't have an 040 :-(, but with SAS/C 5.10a, producing 030 code for my
A2630 board, we have

  68030/25 (no cache) : 8772 dhrystones

Now, Nic Wilson's SysInfo 2.40 tells me that my Amiga runs 0.30 x as fast as
a PP&S 040 board, so that means I should expect

  68040/25 (no cache) : 29240 dhrystones

What does this prove?  Only that an 040 can be expected to be at least as
fast, and probably faster, than a 486 for integer instructions at the same
clock rate.

End of argument (I wish!).


-- 

David Meiklejohn                  | Internet : davidme@qdpii.comp.qdpi.oz.au
Computer Systems Officer, QDPI    | Fax      : +61 70 92 3593
Mareeba, Australia                | Voice    : +61 70 92 1555
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