From: larry@lablues.UUCP (Lawrance A. Schneider)
Newsgroups: comp.sys.apple2
Subject: Re: question about CPU operations
Date: Fri, 11 Dec 92 15:00:18 EST
Organization: L/A Blues BBS - Auburn ME (207) 777-3465 & 7782

toddpw@cco.caltech.edu (Todd P. Whitesel) writes:

> dockery@griffin.cuc.ab.CA (Sean Dockery) writes:
> 
> >In the Apple II Reference Manual, it states that the 1.023MHz 6502
> >requires approximately 300ns for a read operation and 100ns for a
> >write operation.
> 
> This is true of the chip itself. However, there are requirements of the other
> parts (memory, etc.) that affect the answer to the real question you're askin
> 
> >However, it is also documentation that performing a write operation is
> >carried out by first performing a read of the datum in a memory
> >location followed by a write of the datum in a given register.
> 
> Not all writes happen like that. I'd have to look things up to be sure, but I
> believe it is that only indexed writes do that.
> 
> >	Does the write operation of the 6502 CPU require 400ns or the
> >	100ns as stated?  I have a feeling that a write *operation*
> >	actually requires but 100ns, but a write *instruction*
> >	requires 400ns to execute.
> 
> You're getting really warm. A write *cycle* takes 978ns just like a read cycl
> but the actual reading and writing takes different amounts of time depending
> on which part of the system is doing it. A write *instruction* takes from 3 t
> 5 (6 maybe?) cycles depending on which addressing mode you use, and each of
> those cycles takes 978ns (except in the case of the "long" cycle; these happe
> at the end of every video scan line).
> 
> >Can anyone clarify which is the case?  How long does it actually take?
> 
> As far as the CPU is concerned, the actual write takes 100ns. But there's oth
> stuff that has to happen, and so it really takes more like 700ns or so; the C
> has to feed out an address and the memory has to interpret and prepare to tak
> the data, before actually getting it. Since there is also overhead in the CPU
> switching to the next address and read/write operation, the overall cycle tim
> is usually 978ns and this is enforced by the master timing generator.
> 
> This gets really complicated if you want to dig in any deeper -- I heartily
> recommend Understanding The Apple II by Jim Sather, and The Apple II Circuit
> Description. Both of these are great books for making sense of the intricate
> elegance that is the Apple II.
> 
> Todd Whitesel
> toddpw @ cco.caltech.edu

Todd, you elequently scribed the following:

|This gets really complicated if you want to dig in any deeper
|-- I heartily recommend Understanding The Apple II by Jim Sather,
|and The Apple II Circuit Description. Both of these are great
|books for making sense of the intricate elegance that is the Apple II.

Where can I get _The Apple II Circuit Description_?  Does anyone have
a copy they'd be willing to part with?            Thanks,   Larry

larry@lablues.UUCP
FidoNet:  1:132/300 Larry Schneider

     / 7: "Wovon man nicht sprechen kann,  |  Larry Schneider
    /      darueber muss man schweigen."   |  Bright Software
   /                                       |  P. O. Box 120
  /         Ludwig Wittgenstein            |  Exeter, ME
 /     Tractatus Logico-Philosophicus      |       04435-0120
(__________________________________________|  207=379-3181
Newsgroups: comp.sys.apple2