From: sundar@Warren.MENTORG.COM (Sundaram Natarajan)
Subject: REPOST - PRESS RELEASE - ATPG TOOLS FOR ASIC & IC DESIGN
Organization: Mentor Graphics, Silicon Design Division
Date: Mon, 28 Sep 1992 16:23:38 GMT

I apologize for my previous posting wherein the text format was
a mess.

====================================================
FOR IMMEDIATE RELEASE

For more information, contact:

Laura Barber
Mentor Graphics Corp.
(503) 685-7000


MENTOR GRAPHICS DELIVERS ATPG TOOLS FOR IC AND ASIC DESIGN

Highest Performance, Flexibility Make Design-For-Test a Reality 
for IC, ASIC Designers

WILSONVILLE, Ore. Q Sept. 22, 1992 Q Mentor Graphics Corp. 
today announced the availability of two new automatic test 
pattern generation (ATPG) products that maximize fault coverage 
and minimize the number of test vectors in IC and ASIC design.  
The tools, FlexTest* and FastScan*, help optimize area, performance 
and testability when fully integrated into Mentor Graphics' 
top-down design environment and coupled with Mentor Graphics'
front-end design tools.  FlexTest and FastScan also operate 
as stand-alone test point tools.

This is the first element in Mentor Graphics plan to move 
test forward into the design environment, said Vin Ratford, 
marketing manager for test products at Mentor Graphics.  
We are already working with our users and key technology 
partners on the next round of products, which will include 
significant new functionality, like tighter integration with the  
Mentor Graphics user interface, IDDQ testing, improved support 
for boundary scan and BIST, improved RAM/ROM support and other 
features requested by our beta site customers, all of whom have 
extensive design-for-test experience.

FlexTest and FastScan were codeveloped by Mentor Graphics and 
CheckLogic Systems Inc. of San Jose, Calif.  The companies 
announced their joint development relationship in March.  These 
ATPG tools are really third-generation products that leverage the 
experience of CheckLogic staff who worked on similar products 
at AT&T and IBM, said Michael Chang, president of CheckLogic Systems.

Our work with the internal CAD groups at key Mentor Graphics customers 
told us that a tool like FlexTest, which accommodates varying levels 
of design-for-test, was required, said Chang.  But for large designs 
with a commitment to full scan, users indicated the need for the 
optimized product that became FastScan.  As an early user of the 
FastScan ATPG, Hughes Aircraft Company has applied the product to 
generate tests for a variety of designs, from 10,000 gates all the way 
to 100,000 gates.  Lightning speed and high fault coverage are 
FastScan's strong suits, said David Nip, scientist at Hughes Space 
and Communications Company.

The speed of FastScan allows designers to explore multiple design 
alternatives in a day and still consider testability issues, said 
Daniel Fu, member of the technical staff at Hughes Radar Systems Group.

PRODUCT DETAILS

FlexTest is ideally suited for ASIC and full-custom IC designs that 
do not involve extensive use of design-for-test (DFT) methodologies.  
When combined with Mentor Graphics AutoLogic synthesis tools or 
Idea Station front-end design solution, FlexTest automatically 
generates high-fault coverage test patterns for sequential, partial 
scan and full scan designs with minimal user intervention.  
Constraint-driven test synthesis capability is also provided for 
users who choose to use a partial scan approach to improve 
design testability.

By contrast, FastScan is a comprehensive ATPG tool optimized for 
full-scan designs.  FastScan offers the highest test pattern 
generation speed commercially available, and is capable of developing 
test vectors for chips in the 100,000-gate-range in less than 
one hour on a SPARC workstation.  FastScan is capable of supporting 
designs up to one million gates.  FastScan generates higher than 99.9% 
test coverage, supports self-test analysis of BIST designs, and has a 
powerful test pattern compressor that reduces test vector sets by 
50% to 70%, reducing test time.  FastScan also enables 
the user to diagnose defective chips,  providing important information 
for correcting yield and quality problems.

Both FlexTest and FastScan output a compact vector set that can be 
ported directly through third-party translators to a wide variety 
of automatic test equipment.
FlexTest and FastScan are integrated into the Mentor Graphics Falcon 
Framework for Concurrent Design and leverage Mentor's AMP modeling 
technology, which supports simulation, synthesis and ATPG.  Both ATPG 
tools are included in the company's aggressive ASIC kit development 
program.  When used in a standalone application, both support a 
netlist interface, including support for EDIF, Verilog and TDL format.  
A design rules checker validates the database prior to an ATPG run.

The tools support functional models, including combinational and 
sequential elements, such as flip-flops and latches, tri-state gates, 
busses, and transistors; both handle global feedback and gated- 
and multiple-clock asynchronous circuits; and both tools identify 
redundant faults, making it easier for users to improve their designs.
Availability FlexTest and FastScan are available immediately on 
Hewlett-Packard 400 Series and 700 Series platforms and on the Sun 
SPARC platform.  
CheckLogic Systems Inc. was established in 1988 with the mission to 
become the leading supplier of design-for-test solutions for the 
electronics industry.  Since its inception, CheckLogic has worked 
closely with its technology partners and developed advanced 
technologies in fault simulation and automatic test pattern generation.  
The company is located at 2290 North First Street, Suite 215, San Jose, 
California 95131.

Mentor Graphics Corporation (NASDAQ:MENT), Wilsonville, Oregon, was 
established in 1981 to design, manufacture, market and service 
electronic design automation (EDA) systems.  The company is a leader 
in worldwide EDA sales, with revenues of $390,976,000 over the 
past 12 months.  The company currently employs approximately 
2,300 people.  In addition to its corporate offices in Wilsonville, 
Mentor Graphics has sales and support offices in locations worldwide.  
The company's headquarters are located at 8005 S.W. Boeckman Road, 
Wilsonville, Oregon 97070-7777.

###

Idea Station and Falcon Framework for Concurrent Design are registered 
trademarks and FlexTest, FastScan, AutoLogic, and QuickSim II are 
trademarks of Mentor Graphics Corporation.  SPARC is a trademark 
of Sun Microsystems.