From: lindblad@cc.helsinki.fi
Newsgroups: comp.sys.amiga.advocacy
Subject: Re: Jerry "knows" 486's faster than 68040.
Date: 8 Apr 92 18:52:27 GMT
Organization: University of Helsinki

In article <1992Apr7.155403.1226@nic.unh.edu>, pss1@kepler.unh.edu (Paul S Secinaro) writes:
> In article <1992Apr7.165843.1@cc.helsinki.fi> lindblad@cc.helsinki.fi writes:
> 
>>Wrong Jerry.
>>Do not belive in benchmarks so blindly. Benchmarks are too dependent on other
>>things (compilers, external caches etc.).
> 
> So are your comparisons below (i.e. dependent on lots of factors).

Me? No, I'm drinking beer.

>>68040 instrucions are in average perhaps 30-50% faster than equivalent 486
>>instrcutions while instruction set on both is comparable.
> 
> Are you saying that you can look at any given 486 instruction, and the
> comparable '040 instruction is 30-50% faster? (I don't have any 486

Yes.

> specs on hand, so I can't say for sure).  Most comparisons I've seen
> show a fairly even split between the '040 and '486 in speed of various
> integer instructions.


No they aren't, you better RTFM. 


> You can't just count instruction cycles and then average them out over
> the whole instruction set, because not every instruction is used
> equally often.  You have to define, in some way, what a "typical

Of course not, but what I said was that most equalent instructions are fater
                                             ^^^^^^^^
(50% or so) on 040. you can check that from any source.

> execute.

If we assume that instruction set on both 040 and 486 is 

>>68040 has 8 general purpouse registers and 7 general purpouse data registers
>>(all 32 bit). Didn't 486 have 2 *general purpouse* registers and several
>>others? That means more register shuffle on 486.
> 
> Yes, this is a point in favor of the Moto architecture, IMHO.

Thank's. Somehow some Intel fanatics don't belive it.

>>68040 has copyback mode on it's data cache.
> 
> I'm not sure about the 486 on this one.

All 486 before the 50 MHZ version DO NOT have it. 50 version was supposed to
have it, but....

>>68040 has separate data & instruction cache, both are 4k. 80486 only one
>>unified cache of 8k.
> 
> It's going to be pretty hard to quantify the performance benefits of
> different cache architectures on paper.

Well, most (all) magazines and books tend to notify that separate caches are
better in multitasking environment.

>>FMUL on 486 takes 16 clocks, on 68040 it takes 5 clocks. FADD takes 10 on 486,
>>3 on 68040, DIV takes 73 on 486, 37 on 68040. To me it seems that floating
>>points seem to go 3 times faster. Also to much hated MFLOPS: Intel claims it's
>>486@25 to have 1 MFLOPS while Morotola claims 3.5 MFLOPS @ 25 MHz. And floating
>>point instructions are quite similar on both floating point units.
> 
> As has been mentioned before, even in FP intensive applications (which
> does not include most common apps), integer instructions still make up
> the most of code being executed most of the time by the user (unless
> maybe you're into heavy simulation, graphics, etc.).  Consider all the


True.

> processing that must be done to handle the GUI, OS context switching,
> I/O, loop overhead, etc.  And that's just while the FP intensive loop
> is being run.  What about all the time the user spends entering the
> data, editing, reading the newsfeed :-), etc.

But the comparision was of the speed of 040 and 486. Not the programs and OS.
Insructions on 040 do execute faster.

> I don't dispute that the '040 has faster floating point (in fact, I
> think it's a really nice chip), but it's somewhat misleading to factor
> that in to the overall performance figure.  The number of users who

Of course. It is a lot faster than 486 on flots, but only 50% faster on
integers.