HDTenEightyP/NetNews huggingface dataset:
From: heller@cs.umass.edu (Robert Heller)
Newsgroups: comp.sys.m68k
Subject: Re: Need Help with "MAI Basic-Four"
Date: 11 Jan 93 13:57:33 GMT
Organization: COINS, UMass, Amherst

In article <1993Jan10.214814.25184@mcs.anl.gov>, hanscom@atlantis.eid.anl.gov (roger hanscom) writes...
>> I've just been given an MAI Basic-Four system.  It is 68010 based and
>> runs what appears to be a UNIX derivative called "UNOS".  It may have
>> been developed by Charles River Data Systems.  The machine has two
>> serial terminals hung on it, and it boots up from the hard drive with
>> no problems.  Unfortunately, it puts up a login prompt on the screen,
>> and accepts userid and password.  The system was a discard from a small
>> business and there are no employees who remember any valid
>> userid/password combinations.  Is there anybody out there who can help
>> me get on this sytem and remove the passwords??  It looks like a very
>> useful machine, if I can get by the login sequence.  Also when trying
>> userid/password combinations, I have had no success and then eventually
>> power it off.  Booting it again later, I encounter errors that appear to
>> result from powering it off with mounted file systems.  Is there an
>> accepted shutdown sequence??  Does one have to login as "root" to run
>> it?
>>  
>> Questions, questions, questions...........
>>  
>>        Thanks in advance       Roger         hanscom@athens.eid.anl.gov

If it is a UNIX-type system, it might be posible to make it boot "single user" mode.  Can you get it to come up in its boot monitor (without actually booting up UNOS)?  If so, you might try adding "-s" after the UNOS boot string (i.e. boot <diskname>(0,0,0)vmunix -s).  If this works, the system will come up in single user mode with the Bourne shell as root.  From there you can mess with /ets/passwd (where the user ids live) all you like...  Note:  this will only work on the console port.  One of the tty po

rt must be /dev/console (it will be the same one with the error messages when you powered it up after shuting it off).

If it is UNIX, you really should use the shutdown command (or at least run sync several times) before turning off the machine.

		Robert Heller
InterNet:	Heller@CS.UMass.EDU
BIX:		locks.hill.bbs
FidoNet:	1:321/153 (Locks Hill BBS, Wendell, MA)
CompuServe	71450,3432
From: EJMOLER@LBL.GOV (edward moler)
Newsgroups: comp.sys.m68k
Subject: Re: Source for circuit?
Date: 12 Jan 1993 01:54:04 GMT
Organization: LBL
Distribution: usa
Reply-To: EJMOLER@LBL.GOV (edward moler)
NNTP-Posting-Host: ux5.lbl.gov


	I know that Horowitz and Hill give this circuit in THE ART OF
ELECTRONICS, 2nd ed.
From: zkessin@chaos.cs.brandeis.edu (Zach K)
Newsgroups: comp.sys.m68k
Subject: more on m68k boot
Keywords: boot fuction control pins
Date: 12 Jan 93 01:36:14 GMT
Organization: Brandeis University

I have been trying to figure out how to boot on a 68000/008/010 and
have seen various methods of figuring out how to have rom at $0000 but
ram at $008-$3FF, one thing I noted was that the restart vectors are
in the supervisor program space while everying else is in supervisor
data, so can I use the fc[0-2] pins to remap the low few words of the
address space in supervisor program only to somewere else in my
address map.

Does this idea make sense? it seams easer than trying to have the
computer on boot clear a bit somewere and in doing so remap the rom?

any ideas? 

ps is there a FAQ for this group? in not mabey we should have one.

--Zach
  Zachary Kessin  zkessin@cs.brandeis.edu
 real.world: I don't think the news server gets that group!    
Newsgroups: comp.sys.m68k
From: TMKT76@waccvm.corp.mot.com (Daniel Fusils)
Subject: Re: 68332 Vih question
Organization: Motorola
Date: 6 Jan 1993 13:01:10 MST

>In the MC68332 User's Manual (MC68332UM/AD) in section 10-5 (DC
>characteristics) it says that the input high voltage should be min.
>0.7 x Vdd. This means that, using a 5 V power supply, the input voltage
>should be min. 3.5 V. This seems a bit high to me, because it would
>mean that one cannot connect directly to LS TTL logic, SRAMs or
>EPROMs.
>While checking Motorola's own M68332EVS schematics, I noticed that they
>connect an AM27C1024 and an MCM6206 directly to the 332, without any
>pullups or anything. Both chips have a min. Voh of 2.4 V, so I guess
>this example shows that the databook must be in error.

No, it's not |||
Most of the memories are designed to be 1 Logical Unit TTL-LS compatible.
As the input stage of the '332 are CMOS, there's a low current drawn from
the memory chips ie the outputs of those device are much above the VOHmin
of 2.4V (somewhere above 4.0).  So it works.
Remember that VOH min is measured when the device sinks 4 mA.

>I was wondering if the spec is in error, or that I really have to take
>special precautions.
>
This works if you  use HCMOS devices (eg 74HCxxx for  any glue logic) and
you don't load too  much the '332 I/O (say 4-5 max  devices).  If you use
74LS devices, you must add pullups (typ. 10k).
Newsgroups: comp.sys.m68k
From: deraadt@newt.cuc.ab.ca (Theo de Raadt)
Subject: Re: A few Questions on the 68000 and 68008...
Organization: little lizard city
Date: Mon, 11 Jan 1993 19:05:47 GMT

In article <1993Jan11.150601.25120@cc.gatech.edu> byron@cc.gatech.edu (Byron A Jeff) writes:
   The problem is that typically you'd like the reset and stack vectors to be
   in EPROM, and the rest in RAM. Since the IVT can't be moved two basic choices
   are available:

   1) Have the whole IVT in EPROM. In this case a decoder is fine, the RAM is
      not at $0000 because the EPROM is.

   2) Boot from the EPROM then relocate it. This is where the PAL is handy
      because you can program the states into it. Basically a reset causes
      a state where the EPROM is mapped to $0000. After the reset vector and
      initial stack is read (first 8 reads for a 68008, first 4 for a 68000)
      the state changes mapping RAM to $0000 (so it now contains the IVT) and
      the EPROM somewhere else.

On a 68008, since it takes 8 cycles to fetch the start vectors, this is
trivally implimented with a single 8 bit shift register. Set it up to parallel
load '1' on all 8 input lines. Hook up the reset line to force a parallel load.
Shift in a '0' on the serial input. Clock it with the 68008's AS* line. The
output of this shift register will be '1' for 8 bus cycles after reset, then
it will go low.

Generate two memory selects: one for ram, one for rom. XOR each of them
with the output line from the above shift register. Voila, you now have
chip selects that are swapped for the first 8 cycles of memory access.

The 68008, taking 8 bus cycles, is the easiest. With the the 68000 you
can do it by hooking up the low 4 parallel-load lines to '1' and the other
4 to '0'. On the 68020/30 since it's only 2 cycles, you can hack with
a 7474. They could have made it a bit easier.... put a BOOT* line on the
processor..
 <tdr.
--

This space not left unintentionally unblank.		deraadt@newt.cuc.ab.ca
From: te@ohm.york.ac.uk (Terry Edhouse)
Newsgroups: comp.sys.m68k
Subject: DMA & I2C on SCC68070 processor
Keywords: DMA I2C 68000 68070 motorola help
Date: 7 Jan 93 15:30:49 GMT
Organization: Electronics Department, University of York, UK

Has anybody out there had any experience using the SCC68070
microprocessor from Philips?

I am trying to get the I^2C and DMA facilities working but have run
into a few problems.

The first problem is that the DMA does not seem to work at all. 
After initialising the appropriate registers I start the DMA
channel, and it justs sits there.  It does not matter what sort of
operation I try it's allways the same result, NOTHING.

The second problem is with the I^2C bus.  Everything works ok but I
cannot get it to generate a STOP bit.

If anyone can help please E-MAIL me rather than posting a reply as I
may miss it.

Thanks in advance,

Terry Edhouse.
te@ohm.york.ac.uk
Newsgroups: comp.sys.m68k
From: gcall@systemname.uucp (Glen Call)
Subject: Re: CPU/FPU wiring
Originator: gcall@
Organization: Motorola Computer Group Marketing
Date: Thu, 7 Jan 1993 15:35:50 GMT


In article <1993Jan6.165832.18756@schbbs.mot.com>, TMKT76@waccvm.corp.mot.com (Daniel Fusils) writes:
|> >I'm interested to wire a system, which will be put to
|> >68000 socket. It should contain a 68882 at 24mzh and
|> >a 68010 with half that speed (My memory is 16bit thats
|> >why 68010). System should have a 68851 MMU too.
|> 
|> I don't think putting a 68851 with a 68010 is a good idea, since the
|> protocole exchanged between a 68020 and the '851 is microcoded.
|> Same comments for 68882. Even if you want to stick with a 16 bit memory,
|> why don't you put together an '020 + '881 (or '882) + '851 (connected
|> in 32 bit mode) and your 16 bit mem using the dynamic bus sizing
|> mechanism?

Better yet, why not combine a 68030 and 68882 and do the same trick.  I'm not a
H/W type, but I've heard of people doing this very thing.  I wouldn't be
surprised if someone has marketed a mezzanine board of this type.  Anyone out
there in net-land know of such a product?  If not, how about a do-it-yourself
project?

If you do replace a M68000 with a MC68020 or MC68030, be advised that the
exception handling will need some enhancement.  Read The Fine Manuals.

Glen
------------------------------------------------------------------------------
Glen Call                          Technical Marketing Systems Engineer
Motorola Computer Systems, Inc.    gcall@phx.mcd.mot.com or mcdapps!gcall
M/S DW212                          phone: (602) 438-3408
2900 S. Diablo Way                 pager: 1-602-244-3252 Pager#2818 (digital)
Tempe, AZ 85282                    FAX:   (602) 438-3534
Newsgroups: comp.sys.m68k
From: benst@olivetti.nl (Ben Stuyts)
Subject: 68332 Vih question
Summary: Databook says Vih should be > 0.7 Vdd
Keywords: 68332 interfacing voltage
Organization: Olivetti Systems & Networks, Nederland
Date: Tue, 5 Jan 1993 22:14:28 GMT

Dear net,

I have a question about the required input voltages of the MC68332.

In the MC68332 User's Manual (MC68332UM/AD) in section 10-5 (DC
characteristics) it says that the input high voltage should be min.
0.7 x Vdd. This means that, using a 5 V power supply, the input voltage
should be min. 3.5 V. This seems a bit high to me, because it would
mean that one cannot connect directly to LS TTL logic, SRAMs or
EPROMs.

While checking Motorola's own M68332EVS schematics, I noticed that they
connect an AM27C1024 and an MCM6206 directly to the 332, without any
pullups or anything. Both chips have a min. Voh of 2.4 V, so I guess
this example shows that the databook must be in error.

I was wondering if the spec is in error, or that I really have to take
special precautions.

Thanks,
Ben Stuyts (benst@olivetti.nl)

Disclaimer: Olivetti has nothing to do with this.
Newsgroups: comp.sys.m68k
From: fredch@phx.mcd.mot.com (Fred Christiansen)
Subject: Re: The end of the MC680X0 UNIX era?
Organization: Motorola Computer Group, RT Software
Date: Tue, 12 Jan 1993 18:38:16 GMT

In article <1993Jan12.053218.12579@tscs.com> gerard@tscs.com (Stephen M. Gerard) writes:
>I have found all to be excellent processors
>and was looking forward to a 68060.  I now have reason to believe that
>there will be no such beast.
>
>The reason for my dismal expectations is that I hear that Motorola will
>not be releasing System V Release 4 for the 680X0 family.  The only
>reasonable conclusion that this leaves is that there will be *NO* future
>processors in the 680X0 family [..]

You're assuming that Motorola is a totally integrated whole, when it
is actually many parts fairly loosely connected.  The 68k and 88k family
chips are made/designed in Austin by various chip design groups.  These
groups have historically worked with OS vendors, including Unix vendors
such as Unisoft, to ensure OS support .. quite independently of what the
Computer Group does with Unix.  That MCG has selected 88k platforms
as the only host environment for the SVR4 port should in no way be
construed as reflecting upon the future of the 68k family.  My guess
(disclaimer:  I'm no spokeperson.  I just have opinions which Marketing
usually does not inquire about.) is that it's a resource issue; fully
supporting 68k and 88k hosts for both R3 and R4 Unix would require a certain
amount of resources which the higher-ups may not feel we have.
-- 
Fred Christiansen, Motorola, 2900 S Diablo Way, Tempe, AZ 85282  "Canajun, eh?"
fredch@phx.mcd.mot.com  ||  uunet!phx.mcd.mot.com!fredch  ||  +1 602-438-3464
  ".. I have set before you Life and Death, blessing and cursing;  therefore
      choose Life, that both you and your children may live"  Deut 30:19
From: tom@afthree.as.arizona.edu (Thomas J. Trebisky)
Newsgroups: comp.sys.m68k
Subject: What is this thing???
Date: 6 Jan 93 18:32:58 GMT
Organization: University of Arizona, Tucson, AZ


At an auction recently, I purchased an interesting piece of equipment
that some Motorola expert may be able to identify for me.  It is a big
card cage (takes two men to move) with about 20 slots holding cards roughly
2 by 2 feet in size.  Manufactured by Motorola as a "memory subsystem"
Slots are labeled (left to right):

 F E D C B A 9 8 7 6 5 4 3 2 1 0 ACC -- ECC USER+IO USER+IO USER

 Slots 9 thru 2 are occupied with RAM boards:	MMS4311
	each has 1Meg of RAM in 64k by 1 dynamics
	each is 1/2 populated (could hold 2Meg)
	(or maybe it is 2Meg and could be 1Meg)

 ACC slot has a board with a 68A01 with RAM, ROM, and interface logic.
 ECC slot has a MMS4330 board
 USER+IO has a MMS3354 prototyping board

It also has a front panel with a hex keypad, Moto part number MMS3823.

Again, the crate and the MMSxxxx cards were made by Motorola.

----------------

Surely, all this RAM was not bank switched for the poor little 68A01.
What is this thing, anyone know?
It is definitely not a VME or Versabus crate.
--
	Tom Trebisky	ttrebisky@as.arizona.edu
"Did you know that 500,000 trees are consumed in America each week
to produce our Sunday newspapers.  Never mind recycling, why even
take the paper?"
From: miket@frog.CRDS.COM (Michael C Tiernan)
Newsgroups: comp.sys.m68k
Subject: Re: Need Help with "MAI Basic-Four"
Date: 12 Jan 93 22:40:24 GMT
Organization: Charles River Data Systems

hanscom@atlantis.eid.anl.gov (roger hanscom) writes:
>I've just been given an MAI Basic-Four system.  It is 68010 based and
>runs what appears to be a UNIX derivative called "UNOS".  It may have
>been developed by Charles River Data Systems.

	Yup, you got that right.  Great system too!  (Okay, I'm biased!)

	You can call me at:
		Charles River Data Systems
		983 Concord St.
		Framingham, MA. 01701
		P: (508) 626-1000
		F: (508) 626-1046

 > Is there anybody out there who can help me get on this sytem and remove
 > the passwords??

	Piece of cake.  When you call me, do it from a phone near the
	machine and we'll fix it right away.

>Questions, questions, questions...........

	Answers, answers, answers.  :)

>       Thanks in advance       Roger         hanscom@athens.eid.anl.gov

	You're welcome.

	So you know.  UNOS is a Real-time UNIX SysV system that we
	produce.  Small and fast, it is quite a nice system to work
	with.
-- 
<< MCT >>  Michael C Tiernan. - GEnie:M.Tiernan - AOL:M Tiernan/BCS Mike 
UUCP = alfalfa!pro-angmar!m.tiernan OR miket@frog.UUCP
      It's too bad that it takes almost half of our life
	to realize that it was a "Do-It-Yourself" project.
From: cyberman@exucom.com (Stephen R. Phillips)
Newsgroups: comp.sys.m68k
Subject: Re: What is this thing???
Date: 9 Jan 93 17:37:38 GMT
Organization: ExuCom Multimedia Inc.
X-Newsreader: TIN [version 1.1 PL8]

Thomas J. Trebisky (tom@afthree.as.arizona.edu) wrote:

: At an auction recently, I purchased an interesting piece of equipment
: that some Motorola expert may be able to identify for me.  It is a big
: card cage (takes two men to move) with about 20 slots holding cards roughly
: 2 by 2 feet in size.  Manufactured by Motorola as a "memory subsystem"
: Slots are labeled (left to right):

:  F E D C B A 9 8 7 6 5 4 3 2 1 0 ACC -- ECC USER+IO USER+IO USER

:  Slots 9 thru 2 are occupied with RAM boards:	MMS4311
: 	each has 1Meg of RAM in 64k by 1 dynamics
: 	each is 1/2 populated (could hold 2Meg)
: 	(or maybe it is 2Meg and could be 1Meg)

:  ACC slot has a board with a 68A01 with RAM, ROM, and interface logic.
:  ECC slot has a MMS4330 board
:  USER+IO has a MMS3354 prototyping board

: It also has a front panel with a hex keypad, Moto part number MMS3823.

: Again, the crate and the MMSxxxx cards were made by Motorola.

: Surely, all this RAM was not bank switched for the poor little 68A01.
: What is this thing, anyone know?
: It is definitely not a VME or Versabus crate.

Probably not.  My guess is that it uses the wonderful DAT chip.
The DAT chip is a Dynamic Address Translation chip.   Basically it
is a MMU or memory managment unit.  The memory is PAGED into 4k pages that
can be mapped anywhere in 6800/01/09 memory.  which is 64k.  They must
have the ROM copyable into RAM on bootstrap.  Likely you are looking at an
OS9 beast.  You might post on comp.os.os9

Cyberman - I loved to machines :)
-- 
This is my sig file!
Read rec.games.programer!
Newsgroups: comp.sys.m68k
From: gcall@systemname.uucp (Glen Call)
Subject: Re: S-Record types
Originator: gcall@
Organization: Motorola Computer Group Marketing
Date: Thu, 7 Jan 1993 23:56:05 GMT


In article <969@quirm.terminus.ericsson.se>, srl@terminus.ericsson.se (Steve Langstaff) writes:
|> This may not be the correct newsgroup for this question, if so then sorry.
|> 
|> Could anyone fill out the following table of Motorola S-Record types:
|> 
|> S0 optional sign on record

S0  The header record for each block of S-records.  The code/data field may
    contain any descriptive information identifying the following block of
    S-records.  Under an operating system, a resident linker command can be used
    to designate module name, version number, revision number, and description
    information which will make up the header record.  The address field is
    normally zeroes.

|> S1 4 character address data record

S1  A record containing code/data and the 2-byte address at which the code/data
    is to reside.

|> S2 6 character address data record

S2  A record containing code/data and the 3-byte address at which the code/data
    is to reside.

|> S3 8 character address data record

S3  A record containing code/data and the 4-byte address at which the code/data
    is to reside.

|> S4 ?

Beats me.  Never needed it.  Anybody else out there know about S4's?

|> S5 ?

S5  A record containing the number of S1, S2, and S3 records transmitted in a
    particular block.  This count appears in the address field.  There is no
    code/data field.

|> S6 ?

This is another I've never encountered.  Maybe someone else can help.

|> S7 S3 block termination record

S7  A termination record for a block of S3 records.  The address field may
    optionally contain the 4-byte address of the instruction to which control is
    to be passed.  There is no code/data field.

|> S8 ?

S8  A termination record for a block of S2 records.  The address field may
    optionally contain the 3-byte address of the instruction to which control is
    to be passed.  There is no code/data field.

|> S9 end of file record

S9  A termination record for a block of S1 records.  The address field may
    optionally contain the 2-byte address of the instruction to which control is
    to be passed.  Under an operating system, a resident linker command can be
    used to specify this address.  If not specified, the first entry point
    specification encountered in the object module input will be used.  There is
    no code/data field.

|> 
|> any others?

You want more???

|> 
|> ---
|> 
|> | Steve Langstaff - Ericsson CAMTEC |
|> 
------------------------------------------------------------------------------
Glen Call                          Technical Marketing Systems Engineer
Motorola Computer Systems, Inc.    gcall@phx.mcd.mot.com or mcdapps!gcall
M/S DW212                          phone: (602) 438-3408
2900 S. Diablo Way                 pager: 1-602-244-3252 Pager#2818 (digital)
Tempe, AZ 85282                    FAX:   (602) 438-3534
Newsgroups: comp.sys.m68k
From: ted@telematics.com (Ted Goldblatt)
Subject: Re: state of data bus during write of byte
Organization: Telematics Intl., Inc.; Ft. Lauderdale, FL
Date: Fri, 8 Jan 1993 14:49:15 GMT

In article <1ihk6gINNlve@uniwa.uwa.edu.au> john@gu.uwa.edu.au (John West) writes:
>iikoch@techfak.uni-bielefeld.de (Ingolf Koch) writes:
>
>>What about other 680x0 (especially the 68040)?
>
>I think it copies the data onto all parts of the bus, but I can't find
>the relevant bit in the book. Actually, I think it must, or the dynamic
>bus sizing won't work.

Moto must have forgotten to do this on the `040 - that's why
dynamic bus sizing doesn't work :-).

Actually, this is a :-(, since most systems need the dynamic bus
sizer feature, at least for ROM references, and you're stuck
either doing custom outboard logic or using the 68150, both of
which "solutions" cost board real estate and prop delay.

Question for Moto person: was dynamic bus sizing left out of the
`040 due to transistor budget limits (or really, room for the
"wires"), or because it was thought (at the time) that the
feature wasn't really needed?

ted
-- 
Ted Goldblatt    ted@telematics.com     (305) 351-4367
    Telematics Intl., Inc.   Ft. Lauderdale, FL
From: TMKT76@waccvm.corp.mot.com (Daniel Fusils)
Subject: Re: CPU/FPU wiring
Organization: Motorola
Date: 6 Jan 1993 12:25:38 MST

>I'm interested to wire a system, which will be put to
>68000 socket. It should contain a 68882 at 24mzh and
>a 68010 with half that speed (My memory is 16bit thats
>why 68010). System should have a 68851 MMU too.

I don't think putting a 68851 with a 68010 is a good idea, since the
protocole exchanged between a 68020 and the '851 is microcoded.
Same comments for 68882. Even if you want to stick with a 16 bit memory,
why don't you put together an '020 + '881 (or '882) + '851 (connected
in 32 bit mode) and your 16 bit mem using the dynamic bus sizing
mechanism?
This stuff is pretty well described in the appnote AN944/D (consult
your closest Mot rep).

>The problem is to find out enough technical info, so
>I can make approiate logic to split that FPU on a
>16bit bus and make it work with 7mzh mother board
>asynchronously

This is pretty well described in the appnote AN947/D (consult
your closest Mot rep).
From: jap7g@fermi.clas.Virginia.EDU (Jim Alan Pisano)
Newsgroups: comp.sys.m68k
Subject: Serial I/O Rtns for 68681
Summary: Need software for interrupt-driven I/O for 68681
Keywords: Serial, 68681
Date: 6 Jan 93 13:47:11 GMT
Organization: Inova Corporation

I'm developing an embedded controller based on the 68000 w/ 68681 DUART.  I
need some software to do interrupt-driven serial I/O for the DUART.  I can
handle C or assembler with C being my first choice.  Since this is an
embedded system, there's no operating system so I require a complete set of
control routines for the DUART.

I am willing to buy a library (must have source code) or modify some
existing code.  Any help would be greately appreciated.

-Jim

P.S. Please send e-mail since I rarely read this news group.

--
 Jim Pisano                                           jap7g@Virginia.EDU    
 Route 16 Box 380                                     uunet!virginia!jap7g  
 Charlottesville, VA 22901                            (804) 973-2227