From: mou@nova.stanford.edu (Alex Mou)
Subject: Ph.D seeks position in Video compression system design
Reply-To: mou@nova.stanford.edu (Alex Mou)
Organization: Stanford University, Stanford CA
Distribution: na
Date: Wed, 29 Jul 1992 03:51:59 GMT

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Alex Z.J. MOU  Ph.D

E-mail:			mou@nova.stanford.edu

Office address:		STARLAB, EE Dept., Durand 243
			Stanford U., Stanford, CA94305
			phone: (415)-723-8106

Home address:		870 E. El Camino Real, #99
			Mountain View, CA 94040
			phone: (415)-390-8458

JOB OBJECTIVE

R&D position with opportunity to translate the state-of-the-art signal/image
/video processing techniques into high-performance HW/SW products.

HIGHLIGHTS OF PREVIOUS WORK

DSP:	Digital filter algorithms and structures;
	Fast Fourier Transform and Discrete Cosine Transform;
	Bidimensional convolution;
	Sub-band filter structures;
	Motion estimation;
	Variable length coding;
	Adaptive filtering and equalization;
	DSP algorithm design for microprocessors;
	DSP architecture design for VLSI implementation.

VLSI:   Architecture and logic design of a 40-tap FIR filter;
        A high-speed low-cost Discrete Cosine Transformer design;
        Tree-type multiplier conceptualization and design;
        New adder design using low power logic;
        3 patents in VLSI related domain.

        CAD tools: Magic,Spice,Cassiope,Epilog.


JOB EXPERIENCE

Since 11/91		EE Dept., Stanford University,
			Stanford, California.

Visiting scholar, working on the design of floating-point unit,
low-power circuits, 1-D&2-D filter optimization, MPEG implementation. 

10/89 - 10/91 		Dept. of Electronics, Telecom Paris U.
			Paris, France.

Research scientist, worked on high-speed high-precision low-cost DCT;
video codec; single-rate implementation of multi-rate systems
(sub-band filter banks,interpolator/decimator); low misadjustment
adaptive filters. Supervised students' research projects.

02/86 - 09/89		National Telecom Research Center (CNET)
			Issy-Les-Moulineaux, France.

Research associate, worked on fast digital filtering algorithms suitable
for DSP microprocessors; VLSI design of a high-speed digital filter for
an all-digital modem; 2-D FFT algorithms for real data. 

EDUCATION

1989    Ph.D.Electrical Eng., U. of Paris Sud, France.
1986    M.S.Electrical Eng., U. of Paris Sud, France.
1984    B.E.Electrical Eng., U. of Sciences and Tech. of China, PRC.

Ph.D. Dissertation: Fast FIR Filtering - Algorithms and Architecture
M.S. Thesis: Fast 2-Dimensional Fourier Transform Algorithms.

MISCELLANEOUS

IC design tools: Magic,Spice,Cassiope,Epilog;
Systems: UNIX,VMS,McIntosh;
INRIA fellowship 1991; French government scholarship 1985-1989;
Author of 3 patents and about 25 published technical papers;
Reviewer for IEEE journals; Member IEEE;
Amateur of ski, tennis, theater and bridge;
Speak English, French, Chinese.

VISA STATUS
              H-1. Authorized to work in the States.

References upon request

July 1992

APPENDIX: MAJOR PUBLICATIONS

Patents:

[1] P.DUHAMEL, Z.J.MOU, M.CAND, "Generalized multiplier and its
application to FIR filter implementation", French patent, No.FR 8801193,
filing date on Feburary 2,1988.

[2] Z.J.MOU, F.JUTAND, "Multiplieur cellulaire de type gradin inverse
et son procede de realisation", French patent, No.FR 9009629, filing
date on July 27, 1990.

[3] Z.J.MOU, F.JUTAND, "Codage programmable pour la calcul d'un produit
scalaire comportant un vecteur constant et son application a
l'implantation de la DCT", 
French patent, No.9011758, filing date September 24, 1990.

Journal publications:

[1] Z.J.MOU, P.DUHAMEL, "Fast FIR filtering: Algorithms and
Implementations", Signal Processing, pp.377-384, December, 1987.

[2] Z.J.MOU, P.DUHAMEL, "In-place Butterfly-style FFT of 2D real
sequences",  IEEE Trans. on ASSP, Vol.36, pp.1642-1650, October, 1988.

[3] Z.J.MOU, P.DUHAMEL, "Short-length FIR filters and their use in fast
non-recursive filtering",  IEEE Trans. on ASSP, pp.1322-1332, June 1991.

[4] Z.J.MOU, "Fast algorithms for computing symmetric/Hermitian
matrix-vector products", Electronics Letters, Vol.27, pp.1272-1274, July
4, 1991.

[5] Z.J.MOU, F.JUTAND, " 'Overturned Stairs' adder trees and multiplier design"
IEEE Trans. Computers, August, 1992, Special Issue on Computer
Arithmetic.

[6] Z.J.MOU,"Minimal structures for symmetric FIR filters of arbitrary length"
to appear in  IEEE Trans. on ASSP.

Conference papers:

[1] Z.J.MOU, P.DUHAMEL, "A unified approach to the fast FIR filtering
algorithms", Proceedings of IEEE ICASSP, pp.1914-1917, NY, USA, April
1988.

[2] Z.J.MOU, P.DUHAMEL, J.BENESTY, "Complex FIR filtering algorithms
with applications to real FIR and complex LMS filtering", Proceeding of
European Signal Processing Conference (EUSIPCO), pp.549-552, Barcelona,
Spain, September,1990.

[3] H.G.YEH, Z.J.MOU,  "A fast modified LMS algorithm for adaptive
filtering",  Proceeding of Latvian Signal Processing International
Conference, pp.401-405, Riga, USSR, April, 1990.

[4] H.G.YEH, Z.J.MOU, O.PEZE, F.JUTAND, N.DEMASSIEUX,  "Parallel
algorithms for least-squares minimization and their VLSI systolic array
architectures", International Symposium on Signal Processing and
its Applications, Australia,August, 1990.

[5] Z.J.MOU, H.M.ZHANG, "Fast SVD for angle-of-arrival estimation",
International Workshop on Algorithms and Parallel VLSI Architectures,
Pont-a-Mousson, France, Juin, 1990.
Reprint in "Algorithms and Parallel VLSI Architectures",
edited by E.F.Deprettere, Elsevier Science Publisheurs B.V., Amsterdam,
Holland, 1990.

[6] M.CAND, P.DUHAMEL, Z.J.MOU, "CMOS fast FIR filter", Proceeding of
EURO'ASIC Conference, Paris, France, May 1990.

[7] Z.J.MOU, F.JUTAND, "A class of close-to-optimum adder trees
allowing regular and compact layout", Proceeding of International
Conference on Computer Design, pp.251-254, Massachusetts, USA, 
September,1990.

[8] Z.J.MOU, A.SCHWARZ, F.JUTAND, "Design of Overturned Stairs tree
multipliers", Proc. IEEE International Symposium on Circuits and
Systems, Singapore, pp.1916-1919, June  1991.

[9] F.JUTAND, Z.J.MOU, N.DEMASSIEUX, "I/O schemes for video signal
processing: application to image filtering", Proc. IEEE International
Symposium on Circuits and Systems, pp.184-187, Singapore, June  1991.

[10] Z.J.MOU, F.JUTAND, "A high-speed low-cost DCT architecture for HDTV
applications", Proceedings of IEEE ICASSP, pp.1153-1156, Toronto,
Canada, May 1991.

[11] Z.J.MOU, "Novel use of symmetries in linear phase digital filters",
Proceedings of IEEE ICASSP, San Francisco, March 1992.


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