From: goli@hades.ecs.umass.edu (Praveen)
Newsgroups: misc.jobs.resumes
Subject: PhD ECE 2+ yrs exp, Computer Networks, Telecommunications, SW and HW
Date: 6 Nov 92 21:18:01 GMT
Article-I.D.: hades.GOLI.92Nov6161801
Expires: Sat, 5 Dec 1992 19:18:16 GMT
Reply-To: goli@zonker.ecs.umass.edu
Distribution: usa
Organization: University of Massachusetts at Amherst

Hi,

I am a graduate student in the Electrical and Computer Engineering
department at the University of Massachusetts and am currently
completing a doctoral degree.I am interested in exploring potential 
employment opportunities in the areas of computer 
networks, packet switching, protocols, networking software, multimedia 
systems and performance evaluation.

My Ph.D dissertation studies several aspects of the design, 
analysis and simulation of high speed packet switches. Particularly, 
my thesis focused on the performance of buffered banyan networks 
for high-speed switching.  The thesis compares the performance of 
different buffering schemes and also evaluates the performance of a 
variable bit rate video encoder to produce robust video transmission 
for multimedia applications. To simulate large networks, I have 
developed efficient processor synchronization and assignment techniques
that were incorporated in a simulator that runs on a Sequent
multiprocessor and achieves nearly linear speedup.  I have also worked 
in a number of different areas including scheduling algorithms for
real-time systems and parallel simulation. 
  
During my employment at AT&T Bell Laboratories and at OMC Computers
I have had the opportunity to get hands-on experience in the design and
implementation of systems.  In future I would like to pursue a career
that is a good mix of research and development in hardware and software.

I have enclosed a copy of my resume. I would be very happy to furnish 
any additional material at your request.  

Thank you for your time and consideration.  I look forward to hearing 
from you.

Praveen Goli


                                PRAVEEN KUMAR GOLI 

Dept. of Electrical and Computer Engg.	      Office: (413) 545-0715            
University of Massachusetts		      Res:    (413) 549-1367            
Amherst, MA 01003			      E-mail: goli@zonker.ecs.umass.edu 


INTERESTS:  Research, and development in ATM Networks, Telecommunications,
            Packet Switching, Protocols, VLSI Design, Multimedia Systems, 
            System Software and Performance Evaluation.
 
 
EDUCATION 

Ph.D.           Electrical and Computer Engineering         G.P.A. : 3.92/4.0
1988 - present  University of Massachusetts at Amherst, MA. 
                Dissertation Topic : Analysis and Simulation of 
                                     High-Speed Packet Switches
                              
M.S.            Electrical Engineering                      G.P.A. : 3.88/4.0 
1986 - 1988     Virginia Polytechnic Institute & State University, VA.  
                              
B.E.            Electronics and Communications Engineering  G.P.A. : 3.92/4.0 
1981-1985       Osmania University, India. 
                Honors :  Stood third among 300 graduating students.  

EXPERIENCE  

May'90 - Dec'91 Member of Technical Staff/Consultant 
                AT&T  Bell Laboratories, NJ. 

              - Analysis and simulation of crosspoint memory (PHOENIX chip) 
                and shared memory based fast packet switches for high-speed 
                networks based on Asynchronous Transfer Mode (ATM)) . 

              - Studied the performance and rate control measures for video 
                traffic in an ATM environment using trace-driven simulations. 

              - Developed a simulation package with a graphics interface under 
                Suntools and X-windows for performance analysis of 
                packet-switched networks.  
 
Aug'88-present  Research Assistant 
                University of Massachusetts at Amherst, MA. 
 
              - Developed efficient scheduling algorithms for real-time systems.
   
              - Developed new processor assignment and synchronization 
                mechanisms for parallel simulation of interconnection 
                networks on a shared memory multiprocessor. 
            
Jan'87-present  Teaching Assistant 
                Univ. of Massachusetts and Virginia Tech. 
 
              - Assisted with courses in Computer Architecture, Microprocessors,
                Digital Design, and VLSI Testing. 
              - Supervised experiments and projects for Computer Engineering 
                Laboratory. 

Jun'85 - Aug'86 Design Engineer 
                OMC Computers Limited, India. 
 
              - Proposed, designed and developed a 4MB DRAM interleaved 
                memory system for VME  bus. 

PUBLICATIONS 

(1)  Performance of a Crosspoint Buffered ATM Switch Fabric, 
     in IEEE Infocom, May 1992, pp. 426--435, with V.P.Kumar 

(2)  Combined Performance Study of a Fault-Tolerant ATM Switch and a 
     Video Compression System, in IEEE Globecom, Dec. 1991, pp. 1--8,
     with A.Reibman and V.P.Kumar 

(3)  Performance Evaluation of a Video Compression System and an ATM switch, 
     in International Workshop on Packet Video, Jan. 1991, pp. E4.1--E4.6,
     with A.Reibman and V.P.Kumar 

(4)  Processor Assignment and Synchronization in Parallel Simulation of
     Multistage Interconnection Networks, in Distributed Simulation, 
     pp. 181--187, San Diego, January 1990, (also available as 
     IBM Research Report RC 14814), with D.F.Towsley, P.Heidelberger and Q.Yu 

(5)  Approximate Minimum Laxity Scheduling Algorithms for Real-Time Systems,
     COINS Technical Report TR 90-88, Computer & Information Sciences, 
     Univ. of Massachusetts, Amherst, 1990, with J.F.Kurose and D.F.Towsley
 
(6)  Approximate O(1) Real-Time Scheduling Algorithms, submitted to 
     IEEE Journal on Real-Time Systems , with J.F.Kurose and D.F.Towsley 

(7)  Video Traffic in ATM Networks, to be submitted to IEEE Journal on 
     Selected Areas in Communication, with A.Reibman and V.P.Kumar 
 
  
PROJECTS  

   - Developed a  set-associative cache simulator for analyzing 
     various cache designs with LRU  replacement policy using a 
     reduced address trace.  

   - Architectural and functional simulation of an Array Processor 
     to solve Poisson Equation using Very High Speed Integrated Circuit 
     Hardware Descriptive Language (VHDL). 

   - Vectorized the program for ``Implicit and Explicit solutions of 
     Euler's equations'' on Alliant FX/8 at Argonne National Labs.
     Project involved identifying kernels and applying various 
     transformations for vectorization to improve the execution speed. 

   - Implemented a Shell, Device Driver for a disk controller, and 
     Deadlock Resolving algorithms for Unix. 

   - Designed a 16-bit Carry lookahead adder in 2micron CMOS technology. 

   - Simulated Intel 8212 chip in VHDL at behavioral and architectural levels.
 
   - Developed a parallel simulator for analyzing the traffic behavior of 
     multistage processor-memory interconnection networks. 
 

COMPUTER SKILLS
  
Languages:  C, C++, Pascal, FORTRAN 77, Assembly Languages of 80x86, 68000 
Systems:    Sequent Symmetry, Alliant FX/8, IBM 3090, Sun, and VAX 11/785   
Operating Systems: Dynix, Concentrix, UNIX, VMS, VM/CMS, MS-DOS   
Unix:       TCP/IP, Shell Programming, AWK
Tools:      X-Windows, Lex, Yacc, Berkeley CAD Tools, VHDL, 
            familiarity with Verilog



SELECTED COURSES  

Computer Networks       Computer Architecture    High-speed Networks     
Performance Evaluation  Operating Systems        Design & Analysis of Algorithms  
VLSI Design             Testing & Diagnosis      Fault Tolerant Computing  
Unix Internals          Signal Processing        Probability & Statistics 

AWARDS 
  
  - Eta Kappa Nu Honor Society. 
  - Govt. of India Graduate Scholarship 1985-86. 
  - State Special Merit Scholar 1981-85. 
  - Third Prize in National Mathematics Olympiad 1984. 
  - National Merit Scholar 1979-81. 
 

REFERENCES:
                    Prof C. Mani Krishna   
                    Dept. of Electrical and Computer Engg.  
                    University of Massachusetts, Amherst, MA 01003 
                    Phone: (413) 545-0766 
                    e-mail: krishna@ecs.umass.edu 

                    Dr. Vijay P. Kumar  
                    Room No. 4G-608 
                    A.T.&T Bell Laboratories, Holmdel, NJ 07733 
                    (908) 949-2014 
                    e-mail: vijay@vax135.att.com 

                    Prof Donald F. Towsley  
                    Dept. of Computer and Information Science 
                    University of Massachusetts, Amherst, MA 01003 
                    (413) 545-0207 
                    e-mail: towsley@cs.umass.edu 

                    Prof James F. Kurose  
                    Dept. of Computer and Information Science 
                    University of Massachusetts, Amherst, MA 01003 
                    (413) 545-1585 
                    e-mail: kurose@cs.umass.edu