HDTenEightyP/NetNews huggingface dataset:
From: sue@byron.u.washington.edu (Shu-Chen Eclipse)
Newsgroups: fj.mail-lists.x-window
Subject: Re: Hanging X11R4 server under AIX3.2.1
Date: 21 Aug 92 22:19:13 GMT
Distribution: fj
Organization: University of Washington, Seattle

Date: Thu, 20 Aug 1992 19:11:50 GMT
Message-Id: <1992Aug20.191150.13957@u.washington.edu>
Newsgroups: comp.unix.aix,comp.windows.x


Hellow,

how do I get my cursors and pointers to blink?
how do I change their sizes?

thanx for answering,
sue@byron.u.washington.edu
From: daniel@cassidy.europarc.xerox.com (Ian Daniel)
Newsgroups: fj.mail-lists.x-window
Subject: Sun Type 5 Keyboard
Date: 28 Aug 92 14:47:51 GMT
Distribution: fj
Organization: Rank Xerox

Date: 28 Aug 92 09:25:53 GMT
Message-Id: <1992Aug28.092553.16790@parc.xerox.com>
Newsgroups: comp.windows.x


Hi,


	We recently took delivery of 2 Sun IPX machines, and they have the "New" type 5 keyboard.....funny, looks like a PC keyboard to me....?

	Anyway, I would really like to be able to use the machine with X11R5, and can't because the keys are mapped differently to the "old" type 4 keyboard. I found nothing in the fixes for R5, so if anyone has any ideas on how to get around the problems , and get at least most of the functionality I'd appreciate it. Also, these are UK type 5s' just to make it even worse!!!



Thanks,


Ian (what was wrong with the type 4!!!???) Daniel.
From: andy@awds.imsd.contel.com (Andy Moskoff)
Newsgroups: fj.mail-lists.x-window
Subject: xman source code
Date: 27 Aug 92 04:47:40 GMT
Distribution: fj
Organization: GTE Contel Federal Systems, Westlake Village, CA

Date: 26 Aug 92 21:48:24 GMT
Message-Id: <1992Aug26.214824.14744@awds.imsd.contel.com>
Newsgroups: comp.windows.x


Hello,

I need the souce code for Xman ( need to make some mods), but I can't find it
in .../R4/tape-2. Does anyone know where I can pickup the source? Or if anyone
has the source can I ftp it? Thanks in advance.

-Andy
From: bmw@isgtec.com (Bruce M. Walker)
Newsgroups: fj.mail-lists.parallel
Subject: Re: Locks without using atomic instructions
Date: 1 Sep 92 13:42:55 GMT
Distribution: fj

In article <1992Aug31.124322.2555@hubcap.clemson.edu> iane@werple.pub.uu.oz.au (Ian Evans) writes:
> Let's say that there is a system (unfortunately there is) where some
> person (me) wants to get a few different computers communicating reliably,
> and the only available mechanism is reading a shared memory location, or
> writing a location, but there is no atomic set & test type instruction.
> It is possible, however, to get a unique system-wide process ID.

A working algorithm is described (in a Pascalish dialect) in "Operating
Systems Concepts", by Silberschatz et al.  I know it works because I've
tested it on an 8-cpu multiprocessor.

I translated it into C, and it's pretty small, so what the heck!
here it is ...

------ begin spinlock.c -----
/*
 * spinlock.c -- critical regions support
 *
 * This algorithm is from "Operating System Concepts, 2nd Ed., Peterson &
 * Silberschatz; Addison Wesley"; chapter 9, Algorithm 5.
 * Algorithm is due to Eisenberg and McGuire 1972.
 */

/*
 * Instructions:
 *
 * Define a spin-lock structure with the macro DEF_SPIN().
 * Lock a critical region by calling lock() and passing the address
 *  of a spin-lock structure to it.
 * Un-lock the critical region by calling unlock() with the same address.
 *
 * You must supply a routine my_proc_id() that yields a system-wide unique
 * integer identifier for each cpu, and a value for the macro MAX_CPU.
 *
 * Example:
 *
 *   DEF_SPIN(lck)
 *
 *   one_at_a_time()
 *   {
 *       lock(&lck);
 *       ...
 *       unlock(&lck);
 *   }
 */

#include "spinlock.h"

/*
 * attempt to lock a critical region; spin until successful.
 */
void
lock(SPIN *c)
{
	register int j, i = my_proc_id();

	for (;;) {
		c->flag[i] = WANT_IN;
		j = c->turn;
		while (j != i)
			if (c->flag[j] != IDLE)
				j = c->turn;
			else
				j = (j+1) % MAX_CPU;
		for (c->flag[i] = IN_CS;
		     j < MAX_CPU && (j == i || c->flag[j] != IN_CS);
		     j++)
			; /* empty */
		if (j >= MAX_CPU && (c->turn == i || c->flag[c->turn] == IDLE))
			break;
	}
	c->turn = i;
}

/*
 * unlock a critical region.
 */
void
unlock(SPIN *c)
{
	int j = (c->turn+1) % MAX_CPU;
	while (c->flag[j] == IDLE)
		j = (j+1) % MAX_CPU;
	c->turn = j;
	c->flag[my_proc_id()] = IDLE;
}
------ end spinlock.c -----

------ begin spinlock.h -----
/*
 * spinlock.h -- critical regions def'ns
 */

#ifndef _SPINLOCK_H_
#define _SPINLOCK_H_

typedef struct {
	int turn;
	int flag[MAX_CPU];
} SPIN;

/* flags */
#define IDLE	0
#define WANT_IN	1
#define IN_CS	2

#define DEF_SPIN(x)	SPIN x = {0}	/* initialize whole thing to zero */

/* critical.c */
void lock(SPIN *c);
void unlock(SPIN *c);

#endif /* _SPINLOCK_H_ */
------ end spinlock.h -----

ObEnjoy: Enjoy!

--
"The path of my life is strewn with cowpats from the devils' own herd."
                                          -- Edmund Blackadder II
bmw@isgtec.com   [ ...!uunet.ca!isgtec!bmw ]  Bruce Walker
From: parallel@netcom.com (B. Mitchell Loebel)
Newsgroups: fj.mail-lists.parallel
Subject: The PARALLEL Processing Connection
Date: 2 Sep 92 12:03:34 GMT
Distribution: fj

September 14, 1992 - Meeting notice -- The PARALLEL Processing 
Connection

MasPar - Supercomputing With a SIMD Architecture

The high performance computing world is becoming increasingly focused 
on MIMD based machines;  MasPar believes that the "MIMD hysteria" has 
clouded the real problem, delivering application performance. Their VP of 
Technology and Architecture, Tom Blank, will discuss the applications 
which best utilize the MasPar autonomous SIMD architecture. Tom is 
uniquely qualified to do this; it is our understanding that he was the prime 
developer of the architecture. Too, this will be the first public presentation 
of their new I/O system which provides solid state disk, I/O buffering and a 
shared extended memory with transfer rates up to 1GB/sec. As usual, we 
will explore third party opportunities for our members with MasPar. And 
we will want to know if they are targeting industrial and commercial 
customers for their machine.

The meeting will take place at 7:30PM at Sun Microsystems at 901 East San 
Antonio Road in Mountain View, California. This is just off the southbound 
San Antonio exit of 101; northbound travelers also exit at San Antonio and
take the overpass to the other side of 101.

Please be prompt; as usual, we expect a large attendance; don't be left out or 
left standing. There is a $8 fee for non-members and members are admitted 
free.

-- 
B. Mitchell Loebel                                      parallel@netcom.COM
PARALLEL Processing Connection                                 408-732-9869
From: sullivan@cs.rose-hulman.edu (Fred Sullivan)
Newsgroups: fj.mail-lists.parallel
Subject: shared memory multiprocessors
Date: 27 Aug 92 12:58:45 GMT
Distribution: fj

I am developing an introductory course in parallel computing and will
shortly be writing a proposal for equipment.  I would like like to have a
multiprocessor system which runs Unix with shared memory and some fairly
small number of processors (4?, 8?, 16?).  What is available for < $50,000?
I know that 4 processor Suns are available in that price range, but these
are really designed to be server machines and come with big disks.  What I
would like is something with more processors for less money.  I am not
particularly worried about absolute performance, since the machines would be
used primarily for teaching.


--
Fred Sullivan                           6060 Wabash Avenue
Computer Science Department             Terre Haute, IN  47803
Rose-Hulman Institute of Technology     sullivan@cs.rose-hulman.edu
From: parallel@netcom.com (B. Mitchell Loebel)
Newsgroups: fj.mail-lists.parallel
Subject: The PARALLEL Processing Connection
Date: 31 Aug 92 12:45:22 GMT
Distribution: fj

The PARALLEL Processing Connection is an entrepreneurial 
association; we mean to assist our members in spawning very 
successful new businesses involving parallel processing.

Our meetings take place on the second Monday of each month at 7:30 
PM at Sun Microsystems at 901 East San Antonio Road in Mountain 
View, California. This is just off the southbound San Antonio exit of 101; 
northbound travelers also exit at San Antonio and take the overpass to 
the other side of 101. There is an $8 visitor fee for non-members and 
members ($40 per year) are admitted free. Our phone number is (408) 
732-9869 for a recorded message about upcoming meetings.

Since the PPC was formed in late 1989 many people have sampled it,
found it to be very valuable, and even understand what we're up
to. Nonetheless, certain questions persist. Now, in our third
year of operation, perhaps we can and should clarify some of the
issues. For example:

Q.    What is PPC's raison d'etre?
A.    The PARALLEL Processing Connection is an entrepreneurial
organization intent on facilitating the emergence of new
businesses. PPC does not become an active member of any such new
entities, ie: is not itself a profit center.

Q.    The issue of 'why' is perhaps the most perplexing. After
all, a $40 annual membership fee is essentially free and how can
anything be free in 1992? What's the payoff? For whom?
A.    That's actually the easiest question of all. Those of us who
are active members hope to be a part of new companies that get
spun off; the payoff is for all of us -- this is an easy win-win!
Since nothing else exists to facilitate hands-on entrepreneurship,
we decided to put it together ourselves. 

Q.    How can PPC assist its members?
A.    PPC is a large technically credible organization. We have
close to 100 paid members and a large group of less regular
visitors; we mail to approximately 500 engineers and scientists
(primarily in Silicon Valley). Major companies need to maintain
visibility in the community and connection with it; that makes us
an important conduit. PPC's strategy is to trade on that value by
forming alliances with important companies for the benefit of its
members. Thus, as an organization, we have been able to obtain
donated hardware, software, and training and we've put together a
small development lab for hands-on use of members at our Sunnyvale
office. Further, we've been able to negotiate discounts on
seminars and hardware/software purchases by members. Most
important, alliances such as we described give us an inside
opportunity to JOINT VENTURE SITUATIONS.

Q.    As an attendee, what should I do to enhance my
opportunities?
A.    Participate, participate, participate. Many important
industry principals and capital people are in our audience looking
for the 'movers'!

For further information contact:


-- 
B. Mitchell Loebel                                      parallel@netcom.COM
PARALLEL Processing Connection                                 408-732-9869
From: leo@nas.nasa.gov (Leo Dagum)
Newsgroups: fj.mail-lists.parallel
Subject: Re: Synchonizing watches
Date: 3 Sep 92 20:21:56 GMT
Distribution: fj

In article <1992Sep3.123226.14205@hubcap.clemson.edu> steve@hubcap.clemson.edu ("Steve" Stevenson) writes:
>[I saw this on sci.logic. I thought it was a nice problem for this group.
>  steve]
>>From: dougs@tvnews.tv.tek.com (Doug Stevens)
>>Message-ID: <1992Sep1.234452.26917@tvnews.tv.tek.com>
>
>[....]

Unless I'm missing something, this is fairly straightforward.

1) A zeroes watch, calls B and hangs up.
2) B waits till phone ends ringing then calls A and hangs up.
3) B calls A again and hangs up.
4) A times the first call back, and now knows (AB + BA), when he gets
   the second call back, he now knows BA as well (and therefore AB).
5) A sets his watch back by AB, and calls B
6) B picks up the phone and zeroes his watch, they now have (approximately)
   synchronized watches.
7) Bob's your uncle.


Leo Dagum
NASA Ames Reseach Center
From: vanzandt@netcom.com (John Van Zandt)
Newsgroups: fj.mail-lists.parallel
Subject: New book on commercial uses of parallel processing
Date: 25 Aug 92 19:14:07 GMT
Distribution: fj


             "Parallel Processing in Information Systems"
                                  by 
                            John Van Zandt

A new book on parallel processing has just been published by John Wiley and
Sons. Corporate information systems will soon undergo dramatic changes due to
the impact of recent developments in parallel processing technology. Key
industry analysts now predict that by the end of this decade the majority of
computers, from the PC to the high-end database server will be multiprocessors
and parallel processors. Over the next five years, it is critical that
computer professionals understand this revolutionary technology so that their
companies can attain the competitive edge in information technology.

Written by an expert in the field, this valuable guide provides you with 
the essential facts of parallel computing as applied to MIS systems.
"Parallel Processing in Information Systems":

   - Examines the growth of parallel processors from early forms to current
     and future generations

   - Shows how parallel processors can solve a wide range of business problems
     giving companies a significant competitive advantage

   - Discusses potential applications enabled by parallel processors

   - Includes examples taken from scientific modeling, databases and on-line
     transaction processing, general purpose time-sharing support, and
     information servers on a network

   - Discusses the two main approaches for writing parallel programs

   - Provides a step-by-step approach for a company on how to get started in
     using parallel processing

This important work is a must read for information systems managers, systems
analysts, MIS strategic planners, and every computer professional who would
like to keep pace with this remarkable, revolutionary technology.

John Van Zandt is the 21st Century Computer Architect for Computer Sciences
Corporation working with the Numerical Aerodynamic Simulation Systems
Division of NASA.  He has been the Director of Future Systems at Sequent 
Computer Systems, one of the pioneering companies in parallel processing. 
Prior to that he was the Engineering Manager at Intel Scientific Computers, 
another leader in parallel processing.

Van Zandt/Parallel Processing in Information Systems, ISBN: 0-471-54822-7.

Orders can be sent to:
  John Wiley & Sons, Inc. 
  605 Third Avenue, New York, NY 10158 
  Attn: Susan Straub, 10th Floor

or Call 1-800-CALL WILEY.  They accept checks and credit cards (AMEX, 
Visa, and MasterCard).  The price is $39.95.
From: henrik@mpci.llnl.gov (Henrik Klagges)
Newsgroups: fj.mail-lists.parallel
Subject: Re: Silicon Graphics Workstations
Date: 1 Sep 92 12:43:52 GMT
Distribution: fj

bminor@afit.af.mil (Bryan M. Minor) writes:
>Supposedly the 320 has 2 R3000 processors, the 440 has 4 R4000 processors,
The 440 has the R3000 running at 4X MHz, but no R4000.
Cheers, Henrik
IBM Research
MPCI at LLNL
From: tanner@nas.nasa.gov (Leigh Ann Tanner)
Newsgroups: fj.mail-lists.parallel
Subject: Information on DJM (Distributed Job Manager)
Date: 27 Aug 92 12:58:58 GMT
Distribution: fj

I am interested in information on DJM for the CM-2.  If
you have such information or can tell me where I can obtain it,
please email me at: tanner@sundog.nas.nasa.gov

Thanks!

Leigh Ann
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Leigh Ann Tanner                        Parallel Systems Support
NASA Ames Research Center M/S 258-6     Moffett Field, CA  94035-1000
tanner@sundog.nas.nasa.gov              (415) 604-4306
   __o            __o            __o            __o            __o
 _`\<,_         _`\<,_         _`\<,_         _`\<,_         _`\<,_
(_)/ (_)       (_)/ (_)       (_)/ (_)       (_)/ (_)       (_)/ (_)
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
From: kevin-kreeger@orl.mmc.com (Kevin Kreeger)
Newsgroups: fj.mail-lists.parallel
Subject: I need help with C* Paris calls on CM-2
Date: 26 Aug 92 19:33:14 GMT
Distribution: fj

I just started using a CM-2 to do some analysis of 2-d routing
when using a mesh topology as compared to a hypercube topology.
I figured the Paris calls to routing would be the fairest way to
assure the routing was going along the paths I choose. However
I have not been able to get the CM_send_to_news_1L() call to
work properly. The following is a test piece of code I wrote to
try to get it to work...


#include <stdio.h>
#include <cm/paris.h>

#define SIZE   4

shape [512][16]mesh;

char:mesh top_ptr;

main()
{
  [0][0]top_ptr=1;
  [1][1]top_ptr=2;
  [2][2]top_ptr=3;
  [3][3]top_ptr=4;

  print_pe_matrix(); 

  with(mesh)
    where ((pcoord(0) < SIZE) && (pcoord(1) < SIZE))
      myroute();

  print_pe_matrix();
}

print_pe_matrix()
{
  int r,c;

  for(r=0;r<SIZE;r++)
    {
    for(c=0;c<SIZE;c++)
        {
        printf("%2d ",[r][c]top_ptr);
        }
    printf("\n");
    }
  printf("\n");
}

myroute()
{
      CM_send_to_news_1L(&top_ptr,&top_ptr,0,0,sizeof(top_ptr));
}




The problem I seem to be having is with the fourth argument sent to the
subroutine. The manpages says it should be ":upward" or ":downward". But,
they seem to be written for the Lisp compiler. I assumed these were
#DEFINE's so I tried UPWARD, upward, and :upward and kept getting
compile errors. I then assumed that these were probably constants for
0 and 1. Well that let it compile, but I then started getting weird
results were the data was not routing. To me It should shift the 
whole array to the right (or left). But it was only shifting some 
pe's and then it would corrupt others.

Does anyone out there use this call and what do I need to do to
get it to work properly? I know that I could get the same results
with the c* line


	top_ptr = [.][.-1]top_ptr;


But then I'm not assured of the path. And also when I do the
hypercube, it is not scalable. Every time I would increase the
saize I would have to add more "left indexes" to every place
in the code. I'm fairly sure this is not how it is meant to be done.

Thanks for anything you can do to help me

Kevo.
From: sarnath@sybil.cs.buffalo.edu (Ramnath Sarnath)
Newsgroups: fj.mail-lists.parallel
Subject: parallel search
Date: 3 Sep 92 12:33:32 GMT
Distribution: fj

I am looking for references to Parallel search algorithms on 
ordered/partially ordered structures.

I would appreciate any pointers.

sarnath
From: fineberg@nas.nasa.gov (Samuel A. Fineberg)
Newsgroups: fj.mail-lists.parallel
Subject: CM-5 Vector Units
Date: 3 Sep 92 20:21:22 GMT
Distribution: fj

I am interested in finding some information on the CM-5 Vector units that 
were announced at HOT-CHIPS.  Is there a paper that goes along with the
talk?  Is there anything else available?  I will post a summary of any
responses.

Thanks,
Sam
From: maniattb@cs.rpi.edu (Bill Maniatty)
Newsgroups: fj.mail-lists.parallel
Subject: PhD Studies
Date: 28 Aug 92 12:19:58 GMT
Distribution: fj

[There are lots of programs---what do you want? Check in the directory
 pub/parallel/schools on anonymous ftp to hubcap.clemson.edu. I keep a
 list of schools and a blurb about them. ---Steve]

I'm finishing up my M.S. here at R.P.I. and working in applied parallel computing.
I'm interested in going for a PhD. and I need to make sure I find the best
possible match for my PhD program.

Any recommendations?

Bill

-- 
|
|	maniattb@cs.rpi.edu - in real life Bill Maniatty
|
From: buck@UUCP-GW.CC.UH.EDU (Lester Buck)
Newsgroups: fj.mail-lists.parallel
Subject: Re: paper for distributed scheduling
Date: 25 Aug 92 13:09:20 GMT
Distribution: fj

In article <yufeng.714609647@depot.cis.ksu.edu.cis.ksu.edu> you write:
>
>  Since I posted a request for papers on distributed scheduling, I have
>  received lots of mails, asking me to post a summary. Unfortunately, 
>  I did not receive any infomation about papers. So, I have to post again.
>  (sigh) 
> 
>  Has somebody have/know some papers on distributed scheduling? 
>  Thanks. 

I don't know for sure, but I think there are scheduling papers in
the Usenix SEDMS (Symposium on Distributed and Multiprocessor Systems)
conference proceedings.  Check with the Usenix office.

Or truck down to your nearest research library and read the tables
of contents of SOSP (ACM Symposium on Operating Systems Principles).

Or use Computing Reviews in your library.

Or ask a research librarian...

-- 
A. Lester Buck   buck@siswat.hou.tx.us   ...!uhnix1!siswat!buck
From: joelw@convex.com (Joel Williamson)
Newsgroups: fj.mail-lists.parallel
Subject: Synchronization Puzzles
Date: 3 Sep 92 20:21:54 GMT
Distribution: fj

One of my favorites:

A zillion (uncountably finite) soldiers in a line, each with a rifle,
and a commander who wants to get them to fire their rifles
simultaneously.  The commander cannot be seen or heard by all of the
soldiers simultaneously.  He can speak to any one of them directly.

Each soldier can both speak to and hear from both left and right
neighbors and fire his rifle all at the same time.  Each soldier is
capable of following any commands that are given.  However, neither the
soldiers nor the commander are capable of counting the number of
soldiers.

My apologies to this puzzle's originator -- I've lost it in the mists of
time (perhaps those guys on the slow telephone call could help.)

Joel Williamson

--
From: Ivan.Herman@cwi.nl (Ivan Herman)
Newsgroups: fj.mail-lists.parallel
Subject: Looking for a general threads package on UNIX
Date: 2 Sep 92 12:03:40 GMT
Distribution: fj

Sorry if this question has been asked before.


In view of a large scale European research programme, we are looking for
a (possibly PD) lightweight process (thread) package on UNIX. The idea
is to have a package which would allow us to run within a "traditional"
UNIX process a large number of lightweight processes. We are especially
looking for packages which are as environment-independent as possible,
and which would be reasonably easy to install on a new hardware/software
environment.

More specific requirements are:

   - The package should be usable from C (or should be a language
     extension of C);
   - the scheduler for lightweight processes should be preemptive;
   - it should be possible to start several hundreds
     of lightweight processes
   - there should be facilities to ensure that system calls,
     especially I/O, would not block the whole UNIX process; only
     the caller lightweight process should be internally suspended.


It is a real plus for us if:

   - The package should be usable from C++ as well (if not, we can
     always try to adapt it).
   - There is a mechanism which ensures that, from a programmer's point
     on view, there would be no difference between sending a message from
     one lightweight process to another within the same UNIX address space and
     between making a (hidden) RPC call to another object on another
     UNIX process.

We know that the terminology in this respect is not fully established and,
for some, lightweight packages and threads are different sort of animals.
No flames please.

We do have information and/or experience with AT&T's Concurrent C/C++,
Brown University's Thread Package and of Waterloo University uSystem and
uC++. We are looking however for more complete information.

We would prefer to receive answers by email, because I do not read all
the newsgroups addressed by this message. I am happy to post a overview
if anything of interest pops up. Thank you in advance.

Ivan Herman
             Centre for Mathematics & Computer Sciences (CWI),
             Kruislaan 413, 1098 SJ Amsterdam, The Netherlands.
             Email:ivan@cwi.nl, Tel: +31-20-592.4163