From: malaiya@CS.ColoState.EDU (Y. Malaiya)
Newsgroups: news.announce.conferences
Subject: VLSI DESIGN '93: Call for Papers
Date: 8 Apr 92 20:53:21 GMT
Expires: Mon, 1 Jun 1992 07:00:00 GMT
Organization: Colorado State University, Computer Science Department


  *******************
 |  VLSI DESIGN '93  |   CALL FOR PAPERS AND PARTICIPATION
  *******************

      THE SIXTH INTERNATIONAL CONFERENCE ON VLSI DESIGN
      Taj Intercontinental Hotel, Bombay, India
      January 3-6, 1993

      In Cooperation with:
              IEEE Computer Society
                  Technical Committees on Design Automation and VLSI
              IEEE CIRCUITS AND SYSTEMS SOCIETY
              ACM SIGDA

      Sponsored by:
              VLSI SOCIETY OF INDIA (VSI)
              DEPARTMENT OF ELECTRONICS (GOVERNMENT OF INDIA)

The conference is a forum for researchers  and designers to present
and discuss various  aspects of VLSI design. The theme of this year
conference will include both chip  and board  design.  The four-day
program will consist of regular paper sessions, posters, tutorials,
and  industrial  CAD  exhibits.  There  will  be  opportunities for
informal exchange of ideas.  The  proceedings will be  published by
the IEEE Computer Society.

TOPICS  OF  INTEREST:  CAE/CAD Systems, High Level Synthesis, Logic
Synthesis, Fault Modeling, Test Generation, Design for Testability,
Layout,  Routing,  Logic  Simulation,  Circuit  Simulation,  Timing
Verification,  Application  Specific   Devices,  Microarchitecture,
Regional/Global  Perspectives,  VLSI  Algorithms and Architectures,
Fault Tolerant Computing, Economic Issues, etc.

PAPERS: Six copies of  previously  unpublished papers  should reach
either program chair by June 1, 1992.  A  manuscript should clearly
state the original contribution, significant results and  applica-
tions.  It should  not exceed  15  double-spaced  pages  including
figures and references. The authors should identify the presenting
author  and include  the complete  address, telephone  and/or  FAX
numbers  and,  when  possible, email address.  The papers  will be
selected through a review process and the authors will be notified
of acceptance  by  August 1, 1992.   The camera-ready  manuscripts
must  reach the publication chair by September 15, 1992.

TUTORIALS:  The conference has run a highly  successful  tutorials
program  in the past.   This year,  four  full-day  tutorials  are
planned.  The topics for the  tutorials  are  open and include DSP
Architectures,  FPGA,  Mixed  A/D CAD, PCB Design Tools. Proposals
may  be submitted  to either  of  the tutorials chairs by June 30,
1992.  A tutorial may  include  a software demonstration.

EXHIBITS:  The symposium  provides a unique opportunity to CAD/CAE
system  vendors  to display  their  products  to  the   attendees.
Since the available space  may be limited, those interested should
contact the general or publicity chair as soon as possible.

AWARDS:  A  best  paper  award   (Prof.  A. K. Choudhury Award) of
Rs.10,000 and two other honorable mention awards of Rs. 2,000 will
be  given.   In  addition  a  design  contest  is  planned.  Those
interested in the  design  contest  should  contact the  publicity
chair.

For   any  other  information  concerning  the  symposium  contact
publicity chairs.
                    STEERING COMMITTEE CHAIR
                          V. D. Agrawal
                    AT&T Bell Labs., Rm 2C-476
                         600 Mountain Ave.
                    Murray Hill, NJ 07974
                        (908) 582-4349
                      va@research.att.com

                         GENERAL CHAIRS
Y. K. Malaiya                          S. S. S. P. Rao
Dept. of Computer Science              Dept. of Comp. Sc. and Engg.
Colorado State University              Indian Institute of Technology
Fort Collins, CO 80523, USA            Powai, Bombay 400076, India
(303) 491-7031                         +91 22 578-5708
(303) 491-2293 (FAX)                   +91 22 578-3480 (FAX)
malaiya@ravi.cs.colostate.edu          ssspr@cse.iiitb.emet.in

                     ORGANIZING COMM. CHAIR
                          S. Ramadorai
                    Tata Consultancy Services
                 Air India Bldg., Nariman Point
                      Bombay 400021, India
                       +91 22 202-4827
                       +91 22 204-0711 (FAX)

                         PROGRAM CHAIRS
Srimat T. Chakradhar                   Sunil D. Sherlekar
NEC Research Institute                 Dept. of Comp. Sc. and Engg.
4 Independence Way                     Indian Institute of Technology
Princeton, NJ 08540, USA               Powai, Bombay 400076, India
(609) 951-2962, x-2499 (FAX)           +91 22 578-5708, x-3480 (FAX)
chak@research.nec.com                  sds@cse.iiitb.emet.in

                        PUBLICITY CHAIRS
R. Rajsuman                            Vijay Vaidya
Dept. of Comp. Engg. and Sc.           Tata Consultancy Services
Case Western Reserve University        Air India Bldg., Nariman Point
Cleveland, OH 44106, USA               Bombay 400021, India
(216) 368-5510, x-2801 (FAX)           +91 22 202-4827, 204-0711 (FAX)
rajsuman@alpha.ces.cwru.edu

                        TUTORIALS CHAIRS
Ravi Apte, Cadence Inc.                G. Venkatesh, IIT Bombay

EXHIBITS CHAIR: C. G. Ravi, Hinditron Services, Bombay, India
DESIGN CONTEST CHAIR: J. Vasi, IIT Bombay
PUBLICATION CHAIR: V. D. Agrawal, AT&T Bell Labs
ACM LIASION: Sharad Seth, Uni. of Nebraska
IEEE LIASION: N. Ranganthan, Uni. of South Florida
VSI LIASION: A. Prabhakar, ITI Bangalore
PAST CHAIRS: A. Laha, Cadence Inc. and L. M. Patnaik, IISc. Bangalore