From: bvj@novell.com (B.V. Jagadeesh)
Subject: Silicon Valley PC Design Conf - Aug 10-12
Organization: Novell, Inc.
Date: Mon, 27 Jul 1992 19:34:45 GMT
Expires: Wed, 12 Aug 1992 07:00:00 GMT


ADVANCE PROGRAM
SILICON VALLEY PERSONAL COMPUTER DESIGN CONFERENCE
                  (SVPC'92)
The Conference on New Architectures and Technology
for the Design of Portable and Desktop Computers

AUGUST 10 - 12, 1992

Santa Clara Convention Center, Santa Clara, CA

In today's fast-moving computer industry, offering differentiated products
with improved performance while maintaining compatibility is the key to
staying in front of the market. The Silicon Valley Personal Computer Design
Conference gives designers the information to do just that. It is the only
independent technical conference dedicated to the DESIGN and IMPLEMENTATION
of hardware and software for portable and desktop computer systems and
peripheral hardware.

At SVPC'92, close to 100 technical presentations and multiple tutorials
will be delivered by well-known experts amassed from all levels of the
computer industry, worldwide. These presentations will provide design
engineers and product planners with SOLUTIONS to many difficult system
design and integration problems. The Tutorials and Technical Paper
sessions address the latest components, design techniques, and system
architectures that allow designers to build faster, lower power, lighter,
and less expensive computers and peripherals.

SVPC'92 will bring together hundreds of designers and strategic planners
as a means to advance the state-of-the-art in portable and desktop systems
design. The conference is structured such that the first day, August 10th,
will provide multiple half-day or full-day tutorial short courses. The
remaining two days will present, in four parallel technical session tracks,
more than 100 speakers describing innovative design approaches to implementing
high-performance desktop and portable computer systems and peripherals.

To complement the technical presentations, the conference also includes a
table-top exhibition area that will be open for three hours, starting at
11:30 am on Tuesday, and again on Wednesday. These exhibits will highlight
the latest microprocessors, motherboard logic chips, peripheral support
circuits, programmable logic, design tools, and many other components (some
will be described for the first time in the technical papers). Coffee-break
refreshments as well as lunches are included in the conference registration
to maximize the time attendees spend together learning and discussing key
design and implementation issues.

FOR MORE INFORMATION, CONTACT:

Ken Majithia, General Chairman, at (408) 924-3930 (voice); (408) 997-8265
(fax); and majithia@sjsuvm1.bitnet (email)

SVPC is Sponsored by SysTech Research in cooperation with Electronic Design
and Electronics Magazines (Penton Publications), Integrated Device Technology
Inc., National Semiconductor Corp., NCR Corp., and Yamaha Systems Technology
Div.
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PAGE 2


KEYNOTE SPEAKERS

DR. GORDON E. MOORE
Chairman of the Board, Intel Corp.

Dr. Gordon Moore is currently Chairman of the Board of Intel Corp. and was
one of the original founders of the company in 1968, when he initially
served as Executive Vice President. He became President and Chief
Executive Officer in 1975 and held that post until elected Chairman and
Chief Executive Officer in 1979.

Before helping to found Intel, Dr. Moore was Director of Research and
Development for the Fairchild Semiconductor Division of Fairchild Camera
and Instrument Corp., a company that he also co-founded in 1957.

Born in San Francisco, Moore earned a B.S. in Chemistry from the University
of California at Berkeley and a Phd. in Chemistry and Physics from the
California Institute of Technology. Dr. Moore is also a director of Varian
Associates and Transamerica Corp., a member of the National Academy of
Engineering, a Fellow of the IEEE, and a Trustee of the California Institute
of Technology. He received the National Medal of Technology in 1990.


ROGER ROSS
President and CEO, Ross Technology Inc., a subsidiary of Cypress
                   Semiconductor Corp.,

President and Chief Executive Officer of Ross Technology Inc., Mr. Ross
has spent over 20 years in the computer and microprocessor industry. Prior
to founding Ross Technology, Mr. Ross was the General Manager for the
Advanced Microprocessor Operation at Motorola where he was responsible for  Motorola's 88000 RISC microprocessor program.

Prior to Motorola Ross spent nine years at NCR Corp. where he held numerous
positions of increasing responsibility in the company's engineering
organization and was responsible for the development of a number of very
successful products. Before joining NCR he also worked at Rockwell,
McGraw-Edison, and IBM Corp.

Mr. Ross graduated cum laude from Ohio University with a B.S. degree in
Abstract Mathematics. He completed graduate course work at Ohio University
and in Ohio State University's accelerated Phd. program. He is CDP
certified and is a member of the ACM, IEEE and ICCP.

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Page 2, continued


Dr. Barry Goldstein
Research Director, Lan Servers,
       Digital Equipment Corp.


Text to come




Mr. Michael Winkler
Vice President, Toshiba America, Computer Systems Div.


Text to come


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Page 2, Continued


TUTORIALS
==============================================================================
MORNING TUTORIALS*     8:00 A.M. - 12 NOON      MONDAY, AUGUST 10
______________________________________________________________________________
     T1                 T2                  T3                      T4
IMPLEMENING            DEVELOPING        BASICS OF FLAT      FUNDAMENTALS OF
MEMORY-CARD-           APPLICATIONS      PANEL DISPLAY        MEMORY SYSTEMS
BASED SYSTEMS          UNDER WINDOWS      TECHNOLOGY                (I)

Presenter:             Presenter:         Presenter:           Presenter:
 PCMCIA                National            Tannas                NEC Corp.
                       Instruments         Electronics
                                                              Speakers:
 Speaker:               Speaker:             Speaker:        Dr. Howard
  to be                Sue Guzman          Dr. Larry          Sussman &
Determined                                  Tannis           Fred Jones
==============================================================================
         LUNCH
=============================================================================

AFTERNOON TUTORIALS*    1:00 P.M. - 5:00 P.M.
______________________________________________________________________________
     T5                  T6                  T7                 T8
IMPLEMENTING         DEVELOPING           EXPANDING          FUNDAMENTALS
MICRO CHANNEL-       PERIPHERALS BASED    PC ARCHITECTURES   OF MEMORY
BASED SYSTEMS        ON ACCESS.BUS        WITH SUPER 386      SYSTEMS (II)

Presenter:           Presenter:           Presenter:          Presenter:
Micro                Computer             Chips and           NEC Corp.
Channel              Access               Technologies
Developers           Technology            Inc.
Association
  Speaker:             Speaker:             Speaker:          Speakers:
                                                              Dr. Howard
R. Zakhariya         Dan Wilnai              to be              Sussman &
                                            Determined         Fred Jones
==============================================================================

*Notes
Morning tutorial short courses start at 8:00 am and finish at 12:00 noon.
Coffer-break refreshments and a buffet lunch will be provided for all
tutorial short course participants. Afternoon tutorial short courses start
at 1:00 pm and finish at 5:00 pm.



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PAGE 3 (1 of 4)


Day 1/Track 1: PC SYSTEM DESIGN  (13 papers)

Designing Upgrade Processor-Ready PCs
Intel, Peter Brown, PC-001

Designing Compact 80486-Based Systems With Single-Chip Controllers
VLSI Technology, Pratix Parikh, PC-041

Virtual Cache: Performance Enhancements in 486DX Systems
Headland Technology, Joe Nance, PC-105

EISA For The Masses
VLSI Technology, Peter Sorrells, PC-040

Microchannel Desktop Design For Mission Critical Applications
Toshiba, Farhad Maphie, PC-055

Two-Chip Chipset For Microchannel Implementation
VLSI Technology, Peter Sorrells, PC-008

Cache Controller Simplifies Modular Motherboard Design
VLSI Technology, Ron Cates, PC-039

Special Memories For Efficient Cache Subsystem Design
Quality Semiconductor, Zwie Amitai, PC-083

Design of a 486 Zero-Wait-State Secondary Cache
Micron, Brett Williams, PC-091

Parallel Block Transfer in a Cached DRAM
Mitsubishi, Mai Ha, PC-033

Synchronous DRAMs Break The Memory System Bandwidth Bottleneck
Texas Instruments, Earnest Powell, PC-036

Breaking The Memory Bandwidth Barrier
Rambus, Satyanarayana Simha, PC-044

SPECIAL EVENING PANEL SESSION: CPU Contenders For The Desktop: CISC vs RISC
                                Panelists to be Announced

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Page 3 (2 of 4)

Day 1/Track 2: DISPLAY TECHNOLOGY  (13 papers)

Video Boards, FCC And You
Cirrus Logic, Bill Knapp, PC-049

Advanced Graphics Architecture
Oak Technology, Brian Davis, PC-007

XGA Video
IBM, Jim Paolantanio, PC-071

Progressing to VESA XGA Standard
Cirrus Logic, Bill Knapp, PC-048

Comparison of Architectures And Programming Models of XGA, 8514/A, And VGA
in The Windows Environment
Integrated Information Technology, Dr. Y.W. Sing, PC-081

Design of a High Performance ISA-compatible XGA Subsystem
INMOS Bristol, Simon Thomas, PC-104

PC Architecture Design For Improved Windows Performance
Chips and Technologies Inc., Scott Cutler, PC-118

Accelerate Common GUI Operations With a TPDRAM-Based Frame Buffer
Micron Technology, Stephen Holland, PC-034

VRAMs Mask Graphics System Bandwidth Bottleneck
NEC, Steve Forman, PC-057

Low-Cost High-Performance PC Graphics Enabled by 4M VRAMs
Texas Instruments, Earnest Powell, PC-035

Using DRAMs Instead of VRAMs For Low-Cost High-Performance Display Systems
Cirrus Logic, David Keene, PC-100

Design of a Speed-Critical VGA Redraw Card
VMI, Norm Rodd, PC-075

Low Cost Multiple VGA And Multimedia System
Cirrus Logic, Nishan Urkumyan, PC-050

SPECIAL EVENING PANEL SESSION: CPU Contenders For The Desktop: CISC vs RISC
                                Panelists to be Announced

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Page 3 (3 of 4)


Day 1/Track 3: MASS STORAGE  (12 papers)

Floppy Trends For Future Systems
Brier Technology, Leland Strange, PC-009

Floptical Technology Overview
Maxell, Dave Barry, PC-006

Designing With Floptical Technology
Insite Peripherals, PC-006A

Multifunction Mass Storage With High Capacity Floppies
Brier Technology, Leland Strange, PC-010

48 Mbit/s Disk Controller Architecture
Silicon Systems, Mike Holt, PC-032

Read/Write Heads Key to Better Drives
Dastek, Jack Osborne, PC-038

SCSI: The Chosen Interface For Future Platforms
Procom Technology, Steven Ranck, PC-098

Designing High-Performance Low-Cost Fast-SCSI Controllers
Cirrus Logic, Douglas Fields, PC-051

SCSI Local-Bus Design Accelerates System Performance
NCR Corp., Erik Paulsen, PC-123

RAID Architecture Overview
Integra Technology, Charles Lax, PC-087

Disk Array Subsystems For PCs
Legacy Storage Systems, John Whyte, PC-003

Integrating 250-Mbyte Low-Profile Removable Drives Into Systems
Kalok, Randy Serafini, PC-004

Designing 3.5-in. DDS Tape Drives Into Systems
SONY, Bo Larsson, PC-028

Designing Maximum Efficiency Parallel Port Controllers
Prima Storage Solutions, Harvey Ulijohn, PC-005

SPECIAL EVENING PANEL SESSION: CPU Contenders For The Desktop: CISC vs RISC
                                Panelists to be Announced

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Page 3 (4 of 4)


Day 1/Track 4: NOTEBOOK COMPUTING  (12 papers + Panel)

Low Voltage Design Considerations For Portable Computers
Integrated Device Technology, Wayne Yoshimoto, PC-119

Portable PC Design For Lowest Power Consumption
Intel, Desmond Yuen, PC-022

Designing Low-Operating-Voltage Notebook Computers
Intel, Ravi Nagaraj, PC-024

Design Issues Regarding Flat Panels
S-MOS Systems, Sandeep Gupta, PC-056

Using Cache in Notebooks to Save Power
Micron, Brett Williams, PC-099

Low Power Cache Solution For Portable Systems
Benchmarq Microelectronics, John Landau, PC-029

Design Techniques For Cache Memory in Portables
IDT, Manuel Alba, PC-053

Superstate Overview
Chips and Technologies, Author to be determined, PC-079

Display Subsystems: Optimizing for Space, Power And Performance
VLSI Technology, Phil Mattison, PC-042

Flash BIOS Beyond 128 Kbytes
Intel, Salim Fedel, PC-012

High-density Flash Memory Applications in Portable Computing
Intel, Bryan Dipert, PC-014

Implementing a Solid-State Flash Memory Pen-Based Design
Intel, Dave Verner, PC-074

PANEL SESSION: Making Palmtops a Reality

Moderated by Andrea Mirenda, Chips and Technologies Inc.

   Panel members include:  Morris Jones, Chips and Technologies Inc.
                           Rich Sorkin, Phoenix Technologies Ltd.
                           Brian Dougherty, GeoWorks
                           John Reimer, SunDisk

SPECIAL EVENING PANEL SESSION: CPU Contenders For The Desktop: CISC vs RISC
                                Panelists to be Announced

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Page 4 (1 of 4)


Day 2/Track 1 : SYSTEM AND PERIPHERAL DESIGN  (11 papers)


Clock Skew Reduction in High Performance PC's
Applied Micro Circuits Corp., Tim Thomson, PC-109

High Frequency Clock Distribution: Techniques For PCs And Workstations
Motorola, Chris Hanke et al, PC-101

Application of High Speed/Low Power Logic
IDT, Manuel Alba, PC-052

PC Architectural Expansion
Chips and Technologies, Gary Albitz, PC-080

Multiple Local Bus Peripheral Design
Mosel, Bert McComas, PC-069

Graphics Architecture for Local Bus
Headland Technology, Sanjiv Pathak, PC-111

Providing Lossless Data-Compression And System BIOS to Double Disk Capacity
Integrated Information Technology, Dan Helman, PC-066

Design of a Multiprocessing PC
Corollary, George White, PC-089

PC Benchmarking - Are Landmark And Power Meter Sufficient?
AnR, Ashok Bansal, PC-060

An Alternative to FPGAs And Masked Gate Arrays
Chip Express, Udi Yujhtman, PC-072

A New Desktop Connectivity Standard Adaptor for PC's
Philips-Signetics, Ata Khan, PC-085

A New Diagnostics Bus for PCs or Workstations
Echelon Corp., Pradip Madan, PC-117

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Page 4 (2 of 4)


Day 2/Track 2:  MULTIMEDIA HARDWARE DESIGN  (12 papers)

Integrating CD Quality Audio on a PC Motherboard
Analog Devices, Scott Vincelette, PC-043

Designing PC Systems That Integrate Transparent Data Compression Hardware
Integrated Information Technology, Ching-Lou Jiang, PC-065

Digital Signal Processing on a 486-based EISA Motherboard
AT&T, Jeff Walck, PC-113

Designing a Programmable Compression Subsystem
Integrated Information Technology, Doug Bialey, PC-067

JPEG Video Compression Design For High Performance
Integrated Information Technology, Tim Williams, PC-068

Multimedia JPEG Image Compression
Zoran Corp., Isaac Shenberg et al, PC-112

Dedicated Decompression IC For MPEG And H.261 Video Standards
INMOS, Philippe Thomas and David Bye, PC-115

Image Compression in a Pen-Based Computer
Oak Technology, William Wong, PC-045

The Media-Link High-Speed Interconnect For Multimedia
Spectrum Signal Processing, Dan Mah, PC-047

Accelerator Design For Multimedia Systems
Fusion Data Systems, Andy Antoniewicz, PC-076

Effects of Hardware Acceleration on Graphics Performance
Weitek, Mark Birman, PC-062

TIGA Exposed
TI, Ron Drafz, PC-084

Design Consideration For Low-cost High Resolution Laser Printer Controllers
Peerless, Tom Ruffolo, PC-102

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Page 4 (3 of 4)     (13 papers)

Day 2/Track 3(AM): LAN/WAN INTERFACES  (5 papers)

Mobile Information Networks
Momenta Corp., Kim Carsten, PC-046

Directions in Mobile Computing
SRI, Marc Cummings, PC-121

Modem Design for Worldwide Application
Rockwell International, Roland Dunton, PC-063

Importance of Open Architecture in Communication ICs
Phylon, Michael Yeung, PC-070

Software Tools to Enhance Modem Product Development
Rockwell International, Tony Zuccarino, PC-064

  ------------------------------------------------------------------

Day 2/Track 3/PM: SYSTEMS MANAGEMENT  (6 papers)


The Dry Cleaner Architecture
Standard Microsystems, Ariel Hendel, PC-088

Twisted-Pair FDDI Becomes a Reality For The Desktop
National Semiconductor, James Jones III, PC-120

Producing Quality For Global Market
Diagsoft, Gordon Kraft, PC-037

Computer Access For People With Disabilities
Nexus Applied Research Inc., Mark Rosen, PC-110

Mobile Professionals Benefit From PC Card Standards
Intel, Ron Fuller, PC-027

High-Speed Data Security
VLSI Technology, Charles Roberts, PC-114

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Page 4 (4 of 4)

Day 2/Track 4:  PORTABLE COMPUTING  (14 papers)

Advances in Rechargeable Batteries
Gates Energy Products, Jon Eager, PC-021

Applying High-Energy-Density Rechargeable
Zinc-Air Batteries in Portable Computers
Aer Energy, Mark Schimpf, PC-092

Ergonomic Design of Battery Systems
Benchmarq Microelectronics, John Landau, PC-030

Extending Battery Life in Notebooks And Sub-Notebooks
Headland Technology, Kasturi Gopalaswamy, PC-106

Power Supply Design Techniques For Portable Computers
Linear Technology, Mitchell Lee, PC-073

Designing For Low Power Use: A Poqet Full of Tricks
Poqet Computer Corp., John Fairbanks, PC-107

Advanced Power Management BIOS Implementation
Intel, Sham Datta, PC-023

Designing Single-Chip 3.3-V 32-Bit Computers
Western Digital Corp., Vipul Mehta, PC-124

PC Cards Impact on Portable Computing
Intel, Ron Fuller, PC-026

Choosing Between Non-Volatile Memory Card Technologies
Data I/O, Don Vendetti, PC-011

Designing PC Card Interchangeability
Intel, Gary Forni, PC-015

Designing With Series II-Blocked Flash Memory Cards
Intel, Markus Levy, PC-013

Panel Session: Issues in Benchmarking Power Management

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Page 5 (1 of 3)


HOTEL ACCOMMODATIONS AND TRAVEL DIRECTIONS

Reserve Your Room Early!

SysTech Research has arranged for a limited number of rooms at the
Santa Clara Westin Hotel, which is adjacent to the Santa Clara
Convention Center. Please make your reservations directly with the
hotel or through their U.S. toll-free number. Be sure to ask for the
special SVPC'92 room rates. Reservations must be made prior to July
17, 1992 to get the special rates.

Direct Phone: (408) 986-0700;  Fax: (408) 986-1584

Toll free: (800) 228-3000



The Santa Clara Convention Center is located just fifteen minutes west
of the San Jose Airport. The adjacent Westin Hotel runs a complimentary
airport shuttle that runs every 90 minutes to/from the San Jose Airport.
>From the San Francisco Airport, the Convention Center and Hotel are
approximately 40 miles south. To drive from the airport, take the 101
Freeway south to the Great America Parkway exit and go north on Great
America Parkway to Tasman Street (about 1 mile). See the accompanying
map for specific details. For attendees not wishing to drive, contact
the South Bay Airport Shuttle Service (408/559-9477) or another transport
company upon arrival to arrange for a group shuttle or taxi. Group
shuttles cost between $20 and $30, while direct taxi service could
cost about $60.



WELCOME TO SILICON VALLEY

Nestled in the heart of the Santa Clara Valley, the city of Santa Clara
and nearby cities are home to many companies that are key players in all
aspects of the Desktop and Portable Computer Industry -- Apple, Chips and
Technologies, Intel, and many others. For early arrivals or stay ons, the
Santa Clara Valley and surrounding areas offer many sightseeing and
relaxation attractions. Family-oriented attractions within a 1 to 1-1/2
hour drive include the Great America Amusement Park, Marine-World Africa,
the Winchester Mystery House, the Wineries of San Jose, Napa, and Sonoma,
the Santa Cruz Beaches and Amusement Park, Monterey and its famous golf
courses, and, of course, the City of Hills and the Golden Gate Bridge,
San Francisco.

        ---------------------------------------------------
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Page 5 (2 of 3)


TABLE TOP EXHIBITS

The following is a partial list of companies that have signed up to exhibit
at SVPC'92. Many others are expected to sign up as well.

AER Energy
Analog Devices Inc.
Ancot
Aptix
Atmel Corp.
Benchmarq Microelectronics
Chip Express
Chips and Technologies
Cirrus Logic
Concurrent Logic
Electronic Design Magazine
Electronics Magazine
Headland Technology
Hitachi America
Integrated Device Technology Inc.
Integrated Information Technology Inc.
Intel Corp.
Logic Automation
Microsoft Corp.*
Molex Inc.
National Instruments
National Semiconductor Corp.
NCR Corp.
NMB Technology
Opti Inc.
PC MCDA
PC MCIA
Philips-Signetics Co.
Phylon
Rockwell International
SGS-Thomson
Silicon Systems
S-MOS Systems
VLSI Technology
Yamaha Systems Technology Div.

*tentative

  EXHIBIT HOURS:   11:30 a.m. to 2:30 p.m.            Tuesday & Wednesday
 Refreshments will be served in the exhibits area      August 11 & 12

     -----------------------------------------------------
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Page 5 (3 of 3)


Silicon Valley Personal Computer Design Conference (SVPC'92)

REGISTRATION FORM                  tax ID # 77-025-4502
(please retain a copy for your records)
                                           Before      After         At The
                                           7/10/92     7/31/92*       Door


ONE-DAY PACKAGE: Monday, August 10           $295       $350          $395
Tutorial Only (includes exhibits pass for Tuesday or Wednesday)

Circle two half-day topics (one for morning, another for the afternoon)

a.m.:  T1    T2    T3     T4     p.m.:   T5    T6    T7     T8


TWO-DAY PACKAGE: Tuesday, Wednesday, August 11, 12
All technical sessions, exhibits, no tutorials
                                              $395      $450          $495

THREE-DAY FULL-CONFERENCE PACKAGE: Monday-Wednesday, August 10-12
(Includes tutorials, all technical sessions, and exhibits. Circle
two half-day tutorial sessions above)

                                              $495      $550          $595


EXHIBITS-ONLY ENTRANCE PASS                  FREE       FREE          $ 25

EXTRA PROCEEDINGS (at Conference)            $100      $100           $150
(Mail orders, add $20 for USA and $40 for international)

                                             TOTAL ENCLOSED   $ ___________

*Do not mail form after 7/31/92; bring for at-door registration. A $150
processing fee will be charged for registrations canceled before July
10, 1992. No refunds after cancellation deadline.

NAME_________________________________________ TITLE__________________________
TEL______________________________  FAX_____________________________
COMPANY_____________________________________  MAIL STOP______________________
ADDRESS______________________________________________________________________
CITY_________________________________  STATE________________________
ZIP_________________  COUNTRY________________

Charge to my  _____ VISA    _____ Mastercard  _______________________________
                                                                Signature
___________________________________________   __________
Account Number                                  Exp. date

Make checks payable to SysTech Research and mail with a copy of this
completed form to:

 SysTech Research, 1248 Olive Branch Lane, San Jose, CA 95120; Questions,
 call or fax to Ken Majithia, (408) 997-8265.

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Page 6


------------
  BIG LOGO  |    SILICON VALLEY PERSONAL COMPUTER DESIGN CONFERENCE
            |
------------                AUGUST 10 - 12, 1992

                            SANTA CLARA CONVENTION CENTER
Who Should Attend?

* Anyone interested or involved in the DESIGN and INTEGRATION of desktop
  and portable computer hardware and machine-level software.

* Anyone who needs information on the latest motherboard chip sets,
  system architectures and components that can be incorporated into
  the design of leading-edge computer systems and peripherals.

* Anyone who wants to improve their knowledge base through the highly-
  focused tutorial short courses and technical papers that describe
  both system fundamentals and advanced design techniques.

Join professionals from many of the systems manufacturers to get a first-
hand look at the latest technology for desktop and portable system design.

SVPC'92, like last year's conference, pulls together in three days, more
technical information relating to the design of personal computers than
can be found in several year's worth of reports, journals and other sources.
Complementing the papers are Table-Top exhibits that will display hundreds
of innovative components and software tools with which designers can
improve time to market, build higher-performance and lower-cost systems,
and find ways to differentiate systems while maintaining software
compatibility.

      -----------------------------------------------------

  SMALL LOGO    Silicon Valley Personal Computer Design Conference    -------
                                                                       Bulk
                   1248 Olive Branch Lane                              Permit
                   San Jose, CA 95120                                 -------





                                        MAILING LABEL





If the addressee is no longer at this location,
please route to either the VP of Engineering or
Director of Product Planning.