HDTenEightyP/NetNews huggingface dataset:
From: miket@frog.CRDS.COM (Michael C Tiernan)
Newsgroups: comp.arch.bus.vmebus
Subject: Magazine contact wanted.
Summary: Seeking contact from particualr magazine.
Keywords: VME, Magazine, periodical
Date: 14 Dec 92 19:18:27 GMT
Organization: Charles River Data Systems


	During a trip to Germany, I came across a magazine called
	"VMEbus Das Magazin fur Boards, Systeme und Software"
	which is a very nice magazine.  However, some of us
	mono-linguistic Americans lose quite a bit of the information
	contained in the magazine due to it's being only in German.
	My question, does anyone know of ANY other magazines which
	concentrates on this market.  Also, is there anyone in
	Germany (Nurnberg to be specific) who would be interested in
	contacting them to see if there's an international version which
	would be in English?

	I've tried to FAX them (some time ago) and never heard back from
	them.

		They are:
			VMEbus
			Postfach 91 01 06
			Gro"B"weidenmuhlstra"B"e 2
			8500 Nurnberg 91
			P: 09 11/33 59 08
			F: 09 11/33 16 60

	Thanks folks!
-- 
<< MCT >>  Michael C Tiernan. - GEnie:M.Tiernan - AOL:M Tiernan/BCS Mike 
UUCP = alfalfa!pro-angmar!m.tiernan OR miket@frog.UUCP
      It's too bad that it takes almost half of our life
	to realize that it was a "Do-It-Yourself" project.
Newsgroups: comp.arch.bus.vmebus
From: aaron@cbnewsh.cb.att.com (aaron.michael.chesir)
Subject: VME bus Systems Magazine
Organization: AT&T
Date: Tue, 15 Dec 1992 14:02:29 GMT


Hi There!
	There most certainly is a magazine that focuses on the VME bus market:

	VMEbus Systems

	Editorial Office:
	2618 S. Shannon
	Tempe, AZ 85282
	(602) 967-5581

	Advertising/Business Office:
	25875 Jefferson
	St. Clair Shores, MI 48081
	(313) 774-8180

	Hope this helps.


Aaron Michael Chesir
AT&T Bell Laboratories
Room HO3C206
1-(908)-949-1530
..att!blink!aaron OR aaron@blink.att.com
From: warren@CAM.ORG (Robert Warren)
Newsgroups: comp.arch.bus.vmebus
Subject: Running Dos applications on a VME bus
Date: 16 Dec 92 05:20:24 GMT
Organization: Communications Accessibles Montreal, Quebec Canada

Hello.

I've been reading about VME bus desing and hardware and it seems like it can
be used with DOS applications. Are these dos cards usually plug n' play or do
they required some creative programming? Can I run multiple jobs apart from
the DOS card? And now the 100K question: Is there a FAQ to this newsgroup?

Reply via news or mail

Regards,
	Robert Warren.
From: knowles@FNALNH.FNAL.GOV
Newsgroups: comp.arch.bus.vmebus
Subject: seeking vme gear
Date: 18 Dec 1992 00:34:50 GMT
Organization: Fermi National Accelerator Lab
Reply-To: knowles@FNALNH.FNAL.GOV
NNTP-Posting-Host: fnalnh.fnal.gov

I am looking for various bits of VME gear.  If you wish
to dispose of VME equipment either piecemeal or in
bulk please drop me a list of what you have and how
much you want per item/lot

Rich Knowles     knowles@fnalo.fnal.gov

Newsgroups: comp.arch.bus.vmebus
From: phwl@metro (Philip Leong)
Subject: Re: Looking for digital and analog VME I/O cards
Organization: Sydney University Computing Service, Sydney, NSW, Australia
Date: Thu, 17 Dec 1992 22:52:52 GMT

From article <ByyHxA.JA3@pix.com>, by stripes@pix.com (Josh Osborne):
> I am looking for digital I/O cards with 128 or more bits of input, I want
> to use it to connect switches, and maybe lamps, so I don't need any complex
> buffering, or auto-sampleing, timers, or anything like that.

We (Syndey University Electrical Engineering) have designed a board
which nearly does what you want. We had to do it because we found we
could not buy anything that resembled what we wanted. We are selling
this board to interested parties.

The following blurb is a short description of the board. Please contact
me if anyone has any questions about it. 

---------------------------------------------------------------

Jiggle is a general purpose chip tester which was designed specifically
for the training and testing of integrated circuits. It has been used
extensively to train VLSI implementations of low power artificial
neural network chips, although it could be used to test both digital and
analogue designs.

The Jiggle chip tester has the following features
- 64 digital IO channels
- 64 analogue IO channels
- 2 x 12 bit analogue to digital converters 
  multiplexed to the 64 analogue input channels
- 64 x 12 bit digital to analogue converters
- All digital and analogue pins can be sampled simultaneously
  and read back at a later time
- Analogue inputs have high input impedance ($50 M\Omega$)
- Software configuration of analogue and digital IO direction
- Easily customisable via a chip interface board
- VME bus interface
- UNIX library for Jiggle IO


Regards,
Philip Leong.
--
Department of Electrical Engineering	Tel. (+61 2) 692 3297
University of Sydney 2006		Fax. (+61 2) 660 1228
Australia				Internet: phwl@sedal.su.oz.au
From: bukys@cs.rochester.edu
Newsgroups: comp.arch.bus.vmebus
Subject: Looking for high-res timer board
Date: 17 Dec 92 06:39:27 GMT
Article-I.D.: stork.9212171639.AA21526
Organization: Computer Science Department University of Rochester

We're looking for a high-res VME timer board.
It will be stuck in a multiprocessor and will get frequent memory-mapped
reads from heavily instrumented code.  Therefore, the ideal candidate
would be something like:
	32-bit counter, accessed D32.
	No state to maintain between accesses (so I don't have to
	make the multiple processors do mutual exclusion just to
	look at the timer).

Alternatively, can anyone recommend a D32 VME prototype board
onto which we could paste our own counter circuit?

Liudvikas Bukys
bukys@cs.rochester.edu
From: neilf@delfin.com (Neil Frank)
Newsgroups: comp.arch.bus.vmebus
Subject: Re: VSB A/D boards
Date: 21 Dec 92 00:27:03 GMT
Organization: Delfin Systems

ebg@hoshi.hip.atr.co.jp (Ed Gamble) writes:
: 
: Can anybody provide a pointer to A/D boards with a sizeable memory buffer,
: 16bit resolution, clocking at >50KHz/channel and access via the VSB bus?  
: 
: -- Ed

Try Pentland Systems LTD... They have boards which are configured via
VME and output their data across the VSB... I don't know which cards
they make for 16 bits @ 50 KHz/channel but I do know that they have
a board (MPV 957) which provides 12 bits @ 10MHz (1 channel)....  It
sends its data across the VSB bus in block mode transfers....

Anyway, here is their address in Scotland and a representative of theirs
in California......

Pentland Systems LTD
1 Cochrane Square
BruceField Industrial Park, Livingston
West Lothian, Scotland, EH54 9DR
Voice: 44 506 464666
FAX: 44 506 463030

Pentland Systems LTD
1072E Serpentine Lane
Pleasanton, CA 94566
Voice: (510) 484-4270
FAX:   (510) 484-8402

-nlf-


-- 
Neil Frank		Delfin Systems		408-748-1200
neilf@delfin.com	Santa Clara, CA.
--              Wisdom is Gained Through Experience,            -- 
--        Experience is Gained Through Error.... "Unknown"      -- 
Newsgroups: comp.arch.bus.vmebus
From: michael@chg.mcd.mot.com (Michael Bodine)
Subject: Re: FAQ (Was: VME sources - VME Buyers Guide)
Organization: Motorola Computer Group, Schaumburg, IL
Date: Fri, 18 Dec 1992 22:54:06 GMT

markm@ee.ubc.ca (mark milligan) writes:

>A lot of people are asking where to find VME hardware for their specific needs.
>...
>P.S. Anybody intrested in starting an FAQ for this group? I have a lot of info
>that can go into it.
Somebody mentioned this earlier, and i've started gathering info into a
nice big file.  I'd be happy to make at least the first pass at one --
i've a pretty long history with VME.  email anything you'd like included
and i'll post it following the holidays.
-- 
[  Michael Bodine, michael@chg.mcd.mot.com, Dial: (708) 576-7840, FAX: x8875  ]
[  Motorola TSD; Loc IL38; 1100 Woodfield; Suite 334;  Schaumburg, Il  60173  ]
Newsgroups: comp.arch.bus.vmebus
From: markm@ee.ubc.ca (mark milligan)
Subject: Re: Looking for digital and analog VME I/O cards
Organization: University of BC, Electrical Engineering
Date: Fri, 18 Dec 1992 17:03:57 GMT


> From article <ByyHxA.JA3@pix.com>, by stripes@pix.com (Josh Osborne):
> > I am looking for digital I/O cards with 128 or more bits of input, I want
> > to use it to connect switches, and maybe lamps, so I don't need any complex
> > buffering, or auto-sampleing, timers, or anything like that.
> 

The XYCOM-240 has a 84 bit I/O module ( TTL levels ) and Matrix has a 96 bit
module, the MD-DIO-96 board. These are the most bits I've seen on any board.

XYCOM (313) 429-4971

Matrix (800) 848-2330 or (919) 231-8000
Newsgroups: comp.arch.bus.vmebus
From: lms@swl.msd.ray.com (LEE MARDEN)
Subject: Re: FORCE 40B/16 configuration
Organization: Raytheon Company, Tewksbury, MA
Distribution: comp
Date: Fri, 18 Dec 1992 12:23:00 GMT


From: "LEE MARDEN" <lms>
To: stephens@litsun.epfl.ch
Subject: Re: FORCE 40B/16 configuration
Newsgroups: comp.arch.bus.vmebus,comp.lang.ada

In comp.lang.ada you write:

>We are attempt to configure the VERDIX ADA cross compiler, version 6.0.5, 
>for use on a 68040-based FORCE 40B/16.  We are having a few difficulties 
>configuring the TDM and the Kernel for use with the card.  We were wondering 
>if anyone out there has had any success doing this for the FORCE card or 
>if anyone had any success with some other 68040-based card (Note that 
>this card is used on a VME bus).

>Dan Stephens                                           
>Laboratoire d'informatique Technique                   
>Department Informatique
>Ecole Polytechnique Federale Lausanne
>email : stephens@litsun.epfl.ch

Good Luck!  I spent three weeks trying to do the exact same thing, only
to give up and find another compiler vendor.  Most of the problems
revolve around the fact that the 68020 has a different cache mechanism
which includes a cache register, CAAR, that the 68040 doesn't have.
Since the '020 code wants to push/pop this register frequenctly
during kernel access, it was a pain to comment out.  After about
three weeks of trying, we found another Ada company that has a cross
compiler made specificly for the Force CPU40.  The company is
Systems Designers, located in the UK with a branch office locally
in Burlington, MA.  There product is a 68020 variant, tailored to run
specificly on the Force CPU40.  The only problem is that there
almost exclusively a DEC host site.  We couldn't get a UNIX to CPU40,
all they had was VMS to CPU40.  If you need more info on the company,
let me know.  Good Luck!

-- 
  AdvThanksance,

  Lee S. Marden, lms@swl.msd.ray.com
  Raytheon Company, Missile Systems Division, Tewksbury, MA 01876

-- 
  AdvThanksance,

  Lee S. Marden, lms@swl.msd.ray.com
  Raytheon Company, Missile Systems Division, Tewksbury, MA 01876
Newsgroups: comp.arch
From: schwenk@oin.cis.udel.edu (Peter A. Schwenk)
Subject: Any new instructions in a i486?
Organization: University of Delaware, Newark
Date: Fri, 11 Dec 1992 20:13:06 GMT

Did Intel add any new instructions to the x86 line when they made the 486?
I assume they did, but I don't know what they are.  Besides the on-board FPU
and cache business, did they add any interesting architectural features?
Again I presume they did, but I don't know what they are.  I'm not up on my
architecture stuff, sorry.

Thanks in advance,

	Peter Schwenk
From: moss@cs.cmu.edu (Eliot Moss)
Newsgroups: comp.arch
Subject: Re: Any use for Branch if Even/Odd ?
Date: 11 Dec 92 22:27:28 GMT
Article-I.D.: CRAFTY.MOSS.92Dec11172728
Reply-To: moss@cs.cmu.edu
Organization: Dept of Comp and Info Sci, Univ of Mass (Amherst)

Many garbage collected / dynamic languages use tagging to distinguish pointers
from non-pointers. If one uses the low bit to implement that tag, the branch
has obvious utility ....					ELiot
--

J. Eliot B. Moss, Associate Professor	Visiting Associate Professor
Department of Computer Science		School of Computer Science
Lederle Graduate Research Center	Carnegie Mellon University
University of Massachusetts		5000 Forbes Avenue
Amherst, MA  01003			Pittsburgh, PA  15213-3891
(413) 545-4206, 545-1249 (fax)		(412) 268-6767, 681-5739 (fax)
Moss@cs.umass.edu			Moss@cs.cmu.edu
Newsgroups: comp.arch
From: jdd@cdf.toronto.edu (John DiMarco)
Subject: Re: "Open Systems" (was Re: Comparison of Alpha, MIPS and PA-RISC-II wanted)
Organization: University of Toronto Computing Disciplines Facility
Date: Fri, 11 Dec 1992 19:27:28 GMT

In <id.5POV.SIJ@ferranti.com> peter@ferranti.com (peter da silva) writes:

>In article <jdd.723756690@cdf.toronto.edu> jdd@cdf.toronto.edu (John DiMarco) writes:
>> "Closed systems" means proprietary systems (i.e. a system with hardware 
>> and/or software available only from one vendor). 

>So, if I'm running under Ultrix on a VAX it's a closed system (hardware and
>software available from only one vendor), but if I'm running under SunOS on
>a Sparc-2 it's an open system (since I can buy a Solbourne)? Even if I'm
>running the same application? What if I can run the same application on
>OpenVMS? What if another application only runs on SunOS because it needs
>NeWS or some other SunOS-only software component?

"Openness" is relative. Ultrix on a VAX is more "open" than VMS on a VAX,
since you can replace the Ultrix/VAX combination with some other 
UNIX-type OS/workstation combination with less pain than you can the VMS/VAX
combination. SunOS on a SPARC-2 is more open than these, because you can 
replace SunOS with stock SVR4 (eg. from ICL), and the SS2 with a SS2 clone, 
with even less pain. 

This leads to the following definition: "Openness" is essentially a measure of
the minimum migration cost of replacing a system with another from a different
manufacturer.

Note that calling Suns running SunOS "open" is a misleading thing, because in 
comparison to a 386 running DOS (where you can change OS from MS-DOS to
DR-DOS and system units from one manufacturer to another without recompiling 
your apps or retraining your users), suns are not really that open.

>Any system is only open where it exposes standard interfaces to applications,
>users, and other systems.

Standards are the means, "open" is the result.

John
--
John DiMarco                                              jdd@cdf.toronto.edu
Computing Disciplines Facility Systems Manager            jdd@cdf.utoronto.ca
University of Toronto                                     EA201B,(416)978-1928
Newsgroups: comp.arch,comp.sys.dec,comp.sys.sgi,comp.sys.hp
From: hallam@zeus02.desy.de (Phill Hallam-Baker)
Subject: Re: Comparison of Alpha, MIPS and PA-RISC-II wanted
Reply-To: Hallam@zeus02.desy.de
Organization: Deutsches Elektronen Synchrotron, Experiment ZEUS bei HERA
Date: Sat, 19 Dec 1992 20:47:12 GMT

In article <BzIG5M.GDo@pix.com>, stripes@pix.com (Josh Osborne) writes:

|>In article <1992Dec19.012355.26665@ll.mit.edu> ejon@ll.mit.edu (Eric Jones)
|>writes:
|>>In article <1gt111INNt3b@hpscit.sc.hp.com>, tim@computer.bri.hp.com (Tim
|>Phipps) writes:
|>>|> In a previous article Phil Hallam wrote:
|>>|> [...The OS kernal only supports sequential files...]
|>
|>[someone else said, no fseek means they are random access files... then: ]
|>
|>>But isn't that exactly his point?  Sure you can write an ISAM file 
|>>structure using fseek (and if you're REALLY smart, you might even
|>>write an efficient one), but then how's anyone else going to use
|>>your files?
|>
|>If you want others to access your files you make a lib that has functions
|>to access them.  For example: libdbm, libdbz, and libgdbm, and 4.4's libdb.
|>
|>This has many benifits, and many drawbacks.  Take it elsewhere to disscuss
|>it, it's gone far astray from comp.arch (assuming comp.arch is really
|>comp.arch.hardware, as the FAQ seems to imply).

But it is the paucity of software that prevents anything more novel than
floating point accelerators for standard Von Neumann machines gaining wide
acceptance.

If you want to discuss hardware, you cannot ignore the software aspect. Take the
above for instance. In RMS the filestore offers high level functionality. In
UNIX only low level functionality is offered. Now let us consider the
difficulties of producing an intelligent filestore:

VMS/RMS,
	Done years ago with the HSC. Nothing special about VMS here of course. ICL were
offering intelligent filestores that could do sorting years ago.

UNIX,
	Because the filestore knows only about the fopen, fseek, fread, fwrite and
fclose operations it is easy to interface to any sequential device. However when
the filestore receives an instruction it is only told *what* to do. There is no
clue as to *why* to do it. In this circumstance it is very difficult to do any
form of intelligent cacheing.


--

Phill Hallam-Baker
Newsgroups: comp.arch
From: sysmgr@king.eng.umd.edu (Doug Mohney)
Subject: Re: COMPAQ PROPOSED SCALABLE I/O ARCHITECTURE
Date: Tue, 15 Dec 92 19:46:37 GMT
Organization: Computer Aided Design Lab, U. of Maryland College Park
Reply-To: sysmgr@king.eng.umd.edu

In article <1992Dec15.171554.2781@twisto.eng.hou.compaq.com>, leigh@croatia.eng.hou.compaq.com (Kevin Leigh) writes:

[wondering what Yet Another Standard would do for anyone, since EISA has
limited penetration and Local Bus/PCMICA <sp> have just emerged and are
hitting the streets...]

You guys ever thought of licensing TurboChannel from DEC and building a
Pentium box/server around it? 


                    I have talked to Ehud, and lived.
  -- >                  SYSMGR@CADLAB.ENG.UMD.EDU                        < --
From: je@unix.brighton.ac.uk (John English)
Newsgroups: comp.arch
Subject: Re: Date request
Date: 17 Dec 92 12:53:07 GMT
Organization: University of Brighton, UK

burley@apple-gunkies.gnu.ai.mit.edu (Craig Burley) writes:
: [ ... ] what's the equivalent of a "microprocessor"
: in the English system, an "inch-processor"??  What's the equivalent
: of "nanotechnology"?

Thou-technology? :-)
-- 
-------------------------------------------------------------------------------
John English			| Fudd's first law of opposition:
Dept. of Computing		|    If you push something hard enough, it
University of Brighton		|    *will* fall over.
E-mail: je@unix.brighton.ac.uk	| Testlicle's deviant to Fudd's law:
Fax:    0273 642405		|    What goes in, must come out.
-------------------------------------------------------------------------------
Newsgroups: comp.arch
From: schow@bcarh2d8.bnr.ca (Stanley T.H. Chow)
Subject: Re: Compaq's Proposed Scalable I/O Architecture
Organization: Bell Northern Research Ltd, Ottawa
Distribution: usa
Date: Tue, 15 Dec 1992 21:29:01 GMT

In article <1992Dec11.231814.13317@twisto.eng.hou.compaq.com> simonich@croatia.eng.hou.compaq.com (Chris Simonich) writes:
>*   We're tired of beating our heads against the wall      *
>*   trying to expand the performance of I/O buses. Let's   *
>*   face it, wide-buses are just not a long term cost      *
>*   effective solution for high performance computer       *
>*   solutions.  So here is an alternative...               *
 [...]
>                        CPU
>                         |
>                         |---memory
>                       MIOC
>                       /  \
>                     IOC  dev3
>                     / \
>                 dev1  dev2
 [...]
>*  So, what do you think?  We are interested in making     *
>*  this proposal an open Industry Standard.  As such, you  *
>*  may request further information, give us your comments, *
>*  or ask questions.                                       *

Since no one else has pointed this out:

You may want to ask some of the mainframe type people. Some
of them have a couple of decades of experience in this kind
of design.

Also, it is not clear how this would be "inexpensive" or be
compatible to existing PC software (I am assuming that you
want to run existing PC software).

--
Stanley Chow            InterNet: schow@BNR.CA
Bell Northern Research  UUCP:     ..!uunet!bnrgate!bqneh3!schow
(613) 763-2831
Me? Represent other people? Don't make them laugh so hard.
Newsgroups: comp.arch,comp.lsi,comp.periphs,comp.arch.storage,ba.seminars
From: tdbear@dvorak.amd.com (Thomas D. Barrett)
Subject: Re: CALL FOR PARTICIPATION: HOT CHIPS SYMPOSIUM V
Organization: Advanced Micro Devices, Inc.; Austin, Texas
Date: Thu, 17 Dec 92 14:43:37 GMT

In article <1992Dec17.030506.2042@cascade.Stanford.EDU> freeman@cis.Stanford.EDU (Martin Freeman) writes:
>		     HOT CHIPS SYMPOSIUM V
>		Stanford University, Stanford, CA
>		       August 8-10, 1992

Kinda late notice, isn't it? :)

-- 
| Tom Barrett (TDBear), Sr. Engineer | tom.barrett@amd.com
| AMD PCD / Austin, TX  78741        | v:512-462-6856 / f:512-462-5155
| "No is Yes, and We are All FREE!"  | CO made a #2 no-no... PU!
| My views may not be shared by the organization of origin
Newsgroups: comp.arch
From: peter@ferranti.com (peter da silva)
Subject: Re: Any use for Branch if Even/Odd ?
Organization: Xenix Support, FICC
Date: Sat, 12 Dec 1992 01:15:48 GMT

In article <Bz2MMK.GIL@world.std.com> jhallen@world.std.com (Joseph H Allen) writes:
> In article <endecotp.723992157@cs.man.ac.uk> endecotp@cs.man.ac.uk (Phil Endecott) writes:
> >Can anyone think of a use for the branch if even and branch if odd
> >instructions on the Alpha?  I'm completely baffled.

> That's so it can run 386 code. :-)

Close. As I recall, DEC is very fond of using even/odd for true/false values,
and the VMS interface definition has a lot of even/odd status returns, so it's
likely these instructions are to make it run VMS real good.
-- 
%Peter da Silva/77487-5012 USA/+1 713 274 5180/Have you hugged your wolf today?
/L{lineto}def/C{curveto}def/F{0 562 moveto 180 576 324 648 396 736 C 432 736 L
482 670 518 634 612 612 C}def/G{setgray}def .75 G F 612 792 L 0 792 L fill 1 G
324 720 24 0 360 arc fill 0 G 3 setlinewidth F stroke showpage % "Peerless"
From: rminnich@super.org (Ronald G Minnich)
Subject: Re: COMPAQ PROPOSED SCALABLE I/O ARCHITECTURE
Organization: Supercomputing Research Center (Bowie, MD)
Date: Tue, 15 Dec 1992 20:56:39 GMT

In article <1992Dec15.194637.10009@eng.umd.edu> sysmgr@king.eng.umd.edu writes:
>You guys ever thought of licensing TurboChannel from DEC and building a
>Pentium box/server around it? 

TurboChannel is a dog. 

Actually, seems to me they could look at SCI. Except they want low cost.
But if the CMOS chips for SCI pan out, maybe they will meet the cost 
range.
ron
-- 
you want windows? I got windows. 4608 by 3600,    | rminnich@super.org
16 channels of sound, 4' by 6'. Fun.              | (301)-805-7451 or 7312
Most abused words: open, scaleable, [more later]  |
Newsgroups: comp.arch
From: jan@pallas.neuroinformatik.ruhr-uni-bochum.de (Jan Vorbrueggen)
Subject: Re: Any use for Branch if Even/Odd ?
In-reply-to: andy@SAIL.Stanford.EDU's message of Mon, 14 Dec 1992 20:36:31 GMT
Organization: Inst. f. Neuroinformatik, Ruhr-Universitaet Bochum, FRG
	<id.08RV.WYB@ferranti.com>
	<1992Dec14.203631.16388@CSD-NewsHost.Stanford.EDU>
Date: 15 Dec 92 13:17:34

In article <1992Dec14.203631.16388@CSDNewsHost.Stanford.EDU> 
andy@SAIL.Stanford.EDU (Andy Freeman) writes:

   Does anyone know why they preferred even/odd to >=0/<0?  Sometimes one
   has to test the sign bit, so why not use it whenever one can use any
   bit to split things into two classes?

Part of the reason might be that this distinction (>=0/<0) is used
in a number of places to distinguish a system address, which has the
MSB set, from other data, eg. a PID; this is used in I/O completion:
if <0, the PID cell is reinterpreted as a routine in system space
to call, as this I/O has been started by some system component and 
not a user process.)

	Jan
Newsgroups: comp.arch