From: burman@sol.cs.wmich.edu (SURENDRA BURMAN)
Subject: MSCS Looking for job in VLSI/FPGA/MCM CAD Areas
Keywords: VLSI, FPGA, MCM, CAD, UNIX/C
Organization: Western Michigan Univ. Comp. Sci. Dept.
Date: Thu, 20 Aug 1992 16:40:04 GMT

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                      SURENDRA BURMAN 
                      ---------------
1715 Knollwood, Apt #P-12          Department of Computer Science
Kalamazoo, MI-49007                Western Michigan University 
burman@cs.wmich.edu                Kalamazoo, MI 49008
(616) 383-3256                     (616) 387-5645 

CAREER OBJECTIVE   A challenging career as a VLSI/MCM/FPGA CAD engineer.

EDUCATION          M.S., Computer Science, Western Michigan University,
----------         Kalamazoo, MI.  (Jan. 1989 - ) 

		           Areas of Concentration: VLSI Design Automation, 
                   Multichip Modules, Design and Analysis of Algorithms.      

                   B.E., Electronics & Communication Engineering,
                   Karnataka Regional Engineering College, Surathkal, India.		
                   (Sept. 1983-Aug. 1987) 

PUBLICATIONS       New Channel Segmentation Model and Associated Routing
------------       Algorithm for High Performance FPGAs, 
                   Accepted for Presentation at IEEE/ACM ICCAD-92 at Santa Clara,
                   (Co-authored with K. Chander and N. A. Sherwani).

                   Improved Global Routing using Lambda-Geometry,
                   Proceedings of the 29th Annual Allerton Conference
                   on Communication, Control and Computing, Allerton,
                   pp. 1083-1092, 1991.         
                   (Co-authored with Hang Chen and N. A. Sherwani)

                   Multichip Modules: A Packaging Technology for 90s
                   Available as Technical Report TR/92-18
                   (Co-authored with N. A. Sherwani), submitted.    

                   Programmable Multichip Modules
                   Available as Technical Report TR/92-25
                   (Co-authored with N. A. Sherwani), submitted.    

                   3D Hierarchical MCM Router    
                   (currently working on it).    

                   An Introduction to Multichip Module Technology,
                   (A monograph to be completed in September '92)
                   (Co-authored with N. A. Sherwani). 
                                                                             
EXPERIENCE         Research Project Assistant in the Department of Compute
----------         Science, Western Michigan University.  (Sept. 1990 - ) 
                                                    
                   Summer Intern, Hardin Software, Kalamazoo, Michigan.
                   (May. 1990 - Sept. 1990)
												
                   Research Project Assistant} in the Department of Computer
                   Science, Western Michigan University. 
                   (Jan 1990 - May 1990)  
                                                     
                   Graduate Consultant in the Academic Computer Services,
                   Western Michigan University.
                   (Sep. 1989 - Dec. 1989) 
                                          
                   Computer Lab Consultant}, Academic Computer Center,
			       Western Michigan University, Kalamazoo, Michigan.    
                   Duties involved consulting users on software packages,
                   systems, programming assignments etc.
                   (Jan. 1989 - Sept. 1989)

MAJOR PROJECTS     Global Router based on Steiner-Min-Max Tree, implemented
--------------     this routing algoritm in UNIX/C. This router uses the steiner 
                   min-max tree to model the multiterminal nets in a gate array 
                   environment.
                           
                   MISER, implemented the Compaction part of this three 
                   layer channel routing package UNIX/C. MISER uses an integrated
                   approach to channel routing and compaction problems.
                                                                   
                   High Performance FPGA Router, implemented this router
                   in UNIX/C under X-window system. This package consists of
                   an FPGA router specially designed for high performance 
                   applications for a new channel segmentation model. 
                                                                  
                   Multichip Modules: Performed a comprehensive survey and 
                   analysis of the existing multichip module technologies.
                                                                   
LANGUAGES/SYSTEMS  C, BASIC, FORTRAN, Pascal, Prolog, PDP-11 Assembly
-----------------  Language, UNIX, SunOS, VAX-VMS, MS-DOS, Macintosh 
                   Operating System and X-Window System.
											   		
SOFTWARE PACKAGES  Magic, LEDIT, LaTex, XFIG, CapFast, WordPerfect, 
-----------------  Lotus 1-2-3, dBase III+, MacWrite, MacPaint, 
                   MicroSoft Works, Kermit, Hypercard, Macdraw, 
                   Cricket Graph, PRL Expert System Shell,
                                                            
HONORS             Excellence in Research Award 1991-92, Department of
------             Computer Science, Western Michigan University.
                                                                         
                   Merit Scholarship (Sept. 1983 - Aug. 1987), Department of
                   Electronics and Communications, Karnataka Regional Engineering  
                   College, India.                                                
                															
MEMBERSHIP         ACM  Special Interest Group on Design Automation.         
----------

PARTICIPATION      Coordinator: Second Great Lakes Symposium on VLSI   
-------------      held at Western Michigan University in February 1992. 
                   Technical Chair: Graduate Symposium on VLSI       
				   held at Western Michigan University in April, 1991.        
																		
				   Session Chair: First Great Lakes Symposium on VLSI   
                   held at Western Michigan University in March 1991.  
                                                                    
                   Participated in the 29th Design Automation Conference     
                   held in San Francisco in June 1991.                      
                                                                         
REFERENCES         Prof. Naveed Sherwani, Dept. of CS, WMU, Kalamazoo, MI.        
----------         Prof. Fred  Boals, Dept. of CS, WMU, Kalamazoo, MI.           
                   Prof. Dionysios Kountanis, Dept. of CS, WMU, Kalamazoo, MI.   
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