From: kimb@phred.UUCP (Kim Butler)
Newsgroups: comp.cad.cadence,comp.lsi.cad
Subject: Summary Design Archive
Date: 14 Sep 92 15:49:52 GMT
Reply-To: kimb@phred.UUCP
Followup-To: Early Posting
Organization: Physio-Control

Chuck Phillips or any other Cadence/Valid Users,

	Were there any groups at the Cadence/Valid users meeting that
	address the current problem with Design Archive?

	A couple weeks ago I posted this question and only recieved a
	two responses, here there are:
________________________________________________________________________
________________________________________________________________________

If you find a better answer, please post it to the next. The High
Energy Physics Group at the U of I has been doing PCB designs on
Daisy/DAZIX/Intergraph since 1985. (And paper and pencil and tape
designs since before I knew what electricity was :-) Most of our
designs are for equipment at Fermilab, SLAC, etc., so our lifetimes are
in the 5-10 year range.

We have come up with two solutions, both of which we use, and neither
of which we like:
 
 1) the design archive is equal to *EVERYTHING* that you used to make
   the board. The schematics, the netlists, the libraries, the CAE
   tools, the operating system, THE WORKSTATION ... as it was the day
   that you sent the board out for fab! We only have one
   such workstation in moth-balls (we are actually about to dispose of it
   because of alternative 2 below), but I have heard that larger shops
   do this routinely.
 
2) save as much as you can, as best as you can, and each time you get
   a new release of the CAE tools and libraries, push *ALL* of your old
   designs through the new tools to bring them up to current levels.
 
We actually skipped a couple of software releases, but we are currently
"rerunning" all of our old Daisy designs through our current Intergraph/
Dazix software so that we can throw away our old Daisy Logician workstations.
 
The problem lies in the use of "proprietary" representation of data.
The CAE vendors claim that it improves the performance of their tools
to maintain the design data as binary. And they maintain that the
binary representatin is a trade-secret; if they revealed that, then
they would loose some of the market to third-parties.

What ever you save
1) it will not be enough (unless you save *everything*), or
2) 5 years from now it will be in  an incompatible format with the present
   tools, unless you periodically "update".

===
For what it is worth, the only neutral-format data that we do keep is
Gerber photoplot data, not IGES. Even for board outline and mechanical
spec, we use a Gerber photoplot. The concern with IGES is that too
many different tools use IGES too many different ways; it is *not* a
conforting fact that consulting companies exist to translate
IGES *to* IGES (vendor A to vendor B).

===
As I said, if you get a better answer, let me (us) know! Storing
design data seems to be like storing nuclear waste; anybody can
do it for a year or two - the hard part is doing it forever.

Mike Haney <haney@cs.uiuc.edu>
Research Engineer
U of I

_______________________________________________________________________________
_______________________________________________________________________________

 i am responding to Your posting into the comp.lsi.cad news group.
  Our company is offering a tool called "ceBox EDIF Viewer" for
  SUN SPARCstation. We will introduce the tool next week at the
  EURO-DAC conference in Hamburg, Germany.

  If You are going to archive Your SCHEMATICS using EDIF,
  our tool would be very usefull to maintain the EDIF-DATA. 

  Here is a short description of the product:

=====================================================================


        EURO-DAC'92 product announcement

              "ceBox EDIF Viewer"

At the EURO-DAC'92, "concept engineering GmbH" will introduce a
new product called "ceBox EDIF Viewer". The tool is an easy to 
use program that helps to comfortably analyse any EDIF 2.0.0 file 
(EDIF = Electronic Data Interchange Format). Supported EDIF-Views 
are SCHEMATIC, NETLIST and GRAPHIC. 

EDIF SCHEMATIC and GRAPHIC data is displayed on a graphic window. 
This window brings EDIF data to life with the ability to zoom, pan, 
scroll and to print (PostScript) any part of the graphics. Once a 
SCHEMATIC is loaded, it is very easy to analyse LIBRARIES, CELLS, 
INSTANCES, NETS, CONNECTIVITY, COMMENTGRAPHICS, PROPERTIES and any 
other information contained in EDIF files. Especially engineers who
are not so familiar with EDIF, will find it easy to browse through 
both, the EDIF data structures and the design hierarchy. EDIF files 
without graphic information (pure NETLIST data) can be analysed by 
navigation through several information windows.

The EDIF Viewer is entirely coded using the C++ programming language
and runs on Sun SPARCstations.

An optional EDIF++ programming interface (C++ EDIF interface) is 
available and enables the programmer to write customer specific 
interface software. For example the EDIF++ interface can be used to 
write xyz-to-EDIF or EDIF-to-xyz interface programms. In this case, 
the viewer module is used as a graphical debuger that works like a
"magnifying glass" into the EDIF object structure.

The product is very helpful for the software engineer who develops EDIF 
interface software. The EDIF Viewer also helps to solve problems when 
the transfer of EDIF data fails. Finally the tool can be used for 
documentation and management of EDIF data.

"concept engineering" will present the tool at the booth of Sun 
Microsystems GmbH (booth 5207). Further information can be obtained 
from:

  concept engineering GmbH
  Burkheimer Str. 10
  W-7800 Freiburg, Germany
  Phone: (49)-761-473099
  Fax:   (49)-761-441063
 
=====================================================================
 
  We are sending out DEMO Versions of the tool.
  If You are interested in the DEMO Version or
  in other information about the product,
  please don't hesitate to contact me.
 

Best regards

Gerhard Angst


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  +-------+                             .                               .
  |       |   concept engineering GmbH  .  Tel  : +49 (0)761-473099     .
  |       |                             .  Tel  : +49 (0)761-441063     .
  |       |                             .                               .
  |       |      Burkheimer Str. 10     .   gat@concept.de              .
  |concept|       W-7800 Freiburg       .  (gat@concept.uucp)           .
  +-------+          Germany            .                               .
 engineering                            .                               .
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