HDTenEightyP/NetNews huggingface dataset:
From: zawodny@arbd0.larc.nasa.gov (Dr. Joseph M Zawodny)
Subject: Re: CONTTW.PRO and EXPAND.PRO - some bug fixes, enhancements
Organization: NASA Langley Research Center, Hampton, VA
Date: Fri, 9 Oct 1992 11:59:37 GMT

  Oh, one other thing I forgot to mention and should be of interest.  I got a
modified version of EXPAND from Dave Stern of RSI which I would like to pass on
to the net.  It employs an interesting trick to avoid all the array indexing I
was doing.

	Here it is ( and thanks again Dave!).

 Joseph M. Zawodny   (KO4LW)                      NASA Langley Research Center
 zawodny@arbd0.larc.nasa.gov                      MS-475,    Hampton VA, 23681


;+
; NAME:
;	EXPAND
; PURPOSE:
;	Array magnification  (CONGRIDI like except that this really works!)
; CATEGORY:
;	Z4 - IMAGE PROCESSING
; CALLING SEQUENCE:
;	EXPAND,A,NX,NY,RESULT [,MAXVAL=MAXVAL,FILLVAL=FILLVAL]
; INPUTS:
;	A	Array to be magnified
;	NX	Desired size of X Dimension
;	NY	Desired size of Y Dimension
; Keywords:
;	MAXVAL	Largest good value. Elements greater than this are ignored
;	FILLVAL	Value to use when elements larger than MAXVAL are encountered.
;		Defaults to -1.
; OUTPUTS:
;	RESULT	Magnified Floating point image of A array (NX by NY)
; COMMON BLOCKS:
;	NONE
; SIDE EFFECTS:
;	NONE
; RESTRICTIONS:
;	A must be two Dimensional
; PROCEDURE:
;	Bilinear interpolation.
;	Not really fast if you have to swap memory (eg. NX*NY is a big number).
;	OK Postscript users don't forget that postscript pixels are scaleable!
; MODIFICATION HISTORY:
;	Aug 15, 1989	J. M. Zawodny, NASA/LaRC, MS 475, Hampton VA, 23665.
;	Aug 26, 1992	JMZ, Added maxval and fillval keywords.
;	Sep 30, 1992	DMS of RSI, Improved the bad point location algorithm.
; Please send suggestions and bugreports to zawodny@arbd0.larc.nasa.gov
;-
pro EXPAND,a,nx,ny,result,maxval=maxval,fillval=fillval

	s = size(a)
	if(s(0) ne 2) then begin
		print,'EXPAND: *** array must be 2-Dimensional ***'
		retall  ; This will completely terminate the MAIN program!!!
	endif

   ; Get dimensions of the input array
	ix = s(1)
	iy = s(2)

   ; Calculate the new grid in terms of the old grid
	ux = findgen(nx)*((ix-1.)/(nx-1.))
	uy = findgen(ny)*((iy-1.)/(ny-1.))

   ; Interpolate the result
	result = interpolate(a, ux, uy, /GRID)

   ; Are we to look for and ignore bad data?
	if(n_elements(maxval) ne 0) then begin
	; Find where missing points end up
		bad_pts = interpolate(float(a gt maxval), ux, uy, /GRID)
	; The only Non-zero points are those resulting from
	; bad points.  Get their subscripts in the result
		bad_subs = where(bad_pts, count)	; Any bad points
		if count ge n_elements(a) then goto, out	; All bad
		if n_elements(fillval) le 0 then fillval = -1
	; Substitute missing value
		if count gt 0 then result(bad_subs) = fillval
	endif

; Done
return
OUT:	; If we had a problem
print,'Entire input array is greater than MAXVAL, ('+strtrim(maxval,2)+')'
return
end
From: bowman@csrp.tamu.edu (Kenneth P. Bowman)
Newsgroups: comp.lang.idl-pvwave
Subject: Plotting colored points with PLOTS
Date: 13 Oct 92 15:27:44 GMT
Article-I.D.: bowman.bowman-131092102253
Followup-To: comp.lang.idl-pvwave
Organization: Texas A&M University

I am trying to use PLOTS to plot points so that the color of the point
depends upon a third parameter (tag).  Can anyone tell me why this works:

   FOR i = 0, n-1 DO BEGIN
      PLOTS, x(i), y(i), PSYM=3, COLOR=tag(i)
   ENDFOR

but this doesn't?

   PLOTS, x, y, PSYM=3, COLOR=tag

The documentation says that color can be a vector for PLOTS.  I am running
IDL 2.3.2 under AIX 3.2.

Thanks, Ken Bowman

---------------------------------------------------------------------------
Dr. Kenneth P. Bowman                          409-862-4060
Climate System Research Program                409-862-4132 fax
Department of Meteorology                      bowman@csrp.tamu.edu
Texas A&M University
College Station, TX   77843-3150
From: rarback@bnlux1.bnl.gov (harvey rarback)
Newsgroups: comp.lang.idl-pvwave
Subject: Re: V2.4.0 comments
Summary: Crude IDL procedure for widget and command line input
Date: 12 Oct 92 15:45:19 GMT
Article-I.D.: bnlux1.1992Oct12.154519.27146
Organization: Brookhaven National Laboratory, Upton, NY 11973

Fred Knight (knight@ll.mit.edu) asks:

>More generally, do others want simultaneous input to widgets and the command
>line like I do?  I usually don't want to build all the capabilities I want into
>a widget and usually avoid using them.  Instead, I use the normal command input
>with display to windows, with only brief work with widgets to perform specific
>tasks.  No doubt others who are doing production runs or many similar tasks
>operate more with widgets.  One way to satisfy me would be to have a command
>line widget, which could be part of any larger widget.  I have tried versions
>of such a widget using an editable text widget with commands executed using the
>execute function.  However, the output is misdirected and variables are not
>available unless they are in common or are created beforehand.  Possibly the
>new debugger for X windows will be a partial solution.  In summary, I have two
>points for discussion.

> 1) I wonder whether others want simultaneous operation with a widget
>    and the command line.
> 2) I suggest that creating a command-line widget would satisfy my needs.

I certainly would like this capability.  I have built a few IDL widget
applications which are often used by non-IDL-literate operators.  For debugging
purposes I have needed simultaneous command line input, and so I wrote the
following crude procedure, called from a widget menu.  The output
goes to the right place;  variables are available just as they are between any
two IDL procedures.  I have also written a procedure to create a DECterm for
interactive DCL.  Write me if you want a copy of the code.

>Fred
>--
>=Fred Knight (knight@ll.mit.edu)        (617) 981-2027
> C-483\\MIT Lincoln Laboratory\\244 Wood Street\\Lexington, MA  02173


pro idl_command ; escape (from Xmanager event loop) to accept IDL command

on_ioerror, bail_out
print, ''
print, ''
print, 'Enter interactive IDL commands after ":". ' + $
       'Enter "EXIT" to return to application.'
print, 'Do NOT spawn DCL commands. Use DCL Commands option instead.'
print, 'Command line editing is NOT available.'
print, ''
done = 0

repeat begin
  print, !prompt, format = '(a, $)'
  command = ''
  read, command
  if strupcase( command) eq 'EXIT' then begin
    done = 1  
    print, 'Click on your application widget to continue.'
    print, ''
  endif else status = execute( command)
endrep until done eq 1

bail_out:

end
From: knight@ll.mit.edu (Fred Knight)
Newsgroups: comp.lang.idl-pvwave
Subject: V2.4.0 comments
Date: 9 Oct 92 15:38:00 GMT
Article-I.D.: ll.1992Oct9.153800.24398
Reply-To: knight@ll.mit.edu (Fred Knight)
Organization: Group 45, MIT Lincoln Lab.
Originator: knight@ll.mit.edu (Fred Knight)


In article <9OCT199200575590@stars.gsfc.nasa.gov>, landsman@stars.gsfc.nasa.gov (Wayne Landsman (301)-286-3625) writes:
|>    (2)  The widget help has been rewritten in C so that one can return
|> to the IDL prompt without losing the help display.    One can have an 
|> IDL help icon working throughout the session.

Wow! Does this mean that there's the possibility that ALL widgets could operate
this way, i.e., allowing simultaneous input from both the widget and the 
command line?  Possibly the C code could be made available so others could
make their own widgets operate this way.  I suppose, though, that this forces
one to work with the x toolkit rather than the IDL widgets.

More generally, do others want simultaneous input to widgets and the command
line like I do?  I usually don't want to build all the capabilities I want into
a widget and usually avoid using them.  Instead, I use the normal command input
with display to windows, with only brief work with widgets to perform specific
tasks.  No doubt others who are doing production runs or many similar tasks
operate more with widgets.  One way to satisfy me would be to have a command
line widget, which could be part of any larger widget.  I have tried versions
of such a widget using an editable text widget with commands executed using the
execute function.  However, the output is misdirected and variables are not
available unless they are in common or are created beforehand.  Possibly the
new debugger for X windows will be a partial solution.  In summary, I have two
points for discussion.
 
 1) I wonder whether others want simultaneous operation with a widget
    and the command line.
 2) I suggest that creating a command-line widget would satisfy my needs.

Fred
-- 
=Fred Knight (knight@ll.mit.edu)	(617) 981-2027
 C-483\\MIT Lincoln Laboratory\\244 Wood Street\\Lexington, MA  02173
From: benell@spot.Colorado.EDU (Kirk D. Benell)
Newsgroups: comp.lang.idl-pvwave
Subject: Re: Using cpp with IDL
Date: 7 Oct 92 21:38:25 GMT
Distribution: cu
Organization: University of Colorado, Boulder

In article <1992Oct7.195102.10633@colorado.edu> knowles@news.Colorado.EDU (Ken Knowles) writes:
>Has anyone tried to use the C preprocessor to fix some of the
>shortcomings of IDL? Here's a few examples of what I have in
>mind:
>
>Problem: It's difficult to modify common block definitions which
>must appear in each procedure that references the common block.
>Solution: Write one definition in a separate file and then
>use the #include directive.
>
you dont have to use a #define directive. Use the "@". If file test.inc
contains common block definitions, just put the following command in each
file that needs the common blocks:

@test.inc

Be sure that the "@" is in the first column of the program file.

>Problem: Debugging is awkward, debug code must be commented out 
>and manually uncommented.
>Solution: conditional compilation with #ifdef DEBUG directive.
>
try using keywords and the KEYWORD_SET() logical function.
Newsgroups: comp.lang.idl-pvwave
From: zawodny@arbd0.larc.nasa.gov (Dr. Joseph M Zawodny)
Subject: Loss of THICK keyword in AXIS command
Organization: NASA Langley Research Center, Hampton, VA
Distribution: comp.lang.idl-pvwave
Date: Fri, 9 Oct 1992 15:02:29 GMT

 The AXIS command no longer allows the use of the THICK keyword under IDL
version 2.4.0.  The thicknesses are now controlled by the !X(yz).THICK system
variable.  Why was this regressive "feature" introduced into Version 2.4.0?
Well I guess I'll have to edit all those programs so that they save the
current values of x, y, and z  -.thick, set them temporarily to a different
value, call AXIS, and finally restore the original values  8-(  .

 On a positive note, I'm very pleased that V-2.4.0 allows the formatting of
axis tickmark labels to be under program control.

 Joseph M. Zawodny   (KO4LW)                      NASA Langley Research Center
 zawodny@arbd0.larc.nasa.gov                      MS-475,    Hampton VA, 23681
From: jat@water.ca.gov (Jatinder Singh)
Newsgroups: comp.lang.idl-pvwave
Subject: font width in text widgets
Date: 15 Oct 92 21:08:04 GMT
Distribution: comp.lang.idl.pv-wave
Organization: Calif. Dept. of Water Resources


	I'm using the IDL widgets library routine 'xdisplayfile' to
display formatted text (ascii).  The file that I pass to
'xdisplayfile' has all the correct data in the correct positions.
This file was written to using 'printf' and 'format'.  
	However, when this formatted file appears in the text widget
generated by 'xdisplayfile', not all of the data is lined up properly.
	I think that this problem is caused by the fact that not all of
the characters in the text widget are of equal width.
	
	My questions are 
  (1) Is this really why the data isn't in the positions I expected ?
  (2) How do I solve this problem ?

	I called up RSI, and I was informed that the fonts were
probably my problem, and I could set the fonts by using
widget_control' with 'default_font' set.  
	I figured that I had missing something in the widgets
addendum (Ver. 2.3.2).  NOT!  There is no reference to 'default_font'.

  (3) If  this is a potential solution, what do I set 'default_font'
to ?
 
	I've tried a few different fonts and I still get the same
undesired results.  (the font types do change)
--
Jatinder Singh			916-653-7564
jat@water.ca.gov		...ucbvax!ucdavis!caldwr!jat
Any opinions expressed are my own; they do not represent the DWR.
Newsgroups: comp.lang.idl-pvwave
From: knowles@news.Colorado.EDU (Ken Knowles)
Subject: Using cpp with IDL
Organization: University of Colorado, Boulder
Distribution: cu
Date: Wed, 7 Oct 1992 19:51:02 GMT

Has anyone tried to use the C preprocessor to fix some of the
shortcomings of IDL? Here's a few examples of what I have in
mind:

Problem: It's difficult to modify common block definitions which
must appear in each procedure that references the common block.
Solution: Write one definition in a separate file and then
use the #include directive.

Problem: Debugging is awkward, debug code must be commented out 
and manually uncommented.
Solution: conditional compilation with #ifdef DEBUG directive.

Problem: There's no way to define symbolic constants or other macros.
Solution: #define directive.

Are there better ways within IDL to do these thing?
If you want to try the C preprocessor the command on my machine is:
"/lib/cpp -P in_file out_file" and for debug add "-D DEBUG" after -P
I usually suffix the editable code with .pre and the compilable 
code with .pro. I'm also thinking of developing a library of macros
to extend the language ala RATFOR. Has anybody else done this?
Newsgroups: comp.lang.idl-pvwave
From: zawodny@arbd0.larc.nasa.gov (Dr. Joseph M Zawodny)
Subject: Do NOT use latest version of EXPAND.PRO
Organization: NASA Langley Research Center, Hampton, VA
Distribution: comp.lang.idl-pvwave
Date: Fri, 9 Oct 1992 19:10:51 GMT

	AARRRGGG!  The supposedly improved version of EXPAND.PRO posted today
does not produce the same results as older versions.  The new version does not
trim the "bad data" region properly.  IDL-wizards may want to figure out why
it does not work (I sure looks like it should to me).  First one to explain why
it should not work and propose a fix will get the IDL-Hacker-of-the-day award.

	Sorry for any inconvience,

 Joseph M. Zawodny   (KO4LW)                      NASA Langley Research Center
 zawodny@arbd0.larc.nasa.gov                      MS-475,    Hampton VA, 23681
From: sbangalo@tomcat.ece.uc.edu (Subramanyam)
Subject: IEEE standard 1164 (std_logic) info requested
Organization: Unversity of Cincinnati, ECE Dept
Distribution: na
Date: Thu, 15 Oct 1992 00:14:03 GMT


   Hi Netters,

	I need information on IEEE standard 1164 (std_logic). Can anyone
	out there suggest me an ftp site or any other source where I can
	get hold of it.


   Thanks in advance.
   Subramanyam.
-- 
   Subramanyam B.S.
   sbangalo@thor.ece.uc.edu (or)
   bsubrama@uceng.uc.edu
From: mitd_ss@uhura.cc.rochester.edu (Mitch Diamond)
Newsgroups: comp.lang.vhdl
Subject: alliance
Date: 16 Oct 92 18:19:07 GMT
Organization: University of Rochester (Rochester, NY)


HI I am looking for a program called alliance which is a vhdl 
logic simulator package. does anyone know of a ftp site that I can 
get this package

thanks

THE MITCH MAN

mitd_ss@uhura.cc.rochester.edu
From: mitd_ss@uhura.cc.rochester.edu (Mitch Diamond)
Newsgroups: comp.lang.vhdl
Subject: PD vhdl prog for IBM 486
Date: 13 Oct 92 17:54:43 GMT
Organization: University of Rochester (Rochester, NY)

HI I am looking for a public domain version of a vhdl compiler.
also if there is pd simulator to go with it, then can someone let me know of an
ftp site to find it

thanks for your help

MITCH 
mitd_ss@uhura.cc.rochester.edu
Xref: sparky comp.lang.vhdl:482 comp.lang.verilog:376
From: jcooley@seqp4.sequoia.com (John Cooley)
Newsgroups: comp.lang.vhdl,comp.lang.verilog
Subject: VHDL Random Number Generators
Date: 12 Oct 92 21:26:09 GMT
Organization: Sequoia Systems Inc., Marlboro, Mass.

> From: jinsoo@snucom.snu.ac.kr (Jinsoo Kim)
> 
>   Is there any pre-built libraries that generate random numbers in VHDL?
> Or is there anyone who know the algorithm taht can be easily programmed
> in VHDL?  Any suggestion will be welcome.

I'm not terribly fluent in VHDL, so I'd like to suggest that if there are no
built in random number generators in VHDL but there's a way to do a systems
call while simulating in VHDL, there's some awfully good public domain random 
number generators in C to be found.

If you have a choice between Verilog and VHDL, in Verilog it's already
built in:

	reg [3:0] fooby;

	always @ (some triggering signal)

	  fooby = ($random % 4'b1101);    /* generates a random value
					    from 0000 to 1101  */ 

and if you want to get fancy, there's a whole set of stochastic functions
available, too!    ( Ah! - the joys of Verilog! )

					- John Cooley, the ESNUG guy

 ===========================================================================
 Trapped trying to figure out a Synopsys bug?  Want to hear how others dealt
 with it ?  Join the E-Mail Synopsys Users Group!  To join, E-mail me today! 
 ===========================================================================
      !!!     "It's not a BUG,    |           jcooley@sequoia.com
     /o o\  /  it's a FEATURE!"   |       jcooley@sequoia.sequoia.com
    (  >  )                       |           (508) 480-0800 x1241
     \ - /       |    All else fails to get to me? Try: jcooley@miracle.com
     _] [_       |        "This here ain't no one's opinion 'cept my own."
Newsgroups: comp.lang.vhdl
From: daniel@clsi.COM (Daniel Barclay)
Subject: Re: doubles in VHDL 92?
Organization: CAD Language Systems Inc.
Date: 12 Oct 92 10:45:58

> Does anyone know if the draft VHDL 92 standard includes double
> precision reals?

The draft VHDL 1992 standard does not require double-precision floating-point
numbers.  The LRM (draft version 7) defines the minumum precision for floating-
point numbers as six digits of decimal precision.  An implementation may 
implement floating-point numbers with more precision than this.  (There's 
nothing in the standard that prevents this.)
--
Daniel S. Barclay			CAD Language Systems, Inc.
					Suite 101, 5457 Twin Knolls Rd.
Why can't _I_ think of a signature?	Columbia, MD  21045  USA
Newsgroups: comp.lang.vhdl
From: mulligan@wotangate.sc.ti.com (Danny Mulligan)
Subject: IEEE Waves package ?
Keywords: VHDL IEEE Waves testvectors
Reply-To: mulligan@wotangate.sc.ti.com
Organization: Texas Instruments Inc.
Date: Mon, 12 Oct 1992 15:34:01 GMT

I heard recently about something called the Waves package which was supposed to
be an IEEE standard for exchanging (test)vectors between simulators with ascii
format files.

Does anyone know anything about this?  
Or does anyone have any advice about how to exchange simulation vectors in a
non-vendor specific way.  (We will need to extract module level simulation
vectors from a system simulation.  We will use these module level vectors to
simulate the different modules in a gate or transistor level simulator (probably
Lsim).)

BTW: Does anyone have a list of all the IEEE standards for VHDL?  I already
know of IEEE_1076 (VHDL) and IEEE_1164 (std_logic) - are there others?

Thanks

Danny 

---
--------------------------------------------------------------------------------
Danny Mulligan                       Texas Instruments Houston
mulligan@wotangate.sc.ti.com

The opinions expressed here are not necessarily those of my employer.
Use at your own risk.  Your mileage may vary.
--------------------------------------------------------------------------------
From: danielho@netcom.com (Daniel Ho)
Subject: VHDL sythesis cookbook contract
Followup-To: poster
Keywords: VHDL, Sythesis
Organization: Netcom - Online Communication Services  (408 241-9760 guest) 
Distribution: ca
Date: Thu, 15 Oct 1992 17:40:15 GMT

We are looking for someone to develop a VHDL sythesis cookbook for designers
who are using VHDL.  The cookbook should have plenty of examples and reference
work for circuit designers to understand.  The cookbook needs to be developed
in 2 to 3 months.

The person we need should have
	o   VHDL fluency
	o   Sythesis expertise
	o   Good communication and writing skills

Please reply to this account, or call 408-437-7763.

Daniel Ho
From: ltliu@cory.Berkeley.EDU (Lok Tin Liu)
Newsgroups: comp.lang.vhdl
Subject: on-line document and textbooks for VHDL
Date: 7 Oct 1992 22:09:01 GMT
Organization: UC Berkeley, University of California Berkeley
Distribution: world
NNTP-Posting-Host: cory.berkeley.edu

Can someone tell me from which ftp site I can find some on-line documentation
and introduction to VHDL?  I would also appreciate if anyone would recommend
me some good books to learn VHDL.

Thanks.

-- Lok
From: markg@pdx820 (Mark Gonzales)
Newsgroups: comp.lang.vhdl
Subject: Re: info on VHDL simulators requested
Date: 9 Oct 92 19:04:55 GMT
Organization: Intel Corp., Hillsboro, Oregon

In article <92282.144036PSINANDE@ESTEC.BITNET> <PSINANDE@ESTEC.BITNET> writes:
>[...]
>I have been using and evaluating several VHDL tools for input, simulation
>and synthesis. I'll summarize some of the simulator experiences.
>[...]
>An overview of some VHDL simulators, using the above criteria:
>[...]
>Synopsys VSS 2.2:
>We have it since last year, and are quite happy with ease-of-use and
>the debugger. The waveform display is barely acceptable, though, and I
                                       ^^^^^^^^^^^^^^^^^
why do you say this? We have found it useable. It produces very pretty
printouts, unlike some other vendor's tools that give you a bit mapped
screen-dump. We did have some problems in the initial stages of using
it, but it seems fine now. The user interface on the viewer could be
improved though.

>really hope this will be improved in v 3.0 (1993). Synopsys are the
>only one providing a make facility, which makes your life
>easier when dealing with many design units. There is also a code
>coverage utility. The Synopsys simulator is interpreting, which gives
>very good analysis speed, but also reasonable simulation speed. We
>have only found one (very trivial) bug so far.

We have found Synopsys' VHDL compiler accepts a few illegal VHDL-1076
constructs, which is a problem if you are trying to write portable code.

>[...]
>Peter Sinander           Fax: +31-1719-84295    email: psi@wd.estec.esa.nl
>ESTEC WDN                European Space Agency Technology Centre
>
Mark Gonzales
Not speaking for Intel
Newsgroups: comp.lang.vhdl
From: ramesh@zycad.com (Ramesh Narayanaswamy)
Subject: JOB POSTING: VHDL Compiler Position, Zycad Corp, Fremont, CA
Organization: Zycad Corporation,  Fremont, CA
Distribution: comp.lang.vhdl
Date: Tue, 6 Oct 1992 19:16:49 GMT



Zycad Corporation is a leading edge supplier of high speed simulation
tools and software for CAE applications. Our engineering strategy
is a top-down systems approach to manage and simulate a wide spectrum
of complex designs (upto 4,194,304 gates) from the architectural level 
through the gate level.  Our engineering team is a unique grouping of
Computer Scientists who have implemented software/hardware solutions
for CAE problems.

We have the following immediate opening in our engineering 
group -

1.	Senior Engineer - VHDL Compiler

You will apply your expertise in compilers and data structures
to develop a compiler for VHDL (An Ada-like hardware description
language). The target machine, ViP, is a special purpose multicomputer
designed to execute VHDL Simulation Efficiently. 

You will participate in all phases of product development from 
Architectural Design through Product Delivery.

This position requires an MS in EE/CS with 4+ years experience 
developing and delivering Compilers in a UNIX/C environment.
Experience with VHDL, Intermediate Languages, and knowledge of
Parallelizer Techniques such as Data Dependence Analysis is desirable.

JOB NUMBER: TWK1

Please respond to -

	E-MAIL:
	  ramesh@zycad.com

	FAX:
	  510-623-4550
	  attention: Ramesh N., Job <number>

	US MAIL:
	  Zycad Corp
	  47100 Bayside Parkway
	  Fremont
	  CA 94538-9942
	  attention: Ramesh N., Job <number>
From: markg@pdx820 (Mark Gonzales)
Newsgroups: comp.lang.vhdl
Subject: doubles in VHDL 92?
Date: 9 Oct 92 18:48:45 GMT
Organization: Intel Corp., Hillsboro, Oregon

Does anyone know if the draft VHDL 92 standard includes double
precision reals?

Thanks

Mark