HDTenEightyP/NetNews huggingface dataset:
From: ngai@nova.bellcore.com (John Ngai)
Subject: Re: Overdrive for the 486/50??
Organization: Bellcore
Date: Tue, 15 Dec 92 16:27:02 GMT


In article <1992Dec15.141953.21972@dvorak.amd.com>, tdbear@dvorak.amd.com (Thomas D. Barrett) writes:
|> In article <8f9__KS00WB5Qu_ogq@andrew.cmu.edu> fj05+@andrew.cmu.edu (Faisal Nameer Jawdat) writes:
|> >
|> >Well for one thing, the dx50 and the dx2/66 are different chips
|> >needing different motherboards, so it's quite possible that to switch
|> 
|> These two devices may or may not be the same... the OverDrive(tm) version
|> is of slightly different pinout and is plugged into the OverDrive(tm)
|> compatible socket.  There is also an OEM version which has identical 
|> pinout to the DX, but may be hard to find on the open market.
|> 
|> As for other issues... the DX2/66 uses a 33MHz clock and the DX50 uses
|> a 50MHz clock.  These frequencies are so far apart that it is unwise to 
|> replace crystals since the chipset and clock filtering components (for 
|> FCC/VDE) may not be able to take the change well.
|> 
|> 
|> -- 
|> | Tom Barrett (TDBear), Sr. Engineer | tom.barrett@amd.com
|> | AMD PCD / Austin, TX  78741        | v:512-462-6856 / f:512-462-5155
|> | "No is Yes, and We are All FREE!"  | CO made a #2 no-no... PU!
|> | My views may not be shared by the organization of origin

I watched this thread for a while, but am surprised no one points out an
important reason of why you don't want to replace a DX50 with the DX2/66.
The question one should ask is what performance do I gain? For all I have read
and heard, the two chips delivers roughly the same *average* performance in
most real applications. After you sum up the balance of on-chip and off-chip
activities, it is simply about the same. Unless you are doing some
computationally intensive task that are small enough to reside entirely in the
on-chip cache, it is simply not worth it to swap.

One reason I think that might favor the DX2/66 is it can be used with the
VL-bus standard while 50MHz VL-bus does not seem viable (at least the
recommedation is to have only 1(2?) on board device, instead of up to 3 slots.) 
However this cannot be a justification in the original context, as it is
defined by the motherboard, rather than by the CPU chip.

-- John

Xref: sparky comp.sys.intel:2726 comp.arch:11690
From: ssurawls@csug.cs.reading.ac.uk (Ian Rawlings)
Newsgroups: comp.sys.intel,comp.arch
Subject: Re: Superscalar vs. multiple CPUs ?
Date: 16 Dec 92 13:54:07 GMT
Organization: University of Reading

Has anyone mentioned the DAP yet? 1024 processors on one chip. Amazing for
some applications, eg ray-tracing and image processing, even at 10MHz, but
dreadful at others.

The DAP processors are all 1-bit and work on the same instruction all at once.

Ian

-- 

=+=+=+=+=+ 8< =+=+=+=+=+=+=+=+=+=+=+=+ 8< =+=+=+=+=+=+=+=+=+ 8< =+=+=+=+=+=+=+
Mr Ian Rawlings, Telephone Reading (0734) 661431
	EMAIL ssurawls@susssys1.rdg.ac.uk
Newsgroups: comp.sys.intel,comp.sys.mac.hardware,comp.sys.ibm.pc.hardware
From: ntaib@silver.ucs.indiana.edu (Iskandar Taib)
Subject: Re: 486 vs. Mac Benchmarks
Organization: Indiana University
Date: Tue, 15 Dec 1992 04:37:51 GMT

In article <1992Dec11.020835.20864@cs.brown.edu> cs123052@cs.brown.edu (Michael Lee) writes:
>>>> how cheap a IIsi is these days...I'm talking top of the line here, and
>>>> a 486/50 with everything can be had for well under 3k).
>>
>>
>>>You said earlier that you paid $4200.00 for your dream 486 with everything!!
>>
>>
>>Yeah.. he's probably got a CD ROM drive, a 19 inch monitor, a Pro Audio Spec-
>>trum 16 card, a gigabyte Fast SCSI drive, 32 Megs of RAM, a ATI Graphics Ul-
>>tra video card, EISA...
>>
>Who makes this one? K-Mart?  Just purchase a Gateway 2000 tower w/ CD rom
>sound card and 15" monitor. 230MB IDE (SCSI...?) 8 MB ram w/ ATI ultra card
>ISA w/ two localbus (PDS) slots.  What that run me? about $3600

Ever hear the term "being facetious"?







-- 
-------------------------------------------------------------------------------
Iskandar Taib                          | The only thing worse than Peach ala
Internet: NTAIB@SILVER.UCS.INDIANA.EDU |    Frog is Frog ala Peach
Bitnet:   NTAIB@IUBACS                 !
Newsgroups: comp.sys.intel
From: sl@wimsey.bc.ca (Stuart Lynne)
Subject: Re: Overdrive for the 486/50??
Organization: Wimsey Information Services
Date: Sun, 20 Dec 1992 02:23:48 GMT

In article <1992Dec15.162702.16600@walter.bellcore.com> ngai@nova.bellcore.com (John Ngai) writes:
>
>In article <1992Dec15.141953.21972@dvorak.amd.com>, tdbear@dvorak.amd.com (Thomas D. Barrett) writes:
>|> In article <8f9__KS00WB5Qu_ogq@andrew.cmu.edu> fj05+@andrew.cmu.edu (Faisal Nameer Jawdat) writes:
>I watched this thread for a while, but am surprised no one points out an
>important reason of why you don't want to replace a DX50 with the DX2/66.
>The question one should ask is what performance do I gain? For all I have read
>and heard, the two chips delivers roughly the same *average* performance in
>most real applications. After you sum up the balance of on-chip and off-chip
>activities, it is simply about the same. Unless you are doing some
>computationally intensive task that are small enough to reside entirely in the
>on-chip cache, it is simply not worth it to swap.

Well here is a test you can try for yourself at home.

I selected a moderately large file and tried:

	time compress < bigfile > /dev/null

on two machines here. One of which has a DX-50 and one of which has a DX2-66.
In other respects the machines are fairly similiar. EISA based, moderately
fast SCSI based disks with 1742 controllers, 32MB of memory, both running 
SCO 3.2.4 etc.

The DX2-66 was about 1.21 times faster than the DX-50 when comparing the 
user time. 

I consider this to be fairly worthwhile on this machine. From my accounting
reports I see that compress recorded 46 CPU minutes over the last day. This was
slightly over 10% of total for the day. The only larger total was for uucico 
which was higher but spread over a much longer real time.

-- 
Stuart Lynne <sl@wimsey.com> ......................... UNIX Facsimile Software
Wimsey Information Technologies ................... moderator biz.sco.binaries
uucp login:nuucp passwd:nuucp .................... ftp.wimsey.com:~ftp/ls-lR.Z
PD Software for SCO UNIX .................... ftp.wimsey.com:~ftp/pub/wimseypd
Newsgroups: comp.sys.intel
From: yclu@csie.nctu.edu.tw (Yu_Cheng Lu)
Subject: Message Passing on Multibus II ?
Organization: Computer Science & Information Engin., Chiao-Tung U, Taiwan, ROC
X-Newsreader: TIN [version 1.1 PL6]
Date: Tue, 15 Dec 1992 09:13:37 GMT

Hi,
   I am a new user on Multibus II . I tried to write some programs to do
message passing on it , but an error happened when I created a port.

  My Multibus II is System 520 ,it includes 5 boards :
      slot 0 : iSBC 386/258
	slot 2 : iSBC 386/120
	slot 3 : iSBC 386/120
	slot 6 : iSBC 186/410
	slot 7 : iSBC 186/530
  Operating System : iRMX III.1.3
  Language         : PL/M
  Boot method  : Dependent method

The following is part of my program :
      port$struc.portid=800H;
      port$struc.type=2; /* Data Transport Service */
      port$struc.flag=0;
      port$struc.reserved=0;
      rq$create$port(2,@port$struc,@status);

When the nucleus system call "rq$create$port" was executed, an error
message appeard .==>
8004 : E$PARAM,command aborted by EH

Any further answer will be appreciated . 

Thanks a lot .                            
 
Yu-Cheng Lu  yclu@csie.nctu.edu.tw
From: matthias@nsr.hp.com (Matthias Kamm)
Newsgroups: comp.sys.intel
Subject: Re: Simple CPU Questions
Date: 17 Dec 1992 22:40:51 GMT
Organization: Hewlett Packard Santa Clara Site
Distribution: usa
NNTP-Posting-Host: hpmvd069.nsr.hp.com
X-Newsreader: TIN [version 1.1.2 PL7]

Kevin Brewer (kevinb@unssun.nevada.edu) wrote:
: I'll admit it. I use a Mac. But I have a simple(?) question about the
: intel x86 CPU's. (If this is a FAQ, please direct me to the proper
: place as I don't read this news group.) So here goes...
: 
: My brother-in-law just bought a 486SX machine. What is the difference
: between the 486SX and the _normal_ 486 chip? FPU? 16 v. 32 bits? ???
: Is there a _normal_ (full powered?) 486 chip? The 486DX?
: 
: Thanks - Kevin
: 
: 
:
Kevin, read the thread on the question above this one regarding
386SX bus widths.

Newsgroups: comp.sys.intel
Subject: Re: Why doesnt NeXT think the Cyrix 486 is a "real 486"  (was: Any new instructions in a i486?)
From: rmk@rmkhome.UUCP (Rick Kelly)
Organization: The Man With Ten Cats
Date: Wed, 16 Dec 1992 04:33:06 GMT
Reply-To: rmk@rmkhome.UUCP (Rick Kelly)

In article <WAYNE.92Dec14194802@backbone.uucp> wayne@backbone.uucp (Wayne Schlitt) writes:
>In article <edm.724366309@wrs.com> edm@wrs.com (Ed McClannahan) writes:
>> 
>> >>>NeXTStep is said to not run on the Cyrix 486 chips because "they are
>> >>>not real 486's".  No one has come up with a reliable reason _why_ NeXT
>> >>>doesn't think they are "real 486's" or why NeXTStep won't run on them.
>> 
>> >>I don't have any real data, but I expect the problem is that the Cyrix
>> >>chip doesn't have a floating point unit.  
>> 
>> >A 10/21/92 semi-official net posting on NextStep claims it runs on SXs:
>> 
>> The jist I got was that NeXTstep wants to maintain compatible File Systems
>> between 680X0 and X86 platforms.  To do this, they needed to do a lot of
>> byte swapping on the X86 platforms.  Since the 486 has a simple instruction
>> to do it while the 386 does not, NeXT just went with the 486.
>
>
>Well, we have come full circle.  According to Microprocessor Reports,
>the Cyrix chip _does_ have the BSWAP instruction, so unless you have
>more than just guesses that it doesn't, then my original statement
>still holds:
>
>*No one has come up with a reliable reason _why_ NeXT doesn't think
>that they are "real 486's" or why NeXTStep won't run on them.*
>
>
>There are *guesses* that it's because of performance differences, but
>that doesn't seem to make too much sense.
>
>
>There are *guesses* that it's because NeXTStep requires floating
>point, but that doesn't seem to be the case.
>
>
>There are *guesses* that it's because the Cyrix chip doesn't have the
>BSWAP instruction, but it seems that Cyrix does have the instruction.
>
>
>There are *guesses* that it's because of the Cyrix chip doesn't manage
>the cache the same way, but know one knows if it is really different.
>
>
>There are *guesses* that it's because of some of the new control flags
>that the i486 has that Cyrix may not have, but know one knows if that
>is really a difference.
>
>
>I have posted all the hard facts that I know, but continuing to
>*guess* what NeXT means by the "Cyrix isn't a real 486" phrase is
>pointless.
>
>
>
>Please, if _someone_ has hard info, post it and kill this thread.  If
>you don't have hard info, then don't guess.


Obviously, the only way to find out is with a 486DX box, a 486DLC, two
logic analyzers, and two NeXTStep boot disks.

-- 

Rick Kelly	rmk@rmkhome.UUCP	unixland!rmkhome!rmk	rmk@frog.UUCP
Newsgroups: comp.sys.intel
From: sinnige@fwi.uva.nl (Stefan Sinnige)
Subject: Intel's new performance test iCOMP
Organization: FWI, University of Amsterdam
Date: Fri, 18 Dec 1992 11:29:19 GMT



I read in our local newspaper about a new performance test, to compare
Intel processors. The performance test is developed at Intel itself and is
called the iCOMP (tm) Rating. The results are as follows:

	i486 DX2 66 MHz			297
	i486 DX  50 MHz			249
	i486 DX2 50 MHz			231
	i486 DX 33  MHz			166
	i486 SX  33 MHz			136
	i486 SX  25 MHz			100
	i486 SX  20 MHz			78
	i386 DX  33 MHz			68
	i386 DX  25 MHz			49
	i386 SL  25 MHz			41
	i386 SX  25 MHZ			39

The test is developed to show which processor is more powerfull. But they did
not tell, how the test is performed, so I do not know what these numbers stand
for.

Can someone bring some light in the darkness .....

----------------------
= Stefan Sinnige			"To be or not to be a weirdo,
= sinnige@fwi.uva.nl			 that is not the question."
----------------------

-- 
----------------------
= Stefan Sinnige			"To be or not to be a weirdo,
= sinnige@fwi.uva.nl			 that is not the question."
----------------------
Xref: sparky comp.sys.intel:2664 comp.arch:11587
From: davidsen@ariel.crd.GE.COM (william E Davidsen)
Newsgroups: comp.sys.intel
Subject: Re: Any new instructions in a i486?
Date: 14 Dec 92 18:49:26 GMT
Reply-To: davidsen@crd.ge.com (bill davidsen)
Organization: GE Corporate R&D Center, Schenectady NY

In article <WAYNE.92Dec11164422@backbone.uucp>, wayne@backbone.uucp (Wayne Schlitt) writes:

I certainly appreciate the posting of the 486 information, I have one
clarifiecation to make below.


| Anyway, quoting from my 1990 i486(tm) Microprocessor Programmer's
| Reference Manual from Intel, chapter 21.3:
| 
| ---  start of quote  ---
| 
| 21.3 DIFFERENCES FROM THE 386(tm) CPU
| 
| Very few differences exist between the programming models of the 386
| DX or SX and i486 processors.  The i486 processor defines new bits in
| the EFLAGS, CR0, and CR3 registers, and in entries in the first- and
| second-level page tables.  On the 386 processors, these bits were
| reserved, so the new architectural features should not be a
| compatibility issue.


| 21.3.3 New Instructions
| 
| There are three new application instructions:
| 
| *  The BSWAP instruction
| 
| *  The XADD instruction
| 
| *  The CMPXCHG instruction


| That's the entire section on the differences.  You have to go look at
| other parts of the manual to find out what the details are, but
| basically they come down to this:
| 
| 
| The BSWAP instruction is useful for change the byte orders to/from little
| endian <==> big endian.  
| 
| 
| The XADD and CMPXCHG instructions are useful for implementing
| semaphores in multi-processor systems.  Not something a normal
| application would have much use for.

  Well, I guess I have a little problem with that... both UNIX and
Windows support shared memory and allow it to be used for IPC. Having
solved some access order problems in UNIX with semiphores, I could
appreciate a lower overhead way to do this, and I suspect that windows
programmers could alos use a better solution to this problem.

  This is in user space, although I will not argue that applications at
this level of complexity are "normal" (or at least they're not typical).


| all and all, there are _very_ few real differences between the 386 and
| the 486.
| 
| -wayne

-- 
bill davidsen, GE Corp. R&D Center; Box 8; Schenectady NY 12345
    Keyboard controller has been disabled, press F1 to continue.
Newsgroups: comp.sys.intel
From: martling@phage.cshl.org (Jim Martling)
Subject: Intel hHEX format
Summary: I need description of Intel HEX records
Keywords: 8051,"intel hex"
Organization: Cold Spring Harbor Laboratory
Date: Tue, 15 Dec 1992 21:54:54 GMT


	There is a download protocol called "Intel HEX".  The 
records are in ASCII Hex format, and are preceded with a colon character.

I have built an 8051 SBC, and have an assembler that outputs in intel hex
format, but I don't know how to read it (eventually I have to write ROM
code to accept downloading in Intel hex).

	I used the protocol about 8 years ago, but lost the source code
and documentation.  I remember that its very simple, there is about 4 or
5 record formats (I think).

	Can someone send me a description so I can write code to download
Intel hex?

			EMAIL at:		martling@cshl.org
From: stimpy@nmt.edu (John Reynolds)
Newsgroups: comp.sys.intel
Subject: Re: where do you go from 486 (another opinion)
Date: 18 Dec 92 03:24:06 GMT
Article-I.D.: nmt.1992Dec18.032406.5458
Followup-To: comp.sys.intel comp.os.os2.advocacy
Organization: New Mexico Tech

> [ Stuff about OS/2 2.0 deleted]
> [ FUD about Amiga users deleted]
>

All I was saying is that people on the whole should give OS/2
more of a chance than before. True, the first versions sucked
because DOS compatibility was terrible and it looked just like
windows.

I want to dispell the rumors that I've heard time and time again
that if someone goes to OS/2 that they're just looking for trouble
and that it's too hard to learn and productivity will be shot, etc.
etc., etc. It's just not true!

As for the FUD that OS/2 is akin to the Amiga. I don't think
so. Symantec, Borland, Lotus, WordPerfect, Stac Electronics,
and tons of other big-time developers wouldn't be investing their
time into OS/2 if they didn't think it would make it. All I ever
saw ANY amiga user do (and believe me, in college, I see plenty)
is play games. Really COOL games, but just games. My friend owns
one, and does have a fairly decent word processors, but again,
just games. OS/2 is not just fun and games.

-Jr


-- 
DOS...Boot sector virus!????           | #include <~os2/personal.opinion.h>
Windows...It's like a stale cookie.    | John Reynolds stimpy@jupiter.nmt.edu
OS/2..."It's like buudaah" (SNL quote) | New Mexico Tech. #10 and rising!!!
Newsgroups: comp.sys.intel
From: scanning@lynx.spa.umn.edu (Bill Ketzeback)
Subject: FOR SALE: 3D Imaging System
Organization: University of Minnesota
Date: Fri, 18 Dec 1992 00:46:45 GMT


For Sale:
 Laser 3D Imaging System
  Mfg by Technical Arts of Redmond, Wash.

 Laser and tv camera on Compumotor x-y stages scans object on a rotating theta
 table. Includes motor controllers and 3 interface cards (x, y, and theta)
 for Multibus I. (2 Multibus INTEL 310 computers included) All manuals, source 
 code and documents included.

 Was mfg in Nov '88 and delivered in '89. This machine sits on a 4 ft square
 granite slab (~1ft thick) for vibration isolation. 

 The 3D imaging system was purchased for $250,000. You can have the entire
 package for $20k or Best offer (+ shipping)

 Please direct all questions via email to me at wfk@aps1.spa.umn.edu
 or Stan Shankman (or myself) at (612) 624-9069

 Thanks,
 Bill Ketzeback


Newsgroups: comp.sys.intel,comp.sys.mac.hardware,comp.sys.ibm.pc.hardware
From: bbrown@infonode.ingr.com (Bailey Brown)
Subject: Re: 486 vs. Mac Benchmarks
Organization: Intergraph Corporation, Huntsville, AL.
Date: Fri, 11 Dec 1992 19:37:54 GMT

ntaib@silver.ucs.indiana.edu (Iskandar Taib) writes:

>In article <ibhan.723011563@husc10> ibhan@husc10.harvard.edu (Ishir Bhan) writes:

>>What's your point?  Add a graphics accelerator to the Mac and you'll get
>>the same result!

>Mac graphics accelerators cost a lot more? Can you beat a Diamond
>Speedstar 24X for $180?

I can get a Diamond 24X for $155.

------------
Bailey Brown                               "Above all else, confusion reigns."
Intergraph Corporation                                  
bbrown@casca.b11.ingr.com                              Procol Harum
Xref: sparky comp.sys.intel:2754 comp.arch:11746
From: monnier+@cs.cmu.edu (Stefan Monnier)
Newsgroups: comp.sys.intel,comp.arch
Subject: Re: Superscalar vs. multiple CPUs ?
Date: 17 Dec 92 21:14:34 GMT
Article-I.D.: cs.BzF9oC.G8K.2
Organization: School of Computer Science, Carnegie Mellon

In article <BzAE6A.6qF@cpsc.ucalgary.ca> cleary@cpsc.ucalgary.ca (John Cleary) writes:
>
>So whats wrong with putting one CPU on the chip and filling the rest with
>DRAM? 
>This might also help with the heat dissipation problem which I am told
>is one of the biggest design constraints for the newer chips.
>Why have lots of cool memory chips and hot CPUs, instead have lots of
>luke-warm mixtures :-)
>If you fill the chip with CPUs and then have to go off chip for memory
>surely it is better to have the local memory close to the CPU.
>You wont be able to get speedup unless each parallel CPU has a reasonably small
>working set of memory anyway.
>I have also wondered whether we may be reaching the point where it is better
>to avoid the complexity of Superscalar etc. and just have lots of simple
>CPUs with their own local memory on chip.
>-- 
>John Cleary
>University of Calgary.
>cleary@cpsc.ucalgary.ca

This sure has some BIG advantages (think of cache line filling:
1 (one) row access would be sufficient, with a data path between dram 
and cache of 256 bytes (for example)). But not for today. Don't forget
the ruleofthumb: 1MIPS, 1MB, 1Mb/s. Today's processors need at least 16MB.
I don't think it is possible to fit much more than a few MB on a chip, 
right now. But maybe in a few years, how knows ?

	Stefan
From: S_JUFFA@iravcl.ira.uka.de (|S| Norbert Juffa)
Newsgroups: comp.sys.intel
Subject: Re: Can 16MHz 80387 be installed in a 33MHz 80386 system?
Date: 16 Dec 1992 12:55:20 GMT
Organization: University of Karlsruhe (FRG) - Informatik Rechnerabt.
Distribution: world
NNTP-Posting-Host: irav1.ira.uka.de
X-News-Reader: VMS NEWS 1.23

In <1992Dec15.101259.6401@sei.cmu.edu> griest@ajpo.sei.cmu.edu writes:

> I have been told that you can install a 16MHz '387DX in a coprocessor
> socket to work with a 33MHz '386DX and it will work ok (running Math
> instructions at the 16MHz rate).  I am not convinced.  Has anyone done
> this?  How does it work?  Are their any jumpers that must be set?
> 
>    Tom
> 

Tom:

To the best of my knowledge, you can't do it. Only the Intel 387 (and none
of the compatible chips from IIT,Cyrix,ULSI,C&T) supports running the CPU
and the coprocessor asynchronously. Not all motherboards supports this option
as there has to be a socket for a second oscillator and a jumper to select
either the CPU or altaernate oscillator for the coprocessor. However, Intel
docs state that the ratio of the respective frequencies has to be roughly
between 2:3 and 3:2, which tells me that a 33 MHz CPU wouldn't work with a
16 MHz copro. Sorry!

Norbert
-------------------------------------------------------------------------------
Norbert Juffa        email: S_JUFFA@IRAVCL.IRA.UKA.DE        Live and let live!

> 
>
From: wayne@backbone.uucp (Wayne Schlitt)
Newsgroups: comp.sys.intel
Subject: Re: Cyrix 486SLC/DLC compatibility issues and NextStep....
Date: Fri, 18 Dec 1992 00:32:24 GMT
Organization: The Backbone Cabal
NNTP-Posting-Host: helios.unl.edu

In article <1gq3d1INNg8g@iraul1.ira.uka.de> S_JUFFA@iravcl.ira.uka.de (|S| Norbert Juffa) writes:
> 
> Compatibility issues: Cyrix Cx486SLC/DLC compared to the Intel 80486SX
> 
> [ Excellent discription deleted ]
> 


THANK YOU!  THANK YOU!  THANK YOU!  THANK YOU!


Hard info is _much_ appreciated.   On this, or any other subject.




-wayne
Newsgroups: comp.sys.intel
From: mortenk@dhhalden.no (MORTEN KNUDSEN)
Subject: Re: Intel claims the Pentium is 64-bit! (who cares if it real
Organization: Ostfold College
Date: Wed, 16 Dec 1992 21:02:43 GMT

In article <1992Dec10.003011.14950@news.tufts.edu> pmorvill@jade.tufts.edu (Paul Morville) writes:
>From: pmorvill@jade.tufts.edu (Paul Morville)
>Subject: Re: Intel claims the Pentium is 64-bit! (who cares if it real
>Date: 10 Dec 92 00:30:11 GMT
>>Sorry that just doesn't hold water.  This is the first time I've ever heard
>>the 8080A being described as a 16 bit micro.  Ok so it had a few extensions
>>to its instruction set to allow a very limited sub set of 16 bit additons
>>& subtractions, but equally it could be argued that the 8096/196 family is
>>32 bit as it has similar extensions for to its instruction set.  I don't
>>think intel would even try to argue that processor as 32bit.  I think the
>>general concensus of opinion on this would say if the chip don't have a 64
>>bit data bus at its pins, it ain't a 64 bit micro.
>
>I was under the impression that the 386sx has a 16 bit data bus at its pins.
>It runs 32 bit software so it must be 32 bit.  Isn't this just what we're
>talking about here?

Is the 8088 a 16 bit or 8 bit micro? I seem to remember that Intel's 
referance manual described it as a 8 bit micro.
Newsgroups: comp.sys.intel,comp.arch