From: mch@regent.e-technik.tu-muenchen.dbp.de (Michael Hermann)
Subject: Re: Cyrix 486DLC-33
Organization: Technical University of Munich, Germany
Distribution: usa
Date: Fri, 24 Jul 1992 06:19:42 GMT

ericwolf@mentor.cc.purdue.edu (Eric Wolf) writes:
...
>I, too, am very interested in this chip and would also appreciate the info if
>someone could post it.  For example, I would like to know the following (if at
>all possible)

>	(1) what varieties does the Cyrix 486 come in?
>	(2) is it 100% Intel 486 compatable?
>	(3) does it offer any advantages over the Intel 486?
>	(4) How much $$$???


As far  as I know:

1) SLC (with 16D/24A bit external bus, pin-compatible to 386sx)
   DLC (like 386 dx (32D/32A))
   To my kwowledge both chips are otherwise identical.

2) At least from the user-mode software view.
   The reports I saw did not mention any problems with either DOS
   or UNIX. Presumably cache-programming is a bit different, but
   usually you set up those registers only once (startup, BIOS).

3) Not that I know. In fact, there are disadvantages:

   - no builtin FPU (greetings from 486sx)
   - 1K cache only
   - no bus-snooping (invalidate cache-lines on externally generated
		      transactions, like DMA)
   - generally slower execution than 486 but faster than 386

4) latest info (probably wrong by the time of my posting) $119/1000


Some remarks to 3)

You can add a generic coprocessor-FPU like 387. If you use the matching
Cyrix-Part (announced) you should get performance better than any existing
386/387-pairing. But (in my opinion) performance will still be worse
than on a 486DX, because you have to establish a protocol to get both
chips synchronized. The more complex functions (like trigono) you need,
the better the Cyrix should perform.

A think, the 1K cache yields less than 50% hit-rate, but as the 386-bus-
protocol will always "waste" at least 2 cycles, this is definitely an
improvement in externally cached existing 386-systems. 

If you have heavy external DMA-transfers (like most Ethernet or SCSI)
the Cyrix may be the wrong part for you. As I understand, there is minimal
support for cache-coherency. At least one (fairly independent) report
claims, that with DMA activity the Cyrix is actually slower with enabled
internal cache than with no internal cache at all. The part has some
lines for cache control, but they will be useless in existing 386-mainboards.
Even if new designs support those features I (currently) don't think
that it will help a lot.
However, if you have a "standard" DOS-PC-environment (like some sort
of MFM/RLL (IDE is basically emulating those, so with IDE yoe are well, too),
you will not suffer from this cache-control deficiency.

At last, the core has been developed independently from the Intel-core,
so the hardware resources are spent differently and this affects
execution time for instructions.

Examples:

A dedicated multiplier speeds up integer multiplications to a 
constant time (I think 3 cycles) whereas the i486 uses an early-out
algorithm which is still SERIAL in nature (~10 - ~40 cycles).

The lack of some of the adress-generation hardware imposes an additional
cycle for adressing modes requiering an add (like disp(reg)). 

Different pipeline designs lead to different stalls on break
conditions like jmp or a slow memory transaction (even within 
the cache there is a difference between c486 and i486 I think).
Generally c486 looses a bit here.


Remarks to 4)

When the c486slc was introduced, I was sceptical about the real
advantage of beeing pin-compatible to 386sx. Almost all 386sx
are soldered and a *normal* user could not swap CPUs. And the
board manufacturer had to (partially) redesign his board anyway
to make use of the external cache control. So why not change
the bus-protocol to a faster one, too? If speed of existing
chip-sets was a problem. you could easily force a wait-state,
but you had at least the option to make faster systems later on.

Now with the c486dlc I have revised my opinion:
Most 386 are PGA (AMD makes pqfp, though) and *you* can swap
the CPUs. You will get a speed improvement of about 50%, I think.
And this may well be worth the extra $$$ as compared to throwing
away your complete board when buying an i486.

Michael
mch@regent.e-technik.tu-muenchen.de