From: Aric.Caley@ofa123.fidonet.org
Newsgroups: comp.sys.amiga.hardware
Subject: Re: New Amiga(s) Expansi
X-Sender: newtout 0.02 Oct  1 1992
Date: 15 Oct 92  10:15:04

> Organization: Queen's University at Kingston
> From: <LEEK@QUCDN.QueensU.CA>
> Message-ID: 92287.220436LEEK@qucdn.queensu.ca
> Newsgroups: comp.sys.amiga.hardware
>
> All the I/O ports still sits on the motherboard along with ZorroIII,
> hard drive controller, ram etc.  The expansion port should be a well
> thought out connector that carries all of the necessary signals for the
> current & future chip set to do its job.   It would make sense to have

Ah.. well, I suppose they could do that.  This "chip slot" would have to
have signals for all the ports, plus all the CPU lines.  Its an idea,
certainly.  Of course, this would have to be on the next generation Amiga,
and these chipset-cards would only work on it.

I think a better idea is to just get RTG going, and make Zorro III cards
with the graphics and sound parts of chipset.

> the "chip" memory on the board in case C= goes for yet another higher
> bandwidth or bigger memory.   Think of the expansion card as a chip
> module that houses the chip set.  (It would be a really odd shaped
> chip set if all the I/O ports stick right out of the ECS or AGA. :)
> Things can be surface mounted or even directly bonded onto the card as
> C= sees fit.
>
> >Whatever you do, dont listen to Marc Barret.
>
> Yeap.
>
> BTW from the look of it, it might be possible to get higher resolution
> from the AGA chip set the same way as the ECS.  One of the reasons of
> not being able to get high resolution like 1024 * 768 is due to the
> lack of a faster dot clock.  [Dot clock is used to generate pixel timing]
> (I remember that someone mentioned that AGA can have programmable scan
> rate, but pixel rate has a upper limit of 35ns.)
>
> One can easily treat a pixel with 8-bit planes as 2 pixels with 4-bit
> each.  Simply store the incoming pixel at 35ns speed and spill out the
> odd bits and even bits (as 2 pixels) at twice the speed. (DaveH mentioned
> there is a pass through mode that bypasses the colour mapping)  Run
> that through an external DAC (internal is not usable) to get the RGB
> signals.  The  bitplane  to pixel mapping would be pretty weird and
> require some software drivers to use it correctly. (DIG would be nice)

Haha.  I had thought of the same thing.  Doing this, you could get an 800 x
600 16 colour mode quite easily, and 1280 x 800 4 colour mode.  It seems
that the circuitry to do this would be rather simple.  Compared to the A2024
monitor, that is.. which I assume must have a framebuffer to store the
panels in (similar to a flicker fixer).

> I can think of 2 possible ways (both off my head without the benefit of
> a 4000 schematic & other docs) to provide such a (2X) clock,
>
> o  Simply use a 17.5ns clock and generate a 35ns to feed the Amiga from
>   the video port.  (XCLK and XCLKEN)   You'll lose genlock capability
>   (which does not work at 1024*768 anyway)
>
> o  Use a phase lock loop scheme to generate the 17.5ns clock from
>   signals on the video slot.
>
> Disclaimer: The above mad scheme is just an idea and it would need quite
> a bit more work to make it usable.  C= might put a PLL or something like
> that on future AGA.  Who knows.

It seems simple enough that they could have put it into the A4000 for very
little extra cost.  Maybe there is some reason why it's not as simple as
we think?

>
> K. C. Lee  (& his A1000)
> Elec. Eng. Grad. Student still looking for a job.


--- Maximus 2.00
Newsgroups: comp.sys.amiga.hardware