From: dank@cco.caltech.edu (Daniel R. Kegel)
Newsgroups: comp.sys.super
Subject: SUMMARY: Driver chips for HIPPI
Date: 7 Nov 1992 16:50:05 GMT
Organization: California Institute of Technology, Pasadena
Distribution: inet
NNTP-Posting-Host: punisher.caltech.edu

Thanks for the help, folks!

I asked:
+---------------
| Also, does anyone know of good line driver/receiver chips for HIPPI?
| I'd be interested in hex or octal chips; the only chips I remember offhand 
| are the 10116 triple line receivers etc., which aren't very dense.
| It would be especially nice if the drivers/receivers also included
| level shifters to translate from HIPPI's ECL levels to CMOS levels that
| can be used with FPGA's.
+---------------

Chips that people mentioned to me:

BIT  +1 503-629-5490
    32 bit Parallel HIPPI chipset src chip, dest chip  
    64 bit Parallel HIPPI chipset src chip, dest chip 
    Serial HIPPI chip      src & dest fns on 1 chip
    Serial HIPPI chipset   2 chips - ??

AMCC +1 619-450-9333
    S2020, S2021 HIPPI source/destination chipset.  Needs external FIFO's.
    Also have HIPPI 64 bit application note.

    No serial spec yet, participating in stds work on Serial HIPPI
    HP and a few others are following up on that
    Also working on Fiber Channel.
    FC still preliminary; we are evaluating our beta sillicon now; can order
    demo kit (S6001).
    FC demo board is 10" x 10".  
    HIPPI area is about the same.

Cypress +1 408-943-2600
    CY10E383 is 10 ECL drivers + 10 ECL receivers; TTL I/O.
    Generic - not specialized for HIPPI.

The responses:

1.
>From: Alan.Scheinine@crs4.it
>
>...  Leaving aside the problem of level conversion, the fastest
>ECL solution that is similar to what you described in your
>original posting is the Motorola ECLiPS product line.  10K or 100K
>ECL (10K has predictable temperature dependence, 100K has no
>temperature dependence) 6 bits wide, E151 6-bit D Register with
>differential output (for sending) and E451 6-bit D Register with
>differential input (for receiving).
>   The AMD TAXI solution is easy to use.  A faster version, which
>is similar in being easy to use (an opinion NOT based on experience,
>sorry) is by Vitesse.  Vitesse is the GaAs company that I could not
>remember in my previous email message.  (I personally do not like
>AMD.)  Vitesse had a small product line so I do not know if they
>are still in business.  The point of using a serial line (if the
>chip will do the synchronization) is that with the option described
>in the first paragraph, you would need to synchronize the clocking
>of the registers at both ends.
>   Generally, the GaAs from GigaBit Logic is more difficult to
>interface with other logic levels, than are GaAs from its competetors.
>On the other hand, I found an old advert. about a 16x16 bit
>Crosspoint Switch which has the following sentence, "With its wide
>bandwidth, the 10GO51 handles SONET OC3 to OC48 as well as HIPPI/Fiber
>Channel signals at full speed.  The 10GO51 would be a HIPPI switch,
>not a HIPPI input or output.  Nonetheless, perhaps GigaBit Logic
>has more to say about HIPPI.  Opps, I see I left out the close
>quotation mark, oh well.  The quote ends after one sentence.
>       Good luck,  Alan Scheinine
>           Alan Scheinine   scheinin@crs4.it (Cagliari)


2.
>From: rpw3@rigden.wpd.sgi.com (Rob Warnock)
>
>Aren't you using the AMCC or BIT chips? They contain the entire interface
>circuitry in 2 chips (one for HIPPI source and one for HIPPI destination),
>including the level-converters, "ready" counting/buffering, and some other
>useful support. [Huge, hot, many-pinned PGA packages, but still just 2 chips.]
>-Rob
>-----
>Rob Warnock, MS-9U/510		rpw3@sgi.com
>Silicon Graphics, Inc.		(415)390-1673
>2011 N. Shoreline Blvd.
>Mountain View, CA  94043
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