HDTenEightyP/NetNews huggingface dataset:
From: parallel@netcom.com (B. Mitchell Loebel)
Subject: The PARALLEL Processing Connection
Apparently-To: comp-parallel@ames.arc.nasa.gov
Organization: Netcom - Online Communication Services  (408 241-9760 guest) 
Distribution: usa
Date: Sat, 29 Aug 92 23:23:58 GMT

September 14, 1992 - Meeting notice 


MasPar - Supercomputing With a SIMD Architecture

The high performance computing world is becoming increasingly focused 
on MIMD based machines;  MasPar believes that the "MIMD hysteria" has 
clouded the real problem, delivering application performance. Their VP of 
Technology and Architecture, Tom Blank, will discuss the applications 
which best utilize the MasPar autonomous SIMD architecture. Tom is 
uniquely qualified to do this; it is our understanding that he was the prime 
developer of the architecture. Too, this will be the first public presentation 
of their new I/O system which provides solid state disk, I/O buffering and a 
shared extended memory with transfer rates up to 1GB/sec. As usual, we 
will explore third party opportunities for our members with MasPar. And 
we will want to know if they are targeting industrial and commercial 
customers for their machine.

The meeting will take place at 7:30PM at Sun Microsystems at 901 East San 
Antonio Road in Mountain View, California. This is just off the southbound 
San Antonio exit of 101; northbound travelers also exit at San Antonio and
take the overpass to the other side of 101.

Please be prompt; as usual, we expect a large attendance; don't be left out or 
left standing. There is a $8 fee for non-members and members are admitted 
free.

-- 
B. Mitchell Loebel                                      parallel@netcom.COM
PARALLEL Processing Connection                                 408-732-9869

Newsgroups: comp.parallel
From: ghosh-bhaskar@CS.YALE.EDU (Bhaskar Ghosh)
Subject:  dynamic load balancing on multiprocessors
Apparently-To: comp-parallel@uunet.uu.net
Organization: Yale University, Department of Computer Science, New Haven, CT
Date: Fri, 28 Aug 1992 16:52:17 GMT


I am looking for references on dynamic load balancing algorithms for
multiprocessors. I am particularly interested in the scenario when the
load changes in some processors suddenly - and how local balancing can
be used quickly but effectively, instead of a more expensive global
task parititioning and mapping phase.

i will post a summary of references i get. thanks to all interested
in advance.

- bhaskar.


-- 
===============================================================================
Bhaskar Ghosh   	    		"Tomar pujar chholey, 
ghosh@cs.yale.edu  @yalecs.bitnet        Tomay bhulei thaki"- Robithakur
===============================================================================

Newsgroups: comp.parallel
From: Stephen Vavasis <vavasis@cs.cornell.EDU>
Subject: looking for textbook
Apparently-To: comp-parallel@eddie.mit.edu
Organization: Cornell Univ. CS Dept, Ithaca NY 14853
Date: Mon, 31 Aug 1992 15:15:30 GMT


I need to select a textbook for a new course this spring at Cornell,
"Parallel Scientific Computing."  We are planning to use some of the
machines here including:

  (1) SIMD: Connection Machine CM-200
  (2) MIMD, tightly coupled: Intel iPSC
  (3) MIMD, loosely coupled: network of IBM RS6000's
  (4) shared memory: Kendall Square KSR-1

I am hoping to cover these architecture paradigms.  I am also hoping
to cover associated programming paradigms, for instance, FORTRAN-90
for the CM-200.

Then I am hoping to cover scientific algorithms for parallel computing
(and specifically for the machines above) including linear algebra,
systems of particles, boundary value problems, and perhaps some global
climate modeling.  In the process we will hit the paradigms for
parallel programming, such as load balancing and minimizing
communication.

I would be interested in suggestions for textbooks that cover this
material, especially from people who have taught a course like this
before.

Thanks,
Steve Vavasis (vavasis@cs.cornell.edu)

Newsgroups: comp.parallel
From: nikhil@crl.dec.com (R.S. Nikhil)
Subject: Re: EM-4(?) Question
Keywords: interconnect
Organization: DEC Cambridge Research Lab
Date: Fri, 4 Sep 1992 15:45:51 GMT

In article <1992Sep4.015211.25673@cis.ohio-state.edu>, martens@python.cis.ohio-state.edu (Jeff Martens) writes:
> In a recent report posted to the net, David Kahaner said that the
> interconnect used in one (or all?) of the EM-3/4/5 family is the
> "processor omega with deadlock-free mechanism."
> 
> What exactly is the processor omega?  Is it similar to the
> homogenous circular shuffle (aka single-stage cube, used in the
> Man-Yo)?

I think it means the following:

   In a conventional picture of an omega network, you see an interconnection
   of switching nodes with N inputs on the left and N outputs on the right;
   a processor is typically connected to an input on the left column and the
   corresponding output on the right column.

   In the EM-4, the inputs on the left are just wired around to corresponding
   outputs on the right.  A processor hangs off each switching node.   Each
   switching node is a 3x3 crossbar;  2 inputs and outputs are used for the
   omega interconnection  and the 3rd input and output is connected to the
   processor.  In fact, the 3x3 switch is on the processor chip itself.

Nikhil  (nikhil@crl.dec.com)

Newsgroups: comp.parallel
From: JPerkins@novell.com (John Perkins)
Subject: Andrew File System
Apparently-To: comp-parallel@uunet.uu.net
Organization: Novell, Inc.
Date: Wed, 26 Aug 1992 18:09:00 GMT


I am looking for articles or books that give a detailed explaination on
the Andrew File System (AFS) developed at Carnegie Mellon University.  Can
anyone point me in the right direction.  

Please respond my e-mail, since I am not a regular readers on this Newsgroup.

Thanks.

John

Newsgroups: comp.parallel,comp.sys.transputer,uk.announce,uk.events
From: masticol@cadenza.rutgers.edu (Steve Masticola)
Subject: Re: Synchonizing watches
Organization: Rutgers Univ., New Brunswick, N.J.
Date: 3 Sep 92 22:52:38 GMT


leo@nas.nasa.gov (Leo Dagum) writes:

  4) A times the first call back, and now knows (AB + BA), when he gets
     the second call back, he now knows BA as well (and therefore AB).

I don't see how A will know BA from the second call... Call d the time
difference between when b makes the first call and the second call. A
receives the second call at time T + AB + BA + d. A knows AB + BA, T,
and d. But A would have to know AB or BA independently to separate the
two.

  Leo Dagum
  NASA Ames Reseach Center

- Steve Masticola (masticol@cs.rutgers.edu)


Newsgroups: comp.parallel
From: clsi!!kevin@uunet.UU.NET (Kevin Cameron)
Subject: Re: Constructing Control Flow Graph
Apparently-To: uunet!comp-parallel
Originator: kevin@dubhe
Organization: CAD Language Systems Inc.
Date: Thu, 27 Aug 92 19:42:08 GMT


You could get a copy of the GNU C compiler source - try the gnu news groups:

gnu.gcc.announce
gnu.gcc.help

- it'll save you a lot of effort if you're planning on doing your own code
generation.

Kev.
-- 
Kevin Cameron          CLSI, Suite 100, 5457 Twin Knolls Rd., MD 21045, USA
kevin@clsi.com         Tel: (USA) (410) 992 5700 (- 5709) X229
uunet!clsi.com!kevin   Fax:       (410) 992 3536
----------------------------------------------------------- Reality Is virtual

Newsgroups: comp.parallel
From: tanner@nas.nasa.gov (Leigh Ann Tanner)
Subject: Information on DJM (Distributed Job Manager)
Apparently-To: comp-parallel@ames.arc.nasa.gov
Reply-To: tanner@nas.nasa.gov (Leigh Ann Tanner)
Organization: Numerical Aerodynamic Simulation Facility NASA
Date: Wed, 26 Aug 92 23:16:57 GMT


I am interested in information on DJM for the CM-2.  If
you have such information or can tell me where I can obtain it,
please email me at: tanner@sundog.nas.nasa.gov

Thanks!

Leigh Ann
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Leigh Ann Tanner                        Parallel Systems Support
NASA Ames Research Center M/S 258-6     Moffett Field, CA  94035-1000
tanner@sundog.nas.nasa.gov              (415) 604-4306
   __o            __o            __o            __o            __o
 _`\<,_         _`\<,_         _`\<,_         _`\<,_         _`\<,_
(_)/ (_)       (_)/ (_)       (_)/ (_)       (_)/ (_)       (_)/ (_)
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *

Newsgroups: comp.parallel
From: iane@werple.pub.uu.oz.au (Ian Evans)
Subject: Locks without using atomic instructions
Summary: Anyone know how to lock in shared memory when no atomic instructions?
Keywords: Lock asynchronous
Organization: werple public-access UNIX, Melbourne
Date: 30 Aug 1992 00:35:48 +1000

I'm not sure whether a) This is the best newsgroup to ask this and b)
whether this is a FAQ but..

Let's say that there is a system (unfortunately there is) where some
person (me) wants to get a few different computers communicating reliably,
and the only available mechanism is reading a shared memory location, or
writing a location, but there is no atomic set & test type instruction.
It is possible, however, to get a unique system-wide process ID.

What's needed is a locking algorithm that is completely bullet-proof, as
the systems are completely asynchronous and have widely different
speeds.  There is, of course, no way to disable access by turning
interrupts off, DMA off etc...

Just thinking about it from cold, I've come up with what looks like
an exceedingly complicated 7-step lock procedure using two memory
locations.  I can't see any obvious holes for 2 processes communicating,
but it definitely breaks for 3.

I would appreciate being pointed in the right direction, as I'm sure
this has been described in half-a-zillion textbooks / PhD's etc...

If this is obvious or a FAQ, please mail me direct:
		Ian Evans - Melbourne Australia
			    iane@werple.pub.uu.oz.au
	

Newsgroups: comp.parallel
From: Patrick Surry <pds@epcc.edinburgh.ac.uk>
Subject: Re: Synchonizing watches
Organization: Edinburgh Parallel Computing Centre
Date: 4 Sep 92 14:00:21 GMT


> Unless I'm missing something, this is fairly straightforward.
> 
> 1) A zeroes watch, calls B and hangs up.
B hears ring at t=AB.
> 2) B waits till phone ends ringing then calls A and hangs up.
B calls at t=AB. A hears phone at t=AB+BA (so A knows AB+BA)
> 3) B calls A again and hangs up.

What does this mean?  Does B call back again at t=AB (that doesn't make
sense) or are you assuming that B can instantaneously "hear" the ring
from A's end at the first call and so calls A at t=AB+BA ringing at
A's end at AB+2BA?  I think this is where this method comes apart.

Patrick

---------------------------------------------------------------------------
 Engineers  think that theory  approximates reality | Mathematicians never
 Physicists think that reality approximates theory  | make the connection
---------------------------------------------------------------------------
 Patrick Surry, JCMB 2254, Edinburgh, Scotland   e||)   Edinburgh Parallel  
 EMail: pds@epcc.ed.ac.uk  Tel: (031) 650-5960   c||c   Computing Centre    
---------------------------------------------------------------------------


Newsgroups: comp.parallel
From: bminor@afit.af.mil (Bryan M. Minor)
Subject: Silicon Graphics Workstations
Apparently-To: hypercube@hubcap.clemson.edu
Organization: Air Force Institute of Technology
Date: Fri, 28 Aug 1992 19:39:09 GMT

I have the opportunity to use three different Silicon Graphics machines:

    4D/320, 4D/440, 4D/480

Supposedly the 320 has 2 R3000 processors, the 440 has 4 R4000 processors,
and the 480 has 8 processors.  What I am interested in knowing is how fast
are these machines compared to a Sun SPARC 2 with 32 Mb, and is trying to
program parallel codes on them worthwhile.  Are they MIMD or SIMD Parrallel
machines?  If you are going to program on them, what language is best,
ie. C/C++ or Fortran 90.  I really want to get into parallel programing
and my current research project seems to lend itself to it.  Are these good
machines for getting exposed to parallel programing?  Thanks alot for your
time!

Newsgroups: comp.parallel
From: swamy@cs.ubc.ca (H.V. Sreekantaswamy)
Subject: Communication Startup costs on Distributed Memory Machines
Apparently-To: comp-parallel@uunet.uu.net
Followup-To: comp.parallel
Organization: Computer Science, University of B.C., Vancouver, B.C., Canada
Date: Tue, 25 Aug 92 18:03:25 GMT


I am interested in knowing typical values for communication startup
costs on various distributed memory machines such as CM-5, nCUBE,
Intel IPSC, Delta, Paragon, etc. What I mean by communication startup
cost is the time it takes to begin the actual message transmission
from the time the user program makes the appropriate function call.
This should include all the operating system or runtime system overheads
in initiating the communication in addition to hardware setup time.
I would appreciate if anyone can point to any papers/reports that 
discuss about these overheads or give the values for any system.

If there is sufficient interest, I will post a summary of replies.

Thanks,
--Swamy

------------------------------------------------------------------------
H.V. Sreekantaswamy			E-mail:	swamy@cs.ubc.ca
Dept. of Computer Science		Tel:    (604)822-3731
University of British Columbia			(604)224-4431 (Home)
Vancouver, B.C., Canada V6T 1Z2   			
------------------------------------------------------------------------

Newsgroups: comp.parallel
From: vanzandt@netcom.com (John Van Zandt)
Subject: New book on commercial uses of parallel processing
Apparently-To: comp-parallel@ames.arc.nasa.gov
Organization: Netcom - Online Communication Services  (408 241-9760 guest) 
Date: Tue, 25 Aug 92 18:59:21 GMT



             "Parallel Processing in Information Systems"
                                  by 
                            John Van Zandt

A new book on parallel processing has just been published by John Wiley and
Sons. Corporate information systems will soon undergo dramatic changes due to
the impact of recent developments in parallel processing technology. Key
industry analysts now predict that by the end of this decade the majority of
computers, from the PC to the high-end database server will be multiprocessors
and parallel processors. Over the next five years, it is critical that
computer professionals understand this revolutionary technology so that their
companies can attain the competitive edge in information technology.

Written by an expert in the field, this valuable guide provides you with 
the essential facts of parallel computing as applied to MIS systems.
"Parallel Processing in Information Systems":

   - Examines the growth of parallel processors from early forms to current
     and future generations

   - Shows how parallel processors can solve a wide range of business problems
     giving companies a significant competitive advantage

   - Discusses potential applications enabled by parallel processors

   - Includes examples taken from scientific modeling, databases and on-line
     transaction processing, general purpose time-sharing support, and
     information servers on a network

   - Discusses the two main approaches for writing parallel programs

   - Provides a step-by-step approach for a company on how to get started in
     using parallel processing

This important work is a must read for information systems managers, systems
analysts, MIS strategic planners, and every computer professional who would
like to keep pace with this remarkable, revolutionary technology.

John Van Zandt is the 21st Century Computer Architect for Computer Sciences
Corporation working with the Numerical Aerodynamic Simulation Systems
Division of NASA.  He has been the Director of Future Systems at Sequent 
Computer Systems, one of the pioneering companies in parallel processing. 
Prior to that he was the Engineering Manager at Intel Scientific Computers, 
another leader in parallel processing.

Van Zandt/Parallel Processing in Information Systems, ISBN: 0-471-54822-7.

Orders can be sent to:
  John Wiley & Sons, Inc. 
  605 Third Avenue, New York, NY 10158 
  Attn: Susan Straub, 10th Floor

or Call 1-800-CALL WILEY.  They accept checks and credit cards (AMEX, 
Visa, and MasterCard).  The price is $39.95.





Newsgroups: comp.parallel
From: mailrus!samsung!ulowell!cs.ulowell.edu!wex@uunet.UU.NET (Paul M. Wexelblat)
Subject: Re: Synchonizing watches
Apparently-To: ulowell!uunet!comp-parallel
Originator: wex@bigmax.ulowell.edu
Reply-To: mailrus!samsung!ulowell!cs.ulowell.edu!wex@uunet.UU.NET
Organization: Univ. of Lowell CS Dept.
Date: Thu, 3 Sep 1992 19:16:10 GMT


In article <1992Sep3.172657.10929@hubcap.clemson.edu>, anik@crhc.uiuc.edu (Sadun Anik) writes:
[ by now, the problem is in many messages....steve]

All seem to agree that it is trivial for them to to compute AB+BA;
I think we'll all agree that they just need to compute AB or BA to allow
them get "pretty close". 

OK A --->B:  "I'm going to say "BONG" as soon as my second hand
reaches the 12, when you hear the "BONG", start counting seconds
on your watch out loud.

A says "BONG" and times AB+BA seconds; at the end of that time the number
B has reached is the BA delay

bingo!  (leaders 3/4 out while the trailers any-hand wheel through)


-- 
You are in a maze of twisty little passages, all alike.

	...Wex

Newsgroups: comp.parallel,comp.arch,comp.lang.fortran
From: chandra@austin.ibm.com (Dr. Chandra Narayanaswami)
Subject: KSR machine
Followup-To: fff
Originator: chandra@arjuna.austin.ibm.com
Keywords: kkk
Reply-To: chandra@innerdoor.austin.ibm.com
Organization: IBM Advanced Workstation Division
Date: Tue, 25 Aug 1992 18:49:29 GMT


Hi,

A few weeks ago there was a lot of discussion about the 
KSR machine.  Has anyone saved those messages?  If so
can he/she email it to me?

Are there any good descriptive reports about the system?

Thanks
- -- 

Chandra
- ---------------------------------------------------------------
IBM here means I Become Myself, i.e. I don't speak for IBM Corp.




Newsgroups: comp.parallel
From: azhao@cs.arizona.edu (Qiang Alex Zhao)
Subject: Q: parallel graphics algorithms
Followup-To: comp.parallel
Organization: Computer Science Dept, Univ of Arizona, Tucson
Date: 28 Aug 92 17:53:19 GMT



Sorry if this is a repost (I'm not sure).

Could anybody point to me where I can find some graphics algorithms
that can be easily parallellized, or a bibliography on parallel
graphics algorithms? Thanks a lot.

-- 
= Qiang Alex Zhao		   Computer Science Department
  azhao@cs.arizona.edu             University of Arizona
  (602) 621-1815                   Tucson, AZ 85721

Newsgroups: comp.parallel
From: schack@eureka.arc.ab.ca
Subject: Information needed on load balancing in distributed systems.
Organization: Clemson University
Date: Wed, 26 Aug 1992 19:38:00 -0600

I am involved in a project whose goal is to develop a system for
scheduling batch and interactive jobs in a network of UNIX
workstations.  The goal is for users to be able to submit jobs and
have our system decide the best place to run those jobs.  The system
should take into account factors like expected CPU usage of the job
vs. power of the host, the location of the input and output files of
the job vs. the server locations on the network, expected memory usage
of the job vs. the memory and swap size on the host, etc.  We do not
have to deal with process migration - once jobs are assigned to a
host, they stay there.

I would like to know if there are systems out there which already
solve this problem.  Currently I have information about the Network
Queueing System (Sterling Software) and Load Balancer (Freedman Sharp
and Associates).  NQS is public domain software, but unfortunately for
our purposes it is not satisfactory because it only deals with
queueing, not load balancing.  Load Balancer performs most of the
functions we want, but is a commercial product, which brings up other
issues such as licensing, not to mention paying for the thing in the
first place. :-)

I currently have a reasonable set of papers dealing with load
balancing, but would appreciate pointers to recent papers (1991 and
on).

Thanks in advance.
Brian

Brian Schack				schack@arc.ab.ca
Alberta Research Council
Advanced Computing and Engineering Dept.
Calgary, Alberta			ph:  (403) 297-7566

Newsgroups: comp.parallel
From: anik@crhc.uiuc.edu (Sadun Anik)
Subject: Re: Constructing Control Flow Graph
Organization: Center for Reliable and High-Performance Computing
Date: 25 Aug 92 12:36:34

In article <1992Aug25.130859.2832@hubcap.clemson.edu> lka@lems1alems.brown.edu (Lalit K. Agarwal) writes:

   I'm looking for any published material on actual
   implementation methods & data-structures for constructing 
   control-flow & dependence graphs of a c-program. All
   responses will be greatly appreciated.

I would strongly recommend "The Red Dragon", the must have book for
anybody interested in detailed compiler techniques. It covers
everything from lexical analysis and parsing to code generation. It
does provide algortihms for control-flow, data-flow analysis and many
related optimizations.  The real name and other info follows.

Compilers, principles, techniques, and tools
by
Alfred V. Aho, Ravi Sethi, Jeffrey D. Ullman
ISBN 0-201-10088-6

Published by Addison-Wesley.

The book cover illustrates a compiler writer wearing an armor of
compiler tools and the red dragon of "complexity of compiler design".
In our compiler project here, all (well almost all) the flow based
algorihtms from this book has been implemented with success. 

--
Sadun Anik, U of Illinois at Urbana-Champaign
Center for Reliable and High-performance Computing
e-mail: anik@crhc.uiuc.edu

Newsgroups: comp.parallel
From: Ivan.Herman@cwi.nl (Ivan Herman)
Subject: Looking for a general threads package on UNIX
Organization: CWI, Amsterdam
Date: 2 Sep 92 07:56:49 GMT


Sorry if this question has been asked before.


In view of a large scale European research programme, we are looking for
a (possibly PD) lightweight process (thread) package on UNIX. The idea
is to have a package which would allow us to run within a "traditional"
UNIX process a large number of lightweight processes. We are especially
looking for packages which are as environment-independent as possible,
and which would be reasonably easy to install on a new hardware/software
environment.

More specific requirements are:

   - The package should be usable from C (or should be a language
     extension of C);
   - the scheduler for lightweight processes should be preemptive;
   - it should be possible to start several hundreds
     of lightweight processes
   - there should be facilities to ensure that system calls,
     especially I/O, would not block the whole UNIX process; only
     the caller lightweight process should be internally suspended.


It is a real plus for us if:

   - The package should be usable from C++ as well (if not, we can
     always try to adapt it).
   - There is a mechanism which ensures that, from a programmer's point
     on view, there would be no difference between sending a message from
     one lightweight process to another within the same UNIX address space and
     between making a (hidden) RPC call to another object on another
     UNIX process.

We know that the terminology in this respect is not fully established and,
for some, lightweight packages and threads are different sort of animals.
No flames please.

We do have information and/or experience with AT&T's Concurrent C/C++,
Brown University's Thread Package and of Waterloo University uSystem and
uC++. We are looking however for more complete information.

We would prefer to receive answers by email, because I do not read all
the newsgroups addressed by this message. I am happy to post a overview
if anything of interest pops up. Thank you in advance.

Ivan Herman
             Centre for Mathematics & Computer Sciences (CWI),
             Kruislaan 413, 1098 SJ Amsterdam, The Netherlands.
             Email:ivan@cwi.nl, Tel: +31-20-592.4163

Newsgroups: comp.parallel