From: jjmcwill@mtu.edu (Jeff McWilliams)
Subject: Re: Anyone added memory to a 65XE?
Organization: Michigan Technological University
Date: Tue, 12 Jan 1993 18:10:03 GMT

In article <TROYER.93Jan12101714@finmark.nynexst.com> troyer@nynexst.com (Tom Royer) writes:
>Hello,
>
>   I am interested in adding some ram to my 65XE.  Has anyone done this?  I assume that it would
>be a pretty easy "piggy-back" style hack.  There is ADDMEM[AB].ARC in the archive, but it
>doesn't mention the 65XE in the abstract (it does mention the 130XE).  If anyone could explain
>exactly how bank switched memory works on these machines, it would be greatly appreciated.
>
>-Tom Royer
> troyer@nynexst.com

How the XE's do banking.

In the 130XE, there and all the XL/XE series, there is a register 
located at $D301 which is part of the internal Peripheral Interface
Adapter chip.  This register is 8 bits wide, and on the 130XE, the 
bits are laid out as follows:


0    BASIC ROM enable
1    OS ROM    enable
2    XE bank bit
3    CPU bank enable
4    ANTIC bank enable
5    XE bank bit
6    unused
7    diagnostic ROM enable

Well, that's the gist of it anyway, I might have got the bit numbers wrong,
but the labels are pretty much correct.

The Atari memory map can be divided into four chunks, labelled like this:

$0000              -------------------
                   |                 |
                   |                 |
                   |                 |
$4000              -------------------
                   |                 |
                   |                 |
                   |                 |
$8000              -------------------
                   |                 |
                   |                 |
                   |                 |
$C000              -------------------
                   |                 |
                   |                 |
                   |                 |
$FFFF              -------------------

That's the 64K memory space of the 6502 chip.  

When divided into 4 pieces, each piece is 16K in length.
The banked RAM, of which there is another 64K of this in the 130XE, 
is also divided into 4 pieces, each 16K in length.

When you set, say, bit 3 high, the CPU will now see banked memory.
Where does the CPU see it?  The area of main RAM, between $4000 and
$8000 gets swapped out, and one of the banks gets swapped in.
Thus, any reads or writes to the $4000 to $7FFF area now writes to 
BANKED RAM, and doesn't touch the main memory.
You tell which of the 4 banks are available in this memory "WINDOW"
by the values of bits 5 and 2.

So, it you could number the banks like this:

bit 5  bit 2   bank number

0       0          0
0       1          1
1       0          2
1       1          3



ANTIC BANKING



There is another microprocessor inside your Atari, besides the main CPU, 
called the 6502.  The other processor is called the Antic chip. 
Antic is contstantly telling the 6502 to stop what it's doing, so that
the Antic can take over the computer, and handle the graphics display.
That's what Antic is designed for, graphics.  The Antic has its own 
programming language, and a program written in it is called the display list.
A display list tells the Antic CPU what sort of graphics mode is to be 
displayed on the screen, and where in memory the screen data is to be found.

What if you did the following?

Set the banking bits, #s 5 and 2, to zero, to access bank zero.
Set bit 3 to 1, allowing the CPU to see the banked RAM.
load a graphics 8 picture into the $4000-$7FFF area.
clear bit 3 (set it to 0), and set bit 4, allowing the Antic to see the
bank.  Now tell Antic's to look for display data at $4000, and 
that it's a graphics 8 mode.

What have you done?  Well, now, Antic sees the picture that is stored in
BANKED RAM, but the CPU which looks in the same area, still sees main RAM!
That's one of the things I think is really neat about 130XE banking.
Usually, a graphics 8 screen consumes 8K of memory.  In a computer
without extended RAM, like a stock 65XE, if you set up a graphics 8 
display for a game or an application or something, that's 8K less room
you have to store your program. 
With the 130XE, you could "hide" the 8K of display in a bank of extended
memory, and thus freeing 8K of memory in main memory to store your program 
code.  Of course, when you want to make changes to the display, you would
have to allow the CPU to see the memory bank as well, modify the display
data, and then switch off the CPU bank enable.

Concersely, you could do the just opposite, and have only the CPU see banked
RAM, and the Antic sees main RAM.  That way you could load in an extra 64K
of code, in modules each 16k long, and as your program needs to access
the different modules, you would just switch in the appropriate bank.

How is this possible?  Because the extended RAM circuitry knows how to
differentiate between when the Antic is in control of the computer, and 
when the 6502 CPU is in control.  Depending on which is in control,  
and trying to read/write to the $4000-$7FFF area, the extended memory
controller can look at the settings of $D301, and allow the CPU or Antic
chip "see" the RAM they are supposed to see.



How is a 256K upgrade set up?  Look again at the table just below.


0    BASIC ROM enable
1    OS ROM    enable
2    XE bank bit
3    CPU bank enable
4    ANTIC bank enable
5    XE bank bit
6    unused
7    diagnostic ROM enable

And now we'll modify it so it looks like this.

1    OS ROM    enable
2    XE bank bit
3    CPU bank enable
4    bank bit          
5    XE bank bit
6    bank bit
7    diagnostic ROM enable

As you see, bit 4 is no longer an Antic enable bit, it's used for 
banking.  Likewise, bit 6, which was previously unused, it now used for
banking as well.

This gives you 2^4, or 16 possible banks.  Of those, only 12 are used
in a 256K upgrade, giving 192K of banked RAM available.
Well, what happens to the Antic access to banked RAM.
Well, depending on which 256K upgrade you've done, on some, Antic will
always see just main memory, it will never see banked RAM.
On others, if the CPU sees banked RAM, then so does the Antic chip.
This can be somewhat limiting, but it's about the only way to
make bigger memory modifications, without say, disabling the BASIC
ROM enable bit, and using it as a banking bit instead.
320K upgrades actually use all 16 possible combinations of the 4
banking bits... anything beyond that will start using bit 0
and maybe even bit 7.  The Newell 1088K memory upgrade disables
BASIC on/off switching, and uses bit 0 for banking.  It also
uses bit 7.  When bit 3 is set, bit 7 is a banking bit.
WHen bit 3 is clear, bit 7 is a diagnositic ROM enable bit.

Well, I hope that helps you to understand a little more about memory
banking.  I think I've covered everything, and haven't made any
mistakes.  If I have, I'm sure somebody will point them out in a following
post.  :)



As far as 65XE upgrades go, I think Innovative Concepts might have 
one.  I'm not sure they're still in business though, and I don't have
the address handy.

Jeff McWilliams



-- 
Jeff McWilliams  jjmcwill@mathlab.mtu.edu  EE Engineer --> Michigan Tech. 
The Minstrel Boy to the war is gone,
      In the ranks of death you'll find him;
His father's sword he has girded on,