HDTenEightyP/NetNews huggingface dataset:
From: menes@Informatik.TU-Muenchen.DE (Rainer Menes)
Subject: Re: 486 vs. Mac Benchmarks
Originator: menes@suniams2.statistik.tu-muenchen.de
Organization: Technische Universitaet Muenchen, Germany
Date: Thu, 7 Jan 1993 10:51:39 GMT


Hey all,

I had the oportunity the test a Quadra 700 with AUX (Apple Unix), X11 and
gcc 2.2.2 against a 486 33MHz with Linux 0.99, X11 and gcc 2.2.2. I would
gues that this is fair and comparable test, and the closes enviroment you can
get for this two maschines. The program I tested was an MPEG decoder for X11.

Now the results,

with display

Quadra 700 with AUX 3.0 and gcc -O2  5.25 frames/sec.
486 33MHz with 256KByte secondary cache Linux 0.99 and gcc -O2  6.1 frames/sec.

without display (to mesure the raw processor power)

Quadra 700 with AUX 3.0 and gcc -O2 6.0 frames/sec.
486 33MHz with 256KByte secondary cache Linux 0.99 and gcc -O2 7.87 frames/sec.

The Free MPEG controler was Version 1.2 and the file flight.mpg.

The conclusion:

The 68040 and 486 are really close in performace for the same clockrate. This
isn't unpredictable because Motorola and Intel say that its processors have 1.3
cycles per instruction over all performace. This is shown in the second benchmark
her you see that the 486 33MHz is 1.32 times faster than the 68040 25MHz.(but the
486 gains it performace only with the secondary cache were as the 68040 doesn't
have one). The first benchmark shows that the videohardware in the Quadra is
better than the et4000 SVGA ISA card. If you use a localbus card this will give
you a better performace, but melt the price differnce between 486 and Mac Quadra
700. The influence of the secondary cache in 486 is the next thing I like to find
out. So wait for someting more, and also math performace is something to test.

Rainer

email: menes@statistik.tu-muenchen.de

P.S: Comparing Windows 3.1 against System 7.1 for the Mac is a differnt question.
I personally love the Mac system more than Windows 3.1 and a PC, for objective
and subjective resonse.
From: matthias@nsr.hp.com (Matthias Kamm)
Newsgroups: comp.sys.intel
Subject: Re: Simple CPU Questions
Date: 5 Jan 1993 17:08:56 GMT
Organization: Hewlett Packard Santa Clara Site
Distribution: usa
NNTP-Posting-Host: hpmvd069.nsr.hp.com
X-Newsreader: TIN [version 1.1.2 PL7]

Dennis O'Connor (doconnor@sedona.intel.com) wrote:
: 
: ]	 486-DX,486-SX,487-SX is the same die but they use difference bonding
: ] and package.
: 
: This hasn't been true for a while. The Intel486(tm) SX is a unique die.
:
That was my understanding too.  I'm curious, though, how much of the die
size was shaved off when moving from the 486DX -> 486SX.  Does the cost
savings really translate to what Intel is charging now relative to the
DX, or are the prices purely market driven (i.e. is the 486SX locked to
the AM386-40)?
From: kholland@hydra.unm.edu (Kiernan Holland)
Newsgroups: comp.sys.intel
Subject: Re: 486SX/25 vs. 386DX/33
Date: 11 Jan 1993 09:14:13 GMT
Organization: University of New Mexico, Albuquerque
NNTP-Posting-Host: hydra.unm.edu
Keywords: 486SX/25 vs. 386DX/33

In article <Jan.7.11.06.12.1993.11754@staccato.rutgers.edu> xchen@staccato.rutgers.edu (Xinghao Chen) writes:
>
>In purchasing a mother board, I have to make a choice amoung the following:
>
>1. A 386DX/33 mother board with 64KB cache. There are 8 RAM module
>   slots. The price is about $170. In the normal mode, it is about 
>   18MHz. In the turbo mode, it is at 52 MHz. This board has a
>   socket for a math co-processor. 
>  
>2. A 486SX/25 mother board with no cache. Also 8 RAM module slots.
>   The price is about $200. In the normal mode, it is about 22 MHz. In
>   the turbo mode, it is at 84 MHz. I was also told that I can late
>   update to 486DX/50 (the mother board has a socket for a 486DX/50 chip)
>   by pluging in a 486DX/50 and upgrading the crystal. 
>
>It seems to me that choice 2 is more cost-effective. The only thing
>bothers me is the fact that it has no cache on the mother board.
>
>I may use the PC for running MicroSoft Windows 3.1, load it with
>MicroSoft DOS 5.0, do some image captures (grabbing), practice with a 
>relational data base packege, play with multi-media application such
>as viewing TVs and games.

I would take the 486 even if there is no cache. The 486's are really 
double as fast as a 386. The 486 probably doesn't even need a 
on-board cache becuase it has internal 8k. The 386 has a 256 byte 
cache I think. 

>
>Wath would be your choice? 
>
>Thanks for your advice. Please reply by email.
>
>  -Chen    xchen@caip.rutgers.edu
> 
>
>
>  
>
From: xchen@staccato.rutgers.edu (Xinghao Chen)
Newsgroups: comp.sys.intel
Subject: HELP WANTED: 486SX/25 FPU speed
Keywords: 486SX/25 FPU speed
Date: 8 Jan 93 15:40:22 GMT
Organization: Rutgers Univ., New Brunswick, N.J.



I have had a chance to run a utility called Speed200 on a 486SX/25
mother board with an on-board 486SX/25 INTEL CPU. It has no cache. It
has 8MB RAM. I loaded it MicroSoft DOS 5.0 and Windows 3.0. 
It uses a SVGA with 1MB VRAM.

The Speed200 gave me the figer that at the Turbo mode, the machine
runs at 83 MHz for CPU and 7 MHz for FPU. The vedio speed is 2987 char/ms.
Turning off the turbo mode, it runs at 32 MHz for CPU and 3 MHz for FPU.

The mother board has a 486DX socket. I wonder how much I can benifit
by putting a 486DX2/50 CPU on the board. I like to increase the FPU speed 
for graphic applications such as simple image processing and multi-media
applications (viewing TV in a window).

One thing that I do not understand is that most 486SX/25 mother board
that I have searched do not have cache capacities on the mother board.
I wonder what is the reason.

Please advise me on this issue since I am in the process of purchasing
one. 

Thanks. Please reply by email.

-Chen        xchen@caip.rutgers.edu
Newsgroups: comp.sys.intel,comp.sys.mac.hardware,comp.sys.ibm.pc.hardware
From: ntaib@silver.ucs.indiana.edu (Iskandar Taib)
Subject: Re: 486 vs. Mac Benchmarks
Organization: Indiana University
Date: Mon, 4 Jan 1993 22:05:16 GMT

In article <1992Dec23.144535.11341@crd.ge.com> davidsen@crd.ge.com (bill davidsen) writes:

>  The truth is that Mac applications are 32 bit, and DOS applications
>are 16 bit. A comparison of UNIX 32 bit applications would be more
>correct, if they were just comparing the processors.

Well, if this is so, how do the apps run on Mac Pluses? And why is 
32 bit adressing an option under System 7? 




-- 
-------------------------------------------------------------------------------
Iskandar Taib                          | The only thing worse than Peach ala
Internet: NTAIB@SILVER.UCS.INDIANA.EDU |    Frog is Frog ala Peach
Bitnet:   NTAIB@IUBACS                 !
Newsgroups: comp.sys.intel
From: lparisi@shearson.com (Lon G. Parisi)
Subject: 486dx, 486sx, 386sx
Organization: Lehman Brothers, NY
Distribution: comp.sys.intel
Date: Wed, 6 Jan 1993 13:46:04 GMT

Hello all,
I know this question has been perpetuated over and over, but with so many
responses and opinions, I have to ask. What is the difference between
the 486sx and 486dx.  I have called Intel directly. The have told be that
there is no difference in the chip other than the dx has a coprocessor.
Intel stressed to me that the 486sx WAS a true 486 unlike the 386sx which was
a glorified 286 chip. 

Assuming what I have stated is fairly accurate, the next question I have is
the wait state of a computer.  How do you know what machines have zero
wait states. I am in the market for a new PC (got to replace the old XT) and
am considering a Packard Bell 486sx with SVGA monitor and 1meg SVGA card 4meg
ram and a 25Mhz clock speed. This is just for my home to do small "check-book"
type spread sheets, some light database work, games, etc. Now of course the
salespeople tell me that the 486sx is going to fall short of my needs. I can't
see why anyone would ever release any machine that could not satisfy those 
light needs, do you?  Unless there is something I am not aware of like
slow graphics due to the SVGA or something like that.  I would greatly
appreciate any responses especially if you are familiar with the Packard Bell
machine itself.


Thanks in advance.

Lon Parisi

lparisi@shearson.com


   
Newsgroups: comp.sys.intel
From: graeme@labtam.labtam.oz.au (Graeme Gill)
Subject: Re: 960 XA/MX Questions
Organization: Labtam Australia Pty. Ltd., Melbourne, Australia
Date: Mon, 11 Jan 1993 02:28:41 GMT

In article <1993Jan08.173711.14431@donau.et.tudelft.nl>, wolff@erasmus.et.tudelft.nl (Rogier Wolff) writes:
> I am not sure what the 960MX/XA have that the 960CA doesn't, but our Xterminals
> seem to run just fine with the CA. As far as I know, there exists 960's
> with floating point coprocessors that are Military only like the MX/XA.
> Isn't the X protocol completely floating point free as to make a floating
> point coprocessor useless in such an environment?

	I'm sure they do run fine, but only because they're running
floating point emulation code. If you ever get the chance to benchmark a 960CA and
a 960KB terminal you will notice that the arc performance
of a CA is noticeably worse than a 960KB (but be careful - arc caching
covers this up for repetitive tests). When it comes to a terminal
running PEX, then the 960CA is awesomely slow compared to a processor
with an f.p. unit. And if  you would like a choice of downloadable clients
or graceful memory degradation on your terminal, then your out of luck
unless you've got a cpu with a memory management unit.

	Graeme Gill

Newsgroups: comp.sys.intel
From: worley@a.cs.okstate.edu (WORLEY LAWRENCE JA)
Subject: Re: P24T-compatible Overdrive Sockets?
Organization: Oklahoma State University
Date: Tue, 5 Jan 93 05:11:01 GMT

From article <1993Jan5.011745.14524@netcom.com>, by feustel@netcom.com (David Feustel):
> I've heard that some overdrive sockets will accept P24T (Pentium)
> chips and that these sockets have an extra row of pins. Could someone
> confirm this and provide further details? Thanks.

In the January 1993 PC Magazine, between pages 48-49 ZEOS Int'l has one
of those annoying, hard, glossy, 3-page, fold-out advertisements, and it
shows a picture of a Zero Insertion Force (ZIF) socket with the 486dx266
in it, and the caption says it is compatible with the new "Pentium-style"
CPU's due in 1993.  It has an extra row and column of pin-holes.

-Jason Worley
Newsgroups: comp.sys.intel
From: feustel@netcom.com (David Feustel)
Subject: Re: 960 XA/MX Questions
Organization: DAFCO: OS/2 Software Support & Consulting
Date: Sat, 9 Jan 1993 00:29:31 GMT

Using a 960 xa/mx to run a graphics terminal would be a waste. These
chips have the capability to run major-league object oriented
operating systems mostly in hardware.
-- 
Dave Feustel N9MYI <feustel@netcom.com>
 
                        Happy Holidays to ALL!!!
Newsgroups: comp.sys.intel
From: ssivakum@ptdcs2.intel.com (Sam Sivakumar)
Subject: Re: Simple CPU Questions
Organization: Intel Corporation -- Aloha, Oregon
Date: Tue, 5 Jan 1993 21:20:31 GMT

In article <1993Jan5.121048.9355@uxmail.ust.hk> ee_hflo@uxmail.ust.hk (Michael Lo Ho Fung) writes:
>	The released of 486-SX is used to offer a high performance CPU and
>same price of AMD 386-40. The Co-process in the die is disabled by intel.
>Because those die a selected from 486 production line that the co-processor
>part was failed during production.
>
	I believe this is incorrect.  The 486SX is physically different from
the 486DX.  The 486SX is NOT a 486DX whose coprocessor circuits do not work
due to some defect and is sold as such.
	This technique however is not uncommon in the industry, especially
in the case of microcontrollers.  Very often, microcontrollers whose logic
portions do not work can be sold as EPROMs, since microcontrollers, for the
most part, are logic cores surrounded by a fair amount of memory.

Sam

-- 
Sam Sivakumar		    |  Intel's very own lithography dude, 
ssivakum@ptdcs5.intel.com   |  Speakin' for himself, that's for sure!
PTD, Aloha, OR              |
Newsgroups: comp.sys.intel
From: hm@opus40.ix.de (Harald Milz)
Subject: Re: 486SL dropped, vendors test Cyrix
Organization: iX-Redaktion
Date: Wed, 6 Jan 1993 18:27:25 GMT


In article <1993Jan4.155415.2710@crd.ge.com>, davidsen@ariel.crd.GE.COM (william E Davidsen) writes:
|>   A mailing list I get indicated that Intel is selling so many of the
|> 486-66 chips that they are dedecating fab lines to that chip instead of
|> meeting promises for the SL chips and the P5. The source was only

After having defeated AMD they will very probably wait even longer,
I bet.
-- 
| iX           | Harald Milz        | email: hm@ix.de         |
| Multiuser    | Editor             | phone +49 511 547 47 66 |  
| Multitasking | Helstorfer Str. 7  | fax   +49 511 547 47 33 |
| Magazine     | D-3000 Hannover 61 | 
Newsgroups: comp.sys.intel
From: ee_hflo@uxmail.ust.hk (Michael Lo Ho Fung)
Subject: Re: Simple CPU Questions
Organization: Hong Kong University of Science and Technology
X-Newsreader: TIN [version 1.1 PL8]
Distribution: usa
Date: Tue, 5 Jan 1993 12:10:48 GMT

MYRON A LIEBERMAN (drchip@cup.portal.com) wrote:
: >Kevin Brewer (kevinb@unssun.nevada.edu) wrote:
: >: I'll admit it. I use a Mac. But I have a simple(?) question about the
: >: intel x86 CPU's. (If this is a FAQ, please direct me to the proper
: >: place as I don't read this news group.) So here goes...
: >:
: >: My brother-in-law just bought a 486SX machine. What is the difference
: >: between the 486SX and the _normal_ 486 chip? FPU? 16 v. 32 bits? ???
: >: Is there a _normal_ (full powered?) 486 chip? The 486DX?
: >:
: >: Thanks - Kevin
: >:
: >:
: >:
: >Kevin, read the thread on the question above this one regarding
: >386SX bus widths.
: >
: That won't answer his question. The 486SX is a 486 without a built-in
: coprocessor but otherwise the same as the 486 (original) or 486DX. The
: 386SX has reduced address bus (24 bit) and data bus (16 bit). There is
: no coprocessor issue with the 386 since no 386 has a built-in coprocessor.

	486-DX,486-SX,487-SX is the same die but they use difference bonding
and package.

	The released of 486-SX is used to offer a high performance CPU and
same price of AMD 386-40. The Co-process in the die is disabled by intel.
Because those die a selected from 486 production line that the co-processor
part was failed during production.

	One of my friend try to insert a 487-sx into the 486-dx socket.
As the result, the computer can boot up and run all of programs.

487-sx have one pin more than 486-dx.

Michael Lo
From: hwrvo@kato.lahabra.chevron.com (W.R. Volz)
Newsgroups: comp.sys.intel
Subject: Re: Pentium to be Scrapped?!
Date: 7 Jan 93 01:52:49 GMT
Organization: Chevron Oil Field Research Company

In article <1993Jan6.235812.18764@netcom.com>, feustel@netcom.com (David Feustel) writes:
|> I heard a rumor today that Intel is seriously thinking about
|> scrapping the Pentium for another chip architecture (the 960mx?). Can
|> anyone confirm/deny/amplify this rumor?
|> -- 
|> Dave Feustel N9MYI <feustel@netcom.com>
|>  
|>                         Happy Holidays to ALL!!!

I heard a very faint rumor that the p5 would not be released and they would
go on to the p6 instead. It makes sense. They are still making a good profit
on the 486 series, the high end CPU's haven't been cloned yet, they've won
a court case that makes cloning harder. Why should they release the p5?
They're making money hand over foot and the competetion can't keep up.

-- 

======================
Bill Volz
Chevron Oil Field Research Co.
Exploration Research/Geophysics Division.
P.O. Box 446, La Habra, CA 90633-0446
Phone: (310) 694-9340
Newsgroups: comp.sys.intel
From: tdbear@dvorak.amd.com (Thomas D. Barrett)
Subject: Re: Pentium to be Scrapped?!
Organization: Advanced Micro Devices, Inc.; Austin, Texas
Date: Fri, 8 Jan 93 19:27:20 GMT

In article <DOCONNOR.93Jan7094831@potato.sedona.intel.com> doconnor@sedona.intel.com (Dennis O'Connor) writes:
>This is an idiotic rumor. No part in the 960 architecture will EVER
>replace the x86 line. Where did you hear such lunacy ? 

There was talk about a year ago that the MP# pin wouldn't be static in
a 960-like part which would allow a 486 to co-exist with this part
which installed in the OverDrive(tm) socket.
-- 
|Tom Barrett (TDBear), Sr. Engineer|tom.barrett@amd.com|v:512-462-6856 |
|AMD PCD MS-520 | 5900 E. Ben White|Austin, TX  78741  |f:512-462-5155 |
|"No is yes, And we're all free" ---Tracy Chapman, "Why?"              |
|My views are my own and may not be the same as the company of origin  |
Newsgroups: comp.sys.intel
From: wayne@backbone.uucp (Wayne Schlitt)
Subject: Re: 486SL dropped, vendors test Cyrix
Organization: The Backbone Cabal
	<1993Jan6.124308.21857@grebyn.com> <1993Jan7.174211.27473@opus40.ix.de>
Date: Fri, 8 Jan 1993 02:24:12 GMT

In article <1993Jan7.174211.27473@opus40.ix.de> hm@opus40.ix.de (Harald Milz) writes:
> 
> |> The Cyrix 486SLC has a 386SX pinout, which means it has a 16 bit data
> |> bus.  [ rest of accurate discription of the Cyrix chip deleted ]
> 
> Actually, I think, the 486SLC is an optimized 386 with this small cache.
> The only reason for naming it 486 is marketing.  


Actually, I think, the *Intel* 486 is an optimized 386 with this small cache.
The only reason for naming it 486 is marketing.


Really.  


Architecturally, the 386 and the 486 are _very_ similar.  The
implementations are very different, but I guess you could just call it
an "optimization" of the architecture.


The Cyrix chip implements _all_ 486 specific instructions and _all_
486 specific flags.  From the software's point of view, there have
been Intel chips that differ more significantly between *mask revisions*
that the differences between the Cyrix and Intel chips.  (The 386
32-bit multiply bug comes to mind).


-wayne
From: oquinn@elder.austin.ibm.com (Jim O)
Newsgroups: comp.sys.intel
Subject: BUGS!-486DX-25 SX308 Rev
Date: 10 Jan 93 15:54:06 GMT
Organization: IBM Austin

I need some help in identifying some bugs that might be present in a 80486DX-25. A friend of mine told me that the early 486 chips had a TLB problems.  He said that the SX308 rev (step?) had this problem. 

Is this true?  Does the SX308 rev have any other "bugs"?

If anyone has any info, please e-mail me.  Thanks in advance....

Jim O'Quinn
oquinn@eureka.austin.ibm.com
Newsgroups: comp.sys.intel
From: jfc@athena.mit.edu (John F Carr)
Subject: Re: Pentium to be Scrapped?!
Organization: Massachusetts Institute of Technology
Date: Sat, 9 Jan 1993 00:47:42 GMT

In article <1993Jan8.180253.22151@ptdcs2.intel.com>
	ssivakum@ptdcs2.intel.com (Sam Sivakumar) writes:

>	The first design of a chip rarely works, certainly almost never at
>this level of complexity.

IBM claimed good results with their initial RS/6000 implementation, due
to extensive simulation during design:

	The software developers were able to bring up a development version
	of the AIX operating system on the first-pass hardware successfully
	and continue development and testing of the software on the
	first-pass hardware without major hardware problem.  A few
	additional functional problems were found in the hardware after
	simulation.

	RISC System/6000 Technology (IBM book SA23-2619)
	"Structured System Design and Verification"
	Feistel et. al

There was one documented hardware bug in the released hardware.  I don't
know if has since been fixed.

--
    John Carr (jfc@athena.mit.edu)
From: David_-_Tamashiro@cup.portal.com
Newsgroups: comp.sys.intel
Subject: Any Protected mode 386 C++ debugers?
Date: Thu,  7 Jan 93 23:44:43 PST
Organization: The Portal System (TM)
Distribution: world

I am currently developing some C++ code for an embeded (non-DOS) 386
system.  Is there any debuggers out there that will allow me to debug
my system?

I know there are good C debuggers for this task, but I need a debugger
that understands objects and name-mangling.

Thanks,
Dave
From: zeke@fasttech.com (Bohdan Tashchuk)
Newsgroups: comp.sys.intel
Subject: Re: BUGS!-486DX-25 SX308 Rev
Date: 12 Jan 93 10:57:43 GMT
Article-I.D.: fasttech.1993Jan12.105743.4139
Organization: Fast Technology   Beaverton, OR

In <C0nAu6.7Hs@austin.ibm.com> oquinn@elder.austin.ibm.com (Jim O) writes:
>I need some help in identifying some bugs that might be present in a 80486DX-25. A friend of mine told me that the early 486 chips had a TLB problems.  He said that the SX308 rev (step?) had this problem. 

>Is this true?  Does the SX308 rev have any other "bugs"?

>If anyone has any info, please e-mail me.  Thanks in advance....

Intel chips NEVER have bugs. Their LAMS (Liberal Arts Marketing Slime) have
made sure of that.

However, there is a 486 "errata" list available under non-disclosure. Some
items are bugs they promise to fix, others they left alone and decided to
update the doc to reflect this. I no longer have access to it, but it used
to have a dozen or so items. A few of them were quite serious, and required
hardware or software workarounds.

Maybe even this much info violates the non-disclose. So sue me.

The bugs varied significantly between mask steps. Intel seems to do a good
job in fixing them with each new mask. This is in stark contrast to the bozos
at some other IC companies which shall remain nameless since the marketplace
has already taken care of them.

From your address I'd bet that you won't need to get a new NDA to get this
info from Intel. Someone at your site must already have it.

One of Michael Slater's hot buttons in Microprocessor Report has been to try
to get vendors to release their bug lists. As of a year ago, when I stopped
designing with the 486, Intel hadn't done so. Perhaps this has changed.
Perhaps hell has frozen over. But then, I never thought the Soviet Union
would simply disappear, so stranger things have happened.
From: sasbge@ant.unx.sas.com (Gantt Edmiston)
Newsgroups: comp.sys.intel
Subject: Re: P24T-compatible Overdrive Sockets?
Date: 5 Jan 93 18:47:28 GMT
Reply-To: sasbge@ant.unx.sas.com
Organization: SAS Institute Inc.
Originator: sasbge@ant.unx.sas.com


>> I've heard that some overdrive sockets will accept P24T (Pentium)
>> chips and that these sockets have an extra row of pins. Could someone
>> confirm this and provide further details? Thanks.
>
>I am under the impression that the "P24T" is more like a Pentium "SX".
Correct.

>
>I know Intel is making specs on the P24T, or at least specs on a socket
>that will accept the chip, available to just about anyone.
I don't think so.  The "specs" are available to folks like ZEOS who
manufacture hardware that will incorporate this technology.  You have
to pay big bucks for this advance info and you have to sign legal
non-disclosure agreements.

The specs on the socket are not Intel proprietary.  ZIF sockets have
been around for a good while.  I am unclear, however, how the high
speed (100MHz) CPUs will perform in these sockets.

I have a ZEOS 486DX2-66 with the ZIF socket and there is TWO extra rows
and TWO extra columns set aside for the P24T chip.  It is my understanding
that this will NOT accept the Pentium, but rather it's half-brained cousin,
the P24T.  Currently the 486DX2 chip sits in the dead center of the
ZIF socket, with all the extra pin holes around the perimeter of the
chip.
-- 
-----------------------------------------------------------------------------
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SAS Institute Inc.          <(  |you'll always get what you've always gotten!
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Newsgroups: comp.sys.intel