From: subhodip@paul.rutgers.edu (SUBHODIP GHOSH)
Newsgroups: misc.jobs.resumes
Subject: PERMANENT/CONTRACT_POSITION_IN_DIGITAL_ASIC_DESIGN/IC_DESIGN/NETWORK_INTERFACE_DESIGN
Date: 11 Apr 92 22:01:27 GMT
Organization: Rutgers Univ., New Brunswick, N.J.


                                                           11th April'92



Dear Prospective Employer :

I am a graduate student doing my M.S. in Computer Engineering at Rutgers 
University,New Jersey.I  will be graduating in Spring'92, defending my
Master's thesis.

Now I am looking for a position related to my educational background and 
job experience.I want to consider myself as a candidate for any opening
existing in your company related to my field of education and experience.

My graduate studies  have centered around Digital ASIC Design and VLSI
testing/design for hardware circuit interfaces used in communication and
networking. I am highly interested in IC chip design/test and CAD tool
development. Also I have a great deal of experiences in using CAD tool,
C  language programming,  and working on a UNIX environment.  You  will
find  more details  about me  in  the  attached resume.  I  believe  my
educational  background  will  be  a  good asset  for your company.  In
addition, I like traveling and I am willing to relocate anywhere within 
continental USA.

If I may be the person you are looking for, please feel free to contact
me or leave a message any time.  I sincerely hope  I will hear from you
soon and get a chance of interview at your convenience. Thanks for your
time and consideration.


Sincerely,
Subhodip Ghosh.


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                              SUBHODIP GHOSH
                         subhodip@paul.rutgers.edu

Home Address:                 Present Address:            Office Address:
29 Bradford Road,             BPO 29871,                  Dept. of Elect.Engg.
East Brunswick                PO BOX 1119                 Rutgers University
New Jersey-08816              Piscataway NJ               Piscataway,NJ-08855
(908)238-6595                 (908)463-9268                (908)932-0606

OBJECTIVE : A challenging position in Computer Engineering with emphasis on
            Digital ASIC design and/or software related to IC design tools,
            systems, network programming and netrwork interfacing.
             

EDUCATION : M.S. in progress,Electrical Engineering - Rutgers University, NJ.
            (expected graduation date Spring 1992)

            M.S Thesis in progress : "Digital Hardware design for a highspeed
            interface circuitry for a distributed network system"
            

            B.E. 1988, Electrical Engineering - B.I.T.S - Sindri,INDIA.

            Final Year Project : "Improvement of Powerfactor of an industrial
            machine by stepper motor interface with 8086 microprocessor kit."


HARDWARE  : Designed,implemented and tested a CMOS (1.5 micron technology)VLSI
            chip using "Silicon Compilers"Ledt for layouts,Lsim for simulation
PROJECTS    and Spice for critical timings.The chip implemented a systolic 
            Auto Regressive Filter. Both, manual layout and standard cell 
            technique was used and was optimised for a minimum area and 
            maximum speed.

            Designed,implemented and tested a CMOS (1.5 micron technology)VLSI
            chip using "Silicon Compilers- Ledt for layouts,Lsim for simulation
            and Spice for critical timings.The chip implemented 24 bit floating 
            point multiplication/addition/subtraction as per IEEE. standards.

            Board Design: (1)PCB  design  using ORCAD  for a "MERGER"
            Vidio Interface Circuitry intended for a distributed network for
            IBM compatible PCs.

            (2) PCB design for  high speed DATA TRANFER between ISA standard
             AT Bus and a distributed network using a simple handshaking 
             protocol.

            Design ofa circuitry to convert a "Two wire direct interface(T.D.I-
            Burroughs convention)to standard RS-232 interface.
            

SOFTWARE  : Real time programming for man-machine interface:Programming the A/D 
PROJECTS    converter(in VME bus)with Sun-4 machine and depicting   the changes 
            in the analog voltages on the computer screen.Modifying the existing
            device driver as per the requirements.   
             

            Implementing the functional behaviour of a telephone network in C++
            treating PHONE COMPANY as the switching object and different PHONES
            and USERS as other objects.The project included both the local and
            global interfaces.


            Cache coherency problem in multiprocessor computers-implementation
            of a Berkeley software protocol to analyse the memory miss rates. 


            Design of a simulator for a RULE BASED GENETIC ALGORITHM of random
            nature controlled by a set of rules and a production cycle.

    
            Patchup in the existing Terminal  Emulation  program for the file 
            transfer from B6800 mainframe to IBM compatible PC -XT/AT to suit
            its requirements.

 
            Modification of existing Network Defination Language (NDL)in B6800
            mainframe to meet the Data Communication Processors need.


            Data aquisation system for 16 analog inputs to be dumped into an
            IBM compatible PC-AT via the Ferranti Argus Process control computer

          
OPERATING : IBM PC XT/AT running MS-DOS.     Burroughs B6800 & B1900 running MCP
SYSTEM      Pyramid running Berkeley UNIX    Sun 4 & 3/50 running Sun UNIX 4.2
            Prime 50 series running PRIMOS   Ferranti Argus running CORAL 

LANGUAGES : C,C++,Fortran,Assembly of 8085,8086,VHDL,M-Language.
CAD         Mentor Graphics(Ledt & Lsim),Spice for VLSI design.
            Orcad SDT(for schematic capture),VST(for simulation),PCB(for PCB
            design)
            XILINX and Futurenet-DASH for Gate Array processor design.
          
          
WORK         Dec 90 - Present : Working as a Research Assistant in the 
EXPERIENCE : Integrated Systems Lab.-Electrical Engg.,Rutgers University
             on Hardware Board Design for Digital Circuits.

             Aug 90 - Dec 90 :  Worked as a "Research Programmer" at the
             Robotics Lab - Electrical Engg., Rutgers University on "Force
             Feedback control for dextrous robot masters using Shape Memory
             Metals".

             Aug 90 - Dec 90 : System supervisor at the Prime Computer
             Centre,Rutgers University.

             Tutor for courses in Maths,computers and Electrical designs
             and circuits as part of the E.O.F minority program of Rutgers
             University.

           
             2 YEARS OF HARDWARE DESIGN/SYSTEM INTEGRATION & HARDWARE 
             SUPPORT/MAINTENANCE OF Burroughs 6800 and UNISYS 1900  
             and its peripherals at TATA COMPUTER SERVICES, INDIA.
             (July '88  -  Aug ' 90)



RELEVANT COURSEWORK : CAD VLSI Design                 VLSI Array Processors
                      Computer System Design 1 & 2    Computer Structures
                      Integrated Circuits             Network Communication 
                      Data Structures                 Control Systems
                      Software Engg.                  Numerical Analysis

REFERENCES :      Available on request.





        
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