From: ForthNet@willett.pgh.pa.us (ForthNet articles from GEnie)
Newsgroups: comp.lang.forth
Subject: Hardware ONLY issues
Date: 27 Dec 92 12:23:37 GMT
Organization: EIEI-U

Category 9,  Topic 2
Message 127       Sat Dec 26, 1992
ELLIOTT.C                    at 13:40 EST
 
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 Date: 12-22-92 (02:09)
   To: ALL
 From: MARCEL HENDRIX
 Subj: THREADING SPEED

 Penio Penev wrote about M. Anton Ertl's ``Threading speed''

   M. Anton Ertl's benchmark intrigued me too, but it was in a
 foreign language (C). However, your Forth version I can
 reproduce.  Here is what

 I found for the TMS320C30, a 32-bits, 33 MHz DSP chip from Texas
 Instruments. The output shown is produced from within my
 interactive target compiler for this chip (The tc is written in
 iForth, a 32-bit Forth for the '386. It runs under GO32 in
 protected mode on my PC).

 [regrets on possible bad reformatting; the source code below was
 a bit more than I was up to dealing with]


 <TARGET> open-log
 <TARGET> include thread.tst
 | \ These are the contents of thread.tst:
 | code cdummy  next, end-code
 | : dummy ;
 | : dd    FOR dummy  NEXT ;
 | : cc    FOR cdummy NEXT ;
 | : tara  FOR NEXT ;
 | cr .( tara : ) timer-reset 10000000 tara .elapsed .(  Indigo: 1300 )
 | cr .( dd   : ) timer-reset 10000000 dd   .elapsed .(  Indigo: 3100 )
 | cr .( cc   : ) timer-reset 10000000 cc   .elapsed .(  Indigo: 2500 )
 tara : 3.630 seconds elapsed. Indigo: 1300
 dd   : 10.065 seconds elapsed. Indigo: 3100
 cc   : 10.065 seconds elapsed. Indigo: 2500  ok
 <TARGET> see cc
 $000005C7  ldi *ar0++(1),r0              08402001 .... MH> dpop,
 $000005C8  ldi $5CF,r2                   086205CF ....
 $000005C9  push r2                       0F220000 ....
 $000005CA  push r0                       0F200000 ....
 $000005CB  push r0                       0F200000 ....
 $000005CC  ldi r0,r7                     08070000 .... MH> loop count
 $000005CD  addi 1,r2                     02620001 ....
 $000005CE  bu r2                         68000002 ....
 $000005CF  bu $5D3                       6A000003 .... MH> LEAVE use
 $000005D0  callu $5B7                    7200FFE6 ....
 $000005D1  subi 1,r7                     18670001 .... MH> NEXT
 $000005D2  bne $5D0                      6A06FFFD ....
 $000005D3  subi 3,sp                     18740003 ....
 $000005D4  retsu                         78800000 .... ok
 <TARGET> words

2
 tara              cc                dd                dummy
 cdummy            ok
 <TARGET> see cdummy
 $000005B7  retsu                         78800000 .... ok
 <TARGET> see dummy
 $000005B8  retsu                         78800000 .... ok
 <TARGET> close-log
 ---
   Commands that the target can not understand (like cr timer-
 reset .elapsed) are passed back to the host and executed there.
 The only words that have code in the target are listed with WORDS
 , above.

   The disassembler is part of the target compiler. It can show
 the code in rpn too, but I like it better this way :-) The
 mnemonics have the format <opcode> <source> [<source2>]
 <destination>.

   Assembler: AR0 is address register 0. It points to the Forth
 data stack.  The machine stack is also the Forth return stack.
 "bu" means "branch unconditionally".

   The long intro to FOR makes work a bit easier for the target
 compiler, and allows me to code  FOR ... LEAVE ... NEXT if I want
 to. You cannot nest FOR NEXT's.

   The constant 100,000,000 was changed to 10,000,000 because, as
 you can see, the code takes about three to four times as long to
 run as on your Indigo. It is possible to optimize CC above, by
 using bned instead of bne, but that won't give me 300% more
 speed(?) I really wonder how the R3000 does it. Branch
 prediction?

 Marcel Hendrix,       | The Roman Rule --Dutch Forth Workshop  |
 The one who says it cannot be done should
         |    never interrupt the one who is doing it.

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