From: ian@syacus.acus.oz.au (Ian Joyner)
Subject: Re: Info about A Serie
Organization: ACUS Australian Centre for Unisys Software, Sydney
Date: Tue, 13 Oct 1992 01:56:15 GMT

eherrera@isluga.puc.cl (Eduardo Herrera) writes:

>Hello. I need some information about Serie A computers. In detail
>I need something about internal architecture of the CPU and
>something about the Assembler language of this serie.

To find out about the A Series architecture, you need to get the "A
Series Architecture Manual" volume 2. This gives you all the machine
instructions, and other architectural details for the whole range.
The architecture is also known as EMode architecture. There are
several (compatible) levels of this, alpha, beta and gamma.

However, you probably don't want to concentrate on the differences
between these, as they are small. The answer to the question of
assembler can be put in several ways. "What's assembler" is one
answer you will get from an A Series person. Another is that the
assembler is Burroughs Extended ALGOL. All systems software is
written in a variant of Algol. The machine architecture is therefore
a run time environment for Algol. The basis of the architecture is
a hardware stack. The stack frames a referenced by a set of registers
called D registers. There are no user accessible registers in the
machine, the top of stack being the equivalent of registers.
The other interesting part of the architecture is that it is tag based.
Each word in memory has an associated tag which gives the type of
the word. Odd tags are read only words. These apply to code words, which
cannot be modified by a user program. Tag 0 words are data, and tag
2 words (even), are double precision.

There are also instructions and features that help in the implementation
of languages such as COBOL. These languages do a lot of string processing,
so there are instructions for this. This maps to the REPLACE and SCAN
statements of Algol, which are very powerful for compiler writing.

Another interesting feature is that the architecture is descriptor
based. Descriptors hold metadata about memory blocks, ie the address
of a master descriptor, which holds the address of the actual block
(this makes relocation, deallocation and overlaying easy), the length
of the block, and the type of the block. This makes A Series programs
quite easy to debug, as any invalid indexes, or pointer overflows to
a block are caught immediately, not at some later time, when the
real error has been obscured.

The architecture for the machines also ensures object code compatibility
over a very wide range of processors from the micro A (a single chip
processor that plugs into a PC), through to the A19. This represents
a scalability factor of about 420 times.

I hope those points have pointed out the salient features of the
architecture, so that you know what to look for in your more detailed
researches.

-- 
Ian Joyner  ACUS (Australian Centre for Unisys Software)    ian@syacus.acus.oz
"Where is the man with all the great directions?...You can't imagine it,
 how hard it is to grow, Can you imagine the order of the universe?" ABWH
Disclaimer:Opinions and comments are personal.
Newsgroups: comp.sys.unisys