From: dmw@taurus.ece.cmu.edu (Hank Walker)
Newsgroups: comp.arch
Subject: CFP - Defect and Fault Tolerance Workshop
Date: 16 Apr 92 15:18:42 GMT
Reply-To: dmw@ece.cmu.edu
Organization: Electrical and Computer Engineering, Carnegie Mellon
Originator: dmw@taurus.ece.cmu.edu


                 1992 IEEE INTERNATIONAL WORKSHOP ON
              DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS
                  November 4-6, 1992, Dallas, Texas

                           CALL FOR PAPERS

The goal of this workshop is to provide a discussion forum for researchers
and practitioners dealing with digital, analog, and mixed VLSI integrated
circuits.  All aspects of design, manufacturing, test, reliability, and
availability which are affected by defects during manufacturing and by
faults during system operation are of interest.

The scope of the workshop includes, but is not limited to, the following
topics:

Defect and fault tolerant VLSI architectures
Repair and restructuring techniques
Defect and fault tolerant memories
Technology issues for defect tolerant architectures
Defect and fault tolerant analog and mixed ICs
Packaging techniques for WSI, 3-D VLSI, and MCMs
Case studies of defect and fault tolerance
On-line reconfiguration
Fault models and defect models
Run-time fault modeling
Techniques for yield enhancement
Self-testable designs for DFT in VLSI and WSI
Statistical yield modeling
Multiple fault diagnosis
Defect and fault tolerant VLSI systems
Parametric testing for DFT

Manuscripts describing novel results from industry are strongly encouraged.
Presentations will consist of regular papers (20 min. talk, 10 min.
discussion)  In addition, evening working groups for the continuation of
discussions initiated during the presentations will be organized.

General Chair:				Program Chair:

D. M. H. Walker				F. Lombardi
Dept. of Electrical & Computer Eng.	Dept. of Computer Science
Carnegie Mellon University		Texas A&M University	
Pittsburgh, PA  15213-3890		College Station, TX 77843-3112
USA					USA
Tel:  (412) 268-8522			Tel:  (409) 845-8641
Fax:  (412) 268-2860			Fax:  (409) 847-8578
E-mail:  dmw@ece.cmu.edu		E-mail:  lombardi@cs.tamu.edu

Local Arrangements:			Registration Chair:

E. Swartzlander				H.Y. Youn
Univ. of Texas, Austin, USA		Univ. of Texas, Arlington, USA

Program Committee:

V.K. Agarwal, McGill Univ., Canada	M. Rivier, IBM, France
D. Blough, Univ. of California, USA	R. Stefanelli, Pol. di Milano, Italy
A.V. Ferris-Prabhu, IBM, USA		G. Saucier, INPG, France
W. K. Fuchs, Univ. of Illinois, USA	Y. Savaria, Ecole Polytech., Canada
V.K. Jain, Univ. of South Florida, USA	A.K. Somani, Univ. of Washington, USA
I. Koren, Univ. of Massachusetts, USA	C. H. Stapper, IBM, USA
R. M. Lea, Brunel Univ., UK		E. Swartzlander, Univ. of Texas, USA
R. Melhem, Univ. of Pittsburgh, USA	J. Trihle, SGS Thomson, France
P. Mazumder, Univ. of Michigan, USA	J. P. Teixeira, INESC, Portugal
J. Pineda, Texas A&M University, USA	S. Tewksbury, West Virginia Univ., USA

Industrial Subcommittee:

R. Collica, DEC, USA			J. Hammond, Intel, USA
D. Dance, Sematech, USA			C. Stapper, IBM, USA
C.M. Drum, AT&T Bell Labs, USA	

INFORMATION FOR AUTHORS

Authors are invited to submit 20 copies of the summary of a regular paper no
later than May 1, 1992 to the Program Chair.  Paper submissions should be an
extended summary of 5 pages of text plus an unlimited number of figures.
Proposals and requests for panel discussions and working groups should be
sent to the General Chair as soon as possible, but no later than April 17,
1992.  

Notification of acceptance will be posted by July 1, 1992.  Final
manuscripts (10 pages including figures) must be received by August 15, 1992
for inclusion in the workshop proceedings.  A formal proceedings will be
published by IEEE Computer Society Press.

IMPORTANT DATES

May 1, 1992		Submission Deadline
July 1, 1992		Acceptance Notification
August 15, 1992		Final Manuscript Due
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