From: raster@comix.cs.uoregon.edu (Radek Aster)
Newsgroups: misc.jobs.resumes
Subject: MSCS+4yrs.-embedded firmware development,SCSI,IPI,Parallel Arch.
Date: 15 Oct 92 20:52:04 GMT
Article-I.D.: cs.1992Oct15.205204.18620
Organization: University of Oregon Computer and Information Sciences Dept.

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			     RADEK ASTER
			   815 Almaden St.
			   Eugene  OR 97402
				   
			Phone  (503) 686-1288
				   
		    Email : raster@cs.uoregon.edu
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Education History	
-----------------

M.Sc. Computer Science - Univ. of Oregon, 1992
B.A. Physics - Univ. of California Santa Cruz, 1986 - Highest Honors
B.A. Computer Science - Univ. of California Santa Cruz, 1986 - Highest Honors

Statement of Expertise
----------------------

* Thorough understanding of complete system design; hardware, firmware and     
  software.
* Hands-on lab experience writing and debugging real-time, multi-processor 
  firmware and hardware.
* Fluency in C and many microprocessor assembly languages.
* System programmer's understanding of UNIX and MS-DOS.
* Broad educational base: Theory of Computation, Parallel Architecture and
  Programming, Compilers, Distributed Operating Systems, functional programming
  (Scheme), OOP (C++, SmallTalk), logic programming (Prolog).

Employment History 
------------------ 

*	University of Oregon - Sept. '90 to June '92

	Graduate Teaching Fellow/Instructor

*	Pyramid Technology Corp. Mnt. View, CA - Sept. '88 to Aug. '90

	Hardware/Firmware Design Engineer

	Designed and implemented firmware for Dual-Port, High Performance IPI-2
	controller. Time sliced, triple-sequencer, bit-sliced hardware, which
	was the engine for proprietary multi-threading kernel under which
	controller processes executed. Real-time kernel orchestrated three
	processors on top of shared memory architecture; shared memory
	synchronization with spin-locks; dynamic memory management with bit
	tables and fast bit-XOR memory de-fragmentation; interrupt initiated
	non-preemptive multi-threading.

	Designed and implemented debugging platform, debugger and utility
	software for IPI controller; UNIX platform. Bare-bones UNIX device
	driver allowing access to low-level register manipulation machine
	instructions was required to access controller IO registers. Debugger
	allowed microcode download from external file system, manipulation of
	controller registers and memory, execution of higher level controller
	functions, error injection, multiple IO transfer operations through
	UNIX process forking and completion polling.

	Debugged the prototype of IPI controller hardware. Major problems
	included underestimated worst case IO buffer memory timing and random
	asynchronous control signal glitch.

*	Data Technology Corp., Santa Clara, CA - Aug. '87 to Sept. '88

	Firmware/Software Design Engineer

	Implemented firmware for full-SCSI bridge controller capable of
	controlling two ST-506 disk drives. Single threaded 8085 processor;
	allowing for overlapping seeks by SCSI connect-disconnect protocol.

	Designed an ICE (In-Circuit-Emulator) and assembler for a DTC
	proprietary RISC and R/W channel processor chip. ICE included functions
	similar to those of the previously mentioned IPI debugger.

	Wrote firmware for high-speed POSTSCRIPT compatible printer. Multi-
	threaded non-preemptive kernel running on a single processor WEITEK 
	RISC architecture. Essential functions included real-time image 
	rendering, and Appletalk and RS-232 port management. Code written in C 
	and assembly.

	Wrote the software for a SCSI level debugging tool. Manual or automatic
	command packet construction; SCSI protocol driver; Connect/Disconnect 
	capability. Platform hardware was 80286 system with interrupting SCSI 
	host adapter.

* 	Spectra Logic Corp., Mnt. View, CA - Nov. '86 to Aug. '87

	Continuation Engineer

	Sustained and provided customer modifications to the hardware and
	firmware of high performance, emulating SMD Disk and PERTEC Tape 
	controllers. UNIBUS and Q-BUS host bus architectures

Other achievements
------------------

Completed a cross-country bicycle tour, from Raleigh, NC to Eugene, OR in 10
weeks, covering 4000 miles. Completed a bicycle tour from Anchorage, AK to
Eugene, OR in 11 weeks, covering 3700 miles.

References available upon request
---------------------------------