HDTenEightyP/NetNews huggingface dataset:
From: "Dennis Gannon" <gannon@moose.cs.indiana.edu>
Subject: Re: JPDC Special Issue on Scalability
Keywords: scalability, large-scale parallel computers, analysis
Organization: Computer Science, Indiana University
Date: Thu, 12 Nov 1992 23:09:03 -0500

Vipin,

I am shocked.  For your special issue you have called for:

>The objective of this special issue is to bring together the research
>done by theoreticians,  architecture designers and application developers
>on scalability analysis of large-scale parallel systems.

When are you going to get the picture that an essential key to  progress
in this area is in Software, i.e. Compilers, the O.S. and Performance Analysis!
Yet you seem to see their input as not important.  I wish you good luck 
on getting REAL scalabilty with out help from these people.

Your friend,
Dennis Gannon

Newsgroups: comp.parallel
From: duncan@b117c.super.org (Duncan A. Buell)
Subject: CALL FOR PAPERS: IEEE Workshop on FPGAs for Custom Computing Machines
Organization: Clemson University
Date: Thu, 5 Nov 92 08:14:59 EST

CALL FOR PAPERS: IEEE Workshop on FPGAs for Custom Computing Machines

   April 5-7, 1993    The Inn at Napa Valley, Napa, California

PURPOSE:
To bring together researchers interested in the use of FPGAs as computing
elements to present recent work.  While papers of a theoretical nature
are welcomed, it is anticipated that this workshop will focus primarily
on the current opportunities and problems in this new and evolving
technology for computing.  A proceedings will be published by the
IEEE Computer Society.

SHORT PAPERS OR ABSTRACTS (10 pages) SHOULD BE SUBMITTED BEFORE
JANUARY 9, 1993 TO ONE OF THE TWO CONFERENCE CO-CHAIRS.

This workshop is sponsored by the IEEE Computer Society and the TC
on Computer Architecture.

CoChairs:    Ken Pocek (west coast)    Duncan Buell (east coast)
             Intel                     Supercomputing Research Center
             Mailstop SC1-03           17100 Science Drive
             3065 Bowers Avenue        Bowie, Maryland 20715
             Santa Clara, CA  95052    301-805-7372                      
             408-765-2363              301-805-7602 (fax)                      
             408-765-2949 (fax)        duncan@super.org            
             kpocek@sc.intel.com

ORGANIZING COMMITTEE:
Lynn Abbott , VPI           Fred Furtek, Concurrent Logic  
Jeffrey Arnold, SRC         Leon Maissel, IBM  
Peter Athanas, VPI          Richard Newton, U Cal-Berkeley
Apostolas Dollas, Duke U    Jonathan Rose, U Toronto  
Tom Kean, Algotronix        Steve Trimberger, Xilinx 
Wally Kleinfelder, SRC      David Van den Bout, N. Carolina State U 

SOLICITATION::
Papers are solicited on all aspects of the use or applications of
(usually multiple) FPGAs as (usually reconfigurable) computing
elements in attached or special purpose processors or coprocessors,
especially including but not limited to
*** coprocessor boards for augmenting the instruction set of
    general purpose computers;
*** attached processors for specific purposes (e.g. signal
    processing) or general purposes;
*** languages for programming FPGA-based computers;
*** tools and environments for programming FPGA-based computers;
*** application domains suitable for FPGA-based computers;
*** architecture emulation using FPGA-based computers.

[An attempt will also be made to have general panel discussions by the
major software and hardware vendors on what to expect in the near
future in capability for FPGA-based systems.]

Individuals wishing to be put on an email list for further information
about this workshop should send email with name, regular mail address,
and email address to Duncan Buell.

Newsgroups: comp.parallel
From: kielmann@isa.informatik.th-darmstadt.de (Thilo Kielmann)
Subject: Please help with PARMACS book!
Organization: TU Darmstadt
Date: Thu, 5 Nov 1992 11:52:30 GMT

The following book seems to be the original description of the PARMACS
macro package:

@Book{parmacs-book,
  author = 	 "James Boyle and Ralph Butler and Terrence Disz and
		  Barnett Glickfeld and Ewing Lusk and Ross Overbeek
		  and James Patterson and Rick Stevens",
  title = 	 "Portable Programs for Parallel Processors",
  publisher = 	 "Holt, Rinehart and Winston, Inc.",
  year = 	 1987,
  isbn = 	 "0-03-014153-2",
  address = 	 "New York, NY",
  comment = 	 "Describes the use and implementation of the PARMACS
		  macros.  Discuss philosophy behind message-passing,
		  shared-memory, and combined MP and SM models in
		  programming.  Copies of the macros can be gotten
		  from \mbox{\tt netlib@research.att.com} by sending
		  the message {\tt send index from parmacs}."
}

Unfortunately, my local bookstore told me that this book seems to be
out of print.

Can anybody out there help me obtaining it?
Any help appreciated!

---
Thilo Kielmann	<kielmann@isa.informatik.th-darmstadt.de>

Working at, not speaking for:

University of Darmstadt
Dept. of Computer Science
Alexanderstr. 10
D-6100 Darmstadt
Germany


Newsgroups: comp.parallel
From: mtayler@pilot.njin.net (Mark Tayler)
Subject: Multi-computers, what are they
Keywords: multi-computers, references
Organization: Rutgers Univ., New Brunswick, N.J.
Date: 11 Nov 92 02:03:02 GMT


I am posting this for a friend
He needs to find information on "multi-computers"

What is the definition of a multi-computer
Are there any machines out there that are "multi-computers"
What are other names for "multi-computers"
Are there any decent general referces to "multi-computer" systems.

What good books are available on "multi-computer" systems.

If you have any info I would appreciate it

****************************************************************************
*  Mark L. Tayler                               System Administrator:      *
*  mtayler@pilot.njin.net                       County College of Morris   *
*                                               (201) 328-5772    (VOICE)  *
*                                               (201) 328-5058    (DATA)   *
*                                               No Net Access Yet !!!!     *
****************************************************************************

Newsgroups: comp.parallel
From: rchrd@netcom.com (Richard Friedman)
Subject: Fortran Parallel Processing Workshop, 15-18 Dec 92
Apparently-To: comp-parallel@ames.arc.nasa.gov
Organization: Applied Parallel Rsrch (Berkeley)
Date: Thu, 5 Nov 1992 18:27:30 GMT


            PARALLEL PROCESSING IN FORTRAN
                     WORKSHOP

                15-18 December 1992
              Placerville, California


A 3 1/2 day workshop on parallel processing in Fortran and using the FORGE
90 parallelizing tool.

The instructors will be Gene Wagenbreth and John Levesque, Applied Parallel
Research, Inc.

OUTLINE:

Day 1:
    AM:  Intro to Parallel Processing
        o Parallel architectures - SIMD & MIMD
        o Memory architectures - Shared, Distributed, Multi-level
        o Programming paradigms - Domain decomposition, SPMD
        o Language issues - Fortran 77, 90, High Performance
            Fortran
        o Performance measurement - profiling tools, parallel
            simulation

    PM:  Intro to FORGE 90
        o Overview
        o Source code browser
        o Instrumenting serial programs

Day 2:
    AM:  Distributed Memory Parallelizer Tutorial 1
         Parallelizing a typical application
        o Data decomposition
        o Loop distribution
        o Using pref77 post-processor
        o Linking with PVM
        o Parallel Simulator

    PM:  Distributed Memory Parallelizer Details
        o The programming model - SPMD paradigm
        o Array partitioning
        o Loop distribution
        o Parallelization inhibitors/prohibitors
        o Efficiency of transformations
        o Problems and work-arounds

Day 3:
    AM:  Distributed Memory Parallelizer Tutorial 2
         Parallelizing a difficult application

    PM:  Open workshop using FORGE 90 DMP

Day 4:
    AM:  Shared Memory Parallelizer
        o Overview
        o Parallelizing DO Loops
        o Scoping arrays and variables
        o Critical & Ordered regions
        o Storage Conflicts
        o Tutorial


Registration fee is $1500, including materials and access to workstations
running FORGE 90 and PVM.  Location is at the offices of Applied Parallel
Research in Placerville, California, (45 miles east of Sacramento, near
Lake Tahoe).

Contact Applied Parallel Research, Inc., 550 Main St., Placerville, CA
95667 (916) 621-1600.  Fax: -0593.  Email:  rchrd@netcom.com
-- 
/\=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=/\
\/Richard Friedman (510)528-7055  |  rchrd@netcom.com    
/\Applied Parallel Rsch (Berkeley)|                          /\
\/=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\/


Newsgroups: comp.parallel
From: chunghsu@pepper.rutgers.edu (Chung-Hsing Hsu)
Subject: scalability analysis
Keywords: scalability analysis
Organization: Rutgers Univ., New Brunswick, N.J.
Date: 6 Nov 92 17:52:35 GMT


Can anyone suggest me a good introduction(or survey) for
scalability analysis of parallel algorithms and architectures?
I'm especially interested in the metrics which can take both
into account.

Thanks

Chung H. Hsu
chunghsu@paul.rutgers.edu

Newsgroups: comp.parallel
From: Roy_Williams@nntp-server.caltech.edu
Subject: PVM vs. Express
Reply-To: roy@willow.ccsf
Organization: CCSF Caltech, Pasadena, CA
Date: 13 Nov 1992 03:12:58 GMT

In article 1744@hubcap.clemson.edu, ccechk@nuscc.nus.sg (Heng Kek) writes:
>
>I have a need to evaluate 2 parallelizing softwares: PVM and
>EXPRESS.  I'm aware that EXPRESS is commercial.
>
>Can anyone give a critique on the relative merits of the 2 packages?

I haven't used PVM too much, just run "hello world" and read the manual, but have
used Express a lot, so lots and lots of bias coming up...

Portability: PVM seems to be just workstation networks, Express is also Intel, Ncube
Cray, SGI, in fact all the MIMD machines I can think of.

Debuggers: Express has ndb, PVM has the usual unix debuggers. You have to learn
ndb, but its built as a parallel debugger (Firing up 64 dbx's could be a bit of
a strain on any machine I would think)

Express has a reasonable I/O model: the processors contribute to the file in order,
or all the processors speak with one voice, or they all write asynchronously, and
similarly for reading. I've found it really awkward trying to write an intelligible
file when anyone can write whenever they want.

Express has parallel graphics portable to X, postscript, raster files, hippi
framebuffer etc etc.

PVM seems to be just send and receive and not much else. You can't send a "mixed-bag"
message with different types - you have to send the floats, ints, chars etc in
different messages. Also there seems to be a kind of hub-and-spoke system where all 
messages get routed through the hub (is this true?).

But of course PVM is FREE !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
From: ramani@cse.iitb.ernet.in (K V Ramani)
Newsgroups: comp.parallel
Subject: Information wanted on how to estimate communication and
         execution times of a task graph.
Date: 11 Nov 92 11:03:11 GMT
Article-I.D.: hubcap.1992Nov12.131022.2244
Organization: Department of Computer Science,IIT, Bombay
Apparently-To: comp-parallel@uunet.uu.net


	We are developing a parallelizing compiler which translates
Fortran-77 programs to a language called Par-Fortran. The target
language has been designed to run on a network of transputers.  The
front end of the compiler produces a task graph identifying fragments
of code which can potentially be run in parallel. The nodes of the
task graph represent statements which should be run sequentially, and
the edges represent communication between the nodes.
 
        The back end of the compiler  has to:
1. estimate the execution time of each node and the communication
along each edge, and use this information to

2. Partition and schedule the task graph on a given topology of
transputers, so that the overall execution time is minimized. 
 
        Note that, in our context, the program  which evaluates the
execution time has to take to account
 
  a. the time taken to execute the basic instructions of the transputer,
     and,
  b. the code generation strategy of the Par-fortran compiler. 
        
        There are essentially two problems. The first concerns
branches. We are currently assuming that information on the branch
probabilities are available. We would like to know how to estimate
branch probabilities. Can these figures be made independent of the
input? 
        The second problem is specific to transputers. The time
required to execute certain instructions (prod, div etc.) are dependent
on the values of their operands. These values may not be available at
compile time. A related problem, which may arise if we use a later
generation of transputers (T9000-which has multiple functional units
operating concurrently) is how to estimate execution costs in the
presence of pipelining and caching. 

        We would appreciate receiving any relevant information on
these matters. Any fundamentally different approach towards solving
these problem would also be useful.

	Since access to news is problematic here, we would appreciate if
responses are  sent to us by e-mail.
	
				Thanks in advance.

				as@cse.iitb.ernet.in
				ramani@cse.iitb.ernet.in
Newsgroups: comp.parallel
From: eugene@nas.nasa.gov (Eugene N. Miya)
Subject: Terminology: Multi-computers, what are they
Apparently-To: comp-parallel@ames.arc.nasa.gov
Keywords: multi-computers, references
Organization: NAS, NASA Ames Research Center, Moffett Field, CA
Date: Thu, 12 Nov 92 23:04:54 GMT

In article <1992Nov12.130959.1984@hubcap.clemson.edu>
tve%crackle.CS.Berkeley.EDU@ucbvax.Berkeley.EDU (Thorsten von Eicken) writes:
>Some people differentiate between "multiprocessors" and "multicomputers":

A couple of months ago, CACM had a little supercomputer article, and it
was located in the special issue about the human Genome project.  I have
a friend who is a particular critic of the project (he's a tenured Stanford
biologist [botany]), so I copied it for him.  I read before giving it to
him, and there was an amusing bit on terminology where the biologists try
to explain to the computer scientists what it is they do.  The biologists
said that oh there were just some small differences in terminology.  The
reality was very much like the AI understanding problem.  Human intelligence
filled in the gaps.

A similar thing is happening here.  Take definitions in but be prepared
to throw them out.

--eugene miya, NASA Ames Research Center, eugene@orville.nas.nasa.gov
  Associate Editor, Software and Publication Reviews
  Scientific Programming
  {uunet,mailrus,other gateways}!ames!eugene
Seeking Books to buy:	Bongard, Pattern Recognition
			3 down 1 to go.

Newsgroups: comp.parallel
From: lnieplo3@ua1ix.ua.edu (Jaroslaw Nieplocha)
Subject: array/mesh embedding in fat tree
Organization: The University of Alabama
Distribution: usa
Date: Wed, 11 Nov 1992 18:37:23 GMT

Does anyone know any reference to a paper(s) dealing of embedding (mapping)
of the linear array and 2D mesh networks in the fat tree? 

Newsgroups: comp.parallel
From: agupta@loon.cs.umn.edu (Anshul Gupta)
Subject: Re: scalability analysis
Apparently-To: comp-parallel@uunet.uu.net
Keywords: scalability analysis
Organization: University of Minnesota
Date: Mon, 9 Nov 1992 19:35:48 GMT

In article <1992Nov6.195037.19983@hubcap.clemson.edu>, chunghsu@pepper.rutgers.edu (Chung-Hsing Hsu) writes:
|> 
|> Can anyone suggest me a good introduction(or survey) for
|> scalability analysis of parallel algorithms and architectures?
|> I'm especially interested in the metrics which can take both
|> into account.
|> 
|> Thanks
|> 
|> Chung H. Hsu
|> chunghsu@paul.rutgers.edu
|> 

The following might be useful :


@techreport{KUMAR91scale,
       AUTHOR = "Vipin Kumar and Anshul Gupta",
       TITLE ="Analyzing Scalability of Parallel Algorithms and Architectures",
       YEAR = "June 1991",
       NUMBER = "TR-91-18",
       INSTITUTION = "Computer Science Department, University of Minnesota",
       NOTE = "A short version of the paper appears in the
Proceedings of the 1991 International Conference on Supercomputing, Germany,
and as an invited paper in the Proc. of 29th Annual Allerton
Conference on Communuication, Control and Computing, Urbana,IL, October 1991"
}


- Anshul Gupta
  (agupta@cs.umn.edu)

Newsgroups: comp.parallel
From: trevor@iastate.edu (Trevor E Meyer)
Subject: More Scheduling Papers
Apparently-To: comp-parallel@beaver.cs.washington.edu
Reply-To: trevor@iastate.edu (Trevor E Meyer)
Organization: Iowa State University
Date: Thu, 5 Nov 1992 04:49:54 GMT

Here are some more papers on Scheduling that people have sent me.
Thanks again to those who replied. As before, I haven't found any of
these yet, so all I can tell you is what is here.

Trevor Meyer

PS. Some people have informed me that some of the names in the perevious
Sceduling summary posting are incorrect, so be warned if you go searching
for those papers.

--------------------------------

Papers:

S.F Hummel, E.S. Schonberg, L.E. Flynn, Factoring: A Method for Scheduling
Parallel Loops, Comm. ACM, Aug. 1992, vol. 35, no. 8.

Z. Liu,
``A Note on Graham's Bound.''
{\it Information Processing Letters}, Vol. 36, pp. 1-5, 1990.

E. G. Coffman, Z. Liu,
``On the Optimal Stochastic Scheduling of Out-Forests.''
{\it Operations Research}, Vol. 40, Supp. No. 1, pp. S67--S75, Janvier 1992.

F. Baccelli,  Z. Liu,  D. Towsley,
``Extremal Scheduling of Parallel Processing Systems with
and without Real-Time Constraints.''
Rapport de Recherche INRIA 1113, 1989.
To appear in {\em Journal of the ACM}.

C. Coroyer, Z. Liu,
``Effectiveness of Heuristics and Simulated Annealing for the Scheduling
of Concurrent Tasks | An Empirical Comparison,''
Rapport de Recherche INRIA, No. 1379, Jan. 1991.

Z. Liu, E. Sanlaville,
``Stochastic Scheduling with Variable Profile and Precedence Constraints''.
Rapport  de Recherche INRIA, No. 1525, 1991.

Z. Liu, E. Sanlaville,
``Preemptive Scheduling with Variable Profile, Precedence Constraints
and Due Dates''.
Rapport de Recherche INRIA, No. 1622, 1991.

Z. Liu, D. Towsley,
``Scheduling a Sequence of Parallel Programs Containing Loops
within a Centralized Parallel Processing System''.
COINS Technical Report, TR 92-34, 1992.


----------------------------

Trevor Meyer
(trevor@iastate.edu)

Newsgroups: comp.parallel
From: olivier@everest.ee.umn.edu (Olivier Meirhaeghe)
Subject: Re: New Group? (was Important---Everyone Please Read)
Apparently-To: comp-parallel@uunet.uu.net
Organization: University of Minnesota, Minneapolis, EE dept.
Date: Fri, 6 Nov 1992 17:57:21 GMT

[I am setting up a system similar to netlib---in fact, using the netlib
 software---for various programs we received. So far, Intel has donated
 their student examples. This will be the first group that I put together.
 I have asked the other manufacturers for similar software.

 ---steve
]

In <1992Oct26.182516.28204@hubcap.clemson.edu> levilla@mip3018.Berkeley.EDU (Olivier Levillain) writes:
>In article <1992Oct20.124625.23497@hubcap.clemson.edu>, harri@parsytec.de (Harald Dunkel) writes:

>|> What about a new newsgroup: 'comp.parallel.sources' ? 

>YES, YES , YES

	YEp. That would be a great Idea !!!!!!!!!!!!!!!!!!x

Newsgroups: comp.parallel
From: jensen@slow.cs.usu.edu (Gerald Jensen)
Subject: Looking for references on program partitioning
Organization: Clemson University
Date: 9 Nov 92 15:07:25 MDT


I am doing a thesis on partitioning sequential programs onto multi-processing
systems (i.e. automatic parallelization of sequential programs).  My work 
will be targeted for loosely-coupled machines but may also be applicable to
shared-memory systems.  As the primary tool, I plan to use the Program
Dependence Graph (PDG).

I am therefore looking for ANY references to previous work done in this or
related topics.  Of particular interest would be intermediate representations
like the PDG which could be used as tools in program partitioning.

Also, if anyone has implemented programs to generate PDGs or other dependence
representations and are willing to share them, I would be very appreciative.


Thanks,

Gerry Jensen
jensen@slow.cs.usu.edu


Keywords: dependence graphs, parallelization


Newsgroups: comp.parallel
From: cnews@umr.edu (UMR Usenet News Post)
Subject: any parallel algorithms for ring topologies?
Apparently-To: uunet!comp-parallel@uunet.uu.net
Originator: junlin@mcs213a.cs.umr.edu
Organization: University of Missouri - Rolla
Date: Thu, 5 Nov 1992 18:10:11 GMT

Please reply via e-mail, and thanks in advance.


--
Junlin Liu -- junlin@cs.umr.edu
Computer Science Department
University of Missouri - Rolla
Rolla, MO 65401



-- 
+-------------------------------------------------------------------+
|    Junlin Liu     | Computer Science Dept.   | (O) (314) 341-6434 |
|    -----------    | Univ. of Missouri, Rolla |     ----------     |
| junlin@cs.umr.edu | Rolla, MO 65401          | (H) (314) 341-3166 |


Newsgroups: comp.parallel
From: yuri@amath.washington.edu (Yuri Yulaev)
Subject: 2D CFFT or related info needed
Apparently-To: comp-parallel@ames.arc.nasa.gov
Keywords: 2D CFFT in parallel.
Organization: University of Washington, Applied Mathematics, Seattle
Date: Thu, 5 Nov 1992 20:10:50 GMT

[Please! If you have such a program and you will part with it, send a
 copy to the the moderator for inclusion in the repository. Steve]


	Does somebody knows any info about 2D CFFT or any related info?
	Yuri.


Newsgroups: comp.parallel
From: dcp79807@csie.nctu.edu.tw ()
Subject: Trace generator wanted (Uniprocessor or MP)!!
Organization: Computer Science & Information Engin., Chiao-Tung U, Taiwan, ROC
X-Newsreader: TIN [version 1.1 PL6]
Date: Tue, 10 Nov 1992 09:11:36 GMT

Dear Netter:

	Is there any package can generate trace (execution or reference)
in any means? Can I find some in public domain?  Thanks for your help.
I will post a summary when I get enough response!

Miller
--
------------------------------------------------------------------------------
Chih(4)-Zong(2) Lin(2)				| e-mail address:            
Dept. Computer Science & Information Engineering|   dcp79807@csie.nctu.edu.tw 
National Chiao-Tung University			| 
Hsinchu, Taiwan, Republic of China		|
------------------------------------------------------------------------------

Newsgroups: comp.parallel
From: sln9q@cc.usu.edu
Subject: any references to partioning papers
News-Moderator: Approval required for posting to comp.parallel
Organization: Utah State University
Date: 10 Nov 92 00:54:42 MDT

I am doing a thesis on partitioning sequential programs onto multi-processing
systems (i.e. automatic parallelization of sequential programs).  My work 
will be targeted for loosely-coupled machines but may also be applicable to
shared-memory systems.  As the primary tool, I plan to use the Program
Dependence Graph (PDG).

I am therefore looking for ANY references to previous work done in this or
related areas (including similar work done using intermediate representations
other than the PDG).

Also, if anyone has implemented programs to generate PDGs, System Dependence
Graphs, or other dependence representations and are willing to share them,
I would be appreciative.

Thanks,

Gerry Jensen
sln9q@cc.usu.edu

Newsgroups: comp.parallel