From: vvij@cory.Berkeley.EDU (VIJ VIKRAM)
Subject: SOFTWARE ENGINEERING POSITION / MS 
Organization: University of California, at Berkeley
Date: Fri, 14 Aug 1992 03:41:21 GMT


					467 Internantional House
					2299 Piedmont, Berkeley
					CA 94720
					email: vvij@cory.berkeley.edu
					Ph: (510)540-1260 (Summer)
					August 5, 1992


I am going to complete my MS in Computer Science, and I am eager to
explore opportunities in my area of interest. 

I have two years of experience in software engineering and parallel
and distributed systems, a strong background in computer architecture,
compilers, programming languages, and operating systems. I have also
worked in the area of VLSI CAD. In addition, I have five years experience
with C and Unix, and a Bachelor's degree in Electrical Engineering. 

I have worked with CADENCE, as a part of their VHDL Synthesis team.
The goal was the extraction from the VHDL input of the information
necessary for the synthesis algorithms. This information includes
the transaction-based signalling protocols used on global resourses, 
the data-flow and control-flow relationships among computational 
elements, the high-level don't care information for use in encoding     
and logic synthesis, and constraints for use in scheduling, allocation, 
and the lower levels of performance-driven layout systems.

I have completed a graduate level course on compilers, in which I
implemented an optimized compiler for a block structured high level language
with Algol-like syntax and Scheme-like semantics, including first-class
functions. The compiler was targeted towards the department's SPARC-
stations. I am auditing a class on advanced optimizations in imperative
programming languages. I am familiar with Yacc and Lex.
Last Fall, I took a course in which I designed the SNOOP Object 
Oriented Language. I wrote a handcoded scanner, parser, a semantic error 
checker, a run time debugger, and facilities for overloading,
encapsulation, multimethods, method combination, inheritance, 
metaclass protocols and a run time polymorphic method determination 
for class objects, garbage collection and dynamic memory allocation.

My other area of interest is computer architecture. I have taken classes in
this area, and also worked on several projects in the area of parallel 
architectures. I have studied heirarchical memory systems and their 
performance, different techniques used to enhance cache performance,
pipelining, superpipelining, superscalar, VLIW, vector
processors, software pipelining and dataflow architectures.

I have a strong background in the area of operating systems,
having taken many courses in that area, and analysed over a hundred papers.
My interest is in operating system support for high performance
multiprocessing. I am exploring effective kernel support for the user
level management of parallel threads. I have also conducted several 
performance evaluation studies for the Sprite operating system, which is
network operating system with advanced features like transparent process 
migration, log structured file systems, and a transparent file caching system.

I feel that I have a strong and diverse background, and could contribute
significantly to an organization working in one of my areas of interest.

I look forward to your response.

					Sincerely,
    					Vikram Vij

*********************************************************************
I AM LOOKING FOR A CHALLENGING SOFTWARE DEVELOPMENT POSITION 
WILLING TO RELOCATE ANYWHERE IN THE UNITED STATES
********************************************************************


	VIKRAM VIJ
	vvij@cory.berkeley.edu
	E 13, Rochdate Village
	2424 Haste, Berkeley
	CA 94704
	(510)540-1260
	

		      
*********************************************************************
		      EDUCATION


   * M.S. 	COMPUTER SCIENCE (In Progress, GPA 3.8/4.0)
   		UNIVERSITY OF CALIFORNIA , BERKELEY 

   * B.Tech	ELECTRICAL ENGINEERING (CPI 9.9/10.0) - May 91
		INDIAN INSTITUTE OF TECHNOLOGY, KANPUR. 

		      HONOURS

   * Among top 0.05 % of students in the Joint Entrance Exam
     of the Indian Institute of Technology.
    
   * Regents Fellowship, Eugene C. Gee, Mona Fay Gee Fellowships
     Non Resident Tuition Scholarship, Research Assistantship
     ( All at University of California, Berkeley)

   * Shridhar Memorial Prize, Merit Awards for Academic Excellence
     Best B.Tech Project Award, Merit Scholarship
     ( All at Indian Institute of Technology, Kanpur)

**********************************************************************


		   
		   EXPERTISE SUMMARY


   * Programming Languages and Software Development Environments

     Five years of C Programming in a UNIX Environment
     Interactive, source level debuggers for UNIX
     C++/Pascal/Modula-2/Objective C Compiler Development
     Code Optimization for MIPS R2000/R3000
     Lexical Analysis, Parsing, Semantic Analysis 
     Interpreters and Assemblers 
     Error Handling, Garbage Collection
     Storage Management and Run Time organization
     Flow Analysis and Global Optimization 
     Parallel Compiler Design
     WYSIWYG, expert, naive, form based Graphical User Interfaces
     X Windows (XToolkit and Xlib) and OSF/Motif Widget Programming
     LISP, Scheme, Prolog, Pascal, Fortran, Ada, VHDL, Verilog, C++
     Saber-C, Emacs, SunView, YACC, LEX, ksh, dbx, gdb
     Software Integration
     Structured Versus Object Oriented Design / Analysis 
     Metrics, Software Engineering, CASE 
     Software Risk Management 
     IDE StP and OOSD/Ada, Cadre Teamwork Tool Sets, Knowledgeware,
     Software Testing, Parallel Languages

   * Operating Systems and Systems Software

     Distributed applications using a client/server model
     Multiprocess applications using lightweight threads
     Configuration management systems for parallel programming
     System Programming for the following:
     UNIX, Xenix, MS-DOS, VAX-VMS, 4.3BSD(Berkeley)
     Internet, TCP/IP, Local Talk , System V, HP-UX
     awk, sed, make, sccs, rcs, telnet, ftp, sort, perl, vmstat 
     C/Korn/Bourne Shell Scripts, lex, yacc, gcc/gdb, dbx
     TCP/IP, UDP, UUCP, Novell IPX/SPX, OSI Network Protocols
     Mail Servers, Communication Servers Arch. and Programming
     Pipes, Streams, Buffers, RPC, Two Phase Commit, Deadlock
     Device Drivers for Real Time O/S and Distributed O/S
     Multitasking Support for Operating Systems
     Inteprocess Communication and Synchronization
     Memory Alocation, segmentation, paging, loading and linking
     Network File Systems, Storage Devices 
     Berkeley Sockets, Multimedia
     Process Migration, Load balancing etc. on SUN 3/50s and SPARCs.
     Routing, Dynamic Networks, Security, Capability schemes.
     MACH OS Virtual Machine and Message Based Model.
     CM-2 massively parallel supercomputer


   * Computer Hardware 

     CPU Design, Microprogramming, Addressing, Pipelining
     Assembly Languages MIPS R2000/R3000, VAX
     Intel 8085, 80X86, i860, Motorola MC680XX.
     Cache Design, TLB, Vector Processing, 
     Pipelining, Superscalar Machines
     Computer Aided Design of Integrated Circuits
     Parallel Processing Networks (Delta, Hypercube)   
     Digital Circuit Design( Logic Optimization, FSMs)
     PCB Design, Analog Circuit Analysis, SPICE
     Amadeus(Cadence), Magic, Espresso, MisII
     Lowpass and Bandpass switched capacitor filters
     Fault simulators and logic simulators
     Multiprocessor Cache Coherency
     Hamming Codes, Galois Field Theory etc.

   * Database Systems and AI

     RDBMS SQL, ESQLC, dBaseIV, INGRES, Sybase, Oracle
     Query Optimizers	
     Heirarchical, Network, Relational, Object-Oriented Data Models
     Protection, integrity control and alternate views of data
     Access methods and file systems
     Crash Recovery and Concurrency Control Systems
     Distributed Databases
     Writing Expert System Shells
     Influence Diagram Based Expert Systems
     Rule Based Systems (OPS 5, CLIPS)
     Truth Maintenance Systems (TMS, ATMS)
     Knowledge Based Systems for Software Engineering
     Heuristic Search, Problem Solving, Game Playing
     Knowledge Representation, Logic programming, Learning
     Data Structures, B+ Trees, Lists, Sets, Strings 
     Dynamic Programming, Graphs and Tree Algorithms 
     CSGs, R+ trees, Quadtrees, POSTGRES 

   * Signal Processing and Communications
     
     AM, FM, PM, FSK, QAM, Noise Analysis  
     Local Area Networks, Network Architectures 
     Satellite and Packet Radio networks
     Circuit, Packet and Hybrid Switching 
     M/M/1 and M/G/1 Queing Theory, Performance Analysis
     Digital Signal Processing Algorithms
     Biomedical Speech Processing
     Image Processing and Computer Vision
     FFT/DFT, Flow Graphs, Digital Filters, Hilbert transforms
     NMR Imaging, etc. etc.


*******************************************************************************


   	       PROFESSIONAL EMPLOYMENT / EXPERIENCE


   * CADENCE DESIGN SYSTEMS 	            May - Aug 91 
    
     Experience in VLSI CAD Simulation, Placement
     and Routing, Verification, Testing, Analysis, 
     Schematic Capture, Cell Generation, Logic Synthesis
     I was part of the VHDL Synthesis group. 
     Developed a verilog netlist model of the central 
     processing unit of a RISC machine on Sun Sparcs II.
     The implementation contained behavioural description
     along with timing checks, error handling etc.
     Used Magic( VLSI layout tool), Spice, Esim, VALID 
     simulators for VLSI design, Verilog (HDL Software)

   * COMPUTER MAINTENANCE COMPANY	    May - Aug 90

     Learnt Practical Aspects about high speed adaptive
     equalization modems, muliplexers, LAN hardware and 
     peripherals, Interfaces, Circuits for Analog Sampling
     and Filtering, Token Ring Protocol Networks
     point-to-point, multipoint, leased or dialup 
     communication links, VAX 6600 Architecture, Disk Drives
     Wrote an inventory control system for spare parts
     Error Detection, Fault Tolerant Hardware.

    
   * Compiler for SNOOP: an Object Oriented Language

     Designed the SNOOP Object Oriented Language.
     I used lex and yacc to scan and parse and construct 
     a DAG. I wrote a semantic error checker, a run time 
     debugger, and facilities for overloading, encapsulation,
     multimethods, method combination, inheritance, 
     metaclass protocols and a run time polymorphic method
     determination for class objects, garbage collection, 
     dynamic memory allocation. The compiler was over 
     10,000 lines of C code.


   * File transfer protocol and gateway to gateway protocol

     Implemented a File Transfer Protocol based on the 
     TCP/ IP Protocol Suite and also the Gateway to 
     Gateway Protocol between the Ethernet and the 
     ISO LAN. The software was in C for a SUN SPARC I.
     Developed performance evaluation models of LANs and
     LAN based systems: Simulation models for Ethernet, 
     token-ring, FDDI, NFS, and a SCSI-2-based disk
     subsystem using SES/workbench. Administerd a network of
     Sun Sparc and Sun 3/50 workstations.

     
   * Modifications to TCP/IP for Real-Time Communication

     Designed and Implemented a new transport protocol
     to  be implemented at the same level as TCP/IP
     but with specified performance guarantees, continuous
     multimedia applications, low delay guarantee, high
     reliability.

   * Cache Simulator for MIPS R2000/ R3000 (RISC)

     I used the stack model for simulation to study data 
     prefetching, branch prediction buffers, register 
     window management schemes, superscalar machine design.
     Also studied various tradeoffs between block size,
     replacement policies, virtual and physical caches, 
     Translation Lookaside Buffers. 

   * Design, Implementation and Use of a single board 80386
     based MIMD Multiprocessor System embedded in PC-XT bus.

     This was a major design project at IIT Kanpur. 
     I was a part of the four member team which built
     the parallel processing unit using a new state 
     machine design for the interconnect.
     The board had 4 Intel-80386 CPU's each with 512Kbytes
     SRAM cache and 16 Mbytes of shared DRAM memory.
     I designed a serial communications adaptor and 
     used a FSM based logic design and a microcontroller
     for the interface. I also wrote the software for the 
     (mini) OS in assembly language. 
     The parallel procesing unit was used 
     to speed up Kalman, IIR/FIR filtering, FFT Calculation,
     logic programming, neural networks, and dictionary 
     operations. I wrote the basic operating system which
     was over 5000 lines of assembly language code.

   * Expert Production System for a Decision Support System.
   
     I wrote the shell for the rule based expert system. 
     The expert system had the capability to self learn
     and also to explain its reasoning. It used both backward
     and forward chaining. Developed in Unix/C, it had a 
     friendly X11 interface. 
	
   * Metrics based CASE Tool for Software Risk Management 

     This project was sponsored by AIRMICS, and DoD.
     I was a member of the two person team.
     The project uses Metrics, Expert Systems, GUIs, 
     Incremental Development, Concurrent Engineering, 
     Re-engineering, Computer Aided Software Engineering.
     Used influence diagrams and truth maintenance systems 
     to build a decision analytic system for risk assessment
     and control. The Influence Diagram based Expert System
     interacts with an Object Oriented Metrics Database.  
     The TMS maintains consistency in the context of 
     nonmonotonic reasoning. A rule based system envelops
     the influence diagram based expert system to enable 
     learning, explanation, flexibility and modularity.
     I have implemented over 15000 lines of C code. The
     rule based system is based on CLIPS, a forward chaining
     expert systems shell developed at NASA.

   * Client NVRAM in the Sprite Distributed Operating System

     I designed and simulated a modified client model using 
     non volatile memory to absorb write traffic to servers.
     The project also involved Unix Interprocess Communication
     mechansisms including sockets, multimedia, extensive
     shell programming, embedded makefile generation and 
     distributed compilation, fault tolerant computing, and
     revision control.

   * Software Integration: An Artificial Intelligence Approach
     
     I developed a general model of integration that leads to 
     a quantitative algorithm for choosing the best partitioning
     and test scheduling strategy. I also used Truth Maintenance
     Systems for maintaining consistency between the 
     Requirements, Specifications, Design, Coding, Testing, and
     Maintenance Phases of software development. 
     The prototype was about  2000 lines of lisp code. 

   * Multitasking O/S on PC-AT
     
     Developed a multitasking OS on an IBM AT, 80386 processor
     in Turbo C, providing a Unix like command handling shell 
     and device driving control routines for terminal I/O and
     printer. Different O/S Concepts, such as Round Robin Scheduler
     Spooler, Loader, Paged Segmentation memory manager etc. 
     were implemented. 

   * Compare and Swap for Multiprocessor Synchronization

     Implementing the Compare and Swap creates a number of new
     problems. I enhanced the Omega network with a new protocol
     to reduce hot spots and tree interference which arise 
     during the implementation of the compare and swap in 
     packet switching systems. 


   * Mapping and Scheduling Parallel Computations onto MIMD Archs.

     I want to map an abstract parallel computation graph onto 
     any given physical machine. The approach I want to develop 
     is a general one which can be applied to shared memory 
     machines, distributed architectures, hybrid machines and 
     message based interconnection networks. The computational 
     model is represented as a directed graph where nodes represent 
     schedulable units and edges represent dependencies among nodes. 
     The edge weights could represent the degree of interaction 
     and/or overhead. This is the task precedence graph (TPG).
     I then want to cluster the TPG in order to minimize the
     computational and communication overhead and to satisfy the 
     goals of throughput enhancement and workload balance, well.
     The next step is to map this graph to the physical 
     architecture graph. While scheduling, my key issue will 
     be to reduce the mapping the mapping complexity while 
     sacrificing the optimality as little as possible. 
     The characteristics of the physical architecture 
     graph are assumed to change with time, so the scheduling
     is dymanic, and the scheduling algorithms are simplified 

   * Software Integration Support in GENESIS

     Genesis is a software engineering based programming
     environment geared to support big projects.
     It has four main components - Requirements system,
     Management system, Abstraction system, and Metrics system.
     The Berkeley Requirements Statement Language (BRSL) is
     used in conjunction with tools like the Dynamic Simulator
     Generator (DSG) to generate a simulator for the target
     program in "C", and the Requirement Analysis and Extraction
     System (RADX) to specify and analyse very large software systems.
     I developed a general model of integration that leads to
     a quantitative algorithm for choosing the best partitioning
     and test scheduling strategy. I also used Truth Maintenance
     Systems for maintaining consistency between the
     Requirements, Specifications, Design, Coding, Testing, and
     Maintenance Phases of software development. I am incorporating
     these within the framework of GENESIS.


*********************************************************************

		    PUBLICATIONS

  * " A model for Distributed Software Integration"
    IEEE Workshop on Future Trends in Distributed Computing
    Apr 92, Taiwan

  * " Metrics Guided Risk Management using Knowledge Based Systems"
    International Meeting of the Operations Research Society 
    of America, Nov 92, San Francisco.

  * "An Artificial Intelligence based Methodology and Tool 
     for Software Integration"
     IEEE International Conference on Systems Integration, 
     June 92, Newark, New Jersey.

  * "Parallel Processing with a PC-XT and SBCs"
     IIT Kanpur, India.

  * "Software Integration: An AI approach"
     International Computer Symposium, Dec 92,
     Taiwan.

  * "The Use of Client NVRAM in the Sprite File System"
     U.C. Berkeley Report no. CS262/12/92.

  * "Use of Compare and Swap in Multiprocessor Synchronization"
     U.C. Berkeley Report no. CS252/12/92

  **************************************************************************

    
		   COURSES (TECHNICAL)

  * Programming Languages and Compilers
  * Advanced Topics in Operating Systems
  * Software Engineering and Artificial Intelligence
  * Operating Systems and System Programming 
  * Database Systems
  * User Interfaces
  * Computer Networks and Digital Communication
  * Distributed Systems and Computer Networks
  * Data Structures and Algorithms
  * Parallel Processors
  * Knowledge Based Man Machine Systems
  * Artificial Intelligence and Man Machine Systems
  * Object Oriented Design and Programming
  * Image Processing  
  * Digital Signal Processing
  * Neural Networks
  * Control Systems Theory
  * Digital Control
  * Electromagnetic Systems Theory
  * Power Systems Analysis
  * Signals and Systems
  * Communication Systems Engineering
  * Biomedical Engineering. 
  * Architecture of Microprocessors and Microcomputers
  * Digital Circuit Design
  * Gradutate Computer Architecture
  * VLSI Systems Design
  * Microcomputer Interfacing Laboratory
  * Electronic Circuits
  * Electronic Devices
  * Linear and Nonlinear Circuits
  * Electronmagnetic Energy Conversion Machines
  * Probability and Statistics 
  * Linear Algebra 


		 COURSES (NON - TECHNICAL)

  * Social and Community Psychology
  * Introduction to Psychology
  * Social and Management Cybernetics 
  * Art, Architecture and Environment
  * Business Administration
  * Management and Culture of Productivity
  * Management Information Systems and Japan

	
	    HOBBIES/OUTSIDE INTERESTS  

  * cooking, music, travelling, nature, religion

	    VISA STATUS

  * F-1 
Newsgroups: misc.jobs.resumes