HDTenEightyP/NetNews huggingface dataset:
From: jacobsd@xanth.CS.ORST.EDU (Dana Jacobsen)
Subject: update on load balancing bibliography
Organization: /homes/na/ghosh/.organization
Date: 7 Oct 1992 17:44:28 -0400


In comp.parallel you write:
>Here is a collection of references on dynamic load balancing culled
>from the many responses i got from kind netland folks. hope it helps.

  I converted your list of references to a semi-consistent BibTeX format.
Also, I have a list of references from Willard Korfhage posted in June 91
that contains 100 references that you may be interested in.
  Look in cerberus.cor.epa.gov (134.67.4.48) : /pub/bibliographies/misc/
via anonymous ftp.  The file load-balance1.bib is Korfhage's file, and
load-balance2.bib has the references you posted.  There is some duplication
between the two files -- about 20 records in common.
--
Dana Jacobsen                       Oregon State University
jacobsd@cs.orst.edu                   Computer Science
.!hplabs!hp-pcd!orstcs!jacobsd
Dana_Jacobsen@RPITSMTS.BITNET           Power, Corruption, & Lies -- Bush '92

-- 
===============================================================================
Bhaskar Ghosh   	    		"Tomar pujar chholey, 
ghosh@cs.yale.edu  @yalecs.bitnet        Tomay bhulei thaki"- Robithakur
===============================================================================

Newsgroups: comp.parallel
From: sgupta@woodling.ecn.purdue.edu (Sameer Gupta)
Subject: Address Traces for Parallel Proecessors
Apparently-To: comp-parallel@uunet.uu.net
Organization: Purdue University Engineering Computer Network
Date: 16 Oct 92 04:42:35 GMT

Hello,

	I am looking for a source of address traces for multi-processor
(not multi-computer) machines.  If you know where I might be able to get
some real traces or a good model for generating synthetic traces, I would
really appreciate it if you could send me the info. or point me to the right
source.

Thanks,

Sameer Gupta
sgupta@ecn.purdue.edu

Newsgroups: comp.parallel
From: davis@csrg2.ee.iastate.edu (Jim Davis)
Subject: Anyone have N-body code in PVM?
Apparently-To: comp-parallel@beaver.cs.washington.edu
Organization: Iowa State University, Ames IA
Date: Wed, 7 Oct 1992 19:52:38 GMT


Has anyone programmed an n-body computation in PVM that they wouldn't
mind sharing?  We are doing some experiments on large networks of
workstations using various programming packages and have exceeded
our current capacity to code new programs.

Thanks!

Jim Davis
davis@iastate.edu


Newsgroups: comp.parallel,comp.arch
From: aranake@cse.uta.edu (Sandeep Suresh Aranake)
Subject:  Looking for Info on Graph Partitioning
Apparently-To: comp-parallel@uunet.uu.net
Organization: Computer Science Engineering at the University of Texas at Arlington
Distribution: usa
Date: Wed, 14 Oct 1992 22:12:09 GMT




I will greatly appreciate if any of you could send me 
references on graph partitioning techniques (both serial 
and parallel).

Please mail your reply on my e-mail address.
I will post the summary of references.

Thanks in anticipation.

Sandeep

aranake@cse.uta.edu

Newsgroups: comp.parallel
From: ganesan@sybil.cs.buffalo.edu (Ravikanth Ganesan)
Subject: References requested for PDES applications/issues
Apparently-To: comp-parallel@cis.ohio-state.edu
Originator: ganesan@sybil.cs.Buffalo.EDU
Organization: State University of New York at Buffalo/Comp Sci
Date: Fri, 16 Oct 1992 15:54:00 GMT

I am a graduate student working in the area of Parallel Systems. My interests
in this area are scheduling, partitioning and load balancing aspects of 
dynamic problem structures in irregular problem domains.

I am currently surveying PDES (Parallel Discrete Event Simulation) applications
and issues related to parallelising DES. My intent is to understand the needs
(from a parallel computing perspective) of PDES. Could you help me with 
suggestions on references and/or prior work in this area? I am developing a
parallel runtime support environment on which I would like to test a few
applications that exhibit dynamic and irregular characteristics. Hence I would
appreciate any source code availability (even if sequential) by anonymous ftp
or otherwise. Please send e-mail directly to me as I read the newsgroups
rarely. I will make a summary of the responses on the newsgroup.

Thanks
ravi


-- 
+  RAVIKANTH GANESAN (call me ravi)                                           +
+  [OFF] 226 Bell Hall, CS Dept.     [E-Mail] ganesan@cs.buffalo.edu          +
+        SUNY@Buffalo, NY 14260               v999rwuz@ubvms.cc.buffalo.edu   +
+        (716)645-3774 OR (716)645-3171                                       +

Newsgroups: comp.parallel
From: tandri@csri.toronto.edu (Sudarsan Tandri)
Subject: Sparse Matrix Parallel Computations
Organization: University of Toronto, CANADA
Date: 	Wed, 14 Oct 1992 12:56:17 -0400


I am trying to look at the problem of sparse matrix computations on parallel
machines.  I would like to know of avenues that have been explored in this
area.  Code running on any type of machine would be appreciated.  I will
pass the results that we get on our non-uniform memory access shared memory
machine Hector. If there is enough interest in this area.  I'll post the
responses.

						--Sudarsan
-- 
======================================================================
Sudarsan Tandri			tandri@{eecg|csri|white}.toronto.edu
Department of Computer Science		Home:	(416) 591-8719
University of Toronto, Toronto M5S 1A4	  Off:	(416) 978-7321
======================================================================

Newsgroups: comp.parallel
From: ob00@ns1.cc.lehigh.edu (OLCAY BOZ)
Subject: Re: Summary: parallel genetic algorithm (references)
Organization: Lehigh University
Date: Tue, 13 Oct 1992 22:49:48 GMT

In article <1992Oct13.151555.3009@hubcap.clemson.edu>, pab@cs.arizona.edu (Peter
 A. Bigot) writes:
>>
>>Here is some *in-progress* text from what I hope will be the first chapter of
>>my PhD thesis on Parallel Genetic Algorithms for Set Partitioning Problems.
>>Please don't post, publish, or quote!  (at least until I get my degree!)
>>
>>--dave
>>
>>David Levine  levine@mcs.anl.gov  (708)-252-6735   Fax: (708)-252-5986
>>MCS 221 C-216    Argonne National Laboratory   Argonne, Illinois 60439
>
>Followed by what I assume is the in-progress text that Levine clearly asked
>_not_ be posted, published, or quoted.
>
>Why was it posted?  Was there permission granted that wasn't noted anywhere
>in the message?
>
>I'm just curious---makes me a bit leery of mailing in-progress work to
>people who are interested in it, if it's going to be splattered out across
>the net regardless of any request I make to keep it quiet.
>

I am terribly sorry. I did not post it intentionally. It was done by mistake. But
I should not do it. I want to apoligize to Levine and all the netters.
By  the way  is there a way of erasing that post?

Again I am very very sorry. I will pay more attention to my postings from now
on.
-- 


         -----------------------------------------------------------------
         |  OLCAY BOZ                     |  OB00@NS1.CC.LEHIGH.EDU      |
         |  LEHIGH UNIVERSITY             |                              |
         |  COMPUTER SCIENCE DEPARTMENT   |                              |
         |  Ph. D. Student                |  phone : (215) 758-1886      |

Newsgroups: comp.parallel
From: krings@cse.unl.edu (Axel Krings)
Subject: References wanted 4 real-time workloads (more specific)
Organization: University of Nebraska--Lincoln	
Date: 15 Oct 1992 05:56:11 GMT


Sorry for re-posting. 
Since some people suggested that the original post was not clear enough
I'll try to be more specific.

I am looking for references to "real world" applications for real-time systems 
with hard deadlines. 

Basically I need the description of workloads, and any reference to
papers that describe control applications. The information I hope to
find are:
  1) description of the task system (precedence graph)
  2) information about max task durations (deadlines)
  3) how may processors the workload is intended for
  4) identification of critical tasks (vs tasks with soft or no deadlines)

Info on platform, language etc are not essential for our simulations since 
they use only the task graph of the workload.

Any responses will be appreciated

Thanks 
	Axel

---------------------------------------------------------------------------
Papers describing such workloads are:
---------------------------------------------------------------------------
A paper by P.Shaffer (IEEE Control Systems June 1990)
"A Multiprocessor Implementation of Real-Time Control for a Turbojet Engine",
gives the computation graph for the control program of a supersonic turbofan
with afterburner is given. This is a 64 vertex graph, and for each the 64 
procedures the max duration is indicated.


"Synthesis of a Real-Time Message Processing System with Data-Driven Timing
Constraints," Al Mok , Prasanna Amerasinghe, Moyer Chen, Supoj Suthanthavibul,
Kamtorn Tantisirivat, Proceedings of the real-time Systems Symposium, San Jose, California, Dec. 1987, 133-143.
--
------------------------------------------------------------------
Axel Krings                            | email: krings@cse.unl.edu
Dept. Comp.Science & Engineering       | phone: 402-472-2402
University of Nebraska - Lincoln       | fax  : 402-472-7767

Newsgroups: comp.parallel
From: becher@MasPar.COM (Jonathan D. Becher)
Subject: Re: (News Release) MasPar Announces Second Generation System
Apparently-To: uunet!comp-parallel
Keywords: MasPar,MP-2
Reply-To: becher@MasPar.COM (Jonathan D. Becher)
Organization: MasPar Computer Corp, Sunnyvale CA
Date: Thu, 8 Oct 1992 15:56:18 GMT

Andrew F Stratton <Andrew.Stratton@computing-maths.cardiff.ac.uk> writes:
>>     In addition, the MP-2 sets a new level of performance on 
>>another important metric, integer operations per second.  The MP-2 
>>delivers 68,000 MIPS (Million Instructions Per Second), a level 
>>unmatched by any other massively parallel system, regardless of 
>>price.
>
>Well - someone has to say it - firstly I will assume that this is an
>un-installed system (i.e.  this system is feasible and I'm sure will work
>- but no one has yet built one).

Actually, more than one MP-2216 (an MP-2 with 16K processors) has been
built and tested.  I, myself, have run dozens of programs on it to verify
the performance.  Since the MP-2 is binary compatible with the MP-1, I
didn't have to change my old programs at all.

>I now look forward to lots of flames!
>Andy Stratton.

No flames needed Andy. As our marketing would say, this really *is* a
different kind of massively parallel computer announcement.  We've built
and tested this machine in every configuration.  We've already shipped it
to a customer who verified the performance for us.  Complete hardware and
software are available now.

Jon Becher
Systems Engineer
MasPar Computer Corporation
becher@maspar.com

Newsgroups: comp.parallel
From: krn@waikato.ac.nz
Subject: CM-1 and CM-2 flag bit diferences
Followup-To: comp.parallel,comp.arch
News-Moderator: Approval required for posting to comp.parallel
X-Newsgroups: comp.arch
Organization: Clemson University
Date: 9 Oct 92 16:29:04 +1300
X-From: krn@waikato.ac.nz

X-Date: 9 Oct 92 16:27:19 +1300
X-Organization: University of Waikato, Hamilton, New Zealand

I've read in the literature that the CM-1 processor has 8 flag bits and 
the CM-2 processor has only 4 flag bits. Now I know what each bit is and
what it does in the CM-1 but can't find any information about the 4 CM-2
flag bits. Are they just 4 of the ones from the CM-1? Could someone
please tell me what each flag bit is and if any of them are different from
the CM-1 flag bits, give an explaination of what they do as well. Thanks.
					Kevin Niederberger.


Newsgroups: comp.parallel
From: andrewf@cs.uwa.edu.au (Andrew Forth)
Subject: Does SUN Light Weight Processes claim POSIX compliance??
Apparently-To: comp-parallel@munnari.OZ.AU
Keywords: Light Weight Process, Sun Microsystems, POSIX
Organization: Dept. Computer Science, University of Western Australia.
Date: Tue, 13 Oct 1992 15:24:38 GMT

I need to find out if the Sun Microsystems' Light Weight Process
library (LWP) claims to be a POSIX compliant Threads implementation.

I realize that the Pthreads proposal (P1003.4A) has, as yet, existed in
the form of multiple drafts only, and that any Pthreads implementation
can only claim compliance with a draft of P1003.4A.

Therefore, I was wondering whether anyone might know if SUN LWP claims
to conform to any of these drafts of P1003.4A.

If anyone can help me with this I would appreciate replies by Email.

Thanks
Andrew



-- 
Andrew Forth                                <andrewf@cs.uwa.edu.au>
Department of Computer Science, The University of Western Australia


Newsgroups: comp.parallel,sci.fractals
From: vwulpen@cs.kuleuven.ac.be (Henk Van Wulpen)
Subject: Parallel algorythms for Julia-sets.
Apparently-To: comp-parallel@belgium.eu.net
Organization: Dept. Computerwetenschappen
Date: Thu, 15 Oct 1992 13:36:37 GMT


   Hello. I am looking for parallel versions of the Inverse Iteration
Methods for computing Julia-sets. (PIIM ? =)). Is there anyone who can
help me find these ? (Send me them, or some references will do). I would
be very grateful !

Henk.

-----------------------------------------------------------------------------
Henk Van Wulpen                  | Words and eggs must be handled with care.
Engineering and Computer Science | Once broken they are impossible
 senior at the K.U.Leuven        | things to repair.
vwulpen@cs.kuleuven.ac.be        | (Anne Sexton, The Awful Rowing Toward God)
-----------------------------------------------------------------------------

Newsgroups: comp.parallel
From: ian@MasPar.COM (Ian L. Kaplan)
Subject: Re: (News Release) MasPar Announces Second Generation System
Apparently-To: uunet!comp-parallel
Keywords: MasPar,MP-2
Reply-To: ian@MasPar.COM (Ian L. Kaplan)
Organization: MasPar Computer Corporation, Sunnyvale, CA
Date: Fri, 9 Oct 1992 20:23:12 GMT

>In article (Thorsten von Eicken) writes:
>What happens for indirect addressing modes (or are they not in the MasPar
>instruction set)?

  One of the features of the MasPar architecture is that is does
support indirect addressing (e.g., each processor of the SIMD machine
can calculate a different local memory address and load or store from
that address).  This does indeed slow memory access, being about a
factor of two slower than a direct memory access.  It should be noted
that some other SIMD machines serialize access on each unique
address (e.g., all processors with the same fetch address can fetch at
the same time, but if every processor has a different address,
indirect access happens one processor at a time).

  By the way, it should be noted that I don't speak for MasPar, I just
happen to read this group.

                           Ian Kaplan
                           ian@maspar.com
			   MasPar Compiler Group

Newsgroups: comp.robotics,comp.ai
From: ginsberg@t.Stanford.EDU (Matthew L. Ginsberg)
Subject: Re: Looking for Sacerdoti SRI report
Organization: Computer Science Department, Stanford University
Distribution: na
Date: Sat, 10 Oct 1992 23:16:20 GMT

In article <1992Oct10.225846.20527@tamsun.tamu.edu> sean@cs.tamu.edu
(Sean Graves) asks if anyone has a copy of

>Sacerdoti, Earl D., "A Structure for Plans and Behavior" Tech Report
>SRI Project 3805, Stanford Research Institute, 1975.

This was published as a book by American Elsevier in 1977.  Same title.

						Matt Ginsberg
From: sinster@cse.ucsc.edu (Darren Senn)
Newsgroups: comp.robotics
Subject: Miniboard parts kits: two extras
Date: 14 Oct 1992 17:45:16 GMT
Organization: University of California, Santa Cruz (CE/CIS Boards)
Distribution: world
NNTP-Posting-Host: tioga.ucsc.edu

I've got two extra parts kits from the mass buy.  The price per kit is
$35 plus postage.  One part (the 3-gang RJ11 jack) needed for the kits is
backordered for a few weeks more, so I won't be able to ship it immediately.

If you want a kit, then send me email (sinster@scintilla.capitola.ca.us)
with your postal address, and whether you want one or two kits.  Your
message must include a valid internet domain address (no bangpaths,
bitnet, or compuserve addresses) so I can reliably get in contact with
you.  This is first come first served.  If I accept your order, you'll
have until Friday the 22nd of October to get full payment to me.  I'll
tell you the postage after I get your email address.  If you don't want
it sent "UPS Expedite" (that's the standard UPS service), then say what
you want.

I have these extra kits because I dropped some people from the mass
buy who either:
	a) had nonfunctional email addresses and were a long distance
	   phone call away, or
	b) missed deadlines and didn't warn me before hand.
So if you think you might get hit by either of these two, don't bother
trying to order.  Sorry to be so strict about this, but I learned the
hard way how necessary it is.
-- 
Darren Senn                                            Phone:    (408) 479-1521
sinster@scintilla.capitola.ca.us                       Snail: 1785 Halterman #1
Wasurenaide -- doko e itte mo soko ni anata wa iru yo.     Santa Cruz, Ca 95062
From: bills@news.uwyo.edu
Newsgroups: comp.robotics
Subject: plans for miniboard?
Date: 16 Oct 92 15:33:01 MST
Distribution: world
Organization: University of Wyoming - Laramie, WY

Hello,
	Can someone tell me where the plans to the Miniboard
controller are(ftp site please).  Thanks!
					Bill Saunders
					bills@outlaw.uwyo.edu
From: gdg@r2d2.eeap.cwru.edu (Gregory D. Glosser)
Newsgroups: comp.robotics
Subject: Re: Gyros, Accelerometers, & Inclinometers
Date: 15 Oct 1992 17:30:14 GMT
Organization: Case Western Reserve Univ. Cleveland, Ohio (USA)
NNTP-Posting-Host: lor.eeap.cwru.edu

In article <cer9kqu00iVgM2j9Rs@andrew.cmu.edu> ck3i+@andrew.cmu.edu (Christopher Kristof) writes:
>
>	Does anyone know of ANY sources for reasonably priced quartz gyros,
>accelerometers, and/or inclinometers?  So far I've only found one
>supplier of quartz gyros, and they wanted $1000+ dollars for one! (I'd
>need three of them to sense yaw, roll, and pitch.)
>	I plan to use the components in an electrically powered flying robot,
>so they need to be quite light.  I'd like to get information on any
>suppliers of the previously mentioned items, even if their products are
>not so light or reasonably priced.

Lucas NovaSensor sells 1"x1"x0.5" accelerometers for about $200 a piece.
I've used them and they are good, relatively noise free, but fairly
fragile.  Their address and phone # is:

	Lucas NovaSensor
	1055 Mission Court
	Fremont, CA 94539
	(510) 490-9100

Hope this helps.


Greg Glosser
Center for Automation and Intelligent Systems Research
Case Western Reserve University
Cleveland, Ohio
gdg@r2d2.eeap.cwru.edu
From: behar@r2dtwo.usc.edu (Alberto Behar)
Newsgroups: comp.robotics
Subject: Questions about laser and infrared range sensors
Date: 9 Oct 1992 16:08:07 -0700
Organization: University of Southern California, Los Angeles, CA
Distribution: world
NNTP-Posting-Host: r2dtwo.usc.edu


Hi all,

Has anyone worked on using either solid state laser diodes for ranging?
If so, what type of detector did you use?
How about ECL counters  for measuring time of flight of laser pulse?
Or how about using PSD for triangulation on a laser or infrared beam?

This might seem like a dumb question,
but, can a laser be built in the infrared
range, and if so what is the difference
between it and say an infrared diode?
Is the laser a more concetrated beam?

Any info is greatly appreciated.

I'm trying to design lightweight, low power rangers,
that will give ~ 2-3 meters range and ~4 cm accuracy.
The sensors are for a mars rover prototype project.

Thanks for your time,

-- 
++++++++++++++++---------------------------------+++++++++++++++++
Albert Behar     (818)354-0741  behar@robotics.jpl.nasa.gov
Mars Rover Project, Robotic Intelligence Group M/S 107-102
Jet Propulsion Laboratory, Pasadena, CA 91109
From: jmce+@andrew.cmu.edu (James Ryan Miller)
Newsgroups: comp.robotics
Subject: looking for: 8085 assembler
Date: 8 Oct 92 07:14:59 GMT
Article-I.D.: andrew.Eep51nu00VpKAVGUxd
Organization: Freshman, CIT general, Carnegie Mellon, Pittsburgh, PA


	I am looking for an Intel 8085 assembler that runs on the IBM pc and
outputs Intel hex or some other standard format to burn EPROMS with.  If
anyone knows where I can get such a thing, please let me know. 

						Ryan Miller
						jmce+@andrew.cmu.edu
Organization: Middle East Technical University - Computer Center
Date: Friday, 9 Oct 1992 03:03:25 TUR
From: A.Ilkay Yigit <YIGIT@TRMETU.BITNET>
Newsgroups: comp.robotics
Subject: Spray-Painting Robots?

Hi all,
  I am working on a project about spray-painting robots. Actually, we
are just beginning to collect some preliminary information about the
such robots for spray-painting. We don't have much literature on that
topic and will appreciate your help:
  What kind of robots are mostly used for spray-painting? PUMA or MOTOMAN
or some other kind?
  Which companies are producing such robots? What are the specifications
of the product?
  What kind of motors are used and how are they mounted to the latter links
(i.e.links closer to the wrist)?
  Especially, what are the dimensions of the work-volume (i.e. min. horizontal
max. horizontal, etc...)?

  Thanks in advance.

*****************************************************************************
* A.Ilkay YIGIT;YIGIT@TRMETU.BITNET   *                                     *
* Middle East  Technical University   *               M.E.>>me              *
* Mechanical Engineering Department   *                                     *
* Ankara                     TURKEY   *                                     *
*****************************************************************************
Newsgroups: comp.robotics
From: behar@robotics.jpl.nasa.gov (Albert Behar)
Subject: Question on Light Stripe Generation
Organization: Jet Propulsion Laboratory
Date: Wed, 14 Oct 1992 23:23:42 GMT

How are light stripes usually generated?

I'm thinking about using a light stripe and
a low resolution imager to get range data.

Thanks,
--
++++++++++++++++---------------------------------+++++++++++++++++
Albert Behar     (818)354-0741  behar@robotics.jpl.nasa.gov
Mars Rover Project, Robotic Intelligence Group M/S 107-102
Jet Propulsion Laboratory, Pasadena, CA 91109
Newsgroups: comp.robotics
From: hjt+@cs.cmu.edu (Hans Thomas)
Subject: Re: Question about LIght Stripe Rangefinder
Organization: School of Computer Science, Carnegie Mellon
Date: Thu, 15 Oct 1992 19:39:27 GMT

Newsgroups: comp.robotics
From: hjt+@cs.cmu.edu (Hans Thomas)
Subject: Re: Question about Light Stripe Rangefinder
Organization: School of Computer Science, Carnegie Mellon
Date: Thu, 15 Oct 1992 21:40:36 GMT

I used a system at CMU which was made by Osaka Gas Information Systems.
It used a slide projector as the light source, and a rs232-controlled
liquid crystal to generate the stripes. These stripes were then
imaged with a BW camera and detected via thresholding. This whole
system is commerial - they even sell it with a special processor which
signifigantly speed up the processing of the images.

hans
From: br@cs.cmu.edu (Bill Ross)
Newsgroups: comp.robotics
Subject: Re: Flying Robots
Date: 16 Oct 92 00:34:29 GMT
Article-I.D.: cs.Bw6uxI.6wA.2
Reply-To: br@cs.cmu.edu
Organization: CMU Vision and Autonomous Systems Center


 faraghec@cognos.com (Chad Faragher) writes:
> What means are people using to create flying robots these days?
> I assume helicopters are too hard.  Perhaps lighter than air devices?
> If anyone is building any flying beasties, I would love to hear from you.

The Robotics Institute at CMU has an autonomous helicopter project
underway. We have had good results so far and we will soon be moving
up from small gas and electric models to a large machine that can
lift > 100 pounds. Possible applications (besides the obvious
military ones) include aerial surveying, crop dusting, construction,
surveillance and anything else you can think of...

Bill Ross
br@cs.cmu.edu