HDTenEightyP/NetNews huggingface dataset:
From: md@sco.COM (Michael Davidson)
Subject: Re: Parity on iAPX x86 chips
Organization: The Santa Cruz Operation, Inc.
Date: Tue, 12 Jan 1993 19:58:05 GMT


storm@cs.mcgill.ca (Marc WANDSCHNEIDER) writes:

>I've noticed that most of the x86 chips I have programmed have a Parity
>bit.  I was just wondering if they actually compute this every time an
>operation is done, or if they just get this from memory (ie, is the parity
>bit valid after EVERY operation, or just loads from memory...?)

The parity flag indicates the parity of the low 8 bits of the result
of the last arithmetic or logical operation - it has nothing to do with
memory parity and since move instructions do not affect the contents of the
flags register a load from or a store to memory will not change the flag.
However most arithmetic and logical instruction on the X86 will cause it
to be updated - the only exceptions seem to be AAA, AAS, MUL, IMUL and the
bit scan and bit test and set/clear/complement instructions after any of
which the parity flag is undefined.

Newsgroups: comp.sys.intel
From: das@emmapeel.ca.boeing.com (Deb Schwartz)
Subject: Re: 486SL dropped, vendors test Cyrix
Organization: Yet Another Graphics Project, Bellevue, WA
Date: Tue, 12 Jan 1993 17:35:05 GMT

Being extremely concerned about this issue, as I plan to buy a 386SL AST
Power Exec and later upgrade it to a 486SL, I just got off the phone with
AST Customer Information.  The lady said they'd had a lot of calls about
Intel discontinuing the 486SL, so AST called Intel and asked.  Intel said
that the article about the 486SL being discontinued was unauthorized, and
that Intel has absolutely no plans to discontinue the 486SL.  So, we can
all breath easy again. :-)
------
Debbie Schwartz // das@voodoo.ca.boeing.com  // ....uw-beaver!bcsaic!voodoo!das
From: doconnor@sedona.intel.com (Dennis O'Connor)
Newsgroups: comp.sys.intel
Subject: Re: Simple CPU Questions
Date: 5 Jan 93 16:03:12 GMT
Distribution: usa
Organization: Intel i960(tm) Architecture
NNTP-Posting-Host: potato.intel.com
In-reply-to: ee_hflo@uxmail.ust.hk's message of Tue, 5 Jan 1993 12:10:48 GMT


ee_hflo@uxmail.ust.hk (Michael Lo Ho Fung) writes:
]	 486-DX,486-SX,487-SX is the same die but they use difference bonding
] and package.

This hasn't been true for a while. The Intel486(tm) SX is a unique die.

--
Dennis O'Connor			doconnor@sedona.intel.com
Newsgroups: comp.sys.intel
From: hm@opus40.ix.de (Harald Milz)
Subject: Re: 486SL dropped, vendors test Cyrix
Organization: iX-Redaktion
Date: Thu, 7 Jan 1993 17:42:11 GMT


|> The Cyrix 486SLC has a 386SX pinout, which means it has a 16 bit data
|> bus.  The 486SX has a 32 bit data bus.  Considering the smaller cache
|> in the Cyrix, I would expect it to be much slower than the 486SX.  The
|> Cyrix 486DLC will be closer, but still slower than a 486SX, mostly
|> because of the smaller cache, but also because the 486SX bus can be
|> faster than the 386 bus of the 486DLC chip.

Actually, I think, the 486SLC is an optimized 386 with this small cache.
The only reason for naming it 486 is marketing.  
-- 
| iX           | Harald Milz        | email: hm@ix.de         |
| Multiuser    | Editor             | phone +49 511 547 47 66 |  
| Multitasking | Helstorfer Str. 7  | fax   +49 511 547 47 33 |
| Magazine     | D-3000 Hannover 61 | 
Newsgroups: comp.sys.intel
From: wbeebe@bilver.uucp (Bill Beebe)
Subject: Re: 486SX/25 vs. 386DX/33
Organization: W. J. Vermillion - Winter Park, FL
Date: Fri, 8 Jan 1993 14:46:41 GMT
Keywords: 486SX/25 vs. 386DX/33

In article <Jan.7.11.06.12.1993.11754@staccato.rutgers.edu> xchen@staccato.rutgers.edu (Xinghao Chen) writes:

>2. A 486SX/25 mother board with no cache. Also 8 RAM module slots.
>   The price is about $200. In the normal mode, it is about 22 MHz. In
>   the turbo mode, it is at 84 MHz. I was also told that I can late
>   update to 486DX/50 (the mother board has a socket for a 486DX/50 chip)
>   by pluging in a 486DX/50 and upgrading the crystal. 
>
>It seems to me that choice 2 is more cost-effective. The only thing
>bothers me is the fact that it has no cache on the mother board.

 That 486SX/25 motherboard uses memory interleaving to achieve reasonable
executation speeds. This is the same design that was used in the 386DX/25
motherboards. When you do decide to go to the higher clock chip, the chip
is going to have a tremendous performance degradation because there is no
secondary cache.

-- 
William H. Beebe, Jr. - wbeebe@bilver.UUCP
                 UUCP - {ucf-cs,peora,uunet}!tarpit!bilver!wbeebe
                      - bilver Public Access Unix, Orlando FL
                      - (407)644-8327  2400/9600  24 hours  8N1
Newsgroups: comp.sys.intel
From: richk@grebyn.com (Richard Krehbiel)
Subject: Re: Pentium to be Scrapped?!
Organization: Grebyn Timesharing
Date: Fri, 8 Jan 1993 04:44:00 GMT

In article <C0H0LG.Atz@eis.calstate.edu> cwilder@eis.calstate.edu (Charlotte Wilder) writes:

>   hwrvo@kato.lahabra.chevron.com (W.R. Volz) writes:
>   > In article <1993Jan6.235812.18764@netcom.com>,
>   > feustel@netcom.com (David Feustel) writes:
>   > |> I heard a rumor today that Intel is seriously thinking about
>   > |> scrapping the Pentium for another chip architecture (the
>   > |> 960mx?). Can anyone confirm/deny/amplify this rumor?
>   >
>   > I heard a very faint rumor that the p5 would not be released and
>   > they would go on to the p6 instead. It makes sense. They are
>   > still making a good profit on the 486 series, the high end CPU's
>   > haven't been cloned yet, they've won a court case that makes
>   > cloning harder. Why should they release the p5?  They're making
>   > money hand over foot and the competetion can't keep up.
>
>   I can amplify the rumor :).  My understanding is that the
>   "pentium" and the "hexium" were being developed in parallel and
>   that the "hexium" was due out sometime during the later part of
>   1993.  Therefore, if Intel truely decided to axe the "pentium" and
>   waited another 6 months for the "hexium," it probably wouldn't be
>   a huge deal to Intel.  In fact I would support this move, since
>   the "hexium" will just cause the "pentium" to become obsolete that
>   much faster.

It remains to be seen what Cyrix' next chip does.  The 486SLC and DLC
will probably eat up AMD for the low end systems.  If the rumors of a
Cyrix 586 come true, then Intel will need a "hexium" to beat it.

On the other hand, take a look at DEC, the Alpha, and Windows NT.
It's just possible that NT will make it possible for the industry to
choose a new binary standard, which might be MIPS, or maybe Alpha; but
this might make Intel look at a different set of competitors than C&T,
AMD, and Cyrix.
-- 
Richard Krehbiel                                 richk@grebyn.com
OS/2 2.0 will do for me until AmigaDOS for the 386 comes along...
From: penney@cl-next4 (Chris Penney)
Newsgroups: comp.sys.intel
Subject: Finding someone at Intel
Date: 11 Jan 1993 15:18:59 GMT
Organization: Michigan State University
NNTP-Posting-Host: cl-next4.cl.msu.edu
X-Newsreader: TIN [version 1.1 PL8]


Can someone tell me how to findout the e-mail address of someone working 
for Intel.  I've tried the stuff in Gopher.  

Thanks,
Chris Penney
penney@cl-next4.cl.msu.edu
From: guy@Auspex.COM (Guy Harris)
Newsgroups: comp.sys.intel
Subject: Re: 960 XA/MX Questions
Date: 9 Jan 93 01:33:51 GMT
Organization: Auspex Systems, Santa Clara

>The 960KB has floating point and can be found in a laser printer near you.
>In the K series (KA,KB,MC) at least, all the processors were the same die.

As was, allegedly, the "extended architecture" version used in the BiiN
machines.

>As for what the MX/XA has that the CA doesn't, the MX has a hexagonal die
>(looks nicer on a keychain) and an extra couple of zeroes in the price.

Does it not also have an MMU that at least supports the "protected
architecture" and perhaps the "extended architecture" (56-bit segmented
address space, capabilities, blah blah blah) version of the 960
architecture?
Newsgroups: comp.sys.intel
From: feustel@netcom.com (David Feustel)
Subject: Pentium to be Scrapped?!
Organization: DAFCO: OS/2 Software Support & Consulting
Date: Wed, 6 Jan 1993 23:58:12 GMT

I heard a rumor today that Intel is seriously thinking about
scrapping the Pentium for another chip architecture (the 960mx?). Can
anyone confirm/deny/amplify this rumor?
-- 
Dave Feustel N9MYI <feustel@netcom.com>
 
                        Happy Holidays to ALL!!!
Newsgroups: comp.sys.intel
From: lparisi@shearson.com (Lon G. Parisi)
Subject: Wait State, etc.
Organization: Lehman Brothers, NY
Distribution: comp.sys.intel
Date: Mon, 11 Jan 1993 18:42:20 GMT

Hi all,

Yes, its me again. I hope that people are not annoyed by the simplistic 
questions I've been asking. I'm assuming this is a forum for all levels
of questions and if it's not please let me know. I've been seeing the
zero wait state attribute for certain motherboards. What dictates the wait
state of a machine. Also, is an EISA needed for a home PC.  The main thing
I am looking at is using Excel to do light spread sheets and maybe an
occasional graph of the data (no major number crunching). I guess the
most effective way for me to look at purchasing a machine is for you 
all to recommend configurations that would be good for me. The only
thing I definately want is SVGA. Other than that, I would like people to
help me out. 

Thanking all those who are will to respond in advance,

Lon Parisi
lparisi@shearson.com
From: gregg@bss1.umd.edu (Gregg Piermarini)
Newsgroups: comp.sys.intel
Subject: P6 Specs/features
Summary: P6 specs
Keywords: P6
Date: 10 Jan 93 02:59:21 GMT
Organization: College of Behavioral and Social Sciences, U of Maryland


While we are on the subject of the next processor after the Pentium, could 
anybody give me some info on exactly what capabilities the P6 will have.  I 
don't really need expected mips or stuff like that.  But things like is it 
true 64 bits, how many transistors, cache size, pipelining, etc.  I read a 
long time ago that it might have the masks for making GUI operating systems 
run/update screens much faster; and that it might have some sort of DVI/
multimedia capabilities.  Any info is appreciated.  Please leave e-mail or 
post here!

Gregg

gregg@bss1.umd.edu
"I think he stole his wallet"
Newsgroups: comp.sys.intel
From: richk@grebyn.com (Richard Krehbiel)
Subject: Re: 486SL dropped, vendors test Cyrix
Organization: Grebyn Timesharing
Date: Wed, 6 Jan 1993 12:43:08 GMT

In article <C0E0zB.DwG@inews.Intel.COM> rskinner@mipos2.intel.com (Rod Skinner) writes:

>   Another interesting article comparing the Intel486 SX processor and the
>   Cyrix SLC is in InfoWorld December 21 page 48 "Reviews/Product
>   Comparisons: 25-MHz 486 Notebooks".  InfoWorld seems to come to the
>   conclusion that the Intel486 SX processors are 35% to 40% FASTER than
>   the Cyrix parts.  They use several examples but the most powerful is two
>   machines from TI: TravelMate 4000 WinSX/25 and the TravelMate WinSLC.
>   Both weigh 6 pounds with battery.  Similarly configured machines yield
>   SYSmark92 results of 75.93 (Intel486 SX) and 47.23 (Cyrix).  They
>   indicate that Cyrix system "posted a SYSmark92 close to 38 percent
>   slower than its 486SX/25 sibling."

The Cyrix 486SLC has a 386SX pinout, which means it has a 16 bit data
bus.  The 486SX has a 32 bit data bus.  Considering the smaller cache
in the Cyrix, I would expect it to be much slower than the 486SX.  The
Cyrix 486DLC will be closer, but still slower than a 486SX, mostly
because of the smaller cache, but also because the 486SX bus can be
faster than the 386 bus of the 486DLC chip.
-- 
Richard Krehbiel                                 richk@grebyn.com
OS/2 2.0 will do for me until AmigaDOS for the 386 comes along...
From: guy@Auspex.COM (Guy Harris)
Newsgroups: comp.sys.intel
Subject: Re: 960 XA/MX Questions
Date: 6 Jan 93 20:57:30 GMT
Organization: Auspex Systems, Santa Clara

>As of this time, we have no plans to sell the XA/MX products
>for commercial uses.

Why not?  (Technical, or Marketoon(TM), reasons?)
Newsgroups: comp.sys.intel,comp.sys.mac.hardware,comp.sys.ibm.pc.hardware
From: f88hv@efd.lth.se (Henrik Vallgren)
Subject: Re: 486 vs. Mac Benchmarks
Organization: Lund Institute of Technology, Sweden
Date: Tue, 5 Jan 1993 16:14:22 GMT

In article <1992Dec17.224200.22219@noose.ecn.purdue.edu> merrifie@cidmac.ecn.purdue.edu (Michael C Merrifield) writes:
>
>
>        "Recent Studies Reveal 25MHz Is Now Faster Than 50MHz"
>
>"Ingram Benchmark Results, March 1992 - 25 and 33 MHz 040 Macintosh Quadra
>Outruns the 486 at 33 and 50 MHz."
>
>"This revelation is brought to you by the Apple Macintosh and the Motorola
>68040."  The add goes on to say that Ingram Labs (an independent PC testing
>firm) compared the newest 040 Macs (Quadra 950 and 700) to several of the

First, about the "independent" firm: they we're hired by Apple right ?

Second, the 50MHz 486 was an ALR BusinessVEISA, probably WITHOUT the
 optional cache card, which means a 50MHz computer NO cache and 80ns
 memory. Anyone wan't to calculate WAITSTATES here ?

Third, how come that the 33MHz where only 4% faster than a 25MHz machine ?
 Now if this was true processor performance the difference should be > 30%.
 Let me guess - Motorola doesn't make math coprocessors - who would buy them ?

Henrik Vallgren
f88hv@efd.lth.se
From: kholland@hydra.unm.edu (Kiernan Holland)
Newsgroups: comp.sys.intel
Subject: Re: 486SL dropped, vendors test Cyrix
Date: 11 Jan 1993 09:23:26 GMT
Organization: University of New Mexico, Albuquerque
NNTP-Posting-Host: hydra.unm.edu

In article <C0npry.AKI@wimsey.bc.ca> bhenning@wimsey.bc.ca (Bill Henning) writes:
>In article <C0E0zB.DwG@inews.Intel.COM> rskinner@mipos2.intel.com (Rod Skinner) writes:
>>Another interesting article comparing the Intel486 SX processor and the
>>Cyrix SLC is in InfoWorld December 21 page 48 "Reviews/Product
>>Comparisons: 25-MHz 486 Notebooks".  InfoWorld seems to come to the
>>conclusion that the Intel486 SX processors are 35% to 40% FASTER than
>>the Cyrix parts.  They use several examples but the most powerful is two
>>machines from TI: TravelMate 4000 WinSX/25 and the TravelMate WinSLC.
>>Both weigh 6 pounds with battery.  Similarly configured machines yield
>>SYSmark92 results of 75.93 (Intel486 SX) and 47.23 (Cyrix).  They
>>indicate that Cyrix system "posted a SYSmark92 close to 38 percent
>>slower than its 486SX/25 sibling."
>>
>>SYSMark92 suite is a standard set of applications that are stimulated in
>>a repeatable manner using a set of commands that the BAPCo organization
>>developed after talking to 5000 users of these applications.  The
>>applications include spreadsheets (123, Excel, Quattro), word processors
>>(WordPerfect, WFW), data base (Paradox, dBase), presentation software,
>>graphics applications (Harvard), software development (MSC, Borland C).
>>These are the things most PC users regularly use and if not the
>>composite SYSMark92 metric, then the individual catagory metrics should
>>provide one with the ability to predict system performance on their
>>workload.
>>
>>rod
>...
>>
>>Rod Skinner				I speak for myself only.
>>Intel Corp
>>2200 Mission College Blvd RN4-21          PH (408) 765-4474
>>Santa Clara, CA 95052                     FAX (408) 765-4920
>
>Comparing 486SX performance to 486SLC performance is an apple-vs-orange
>comparison - the 486SX has a 32 bit bus, and the 486SLC has a 16 bit bus.

I don't think that is right. I think all 486 and 386 CPU's have to be 32-bit
except for the 386-sx's which are 286's with 386 internals. Nobody 
hardly uses 286's or 386sx's anymore.

>
>A more balanced comparison would be between a 486SX and a 486DLC at the
>same clock speed - and I would expect the 486SX to win by about 10% at
>the same clock speed.

A 486 DLC is the same thing as a SLC, just the SLC is a low-power 
chip for laptops. At least that is what I remembered.

>
>I am surprised Rod Skinner did not notice the discrepancy.
>
>Bill
>
>
>
>
>
>
From: tdbear@dvorak.amd.com (Thomas D. Barrett)
Newsgroups: comp.sys.intel
Subject: Re: Pentium to be Scrapped?!
Date: 8 Jan 93 23:15:36 GMT
Organization: Advanced Micro Devices, Inc.; Austin, Texas

In article <1ik7dcINNe8i@msuinfo.cl.msu.edu> penney@cl-next4.msu.edu (Chris Penney) writes:
>Maybe this time they'll get a better name...

Finally... a guy with the real reason why it might be scrapped :)
Most people can't seem to decide if it is some sort of metal or if
they should say a prayer before approaching it. :)

-- 
|Tom Barrett (TDBear), Sr. Engineer|tom.barrett@amd.com|v:512-462-6856 |
|AMD PCD MS-520 | 5900 E. Ben White|Austin, TX  78741  |f:512-462-5155 |
|"No is yes, And we're all free" ---Tracy Chapman, "Why?"              |
|My views are my own and may not be the same as the company of origin  |
Newsgroups: comp.sys.intel
From: graeme@labtam.labtam.oz.au (Graeme Gill)
Subject: Re: 960 XA/MX Questions
Organization: Labtam Australia Pty. Ltd., Melbourne, Australia
Date: Fri, 8 Jan 1993 05:36:15 GMT

In article <MKAHN.93Jan7074846@hopi.sedona.intel.com>, mkahn@hopi.sedona.intel.com (Mitch Kahn) writes:
> guy@Auspex.COM (Guy Harris) writes:
>  Nntp-Posting-Host: auspex.auspex.com
> ]
> ] >As of this time, we have no plans to sell the XA/MX products
> ] >for commercial uses.
> ] Why not?  (Technical, or Marketoon(TM), reasons?)
> 
> Marketoon(tm) reasons to be exact. There is very little demand
> for products with the capabilities of the MX/XA outside of the
> military. 

	From this I gather that graphics (ie. Xterminals) and multi-media
do not amount to much demand. I guess this just means that the next generation
product won't be using 960s in them ...

	Graeme Gill
Newsgroups: comp.sys.intel
From: graeme@labtam.labtam.oz.au (Graeme Gill)
Subject: Re: 960 XA/MX Questions
Organization: Labtam Australia Pty. Ltd., Melbourne, Australia
Date: Mon, 11 Jan 1993 02:01:24 GMT

In article <16289@auspex-gw.auspex.com>, guy@Auspex.COM (Guy Harris) writes:
> >> Marketoon(tm) reasons to be exact. There is very little demand
> >> for products with the capabilities of the MX/XA outside of the
> >> military. 
> >
> >	From this I gather that graphics (ie. Xterminals) and multi-media
> >do not amount to much demand.
> 
> I wasn't aware that Labtam was using XA/MX chips in their X terminals; I
> thought they used the core-architecture or maybe numeric-architecture
> versions....

	I never said we were. What I am pointing out is that these sorts of
products are rapidly moving into area where memory management and floating
point are essential. As far as I know (and I would love to be proved wrong
here), Intel is not offering any commercial 960 products with these features.
Their competitors are. They do have a 960 design with these features
(the MM/MX?), but show no signs of turning it into a commercial product. 

> (Or, to put it another way, I suspect you misread what Mr. Kahn said; he
> didn't say there was little demand for 960's outside the military, he said
> there was little demand "for products with the capabilities of the
> MX/XA", presumably meaning "little demand for products with all the
> capability-based segmented-address-space stuff", outside the military.)

	No, I did not mis-read the article. What I am pointing out is
that there is some demand for MM type features in commercial products.
As far as I know the MM doesn't have any peculiar capability-based
segmented-address-space stuff. I am not clear on the difference between
and MX and and MM since I have never seen a detailed data sheet on it.
The impression I got was that the MX was almost identical to the MM,
but with a different bus interface.

	Graeme Gill.



Newsgroups: comp.sys.intel
From: hoffberg@medusa.aps.anl.gov (Mike G. Hoffberg)
Subject: 486 motherboard design
Summary: differences in 486`s
Organization: Argonne National Laboratory, Chicago Illinois
Date: Mon, 11 Jan 1993 16:40:07 GMT

Are there any differences in 486DX-33 and 486DX2-66 motherboards?

Is it possible to use different secondary cache designs for each
processor such that it would enhance its performance?

Does one bus architecture lend itself towards one processor or the
other?

MIKE
-- 
Michael Hoffberg               /.\ <Build APS>   ~\   /~  "Jeez, am I the
hoffberg@phebos.aps.anl.gov   // \\ Argonne        \ /     only one who paid
hoffberg@anlaps.aps.anl.gov  //_O_\\ National       |      full price?" F.F.
                            /__| |__\ Lab   Boola! _|_ Boola!
From: doconnor@sedona.intel.com (Dennis O'Connor)
Newsgroups: comp.sys.intel
Subject: Re: Pentium to be Scrapped?!
Date: 8 Jan 93 14:27:00
Organization: Intel i960(tm) Architecture
	<1993Jan8.142619.14531@bilver.uucp>
NNTP-Posting-Host: potato.intel.com
In-reply-to: wbeebe@bilver.uucp's message of Fri, 8 Jan 1993 14:26:19 GMT


wbeebe@bilver.uucp (Bill Beebe) writes:
] the P6 (which is derivative of the P5, I'm sure),

Sorry, you're completely incorrect. Both are/will be members of
X86 architecture family, but P6 is no more a derivative of
the Pentium(R) CPU than Pentium was derivative of the Intel486(R).

--
Dennis O'Connor			doconnor@sedona.intel.com
Newsgroups: comp.sys.intel
Subject: Help! Versions of intel chips
From: s342046@emu.insted.unimelb.edu.au
Date: 11 Jan 93 10:24:23 GMT

Help Please!

Would someone be able to enlighten me as to what the different flavours
of 386 and 486 mean.  I want to set up a new PC system but am not really
sure what the differences are between the different varieties of chips.

Thanks,

PS Please reply by e-mail to my other account - janl@mullauna.cs.mu.oz.au

-- 
Jane Anna Langley			|snail-mail: 	105 Osborne Street
janl@mullauna.cs.mu.oz.au               |
s342046@emu.insted.unimelb.edu.au	|		South Yarra
University of Melbourne			|		Victoria 3141, AUSTRALIA
Melbourne, Australia.			|	+613/03	820 3629
			*** ready, fire, aim! ***
From: cwilder@eis.calstate.edu (Charlotte Wilder)
Newsgroups: comp.sys.intel
Subject: Re: Pentium to be Scrapped?!
Date: 7 Jan 93 06:27:15 GMT
Organization: Calif State Univ/Electronic Information Services

hwrvo@kato.lahabra.chevron.com (W.R. Volz) writes:
> In article <1993Jan6.235812.18764@netcom.com>, feustel@netcom.com (David Feustel) writes:
> |> I heard a rumor today that Intel is seriously thinking about
> |> scrapping the Pentium for another chip architecture (the 960mx?). Can
> |> anyone confirm/deny/amplify this rumor?
>
> I heard a very faint rumor that the p5 would not be released and they would
> go on to the p6 instead. It makes sense. They are still making a good profit
> on the 486 series, the high end CPU's haven't been cloned yet, they've won
> a court case that makes cloning harder. Why should they release the p5?
> They're making money hand over foot and the competetion can't keep up.

I can amplify the rumor :).  My understanding is that the "pentium" and
the "hexium" were being developed in parallel and that the "hexium" was
due out sometime during the later part of 1993.  Therefore, if Intel
truely decided to axe the "pentium" and waited another 6 months for
the "hexium," it probably wouldn't be a huge deal to Intel.  In fact
I would support this move, since the "hexium" will just cause the
"pentium" to become obsolete that much faster.
Newsgroups: comp.sys.intel
From: dcarr@gandalf.ca (Dave Carr)
Subject: Re: 960 XA/MX Questions
Organization: Gandalf Data Ltd.
Date: Fri, 8 Jan 1993 21:59:44 GMT

In <1993Jan08.173711.14431@donau.et.tudelft.nl> wolff@erasmus.et.tudelft.nl (Rogier Wolff) writes:

>I am not sure what the 960MX/XA have that the 960CA doesn't, but our Xterminals
>seem to run just fine with the CA. As far as I know, there exists 960's
>with floating point coprocessors that are Military only like the MX/XA.

The 960KB has floating point and can be found in a laser printer near you.
In the K series (KA,KB,MC) at least, all the processors were the same die.  
As for what the MX/XA has that the CA doesn't, the MX has a hexagonal die
(looks nicer on a keychain) and an extra couple of zeroes in the price.