HDTenEightyP/NetNews huggingface dataset:
From: drake@drake.almaden.ibm.com (Sam Drake)
Newsgroups: comp.arch
Subject: Re: reentrant
Date: 7 Jan 93 10:03:04 GMT
Organization: IBM Almaden Research Center

In article <C08qF4.Knz@news.iastate.edu> john@iastate.edu (John Hascall) writes:
>firth@sei.cmu.edu (Robert Firth) writes:
>Perhaps the research world has been...	<moving toward multithreading>
>But as far as (popular) commercially available OSes, it would seem not:
>
>      VM:  I dunno, and I hope never to find out ;-)

Yes, as of VM/ESA Release 2 (1992).  Applications can use multiple threads
within a single address space (and threads can run on multiple processors.)

>    OS/2:  ditto

Yes, always has been since 1987.  

Newsgroups: comp.arch
From: dbg@slac.stanford.edu (David B. Gustavson)
Subject: Re: COMPAQ PROPOSED SCALABLE I/O ARCHITECTURE
Followup-To: comp.arch
Organization: SLAC Computation Research Group
Date: Sat, 9 Jan 1993 02:09:00 GMT

In article <AJC.93Jan4073719@thendara.pa.dec.com>, ajc@pa.dec.com (AJ
Casamento) wrote:
> 
>   You're right of course (must have been Holiday senility on my part). Having
> access to a common model (Verrilog, VHDL, or some such) for the ASIC would be
> a real plus. Actually, a bus transactor model would be a win as well. It would
> certainly tend to cut down on the issues of platform compatibility that seem
> to plauge a lot of the third party option world. Given a reasonably thorough
> model, there should be a lot less chance of having an option card work on one
> system platform and not on another one (I don't expect there to be any absolute
> solutions to this problem of course; I'm idealistic, not foolish ;-) and there
> are simply too many folks who will choose not to verify their designs).
> 
>   So add such a model to my list of items that should be supplied for this new
> interconnect.
> 
Gee, yet another opportunity to point out that the ANSI/IEEE Std 1596 SCI
Scalable Coherent Interconnect is just what you want!

The SCI spec is written in executable C code, and for building the SCI
interface chip you can buy Verilog from one vendor already, Dolphin SCI
Technology. Two chip houses have done this and expect to ship in a couple
months (Vitesse and LSI Logic), and some computer companies have done it
too and expect to make their own customized chips for their own internal
purposes.

The C code is in two levels. The low level specifies the handling of bits
and bytes to make packets, and the high level specifies some of the uses of
these packets. Some parts of each might correspond to your "bus transactor
model."

But of course I understand that this discussion is futile--any engineer
worth his salt (salary) gets his only pleasure in life from designing his
own new unique solution to this problem! ;-)  Sigh.  But maybe his
competitors will have higher profits because they get the benefit of the
support infrastructure that grows around standards.

--------------------------------------------------------------
-- David B. Gustavson, Computation Research Group, SLAC, POB 4349 MS 88,
    Stanford, CA 94309   tel (415)961-3539  fax (415)961-3530
-- What the world needs next is a Scalable Coherent Interface!
-- Any opinions expressed are mine and not necessarily those
   of the Stanford Linear Accelerator Center, the University, or the DOE.
Newsgroups: comp.arch
From: Philip Machanick <philip@concave.cs.wits.ac.za>
Subject: Re: Def of a workstation (a lark)
X-Xxdate: Mon, 4 Jan 93 14:33:39 GMT
Organization: Computer Science Dept, Wits University
X-Useragent: Nuntius v1.1.1d16
Date: Mon, 4 Jan 1993 12:54:55 GMT

In article <1i86t8INNc5b@cs.widener.edu> Rob Young,
YOUNG@tattoo.cs.widener.edu writes:
>I agree with wayne's assertion that it is a marketing thing.  Leads me
to the
>question:  If you have a *PC* that outperforms most workstations (and
also
>can run Unix and jump through all your hoops above), does that make it a 
>workstation?  Couldn't a company call something a PC when it is really a 
>workstation in PC clothing?

What about a PC that outperforms a mainframe (or an AS/400)?

It's a question of the use to which it's put and how it's configured.

Other than that it still needs a lot of work to set it up because
it's still going through debugging etc., Linux installed on a 486
with a decent graphics card and ethernet would meet most of the
definitions posted on this thread. Not bad for free software and
pretty cheap hardware.

Specifics like "real operating system" (= UNIX?) etc. are not important.

When you use a workstation, most of the computational resource is
dedicated to giving you good response time and you are not inhibited in
accessing networked resources (files, computation, etc.). The key is
the user-centredness: minimum inhibition in getting work done. Detail
such as TCP/IP, user interface, big screen etc. is devoted to this
goal. If you have all these things and the system is badly designed
so you can't get effective work done, it's not a workstation. If some
detail is wrong but it still lets you get work done fast, maybe it
still is one.

The whole thing is so subjective that no one is every going to define
the concept precisely. But don't worry. The current divisions between
classes of computer are crumbling so fast that this whole discussion
will soon be irrelevant.
--
Philip Machanick                   philip@concave.cs.wits.ac.za
Department of Computer Science, University of the Witwatersrand
2050 Wits, South Africa
phone 27(11)716-3759 fax 27(11)339-7965
Newsgroups: comp.arch
From: jones@pyrite.cs.uiowa.edu (Douglas W. Jones,201H MLH,3193350740,3193382879)
Subject: A better theory for Endian origins
Date: Fri, 8 Jan 1993 18:54:48 GMT
Organization: University of Iowa, Iowa City, IA, USA

The decision whether to go big-endian or little-endian on byte numbering
has natural ties to the bit numbering in a word, and this is, I think,
one of the historical forces behind the war of the endians.

   There are a few rational ways of numbering the bits in a word.  One is
to number them left to right:

  1 2 3 4 ...

This has no particular appeal other than the fact that it is the first
to come to mind when you start numbering parts of a word.


   Another is to think of the formula for the value of a binary number:

  V = Sum( b[i]*2**i )

To make this work for integers, you've got to number the bits as:

  ... 3 2 1 0


   Remember, though, that the first computer designers tended to think in
terms of fixed point fractions, not integers.  This thinking pervades
the early papers on computer arithmetic from the 1940's.  In this case,
your machine word has a binary point just to the right of the sign bit,
and the formula for the value (in 2's complement form) is:

  V = -b[0] + Sum( b[i]*2**(-i) )

To make this work, you number your bits like this:

  0 1 2 3 ...


Summary:  There is a good argument for little-endian bit numbering when
you are thinking mostly in terms of integers, and there is a good argument
for big-endian bit numbering when you are thinking mostly in terms of
fixed point fractions.


   Back to the war of the endians, once you've decided how to number the
bits in your word, it's awfully tempting to number the bytes in a word
in the same way, particularly if you provide any instructions that address
bits in a word directly.  It's true that it's all arbitrary, in some global
sense, but documentation sure seems to make more sense when you number
things in the same order for both bits and bytes.

   The least rational of all endian systems are the mixed endian messes
where bytes are packed in orders such as 2301.  These seem to result from
multiple generations of design, for example, where bytes in a sixteen bit
word are little endian, but software for 32 bit operands grew up doing
wordwise 16 bit work in a big endian style.  Then, when it came time to
do 32 bit stuff in hardware, the data formats that were established by
brain dead programmers become enshrined in hardware standards that will
probably be with us for decades.

					Doug Jones
					jones@cs.uiowa.edu
Newsgroups: comp.arch
From: peter@ferranti.com (peter da silva)
Subject: Re: Def of a workstation (a lark)
Organization: Xenix Support, FICC
Date: Thu, 7 Jan 1993 16:28:48 GMT

To me, anything I can open multiple shell windows in and kick off a command in
the background on is a workstation. If it runs UNIX, that's a bonus... but a
workstation is a computer that supports *my* work habits.
-- 
Peter da Silva                                            `-_-'
Ferranti International Controls Corporation                'U` 
Sugar Land, TX  77487-5012 USA
+1 713 274 5180                            "Zure otsoa besarkatu al duzu gaur?"
Newsgroups: comp.arch
From: zeke@fasttech.com (Bohdan Tashchuk)
Subject: Re: SCI vs. Anet (Compaq's I/O Proposal)
Keywords: SCI, I/O, point-to-point, Compaq, Anet
Organization: Fast Technology   Beaverton, OR
Date: Tue, 12 Jan 1993 23:59:10 GMT

I wanted to highlight part of Kevin's recent post, since I think
the message is often lost here. Chip architects and workstation
designers are used to throwing around hundreds of thousands of gates
like they were confetti. The PC world is NOT like that, as Compaq
learned, very painfully, in the last few years.

Compaq has proposed a protocol that can be put into a cheap ASIC
for a cost of a few dollars. SCI can't be. We need to remember
that not all problems require baroque, elegant, complicated, and
expensive solutions.

In <1993Jan11.225829.16388@twisto.eng.hou.compaq.com> leigh@croatia.eng.hou.compaq.com (Kevin Leigh) writes:

>Although much emphasis has been placed on low pin counts in 
>all of our correspondence, getting low pin counts is not a 
>sufficient cost metric.  It has been explained to us by 
>those knowedgeable about SCI that SCI implementations range 
>from 50K to 100K gates in complexity.  An Anet inteface can 
>be done with <1K gates for a simple, slave-only device (e.g. 
>a serial port controller) to around 10K gates for a multi-
>request mastering device (e.g. an FDDI controller.)  This 
>magnitude of difference is noticable no matter how 
>inexpensive one can purchase ASICs.
From: rf@cl.cam.ac.uk (Robin Fairbairns)
Newsgroups: comp.arch
Subject: Re: big + little endian (was: Comparison of Alpha, MIPS ..)
Date: 5 Jan 93 15:26:21 GMT
Organization: U of Cambridge Computer Lab, UK

In article <markg.79.726169747@county.lmt.mn.org>, markg@county.lmt.mn.org (Mark Gilbert) writes:
|> [let's not repeat _all_ these quotes...  again...]
|> 
|> I have identified the root of this whole big-endian/little-endian debate.  
|> The conflict is is between text and numbers.  We read left to right.  But, 
|> if you were to number the digits of an integer, you would do it right to 
|> left.  The one's digit would be 0, the ten's digit, 1, etc.
|> 
|> This should never have been the case.  We adopted our number system from the 
|> Arabs, and the Arabs read right to left.  For them, the direction of reading 
|> text and numbers is CONSISTENT.  The whole problem arose because we failed 
|> to reverse the numbering system when we borrowed it from the Arabs.

Can you explain, then, why Roman numbering has the small units to the
right?  (Yes, I know there's that peculiar subtract-to-the-left rule,
but it seems to me that the rule is essentially the same as the arabic
one.

|> I propose that we now correct this historical oversight.  Let us write 
|> numbers least significant digit first.  The bang symbol can be used to 
|> replace the decimal point, in order to distinguish little-endian numbers 
|> from big-endian.  The integer six hundred and fifty four should now be 
|> written !456.  Sixteen dollars and twenty five cents is now $ 52!61.

Hmmm.  It'll never catch on.
--
Robin (Keep Radio 3 != Classic FM) Fairbairns       rf@cl.cam.ac.uk
U of Cambridge Computer Lab, Pembroke St, Cambridge  CB2 3QG, UK
Newsgroups: comp.arch
From: taylor@world.std.com (Russell R Leighton)
Subject: Alladin
Organization: The World Public Access UNIX, Brookline, MA
Date: Tue, 12 Jan 1993 17:45:44 GMT


I just read in a trade rag (I can't remember which), about
project "Alladin" at TI. It is an MP system of really
fast (clocked) R4000s with BiCmos vector coprocessors.

Can anyone tell me more details (or correct my description)?


Russell Leighton

Newsgroups: comp.arch
From: parag@netcom.com (Parag Patel)
Subject: Re: Def of a workstation (a lark)
Organization: Netcom - Online Communication Services  (408 241-9760 guest) 
Date: Mon, 4 Jan 1993 22:40:18 GMT

The main difference between a workstation and a PC is the extra amount
of money you pay for the vendor's marketing and sales departments to
convince you that you have purchased a workstation and not a PC.

The minor difference is that workstations run much less software which
costs more than PC software.  Almost no cool games run on workstations.

Also you can't buy workstations at Sears, although you can buy
workbenches.


	-- Parag (I have a Mac) Patel <parag@netcom.com>
From: dik@cwi.nl (Dik T. Winter)
Newsgroups: comp.arch
Subject: Re: A theory for Big & Little Endian's origin
Date: 9 Jan 93 00:32:51 GMT
Organization: CWI, Amsterdam

In article <willmore.726511292@help.cc.iastate.edu> willmore@iastate.edu (David Willmore) writes:
 > To store a byte, there are no choices, 8 bits arranged any way
 > at one location is a byte.
Yup, but on bit addressable machines (yes, they do exist) the assumption
that the order is irrelevant is already invalid.
-- 
dik t. winter, cwi, kruislaan 413, 1098 sj  amsterdam, nederland
home: bovenover 215, 1025 jn  amsterdam, nederland; e-mail: dik@cwi.nl
Newsgroups: comp.arch
From: rabin@CS.Yale.Edu (Dan Rabin)
Subject: Re: big + little endian (was: Comparison of Alpha, MIPS ..)
Reply-To: rabin-dan@cs.yale.edu
Organization: Computer Science, Yale University, New Haven, CT 06520-2158
	<WAYNE.92Dec30093950@backbone.uucp>
	<markg.79.726169747@county.lmt.mn.org> <1993Jan6.171242.2895@lsl.co.uk>
Date: Thu, 7 Jan 1993 13:20:15 GMT

According to a book I have read that explains the Arabic alphabet,
numerals in Arabic documents are written most-significant-digit
leftmost, whereas the text itself is written from right to left.
Hence the native reader encounters the least-significant digit first
in his or her accustomed reading order.  There's no reason to believe
that Arabic-speaking arithmetic has suffered as a result.

It's interesting to note that the digital notation passed through
Arabic-speaking culture on its way from its Hindu origins to its
adoption by Europeans.  Since Sanskrit is written from left to right,
this probably means that the perceived endian-ness has flipped twice.

  -- Dan Rabin (rabin-dan@cs.yale.edu)
Newsgroups: comp.arch
From: skwong@cuse1.se.cuhk.hk (Wong Sai Kee (Graduate Assistant))
Subject: Re: VME bus
Organization: Faculty of Engineering, The Chinese U. of Hong Kong
Distribution: na
Date: Sat, 9 Jan 1993 10:25:41 GMT

thia@sce.carleton.ca (Yong Thia) writes:

>Hi! I would like to know if the VME bus is a synchronous
>or asynchronous bus.
>ANy pointers will be greatly appreciated

As far as I remember, it is basically asynchronous.  But it also supports
block transfer and I am not sure which support sync or not.

If I am wrong, please correct me.

>Regards
>Jimmy
From: dik@cwi.nl (Dik T. Winter)
Newsgroups: comp.arch
Subject: Re: A better theory for Endian origins
Date: 9 Jan 93 01:32:19 GMT
Organization: CWI, Amsterdam

In article <1993Jan8.185448.2405@news.uiowa.edu> jones@pyrite.cs.uiowa.edu (Douglas W. Jones,201H MLH,3193350740,3193382879) writes:
 >    There are a few rational ways of numbering the bits in a word.  One is
 > to number them left to right:
 > 
 >   1 2 3 4 ...

Sorry, what is 'left' in a word?  When I started with computers a word was
some abstract thing consisting of a number of transistors (to be honest,
no transistors at that time).  You are already making a picture, but you
might make the picture the other way.
-- 
dik t. winter, cwi, kruislaan 413, 1098 sj  amsterdam, nederland
home: bovenover 215, 1025 jn  amsterdam, nederland; e-mail: dik@cwi.nl
Newsgroups: comp.arch
From: rf@cl.cam.ac.uk (Robin Fairbairns)
Newsgroups: comp.arch
Subject: Re: A theory for Big & Little Endian's origin
Date: 8 Jan 93 12:02:25 GMT
Organization: U of Cambridge Computer Lab, UK

In article <1iig7aINNtc@spim.mti.sgi.com>, jackc@vermont.mti.sgi.com (Jack Choquette) writes:
|> [...]
|> So it makes more sense, mathematically at least, to reverse number
|> numbers and zero fill the number that are not there.
|> 		digit #		5  4  3  2  1  0
|> 		digit value	0  1, 0  5  6  2
|> 		digit value	7  1, 0  5  6  2
|> 
|> Now we come to representing numbers in computers.  Being mathematically
|> inclined, computer engineers represent numbers by putting the least
|> significant bit in the lowest numbered (and addressible) spot.  Being
|> human, when they print out the number they print out the most significant
|> bit first:
|> 		digit #/address		7  6  5  4  3  2  1  0
|> 		digit value (bin)	0  1  0  0  1  1  1  0   =   78 dec

What Jack fails to note is that some of the early computers (e.g., the
ACE at the NPL in Teddington) stored rational fractions rather than
integers.

Thus it was entirely reasonable (i.e., both from the mathematical and
the engineering point of view) to number the most significant digit
(2**-1 or 10**-1, I don't remember which) as digit 1, the next most as
digit 2, and so on.

Jim Haynes has subsequently highlighted Jack's hypothesis for his
argument of left-to-right reading humans.  In view of who was building
the earliest computers, Jack is right to use that hypothesis, imho.
--
Robin (Keep Radio 3 != Classic FM) Fairbairns       rf@cl.cam.ac.uk
U of Cambridge Computer Lab, Pembroke St, Cambridge  CB2 3QG, UK
From: haynes@cats.ucsc.edu (Jim Haynes)
Newsgroups: comp.arch
Subject: Re: A theory for Big & Little Endian's origin
Date: 8 Jan 93 02:07:57 GMT
Organization: University of California; Santa Cruz
NNTP-Posting-Host: hobbes.ucsc.edu


In article <1iig7aINNtc@spim.mti.sgi.com> jackc@vermont.mti.sgi.com (Jack Choquette) writes:
>For reasons explained in previous posts, humans (who read left to right)
Well, now, some of them do and some of them don't.  How about Big Endian
for the West, and Little Endian for the East (starting at Israel and
the Arab nations and going to Japan)
-- 
haynes@cats.ucsc.edu
haynes@cats.bitnet

"Ya can talk all ya wanna, but it's dif'rent than it was!"
"No it aint!  But ya gotta know the territory!"
        Meredith Willson: "The Music Man"
Newsgroups: comp.arch
From: essbaum@rchland.vnet.ibm.com (Alexander Essbaum)
Subject: Re: Def of a workstation (a lark)
Date: Tue, 05 Jan 1993 13:51:47 GMT
Disclaimer: This posting represents the poster's views, not necessarily those of IBM
Organization: IBM Rochester

In article <1iarmrINNk28@news.cerf.net>, davsmith@nic.cerf.net (David Smith) writes:
|> 
|> Top ten differences betweed PC's and workstation's
|> 
|> 10. PC's have PowerUsers (tm), workstation's have Guru's
|> 9. Workstations come with powerful backup utilities, like dump/restore and dd
|> 8. Can't buy workstation peripherals at Crazy Al's Discount Computer
|> 7. PC's have better games

well, i definitely disagree with this one.

|> 6. Humor impaired PC users can't easily post to the net
|> 5. Don't have to log in to PC (Note - this functionality can be reproduced
|>    on Sun's with the exclusive "L1-A" key combo)
|> 4. "Workstation" implies you actually do something useful with your computer,
|>    even if yo do only run Xtrek and news all day.
                             ^^^^^
PC's have more games, but the vast majority use the computer as your
opponent.  workstations are usually fast enough and networked such that you
can play real-time interactive games against other people and just use the
computer as an interface.  xtrek is a good example of this (so is xtank).
even slow/strategy games are better if you can play with/against several
people instead of against the computer.

|> 3. Workstations have "field engineers" who will come to your office and break
|>    it for you.
|> 2. Workstations don't come in those grody PC cases
|> 1. You don't send Bill Gates any money when you buy a workstation
|> 
|> -- 
|> David L. Smith
|> smithd@discos.com or davsmith@nic.cerf.net

everyone knows games are the #1 use for computers. :)

axel
From: jr@ksr.com (John Robinson)
Newsgroups: comp.arch
Subject: Re: A theory for Big & Little Endian's origin
Date: 8 Jan 93 17:10:51 EST
Organization: Kendall Square Research, Waltham, MA
In-reply-to: jpenix@uceng.uc.edu's message of 8 Jan 93 11:39:25 EST

In article <C0JnLq.K2x@uceng.uc.edu> jpenix@uceng.uc.edu (John Penix) writes:

   In article <1iig7aINNtc@spim.mti.sgi.com> jackc@vermont.mti.sgi.com (Jack Choquette) writes:
   >
   >To me it seems like different endianess came about because of the way
   >humans like to see things listed out.  When humans make a list, they
   >like to make and read it top to bottom:
   >		0  ******
   >		1  ******
   >		2  ******
   >		 etc.
   rest deleted....

Good - it sounded good, but most of it was speculation, and wrong.

   I remember reading (and I'll hunt down the title if you'd like) that
   IBM's endedness came from a mechanical memory device that was something
   like a wheel.  

The consumate reference (IMO) is Danny Cohen's "On Holy Wars and a
Plea for Peace", IEEE Computer v14n10, Oct. 1981, pp 48-54.  I think
this floated around the net for a while (RFC?) before it was
published.

		  For the bytes to be read in in the proper order for
   processing the lower order had to come first.  They stuck with it due
   to their standards of backwards compatibility.  I don't recall them
   bringing in any linguists :)

Maybe because that was how you sorted on your IBM card sorter ;-)
--
/jr, aka John Robinson                       Place stamps here
internet: jr@ksr.com                    Post Office will not deliver
uucp: {world,harvard,uunet}!ksr!jr      mail without correct postage
Newsgroups: comp.arch
From: jjb@jagware.acco.com (J.J.Bailey)
Subject: FYI: Alpha AXP Computing Presentation
Organization: Allegro Consulting
Distribution: usa
Date: Fri, 8 Jan 1993 20:31:05 GMT

WHAT:	Alpha AXP Computing

WHEN:	Thursday, February 4, 1993
	8:00 - 12:00 (open)

WHERE:	Marriot Hotel
	55 4th Street
	San Francisco, CA

	Seacliff Ballroom


Digital would like you to see presentations, product demonstrations,
and over two dozen application demonstrations on the Alpha AXP platform.

You can register by voice mail at (415) 882-3698.  Space is limited.


				AGENDA

8:00 - 9:00	Registration and Continental Breakfast

9:00		Opening Video, "Imagine the Opportunities"

9:04		Welcome and Opening Remarks
		Rich Wendroff, Account Group

9:10		Windows NT AXP
		Steve Houglum, Microsoft Corp.
		Windows NT Program Manager

9:30		21st Century Computing, Alpha Products & Operating Systems
		Ken Steinhardt, US Marketing Manager

10:20		Video, Customer Testimonials

10:35		Digital Personal Computers, "The Industries' Best Value"
		John McGilvary, US Personal Computer Sales Manager

11:15 - 12:00	Exhibits and Demonstrations

-- 
J.J.Bailey
Consultant
jjb@jagware.acco.com
Newsgroups: comp.arch
From: awolfe@moo.Princeton.EDU (Andrew Wolfe)
Subject: Re: How does an R4000-style cache work?
Originator: news@nimaster
Keywords: Write-back Cache
Organization: Princeton University
Date: Thu, 7 Jan 1993 21:10:14 GMT


I received a rather complete explanation written by John Mashey and
apparently posted to comp.arch about 18 months ago.


Summary:
--------

Writes go to a store buffer (2 deep) where they are held until free cache
cycles.

Subsequent stores only use the cache tag RAM - not the cache data RAM, thus
data is retired from the store buffer during later stores at the same rate
that data enters the store buffer - therefore, the store buffer never
overflows.  Of course, the store buffer also empties during non-memory
operations.

Accesses to data still in the store buffer can cause a stall.

-- 
--------------------------------------
Andrew Wolfe
Assistant Professor
Department of Electrical Engineering
Princeton University
Newsgroups: comp.arch