Newsgroups: comp.sys.sun.misc
Subject: Re: 3/50 memory to board mapping
From: agw@math.canterbury.ac.nz (Allen Witt)
Date: 9 Apr 92 18:35:35 +1200
Distribution: world
Organization: Department of Mathematics, University of Canterbury
Keywords: memory, mapping, sun 3/50.

        I went through this exercise about 18 months ago, and with some help
from the net which pointed me in the right direction, and some experimentation
was able to decode the 3/50 main board memory layout.
        Looking at the underside of the board the numbers of the memory
chips are ( as printed on the board )

  31 |  U1420   U1400   U1320   U1300   U1220   U1200   U1120   U1100
  32 |  U1421   U1401   U1321   U1301   U1221   U1201   U1121   U1101
  33 |  U1422   U1402   U1322   U1302   U1222   U1202   U1122   U1102
  34 |  U1423   U1403   U1323   U1303   U1223   U1203   U1123   U1103
  35 |  U1424   U1404   U1324   U1304   U1224   U1204   U1124   U1104
  36 |  U1425   U1405   U1325   U1305   U1225   U1205   U1125   U1105
V 37 |  U1426   U1406   U1326   U1306   U1226   U1206   U1126   U1106
M 38 |  U1427   U1407   U1327   U1307   U1227   U1207   U1127   U1107
E 39 |  U1428   U1408   U1328   U1308   U1228   U1208   U1128   U1108
+ 40 |  U1430   U1410   U1330   U1310   U1230   U1210   U1130   U1110
p 41 |  U1431   U1411   U1331   U1311   U1231   U1211   U1131   U1111
o 42 |  U1432   U1412   U1332   U1312   U1322   U1212   U1132   U1112
w 43 |  U1433   U1413   U1333   U1313   U1233   U1213   U1133   U1113
e 44 |  U1434   U1414   U1334   U1314   U1234   U1214   U1134   U1114
r 45 |  U1435   U1415   U1335   U1315   U1235   U1215   U1135   U1115
  46 |  U1436   U1416   U1336   U1316   U1236   U1216   U1136   U1116
  47 |  U1437   U1417   U1337   U1317   U1237   U1217   U1137   U1117
  48 |  U1438   U1418   U1338   U1318   U1238   U1218   U1138   U1118
        X       W       V       U       T       S       R       P
      | bank 3        | bank 2        | bank 1        | bank 0        |

        When you have a memory error the diagnostics will tell what address
it is at and an XOR value which locates the bit in the word which has failed.
On the sun 3/50 memory is addressed by taking a long word from each bank with
the banks paired so that the first two megs come from banks 0 and 1, the
second two megs 2 and 3, with even long words from the lower bank of the pair,
odd from the higher. The addresses are of long (4 byte) words so the last hex
digit is 0,4,8 or C ( in binary 0000, 0100, 1000 or 1100). The value of the
fifth hex digit ( <-0 ) or 21st binary digit ( <-0 ) selects banks 0 and 1
or 2 and 3.
The relevant tables are

        | A21   |  A2   |               |  H5   |   H0  |
bank 0  |  0    |   0   |               | [0,1] | [0,8] |
bank 1  |  0    |   1   |               | [0,1] | [4,C] |
bank 2  |  1    |   0   |               | [2,3] | [0,8] |
bank 3  |  1    |   1   |               | [2,3] | [4,C] |

        (Ayy is the binary digit numbering from right to left, starting at 0
        Hy is the hex digit numbering from right to left, starting at 0.)

        The xor value tells you which particular bit is faulty. In my case
a missing chip at location Uzz24 produced an xor value of 0x00100000, i.e.,
bit 20 , numbering from zero ,and octal 24 is decimal 20, so the last two
digits of the chip number give the bit position. The parity bits must be
in chips with numbers ending in 8. If these are faulty I was told the error
was in a parity bit, but not how you found which of the four parity chips.
( I have since noticed in parity error tracebacks on sun's running 4.1.1
a field which indicates which byte the error is in. The log message is
.....vmunix: Parity Error Register d4<INTR,INTENA,CHECK,ERR16>
I believe the ERR16 indicates error is in byte 3 of a long word, but I'm
not sure. Anyway its irrelevant if you can't get the machine to boot. )

        Hope this helps.
-- 

Allen Witt			email:	agw@math.canterbury.ac.nz
Newsgroups: comp.sys.sun.misc