From: farjamit@eecs.cs.pdx.edu (Tom Farjami)
Newsgroups: misc.jobs.resumes
Subject: MSEE 2+years experince, VLSI design, CAD/CAE, SW/HW, Testing
Date: 6 Oct 92 01:55:02 GMT
Article-I.D.: pdxgate.6180
Organization: Portland State University, Portland, OR







                           TOM FARJAMI
                  10235 SW Haystack Place
                  Beaverton, Oregon 97005
                      (503) 524-7011
              email : farjamit@eecs.ee.pdx.edu





     To whom it may concern :


     Enclosed is  my  resume  for  a  CMOS  VLSI/IC  design,
Hardware design or a Software design engineer position. I am
positive that my academic achievements and hands-on  experi-
ence is an indication of the talent and enthusiasm which can
be put into use by your organization.


     I have more than two years  of  work  experience  as  a
Hardware/Software engineer I, working for the Semi-conductor
test Systems division of Tektronix, and as an IC Hybrid Pro-
cess Engineer II, working for the Integrated Circuits Opera-
tions division of Tektronix, Inc. I have also recently  com-
pleted  a master's degree in Electrical Engineering at Port-
land State University with honors. As a  result  of  massive
work force reduction measures, I was laid off from Tektronix
in July of 1992. My work performance was great; you may con-
tact my previous employer if you desire to do so.



     I look forward to hearing from you soon. Thank you  for
your consideration.

        Sincerely,


        Tom Farjami

















                      October 5, 1992





                           - 2 -


                        TOM FARJAMI
                  10235 SW Haystack Place
                  Beaverton, Oregon 97005
                      (503) 524-7011
              email : farjamit@eecs.ee.pdx.edu


     OBJECTIVE


     A position as a CMOS VLSI/IC design, Hardware design or
     a Software design engineer position.



     EDUCATION


     Master of Science in Electrical Engineering

     Portland State  University,  Portland,  Oregon.  Winter
     1992

     Master's project : a biologically motivated CMOS analog
     motion  detector  IC  designed  based  on Carver Mead's
     style of subthreshold circuit design, which was  fabri-
     cated by MOSIS in summer of 1990 and has its major sub-
     cells successfully tested.

     Current GPA : 3.6/4.0


     Bachelor of science, Electrical Engineering

     Portland state university, Portland, Oregon. June l987

     GPA: 3.1/4.0, B+ GPA in major course work

     Also  completed  approximately  %85  towards   computer
     engineering


     Portland community college, portland,  Oregon.  9/80  -
     6/82

     GPA: 3.2/4.0, B+ GPA in major course work


     PROFILE


     Have demonstrated flexible  design  abilities  in  both
     Hardware  and Software. Skilled as a programmer in UNIX
     environment and am  proficient  in  "C",CSHELL  ,AWK  ,



                      October 5, 1992





                           - 3 -


     Pascal, Fortran and Assembly language programming. Pos-
     sess skills in CAD tools, CMOS Digital  /  Analog  VLSI
     and  related  IC  layout  design,  Digital  and  Analog
     hardware design, implementation and prototype construc-
     tion.   Able  to  test  and  calibrate  circuits  using
     Digital/Analog test equipments.



















































                      October 5, 1992





                           - 4 -


     EXPERIENCE


     IC Hybrid process Engineer II, 10/91 - 7/92

     Tektronix , INC.

     Integrated Circuits Operations

     IC mask design group


     Designed IC Masks for an state of the  art  giga  speed
     bipolar  process.  Used tools from Silicon Graphics and
     quickic ( an in house IC layout  design  and  schematic
     capture  tool  ) for IC layout. Used Maskap for IC con-
     nectivity , design rule checking and parasitic  extrac-
     tions.


     Hardware / Software Engineer I, 7/87-9/88

     Tektronix, Inc.

     Semiconductor test systems division

     Mixed signal group


     Designed and tested a DMA related digital circuit board
     for  the  LT1000  ASIC  test  system.  This was a digi-
     tal circuit that was programmed through  software  ena-
     bling  data  transfer to  and from instruments internal
     to the tester. I used test equipments such as  oscillo-
     scope  and  logic  analyzer  along with  test  programs
     in "C" to debug this circuit board. The  final  circuit
     board  was entered in  to  a  Mentor  schematic capture
     tool. I worked on design of a set  of  software  primi-
     tives  that enabled instrument and DMA control for  the
     tester.  Also I wrote a graphics package in "C" for the
     LT1000  ASIC  test  system for displaying test results;
     Those were virtual logic  analyzer,  an  scope  and  an
     shmoo plot routine.


     * Working on these projects enabled  me  to  utilize  a
     wide  range  of  educational  background  in  a  highly
     advanced work environment. All of  the  above  projects
     became part of standard product.



     Computer science consultant 9/85-5/87




                      October 5, 1992





                           - 5 -


     Computer science department, portland state university.



     Electronic Technician 9/84-5/85

     Electrical  engineering  department,   Portland   State
     University

















































                      October 5, 1992





                           - 6 -


     ACHIEVEMENTS & SKILLS


     HARDWARE

     Knowledge  of  Solid  State  technology,  PN   junction
     theory, BIPOLAR and field effect transistors, IC model-
     ing and MOS technology.

     Knowledge  of  Carver  Mead   style   of   Biologically
     motivated  subthreshold  Analog  VLSI design and neural
     systems.

     Knowledge of CMOS Digital VLSI design, Boolean algebra,
     karnaugh  maps,  VEM  plotting  theory, State diagrams,
     Combinational and state machine design, including  race
     and hazards in digital systems.

     Knowledge of simulation tools such as SPICE3  ,  TSPICE
     and CAD tools such as Magic (an IC layout design tool),
     Opal ( a layout tool from Silicon graphics  ),  quickic
     (an  IC  layout  and  schematic  capture tool from Tek-
     tronix), RSIM ( an event driven simulator )  and  fami-
     liarity   with   both  Mentor  and  Phase  III  Logic's
     schematic  capture  tools  and  Log  (  an  interactive
     schematic capture and simulation tool from Caltech ); I
     have used most of these CAD tools  under  suntools  and
     X-window environment.

     Knowledge of Automatic control theory,  stability  cri-
     teria and frequency domain analysis of feedback control
     systems.

     General knowledge of computer system architecture, RISC
     vs CISC and microprocessor system design.


     Software

     Knowledge of "C",  CSHELL,  AWK,  Pascal,  Fortran  and
     document  formatting and typesetting in a UNIX environ-
     ment. Also familiar with MSDOS 5.0 and Micro Soft  Win-
     dows.

     Knowledge of  Advanced  programming  methods  and  Data
     structure in computer science.

     Knowledge of of Interactive Computer  Graphics,  Raster
     algorithms,  Logical and physical devices, translation,
     rotation,  scaling,  zoom  and  window  to  view   port
     transformations,

     Familiarity with  many  assembly  languages,  hands  on
     experience  with Intel 8085 system design kit, hands on



                      October 5, 1992





                           - 7 -


     experience with PCs and MSDOS operating system.
























































                      October 5, 1992


--------------------------------------------------------------
Tom Farjami
farjamit@eecs.ee.pdx.edu
Portland State University