HDTenEightyP/NetNews huggingface dataset:
From: kevin-kreeger@orl.mmc.com (Kevin Kreeger)
Newsgroups: fj.mail-lists.parallel
Subject: True Bandwidth on CM-2
Date: 15 Sep 92 12:59:33 GMT
Distribution: fj

I've got a question on the true operating Bandwidth of the CM-2

I am attaching to an 8k subset and using a 2-d mesh shape. If I use the

 CM_send_to_news(&input,output,0,CM_upward,boolsizeof(char));

exactly how many message startups will be executed. What I mean is that
If I have a 128x64 shape so I have 8K vitural processors on 8k physical
processors, and I send a message 8 bits long, do I actually produce
8 message startups. Is the true operating bandwidth in this case 1 bit?

Also, since 16 processors sit on a chip, and then there are 12 hypercube
wire interconnects going off chip, is a mesh embedded in the array, or
do the messages that go from one chip to the chip physically sitting next 
to it on the board go through hypercube routing (which in some cases
is longer that 1 unit route, right?).

thanks
Kevo
From: saroff@msc.edu (Stephen Saroff MSCI/AHPCRC)
Newsgroups: fj.mail-lists.parallel
Subject: Terra Computers
Date: 9 Sep 92 12:24:06 GMT
Distribution: fj

I am interested in getting information about Terra computers and their
philosophy and architecture.


 ----                                                                     ----
 --                    saroff@msc.edu       Minn Supercomputer Center,Inc   --
 -  Stephen Saroff      612/626 1854          1200 Washington Ave S          - 
 --                     Fax:624 6550          Minneapolis, MN 55415         --
 ----                                                                     ----
From: idacrd!desj@uunet.UU.NET (David desJardins)
Newsgroups: fj.mail-lists.parallel
Subject: Re: Fujitsu Unvells Ultra High Speed Supercomputer
Date: 11 Sep 92 12:19:24 GMT
Distribution: fj

Clifford Chen <cliffc@fujitsu.fai.com> writes:
>Fujitsu Limited today announced that it has developed and will begin
>marketing worldwide a new supercomputer capable of delivering
>unprecedented peak performance of 355 gigaflops (355 billion floating
>point operations per second) with only 222 processors -- a single
>processor performance level ten times greater than any parallel system
>available today.

I know there is little point in arguing with press releases, but the
Cray Y-MP C90 is certainly available today, and has parallel processors,
and offers 1 Gigaflop per processor, so I don't see how 1.6 Gigaflops
per processor can be a 10x improvement.

Not to mention that the CM-5 goes up to 16000 processors and 2000
Gigaflops.  Don't these guys read each other's press releases?  :-)

>The new system, called the VPP500 vector parallel processor, will be
>available for commercial shipment in September of 1993.

Off the top of my head, the price-performance point of this system
doesn't seem very attractive, especially for this time period.  At $122M
for the full system, a number which Fujitsu mysteriously forgot to
mention in the press release, that looks like at best $350K/GF.
(Systems of realistic size would presumably be worse.)  Aren't large TMC
and Intel systems currently around $250K/GF, and available this year?

Of course, peak Gigaflops aren't the measure of a computer system, but
since they are the measure that Fujistu chose to use....

>If Fujitsu's price/performance claims prove out, the product could
>represent a significant competitive challenge to Cray Research's
>flagship C-90," observes Industry Analyst Gary Smaby, president of the
>Smaby Group.

Perhaps Industry Analyst Gary Smaby knows something we don't.  Like what
those price/performance claims are.  What's the point of providing an
endorsement of the claims but not including the claims themselves?

                                        David desJardins
From: sxl2259@ritvax.isc.rit.edu
Newsgroups: fj.mail-lists.parallel
Subject: Truing Plus Language
Date: 4 Sep 92 17:42:31 GMT
Distribution: fj

Hi,

I am looking for Turing Plus for concurrent programming. Please tell me where
I can get it if you know about it. Thanks your time.


Bravo.
From: gusciora+@cs.cmu.edu (George Gusciora)
Newsgroups: fj.mail-lists.parallel
Subject: Pipeline performance analysis
Date: 14 Sep 92 12:31:04 GMT
Distribution: fj

I have a system which can be modeled by a large pipeline where the
stages of the pipeline perform an amount of computation which is dependent
on the particular data set which is passing through that stage (stages do
not perform the same amount of computation on each data set).  I'm
looking for some performance analysis work on similar problems.  If
you are familiar with this, please read on.

The basic overview of the model is this: each stage of the pipeline
performs the same amount of work over all of the sets of data
which must be processed.  However, the amount of computation done
at a stage varies according to which data item is flowing through
that stage.

A bit more precise (in case anyone wants to discuss this)
we consider a P-stage pipeline which is used to process n items of
data.  Label the amount of computation to be done on data item i at
stage j as Eij.  Between stages in the pipeline are large data buffers
which, for simplicity, we can assume are arbitrarily large.  The
pipeline is 'balanced' in such a way that for any stage j, the
sum E0j + E1j + ... Enj is equal to a similar sum constructed
at any other stage.

I would like some performance analysis of a system like this.  My guess
is that it will depend on the range and distribution of E*j for each stage.
Does anyone know of work done in analyzing the performance of systems
similar to this?  Since this is such a specific topic, please send replies
to me (gusciora@cs.cmu.edu) and I'll post a summary if people are
interested.

Thanks,
George Gusciora
gusciora@cs.cmu.edu
Department of Electrical and Computer Engineering
Carnegie Mellon University
From: tu@bert.eecs.uic.edu (Shengru Tu)
Newsgroups: fj.mail-lists.parallel
Subject: C* books or references wanted
Date: 8 Sep 92 13:38:02 GMT
Distribution: fj

For those who know C and Ada tasking, what is the good book to learn C*?

Forgive me if this is a FAQ.  Thanx.

-shengru
From: ananth@knife.cs.umn.edu (Ananth Grama)
Newsgroups: fj.mail-lists.parallel
Subject: References on parallel Simplex.
Date: 10 Sep 92 12:55:14 GMT
Distribution: fj

Hello all !

Would the enlightened care to share some of their wisdom and
mail me any references (the more recent the better) on parallel
formulations of the simplex algorithm and simplex with
integer solutions (?)..

Thanks in anticipation to all those who respond !

Ananth.
Army High Perf. Comp. Res. Ctr., Minneapolis.
(ananth@s1.arc.umn.edu)
From: cap@ifi.unizh.ch (Clemens Cap)
Newsgroups: fj.mail-lists.parallel
Subject: Parallel Programming Platform
Date: 9 Sep 92 15:13:47 GMT
Distribution: fj

Recently on this group there was a discussion about the advantages
and disadvantages of parallel programming platforms and concepts
like p4, PVM and LINDA. 

We want to draw the attention of this group to a similar approach
called <The Parform> and developed at the University of Zurich.
It is a parallel proramming model based on message passing and presently
implemented in a network of UNIX workstations. Efficient ports to
multiprocessor systems are planned for the near future. In principle
it may be compared to p4 and PVM, but The Parform has a number of 
interesting advantages:

  ** Heterogeneous prepartitioning of tasks
  ** Dynamic load balancing
  ** Very fast startup
  ** Direct and fast message transfer without demon activities
     and message copying
  ** Flexible and fast startup and shutdown procedures
  ** Support for heterogeneous architectures
  ** SPMD programming model

At claude.ifi.unizh.ch you can retrieve /pub/techreports/ifi-92.07.ps.Z
a technical report describing the new features and speedups of an 
early version of The Parform. A more detailed report on the application
and user interface of the present version will be available soon.  

For more information read the mentioned technical report or contact
cap@ifi.unizh.ch.
-- 
* Dr. Clemens H. CAP               cap@ifi.unizh.ch        
* Dept. of Computer Science        Phone +(1) 257-4326  (office)
* University of Zurich             Phone +(1) 322 02 19  (home)
* Winterthurerstr. 190             Fax   +(1) 363 00 35
From: olson@anchor.esd.sgi.com (Dave Olson)
Newsgroups: fj.mail-lists.parallel
Subject: Re: sgi/sun shared memory machines question
Date: 14 Sep 92 12:31:28 GMT
Distribution: fj

(I've removed the Distribution line; why limit things like this
to the US?)

In <1992Sep11.121830.17069@hubcap.clemson.edu> zilla@nj.nec.com (John Lewis) writes:
| Someone told me that the SGI multiprocessor machines cannot run
| different unix processes on different processors; they can only
| run a single (but possibly parallelized) process at a given time.

This is completely incorrect.  You can run multiple threads of
one process, or completely seperate processes on each CPU.

| The reason was said to be that the machines do not implement
| any mechanism for simultaneous writes.

There is a bus called the MP or Sync bus that handles cache
coherency issues.  If a process with multiple threads, or
seperate processes use shared memory, they need to provide
some mechanism (normally the hardware spinlocks or higher
level library routines based on them) to avoid attempts
at simultaneous access to the same memory locations (if
they care).

| Is the new sun multiprocessor (4/690?) similar?

It is 'similar' in that multiple processes can run on multiple
CPUs.  The exact methods used for semaphoring are different.
--
Let no one tell me that silence gives consent,  |   Dave Olson
because whoever is silent dissents.             |   Silicon Graphics, Inc.
    Maria Isabel Barreno                        |   olson@sgi.com
From: mike@meiko.com
Newsgroups: fj.mail-lists.parallel
Subject: Re: Synchonizing watches
Date: 4 Sep 92 17:42:48 GMT
Distribution: fj

In article <1992Sep3.123226.14205@hubcap.clemson.edu> you write:
>[I saw this on sci.logic. I thought it was a nice problem for this group.
>  steve]
>>From: dougs@tvnews.tv.tek.com (Doug Stevens)
>>Message-ID: <1992Sep1.234452.26917@tvnews.tv.tek.com>
>
>The problem is to devise a procedure such that A and B can, via their 
>telephone connection only, accurately synchronize their watches (to
>within a few seconds). The watches do not have to reflect time in the
>real world, but must match each other. Both A and B will know the procedure 
>before the call begins, and each will know whether he is A or B.
>
>Thanks for any help.
>

Have you checked out how NTP (network time protocol) is able to
sybchronise time between machines?  The obvious solution is to allow
both watches to stop, and set them both to the same arbitrary time -
OK they'd only be right once (or twice) a day but they would always
show the same time :-)

Mike

-- 
The "usual disclaimers" apply.    | ... many were weak and confused, succumbing
Mike Stok                         | to drink or drugs whenever possible ...
mike@meiko.com                    |
Meiko tel: (617) 890 7676         |                          Hunter S. Thompson
From: dpm@scs.leeds.ac.uk (D P Mallon)
Newsgroups: fj.mail-lists.parallel
Subject: req for info on Chorus, Express and VSM
Date: 7 Sep 92 12:19:33 GMT
Distribution: fj

I should be grateful for information relating to

a) Express.  I believe this is a dist/parallel operating system
   providing facilities for SVM, message passing, and process
   mapping.

b) The Chorus micro-kernel, and in particular its distributed
   shared memory subsystem.

References to papers, or preferably, ftp cites where information
and papers can be obtained would be useful.

Thanks.

Dave Mallon	dpm@scs.leeds.ac.uk
From: ghosh@CS.YALE.EDU (Bhaskar Ghosh)
Newsgroups: fj.mail-lists.parallel
Subject: load balancing references and Agarwal
Date: 10 Sep 92 12:54:52 GMT
Distribution: fj

I have received 36 messages with load balancing references and 10 with
Dharma Agarwal's email address. Thanks for all the responses. In a
week or so, i will post a more compact list of references we find
interesting.

- bhaskar.


-- 
===============================================================================
Bhaskar Ghosh   	    		"Tomar pujar chholey, 
ghosh@cs.yale.edu  @yalecs.bitnet        Tomay bhulei thaki"- Robithakur
===============================================================================
From: primeaux@wham-o.cs.utk.edu (David Primeaux)
Newsgroups: fj.mail-lists.parallel
Subject: using both picl and ipd
Date: 15 Sep 92 17:29:07 GMT
Distribution: fj

I have code for ipsc/860 which is crashing ("Segmentation violation, data
address D04458B4 at 000017E4").

The code is *not* hostless and
From: jbennett@sylow.esd.sgi.com
Newsgroups: fj.mail-lists.parallel
Subject: Re: sgi/sun shared memory machines question
Date: 11 Sep 92 19:37:51 GMT
Distribution: fj

In article <1992Sep11.121830.17069@hubcap.clemson.edu>,
zilla@nj.nec.com (John Lewis) writes:
|> Someone told me that the SGI multiprocessor machines cannot run
|> different unix processes on different processors;

I think someone was pulling your leg.  Of course our multiprocessors
an do this, it is the easiest style to implement.
|> they can only
|> run a single (but possibly parallelized) process at a given time.
|> The reason was said to be that the machines do not implement
|> any mechanism for simultaneous writes.

I assume he meant writes to memory.  Most memory is single ported,
for cost reasons, but there is dedicated memory per processor at
higher levels in the memory hierarchy.

Jim Bennett		(bennett@sgi.com)
From: mailrus!samsung!ulowell!cs.ulowell.edu!wex@uunet.UU.NET (Paul M. Wexelblat)
Newsgroups: fj.mail-lists.parallel
Subject: Re: Synchonizing watches
Date: 7 Sep 92 12:18:39 GMT
Distribution: fj

In article <1992Sep4.140840.25529@hubcap.clemson.edu>, pds@epcc.edinburgh.ac.uk (Patrick Surry) writes:
|> [...]

|> I don't think so.  A says "BONG" at t=0.  At t=AB, B hears "BONG" and
|> starts counting, saying "zero" at t=AB, "one" at t=AB+1, ...
|> A will hear "zero" at time AB+BA  - there is no way for A to know
|> what number B has reached because A won't hear it for another BA seconds.
|> 
|> I think the earlier proof that no solution exists looked right.

AARGH, Never Mind

You are perfectly right

-- 
You are in a maze of twisty little passages, all alike.

	...Wex
From: kondrup@iesd.auc.dk (Keld Kondrup Jensen)
Newsgroups: fj.mail-lists.parallel
Subject: Re: Linda Semantics.
Date: 11 Sep 92 12:19:44 GMT
Distribution: fj

Hi there,

Concerning the paper "The Semantics of a Parallel Language based on a
Shared Data Space" announced as available for anonymous ftp from
iesd.auc.dk in the directory Linda/shsem.ps.Z: I forgot to give read
permissions to the Linda directory---the error should be corrected by
now.  Sorry for the inconvenience.

Keld.
--
 Keld Kondrup Jensen:            Department of Computer Science          /
 --------------------            Aalborg University,                .__//|
 e-mail: kondrup@iesd.auc.dk     Frederik Bajers Vej 7             /   / (
 phone: (+45) 98 15 85 22        DK 9220 Aalborg {\O}, Denmark    A   U   C
From: ojuarez@mtecv2.mty.itesm.mx (Octavio Juarez Espinosa)
Newsgroups: fj.mail-lists.parallel
Subject: looking for samples in Linda
Date: 15 Sep 92 12:59:40 GMT
Distribution: fj

Hi,

I'll appreciate it if you send me some samples in Linda. I am very
interested in learning Linda.

Thanks in advance.

Sincerely,

Octavio Juarez Espinosa
ojuarez@mtecv2.mty.itesm.mx

-- 
Octavio Juarez Espinosa
Gabriel Valerio 1134 
Saltillo, Coahuila    CP 25000
Mexico  email ojuarez@mtecv2.mty.itesm.mx
From: nikhil@crl.dec.com (R.S. Nikhil)
Newsgroups: fj.mail-lists.parallel
Subject: Re: EM-4(?) Question
Date: 4 Sep 92 17:42:40 GMT
Distribution: fj

In article <1992Sep4.015211.25673@cis.ohio-state.edu>, martens@python.cis.ohio-state.edu (Jeff Martens) writes:
> In a recent report posted to the net, David Kahaner said that the
> interconnect used in one (or all?) of the EM-3/4/5 family is the
> "processor omega with deadlock-free mechanism."
> 
> What exactly is the processor omega?  Is it similar to the
> homogenous circular shuffle (aka single-stage cube, used in the
> Man-Yo)?

I think it means the following:

   In a conventional picture of an omega network, you see an interconnection
   of switching nodes with N inputs on the left and N outputs on the right;
   a processor is typically connected to an input on the left column and the
   corresponding output on the right column.

   In the EM-4, the inputs on the left are just wired around to corresponding
   outputs on the right.  A processor hangs off each switching node.   Each
   switching node is a 3x3 crossbar;  2 inputs and outputs are used for the
   omega interconnection  and the 3rd input and output is connected to the
   processor.  In fact, the 3x3 switch is on the processor chip itself.

Nikhil  (nikhil@crl.dec.com)
From: Dominique.Bennett@cerfacs.fr
Newsgroups: fj.mail-lists.parallel
Subject: Parallel and Distributed Computing
Date: 9 Sep 92 12:24:19 GMT
Distribution: fj


                SEMINAR ON PARALLEL AND DISTRIBUTED SYSTEMS

        Architecture,Software,Connectivty and Applications
        Toulouse, September 14 - 16 th, 1992

Dans l'intention de mieux faire connaitre les travaux effectues a u
sein des laboratoires de l'IBM Research Division, IBM organise
conjointeme nt avec le CERFACS, un seminaire sur le Theme:

                PARALLEL AND DISTRIBUTED COMPUTING

Ce seminaire dont le programme est joint, se propose de faire la point
sur l'etat des recherches dans les domaines cles du developpement de
l'informatique scientifique.

Il se deroulera au Centre International de Conference de METEO-FRANCE
42 Av Gustave Coriolis a Toulouse les 14 15 et 16 Septembre prochains.

Ce seminaire est entierement gratuit, veuillez cependant confirmer
votre participation aupres de:

                         Mlle Dominique Bennett
                         Email: Dominique.Bennett@cerfacs.fr
                         Voice: 61 19 30 03


-----------------------------------------------------------------------------

                                PROGRAM


Septembre 14th:

   Morning Sessions: Architecture and Hardware

     09:00  Highly Parallel Systems research -- Z. Barzilai
            Advanced Risc Work Stations, Clustering -- M. Blasgen
            AGORA: A Workstation Environment for Scientific Collaboration
                   -- R. Orcutt
     12:30  LUNCH

     Afternoon Sessions: Parallel and distributed Systems software

     14:00  Parallel Systems Software -- F. Allen
            Distributed Systems Software -- S. Yemeni
            Advanced Algorithms & Applications -- P. Patnaik
     17:30  ADJOURN

September 15th:

     Morning Sessions: High speed Communications/Applications

     09:00  High Speed Networks and Multimedia -- A. Baratz
            Gigabit Networks -- W. Bux
            Graphics Systems Applications -- B. Liang

     12:30  LUNCH

     Afternoon Sessions: Applications (Continued)

     14:00  Power Visualisation System -- A. Garcia
            The Watson Central RS/6000 computer Cluster
            Dependable Computing for Critical Applications -- A. Goyal
     17:30  ADJOURN

September 16th:

     Whole Day: Workshop on RS/6000 Clusters

     09:00  Participants from Cornell Supercomputing Center, Fermi Lab and
            Florida State University

     12:30  LUNCH

     14:00  Participants from french and European Research Centers
     17:00  Open discussion et lancement du Club Cluster


--
Ralph P. Sobek                         Ralph.Sobek@laas.fr, ralph@laas.fr
LAAS-CNRS                              ralph@laas.uucp, ou ...!inria!laas!ralph
7, avenue du Colonel-Roche / 31077 Toulouse Cedex              tel. 61-33-62-66
Telephone: (+33-)61-33-62-66  FAX-1: (+33-)61-33-64-55 FAX-2: (+33-)61-55-35-77
===============================================================================
From: rsaripa@saturn.cs.clemson.edu (Saripalli Ramakrishna)
Newsgroups: fj.mail-lists.parallel
Subject: Survey of parallel and distributed systems!.
Date: 7 Sep 92 12:19:42 GMT
Distribution: fj

Hi,

	I am trying to find out which of the two systems would most people prefer to use?.

	1) Distributed Memory system(Like hypercubes or Heterogenous systems connected by networks)
	2) Shared Memory system like BBN Butterfly and others ...

	
	Which of the above 2 systems would people prefer to use ?.

	
		1) The criteria used to judge the above question would be ,among others ...
			a) Efficiency.
			b) Ease of programming.
			c) Underlying software ( Operating systems and Compilers).
			d) Flexibility 
			e) Configuration 
			f) cost.

			and others.


	I would like people to send me e-mail stating what would be their preference and why?.
	Assume that you are the only user running on the system.


	I would really appreciate it.

								Thanks a lot,
						Saripalli Ramakrishna


e-mail : rsaripa@cs.clemson.edu
Man is a beast and usually has no control over his passions.
From: sim@ecst.csuchico.edu (Seung Bae Im)
Newsgroups: fj.mail-lists.parallel
Subject: Access to Parallel computers?
Date: 11 Sep 92 12:19:27 GMT
Distribution: fj

Hello
I am a professor teaching parallel processing in an introductory
course. Once I read a message in this group which offered an access
to a parallel processor through the Internet.
I'd like my students have some experience in parallel programming.
I need netters' HELP here!!
Thank you in advance

Seung Bae Im
California State University
Chico, CA
From: maniattb@cs.rpi.edu (Bill Maniatty)
Newsgroups: fj.mail-lists.parallel
Subject: Re: Synchonizing watches
Date: 7 Sep 92 12:19:15 GMT
Distribution: fj

In article <1992Sep4.174143.13747@hubcap.clemson.edu>, mln@sunkj.larc.nasa.gov (Michael L Nelson) writes:
|> I must be missing something here, because this looks quite simple.
   [....]
It isn't quite this simple :-)
|> 
|> -A & B already know this procedure.
|> 
|> A: says "Bing" to B
|>    B responds with "Bing" to A
|> 
|> this is ABBA time - the total delay
True
|> 
|> A:
|> 1. says "Bong"
I assume you want A to say "Bong" when A hears B's "Bing"
Then when B hears the "Bong" B will have sufficient information to compute
BA + AB == AB + BA, Otherwise B cannot know AB + BA
|> 2. waits, say N minutes (N > ABBA) 
|> 3. says "Bong" again
|> 
|> B already knows what N is, and can then determine
|> What AB is (Bong2 - Bong1 - N)
This is not the case.

	T0 A Goes Bong
	T1 B hears Bong = T0 + AB
	T2 A Goes Bong Second Time = T0 + N
	T3 B Hears Bong = T0 + AB + N
Please note that AB is undetermined (B lacks sufficient information
to determine this).  The problem lies in the fact that A and B do not
share the clock, but each keep their own local clocks, which are not currently
synchronized (as per the given).
|> 
|> B tells A what AB time is.
B does not have the value for AB.
|> 
|> A says "Bang" and waits AB time before zeroing
|> the watch
A does not have the value of AB computed
|> 
|> When B hears "Bang", B immediately zero's the watch
|> 
|> synchronized
Not quite.
|> 
|> Michael Nelson
|> 

Bill
-- 
|
|	maniattb@cs.rpi.edu - in real life Bill Maniatty
|
From: gkwan@balboa.eng.uci.edu (Greg Kwan)
Newsgroups: fj.mail-lists.parallel
Subject: Determining physical nodes on Intel iPSC/2?
Date: 9 Sep 92 12:24:06 GMT
Distribution: fj

Does anyone know of a way to determine on which physical node a
process is running on the iPSC/2? Intel gave an undocumented/
unsupported call, but it returns unexpected values. For example,
when allocating a 16 node cube, it returned:
node  0 = 512, node  1 = 513, node  2 = 516, node  3 = 517,
node  4 = 520, node  5 = 521, node  6 = 524, node  7 = 525,
node  8 = 528, node  9 = 529, node 10 = 532, node 11 = 533,
node 12 = 536, node 13 = 537, node 14 = 540, node 15 = 541.

Are these just offset by the number 512? Currently, our cube
only has 30 nodes (2 compute nodes are defective), but it
appears that the intermediate physical locations would be
present in a fully allocated (32 node) cube. To put it an-
other way, how would one determine how many links a message
passes through from one node to another?

Thanks for any help.

greg

gkwan@balboa.eng.uci.edu