From: torrie@cs.stanford.edu (Evan Torrie)
Subject: Re: The return of the 040 vs 486 thread..Re: My next machine: Amiga or PC Clone? Help me out.
Originator: torrie@Xenon.Stanford.EDU
Organization: CS Department, Stanford University, California, USA
Date:  8 Oct 92 03:34:21 GMT

pss1@kepler.unh.edu (Paul S Secinaro) writes:

>I'm aware that PCLK is 50MHz.  A PLL is used to synchronize PCLK and
>BCLK internally, not to double PCLK.  But hey, don't take my word for
>it...I thought the same as you did the last time this issue surfaced,
>but then a Moto employee (Skipper Smith, I believe?) posted to the
>contrary.

  Here's Skipper's clarification as posted to c.s.a.a.

>Newsgroups: comp.sys.amiga.advocacy
>Path: CSD-NewsHost.Stanford.EDU!stanford.edu!ames!sun-barr!cs.utexas.edu!oakhill!motaus!skipper
>From: skipper@motaus.sps.mot.com (Skipper Smith)
>Subject: Re: amiga 3000 or 486 ?
>Message-ID: <1992Jul1.181700.29268@motaus.sps.mot.com>
>Organization: Motorola Semiconductor, Austin, Texas
>References: <190676@ipl.jpl.nasa.gov> <1992Jun27.093415.6725@sarah.albany.edu> <190943@ipl.jpl.nasa.gov>
>Date: Wed, 1 Jul 1992 18:17:00 GMT
>Lines: 54
>
>>
>>Well, I like stuff like this better than that sleazy advertisement of Motor-
>>ola's, but I still take benchmarks with a large grain of salt.  Incidentally,
>>the Gateway 2000 is a 25/50 MHz machine, not a true 50 MHz machine, which
>>should put it roughly equivalent to the Quadra 700.
>
>For some reason, most people seemed to be suprised that I agree with you,
>Paul. The ad that Motorola ran was not only poorly thought out, it was just
>plain wrong.  Apparently quite a few people were suckered in, just like you.
>The offending line in question is,"That's especially true when the Macintosh
>is powered by a 68040.  With two on-chip caches and an internal 50 MHz clock,
>the 68040 outruns everything in its class."  This line has led you and many
>other people to believe that the 68040 is running similar to the 80X86DX2
>chips from our competitor, which they are not.  The 68040 uses the 50 MHz
>input clock as an input to the Phase Lock Loop.  Other than that, the 25 MHz
>clock is used for the ALU, for the caches, for the MMUs, and for the pipeline-
>It is NOT a DX2 equivilent.  The person who wrote the ad copy for that as
>apparently believed that the customers who read it would believe that MHz is
>at least as important as throughput and so added that line in.  I have 
>requested that the person's kneecaps be shot off :)  According to all the
>numbers Intel has produced that are at least halfway legitimate, the 80486DX2  
>at 25 MHz performs somewhere between the level of a 33 MHz chip and a 40 MHz
>chip, putting it (integer only) somewhere between a 25 MHz and 33 MHz 68040.
>If pure performance is what you were talking about when you said "roughly
>equivalent," then what I have said here does not apply to you.  It still 
>applies to a lot of other people who I have talked to since this ad ran, 
>though.
>
>
>-- 
>Skipper Smith                             | skipper@wmtowdc.sps.mot.com
>Motorola Technical Training               | 8945 Guilford Rd  Ste 145  
>All opinions are my own, not my employers | Columbia, MD 21046
-- 
------------------------------------------------------------------------------
Evan Torrie.  Stanford University, Class of 199?       torrie@cs.stanford.edu 
Embrace rationalism, reject superstition.           Break away from the past.