HDTenEightyP/NetNews huggingface dataset:
From: gbs@comp.lancs.ac.uk (Gareth B Smith)
Newsgroups: comp.security.misc
Subject: Logging Anonymus FTP on an IBM RT
Date: 28 Jan 93 12:25:32 GMT
Organization: Department of Computing at Lancaster University, UK.

I used a shell script (/usr/lpp/tcpip/samples) to create an anonymous
ftp account on my RT.
This creates users "anonymous" and "ftp" and a directory for them.
Is there any way I can keep track on this account, such as
when someone logged in, where from, what did they give as the password,
etc. anything at all really.

Any ideas?
Thanks,

Gareth
______________________________________________________________________________
Gareth Smith             | Department of Computing, University of Lancaster,
gbs@comp.lancs.ac.uk     | Bailrigg, Lancaster, LA1 4YR , U.K.
...!mcvax!ukc!dcl-cs!gbs | FAX:+44 (0)524 381707 PHONE:+44 (0)524 65201 Ex3793
______________________________________________________________________________
Newsgroups: comp.security.misc
From: carl@montebello.ecom.unimelb.EDU.AU (Carl Brewer)
Subject: Re: Unix Viruses. Are there any??
Organization: Dept. Engineering Computer Resources, Melbourne Uni.
Date: Sat, 23 Jan 1993 03:50:00 GMT

In article <1jotp8INNiu@matt.ksu.ksu.edu> probreak@matt.ksu.ksu.edu (James Michael Chacon) writes:
>senetza@sigma.uleth.ca (Len Senetza) writes:
>
>>so, get the source for something like ls (it's on ftp.uu.net).  then
>>modify it so that it attaches a binary file which does x (x can be
>>innocuous [print a smilie on the console] or destructive [halt]) to a
>>system command (mkdir) which is installed suid.  then, go talk to the
>>sysadmin and tell them that there is something wrong with your
>>directory.  when they cd to it and do an 'ls' (your version), bango --
>>virus.  this 'x' thing that the binary file does can also include
>>copying itself to other programs.

1: this is a trojan horse, not a virus.

>
>>so, if root executes your ls, then x is attached to some program in the
>>system.  have your x only do it to programs which are suid.  then it's
>>all over the place; memory protection and file access controls fail
>>here.
>
>>this assumes that root has . in its path, and how many root accounts
>>out there do?
>
>No, this assumes root has . at the FRONT of his/her path. This of course is
>extremely stupid and I believe covered in the FAQ.
>
>A scenerio like this assumes that the sysadmin is a pretty trusting person
>and probably already has large security holes in the system.

a scenario like this assumes that the sysadmin should not be a sysadmin.

-- 
 Annal  Natrach, Usthvah Spethed,         carl@ecr.mu.oz.au (IRC: Bleve)
 Dochoel Dienve                           carl@munagin.ee.mu.oz.au
					  carl@montebello.ecom.unimelb.EDU.AU
 Merlin, where are you?  Call your dragon, to weave a mist...
Newsgroups: comp.security.misc
From: phardie@nastar.uucp (Pete Hardie)
Subject: Re: Unix Viruses. Are there any??
Organization: Digital Transmission Systems, Duluth, GA.
Date: Mon, 25 Jan 1993 16:50:28 GMT

In article <1jotp8INNiu@matt.ksu.ksu.edu> probreak@matt.ksu.ksu.edu (James Michael Chacon) writes:
>No, this assumes root has . at the FRONT of his/her path. This of course is
>extremely stupid and I believe covered in the FAQ.
>
>A scenerio like this assumes that the sysadmin is a pretty trusting person
>and probably already has large security holes in the system.

Or that the virus writer names the file 'sl' and waits for the hurried sysadmin
to browse the boobytrapped directory.

-- 
Pete Hardie:  phardie@nastar  (voice) (404) 497-0101
Digital Transmission Systems, Inc., Duluth GA
Member, DTS Dart Team           |  cat * | egrep -v "signature virus|infection" 
Position:  Goalie               |
Newsgroups: comp.security.misc
From: op@holmes.acc.Virginia.EDU (Olaf  Pors)
Subject: Re: Why doesn't Sun provide the Crypt program in their OS?
Keywords: crypt
Organization: University of Virginia
Date: Fri, 22 Jan 1993 15:45:25 GMT

In article <1jjocqINNn4i@menudo.uh.edu> pleticha@casc.math.uh.edu (Dennis Pleticha) writes:
>I've been trying to find out why I can't get the crypt application
>directly from Sun for months now.  All I want to do is encrypt a file
>with a password for safe keeping and transmitting over unsecure
>networks.  The libraries are there and I suppose I could write a 
>program to do it, and even the Sun man page talks about the application
>but where the hell is the damn thing?  Sorry, but it seems like such
>a simple thing to ask of a vendor that I've lost all my patience.
>
>Any and all help would be greatly appreciated.

  I'm in a similar situation.  I looked at the SunOS Encryption
Kit which accompanied our SunOS 4.0 release tapes, but installing
it would not have been simple, since we are now running 4.1.1 or
higher, and the Encryption Kit is rather invasive.
I also didn't know whether the SunOS "crypt" at 4.1.1 still
used old-style encryption or DES encryption.  We are a
"domestic" site, eligible for DES, but that doesn't
convince me that Sun supplied us with the correct "crypt".

  I finally realized that it is silly to waste any time on
DES, since its 56-bit keys make it susceptible to brute-force
attacks.  I am now looking at the IDEA code in PGP 2.1, to
try to lift out the IDEA encryption code just to use at
UVa to provide a safe encryption method for our users.
Perhaps you would want to do the same.

Olaf Pors
University of Virginia
op@Virginia.EDU
From: jm67@hydra.gatech.edu (MURRAY,JEFFREY P)
Newsgroups: comp.lsi
Subject: Re: XSPICE Simulation Tool Announcement
Date: 27 Jan 93 14:01:49 GMT
Followup-To: comp.lsi
Organization: Georgia Institute of Technology
In-reply-to: jm67@hydra.gatech.edu's message of 22 Jan 93 18:35:15 GMT


   I have gotten a lot of email reqesting more information about 
XSPICE; particularly, most folks seem to want to get more info on
the tools prior to reqesting a copy. This is a reasonable request,
unfortunately, we do not currently have the resources to do much
toward that end, at least not in real time. I may try to get more
information in the form of a spec sheet or attempt to move portions
of the User's Manual onto the xspice@gtri.gatech.edu host machine
to allow for anonymous FTP of that information. In the mean time,
I am trying to answer as many of the questions I receive as possible...
please bear with me.

   For those of you who just can't wait (and I hope there are at least
a few of you ;-), let me suggest that you get hold of your nearest
technical library, and obtain a copy of the Proceedings of the 1992
International Symposium on Circuits and Systems. One of the papers
presented (authors are F.Cox, W.Kuhn, S.Tynor and myself) introduces
XSPICE and details an example of syntax, lists the models included,
and works through an example using XSPICE to simulate the analog and
digital portions (all in one netlist) of a MIDI-controlled music
synthesizer. The paper should provide enough information to cover the
most basic questions that have come up, but I will continue to see
about getting all or portions of the User's Guide up and running.

Again, bear with me. XSPICE is not a commercial product, just as
"plain vanilla" SPICE is not...we don't have the resources of a
MicroSim (=PSPICE) to promote the tools or help new users, although we
would certainly like to. The "cost" of XSPICE is really just for
documentation, cutting tapes, etc. and doesn't provide any real margin
for support...we want folks to use these tools because we know ourselves
how powerful they are. We are convinced that XSPICE provides most of the
capabilities of a PSPICE and in many ways goes beyond it; it's up to the
user community to decide if we're right.

   Regards,

   Jeff Murray

--
MURRAY,JEFFREY P
Georgia Institute of Technology, Atlanta Georgia, 30332
uucp:	  ...!{decvax,hplabs,ncar,purdue,rutgers}!gatech!prism!jm67
Internet: jm67@prism.gatech.edu
From: jm67@hydra.gatech.edu (MURRAY,JEFFREY P)
Newsgroups: comp.lsi.cad
Subject: XSPICE Simulation Tool Discussion
Date: 28 Jan 93 13:55:30 GMT
Organization: Georgia Institute of Technology



   I have gotten a lot of email reqesting more information about 
XSPICE; particularly, most folks seem to want to get more info on
the tools prior to reqesting a copy. This is a reasonable request,
unfortunately, we do not currently have the resources to do much
toward that end, at least not in real time. I may try to get more
information in the form of a spec sheet or attempt to move portions
of the User's Manual onto the xspice@gtri.gatech.edu host machine
to allow for anonymous FTP of that information. In the mean time,
I am trying to answer as many of the questions I receive as possible...
please bear with me.

   For those of you who just can't wait (and I hope there are at least
a few of you ;-), let me suggest that you get hold of your nearest
technical library, and obtain a copy of the Proceedings of the 1992
International Symposium on Circuits and Systems. One of the papers
presented (authors are F.Cox, W.Kuhn, S.Tynor and myself) introduces
XSPICE and details an example of syntax, lists the models included,
and works through an example using XSPICE to simulate the analog and
digital portions (all in one netlist) of a MIDI-controlled music
synthesizer. The paper should provide enough information to cover the
most basic questions that have come up, but I will continue to see
about getting all or portions of the User's Guide up and running.

Again, bear with me. XSPICE is not a commercial product, just as
"plain vanilla" SPICE is not...we don't have the resources of a
MicroSim (=PSPICE) to promote the tools or help new users, although we
would certainly like to. The "cost" of XSPICE is really just for
documentation, cutting tapes, etc. and doesn't provide any real margin
for support...we want folks to use these tools because we know ourselves
how powerful they are. We are convinced that XSPICE provides most of the
capabilities of a PSPICE and in many ways goes beyond it; it's up to the
user community to decide if we're right.

   Regards,

   Jeff Murray
--
MURRAY,JEFFREY P
Georgia Institute of Technology, Atlanta Georgia, 30332
uucp:	  ...!{decvax,hplabs,ncar,purdue,rutgers}!gatech!prism!jm67
Internet: jm67@prism.gatech.edu
From: sbkumar@lub001.lamar.edu
Newsgroups: comp.lsi.cad
Subject: .MODEL PARAMETERS FOR NMOS AND PMOS  TRANS
Date: 20 Jan 93 21:33:12 +1700
Organization: Lamar University - Beaumont

hi,

i need .MODEL PARAMETERS FOR PMOS AND NMOS  TRANSISTOR FOR SPICE (ALL LEVELS) 
SIMULATION.
	I would like to know if this is available in public 
domain so that i ftp it. I would really appreciate it if any one
can mail it or proivide more information on getting it.

	Thanks  in advance.

	Gopal.

ps: since i am posting this through my friends account please
reply at ee_pug@cs4.lamar.edu
From: shuang@balboa.eng.uci.edu (Sheng Huang)
Subject: 0.8um parameter file for IRSIM
Newsgroups: comp.lsi.cad
Reply-To: shuang@balboa.eng.uci.edu (Sheng Huang)
Organization: University of California, Irvine
Date: 26 Jan 93 00:18:49 GMT

Could you tell me where/how to get a 0.8u (MOSIS process) parameter file 
for IRSIM?
 
Please e-mail me. Thanks in advance.
 

-- 
Sheng Huang
UC Irvine
shuang@balboa.eng.uci.edu
From: rahard@eeserv.ee.umanitoba.ca (Budi Rahardjo)
Newsgroups: comp.lsi.cad
Subject: Looking for asynchronous tools
Keywords: asynchronous
Date: 28 Jan 93 03:50:19 GMT
Organization: Electrical Engineering, U of Manitoba, Winnipeg, Manitoba, Canada

I am looking for tools (CAD) for designing/simulating/testing asynchronous
circuits. Is there such beast available on the Internet ?
How about commerical ones ?

Thanks,

-- budi
--
Budi Rahardjo
<rahardj@ccu.umanitoba.ca>      <rahard@ee.umanitoba.ca> 
Electrical Engineering - University of Manitoba - Canada
From: ellen@opua.Berkeley.EDU (Ellen M. Sentovich)
Newsgroups: comp.lsi.cad
Subject: Re: SIS (latest MIS version) : Correction
Date: 24 Jan 1993 02:20:40 GMT
Organization: University of California, Berkeley
Distribution: na
Reply-To: ellen@opua.Berkeley.EDU (Ellen M. Sentovich)
NNTP-Posting-Host: opua.berkeley.edu

The UC Berkeley ILP software distribution office has changed
it's address (so the one I posted in an earlier message is
incorrect).  The correct address is as follows:

		EECS/ERL Industrial Support Office
		205 Cory Hall
		U.C. Berkeley
		Berkeley, CA   94720

For email, they are at: "ilpsoft@berkeley.edu".

		- Ellen

-- 
Ellen M. Sentovich
Dept of EECS
UC Berkeley
ellen@ic.Berkeley.EDU
From: mz@ecs.soton.ac.uk (Mark Zwolinski)
Newsgroups: comp.lsi.cad
Subject: Re: What are Simulator/Hardware accelerators ?
Date: 22 Jan 93 13:23:08 GMT
Reply-To: mz@ecs.soton.ac.uk (Mark Zwolinski)

In article <1993Jan18.013801.22802@netcom.com>, hage@netcom.com (Carl Hage) writes:
>patel@key.amdahl.com (Chandresh Patel) writes:

[stuff deleted]
>
>There is now a third type of machine, such as produced by Quickturn and
>PiE Design Systems, which convert a netlist into a set of partitioned FPGA
>gate level circuits, then download the circuits into a set of Xilinx (or
>equivalent) FPGAs mounted on boards with programmable and observable
>interconnect. The FPGA circuit becomes a breadboard equivalent for
>the actual hardware, and might run only a few times slower than the actual
>hardware being simulated.

Do you (or indeed, anyone else) have any information on these systems?  If 
so, please post or mail to me.  Thanks


Dr Mark Zwolinski					mz@ecs.soton.ac.uk
Department of Electronics and Computer Science		Tel. (0703) 593528
University of Southampton				Fax. (0703) 593045
Southampton SO9 5NH, UK
Newsgroups: comp.lsi.cad
From: balmond@incaltd.demon.co.uk (Brian Almond)
Subject: Re: What are Simulator/Hardware accelerator
Reply-To: balmond@incaltd.demon.co.uk
Distribution: world
X-Mailer: cppnews $Revision: 1.30 $
Organization: InCA Ltd
Date: Mon, 25 Jan 1993 15:55:22 +0000

In article <4025@key.COM> patel@key.amdahl.com writes:
> 
> The third is (originally from UK?)
> InCA, Inc

Inca's e-mail contact address is balmond@incaltd.demon.co.uk

--
Brian Almond                          InCA Ltd
From: mmartin@jhunix.hcf.jhu.edu (Mark Noel Martin)
Newsgroups: comp.lsi.cad
Subject: Magic, Octtools on SGIs
Date: 28 Jan 1993 18:49:24 -0500
Organization: Homewood Academic Computing, Johns Hopkins University, Baltimore, Md, USA
Distribution: world
NNTP-Posting-Host: jhunix.hcf.jhu.edu

	We have recently goten a Silicon Graphics Indigo here in our lab.
I was wondering if anyone has been successful in compiling any of the following
tools on this machine.

Magic 6.45
Octtools 5.1
Analog 

Any comments or hints would be greatly appreciated.

Thanks


=====================================================================
Mark N. Martin                     Email: mmartin@olympus.ece.jhu.edu
Department of Electrical           
and Computer Engineering                    Tel :  (410) 516 - 6197
The Johns Hopkins University                FAX :  (410) 516 - 5566
105 Barton Hall / 3400 N. Charles Street
Baltimore, MD 21218-2686
=====================================================================
From: patel@key.amdahl.com (Chandresh Patel)
Newsgroups: comp.lsi.cad
Subject: Re: What are Simulator/Hardware accelerator
Date: 22 Jan 93 23:28:23 GMT
Reply-To: patel@key.amdahl.com
Distribution: world
Organization: Amdahl Corporation, Advanced System Division

In article 331E8660@SATURN, mz@ecs.soton.ac.uk (Mark Zwolinski) writes:
> In article <1993Jan18.013801.22802@netcom.com>, hage@netcom.com (Carl Hage) writes:
> >patel@key.amdahl.com (Chandresh Patel) writes:
> 
> [stuff deleted]
> >
> >There is now a third type of machine, such as produced by Quickturn and
> >PiE Design Systems, which convert a netlist into a set of partitioned FPGA
> >gate level circuits, then download the circuits into a set of Xilinx (or
> >equivalent) FPGAs mounted on boards with programmable and observable
> >interconnect. The FPGA circuit becomes a breadboard equivalent for
> >the actual hardware, and might run only a few times slower than the actual
> >hardware being simulated.
> 
> Do you (or indeed, anyone else) have any information on these systems?  If 
> so, please post or mail to me.  Thanks
> 
> 
> Dr Mark Zwolinski					mz@ecs.soton.ac.uk
> Department of Electronics and Computer Science		Tel. (0703) 593528
> University of Southampton				Fax. (0703) 593045
> Southampton SO9 5NH, UK


The oldest in the business is: 
Quickturn Systems, Inc
325 East Middlefield Rd
Moutain View, CA 94043
(415) 967 3199
lentini@qcktrn.com

The other is:
PiE Design Systems, Inc
757 N. Mary Ave
Sunnyvale, CA 94086
(408) 738 8899
jcg@pie.com

The third is (originally from UK?)
InCA, Inc
Integrated Circuit Applications
Gibbs House, Kennel Ride
Ascot, Berkshire
SL5 7NT, UK

+44 344 890575

In US their office is at:
InCA, Inc.
51 East Campbell Ave Suite 110-E
Campbell, CA 95008
(408) 986 8800

Enjoy,

Chandresh Patel			Amdahl Advanced Systems, Fremont CA
patel@key.amdahl.com


Newsgroups: comp.lsi.cad
From: amit@hard23.acri.fr (Amit Erez)
Subject: Pin assignment
Keywords: pin assignment, algorithm, program
Reply-To: amit@hard23.acri.fr
Organization: ACRI
Date: Thu, 21 Jan 1993 08:40:24 GMT


I am in the process of implementing a large project composed of
chips (of various types) packaged in packages (various types) and mounted
on PCB.

Since all the chips are designed in-house, and we have full control 
over the process, we are making it in a top-down manner. e.g we start
with a connectivity based placement of the different packages on the PCB, 
and by usage of the connectivity we want to assign chips IO signals to the 
package pins in a optimized way.

I am looking for a program that can do the job. 

	- It has to be good enough to respect Vendor constraints (like 
          input only package pins, pre-assigned tester pins, etc).

	- It must be smart enough to consider the situation when a chip 
	  is used more then once on the board, thus not optimizing 
	  differently in each package...

	- It should be able to take pre-assigned pins, and complete
	  the job by respecting it.

	- It should be able to use a metrics more complex then 
	  the obvious geometric, where different package inputs pins 
	  have different levels of capacitance.


My questions:

1. Does anybody know of any commercial software that can do that job?

2. Could anybody send me any reference to papers or dissertations which 
   attack this problem?

Thanks in advance.

---
Amit Erez
Advanced Computer Research Institute	Phone:	(+33) 72 35 84 59
1, Bld Marius Vivier-Merle		Fax:	(+33) 72 35 84 10
F-69443	LYON CEDEX 03			Email:	amit@acri.fr
From: lokanthn@bucknell.edu (arumugamangalam lokanathan GR)
Newsgroups: comp.lsi.cad
Subject: Question about OCTTOOLS
Date: 26 Jan 1993 08:34:37 GMT
Organization: Bucknell University, Lewisburg, PA
Distribution: world
NNTP-Posting-Host: acrux.cs.bucknell.edu
Keywords: OCTTOOLS, Musa, Magic.

I have had the following problem with OCTTOOLS for a while now :

I CANNOT SIMULATE PHYSICAL OCT FACETS USING MUSA.

For example :

I laid out a simple nand gate in  "Magic" and using "mag2oct" I got a physical

octfacet called "nand:physical". 

nand:physical has inputs "a" and "b" and output "O".

The properties of the cell as shown by the command "bdnet -n nand:physical" are

________________________________________________________________
 
MODEL "nand":physical;

TECHNOLOGY scmos;
VIEWTYPE PHYSICAL;
EDITSTYLE PHYSICAL;
INPUT "a";
INPUT "b";
OUTPUT "O";
GROUND "GND!";
SUPPLY "Vdd!";

ENDMODEL;

___________________________________________________________________

When I simulate this cell with musa, "O" is "unknown" regardless of "a" and "b".

Further I can assign a value to "O", which means musa is treating "O" as any other

input. 



ARE THERE ANY OCTTOOLS EXPERTS WHO KNOW OF A SOLUTION TO THIS PROBLEM ?

I would appreciate any help you have to offer.

You are welcome to email your suggestions directly to me at

lokanthn@pleiades.cs.bucknell.edu

Loki
Newsgroups: comp.lsi.cad
Subject: Re: Looking for hard to simulate MOS circuit(s)
From: michele@deis21.cineca.it (Michele Favalli)
Date: 23 Jan 93 10:22:32 +0100
Distribution: world
Organization: Dept. of Electronics, Computer Science & Systems, Univ. of Bologna, Italy

In the anonymous ftp site "mcnc.mcnc.org", in the directory 
/pub/benchmark/CircuitSim90 there are benchmarks giving 
problems to electrical level simulators (CaZm, SPICE ...) 
and some documentation.                                          

Ciao Michele

Newsgroups: comp.lsi.cad
From: glenn@sm.luth.se (Glenn Jennings)
Newsgroups: comp.lsi.cad,comp.lsi,alt.cad
Subject: Help with BDNET please
Keywords: BDNET, BDSYN, Octtools, Berkeley Tools, Netlisting
Date: 26 Jan 93 15:14:14 GMT
Followup-To: comp.lsi.cad
Organization: University of Lulea, Sweden

For you OCTTOOLS experts, from a beginner:  BDNET questions please !

1) is there something like BDSYN's "SYNONYM" function in BDNET to create new
   named (and local) bundles by picking and choosing bits from other
   bundles (bit vectors), for example:

      NEW_INTERNAL_SIGNAL<4:0> = IN_A<2> & IN_B<2> & IN_B<2> & LOCAL<3:2>;

  ...or something like this ?  I hope the answer is not:
   
    a) I have to keep track of all individual bits myself in terms of their
       ultimate source or destination names:
         (in that case the problem still occurs if I want to tie a primary
          input directly to a primary output, doesn't it ?)

       or

    b) actually wire them through a dummy bdsyn module that does the
       bit-gathering for me and passes out my new bit vector...

2) does more complete BDNET documentation exist (more than the man pages
   distributed with OCTTOOLS) ?

3) using the scmos standard cells:  anything resembling a gated transparent
   latch, or do I have to wire my own together ??

PS I couldn't get BDSYN's "SYNONYM" (sic) function to work either...

Thanks! Glenn J.
    Glenn Jennings                       Email:  glenn@sm.luth.se
    Div.  of  Computer Engineering       Tel:     (+46) 920 91763
    Lulea University of Technology       Alt:     (+46) 920 91000
    S-951 87 Lulea,         SWEDEN       Fax:     (+46) 920 97288



-- 

    Glenn Jennings,       Tekn.Dr.       Email:  glenn@sm.luth.se
    Div.  of  Computer Engineering       Tel:     (+46) 920 91763
    Lulea University of Technology       Alt:     (+46) 920 91000
    S-951 87 Lulea,         SWEDEN       Fax:     (+46) 920 97288
Newsgroups: comp.lsi.cad
From: jabarby@sun5.vlsi.uwaterloo.ca (J.A. Barby)
Subject: Re: Looking for hard to simulate MOS circuit(s)
Organization: University of Waterloo
Date: Mon, 25 Jan 1993 03:10:03 GMT

In article <1993Jan23.102232.681@cine88.cineca.it>, michele@deis21.cineca.it (Michele Favalli) writes:
> In the anonymous ftp site "mcnc.mcnc.org", in the directory 
> /pub/benchmark/CircuitSim90 there are benchmarks giving 
> problems to electrical level simulators (CaZm, SPICE ...) 
> and some documentation.                                          
> 
> Ciao Michele
> 

The following CircuitSim90 netlists can be solved using gmin ramping
only:
	bjt/loc
	mos2/e1480
	mos3/counter
	mos3/gm19
The others either do not need ramping or need things more powerful than
gmin ramping.
-- 
 Jim Barby  <jabarby@vlsi.UWaterloo.ca>
 VLSI Group, University of Waterloo, Waterloo, Ontario, Canada, N2L 3G1
 519-885-1211x3995, FAX 519-746-5195