From: merlin@maths.tcd.ie (Merlin Hughes)
Subject: Re: Manipulation of screenmodes
Organization: Dept. of Maths, Trinity College, Dublin, Ireland.
Date: Fri, 31 Jul 1992 01:34:04 GMT

roozemaa@dutiws.tudelft.nl (Peter.Roozemaal.IS-assistent) writes:

>Or asked in a different manner:
>  What do I have to poke where (and preferebly why) to change to a different
>  screenmode bypassing the usual VDU-calls.

To program the VIDC, you need to be in supervisor mode, and you poke
the new data into location $3400000. There are 4 words there mapped
to the VIDC (I think), so you can STM up to 4 registers at a go.

eg:
SWI"OS_EnterOS"  -- Supervisor mode
 MOV0,#&3400000  -- Address of VIDC
 MOV1,#<data>    -- Data to program VIDC with
 STMIA0,{1}      -- Send it to the VIDC
TEQP15,#0:DCD0   -- User mode

The VIDC register you are programming is encoded into the top byte
of the byte you store, the data is in the rest of the word. The
register numbers are separated by 4, ie the first register is &00,
the second &04, etc.

ie:

--Word--
   High Byte                                          Low Byte
3 3 2 2 2 2 2 2  2 2 2 2 1 1 1 1  1 1 1 1 1 1
1 0 9 8 7 6 5 4  3 2 1 0 9 8 7 6  5 4 3 2 1 0 9 8  7 6 5 4 3 2 1 0
x x x x x x 0 0  x x x x x x x x  x x x x x x x x  x x x x x x x x
\_____________/  \_______________________________________________/
  VIDC Address                   VIDC Data

VIDC registers are:

 00 \
 ..  > Video Palette Logical Colour 0 .. 15
 3C /
 40 Border Colour
 44 \
 ..  > Cursor Palette Logical Colour 1 .. 3
 4C /
-- bit 12=Supremacy, 11..8=Blue, 7..4=Green, 3..0=Red
-- (different slightly in 8BPP modes, but same region)

 60 \
 ..  > Stereo Image Register 7 , 0 .. 6
 7C /
-- bit 2..0=Position

 80 Horizontal Cycle Register
 84 Horizontal Sync Width Register
-- bit 23..14=Data

 88 Horizontal Border Start Register
 8C Horizontal Display Start Register
 90 Horizontal Display End Register
 94 Horizontal Border End Register
-- bit 23..14=Data

 98 Horizontal Cursor Start Register
-- bit 23..13=Data, 12..11 must be 0 except in Hi-Res mode

 9C Horizontal Interlace Register
 A0 Vertical Cycle Register
 A4 Vertical Sync Width Register
-- bit 23..14=Data

 A8 Vertical Border Start Register
 AC Vertical Display Start Register
 B0 Vertical Display End Register
 B4 Vertical Border End Register
-- bit 23..14=Data

 B8 Vertical Cursor Start Register
 BC Vertical Cursor End Register
-- bit 23..14=Data

 C0 Sound Frequency Register
-- bit 7..0=Data

 E0 Control Register
-- bit 15..14= Test Mode; 00=>Normal Operation, 01..11=>Test Mode 0, 1, 2
-- bit 8=Test Mode; 0=>Normal Operation, 1=>Test Mode 3
-- bit 7=Composite Sync; 0=>Vertical, 1=>Composite
-- bit 6=Interlace Sync; 0=>Off, 1=>On
-- bit 5..4=DMA Request; 00..11=>End Of Word 0/4, 1/5, 2/6, 3/7
-- bit 3..2=Bits Per Pixel; 00..11=>BPP 1, 2, 4, 8
-- bit 1..0=Pixel Rate; 00..11=>MHz 8, 12, 16, 24

-

Ok, those are the registers. If you are already in the type of mode
you want to be in, and you just want to change the dimensions, you
only need to reprogram the H&V Border/Display Start/End Registers.
If not, you'll have to fiddle with the other relevant sounding
ones.

(
From mode 13, programming the following registers with the
following data values will get a 384*208 shaped mode..

H Disp Start = 40
H Disp End   = 40 + (384/2)
V Disp Start = 63
V Disp End   = 63 + 208

You may have to push the borders out a bit.
)

You'll probably get somewhere by experimentation... Something to
note is that RISC OS reprograms stuff about the palette and the
pointer quite regularly, so you'll have difficulty doing things
with them.

For full information, get the VLSI data book, or if you want me to,
I'll type in the rest of what is said about the relevant registers.
I'm not going to type it in now because I'm tired.

I assume you'll assume you have enough screen memory..

People may object to your reprogramming VIDC for a few reasons..
Some people will say it isn't future compatible. I'll believe that
one when I see a new video chip in the Arc - I think you can afford
to forget about that.

Different types of monitors however, are a valid reason for not
doing the reprogramming yourself. People with multisyncs and VGAs
and so on, sometimes have their own base modes defined. That way,
different shaped modes will still be of the preferred users style
(New modes are defined with a standard base mode, and then a VIDC
list with the list of registers that need to be changed for the new
mode. Normally these will only include new values for the H&V
Border/Display Start/End registers.) People like this will hate your
for changing mode yourself.

Anyway, enjoy.

--SICK--Merlin Hughes--    /|            This is only the beginning.
  merlin@maths.tcd.ie     //|         We will regroup. We will prepare.
                         //_|   When the time comes, we will emerge and take
Acorn.. Deus et machina. /  | our place as the supreme masters of the universe.
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