HDTenEightyP/NetNews huggingface dataset:
From: strumpen@ifi.unizh.ch (Volker Strumpen)
Subject: Linda / The Parform
Organization: University of Zurich, Department of Computer Science
Date: Thu, 17 Dec 92 19:17:45 GMT


This message is addressed to all who were/are interested in distributed 
parallel computing. A couple of months ago we started a thread in this
group, which again heated up the discussion whether the Linda or message
passing paradigm are superior.

We have compared the open domain Linda implementation POSYBL with a
Transputer Multicluster, PVM and our platform The Parform. POSYBL turned
out to be clearly worse than the other systems. Thus, we concluded, that
the tuple space concept is inefficient.

After time has passed now, we could make SCA-Linda measurements with an 
explicit heat equation solver on a 2D grid in our network:

 Procs  POSYBL	SCA linda	PVM	MC-2	The Parform
   1	1370.6	1370.6         1370.6	 --	1370.6 (1.0)*
   2	 737.2	 662.2 		648.0	 --	 654.8 (2.1)
   4	 442.6	 342.6 		328.0	 921.4	 332.3 (4.1)
   6	 339.3	 235.5 		219.0	 618.5	 221.7 (6.2)
   8	 284.6	 175.8 		168.4	 466.7	 170.2 (8.0)
  10	 260.2	 144.3 		143.6	 376.6	 137.4 (10.0)
  12	 244.7	 122.1 		116.6	 318.2	 116.0 (11.8)
  14	 242.7	 104.5 		100.1	 276.2	 103.5 (13.5)
  16	 239.5	  92.8 	 	 90.0	 240.0	  89.0 (15.4)
  18	 242.6	  84.5 		 97.5	 215.9	  80.9 (16.9)
  20	 241.6	  76.0 		 85.8	 196.6	  73.5 (18.7)
  22	 	  71.5	 	 68.5	 182.8	  67.5 (20.3)
  24		  66.5	 	 63.6	 170.9	  62.5 (21.9)
  26		  63.1	 	 60.5	 160.9	  58.6 (23.4)
  28		  58.5	 	 56.7	 151.9	  55.8 (24.7)
  30		  55.1	 	 53.5	 144.7 	  53.0 (25.9)
  32		  54.0	 	 54.0	 138.5	  51.0 (26.9)
  34		  52.4	 	 54.0		  50.8 (27.0)
  36		  51.4	 	 52.0		  48.5 (28.3)
  38		  51.3	 	 54.0		  48.4 (28.3)
  40			 	 52.9		  47.2 (29.0)

   * speedup in parentheses


For further information, we refer the reader to our old report, ftp-able
from claude.ifi.unizh.ch. An upgraded version will be published in near
future.

This result verifies, that SCA Linda's runtime system can handle regular
problems like a PDE solver very well. Certainly, a heap of work went into
the optimizers of this system.

This code is message passing code and not Linda flavored code. Runtimes 
of a Linda flavored code were several times longer than the message 
passing style code.


Merry Christmas and a Happy New Year,

 Volker Strumpen and Clemens Cap



 -------------------------------------------------------------------
 Clemens Cap				email: cap@ifi.unizh.ch
 Volker Strumpen                        email: strumpen@ifi.unizh.ch
 Dept. of Computer Science              Tel.:  +(1) 257-4327
 University of Zurich                   FAX:   +(1) 363 00 35
 Winterthurerstr. 190                   CH-8057 Zurich, Switzerland

Newsgroups: comp.parallel
From: magrana1!rob@uunet.UU.NET (Rob Duncan)
Subject: information wanted on C*
Apparently-To: uunet!comp-parallel
Organization: Pomegranate Technology, Inc.
Date: Fri, 18 Dec 1992 07:08:21 GMT


Can anyone help me find out more information about the parallel
language C* developed by Thinking Machines?  The two references I have
are:

J. R. Rose and G. L. Steele Jr. 1987. C*: An extended C language for
data parallel programming.  Technical Report PL 87-5, Thinking
Machines Corporation.

Thinking Machines Corporation, MA. 1990. C* Programming Guide Version
6.0 Beta.

Does anyone have an address for Thinking Machines, email or
otherwise?

Thanks in advance,

Rob Duncan.

Newsgroups: comp.parallel
From: gottlieb@allan.ultra.nyu.edu (Allan Gottlieb)
Subject: Re: Wanted: efficient software lock
Organization: New York University, Ultracomputer project
Date: 14 Dec 92 11:59:26

In article <1992Dec14.133731.18997@hubcap.clemson.edu> engler@cs.arizona.edu (Dawson R. Engler) writes:

   I need the algorithm for an efficient software lock that does not use
   atomic instructions (except perhaps assignment).  Fairness is unnecessary:
   in the situation I need this for, ~90% of the accesses are by the same
   process, and if the accesses are by someone else, they are allowed to
   have extra overhead.

   If anyone can suggest such an algorithm that has worked well for them
   in practice, I would be grateful.

   Regards,
	   Dawson
	   engler@cs.arizona.edu

   P.S. An alternative solution would be a lock that is very effective in
	the case of two processes.  Since each lock will belong to a
	specific process, there is a natural dichotomy between the owner and
	"everyone else".  From this distiction, two logical processes can
	be created ("me" and "them").

I would suggest peterson's algorithm.  For two processes it is simply
Code for process 1		  Code for process 2
------------------		  ------------------
P1Wants <- TRUE                   P2Wants <- TRUE
Turn <- P2                        Turn <- P1
while P2Wants and Turn=P2	  while P1Wants and Turn=P1

critical section                  critical section

P1Wants <- FALSE                  P2Wants <- FALSE

(the while loops have empty bodies)

For N processes (plus a proof and references) see Hofri's article in
Operating Systems Review January 90.

Allan Gottlieb

Newsgroups: comp.parallel
From: ram@ramsgi.erenj.com (ram rajagopalan)
Subject: Parallel Solvers
Apparently-To: comp-parallel@relay1.uu.net
Organization: Exxon Research & Engineering Co.
Date: Wed, 16 Dec 1992 20:16:32 GMT

Hi,

  I am interested  in algorithms/software to solve linear systems on
  MIMD architecture.  I would appreciate any references to papers or
  software archives.

-- 
regards,

Ram.

==============================================================================

Ram  Rajagopalan                                        Phone: (908) 730-2556
Exxon Research & Engineering Co.                        Fax:   (908) 730-3042 
RT 22 East Annandale, NJ - 08801                        Email: ram@erenj.com

==============================================================================


Newsgroups: comp.parallel
From: Gavin.Michael@cs.anu.edu.au (Gavin Michael)
Subject: Has anyone seen CFP Supercomputing `93
Reply-To: Gavin.Michael@cs.anu.edu.au
Organization: Australian National University, Computer Science Dept
Date: 16 Dec 1992 01:23:01 GMT

Has anyone got a copy of the call for papers for Supercomputing `93?


--
Gavin Michael
gavin@cs.anu.edu.au                         ,--_|\   Tel: +61 6 249 4625
Department of Computer Science             /      \  Fax: +61 6 249 0010
Australian National University, Canberra   \_.--_*/  GPO Box 4 ACT 2601
                                                 v


Newsgroups: comp.parallel
From: saltz@cs.umd.edu (Joel Saltz)
Subject: Maryland/NIH Postdoc Position
Organization: U of Maryland, Dept. of Computer Science, Coll. Pk., MD 20742
Date: 11 Dec 92 21:38:21 GMT


The University of Maryland and the Division of Computer  Research
and  Technology at the National Institutes of Health seek a post-
doctoral researcher to work with us  to  carry  out  applications
driven  computational  science  research.   The  research will be
motivated by leading edge biomedical applications of  interest to
the  National  Institutes of Health. We seek a researcher with an
excellent research background in compilers, tools or   algorithms
for  high  performance computers. The researcher should also have
an intrinsic interest in tackling challenging  biomedical  appli-
cations.  This is a joint position with both the Computer Science
Department at the University of Maryland and the National  Insti-
tutes  of  Health.  The  intent  is for the researcher to work in
close collaboration with the research group lead by Joel Saltz in
the Computer Science Department at the University of Maryland and
the group lead by Robert Martino of the Division of Computer  and
Technology at the National Institutes of Health.  Please send in-
quires to Joel Saltz at saltz@cs.umd.edu at Maryland or Bob  Mar-
tino at martino@alw.nih.gov at NIH.


Newsgroups: comp.parallel
From: tsioutsias-dimitris@CS.YALE.EDU (Dimitris Ioannis Tsioutsias)
Subject: Parallel Image Segmentation and Estimation
Organization: Yale University Computer Science Dept., New Haven, CT 06520-2158
Date: 13 Dec 1992 19:37:26 -0500

Is there anyone out there that has references or done work on the above
subject? I am especially interested in practical issues as well as 
theoretical results. I'd appreciate any help.

->dimitris

Newsgroups: comp.parallel
From: belkacem@pop.ibp.fr (Zerrouk BELKACEM)
Subject: Interval routing
Apparently-To: comp-parallel@uunet.uu.net
Organization: Laboratoire MASI, Paris, France
Date: Wed, 16 Dec 1992 07:52:41 GMT

Hi, 

I'm working on a VLSI implementation of a message router using interval
 labeling like in the INMOS C104.

I would like to have some contacts with persons working in this field.
And, welcome for informations on the recent advances concerning
 this domain.

 The only refences i have are the following:  

J.Leewen and R.B Tan, "Interval labeling", the computer journal vol30 1987.

N.Santoro and R.Khatib, "Labeling and implicit routing in networks", the
computer journal vol 28 1985. 

If you have e-mails of these authors please send them to me.

Thanks in advance.

Belk.
-- 
------------------------------------------------------
       +---+                          Belkacem ZERROUK
      /   / \ 
     /   /   \                         Equipe CAO&VLSI

Newsgroups: comp.parallel
From: patnaik@fozzie.nrl.navy.mil (Gopal Patnaik)
Subject: transpose on Delta/Paragon
Organization: Naval Research Laboratory
Date: Fri, 11 Dec 1992 22:29:49 GMT

What is a good way to transpose a matrix on the Intel Delta/Paragon?  The
method we are using now is very slow, probably due to communication
contention. (The Delta/Paragon uses a mesh connection)  Is there a published
algorithm or hopefully code that we could use?  Your help is appreciated.

Thanks,
Gopal Patnaik
patnaik@fozzie.nrl.navy.mil
--

--------------
Gopal Patnaik, patnaik@fozzie.nrl.navy.mil
--

--------------
Gopal Patnaik, patnaik@fozzie.nrl.navy.mil

Newsgroups: comp.parallel
From: roger@inmos.co.uk (Roger Shepherd)
Subject: Re: transputers
Organization: Inmos Limited, Bristol
X-Newsreader: TIN [version 1.1 PL8]
Date: Wed, 16 Dec 1992 09:54:12 GMT

UMR Usenet News Post (cnews@umr.edu) wrote:
: First a rather silly question.  I know functionally what they are
: but is 'tranputer' a generic term for parllel processors produced
: by SGS Thompson?  

The term ``transputer'' was coined in the 1970's by Iain Barron, one of
the founders of INMOS (since bought by SGS-Thomson Microelectronics).
The term is generic, rather than product specific, and refers to the
``component of the future'' that Barron believed would become possible
with improving semiconductor technology. A transputer is a complete
single chip computer, with a processor, memory and a communications
system which enables it to be connected to other transputers. Barron's
idea was that future electronic systems would be constructed from
interconnected transputers, in the same way as logic gates were used.
One of INMOS's goals when founded, was to build a transputer. 

People have used the term ``transputer'' when referring to devices like
the Texas TMS 320C40.

:                    (What is it there chip number, ??800, or something)

There are a number of devices available today, the most imporatnt of
which are:

16-bit processor:
   T225: 4k bytes memory, 4 20 Mbit/s serial communication links

32-bit processors:
   T400: 2k bytes memory, 2 20 Mbit/s serial communication links
   T425: 4k bytes memory, 4 20 Mbit/s serial communciation links
   T805: 64-bit FPU, 4k bytes memory, 4 20 Mbit/s serial communciation links

: Also I hear they will soon be releasing a new chip, ??9000.??

True. The T9000 is new transputer. Faster (10x T805), 16 kbytes on-chip
memory/cache, 4 100 Mbit/s communication links - the links are
significantly better than in the previous generation of devices; they
provide hardware multiplexing of many channels over a single physical
connection AND T9000 transputers may be joined together via a routing
network, rather than having to be connected to each other directly.

--
Roger Shepherd, INMOS Ltd   JANET:    roger@uk.co.inmos 
1000 Aztec West             UUCP:     ukc!inmos!roger or uunet!inmos-c!roger
Almondsbury                 INTERNET: roger@inmos.com
+44 454 616616              ROW:      roger@inmos.com OR roger@inmos.co.uk

Newsgroups: comp.parallel,comp.arch
From: jkenton@world.std.com (Jeff Kenton)
Subject: Re: BBN Monarch
Apparently-To: uunet!comp-parallel
Organization: Kenton Systems Corporation, Weston MA
Date: Fri, 18 Dec 1992 05:11:28 GMT

gottlieb@allan.ultra.nyu.edu (Allan Gottlieb) writes:

>   If you mean the TC2000, we are still using ours.

>No the Monarch was different.  Bit serial network interface, MANY
>processors.  It was viewed as having a research component unlike the
>TC2000, which was planned as a product.  (The second sentence is
>somewhat speculation on my part)

The TC-2000 was a real product.  We thought we did a good job on it, but
it turned out to be difficult to find a market niche for.

[ Howdy Allan -- keep those puzzles coming! ]

-- 
-------------------------------------------------------------------------
=			Jeff Kenton	(617) 894-4508			=
=			    jkenton@world.std.com			=
-------------------------------------------------------------------------

Newsgroups: comp.parallel,comp.arch
From: jkenton@world.std.com (Jeff Kenton)
Subject: Re: BBN Monarch
Apparently-To: uunet!comp-parallel
Organization: Kenton Systems Corporation, Weston MA
Date: Sat, 12 Dec 1992 03:20:04 GMT

johnsson@cs.chalmers.se (Thomas Johnsson) writes:


>Whatever happened to the BBN Monarch, the (supposedly) massively parallel
>shared memory multiprocessor?

It never really happened -- the project was cancelled.

-- 
-------------------------------------------------------------------------
=			Jeff Kenton	(617) 894-4508			=
=			    jkenton@world.std.com			=
-------------------------------------------------------------------------

Newsgroups: comp.parallel
From: hackeron@athena.mit.edu (Harris L Gilliam)
Subject: Connection Machine C* programming problem - linked lists
Apparently-To: comp-parallel@bloom-beacon.mit.edu
Keywords: Connection Machine, C* C star, CM
Organization: MIT Project Athena
Date: Mon, 14 Dec 1992 20:13:53 GMT


Hi,

	Has anyone found an efficient solution to the restriction that C*
imposes, namely no parallel variables or pointers as structure members ?  One of
the most common C data structures is the linked list, and a very usefull one, but
this restriction elliminates the common implementation of linked lists.  Has
anyone found a way around this ?

	Also, are there any repositories of C* code for implementing various data
structures ?  For example is there a place I can look for code/literature on how
to do common data structures in parallel (such as tree, directed graphs, hash
tables, etc).


						Thanks


-- 
|Harris L. Gilliam         () 40 Boston Ave. W. Somerville MA 02144 |
|hackeron@athena.mit.edu   ()      hgilliam@media-lab.media.mit.edu |
|!bloom-beacon!mit-athena!hackeron               GEnie : H.GILLIAM1 |
|harris@fly.lcs.mit.edu					<><~~~      |

Newsgroups: comp.parallel
From: dkdean@iastate.edu (David K Dean)
Subject: Looking For Distributed Parallel Computing Problems
Apparently-To: comp-parallel@beaver.cs.washington.edu
Organization: Iowa State University, Ames IA
Date: Tue, 15 Dec 1992 21:43:21 GMT


	A friend and I will be doing an undergraduate research project
next semester on distributed parallel computing using a DEC workstation
environment. Right now the hardest problem is coming up with an
applicable problem to tackle. Any ideas and/or suggestions would be
greatly appreciated. All coding will be done in C and Linda, or
possibly PVM. We would like to approach reasonable problems from any
discipline as long as the scope of the problem is not too broad.
Thanks in advance.


							Dave

dkdean@iastate.edu

Newsgroups: comp.parallel,comp.theory
From: charles@probitas.cs.utas.edu.au (Charles Lakos)
Subject: LOOPN - Language for Object-Oriented Petri Nets
Organization: University of Tasmania, Australia.
Date: Tue, 15 Dec 1992 04:38:11 GMT

I wish to announce the availability of a compiler, simulator and associated
source control for an object-oriented petri net language called LOOPN.

In LOOPN, a petri net is an extension of coloured timed petri nets.  The 
extension means firstly that token types are classes.  In other words, they 
consist of both data fields and functions, they can be declared by 
inheriting from other token types, and they can be used polymorphically.  
The object-oriented extensions also mean that module or subnet types are 
classes.  In other words, the declaration of a subnet encapsulates 
constants, types, places, transitions, access functions and parameters.  
These module types may be declared by inheriting from other modules and can 
be used polymorphically.

LOOPN has been developed over a period of about 5 years at the University of
Tasmania, where it has been used in teaching computer simulation and the
modelling of network protocols.

Further details on the syntax of LOOPN, its application and the conditions
under which it is distributed are available in the distribution.

The LOOPN compiler, simulator and associated documentation is available by
anonymous ftp from 
        ftp.utas.edu.au         (131.217.10.1)
as 
        departments/computer_science/loopn.tar.Z

-- 
--
Charles Lakos.                               C.A.Lakos@cs.utas.edu.au
Computer Science Department,                 charles@probitas.cs.utas.edu.au
University of Tasmania,                      Phone:    +61 02 20 2959
Sandy Bay, TAS, Australia.                   Fax:      +61 02 20 2913

Newsgroups: comp.parallel
From: cnews@umr.edu (UMR Usenet News Post)
Subject: transputers
Apparently-To: uunet!comp-parallel@uunet.uu.net
Followup-To: comp.parallel
Organization: University of Missouri - Rolla
Date: Tue, 15 Dec 1992 01:20:25 GMT

First a rather silly question.  I know functionally what they are
but is 'tranputer' a generic term for parllel processors produced
by SGS Thompson?  (What is it there chip number, ??800, or something)
Also I hear they will soon be releasing a new chip, ??9000.??

Now my real question(s):
	Who deals in these things?  I'm looking for implementations on 
	PC's with both ISA and EISA buses.

	What about the amiga, are there transputer implemetations out there
	for the amiga (say Zorro IIIbus)?




Newsgroups: comp.parallel
From: woodacre@mips.com (Michael Woodacre)
Subject: Re: transputers
Followup-To: comp.parallel
Reply-To: woodacre@mips.com (Michael Woodacre)
Organization: mips technologies
Date: 17 Dec 1992 22:29:08 GMT

In article <1992Dec17.134236.4247@hubcap.clemson.edu>,
steved@lion.inmos.co.uk (Stephen Doyle) writes:
> In article <1992Dec15.134641.8093@hubcap.clemson.edu> cnews@umr.edu
(UMR Usenet News Post) writes:
> >First a rather silly question.  I know functionally what they are
> >but is 'tranputer' a generic term for parllel processors produced
> >by SGS Thompson?  (What is it there chip number, ??800, or something)
> >Also I hear they will soon be releasing a new chip, ??9000.??
> >
> >Now my real question(s):
> >	Who deals in these things?  I'm looking for implementations on 
> >	PC's with both ISA and EISA buses.
> >
> >	What about the amiga, are there transputer implemetations out there
> >	for the amiga (say Zorro IIIbus)?
> 
> transputer is a trademark of INMOS Limited, a member of the SGS-THOMSON
> Microelectronics Group of Companies.

I don't believe transputer is a trademark of INMOS - I believe it was
delibrately not made a trademark with the intention of creating a
generic name for the industry. 

> 
> The transputer family consists of a number of products, the T225 is a 16-bit
> architecture, T425 is 32-bit (with a low cost variant the T400), 
> T805 is 32-bit + on-chip floating point unit. All transputers incorporate
> communications links and on-chip memory. The latest T9000 processor
> provides additional ease of use, high performance communications links
> and an order of magnitude CPU performance increase.
> 
> There is a motherboard for the PC ISA bus available under the INMOS
> iq Systems brand name - this family of products covers board level products
> based around the transputer and software products for transputer programming.
> 
> The transputer is sold and supported through SGS-THOMSON regional sales
> offices and authorised distributors. There are too many to list here and
> so if anyone wants to be put in touch with their local sales outlet please
> email me and I will forward appropriately.

   Michael S. Woodacre | Phone: (415) 390 4175
UUCP: {ames,pyramid,decwrl}!mips!woodacre OR woodacre@sgi.com
USPS: MIPS Technologies Inc, M/S 10U-178,
      2011 N. Shoreline Blvd, Mountain View, CA 94039
From: jmce+@andrew.cmu.edu (James Ryan Miller)
Newsgroups: comp.robotics
Subject: Re: 6270 text... here's something strange
Date: 13 Dec 92 21:40:09 GMT
Article-I.D.: andrew.If=3dNq00Uh_E6aWVr
Organization: Freshman, CIT general, Carnegie Mellon, Pittsburgh, PA


    Yeah, I also had this problem.

    Is anyone thinking of getting togeather a kit for building the 6270
board?  

                                    Ryan Miller
                                    jmce+@andrew.cmu.edu
Newsgroups: comp.robotics
From: jeremiah@cuug.ab.ca (Jerry Jeremiah 290-8941)
Subject: Re: Remote Lawn Mower
Organization: Calgary UNIX Users' Group
Date: Mon, 14 Dec 1992 04:25:35 GMT

In article <672@hel-pless.brl.mil> tkelley@hel4.brl.mil (Troy Kelley) writes:
>Has anyone out there heard of a radio controlled lawn mower? I 
>dont want one too complex. I just bought a house with a large
>yard but there is a deck that overlooks most of the yard which
>would be a perfect perch to use a radio controlled mower.
>
>Any ideas?
>
>Troy Kelley

Well Radio Electronics published a robot lawn mower project not to long
ago and that might be a good starting place.  Just add the radio link
and change the software.

>>Jerry
From: oz@resumix.portal.com (James Osborn)
Newsgroups: comp.robotics
Subject: Re: Remote Lawn Mower
Date: 19 Dec 92 20:58:19 GMT
Article-I.D.: cs.BzIy97.4Eu.1
Reply-To: oz@resumix.portal.com
Organization: Resumix, Inc., Santa Clara, CA

I believe that Kubota manufactures and markets an RC lawn tractor.
Newsgroups: comp.robotics
From: fredm@media.mit.edu (Fred G Martin)
Subject: page 217 of MIT _Robot_Builder's_Guide_
Organization: MIT Media Laboratory
Date: Wed, 16 Dec 1992 17:30:34 GMT

Dear readers,

Thank you to the several who reported the alignment error of the PC
board figures on page 217 of the _Robot_Builder's_Guide_.

I have now fixed the problem, and (as requested) put a single-page
PostScript file with the correction, named "page217.PS.Z", in the
pub/6270/docs directory.  I'll probably remove this in a few weeks so
as to avoid confusion in the future.

	- Fred



-- 
Fred Martin | fredm@media.mit.edu | (617) 253-7143 | 20 Ames St. Rm. E15-301
Epistemology and Learning Group, MIT Media Lab     | Cambridge, MA 02139 USA
Newsgroups: comp.robotics