From: jre@zeos.com (Jim Erickson)
Subject: Re: Some silly RAM questions...
Organization: Zeos International, Ltd
Date: Fri, 02 Oct 1992 13:35:53 GMT

In article <1992Oct1.192007.12381@sura.net> wbarnes@sura.net (Bill Barnes) writes:
[various stuff deleted for brevity]
>Hey, I have a few questions which are probably pretty trival or even FAQs,
>but I kinda need to know the answers soon since I want to upgrade my
>computer soon (I'm swapping motherboards, actually), so:
>
>1)  What's the deal with these new x3 SIMMs compared to the old x9 SIMMs?
>More importantly, are they interchangable or can I expect hardware conflicts,
>
>2) Does anyone have a chart or something which shows what the minimum
>recommended speed in nanoseconds for SIMM chips for the various CPUs -
>
>3) I've heard that the 386 and 486 handle memory differently - that the 486
>operates in burst mode and the 386 uses something else.  Is this true?
>If so, then obviously the upgradable motherboard would have to do both
>if it were to optimize use of each chip, right?  However, assuming the board
>
>4) You've probably all seen ads which advertise "64K external cache,
>upgradable to 256K," right?  What I want to know is: is it the norm to
>construct the cache so you just pop in extra SIPPs until you get to
>256K or do you replace the initial 64K cache with newer, bigger SIPPs?
>Basically, do they leave usually empty space for the extra cache memory
>or are they saying, "Well, it can hold 256K, but we filled it with 64K
>instead - you need to replace the chips."?
>
>Thanks a lot for your help.
>-- 
>Bill "Whassamatter?!  Can't you take a joke?!" Barnes   wbarnes@sura.net
>Disclaimer:  The author apologizes for any thought-provoking material he may
>	     have accidentally included and promises not to do it again.
>Datclaimer:  My employers wouldn't WANT to share some of my opinions.


   1) 3-chip and 9-chip SIMMs may or may not be interchangable depending on
the motherboard. Ask the vendor/manufacturer.
   2) A generally good rule of thumb is that to get 0 wait states you need
RAM with the ns=1/x, where x is the speed of the bus interface (read: CPU
for everything but the DX2s). For example for a DX50: 1/(50x10^6)=20x10^-9.
In english, 1/50MHz=20ns.
      Now you know the reason for the internal cache on the 486 (which is
15ns I believe) and why a system with any cache will out perform the same
system with out a cache.
   3) Motherboards that can be upgraded from 386 to 486 machines _generally_
use 386 chipsets and may not support burst mode transfers etc. You may want
to stick with a board that starts out at a 486SX and goes up from there.
   4) Most boards like this that I have seen either use some sort of cache
module or have DIP sockets on the board that will accept additional cache
RAM.

   Hope this helps,
---JRE---


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