From: stein@decsim.enet.dec.com ()
Subject: VLSI Design Verification, Boston area
Keywords: VLSI, DESIGN, Verification
Reply-To: JGIROUARD@OBSESS.ENET.DEC.COM
Organization: Digital Equipment Corporation
Distribution: na
Date: Thu, 28 Jan 1993 15:05:38 GMT




                      DIGITAL EQUIPMENT CORPORATION

                         HUDSON, MASSACHUSETTS

                        SEMICONDUCTOR OPERATIONS

SEMICONDUCTOR OPERATIONS, (SCO) LOCATED IN HUDSON, MA., HAS SEVERAL OPENINGS
IN THE SEMICONDUCTOR ENGINEERING GROUP (SEG).  SEG PROVIDES MOST OF THE
MOS (CMOS) CUSTOM SILICON DESIGN EXPERTISE WITHIN DIGITAL.  OUR CHIPS ARE
VIRTUALLY IN EVERY DIGITAL PRODUCT, AND OUR SOFTWARE IS USED THROUGHOUT
DIGITAL.

WE HAVE 4 OPENINGS IN THE MODULES, PACKAGING & VERIFICATION GROUP (MPV).

IF YOU ARE INTERESTED IN THE FOLLOWING OPENINGS, PLEASE SEND YOUR RESUME
VIA EMAIL OR FAX TO:

                         MS. JAYE GIROUARD HL2-2/K13
                         DIGITAL EQUIPMENT CORPORTATION
                         77 REED ROAD
                         HUDSON, MA. 01749
                         FAX 508-568-4681 OR EMAIL 
                         "JGIROUARD@OBSESS.ENET.DEC.COM"

***PLEASE BE ADVISED THAT WE ARE ACCEPTING RESUMES FROM U.S. OR 
   PERMANENT RESIDENTS*** 
   
   INDICATE YOUR INTEREST IN THE FOLLOWING POSITIONS BY MENTIONING POSITION CODE: 

POSITION # 1(WS)

ALPHA VERIFICATION TOOL DEVELOPMENT  

The Project:
------------

Our project is responsible for developing software tools that verify
new CPU implementations (both simulations and actual hardware) with
respect to the Alpha architecture.

The tools use pseudo-random techniques to create and execute test cases
automatically according to the "knowledge" of the architecture that we have
programmed into it.  Test cases consist of complicated instruction streams that
attempt to expose subtle design flaws in the CPU and system.

The Actual Job:
---------------
                                                                
We are looking for highly motivated, creative software engineers with a very
good understanding of H/W architecture and design.  They will participate in
on-going development of our verification tools for the Alpha architecture. 

What you will gain:
-------------------
	. expertise in the Alpha architecture
	. mastery of portability issues
	. mastery of OS internals, especially in exception handling,
	  calling standards, and network communication
	. experience developing complex interoperable software in a team
          environment
        . fahrvergn|gen

What you will bring:
--------------------
	. good software engineering techniques
	  and ability to use them in a team environment
	. high-level language fluency 
	. ability to understand and develop complex software
	. understanding of differences between an
	  architecture and its implementations with respect
	  to test requirements
	. some knowledge of operating system internals
	. some understanding of porting issues
	. excellent understanding of CPU/memory subsystem design


POSITION #2 (WS)


VLSI CHIP VERIFICATION ENGINEER               

The Chips
---------

A wide range of CPU, support, and interface chips are being designed in
Digital's Semiconductor Engineering Group.  These state-of-the-art chips will
be used both in DEC products and sold externally. 

The Job:
--------
We are looking for highly motivated software/hardware engineers who will be
responsible for verifying the "correctness" of a chip's microarchitecture,
interfaces, and operations.  This would involve working with the chip
architects and designers and understanding the detailed design, formulating
test plans, and creating software tests/tools/random exercisers/demons to
exercise all aspects of these complicated units (sections) functionally.  Tests
would be written in macrocode or simulation test languages and would be run on
the behavioral and structural models of the chip, and additional tools would be
written to serve as test and event generators (demons/transactors). You would
also develop tools, methods, and techniques to improve the efficiency and
quality of the verification process. 

Skills Required:
---------------
  Strong background in computer architecture and digital logic.
  Strong software (algorithms/data structures) background
  Assembly-level software, as related to hardware design
  Knowledge of C (or other modern high-level language;  C is preferred)
  Ability to analyze and debug complex system problems.
  Modeling and simulation skills are desired.
  [Experience with design-for-testability and diagnostics would be a plus.]


POSITION # 3 (WS)

Applications: Modeling and PALcode

The Project:
------------

The Modeling and PALcode Applications team is responsible for developing and
delivering Alpha PALcode products, a full range of models (from architectural
to circuit), and the related documentation and support, for the chips being
sold to customers external to Digital (with opportunity to support internal
design teams as well).  The team works in conjunction with the chip
applications team and marketing to establish the priorities and features of the
team's various deliverables. 

The modeling space for the processor chips includes high-level performance
models (to assist in experimenting with different system parameters
and provide an early model for software development), behavior models (full-
functional models), bus transactor models (which model the chip's behavior
at the pins), and SPICE models of the pin drivers (which assists module
circuit design and signal integrity).  Modeling will most likely be done
for peripheral chips as well.

PALcode is used as "interface" code to enable an Alpha processor to
operate in many different implementations running different operating
systems.  

The Job:
--------

This job requires HW or SW engineers with broad knowledge.  Applications team
members are expected to work on both modeling and PALcoding work.  Modeling
work involves understanding the behavior of the chips being modeled,
understanding the level of simulation (full-functional vs. bus transactor
vs. circuit).  Model development entails coding in different simulation
environments, building friendly user interfaces, debugging and testing the
code, and documenting the user interface.  PALcoding work involves detailed
learning of a processor chip's internals and programming interface, and of
computer system concepts (like interrupt handling and memory management).
PALcode development entails adapting PALcode already written by the design
team for use by external customers, coding example PALcode designs that run
on example hardware, debugging and testing the example PALcode, and
documenting the PALcode.

Skills Required:
----------------
	. computer architecture knowledge
	. computer microarchitecture knowledge
	. computer system design knowledge
	. familiarity with modeling and simulation (working knowledge
		of VHDL and/or Verilog(tm) a plus)
	. assembly-level programming knowledge
	. high-level programming knowledge
	. software engineering knowledge
	. Alpha architecture knowledge is a plus
	. operating system knowledge is a plus

POSITION # 4 (WS)

Advanced Development Verification Tools

The Project:
------------
Because chip designs are becoming more complex, chip & system design
verification is getting harder to do well.  Traditional verification techniques
(spec and design reviews, directed tests, pattern-generated tests, and random
tests) are improving, but are hard-pressed to keep up with the increases in
design complexity.  The AD verification project is an attempt to increase
verification productivity through the use of new kinds of verification tools
and methods. 

Skills Required:
----------------

	Strong architecture and logic understanding skills
	Strong software background
	Strong skills in computer hardware description languages
	Strong knowledge of HOL, BDD, or other formal techniques/provers
	Have a style that is research-oriented, 
		but also very pragmatic at the same time