From: chen@digital.sps.mot.com (Jinfu Chen)
Newsgroups: misc.jobs.offered
Subject: CAD Engineers, Motorola, Phoenix, AZ
Date: 9 Oct 92 22:57:12 GMT
Distribution: usa
Organization: Motorola, LICD, SPS, Mesa, AZ

Motorola's Logic Integrated Circuit Division has several job openings for
Computer Aided Design (CAD) engineers.  If you are interested in any one of
following areas, please send your resume to:

Motorola, Inc.
Logic Integrated Circuit Division
2200 W. Broadway Road, M/S M235
Mesa, AZ 85202
Attn: Jinfu Chen

or email to chen@digital.sps.mot.com, or fax to (602)962-2090 with attention
to Jinfu Chen M235.

Only ASCII or postscript format are accepted when resumes are sent vial
email.

We welcome both new graduates and experienced engineers.  Job rank and
salary will be established based on background and experience. 

====================================================================
           Unix Workstation System Administration
====================================================================

This position is for a software engineer to provide system administration
to several IC design groups.  Our workstions are mostly HP/Apollo based
(Domain/OS) plus a few HP9000/700s and Sun Sparc2s.  

Main duties of this job include maintaining workstation operations,
installing new hardware, loading operating system, maintaining user accounts,
backing up files, providing network support, training new users in basic
workstation operations, and other types of system administration activities.

Applicants should have a BS or MS in Electrical Engineering or Computer
Science plus two years related experience in following areas: Domain/OS,
HP-UX, SunOS, NIS, NFS, AFS, DNS, TCP/IP, sendmail, programming skills in C
and shell scripts, X Window System, Apollo Token Ring, Ethernet, and Netnews
administration.  Good inter-personal working relationship and communication
skills are highly valuable.


====================================================================
          Integrated Circuit Automatic Place and Route Layout
====================================================================

This position is for a CAD engineer to provide IC CAD support. Main
duties include tool support in semi-custom layout technologies, including
gate-array and standard cell.  Responsible to setup auto place and route
(APR) tool for a given process, to help IC designers to use APR tools, to
supervise full chip layout design , and to integrate APR tool under CAD
framework.

Applicants should have a BS or MS in Electrical Engineering or Computer
Science plus two years related experience in following areas: knowledge of
integrated circuit design process (capture, simulation, and layout),
understanding of IC electronics, experience in using and setting up IC
layout tools (Mentor, Calma), semi-custom auto place and route tools.

Applicants should also have excellent capability to program in high level
languages (C, C++, Pascal, FORTRAN) is required.  Programming in Unix
enviornment, knowledge of object-oriented design and software engineering
concepts are preferred.

====================================================================
   Hardware Description Lanaguage Simulation and Logic Synthesis
====================================================================

This position is for a CAD engineer to provide simulation/synthsis CAD tool
support.  Main duties include CAD tool support in IC design activities,
including logic and behavior simulations, logic synthesis, and HDL library
compilation and management.  This person is responsible to setup and
customize logic simulation tools that support hardware description language
such as VHDL and Verilog, to install circuit synthesis tool (Synopsys), to
develop and install library that supports HDLs, and to integrate these tools
under CAD framework.

Applicants should have a BS or MS in Electrical Engineering or Computer
Science plus two years related experience in following areas: kKnowledge of
integrated circuit design process (capture, simulation, and layout),
understanding of IC electronics, experience in using and setting up logic
simulation tools (Verilog, VHDL, QuickSim), circuit synthesis tool (Synopsys,
AutoLogic), and fault simulation and grading tools.  Good understanding on
logic simulation, circuit synthesis, and testability are preferred.

Applicants should also have excellent capability to program in high level
languages (C, C++,   Pascal, FORTRAN) is required.  Programming in Unix
enviornment, knowledge of object-oriented design and software engineering
concepts are preferred.

All candidate will work with several design groups and must have good
inter-personal working relationship and communication skills.

Newsgroups: misc.jobs.offered,misc.jobs.contract