From: asmith@synoptics.com (Andrew Smith)
Subject: M68030 support  for gas-1.92.3 - Patches included
Organization: GNUs Not Usenet
Distribution: gnu
Date: Fri, 14 Aug 1992 03:19:02 GMT

Here are some patches to make GAS support the TT0/TT1 registers of M68030,
as well as AC0/AC1/ACUSR on M68EC030.

1. These seem to generate the correct opcodes for PMOVE and PTESTR/W

2. There is some confusion from the Motorola book (M68000PM/AD Rev.1 1992)
about which <ea>'s are allowed with these instructions. I think the modes 
allowed by GAS and these patches are somewhat over-restrictive on what is 
allowed but I have not fixed or verified this with Motorola or even tried it
out on a real processor to see what you can get away with.

3. The patches enclosed for m68k.h are based on gdb-4.6/include/opcode/m68k.h
which is slightly newer that gas-1.92.3/include/opcode/m68k.h, 
binutils-beta-1.94/include/opcode/m68k.h or even gas-1.92.3/gas/opcode/m68k.h.
I don't know why there is a ..../gas/opcode directory as well as a
..../include/opcode directory in with gas-1.92.3 - I think there should only be
one of these to make maintenance easier! Locally, I have removed the ..../gas/opcode
directory and linked to ..../include/opcode.

4. I have not tried using these patches with binutils (e.g. objdump) to see if
it can disassemble these PMOVE and PTEST opcodes correctly - I cannot see an
obvious place to patch for the disassembly.

5. These patches do *not* overlap with the 68040 patches posted by 
stevu@tv.tv.tek.com so you can use either set of patches or both.

6. I think that PTESTR/W is still broken: you need to specify "ptestr #0,memory,#8"
for example, to test location "memory" using FC from SFC to level 0. According to 
the book, you should write "ptestr #0,memory,#0" to get a level 0 search. 
I have not fixed this.


Hope this is useful to someone out there.

Andrew Smith
Distributed Network Systems
SynOptics Communications Inc.



--- cut-here ---

*** tc-m68k.c.old	Thu Aug 13 13:53:41 1992
--- tc-m68k.c	Thu Aug 13 19:32:57 1992
***************
*** 1,4 ****
! /* tc-m68k.c  All the m68020 specific stuff in one convenient, huge,
     slow to compile, easy to find file.
     
     Copyright (C) 1987, 1991, 1992 Free Software Foundation, Inc.
--- 1,10 ----
! /*  Fixes to add support for:
!             68030 TTx (and 68ec030 ACx) registers
! 	    68ec030 ACUSR register is another name for 68851 PSR
! 
! 	    asmith@synoptics.com 13-aug-92 */
! 
! /* tc-m68k.c  All the m680[01234]0 specific stuff in one convenient, huge,
     slow to compile, easy to find file.
     
     Copyright (C) 1987, 1991, 1992 Free Software Foundation, Inc.
***************
*** 236,242 ****
  	FPS,
  	FPC,
  	
! 	DRP,
  	CRP,
  	CAL,
  	VAL,
--- 242,248 ----
  	FPS,
  	FPC,
  	
! 	DRP,           /* these are 68851 or 68030 MMU registers */
  	CRP,
  	CAL,
  	VAL,
***************
*** 260,266 ****
  	BAC5,
  	BAC6,
  	BAC7,
! 	PSR,
  	PCSR,
  	
  	IC,	/* instruction cache token */
--- 266,273 ----
  	BAC5,
  	BAC6,
  	BAC7,
! 	PSR,           /* also known as MMUSR on 68030, not to be confused with the above MMUSR
! 			    for 68040 which is completely different */
  	PCSR,
  	
  	IC,	/* instruction cache token */
***************
*** 267,273 ****
  	DC,	/* data cache token */
  	NC,	/* no cache token */
  	BC,	/* both caches token */
! 	
  };
  
  /* Internal form of an operand.  */
--- 274,286 ----
  	DC,	/* data cache token */
  	NC,	/* no cache token */
  	BC,	/* both caches token */
! 
! 	TT0,             /* these are 68030 access control unit regs */
! 	TT1,
! 	AC0 = TT0,       /* these are 68ec030 access control unit regs, identical to TTx above */
! 	AC1 = TT1,
! 	ACUSR = PSR      /* this is 68ec030 access control unit, 
! 			                     identical to 68030 MMU Status Reg */
  };
  
  /* Internal form of an operand.  */
***************
*** 572,577 ****
--- 585,602 ----
  			n=2;
  			ret=ADDR+c[1]-'0';
  		}
+ 		else if ((c[1] == 'c') && (c[2] == '0')) {
+ 			n = 3;
+ 			ret = AC0;
+ 		}
+ 		else if ((c[1] == 'c') && (c[2] == '1')) {
+ 			n = 3;
+ 			ret = AC1;
+ 		}
+ 		else if ((c[1] == 'c') && (c[2] == 'u') && (c[3] == 's') && (c[4] == 'r')) {
+ 			n = 5;
+ 			ret = ACUSR;
+ 		}
  #ifndef NO_68851
  		else if (c[1] == 'c') {
  			n = 2;
***************
*** 709,714 ****
--- 734,740 ----
  				    ret = PC;
  			    }
  		}
+ 
  #ifndef NO_68851
  		else if (c[1] == 's' && c[2] == 'r') {
  			n = 3;
***************
*** 744,749 ****
--- 770,783 ----
  			n = 2;
  			ret = TC;
  		}
+ 		else if ((c[1] == 't') && (c[2] == '0')) {
+ 			n = 3;
+ 			ret = TT0;
+ 		}
+ 		else if ((c[1] == 't') && (c[2] == '1')) {
+ 			n = 3;
+ 			ret = TT1;
+ 		}
  		break;
  	case 'u':
  		if (c[1] == 's' && c[2] == 'p') {
***************
*** 1521,1527 ****
  					
  					/* JF these are out of order.  We could put them
  					   in order if we were willing to put up with
! 					   bunches of #ifdef m68851s in the code */
  #ifndef NO_68851
  					/* Memory addressing mode used by pflushr */
  				case '|':
--- 1555,1564 ----
  					
  					/* JF these are out of order.  We could put them
  					   in order if we were willing to put up with
! 					   bunches of #ifdef m68851s in the code
! 
! 					   Don't forget that you need these operands
! 					   to use 68030 MMU instructions! */
  #ifndef NO_68851
  					/* Memory addressing mode used by pflushr */
  				case '|':
***************
*** 1536,1544 ****
  					break;
  					
  				case 'P':
! 					if (opP->mode != MSCR || (opP->reg != TC && opP->reg != CAL &&
! 								  opP->reg != VAL && opP->reg != SCC && opP->reg != AC))
! 					    losing++;
  					break;
  					
  				case 'V':
--- 1573,1584 ----
  					break;
  					
  				case 'P':
! 					if (opP->mode != MSCR || 
! 					       (opP->reg != TC && opP->reg != CAL &&
! 						opP->reg != VAL && opP->reg != SCC && 
! 						opP->reg != AC &&
! 						opP->reg != TT0 && opP->reg != TT1))
! 					  losing++;
  					break;
  					
  				case 'V':
***************
*** 2291,2311 ****
  			break;
  			
  		case 'P':
! 			switch (opP->reg) {
  			case TC:
! 				tmpreg=0;
  				break;
  			case CAL:
! 				tmpreg=4;
  				break;
  			case VAL:
! 				tmpreg=5;
  				break;
  			case SCC:
! 				tmpreg=6;
  				break;
  			case AC:
! 				tmpreg=7;
  				break;
  			default:
  				as_fatal("failed sanity check.");
--- 2331,2358 ----
  			break;
  			
  		case 'P':
! 			switch (opP->reg) {   /* We OR in the bit to make either a 4xxx or a
! 						  0xxx operand word depending on register number */
  			case TC:
! 				tmpreg=0 | 0x10;
! 				break;
! 			case TT0:
! 				tmpreg=2 | 0x00;
! 				break;
! 			case TT1:
! 				tmpreg=3 | 0x00;
  				break;
  			case CAL:
! 				tmpreg=4 | 0x10;
  				break;
  			case VAL:
! 				tmpreg=5 | 0x10;
  				break;
  			case SCC:
! 				tmpreg=6 | 0x10;
  				break;
  			case AC:
! 				tmpreg=7 | 0x10;
  				break;
  			default:
  				as_fatal("failed sanity check.");
***************
*** 2354,2360 ****
  			install_operand(s[1], tmpreg);
  			break;
  		case 'Y':
! 			know(opP->reg == PSR);
  			break;
  		case 'Z':
  			know(opP->reg == PCSR);
--- 2401,2407 ----
  			install_operand(s[1], tmpreg);
  			break;
  		case 'Y':
! 			know((opP->reg == PSR) || (opP->reg == ACUSR));
  			break;
  		case 'Z':
  			know(opP->reg == PCSR);



--- cut-here ---

*** m68k.old.h	Thu Aug 13 12:06:17 1992
--- m68k.h	Thu Aug 13 19:31:51 1992
***************
*** 1,3 ****
--- 1,5 ----
+ /*  Fixes to add 68030 TTx (and 68ec030 ACx) register support asmith@synoptics.com 13-aug-92 */
+ 
  /* Opcode table for m680[01234]0/m6888[12]/m68851.
     Copyright (C) 1989, 1991 Free Software Foundation.
  
***************
*** 30,35 ****
--- 32,38 ----
  	m68881 = 0x20,
  	m68882 = m68881, /* synonym for -m68881.  otherwise unused. */
  	m68851 = 0x40,
+ 	m68ec030 = m68030, /* same as 68030 - GAS will deal with the differences */
  
   /* handy aliases */
  	m68040up = m68040,
***************
*** 165,170 ****
--- 168,177 ----
     P  pmmu register
  	Possible values:
  	000	TC	Translation Control reg
+ 	010	TT0	Transparent Translation reg 0
+ 	011	TT1	Transparent Translation reg 1
+ 	010	AC0	Access Control reg 0 (68ec030 only - same as 68030 TT0)
+ 	011	AC1	Access Control reg 1 (68ec030 only - same as 68030 TT1)
  	100	CAL	Current Access Level
  	101	VAL	Validate Access Level
  	110	SCC	Stack Change Control
***************
*** 1634,1642 ****
  {"ploadw",	two(0xf000, 0x2008),	two(0xffc0, 0xfff8),	"D3&s",	m68030 | m68851 },
  {"ploadw",	two(0xf000, 0x2000),	two(0xffc0, 0xfffe),	"f3&s",	m68030 | m68851 },
  
! /* TC, CRP, DRP, SRP, CAL, VAL, SCC, AC */
! {"pmove",	two(0xf000, 0x4000),	two(0xffc0, 0xe3ff),	"*sP8",	m68030 | m68851 },
! {"pmove",	two(0xf000, 0x4200),	two(0xffc0, 0xe3ff),	"P8%s",	m68030 | m68851 },
  {"pmove",	two(0xf000, 0x4000),	two(0xffc0, 0xe3ff),	"|sW8",	m68030 | m68851 },
  {"pmove",	two(0xf000, 0x4200),	two(0xffc0, 0xe3ff),	"W8~s",	m68030 | m68851 },
  
--- 1641,1657 ----
  {"ploadw",	two(0xf000, 0x2008),	two(0xffc0, 0xfff8),	"D3&s",	m68030 | m68851 },
  {"ploadw",	two(0xf000, 0x2000),	two(0xffc0, 0xfffe),	"f3&s",	m68030 | m68851 },
  
! 
! /* TC, CAL, VAL, SCC, AC, AC0, AC1, TT0, TT1 - the value of 0xxx or 4xxx depends on the
!                                           register in question - see "P" handling in GAS.
! 					  The Motorola book is kind of vague about which
! 					  <ea> fields are valid for these registers - you'd
! 					  better check on this by hand: we allow almost all
! 					  <ea> modes here with "*" and "%" */
! {"pmove",	two(0xf000, 0x0000),	two(0xffc0, 0xa3ff),	"*sP8",	m68030 | m68851 },
! {"pmove",	two(0xf000, 0x0200),	two(0xffc0, 0xa3ff),	"P8%s",	m68030 | m68851 },
! 
! /* CRP, DRP, SRP */
  {"pmove",	two(0xf000, 0x4000),	two(0xffc0, 0xe3ff),	"|sW8",	m68030 | m68851 },
  {"pmove",	two(0xf000, 0x4200),	two(0xffc0, 0xe3ff),	"W8~s",	m68030 | m68851 },
  
***************
*** 1644,1650 ****
  {"pmove",	two(0xf000, 0x6200),	two(0xffc0, 0xe3e3),	"*sX3",	m68030 | m68851 },
  {"pmove",	two(0xf000, 0x6000),	two(0xffc0, 0xe3e3),	"X3%s",	m68030 | m68851 },
  
! /* PSR, PCSR */
  /* {"pmove",	two(0xf000, 0x6100),	two(oxffc0, oxffff),	"*sZ8",	m68030 | m68851 }, */
  {"pmove",	two(0xf000, 0x6000),	two(0xffc0, 0xffff),	"*sY8",	m68030 | m68851 },
  {"pmove",	two(0xf000, 0x6200),	two(0xffc0, 0xffff),	"Y8%s",	m68030 | m68851 },
--- 1659,1669 ----
  {"pmove",	two(0xf000, 0x6200),	two(0xffc0, 0xe3e3),	"*sX3",	m68030 | m68851 },
  {"pmove",	two(0xf000, 0x6000),	two(0xffc0, 0xe3e3),	"X3%s",	m68030 | m68851 },
  
! /* PSR, PCSR, MMUSR, ACSR  - 		  I think the Motorola book is kind of mixed up on which
! 					  <ea> fields are valid for these registers on 68030 - 
! 					  you'd better check on this by hand: we allow almost all
! 					  <ea> modes here with "*" and "%"
! */
  /* {"pmove",	two(0xf000, 0x6100),	two(oxffc0, oxffff),	"*sZ8",	m68030 | m68851 }, */
  {"pmove",	two(0xf000, 0x6000),	two(0xffc0, 0xffff),	"*sY8",	m68030 | m68851 },
  {"pmove",	two(0xf000, 0x6200),	two(0xffc0, 0xffff),	"Y8%s",	m68030 | m68851 },

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