HDTenEightyP/NetNews huggingface dataset:
From: mu@terapin.com (Mu Hong Lin)
Newsgroups: comp.sys.intel
Subject: Intel posters?
Date: 17 Nov 92 21:59:55 GMT
Organization: BBS

In our school's computer lab, we have a poster of i860.  I really like it,
where can I get/buy them at??
Xref: sparky comp.sys.intel:2259 comp.unix.sysv386:16528
From: marc@dumbcat.sf.ca.us (Marco S Hyman)
Newsgroups: comp.sys.intel,comp.unix.sysv386
Subject: Re: AT&T assembler format to Intel assembler format tranlator
Date: 17 Nov 92 03:48:15 GMT
Organization: MSH Software, Hayward, CA

In article <BxtMoq.HLE@inews.Intel.COM> akay@mipos2.intel.com (Allen Kay) writes:
 > I'm looking for a translator which translates Unix 386 assembler format
 > to Intel assembler format.  Is there anyone out there has this tool?

Several flavors of 386 unix come with a sed script that do the job the other
way.   386/ix calls it /usr/bin/as386.sed.  It shouldn't take too much work to
invert the script.  You're still going to have to do a lot of work by hand,
though.

// marc
-- 
marc@dumbcat.sf.ca.us -- pacbell!dumbcat!marc
From: sundaram@eecae.msu.edu
Newsgroups: comp.sys.intel
Subject: Idea for the P5!
Date: 18 Nov 92 20:33:21 GMT
Distribution: usa
Organization: Michigan State University, College of Engineering
Originator: sundaram@eecae.ee.msu.edu


Hi y'all,

I had a couple of ideas for how Intel could keep backward compatibility with
its 80x86 line of processors without having to dedicate a small part of the 
P5 to emulating 80[3|4]86 code. 

Instead of devoting part of the die to emulate 80x86 code, why not include some
instructions that will allow the P5 to act as a master processor to a true 
(or slightly modified) 80x86 chip.


	So, if you run a program run for the 386 on the P5, it will "make" the 
	386 execute them instead and can handle other tasks. The idea is similar
	to the DOS VDM's in IBM's OS/2. These VDM's can run most DOS 5.0 apps,
	but the "OS" they run is not DOS 5.0. Similarly, this chip will not 
	quite be a true 486 but one slightly hacked to allow it to co-operate
	with the P5 and work with it as a slave processor. This MAY include 
	some incompatibilities with existing software, but these can be 
	virtually eliminated by intelligent design etc. Moreover, this will 
	allow users to keep their old 80x86 based software while allowing them
	to step up to the P5 (or the P6, P7 .... ) and its advanced features 
	and superior performance. The P5 could be sold independently, so that
	users who need x86 compsatibility can "upgrade" to it when necessary.
	Also, motherboards for the P5 could have a built in socket for the 
	486 compatible (intel) micro-(co)-processor. 

	OK, This mirror's OS/2 2.0 's setup quite closely, where DOS/Windows
	support is optional and some programs (like WPWIN 5.1) need to be 
	"fixed" before being able to run under a WINOS2 session. However, the
	setup does provide for compatibility with over 95% of the DOS software
	out there. Could this be done for the P5?


Voila!

Now, don't flame me. This is just an idea. I do not know how feasible this is
going to be. I will let you decide.

Later y'all

Divya
(sundaram@egr.msu.edu)
Xref: sparky comp.sys.intel:2280 comp.sys.ibm.pc.hardware:30366 comp.benchmarks:1740
From: connolly@me.msu.edu
Newsgroups: comp.sys.intel,comp.sys.ibm.pc.hardware,comp.benchmarks
Subject: WINMARK Benchmark Programs
Date: 19 Nov 92 19:26:40 GMT
Organization: Michigan State University

Does anyone know how to get a copy of the winmark benchmark testing
software?  Is it available on PC Magnet?  Somewhere via anon FTP?

Any hints would be appreciated.

Steve Connolly          connolly@me.msu.edu
From: mkahn@hopi.sedona.intel.com (Mitch Kahn)
Newsgroups: comp.sys.intel
Subject: Re: Microcontroller
Date: 19 Nov 92 16:39:10 GMT
	<1992Nov16.123709.17849@coli.uni-sb.de>
Organization: i960(r) New Product Development, Chandler AZ

chbl@sbustd.rz.uni-sb.de (Christian Blum) writes:
4~
] eletanjm@nuscc.nus.sg (Tan Jin Meng) writes:
] > Does INTEL have a microcontroller (ie UART, A/D IO ports etc) that comes
] > with a x86 core? The x86 core should be a relatively high performance
] > one (386+ ?).
] > 
] > jin meng
]
There are several 186EX proliferations that have the peripherals
you mention. Performance is not up to par with a 386, however
(20MHz 8086). You might want to look into a 386 with a PC chipset.
386s are dirt cheap now...

--
|  Mitch Kahn              | "I hope you know that this will go down on |
|  mkahn@sedona.intel.com  |  your permanent record..."                 |
*************************MY OWN OPINIONS*********************************
From: davidsen@yeti.crd.GE.COM (william E Davidsen)
Newsgroups: comp.sys.intel
Subject: Re: RISC vs. CISC (Was: Re: P5 or Pentium)
Date: 23 Nov 92 16:28:12 GMT
Reply-To: davidsen@crd.ge.com (bill davidsen)
Organization: GE Corporate R&D Center, Schenectady NY

In article <1ejb8lINNos7@chnews.intel.com>, tmcconne@sedona.intel.com (Tom McConnell~) writes:

| because it is running faster. For example, as I recall the first HP-PA
| (Precision Architecture) chip set was actually bonded to large copper
| "Finstrates" to dissapate heat because it ran so fast.

  That's not exactly a novel idea... GE was doing that back in the 60's
while we ere still in the computer business. And water cooling the back
of the substrate, too.

  There's a story that some algae formed in the cooling system, and one
of the employees decided s/he knew how to fix that (this was in Pheonix
AZ) and added some pool chemicals to the water. Unfortunately copper
sulphate and stuff made the water a nifty copper solvent and disolved
the chip from the backside.

  Right after that we sold the business.
-- 
bill davidsen, GE Corp. R&D Center; Box 8; Schenectady NY 12345
    Keyboard controller has been disabled, press F1 to continue.
Newsgroups: comp.sys.intel
From: yeoy@a.cs.okstate.edu (YEO YEK CHONG)
Subject: RISC vs CISC
Organization: Oklahoma State University, Computer Science, Stillwater
Date: Mon, 23 Nov 92 20:43:36 GMT

In article <DOCONNOR.92Nov20100231@potato.sedona.intel.com>, doconnor@sedona.intel.com (Dennis O'Connor) writes:
> 
> mu@terapin.com (Mu Hong Lin) writes:
> ] Will someone explain ( technially ) why RISC chips are so much faster
> ] than CISC chips??
> 
> RISC chips don't need to support obsolete mis-features from 10 years ago.
> CISC chips generally do, because they are all old architectures.
> --
> Dennis O'Connor			doconnor@sedona.intel.com

>tmcconne@sedona
>  To be fair, that answer may fit a particular part, but has nothing to do with
>the RISC/CISC question...........
>  In a more general sense, there is no clear winner in the RISC/CISC wars,
>although RISC seems to be gaining the edge,based on announcements from the last
>couple of years.                           ^^^^^^^^^^^^^^^^^^^^^^

	Although the initial idea was for RISC to have simple architecture,
single clock cycle instruction set and taking full advantage of piplining and
other parallel processing techniques, some argue that delaying hardware 
architectural decisions to software engineers has made compiler writing and
other software engineering issues much difficult tasks to accomplish.  And thus
there is also this sentiment that we are not getting anywhere with RISC.
	Comments and responses please.

Yeo Yek Chong

Newsgroups: comp.sys.intel
From: imcneill@mccomp.demon.co.uk (imcneill)
Subject: Re: 8096/80196 systems 
Distribution: world
Organization: MC Computers
X-Mailer: Simple NEWS 1.90 (ka9q DIS 1.18)
Date: Mon, 16 Nov 1992 01:16:20 +0000


In article <MKAHN.92Nov12090908@hopi.sedona.intel.com> mkahn@hopi.sedona.intel.com writes:

>krf1061@ultb.isc.rit.edu (K.R. Flanagan) writes:
>
> Summary: any one have any exsperience with them?
>] Keywords: NOT the 80x86 family
>] Originator: krf1061@ultb
>] Nntp-Posting-Host: ultb-gw.isc.rit.edu
>]
>]
>]        Hi I was wondering if anyone in this group had any practicle
>]     exspereince with the intel 8096 family on 16 bit micro controllers,
>]     or if there was a group on this net that dealt with them. Just
>]     curious, I've been playing around with some and have been having
>]     alot of head aches. Oh for those of you unfamilar with 8096 its
>]     sort of a funky 99 register 8086 without all the crazy offset
>
>8086??? Not even close!
>
>]     registers and has several PWM (pulse width modulation) lines for
>]     D/A or ac I/O, also has a built in rom.
>]        Actually I do have a question for anyone out there that might
>]     know, I've been looking over a 80196kb board by vesta the last few
>]     days and am very confused how they can get it to support 256k,
>]     (128 ram, 128 rom). I'm assuming bank switching but have no clue.
>]
>
>Why would you want 128k of ROM with a 196?
>
>The 196 has a 64kb address space (except the newer versions which are
>
Isn't it the kb (possibly the kc) that can have 64k code & 64k data space.
Theres a control line to separate them out.  OK so the code and data have to
be burnt into separate eproms, but you still get 128k program space!

I like the 196, a real flexible registers system, quite a quick multiple
instuction, and every register can be operated on.  For someone from a 6502/
Z80 background, this thing is heaven!


--
Regards

Ian.

#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#
# Email To:                     | If you don't hear #
* imcneill@mccomp.demon.co.uk   | the tree falling, *
# imcneill@cix.compulink.co.uk  |   who cares ?     #
#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#
Newsgroups: comp.sys.intel
From: esky@marathon.cs.ucla.edu (Eskandar Ensafi)
Subject: i860 vs. i960
Reply-To: esky@marathon.cs.ucla.edu
Organization: UCLA, Computer Science Department
Date: Tue, 17 Nov 92 23:39:54 GMT

Hi,

What are the chief differences between the i860 and i960?  Are they even the  
same "famility" of processors?  I have seen printers using the i960 to run  
PostScript, and I was wondering how the i960 is (and I am speculating) a better  
choice for this.

I rarely read news so PLEASE REPLY BY E-MAIL.

Thank you!

- Eskandar
Newsgroups: comp.sys.intel
From: lam@mrcnext.cso.uiuc.edu (Ken Lam)
Subject: Any FTP sites at intel for info on Intel chips?
Organization: University of Illinois at Urbana
Date: Fri, 20 Nov 1992 18:44:51 GMT

Title says it all.

Thanks..

--
Ken Lam                                                     (803)-884-7615 (H)
System Administrator                                        (803)-792-4969 (W)
Senior Systems Consultant                                   (803)-792-5446(FAX)
Netware/UNIX System Programmer/Integrator                    lam@jove.cofc.edu
MultiMedia Works & Video Productions ======= Teaching the world in better ways

Newsgroups: comp.sys.intel
From: flamer@mithril.intel.com (Jim Trethewey @mithril)
Subject: Re: Idea for the P5!
Organization: Intel Corporation
Distribution: usa
Date: Thu, 19 Nov 1992 15:31:16 GMT

In article <1992Nov18.203321.18612@msuinfo.cl.msu.edu>, sundaram@eecae.msu.edu writes:
> Instead of devoting part of the die to emulate 80x86 code, why not include some
> instructions that will allow the P5 to act as a master processor to a true 
> (or slightly modified) 80x86 chip.

As we have seen with other co-processor scenarios (most notably 8087, 287,
and 387), you sacrifice a lot of speed by having to "go off chip" as
opposed to having the functionality onboard.  Although many people think
the 486SX upgrade "trick" is stupid, I think it was a smart idea for
exactly this performance reason.  Another factor to consider is that a
large percentage of the power drawn by a microprocessor is devoted to 
driving the I/O pins.  The less you wiggle those lines, the cooler it will
run.  Hence another advantage of onboard cache and coprocessor functions.
--
--Jim Trethewey, $WORK = flamer@mithril.intel.com, $HOME = flamer@alfirin
 5200 NE Elam Young Parkway HF3-73, Hillsboro OR 97124-6497 (503)696-5444
From: fj05+@andrew.cmu.edu (Faisal Nameer Jawdat)
Newsgroups: comp.sys.intel
Subject: Re: Intel rules...(BENCHMARKS)
Date: 21 Nov 92 22:30:27 GMT
Article-I.D.: andrew.Af3oIXu00aw_84do4A
	<1992Nov22.020550.15223@wri.com>
Organization: Sophomore, Physics, Carnegie Mellon, Pittsburgh, PA

perelet@avignon.wri.com (Oleg Perelet) writes:
> Here are some results of raytracing. (RAYSHADE).
> command line: (pool.ray is part of rayshade distribution)
> 
> > rayshade -R 512 512 -O out.rle pool.rle

presumably these are all run on unix systems...

> 04025   :Total CPU time (sec):           2141.4 (NeXT)
> 48633   :Total CPU time (sec):           2289.0 (486 CLONE)
> 04033   :Total CPU time (sec):           1681.1 (NeXT turbo)
> 48650   :Total CPU time (sec):           1574.0 (DELL)

is this a dx or a dx2 ?

> 38633+W :Total CPU time (sec):           1307.3 (386 CLONE + Weitek)
> SPARC2  :Total CPU time (sec):           1161.2 (SUN SSII)
> R3000   :Total CPU time (sec):            589.6 (DEC 5000 240)
> SPARC10 :Total CPU time (sec):            575.6 (SUN SS10)
> PA-RISC :Total CPU time (sec):            439.8 (HP 730)

what this data is lacking is what os is running on each intel based
platform, and other sundry extras such as graphics, etc.
for instance, a relatively fast unix in terminal mode on an intel
based machine is going to be a hell of a lot faster than a NeXT
running NeXTstep, etc.
also, things like amount of memory make a difference, so the info
above, while interesting, doesn't really answer the question without
additional info
From: zeke@fasttech.com (Bohdan Tashchuk)
Newsgroups: comp.sys.intel
Subject: Re: Idea for the P5!
Date: 20 Nov 92 06:23:02 GMT
Article-I.D.: fasttech.1992Nov20.062302.10740
Distribution: usa
Organization: Fast Technology

In <1992Nov19.135830.17432@crd.ge.com> davidsen@ariel.crd.GE.COM (william E Davidsen) writes:
>  The correct name for the P5 is "Godot."

>  I predict that the P5 will ship in volume as soon as AMD starts
>shipping their 486, just as the 486 suddenly because more available when
>other 386 chips were shipping.

You make this sound like it was in some way "bad". It's ethical competition
and good business tactics.

I'm happy to lead the way in disparaging Intel's legal antics and their
duplicity in dealing with AMD. But there's nothing wrong with delaying a
product for a few months for marketing reasons.
From: fbaglew@cs-acad-lan.Lakeheadu.Ca (Richard Glew)
Newsgroups: comp.sys.intel
Subject: 68000 vs Intel Hardware Costs
Date: 20 Nov 1992 04:06:46 GMT
Organization: Lakehead University

I am attempting to quantify the difference in hardware costs to outfit 
administrative assistants with PCs/Macs of `equal' power.

Is it reasonable to assume that I can compare Motorola & Intel driven 
systems on the usual sorts of things - MHz, cache size, w/wo FPU, bus 
widths, etc?

Thank you.


Richard Glew
School of Business Administration
Lakehead University.
Newsgroups: comp.sys.intel
From: fineberg@win31.nas.nasa.gov (Samuel A. Fineberg)
Subject: Re: P5 or Pentium
Organization: CSC, NASA Ames Research Center, NAS Division
Date: Fri, 20 Nov 92 16:59:08 GMT
Reply-To: fineberg@nas.nasa.gov

In article <mu.2a8o@terapin.com>, mu@terapin.com (Mu Hong Lin) writes:
|> The official name for P5 is Pentium.  But I find that many people, including my
|> self prefers to call it P5 still.  Pentium just sounds funny...
|> 
|> But too bad though, Intel can't change the name now.  Because if they do,
|> consumers are really going to be confused :)
|> 
|> I thought Pentium will be better for future Mac's...  Mac Quadras, and then Mac
|> Pentium :P  I wonder how Motorola is doi with '050.  I guess Intel's profit is
|> too great, I mean, Intel makes more money, and will have more money to spend in
|> R&D.
|> 
|> Will someone explain ( technially ) why RISC chips are so much faster than CISC
|> chips??  Or, please point to some books, which I may find accurate information.
|>  Thanks!
If you don't like the name Pentium, call it the 586.  Its just as acurate as
calling it the P5 (remember Intel re-uses its names so there may be another
P5 some day soon), and thats probably what AMD and Cyrix will call thier 
"Pentium Compatibles."

Sam

P.S., I agree that Pentium is a stupid name, but the only way we can get
companies to stop makeing bad marketing decisions is to let them backfire.
From: mu@terapin.com (Mu Hong Lin)
Newsgroups: comp.sys.intel
Subject: P5 or Pentium
Date: 19 Nov 92 19:53:09 PST
Organization: BBS

The official name for P5 is Pentium.  But I find that many people, including my
self prefers to call it P5 still.  Pentium just sounds funny...

But too bad though, Intel can't change the name now.  Because if they do,
consumers are really going to be confused :)

I thought Pentium will be better for future Mac's...  Mac Quadras, and then Mac
Pentium :P  I wonder how Motorola is doi with '050.  I guess Intel's profit is
too great, I mean, Intel makes more money, and will have more money to spend in
R&D.

Will someone explain ( technially ) why RISC chips are so much faster than CISC
chips??  Or, please point to some books, which I may find accurate information.
 Thanks!

Newsgroups: comp.sys.intel
From: zeke@fasttech.com (Bohdan Tashchuk)
Subject: Re: Request for OverDrive technical details
Organization: Fast Technology
Date: Sun, 22 Nov 1992 13:53:56 GMT

In <1992Nov21.001602.3987@ichips.intel.com> markg@pdx820 (Mark Gonzales) writes:

>The OverDrive CPU does not care if the original is in place or not.

Well, this isn't quite true. The CPU doesn't care, but the motherboard might.

Intel would *prefer* that you left the damn thing alone. They have tried their
hardest to muddy the waters by having three different pinouts between DX, SX,
and OverDrive. This makes it difficult to just swap in a new chip for an old.
The idea being that if you can't swap then you'll leave the old one alone and
not glut the market with these pulled chips.

If you remove the SX chip then you will leave some motherboard inputs
floating. This has the potential of introducing major flakiness into the
system. Maybe the motherboard designer anticipated this and added resistors
to the motherboard inputs, and maybe he didn't. Considering how cutthroat the
business is these days he probably opted to save a few pennies.

In particular the HLDA output from the SX is quite important. Depending on the
specific motherboard there could be others. Of course, you can replace the SX
with a cheap header that has some resistors on it.
Newsgroups: comp.sys.intel
From: pjordan@rp.CSIRO.AU (Patrick Jordan)
Subject: Request for i860 fft sources
Organization: CSIRO Division of Radiophysics, NSW, Australia
Date: Mon, 16 Nov 1992 22:41:13 GMT


Can anybody provide assembler sources for fft programs for the i860.
Also, any other vector arithmetic operations coded in assembler for
the i860 would be useful.

There is an fft program in the i860 reference manual and we are hoping
not to have to type it in.

Thanks in advance,

Patrick.

------------------------------------------------------------------------------
Patrick Jordan                      |          _
CSIRO Division of Radiophysics      |        // \   I am not a number,
NSW, Australia                      |       /( 6 )  I am a free man.
pjordan@rp.csiro.au                 |      () \_/
------------------------------------------------------------------------------




Newsgroups: comp.sys.intel
From: clemens@ikki.informatik.rwth-aachen.de (Cornel Clemens)
Subject: RapidCad
Organization: Rechnerbetrieb Informatik  /  RWTH Aachen
Date: 17 Nov 92 13:20:36 GMT

Hi

I have some problems installing a Intel RAPIDCAD on a mircochannel machine.

Has anybody experince with RapidCad in MCA based machines ?
I installed it and my pc does not boot at all.
i even can't see the Bios header when switching on my pc.

The chips are OK, I tested them in an ISA - PC with an AMI Bios.

I have a mitac MPS3000f with Phoenix Bios and 386DX-25MHz

C'U'

Cornel

email: clemens@pool.informatik.rwth-aachen.de

Newsgroups: comp.sys.intel
From: jon.taylor@uuserv.cc.utah.edu (JON M. TAYLOR)
Subject: Re: Idea for the P5!
Organization: The University of Utah
Distribution: usa
Date: Thu, 19 Nov 1992 21:12:33 GMT

In article <1992Nov19.135830.17432@crd.ge.com> davidsen@ariel.crd.GE.COM (william E Davidsen) writes:
>From: davidsen@ariel.crd.GE.COM (william E Davidsen)
>Subject: Re: Idea for the P5!
>Date: 19 Nov 92 13:58:30 GMT
>In article <1992Nov18.222927.20422@nas.nasa.gov>, fineberg@win31.nas.nasa.gov (Samuel A. Fineberg) writes:
>
>| I think the main problem is that its done.  The P5 is no longer under development
>| (though they may still be debugging it).  Also, there is no P5 any more, it is
>| called the Pentium CPU.  Sure the name is stupid, but its too late to change
>| that either.  Maybe you should concentrate on the P6?
>
>  The correct name for the P5 is "Godot."
>
>  I find it interesting that Intel implied that the reason the P5 is
>late is because they have all their fab lines tied up with the 486
>demand, and yet they have just announced the 486DX2-80. If this sells
                 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^               
>well it will tie up more fab lines.
>
	?????  I haven't heard of this!  Does that mean there will be a DX-
40 chip out?

	-Jon
Xref: sparky comp.sys.intel:2257 comp.unix.sysv386:16516
From: akay@mipos2.intel.com (Allen Kay)
Newsgroups: comp.sys.intel,comp.unix.sysv386
Subject: AT&T assembler format to Intel assembler format tranlator
Date: 16 Nov 92 18:14:49 GMT
Organization: Intel Corporation, Santa Clara, CA USA

I'm looking for a translator which translates Unix 386 assembler format
to Intel assembler format.  Is there anyone out there has this tool?

Thanks.

Allen Kay
akay@mipos2.intel.com
(408) 765-5061
Newsgroups: comp.sys.intel
From: rda758g@monu6.cc.monash.edu.au (A.J. Kleinert)
Subject: i196 series
Summary: new 196'a
Keywords: i196 series
Organization: Monash University, Melb., Australia.
Date: Thu, 19 Nov 1992 06:01:35 GMT

Hi,

I have heard from various sources that there might be
a new addition to the i196 series due soon/already released. ( The most
recent one that I am familiar with is the i196KD20. ) This person 
mentioned in the same breath the phrases "1 Meg address space",
"32K flash RAM".  Is there substance to these rumours?  Is there
any other nice things due in the 196 line?

Andrew Kleinert

rda758g@monu6.cc.monash.edu.au

Newsgroups: comp.sys.intel
From: danh@quantum.on.ca (Dan Hildebrand)
Subject: Re: Request for OverDrive technical details
Date: Sun, 22 Nov 92 22:00:55 GMT
Organization: Quantum Software Systems

In article <1992Nov22.135356.1160@fasttech.com> zeke@fasttech.com (Bohdan Tashchuk) writes:
>In <1992Nov21.001602.3987@ichips.intel.com> markg@pdx820 (Mark Gonzales) writes:
>
>>The OverDrive CPU does not care if the original is in place or not.
>
>Well, this isn't quite true. The CPU doesn't care, but the motherboard might.
>
>Intel would *prefer* that you left the damn thing alone. They have tried their
>hardest to muddy the waters by having three different pinouts between DX, SX,
>and OverDrive. This makes it difficult to just swap in a new chip for an old.
>The idea being that if you can't swap then you'll leave the old one alone and
>not glut the market with these pulled chips.

If you look at the 487DX as an attempt to develop a chip which could be 
sold at the retail level as a "speed-up" component for 486SX systems, much 
like the 8087 and 287 used to be sold, leaving the 486SX in place does make 
some sense. It takes a fair amount of familiarity with circuit boards, 
sockets, etc. to wrestle a 486SX out of its socket without damaging the 
board around it ( even with the right tools ). For the level of customer 
likely to purchase this chip as an after-market speed-up, it makes sense 
that they can buy the chip and easily plug it into an empty socket without 
a lot of hassle. I shudder to think how many systems would be brought back 
to the store for repair, mangled in an attempt to extract the 486SX from its 
socket.

-- 
Dan Hildebrand                     email: danh@qnx.com
Quantum Software Systems, Ltd.     QUICS: danh  (613) 591-0934 (data)
(613) 591-0931 x204 (voice)        mail:  175 Terrence Matthews          
(613) 591-3579      (fax)                 Kanata, Ontario, Canada K2M 1W8