HDTenEightyP/NetNews huggingface dataset:
Organization: Arizona State University
Date: Tuesday, 22 Dec 1992 11:16:42 MST
From: Ben Goren <AUBXG@ASUACAD.BITNET>
Newsgroups: comp.lang.postscript
Subject: FAQ, please

Could somebody kindly post the FAQ (it *has* been revived, right)? The
s/n ratio here seems to be deteriorating....

And, while I'm thinking about it, I haven't seen any discussion for
some time about comp.sources.postscript. Have we given up on it? I
hope not, even thought I think my preference is for something along
the lines of comp.lang.postscript.programmers moderated.

b&
Organization: Arizona State University
Date: Sunday, 3 Jan 1993 12:12:26 MST
From: Ben Goren <AUBXG@ASUACAD.BITNET>
Newsgroups: comp.lang.postscript
Subject: Re: how to reverse video of the bitmap image?
Distribution: usa

Is there anything wrong with {1 exch sub}settransfer?

b&
Newsgroups: comp.lang.idl-pvwave
Organization: Valencia Uiversity (Universitat de Valencia) SPAIN
Date: Tue, 22 Dec 1992 13:25:55 EST
From: Jose Vicente Romero Bauset <ROMERO@EVALUN11.BITNET>
Newsgroups: comp.lang.idl-pvwave
Subject: contours

I am an IDL novice user. My question is:
Is there any possibility (I am sure there is) of drawing more
than 30 levels using the CONTOUR command?
Thanks in advance.
Jose Vicente Romero. University of Valencia.
P.S.
Jingle bells, jingle bells, la la la la la
Merry Christmas and Happy New Year 1993.
From: peba1231@camillo.fb12.tu-berlin.de (Peter Bartsch)
Newsgroups: comp.lang.idl-pvwave
Subject: Re: Command buffer
Date: 23 Dec 1992 14:51:36 GMT
Organization: TU Berlin, Inst. f. Luft- und Raumfahrt, FRG
Distribution: world
Reply-To: peba1231@camillo.fb12.tu-berlin.de
NNTP-Posting-Host: camillo.fb12.tu-berlin.de

dieh2133@w251zrz.zrz.tu-berlin.de (Rolf Diehl) writes:
: Hello,
: does anybody know about a command to get a longer command-history then 20.
: I am using wave 3.1. 
: 	Thanx for any hints
: 
: 
In IDL, you can set !EDIT_INPUT=<n> to get <n> lines in command history.

Peter

----------------------------------------------------------------------
Peter Bartsch        |   Tel.    +49 (0)30 314 23093
TU Berlin, Sekr. F2  |   FAX:    +49 (0)30 314 22866
Marchstr. 14         |
1000 Berlin 10       |   e-mail: peba1231@camillo.fb12.tu-berlin.de
----------------------------------------------------------------------
Newsgroups: comp.lang.idl-pvwave
From: wellsj@orph14.phy.ornl.gov (Jack C. Wells)
Subject: Define number of Contours used
Followup-To: comp.lang.idl-pvwave
Organization: Oak Ridge National Lab
Date: Sat, 2 Jan 1993 15:23:42 GMT

Hello,  I'm a novice PVwave user, and I have a couple of simple questions.

1.  I wish to define the number of contour lines drawn, but still
have pvwave define the value of the contours.  This is possible
with other packages I have used (e.g. NCARGraphics ).  How can I do this?

2.  When I use the spline keyword ( /spline ) to smooth my contour
plot I unknowingly introduce contour-line labels.  I want smooth
unlableled contours.  Any suggestions?

Thanks in Advance.   

Work Phone: (615) 576-5229
    __o              
 _`\<,_           
(_)/   (_)       
* * * * * * * * * * * * * * * * * *
From: dieh2133@w251zrz.zrz.tu-berlin.de (Rolf Diehl)
Newsgroups: comp.lang.idl-pvwave
Subject: Command buffer
Date: 21 Dec 1992 19:04:25 GMT
Organization: ZRZ der TU-Berlin
Distribution: world
NNTP-Posting-Host: w251zrz.zrz.tu-berlin.de

Hello,
does anybody know about a command to get a longer command-history then 20.
I am using wave 3.1. 
	Thanx for any hints


_____________________________________________________________________
|Dipl.-Ing. Rolf Diehl, TU Berlin, Institut fuer technische Akustik |
|Tel 030-314-22889, Fax -23222, dieh2133@files1zrz.zrz.tu-berlin.de |
|___________________________________________________________________|
Newsgroups: comp.lang.idl-pvwave
From: ljg@space.physics.uiowa.edu (Larry Granroth)
Subject: reading multiple tape files
Organization: The University of Iowa, Department of Physics and Astronomy
X-Newsreader: TIN [version 1.1 PL8]
Date: Thu, 24 Dec 1992 04:31:18 GMT


Can anyone suggest a good way of reading multiple files from a tape
device in (Unix) IDL?  EOF() doesn't work with a tape file.  I can
do something like:

openr,1,'/dev/nrst0'

while more_files_on_tape do begin

  !error=0
  on_ioerror, done

  while (1) do begin
    readu,1,buf
    ; . . . process data ...
  endwhile

  done:

  if !error then print, !err_string
  !error = 0
  on_ioerror, null

endwhile

This will work to read a single file at a time, but the on_ioerror
immediately jumps to "done" on any attempt to read more than one file.
Also, I'm not really sure how to test for "more_files_on_tape", except
maybe checking for a "zero-length" file which might be a result
of two consecutive tape marks.

Thanks for any info.

Happy Holidays.

larry-granroth@uiowa.edu
Newsgroups: comp.lang.idl-pvwave
From: mayer@teal.csn.org (Mike Mayer)
Subject: Re: Command buffer
Organization: Colorado SuperNet, Inc.
X-Newsreader: Tin 1.1 PL4
Date: Tue, 22 Dec 1992 19:01:42 GMT

dieh2133@w251zrz.zrz.tu-berlin.de (Rolf Diehl) writes:
: Hello,
: does anybody know about a command to get a longer command-history then 20.
: I am using wave 3.1. 
: 	Thanx for any hints
: 
: 
I believe the limit of 20 commands for recall is hard-coded into the
PV-WAVE kernal.  Unfortunately, there is no way to change that value
other than modifying the PV-WAVE source code and rebuilding the product.
On your behalf, I will request that we increase the 20-command limit, and,
perhaps better yet, make it so that you can set a system variable to
the number of history commands you wish to store.  If PVI Engineering
should decide to implement this fix, it would be in a future version.
You can "sneak" more than one command into a command line by using
the & delimiter to separate them before hitting the carriage return.

I hope this helps!

Mike   
-- 
___---^^^---___---^^^---___---^^^---___---^^^--- Catch The WAVE ---___      
Michael Mayer, Senior Technical Support Engineer   
Precision Visuals, Inc. 32915 Aurora Rd. Suite # 160, Solon, OH, 44139  USA
Email: mayer@pvi.com   Human: 216/248-4900   Fax: 216-248-2733
From: atmos@vax.oxford.ac.uk
Newsgroups: comp.lang.idl-pvwave
Subject: Polar stereographic plots
Date: 22 Dec 92 17:09:35 GMT
Organization: Oxford University VAX 6620



I was wondering if anyone has any existing IDL routines that convert 
geographical longitude and latitude coordinates to geomagnetic ones?

We need to compare some solar particle events to satellite measurements 
of the Earth's upper atmosphere.

with thanks,

Paul Morris,
Dept. of Atmospheric Physics,
University of Oxford,
England 
Newsgroups: comp.lang.idl-pvwave
From: knight@ll.mit.edu (Fred Knight)
Subject: tape I/O under Unix: eof always true?
Originator: knight@ll.mit.edu (Fred Knight)
Reply-To: knight@ll.mit.edu (Fred Knight)
Organization: Group 45, MIT Lincoln Lab.
Date: Thu, 31 Dec 92 14:18:48 GMT



Can anybody give me some help on IDL's handling of eof while reading
tape under Unix?  The following test fails.  I mount a (test) tar tape
and do the following:

IDL> openr,lun,/get_lun,'/dev/rst0'
IDL> print,eof(lun)
       1				; <==== Why? Shouldn't it be zero?
IDL> point_lun,lun,100
IDL> print,eof(lun)   
       1				; <==== Same question.
IDL> a=bytarr(2048)
IDL> readu,lun,a
IDL> print,eof(lun)
       1				; <==== Same question.

Thanks for any help,

Fred
-- 
=Fred Knight (knight@ll.mit.edu)	(617) 981-2027
 C-483\\MIT Lincoln Laboratory\\244 Wood Street\\Lexington, MA  02173
Newsgroups: comp.lang.idl-pvwave
From: ljg@space.physics.uiowa.edu (Larry Granroth)
Subject: Re: tape I/O under Unix: eof always true?
Organization: The University of Iowa, Department of Physics and Astronomy
X-Newsreader: TIN [version 1.1 PL8]
Date: Sat, 2 Jan 1993 03:29:56 GMT

Fred Knight (knight@ll.mit.edu) wrote:
: Can anybody give me some help on IDL's handling of eof while reading
: tape under Unix?  The following test fails.  I mount a (test) tar tape
: and do the following:
: IDL> openr,lun,/get_lun,'/dev/rst0'
: IDL> print,eof(lun)
:        1				; <==== Why? Shouldn't it be zero?
: IDL> point_lun,lun,100
: IDL> print,eof(lun)   
:        1				; <==== Same question.
: IDL> a=bytarr(2048)
: IDL> readu,lun,a
: IDL> print,eof(lun)
:        1				; <==== Same question.

: Thanks for any help,

: Fred
: -- 
: =Fred Knight (knight@ll.mit.edu)	(617) 981-2027
:  C-483\\MIT Lincoln Laboratory\\244 Wood Street\\Lexington, MA  02173

Hmmm . . . Didn't my recent posting make it out?  In it, I mentioned
that eof() doesn't work with tape files.  However, using on_ioerror works:

  openr,1,'/dev/nrst0'

  !error = 0
  on_ioerror, done

  while (1) do begin
    readu,1,buf
    ; . . . process data . . .
  endwhile

  done:
  if !error then print, !err_string

The above will work to read a single file from a tape, however I still
have no answer as to how to read multiple files from a tape.  So far,
the only way I can read a second file is to exit completely out of IDL,
reposition the tape with mt, restart IDL and rerun the application.
I guess I'll be giving RSI a call on Monday.

larry-granroth@uiowa.edu
From: patel@sparky.drad.umn.edu) (8-)
Newsgroups: comp.lang.idl-pvwave
Subject: Minimization routine
Date: 27 Dec 92 21:04:13 GMT
Organization: University of Minnesota, Radiology Department

Hi Folks:
	I was wondering if someone out there has written a
	minimization routine like ZXMIN in IMSL? If so can
	he/she share it with me?

	In what language is IDL/PvWave written? FORTRAN, C
	assembly ...

	Thanks

	Maqbool Patel.
Newsgroups: comp.lang.idl-pvwave
From: mayer@teal.csn.org (Mike Mayer)
Subject: Re: Minimization routine
Organization: Colorado SuperNet, Inc.
X-Newsreader: Tin 1.1 PL4
Date: Tue, 29 Dec 1992 17:53:27 GMT

patel@sparky.drad.umn.edu (8-) writes:
: Hi Folks:
: 	I was wondering if someone out there has written a
: 	minimization routine like ZXMIN in IMSL? If so can
: 	he/she share it with me?
: 
: 	In what language is IDL/PvWave written? FORTRAN, C
: 	assembly ...
: 
: 	Thanks
: 
: 	Maqbool Patel.

PV-WAVE Command Language, PV-WAVE Point&Click, and I believe IDL are
all written in C, at least for the Unix versions.

Mike


-- 
___---^^^---___---^^^---___---^^^---___---^^^--- Catch The WAVE ---___      
Michael Mayer, Senior Technical Support Engineer   
Precision Visuals, Inc. 32915 Aurora Rd. Suite # 160, Solon, OH, 44139  USA
Email: mayer@pvi.com   Human: 216/248-4900   Fax: 216-248-2733
Newsgroups: comp.lang.idl-pvwave
From: landsman@stars.gsfc.nasa.gov (Wayne Landsman (301)-286-3625)
Subject: Widget events from the keyboard?
News-Software: VAX/VMS VNEWS 1.4-b1  
Organization: NASA/GSFC-Laboratory for Astronomy and Solar Physics
Date: Wed, 30 Dec 1992 23:08:00 GMT

    I am posting this question for someone without USENET access.    Replies
can be posted to the net, sent to me, or sent to Marc Buie (buie@lowell.edu)

   Is there anyway to trigger a widget event without using the mouse?
The situation is that I am roaming an image with the cursor and at a particular
position, I want the user to be able to select from a list of options,
--- say centroid at the position, display pixels at the position, plot a radial
profile at that position.    I don't want to use a menu because that means
moving the cursor from the image position.    I could use the mouse buttons 
but there are only 3 of them, and I have a list of 10-15 options.     Ideally, 
I would use the keyboard (i.e. press 'C' for centroid) but I don't know
how to trigger a widget event from the keyboard.    (Outside of widgets one
could use GET_KBRD).      Any suggestions?

Wayne Landsman                   landsman@stars.gsfc.nasa.gov




Newsgroups: comp.lang.vhdl
From: schmiedt@Informatik.TU-Muenchen.DE (Dirk Schmiedt)
Subject: VHDL - UDL/I
Originator: schmiedt@hphalle2g.informatik.tu-muenchen.de
Organization: Technische Universitaet Muenchen, Germany
Date: Tue, 22 Dec 1992 18:05:20 GMT


I am am working on a comparison between VHDL and UDL/I.

Do You have nay suggestions, where can I find information about UDL/I

in any net ?


Thank You very much !

Smile & Regards
  Dirk

schmiedt@informatik.tu-muenchen.de
From: pchawla@vlsisun.ece.uc.edu (Praveen Chawla)
Subject: Bus resolution functions and Quiet attribute...
Organization: Dept. of ECE, University of Cincinnati
Distribution: comp
Date: Wed, 23 Dec 1992 14:06:46 GMT


Greetings to al comp.lang.vhdl readers !

I have the following question about resolution functions. 

Is there any way to determine the "active drivers" (drivers with
transactions at current time) out of all the drivers for a signal that
are passed to the resolution function within the resolution function ?

Thanks. I really appreciate your help.

------------------------------------------------------------------------------
Praveen Chawla   Senior Computer Engineer internet: pchawla@mtl.com
513+426-3111     MTL Systems, Inc.        
                 3481, Dayton-Xenia Road                 
                 Dayton, OH 45432
------------------------------------------------------------------------------






--
					-- Praveen
From: dettmer@jupiter.informatik.uni-dortmund.de (Thomas Dettmer)
Newsgroups: comp.lang.vhdl
Subject: Happy new year
Date: 30 Dec 1992 11:54:36 GMT
Organization: University of Dortmund, Germany
Distribution: world
NNTP-Posting-Host: jupiter.informatik.uni-dortmund.de


I wish a happy and successfull 1993 to everyone receiving this group.
Good luck with every design...

no, I'm not the moderator - this group is unmoderated. But I feel resposible
because I maintain the monthly postings (FAQ) and initiated this group in
1991.
tom.
-- 
dettmer@ls1.informatik.uni-dortmund.de
phone: +49-231 755 6323, FAX: +49-231 755 6555
Thomas Dettmer, Dortmund University, Computer Science I
Post Box 50 05 00, W-4600 Dortmund 50, Germany
Newsgroups: comp.lang.vhdl
From: daniel@clsi.COM (Daniel S. Barclay)
Subject: Re: wire primitives in VHDL
Organization: CAD Language Systems Inc.
Date: 28 Dec 92 12:49:51

>  I am not an expert on the subject, and not sure if I can give you an 
> appropreate idea.  If my information is wrong, please ignore. I have no
> confidence on this, just an idea. 
> 
>  But the difference between Verilog and VHDL seems like Port Collapsing. 
> Verilog manual says it Verilog-XL simulator collapses port connections
> whenever possible. And no special declaration is needed for collapsing nets.
> While,(though I am not too sure) in VHDL , if you want to collapse nets
> you need to declare the net type of "Buffer". So, I imagine one of the
> bidirectional signal has to be "Buffer" type. (Do I understand correct?
> VHDL expert, please correct if I am wrong.)
>  However, an example of "Buffer" usage I've seen is different from your
> situation.

Well, port collapsing is not _the_ difference (there are many) ...

A VHDL simulator is allowed to collapse ports (or do whatever other 
optimization it wants) as long as it does not change the behavior of the 
model.  The language is defined (fairly) precisely so that (usually) a 
simulator can tell when it can optimize something. 

Using mode "buffer" may make it easier for a given simulator to optimize the 
simulation.  However, that doesn't mean that all simulators must require you
to use a specific mode to get optimized simulation, and neither does it mean
that using mode "buffer" will optimize simulation on all simulators.

Resolved ports in VHDL make port collapsing difficult.  Because of the signal 
resolution mechanism in VHDL, a simulator can't precisely collapse a resolved 
part unless the user tells the simulator that a given resolution function is 
suitable for collapsing.  (The resolution function must be commutative and 
associative (extended beyond two-argument functions).  In general, a simulator
cannot determine this by inspecting the function.)  A simulator could have a
flag set by the user to assume that resolution functions are collapsible; a
simulator might recognize resolution functions written in a certain form
(e.g., a lookup table) and inspect the table to determine if ports are
collapsible.

--
------------------------------------------------------------------------------
Daniel S. Barclay                    --who's still searching for a good 
CAD Language Systems, Inc.           signature, not liking any of his recent
Suite 101, 5457 Twin Knolls Rd.      feeble attempts to improve on the whiny:
Columbia, MD  21045  USA             Why can't _I_ think of a good signature?

Newsgroups: comp.lang.vhdl
From: mandayrv@ucunix.san.uc.edu (Prince of Wales)
Subject: data types, vhdl
Followup-To: poster
Keywords: union, vhdl
Organization: University of Cincinnati
Distribution: usa
Date: Sat, 2 Jan 1993 18:36:02 GMT

Hi folks,

Is there any options in the vhdl language that lets me declare types
equivalent to the "union" in C. The brute force method that I can think of
is to declare a record with all the possible choices in the original union
as a strictly present field; and have integer tags to access the types: 

	e.g.	-- pseudo vhdl code;

	type union is record
		-- the tag to determine what field to use;
		access_type : integer;
		-- this is where the union starts
		-- list is declared earlier as an access type to a list;
		u1 : real;
		u2 : integer;
		u3 : list
		end record;

Is there any alternative to this lengthy  way of designing a data structure.


thanks for any replies and comments.

ramanand
-- 
ramanand@pumpkin.ece.uc.edu          home:   513 281 9870
rmandaya@uceng.uc.edu                office: 513 556 3025
mandayrv@ucunix.san.uc.edu           ham:    KB8GKL
Newsgroups: comp.lang.vhdl
From: lap@sol.asl.hitachi.com (Larry Pearlstein)
Subject: What types should one use?
Reply-To: lap@sol.asl.hitachi.com
Organization: Hitachi America Ltd
Date: Mon, 21 Dec 1992 15:55:28 GMT

I have been wrestling with the problem of choosing types, and would appreciate
any help or comments on the matter.

The most natural type for implementing designs which involve arithmetic operations
is INTEGER, or INTEGER RANGE ...  The most natural type for flags which are tested
in IF statements is BOOLEAN.  Also, it seems most natural to use enumerated types for
designing state machines.

The other option is to implement these quantities using multi-valued logic.  For
instance Synopsys provides arithmetic operations on MVL vectors called SIGNED and
UNSIGNED.  Also, the IEEE defines the MVL vector type STD_LOGIC_VECTOR, for which
there exists 3rd party arithmetic packages.  I'm not sure what could be done to
replace BOOLEANs with MVL.

The question is ... given that I intend to use VHDL to synthesize chips, what is
the best strategy for choosing types?  Is the use of MVL for simulation a virtual
requirement for success, or will gate-level simulation typically turn up any problems
that would have been caught by using MVL?  Is it feasible to use more abstract
types early in the design process (like INTEGER, enumerated, and BOOLEAN), and then
migrate to MVL by using type re-definitions?  How useful/indespensible is MVL for
designing chips?  If it is indespensible, then what place do abstract types have in
chip design?

						Thanks for any wisdom,

						Larry Pearlstein
						lap@asl.hitachi.com
Newsgroups: comp.lang.vhdl
From: daniel@clsi.COM (Daniel S. Barclay)
Subject: Re: MCC, VHDL
Organization: CAD Language Systems Inc.
Date: 29 Dec 92 10:46:57

mandayrv@ucunix.san.uc.edu (Prince of Wales) writes:
> I am using the MCC compiler/simulator to compile a VHDL file. When I have
> the following line in the source file, the compiler complains that the range
> has to be inside the ANSI C bounds of --2147483647 to +2147483647, which is
> slightly bigger than 1E05. The LRM for VHDL defines that the minimum 
> acceptable limits for any compiler are -1E38 to +1E38. Is there a catch
> somewhere or is it purely a limitation of the MCC system.

1.  You didn't include your following line so I can't see where you tried to
	use a range.  Was it is an integer type definition, a floating-point
	type definition, some other type definition, or somewhere else?

2.  (I assume "--" in "--2147483647" is a typo.  Is that correct, or does it
	mean something I don't recognize?)

3.  (You say that "--2147483647 to +2147483647 [...] is slightly bigger than 
	1E05."  What?  It's a _lot_ bigger than 1E05; it's a little bigger than
	1E09.  Is there a typo here I didn't recognize?)

4.  You say "The LRM for VHDL defines that the minimum acceptable limits for 
	any compiler are -1E38 to +1E38."  That may indicate some confusion.
	There are (at least) two minimums specified in the language:  The VHDL 
	1987 LRM defines that an implementation must support a minimum range 
	of -2147483647 to +2147483647 for an integer type.  It also defines a
	the minimum range of -1.0E38 to +1.0E38 for a floating-point type.
	(Yes, the LRM says 1E38 instead of 1.0E38, but the Interpretations 
	document* says that that is a typo.)

5.  I don't know if the MCC system complies with the standard or not. 
	
* (I think the title is "IEEE Standards Interpretations:  IEEE Std. 1076-1987
IEEE Standard VHDL Language Reference Manual".)

I hope this answers your question.
	
--
------------------------------------------------------------------------------
Daniel S. Barclay                    --who's still searching for a good 
CAD Language Systems, Inc.           signature, not liking any of his recent
Suite 101, 5457 Twin Knolls Rd.      feeble attempts to improve on the whiny:
Columbia, MD  21045  USA             Why can't _I_ think of a good signature?

Newsgroups: comp.lang.vhdl
From: mandayrv@ucunix.san.uc.edu (Prince of Wales)
Subject: MCC, VHDL
Organization: University of Cincinnati
Date: Mon, 28 Dec 1992 20:10:40 GMT

Hi folks,

I am using the MCC compiler/simulator to compile a VHDL file. When I have
the following line in the source file, the compiler complains that the range
has to be inside the ANSI C bounds of --2147483647 to +2147483647, which is
slightly bigger than 1E05. The LRM for VHDL defines that the minimum 
acceptable limits for any compiler are -1E38 to +1E38. Is there a catch
somewhere or is it purely a limitation of the MCC system.

Thanks in advance.

-- 
ramanand@pumpkin.ece.uc.edu          home:   513 281 9870
rmandaya@uceng.uc.edu                office: 513 556 3025
mandayrv@ucunix.san.uc.edu           ham:    KB8GKL
Newsgroups: comp.lang.vhdl
Newsgroups: comp.lang.vhdl


 I am not an expert on the subject, and not sure if I can give you an 
appropreate idea.  If my information is wrong, please ignore. I have no
confidence on this, just an idea. 

 But the difference between Verilog and VHDL seems like Port Collapsing. 
Verilog manual says it Verilog-XL simulator collapses port connections
whenever possible. And no special declaration is needed for collapsing nets.
While,(though I am not too sure) in VHDL , if you want to collapse nets
you need to declare the net type of "Buffer". So, I imagine one of the
bidirectional signal has to be "Buffer" type. (Do I understand correct?
VHDL expert, please correct if I am wrong.)
 However, an example of "Buffer" usage I've seen is different from your
situation.
Newsgroups: comp.lang.vhdl