Export Control List — (ii)
(ii) quantum computers and related electronic assemblies and components therefor, as follows: (A) quantum computers, as follows: (I) quantum computers supporting 34 or more, but fewer than 100, fully controlled, connected and working physical qubits, and having a C-NOT error of less than or equal to 10 -4 , (II) quantum computers supporting 100 or more, but fewer than 200, fully controlled, connected and working physical qubits, and having a C-NOT error of less than or equal to 10 -3 , (III) quantum computers supporting 200 or more, but fewer than 350, fully controlled, connected and working physical qubits, and having a C-NOT error of less than or equal to 2 x 10 -3 , (IV) quantum computers supporting 350 or more, but fewer than 500, fully controlled, connected and working physical qubits, and having a C-NOT error of less than or equal to 3 x 10 -3 , (V) quantum computers supporting 500 or more, but fewer than 700, fully controlled, connected and working physical qubits, and having a C-NOT error of less than or equal to 4 x 10 -3 , (VI) quantum computers supporting 700 or more, but fewer than 1,100, fully controlled, connected and working physical qubits, and having a C-NOT error of less than or equal to 5 x 10 -3 , (VII) quantum computers supporting 1,100 or more, but fewer than 2,000, fully controlled, connected and working physical qubits, and having a C-NOT error of less than or equal to 6 x 10 -3 , and (VIII) quantum computers supporting 2,000 or more fully controlled, connected and working physical qubits, (B) qubit devices and qubit circuits, containing or supporting arrays of physical qubits, and specially designed for items specified in clause (A), and (C) quantum control components and quantum measurement devices specially designed for items specified in clause (A), NOTE 1 Items in clause (B) include semiconductor, superconducting and photonic qubit chips and chip arrays, surface ion trap arrays, other qubit confinement technology, and coherent interconnects between such items. 2 Clause (C) applies to items designed for calibrating, initializing, manipulating or measuring the resident qubits of a quantum computer. 3 Subparagraph (ii) applies to circuit model (or gate-based) and one-way (or measurement-based) quantum computers but does not apply to adiabatic (or annealing) quantum computers. 4 Items specified in subparagraph (ii) may not necessarily physically contain any qubits. For example, quantum computers based on photonic schemes do not permanently contain a physical item that can be identified as a qubit. Instead, photonic qubits are generated while the computer is operating and then later discarded. 5 In subparagraph (ii), physical qubit means a two-level quantum system used to represent the elementary unit of quantum logic by means of manipulations and measurements that are not error-corrected. Physical qubits are distinguished from logical qubits, in that logical qubits are error-corrected qubits composed of many physical qubits. 6 In clause (A), supporting 34 or more fully controlled, connected, working physical qubits refers to the capability of a quantum computer to confine, control, measure and process the quantum information embodied in 34 or more physical qubits. 7 In clause (A), fully controlled means that the physical qubit can be calibrated, initialized, gated and read out, as necessary. 8 In clause (A), connected means that two-qubit gate operations can be performed between any arbitrary pair of the available working physical qubits. This does not necessarily entail all-to-all connectivity. 9 In clause (A), working means that the physical qubit performs universal quantum computational work according to the system specifications for qubit operational fidelity. 10 In clause (A), C-NOT error means the average physical gate error for the nearest-neighbour two-physical qubit Controlled-NOT (C-NOT) gates.