Page type: faculty

Mark D. Hill's Home Page;Mark D. Hill (markhill@cs.wisc.edu);Associate Professor of Computer Sciences; and;Electrical and Computer Engineering;at the University of Wisconsin;Table of Contents; Addresses and Office Hours; Current Teaching and Catalog Information; Education; Research Interests and;Summary; Wisconsin Wind Tunnel Project; A Sampler of Recent Papers; Ph.D. Graduates;Links to Useful Information; World-Wide Computer Architecture Information; Wisconsin CS's Computer Architecture Group; Wisconsin Architectural Research Tool Set (WARTS); Stuff I like to use; Oral;Presentation Advice, including David Patterson's;How to Give a Bad Talk; Online;Raw Data for;Cache Performance of the SPEC92 Benchmark Suite; Proof that I am into hardware; A Wisconsin sound :-);Addresses:;Department of Computer Sciences;University of Wisconsin - Madison;1210 West Dayton Street;Madison, WI 53706 USA;markhill@cs.wisc.edu;Phone: 608-262-2196;Secretary: 608-265-4892 (Julie Fingerson or Thea Sklenar);Departmental Office: 608-262-1204;Fax: 608-262-9777;Office Hours (Fall 1996-1997):;Monday 2:00-3:00, Wednesday 11:00-12:00, or by appointment markhill@cs.wisc.edu;Current Teaching;Fall 1996-1997 -;CS/ECE 752;Advanced Computer Architecture I;Fall 1996-1997 -;CS 838;Topics in Computing - Java: The Language and the Implementation I;Catalog Information on Courses I Teach;CS/ECE 354 -;Machine Organization and Programming;CS/ECE 552 -;Introduction to Computer Architecture;CS/ECE 752 -;Advanced Computer Architecture I;CS/ECE 757 -;Advanced Computer Architecture II;Education:; Ph.D. (Computer Science);University of California - Berkeley, 1987; M.S. (Computer Science);University of California - Berkeley, 1983; B.S.E. (Computer Engineering);University of Michigan, 1981;Research Interests:; Computer architecture; Parallel computing; Memory systems; Performance evaluation;Research Summary;My research targets the memory systems of shared-memory multiprocessors;and high-performance uniprocessors. Memory system design is important,;because it largely determines a computer's sustained performance. My;work emphasizes quantitative analysis (often requiring new evaluation;techniques) of system-level (not just hardware) performance.;Much of my recent work is part of the Wisconsin Wind;Tunnel Projectwith Profs. Larus and Wood and many;students. The project expects most future massively-parallel computers;will be built from workstation-like nodes and programmed in high-level;parallel languages--like HPF--that support a shared address space in;which processes uniformly reference data. Our research seeks to;develop a consensus about the middle-level interface--below languages;and compilers and above system software and hardware. We have recently;proposed the Tempest interface that enables programmers,;compilers, and program libraries to implement and use message passing,;transparent shared memory, and hybrid combinations of the two. We are;developing Tempest implementations on a Thinking Machines CM-5, a;cluster of workstations (COW), and hypothetical hardware platforms.;The Wisconsin Wind Tunnel project is so named because we use our tools;to cull the design space of parallel supercomputers in a manner similar;to how aeronautical engineers use conventional wind tunnels to design;airplanes.;Other recent work with Madhu Talluri;targets improving translation lookaside buffer (TLB);and page table performance by clustering aligned groups of base pages.;Options require changes to hardware only (complete-subblocked TLBs),;operating system only (clustered page tables), or both (superpages;and partial-subblocked TLBs).;See our;ASPLOS;and;SOSP;papers.;A Sampler of Recent Papers;The Wisconsin Wind Tunnel Project: An Annotated Bibliography,;Mark D. Hill, James R. Larus, David A. Wood,;unpublished manuscript, revised frequently.;1996;Parallel Computer Research in the Wisconsin Wind Tunnel Project,;Mark D. Hill, James R. Larus, David A. Wood,;NSF Conference on Experimental Research in Computer Systems, June 1996.;Bidirectional Technology Transfer: Sabbaticals in Industry,;Mark D. Hill,;NSF Conference on Experimental Research in Computer Systems, June 1996.;Coherent Network Interfaces for Fine-Grain Communication,;Shubhendu S. Mukherjee,;Babak Falsafi,;Mark D. Hill, and;David A. Wood.;International Symposium on Computer Architecture (ISCA), 1996;;Optimistic Simulation of Parallel Architectures Using Program Executables,;Sashikanth Chandrasekaran and Mark D. Hill.;Workshop on Parallel and Distributed Simulation (PADS), May 1996.;1995;A New Page Table for 64-bit Address Spaces,;Madhusudhan Talluri, Mark D. Hill, Yousef A. Khalidi,;Symposium on Operating Systems Principals (SOSP),;December 1995.;Presidential Young Investigator Award Final Report,;Mark D. Hill,;July 1995.;Efficient Support for Irregular Applications on Distributed-Memory Machines,;Shubhendu S. Mukherjee, Shamik D. Sharma, Mark D. Hill, James R. Larus,;Anne Rogers, and Joel Saltz,;PPoPP, July 1995.;Cost-Effective Parallel Computing,;David A. Wood and Mark D. Hill,;(IEEE Computer, February 1995).;Solving Microstructure Electrostatics on a Proposed Parallel Computer,;Frank Traenkle, Mark D. Hill, Sangtae Kim,;Computers and Chemical Engineering, 1995.;1994;Application-Specific Protocols for User-Level Shared Memory,;Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, Ioannis Schoinas,;Mark D. Hill James R. Larus, Anne Rogers, David A. Wood,;Supercomputing '94, Nov. 1994.;Surpassing the TLB Performance of Superpages with Less Operating System Support,;Madhusudhan Talluri and Mark D. Hill,;International Conference on Architectural Support for;Programming Languages and Operating Systems (ASPLOS),;October 1994.;An Evaluation of Directory Protocols for Medium-Scale Shared-Memory;Multiprocessors,;Shubhendu S. Mukherjee and Mark D. Hill,;International Conference on Supercomputing (ICS), July 1994.;A Comparison of Trace-Sampling Techniques for Multi-Megabyte Caches,;R. E. Kessler, Mark D. Hill, David A. Wood,;IEEE Transactions on Computers, June 1994.;1993;Cooperative Shared Memory: Software and Hardware for Scalable Multiprocessors,;Mark D. Hill, James R. Larus, Steven K. Reinhardt, David A. Wood,;ACM Transactions on Computer Systems (TOCS), November 1993.;Wisconsin Architectural Research Tool Set (WARTS),;Mark D. Hill, James R. Larus, Alvin R. Lebeck, Madhusudhan Talluri,;David A. Wood,;Computer Architecture News (CAN), August 1993.;Cache Performance of the SPEC92 Benchmark Suite,;Jeffrey D. Gee, Mark D. Hill, Dionisios N. Pnevmatikatos, Alan Jay Smith,;IEEE Micro, August 1993.;A Unified Formalization of Four Shared-Memory Models,;Sarita V. Adve and Mark D. Hill,;IEEE Transactions on Parallel and Distributed Systems (TPDS), June 1993.;Performance Implications of Tolerating Cache Faults,;Andreas Farid Pour and Mark D. Hill,;IEEE Transactions on Computers (TOC), March 1993.;Mechanisms for Cooperative Shared Memory,;David A. Wood, Satish Chandra, Babak Falsafi, Mark D. Hill, James R. Larus,;Alvin R. Lebeck, James C. Lewis, Shubhendu S. Mukherjee, Subbarao Palacharla,;Steven K. Reinhardt,;International Symposium on Computer Architecture (ISCA), May 1993.;The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers,;Steven K. Reinhardt, Mark D. Hill, James R. Larus, Alvin R. Lebeck,;James C. Lewis, David A. Wood,;ACM SIGMETRICS, May 1993.;1992;Page Placement Algorithms for Large Real-Index Caches,;R. E. Kessler, Mark D. Hill,;ACM Transactions on Computer Systems, November 1992.;Programming for Different Memory Consistency Models,;Kourosh Gharachorloo, Sarita V. Adve, Anoop Gupta,;John L. Hennessy, Mark D. Hill,;Journal of Parallel and Distributed Computing, August 1992.;Tradeoffs in Supporting Two Page Sizes,;Madhusudhan Talluri, Shing Kong, Mark D. Hill, David A. Patterson,;International Symposium on Computer Architecture (ISCA), May 1992.;1991;Detecting Data Races on Weak Memory Systems,;Sarita V. Adve, Mark D. Hill, Barton P. Miller, Robert H. B. Netzer,;International Symposium on Computer Architecture (ISCA), June 1991.;Comparison of Hardware and Software Cache Coherence Schemes,;Sarita V. Adve, Vikram S. Adve, Mark D. Hill, Mary K. Vernon,;International Symposium on Computer Architecture (ISCA), June 1991.;A Model for Estimating Trace-Sample Miss Ratios,;David A. Wood, Mark D. Hill, R. E. Kessler;ACM SIGMETRICS, May 1991.;Implementing Stack Simulation for Highly-Associative Memories (extended abstract);Yul H. Kim, Mark D. Hill, David A. Wood,;ACM SIGMETRICS, May 1991.;1990;Implementing Sequential Consistency In Cache-Based Systems,;Sarita V. Adve, Mark D. Hill,;International Conference on Parallel Processing, August 1990.;Weak Ordering - A New Definition,;Sarita V. Adve, Mark D. Hill,;International Symposium on Computer Architecture (ISCA), June 1990.;Ph.D. Graduates;Madhusudhan Talluri,;Ph.D. Expected August 1995,;Use of Superpages and Subblocking in the Address Translation Hierarchy,;first employment: Sun Microsystems,;current email: madhu@eng.sun.com.;Sarita V. Adve,;Ph.D. November 1993,;Designing Memory Consistency Models for Shared-Memory Multiprocessors,;first employment: Assistant Professor at Rice University,;current email: sarita@rice.edu.;Richard E. Kessler,;Ph.D. July 1991,;Analysis of Multi-Megabyte Secondary CPU Cache Memories;(click here for table of contents),;first employment: Cray Research,;current email: richard.kessler@cray.com.;Last Updated;Wed Aug 14 16:52:16 CDT 1996;Keywords to help search engines rank this page higher than my other pages:;Mark Hill Home Page, Computer Sciences, Wisconsin.;Mark Hill Home Page, Computer Sciences, Wisconsin.;Mark Hill Home Page, Computer Sciences, Wisconsin.;Mark Hill Home Page, Computer Sciences, Wisconsin.;