1400f1bd4:	48 8d 4d b0          	lea    -0x50(%rbp),%rcx
1400f1bd8:	48 83 7d c8 10       	cmpq   $0x10,-0x38(%rbp)
1400f1bdd:	48 0f 43 4d b0       	cmovae -0x50(%rbp),%rcx
1400f1be2:	48 8d 55 d0          	lea    -0x30(%rbp),%rdx
1400f1be6:	e8 55 72 ff ff       	call   0x1400e8e40
1400f1beb:	48 8d 4d d0          	lea    -0x30(%rbp),%rcx
1400f1bef:	48 83 7d e8 08       	cmpq   $0x8,-0x18(%rbp)
1400f1bf4:	48 0f 43 4d d0       	cmovae -0x30(%rbp),%rcx
1400f1bf9:	ff 15 b1 c8 10 00    	call   *0x10c8b1(%rip)        # 0x1401fe4b0
1400f1bff:	85 c0                	test   %eax,%eax
1400f1c01:	75 25                	jne    0x1400f1c28
1400f1c03:	48 89 3b             	mov    %rdi,(%rbx)
1400f1c06:	48 89 7b 10          	mov    %rdi,0x10(%rbx)
1400f1c0a:	48 c7 43 18 0f 00 00 	movq   $0xf,0x18(%rbx)
1400f1c11:	00
1400f1c12:	88 03                	mov    %al,(%rbx)
1400f1c14:	45 33 c0             	xor    %r8d,%r8d
1400f1c17:	48 8d 15 5a bd 13 00 	lea    0x13bd5a(%rip),%rdx        # 0x14022d978
1400f1c1e:	48 8b cb             	mov    %rbx,%rcx
1400f1c21:	e8 da 47 fd ff       	call   0x1400c6400
1400f1c26:	eb 20                	jmp    0x1400f1c48
1400f1c28:	0f 10 45 b0          	movups -0x50(%rbp),%xmm0
1400f1c2c:	0f 11 03             	movups %xmm0,(%rbx)
1400f1c2f:	0f 10 4d c0          	movups -0x40(%rbp),%xmm1
1400f1c33:	0f 11 4b 10          	movups %xmm1,0x10(%rbx)
1400f1c37:	66 0f 6f 05 a1 85 19 	movdqa 0x1985a1(%rip),%xmm0        # 0x14028a1e0
1400f1c3e:	00
1400f1c3f:	f3 0f 7f 45 c0       	movdqu %xmm0,-0x40(%rbp)
1400f1c44:	c6 45 b0 00          	movb   $0x0,-0x50(%rbp)
1400f1c48:	48 8d 4d d0          	lea    -0x30(%rbp),%rcx
1400f1c4c:	e8 6f 45 fd ff       	call   0x1400c61c0
1400f1c51:	90                   	nop
1400f1c52:	48 8d 4d b0          	lea    -0x50(%rbp),%rcx
1400f1c56:	e8 25 47 fd ff       	call   0x1400c6380
1400f1c5b:	48 8b c3             	mov    %rbx,%rax
1400f1c5e:	48 8b 4d f0          	mov    -0x10(%rbp),%rcx
1400f1c62:	48 33 cc             	xor    %rsp,%rcx
1400f1c65:	e8 66 46 09 00       	call   0x1401862d0
1400f1c6a:	48 83 c4 78          	add    $0x78,%rsp
1400f1c6e:	5f                   	pop    %rdi
1400f1c6f:	5e                   	pop    %rsi
1400f1c70:	5b                   	pop    %rbx
1400f1c71:	5d                   	pop    %rbp
1400f1c72:	c3                   	ret
1400f1c73:	cc                   	int3
1400f1c74:	cc                   	int3
1400f1c75:	cc                   	int3
1400f1c76:	cc                   	int3
1400f1c77:	cc                   	int3
1400f1c78:	cc                   	int3
1400f1c79:	cc                   	int3
1400f1c7a:	cc                   	int3
1400f1c7b:	cc                   	int3
1400f1c7c:	cc                   	int3
1400f1c7d:	cc                   	int3
1400f1c7e:	cc                   	int3
1400f1c7f:	cc                   	int3
1400f1c80:	48 89 5c 24 08       	mov    %rbx,0x8(%rsp)
1400f1c85:	57                   	push   %rdi
1400f1c86:	48 83 ec 20          	sub    $0x20,%rsp
1400f1c8a:	48 83 79 68 00       	cmpq   $0x0,0x68(%rcx)
1400f1c8f:	48 8d 05 da a1 14 00 	lea    0x14a1da(%rip),%rax        # 0x14023be70
1400f1c96:	48 89 01             	mov    %rax,(%rcx)
1400f1c99:	8b fa                	mov    %edx,%edi
1400f1c9b:	48 8b d9             	mov    %rcx,%rbx
1400f1c9e:	75 0a                	jne    0x1400f1caa
1400f1ca0:	48 83 c1 10          	add    $0x10,%rcx
1400f1ca4:	ff 15 be a3 22 00    	call   *0x22a3be(%rip)        # 0x14031c068
1400f1caa:	40 f6 c7 01          	test   $0x1,%dil
1400f1cae:	74 0d                	je     0x1400f1cbd
1400f1cb0:	ba 70 00 00 00       	mov    $0x70,%edx
1400f1cb5:	48 8b cb             	mov    %rbx,%rcx
1400f1cb8:	e8 8f 49 09 00       	call   0x14018664c
1400f1cbd:	48 8b c3             	mov    %rbx,%rax
1400f1cc0:	48 8b 5c 24 30       	mov    0x30(%rsp),%rbx
1400f1cc5:	48 83 c4 20          	add    $0x20,%rsp
1400f1cc9:	5f                   	pop    %rdi
1400f1cca:	c3                   	ret
1400f1ccb:	cc                   	int3
1400f1ccc:	cc                   	int3
1400f1ccd:	cc                   	int3
1400f1cce:	cc                   	int3
1400f1ccf:	cc                   	int3
1400f1cd0:	48 83 79 68 00       	cmpq   $0x0,0x68(%rcx)
1400f1cd5:	48 8d 05 94 a1 14 00 	lea    0x14a194(%rip),%rax        # 0x14023be70
1400f1cdc:	48 89 01             	mov    %rax,(%rcx)
1400f1cdf:	75 0b                	jne    0x1400f1cec
1400f1ce1:	48 83 c1 10          	add    $0x10,%rcx
1400f1ce5:	48 ff 25 7c a3 22 00 	rex.W jmp *0x22a37c(%rip)        # 0x14031c068
1400f1cec:	c3                   	ret
1400f1ced:	cc                   	int3
1400f1cee:	cc                   	int3
1400f1cef:	cc                   	int3
1400f1cf0:	48 8d 05 f1 a1 14 00 	lea    0x14a1f1(%rip),%rax        # 0x14023bee8
1400f1cf7:	48 89 01             	mov    %rax,(%rcx)
1400f1cfa:	c3                   	ret
1400f1cfb:	cc                   	int3
1400f1cfc:	cc                   	int3
1400f1cfd:	cc                   	int3
1400f1cfe:	cc                   	int3
1400f1cff:	cc                   	int3
1400f1d00:	40 53                	rex push %rbx
1400f1d02:	48 83 ec 20          	sub    $0x20,%rsp
1400f1d06:	48 8d 05 db a1 14 00 	lea    0x14a1db(%rip),%rax        # 0x14023bee8
1400f1d0d:	48 8b d9             	mov    %rcx,%rbx
1400f1d10:	48 89 01             	mov    %rax,(%rcx)
1400f1d13:	f6 c2 01             	test   $0x1,%dl
1400f1d16:	74 0a                	je     0x1400f1d22
1400f1d18:	ba 08 00 00 00       	mov    $0x8,%edx
1400f1d1d:	e8 2a 49 09 00       	call   0x14018664c
1400f1d22:	48 8b c3             	mov    %rbx,%rax
1400f1d25:	48 83 c4 20          	add    $0x20,%rsp
1400f1d29:	5b                   	pop    %rbx
1400f1d2a:	c3                   	ret
1400f1d2b:	cc                   	int3
1400f1d2c:	cc                   	int3
1400f1d2d:	cc                   	int3
1400f1d2e:	cc                   	int3
1400f1d2f:	cc                   	int3
1400f1d30:	48 83 ec 28          	sub    $0x28,%rsp
1400f1d34:	4c 8b 02             	mov    (%rdx),%r8
1400f1d37:	4d 85 c0             	test   %r8,%r8
1400f1d3a:	74 16                	je     0x1400f1d52
1400f1d3c:	49 8b 40 08          	mov    0x8(%r8),%rax
1400f1d40:	48 63 48 04          	movslq 0x4(%rax),%rcx
1400f1d44:	49 83 c0 08          	add    $0x8,%r8
1400f1d48:	49 03 c8             	add    %r8,%rcx
1400f1d4b:	48 8b 01             	mov    (%rcx),%rax
1400f1d4e:	ff 50 08             	call   *0x8(%rax)
1400f1d51:	90                   	nop
1400f1d52:	48 83 c4 28          	add    $0x28,%rsp
1400f1d56:	c3                   	ret
1400f1d57:	cc                   	int3
1400f1d58:	cc                   	int3
1400f1d59:	cc                   	int3
1400f1d5a:	cc                   	int3
1400f1d5b:	cc                   	int3
1400f1d5c:	cc                   	int3
1400f1d5d:	cc                   	int3
1400f1d5e:	cc                   	int3
1400f1d5f:	cc                   	int3
1400f1d60:	48 c7 02 00 00 00 00 	movq   $0x0,(%rdx)
1400f1d67:	48 8b c2             	mov    %rdx,%rax
1400f1d6a:	c3                   	ret
1400f1d6b:	cc                   	int3
1400f1d6c:	cc                   	int3
1400f1d6d:	cc                   	int3
1400f1d6e:	cc                   	int3
1400f1d6f:	cc                   	int3
1400f1d70:	48 83 ec 28          	sub    $0x28,%rsp
1400f1d74:	49 8b 10             	mov    (%r8),%rdx
1400f1d77:	48 85 d2             	test   %rdx,%rdx
1400f1d7a:	74 16                	je     0x1400f1d92
1400f1d7c:	48 8b 42 08          	mov    0x8(%rdx),%rax
1400f1d80:	48 63 48 04          	movslq 0x4(%rax),%rcx
1400f1d84:	48 83 c2 08          	add    $0x8,%rdx
1400f1d88:	48 03 ca             	add    %rdx,%rcx
1400f1d8b:	48 8b 01             	mov    (%rcx),%rax
1400f1d8e:	ff 50 08             	call   *0x8(%rax)
1400f1d91:	90                   	nop
1400f1d92:	48 83 c4 28          	add    $0x28,%rsp
1400f1d96:	c3                   	ret
1400f1d97:	cc                   	int3
1400f1d98:	cc                   	int3
1400f1d99:	cc                   	int3
1400f1d9a:	cc                   	int3
1400f1d9b:	cc                   	int3
1400f1d9c:	cc                   	int3
1400f1d9d:	cc                   	int3
1400f1d9e:	cc                   	int3
1400f1d9f:	cc                   	int3
1400f1da0:	40 53                	rex push %rbx
1400f1da2:	48 83 ec 20          	sub    $0x20,%rsp
1400f1da6:	33 c0                	xor    %eax,%eax
1400f1da8:	4c 8d 41 10          	lea    0x10(%rcx),%r8
1400f1dac:	48 85 c9             	test   %rcx,%rcx
1400f1daf:	48 8b da             	mov    %rdx,%rbx
1400f1db2:	4c 0f 44 c0          	cmove  %rax,%r8
1400f1db6:	4c 89 02             	mov    %r8,(%rdx)
1400f1db9:	4d 85 c0             	test   %r8,%r8
1400f1dbc:	74 14                	je     0x1400f1dd2
1400f1dbe:	49 8b 40 08          	mov    0x8(%r8),%rax
1400f1dc2:	49 83 c0 08          	add    $0x8,%r8
1400f1dc6:	48 63 48 04          	movslq 0x4(%rax),%rcx
1400f1dca:	49 03 c8             	add    %r8,%rcx
1400f1dcd:	48 8b 01             	mov    (%rcx),%rax
1400f1dd0:	ff 10                	call   *(%rax)
1400f1dd2:	48 8b c3             	mov    %rbx,%rax
1400f1dd5:	48 83 c4 20          	add    $0x20,%rsp
1400f1dd9:	5b                   	pop    %rbx
1400f1dda:	c3                   	ret
1400f1ddb:	cc                   	int3
1400f1ddc:	cc                   	int3
1400f1ddd:	cc                   	int3
1400f1dde:	cc                   	int3
1400f1ddf:	cc                   	int3
1400f1de0:	b8 01 00 00 00       	mov    $0x1,%eax
1400f1de5:	f0 0f c1 41 a8       	lock xadd %eax,-0x58(%rcx)
1400f1dea:	c3                   	ret
1400f1deb:	cc                   	int3
1400f1dec:	cc                   	int3
1400f1ded:	cc                   	int3
1400f1dee:	cc                   	int3
1400f1def:	cc                   	int3
1400f1df0:	48 83 ec 28          	sub    $0x28,%rsp
1400f1df4:	b8 ff ff ff ff       	mov    $0xffffffff,%eax
1400f1df9:	f0 0f c1 41 a8       	lock xadd %eax,-0x58(%rcx)
1400f1dfe:	83 f8 01             	cmp    $0x1,%eax
1400f1e01:	75 2d                	jne    0x1400f1e30
1400f1e03:	48 8d 91 38 ff ff ff 	lea    -0xc8(%rcx),%rdx
1400f1e0a:	48 85 d2             	test   %rdx,%rdx
1400f1e0d:	74 1a                	je     0x1400f1e29
1400f1e0f:	48 8b 42 08          	mov    0x8(%rdx),%rax
1400f1e13:	48 63 48 04          	movslq 0x4(%rax),%rcx
1400f1e17:	48 83 c1 08          	add    $0x8,%rcx
1400f1e1b:	48 03 ca             	add    %rdx,%rcx
1400f1e1e:	ba 01 00 00 00       	mov    $0x1,%edx
1400f1e23:	48 8b 01             	mov    (%rcx),%rax
1400f1e26:	ff 50 20             	call   *0x20(%rax)
1400f1e29:	b0 01                	mov    $0x1,%al
1400f1e2b:	48 83 c4 28          	add    $0x28,%rsp
1400f1e2f:	c3                   	ret
1400f1e30:	32 c0                	xor    %al,%al
1400f1e32:	48 83 c4 28          	add    $0x28,%rsp
1400f1e36:	c3                   	ret
1400f1e37:	cc                   	int3
1400f1e38:	cc                   	int3
1400f1e39:	cc                   	int3
1400f1e3a:	cc                   	int3
1400f1e3b:	cc                   	int3
1400f1e3c:	cc                   	int3
1400f1e3d:	cc                   	int3
1400f1e3e:	cc                   	int3
1400f1e3f:	cc                   	int3
1400f1e40:	8b 41 a8             	mov    -0x58(%rcx),%eax
1400f1e43:	83 f8 01             	cmp    $0x1,%eax
1400f1e46:	0f 94 c0             	sete   %al
1400f1e49:	c3                   	ret
1400f1e4a:	cc                   	int3
1400f1e4b:	cc                   	int3
1400f1e4c:	cc                   	int3
1400f1e4d:	cc                   	int3
1400f1e4e:	cc                   	int3
1400f1e4f:	cc                   	int3
1400f1e50:	8b 41 a8             	mov    -0x58(%rcx),%eax
1400f1e53:	85 c0                	test   %eax,%eax
1400f1e55:	0f 95 c0             	setne  %al
1400f1e58:	c3                   	ret
1400f1e59:	cc                   	int3
1400f1e5a:	cc                   	int3
1400f1e5b:	cc                   	int3
1400f1e5c:	cc                   	int3
1400f1e5d:	cc                   	int3
1400f1e5e:	cc                   	int3
1400f1e5f:	cc                   	int3
1400f1e60:	40 57                	rex push %rdi
1400f1e62:	48 83 ec 20          	sub    $0x20,%rsp
1400f1e66:	48 89 5c 24 30       	mov    %rbx,0x30(%rsp)
1400f1e6b:	48 8d b9 38 ff ff ff 	lea    -0xc8(%rcx),%rdi
1400f1e72:	48 89 6c 24 38       	mov    %rbp,0x38(%rsp)
1400f1e77:	8b ea                	mov    %edx,%ebp
1400f1e79:	4c 89 74 24 48       	mov    %r14,0x48(%rsp)
1400f1e7e:	4c 8b f1             	mov    %rcx,%r14
1400f1e81:	48 83 c1 d0          	add    $0xffffffffffffffd0,%rcx
1400f1e85:	e8 36 43 fd ff       	call   0x1400c61c0
1400f1e8a:	49 8d 4e b0          	lea    -0x50(%r14),%rcx
1400f1e8e:	e8 ed 44 fd ff       	call   0x1400c6380
1400f1e93:	49 8d 4e 88          	lea    -0x78(%r14),%rcx
1400f1e97:	e8 e4 44 fd ff       	call   0x1400c6380
1400f1e9c:	49 8b 9e 60 ff ff ff 	mov    -0xa0(%r14),%rbx
1400f1ea3:	48 85 db             	test   %rbx,%rbx
1400f1ea6:	74 36                	je     0x1400f1ede
1400f1ea8:	48 89 74 24 40       	mov    %rsi,0x40(%rsp)
1400f1ead:	be ff ff ff ff       	mov    $0xffffffff,%esi
1400f1eb2:	8b c6                	mov    %esi,%eax
1400f1eb4:	f0 0f c1 43 08       	lock xadd %eax,0x8(%rbx)
1400f1eb9:	83 f8 01             	cmp    $0x1,%eax
1400f1ebc:	75 1b                	jne    0x1400f1ed9
1400f1ebe:	48 8b 03             	mov    (%rbx),%rax
1400f1ec1:	48 8b cb             	mov    %rbx,%rcx
1400f1ec4:	ff 10                	call   *(%rax)
1400f1ec6:	f0 0f c1 73 0c       	lock xadd %esi,0xc(%rbx)
1400f1ecb:	83 fe 01             	cmp    $0x1,%esi
1400f1ece:	75 09                	jne    0x1400f1ed9
1400f1ed0:	48 8b 13             	mov    (%rbx),%rdx
1400f1ed3:	48 8b cb             	mov    %rbx,%rcx
1400f1ed6:	ff 52 08             	call   *0x8(%rdx)
1400f1ed9:	48 8b 74 24 40       	mov    0x40(%rsp),%rsi
1400f1ede:	48 8b 5c 24 30       	mov    0x30(%rsp),%rbx
1400f1ee3:	48 8d 05 fe 9f 14 00 	lea    0x149ffe(%rip),%rax        # 0x14023bee8
1400f1eea:	49 89 06             	mov    %rax,(%r14)
1400f1eed:	40 f6 c5 01          	test   $0x1,%bpl
1400f1ef1:	4c 8b 74 24 48       	mov    0x48(%rsp),%r14
1400f1ef6:	48 8b 6c 24 38       	mov    0x38(%rsp),%rbp
1400f1efb:	74 0d                	je     0x1400f1f0a
1400f1efd:	ba d0 00 00 00       	mov    $0xd0,%edx
1400f1f02:	48 8b cf             	mov    %rdi,%rcx
1400f1f05:	e8 42 47 09 00       	call   0x14018664c
1400f1f0a:	48 8b c7             	mov    %rdi,%rax
1400f1f0d:	48 83 c4 20          	add    $0x20,%rsp
1400f1f11:	5f                   	pop    %rdi
1400f1f12:	c3                   	ret
1400f1f13:	cc                   	int3
1400f1f14:	cc                   	int3
1400f1f15:	cc                   	int3
1400f1f16:	cc                   	int3
1400f1f17:	cc                   	int3
1400f1f18:	cc                   	int3
1400f1f19:	cc                   	int3
1400f1f1a:	cc                   	int3
1400f1f1b:	cc                   	int3
1400f1f1c:	cc                   	int3
1400f1f1d:	cc                   	int3
1400f1f1e:	cc                   	int3
1400f1f1f:	cc                   	int3
1400f1f20:	40 53                	rex push %rbx
1400f1f22:	48 83 ec 20          	sub    $0x20,%rsp
1400f1f26:	48 8d 59 f0          	lea    -0x10(%rcx),%rbx
1400f1f2a:	f6 c2 01             	test   $0x1,%dl
1400f1f2d:	74 0d                	je     0x1400f1f3c
1400f1f2f:	ba 18 00 00 00       	mov    $0x18,%edx
1400f1f34:	48 8b cb             	mov    %rbx,%rcx
1400f1f37:	e8 10 47 09 00       	call   0x14018664c
1400f1f3c:	48 8b c3             	mov    %rbx,%rax
1400f1f3f:	48 83 c4 20          	add    $0x20,%rsp
1400f1f43:	5b                   	pop    %rbx
1400f1f44:	c3                   	ret
1400f1f45:	cc                   	int3
1400f1f46:	cc                   	int3
1400f1f47:	cc                   	int3
1400f1f48:	cc                   	int3
1400f1f49:	cc                   	int3
1400f1f4a:	cc                   	int3
1400f1f4b:	cc                   	int3
1400f1f4c:	cc                   	int3
1400f1f4d:	cc                   	int3
1400f1f4e:	cc                   	int3
1400f1f4f:	cc                   	int3
1400f1f50:	48 89 5c 24 08       	mov    %rbx,0x8(%rsp)
1400f1f55:	48 89 74 24 10       	mov    %rsi,0x10(%rsp)
1400f1f5a:	48 89 7c 24 20       	mov    %rdi,0x20(%rsp)
1400f1f5f:	4c 89 44 24 18       	mov    %r8,0x18(%rsp)
1400f1f64:	55                   	push   %rbp
1400f1f65:	41 56                	push   %r14
1400f1f67:	41 57                	push   %r15
1400f1f69:	48 8b ec             	mov    %rsp,%rbp
1400f1f6c:	48 83 ec 50          	sub    $0x50,%rsp
1400f1f70:	49 8b f0             	mov    %r8,%rsi
1400f1f73:	49 8b 38             	mov    (%r8),%rdi
1400f1f76:	48 8b 07             	mov    (%rdi),%rax