1401a2764:	48 8b 49 f8          	mov    -0x8(%rcx),%rcx
1401a2768:	48 83 39 60          	cmpq   $0x60,(%rcx)
1401a276c:	72 25                	jb     0x1401a2793
1401a276e:	48 8b 41 58          	mov    0x58(%rcx),%rax
1401a2772:	48 85 c0             	test   %rax,%rax
1401a2775:	74 1c                	je     0x1401a2793
1401a2777:	4d 8b 40 08          	mov    0x8(%r8),%r8
1401a277b:	4d 85 c0             	test   %r8,%r8
1401a277e:	74 13                	je     0x1401a2793
1401a2780:	49 83 78 08 00       	cmpq   $0x0,0x8(%r8)
1401a2785:	74 0c                	je     0x1401a2793
1401a2787:	ff d0                	call   *%rax
1401a2789:	85 c0                	test   %eax,%eax
1401a278b:	0f 95 c0             	setne  %al
1401a278e:	48 83 c4 28          	add    $0x28,%rsp
1401a2792:	c3                   	ret
1401a2793:	32 c0                	xor    %al,%al
1401a2795:	48 83 c4 28          	add    $0x28,%rsp
1401a2799:	c3                   	ret
1401a279a:	cc                   	int3
1401a279b:	cc                   	int3
1401a279c:	cc                   	int3
1401a279d:	cc                   	int3
1401a279e:	cc                   	int3
1401a279f:	cc                   	int3
1401a27a0:	40 53                	rex push %rbx
1401a27a2:	48 83 ec 20          	sub    $0x20,%rsp
1401a27a6:	48 8b d9             	mov    %rcx,%rbx
1401a27a9:	48 8b 49 e0          	mov    -0x20(%rcx),%rcx
1401a27ad:	48 8b 41 08          	mov    0x8(%rcx),%rax
1401a27b1:	48 85 c0             	test   %rax,%rax
1401a27b4:	74 02                	je     0x1401a27b8
1401a27b6:	ff d0                	call   *%rax
1401a27b8:	f0 ff 43 f8          	lock incl -0x8(%rbx)
1401a27bc:	48 83 c4 20          	add    $0x20,%rsp
1401a27c0:	5b                   	pop    %rbx
1401a27c1:	c3                   	ret
1401a27c2:	cc                   	int3
1401a27c3:	cc                   	int3
1401a27c4:	cc                   	int3
1401a27c5:	cc                   	int3
1401a27c6:	cc                   	int3
1401a27c7:	cc                   	int3
1401a27c8:	cc                   	int3
1401a27c9:	cc                   	int3
1401a27ca:	cc                   	int3
1401a27cb:	cc                   	int3
1401a27cc:	cc                   	int3
1401a27cd:	cc                   	int3
1401a27ce:	cc                   	int3
1401a27cf:	cc                   	int3
1401a27d0:	40 53                	rex push %rbx
1401a27d2:	48 83 ec 20          	sub    $0x20,%rsp
1401a27d6:	48 8b d9             	mov    %rcx,%rbx
1401a27d9:	48 8b 49 f8          	mov    -0x8(%rcx),%rcx
1401a27dd:	48 8b 41 08          	mov    0x8(%rcx),%rax
1401a27e1:	48 85 c0             	test   %rax,%rax
1401a27e4:	74 02                	je     0x1401a27e8
1401a27e6:	ff d0                	call   *%rax
1401a27e8:	f0 ff 43 08          	lock incl 0x8(%rbx)
1401a27ec:	48 83 c4 20          	add    $0x20,%rsp
1401a27f0:	5b                   	pop    %rbx
1401a27f1:	c3                   	ret
1401a27f2:	cc                   	int3
1401a27f3:	cc                   	int3
1401a27f4:	cc                   	int3
1401a27f5:	cc                   	int3
1401a27f6:	cc                   	int3
1401a27f7:	cc                   	int3
1401a27f8:	cc                   	int3
1401a27f9:	cc                   	int3
1401a27fa:	cc                   	int3
1401a27fb:	cc                   	int3
1401a27fc:	cc                   	int3
1401a27fd:	cc                   	int3
1401a27fe:	cc                   	int3
1401a27ff:	cc                   	int3
1401a2800:	40 53                	rex push %rbx
1401a2802:	48 83 ec 20          	sub    $0x20,%rsp
1401a2806:	48 8b d9             	mov    %rcx,%rbx
1401a2809:	48 8b 49 e8          	mov    -0x18(%rcx),%rcx
1401a280d:	48 8b 41 08          	mov    0x8(%rcx),%rax
1401a2811:	48 85 c0             	test   %rax,%rax
1401a2814:	74 02                	je     0x1401a2818
1401a2816:	ff d0                	call   *%rax
1401a2818:	f0 ff 43 f8          	lock incl -0x8(%rbx)
1401a281c:	48 83 c4 20          	add    $0x20,%rsp
1401a2820:	5b                   	pop    %rbx
1401a2821:	c3                   	ret
1401a2822:	cc                   	int3
1401a2823:	cc                   	int3
1401a2824:	cc                   	int3
1401a2825:	cc                   	int3
1401a2826:	cc                   	int3
1401a2827:	cc                   	int3
1401a2828:	cc                   	int3
1401a2829:	cc                   	int3
1401a282a:	cc                   	int3
1401a282b:	cc                   	int3
1401a282c:	cc                   	int3
1401a282d:	cc                   	int3
1401a282e:	cc                   	int3
1401a282f:	cc                   	int3
1401a2830:	40 53                	rex push %rbx
1401a2832:	48 83 ec 20          	sub    $0x20,%rsp
1401a2836:	4c 8b 41 10          	mov    0x10(%rcx),%r8
1401a283a:	48 8b d9             	mov    %rcx,%rbx
1401a283d:	49 8b 40 08          	mov    0x8(%r8),%rax
1401a2841:	49 8d 48 08          	lea    0x8(%r8),%rcx
1401a2845:	48 63 50 04          	movslq 0x4(%rax),%rdx
1401a2849:	48 03 ca             	add    %rdx,%rcx
1401a284c:	48 8b 01             	mov    (%rcx),%rax
1401a284f:	ff 10                	call   *(%rax)
1401a2851:	f0 ff 43 58          	lock incl 0x58(%rbx)
1401a2855:	48 83 c4 20          	add    $0x20,%rsp
1401a2859:	5b                   	pop    %rbx
1401a285a:	c3                   	ret
1401a285b:	cc                   	int3
1401a285c:	cc                   	int3
1401a285d:	cc                   	int3
1401a285e:	cc                   	int3
1401a285f:	cc                   	int3
1401a2860:	40 53                	rex push %rbx
1401a2862:	48 83 ec 20          	sub    $0x20,%rsp
1401a2866:	4c 8b 41 10          	mov    0x10(%rcx),%r8
1401a286a:	48 8b d9             	mov    %rcx,%rbx
1401a286d:	49 8b 40 08          	mov    0x8(%r8),%rax
1401a2871:	49 8d 48 08          	lea    0x8(%r8),%rcx
1401a2875:	48 63 50 04          	movslq 0x4(%rax),%rdx
1401a2879:	48 03 ca             	add    %rdx,%rcx
1401a287c:	48 8b 01             	mov    (%rcx),%rax
1401a287f:	ff 10                	call   *(%rax)
1401a2881:	f0 ff 43 70          	lock incl 0x70(%rbx)
1401a2885:	48 83 c4 20          	add    $0x20,%rsp
1401a2889:	5b                   	pop    %rbx
1401a288a:	c3                   	ret
1401a288b:	cc                   	int3
1401a288c:	cc                   	int3
1401a288d:	cc                   	int3
1401a288e:	cc                   	int3
1401a288f:	cc                   	int3
1401a2890:	40 53                	rex push %rbx
1401a2892:	48 83 ec 20          	sub    $0x20,%rsp
1401a2896:	48 8b d9             	mov    %rcx,%rbx
1401a2899:	48 8b 49 10          	mov    0x10(%rcx),%rcx
1401a289d:	48 8b 01             	mov    (%rcx),%rax
1401a28a0:	ff 10                	call   *(%rax)
1401a28a2:	f0 ff 43 48          	lock incl 0x48(%rbx)
1401a28a6:	48 83 c4 20          	add    $0x20,%rsp
1401a28aa:	5b                   	pop    %rbx
1401a28ab:	c3                   	ret
1401a28ac:	cc                   	int3
1401a28ad:	cc                   	int3
1401a28ae:	cc                   	int3
1401a28af:	cc                   	int3
1401a28b0:	40 53                	rex push %rbx
1401a28b2:	48 83 ec 20          	sub    $0x20,%rsp
1401a28b6:	4c 8b 41 10          	mov    0x10(%rcx),%r8
1401a28ba:	48 8b d9             	mov    %rcx,%rbx
1401a28bd:	49 8b 40 08          	mov    0x8(%r8),%rax
1401a28c1:	49 8d 48 08          	lea    0x8(%r8),%rcx
1401a28c5:	48 63 50 04          	movslq 0x4(%rax),%rdx
1401a28c9:	48 03 ca             	add    %rdx,%rcx
1401a28cc:	48 8b 01             	mov    (%rcx),%rax
1401a28cf:	ff 10                	call   *(%rax)
1401a28d1:	f0 ff 83 e0 00 00 00 	lock incl 0xe0(%rbx)
1401a28d8:	48 83 c4 20          	add    $0x20,%rsp
1401a28dc:	5b                   	pop    %rbx
1401a28dd:	c3                   	ret
1401a28de:	cc                   	int3
1401a28df:	cc                   	int3
1401a28e0:	40 53                	rex push %rbx
1401a28e2:	48 83 ec 20          	sub    $0x20,%rsp
1401a28e6:	4c 8b 41 10          	mov    0x10(%rcx),%r8
1401a28ea:	48 8b d9             	mov    %rcx,%rbx
1401a28ed:	49 8b 40 08          	mov    0x8(%r8),%rax
1401a28f1:	49 8d 48 08          	lea    0x8(%r8),%rcx
1401a28f5:	48 63 50 04          	movslq 0x4(%rax),%rdx
1401a28f9:	48 03 ca             	add    %rdx,%rcx
1401a28fc:	48 8b 01             	mov    (%rcx),%rax
1401a28ff:	ff 10                	call   *(%rax)
1401a2901:	f0 ff 43 50          	lock incl 0x50(%rbx)
1401a2905:	48 83 c4 20          	add    $0x20,%rsp
1401a2909:	5b                   	pop    %rbx
1401a290a:	c3                   	ret
1401a290b:	cc                   	int3
1401a290c:	cc                   	int3
1401a290d:	cc                   	int3
1401a290e:	cc                   	int3
1401a290f:	cc                   	int3
1401a2910:	40 53                	rex push %rbx
1401a2912:	48 83 ec 20          	sub    $0x20,%rsp
1401a2916:	4c 8b 41 10          	mov    0x10(%rcx),%r8
1401a291a:	48 8b d9             	mov    %rcx,%rbx
1401a291d:	49 8b 40 08          	mov    0x8(%r8),%rax
1401a2921:	49 8d 48 08          	lea    0x8(%r8),%rcx
1401a2925:	48 63 50 04          	movslq 0x4(%rax),%rdx
1401a2929:	48 03 ca             	add    %rdx,%rcx
1401a292c:	48 8b 01             	mov    (%rcx),%rax
1401a292f:	ff 10                	call   *(%rax)
1401a2931:	f0 ff 83 80 00 00 00 	lock incl 0x80(%rbx)
1401a2938:	48 83 c4 20          	add    $0x20,%rsp
1401a293c:	5b                   	pop    %rbx
1401a293d:	c3                   	ret
1401a293e:	cc                   	int3
1401a293f:	cc                   	int3
1401a2940:	40 53                	rex push %rbx
1401a2942:	48 83 ec 20          	sub    $0x20,%rsp
1401a2946:	4c 8b 41 10          	mov    0x10(%rcx),%r8
1401a294a:	48 8b d9             	mov    %rcx,%rbx
1401a294d:	49 8b 40 08          	mov    0x8(%r8),%rax
1401a2951:	49 8d 48 08          	lea    0x8(%r8),%rcx
1401a2955:	48 63 50 04          	movslq 0x4(%rax),%rdx
1401a2959:	48 03 ca             	add    %rdx,%rcx
1401a295c:	48 8b 01             	mov    (%rcx),%rax
1401a295f:	ff 10                	call   *(%rax)
1401a2961:	f0 ff 83 a0 00 00 00 	lock incl 0xa0(%rbx)
1401a2968:	48 83 c4 20          	add    $0x20,%rsp
1401a296c:	5b                   	pop    %rbx
1401a296d:	c3                   	ret
1401a296e:	cc                   	int3
1401a296f:	cc                   	int3
1401a2970:	40 53                	rex push %rbx
1401a2972:	48 83 ec 20          	sub    $0x20,%rsp
1401a2976:	4c 8b 41 10          	mov    0x10(%rcx),%r8
1401a297a:	48 8b d9             	mov    %rcx,%rbx
1401a297d:	49 8b 40 08          	mov    0x8(%r8),%rax
1401a2981:	49 8d 48 08          	lea    0x8(%r8),%rcx
1401a2985:	48 63 50 04          	movslq 0x4(%rax),%rdx
1401a2989:	48 03 ca             	add    %rdx,%rcx
1401a298c:	48 8b 01             	mov    (%rcx),%rax
1401a298f:	ff 10                	call   *(%rax)
1401a2991:	f0 ff 43 60          	lock incl 0x60(%rbx)
1401a2995:	48 83 c4 20          	add    $0x20,%rsp
1401a2999:	5b                   	pop    %rbx
1401a299a:	c3                   	ret
1401a299b:	cc                   	int3
1401a299c:	cc                   	int3
1401a299d:	cc                   	int3
1401a299e:	cc                   	int3
1401a299f:	cc                   	int3
1401a29a0:	40 53                	rex push %rbx
1401a29a2:	48 83 ec 20          	sub    $0x20,%rsp
1401a29a6:	4c 8b 41 10          	mov    0x10(%rcx),%r8
1401a29aa:	48 8b d9             	mov    %rcx,%rbx
1401a29ad:	49 8b 40 08          	mov    0x8(%r8),%rax
1401a29b1:	49 8d 48 08          	lea    0x8(%r8),%rcx
1401a29b5:	48 63 50 04          	movslq 0x4(%rax),%rdx
1401a29b9:	48 03 ca             	add    %rdx,%rcx
1401a29bc:	48 8b 01             	mov    (%rcx),%rax
1401a29bf:	ff 10                	call   *(%rax)
1401a29c1:	f0 ff 83 88 00 00 00 	lock incl 0x88(%rbx)
1401a29c8:	48 83 c4 20          	add    $0x20,%rsp
1401a29cc:	5b                   	pop    %rbx
1401a29cd:	c3                   	ret
1401a29ce:	cc                   	int3
1401a29cf:	cc                   	int3
1401a29d0:	40 53                	rex push %rbx
1401a29d2:	48 83 ec 20          	sub    $0x20,%rsp
1401a29d6:	4c 8b 41 10          	mov    0x10(%rcx),%r8
1401a29da:	48 8b d9             	mov    %rcx,%rbx
1401a29dd:	49 8b 40 08          	mov    0x8(%r8),%rax
1401a29e1:	49 8d 48 08          	lea    0x8(%r8),%rcx
1401a29e5:	48 63 50 04          	movslq 0x4(%rax),%rdx
1401a29e9:	48 03 ca             	add    %rdx,%rcx
1401a29ec:	48 8b 01             	mov    (%rcx),%rax
1401a29ef:	ff 10                	call   *(%rax)
1401a29f1:	f0 ff 43 68          	lock incl 0x68(%rbx)
1401a29f5:	48 83 c4 20          	add    $0x20,%rsp
1401a29f9:	5b                   	pop    %rbx
1401a29fa:	c3                   	ret
1401a29fb:	cc                   	int3
1401a29fc:	cc                   	int3
1401a29fd:	cc                   	int3
1401a29fe:	cc                   	int3
1401a29ff:	cc                   	int3
1401a2a00:	40 53                	rex push %rbx
1401a2a02:	48 83 ec 20          	sub    $0x20,%rsp
1401a2a06:	4c 8b 41 10          	mov    0x10(%rcx),%r8
1401a2a0a:	48 8b d9             	mov    %rcx,%rbx
1401a2a0d:	49 8b 40 08          	mov    0x8(%r8),%rax
1401a2a11:	49 8d 48 08          	lea    0x8(%r8),%rcx
1401a2a15:	48 63 50 04          	movslq 0x4(%rax),%rdx
1401a2a19:	48 03 ca             	add    %rdx,%rcx
1401a2a1c:	48 8b 01             	mov    (%rcx),%rax
1401a2a1f:	ff 10                	call   *(%rax)
1401a2a21:	f0 ff 43 78          	lock incl 0x78(%rbx)
1401a2a25:	48 83 c4 20          	add    $0x20,%rsp
1401a2a29:	5b                   	pop    %rbx
1401a2a2a:	c3                   	ret
1401a2a2b:	cc                   	int3
1401a2a2c:	cc                   	int3
1401a2a2d:	cc                   	int3
1401a2a2e:	cc                   	int3
1401a2a2f:	cc                   	int3
1401a2a30:	40 53                	rex push %rbx
1401a2a32:	48 83 ec 20          	sub    $0x20,%rsp
1401a2a36:	4c 8b 41 10          	mov    0x10(%rcx),%r8
1401a2a3a:	48 8b d9             	mov    %rcx,%rbx
1401a2a3d:	49 8b 40 08          	mov    0x8(%r8),%rax
1401a2a41:	49 8d 48 08          	lea    0x8(%r8),%rcx
1401a2a45:	48 63 50 04          	movslq 0x4(%rax),%rdx
1401a2a49:	48 03 ca             	add    %rdx,%rcx
1401a2a4c:	48 8b 01             	mov    (%rcx),%rax
1401a2a4f:	ff 10                	call   *(%rax)
1401a2a51:	f0 ff 83 d0 00 00 00 	lock incl 0xd0(%rbx)
1401a2a58:	48 83 c4 20          	add    $0x20,%rsp
1401a2a5c:	5b                   	pop    %rbx
1401a2a5d:	c3                   	ret
1401a2a5e:	cc                   	int3
1401a2a5f:	cc                   	int3
1401a2a60:	40 53                	rex push %rbx
1401a2a62:	48 83 ec 20          	sub    $0x20,%rsp
1401a2a66:	4c 8b 41 10          	mov    0x10(%rcx),%r8
1401a2a6a:	48 8b d9             	mov    %rcx,%rbx
1401a2a6d:	49 8b 40 08          	mov    0x8(%r8),%rax
1401a2a71:	49 8d 48 08          	lea    0x8(%r8),%rcx
1401a2a75:	48 63 50 04          	movslq 0x4(%rax),%rdx
1401a2a79:	48 03 ca             	add    %rdx,%rcx
1401a2a7c:	48 8b 01             	mov    (%rcx),%rax
1401a2a7f:	ff 10                	call   *(%rax)
1401a2a81:	f0 ff 83 90 00 00 00 	lock incl 0x90(%rbx)
1401a2a88:	48 83 c4 20          	add    $0x20,%rsp
1401a2a8c:	5b                   	pop    %rbx
1401a2a8d:	c3                   	ret
1401a2a8e:	cc                   	int3
1401a2a8f:	cc                   	int3
1401a2a90:	40 53                	rex push %rbx
1401a2a92:	48 83 ec 20          	sub    $0x20,%rsp
1401a2a96:	4c 8b 41 10          	mov    0x10(%rcx),%r8
1401a2a9a:	48 8b d9             	mov    %rcx,%rbx
1401a2a9d:	49 8b 40 08          	mov    0x8(%r8),%rax
1401a2aa1:	49 8d 48 08          	lea    0x8(%r8),%rcx
1401a2aa5:	48 63 50 04          	movslq 0x4(%rax),%rdx
1401a2aa9:	48 03 ca             	add    %rdx,%rcx
1401a2aac:	48 8b 01             	mov    (%rcx),%rax
1401a2aaf:	ff 10                	call   *(%rax)
1401a2ab1:	f0 ff 83 98 00 00 00 	lock incl 0x98(%rbx)
1401a2ab8:	48 83 c4 20          	add    $0x20,%rsp
1401a2abc:	5b                   	pop    %rbx
1401a2abd:	c3                   	ret
1401a2abe:	cc                   	int3
1401a2abf:	cc                   	int3
1401a2ac0:	f0 ff 41 24          	lock incl 0x24(%rcx)
1401a2ac4:	c3                   	ret
1401a2ac5:	cc                   	int3
1401a2ac6:	cc                   	int3
1401a2ac7:	cc                   	int3
1401a2ac8:	48 63 41 fc          	movslq -0x4(%rcx),%rax
1401a2acc:	48 2b c8             	sub    %rax,%rcx