1400a0e59:	48 31 e1             	xor    %rsp,%rcx
1400a0e5c:	48 3b 0d dd 01 06 00 	cmp    0x601dd(%rip),%rcx        # 0x140101040
1400a0e63:	74 06                	je     0x1400a0e6b
1400a0e65:	e8 66 e4 fc ff       	call   0x14006f2d0
1400a0e6a:	cc                   	int3
1400a0e6b:	48 83 c4 78          	add    $0x78,%rsp
1400a0e6f:	c3                   	ret
1400a0e70:	48 8d 05 89 22 04 00 	lea    0x42289(%rip),%rax        # 0x1400e3100
1400a0e77:	48 63 0c 88          	movslq (%rax,%rcx,4),%rcx
1400a0e7b:	48 01 c1             	add    %rax,%rcx
1400a0e7e:	ff e1                	jmp    *%rcx
1400a0e80:	0f 10 02             	movups (%rdx),%xmm0
1400a0e83:	48 8d 4c 24 20       	lea    0x20(%rsp),%rcx
1400a0e88:	0f 29 01             	movaps %xmm0,(%rcx)
1400a0e8b:	e8 50 02 00 00       	call   0x1400a10e0
1400a0e90:	eb c2                	jmp    0x1400a0e54
1400a0e92:	0f 10 02             	movups (%rdx),%xmm0
1400a0e95:	48 8d 4c 24 40       	lea    0x40(%rsp),%rcx
1400a0e9a:	0f 29 01             	movaps %xmm0,(%rcx)
1400a0e9d:	e8 3e 01 00 00       	call   0x1400a0fe0
1400a0ea2:	eb b0                	jmp    0x1400a0e54
1400a0ea4:	0f 10 02             	movups (%rdx),%xmm0
1400a0ea7:	48 8d 4c 24 30       	lea    0x30(%rsp),%rcx
1400a0eac:	0f 29 01             	movaps %xmm0,(%rcx)
1400a0eaf:	e8 ac 01 00 00       	call   0x1400a1060
1400a0eb4:	eb 9e                	jmp    0x1400a0e54
1400a0eb6:	0f 10 02             	movups (%rdx),%xmm0
1400a0eb9:	48 8d 4c 24 60       	lea    0x60(%rsp),%rcx
1400a0ebe:	0f 29 01             	movaps %xmm0,(%rcx)
1400a0ec1:	e8 1a 00 00 00       	call   0x1400a0ee0
1400a0ec6:	eb 8c                	jmp    0x1400a0e54
1400a0ec8:	0f 10 02             	movups (%rdx),%xmm0
1400a0ecb:	48 8d 4c 24 50       	lea    0x50(%rsp),%rcx
1400a0ed0:	0f 29 01             	movaps %xmm0,(%rcx)
1400a0ed3:	e8 88 00 00 00       	call   0x1400a0f60
1400a0ed8:	e9 77 ff ff ff       	jmp    0x1400a0e54
1400a0edd:	cc                   	int3
1400a0ede:	cc                   	int3
1400a0edf:	cc                   	int3
1400a0ee0:	56                   	push   %rsi
1400a0ee1:	57                   	push   %rdi
1400a0ee2:	48 81 ec 38 02 00 00 	sub    $0x238,%rsp
1400a0ee9:	48 89 ce             	mov    %rcx,%rsi
1400a0eec:	48 8b 05 4d 01 06 00 	mov    0x6014d(%rip),%rax        # 0x140101040
1400a0ef3:	48 31 e0             	xor    %rsp,%rax
1400a0ef6:	48 89 84 24 30 02 00 	mov    %rax,0x230(%rsp)
1400a0efd:	00
1400a0efe:	48 8d 7c 24 30       	lea    0x30(%rsp),%rdi
1400a0f03:	41 b8 00 02 00 00    	mov    $0x200,%r8d
1400a0f09:	48 89 f9             	mov    %rdi,%rcx
1400a0f0c:	31 d2                	xor    %edx,%edx
1400a0f0e:	e8 fd d2 ff ff       	call   0x14009e210
1400a0f13:	48 8b 46 08          	mov    0x8(%rsi),%rax
1400a0f17:	48 8d 54 24 20       	lea    0x20(%rsp),%rdx
1400a0f1c:	48 89 3a             	mov    %rdi,(%rdx)
1400a0f1f:	48 c7 42 08 80 00 00 	movq   $0x80,0x8(%rdx)
1400a0f26:	00
1400a0f27:	48 8b 0e             	mov    (%rsi),%rcx
1400a0f2a:	ff 15 d8 5d 05 00    	call   *0x55dd8(%rip)        # 0x1400f6d08
1400a0f30:	48 8b 8c 24 30 02 00 	mov    0x230(%rsp),%rcx
1400a0f37:	00
1400a0f38:	48 31 e1             	xor    %rsp,%rcx
1400a0f3b:	48 3b 0d fe 00 06 00 	cmp    0x600fe(%rip),%rcx        # 0x140101040
1400a0f42:	74 06                	je     0x1400a0f4a
1400a0f44:	e8 87 e3 fc ff       	call   0x14006f2d0
1400a0f49:	cc                   	int3
1400a0f4a:	48 81 c4 38 02 00 00 	add    $0x238,%rsp
1400a0f51:	5f                   	pop    %rdi
1400a0f52:	5e                   	pop    %rsi
1400a0f53:	c3                   	ret
1400a0f54:	cc                   	int3
1400a0f55:	cc                   	int3
1400a0f56:	cc                   	int3
1400a0f57:	cc                   	int3
1400a0f58:	cc                   	int3
1400a0f59:	cc                   	int3
1400a0f5a:	cc                   	int3
1400a0f5b:	cc                   	int3
1400a0f5c:	cc                   	int3
1400a0f5d:	cc                   	int3
1400a0f5e:	cc                   	int3
1400a0f5f:	cc                   	int3
1400a0f60:	56                   	push   %rsi
1400a0f61:	57                   	push   %rdi
1400a0f62:	48 81 ec 38 04 00 00 	sub    $0x438,%rsp
1400a0f69:	48 89 ce             	mov    %rcx,%rsi
1400a0f6c:	48 8b 05 cd 00 06 00 	mov    0x600cd(%rip),%rax        # 0x140101040
1400a0f73:	48 31 e0             	xor    %rsp,%rax
1400a0f76:	48 89 84 24 30 04 00 	mov    %rax,0x430(%rsp)
1400a0f7d:	00
1400a0f7e:	48 8d 7c 24 30       	lea    0x30(%rsp),%rdi
1400a0f83:	41 b8 00 04 00 00    	mov    $0x400,%r8d
1400a0f89:	48 89 f9             	mov    %rdi,%rcx
1400a0f8c:	31 d2                	xor    %edx,%edx
1400a0f8e:	e8 7d d2 ff ff       	call   0x14009e210
1400a0f93:	48 8b 46 08          	mov    0x8(%rsi),%rax
1400a0f97:	48 8d 54 24 20       	lea    0x20(%rsp),%rdx
1400a0f9c:	48 89 3a             	mov    %rdi,(%rdx)
1400a0f9f:	48 c7 42 08 00 01 00 	movq   $0x100,0x8(%rdx)
1400a0fa6:	00
1400a0fa7:	48 8b 0e             	mov    (%rsi),%rcx
1400a0faa:	ff 15 58 5d 05 00    	call   *0x55d58(%rip)        # 0x1400f6d08
1400a0fb0:	48 8b 8c 24 30 04 00 	mov    0x430(%rsp),%rcx
1400a0fb7:	00
1400a0fb8:	48 31 e1             	xor    %rsp,%rcx
1400a0fbb:	48 3b 0d 7e 00 06 00 	cmp    0x6007e(%rip),%rcx        # 0x140101040
1400a0fc2:	74 06                	je     0x1400a0fca
1400a0fc4:	e8 07 e3 fc ff       	call   0x14006f2d0
1400a0fc9:	cc                   	int3
1400a0fca:	48 81 c4 38 04 00 00 	add    $0x438,%rsp
1400a0fd1:	5f                   	pop    %rdi
1400a0fd2:	5e                   	pop    %rsi
1400a0fd3:	c3                   	ret
1400a0fd4:	cc                   	int3
1400a0fd5:	cc                   	int3
1400a0fd6:	cc                   	int3
1400a0fd7:	cc                   	int3
1400a0fd8:	cc                   	int3
1400a0fd9:	cc                   	int3
1400a0fda:	cc                   	int3
1400a0fdb:	cc                   	int3
1400a0fdc:	cc                   	int3
1400a0fdd:	cc                   	int3
1400a0fde:	cc                   	int3
1400a0fdf:	cc                   	int3
1400a0fe0:	56                   	push   %rsi
1400a0fe1:	57                   	push   %rdi
1400a0fe2:	48 81 ec 38 06 00 00 	sub    $0x638,%rsp
1400a0fe9:	48 89 ce             	mov    %rcx,%rsi
1400a0fec:	48 8b 05 4d 00 06 00 	mov    0x6004d(%rip),%rax        # 0x140101040
1400a0ff3:	48 31 e0             	xor    %rsp,%rax
1400a0ff6:	48 89 84 24 30 06 00 	mov    %rax,0x630(%rsp)
1400a0ffd:	00
1400a0ffe:	48 8d 7c 24 30       	lea    0x30(%rsp),%rdi
1400a1003:	41 b8 00 06 00 00    	mov    $0x600,%r8d
1400a1009:	48 89 f9             	mov    %rdi,%rcx
1400a100c:	31 d2                	xor    %edx,%edx
1400a100e:	e8 fd d1 ff ff       	call   0x14009e210
1400a1013:	48 8b 46 08          	mov    0x8(%rsi),%rax
1400a1017:	48 8d 54 24 20       	lea    0x20(%rsp),%rdx
1400a101c:	48 89 3a             	mov    %rdi,(%rdx)
1400a101f:	48 c7 42 08 80 01 00 	movq   $0x180,0x8(%rdx)
1400a1026:	00
1400a1027:	48 8b 0e             	mov    (%rsi),%rcx
1400a102a:	ff 15 d8 5c 05 00    	call   *0x55cd8(%rip)        # 0x1400f6d08
1400a1030:	48 8b 8c 24 30 06 00 	mov    0x630(%rsp),%rcx
1400a1037:	00
1400a1038:	48 31 e1             	xor    %rsp,%rcx
1400a103b:	48 3b 0d fe ff 05 00 	cmp    0x5fffe(%rip),%rcx        # 0x140101040
1400a1042:	74 06                	je     0x1400a104a
1400a1044:	e8 87 e2 fc ff       	call   0x14006f2d0
1400a1049:	cc                   	int3
1400a104a:	48 81 c4 38 06 00 00 	add    $0x638,%rsp
1400a1051:	5f                   	pop    %rdi
1400a1052:	5e                   	pop    %rsi
1400a1053:	c3                   	ret
1400a1054:	cc                   	int3
1400a1055:	cc                   	int3
1400a1056:	cc                   	int3
1400a1057:	cc                   	int3
1400a1058:	cc                   	int3
1400a1059:	cc                   	int3
1400a105a:	cc                   	int3
1400a105b:	cc                   	int3
1400a105c:	cc                   	int3
1400a105d:	cc                   	int3
1400a105e:	cc                   	int3
1400a105f:	cc                   	int3
1400a1060:	56                   	push   %rsi
1400a1061:	57                   	push   %rdi
1400a1062:	48 81 ec 38 08 00 00 	sub    $0x838,%rsp
1400a1069:	48 89 ce             	mov    %rcx,%rsi
1400a106c:	48 8b 05 cd ff 05 00 	mov    0x5ffcd(%rip),%rax        # 0x140101040
1400a1073:	48 31 e0             	xor    %rsp,%rax
1400a1076:	48 89 84 24 30 08 00 	mov    %rax,0x830(%rsp)
1400a107d:	00
1400a107e:	48 8d 7c 24 30       	lea    0x30(%rsp),%rdi
1400a1083:	41 b8 00 08 00 00    	mov    $0x800,%r8d
1400a1089:	48 89 f9             	mov    %rdi,%rcx
1400a108c:	31 d2                	xor    %edx,%edx
1400a108e:	e8 7d d1 ff ff       	call   0x14009e210
1400a1093:	48 8b 46 08          	mov    0x8(%rsi),%rax
1400a1097:	48 8d 54 24 20       	lea    0x20(%rsp),%rdx
1400a109c:	48 89 3a             	mov    %rdi,(%rdx)
1400a109f:	48 c7 42 08 00 02 00 	movq   $0x200,0x8(%rdx)
1400a10a6:	00
1400a10a7:	48 8b 0e             	mov    (%rsi),%rcx
1400a10aa:	ff 15 58 5c 05 00    	call   *0x55c58(%rip)        # 0x1400f6d08
1400a10b0:	48 8b 8c 24 30 08 00 	mov    0x830(%rsp),%rcx
1400a10b7:	00
1400a10b8:	48 31 e1             	xor    %rsp,%rcx
1400a10bb:	48 3b 0d 7e ff 05 00 	cmp    0x5ff7e(%rip),%rcx        # 0x140101040
1400a10c2:	74 06                	je     0x1400a10ca
1400a10c4:	e8 07 e2 fc ff       	call   0x14006f2d0
1400a10c9:	cc                   	int3
1400a10ca:	48 81 c4 38 08 00 00 	add    $0x838,%rsp
1400a10d1:	5f                   	pop    %rdi
1400a10d2:	5e                   	pop    %rsi
1400a10d3:	c3                   	ret
1400a10d4:	cc                   	int3
1400a10d5:	cc                   	int3
1400a10d6:	cc                   	int3
1400a10d7:	cc                   	int3
1400a10d8:	cc                   	int3
1400a10d9:	cc                   	int3
1400a10da:	cc                   	int3
1400a10db:	cc                   	int3
1400a10dc:	cc                   	int3
1400a10dd:	cc                   	int3
1400a10de:	cc                   	int3
1400a10df:	cc                   	int3
1400a10e0:	56                   	push   %rsi
1400a10e1:	57                   	push   %rdi
1400a10e2:	48 81 ec 38 0a 00 00 	sub    $0xa38,%rsp
1400a10e9:	48 89 ce             	mov    %rcx,%rsi
1400a10ec:	48 8b 05 4d ff 05 00 	mov    0x5ff4d(%rip),%rax        # 0x140101040
1400a10f3:	48 31 e0             	xor    %rsp,%rax
1400a10f6:	48 89 84 24 30 0a 00 	mov    %rax,0xa30(%rsp)
1400a10fd:	00
1400a10fe:	48 8d 7c 24 30       	lea    0x30(%rsp),%rdi
1400a1103:	41 b8 00 0a 00 00    	mov    $0xa00,%r8d
1400a1109:	48 89 f9             	mov    %rdi,%rcx
1400a110c:	31 d2                	xor    %edx,%edx
1400a110e:	e8 fd d0 ff ff       	call   0x14009e210
1400a1113:	48 8b 46 08          	mov    0x8(%rsi),%rax
1400a1117:	48 8d 54 24 20       	lea    0x20(%rsp),%rdx
1400a111c:	48 89 3a             	mov    %rdi,(%rdx)
1400a111f:	48 c7 42 08 80 02 00 	movq   $0x280,0x8(%rdx)
1400a1126:	00
1400a1127:	48 8b 0e             	mov    (%rsi),%rcx
1400a112a:	ff 15 d8 5b 05 00    	call   *0x55bd8(%rip)        # 0x1400f6d08
1400a1130:	48 8b 8c 24 30 0a 00 	mov    0xa30(%rsp),%rcx
1400a1137:	00
1400a1138:	48 31 e1             	xor    %rsp,%rcx
1400a113b:	48 3b 0d fe fe 05 00 	cmp    0x5fefe(%rip),%rcx        # 0x140101040
1400a1142:	74 06                	je     0x1400a114a
1400a1144:	e8 87 e1 fc ff       	call   0x14006f2d0
1400a1149:	cc                   	int3
1400a114a:	48 81 c4 38 0a 00 00 	add    $0xa38,%rsp
1400a1151:	5f                   	pop    %rdi
1400a1152:	5e                   	pop    %rsi
1400a1153:	c3                   	ret
1400a1154:	cc                   	int3
1400a1155:	cc                   	int3
1400a1156:	cc                   	int3
1400a1157:	cc                   	int3
1400a1158:	cc                   	int3
1400a1159:	cc                   	int3
1400a115a:	cc                   	int3
1400a115b:	cc                   	int3
1400a115c:	cc                   	int3
1400a115d:	cc                   	int3
1400a115e:	cc                   	int3
1400a115f:	cc                   	int3
1400a1160:	41 57                	push   %r15
1400a1162:	41 56                	push   %r14
1400a1164:	56                   	push   %rsi
1400a1165:	57                   	push   %rdi
1400a1166:	53                   	push   %rbx
1400a1167:	48 83 ec 60          	sub    $0x60,%rsp
1400a116b:	49 89 c8             	mov    %rcx,%r8
1400a116e:	48 8b 05 cb fe 05 00 	mov    0x5fecb(%rip),%rax        # 0x140101040
1400a1175:	48 31 e0             	xor    %rsp,%rax
1400a1178:	48 89 44 24 58       	mov    %rax,0x58(%rsp)
1400a117d:	4c 8b 0a             	mov    (%rdx),%r9
1400a1180:	4c 8b 52 08          	mov    0x8(%rdx),%r10
1400a1184:	8b 51 20             	mov    0x20(%rcx),%edx
1400a1187:	48 8b 79 10          	mov    0x10(%rcx),%rdi
1400a118b:	48 8b 41 18          	mov    0x18(%rcx),%rax
1400a118f:	48 c7 44 24 40 00 00 	movq   $0x0,0x40(%rsp)
1400a1196:	00 00
1400a1198:	4c 89 4c 24 48       	mov    %r9,0x48(%rsp)
1400a119d:	8d 5a 1f             	lea    0x1f(%rdx),%ebx
1400a11a0:	85 d2                	test   %edx,%edx
1400a11a2:	89 d1                	mov    %edx,%ecx
1400a11a4:	0f 48 cb             	cmovs  %ebx,%ecx
1400a11a7:	4c 89 54 24 50       	mov    %r10,0x50(%rsp)
1400a11ac:	c1 f9 05             	sar    $0x5,%ecx
1400a11af:	4c 63 d9             	movslq %ecx,%r11
1400a11b2:	8d 8a 9f 00 00 00    	lea    0x9f(%rdx),%ecx
1400a11b8:	8d b2 be 00 00 00    	lea    0xbe(%rdx),%esi
1400a11be:	85 c9                	test   %ecx,%ecx
1400a11c0:	0f 49 f1             	cmovns %ecx,%esi
1400a11c3:	c1 fe 05             	sar    $0x5,%esi
1400a11c6:	8d 0c b6             	lea    (%rsi,%rsi,4),%ecx
1400a11c9:	8d 0c 4e             	lea    (%rsi,%rcx,2),%ecx
1400a11cc:	48 63 c9             	movslq %ecx,%rcx
1400a11cf:	48 69 c9 67 66 66 66 	imul   $0x66666667,%rcx,%rcx
1400a11d6:	48 89 ce             	mov    %rcx,%rsi
1400a11d9:	48 c1 ee 3f          	shr    $0x3f,%rsi
1400a11dd:	48 c1 f9 22          	sar    $0x22,%rcx
1400a11e1:	01 f1                	add    %esi,%ecx
1400a11e3:	48 63 f1             	movslq %ecx,%rsi
1400a11e6:	48 89 74 24 28       	mov    %rsi,0x28(%rsp)
1400a11eb:	4d 39 d3             	cmp    %r10,%r11
1400a11ee:	73 46                	jae    0x1400a1236
1400a11f0:	49 ff c3             	inc    %r11
1400a11f3:	85 d2                	test   %edx,%edx
1400a11f5:	0f 49 da             	cmovns %edx,%ebx
1400a11f8:	81 e3 e0 00 00 00    	and    $0xe0,%ebx
1400a11fe:	89 d1                	mov    %edx,%ecx
1400a1200:	29 d9                	sub    %ebx,%ecx
1400a1202:	49 89 ff             	mov    %rdi,%r15
1400a1205:	49 d3 e7             	shl    %cl,%r15
1400a1208:	80 c1 20             	add    $0x20,%cl
1400a120b:	49 89 c6             	mov    %rax,%r14
1400a120e:	49 0f a5 fe          	shld   %cl,%rdi,%r14
1400a1212:	f7 db                	neg    %ebx
1400a1214:	8d 0c 1a             	lea    (%rdx,%rbx,1),%ecx
1400a1217:	83 c1 20             	add    $0x20,%ecx
1400a121a:	f7 d9                	neg    %ecx
1400a121c:	48 d3 e8             	shr    %cl,%rax
1400a121f:	47 89 7c 99 fc       	mov    %r15d,-0x4(%r9,%r11,4)
1400a1224:	4c 89 f1             	mov    %r14,%rcx
1400a1227:	48 09 c1             	or     %rax,%rcx
1400a122a:	75 0c                	jne    0x1400a1238
1400a122c:	45 85 db             	test   %r11d,%r11d
1400a122f:	75 24                	jne    0x1400a1255
1400a1231:	e9 81 00 00 00       	jmp    0x1400a12b7
1400a1236:	0f 0b                	ud2
1400a1238:	4d 39 d3             	cmp    %r10,%r11
1400a123b:	73 f9                	jae    0x1400a1236
1400a123d:	47 89 34 99          	mov    %r14d,(%r9,%r11,4)
1400a1241:	49 0f ac c6 20       	shrd   $0x20,%rax,%r14
1400a1246:	49 ff c3             	inc    %r11
1400a1249:	48 c1 e8 20          	shr    $0x20,%rax
1400a124d:	4c 89 f1             	mov    %r14,%rcx
1400a1250:	48 09 c1             	or     %rax,%rcx
1400a1253:	75 e3                	jne    0x1400a1238
1400a1255:	48 bf b3 94 d6 26 e8 	movabs $0x112e0be826d694b3,%rdi
1400a125c:	0b 2e 11
1400a125f:	49 8d 5b ff          	lea    -0x1(%r11),%rbx
1400a1263:	31 c9                	xor    %ecx,%ecx
1400a1265:	4c 39 d3             	cmp    %r10,%rbx
1400a1268:	73 cc                	jae    0x1400a1236
1400a126a:	41 8b 04 99          	mov    (%r9,%rbx,4),%eax
1400a126e:	48 c1 e1 20          	shl    $0x20,%rcx
1400a1272:	48 09 c1             	or     %rax,%rcx
1400a1275:	48 89 c8             	mov    %rcx,%rax
1400a1278:	48 f7 e7             	mul    %rdi
1400a127b:	48 c1 ea 1a          	shr    $0x1a,%rdx
1400a127f:	41 89 14 99          	mov    %edx,(%r9,%rbx,4)
1400a1283:	48 69 c2 00 ca 9a 3b 	imul   $0x3b9aca00,%rdx,%rax
1400a128a:	48 29 c1             	sub    %rax,%rcx
1400a128d:	48 83 c3 ff          	add    $0xffffffffffffffff,%rbx
1400a1291:	72 d2                	jb     0x1400a1265
1400a1293:	49 8d 43 ff          	lea    -0x1(%r11),%rax
1400a1297:	4c 39 d0             	cmp    %r10,%rax
1400a129a:	73 9a                	jae    0x1400a1236
1400a129c:	48 ff ce             	dec    %rsi