1409d3a3e:	00
1409d3a3f:	48 8b 5c 24 38       	mov    0x38(%rsp),%rbx
1409d3a44:	48 83 c4 20          	add    $0x20,%rsp
1409d3a48:	5f                   	pop    %rdi
1409d3a49:	c3                   	ret
1409d3a4a:	cc                   	int3
1409d3a4b:	cc                   	int3
1409d3a4c:	cc                   	int3
1409d3a4d:	cc                   	int3
1409d3a4e:	cc                   	int3
1409d3a4f:	cc                   	int3
1409d3a50:	0f 10 02             	movups (%rdx),%xmm0
1409d3a53:	0f 11 01             	movups %xmm0,(%rcx)
1409d3a56:	c3                   	ret
1409d3a57:	cc                   	int3
1409d3a58:	cc                   	int3
1409d3a59:	cc                   	int3
1409d3a5a:	cc                   	int3
1409d3a5b:	cc                   	int3
1409d3a5c:	cc                   	int3
1409d3a5d:	cc                   	int3
1409d3a5e:	cc                   	int3
1409d3a5f:	cc                   	int3
1409d3a60:	0f 10 02             	movups (%rdx),%xmm0
1409d3a63:	0f 11 01             	movups %xmm0,(%rcx)
1409d3a66:	f2 0f 10 4a 10       	movsd  0x10(%rdx),%xmm1
1409d3a6b:	f2 0f 11 49 10       	movsd  %xmm1,0x10(%rcx)
1409d3a70:	c3                   	ret
1409d3a71:	cc                   	int3
1409d3a72:	cc                   	int3
1409d3a73:	cc                   	int3
1409d3a74:	cc                   	int3
1409d3a75:	cc                   	int3
1409d3a76:	cc                   	int3
1409d3a77:	cc                   	int3
1409d3a78:	cc                   	int3
1409d3a79:	cc                   	int3
1409d3a7a:	cc                   	int3
1409d3a7b:	cc                   	int3
1409d3a7c:	cc                   	int3
1409d3a7d:	cc                   	int3
1409d3a7e:	cc                   	int3
1409d3a7f:	cc                   	int3
1409d3a80:	e9 4b f0 01 00       	jmp    0x1409f2ad0
1409d3a85:	cc                   	int3
1409d3a86:	cc                   	int3
1409d3a87:	cc                   	int3
1409d3a88:	cc                   	int3
1409d3a89:	cc                   	int3
1409d3a8a:	cc                   	int3
1409d3a8b:	cc                   	int3
1409d3a8c:	cc                   	int3
1409d3a8d:	cc                   	int3
1409d3a8e:	cc                   	int3
1409d3a8f:	cc                   	int3
1409d3a90:	0f b6 02             	movzbl (%rdx),%eax
1409d3a93:	48 83 c2 08          	add    $0x8,%rdx
1409d3a97:	88 01                	mov    %al,(%rcx)
1409d3a99:	48 83 c1 08          	add    $0x8,%rcx
1409d3a9d:	e9 9e 4f 7d ff       	jmp    0x1401a8a40
1409d3aa2:	cc                   	int3
1409d3aa3:	cc                   	int3
1409d3aa4:	cc                   	int3
1409d3aa5:	cc                   	int3
1409d3aa6:	cc                   	int3
1409d3aa7:	cc                   	int3
1409d3aa8:	cc                   	int3
1409d3aa9:	cc                   	int3
1409d3aaa:	cc                   	int3
1409d3aab:	cc                   	int3
1409d3aac:	cc                   	int3
1409d3aad:	cc                   	int3
1409d3aae:	cc                   	int3
1409d3aaf:	cc                   	int3
1409d3ab0:	48 89 5c 24 08       	mov    %rbx,0x8(%rsp)
1409d3ab5:	57                   	push   %rdi
1409d3ab6:	48 83 ec 20          	sub    $0x20,%rsp
1409d3aba:	48 8b da             	mov    %rdx,%rbx
1409d3abd:	48 8b f9             	mov    %rcx,%rdi
1409d3ac0:	e8 1b ef b6 ff       	call   0x1405429e0
1409d3ac5:	0f 10 43 30          	movups 0x30(%rbx),%xmm0
1409d3ac9:	0f 11 47 30          	movups %xmm0,0x30(%rdi)
1409d3acd:	f2 0f 10 4b 40       	movsd  0x40(%rbx),%xmm1
1409d3ad2:	48 8b 5c 24 30       	mov    0x30(%rsp),%rbx
1409d3ad7:	f2 0f 11 4f 40       	movsd  %xmm1,0x40(%rdi)
1409d3adc:	48 83 c4 20          	add    $0x20,%rsp
1409d3ae0:	5f                   	pop    %rdi
1409d3ae1:	c3                   	ret
1409d3ae2:	cc                   	int3
1409d3ae3:	cc                   	int3
1409d3ae4:	cc                   	int3
1409d3ae5:	cc                   	int3
1409d3ae6:	cc                   	int3
1409d3ae7:	cc                   	int3
1409d3ae8:	cc                   	int3
1409d3ae9:	cc                   	int3
1409d3aea:	cc                   	int3
1409d3aeb:	cc                   	int3
1409d3aec:	cc                   	int3
1409d3aed:	cc                   	int3
1409d3aee:	cc                   	int3
1409d3aef:	cc                   	int3
1409d3af0:	e9 9b 05 02 00       	jmp    0x1409f4090
1409d3af5:	cc                   	int3
1409d3af6:	cc                   	int3
1409d3af7:	cc                   	int3
1409d3af8:	cc                   	int3
1409d3af9:	cc                   	int3
1409d3afa:	cc                   	int3
1409d3afb:	cc                   	int3
1409d3afc:	cc                   	int3
1409d3afd:	cc                   	int3
1409d3afe:	cc                   	int3
1409d3aff:	cc                   	int3
1409d3b00:	48 89 5c 24 08       	mov    %rbx,0x8(%rsp)
1409d3b05:	57                   	push   %rdi
1409d3b06:	48 83 ec 20          	sub    $0x20,%rsp
1409d3b0a:	0f b6 02             	movzbl (%rdx),%eax
1409d3b0d:	48 8b da             	mov    %rdx,%rbx
1409d3b10:	88 01                	mov    %al,(%rcx)
1409d3b12:	48 8b f9             	mov    %rcx,%rdi
1409d3b15:	48 83 c1 08          	add    $0x8,%rcx
1409d3b19:	48 83 c2 08          	add    $0x8,%rdx
1409d3b1d:	e8 1e 4f 7d ff       	call   0x1401a8a40
1409d3b22:	0f b7 43 28          	movzwl 0x28(%rbx),%eax
1409d3b26:	66 89 47 28          	mov    %ax,0x28(%rdi)
1409d3b2a:	48 8b 43 30          	mov    0x30(%rbx),%rax
1409d3b2e:	48 8b 5c 24 30       	mov    0x30(%rsp),%rbx
1409d3b33:	48 89 47 30          	mov    %rax,0x30(%rdi)
1409d3b37:	48 83 c4 20          	add    $0x20,%rsp
1409d3b3b:	5f                   	pop    %rdi
1409d3b3c:	c3                   	ret
1409d3b3d:	cc                   	int3
1409d3b3e:	cc                   	int3
1409d3b3f:	cc                   	int3
1409d3b40:	48 89 5c 24 08       	mov    %rbx,0x8(%rsp)
1409d3b45:	57                   	push   %rdi
1409d3b46:	48 83 ec 20          	sub    $0x20,%rsp
1409d3b4a:	48 8b da             	mov    %rdx,%rbx
1409d3b4d:	48 8b f9             	mov    %rcx,%rdi
1409d3b50:	e8 7b ef 01 00       	call   0x1409f2ad0
1409d3b55:	8b 43 70             	mov    0x70(%rbx),%eax
1409d3b58:	89 47 70             	mov    %eax,0x70(%rdi)
1409d3b5b:	8b 43 74             	mov    0x74(%rbx),%eax
1409d3b5e:	48 8b 5c 24 30       	mov    0x30(%rsp),%rbx
1409d3b63:	89 47 74             	mov    %eax,0x74(%rdi)
1409d3b66:	48 83 c4 20          	add    $0x20,%rsp
1409d3b6a:	5f                   	pop    %rdi
1409d3b6b:	c3                   	ret
1409d3b6c:	cc                   	int3
1409d3b6d:	cc                   	int3
1409d3b6e:	cc                   	int3
1409d3b6f:	cc                   	int3
1409d3b70:	48 89 5c 24 10       	mov    %rbx,0x10(%rsp)
1409d3b75:	57                   	push   %rdi
1409d3b76:	48 83 ec 20          	sub    $0x20,%rsp
1409d3b7a:	48 8b da             	mov    %rdx,%rbx
1409d3b7d:	48 8b f9             	mov    %rcx,%rdi
1409d3b80:	48 89 4c 24 30       	mov    %rcx,0x30(%rsp)
1409d3b85:	e8 56 ee b6 ff       	call   0x1405429e0
1409d3b8a:	90                   	nop
1409d3b8b:	48 8d 4f 30          	lea    0x30(%rdi),%rcx
1409d3b8f:	48 8d 53 30          	lea    0x30(%rbx),%rdx
1409d3b93:	e8 48 ee b6 ff       	call   0x1405429e0
1409d3b98:	0f 10 43 60          	movups 0x60(%rbx),%xmm0
1409d3b9c:	0f 11 47 60          	movups %xmm0,0x60(%rdi)
1409d3ba0:	0f 10 43 70          	movups 0x70(%rbx),%xmm0
1409d3ba4:	0f 11 47 70          	movups %xmm0,0x70(%rdi)
1409d3ba8:	f2 0f 10 8b 80 00 00 	movsd  0x80(%rbx),%xmm1
1409d3baf:	00
1409d3bb0:	f2 0f 11 8f 80 00 00 	movsd  %xmm1,0x80(%rdi)
1409d3bb7:	00
1409d3bb8:	48 8b 5c 24 38       	mov    0x38(%rsp),%rbx
1409d3bbd:	48 83 c4 20          	add    $0x20,%rsp
1409d3bc1:	5f                   	pop    %rdi
1409d3bc2:	c3                   	ret
1409d3bc3:	cc                   	int3
1409d3bc4:	cc                   	int3
1409d3bc5:	cc                   	int3
1409d3bc6:	cc                   	int3
1409d3bc7:	cc                   	int3
1409d3bc8:	cc                   	int3
1409d3bc9:	cc                   	int3
1409d3bca:	cc                   	int3
1409d3bcb:	cc                   	int3
1409d3bcc:	cc                   	int3
1409d3bcd:	cc                   	int3
1409d3bce:	cc                   	int3
1409d3bcf:	cc                   	int3
1409d3bd0:	e9 ab 05 02 00       	jmp    0x1409f4180
1409d3bd5:	cc                   	int3
1409d3bd6:	cc                   	int3
1409d3bd7:	cc                   	int3
1409d3bd8:	cc                   	int3
1409d3bd9:	cc                   	int3
1409d3bda:	cc                   	int3
1409d3bdb:	cc                   	int3
1409d3bdc:	cc                   	int3
1409d3bdd:	cc                   	int3
1409d3bde:	cc                   	int3
1409d3bdf:	cc                   	int3
1409d3be0:	0f 10 02             	movups (%rdx),%xmm0
1409d3be3:	0f 11 01             	movups %xmm0,(%rcx)
1409d3be6:	0f 10 4a 10          	movups 0x10(%rdx),%xmm1
1409d3bea:	0f 11 49 10          	movups %xmm1,0x10(%rcx)
1409d3bee:	0f 10 42 20          	movups 0x20(%rdx),%xmm0
1409d3bf2:	0f 11 41 20          	movups %xmm0,0x20(%rcx)
1409d3bf6:	0f 10 4a 30          	movups 0x30(%rdx),%xmm1
1409d3bfa:	0f 11 49 30          	movups %xmm1,0x30(%rcx)
1409d3bfe:	c3                   	ret
1409d3bff:	cc                   	int3
1409d3c00:	48 89 5c 24 08       	mov    %rbx,0x8(%rsp)
1409d3c05:	57                   	push   %rdi
1409d3c06:	48 83 ec 20          	sub    $0x20,%rsp
1409d3c0a:	0f b6 02             	movzbl (%rdx),%eax
1409d3c0d:	48 8b da             	mov    %rdx,%rbx
1409d3c10:	88 01                	mov    %al,(%rcx)
1409d3c12:	48 8b f9             	mov    %rcx,%rdi
1409d3c15:	48 83 c1 08          	add    $0x8,%rcx
1409d3c19:	48 83 c2 08          	add    $0x8,%rdx
1409d3c1d:	e8 1e 4e 7d ff       	call   0x1401a8a40
1409d3c22:	0f b7 43 28          	movzwl 0x28(%rbx),%eax
1409d3c26:	66 89 47 28          	mov    %ax,0x28(%rdi)
1409d3c2a:	48 8b 43 30          	mov    0x30(%rbx),%rax
1409d3c2e:	48 89 47 30          	mov    %rax,0x30(%rdi)
1409d3c32:	48 8b 43 38          	mov    0x38(%rbx),%rax
1409d3c36:	48 89 47 38          	mov    %rax,0x38(%rdi)
1409d3c3a:	48 85 c0             	test   %rax,%rax
1409d3c3d:	74 03                	je     0x1409d3c42
1409d3c3f:	48 ff 00             	incq   (%rax)
1409d3c42:	8b 43 40             	mov    0x40(%rbx),%eax
1409d3c45:	48 8b 5c 24 30       	mov    0x30(%rsp),%rbx
1409d3c4a:	89 47 40             	mov    %eax,0x40(%rdi)
1409d3c4d:	48 83 c4 20          	add    $0x20,%rsp
1409d3c51:	5f                   	pop    %rdi
1409d3c52:	c3                   	ret
1409d3c53:	cc                   	int3
1409d3c54:	cc                   	int3
1409d3c55:	cc                   	int3
1409d3c56:	cc                   	int3
1409d3c57:	cc                   	int3
1409d3c58:	cc                   	int3
1409d3c59:	cc                   	int3
1409d3c5a:	cc                   	int3
1409d3c5b:	cc                   	int3
1409d3c5c:	cc                   	int3
1409d3c5d:	cc                   	int3
1409d3c5e:	cc                   	int3
1409d3c5f:	cc                   	int3
1409d3c60:	48 8b 02             	mov    (%rdx),%rax
1409d3c63:	48 89 01             	mov    %rax,(%rcx)
1409d3c66:	48 85 c0             	test   %rax,%rax
1409d3c69:	74 05                	je     0x1409d3c70
1409d3c6b:	f0 48 ff 40 08       	lock incq 0x8(%rax)
1409d3c70:	c3                   	ret
1409d3c71:	cc                   	int3
1409d3c72:	cc                   	int3
1409d3c73:	cc                   	int3
1409d3c74:	cc                   	int3
1409d3c75:	cc                   	int3
1409d3c76:	cc                   	int3
1409d3c77:	cc                   	int3
1409d3c78:	cc                   	int3
1409d3c79:	cc                   	int3
1409d3c7a:	cc                   	int3
1409d3c7b:	cc                   	int3
1409d3c7c:	cc                   	int3
1409d3c7d:	cc                   	int3
1409d3c7e:	cc                   	int3
1409d3c7f:	cc                   	int3
1409d3c80:	48 8b 42 08          	mov    0x8(%rdx),%rax
1409d3c84:	48 89 41 08          	mov    %rax,0x8(%rcx)
1409d3c88:	48 85 c0             	test   %rax,%rax
1409d3c8b:	74 04                	je     0x1409d3c91
1409d3c8d:	f0 48 ff 00          	lock incq (%rax)
1409d3c91:	c3                   	ret
1409d3c92:	cc                   	int3
1409d3c93:	cc                   	int3
1409d3c94:	cc                   	int3
1409d3c95:	cc                   	int3
1409d3c96:	cc                   	int3
1409d3c97:	cc                   	int3
1409d3c98:	cc                   	int3
1409d3c99:	cc                   	int3
1409d3c9a:	cc                   	int3
1409d3c9b:	cc                   	int3
1409d3c9c:	cc                   	int3
1409d3c9d:	cc                   	int3
1409d3c9e:	cc                   	int3
1409d3c9f:	cc                   	int3
1409d3ca0:	e9 1b e6 b6 ff       	jmp    0x1405422c0
1409d3ca5:	cc                   	int3
1409d3ca6:	cc                   	int3
1409d3ca7:	cc                   	int3
1409d3ca8:	cc                   	int3
1409d3ca9:	cc                   	int3
1409d3caa:	cc                   	int3
1409d3cab:	cc                   	int3
1409d3cac:	cc                   	int3
1409d3cad:	cc                   	int3
1409d3cae:	cc                   	int3
1409d3caf:	cc                   	int3
1409d3cb0:	0f 10 02             	movups (%rdx),%xmm0
1409d3cb3:	0f 11 01             	movups %xmm0,(%rcx)
1409d3cb6:	0f b6 42 10          	movzbl 0x10(%rdx),%eax
1409d3cba:	88 41 10             	mov    %al,0x10(%rcx)
1409d3cbd:	c3                   	ret
1409d3cbe:	cc                   	int3
1409d3cbf:	cc                   	int3
1409d3cc0:	e9 cb e6 b6 ff       	jmp    0x140542390
1409d3cc5:	cc                   	int3
1409d3cc6:	cc                   	int3
1409d3cc7:	cc                   	int3
1409d3cc8:	cc                   	int3
1409d3cc9:	cc                   	int3
1409d3cca:	cc                   	int3
1409d3ccb:	cc                   	int3
1409d3ccc:	cc                   	int3
1409d3ccd:	cc                   	int3
1409d3cce:	cc                   	int3
1409d3ccf:	cc                   	int3
1409d3cd0:	33 c0                	xor    %eax,%eax
1409d3cd2:	48 89 01             	mov    %rax,(%rcx)
1409d3cd5:	48 89 41 08          	mov    %rax,0x8(%rcx)
1409d3cd9:	48 8b 42 08          	mov    0x8(%rdx),%rax
1409d3cdd:	48 85 c0             	test   %rax,%rax
1409d3ce0:	74 04                	je     0x1409d3ce6
1409d3ce2:	f0 ff 40 08          	lock incl 0x8(%rax)
1409d3ce6:	48 8b 02             	mov    (%rdx),%rax
1409d3ce9:	48 89 01             	mov    %rax,(%rcx)
1409d3cec:	48 8b 42 08          	mov    0x8(%rdx),%rax
1409d3cf0:	48 89 41 08          	mov    %rax,0x8(%rcx)
1409d3cf4:	c3                   	ret
1409d3cf5:	cc                   	int3
1409d3cf6:	cc                   	int3
1409d3cf7:	cc                   	int3
1409d3cf8:	cc                   	int3
1409d3cf9:	cc                   	int3
1409d3cfa:	cc                   	int3
1409d3cfb:	cc                   	int3
1409d3cfc:	cc                   	int3
1409d3cfd:	cc                   	int3
1409d3cfe:	cc                   	int3
1409d3cff:	cc                   	int3
1409d3d00:	48 89 5c 24 10       	mov    %rbx,0x10(%rsp)
1409d3d05:	48 89 74 24 18       	mov    %rsi,0x18(%rsp)
1409d3d0a:	57                   	push   %rdi
1409d3d0b:	48 83 ec 20          	sub    $0x20,%rsp
1409d3d0f:	48 8b da             	mov    %rdx,%rbx
1409d3d12:	48 8b f9             	mov    %rcx,%rdi