1400fcd89:	53                   	push   %rbx
1400fcd8a:	b8 20 00 00 00       	mov    $0x20,%eax
1400fcd8f:	e8 9c 3d 1b 00       	call   0x1402b0b30
1400fcd94:	48 2b e0             	sub    %rax,%rsp
1400fcd97:	48 8b d9             	mov    %rcx,%rbx
1400fcd9a:	b8 ff ff ff ff       	mov    $0xffffffff,%eax
1400fcd9f:	f0 0f c1 81 a0 00 00 	lock xadd %eax,0xa0(%rcx)
1400fcda6:	00
1400fcda7:	83 e8 01             	sub    $0x1,%eax
1400fcdaa:	0f 8f d1 00 00 00    	jg     0x1400fce81
1400fcdb0:	48 8b 41 18          	mov    0x18(%rcx),%rax
1400fcdb4:	48 85 c0             	test   %rax,%rax
1400fcdb7:	74 0b                	je     0x1400fcdc4
1400fcdb9:	48 8b 50 40          	mov    0x40(%rax),%rdx
1400fcdbd:	48 85 d2             	test   %rdx,%rdx
1400fcdc0:	74 02                	je     0x1400fcdc4
1400fcdc2:	ff d2                	call   *%rdx
1400fcdc4:	48 8b 4b 20          	mov    0x20(%rbx),%rcx
1400fcdc8:	e8 e3 67 02 00       	call   0x1401235b0
1400fcdcd:	4c 8d 83 90 00 00 00 	lea    0x90(%rbx),%r8
1400fcdd4:	48 8b d3             	mov    %rbx,%rdx
1400fcdd7:	b9 09 00 00 00       	mov    $0x9,%ecx
1400fcddc:	e8 2f af 02 00       	call   0x140127d10
1400fcde1:	48 8b 8b d0 00 00 00 	mov    0xd0(%rbx),%rcx
1400fcde8:	e8 e3 aa 02 00       	call   0x1401278d0
1400fcded:	48 8b 4b 28          	mov    0x28(%rbx),%rcx
1400fcdf1:	e8 3a 3f ff ff       	call   0x1400f0d30
1400fcdf6:	48 8b 4b 30          	mov    0x30(%rbx),%rcx
1400fcdfa:	e8 31 3f ff ff       	call   0x1400f0d30
1400fcdff:	48 8b 4b 38          	mov    0x38(%rbx),%rcx
1400fce03:	e8 48 3b ff ff       	call   0x1400f0950
1400fce08:	48 8b 4b 40          	mov    0x40(%rbx),%rcx
1400fce0c:	e8 3f 3b ff ff       	call   0x1400f0950
1400fce11:	48 8b 4b 48          	mov    0x48(%rbx),%rcx
1400fce15:	e8 36 3b ff ff       	call   0x1400f0950
1400fce1a:	48 8b 4b 50          	mov    0x50(%rbx),%rcx
1400fce1e:	e8 2d 3b ff ff       	call   0x1400f0950
1400fce23:	48 8b 4b 58          	mov    0x58(%rbx),%rcx
1400fce27:	e8 24 3b ff ff       	call   0x1400f0950
1400fce2c:	48 8b 4b 60          	mov    0x60(%rbx),%rcx
1400fce30:	e8 1b 3b ff ff       	call   0x1400f0950
1400fce35:	48 8b 8b 80 00 00 00 	mov    0x80(%rbx),%rcx
1400fce3c:	e8 cf d9 05 00       	call   0x14015a810
1400fce41:	48 8b 8b 88 00 00 00 	mov    0x88(%rbx),%rcx
1400fce48:	48 8d 15 a1 dc 05 00 	lea    0x5dca1(%rip),%rdx        # 0x14015aaf0
1400fce4f:	e8 2c e9 fe ff       	call   0x1400eb780
1400fce54:	48 8b 8b c0 00 00 00 	mov    0xc0(%rbx),%rcx
1400fce5b:	e8 d0 b8 05 00       	call   0x140158730
1400fce60:	48 8b 8b c8 00 00 00 	mov    0xc8(%rbx),%rcx
1400fce67:	e8 c4 b8 05 00       	call   0x140158730
1400fce6c:	41 b8 b1 00 00 00    	mov    $0xb1,%r8d
1400fce72:	48 8d 15 f7 e2 20 00 	lea    0x20e2f7(%rip),%rdx        # 0x14030b170
1400fce79:	48 8b cb             	mov    %rbx,%rcx
1400fce7c:	e8 3f ef fe ff       	call   0x1400ebdc0
1400fce81:	48 83 c4 20          	add    $0x20,%rsp
1400fce85:	5b                   	pop    %rbx
1400fce86:	c3                   	ret
1400fce87:	cc                   	int3
1400fce88:	cc                   	int3
1400fce89:	cc                   	int3
1400fce8a:	cc                   	int3
1400fce8b:	cc                   	int3
1400fce8c:	cc                   	int3
1400fce8d:	cc                   	int3
1400fce8e:	cc                   	int3
1400fce8f:	cc                   	int3
1400fce90:	48 85 d2             	test   %rdx,%rdx
1400fce93:	74 07                	je     0x1400fce9c
1400fce95:	48 8b 41 50          	mov    0x50(%rcx),%rax
1400fce99:	48 89 02             	mov    %rax,(%rdx)
1400fce9c:	4d 85 c0             	test   %r8,%r8
1400fce9f:	74 07                	je     0x1400fcea8
1400fcea1:	48 8b 41 58          	mov    0x58(%rcx),%rax
1400fcea5:	49 89 00             	mov    %rax,(%r8)
1400fcea8:	4d 85 c9             	test   %r9,%r9
1400fceab:	74 07                	je     0x1400fceb4
1400fcead:	48 8b 41 60          	mov    0x60(%rcx),%rax
1400fceb1:	49 89 01             	mov    %rax,(%r9)
1400fceb4:	c3                   	ret
1400fceb5:	cc                   	int3
1400fceb6:	cc                   	int3
1400fceb7:	cc                   	int3
1400fceb8:	cc                   	int3
1400fceb9:	cc                   	int3
1400fceba:	cc                   	int3
1400fcebb:	cc                   	int3
1400fcebc:	cc                   	int3
1400fcebd:	cc                   	int3
1400fcebe:	cc                   	int3
1400fcebf:	cc                   	int3
1400fcec0:	48 8b 41 38          	mov    0x38(%rcx),%rax
1400fcec4:	c3                   	ret
1400fcec5:	cc                   	int3
1400fcec6:	cc                   	int3
1400fcec7:	cc                   	int3
1400fcec8:	cc                   	int3
1400fcec9:	cc                   	int3
1400fceca:	cc                   	int3
1400fcecb:	cc                   	int3
1400fcecc:	cc                   	int3
1400fcecd:	cc                   	int3
1400fcece:	cc                   	int3
1400fcecf:	cc                   	int3
1400fced0:	48 8b 41 50          	mov    0x50(%rcx),%rax
1400fced4:	c3                   	ret
1400fced5:	cc                   	int3
1400fced6:	cc                   	int3
1400fced7:	cc                   	int3
1400fced8:	cc                   	int3
1400fced9:	cc                   	int3
1400fceda:	cc                   	int3
1400fcedb:	cc                   	int3
1400fcedc:	cc                   	int3
1400fcedd:	cc                   	int3
1400fcede:	cc                   	int3
1400fcedf:	cc                   	int3
1400fcee0:	48 8b 41 58          	mov    0x58(%rcx),%rax
1400fcee4:	c3                   	ret
1400fcee5:	cc                   	int3
1400fcee6:	cc                   	int3
1400fcee7:	cc                   	int3
1400fcee8:	cc                   	int3
1400fcee9:	cc                   	int3
1400fceea:	cc                   	int3
1400fceeb:	cc                   	int3
1400fceec:	cc                   	int3
1400fceed:	cc                   	int3
1400fceee:	cc                   	int3
1400fceef:	cc                   	int3
1400fcef0:	48 8b 41 30          	mov    0x30(%rcx),%rax
1400fcef4:	c3                   	ret
1400fcef5:	cc                   	int3
1400fcef6:	cc                   	int3
1400fcef7:	cc                   	int3
1400fcef8:	cc                   	int3
1400fcef9:	cc                   	int3
1400fcefa:	cc                   	int3
1400fcefb:	cc                   	int3
1400fcefc:	cc                   	int3
1400fcefd:	cc                   	int3
1400fcefe:	cc                   	int3
1400fceff:	cc                   	int3
1400fcf00:	48 85 d2             	test   %rdx,%rdx
1400fcf03:	74 07                	je     0x1400fcf0c
1400fcf05:	48 8b 41 40          	mov    0x40(%rcx),%rax
1400fcf09:	48 89 02             	mov    %rax,(%rdx)
1400fcf0c:	4d 85 c0             	test   %r8,%r8
1400fcf0f:	74 07                	je     0x1400fcf18
1400fcf11:	48 8b 41 48          	mov    0x48(%rcx),%rax
1400fcf15:	49 89 00             	mov    %rax,(%r8)
1400fcf18:	c3                   	ret
1400fcf19:	cc                   	int3
1400fcf1a:	cc                   	int3
1400fcf1b:	cc                   	int3
1400fcf1c:	cc                   	int3
1400fcf1d:	cc                   	int3
1400fcf1e:	cc                   	int3
1400fcf1f:	cc                   	int3
1400fcf20:	48 8b 41 60          	mov    0x60(%rcx),%rax
1400fcf24:	c3                   	ret
1400fcf25:	cc                   	int3
1400fcf26:	cc                   	int3
1400fcf27:	cc                   	int3
1400fcf28:	cc                   	int3
1400fcf29:	cc                   	int3
1400fcf2a:	cc                   	int3
1400fcf2b:	cc                   	int3
1400fcf2c:	cc                   	int3
1400fcf2d:	cc                   	int3
1400fcf2e:	cc                   	int3
1400fcf2f:	cc                   	int3
1400fcf30:	48 85 d2             	test   %rdx,%rdx
1400fcf33:	74 07                	je     0x1400fcf3c
1400fcf35:	48 8b 41 28          	mov    0x28(%rcx),%rax
1400fcf39:	48 89 02             	mov    %rax,(%rdx)
1400fcf3c:	4d 85 c0             	test   %r8,%r8
1400fcf3f:	74 07                	je     0x1400fcf48
1400fcf41:	48 8b 41 30          	mov    0x30(%rcx),%rax
1400fcf45:	49 89 00             	mov    %rax,(%r8)
1400fcf48:	4d 85 c9             	test   %r9,%r9
1400fcf4b:	74 07                	je     0x1400fcf54
1400fcf4d:	48 8b 41 38          	mov    0x38(%rcx),%rax
1400fcf51:	49 89 01             	mov    %rax,(%r9)
1400fcf54:	c3                   	ret
1400fcf55:	cc                   	int3
1400fcf56:	cc                   	int3
1400fcf57:	cc                   	int3
1400fcf58:	cc                   	int3
1400fcf59:	cc                   	int3
1400fcf5a:	cc                   	int3
1400fcf5b:	cc                   	int3
1400fcf5c:	cc                   	int3
1400fcf5d:	cc                   	int3
1400fcf5e:	cc                   	int3
1400fcf5f:	cc                   	int3
1400fcf60:	40 55                	rex push %rbp
1400fcf62:	41 55                	push   %r13
1400fcf64:	41 57                	push   %r15
1400fcf66:	b8 20 00 00 00       	mov    $0x20,%eax
1400fcf6b:	e8 c0 3b 1b 00       	call   0x1402b0b30
1400fcf70:	48 2b e0             	sub    %rax,%rsp
1400fcf73:	4c 8b e9             	mov    %rcx,%r13
1400fcf76:	49 8b e8             	mov    %r8,%rbp
1400fcf79:	48 8b 89 88 00 00 00 	mov    0x88(%rcx),%rcx
1400fcf80:	4c 8b fa             	mov    %rdx,%r15
1400fcf83:	e8 b8 e7 fe ff       	call   0x1400eb740
1400fcf88:	85 c0                	test   %eax,%eax
1400fcf8a:	7f 0c                	jg     0x1400fcf98
1400fcf8c:	33 c0                	xor    %eax,%eax
1400fcf8e:	48 83 c4 20          	add    $0x20,%rsp
1400fcf92:	41 5f                	pop    %r15
1400fcf94:	41 5d                	pop    %r13
1400fcf96:	5d                   	pop    %rbp
1400fcf97:	c3                   	ret
1400fcf98:	4d 85 ff             	test   %r15,%r15
1400fcf9b:	75 05                	jne    0x1400fcfa2
1400fcf9d:	48 85 ed             	test   %rbp,%rbp
1400fcfa0:	74 75                	je     0x1400fd017
1400fcfa2:	48 89 74 24 48       	mov    %rsi,0x48(%rsp)
1400fcfa7:	48 89 7c 24 50       	mov    %rdi,0x50(%rsp)
1400fcfac:	33 ff                	xor    %edi,%edi
1400fcfae:	48 63 f0             	movslq %eax,%rsi
1400fcfb1:	85 c0                	test   %eax,%eax
1400fcfb3:	7e 58                	jle    0x1400fd00d
1400fcfb5:	48 89 5c 24 40       	mov    %rbx,0x40(%rsp)
1400fcfba:	48 8b dd             	mov    %rbp,%rbx
1400fcfbd:	4c 89 74 24 58       	mov    %r14,0x58(%rsp)
1400fcfc2:	4d 8b f7             	mov    %r15,%r14
1400fcfc5:	4c 2b f5             	sub    %rbp,%r14
1400fcfc8:	0f 1f 84 00 00 00 00 	nopl   0x0(%rax,%rax,1)
1400fcfcf:	00
1400fcfd0:	49 8b 8d 88 00 00 00 	mov    0x88(%r13),%rcx
1400fcfd7:	8b d7                	mov    %edi,%edx
1400fcfd9:	e8 62 ea fe ff       	call   0x1400eba40
1400fcfde:	4d 85 ff             	test   %r15,%r15
1400fcfe1:	74 08                	je     0x1400fcfeb
1400fcfe3:	48 8b 48 08          	mov    0x8(%rax),%rcx
1400fcfe7:	49 89 0c 1e          	mov    %rcx,(%r14,%rbx,1)
1400fcfeb:	48 85 ed             	test   %rbp,%rbp
1400fcfee:	74 07                	je     0x1400fcff7
1400fcff0:	48 8b 40 10          	mov    0x10(%rax),%rax
1400fcff4:	48 89 03             	mov    %rax,(%rbx)
1400fcff7:	ff c7                	inc    %edi
1400fcff9:	48 83 c3 08          	add    $0x8,%rbx
1400fcffd:	48 83 ee 01          	sub    $0x1,%rsi
1400fd001:	75 cd                	jne    0x1400fcfd0
1400fd003:	4c 8b 74 24 58       	mov    0x58(%rsp),%r14
1400fd008:	48 8b 5c 24 40       	mov    0x40(%rsp),%rbx
1400fd00d:	48 8b 74 24 48       	mov    0x48(%rsp),%rsi
1400fd012:	48 8b 7c 24 50       	mov    0x50(%rsp),%rdi
1400fd017:	b8 01 00 00 00       	mov    $0x1,%eax
1400fd01c:	48 83 c4 20          	add    $0x20,%rsp
1400fd020:	41 5f                	pop    %r15
1400fd022:	41 5d                	pop    %r13
1400fd024:	5d                   	pop    %rbp
1400fd025:	c3                   	ret
1400fd026:	cc                   	int3
1400fd027:	cc                   	int3
1400fd028:	cc                   	int3
1400fd029:	cc                   	int3
1400fd02a:	cc                   	int3
1400fd02b:	cc                   	int3
1400fd02c:	cc                   	int3
1400fd02d:	cc                   	int3
1400fd02e:	cc                   	int3
1400fd02f:	cc                   	int3
1400fd030:	48 89 6c 24 20       	mov    %rbp,0x20(%rsp)
1400fd035:	41 56                	push   %r14
1400fd037:	b8 20 00 00 00       	mov    $0x20,%eax
1400fd03c:	e8 ef 3a 1b 00       	call   0x1402b0b30
1400fd041:	48 2b e0             	sub    %rax,%rsp
1400fd044:	48 8b e9             	mov    %rcx,%rbp
1400fd047:	4c 8b f2             	mov    %rdx,%r14
1400fd04a:	48 8b 89 88 00 00 00 	mov    0x88(%rcx),%rcx
1400fd051:	e8 ea e6 fe ff       	call   0x1400eb740
1400fd056:	85 c0                	test   %eax,%eax
1400fd058:	7f 0e                	jg     0x1400fd068
1400fd05a:	33 c0                	xor    %eax,%eax
1400fd05c:	48 8b 6c 24 48       	mov    0x48(%rsp),%rbp
1400fd061:	48 83 c4 20          	add    $0x20,%rsp
1400fd065:	41 5e                	pop    %r14
1400fd067:	c3                   	ret
1400fd068:	48 89 74 24 38       	mov    %rsi,0x38(%rsp)
1400fd06d:	48 89 7c 24 40       	mov    %rdi,0x40(%rsp)
1400fd072:	33 ff                	xor    %edi,%edi
1400fd074:	48 63 f0             	movslq %eax,%rsi
1400fd077:	85 c0                	test   %eax,%eax
1400fd079:	7e 2b                	jle    0x1400fd0a6
1400fd07b:	48 89 5c 24 30       	mov    %rbx,0x30(%rsp)
1400fd080:	8b df                	mov    %edi,%ebx
1400fd082:	48 8b 8d 88 00 00 00 	mov    0x88(%rbp),%rcx
1400fd089:	8b d7                	mov    %edi,%edx
1400fd08b:	e8 b0 e9 fe ff       	call   0x1400eba40
1400fd090:	ff c7                	inc    %edi
1400fd092:	48 8b 08             	mov    (%rax),%rcx
1400fd095:	49 89 0c de          	mov    %rcx,(%r14,%rbx,8)
1400fd099:	48 ff c3             	inc    %rbx
1400fd09c:	48 3b de             	cmp    %rsi,%rbx
1400fd09f:	7c e1                	jl     0x1400fd082
1400fd0a1:	48 8b 5c 24 30       	mov    0x30(%rsp),%rbx
1400fd0a6:	48 8b 7c 24 40       	mov    0x40(%rsp),%rdi
1400fd0ab:	b8 01 00 00 00       	mov    $0x1,%eax
1400fd0b0:	48 8b 74 24 38       	mov    0x38(%rsp),%rsi
1400fd0b5:	48 8b 6c 24 48       	mov    0x48(%rsp),%rbp
1400fd0ba:	48 83 c4 20          	add    $0x20,%rsp
1400fd0be:	41 5e                	pop    %r14
1400fd0c0:	c3                   	ret
1400fd0c1:	cc                   	int3
1400fd0c2:	cc                   	int3
1400fd0c3:	cc                   	int3
1400fd0c4:	cc                   	int3
1400fd0c5:	cc                   	int3
1400fd0c6:	cc                   	int3
1400fd0c7:	cc                   	int3
1400fd0c8:	cc                   	int3
1400fd0c9:	cc                   	int3
1400fd0ca:	cc                   	int3
1400fd0cb:	cc                   	int3
1400fd0cc:	cc                   	int3
1400fd0cd:	cc                   	int3
1400fd0ce:	cc                   	int3
1400fd0cf:	cc                   	int3
1400fd0d0:	48 8b 41 28          	mov    0x28(%rcx),%rax
1400fd0d4:	c3                   	ret
1400fd0d5:	cc                   	int3
1400fd0d6:	cc                   	int3
1400fd0d7:	cc                   	int3
1400fd0d8:	cc                   	int3
1400fd0d9:	cc                   	int3
1400fd0da:	cc                   	int3
1400fd0db:	cc                   	int3
1400fd0dc:	cc                   	int3
1400fd0dd:	cc                   	int3
1400fd0de:	cc                   	int3
1400fd0df:	cc                   	int3
1400fd0e0:	48 8b 81 80 00 00 00 	mov    0x80(%rcx),%rax
1400fd0e7:	c3                   	ret
1400fd0e8:	cc                   	int3
1400fd0e9:	cc                   	int3
1400fd0ea:	cc                   	int3
1400fd0eb:	cc                   	int3
1400fd0ec:	cc                   	int3
1400fd0ed:	cc                   	int3
1400fd0ee:	cc                   	int3
1400fd0ef:	cc                   	int3
1400fd0f0:	48 8b 41 48          	mov    0x48(%rcx),%rax
1400fd0f4:	c3                   	ret
1400fd0f5:	cc                   	int3
1400fd0f6:	cc                   	int3
1400fd0f7:	cc                   	int3