Reference number : GC-2017-Q2-04401, amendment number : , agreement type : G, recipient legal name : Chen, Li (University of Saskatchewan), recipient country : CA, recipient province : nan, recipient city : Saskatchewan, recipient postal code : nan, program name english : Collaborative Research and Development Grants - Project, program name french : Subventions de recherche et développement coopérative - projet, program purpose english : The scaling of silicon technologies has enabled multi-billions of transistors in a single chip, which increases the transistor density and operating frequency of the electronics while reducing the cost and energy consumption per transistor. However, this also imposes a significant challenge in power conversion, delivery and management with minimal power loss and noise. For example, only a fraction of the transistors on a large integrated circuit can operate at full voltage/frequency to not exceed the thermal design power, and a large proportion of the circuit blocks is either inactive or in a reduced-power state at any given time to satisfy the power and thermal constraints. This utilization limitation has urged the semiconductor community to develop more efficient power conversion and distribution circuits. The overall objectives of the research project are to optimize voltage regulator-converter circuits and power distribution networks to minimize the power loss during voltage conversion and the noise throughout the power delivery network in power management. The given objectives require power management circuit to be on the same die and optimized together with the dedicated power delivery network. Circuit structures and design methodologies of such voltage converters and power management circuits are proposed, and an on-silicon realization is to be implemented in 28nm Fully Depleted Silicon. The results of the research project are expected to achieve more efficient power-conversion as compared to the existing techniques and lower power supply noise as compared to off-chip solutions. The proposed project will advance the state-of-the-art in on-chip voltage regulator and power delivery designs, which will benefit both industry and broader community. The research results will be published in premier conferences and journals for the dissemination of knowledge. A number of students will be trained during the project period, and the nature of the collaboration with industry will poise them in the right position for working in this field in the future. _x000D_, program purpose french : The scaling of silicon technologies has enabled multi-billions of transistors in a single chip, which increases the transistor density and operating frequency of the electronics while reducing the cost and energy consumption per transistor. However, this also imposes a significant challenge in power conversion, delivery and management with minimal power loss and noise. For example, only a fraction of the transistors on a large integrated circuit can operate at full voltage/frequency to not exceed the thermal design power, and a large proportion of the circuit blocks is either inactive or in a reduced-power state at any given time to satisfy the power and thermal constraints. This utilization limitation has urged the semiconductor community to develop more efficient power conversion and distribution circuits. The overall objectives of the research project are to optimize voltage regulator-converter circuits and power distribution networks to minimize the power loss during voltage conversion and the noise throughout the power delivery network in power management. The given objectives require power management circuit to be on the same die and optimized together with the dedicated power delivery network. Circuit structures and design methodologies of such voltage converters and power management circuits are proposed, and an on-silicon realization is to be implemented in 28nm Fully Depleted Silicon. The results of the research project are expected to achieve more efficient power-conversion as compared to the existing techniques and lower power supply noise as compared to off-chip solutions. The proposed project will advance the state-of-the-art in on-chip voltage regulator and power delivery designs, which will benefit both industry and broader community. The research results will be published in premier conferences and journals for the dissemination of knowledge. A number of students will be trained during the project period, and the nature of the collaboration with industry will poise them in the right position for working in this field in the future. _x000D_, agreement title english : On-chip voltage regulation in advanced technologies, agreement title french : On-chip voltage regulation in advanced technologies, agreement number : CRDPJ, agreement value : 144604.0, agreement start date : 2017-09-20, agreement end date : nan, description english : nan, description french : nan, expected results english : nan, expected results french : nan, additional information english : Grant or Award spanning more than one fiscal year (2017-2018 to 2019-2020)., additional information french : Subvention ou bourse octroyée s'appliquant à plus d'un exercice financier (2017-2018 à 2019-2020)., owner organization : nserc-crsng, owner organization title : Natural Sciences and Engineering Research Council of Canada | Conseil de recherches en sciences naturelles et en génie du Canada