Reference number : GC-2017-Q3-00824, amendment number : , agreement type : G, recipient legal name : Ruediger, Andreas (Institut national de la recherche scientifique), recipient country : CA, recipient province : nan, recipient city : Quebec|Québec, recipient postal code : nan, program name english : Strategic Projects - Group, program name french : Projets stratégiques - groupe, program purpose english : Ferroelectric tunnel junctions (FTJs) are the strongest contender to replace flash memory in integrated computer circuitry as they combine low-cost, non-volatility, small footprint, fast read- write cycles, low energy consumption, non-destructive readout and, since very recently, cmos-compatibility. The principle of operation is based on resistive switching between two conductive states that, in the case of FTJs are provided through the distinct state of spontaneous polarization. Intrinsically only a few unit cells thick, they are also suited for integration in crossbar arrays to combine features of memory and logic thus enabling innovative circuit architectures with tremendous potential for energy savings during processor operation. We have very recently demonstrated FTJs with proven CMOS compatibility, using only materials, HfZrO2, that are already part of cmos processing and keeping all process parameters, in particular the deposition temperature, within tolerances. With the proof of concept submitted for patent in collaboration with the industrial partner, the further development of these electronic functions relies for one on the optimization of process parameters for RF magnetron sputtering, a process to be readily adopted from laboratory to fabrication scale. For the other, parasitic switching effects, such as filamentary-mediated resistive switching need to be excluded and the most common failure mechanisms, e.g. point defects, will have to be identified. For this purpose, we collaborate with the electron microscopy and spectroscopy (PEEM) beam line at the Canadian Light Source, Canada's most advanced infrastructure for nanoscale chemical and structural imaging. In order to determine the full potential of these electronic tiles for given specifications (mainly the resistance ratio between on and off state), we collaborate with the NSERC/IBM Canadian industrial research chair to guide the integration towards the most promising circuit architecture. The main objective of this partnership is to develop an industrial main-frame compatible process for a novel non-volatile memory generation to outperform flash in terms of write speed, energy consumption and endurance._x000D_
_x000D_, program purpose french : Ferroelectric tunnel junctions (FTJs) are the strongest contender to replace flash memory in integrated computer circuitry as they combine low-cost, non-volatility, small footprint, fast read- write cycles, low energy consumption, non-destructive readout and, since very recently, cmos-compatibility. The principle of operation is based on resistive switching between two conductive states that, in the case of FTJs are provided through the distinct state of spontaneous polarization. Intrinsically only a few unit cells thick, they are also suited for integration in crossbar arrays to combine features of memory and logic thus enabling innovative circuit architectures with tremendous potential for energy savings during processor operation. We have very recently demonstrated FTJs with proven CMOS compatibility, using only materials, HfZrO2, that are already part of cmos processing and keeping all process parameters, in particular the deposition temperature, within tolerances. With the proof of concept submitted for patent in collaboration with the industrial partner, the further development of these electronic functions relies for one on the optimization of process parameters for RF magnetron sputtering, a process to be readily adopted from laboratory to fabrication scale. For the other, parasitic switching effects, such as filamentary-mediated resistive switching need to be excluded and the most common failure mechanisms, e.g. point defects, will have to be identified. For this purpose, we collaborate with the electron microscopy and spectroscopy (PEEM) beam line at the Canadian Light Source, Canada's most advanced infrastructure for nanoscale chemical and structural imaging. In order to determine the full potential of these electronic tiles for given specifications (mainly the resistance ratio between on and off state), we collaborate with the NSERC/IBM Canadian industrial research chair to guide the integration towards the most promising circuit architecture. The main objective of this partnership is to develop an industrial main-frame compatible process for a novel non-volatile memory generation to outperform flash in terms of write speed, energy consumption and endurance._x000D_
_x000D_, agreement title english : Physical vapour deposition of ferroelectric and multiferroic tunnel junctions, agreement title french : Physical vapour deposition of ferroelectric and multiferroic tunnel junctions, agreement number : STPGP, agreement value : 586000.0, agreement start date : 2017-10-18, agreement end date : nan, description english : nan, description french : nan, expected results english : nan, expected results french : nan, additional information english : Grant or Award spanning more than one fiscal year (2017-2018 to 2020-2021)., additional information french : Subvention ou bourse octroyée s'appliquant à plus d'un exercice financier (2017-2018 à 2020-2021)., owner organization : nserc-crsng, owner organization title : Natural Sciences and Engineering Research Council of Canada | Conseil de recherches en sciences naturelles et en génie du Canada