Reference number : GC-2017-Q1-02552, amendment number : , agreement type : G, recipient legal name : Chen, Li (University of Saskatchewan), recipient country : CA, recipient province : nan, recipient city : Saskatchewan, recipient postal code : nan, program name english : Discovery Grants Program - Individual, program name french : Programme de subventions à la découverte - individuelles, program purpose english : Silicon technologies have been the dominant platform for the majority of the electronic devices in industry. The silicon technology scaling has significantly improved the performance of integrated circuits (ICs). However, due to the small device dimension and low operating voltages, nanoscale ICs have become highly sensitive to operational disturbances. These disturbances, especially those caused by single event effects (SEEs) due to energetic particles in ICs, can introduce transient pulses in logic circuit nodes or upset data in storage cells. Their impact can range from a single data corruption to a severe system crash. For example, Sun Microsystems were forced to recall their flagship servers in 2000 due to sudden and mysterious crashes caused by cosmic particles. Even for ICs in terrestrial environments, the error rates caused by SEEs can be 100 times higher than those from hard failures such as device wear out. The objectives of the proposed research program are to study the SEEs in microelectronics and, further, advise cost-effective mitigation solutions to achieve reliable operations for electronic circuits and systems. Various logic circuits and systems with SEE-hardening techniques will be designed and fabricated in test chips using advanced silicon technologies. Ion beams (protons and heavy ions) will be used to evaluate their performance in the context of SEE tolerance. An on-campus pulsed laser facility has been established and will be used as an investigation tool to characterize SEEs in the test chips, as it can precisely induce SEEs in the ICs at a designated location and time. In addition, device- and circuit-level simulation tools will be used to model and characterize the performance of the test circuits. The simulation results will be used to correlate with the laser and ion radiation results, which will provide insight, understanding and information about SEEs in ICs. The proposed program will develop SEE-tolerant technologies for the Canadian industry in order to improve the reliability of microelectronics. This program will equip a number of highly skilled personnel with the training necessary to enter this innovative field of research., program purpose french : Silicon technologies have been the dominant platform for the majority of the electronic devices in industry. The silicon technology scaling has significantly improved the performance of integrated circuits (ICs). However, due to the small device dimension and low operating voltages, nanoscale ICs have become highly sensitive to operational disturbances. These disturbances, especially those caused by single event effects (SEEs) due to energetic particles in ICs, can introduce transient pulses in logic circuit nodes or upset data in storage cells. Their impact can range from a single data corruption to a severe system crash. For example, Sun Microsystems were forced to recall their flagship servers in 2000 due to sudden and mysterious crashes caused by cosmic particles. Even for ICs in terrestrial environments, the error rates caused by SEEs can be 100 times higher than those from hard failures such as device wear out. The objectives of the proposed research program are to study the SEEs in microelectronics and, further, advise cost-effective mitigation solutions to achieve reliable operations for electronic circuits and systems. Various logic circuits and systems with SEE-hardening techniques will be designed and fabricated in test chips using advanced silicon technologies. Ion beams (protons and heavy ions) will be used to evaluate their performance in the context of SEE tolerance. An on-campus pulsed laser facility has been established and will be used as an investigation tool to characterize SEEs in the test chips, as it can precisely induce SEEs in the ICs at a designated location and time. In addition, device- and circuit-level simulation tools will be used to model and characterize the performance of the test circuits. The simulation results will be used to correlate with the laser and ion radiation results, which will provide insight, understanding and information about SEEs in ICs. The proposed program will develop SEE-tolerant technologies for the Canadian industry in order to improve the reliability of microelectronics. This program will equip a number of highly skilled personnel with the training necessary to enter this innovative field of research., agreement title english : Radiation-Tolerant Microelectronics for Space and Commercial Applicaitons, agreement title french : Radiation-Tolerant Microelectronics for Space and Commercial Applicaitons, agreement number : RGPIN, agreement value : 165000.0, agreement start date : 2017-05-10, agreement end date : nan, description english : nan, description french : nan, expected results english : nan, expected results french : nan, additional information english : Grant or Award spanning more than one fiscal year. (2017-2018 to 2022-2023), additional information french : Subvention ou bourse octroyée s'appliquant à plus d'un exercice financier. (2017-2018 à 2022-2023), owner organization : nserc-crsng, owner organization title : Natural Sciences and Engineering Research Council of Canada | Conseil de recherches en sciences naturelles et en génie du Canada