SOTA Attention Operator is generated by SOTA Attention Algorithm
Authors: Qirui Zhou, Shaohui Peng, Weiqiang Xiong, Haixin Chen, Yuanbo Wen, Haochen Li, Ling Li, Qi Guo, Yongwei Zhao, KE GAO, Ruizhi Chen, Yanjun Wu, Zhao Chen, Yunji Chen
Accepted at: acl25

QiMeng-Attention: SOTA Attention Operator is generated by SOTA Attention Algorithm

Qirui Zhou1,3, Shaohui Peng2, Weiqiang Xiong2,3, Haixin Chen1,3, Yuanbo Wen1, Haochen Li2, Ling Li2,3*, Qi Guo 1, Yongwei Zhao1, Ke Gao2, Ruizhi Chen2, Yanjun Wu2, Chen Zhao2, Yunji Chen1,3
1SKL of Processors, Institute of Computing Technology, CAS, Beijing, China
2Intelligent Software Research Center, Institute of Software, CAS, Beijing China
3University of Chinese Academy of Sciences, Beijing, China
zhouqirui22s@ict.ac.cn,{pengshaohui,liling}@iscas.ac.cn

Abstract

The attention operator remains a critical performance bottleneck in large language models (LLMs), particularly for long-context scenarios. While FlashAttention is the most widely used and effective GPU-aware acceleration algorithm, it must require time-consuming and hardware-specific manual implementation, limiting adaptability across GPU architectures. Existing LLMs have shown a lot of promise in code generation tasks, but struggle to generate high-performance attention code. The key challenge is it cannot comprehend the complex data flow and computation process of the attention operator and utilize low-level primitive to exploit GPU performance.

To address the above challenge, we propose an LLM-friendly Thinking Language (LLM-TL) to help LLMs decouple the generation of high-level optimization logic and low-level implementation on GPU, and enhance LLMs’ understanding of attention operator. Along with a 2-stage reasoning workflow, TL-Code generation and translation, the LLMs can automatically generate FlashAttention implementation on diverse GPUs, establishing a self-optimizing paradigm for generating high-performance attention operators in attention-centric algorithms. Verified on A100, RTX8000, and T4 GPUs, the performance of our methods significantly outshines that of vanilla LLMs, achieving a speed-up of up to 35.16×. Besides, our method not only surpasses human-optimized libraries (cuDNN and official library) in most scenarios but also extends support to unsupported hardware and data types, reducing development time from months to minutes compared with human experts.

1 Introduction

The attention mechanism is the cornerstone of modern Large Language Models (LLMs). Its time and memory complexity grows quadratically in sequence length, and attention has emerged as the bottleneck for the runtime and memory resource requirements for LLMs, particularly in long-context scenarios (Dao et al., 2022). Consequently, numerous acceleration algorithms have been proposed to accelerate attention operators, with FlashAttention being the most effective and widely used (Dao et al., 2022; Dao, 2024; Hong et al., 2024). With the rise of cost-efficient, high-performance LLMs like DeepSeek (DeepSeek-AI et al., 2024a,b, 2025), deploying LLMs across diverse GPU specifications (including legacy generations) has become increasingly prevalent.

However, due to the complexity of attention operators and disparities in the architectures and instruction sets across different GPUs, the efficient implementation and migration of FlashAttention algorithms becomes a pressing challenge. Exis-

Prompt: Generate an attention operator on A100 GPU with Torch
scores = torch.matmul(q, k.transpose(2, -1))
scores = scores + torch.bmm(torch.tensor(d, k, dtype=torch.float32))
attention_weights = F.softmax(scores / v, dim=-1)
output = torch.matmul(attention_weights, v)

Corresponding hardware processing pipeline
L GEMM1 | S | L Softmax | S | L GEMM2 | S
L Load data from global memory | S Store data to global memory | Computation

(a) LLMs generate high-level code by calling Torch functions

Prompt: Generate a fused CUDA kernel for attention on A100 GPU
CUDA Kernel using Tensor Core
......
// Load the tiles of Q, K, and V into shared memory
auto Q_tile = load_tile(Q, block_shape, threadIdx.x);
......
// Perform the matrix multiplication using Tensor Cores
auto O_tile = mma_op(Q_tile, K_tile, V_tile); ......
1. Inconsistent language usage
2. Improper Tensor Core utilization
3. ...

(b) LLMs cannot generate correct fused CUDA Kernel

TL Sketch
Reasoning
TL Code
for (int n = 0; n < num_blocks; n++) {
    // GEMM q, s, k; t: get r
    ep.async_wait(-1);
    // symm(s, k, t)
    auto S0d = smem_tr_copy_Q_partition_S0();
    auto S0k = smem_tr_copy_Q_partition_S0k();
    ......
}

Corresponding hardware processing pipeline
L GEMM1 | S | L Softmax | S | L GEMM2 | S

(c) Our LLM-TL paradigm generates performant CUDA kernel

Figure 1: Our LLM-TL enables LLMs to generate high-performance Tensor Core kernel for attention.
ing methods for implementing high-performance attention operators can be divided into two categories: i.e., manual implementation and deep learning compilers. Human experts optimize attention operators through fused computation based on their expertise in GPU architecture and algorithm knowledge, thereby effectively enhancing computation efficiency. Consequently, these hand-crafted implementations are time-consuming and non-portable, failing to support some common GPUs and datatypes (e.g., RTX8000 GPU and FP8 datatype). In addition, existing mainstream deep learning compilers (e.g., TVM (Chen et al., 2018), Ansor (Zheng et al., 2020)) fail to automatically implement FlashAttention due to their inability to perform optimizations involving fused sequences of multiple complex operations (e.g. GEMM). Overall, current methods struggle to automatically analyze the attention operator characteristics and GPU architecture to efficiently generate high-performance FlashAttention implementation on different GPU platforms, which limits the adaptability of LLMs.

Motivated by strong code-generation abilities of LLMs (Bairi et al., 2024; Zhong et al., 2024; Holt et al., 2024; Li et al., 2024; Wang et al., 2023; Zhou et al., 2025; Zhang et al., 2025), it is a promising direction to tackle these issues by utilizing LLMs automatically implement FlashAttention on GPUs. Although LLMs can create attention implementations by high-level APIs like PyTorch (Paszke and et al., 2019), they have trouble generating high-performance FlashAttention with low-level primitives (e.g., CUDA or CuTe (NVIDIA/CUTLASS, 2023)) with crucial optimization techniques like data blocking and fused computation. This significantly hinders the reduction of memory access overheads and the enhancement of computational efficiency, as shown in Figure 1(a). The primary challenges preventing LLMs from generating high-performance FlashAttention implementations in one pass are twofold: (1) LLMs cannot comprehend the complex data flow and multi-step computation of attention, thus failing to generate effective optimization logic; (2) LLMs are unable to produce optimized implementations based on low-level primitives to fully exploit GPU characteristics.

Inspired by human experts’ decoupling of optimization and implementation, we propose an LLM-friendly Thinking Language (LLM-TL) to address the above challenge by helping LLMs decouple the generation of abstract optimization logic and low-level code implementation on GPU. Specifically, LLM-TL encompasses two types of statements and their requisite parameters: memory access and computation, enabling LLMs to comprehend the data flow and computation processes of the attention operator on GPU architecture from the vantage point of high-level abstract semantics, as shown in Figure 1(c). Based on LLM-TL, we further propose an automated workflow, leveraging the reasoning capabilities of LLMs to implement the high-performance FlashAttention operator on GPUs with low-level primitives. Formally, the workflow includes: 1) TL Code generation: LLMs use LLM-TL statements to create sketch code to represent the execution flow on GPU, then reasoning and filling the parameters needed for each statement; 2) TL Code translation: LLMs convert the TL-code into low-level CUDA code based on the target GPU architecture and instruction set. Through LLM-TL and the workflow, LLMs can efficiently and automatically implement the high-performance FlashAttention on different GPUs.

The contributions of this paper are as follows:

(1) We propose LLM-TL, an LLM-friendly abstract language, enabling LLMs to deeply comprehend and optimize complex attention operators on GPUs, thereby establishing a self-optimizing paradigm for generating high-performance attention operators in attention-centric algorithms.

(2) We present an automated workflow that enables LLMs to leverage LLM-TL to implement high-performance FlashAttention on diverse GPUs, which extends the capabilities of LLMs.

(3) Verified on A100, RTX8000, and T4 GPUs, the performance of FlashAttention implementation generated by our methods significantly outshines that of vanilla large language models (LLMs), achieving a speed-up of up to 35.16×, and also outperforms with cuDNN or official implementation in most cases. Moreover, the development time also be reduced from months to minutes compared with human experts.

2 Preliminary

2.1 GPU Characteristics

The rapid development of AI is closely tied to the advancement of GPU’s high parallel computing power. GPUs achieve high parallelism by stacking a large number of simple computation units. They use the SIMT (Single Instruction, Multiple
Threads) design, which allows for the execution of many threads running the same code. The introduction to the GPU architecture is illustrated in Figure 2.

2.1.1 Memory Hierarchy

The memory hierarchy of GPUs is divided into global memory, shared memory, and registers. Global memory is shared by all threads, shared memory is shared by threads within the same thread block, and each thread has its own private registers. Due to this hierarchical memory structure, explicit management of data movement between different memory levels is required during programming. Data stored in registers can be directly accessed for fast computations, such as General Matrix Multiplication (GEMM).

2.1.2 Computation Unit

To get better performance on GPU, we use Tensor Core (Markidis et al., 2018), which is a specialized processing unit optimized for matrix operations. Unlike standard CUDA Cores, Tensor Cores use the warp (a cluster of 32 threads) as the basic computing unit, enabling efficient register data utilization and coordination among threads within a warp. Due to the design characteristics of Tensor Cores, operators can more fully utilize register resources within threads, which provides better hardware support for operator fusion optimization.

The efficient utilization of Tensor Core typically requires direct manipulation of the CUDA PTX instruction set, a low-level programming approach closer to assembly language, involving numerous complex index calculations. To simplify such process, NVIDIA introduced CuTe (NVIDIA/CUTLASS, 2023), an advanced template library which encapsulate the underlying PTX instructions through a high-level abstraction layer and automate index calculations. Compared to PTX, CuTe provides a more user-friendly and efficient programming support for automatic generation.

Based on these characteristics of GPUs, we abstract the execution flow of operators into two basic types of operations: data movement statement (describing the transfer of data between different memory levels) and computation statement (describing computing operations), thereby clearly delineating the execution process of operators on GPUs.

![Demonstration of GPU architecture.](page_1047_153_367_246.png)

Figure 2: Demonstration of GPU architecture.

2.2 Attention Operators and acceleration

The Attention mechanism computes relevance weights among input elements to focus on key information for effective feature extraction and integration. The input consists of sequences \( Q, K, V \) of dimension \( d \) and number of tokens \( N \). The attention mechanism computes the output using the formula
\[
\text{Attention}(Q, K, V) = \text{Softmax}(\text{Mask}(\frac{QK^T}{\sqrt{d}}))V.
\]
In addition to the early Multi-Head Attention (MHA) (Vaswani et al., 2017), recent advancements have introduced Multi-Query Attention (MQA) (Shazeer, 2019) and Group-Query Attention (GQA) (Ainslie et al., 2023). Furthermore, DeepSeek recently proposed a new attention variant called Multi-Head Latent Attention (MLA) (DeepSeek-AI et al., 2024a). These attention variants use fewer key/value heads or employ low-rank joint compression for keys and values. As a result, they significantly reduce the KV cache size, and are therefore widely adopted in contemporary LLMs.

To enhance the efficiency of attention operators, numerous optimization methods have emerged. FlashAttention (Dao et al., 2022; Dao, 2024) is a prominent example of optimizing the attention operator on GPUs. However, the implementation of high-performance attention operators like FlashAttention is often highly complex, requiring extensive low-level optimizations, precise computational scheduling, and facing significant challenges in operator fusion. Additionally, the programming model for GPU hardware, particularly Tensor Cores, is inherently complex, demanding developers to have a deep understanding of its architectural characteristics. As a result, the development and application of attention operators still encounter substantial technical challenges.
Figure 3: LLM-TL overview. We design the Thinking Language (TL) to help LLMs describe attention execution workflows and parameters on GPUs. Our approach consists of two stages, TL Code Generation and Translation. The TL Sketch, representing abstract semantic execution flow, is initially generated from user requirements. Subsequently, the LLM infers the parameter details of the statements within the Sketch. Finally, TL code will be translated to the CuTe implementation by LLMs based on GPU specification.

3 Method

LLM-TL solely incorporates statements that delineate the processing flow of attention and the essential parameters required, thereby enabling the reduction of hundreds of lines of low-level CUDA code to a mere dozen lines of TL code. This simplification empowers Large Language Models (LLMs) to comprehend and implement high-performance optimizations of attention operators on GPUs, encompassing fusion and computational tensorization. We introduce the workflow of TL code generation and adaptive translation from TL code to lower-level CuTe code in the following subsections, as shown in Figure 3.

3.1 LLM-friendly Thinking Language (LLM-TL) Definition

To assist LLMs in generating code more effectively, we abstract the execution process on GPUs into two types of statements: Copy for memory access and Compute for various types of computations. These statements are used to represent the execution flow and parameter details of attention operators on GPUs. By summarizing GPU characteristics into semantic-level descriptions and hiding unnecessary details, TL can be better leveraged through the generalization and semantic understanding capabilities of LLMs.

3.2 TL Code Generation

Specifically, the generation of TL Code is divided into two steps: first, describe the execution flow of attention into a TL Sketch containing computation and memory access statements, and then analysis and reason to supplement detailed statement parameters, ultimately producing a complete TL Code.

3.2.1 Sketch Generation

To facilitate the gradual understanding of GPU hardware architecture and attention operator characteristics by LLMs, we first drive LLMs to generate the execution flow of the attention operator into a semantically structured representation, TL Sketch, which consists of two fundamental statements: Compute and Copy hierarchies according to the algorithm’s execution flow. Due to the various attention operator variants and GPUs, it is necessary to abstract high-level semantics of the attention execution on general GPU architecture to make the LLMs generate optimization logic. Thus, inspired by concepts from computer architecture, we design efficient statements, copy and compute, for two purposes: comprehensively capture the semantic-level optimization logic (multi-level memory data movement and GPU computation units utilization) and effectively hide low-level implementation details.

Specifically, for Copy statements, LLMs use
Copy to describe the movement of tensors between different memory hierarchies (global memory, shared memory, and registers). For example, the clause Copy Q from global to shared indicates loading Q from global memory into shared memory. For Compute statements, LLMs can represent necessary internal computations (such as GEMM, arithmetic operations, etc.) on the corresponding tensors. Based on TL statements, LLM can incorporate GPU hardware features to optimize attention execution at a semantical level, like representing the fusion optimization by continuously arranging multiple Compute at the same memory hierarchy without any Copy.

3.2.2 Parameter Analysis and Reasoning
TL Sketch can describe the execution flow of the attention operator on GPUs at a semantic level, but it lacks the details information needed to generate executable code. For Copy statement, it requires address allocation behavior and parameters like block dim to specify the transfer size; while for compute, it needs parameters to specify the computation layout and sometimes conduct reshape operations to connect adjacent computations to achieve fusion.

Based on the above summary, we leverage the reasoning capabilities of LLMs to supplement the parameter details required for Copy and Compute statements in the TL Sketch, such as block sizes and shape transformation information, to obtain the final TL-code. Taking the FlashAttention operator as an example, each thread block loads a fixed batch and head of Q with dimensions (BM,HeadDim), where BM represents the block size of the query sequence length, and HeadDim denotes the dimensionality of a single head in multi-head attention (MHA). At this point, the Copy statement for Q is expanded to Copy Q (BM, HeadDim) in coor [L = block_idx] from global to shared memory, where block_idx denotes the block index in CUDA programme, adding the location and size information of Q in global memory. To fuse two consecutive GEMM operations at the register level, a reshape statement is required to perform shape inference for both GEMM operations. Then a reshape statement is introduced, specifically reshape rS from mma_C to mma_A\textsuperscript{1}, to facilitate the transformation and alignment of data structures between the matrix multiplication operations.

![The content within the dashed box illustrates the generation process from a Copy statement in TL Sketch to CuTe Code.](page_749_186_355_246.png)

Figure 4: The content within the dashed box illustrates the generation process from a Copy statement in TL Sketch to CuTe Code.

3.3 TL Code Translation

3.3.1 CuTe Framework
We employ the CuTe framework to implement the final GPU code, aiming to simultaneously balance the high performance of GPU computing and the reliability of code generation by LLMs. The CuTe framework significantly enhances the semantic expressiveness of the code by providing high-level abstractions over fundamental Tensor Core operations (such as the matrix multiply-accumulate instruction mma and the matrix load instruction ldmatrix). In CuTe, assembly-level PTX mma instructions are encapsulated into corresponding classes, which include parameters such as computation scale and data types, while also reducing the need for index calculations. This strategy endows CuTe with a richer semantic hierarchy compared to native Tensor Core instruction programming and can fully leverage the strengths of LLMs in semantic understanding and logical reasoning. For some of the newer architectures, CuTe may not include the corresponding MMA APIs. However, due to their relatively fixed structure, we can quite easily prompt the LLM to generate the corresponding MMA through few-shot learning.

3.3.2 Adaptive Translation
Based on the TL Code, which contains comprehensive attention operator execution details, each statement can be accurately translated into the corresponding CuTe code. Thanks to the decoupling feature of our TL design, each statement can be fully and precisely translated into executable CuTe code, ensuring a smooth transition from high-level specifications to low-level implementations. Tak-

\footnotetext{1Tensor Cores use mma (matrix multiply-accumulate) instructions to achieve , where matrices A, B, and C need to follow hardware-defined layouts. Here the mma_A and mma_C represent the corresponding layout of each tensor tile.}
ing the TL Code as input, we provide the necessary execution information, such as CuTe MMA Atom and Copy Atom, for the specific hardware architecture in the prompt. By combining these two parts, we can achieve the translation of TL Code across multiple platforms. For instance, an allocate operation before Copy in the TL Code can be implemented using CuTe’s APIs for tensor definitions across various memory hierarchies (such as global memory, shared memory, and registers), in conjunction with the parameter information provided in the TL Code. Similarly, a Copy statement can be realized through CuTe’s definitions of source and destination memory (including caches or registers), along with the cute::copy API and other related code blocks. Figure 4 shows some details of how to generate the final CuTe code for a Copy statement.

4 Evaluation

4.1 Experiment Setup

To validate the performance of the attention operator implementation generated by LLMs through LLM-TL, we conduct comprehensive evaluation across different GPU platforms, distinct LLMs, and attention variants. Additional experiments are shown in Appendix A due to space limitations.

GPU platforms. LLM-TL is test on GPUs with different architectures, including NVIDIA Ampere (A100) and Turing (RTX8000, T4) architecture.

LLMs. The proposed framework is validated on four SOTA LLMs, including the closed-source models of GPT-4o (OpenAI, 2024) and Claude 3.5 sonnet (Claude3.5, 2024), as well as the open-source models of DeepSeek-V3 (DeepSeek-AI et al., 2024b) and DeepSeek-R1 (DeepSeek-AI et al., 2025).

Attention variants. Experiments are conducted on attention mechanisms commonly used by current LLMs, including MHA (GPT-style models), GQA (Llama 3.1 (Llama3.1, 2024), Qwen2.5 (Yang et al., 2025)), MQA (Falcon (Almazrouei et al., 2023), StarCoder (Li et al., 2023)), and MLA (DeepSeek-V2, DeepSeek-V3).

Comparison Baselines. Implementation generated by our approach is compared with FlashAttention official library (v2.7.3 on A100 and v1.0.9 on RTX8000, as FlashAttention v2 is not available on Turing architecture), NVIDIA official deep learning library cuDNN (Chetlur et al., 2014), FlexAttention official library (Dong et al., 2024),

Benchmark setting. We followed the settings in the FlashAttention(Dao et al., 2022; Dao, 2024), the sequence length varies from 512, 1k, ..., 16k, and the batch size is adjusted such that the total number of tokens remains 16k. We set the hidden dimension to 2048, and the head dimension to be either 64 or 128 (i.e., 32 heads or 16 heads). The FLOPs are calculated as: \( 4 * \text{seqlen}^2 * \text{head dimension} * \text{number of heads} \). For MLA, we utilize the dimensions specified in DeepSeek-V3, which consist of an embedding dimension of 128 and a RoPE dimension of 64. We also test attention variants with and without causal masks.

4.2 Overall Performance

Table 1 demonstrates LLM-TL’s performance across GPU architectures and common attention operators, while Table 2 specifically evaluates the novel MLA operator. The results demonstrate LLM-TL’s capability to empower DeepSeek-V3 in generating high-performance implementations for diverse attention operators across GPU platforms.

Consistent superiority compared with vanilla LLM. LLM-TL achieves consistent superiority over vanilla LLM implementations across all tested scenarios (GPUs, operators, dimensions, and causal masking configurations), with peak speedups reaching 35.16× in common attention operators and 9.41× in MLA. Notably, vanilla LLM-generated implementations even trigger out-of-memory (OOM) errors at large sequence lengths. The results show our method can implement fused attention operators with less memory resource requirement and higher computation efficiency.

Competitive or superior performance compared with SOTA handcrafted libraries. LLM-TL, which requires substantially lower development effort, demonstrates superior performance on the novel MLA operator with 2.15× speedup (175.9 vs 81.7 TFLOPS) against SOTA handcrafted library, cuDNN, while achieving comparable or better performance even on established attention operators (like MHA, GQA and MQA) well-supported by existing optimized libraries. Besides, our method maintains performance advantages over handcrafted libraries under real-world LLM-scale attention workloads (Appendix C), demonstrating strong generalizability and practical applicability in production environments.

Generality across multiple generations of GPUs. LLM-TL demonstrates broad generality, being applicable to a wide range of GPUs, from
<table>
  <tr>
    <th rowspan="2">Head Dimension</th>
    <th colspan="8">64</th>
    <th colspan="8">128</th>
  </tr>
  <tr>
    <th>Sequence Length</th>
    <th>512</th>
    <th>1k</th>
    <th>2k</th>
    <th>4k</th>
    <th>8k</th>
    <th>16k</th>
    <th>512</th>
    <th>1k</th>
    <th>2k</th>
    <th>4k</th>
    <th>8k</th>
    <th>16k</th>
  </tr>
  <tr>
    <td rowspan="7">A100</td>
    <td>cuDNN</td>
    <td>95.3</td><td>124.4</td><td>143.7</td><td>152.4</td><td>168.2</td><td>172.5</td><td>106.1</td><td>135.4</td><td>153.5</td><td>165.3</td><td>177.8</td><td>186.3</td>
  </tr>
  <tr>
    <td>MHA<br>FlexAttention<br>w/ flash-attn v2<br>casual<br>DeepSeek-V3<br>mask<br>DeepSeek-V3 + Ours</td>
    <td>84.4<br>107.4<br>123.7<br>146.5<br>158.5<br>172.4<br>180.8<br>115.3<br>143.6<br>163.8<br>176.9<br>183.3<br>195.1</td>
  </tr>
  <tr>
    <td>7.6<br>7.7<br>7.5<br>6.7<br>7.5<br>7.7<br>7.7<br>14.3<br>14.9<br>10.7<br>12.9<br>14.5<br>14.9</td>
  </tr>
  <tr>
    <td>141.3x<br>117.4x<br>28.1x<br>24.3x<br>23.6x<br>34.9x</td>
  </tr>
  <tr>
    <td>QQA<br>FlexAttention<br>w/ flash-attn v2<br>casual<br>DeepSeek-V3<br>mask<br>DeepSeek-V3 + Ours</td>
    <td>95.5<br>85.6<br>108.3<br>124.1<br>133.7<br>146.4<br>155.2<br>81.8<br>106.6<br>125.4<br>138.4<br>153.3<br>161.1</td>
  </tr>
  <tr>
    <td>5.4<br>5.6<br>4.4<br>5.1<br>5.5<br>6.8<br>10.5<br>10.8<br>8.5<br>9.9<br>10.9<br>11.4</td>
  </tr>
  <tr>
    <td>119.8x<br>123.8x<br>35.16x<br>32.1x<br>32.69x<br>37.24x<br>112.4x<br>114.8x<br>119.71x<br>117.73x<br>116.92x<br>117.16x</td>
  </tr>
  <tr>
    <td rowspan="7">RTX8000</td>
    <td>cuDNN</td>
    <td>95.1<br>125.4<br>143.6<br>152.8<br>163.4<br>172.7<br>108.8<br>136.2<br>154.3<br>165.6<br>178.7<br>185.5</td>
  </tr>
  <tr>
    <td>MHA<br>FlexAttention<br>w/ flash-attn v1<br>casual<br>DeepSeek-V3<br>mask<br>DeepSeek-V3 + Ours</td>
    <td>85.9<br>108.4<br>124.1<br>133.9<br>146.4<br>154.7<br>158.7<br>109.2<br>129.5<br>151.6<br>161.6<br>168.8</td>
  </tr>
  <tr>
    <td>7.7<br>8.1<br>5.8<br>6.9<br>7.5<br>7.7<br>14.7<br>15.1<br>10.9<br>13.2<br>14.7<br>15.1</td>
  </tr>
  <tr>
    <td>107.6<br>134.8<br>155.4<br>163.7<br>179.2<br>186.9<br>131.1<br>153.6<br>167.7<br>175.8<br>183.9<br>193.4</td>
  </tr>
  <tr>
    <td>139.7x<br>116.6x<br>26.79x<br>23.72x<br>23.89x<br>24.27x<br>8.92x<br>10.17x<br>15.39x<br>13.32x<br>12.51x<br>12.81x</td>
  </tr>
  <tr>
    <td>cuDNN</td>
    <td>21.4<br>25.7<br>28.7<br>31.2<br>32.7<br>33.5<br>20.9<br>25.0<br>28.5<br>31.1<br>32.1<br>32.3</td>
  </tr>
  <tr>
    <td>MHA<br>FlexAttention<br>w/ flash-attn v1<br>casual<br>DeepSeek-V3<br>mask<br>DeepSeek-V3 + Ours</td>
    <td>30.4<br>34.5<br>39.7<br>43.9<br>46.6<br>47.7<br>20.9<br>24.5<br>28.7<br>31.6<br>33.7<br>34.1</td>
  </tr>
  <tr>
    <td>18.1<br>17.9<br>24.3<br>26.8<br>31.1<br>33.7<br>11.7<br>16.8<br>18.4<br>19.1<br>21.5<br>21.9</td>
  </tr>
  <tr>
    <td>2.6<br>2.5<br>1.9<br>2.4<br>2.6<br>2.0M<br>5.1<br>5.3<br>3.9<br>4.1<br>4.8<br>4.8</td>
  </tr>
  <tr>
    <td>83.1x<br>111.8x<br>91.95x<br>118.1x<br>118.3x<br>118.3x</td>
  </tr>
  <tr>
    <td>cuDNN</td>
    <td>21.5<br>26.5<br>28.9<br>31.2<br>32.5<br>32.9<br>20.4<br>23.1<br>28.1<br>30.4<br>32.3<br>32.3</td>
  </tr>
  <tr>
    <td>MQA<br>FlexAttention<br>w/ flash-attn v1<br>casual<br>DeepSeek-V3<br>mask<br>DeepSeek-V3 + Ours</td>
    <td>30.6<br>34.3<br>39.6<br>44.2<br>46.9<br>47.8<br>20.9<br>24.3<br>28.7<br>31.8<br>33.6<br>34.2</td>
  </tr>
  <tr>
    <td>18.1<br>18.1<br>24.4<br>28.4<br>31.4<br>33.7<br>11.9<br>16.8<br>18.8<br>19.1<br>21.0<br>21.9</td>
  </tr>
  <tr>
    <td>2.1<br>2.2<br>1.7<br>1.9<br>2.2<br>2.0M<br>4.2<br>4.3<br>3.4<br>3.9<br>4.2<br>4.0</td>
  </tr>
  <tr>
    <td>21.6<br>28.6<br>39.5<br>42.4<br>47.9<br>50.4<br>25.9<br>31.5<br>36.4<br>40.7<br>44.6<br>45.5</td>
  </tr>
  <tr>
    <td>110.2x<br>130.0x<br>232.2x<br>212.3x<br>217.7x</td>
  </tr>
  <tr>
    <td>cuDNN</td>
    <td>21.8<br>26.3<br>30.2<br>31.7<br>32.7<br>33.1<br>20.5<br>25.4<br>29.3<br>30.9<br>31.6<br>31.9</td>
  </tr>
  <tr>
    <td>MQA<br>FlexAttention<br>w/ flash-attn v1<br>casual<br>DeepSeek-V3<br>mask<br>DeepSeek-V3 + Ours</td>
    <td>30.7<br>34.5<br>39.8<br>44.5<br>46.8<br>47.5<br>20.2<br>23.9<br>28.5<br>32.4<br>33.8<br>34.4</td>
  </tr>
  <tr>
    <td>18.1<br>18.3<br>25.4<br>30.1<br>31.2<br>34.2<br>11.9<br>16.8<br>18.8<br>19.1<br>21.2<br>22.0</td>
  </tr>
  <tr>
    <td>2.6<br>2.6<br>1.9<br>2.5<br>2.7<br>2.0M<br>5.1<br>5.3<br>4.1<br>4.5<br>5.1<br>5.9</td>
  </tr>
  <tr>
    <td>22.1<br>29.8<br>39.1<br>43.3<br>47.8<br>50.6<br>26.1<br>32.5<br>36.4<br>40.7<br>43.7<br>45.1</td>
  </tr>
  <tr>
    <td>158.0x<br>111.6x<br>208.5x<br>171.5x<br>208.2x</td>
  </tr>
  <tr>
    <td>cuDNN</td>
    <td>153.0<br>158.8<br>172.4<br>175.5<br>184.1<br>186.2<br>172.4<br>184.2<br>190.0<br>196.5<br>206.9<br>212.0</td>
  </tr>
  <tr>
    <td>MHA<br>FlexAttention<br>w/ flash-attn v2<br>casual<br>DeepSeek-V3<br>mask<br>DeepSeek-V3 + Ours</td>
    <td>145.8<br>155.9<br>162.5<br>168.4<br>177.2<br>179.9<br>119.7<br>134.8<br>143.2<br>152.4<br>158.6<br>163.7</td>
  </tr>
  <tr>
    <td>147.5<br>161.1<br>171.1<br>176.8<br>185.8<br>190.6<br>208.1<br>208.1<br>208.2<br>210.5<br>211.4<br>223.6</td>
  </tr>
  <tr>
    <td>28.9<br>29.6<br>28.2<br>28.5<br>28.5<br>29.6<br>51.6<br>54.5<br>52.4<br>52.6<br>54.7<br>56.6</td>
  </tr>
  <tr>
    <td>164.0<br>175.6<br>181.8<br>191.0<br>200.6<br>201.8<br>176.2<br>194.1<br>201.1<br>205.6<br>206.6<br>207.2</td>
  </tr>
  <tr>
    <td>55.6x<br>59.5x<br>64.5x<br>67.0x<br>70.3x<br>68.2x<br>3.41x<br>3.56x<br>3.84x<br>3.91x<br>3.81x<br>3.73x</td>
  </tr>
  <tr>
    <td rowspan="7">A100</td>
    <td>cuDNN</td>
    <td>148.8<br>159.1<br>164.3<br>172.3<br>180.5<br>186.7<br>172.3<br>183.5<br>189.6<br>193.6<br>206.9<br>211.1</td>
  </tr>
  <tr>
    <td>MQA<br>FlexAttention<br>w/ flash-attn v2<br>casual<br>DeepSeek-V3<br>mask<br>DeepSeek-V3 + Ours</td>
    <td>146.2<br>156.3<br>161.6<br>172.8<br>176.9<br>180.5<br>121.1<br>135.1<br>143.5<br>155.2<br>160.5<br>165.5</td>
  </tr>
  <tr>
    <td>148.4<br>161.2<br>168.5<br>175.7<br>186.8<br>190.1<br>176.9<br>192.5<br>200.0<br>210.4<br>218.4<br>223.8</td>
  </tr>
  <tr>
    <td>14.3<br>14.8<br>17.1<br>13.4<br>14.9<br>19.8<br>27.5<br>28.7<br>23.1<br>26.1<br>29.1<br>30.8</td>
  </tr>
  <tr>
    <td>156.8<br>164.9<br>177.4<br>189.9<br>190.1<br>192.7<br>169.2<br>180.4<br>191.4<br>197.8<br>206.9<br>208.9</td>
  </tr>
  <tr>
    <td>156.5<br>168.4<br>176.8<br>186.7<br>196.7<br>201.2<br>169.2<br>180.5<br>187.6<br>197.9<br>204.6<br>207.8</td>
  </tr>
  <tr>
    <td>53.6x<br>54.9x<br>88.8x<br>73.5x<br>67.6x<br>66.6x<br>3.13x<br>3.21x<br>4.89x<br>4.05x<br>3.68x<br>3.53x</td>
  </tr>
  <tr>
    <td rowspan="7">RTX8000</td>
    <td>cuDNN</td>
    <td>29.2<br>32.2<br>33.4<br>33.6<br>33.7<br>33.4<br>26.5<br>30.9<br>32.2<br>32.6<br>32.8<br>32.6</td>
  </tr>
  <tr>
    <td>MHA<br>FlexAttention<br>w/ flash-attn v2<br>casual<br>DeepSeek-V3<br>mask<br>DeepSeek-V3 + Ours</td>
    <td>40.5<br>44.7<br>47.5<br>49.4<br>50.1<br>50.4<br>29.4<br>32.5<br>33.2<br>34.7<br>35.3<br>35.5</td>
  </tr>
  <tr>
    <td>28.5<br>25.9<br>34.3<br>35.1<br>35.4<br>36.2<br>17.2<br>20.4<br>21.2<br>21.0<br>22.0<br>22.4</td>
  </tr>
  <tr>
    <td>8.3<br>8.5<br>6.6<br>8.4<br>9.3<br>8.9<br>15.7<br>16.6<br>13.4<br>16.1<br>17.9<br>15.7</td>
  </tr>
  <tr>
    <td>34.5<br>40.5<br>44.1<br>45.9<br>45.5<br>46.2<br>38.5<br>42.9<br>44.1<br>45.8<br>44.4<br>48.9</td>
  </tr>
  <tr>
    <td>41.4x<br>47.6x<br>76.7x<br>54.6x<br>41.8x<br>50.0x<br>2.45x<br>2.58x<br>2.58x<br>3.35x<br>2.78x<br>2.48x</td>
  </tr>
  <tr>
    <td>5.94x<br>7.71x<br>19.98x<br>78.90x<br>78.33x</td>
  </tr>
  <tr>
    <td>cuDNN</td>
    <td>26.8<br>31.2<br>32.1<br>32.9<br>33.7<br>33.8<br>26.3<br>29.7<br>32.1<br>32.6<br>33.1<br>32.8</td>
  </tr>
  <tr>
    <td>MQA<br>FlexAttention<br>w/ flash-attn v1<br>casual<br>DeepSeek-V3<br>mask<br>DeepSeek-V3 + Ours</td>
    <td>39.2<br>43.9<br>47.3<br>49.4<br>49.8<br>50.2<br>29.4<br>32.7<br>33.4<br>34.9<br>35.2<br>35.1</td>
  </tr>
  <tr>
    <td>28.9<br>26.5<br>33.7<br>35.7<br>35.8<br>37.1<br>17.4<br>20.5<br>21.1<br>21.1<br>22.1<br>22.5</td>
  </tr>
  <tr>
    <td>8.6<br>8.6<br>6.6<br>8.4<br>9.3<br>8.9<br>15.7<br>16.6<br>13.4<br>16.1<br>17.9<br>15.7</td>
  </tr>
  <tr>
    <td>29.8<br>39.1<br>44.4<br>45.3<br>45.8<br>45.9<br>36.5<br>41.6<br>43.4<br>44.9<br>44.8<br>45.1</td>
  </tr>
  <tr>
    <td>13.47x<br>14.55x<br>16.73x<br>15.39x<br>14.92x</td>
  </tr>
  <tr>
    <td>cuDNN</td>
    <td>27.2<br>31.1<br>32.6<br>33.4<br>33.8<br>34.1<br>25.1<br>29.3<br>31.2<br>32.4<br>32.9<br>32.5</td>
  </tr>
  <tr>
    <td>MQA<br>FlexAttention<br>w/ flash-attn v1<br>casual<br>DeepSeek-V3<br>mask<br>DeepSeek-V3 + Ours</td>
    <td>39.4<br>44.1<br>46.7<br>49.3<br>49.6<br>50.2<br>29.4<br>32.7<br>33.4<br>34.9<br>35.2<br>35.3</td>
  </tr>
  <tr>
    <td>28.6<br>26.2<br>34.5<br>35.7<br>35.7<br>37.2<br>17.4<br>20.5<br>21.3<br>21.1<br>22.1<br>22.4</td>
  </tr>
  <tr>
    <td>8.6<br>8.6<br>6.6<br>8.4<br>9.3<br>8.9<br>15.7<br>16.6<br>13.4<br>16.1<br>17.9<br>15.7</td>
  </tr>
  <tr>
    <td>34.5<br>40.5<br>44.1<br>45.9<br>45.5<br>46.2<br>38.5<br>42.9<br>44.1<br>45.8<br>44.4<br>48.9</td>
  </tr>
  <tr>
    <td>13.47x<br>14.55x<br>16.73x<br>15.39x<br>14.92x</td>
  </tr>
</table>

Table 1: Performance (TFLOPS) comparison across different sequence length, attention operators, GPUs, and the presence or absence of causal masks. OOM means out of memory.
the newer Ampere architecture to the older Turing architecture, the latter of which is not supported by official FlashAttention v2. This highlights LLM-TL’s generality to reduce development overhead for operators across different GPU generations.

Outstanding performance in long-context scenarios with causal mask. LLM-TL performs exceptionally well in long-context scenarios, particularly when using a causal mask that is commonly employed in modern decoder-only LLMs (34.94× speedup on 16k tokens on A100). Our method’s efficient long-context sequences processing with causal mask offers a critical advantage in modern LLMs development.

<table>
  <tr>
    <th>Sequence Length</th>
    <th>512</th>
    <th>1k</th>
    <th>2k</th>
    <th>4k</th>
    <th>8k</th>
    <th>16k</th>
  </tr>
  <tr>
    <td>torch</td>
    <td>22.9</td>
    <td>28.7</td>
    <td>21.7</td>
    <td>26.7</td>
    <td>32.9</td>
    <td>35.1</td>
  </tr>
  <tr>
    <td>cuDNN</td>
    <td>35.5</td>
    <td>48.6</td>
    <td>61.1</td>
    <td>70.3</td>
    <td>77.3</td>
    <td>81.7</td>
  </tr>
  <tr>
    <td>DeepSeek-V3</td>
    <td>17.7</td>
    <td>18.5</td>
    <td>13.5</td>
    <td>16.1</td>
    <td>18.2</td>
    <td>18.7</td>
  </tr>
  <tr>
    <td>DeepSeek-V3 + Ours</td>
    <td><b>50.6</b></td>
    <td><b>78.6</b></td>
    <td><b>108.2</b></td>
    <td><b>138.6</b></td>
    <td><b>164.3</b></td>
    <td><b>175.9</b></td>
  </tr>
  <tr>
    <td colspan="7">12.86x *4.25x *8.01x *18.61x *9.03x *9.41x</td>
  </tr>
</table>

Table 2: Performance (TFLOPS) comparison of MLA with causal mask and head dimension 128 on A100 GPU. The MLA configuration parameters and “torch” implementation are extracted from the DeepSeek-V3 open-source code.

<table>
  <tr>
    <th>LLM-TL</th>
    <th>Seq = 4k</th>
    <th>Seq = 8k</th>
    <th>Seq = 16k</th>
  </tr>
  <tr>
    <td>w/ GPT-4o</td>
    <td>-</td>
    <td>-</td>
    <td>-</td>
  </tr>
  <tr>
    <td>w/ GPT-4o + DeepSeek-V3</td>
    <td>165.5</td>
    <td>171.9</td>
    <td>178.5</td>
  </tr>
  <tr>
    <td>w/ Claude 3.5</td>
    <td>175.2</td>
    <td>179.4</td>
    <td>181.3</td>
  </tr>
  <tr>
    <td>w/ DeepSeek-V3</td>
    <td>175.5</td>
    <td>179.3</td>
    <td>185.5</td>
  </tr>
  <tr>
    <td>w/ DeepSeek-R1</td>
    <td>176.2</td>
    <td>184.9</td>
    <td>194.7</td>
  </tr>
</table>

Table 3: Performance (TFLOPS) comparison of MHA with causal mask and head dimension 128 generated by our methods with different LLMs on A100 GPU.

<table>
  <tr>
    <th></th>
    <th>Time</th>
    <th>TFLOPS</th>
  </tr>
  <tr>
    <td>Human Expert</td>
    <td>~ months</td>
    <td>162.7</td>
  </tr>
  <tr>
    <td>LLM-TL</td>
    <td>10 mins</td>
    <td>175.6</td>
  </tr>
</table>

Table 4: Comparison of MHA development cost with human expert on A100 GPU under the configuration of head dimension 64, sequence length 1024.

Impact on Development Cost. Table 4 compares the development costs and performance between LLM-TL and human Expert implementing attention operators on A100 GPU, which both utilize CuTe to achieve better performance. Results demonstrate that LLM-TL not only reduces development time from months to minutes (a thousandfold reduction) but also achieves modest performance improvements.

Impact on TL Designation. To validate the necessity of hierarchical generation in LLM-TL design (first TL sketch then TL code), we design an ablation experiment to make LLMs directly output TL code. The results demonstrate that none of the existing LLMs is capable of generating entirely correct TL code in a single stage, and representative errors are like Reshape omission when generating fused computation and GEMM layout error. For more details refer to Appendix B.

4.3 Ablation

Impact of Different LLMs. To demonstrate the robustness of LLM-TL, we conduct ablation experiments on various mainstream LLMs, including GPT-4o, Claude 3.5, DeepSeek-V3 and DeepSeek-R1, as shown in Table 3. After applying LLM-TL, nearly all LLMs can generate high-performance attention operators, which shows the strong versatility of our method. Notably, DeepSeek-R1 achieves the highest performance, while GPT-4o struggles to translate correct CuTe code, potentially due to limitations in its training corpus (GPT-4o is the earliest one within these LLMs). However, it can still generate the TL Code, while the backend translation is handled by DeepSeek-V3.

Impact of Different Prompts. To demonstrate the efficacy of LLM-TL, we compare its performance with other LLMs using CoT for CUDA-based attention operator generation (notably, vanilla DeepSeek-V3 in Table 1 utilizes Torch). Results in Table 5 demonstrate that while LLMs with CoT can only generate basic CUDA implementation, LLM-TL produces high-performance implementations based on CuTe. Performance evaluation reveals that LLM-TL achieves up to 895× speedup compared to CoT.

<table>
  <tr>
    <th>Sequence Length</th>
    <th>512</th>
    <th>1k</th>
    <th>2k</th>
  </tr>
  <tr>
    <td>DeepSeek-V3</td>
    <td>0.02</td>
    <td>0.004</td>
    <td>-</td>
  </tr>
  <tr>
    <td>+ CoT</td>
    <td>0.12</td>
    <td>0.27</td>
    <td>0.52</td>
  </tr>
  <tr>
    <td>+ LLM-TL</td>
    <td>107.4</td>
    <td>134.6</td>
    <td>154.7</td>
  </tr>
</table>

Table 5: CUDA implementation performance (TFLOPS) comparison of MHA with causal mask and head dimension 64 on A100 GPUs between CoT and our method.

4.4 Case Study

To demonstrate the generality of LLM-TL, we validate our approach under two extra scenarios, 1) FP8-compatible MHA operator (unsupported by other libraries), and 2) T4 GPU-compatible attention operators. Results in Table 6 and Table 7 in
<table>
  <tr>
    <th>Sequence Length</th>
    <th>512</th>
    <th>1k</th>
    <th>2k</th>
    <th>4k</th>
    <th>8k</th>
    <th>16k</th>
  </tr>
  <tr>
    <th>Performance</th>
    <td>224.8</td>
    <td>241.1</td>
    <td>248.3</td>
    <td>254.6</td>
    <td>255.1</td>
    <td>257.9</td>
  </tr>
</table>

Table 6: Performance (TFLOPS) of MHA with causal mask on L40S GPU using LLM-TL under the configuration of head dimension 128, FP8 datatype.

Appendix show that LLMs leveraging LLM-TL successfully generated high-performance attention operator implementations.

5 Conclusion

In this paper, we propose a novel framework called LLM-TL to systematically unlocks LLMs’ potential for high-performance attention operator generation. Extensive experiments identify that LLM-TL enables LLMs to fully understand algorithm-hardware execution flows via TL-code and adapt across GPU architectures through TL-code translation. The results show that the code generated through LLM-TL could outperform hand-optimized libraries crafted by human experts while reducing months development time to minutes. In summary, LLM-TL not only extends the capacities of LLMs on complex code optimization, but also achieves a self-optimizing paradigm for generating high-performance attention operators in attention-centric algorithms.

Limitations

Our proposed LLM-TL and its corresponding workflow enable LLMs to comprehend and generate high-performance attention operator implementations across various GPUs. Compared to vanilla LLMs, this approach demonstrates significant performance improvements, achieving results that are comparable to or surpass those of state-of-the-art handcrafted libraries. However, our method does have some limitations.

Due to resource constraints, although we conducted extensive experiments across multiple generations of GPUs, testing on the latest H100 was not performed. Additionally, while LLM-TL and its workflow are designed to be generalizable to complex operators on GPUs, we did not further evaluate its applicability to other types of operators, given that FlashAttention has been a highly complex and widely used operator already.

To address these limitations, our future work will focus on extending LLM-TL to GPUs with newer architectures and applying it to a broader range of complex operators.

6 Ackowledgement

This work is partially supported by the Strategic Priority Research Program of the Chinese Academy of Sciences (Grants No.XDB0660300, XDB0660301, XDB0660302), the NSF of China (Grants No.62525203, 92364202, U22A2028, 62302483), Major Program of ISCAS (Grant No. ISCAS.ZD-202402), CAS Project for Young Scientists in Basic Research (YSBR-029) and Youth Innovation Promotion Association CAS.

Ethics Statement

This research on generating high-performance attention operators using LLMs considers ethical implications, including bias, misuse, and societal impact. We emphasize transparency, responsible data practices, and encourage ethical deployment of AI in software engineering.

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Jingyang Yuan, Huazuo Gao, Damai Dai, Junyu Luo, Liang Zhao, Zhengyan Zhang, Zhenda Xie, YX Wei, Lean Wang, Zhiping Xiao, et al. 2025. Native sparse attention: Hardware-aligned and natively trainable sparse attention. arXiv preprint arXiv:2502.11089.

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A Additional Evaluations

We further conduct extensive experiments across various NVIDIA hardware architectures to validate the robustness and scalability of our proposed method. Comparing our automatically generated code with three implementations on T4 GPU. The experimental results, as presented in Table 7, demonstrate that the code generated by our method consistently achieves superior performance metrics compared to all four implementations. This performance advantage is maintained across all evaluated dimensions, indicating the robustness and effectiveness of our approach on the NVIDIA T4 GPU architecture.

Moreover, we extend our experiments to assess the applicability of our method on alternative attention mechanisms, NSA(Yuan et al., 2025). The results, summarized in Table 9, show that our approach maintains its performance advantage when applied to these attention variants. For NSA, the automatically generated code consistently outperforms manually optimized baselines in terms of latency and throughput, reaffirming the versatility and adaptability of our method across diverse attention architectures.

B Ablation on TL Code Generation stage

We conduct an ablation study to validate the necessity of the hierarchical generation in TL Code Generation Stage (i.e., first generate TL sketch then TL code). Results demonstrate that existing LLMs fails to directly generate TL code. Listing 1 and Listing 2 provide the failure cases.

Reshape omission. LLMs occasionally fail to perform the necessary layout reshape operation on the result matrix generated by the first GEMM operator before proceeding to the second GEMM operator. Although the output matrix of the first GEMM operator and one of the input matrices of the second GEMM operator are mathematically consistent, their memory layouts differ significantly due to the use of MMA instructions. Therefore, a layout reshape operation must be introduced to reorganize the matrix layout to meet the requirements of MMA instructions. The lack of TL Sketch prevents LLMs from recognizing the critical layout transformation, causing reshape omissions and computation errors.

GEMM error. LLMs fail to rigorously distinguish between TL symbolic representations and their corresponding physical memory layout mappings. Specifically, although the first GEMM operator in the TL layer is defined as \( Q \) multiplied by \( K^T \), the matrix \( K \) physically retains its original layout in memory due to the characteristics of the MMA instruction set. Nevertheless, the TL abstraction layer must maintain formal transpose notation to guide subsequent translation processes properly. Due to the absence of TL Sketch intermediate representation generation, LLMs fail to effectively bridge the semantic gap between algorithmic abstraction and hardware implementation layers. This results in the conflation of formal transpose notation in TL with actual physical memory layouts (without explicit transposition), leading to the loss of critical semantic constraints during TL-to-CuTe translation and ultimately causing implementation-level mismatches.

Compute GEMM Q_shared, K_shared.T and get S
if i < (kv_len/BN) - 1
    Copy K (BN, HeadDim) in coordinate [L = i+1] from global to shared
end
Compute Softmax S
// No reshape!
Compute GEMM S, V_shared and accumulate O_register

Listing 1: A Case of Reshape Omission.

Compute GEMM Q_shared, K_shared and get S //K_shared should be transposed
Compute Softmax S with Smax and Ssum
Reshape S from (MMA_C, MMA_M, MMA_N) to (MMA_A, MMA_M, MMA_N_new)
Compute GEMM S, V_shared and accumulate O_reg

Listing 2: A Case of GEMM Error.

C Real-World LLM Configuration

Currently, LLMs predominantly employ MHA and GQA mechanisms in their transformer backbone. While these models uniformly adopt a head dimension of 128 across different architectures, significant variations exist in their configuration of query heads versus key and value heads. To systematically evaluate LLM-TL on these architectural distinctions, we select three representative models spanning diverse scales and configurations: Llama2 7B (32 query heads, key and value heads), Qwen2.5 72B (64 query heads / 8 key and value heads), and Llama3.1 405B (128 query heads / 8 key and value heads). The experimental results, as presented in Table 8, demonstrate that the code generated by LLM-TL consistently achieves superior performance metrics compared to all four
<table>
  <tr>
    <th rowspan="2">Head Dimension</th>
    <th colspan="6">64</th>
    <th colspan="6">128</th>
  </tr>
  <tr>
    <th>Sequence Length</th>
    <th>512</th>
    <th>1k</th>
    <th>2k</th>
    <th>4k</th>
    <th>8k</th>
    <th>16k</th>
    <th>512</th>
    <th>1k</th>
    <th>2k</th>
    <th>4k</th>
    <th>8k</th>
    <th>16k</th>
  </tr>
  <tr>
    <td rowspan="5">Masked MHA</td>
    <td>cuDNN</td>
    <td>8.11</td>
    <td>10.84</td>
    <td>12.13</td>
    <td>13.22</td>
    <td>13.69</td>
    <td>13.83</td>
    <td>7.73</td>
    <td>10.41</td>
    <td>12.14</td>
    <td>13.03</td>
    <td>13.76</td>
    <td>13.01</td>
  </tr>
  <tr>
    <td>FlexAttention</td>
    <td><b>10.82</b></td>
    <td>13.45</td>
    <td>16.31</td>
    <td>18.52</td>
    <td>19.84</td>
    <td>20.47</td>
    <td>7.81</td>
    <td>10.53</td>
    <td>12.62</td>
    <td>14.26</td>
    <td>15.02</td>
    <td>14.91</td>
  </tr>
  <tr>
    <td>flash-attn v1</td>
    <td>8.68</td>
    <td>9.85</td>
    <td>12.81</td>
    <td>12.81</td>
    <td>13.83</td>
    <td>13.25</td>
    <td>7.8</td>
    <td>8.77</td>
    <td>9.88</td>
    <td>10.68</td>
    <td>10.68</td>
    <td>10.53</td>
  </tr>
  <tr>
    <td>DeepSeek-V3</td>
    <td>1.33</td>
    <td>1.35</td>
    <td>0.99</td>
    <td>1.21</td>
    <td>OOM</td>
    <td>OOM</td>
    <td>2.46</td>
    <td>2.64</td>
    <td>1.92</td>
    <td>2.26</td>
    <td>2.38</td>
    <td>OOM</td>
  </tr>
  <tr>
    <td>DeepSeek-V3 + Ours</td>
    <td>9.83</td>
    <td><b>13.48</b></td>
    <td><b>16.62</b></td>
    <td><b>19.11</b></td>
    <td><b>20.72</b></td>
    <td><b>21.43</b></td>
    <td><b>9.92</b></td>
    <td><b>13.67</b></td>
    <td><b>16.82</b></td>
    <td><b>18.61</b></td>
    <td><b>19.62</b></td>
    <td><b>19.07</b></td>
  </tr>
  <tr>
    <td></td>
    <td>7.39x</td>
    <td>9.99x</td>
    <td>16.79x</td>
    <td>15.80x</td>
    <td>-</td>
    <td>-</td>
    <td>+4.05x</td>
    <td>+5.18x</td>
    <td>+8.76x</td>
    <td>+8.23x</td>
    <td>+8.24x</td>
    <td>-</td>
  </tr>
  <tr>
    <td rowspan="5">Masked GQA</td>
    <td>cuDNN</td>
    <td>8.21</td>
    <td>10.42</td>
    <td>12.13</td>
    <td>13.03</td>
    <td>13.5</td>
    <td>13.85</td>
    <td>7.74</td>
    <td>10.41</td>
    <td>11.63</td>
    <td>12.84</td>
    <td>13.49</td>
    <td>12.93</td>
  </tr>
  <tr>
    <td>FlexAttention</td>
    <td><b>10.51</b></td>
    <td>13.45</td>
    <td>16.17</td>
    <td>18.54</td>
    <td>20.13</td>
    <td>20.58</td>
    <td>7.92</td>
    <td>10.24</td>
    <td>12.43</td>
    <td>14.48</td>
    <td>15.13</td>
    <td>14.89</td>
  </tr>
  <tr>
    <td>flash-attn v1</td>
    <td>6.85</td>
    <td>7.93</td>
    <td>12.79</td>
    <td>13.22</td>
    <td>13.56</td>
    <td>13.46</td>
    <td>5.3</td>
    <td>9.37</td>
    <td>9.85</td>
    <td>10.62</td>
    <td>10.86</td>
    <td>10.51</td>
  </tr>
  <tr>
    <td>DeepSeek-V3</td>
    <td>1.05</td>
    <td>1.06</td>
    <td>0.82</td>
    <td>0.97</td>
    <td>OOM</td>
    <td>OOM</td>
    <td>1.97</td>
    <td>2.05</td>
    <td>1.58</td>
    <td>1.81</td>
    <td>1.93</td>
    <td>OOM</td>
  </tr>
  <tr>
    <td>DeepSeek-V3 + Ours</td>
    <td>9.76</td>
    <td><b>13.68</b></td>
    <td><b>16.45</b></td>
    <td><b>19.13</b></td>
    <td><b>20.81</b></td>
    <td><b>21.58</b></td>
    <td><b>10.73</b></td>
    <td><b>14.08</b></td>
    <td><b>16.32</b></td>
    <td><b>18.03</b></td>
    <td><b>19.15</b></td>
    <td><b>18.7</b></td>
  </tr>
  <tr>
    <td></td>
    <td>9.30x</td>
    <td>12.91x</td>
    <td>20.06x</td>
    <td>19.72x</td>
    <td>-</td>
    <td>-</td>
    <td>+5.45x</td>
    <td>+6.87x</td>
    <td>+10.33x</td>
    <td>+9.96x</td>
    <td>+9.92x</td>
    <td>-</td>
  </tr>
  <tr>
    <td rowspan="5">Masked MQA</td>
    <td>cuDNN</td>
    <td>8.41</td>
    <td>10.45</td>
    <td>11.77</td>
    <td>12.95</td>
    <td>13.43</td>
    <td>13.78</td>
    <td>8.39</td>
    <td>10.32</td>
    <td>11.62</td>
    <td>13.03</td>
    <td>13.6</td>
    <td>12.82</td>
  </tr>
  <tr>
    <td>FlexAttention</td>
    <td><b>10.67</b></td>
    <td>13.42</td>
    <td>16.44</td>
    <td>18.39</td>
    <td>19.91</td>
    <td>20.27</td>
    <td>7.89</td>
    <td>10.42</td>
    <td>12.64</td>
    <td>14.12</td>
    <td>14.98</td>
    <td>14.95</td>
  </tr>
  <tr>
    <td>flash-attn v1</td>
    <td>5.73</td>
    <td>11.53</td>
    <td>12.65</td>
    <td>13.74</td>
    <td>13.59</td>
    <td>13.38</td>
    <td>5.27</td>
    <td>9.42</td>
    <td>9.95</td>
    <td>10.71</td>
    <td>10.32</td>
    <td>10.47</td>
  </tr>
  <tr>
    <td>DeepSeek-V3</td>
    <td>1.35</td>
    <td>1.36</td>
    <td>0.99</td>
    <td>1.21</td>
    <td>OOM</td>
    <td>OOM</td>
    <td>2.52</td>
    <td>2.61</td>
    <td>1.91</td>
    <td>2.26</td>
    <td>2.37</td>
    <td>OOM</td>
  </tr>
  <tr>
    <td>DeepSeek-V3 + Ours</td>
    <td>9.65</td>
    <td><b>13.61</b></td>
    <td><b>17.11</b></td>
    <td><b>18.84</b></td>
    <td><b>20.59</b></td>
    <td><b>21.27</b></td>
    <td><b>10.19</b></td>
    <td><b>14.01</b></td>
    <td><b>16.7</b></td>
    <td><b>17.92</b></td>
    <td><b>19.17</b></td>
    <td><b>18.79</b></td>
  </tr>
  <tr>
    <td></td>
    <td>17.15x</td>
    <td>11.00x</td>
    <td>17.28x</td>
    <td>15.57x</td>
    <td>-</td>
    <td>-</td>
    <td>+4.04x</td>
    <td>+5.37x</td>
    <td>+8.74x</td>
    <td>+7.93x</td>
    <td>+8.09x</td>
    <td>-</td>
  </tr>
  <tr>
    <td rowspan="5">MHA</td>
    <td>cuDNN</td>
    <td>10.47</td>
    <td>12.51</td>
    <td>13.01</td>
    <td>13.61</td>
    <td>13.95</td>
    <td>13.76</td>
    <td>10.81</td>
    <td>12.35</td>
    <td>12.95</td>
    <td>13.51</td>
    <td>13.53</td>
    <td>13.58</td>
  </tr>
  <tr>
    <td>FlexAttention</td>
    <td><b>14.42</b></td>
    <td><b>16.91</b></td>
    <td><b>18.77</b></td>
    <td><b>19.85</b></td>
    <td><b>20.13</b></td>
    <td><b>20.25</b></td>
    <td>11.34</td>
    <td>13.50</td>
    <td>14.83</td>
    <td>15.67</td>
    <td>15.74</td>
    <td>15.42</td>
  </tr>
  <tr>
    <td>flash-attn v1</td>
    <td>12.25</td>
    <td>15.27</td>
    <td>14.28</td>
    <td>14.25</td>
    <td>14.25</td>
    <td>14.46</td>
    <td>8.78</td>
    <td>11.03</td>
    <td>10.95</td>
    <td>10.61</td>
    <td>10.38</td>
    <td>10.78</td>
  </tr>
  <tr>
    <td>DeepSeek-V3</td>
    <td>4.23</td>
    <td>4.54</td>
    <td>3.18</td>
    <td>4.07</td>
    <td>OOM</td>
    <td>OOM</td>
    <td>7.87</td>
    <td>8.23</td>
    <td>6.11</td>
    <td>7.16</td>
    <td>7.48</td>
    <td>OOM</td>
  </tr>
  <tr>
    <td>DeepSeek-V3 + Ours</td>
    <td>13.35</td>
    <td>15.68</td>
    <td>18.35</td>
    <td>19.36</td>
    <td>19.59</td>
    <td>19.67</td>
    <td><b>15.8</b></td>
    <td><b>17.79</b></td>
    <td><b>18.59</b></td>
    <td><b>18.68</b></td>
    <td><b>18.86</b></td>
    <td><b>19.13</b></td>
  </tr>
  <tr>
    <td></td>
    <td>3.16x</td>
    <td>13.45x</td>
    <td>5.77x</td>
    <td>14.76x</td>
    <td>-</td>
    <td>-</td>
    <td>+2.01x</td>
    <td>+2.16x</td>
    <td>+3.04x</td>
    <td>+2.61x</td>
    <td>+2.52x</td>
    <td>-</td>
  </tr>
  <tr>
    <td rowspan="5">GQA</td>
    <td>cuDNN</td>
    <td>10.63</td>
    <td>12.35</td>
    <td>13.14</td>
    <td>13.39</td>
    <td>13.67</td>
    <td>13.52</td>
    <td>10.97</td>
    <td>12.28</td>
    <td>13.02</td>
    <td>13.52</td>
    <td>13.64</td>
    <td>13.47</td>
  </tr>
  <tr>
    <td>FlexAttention</td>
    <td><b>14.43</b></td>
    <td><b>16.92</b></td>
    <td><b>18.87</b></td>
    <td><b>20.12</b></td>
    <td><b>20.34</b></td>
    <td><b>20.24</b></td>
    <td>11.43</td>
    <td>13.74</td>
    <td>14.95</td>
    <td>15.52</td>
    <td>15.64</td>
    <td>15.51</td>
  </tr>
  <tr>
    <td>flash-attn v1</td>
    <td>8.89</td>
    <td>15.43</td>
    <td>14.41</td>
    <td>14.48</td>
    <td>14.35</td>
    <td>14.52</td>
    <td>10.98</td>
    <td>11.01</td>
    <td>10.95</td>
    <td>11.01</td>
    <td>10.33</td>
    <td>10.8</td>
  </tr>
  <tr>
    <td>DeepSeek-V3</td>
    <td>2.47</td>
    <td>2.49</td>
    <td>2.08</td>
    <td>2.00</td>
    <td>OOM</td>
    <td>OOM</td>
    <td>4.56</td>
    <td>4.77</td>
    <td>3.97</td>
    <td>4.48</td>
    <td>OOM</td>
    <td>OOM</td>
  </tr>
  <tr>
    <td>DeepSeek-V3 + Ours</td>
    <td>13.82</td>
    <td><b>16.79</b></td>
    <td><b>18.47</b></td>
    <td><b>19.68</b></td>
    <td><b>19.51</b></td>
    <td><b>19.47</b></td>
    <td><b>15.81</b></td>
    <td><b>17.59</b></td>
    <td><b>18.82</b></td>
    <td><b>19.6</b></td>
    <td><b>19.53</b></td>
    <td><b>19.58</b></td>
  </tr>
  <tr>
    <td></td>
    <td>5.60x</td>
    <td>16.74x</td>
    <td>8.88x</td>
    <td>-</td>
    <td>-</td>
    <td>-</td>
    <td>+3.47x</td>
    <td>+3.69x</td>
    <td>+4.74x</td>
    <td>+4.38x</td>
    <td>-</td>
    <td>-</td>
  </tr>
  <tr>
    <td rowspan="5">MQA</td>
    <td>cuDNN</td>
    <td>10.79</td>
    <td>12.17</td>
    <td>13.23</td>
    <td>13.62</td>
    <td>13.85</td>
    <td>13.69</td>
    <td>10.45</td>
    <td>12.39</td>
    <td>13.03</td>
    <td>13.25</td>
    <td>13.48</td>
    <td>13.38</td>
  </tr>
  <tr>
    <td>FlexAttention</td>
    <td><b>14.61</b></td>
    <td><b>16.94</b></td>
    <td><b>18.57</b></td>
    <td><b>19.93</b></td>
    <td><b>20.31</b></td>
    <td><b>20.14</b></td>
    <td>11.42</td>
    <td>13.85</td>
    <td>14.64</td>
    <td>15.28</td>
    <td>15.76</td>
    <td>15.56</td>
  </tr>
  <tr>
    <td>flash-attn v1</td>
    <td>11.23</td>
    <td>15.32</td>
    <td>14.59</td>
    <td>14.12</td>
    <td>14.14</td>
    <td>14.51</td>
    <td>11.19</td>
    <td>11.06</td>
    <td>11.01</td>
    <td>11.02</td>
    <td>10.72</td>
    <td>10.88</td>
  </tr>
  <tr>
    <td>DeepSeek-V3</td>
    <td>4.33</td>
    <td>4.41</td>
    <td>3.15</td>
    <td>3.97</td>
    <td>OOM</td>
    <td>OOM</td>
    <td>7.91</td>
    <td>8.31</td>
    <td>5.99</td>
    <td>7.11</td>
    <td>7.32</td>
    <td>OOM</td>
  </tr>
  <tr>
    <td>DeepSeek-V3 + Ours</td>
    <td>8.58</td>
    <td><b>16.34</b></td>
    <td><b>18.77</b></td>
    <td><b>19.67</b></td>
    <td><b>19.79</b></td>
    <td><b>19.62</b></td>
    <td><b>14.94</b></td>
    <td><b>16.39</b></td>
    <td><b>18.14</b></td>
    <td><b>19.4</b></td>
    <td><b>19.08</b></td>
    <td><b>19.46</b></td>
  </tr>
  <tr>
    <td></td>
    <td>3.14x</td>
    <td>13.71x</td>
    <td><b>5.59x</b></td>
    <td>4.95x</td>
    <td>-</td>
    <td>-</td>
    <td>+1.89x</td>
    <td>+1.97x</td>
    <td>+3.03x</td>
    <td>+2.73x</td>
    <td>+2.81x</td>
    <td>-</td>
  </tr>
</table>

Table 7: Performance (TFLOPS) comparison across different dimensions, attention operators and the presence or absence of causal masks on T4 GPU.

implementations. This performance advantage is maintained across all evaluated configuration, indicating the robustness and effectiveness of LLM-TL on different heads.

D Prompts

Some prompts for guiding TL Code generating and reasoning are shown in Listing 3 and Listing 4, respectively.

For TL Code generating, take Copy statement as an example, we first instruct LLMs about the memory hierarchies of GPUs, to establish a foundational understanding of data movement across these hierarchies. Additionally, we introduce the architecture and operational principles of Tensor Core, emphasizing their role in MMA operations through warp-level parallelism and efficient register utilization. Following this, we provide the precise syntax and structure of TL Code, enabling LLMs to generate hardware-aware implementations correctly and effectively.

For TL Code reasoning, we instruct LLMs to derive specific dimensional information to refine the execution process of attention operator. Take Copy statement again as an example, we first introduce parameter-related variable allocation mechanisms. Then, we let LLMs perform different operations based on the different cases of the Copy statements, while the specific details such as dimensional information are generated by the LLMs themselves.

Use the following basic TL statements to describe the provided algorithm flow. Focus solely on describing the hardware execution process of the algorithm on the GPU, without adding excessive complex information.
Here are two basic statements of the TL, 'Copy' and 'Compute':
###
Copy
The term "Copy" is used to denote the transfer of data between different levels of storage hierarchy in hardware. In GPUs, there are three
<table>
  <tr>
    <th>Sequence Length</th>
    <th>512</th>
    <th>1k</th>
    <th>2k</th>
    <th>4k</th>
    <th>8k</th>
    <th>16k</th>
  </tr>
  <tr>
    <th colspan="7">Llama2 7B (32 Q-heads/32 KV-heads/128 Head-dimension)</th>
  </tr>
  <tr>
    <td>cuDNN</td>
    <td>112.4</td>
    <td>142.6</td>
    <td>164.1</td>
    <td>176.8</td>
    <td>197.2</td>
    <td>201.7</td>
  </tr>
  <tr>
    <td>FlexAttention</td>
    <td>82.8</td>
    <td>108.6</td>
    <td>128.6</td>
    <td>150.2</td>
    <td>158.4</td>
    <td>167.1</td>
  </tr>
  <tr>
    <td>flash-attn v2</td>
    <td>122.5</td>
    <td>152.5</td>
    <td>173.4</td>
    <td>186.3</td>
    <td>201.5</td>
    <td>207.3</td>
  </tr>
  <tr>
    <td>DeepSeek-V3</td>
    <td>14.6</td>
    <td>15.1</td>
    <td>10.9</td>
    <td>13.3</td>
    <td>14.6</td>
    <td>15.1</td>
  </tr>
  <tr>
    <td>DeepSeek-V3 + Ours</td>
    <td><b>137.1</b></td>
    <td><b>160.6</b></td>
    <td><b>180.3</b></td>
    <td><b>186.7</b></td>
    <td><b>198.3</b></td>
    <td><b>202.7</b></td>
  </tr>
  <tr>
    <td></td>
    <td><span style="color:red;">↑9.39x</span></td>
    <td><span style="color:red;">↑10.64x</span></td>
    <td><span style="color:red;">↑16.54x</span></td>
    <td><span style="color:red;">↑14.04x</span></td>
    <td><span style="color:red;">↑13.58x</span></td>
    <td><span style="color:red;">↑13.42x</span></td>
  </tr>
  <tr>
    <th colspan="7">Qwen2.5 72B (64 Q-heads/8 KV-heads/128 Head-dimension)</th>
  </tr>
  <tr>
    <td>cuDNN</td>
    <td>116.3</td>
    <td>148.3</td>
    <td>176.1</td>
    <td>191.8</td>
    <td>202.1</td>
    <td>207.9</td>
  </tr>
  <tr>
    <td>FlexAttention</td>
    <td>86.1</td>
    <td>117.4</td>
    <td>136.7</td>
    <td>154.7</td>
    <td>168.1</td>
    <td>172.4</td>
  </tr>
  <tr>
    <td>flash-attn v2</td>
    <td>127.1</td>
    <td>157.8</td>
    <td>181.5</td>
    <td><b>201.8</b></td>
    <td><b>216.0</b></td>
    <td><b>222.5</b></td>
  </tr>
  <tr>
    <td>DeepSeek-V3</td>
    <td>10.9</td>
    <td>11.1</td>
    <td>8.8</td>
    <td>10.2</td>
    <td>11.2</td>
    <td>OOM</td>
  </tr>
  <tr>
    <td>DeepSeek-V3 + Ours</td>
    <td><b>140.2</b></td>
    <td><b>165.1</b></td>
    <td><b>186.4</b></td>
    <td><b>192.9</b></td>
    <td><b>201.8</b></td>
    <td><b>205.1</b></td>
  </tr>
  <tr>
    <td></td>
    <td><span style="color:red;">↑12.86x</span></td>
    <td><span style="color:red;">↑14.87x</span></td>
    <td><span style="color:red;">↑21.18x</span></td>
    <td><span style="color:red;">↑18.91x</span></td>
    <td><span style="color:red;">↑18.02x</span></td>
    <td>-</td>
  </tr>
  <tr>
    <th colspan="7">Llama3.1 405B (128 Q-heads/8 KV-heads/128 Head-dimension)</th>
  </tr>
  <tr>
    <td>cuDNN</td>
    <td>121.9</td>
    <td>157.2</td>
    <td>183.4</td>
    <td>196.7</td>
    <td>206.4</td>
    <td>211.2</td>
  </tr>
  <tr>
    <td>FlexAttention</td>
    <td>93.2</td>
    <td>117.2</td>
    <td>144.4</td>
    <td>157.7</td>
    <td>169.7</td>
    <td>175.3</td>
  </tr>
  <tr>
    <td>flash-attn v2</td>
    <td>129.1</td>
    <td>164.1</td>
    <td><b>192.2</b></td>
    <td><b>209.1</b></td>
    <td><b>221.1</b></td>
    <td><b>225.3</b></td>
  </tr>
  <tr>
    <td>DeepSeek-V3</td>
    <td>11.1</td>
    <td>11.2</td>
    <td>8.9</td>
    <td>10.2</td>
    <td>OOM</td>
    <td>OOM</td>
  </tr>
  <tr>
    <td>DeepSeek-V3 + Ours</td>
    <td><b>146.5</b></td>
    <td><b>168.4</b></td>
    <td><b>187.5</b></td>
    <td><b>200.3</b></td>
    <td><b>204.4</b></td>
    <td><b>206.9</b></td>
  </tr>
  <tr>
    <td></td>
    <td><span style="color:red;">↑13.20x</span></td>
    <td><span style="color:red;">↑15.03x</span></td>
    <td><span style="color:red;">↑21.07x</span></td>
    <td><span style="color:red;">↑19.64x</span></td>
    <td>-</td>
    <td>-</td>
  </tr>
</table>

Table 8: Performance (TFLOPS) compared with handcraft libraries in different configuration on A100 GPU. The head dimension for all three LLMs is consistently set to 128 and all of attention operators are applied with causal mask.

<table>
  <tr>
    <th>Sequence Length</th>
    <th>512</th>
    <th>1k</th>
    <th>2k</th>
    <th>4k</th>
    <th>8k</th>
    <th>16k</th>
  </tr>
  <tr>
    <td>Naive NSA</td>
    <td>0.84</td>
    <td>1.68</td>
    <td>3.35</td>
    <td>6.61</td>
    <td>13.34</td>
    <td>26.29</td>
  </tr>
  <tr>
    <td>ours</td>
    <td><b>0.67</b></td>
    <td><b>1.26</b></td>
    <td><b>2.59</b></td>
    <td><b>5.25</b></td>
    <td><b>10.59</b></td>
    <td><b>21.27</b></td>
  </tr>
  <tr>
    <td></td>
    <td><span style="color:red;">↓1.25x</span></td>
    <td><span style="color:red;">↓1.33x</span></td>
    <td><span style="color:red;">↓1.29x</span></td>
    <td><span style="color:red;">↓1.26x</span></td>
    <td><span style="color:red;">↓1.26x</span></td>
    <td><span style="color:red;">↓1.24x</span></td>
  </tr>
</table>

Table 9: The NSA evaluations of latency(s) on A100 with head dimension of 128. We compared with naive pyTorch implementation of NSA.

In this context, a "Copy" operation requires specifying the variable name as well as the source and destination addresses of the variable. Here is the usage of 'Copy' statement:
```
Copy A from global to shared
```
The clause means load a block of the matrix 'A' to the corresponding shared memory storage.

### Compute
The term "compute" is used to represent computations performed on hardware. Computational descriptions include various types of operations, primarily arithmetic operations (addition, subtraction, multiplication, division), matrix multiplication (GEMM), accumulation, and others. Here are some typical computations:
- **GEMM:** Use *GEMM* (General Matrix Multiplication) to represent the multiplication operation of two matrices at the register storage level, leveraging the fast access characteristics of registers to achieve high-performance matrix computations. Use GEMM. This primitive can be used in the following manner:
```
Compute GEMM A, B and get S
Compute GEMM A, B and accumulate S
```

primary storage levels:
- **global memory:** Global memory is high-capacity, high-latency video memory used for storing data shared by all threads, typically for holding complete matrices or large-scale datasets.
- **shared memory:** Shared memory is high-speed, low-latency on-chip memory used for data sharing within a thread block. It is typically used to store a small portion of data required for collaborative computation by the current thread block, loaded from global memory.
- **register:** Registers are the fastest private storage units, used for storing thread-local variables and temporary data. In CUDA Tensor Core operations, registers are directly involved in matrix multiply-accumulate (MMA) computations, where each thread fetches its assigned data from shared memory and stores it in registers.
...
Here we compute the GEMM result of A and B, and store the result to the variable S.
- **Regular computation:** We need some regular computation like **the four basic arithmetic operations**, and we can use these basic operations like this:
...
    Compute Multiply A, x and get new A
    Compute Multiply A, x and get B
...
Here we use these clauses to define the **multiplication** operation, and the first means store the result back to A while the other means store to a new variable B.
- **Other operators:** Sometimes the users will define some other custom operators like softmax, and we can use it like:
...
    Compute Softmax A
...
In this context, "compute" first requires specifying the exact type of computation, along with the variables involved in the computation and the variable name for the result of the computation.

### Loop
When describing the execution flow of an algorithm, it is often necessary to use **for loops** to represent iterative operations of operators. In such cases, a **For statement** is used to describe these loops. The syntax `for i = 0:N ... end` is employed to indicate a loop that iterates **N times**, and **indentation** is used to control which code blocks are executed within the loop.
...
for i=0:N
    ...
end
...
Now, based on the algorithm workflow provided by the user, analyze the memory access and computational behavior of the algorithm on the GPU , and use the aforementioned statements to represent the semantically enriched execution flow of the algorithm.

Listing 3: Prompt for guiding LLMs to generate TL Code.

Several fundamental statement types have been defined to represent the algorithm execution flow. Building upon these primitive constructs, we need to derive specific dimensional information to refine the algorithm execution process. Besides, to facilitate the generation of functionally correct final code,

this step introduces parameter-related variable allocation mechanisms. We achieve this process by incorporating allocate statements , thereby ensuring proper allocation and management of memory resources. Specifically, the dimensional information to be derived includes:

###
Copy
For the 'Copy' statement, it is necessary to complete its parameter configuration based on the execution characteristics of algorithm on the GPU architecture. The optimization primarily focuses on access locations within global memory.
- Global to shared
Prior to performing the 'Copy' statement from or to global memory, it is necessary to fully characterize the matrix information in global memory. The Allocate statement can be used to represent the storage layout and attributes of the entire matrix in global memory like the follow:
...
Allocate A in global (M, K) with offset batch_offset
Copy A from global to shared
...
For matrix 'A' with shape `(batch, M, N )`, here we allocate tensor 'A' whose shape is (M, K). Assuming that each block will be responsible for a batch, the global that should be loaded will have an offset of batch_offset. It can be used in the final implementation code. This Allocate statement needs to be applied to every 'Copy' statement involving global memory, unless the corresponding memory allocation has already been explicitly declared in the preceeding context.
For 'Copy' statement itself, for instance, this clause:
...
Copy A from global to shared
...
If it is required to load a data block of size (BM, BK) from matrix 'A' located at position L = i, the parameter configuration can be added in the following manner:
...
Copy A (BM, BK) in coordinate [L = i] from global to shared
...
The first clause represents the original Sketch description. By incorporating the aforementioned parameter information, the following complete implementation can be derived the second one.
Here you should note that: L = i represents the i -th block after tiling. For example, if A is a matrix with shape (M, BK), 'Copy' A (BM, BK) in coordinate [L = i]
selects the i-th block, which is with the shape (BM, BK). And there will be M / BM blocks in total.
###
Compute
The dimensionality of the compute statement is directly determined by the dimensions of its input and output registers, thus requiring no additional dimensional information. However, there are still two aspects related to the compute statement that require further supplementation:
- **Declare intermediate variables:** ****During the computation process, certain intermediate register variables serving as outputs require additional definition of their shape and storage attributes. Here is an example of GEMM:
```
...
for i in 0:K:
    Compute GEMM A, B and get C
...
where it didn't declare what C is, so you should add a allocate clause before the for loop to represent the shape information of S in register.
...
Allocate C in register (BM, BN)
for i in 0:K:
    Compute GEMM A, B and get C
...
Here we allocate the C in register with the information of whole dimension of block memory, and the real register shape can be inferred from the whole size.
- **Fuse two GEMM(Add reshape):** In the scenario of fusing two consecutive GEMM operations, where the output of the first operation directly serves as the input to the second, it is necessary to transform the output of the first operation according to the specific computational scale to meet the input requirements of the second GEMM operation.
Here is some prior knowledge: The layout of Tensor Core can be represented as (MMA, MMA_M, MMA_N). Here, MMA denotes the computational scale required for matrices A, B, and C in the GEMM operation, while MMA_M and MMA_N represent the repetition counts of the computation along the M and N dimensions, respectively.
Here is an example of fuse:
```
Compute GEMM E, F and get G
... //There might be other operations, such as `Compute Softmax G`
Compute GEMM G, H and accumulate I
```

Here 'G' is the output of first GEMM and then used in second GEMM. There might be other operations between two GEMMs, such as softmax.
HOWEVER, whenever there is an association between two GEMMs, a reshape statement must be added. So you have to add a reshape statement according to layout G. Add the statement before GEMM-II, just like the example below:
```
Compute GEMM E, F and get G
... //There might be other operations, such as `Compute Softmax G`
Reshape G from (MMA_C, MMA_M, MMA_N) to (MMA_A, MMA_M, MMA_N_new)
Compute GEMM G, H and accumulate I
```

In this example, the 'G' of GEMM-I is one of the input of GEMM-II. Since C is the 'A' matrix of tensor core, the MMA shape of G should be changed from 'MMA_C' to 'MMA_A', and change the 'MMA_N' to adapt this difference.

Listing 4: Prompt for guiding LLMs to analyse parameters in the TL Code and reason the TL Code.