Before revision: This restriction is eliminated by changing the names of some of the registers : r1 ≔ m[1024] r1 ≔ r1 + 2 m[1032] ≔ r1 r2 ≔ m[2048] r2 ≔ r2 + 4 m[2056] ≔ r2 Now the last three instructions can be executed in parallel with the first three.
After revision: If another register is available, this restriction can be eliminated by choosing different registers for the first three and the second three instructions : r1 ≔ m[1024] r1 ≔ r1 + 2 m[1032] ≔ r1 r2 ≔ m[2048] r2 ≔ r2 + 4 m[2056] ≔ r2 Now the last three instructions can be executed in parallel with the first three.