Before revision:  In specific, we first analyze the format of the bitstream to find the mapping relationship between the configuration bits and configurable logic blocks . Next, an image-coded representation of bitstream is proposed suitable for deep learning processing. This bitstream-to-image transformation takes into account of the adjacency nature of the programmable logic as well as high degree of redundancy of configuration information.
After revision:  In specific, we first analyze the format of the bitstream to find the mapping relationship between the configuration bits and configurable logic blocks because of the discontinuity of the configuration bits in the bitstream for one element. In order to reap the maturity of object detection based on deep learning techniques, our next step is to convert an FPGA bitstream to an image, following the proposed transformation method that takes account of both the adjacency nature of the programmable logic as well as high degree of redundancy of configuration information.