Before revision: Intel does about-face on SOI, backs high-k dielectric, EE TimesHybrid trench isolation is another approach.Mitsubishi SOI process uses hybrid trench isolation, EE Times While floating body effect presents a problem in SOI DRAM chips, it is exploited as the underlying principle for ZRAM and TTRAM technologies.
After revision: Intel does about-face on SOI, backs high-k dielectric, EE TimesHybrid trench isolation is another approach.Mitsubishi SOI process uses hybrid trench isolation, EE Times While floating body effect presents a problem in SOI DRAM chips, it is exploited as the underlying principle for ZRAM and T-RAM technologies.