Venue: ICLR 2023 Conference

Reviews:

final_score: rating: 6: marginally above the acceptance threshold
review_content: summary_of_the_paper: This work proposes a Graph Neural Network (CktGNN) to automate the design for both the device parameters (device sizing) and the circuit topology.
Furthermore, the paper also proposes an open source dataset, Open Circuit Benchmark (OCB), which consists of 10k operational amplifiers with detailed circuit specifications. 

The proposed CktGNN, shows promising results in three different domain: 
- the ability to predict the graph properties (i.e., Gain, BW, PM, FoM)
- Circuit encoding efficiency (training/inference time)
- new circuit generation

strength_and_weaknesses: Strength: 
- Paper is well written and easy to follow
- The idea to simultaneously automate the circuit topology generation and device sizing is novel.

Weaknesses:

Admittedly, this paper does not fall into my area of expertise. So I cannot write a proper critical review. Though, I have several questions regarding the statements in the paper:

- In the paper it says: "previous work, inherently fail to optimize the circuit topology". This claim needs justification which I could not find in the paper. 
- In the paper it says: "However, these methods often lead to the generation of many useless circuit topologies". Again, This claim is provided with no justification.
- Regarding the OCB dataset, who has designed the 10k operational amplifiers? Basically, the question is: where do they come from?
- In the paper it says: "We also find that CktGNN can achieve the highest novelty in the generation process". However, in Table 2, CktGNN  is not the one with the highest novelty score! 
- There are some spelling errors in the text

clarity,_quality,_novelty_and_reproducibility: Read section "Strength And Weaknesses"
summary_of_the_review: As mentioned before, this paper does not fall into my area of expertise. Hence, my decision is going to heavily rely on other reviewers' evaluation.
review_title: null

final_score: rating: 6: marginally above the acceptance threshold
review_content: summary_of_the_paper: The paper studies the problem of representation learning of the analog circuit. It propose a two-level GNN model, in which the outer graph is composed with multiple non overlapping subgraphs. The representation can be used to perform different tasks. Then it also present a dataset called Open Circuit Benchmark which contains 10K OpAmp to benefit future projects.
strength_and_weaknesses: Strength:
The two-level GNN is natural for the analog circuit problem as the circuit needs to be constructed with some basic blocks instead of random circuit components.
The proposed benchmark is important for future study in this field

Weakness:
The OCB dataset only contains the operational amplifiers, though Opamp is a widely used units, it would be good to include other important circuit such as LDO, comparators, etc.
It is unclear that whether the two-level circuit representation can be used to other circuit since the subgraph basis may not be generally applied to all kinds of circuit.

Comments:
How can this method benefit the layout design of analog circuits? is that possible to design a layout for each subgraph basis?


clarity,_quality,_novelty_and_reproducibility: Clarity and quality is good, except that the paper should emphasize more on its representation's ability to be applied to different tasks.
novelty is good.
summary_of_the_review: A new representation learning for analog circuit which leverages human knowledge to construct the high level graph with low level subgraphs. A circuit dataset is released containing 10K Opamp circuits.

Thanks for the response. I would like to increase the score to 8 and i would encourage the authors to add more circuit to the dataset.
review_title: null

final_score: rating: 8: accept, good paper
review_content: summary_of_the_paper: The paper presents a modification of the NGNN framework of Zhang & Li which uses the embeddings of subgraphs around each node as node embeddings for an outer global message passing loop to DAGs (by defining a total ordering of possible subgraphs and  selecting the largest for each node) in order to apply the architecture to EDA tasks. The expressiveness of the architecture is analysed showing that the method is more expressive than standard MPGNNs and a new dataset is proposed on which the method and related work are evaluated.

Contributions:

1. domain knowledge dependent subgraph extraction for DAGs to extend NGNN
2. expressivty analysis
3. dataset + generation codes
4. empirical evaluation
strength_and_weaknesses: Strengths:

- the paper is well written and easy to understand
- the architecture achieves decent gains against most competing models
- the architecture should be useful for other DAG centric tasks as well

Weaknesses

- an author claim that this is the "first open source dataset for analog eda" should be made more nuanced, given the existence of e.g. https://arxiv.org/abs/2208.01040 and https://arxiv.org/abs/2203.15913 and their accompanying datasets
- the method relies on domain specific total ordering which needs to be handcrafted, similar to the node ordering methods used by GraphRNN and GRAN. The relation and impact of these should maybe be discussed, and if there is time, and ablation over the sensitivity towards ordering choice (e.g.  setting o(C)>o(R))  would strengthen the paper
- either I missed them or the experimental details (optimiser choice, number of seeds etc) are missing and should be added, although they are in the supplementary code
clarity,_quality,_novelty_and_reproducibility: The paper is clearly written (all important concepts are conveyed clearly), the evaluation needs more details (see weaknesses) and the overall quality is acceptable. Novelty might be argued against as it is an extension of an existing work,but I think the method found is non-obvious and properly analysed, with the dataset being a cherry on top.


there is also a typo in sectoin 3.3 "trasnformed" 
summary_of_the_review: Overall this is a fine paper. I would not call it ground breaking, but the dataset + code generation takes considerate amount of work to accomplish and will be valuable for the community, the method improves on prior art (not a lot but noticably) and the modification is well justified and analysed.
review_title: null

final_score: rating: 6: marginally above the acceptance threshold
review_content: summary_of_the_paper: This paper designs a circuit GNN (CktGNN) to facilitate the learning of circuit graphs and electronic design automation. CktGNN is a generation of the nested GNN structure to DAGs. The paper also presents a circuit benchmark dataset OCB with open-source code for automated circuit design methods evaluation.
strength_and_weaknesses: Strength:
1. The benchmark dataset has an empirical contribution to the field.
2. CktGNN is empirically proven to achieve SOTA performance.

Weakness:
1. The discussion on the decoder (circuit design/generation) is too little.
2. The method is an incremental development upon the nested GNN.
3. The figures are hard to read due to the font size.
4. The ability to design circuits automatically is not evaluated adequately in the experiments.
clarity,_quality,_novelty_and_reproducibility: Novelty:
CktGNN almost adopts the same structure as nested GNN, while only altering the outer GNN to DAG learning. Also, in the section discussing the method, a significant part of the content is about nested GNN, 1-WL algorithm, and VAE, making me feel that the novel part is limited.

Clarity:
Most of the paper is quite clear. The description and the purpose of Theorem 3.2 might require more revision.

Reproducibility:
The code is available in the supplementary material.
summary_of_the_review: The benchmark dataset provided has an unneglectable contribution to the field. However, the method itself doesn't offer much novelty. It's barely an application of the nested GNN.
review_title: null

Meta-review: metareview:_summary,_strengths_and_weaknesses: This paper proposes a new benchmark for the problem of automatic design of analog circuits, and introduces a new type of graph neural network for this task, which combines a recent two-level GNN, but adapts it to directed graphs. Although this is a relatively small extension, it is a good fit for this challenging application, and works convincingly better than the base method.
justification_for_why_not_higher_score: The application area of analog circuit design is rather specialized, so this paper may be of interest to a smaller subset of the ICLR community.
justification_for_why_not_lower_score: The reviewers are broadly supportive of this paper. This makes a contribution to a difficult and interesting application area.
Decision: Accept: poster