TEST PATTERN LIBRARY GENERATION FOR CO LAYER FOR SMO
Journal: International Forum “Microelectronics – 2020”. Joung Scientists Scholarship “Microelectronics – 2020”. XIII International conference «Silicon – 2020». XII young scientists scholarship for silicon nanostructures and devices physics, material science, process and analysis
Year: 2020

The source-mask optimization stage requires an optimal set of test structures. This paper describes a tool for developing a clip library and search of forbidden pitch in it