RESEARCH AND DEVELOPMENT OF A DIGITAL DECIMATING FILTER FOR APPLICATION IN A DELTA-SIGMA ADC
Journal: International Forum “Microelectronics – 2020”. Joung Scientists Scholarship “Microelectronics – 2020”. XIII International conference «Silicon – 2020». XII young scientists scholarship for silicon nanostructures and devices physics, material science, process and analysis
Year: 2020

various architectures of digital filters (DFs) were investigated in this work, on the basis of the considered architectures, a digital decimating filter (DDF) was implemented in the Verilog programming environment