Von Neumann architecture - wikipedia Von Neumann architecture See also : Stored - program computer and Universal Turing machine § Stored - program computer Von Neumann architecture scheme The von Neumann architecture, which is also known as the von Neumann model and Princeton architecture, is a computer architecture based on that described in 1945 by the mathematician and physicist John von Neumann and others in the First Draft of a Report on the EDVAC. This describes a design architecture for an electronic digital computer with parts consisting of a processing unit containing an arithmetic logic unit and processor registers ; a control unit containing an instruction register and program counter ; a memory to store both data and instructions ; external mass storage ; and input and output mechanisms. The meaning has evolved to be any stored - program computer in which an instruction fetch and a data operation can not occur at the same time because they share a common bus. This is referred to as the von Neumann bottleneck and often limits the performance of the system. The design of a von Neumann architecture machine is simpler than that of a Harvard architecture machine, which is also a stored - program system but has one dedicated set of address and data buses for reading data from and writing data to memory, and another set of address and data buses for instruction fetching. A stored - program digital computer is one that keeps its program instructions, as well as its data, in read - write, random - access memory ( RAM ). Stored - program computers were an advancement over the program - controlled computers of the 1940s, such as the Colossus and the ENIAC, which were programmed by setting switches and inserting patch cables to route data and to control signals between various functional units. In the vast majority of modern computers, the same memory is used for both data and program instructions, and the von Neumann vs. Harvard distinction applies to the cache architecture, not the main memory ( split cache architecture ). Contents 1 History 2 Capabilities 3 Development of the stored - program concept 4 Early von Neumann - architecture computers 5 Early stored - program computers 6 Evolution 7 Design limitations 7.1 Von Neumann bottleneck 7.1. 1 Mitigations 7.2 Self - modifying code 8 See also 9 References 10 Further reading 11 External links History The earliest computing machines had fixed programs. Some very simple computers still use this design, either for simplicity or training purposes. For example, a desk calculator ( in principle ) is a fixed program computer. It can do basic mathematics, but it can not be used as a word processor or a gaming console. Changing the program of a fixed - program machine requires rewiring, restructuring, or redesigning the machine. The earliest computers were not so much `` programmed '' as they were `` designed ''. `` Reprogramming '', when it was possible at all, was a laborious process, starting with flowcharts and paper notes, followed by detailed engineering designs, and then the often - arduous process of physically rewiring and rebuilding the machine. It could take three weeks to set up a program on ENIAC and get it working. With the proposal of the stored - program computer, this changed. A stored - program computer includes, by design, an instruction set and can store in memory a set of instructions ( a program ) that details the computation. A stored - program design also allows for self - modifying code. One early motivation for such a facility was the need for a program to increment or otherwise modify the address portion of instructions, which had to be done manually in early designs. This became less important when index registers and indirect addressing became usual features of machine architecture. Another use was to embed frequently used data in the instruction stream using immediate addressing. Self - modifying code has largely fallen out of favor, since it is usually hard to understand and debug, as well as being inefficient under modern processor pipelining and caching schemes. Capabilities On a large scale, the ability to treat instructions as data is what makes assemblers, compilers, linkers, loaders, and other automated programming tools possible. One can `` write programs which write programs ''. This has allowed a sophisticated self - hosting computing ecosystem to flourish around von Neumann architecture machines. Some high level languages such as LISP leverage the von Neumann architecture by providing an abstract, machine - independent way to manipulate executable code at runtime, or by using runtime information to tune just - in - time compilation ( e.g. in the case of languages hosted on the Java virtual machine, or languages embedded in web browsers ). On a smaller scale, some repetitive operations such as BITBLT or pixel & vertex shaders could be accelerated on general purpose processors with just - in - time compilation techniques. This is one use of self - modifying code that has remained popular. Development of the stored - program concept The mathematician Alan Turing, who had been alerted to a problem of mathematical logic by the lectures of Max Newman at the University of Cambridge, wrote a paper in 1936 entitled On Computable Numbers, with an Application to the Entscheidungsproblem, which was published in the Proceedings of the London Mathematical Society. In it he described a hypothetical machine which he called a `` universal computing machine '', and which is now known as the `` Universal Turing machine ''. The hypothetical machine had an infinite store ( memory in today 's terminology ) that contained both instructions and data. John von Neumann became acquainted with Turing while he was a visiting professor at Cambridge in 1935, and also during Turing 's PhD year at the Institute for Advanced Study in Princeton, New Jersey during 1936 -- 37. Whether he knew of Turing 's paper of 1936 at that time is not clear. In 1936, Konrad Zuse also anticipated in two patent applications that machine instructions could be stored in the same storage used for data. Independently, J. Presper Eckert and John Mauchly, who were developing the ENIAC at the Moore School of Electrical Engineering, at the University of Pennsylvania, wrote about the stored - program concept in December 1943. In planning a new machine, EDVAC, Eckert wrote in January 1944 that they would store data and programs in a new addressable memory device, a mercury metal delay line memory. This was the first time the construction of a practical stored - program machine was proposed. At that time, he and Mauchly were not aware of Turing 's work. Von Neumann was involved in the Manhattan Project at the Los Alamos National Laboratory, which required huge amounts of calculation. This drew him to the ENIAC project, during the summer of 1944. There he joined into the ongoing discussions on the design of this stored - program computer, the EDVAC. As part of that group, he wrote up a description titled First Draft of a Report on the EDVAC based on the work of Eckert and Mauchly. It was unfinished when his colleague Herman Goldstine circulated it with only von Neumann 's name on it, to the consternation of Eckert and Mauchly. The paper was read by dozens of von Neumann 's colleagues in America and Europe, and influenced the next round of computer designs. Jack Copeland considers that it is `` historically inappropriate, to refer to electronic stored - program digital computers as ' von Neumann machines ' ''. His Los Alamos colleague Stan Frankel said of von Neumann 's regard for Turing 's ideas : I know that in or about 1943 or ' 44 von Neumann was well aware of the fundamental importance of Turing 's paper of 1936... Von Neumann introduced me to that paper and at his urging I studied it with care. Many people have acclaimed von Neumann as the `` father of the computer '' ( in a modern sense of the term ) but I am sure that he would never have made that mistake himself. He might well be called the midwife, perhaps, but he firmly emphasized to me, and to others I am sure, that the fundamental conception is owing to Turing -- in so far as not anticipated by Babbage... Both Turing and von Neumann, of course, also made substantial contributions to the `` reduction to practice '' of these concepts but I would not regard these as comparable in importance with the introduction and explication of the concept of a computer able to store in its memory its program of activities and of modifying that program in the course of these activities. At the time that the `` First Draft '' report was circulated, Turing was producing a report entitled Proposed Electronic Calculator which described in engineering and programming detail, his idea of a machine that was called the Automatic Computing Engine ( ACE ). He presented this to the Executive Committee of the British National Physical Laboratory on February 19, 1946. Although Turing knew from his wartime experience at Bletchley Park that what he proposed was feasible, the secrecy surrounding Colossus, that was subsequently maintained for several decades, prevented him from saying so. Various successful implementations of the ACE design were produced. Both von Neumann 's and Turing 's papers described stored - program computers, but von Neumann 's earlier paper achieved greater circulation and the computer architecture it outlined became known as the `` von Neumann architecture ''. In the 1953 publication Faster than Thought : A Symposium on Digital Computing Machines ( edited by B.V. Bowden ), a section in the chapter on Computers in America reads as follows : The Machine of the Institute For Advanced Studies, Princeton In 1945, Professor J. von Neumann, who was then working at the Moore School of Engineering in Philadelphia, where the E.N.I.A.C. had been built, issued on behalf of a group of his co-workers a report on the logical design of digital computers. The report contained a fairly detailed proposal for the design of the machine which has since become known as the E.D.V.A.C. ( electronic discrete variable automatic computer ). This machine has only recently been completed in America, but the von Neumann report inspired the construction of the E.D.S.A.C. ( electronic delay - storage automatic calculator ) in Cambridge ( see page 130 ). In 1947, Burks, Goldstine and von Neumann published another report which outlined the design of another type of machine ( a parallel machine this time ) which should be exceedingly fast, capable perhaps of 20,000 operations per second. They pointed out that the outstanding problem in constructing such a machine was in the development of a suitable memory, all the contents of which were instantaneously accessible, and at first they suggested the use of a special vacuum tube -- called the `` Selectron '' -- which had been invented by the Princeton Laboratories of the R.C.A. These tubes were expensive and difficult to make, so von Neumann subsequently decided to build a machine based on the Williams memory. This machine, which was completed in June, 1952 in Princeton has become popularly known as the Maniac. The design of this machine has inspired that of half a dozen or more machines which are now being built in America, all of which are known affectionately as `` Johniacs. '' In the same book, the first two paragraphs of a chapter on ACE read as follows : Automatic Computation at the National Physical Laboratory One of the most modern digital computers which embodies developments and improvements in the technique of automatic electronic computing was recently demonstrated at the National Physical Laboratory, Teddington, where it has been designed and built by a small team of mathematicians and electronics research engineers on the staff of the Laboratory, assisted by a number of production engineers from the English Electric Company, Limited. The equipment so far erected at the Laboratory is only the pilot model of a much larger installation which will be known as the Automatic Computing Engine, but although comparatively small in bulk and containing only about 800 thermionic valves, as can be judged from Plates XII, XIII and XIV, it is an extremely rapid and versatile calculating machine. The basic concepts and abstract principles of computation by a machine were formulated by Dr. A.M. Turing, F.R.S., in a paper. read before the London Mathematical Society in 1936, but work on such machines in Britain was delayed by the war. In 1945, however, an examination of the problems was made at the National Physical Laboratory by Mr. J.R. Womersley, then superintendent of the Mathematics Division of the Laboratory. He was joined by Dr. Turing and a small staff of specialists, and, by 1947, the preliminary planning was sufficiently advanced to warrant the establishment of the special group already mentioned. In April, 1948, the latter became the Electronics Section of the Laboratory, under the charge of Mr. F.M. Colebrook. Early von Neumann - architecture computers The First Draft described a design that was used by many universities and corporations to construct their computers. Among these various computers, only ILLIAC and ORDVAC had compatible instruction sets. ARC2 ( Birkbeck, University of London ) officially came online on May 12, 1948. Manchester Small - Scale Experimental Machine ( SSEM ), nicknamed `` Baby '' ( University of Manchester, England ) made its first successful run of a stored - program on June 21, 1948. EDSAC ( University of Cambridge, England ) was the first practical stored - program electronic computer ( May 1949 ) Manchester Mark 1 ( University of Manchester, England ) Developed from the SSEM ( June 1949 ) CSIRAC ( Council for Scientific and Industrial Research ) Australia ( November 1949 ) EDVAC ( Ballistic Research Laboratory, Computing Laboratory at Aberdeen Proving Ground 1951 ) ORDVAC ( U-Illinois ) at Aberdeen Proving Ground, Maryland ( completed November 1951 ) IAS machine at Princeton University ( January 1952 ) MANIAC I at Los Alamos Scientific Laboratory ( March 1952 ) ILLIAC at the University of Illinois, ( September 1952 ) BESM - 1 in Moscow ( 1952 ) AVIDAC at Argonne National Laboratory ( 1953 ) ORACLE at Oak Ridge National Laboratory ( June 1953 ) BESK in Stockholm ( 1953 ) JOHNNIAC at RAND Corporation ( January 1954 ) DASK in Denmark ( 1955 ) WEIZAC at the Weizmann Institute of Science in Rehovot, Israel ( 1955 ) PERM in Munich ( 1956 ? ) SILLIAC in Sydney ( 1956 ) Early stored - program computers The date information in the following chronology is difficult to put into proper order. Some dates are for first running a test program, some dates are the first time the computer was demonstrated or completed, and some dates are for the first delivery or installation. The IBM SSEC had the ability to treat instructions as data, and was publicly demonstrated on January 27, 1948. This ability was claimed in a US patent. However it was partially electromechanical, not fully electronic. In practice, instructions were read from paper tape due to its limited memory. The ARC2 developed by Andrew Booth and Kathleen Booth at Birkbeck, University of London officially came online on May 12, 1948. It featured the first rotating drum storage device. The Manchester SSEM ( the Baby ) was the first fully electronic computer to run a stored program. It ran a factoring program for 52 minutes on June 21, 1948, after running a simple division program and a program to show that two numbers were relatively prime. The ENIAC was modified to run as a primitive read - only stored - program computer ( using the Function Tables for program ROM ) and was demonstrated as such on September 16, 1948, running a program by Adele Goldstine for von Neumann. The BINAC ran some test programs in February, March, and April 1949, although was not completed until September 1949. The Manchester Mark 1 developed from the SSEM project. An intermediate version of the Mark 1 was available to run programs in April 1949, but was not completed until October 1949. The EDSAC ran its first program on May 6, 1949. The EDVAC was delivered in August 1949, but it had problems that kept it from being put into regular operation until 1951. The CSIR Mk I ran its first program in November 1949. The SEAC was demonstrated in April 1950. The Pilot ACE ran its first program on May 10, 1950 and was demonstrated in December 1950. The SWAC was completed in July 1950. The Whirlwind was completed in December 1950 and was in actual use in April 1951. The first ERA Atlas ( later the commercial ERA 1101 / UNIVAC 1101 ) was installed in December 1950. Evolution Single system bus evolution of the architecture Through the decades of the 1960s and 1970s computers generally became both smaller and faster, which led to some evolutions in their architecture. For example, memory - mapped I / O allows input and output devices to be treated the same as memory. A single system bus could be used to provide a modular system with lower cost. This is sometimes called a `` streamlining '' of the architecture. In subsequent decades, simple microcontrollers would sometimes omit features of the model to lower cost and size. Larger computers added features for higher performance. Design limitations Von Neumann bottleneck The shared bus between the program memory and data memory leads to the von Neumann bottleneck, the limited throughput ( data transfer rate ) between the central processing unit ( CPU ) and memory compared to the amount of memory. Because the single bus can only access one of the two classes of memory at a time, throughput is lower than the rate at which the CPU can work. This seriously limits the effective processing speed when the CPU is required to perform minimal processing on large amounts of data. The CPU is continually forced to wait for needed data to be transferred to or from memory. Since CPU speed and memory size have increased much faster than the throughput between them, the bottleneck has become more of a problem, a problem whose severity increases with every newer generation of CPU. The von Neumann bottleneck was described by John Backus in his 1977 ACM Turing Award lecture. According to Backus : Surely there must be a less primitive way of making big changes in the store than by pushing vast numbers of words back and forth through the von Neumann bottleneck. Not only is this tube a literal bottleneck for the data traffic of a problem, but, more importantly, it is an intellectual bottleneck that has kept us tied to word - at - a-time thinking instead of encouraging us to think in terms of the larger conceptual units of the task at hand. Thus programming is basically planning and detailing the enormous traffic of words through the von Neumann bottleneck, and much of that traffic concerns not significant data itself, but where to find it. Mitigations There are several known methods for mitigating the Von Neumann performance bottleneck. For example, the following all can improve performance : Providing a cache between the CPU and the main memory providing separate caches or separate access paths for data and instructions ( the so - called Modified Harvard architecture ) using branch predictor algorithms and logic providing a limited CPU stack or other on - chip scratchpad memory to reduce memory access The problem can also be sidestepped somewhat by using parallel computing, using for example the non-uniform memory access ( NUMA ) architecture -- this approach is commonly employed by supercomputers. It is less clear whether the intellectual bottleneck that Backus criticized has changed much since 1977. Backus 's proposed solution has not had a major influence. Modern functional programming and object - oriented programming are much less geared towards `` pushing vast numbers of words back and forth '' than earlier languages like FORTRAN were, but internally, that is still what computers spend much of their time doing, even highly parallel supercomputers. As of 1996, a database benchmark study found that three out of four CPU cycles were spent waiting for memory. Researchers expect that increasing the number of simultaneous instruction streams with multithreading or single - chip multiprocessing will make this bottleneck even worse. Self - modifying code Aside from the von Neumann bottleneck, program modifications can be quite harmful, either by accident or design. In some simple stored - program computer designs, a malfunctioning program can damage itself, other programs, or the operating system, possibly leading to a computer crash. Memory protection and other forms of access control can usually protect against both accidental and malicious program modification. See also Computer science portal CARDboard Illustrative Aid to Computation Interconnect bottleneck Little man computer Random - access machine Turing machine Neuromorphic engineering References ^ Jump up to : von Neumann, John ( 1945 ), First Draft of a Report on the EDVAC ( PDF ), archived from the original ( PDF ) on March 14, 2013, retrieved August 24, 2011 Jump up ^ Ganesan 2009 Jump up ^ Markgraf, Joey D. ( 2007 ), The Von Neumann Bottleneck, archived from the original on December 12, 2013 Jump up ^ Copeland 2006, p. 104 Jump up ^ MFTL ( My Favorite Toy Language ) entry Jargon File 4.4. 7, retrieved 2008 - 07 - 11 Jump up ^ Turing, A.M. ( 1936 ), `` On Computable Numbers, with an Application to the Entscheidungsproblem '', Proceedings of the London Mathematical Society, 2 ( published 1937 ), 42, pp. 230 -- 65, doi : 10.1112 / plms / s2 - 42.1. 230 ( and Turing, A.M. ( 1938 ), `` On Computable Numbers, with an Application to the Entscheidungsproblem. A correction '', Proceedings of the London Mathematical Society, 2 ( published 1937 ), 43 ( 6 ), pp. 544 -- 6, doi : 10.1112 / plms / s2 - 43.6. 544 ) Jump up ^ `` Electronic Digital Computers '', Nature, 162 : 487, September 25, 1948, doi : 10.1038 / 162487a0, retrieved 2009 - 04 - 10 Jump up ^ Lukoff, Herman ( 1979 ), From Dits to Bits... : A Personal History of the Electronic Computer, Robotics Press, ISBN 978 - 0 - 89661 - 002 - 6 Jump up ^ ENIAC project administrator Grist Brainerd 's December 1943 progress report for the first period of the ENIAC 's development implicitly proposed the stored program concept ( while simultaneously rejecting its implementation in the ENIAC ) by stating that `` in order to have the simplest project and not to complicate matters '' the ENIAC would be constructed without any `` automatic regulation ''. Jump up ^ Copeland 2006, p. 113 Jump up ^ Copeland, Jack ( 2000 ), A Brief History of Computing : ENIAC and EDVAC, retrieved January 27, 2010 Jump up ^ Copeland, Jack ( 2000 ), A Brief History of Computing : ENIAC and EDVAC, retrieved 27 January 2010 which cites Randell, Brian ( 1972 ), Meltzer, B. ; Michie, D., eds., `` On Alan Turing and the Origins of Digital Computers '', Machine Intelligence, Edinburgh : Edinburgh University Press, 7 : 10, ISBN 0 - 902383 - 26 - 4 Jump up ^ Copeland 2006, pp. 108 -- 111 Jump up ^ Bowden 1953, pp. 176,177 Jump up ^ Bowden 1953, p. 135 Jump up ^ `` Electronic Computer Project ''. Institute for Advanced Study. Retrieved May 26, 2011. ^ Jump up to : Campbell - Kelly, Martin ( April 1982 ). `` The Development of Computer Programming in Britain ( 1945 to 1955 ) ''. IEEE Annals of the History of Computing. 4 ( 2 ) : 121 -- 139. doi : 10.1109 / MAHC. 1982.10016. access - date = requires url = ( help ) Jump up ^ James E. Robertson ( 1955 ), Illiac Design Techniques, report number UIUCDCS - R - 1955 - 146, Digital Computer Laboratory, University of Illinois at Urbana - Champaign Jump up ^ F.E. Hamilton ; R.R. Seeber ; R.A. Rowley & E.S. Hughes ( January 19, 1949 ). `` Selective Sequence Electronic Calculator ''. US Patent 2,636,672. Retrieved April 28, 2011. Issued April 28, 1953. Jump up ^ Herbert R.J. Grosch ( 1991 ), Computer : Bit Slices From a Life, Third Millennium Books, ISBN 0 - 88733 - 085 - 1 Jump up ^ Lavington, Simon, ed. ( 2012 ). Alan Turing and his Contemporaries : Building the World 's First Computers. London : British Computer Society. p. 61. ISBN 9781906124908. Jump up ^ Johnson, Roger ( April 2008 ). `` School of Computer Science & Information Systems : A Short History '' ( PDF ). Birkbeck College. University of London. Retrieved 23 July 2017. Jump up ^ C. Gordon Bell ; R. Cady ; H. McFarland ; J. O'Laughlin ; R. Noonan ; W. Wulf ( 1970 ), `` A New Architecture for Mini-Computers -- The DEC PDP - 11 '' ( PDF ), Spring Joint Computer Conference, pp. 657 -- 675. Jump up ^ Linda Null ; Julia Lobur ( 2010 ), The essentials of computer organization and architecture ( 3rd ed. ), Jones & Bartlett Learning, pp. 36, 199 -- 203, ISBN 978 - 1 - 4496 - 0006 - 8 Jump up ^ Backus, John W. `` Can Programming Be Liberated from the von Neumann Style ? A Functional Style and Its Algebra of Programs ''. doi : 10.1145 / 359576.359579. Jump up ^ Dijkstra, Edsger W. `` E.W. Dijkstra Archive : A review of the 1977 Turing Award Lecture ''. Retrieved 2008 - 07 - 11. Jump up ^ Richard L. Sites, Yale Patt. `` Architects Look to Processors of Future ''. Microprocessor report. 1996. Further reading Bowden, B.V., ed. ( 1953 ), Faster Than Thought : A Symposium on Digital Computing Machines, London : Sir Isaac Pitman and Sons Ltd. Rojas, Raúl ; Hashagen, Ulf, eds. ( 2000 ), The First Computers : History and Architectures, MIT Press, ISBN 0 - 262 - 18197 - 5 Davis, Martin ( 2000 ), The universal computer : the road from Leibniz to Turing, New York : WW Norton & Company Inc., ISBN 0 - 393 - 04785 - 7 republished as : Davis, Martin ( 2001 ), Engines of Logic : Mathematicians and the Origin of the Computer, New York : W.W. Norton & Company, ISBN 978 - 0 - 393 - 32229 - 3 Can Programming be Liberated from the von Neumann Style ?, John Backus, 1977 ACM Turing Award Lecture. Communications of the ACM, August 1978, Volume 21, Number 8 Online PDF see details at http://www.cs.tufts.edu/~nr/backus-lecture.html C. Gordon Bell and Allen Newell ( 1971 ), Computer Structures : Readings and Examples, McGraw - Hill Book Company, New York. Massive ( 668 pages ) Copeland, Jack ( 2006 ), `` Colossus and the Rise of the Modern Computer '', in Copeland, B. Jack, Colossus : The Secrets of Bletchley Park 's Codebreaking Computers, Oxford : Oxford University Press, ISBN 978 - 0 - 19 - 284055 - 4 Ganesan, Deepak ( 2009 ), The von Neumann Model ( PDF ), retrieved October 22, 2011 McCartney, Scott ( 1999 ). ENIAC : The Triumphs and Tragedies of the World 's First Computer. Walker & Co. ISBN 0 - 8027 - 1348 - 3. Goldstine, Herman H. ( 1972 ). The Computer from Pascal to von Neumann. Princeton University press. ISBN 0 - 691 - 08104 - 2. Shurkin, Joel ( 1984 ). Engines of the Mind : A history of the Computer. New York, London : W.W. Norton & Company. ISBN 0 - 393 - 01804 - 0. External links Wikimedia Commons has media related to Von Neumann architecture. Harvard vs von Neumann A tool that emulates the behavior of a von Neumann machine JOHNNY : A simple Open Source simulator of a von Neumann machine for educational purposes CPU technologies Architecture Turing machine Post -- Turing machine Universal Turing machine Quantum Turing machine Belt machine Stack machine Register machine Counter machine Pointer machine Random access machine Random access stored program machine Finite - state machine Queue automaton Von Neumann Harvard ( modified ) Dataflow TTA Cellular Artificial neural network Machine learning Deep learning Neural processing unit ( NPU ) Convolutional neural network Load / store architecture Register memory architecture Register register architecture Endianness FIFO Zero - copy NUMA HUMA HSA Mobile computing Surface computing Wearable computing Heterogeneous computing Parallel computing Distributed computing Amorphous computing Ubiquitous computing Fabric computing Reconfigurable computing Cognitive computing DNA computing Peptide computing Chemical computing Organic computing Wetware computing Quantum computing Neuromorphic computing Optical computing Reversible computing Unconventional computing Hypercomputation Ternary computer Symmetric multiprocessing ( SMP ) Asymmetric multiprocessing ( AMP ) Cache hierarchy Memory hierarchy ISA types ASIP CISC RISC EDGE ( TRIPS ) VLIW ( EPIC ) MISC OISC NISC ZISC Comparison ISAs x86 z / Architecture ARM MIPS Power Architecture ( PowerPC ) SPARC VISC Mill Itanium ( IA - 64 ) Alpha Prism SuperH Clipper VAX Unicore PA - RISC MicroBlaze Word size 1 - bit 2 - bit 4 - bit 8 - bit 9 - bit 10 - bit 12 - bit 15 - bit 16 - bit 18 - bit 22 - bit 24 - bit 25 - bit 26 - bit 27 - bit 31 - bit 32 - bit 33 - bit 34 - bit 36 - bit 39 - bit 40 - bit 48 - bit 50 - bit 60 - bit 64 - bit 128 - bit 256 - bit 512 - bit Variable Execution Instruction pipelining Bubble Operand forwarding Out - of - order execution Register renaming Speculative execution Branch predictor Memory dependence prediction Hazards Parallel level Bit Bit - serial Word Instruction Pipelining Scalar Superscalar Task Thread Process Data Vector Memory Multithreading Temporal Simultaneous ( SMT ) ( Hyper - threading ) Speculative ( SpMT ) Preemptive Cooperative Clustered Multi-Thread ( CMT ) Hardware scout Flynn 's taxonomy SISD SIMD ( SWAR ) SIMT MISD MIMD SPMD Addressing mode CPU performance Instructions per second ( IPS ) Instructions per clock ( IPC ) Cycles per instruction ( CPI ) Floating - point operations per second ( FLOPS ) Transactions per second ( TPS ) SUPS Performance per watt Orders of magnitude ( computing ) Cache performance measurement and metric Core count Single - core processor Multi-core processor Manycore processor Types Central processing unit ( CPU ) GPGPU AI accelerator Vision processing unit ( VPU ) Vector processor Barrel processor Stream processor Digital signal processor ( DSP ) I / O processor / DMA controller Network processor Baseband processor Physics processing unit ( PPU ) Coprocessor Secure cryptoprocessor ASIC FPGA FPOA CPLD Microcontroller Microprocessor Mobile processor Notebook processor Ultra-low - voltage processor Multi-core processor Manycore processor Tile processor Multi-chip module ( MCM ) Chip stack multi-chip modules System on a chip ( SoC ) Multiprocessor system - on - chip ( MPSoC ) Programmable System - on - Chip ( PSoC ) Network on a chip ( NoC ) Components Execution unit ( EU ) Arithmetic logic unit ( ALU ) Address generation unit ( AGU ) Floating - point unit ( FPU ) Load - store unit ( LSU ) Fixed - point unit ( FXU ) Vector unit ( VU ) Branch predictor Branch execution unit ( BEU ) Instruction Decoder Instruction Scheduler Instruction Fetch Unit Instruction Dispatch Unit Instruction Sequencing Unit Unified Reservation Station Barrel shifter Uncore Sum addressed decoder ( SAD ) Front - side bus Back - side bus Northbridge ( computing ) Southbridge ( computing ) Adder ( electronics ) Binary multiplier Binary decoder Address decoder Multiplexer Demultiplexer Registers Cache Memory management unit ( MMU ) Input -- output memory management unit ( IOMMU ) Integrated Memory Controller ( IMC ) Power Management Unit ( PMU ) Translation lookaside buffer ( TLB ) Stack engine Register file Processor register Hardware register Memory buffer register ( MBR ) Program counter Microcode ROM Datapath Control unit Instruction unit Re-order buffer Data buffer Write buffer Coprocessor Electronic switch Electronic circuit Integrated circuit Three - dimensional integrated circuit Boolean circuit Digital circuit Analog circuit Mixed - signal integrated circuit Power management integrated circuit Quantum circuit Logic gate Combinational logic Sequential logic Emitter - coupled logic ( ECL ) Transistor -- transistor logic ( TTL ) Glue logic Quantum gate Gate array Counter ( digital ) Bus ( computing ) Semiconductor device Clock rate CPU multiplier Vision chip Memristor Power management APM ACPI Dynamic frequency scaling Dynamic voltage scaling Clock gating Hardware security Non-executable memory ( NX bit ) Bounds checking ( Intel MPX ) Intel Secure Key Hardware restriction ( firmware ) Software Guard Extensions ( Intel SGX ) Trusted Execution Technology OmniShield Trusted Platform Module ( TPM ) Secure cryptoprocessor Hardware security module Hengzhi chip Related History of general - purpose CPUs Retrieved from `` https://en.wikipedia.org/w/index.php?title=Von_Neumann_architecture&oldid=801550288 '' Categories : Computer architecture Flynn 's taxonomy Reference models Classes of computers School of Computer Science, University of Manchester Open problems Computer - related introductions in 1945 John von Neumann Hidden categories : Pages using citations with accessdate and no URL Use mdy dates from September 2012 Wikipedia articles needing clarification from November 2015 All articles with unsourced statements Articles with unsourced statements from December 2010 Talk Contents About Wikipedia Asturianu Azərbaycanca Беларуская Български Català Čeština Dansk Deutsch Eesti Ελληνικά Español Euskara فارسی Français 한국어 Hrvatski Bahasa Indonesia Íslenska Italiano עברית Қазақша Latina Latviešu Magyar Македонски Монгол Nederlands 日本 語 Norsk Polski Português Română Русский Shqip Simple English Slovenčina Српски / srpski Srpskohrvatski / српскохрватски Suomi Svenska ไทย Türkçe Українська Winaray 中文 Edit links This page was last edited on 20 September 2017, at 10 : 44. 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Question: who is accredited with developing the architecture of the modern computer
Answer: John von Neumann