| {"ID": 25, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Overview", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The time complexity of the following algorithm is ( ).\n\nvoid fun(int n){\n int i=1;\n while(i<=n)\n i=i*2;\n}", "A": "O(n)", "B": "O(n^2)", "C": "O(nlog\u2082n)", "D": "O(log2n)", "Answer": "D", "Explanation": "Identify the basic operation i=i*2, with the number of executions denoted as t, then 2^t\u2264n, which implies t\u2264log2n, hence the time complexity T(n)=O(log2n).\nA more intuitive approach: calculate the number of times the basic operation i=i*2 is executed (doubling the main variable with each execution), where the condition can be understood as 2^t=n, that is, t=log2n, thus T(n)=O(log2n)."} | |
| {"ID": 114, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Stack, Queue, and Array", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Assuming a linked list without a head node and all operations are performed at the head of the list, the least suitable option to serve as a linked stack is ().", "A": "A doubly circular linked list with only a head pointer and no tail pointer.", "B": "A doubly circular linked list with only a tail pointer and no head pointer.", "C": "A singly circular linked list with only a head node pointer and no tail node pointer.", "D": "A singly circular linked list with only a tail pointer and no head pointer.", "Answer": "C", "Explanation": "For a doubly linked list, whether it is the head pointer or the tail pointer, it is very convenient to find the head node, which facilitates insertion or deletion operations at the head. In a singly linked list, the head node can be easily found through the tail pointer, but finding the tail node through the head pointer requires traversing the list once. For C, after inserting or deleting a node, finding the tail node takes O(n) time."} | |
| {"ID": 116, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Stack, Queue, and Array", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Given that a, b, c, d, e, f are pushed onto the stack in the given order, if pop operations are allowed during the push operations, the sequence that cannot be obtained is ().", "A": "fedcba", "B": "bcafed", "C": "dcefba", "D": "cabdef", "Answer": "D", "Explanation": "According to the \"last in, first out\" characteristic of a stack, and allowing pop operations while pushing, it is obvious that case D will be the first to be popped out."} | |
| {"ID": 123, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Stack, Queue, and Array", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The enqueuing order of a queue is 1, 2, 3, 4, then the dequeuing output order is ().", "A": "4, 3, 2, 1", "B": "1,2,3,4", "C": "1,4,3,2", "D": "3, 2, 4, 1", "Answer": "B", "Explanation": "The order of enqueuing and dequeuing in a queue is consistent, which is different from a stack."} | |
| {"ID": 125, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Stack, Queue, and Array", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Assuming a circular queue Q[MaxSize] with the head pointer as front and the tail pointer as rear, and the maximum capacity of the queue is MaxSize, without any other data members, the condition for the queue being full is ().", "A": "Q.front == Q.rear", "B": "If Q.front + Q.rear >= Maxsize", "C": "Q.front == (Q.rear + 1) % MaxSize", "D": "Q.rear == (Q.front + 1) % Maxsize", "Answer": "C", "Explanation": "Since no additional data members can be added, the only method to distinguish between an empty queue and a full queue is to sacrifice one storage unit. It is agreed that \"the queue is full when the front pointer is at the position right after the rear pointer,\" hence option C is selected. Option A is the condition for determining if the queue is empty, while options B and D are distractors."} | |
| {"ID": 126, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Stack, Queue, and Array", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "If 1, 2, 3, 4 are used as the input sequence for a double-ended queue, the output sequence that cannot be obtained by either an input-restricted double-ended queue or an output-restricted double-ended queue is ().", "A": "1, 2, 3, 4", "B": "4, 1, 3, 2", "C": "4, 2, 3, 1", "D": "4, 2, 1, 3", "Answer": "C", "Explanation": "Use the elimination method. First, consider the sequences that can be generated by a double-ended queue with input restrictions: assume the right end is input-restricted, and 1, 2, 3, 4 are inserted from the left in order, then by extracting from the left in order we get 4, 3, 2, 1, which eliminates option A; by extracting right, left, right, right, we get 4, 1, 3, 2, which eliminates option B; next, consider the sequences that can be generated by a double-ended queue with output restrictions: assume the right end is output-restricted, and 1, 2, 3, 4 are inserted left, left, right, left, then by extracting from the left in order we get 4, 2, 1, 3, which eliminates option D."} | |
| {"ID": 127, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Stack, Queue, and Array", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The postfix expression for the expression a*(b+c)-d is ().", "A": "abcd*+-", "B": "abc+*d-", "C": "abc*+d-", "D": "-+*abcd", "Answer": "B", "Explanation": "In postfix notation, each operator is placed directly after its two operands, and each expression is transformed step by step according to the precedence of operations to obtain the postfix expression."} | |
| {"ID": 193, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Tree", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Given a binary tree with only nodes of degree 0 and 2, and the number of nodes is 15, the maximum depth of the binary tree is ().", "A": "4", "B": "5", "C": "8", "D": "9", "Answer": "C", "Explanation": "The first layer has one node, and each of the remaining h-1 layers has two nodes, with a total number of nodes = 1+2(h-1)=15, h=8."} | |
| {"ID": 194, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Tree", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "If a binary tree has 126 nodes, the maximum number of nodes on the 7th level (with the root node at level 1) is ().", "A": "32", "B": "64", "C": "63", "D": "There is no seventh layer.", "Answer": "C", "Explanation": "To maximize the number of nodes on the 7th level of a binary tree, considering only trees with a height of 7 levels, a full binary tree with 7 levels has 127 nodes. Since 126 is only one less than 127, the reduction can only occur on the 7th level. Therefore, the 7th level can have at most 2^6-1=63 nodes."} | |
| {"ID": 206, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Tree", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The possible inorder traversal sequence of a binary tree with the preorder traversal sequence of 1234567 could be ().", "A": "3124567", "B": "1234567", "C": "4135627", "D": "1463572", "Answer": "B", "Explanation": "From the problem, we know that 1 is the root node, and 2 is the child of 1. For option A, 3 should be the left child of 1, and the preorder sequence should start with 13..., which is incorrect. Similarly, option C is also incorrect. For option B, 2 is the right child of 1, and 3 is the right child of 2..., which meets the requirements of the problem. For option D, 463572 should be the right subtree of 1, with 2 as the right child of 1, 46357 as the left subtree of 2, 3 as the left child of 2, 46 as the left subtree of 3, and 57 as the right subtree of 3. The preorder sequence should have 4 and 6 connected, as well as 5 and 7 connected, which is not the case."} | |
| {"ID": 208, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Tree", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Given that the level order sequence of a binary tree is ABCDEF and the inorder sequence is BADCFE, the preorder sequence is ().", "A": "ACBEDF", "B": "ABCDEF", "C": "BDFECA", "D": "FCEDBA", "Answer": "B", "Explanation": "By constructing a binary tree, we can obtain"} | |
| {"ID": 212, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Tree", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following statements about trees, the correct one is ( ).\n\n\u2160. For a binary tree with n nodes, its height is log2n\n\u2161. In a complete binary tree, if a node does not have a left child, then it must be a leaf node\n\u2162. A complete binary tree with height h (h>0) corresponds to a forest containing exactly h trees\n\u2163. The number of leaves in a tree is always equal to the number of leaves in its corresponding binary tree", "A": "\u2160,\u2162", "B": "\u2163", "C": "\u2160,\u2161", "D": "\u2161", "Answer": "D", "Explanation": "If a binary tree with n nodes is a single-branched tree, then its height is n. In a complete binary tree, there can be at most one node with degree 1, and it only has a left child. If there is no left child, then there must not be a right child either, so it must be a leaf node, so statement I is correct. Only a full binary tree possesses property II. When a tree is converted into a binary tree, if there are several leaf nodes with the same parent, after the conversion to a binary tree, there will only be one leaf node (the rightmost leaf node), so statement IV is incorrect."} | |
| {"ID": 214, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Tree", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Let F be a forest, and B be a binary tree transformed from F. If there are n non-terminal nodes in F, then there are () nodes in B with an empty right pointer field.", "A": "n-1", "B": "n", "C": "n+1", "D": "n+2", "Answer": "C", "Explanation": "According to the \"left child right sibling\" conversion rule between forests and binary trees, a right pointer field in binary tree B being empty indicates that the node has no sibling. In the forest, the root nodes of each tree, starting from the second one, are successively connected to the right child of the root of the previous tree, so the right pointer of the root node of the last tree is empty. Additionally, for each non-terminal node, the right pointer of the last child node is also empty after the conversion. Therefore, there are n+1 nodes in tree B with an empty right pointer field."} | |
| {"ID": 218, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Tree", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The two core operations in a Union-Find set data structure are: \u2460 Find, which determines whether two elements belong to the same set; \u2461 Union, which merges two sets if the elements are not in the same set and the sets are disjoint. Assuming an initial disjoint-set of length 10 (0~9), and performing find and union operations in the sequence of 1-2, 3-4, 5-6, 7-8, 8-9, 1-8, 0-5, 1-9, the final number of sets in the disjoint-set is ().", "A": "1", "B": "2", "C": "3", "D": "4", "Answer": "C", "Explanation": "Initially, 0 to 9 each form a separate set. When searching for 1-2, merge {1} and {2}; when searching for 3-4, merge {3} and {4}; when searching for 5-6, merge {5} and {6}; when searching for 7-8, merge {7} and {8}; when searching for 8-9, merge {7,8} with {9}; when searching for 1-8, merge {1,2} with {7,8,9}; when searching for 0-5, merge {0} with {5,6}; when searching for 1-9, they belong to the same set. The final sets are {0,5,6}, {1,2,7,8,9}, and {3,4}, therefore the answer is option C."} | |
| {"ID": 257, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Graph", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "An undirected graph G has 23 edges, 5 vertices of degree 4, 4 vertices of degree 3, and the rest are vertices of degree 2. Then, graph G has ( ) vertices:", "A": "11", "B": "12", "C": "15", "D": "16", "Answer": "D", "Explanation": "In an undirected graph with n vertices and e edges, it can be determined that there are 7 vertices with a degree of 2, thus there are a total of 16 vertices."} | |
| {"ID": 268, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Graph", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The following methods can be used to determine whether a directed graph contains a cycle is ():\n\u2160. Depth-first traversal\n\u2161. Topological sorting\n\u2162. Finding the shortest path\n\u2163. Finding the critical path", "A": "\u2160,\u2161,\u2163", "B": "\u2160,\u2162,\u2163", "C": "\u2160,\u2161,\u2162", "D": "All possible", "Answer": "A", "Explanation": "Using depth-first traversal, if starting from a vertex u on a directed graph, an edge from vertex v to u appears before the end of DFS(u), since v is a descendant of u in the spanning tree, there must be a cycle in the graph that includes both u and v. Therefore, depth-first traversal can detect whether a directed graph has a cycle. During topological sorting, a vertex can only be added to the sequence when it is not the head of any edge. If there is a cycle, the vertices in the cycle are always the head of some edge and cannot be added to the topological sequence. In other words, if there are still vertices that cannot be found to be added to the topological sequence, it indicates that the graph has a cycle. Finding the shortest path allows the graph to have cycles. As for whether the critical path can determine if a graph has a cycle, there is some controversy. Although the critical path itself does not allow cycles, the algorithm for finding the critical path cannot determine whether there are cycles. Determining whether there are cycles is the first step in finding the critical path\u2014topological sorting. Therefore, the answer to this question mainly depends on the perspective from which you approach the problem. Candidates need to understand the issue itself, as the real unified examination will not involve such ambiguous questions."} | |
| {"ID": 301, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Searching", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Two lists composed of n data elements: one in ascending order and the other unordered, use the sequential search algorithm. For the ordered list, start searching from the beginning and stop when the current element is no longer less than the element to be searched, concluding that the search is unsuccessful. Given that the probability of searching for any element is the same, the probability of a successful search in both types of lists is ( ).", "A": "The average time for the latter is smaller.", "B": "The average time is the same for both.", "C": "The average time of the former is less.", "D": "Unable to determine", "Answer": "B", "Explanation": "For sequential search, regardless of whether the linear list is ordered or unordered, the number of comparisons to successfully find the first element is 1, the number of comparisons to successfully find the second element is 2, and so on. That is, the number of comparisons for successful search of each element is only related to its position (irrelevant to whether it is ordered), hence the average time for a successful search is the same for both."} | |
| {"ID": 302, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Searching", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following statements about binary search, the correct one is ().", "A": "Tables must be ordered, they can be stored sequentially or through linked list storage.", "B": "Tables must be ordered and the data within must be of integer, real, or character type.", "C": "Tables must be ordered and arranged in ascending order only.", "D": "Tables must be ordered and can only be stored in a sequential manner.", "Answer": "D", "Explanation": "Binary search locates the middle element by index, so sequential storage should be used, and the prerequisite for binary search is that the lookup table must be sorted, although it does not specify whether the order is from largest to smallest or from smallest to largest."} | |
| {"ID": 309, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Searching", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "For a binary search tree, the following statement is correct: ( )", "A": "A binary search tree is a dynamic tree structure where a new node is inserted when a search fails, causing the tree to be restructured through splits and recombination.", "B": "Performing a level-order traversal on a binary search tree yields a sorted sequence.", "C": "Construct a binary search tree using the method of point-by-point insertion. If the keys are inserted in order, the maximum depth of the binary search tree is.", "D": "In a binary search tree, the number of comparisons of keys does not exceed the logarithm (base 2) of the number of nodes.", "Answer": "C", "Explanation": "Inserting a new node into a binary sort tree does not cause the tree to split or combine. An inorder traversal of a binary sort tree yields a sorted sequence. When the keys inserted are in order, the binary sort tree will form a long chain, at which point the depth is at its maximum. In this case, when performing a search, it may be necessary to compare the keys of each node, exceeding half of the total number of nodes."} | |
| {"ID": 311, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Searching", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Construct binary search trees using the following sequences, which differ from the results constructed with the other three sequences are ().", "A": "(100, 80, 90, 60, 120, 110, 130)", "B": "(100,120,110,130,80,60,90)", "C": "(100, 60, 80, 90, 120, 110, 130)", "D": "(100, 80, 60, 90, 120, 130, 110)", "Answer": "C", "Explanation": "Following the construction method of a binary sort tree, it is not difficult to obtain that the construction results of the sequences A, B, and D are the same."} | |
| {"ID": 314, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Searching", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Before performing an insertion operation in a B-tree of order m, if the number of keys in a node equals (), it must be split into two nodes. Before performing a deletion operation in a B-tree of order m, if the number of keys in a node equals (the minimum number of keys that node should contain), it may need to be merged with its left or right sibling node.", "A": "m, [m/2] - 2", "B": "m-1, [m/2]-1", "C": "m + 1, \u230am/2\u230b", "D": "m/2, [m/2] + 1", "Answer": "B", "Explanation": "Since each node in a B-tree can contain at most m-1 keys, it should be split when the number of keys exceeds m-1. Additionally, each node must contain at least [m/2]-1 keys, so if the number of keys falls below [m/2]-1, it should be merged with other nodes."} | |
| {"ID": 316, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Searching", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following statements about B-trees and B+-trees, the incorrect one is ().", "A": "B-trees and B+-trees both effectively support sequential search.", "B": "B-trees and B+-trees both effectively support random search.", "C": "B-trees and B+-trees are both balanced multiway trees.", "D": "B-trees and B+ trees can both be used for file indexing structures.", "Answer": "A", "Explanation": "The differences between B-trees and B+-trees are mainly reflected in: \u2460 The number of node keys and subtrees; \u2461 B+-tree non-leaf nodes serve only as indexes; \u2462 B-tree leaf node keys are unique and do not duplicate keys in other nodes; \u2463 B+-trees support both sequential and random searches, while B-trees only support random searches. Since all leaf nodes in a B+-tree contain all the key information and are linked in ascending order by key, sequential searches can be performed, which is not supported by B-trees."} | |
| {"ID": 319, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Searching", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Assuming there are K keywords that are synonyms, if the linear probing method is used to insert these K keywords into a hash table, at least () probes must be conducted.", "A": "K-1", "B": "K", "C": "K+ 1", "D": "K(K + 1)/2", "Answer": "D", "Explanation": "During the process of sequentially inserting K keywords, only the first one will not encounter a collision, thus the number of probes is (1+2+3+...+K)=K(K+1)/2, which means the correct answer is D."} | |
| {"ID": 352, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Sorting", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Shell sort belongs to ().", "A": "Insertion Sort", "B": "Exchange Sort", "C": "Selection Sort", "D": "Merge Sort", "Answer": "A", "Explanation": "Shell sort is an improved version of the direct insertion sort algorithm and is essentially still a type of insertion sort."} | |
| {"ID": 354, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Sorting", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "For the sequence {98,36,-9,0,47,23,1,8,10,7}, using Shell sort, the following sequence () is the result of one pass with an increment of 4.", "A": "{10, 7, -9, 0, 47, 23, 1, 8, 98, 36}", "B": "{-9,0,36,98,1,8,23,47,7,10}", "C": "{36, 98, 9, 0, 23, 47, 1, 8, 7, 10}", "D": "None of the above is correct.", "Answer": "A", "Explanation": "An increment of 4 means that all records at a distance of 4 form a group, and then a straight insertion sort is performed within the group. Upon observation, only option A meets the requirement."} | |
| {"ID": 361, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Sorting", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The key codes of a set of records are (46, 79, 56, 38, 40, 84). Using the quick sort method with the first record as the pivot, the result of one partition in ascending order is ().", "A": "(38, 40, 46, 56, 79, 84)", "B": "(40, 38, 46, 79, 56, 84)", "C": "(40, 38, 46, 56, 79, 84)", "D": "(40,38.146.84.56,79)", "Answer": "C", "Explanation": "Using 46 as the pivot element, first scan backwards for elements smaller than 46 and swap them, then scan forwards for elements larger than 46 and swap 46 with those elements, resulting in {40, 46, 56, 38, 79, 84}. After that, continue repeating the backward scanning and forward scanning operations until 46 is in its final position. The answer is option C."} | |
| {"ID": 363, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Sorting", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "For the data sequence {8,9,10,4,5,6,20,1,2}, using bubble sort (in reverse order, requiring ascending order), the minimum number of passes required is ().", "A": "3", "B": "4", "C": "5", "D": "8", "Answer": "C", "Explanation": "The process of \"bubbling\" from back to front is as follows: the 1st pass (1,8,9,10,4,5,6,20,2), the 2nd pass (1,2,8,9,10,4,5,6,20), the 3rd pass (1,2,4,8,9,10,5,6,20), the 4th pass (1,2,4,5,8,9,10,6,20), the 5th pass (1,2,4,5,6,8,9,10,20). After the 5th pass, the sequence is already globally ordered, hence option C is chosen. In practice, after each bubble exchange, it is possible to determine whether it will lead to new inversions. If not, the sequence is globally ordered after that pass, so a minimum of 5 passes is sufficient."} | |
| {"ID": 365, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Sorting", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following sequences, ( ) could be the sequence obtained after performing the first quicksort pass.\n\u2160. {68,11,18,69,23,93,73}\n\u2161. {68,11,69,23,18,93,73}\n\u2162. {93,73, 68,11,69,23,18}\n\u2163. {68,11,69,23,18,73,93}", "A": "\u2160,\u2163", "B": "\u2161,\u2162", "C": "\u2162,\u2163", "D": "\u2163", "Answer": "C", "Explanation": "Clearly, if sorted from smallest to largest, the final ordered sequence is {11,18,23,68,69,73,93}; if sorted from largest to smallest, the final ordered sequence is {93,73,69,68,23,18,11}. By comparison, it is evident that there are no elements in their final positions in both I and II, hence I and II are both impossible. In III, 73 and 93 are in their final positions after sorting from largest to smallest, and 73 divides the sequence into two parts: those greater than 73 and those less than 73, therefore III is possible. In IV, 73 and 93 are in their final positions after sorting from smallest to largest, and 73 also divides the sequence into parts greater than 73 and less than 73."} | |
| {"ID": 366, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Sorting", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In the following sorting algorithms, the method that selects the record with the smallest key from the unsorted records each time and adds it to the end of the sorted records is ( ).", "A": "Simple Selection Sort", "B": "Bubble Sort", "C": "Heap Sort", "D": "Direct Insertion Sort", "Answer": "A", "Explanation": "Simple Selection Sort"} | |
| {"ID": 367, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Sorting", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The number of comparisons and the number of movements for the simple selection sort algorithm are respectively ().", "A": "O(n), O(log2n)", "B": "O(log2n), O(n^2)", "C": "O(n^2), O(n)", "D": "O(nlog2n), O(n)", "Answer": "C", "Explanation": "The number of comparisons for simple selection sorting is O(n^2) and the number of moves is O(n)"} | |
| {"ID": 370, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Sorting", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following sorting methods, the one whose number of comparisons during the sorting process is independent of the initial state of the sequence is ().", "A": "Merge Sort", "B": "Insertion Sort", "C": "Quick Sort", "D": "Bubble Sort", "Answer": "A", "Explanation": "The number of comparisons of the merge sort is independent of the initial state of the sequence."} | |
| {"ID": 382, "Split": "Test", "Domain": "Data Structure and Algorithm", "SubDomain": "Sorting", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following descriptions of the role of input/output buffers in the external sorting process, the incorrect one is ().", "A": "Temporary store Input/Output Log", "B": "internal merge workspace", "C": "Workspace for generating initial merge segments", "D": "Transmitting messages of the user interface", "Answer": "D", "Explanation": "In the external sorting process, the input/output buffer serves as the memory workspace for sorting. For instance, an m-way balanced merge requires m input buffers and 1 output buffer to hold the records participating in the merge and the records that have been merged. It can also be used as the workspace for internal sorting when generating initial merge segments. It does not have the task of conveying messages to the user interface."} | |
| {"ID": 566, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Overview", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Regarding CPU clock speed, CPI, MIPS, and MFLOPS, the correct statement is ( ).", "A": "The CPU clock speed refers to the frequency at which the CPU system executes instructions, while CPI represents the average frequency used to execute a single instruction.", "B": "CPI represents the average number of CPU clock cycles used to execute an instruction, while MIPS describes the average number of CPU instructions executed per CPU clock cycle.", "C": "MIPS describes the frequency at which a CPU executes instructions, while MFLOPS measures the floating-point instructions of a computer system.", "D": "CPU clock speed refers to the frequency of the clock pulses used by the CPU, while CPI represents the average number of CPU clock cycles required to execute one instruction.", "Answer": "D", "Explanation": "CPI is the average number of CPU clock cycles used to execute an instruction, while MIPS describes the average number of CPU instructions executed per CPU clock cycle."} | |
| {"ID": 594, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Data Representation and Operation", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "What is the value of the two's complement fixed-point integer 01010101 after it is shifted left by two positions?", "A": "0100 0111", "B": "0101 0100", "C": "0100 0110", "D": "0101 0101", "Answer": "B", "Explanation": "When performing a left shift on a two's complement number, the most significant bit is shifted out and a 0 is added to the least significant bits. Therefore, the value of 01010101 after shifting left by two positions is 01010100."} | |
| {"ID": 601, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Data Representation and Operation", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "True form multiplication is ().", "A": "First, multiply the absolute values of the operands, and handle the sign bit separately.", "B": "Use the original code to represent the operands, and then multiply directly.", "C": "The multiplicand is represented in true form, while the multiplier is taken as its absolute value, and then they are multiplied.", "D": "The multiplier is represented in true form, and the multiplicand is taken as its absolute value before multiplication.", "Answer": "A", "Explanation": "In one-bit multiplication of true form, the sign bit and the value bits are operated on separately. The value part of the result is the product of the value bits of the multiplier and the multiplicand, while the sign is the XOR of the sign bits of the multiplier and the multiplicand."} | |
| {"ID": 602, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Data Representation and Operation", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "x and y are fixed-point integers, formatted with 1 sign bit and n value bits. If two's complement single-bit multiplication is used to implement the multiplication operation, then at most ( ) addition operations are needed.", "A": "n-1", "B": "n", "C": "n+1", "D": "n+2", "Answer": "C", "Explanation": "In one-bit multiplication using two's complement, at most n shifts and n+1 additions are required."} | |
| {"ID": 604, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Data Representation and Operation", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In true form multiplication, the method of handling the product's sign bit separately is ( ).", "A": "The two operands are combined with an \"AND\" operation.", "B": "The two operands are \"or\" connected.", "C": "The two operands undergo an \"exclusive or\" (XOR) operation.", "D": "The sign of the number with the greater absolute value among the two operands.", "Answer": "C", "Explanation": "In true form multiplication, the sign bit is processed separately. The sign of the product is the \"exclusive or\" of the signs of the two operands, with like signs yielding a positive result and unlike signs yielding a negative result."} | |
| {"ID": 611, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Data Representation and Operation", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In an 8-bit computer, x and y are two signed integers represented in two's complement, with [x]\u2082's complement = 44H and [y]\u2082's complement = DCH, then the machine code for x/2 + 2y and the corresponding overflow flag OF are ( ).", "A": "CAH\u30010", "B": "CAH\u30011", "C": "DAH\u30010", "D": "DAH\u30011", "Answer": "C", "Explanation": "The complement of [x/2+2y] is the complement of [x] right-shifted by 1 plus the complement of [y] left-shifted by 1, which equals 0100 0100 right-shifted by 1 plus 1101 1100 left-shifted by 1, resulting in 0010 0010 + 1011 1000, which equals 1101 1010 or DAH. From the final addition operation, it is clear that a positive number is being added to a negative number, which definitely will not cause an overflow."} | |
| {"ID": 668, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Storage System", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Assuming a machine word length of 32 bits and a memory capacity of 16MB, the CPU addresses by half-word, the number of addressable units is ( ).", "A": "2^24", "B": "2^23", "C": "2^22", "D": "2^21", "Answer": "B", "Explanation": "16MB = 2^24B, and since the word length is 32 bits, the number of addressable units when addressing by half-word (2B) is 2^24B/2B = 2^23."} | |
| {"ID": 672, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Storage System", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The following are descriptions of DRAM and SRAM memory chips: I. DRAM chips have higher integration than SRAM chips II. DRAM chips are more expensive than SRAM chips III. DRAM chips are faster than SRAM chips IV. DRAM chips require refreshing during operation, while SRAM chips do not require refreshing. Usually, the incorrect statement is ( ).", "A": "Type I and Type II", "B": "II and III", "C": "III and IV", "D": "I and IV", "Answer": "B", "Explanation": "DRAM has a higher integration level than SRAM, and SRAM is faster than DRAM; therefore, statements II and III are incorrect."} | |
| {"ID": 681, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Storage System", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In Cache, commonly used replacement strategies include Random (RAND), First In First Out (FIFO), and Least Recently Used (LRU). Among these, the one related to the principle of locality is ( ).", "A": "Random Method (RAND)", "B": "First-In, First-Out method (FIFO)", "C": "Least Recently Used (LRU)", "D": "None of them", "Answer": "C", "Explanation": "The LRU algorithm selects the least recently used memory block based on the principle of locality of reference."} | |
| {"ID": 682, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Storage System", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Assuming the main memory address is 32 bits, byte-addressable, and the mapping between main memory and Cache is fully associative, with a main memory block size of one word, each word being 32 bits, using write-back policy and random replacement strategy, then a Cache that can store 32K words of data should have a total capacity of at least ( ) bits.", "A": "1536K", "B": "1568K", "C": "2016K", "D": "2048K", "Answer": "D", "Explanation": "The total capacity calculated based on various parameters is 2048K bit."} | |
| {"ID": 731, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Instruction System", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The following statement is incorrect ( )", "A": "To facilitate instruction fetching, the length of an instruction is usually an integer multiple of the storage word length.", "B": "Single-address instructions are of fixed length.", "C": "Fixed word length instructions can speed up instruction fetch.", "D": "Single-address instructions may have one operand or two operands.", "Answer": "B", "Explanation": "The number of addresses in an instruction does not necessarily correlate with the fixed length of the instruction; even single-address instructions may vary in length due to different addressing modes for the single address."} | |
| {"ID": 736, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Instruction System", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Assuming the value in register R is 200, and the contents of the main memory cells at addresses 200 and 300 are 300 and 400 respectively, the operand accessed in the () mode is 200.", "A": "Direct addressing 200", "B": "Register indirect addressing (R)", "C": "Memory indirect addressing (200)", "D": "Register Addressing R", "Answer": "D", "Explanation": "Register addressing R means the content of register R is the operand, only D is correct."} | |
| {"ID": 739, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Instruction System", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The correct statement among the following is ( ).", "A": "RISC machines definitely employ pipelining technology.", "B": "Machines that employ pipeline technology are necessarily RISC machines.", "C": "RISC machines have better compatibility than CISC machines.", "D": "The CPU is equipped with very few general-purpose registers.", "Answer": "A", "Explanation": "RISC inherently adopts pipeline technology, which is determined by the characteristics of its instructions. CISC, on the other hand, does not have this mandatory requirement, but in order to increase the speed of instruction execution, CISC often also employs pipeline technology. Therefore, pipeline technology is not exclusive to RISC."} | |
| {"ID": 790, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Central Processing Unit", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following statements about the Program Counter (PC), the incorrect one is ( ).", "A": "The PC always holds the instruction address.", "B": "The value of the PC is modified by the CPU during the execution of instructions.", "C": "During a jump instruction, the value of the PC is always changed to the target address of the jump instruction.", "D": "The bit size of a PC generally matches the number of bits in the Memory Address Register (MAR).", "Answer": "C", "Explanation": "The PC holds the address of the next instruction to be executed, so option A is correct. The value of the PC is modified during the execution of instructions by the CPU (specifically at the end of the fetch cycle), either by incrementing or by jumping to a certain part of the program, so option B is correct. When a jump instruction is executed, it is necessary to determine whether the jump is successful; if it is, the PC is changed to the target address of the jump instruction, otherwise, the address of the next instruction remains the address after the PC is incremented, so option C is incorrect. The PC has the same number of bits as the MAR, so option D is correct."} | |
| {"ID": 797, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Central Processing Unit", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The speed of a microprogrammed control unit is slower than that of a hardwired control unit, mainly because ( )", "A": "Increased the time to read microinstructions from disk storage.", "B": "Increased the time to read microinstructions from main memory.", "C": "Increased the time to read micro-instructions from the instruction register.", "D": "Increased the time to read microinstructions from the control memory.", "Answer": "D", "Explanation": "In microprogram control, microinstructions are stored in the control memory, and the corresponding microinstructions need to be read out during execution, which increases the time consumption."} | |
| {"ID": 800, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Central Processing Unit", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In the microprogram control method, the correct statements are ( )I. A processor that uses a microprogram controller is called a microprocessor II. Each machine instruction is interpreted and executed by a microprogram III. In the encoding of microinstructions, the least efficient is the direct encoding method IV. Horizontal microinstructions can fully utilize the parallel structure of the data path.", "A": "I, II", "B": "II, IV", "C": "I, III", "D": "III, IV", "Answer": "B", "Explanation": "A microprocessor is relative to some larger processors and is not necessarily associated with a microprogrammed controller. Whether a microprogrammed controller or a hardwired controller is used, the CPU of a microcomputer is still a microprocessor, which is incorrect. The design idea of microprogramming is to write each machine instruction as a microprogram, which contains several microinstructions, each corresponding to one or several micro-operations, which is correct. In the direct encoding method, each bit represents a micro-operation and does not require decoding, thus the execution efficiency is the highest, but this method significantly increases the number of bits in the microinstruction, which is incorrect. A horizontal microinstruction can define and execute several parallel basic operations, thus making fuller use of the parallel structure of the data path, which is correct."} | |
| {"ID": 801, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Central Processing Unit", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following statements, the correct one(s) is (are) ( )I. Compared to hardwired control, microprogrammed control can make the execution of instructions faster.II. If microprogrammed control is used, uPC can replace PC.III. Control memory can be implemented using ROM.IV. Instruction cycle is also known as CPU cycle", "A": "I, III", "B": "II, III", "C": "Only III", "D": "I, II, III, IV", "Answer": "C", "Explanation": "Microprogram control uses a programming approach to execute instructions, while hardwired control uses a hardware approach, hence the latter is faster, I incorrect. HPC cannot replace PC, as it is merely a register that points to the address of the next microinstruction in a microprogram. Therefore, it cannot possibly know what the next instruction will be after the completion of this microprogram, II incorrect. Since the control signals emitted during the execution of each microinstruction are pre-designed and do not need to be changed, the memory that stores all control signals should be ROM, III correct. Instruction cycle refers to the interval from the start of one instruction to the start of the next, while CPU cycle is the machine cycle, which refers to the time required for each step of instruction execution, IV incorrect."} | |
| {"ID": 806, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Central Processing Unit", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following descriptions of dynamic pipelines, the correct one is ( ).", "A": "A dynamic pipeline refers to a situation where, at the same time, some segments are performing one type of operation while other segments are conducting another type of operation. This is beneficial for improving the efficiency of the pipeline, but it can make pipeline control quite complex.", "B": "Dynamic pipeline refers to parallel computational operations.", "C": "Dynamic pipeline refers to the parallelism of steps.", "D": "Dynamic pipelining refers to the parallel execution of program steps.", "Answer": "A", "Explanation": "Dynamic pipeline is in contrast to static pipeline. The connection method between the upper and lower sections of a static pipeline is fixed, whereas the connection method of a dynamic pipeline is variable. Therefore, A is correct."} | |
| {"ID": 871, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Input/Output System", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following statements about I/O devices, the correct one is ( ). I. Keyboard, mouse, monitor, and printer are human-computer interaction devices II. In microcomputers, VGA represents a video transmission standard III. Printers can be classified from the typing principle perspective into dot matrix printers and character printers IV. The mouse is suitable for implementing input operations through the interrupt method.", "A": "II, III, IV", "B": "I, II, IV", "C": "I, II, III", "D": "I, II, III, IV", "Answer": "B", "Explanation": "Only I, II, and IV are consistent with the actual situation."} | |
| {"ID": 875, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Input/Output System", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The incorrect statement about program interrupt mode and DMA mode is ( )I. The priority of DMA is higher than that of program interrupts II. Program interrupt mode requires context saving, while DMA mode does not require context saving III. The interrupt request in program interrupt mode is to report the end of data transfer to the CPU, whereas the interrupt request in DMA mode is solely for data transfer.", "A": "Only II", "B": "II, III", "C": "Only III", "D": "I, III", "Answer": "C", "Explanation": "DMA (Direct Memory Access) mode does not require CPU pre-transfer operations, only borrowing a little CPU time at the beginning and end, without occupying any other CPU resources. Interrupt mode involves program switching, where each operation requires saving and restoring the context, so DMA has a higher priority than interrupt requests, thereby speeding up processing efficiency. Therefore, statement I is correct. From the analysis, it is known that program interrupts require interrupting the current program, hence the need to save the context so that after the interrupt is completed, it can return to the original point to continue the unfinished work. DMA mode does not need to interrupt the current program and does not require saving the context, so statement I is correct. Statement II is just the opposite."} | |
| {"ID": 877, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Input/Output System", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Interrupt responses should be prioritized from high to low using ( ).", "A": "Access Control \u2192 Procedural \u2192 Machine Failure", "B": "Access Control \u2192 Procedural \u2192 Reboot", "C": "External \u2192 Access Control \u2192 Procedural", "D": "Procedural \u2192 I/O \u2192 Supervisor Call", "Answer": "B", "Explanation": "The priority order of interrupt responses from high to low is supervisor call \u2192 program \u2192 restart."} | |
| {"ID": 880, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Input/Output System", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In the interrupt response cycle, the primary task accomplished by the CPU is ().", "A": "Enable interrupts, maintain breakpoints, send interrupt response signals and generate vector addresses.", "B": "Disable interrupts, save breakpoints, issue interrupt response signals, and generate vector addresses.", "C": "Upon interrupt, execute the interrupt service routine (ISR).", "D": "Enable interrupts, execute the interrupt service routine (ISR).", "Answer": "B", "Explanation": "During the interrupt response cycle, the CPU primarily accomplishes the tasks of disabling interrupts, saving the context, sending an interrupt acknowledgment signal, and generating a vector address."} | |
| {"ID": 883, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Input/Output System", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following statements, ( ) is correct.", "A": "Both the program interrupt method and the DMA (Direct Memory Access) method require an interrupt request to implement data transfer.", "B": "DMA requests, non-maskable interrupts, and maskable interrupts can all be responded to only after the current instruction has finished.", "C": "Both the interrupt-driven method and DMA (Direct Memory Access) involve interrupt requests, but they serve different purposes.", "D": "DMA must wait until the current cycle ends before it can perform cycle stealing.", "Answer": "C", "Explanation": "Both the interrupt-driven method and DMA (Direct Memory Access) involve interrupt requests, but their purposes differ."} | |
| {"ID": 885, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Input/Output System", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Regarding external interrupts (excluding faults) and DMA, the correct statement among the following is ( ).", "A": "When a DMA request and an interrupt request occur simultaneously, the DMA request is responded to.", "B": "DMA requests, non-maskable interrupts, and maskable interrupts can only be responded to after the current instruction has finished.", "C": "Non-maskable interrupt requests have the highest priority, while maskable interrupt requests have the lowest priority.", "D": "If interrupts are not enabled, all interrupt requests cannot be responded to.", "Answer": "A", "Explanation": "DMA requests have a higher priority than interrupt requests, so when DMA and interrupt requests occur simultaneously, the CPU will respond to the DMA request."} | |
| {"ID": 886, "Split": "Test", "Domain": "Computer Organization", "SubDomain": "Input/Output System", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The following statement about DMA mode is incorrect ( ).", "A": "In DMA mode, the DMA controller requests bus access from the CPU.", "B": "DMA mode can be used for data input from keyboards and mice.", "C": "During the data transfer phase, there is no need for CPU intervention; it is entirely controlled by the DMA controller.", "D": "DMA mode requires the use of interrupt handling.", "Answer": "B", "Explanation": "DMA mode is generally not used for data input from keyboards and mice, as these devices require immediate CPU response and cannot wait for the DMA controller to control data transfer."} | |
| {"ID": 1134, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Overview and Architecture", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following statements about broadcast networks, the incorrect one is ( )", "A": "Shared Broadcast Channel", "B": "There is no route selection problem.", "C": "You can do without the network layer.", "D": "No need for service access point", "Answer": "D", "Explanation": "Broadcast networks share a broadcast channel (such as a bus), which is commonly a communication method for local area networks (LANs operating at the data link layer). Therefore, the network layer is not required, and consequently, there is no issue of routing selection. However, the data link layer must access the services of the physical layer through Service Access Points (SAPs)."} | |
| {"ID": 1135, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Overview and Architecture", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Which of the following best describes the function of the Data Link Layer of the OSI reference model? ( )", "A": "Provide an interface for users and the network.", "B": "Signal processing through medium transmission", "C": "Control messages are routed through the network.", "D": "Ensure the correct sequence and integrity of data.", "Answer": "D", "Explanation": "The functions of the data link layer include establishing, dismantling, separating, framing, and synchronizing link connections, as well as error detection, etc. A represents the functions of the application layer, B represents the functions of the physical layer, C represents the functions of the network layer, and D is indeed the functions of the data link layer."} | |
| {"ID": 1173, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Physical Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Regarding the characteristics of virtual circuit services and datagram services, the correct statement is ()", "A": "Virtual circuit service and datagram service are both connectionless services.", "B": "In datagram services, packets are transmitted along the same path in the network and arrive in the order they were sent.", "C": "After establishing a connection, packets must carry a virtual circuit identifier.", "D": "Packets in a virtual circuit may arrive in a different order than they were sent.", "Answer": "C", "Explanation": "Virtual circuit service is connection-oriented, and packets belonging to the same virtual circuit are forwarded along the same route based on the same virtual circuit identifier, ensuring the orderly arrival of packets. In datagram service, the network independently selects routes for each packet, transmission does not guarantee reliability, nor does it guarantee the sequential arrival of packets."} | |
| {"ID": 1179, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Physical Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following statements about repeaters and hubs, the incorrect one is ( )", "A": "Both operate at the Physical Layer of the OSI reference model.", "B": "Both can amplify and shape the signal.", "C": "The number of network segments interconnected via repeaters or hubs is not limited.", "D": "Repeaters typically have only 2 ports, while hubs usually have 4 or more ports.", "Answer": "C", "Explanation": "The number of network segments interconnected by repeaters and hubs is limited, subject to the \"5-4-3 rule,\" which allows for a maximum of 4 repeaters and 5 segments. All other statements are correct."} | |
| {"ID": 1230, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Data Link Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "From the perspective of sliding window, when the send window is 1 and the receive window is also 1, it is equivalent to the ARQ () mode.", "A": "Go-Back-N ARQ", "B": "Selective Repeat ARQ", "C": "Stop-and-Wait", "D": "Continuous ARQ", "Answer": "C", "Explanation": "The working principle of the stop-and-wait protocol is: the sender must wait for an acknowledgment signal from the receiver after sending each frame before it can send the next frame; the receiver must send back an acknowledgment signal after receiving each frame to indicate readiness to receive the next frame. If the receiver does not send an acknowledgment signal, the sender must continue to wait."} | |
| {"ID": 1231, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Data Link Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In the simple stop-and-wait protocol, when a loss occurs, the sender will wait indefinitely. The solution to this deadlock situation is ( ).", "A": "Error Checking", "B": "Frame Number", "C": "NAK mechanism", "D": "Timeout Mechanism", "Answer": "D", "Explanation": "In the stop-and-wait protocol, the sender sets a timer after sending a frame and waits for an acknowledgment. If the acknowledgment is not received by the time the timer expires, the same frame is sent again to avoid falling into an indefinite wait."} | |
| {"ID": 1240, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Data Link Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In the non-persistent CSMA protocol, when the medium is busy, it ( ) until the medium is free.", "A": "Delay for a fixed time unit before listening.", "B": "Continue listening", "C": "Delay for a random time unit before listening again.", "D": "Stop listening", "Answer": "C", "Explanation": "In the non-persistent CSMA protocol, a station listens to the channel before sending data. If the channel is busy, it stops listening and waits for a random period of time before listening again. If the channel is idle, it proceeds to send data."} | |
| {"ID": 1245, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Data Link Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In Ethernet, the binary exponential backoff algorithm is used to handle collision issues. The data frame with the lowest probability of collision upon retransmission is ( ).", "A": "The frame retransmitted for the first time", "B": "Frames experiencing two collisions", "C": "Frame that has been retransmitted three times", "D": "Frame with four retransmissions", "Answer": "D", "Explanation": "According to the IEEE 802.3 standard, Ethernet employs a binary exponential backoff algorithm in the event of a collision, where the wait time before retransmission is chosen randomly from an interval between 0 and 2^n-1. Consequently, a frame that has been retransmitted four times has the lowest probability of experiencing another collision."} | |
| {"ID": 1246, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Data Link Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following descriptions of token ring networks, the incorrect one is ( )", "A": "Token ring networks are conflict-free.", "B": "At the same moment, only one piece of data is being transmitted on the ring.", "C": "All nodes on the internet share network bandwidth.", "D": "The time it takes for data to travel from one node to another can be calculated.", "Answer": "A", "Explanation": "Token ring networks do not experience collisions because only the host that has obtained the token is allowed to transmit data."} | |
| {"ID": 1250, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Data Link Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "If a 10BASE-T Ethernet network with a coverage of 200m is designed using Category 5 UTP, the required equipment is ( ).", "A": "amplifier", "B": "Repeater", "C": "Network Bridge", "D": "Router", "Answer": "B", "Explanation": "The transmission distance limit for 10BASE-T Ethernet over twisted pair cabling is 100 meters; to cover 200 meters, a repeater is required."} | |
| {"ID": 1261, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Data Link Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The reason why switches provide better network performance than hubs is ( ).", "A": "The switch supports multiple pairs of users communicating simultaneously.", "B": "Switches use error control to reduce the error rate.", "C": "Switches expand the network coverage area.", "D": "The switch requires no configuration and is more convenient to use.", "Answer": "A", "Explanation": "Switches can isolate collision domains and operate in full-duplex mode, allowing multiple pairs of nodes to communicate simultaneously in the network, thus enhancing network utilization. This is an advantage of switches."} | |
| {"ID": 1314, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Network Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following protocols, the one that is a network layer protocol is ( ) I. IP II. TCP III. FTP IV.CMP", "A": "I and II", "B": "II and III", "C": "III and IV", "D": "I and IV", "Answer": "D", "Explanation": "TCP is a transport layer protocol, FTP is an application layer protocol, and only IP and ICMP belong to the network layer protocols."} | |
| {"ID": 1323, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Network Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The following description of the basic method of IP packet fragmentation is incorrect ( ).", "A": "When the IP packet length exceeds the MTU, fragmentation must be performed.", "B": "When DF=1 and the length of the packet exceeds the MTU, the packet is discarded without reporting back to the source host.", "C": "The MF value of 1 for a fragment indicates that the received fragment is not the last one.", "D": "Fragments belonging to the same original IP packet have the same identifier.", "Answer": "B", "Explanation": "If the packet length exceeds the MTU, then when DF=1, the packet is discarded, and an ICMP error message is sent to the source host; when DF=0, fragmentation occurs, with MF=1 indicating that there are more fragments to follow."} | |
| {"ID": 1332, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Network Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The following situation requires initiating an ARP request: ( )", "A": "The host needs to receive information, but there is no mapping between the source IP address and the MAC address in the ARP table.", "B": "The host needs to receive information, but the ARP table already contains a mapping relationship between the source IP address and the MAC address.", "C": "The host needs to send information, but there is no mapping between the destination IP address and the MAC address in the ARP table.", "D": "The main requirement is to send information, but the ARP table already contains a mapping relationship between the destination IP address and the MAC address.", "Answer": "C", "Explanation": "When the source host wants to send an IP datagram to a host on the local LAN, it first checks its ARP cache for a mapping of the destination IP address to a MAC address. If there is a mapping, the hardware address is written into the MAC frame, which is then sent to the destination hardware address through the LAN. If there is no mapping, an ARP request packet is broadcasted first, and after receiving the ARP reply packet from the destination host, the mapping of the destination host's IP address to its hardware address is written into the ARP cache. If the destination machine is not on the local LAN, the IP packet is sent to the router on the local LAN, and of course, the mapping of the router's IP address to its hardware address must be obtained in the same way."} | |
| {"ID": 1336, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Network Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following descriptions of IPv6, the incorrect one is ( )", "A": "The header length of IPv6 is fixed.", "B": "IPv6 does not allow fragmentation.", "C": "IPv6 adopts a 16B address, which will not be exhausted in the foreseeable future.", "D": "IPv6 does not use a header checksum to ensure the correctness of transmission.", "Answer": "D", "Explanation": "The header length of IPv6 is fixed, so there is no need for a header length field. IPv6 has eliminated the checksum field, thereby speeding up the processing of datagrams by routers."} | |
| {"ID": 1339, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Network Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In RIP, if router X and router K are two adjacent routers, and X tells K, \"My distance to destination network Y is N,\" then K, upon receiving this information, knows that \"If I choose X as the next router to network Y, then my distance to network Y is ()\" (assuming N is less than 15).", "A": "N", "B": "N-1", "C": "1", "D": "N+1", "Answer": "D", "Explanation": "RIP stipulates that the distance (hop count) increases by 1 each time it passes through a router."} | |
| {"ID": 1345, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Network Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In the design of multicast routing, in order to avoid routing loops, ()", "A": "Horizontal partitioning technique has been adopted.", "B": "Constructing multicast forwarding trees", "C": "IGMP is adopted.", "D": "Through the Time to Live (TTL) field", "Answer": "B", "Explanation": "Due to the characteristic of trees not having cycles, constructing a multicast forwarding tree allows the broadcast group to be delivered to every host within the group while avoiding loops. Horizontal splitting is used to prevent the count-to-infinity problem in distance vector routing. The TTL field is used to prevent multicast packets from circulating indefinitely in the network due to loops."} | |
| {"ID": 1378, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Transport Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The following description of the main characteristics of the UDP protocol is incorrect ( )", "A": "The UDP header mainly includes fields such as port numbers, length, and checksum.", "B": "The UDP length field represents the length of the UDP datagram, including the length of the pseudo header.", "C": "The UDP checksum performs verification on the pseudo header, UDP datagram header, and application layer data.", "D": "The pseudo-header includes a part of the IP datagram header.", "Answer": "B", "Explanation": "The pseudo-header is only temporarily added when calculating the checksum and is not included in the length of UDP. For option D, the pseudo-header includes the source IP and destination IP, which are part of the IP packet header."} | |
| {"ID": 1379, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Transport Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The handling method when the receiver receives UDP user data with errors is ()", "A": "Discard", "B": "Request for retransmission", "C": "Error Correction", "D": "Ignore errors", "Answer": "A", "Explanation": "If the receiver detects an error in the data through verification, it will directly discard the datagram."} | |
| {"ID": 1384, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Transport Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The following ( ) is not a characteristic of TCP services.", "A": "Byte stream", "B": "Full Duplex", "C": "Reliable", "D": "Supports broadcasting", "Answer": "D", "Explanation": "TCP provides a one-to-one, full-duplex, reliable byte stream service, thus TCP does not support broadcasting."} | |
| {"ID": 1389, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Transport Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In the TCP sliding window protocol, the maximum number of packets that can be retransmitted is ( ).", "A": "is arbitrary", "B": "one", "C": "Greater than the size of the sliding window", "D": "Equal to the size of the sliding window.", "Answer": "D", "Explanation": "In the TCP sliding window protocol, the size of the sender's sliding window determines the maximum number of packets the sender can transmit. The sender can only continue to send more packets after the window has slid. The maximum value for packet retransmission is also the maximum amount of data the sender can send, therefore the number of retransmitted packets cannot exceed the size of the sliding window."} | |
| {"ID": 1390, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Transport Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The following description of TCP window and congestion control concepts is incorrect ( ).", "A": "The receiver window (rwnd) notifies the sender of the data through the window field in the TCP header.", "B": "The basis for determining the send window is: Send Window = min[Receive Window, Congestion Window].", "C": "The congestion window is a window value determined by the receiver based on the network congestion conditions.", "D": "The size of the congestion window can grow exponentially at the beginning.", "Answer": "C", "Explanation": "The congestion window is a window value determined by the sender based on the network congestion condition."} | |
| {"ID": 1397, "Split": "Test", "Domain": "Computer Network", "SubDomain": "Transport Layer", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Assuming that there is no congestion, using the slow start control strategy on a line with a round-trip time (RTT) of 10ms. If the receive window size is 24KB and the maximum segment size (MSS) is 2KB, the time required for the sender to send out the first full window (i.e., the send window reaches 24KB) is ( ).", "A": "30ms", "B": "40ms", "C": "50ms", "D": "60ms", "Answer": "B", "Explanation": "According to the slow start algorithm, the initial value of the send window is the initial value of the congestion window, which is the size of the MSS, 2KB. It then increases successively to 4KB, 8KB, 16KB, and finally to the size of the receive window, 24KB, reaching the first full window. Therefore, the time required to reach the first full window is 4RTT = 40ms."} | |
| {"ID": 1721, "Split": "Test", "Domain": "Operating System", "SubDomain": "Overview", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "It is best to use a real-time operating system platform for the following () application work: \u2160. Airline reservation II.Office Automation \u2162. Machine tool control \u2165. Stock trading system", "A": "I, II, and III", "B": "I, III, and IV", "C": "I, V, and IV", "D": "I, III, and VI", "Answer": "D", "Explanation": "Real-time operating systems are primarily used in situations where immediate response to external inputs is required, without delays, as delays can lead to serious consequences. Among the options in this question, an airline reservation system needs real-time processing of ticketing because the number of tickets in the database directly reflects the available booking seats on flights. Machine tool control must also be real-time, otherwise errors will occur. Stock market quotes are constantly changing, and if trading is not real-time, time lags can occur, leading to deviations in transactions."} | |
| {"ID": 1770, "Split": "Test", "Domain": "Operating System", "SubDomain": "Processes and Threads", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In a multiprogramming system, if the ready queue is not empty, the more processes that are ready, the higher the processor efficiency ().", "A": "The higher", "B": "Lower", "C": "Invariant", "D": "Uncertain", "Answer": "C", "Explanation": "The process state diagram shows that the more processes are ready, the more competition there is for the CPU. However, as long as the ready queue is not empty, the CPU can always schedule processes to run and remain busy. This is independent of the number of ready processes, unless the ready queue is empty, at which point the CPU enters a wait state, resulting in reduced CPU efficiency."} | |
| {"ID": 1782, "Split": "Test", "Domain": "Operating System", "SubDomain": "Processes and Threads", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The round-robin scheduling algorithm is designed for ().", "A": "Multiple users can intervene in the system promptly.", "B": "Make the system efficient", "C": "Processes with higher priority receive timely responses.", "D": "The process requiring the least CPU time is executed first.", "Answer": "A", "Explanation": "The primary purpose of round-robin time slicing is to ensure that multiple interactive users receive timely responses, creating the illusion that they have \"exclusive\" use of the computer. Therefore, it does not show preference and does not provide special services for specific processes. Round-robin time slicing increases system overhead, so it does not enhance system efficiency, and both throughput and turnaround time are not as good as batch processing. However, its relatively quick response time allows users to interact with the computer, improving the human-computer environment and meeting user needs."} | |
| {"ID": 1788, "Split": "Test", "Domain": "Operating System", "SubDomain": "Processes and Threads", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The correct statement regarding the precedence of magnitude is ().", "A": "The priority of computational tasks should be higher than that of I/O-bound tasks.", "B": "The priority of user processes should be higher than that of system processes.", "C": "In dynamic priority, as the waiting time for a job increases, its priority will correspondingly decrease.", "D": "In dynamic priority, as the process execution time increases, its priority decreases.", "Answer": "D", "Explanation": "In priority scheduling algorithms, I/O-bound jobs have higher priority over CPU-bound jobs, and system processes should have higher priority than user processes. The priority of a job is not necessarily related to whether it is a long or short job, or the amount of system resources it requires. In dynamic priority scheduling, a process's priority decreases as its execution time increases, while its priority increases as the job's waiting time increases."} | |
| {"ID": 1791, "Split": "Test", "Domain": "Operating System", "SubDomain": "Processes and Threads", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following statements, the correct one(s) is (are) (). \u2160. The time slice of a time-sharing system is fixed, so the more users there are, the longer the response time. \u2161. UNIX is a powerful multi-user, multitasking operating system that supports multiple processor architectures and is classified as a time-sharing operating system according to the categorization of operating systems. \u2162. The interrupt vector address is the entry address of the interrupt service routine. \u2163. When an interrupt occurs, the program counter (PC) is protected and updated by hardware, not by software, mainly to improve processing speed.", "A": "I, II", "B": "II, III", "C": "III, IV", "D": "Only IV", "Answer": "A", "Explanation": "Option \u2160 is correct. In a time-sharing system, the response time is directly proportional to the time slice and the number of users. Option \u2161 is correct. Option \u2162 is incorrect; the interrupt vector itself is used to store the entry address of the interrupt service routine, hence the address of the interrupt vector should be the address of that entry. Option \u2163 is incorrect; interrupts are protected and completed by hardware, mainly to ensure the system operates reliably and correctly. Improving processing speed is also a benefit, but it is not the primary purpose. In summary, options \u2162 and \u2163 are incorrect."} | |
| {"ID": 1798, "Split": "Test", "Domain": "Operating System", "SubDomain": "Processes and Threads", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "For two concurrent processes, given a mutual exclusion semaphore named mutex (initial value is 1), if mutex = -1, then ().", "A": "Indicates that no process has entered the critical section.", "B": "Indicates that a process has entered the critical section.", "C": "Indicates that one process has entered the critical section, while another process is waiting to enter.", "D": "Indicates that two processes have entered the critical section.", "Answer": "C", "Explanation": "When one process enters the critical section and another process is waiting to enter the critical section, mutex = -1. When mutex is less than 0, its absolute value is equal to the number of processes waiting to enter the critical section."} | |
| {"ID": 1800, "Split": "Test", "Domain": "Operating System", "SubDomain": "Processes and Threads", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following statements about PV operations, the correct one(s) is (are) (). \u2160. PV operation is a system call command \u2161. PV operation is a low-level process communication primitive \u2162. PV operation consists of an uninterruptible process \u2163. PV operation consists of two uninterruptible processes", "A": "I, III", "B": "II, IV", "C": "I, II, IV", "D": "I, IV", "Answer": "B", "Explanation": "PV operations are low-level process communication primitives, not system calls, so \u2161 is correct; both P and V operations are atomic operations, hence PV operations consist of two uninterruptible processes, therefore \u2163 is correct."} | |
| {"ID": 1801, "Split": "Test", "Domain": "Operating System", "SubDomain": "Processes and Threads", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following statements about critical sections and critical resources, the correct one(s) is (are) (). \u2160. The Banker's algorithm can be used to solve the Critical Section problem \u2161. A critical section refers to the code segment in a process that is used to achieve mutual exclusion among processes \u2162. A shared queue is a critical resource \u2163. Private data is a critical resource", "A": "I, II", "B": "I, IV", "C": "Only \u2162", "D": "All of the above answers are incorrect.", "Answer": "C", "Explanation": "A critical resource refers to a resource that only allows one process to access at a time. The section of code within each process that accesses the critical resource is called the critical section. \u2160 Incorrect, the Banker's algorithm is an algorithm to avoid deadlock. \u2161 Incorrect, the section of code within each process that accesses the critical resource is called the critical section. \u2162 Correct, a common queue can be used by multiple processes, but only one program can use it at a time. \u2163 Incorrect, private data is for the use of a single process only, and there is no issue of critical sections. Based on the above analysis, the correct answer is C."} | |
| {"ID": 1803, "Split": "Test", "Domain": "Operating System", "SubDomain": "Processes and Threads", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "If there are 4 processes sharing the same program segment, and each time 2 processes are allowed to enter the program segment, and if P and V operations are used as synchronization mechanisms, then the range of values for the semaphore is ().", "A": "4,3,2,1,-1", "B": "2, 1, 0, -1, -2", "C": "3, 2, 1, 0, -1", "D": "2,1,0,-2,-3", "Answer": "C", "Explanation": "Since the program segment allows three processes to enter at a time, the possible scenarios are: no process enters, one process enters, two processes enter, three processes enter, and three processes enter with one waiting to enter. Therefore, the semaphore values corresponding to these five situations are 3, 2, 1, 0, -1."} | |
| {"ID": 1805, "Split": "Test", "Domain": "Operating System", "SubDomain": "Processes and Threads", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "There are two concurrent programs with the same priority, P_1 and P_2, whose execution processes are as follows. Assuming the current semaphore s_1=0, s_2=0. The current value of z=2, after the processes have finished running, the values of x, y, and z are respectively (). Process P1 \\n Y:=1; \\n Y:=y+2; \\n z:=y+1; \\n V(s1); \\n P(s2); \\n Y:=z+y; \\n \u2026 Process P2 \\n x:=1 \\n x:=x+1; \\n P(s1); \\n x:=x+y; \\n Z:=X+Z; \\n V(s2); \\n ...", "A": "5,9,9", "B": "5,9,4", "C": "5,12,9", "D": "5,12,4", "Answer": "C", "Explanation": "Due to concurrent processes, the execution of processes is uncertain. Before P_1 and P_2 reach their first P and V operations, they should be independent of each other. Now consider the first P and V operations on s_1. Since process P_2 performs the P(s_1) operation, it must wait until P_1 completes the V(s_1) operation before it can continue. At this point, the values of x, y, and z are 2, 3, and 4, respectively. After process P_1 completes the V(s_1), it becomes blocked on P(s_2), allowing P_2 to run until V(s_2). At this point, the values of x, y, and z are 5, 3, and 9, respectively. Process P_1 continues to run until the end, with the final values of x, y, and z being 5, 12, and 9, respectively."} | |
| {"ID": 1806, "Split": "Test", "Domain": "Operating System", "SubDomain": "Processes and Threads", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following situations, the one that may lead to a deadlock is ().", "A": "Process Releases Resources", "B": "A process enters an infinite loop.", "C": "Multiple processes are experiencing a deadlock due to competition for resources.", "D": "Multiple processes compete for the use of shared devices.", "Answer": "C", "Explanation": "The four necessary conditions for a deadlock are: mutual exclusion, hold and wait, no preemption, and circular wait. In this question, the phenomenon of circular wait has occurred, which means it could lead to a deadlock. The release of resources by a process will not cause a deadlock, and a process entering an infinite loop on its own can only cause \"starvation,\" which does not involve other processes. Shared devices allow multiple processes to request usage, so they do not lead to deadlocks. A reminder again, a deadlock must involve two or more processes to occur, while starvation can be caused by a single process."} | |
| {"ID": 1851, "Split": "Test", "Domain": "Operating System", "SubDomain": "Memory Management", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In segmented paging storage management, the address mapping table is ().", "A": "Each process has one segment table and two page tables.", "B": "Each process has a segment table for each of its segments, and a page table.", "C": "Each process has a segment table, and each segment has a page table.", "D": "Each process has one page table, and each segment has one segment table.", "Answer": "C", "Explanation": "In a segmented paging system, a process is first divided into segments, and each segment is further divided into pages."} | |
| {"ID": 1853, "Split": "Test", "Domain": "Operating System", "SubDomain": "Memory Management", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "First Fit Algorithm's free partition ().", "A": "In descending order of size, connected together.", "B": "In increasing order of size, connected together.", "C": "Sorted in ascending order by address", "D": "Sort by address in descending order", "Answer": "C", "Explanation": "The free partitions in the first-fit algorithm are arranged in ascending order of addresses."} | |
| {"ID": 1856, "Split": "Test", "Domain": "Operating System", "SubDomain": "Memory Management", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "An operating system manages memory using a paging storage management method, with a page size of ().", "A": "To determine based on the size of memory", "B": "Must be identical", "C": "To determine based on the CPU's address structure", "D": "Determine based on the size of external storage and internal memory.", "Answer": "B", "Explanation": "An important issue in paging management is how to determine the page size. There are many factors to consider when determining page size, such as the average size of processes, the length occupied by the page table, etc. Once determined, all pages are of equal length (generally an integer power of 2) to facilitate system management."} | |
| {"ID": 1860, "Split": "Test", "Domain": "Operating System", "SubDomain": "Memory Management", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "When a process encounters a page fault interrupt during execution, the operating system should handle it and then allow it to execute the () instruction.", "A": "The previous one that was interrupted", "B": "The interrupted one", "C": "The subsequent one that was interrupted", "D": "The first line upon startup", "Answer": "B", "Explanation": "A page fault interrupt is caused by a memory access instruction, indicating that the page to be accessed is not in memory. After handling the page fault interrupt and loading the required page, the memory access instruction should clearly be re-executed."} | |
| {"ID": 1866, "Split": "Test", "Domain": "Operating System", "SubDomain": "Memory Management", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "In page replacement strategies, the () strategy may cause thrashing.", "A": "FIFO", "B": "LRU", "C": "There is no single", "D": "All", "Answer": "D", "Explanation": "Thrashing is the behavior of frequent page scheduling (page faults) during the page replacement process of a program, and no page scheduling strategy can completely avoid thrashing."} | |
| {"ID": 1871, "Split": "Test", "Domain": "Operating System", "SubDomain": "Memory Management", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Among the following statements, the correct one(s) is (are) (). \u2160. The First-In-First-Out (FIFO) page replacement algorithm can lead to Belady's anomaly. \u2161. The Least Recently Used (LRU) page replacement algorithm can lead to Belady's anomaly. \u2162. If all the pages of a process's working set are in virtual memory during its execution, the process can run effectively; otherwise, frequent page faults and page swaps will occur. \u2163. If all the pages of a process's working set are in main memory during its execution, the process can run effectively; otherwise, frequent page faults and page swaps will occur.", "A": "I, III", "B": "I, IV", "C": "II, III", "D": "II, IV", "Answer": "B", "Explanation": "The FIFO algorithm may lead to Belady's anomaly. For example, with the page reference string 1,2,3,4,1,2,5,1,2,3,4,5, when 3 frames are allocated, there are 9 page faults, and when 4 frames are allocated, there are 10 page faults, so statement \u2160 is correct. The Least Recently Used (LRU) algorithm does not produce Belady's anomaly, so statement \u2161 is incorrect. If a page is in memory, it will not cause a page fault, meaning there will be no page swapping in/out, as opposed to virtual memory (including the part of the hard disk that acts as virtual memory), thus statement \u2162 is incorrect and statement \u2163 is correct."} | |
| {"ID": 1941, "Split": "Test", "Domain": "Operating System", "SubDomain": "Input/Output Management", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Regarding the relationship between channels, device controllers, and devices, the correct statement is ().", "A": "Device controllers and channels can control devices independently.", "B": "For the same set of input/output commands, the device controller, channel, and device can work in parallel.", "C": "Channel controller controls device controller, device controller controls device operation.", "D": "None of the above answers are correct.", "Answer": "C", "Explanation": "The control relationship among the three is hierarchical, with only option C being correct."} | |
| {"ID": 1945, "Split": "Test", "Domain": "Operating System", "SubDomain": "Input/Output Management", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "The primary purpose of introducing a high-speed cache is ().", "A": "Increase the utilization of the CPU", "B": "Increase the utilization of I/O devices.", "C": "Improving the mismatch between CPU and IO device speeds", "D": "Save Memory", "Answer": "C", "Explanation": "The execution speeds of the CPU and I/O devices are usually unequal, with the former being fast and the latter slow. High-speed buffering technology is used to mitigate the mismatch between the two."} | |
| {"ID": 1955, "Split": "Test", "Domain": "Operating System", "SubDomain": "Input/Output Management", "Format": "Multiple-choice", "Tag": "Reasoning", "Language": "English", "Question": "Assuming the recording density of the tape is 400 characters/inch (1in=0.0254m), each logical record is 80 characters, the inter-block gap is 0.4 inches, and there are 3000 logical records to be stored, the length of tape required to store these records is (), and the tape utilization is ().", "A": "1500 inches, 33.3%", "B": "1500 inches, 43.5%", "C": "1800 inches, 33.3%", "D": "1800 inches, 43.5%", "Answer": "C", "Explanation": "The length of magnetic tape occupied by one logical record is 80/400 = 0.2 inches, thus the length of tape required to store 3000 logical records is (0.2+0.4)x3000 = 1800 inches, with a utilization rate of 0.2/(0.2+0.4) = 33.3%."} | |