XCore Architecture
Instruction encoding

XCore Architecture

Section Title: Instruction encoding
Table Section Text: None

1 5	1 4	1 3	1 2	1 1	1 0	9	8	7	6	5	4	3	2	1	0	Description

opcode	immediate	10/20-bit immediate

opcode	register	immediate	register & 6/16-bit immediate

opcode	1 1	opc	immediate	6/16-bit immediate

opcode	9×a+3×b+c	a a	b b	c c	three-operand register

opcode	27+3×b+c	∗	o	b b	c c	two-operand register

opcode	1 1 1 1 1 1	o	c c c c	one-operand register

opcode	1 1 1 1 1 1	o	1 1	opc	zero-operand

Sentence(s)

XCore Architecture allows 10/20-bit immediate operands, up to six register operands.

final_sentence: XCore Architecture allows 10/20-bit immediate operands, up to six register operands.