Extended Industry Standard Architecture
Technical data

Extended Industry Standard Architecture

Section Title: Technical data
Table Section Text: None

bus width	32 bit

compatible with	8 bit ISA, 16 bit ISA, 32 bit EISA

pins	98 + 100 inlay

Vcc	+5 V, −5 V, +12 V, −12 V

clock	8.33 MHz

theoretical data rate (32 bit)	about 33 MB/s (8.33 MHz × 4 bytes)

usable data rate (32 bit)	about 20 MB/s

Sentence(s)

EISA standard clock speed was fixed at an industry standard of 8.33 MHz.

final_sentence: EISA standard clock speed was fixed at an industry standard of 8.33 MHz.