500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC
A 0.5 V 1.28-MS/s 4.68-fJ/Conversion-Step SAR ADC With Energy-Efficient DAC and Trilevel Switching Scheme
A 8-bit 500-KS/s low power SAR ADC for bio-medical applications
A 12-bit 20 MS/s 56.3 mW Pipelined ADC With Interpolation-Based Nonlinear Calibration
ON THE USE OF REDUNDANCY IN SUCCESSIVE APPROXIMATION A / D CONVERTERS
Segmented Architecture for Successive Approximation Analog-to-Digital Converters