Design and characterization of a multi-RC-triggered MOSFET-based power clamp for on-chip ESD protection
BCD (Bipolar-CMOS-DMOS) technology trends for power management IC
PMOS-based power-rail ESD clamp circuit with adjustable holding voltage controlled by ESD detection circuit
Circuit and Layout Co-Design for ESD Protection in Bipolar-CMOS-DMOS (BCD) High-Voltage Process
Unexpected failure in power-rail ESD clamp circuits of CMOS integrated circuits in microelectronics systems during electrical fast transient (EFT) test and the re-design solution
Stacked PMOS clamps for high voltage power supply protection