A PUF design for secure FPGA-based embedded systems
Side-Channel Attack Standard Evaluation Board SASEBO-W for Smartcard Testing
Reconfigurable Binding against FPGA Replay Attacks
Black-Box Side-Channel Attacks Highlight the Importance of Countermeasures - An Analysis of the Xilinx Virtex-4 and Virtex-5 Bitstream Encryption Mechanism
Hardware Intrinsic Security from Physically Unclonable Functions
Time-Bounded Authentication of FPGAs