A novel zero weight/activation-aware hardware architecture of convolutional neural network
Structured Weight Matrices-Based Hardware Accelerators in Deep Neural Networks: FPGAs and ASICs
Euphrates: Algorithm-SoC Co-Design for Low-Power Mobile Continuous Vision
Accurate and Efficient Stochastic Computing Hardware for Convolutional Neural Networks
Supporting compressed-sparse activations and weights on SIMD-like accelerator for sparse convolutional neural networks