What are we setting, what are we reading in the trigger crate:

sequencer (SQ2A)
trigger transmitter
BD board
prescaler
delay-width-fanout
AND/OR association register

Sequence of commands:
--------------------
; Disable all triggers until the end of init on he sequencer
; Zero the BD board, too

; Loop over all prescalers found by fbwho
; Initialize all 4 channels of this prescaler

; Loop over all delay-width-fanout boards found by fbwho
; Initialize all 6 channels

; load the hextant register into the tt
; refined range 1 data
; refined range 2 data

; load the and/or board association register

; do the sequencer again...
; This to toggle the internal sequencer clear
; This to enable/disable group A,B,C,D triggers (according to marker
; block)

; Last, initialize the BD board BLINDLY (you can't read back the
  register)

;-------------------------------------------------------------------
; readout :

; Bank TRIG  - Presently 13 words 
------------

Word 1 - Number of clock words (3)
Word 2 - Clock from IO board in lowest slot at time of event start
Word 3 - Clock from second IO board at start of event
Word 4 - Clock from second IO board at end of event
Word 5 - Number of IO boards
Word 6&7 - 1st IO board (64 bits)
Word 8&9 - 2nd IO board (64 bits)
Word 10-13 - Empty ?

; Bank TRI2  - Presently 55 words
-----------

; 3 (AO) + 2 (SEQ) + 3 (RZ) + 4 (TT) + 2 (BD) ( 1 + N_PS*8) (PS)

; AND/OR Board (Fastbus ID is 7871): Header(78710002) + registers C0 and C1

; Sequencer (7872): Header(78720001) +  register C0

; R/Z Board (7874): Header(78740002)  +  registers C0 and C1

; Trigger Transmitter (7875): Header(78750003) +  registers C0, C1, and C2

; BD Board (7876): Header(78760001) +  register C1

; Prescalers: Header(78730028) + 2 scalers/prescaler per channel, or
  8 words/prescaler module (presently 5 prescalers)