# Presentation: 620695

## ATLAS Pixel Sensors 

- ATLAS Pixel Sensors

- Sally Seidel
- University of New Mexico
- U.S. ATLAS Pixel Review
- LBNL, 9 November 2001

## Features of the Experiment

- 10-year fluence @ innermost layer >1015 cm-2 1-MeV n
- ~108 channels (1744 sensors) plus spares; want to test these under bias before investing chips on each
- All of the other subsystems located outside the pixels

- Impact on the Sensor Design
- Guarantee stable operation @ high voltage; operate below full depletion after inversion.
- Implement integrated bias circuit.
-                          Minimize multiple scattering; minimize mass.

## Total fluence has been predicted for each component’s  lifetime  assuming luminosity ramp-up from 1033cm-2 to 1034cm-2 during Years 1-3:

- Total fluence has been predicted for each component’s  lifetime  assuming luminosity ramp-up from 1033cm-2 to 1034cm-2 during Years 1-3:

## Example prediction of depletion voltage versus radius, for 10-year fluence:

## Simulations were made to select operating temperature and access time:

## Conclusion: 

- Conclusion:
- 100 days' operation @ 0 °C
- 30 days' warm-up @ 20 °C
- 235 days' storage @ -10 °C

## General Features of the Production Sensor Design

- Rectangular sensors:                                    2 chips wide x 8 chips long -
- Each chip: 18 columns x 160 rows
- Each pixel cell: 50 x 400 m2
- Active area: 16.4 x 60.8 mm2
- n+ implants (dose 1014/cm2) in      n-bulk to allow underdepleted operation after inversion
- Thickness: 250 m

## Route to the Design

- First Prototypes -
- Designed in ‘97, fabricated by CiS + Seiko, studied in '98-'99
- Second Prototypes -
- Designed in '98, fabricated by CiS, IRST, and TESLA, studied in '99-2000
- Pre-production Sensors -
- Designed in '99-2000, fabricated by CiS + TESLA, studied in 2001
- Production Sensors -
- Order in process of release now for delivery to begin in January 2002.

## The Production Wafer

- 4-inch diameter, 250 m thick, with:
- 3 full-size Tiles
- 6 single-chip sensors
- various process test structures to monitor oxide breakdown voltage, flat-band voltage, oxide-silicon interface current, p-spray dose

## Features of the Full-size Sensors (“Tiles”)

- Pitch 50 x 400 m2
- 47232 cells per sensor
- Area 18.6 x 63.0 mm2
- Active area 16.4 x 60.8 mm2
- cells in regions between chips are either
- elongated to 600 m to reach the nearest chip, or
- ganged by single metal to a nearby pixel that has direct R/O

## Elongation and Ganging of Implants in the Inter-chip Region

## n-side isolation: p-spray

- A medium [(3.0 ± 0.5) x 1012/cm2] dose implant applied to the full n-side without masks, then overcompensated by the high dose pixel implants themselves.
- The p-spray is* moderated*:  it attains a lower boron dose near the lateral p-n junction, thereby reducing the electric field.  The surface charge at the junction is optimized at the saturation value (1.5  1012 /cm2 ) and is slightly higher in the center (3.0  1012/cm2) for safe overcompensation.  The higher dose in the center also reduces the capacitance.

## Irradiated (21014 55-MeV p/cm2) p-stop sensors: leakage current versus voltage:

- Irradiated (21014 55-MeV p/cm2) p-spray sensors: leakage current versus voltage:

- Irradiated (21014 55-MeV p/cm2) p-stop sensors: leakage current versus voltage:

## Unirradiated p-spray sensors: breakdown voltage

- The same sensors  irradiated to 9 1014 1MeV n/cm2: breakdown voltage

## Breakdown voltage for tile with normal p-spray (Prototype 1): 180 V

- Breakdown voltage for tile with moderated  p-spray (Prototype 2): 410 V

- Breakdown voltage for tile with normal p-spray (Prototype 1): 180 V

## Substrate: oxygenated

- From the ROSE Collaboration: Oxygen-enriched (24 hours in 1150C environment) silicon is significantly more radiation hard than standard silicon as tested with protons or pions.  Vdep is 2x lower after 1015/cm2.

## The value of oxygenated substrate was confirmed by the ATLAS pixel group:

- After irradiation to 3  1014/cm2:

- Guard ring / treatment of the edge
- on the p-side: a 17-ring structure of p+ implants.   Pitch increases with radius.  Metal overlaps implant by 1/2 gap width on side facing active area. (See Bischoff, et al., NIM A 326 (1993) 27-37.)
- on the n-side: no conventional guard ring. Inner guard ring of ~90 m width surrounded by a few micron gap.  Region outside gap is implanted n+ and grounded externally.  Recall that the chip is only a bump’s diameter away. This design guarantees no HV arc from n-side to chip.

- Bias grid
- For high yield on assembled modules, we want to test sensors prior to attaching chips - so we want to bias every channel on a test stand without a chip and without contacting implants directly.  A bias grid is implemented:
- Bus between every pair of columns connects to small n+ implant “dot” near each pixel
- When bias is applied (through a probe needle) to the grid, every pixel is biased by punchthrough from its dot.
- p-spray eliminates need for photolithographic registration, permits distance between n-implants to be small  low punchthrough voltage
- Bias grid unused after chips are attached but maintains any unconnected pixels (i.e., bad bumps) near ground

## Bias Grid

- Selected mechanical and substrate requirements
- thickness - 250 m
- thickness non-uniformity, wafer to wafer - +10 m, -30 m
- thickness non-uniformity across each wafer - < 10 m
- bow -  40 m
- crystal orientation - <111>
- resistivity - 2-5 k-cm
- resistivity uniformity, wafer to wafer - ±30 %
- substrate free of deep levels (C-V independent of frequency *f* for               20 Hz < *f* < 10 MHz)
- substrate oxygenated @ 1150 °C, 24 hrs

- Selected electrical requirements (measured at 20 °C)
- initial operating voltage - 150V or       Vdep + 50V, whichever is higher
- initial leakage current @ Vop -  < 2 A per tile
- current slope at Vop -                        I(Vop)/I(Vop - 50V) < 2
- initial oxide breakdown voltage -  50V
- I  30% after 30 hours operation in dry air at Vop

- Selected design parameters:
- implant spacing  5 m
- implant width  5 m
- contact hole diameter in oxide or nitride  5 m
- contact hole spacing in oxide or nitride    20 m
- metal width  8 m
- metal spacing  5 m
- contact hole diameter in passivation         12 m
- contact hole spacing in passivation          38 m
- mask alignment tolerance within same side ±2m
- mask alignment tolerance between front and back sides ±5 m

- Processing parameters:
- n+ implantation dose > 1014/cm2
- p-spray effective dose in Si -                (3.0 ± 0.5) x 1012/cm2
- p-side contact dose > 1014/cm2
- Radiation hardness
- 	To be tested on 2-4 test structures of 3 types, per batch, after 1015 p/cm2 (CERN  PS) and 50 kRad low energy electrons (Dortmund):
- Vop  600 V
- I(600 V) < 100 A  @ -10 °C
- I < 30% after 15 hours @ -10 °C

## Pixel sensor testing was done on 120 wafers to reach this design...

- static studies of irradiated + unirradiated devices
- test beam studies of sensors with amplifiers.
- 	    Examples...

## Static tests
Quality assurance procedures assigned a flag Qflag  (-1 , 0, +1) to each tile on the basis of its breakdown voltage.
Qflag = -1 for 50V < Vbreakdown
Qflag = 0 for 50V < Vbreakdown < 150V
Qflag = +1 for Vbreakdown > 150V
Typical results for CiS (predict production yield):

- Quality assurance procedures assigned a flag Qflag  (-1 , 0, +1) to each tile on the basis of its breakdown voltage.
- Qflag = -1 for 50V < Vbreakdown
- Qflag = 0 for 50V < Vbreakdown < 150V
- Qflag = +1 for Vbreakdown > 150V
- Typical results for CiS (predict production yield):

## Beam test study of charge collection uniformity

- track position extrapolated to the pixel detector using strip detector telescope
- average cluster charge computed for each position bin
- ~18000e- signal:

- For an oxygenated Prototype 2 wafer @
- Vbias = 400 V,  = 5.6 1014 neq/cm2:

## Slide 28

## Beam test study of depletion depth

## After 1015 neq/cm2, Vdep > 227 m @ -600 V for oxygenated substrate

- After 1015 neq/cm2, Vdep > 227 m @ -600 V for oxygenated substrate

## Beam test efficiency study

- 98.4% efficiency after  = 1015 neq/cm2, for 3000e- threshold:

## Beam Test Study of Spatial Resolution

- Resolution at 0o for 3000 e- threshold:
- depends on ratio (2 hits):(single hits)
- sharing within ± 3 m
- ~ 15 % double hits
- Larger charge sharing region for larger angles
- Depleted region reduction due to rad damage affects the multiple hits rate
- Magnetic field modifies charge sharing through Lorentz angle

## 1+2 hits

***1+2 hits***

***1 hit***

***2 hits***

***2 hits***

## Beam test study of resolution as a function of azimuthal angle

- Charge interpolation on the external pixels in the cluster improves spatial*** ***precision

## Analog (Time over Threshold) measurement of the charge improves resolution.

## Production Sensor Testing Program

- On all wafers:
- visual inspection by microscope, before and after all other measurements
- I-V of every tile, every single chip, and diode with guard ring (for Vbreak)
- C-V on diode with guard ring (for Vdep)
- Once per batch:
- bow
- I versus time
- thickness

## On a representative sample of control structures, a few per batch:

- Vflat-band, oxide charge, p-spray dose, electron mobility, Vbreak of oxide and nitride layers, inter-pixel resistance, inter-pixel capacitance, implant and metalization resistivities
- On irradiated test structures:
- Vop, Iop, I vs. time, Vbreak, oxide properties, flat-band voltage, oxide charge, p-spray dose, electron mobility

## Status the sensors:

- CiS is approved for full production.
- Tesla has met specs on unirradiated devices.  25% of their production sensors will be ordered immediately.  Final approval for remaining 75% will be given after test beam of irradiated devices next summer.
- The testing laboratories are ready.  QA procedures have been optimized, will be finalized by 7 Dec 2001.
- Production database in use.

## Sensor Cost Estimate

- Plan for purchase of the detectors:
- 2000 tiles required (incl. spares)
- Order 1/2 from each vendor
- Both vendors *will* offer 35% 3-good-tile wafers and 65% 2-good-tile wafers.  However present Tesla pricing is based on 50% 3-good/ 35% 2-good so their cost is a conservative estimate.  US will pay 20% of total cost.

## Sensor Cost Estimate, continued

**CiS:**
- 3-good: 150 wafers  1315 ChF/wafer = 197250 ChF
- 2-good: 275 wafers    840 ChF/wafer = 231000 ChF
*CiS total:*		                              428250 ChF
**Tesla:**
- 3-good: 200 wafers    765 ChF/wafer = 153000 ChF
- 2-good: 200 wafers    383 ChF/wafer =   76600 ChF
*Tesla total:*				      229600 ChF
- 25% of sensors will be ordered in FY02, 75% in FY03.
- Total US cost:	20%  657850 ChF = $82.2k
- FY02 US cost: 20%  164463 ChF = $20.6k
- FY03 US cost: 20%  493387 ChF = $61.7k

## Sensor Cost Estimate, continued

- CiS has been approved to provide its full production order.  Tesla radiation hardness will be checked after 25% production, and a final decision on Tesla full order will be made in Sept. 2002.
*If the full 2000-sensor order reverts to CiS:*
- Total cost increases to 856500 ChF = $535k
- US cost increases to $107k (30% change).

## Additional 1.1.1.2 costs

- Needed for FY02 + FY03:
- 1.0 FTE student tech: $13k/year  2 yr = $26k
- 0.5 FTE engineer:       $36k/year  2 yr = $72k
*total:*                                                          $98k

## Milestones for WBS 1.1.1.2

- First outer production wafers delivered	18 Jan 02
- Outer sensors testing complete		31 Jul 03
- Outer sensors needed to begin modules 	31 Jul 03
- First B-layer  wafers delivered		11 Apr03
- B-layer sensors needed to begin modules	14 Jul 04