# Presentation: 947713

## 1 A and 120 mA Thin-Film Multijunction Thermal Converters

- Hector Laiz (INTI)
- Thomas Wunsch (Sandia)
- Joseph Kinard (NIST)
- Thomas Lipe (NIST)

## Contents

- Background
- Project goals
- Present status of project
- Future plans
- Conclusions

## Background

- NIST has relied on high-current thermoelements for current measurements. Other NMIs rely on current shunt/TE combinations

- Weston TE

## Background

- Thin-film technology will enable us to make high-current thermal converters with much better performance than either the Weston TEs or shunt/TE combinations
- Benefits:
- Higher accuracy
- Lower cost/Mass production

## Background

- The NIST standards are old (c.1960), and many have been lost
- Overloading
- Random age-related failures
- Cannot be replaced or repaired
**NIST is in critical need of new, high-performance standards**

## Project Goal

- To develop new high-current thermoelements for measurement of ac currents up to 10 A

## Project Goal

- Develop 1 A and 120 mA TEs
- Use in parallel combinations to scale to 10 A

## Why not shunts?

- Lower voltage drop across heater
- Reduces temperature-dependent errors
- Smaller skin effect
- Reduces high-frequency error
- High impedance to ground
- Larger output emfs
- Scaling accuracy

## 1 A MJTC Design Parameters

- 0.1 V drop across heater
- 100 mW heater power
- 0.1 Ω heater resistance
- Requirements
- New chip design
- New low-resistance heater material

## 1 A MJTC Design Parameters

- Use CuAu heater to optimize the temperature coefficient of the sensitivity
- s = +3.2 x 10-3 K-1 (gold)
- s = -6.0 x 10-4 K-1 (Evanohm)
******s**** = -2.5 x 10****-4**** K****-1**** (copper-gold)**

- Temperature coefficient
- of Seebeck coefficient

- Temperature coefficient of
- thermal conductance

- Temperature coefficient
- of heater resistance

## 1 A MJTC Chip Design

- CuAu heater
- 5 mm x 3.8 mm x 1 μm

- Back-etched window
- 5 mm x 5 mm x 500 nm

- Obelisk
- 4 mm x 4 mm

- Thermocouples (40)

- Silicon frame

- Au bonding pads

## 1 A MJTC Thermal Simulation

- Ambient

- Ambient + 10 K

- Temperature distribution on one-half the 1 A MJTC

## 1 A MJTC Temperature Profile

*1 A MJTC Temperature Profile*

-       0                         2                          4
- Distance along heater in mm

- 9.518

- 9.428

- T in K

## 1 A MJTC Simulation Results

- Most heat is conducted through the heater
- High conductivity
- Large cross section
- Small temperature gradient
- Reduced Thomson errors

## 1 A MJTC Simulation Results

- High thermal conductance of the Si frame
- Reduced Peltier errors
- Thermocouple banks disconnected
- External connection reduces high-frequency errors

## 1 A MJTC Measurements

- Time constant: 0.5 s
- Dc reversal: < 10 μA/A

## 120 mA MJTC Chip Design

- Test: 1 A design, Evanohm heater
- 833 mV drop for 100 mW power
- Increased ac-dc difference from leakage capacitance
- Design goals:
- 100 mV drop at 120 mA:12 mW power
- Heater resistance of 0.83 Ω

## 120 mA Chip Design

- Propose to use 400 Ω TVC design with these modifications:
- Disconnect thermocouple banks
- Reduces high frequency errors
- Place thermocouples 10 μm from obelisk
- Reduces capacitive coupling
- CuAu heater
- 3 000 μm x 220 μm x 1 μm

## 120 mA MJTC Chip Design

- Membrane

- Thermocouples

- Heater

- Obelisk

- 6 mm

## 120 mA MJTC Thermal Simulation

*120 mA MJTC Thermal Simulation*

- Ambient + 7.5 K

- Ambient

- Temperature distribution on one-half the 120 mA MJTC

## Future Plans

- Fabricate MJTCs at NIST (Boulder, CO)
- We need many more chips than we have
- We need better communication with the fabrication facility
- Build high-
- 	current modules

## Conclusions

- 1 A MJTCs
- Designed
- Modeled
- Fabricated (a few)
- Measured
- Ac-dc Differences shown to be extremely small from 10 Hz to 100 kHz
- Measurements agree with simulation
- Presently addressing fabrication issues

## Conclusions

- 120 mA MJTCs
- Designed
- Modeled
- Hope to begin fabrication soon