# Presentation: 523557

## FLARE Electronics and Data Acquisition Summary

- references: presentations at Flare Workshop of 11/2004
-                    **Electronics            P. Rubinov**
**                   ****Data Acquisition   M. Bowden, M. Votava**
*& references therein*

- The detector is a  set of Time Projection Chambers with a total of  ~ 225,000 signal wires. The wires are in sets of 3 planes with spacing 5 mm.
- The maximum drift time is ~ 2 milliseconds
- (3 meters at 1.5 mm/microsecond at 500V/cm).
- The capacitance of a signal wire plus interconnecting cable ~800 pF (14 pF/m wires, 50 pF/m cable).
- The MIP deposit is 55,000 electrons (e) per cm. The signal size is 22,000 e (after full drift with 10 millisecond lifetime).
- Each wire is connected to a continuous wave-form digitizer with a pulse-height dynamic range of ~ 30 and a time bin of 0.5 microsecond.
- The signals from the wires pass to the electronics via ~ 80 chimneys in the top of the tank. Each chimney passes ~3000 signals.

- PPD Informal FLARE Review  4/19/2005

- S. Pordes Electronics and DAQ

## DRIFT

- ~5mm

- 5 mm

- Track

- 3 meters

- Induction (transparent) Planes

- Collection Plane

- -V1

- -V2

- signals from
- induction planes
- in ICARUS

- ICARUS shaping scheme

- PPD Informal FLARE Review  4/19/2005

- S. Pordes Electronics and DAQ

## FLARE Electronics and Data Acquisition Summary

- a) board and cable from wires to feed-through
- b) argon-air feed-through board
- c) connection from feed-through to front-end electronics
- d) front-end electronics board to amplify, ADC, process signals (zero-suppress (and more)) and to pass data to data-acquisition system
- e) provision for voltage offsets for induction planes and test pulse system

**FLARE Electronics and Data Acquisition Summary**

- Some Issues are:
- a) reliable interconnections;
- b) leak-tight feed-throughs;
- c) avoidance of interference from HV system and auxiliary equipment;
- d) signal routing from wire to electronics to minimize capacitance and ensure proper signal return;
- e) front-end electronics design; sensitivity, reliability, accessibility

- PPD Informal FLARE Review  4/19/2005

- S. Pordes Electronics and DAQ

## FLARE Electronics and Data Acquisition Summary

***general electronics schematic***

- based on P. Rubinov, Flare Workshop 11/2004

- amplifier sensitivity achieved in existing custom devices  - probably want ASIC
- commercial ADCs adequate performance, reasonable cost
- commercial FPGAs adequate performance, reasonable cost
- 128 channel boards, reasonable size (and cost) - 2000 such boards

- amp-
- shaper
- &
- multi-
- plexor
- ASIC

- wire
- board

- cable

- feedthru

- Argon

- Air

- (Test signal and Voltage offsets not shown)

- ADC

- ADC

- FPGA

- serial
- link

- (hit finder)

**FLARE Electronics and Data Acquisition Summary**

- PPD Informal FLARE Review  4/19/2005

- S. Pordes Electronics and DAQ

## FLARE Electronics and Data Acquisition Summary

**FLARE Electronics and Data Acquisition Summary**

- Note on Front-end electronics noise/sensitivity:
- We will probably want an ASIC front-end amplifier designed specifically for our capacitance and shaping times (~microseconds):
- noise(e) = A + B/pF  : A = 65, B = 5 for MASDA-X (designed for low capacitance)
-                                   A = 125, B = 2.6 for VA-1 (for larger capacitances)
- =>   a noise of 2700(e) is reasonable assumption for 800 pF (cf 22,000 e signal)

- PPD Informal FLARE Review  4/19/2005

- S. Pordes Electronics and DAQ

## FLARE Electronics and Data Acquisition Summary

-  Raw data rate = 250,000  x  2 MHz; need 2 bytes per sample
** ****WFT (****Wave Form Train****)  is all the data - *****works for `spill only*’***
- `Zero’ suppression:  *Cosmic ray rate  is 200 kHz; each ray ~5000 signals,*
-  Set intelligent threshold in FPGA,  pass next 20 samples
** ****DAT (****Data Above Threshold) - *****good for debugging***
-  Processing each hit fully in FPGA to return pulse-height and time; requires 4 bytes/hit
** ****FHP (Full Hit Processing) - *****works for DC acquisition***

***Data Acquisition schematic***

**FLARE Electronics and Data Acquisition Summary**

- * spill only looks at 4 milliseconds (to see events plus any early cosmic rays) each spill (every 2 seconds)

- PPD Informal FLARE Review  4/19/2005

- S. Pordes Electronics and DAQ

## FLARE Electronics and Data Acquisition Summary

|  | Continuous
(bytes/s) | Spill Only*
(bytes/s) |
| --- | --- | --- |
| Waveform train | 1012  | 2 x 109  |
| Data above threshold  | 4 x 1010  | 8 x 107  |
| Full hit processing  | 4 x 109 | 8 x 106 |

- * Spill Only looks at 4 milliseconds (to see events plus any early cosmic rays) each spill (every 2 seconds)

**FLARE Electronics and Data Acquisition Summary**

- PPD Informal FLARE Review  4/19/2005

- S. Pordes Electronics and DAQ

## FLARE Electronics and Data Acquisition Summary

- Data Collection and Distribution

- 1

- 2

- 2000

- 1

- 2

- 200

- Front-end (2000 Front-End Boards)

- Ethernet Network

- Processors (for online reconstruction)

- General Scheme using commercial links and switches

***Data Acquisition schematic***

**FLARE Electronics and Data Acquisition Summary**

- PPD Informal FLARE Review  4/19/2005

- S. Pordes Electronics and DAQ

- Data Network - per M. Bowden,M. Votava (Flare Workshop 11/2004)

- allows for 5 GByte/sec rate into ~ 200 Processors

***Data Acquisition Schematic***

- ...

- ...

- ...

- ...

- ...

- ...

- ...

- ...

- ...

- ...

- ...

- ...

- ...

- ...

- ...

- ...

- ...

- ...

- 24 in/1 out
- (Fan-in)

-    12 in/12 out
- (Fan-in/Fan-out)

- Front End  Boards Serial Links

- commercial  switches well matched to required data rates.

- Front End
- Switch ~100

- Gigabit Ethernet switches ~ 50

-    12 in/12 out
- (Fan-in/Fan-out)

**FLARE Electronics and Data Acquisition Summary**

- PPD Informal FLARE Review  4/19/2005

- S. Pordes Electronics and DAQ

## FLARE Electronics and Data Acquisition Summary

***cost/channel:***
- connectors, cable, feed-through boards	~ $7(halogen-free cable, 8 connectors)
*Front-end board*
- ASIC amplifier/shaper                                       ~ $4 ($1 million total)
- commercial components (ADC, FPGA, LINK)  	~ $5 (typical parts costs)
*passive parts*
- board and assembly                                         	~ $5 (>recent (complex) board costs)

- 250,000 channels  @ $21/channel = $5,250,000 (cost of `electronics’)

**FLARE Electronics and Data Acquisition Summary**

- PPD Informal FLARE Review  4/19/2005

- S. Pordes Electronics and DAQ

## FLARE Electronics and Data Acquisition Summary

***Network***
- Front-End Switches (100)	~ $15k
- Gigabit Ethernet Switches (50)	~ $25k
- Cabling	~ $10k
***Processing Farm***
- Processors (200)	~ $400k
- Data Storage	~ $400k (S.P.)
***General******	***
- Slow Controls	~ $200k
- Timing/Clock System	~ $50k
- Development System	~ $150k
- Infrastructure	~ $250k (S.P.)
***Total DAQ M&S***	**~$1,400k**

**FLARE Electronics and Data Acquisition Summary**

- PPD Informal FLARE Review  4/19/2005

- S. Pordes Electronics and DAQ

## FLARE Electronics and Data Acquisition Summary

***If we were given appropriate resources***
***First order tasks:***
- a) Make a complete design of the entire electronics system to identify parts and to estimate power consumption and M&S costs accurately;
- b) Design the path from the end of the wire to the electronics input including the feed-throughs;
- c) Generate specification of front-end amplifier and multiplexor.
***Generic task (interacts with analysis)***
- Develop  data organization scheme (by wire? by time?) that enables efficient track finding and reconstruction.

- Would claim that there is a good picture of overall system architecture and a reasonably sensible cost estimate - thanks to support from PPD and CD.
- What is needed is an actual design to make more accurate cost estimates and to understand real performance.

**FLARE Electronics and Data Acquisition Summary**

- PPD Informal FLARE Review  4/19/2005

- S. Pordes Electronics and DAQ