# Presentation: 720102

## Hall D Front End Electronics

- Fernando J. Barbosa
- 23 - 24 July 2003
- _[barbosa@jlab.org](mailto:barbosa@jlab.org)_

## Topics

- Sensors & Systems
- Generic Front End
- Implementation
- Summary

## Sensors & Systems

- 				# of Channels		ADC	TDC
- Drift Chambers		12,000		9,120	2,880
- 	*Central, Forward*
- PMTs & HPMTs	3,405		3,405	1,205
- 	*Tagger, Start, Veto Counters*
*	**Barrel , Forward Calorimeters*
*	**TOF,C**ĕ**renkov*
- Semiconductor
- 	*Silicon ****-strip Polarimeter*	2,048			2,048
- 	*VLPC*			2,000			2,000

## Generic Front End

- Preamp parameters chosen for improved S/N, signal rates, power dissipation, etc.
- On-detector digitization decreases cabling requirements but increases complexity and imposes more stringent requirements on reliability.
- Copper links should be used in high radiation areas.

- Pole-Zero

-     CR-(RC)n
- Semi-Gaussian Shaper

- BLR

- is

- Cd

- Cf

- Rf

- Driver

- Discriminator
- LE, CFD, ZC

- ADC

- Pipeline

- Copper

- Fiber

- To DAQ

- Digitization

- Preamp

## Implementation

- Discrete
- Hybrid & MCM
- ASIC

- Semiconductors (SMT)

- Passives
- (SMT)

- FR-4

- Semiconductor (SMT)

- SMT Caps

- Ceramic , FR-4, AlN

- Semiconductor
- (Wirebonded)

- Pasted Resistors

- Ceramic , FR-4, AlN

- ASIC
- (Wirebonded or Packaged)

## Discrete

- Component Availability
- Cheap
- Proven Technology
- Reliable
- Production Control
- Medium Density

## Hybrid & MCM

- Component Availability
- More Expensive Than Discrete
- Proven Technology
- Higher Reliability
- Production Control
- Medium To High Density

## CP01 – Hybrid

- ~36K channels installed in Hall B.
- Recently updated for harsh environments.
- < $4 per channel.

## ASIC

- A number of ASICs have been designed for experiments at LHC, FNAL, BNL, etc.
- ... Some of these may fit our requirements ...
- ... But may not be available for prototyping or production!
- ... Custom or modified design is a good alternative.
- Production will depend on technology availability, mask set redesign and cost.
- Cost justification will depend on the number of chips required.
- Robust Technology.
- Highest Reliability.
- Highest Density.
- Functional Chip Tests Required!!

## ASDQ ASIC

- Preamp, Shaper, Discriminator & Q-measurement.
- 8-channels for Timing and dE/dx - Q is encoded into Output Pulse Width.
- Designed for CDF ~ 500,000 at FNAL & CERN in several variations.
- 250 Chips (2000 Channels) per Wafer.
- Requires mask set Redesign, Production, Packaging & Testing < $15/Channel.

- Input
- Protect

- Preamp,
- Shaper &
- BLR

- Discriminator
- & dE/dx

- Output
- Driver

- +

- -

- +

- -

## Some ASIC Cost Estimates

- Prototyping costs depend on Technology**
- 		$1K, Qty. 5, 1.50 um AMIS
- 		$15K, Qty. 40, 0.25 um TSMC
- 		$45K, Qty. 40, 0.13 um IBM
- Engineering Runs
- 		Mask sets may cost ~ $45K
- 		Cost per channel ~ $1
- *Preliminary results show that deep sub-micron processes at 1.8 um and 1.3 um are radiation tolerant.
- **Source: MOSIS 7/11/2003

## Support Systems 

- Ancillary Detector PCBs
- Thermal Constraints
- Cabling – Routing & Performance
- Power Supplies & Distribution
- Grounding
- Slow Controls
- ...

## Summary ...

- The front end electronics requirements for Hall D are not much different from those in Hall B.
- Updating the Present Hall B architecture is a viable option but requires preamp, post-amp/discriminators, TDCs, ADCs (?) ...

- is

- Detector

- Preamp
- CP01H

- Twisted Diff. Pair
- Shielded & Round

- Analog

- ADB Crates

- TDC Crates

- Amp & Discriminator

- dECL

- To DAQ

## Summary (cont.)

- The ASDQ ASIC needs to be redesigned but is a cost effective option for system integration – only additional TDCs are required. ... simple and reliable ...
- Other ASICs will become available in the near future (i.e., CARIOCA) and may be cheaper if costs shared with other experiments or institutions.

- is

- Detector

- Preamp
- ASDQ-type

- Twisted Diff. Pair
- Shielded & Round

- LVDS

- TDC Crates

- To DAQ