# Presentation: 813984

## APS BPM and power supply applications on micro-IOCs

*W. Eric Norum*
*2006-06-15*

## Arcturus uCDIMM ColdFire 5282 module

- Motorola/FreeScale ColdFire 5282 processor (64 MHz)
- 16 Megabyte SDRAM (32-bit data path)
- 4 Megabyte flash memory (RTEMS/EPICS/IOC)
- 1/2 Megabyte on-chip flash (bootstrap)
- SO-DIMM form factor
- ~$200 in small quantities, $120 each for orders of 500 or more.

## Arcturus uCDIMM ColdFire 5282 module

- 10/100 Mb/s Ethernet (10/100 BaseT)
- 3 serial ports (2 RS-232, 1 LVTTL)
- I2C and SPI
- CAN support
- 8-channel, 10-bit ADC
- A24/D16 external bus
- 5 interrupt request lines
- 16 general-purpose I/O lines

## EPICS device support

- Ethernet and serial ASYN drivers
- I2C ASYN driver
- Tested with MAX1619 temperature monitor
- Easy to add support for additional devices (GPIB-style)
- QADC device support for analog-in record
- Scanning (“voltmeter”) operation
- Custom support for ‘transient recorder’ operation (DESY power monitor)
- Watchdog timer device support for binary-out record
- Hardware reset on failure to process record in 5 second interval
- Flash memory programming device support
- Remote updates of application using standard EPICS tools
- devLib support
- ‘VME’ devices implemented in Altera FPGA (Avalon)

## uCDIMM ColdFire 5282 Bridge

- Separate ColdFire/FPGA clock domains
- 25-bit FPGA address space (16-bit data bus to ColdFire)
- ColdFire sees
*Full VME A24/D16*
*Full VME A16/D16*
*Subset of VME A32/D32 *
- Full FPGA interrupt support
- FPGA interrupts 0 to 63 map to VME interrupts 192 to 255
- ColdFire IOCs can use standard devLib VME support

## Updates to μCDIMM 5282 Support

- BSP now computes CPU load
- Implemented as custom ‘Idle’ task and code in timer interrupt handler
- Bandwidth  ~1 Hz with 100 Hz timer interrupts
- Very low overhead – counters kept in on-chip SRAM (no bus activity)
- EPICS support – single longin PV.

## Updates to μCDIMM 5282 Support

- Additional modules built for RTEMS-uC5282 target:
- Synapps autosave/restore
- Generic transient recorder
- Tektronix TDS3000
- Several other serial/GPIB instruments (asyn/devGpib)

## Monopulse BPM signal processing

- Acquires signals from existing monopulse receivers
- Single large FPGA (Altera Stratix II) with ColdFire IOC
- Eight 88-MHz, 14-bit ADCs per module (4 receivers, 4 X/Y positions)
- VXI form factor – only connection to backplane is for power/ground
- 2-ADC prototype now being tested (full 8-ADC FPGA firmware complete)
- Altera Stratix II development kit
- Custom ADC board
- Recently began layout of final 8-ADC board

## Monopulse BPM – continuous processing

- Accumulate 88 MHz samples, compute turn-by-turn average position/sum
- 16 channels
- Low-pass filter (Fsamp=272 kHz), send to fast-feedback (100 Mb/s)
- Send 16 values every 7.36 μs
- Low-pass filter to give 10 Hz, 1 Hz, 0.1 Hz bandwidth EPICS PVs
- Bandpass filter and true RMS calculation to give RMS motion in two ranges (typically 1 Hz to 200 Hz and 1 Hz to 5 kHz) with 1 Hz and 0.1 Hz bandwidth EPICS PVs
- Filter blocks are 6th order (3 biquad) IIR with 36-bit fixed point arithmetic
- Coefficients set/read as EPICS waveform records
- Filter output PVs
- ‘Force update’ PV

## Monopulse BPM – continuous processing

## Monopulse BPM – triggered processing

- Generic Transient Recorder drivers, pre- and post-trigger values
- ‘Oscilloscope’
- Raw ADC values, 88 MHz sampling, 4096 points
- Event (APS event system), PV or external trigger
- Can inhibit samples without beam to get bunch-by-bunch positions for many turns
- Turn history
- Turn-by-turn values, 272 kHz sampling, 262144 points
- Event, Σ channel below threshold, PV or external trigger
- Slow beam history
- 10 Hz bandwidth filter output, 100 Hz sampling, 2048 points
- Event or PV trigger
- Single-shot
- First to Nth turn position
- Delay N turns from Event trigger

## Power Supply Controller (“Smart” Interface Board)

- Arcturus ucDimm 5282 (Coldfire)
- Altera Cyclone II FPGA
- EPICS R3.14.8.2
- RTEMS 4.7 (CVS)
- Asyn 4-5
- 108 digital inputs
- 120 digital outputs
- 64 12-bit analog inputs
- 128 Mbit SDRAM (for AFG)
- 8 fiber receivers for RTFB or ramp synchronization
- Plenty of local diagnostic LEDs
- Controls up to 8 power supplies

## Power Supply Controls – Before

**IOC**

## Power Supply Controls – After