# Presentation: 381532

## Longitudinal Dampers for        Main Injector

- Bill Foster , Dennis Nicklaus,
- Warren Schappert, Dave Wildman
- Mar ‘03

## MI/RR Damper

- Documentation
- Hardware (longitudinal)
- ACNET Interface

## Mother Lode of Damper Papers:\\beamssrv1\minjectr.bd\Damper\Papers

- Missing (hardcopy only):
- Lambertson AIP proceeding on EM theory of pickup & kickers
- Papers on FNAL super-dampers for MR & TeV
- Intention (~1/4 complete) is to have online directory & summary.

## Wide Variety of Beam Dampers Required in MI & Recycler

- Transverse (X,Y) and Longitudinal
- 53 MHz, 2.5 MHz, 7.5 MHz, and DC Beam
- Single Bunches, Full Batches, Short Batches
- Injection, Ramping, and Stored Beam
- Pbar and Proton Directions (different timing)

## ... plus unbunched DC Beam in Recycler...

*... **plus unbunched DC Beam in Recycler...*

## Damper Operating Modes

**X** = Operation          **c**** **= Commissioning & Tuneup

|  | Booster |  | Main Inj. |  | Recycler |  | Tevatron |  |
| --- | --- | --- | --- | --- | --- | --- | --- | --- |
|  | Pbar | P | Pbar | P | Pbar | P | Pbar | P |
| 53 MHz Full Batches |  | X |  | X |  | C |  |  |
| 53 MHz Short Batches |  |  | X | X |  |  |  |  |
| 53 MHz Coalesced Bunch |  |  | X | X |  |  | X | X |
| 2.5 MHz Batch (4) |  |  | X | C | X | C |  |  |
| 7.5 MHz Batch (12) |  |  | X | C |  |  |  |  |
| DC Beam |  |  |  |  | X | C |  |  |

## Longitudinal Beam Instability in MI 

- Driven by cavity wake fields within bunch train
- Seeded by Booster & amplified near MI flat top.

- First Bunch ~ OK

- 7th Bunch Trashed

- Occurs with as few as 7 bunches (out of 588)
- Prevents low emittance bunch coalescing and efficient Pbar bunch rotation

***see Dave Wildman’s Talk***

## Damper Priorities in Main Injector & Recycler

- Main Injector Longitudinal Dampers
- Main Injector Transverse Dampers
- Recycler Transverse Injection Dampers
- Recycler Longitudinal Dampers
- Recycler Broadband (DC Beam) Dampers

## Advantages of Digital Filters

- Digital filter can also operate at multiple lower frequencies  ...simultaneously if desired.
-  MI will not be blind for 2.5 and 7.5 MHz Beam
- Digital filters more reproducible (=>spares!)
- Re-use Standard hardware with new FPGA code
- or same code with different filter coefficients
- Inputs and Outputs clearly defined (& stored!)
- filters can be developed & debugged offline

## Generic Dampertolerating frequency sweep 

*FIFO needed due to phase shifts between DAC and ADC clocks *
*as beam accelerates*

*All Logic*
*Inside*
*FPGA*

## Echotek Card Used for Initial Dampers

- 212 MHz DAC
- Daughter Card
- (S. Hansen/ PPD)
- due this week

## Digital Signal Processing with FPGA’s

- Commercial card from Echotek
- 8 channels of 14-bit, 106 MHz Digitization
- One card does all dampers for one machine
- Customized FPGA firmware
- Bill Ashmanskas
- GW Foster
- Warren Schappert...
- Handles Wide Variety of Bunch Structure

## All-Coordinate Digital Damper

- 53 MHz, TCLK, MDAT,...

- Monster
- FPGA(s)

- Minimal
- Analog
- Filter

- FAST
- ADC

- Stripline
- Pickup

- Minimal
- Analog
- Filter

- FAST
- ADC

- 14

- VME

- 106 / 212 MHz

- Stripline
- Kicker

- Power
- Amp

- Minimal
- Analog
- Filter

- FAST
- ADC

- Resistive Wall Monitor

- Broadband Cavity

- FAST
- DACs

- > 27 MHz

- FAST
- DACs

- Power
- Amp

- Transverse
- Dampers
- Identical
- X & Y

- Longi-
- tudinal
- (Z)
- Damper

- 2-10

- 2-10

## New Damper Board (A. Seminov)

*SINGLE* high-end FPGA   (vs. 5 on Echotek)
- Four 212 MHz ADCs        (vs. 106 MHz on Etk.)
- Four 424 MHz DACs        (vs. 212 MHz on Etk.)
- Digital Inputs:
-  TCLK,  MDAT,  BSYNCH,  53 MHz,  AA
- Digital Outputs:
- Pbar/P TTL, scope trigger, 1 GHz serial Links..
- NIM module with Ethernet interface to ACNET
*** **Other possible uses include replacing entire Booster LLRF system, and Universal BPM.*

## Recycler Broadband RF Cavity(3 similar new for broadband damper)

*Non-Resonant Cavity looks like 50-Ohm Load *
*in parallel with a large Inductor*

## Wideband Power Amplifiers

- Recycler has four of these amps, capable of generating +/-2000V or arbitrary waveform.
- MI  (D. Wildman) ordered 3 more for longitudinal Dampers, due ~May.
-  ~1800V of broadband voltage in MI

## Pbars vs. Proton Timing: Longitudinal

- 3 Cavites spanning 5-10 meters
- Bunch-by-bunch kick needs separate fanout for Protons and Pbars
- Either:
- One DAC per Cavity
- Relay switch box with different cable delays     *this option chosen*  single TTL bit Pbar-P

## “Universal-Damper” Application: Signal Processing Steps (transverse)

- 1)  Bandwidth-Limit input signal to ~53 MHz
- 2)  14 Bit Digitization at 106 MHz or 212 MHz
- 3)  FIR filter to get single-bunch signal
- 4)  Sum & Difference of plate signals
- 5)  Multi turn difference filter (FIR) w/delay
- 6)  Pickup Mixing for correct Betatron Phase
- 7)  Bunch-by-bunch gain, dead band etc.
- 8)  Timing Corrections for Frequency Sweep
- 9)  Pre-Distortion for Kicker Power Amp
- 10)  Power Amp for Kicker

- Inside
- FPGA

- Echotek
- Board

- Buy

## 1.  Longitudinal Damper  in Main Injector

- Benefits to Bunch Coalescing for Collider
- “Dancing Bunches” degrade Proton coalescing and  ****L
- Affects Lum directly (hourglass) and indirectly (lifetime)
- We are deliberately blowing ****L in Booster
- Benefits for Pbar Stacking Cycles
- Bunch Rotation is generally turned off !  (x1.5 stack rate?)
- Slip-Stacking etc. (Run IIb) will require stable bunches
- Needed for eventual NUMI operation

## Longitudinal Damper Works by Modulating Phase of RF Zero Crossing

## Damping of Bunch Motion by Modulation of Center of Rotation (RF zero-crossing) on Alternate Half-cycles of Synchrotron Motion 

## Numerical Examples for Longitudinal Dampers

*Damping can be made faster *
*by raising V**DAMPER **   and/or  lowering V**RF*

## Longitudinal Damper FPGA Logic

- ADC

**ResistiveWall Pickup**

- 14

- Synchrotron
- Motion
- Velocity
- Filter

- Bunch-by-
- Bunch Digital
- Phase Detector

- +THRESH

- -THRESH

- Multi-Turn
- Memory

- Bunch Intensity
- FIR Filter

- +THRESH

**+/- KICK**
**to DAMPER**

*Individual Bunches are kicked + or – depending on whether they are moving right or left in phase*

## FPGA Code for Longitudinal Damper

## MI Longitudinal Damper(Ashmanskas, Foster)

- Single Bunch Digital Kick    
- using Digital Velocity Filter
- implemented in FPGA firmware

- 80 Bunch-by-Bunch synchrotron oscillations (on Pbar Stacking Cycle) measured with Echotek board & custom firmware

- TURN NUMBER AFTER INJECTION 

- BUNCH –BY-BUNCH  PHASE (w/offset)

## MI Longitudinal Damper Kick Calculated in FPGA Firmware(Ashmanskas, Foster)

## ACNET Issues

- Damper must behave differently for different bunches  bunch-by-bunch RAM
- Specifies Damper Gain, anti damp, noise injection, pinging, etc. on bunch-by-bunch basis.
- Damper must behave differently on different MI cycles
- Each control register becomes an ACNET Array Device indexed by RF State
- Register contents switch automatically when MI State changes *(D. Nicklaus) *

## ACNET Control Devices (>250 total)

- MasterControl Registers typically single devices
- Most control registers are array devices indexed by MI State

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## What ADC Clock Speed is needed?

~53 MHz Bandwidth limited signal,  sampled by 106 MHz ADC, measures either in-phase (cosine) or quadrature (sine) component
but not both ==> ADC clock phasing matters!

212 MHz sampling measures both in-phase and quadrature components.  Phasing is not critical to determine vector magnitude.

212 MHz built in phase measurement

- ~53 MHz Bandwidth limited signal,  sampled by 106 MHz ADC, measures _either_ *in-phase* (cosine) _or_ *quadrature *(sine) component
- but not both ==> ADC clock phasing matters!
- 212 MHz sampling measures _both_ *in-phase* _and_ *quadrature* components.  *Phasing is not critical* to determine vector magnitude.
- 212 MHz built in phase measurement

## Bandwidth Limit Signal

- Raw signal has high-frequency components which can cause signal to be missed by ADC
-   “Aliasing”
- Bandwidth limited signal (to ~50 MHz) cannot be missed by 106 MHz ADC
- Eliminate low-frequency ripple, baseline shifts, etc. with Transformer or AC coupling
- Digital Filtering can provide additional rejection

## Gaussian Filter - Impulse Response

- Many implementations,   e.g.  traversal filter

***Spreads signal +/-5ns in time so it will not be missed by ADC***

***Reduces ADC Dynamic Range requirement, since spike does not have to be digitized***

## In-Phase and Quadrature Sampling

***“******A - B”  gives bunch-by-bunch “in-phase” signal***

***Vector Sum ***
***sqrt(I**2 +Q**2)  is insensitive to clock jitter***

***“******D - (C+E)/2”  gives ***
***bunch-by-bunch “out-of-phase” or “quadrature” signal***

- This is the argument for sampling at 2x Nyquist