# Presentation: 209201

## ALICE Silicon Pixel Detector (SPD)Rene Bellwied, Wayne State University

- Layout, Mechanics & cooling, Silicon sensors, Electronics
- Proposal for STAR
- Cost Estimate
- Required resources ?

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied

## Compare LHC pixels

- STAR could use one or two pixel layers instead or in combination with Si strip (SSD or new strip detectors) and GEM detectors as a pointnig device for the HFT.
- There is ample Si hybrid pixel experience at the LHC (and FNAL)
- ALICE: 0.2 m2, 9.8 Million channels
- ATLAS: 2m2, 80 Million channels
- CMS: 2m2, 33 Million channels

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied

## ALICE-SPD (Hybrid Pixels) -  Design Parameters

- Two barrel layers 		Ri= 39mm, Ro = 76mm
- Pixel cell dimensions		50m (r ) x 425m (z)
- Front-end electronics 		CMOS6 0.25m standard process on 8” wafers,                           				rad-hard design
- Pixel ASIC thickness (target)	≤ 150m (wafers thinned after bump deposition)
- Si sensor ladder thickness		≤ 200m
- Flip-chip			solder bumps/indium bumps
- Pixel bus			aluminium-polyimide flex
- Cooling			water/C6F14/[C3F8 (evaporative)]
- Material budget	 (each layer)	≈ 0.9% X0 (Si ≈ 0.37, cooling ≈ 0.3, bus 0.17, support ≈ 0.1)
- Total Si surface			≈ 0.24 m2
- Occupancy			< 2%

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied

## SPD Mechanical Configuration (II)

- 2 barrel layers
- z= ± 14.15cm (sensitive)
- r1 = 3.9 cm, r2 = 7.6 cm

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied

## SPD Ladders & Staves

- 1 sector
- one carbon-fibre support for layer 1+2

- 4 staves in outer layer
- 2 staves in inner layer

- ladder (1 sensor, 5 chips)
- half-stave: 2 ladders

- readout of 120 half-staves in parallel

*Image: INFN Padova*

- SPD total 1200 pixel chips, ≈ 107 pixels

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied

## Exploded view FEE & half stave.

- ALICE SPD Sector Layout (cont.)

- Extenders

- Glob top

- Optical link (STm)

- MCM

- Pilot, GOL

- Grounding foil: kapton 8 m silver .15m

- Aluminum/kapton bus

- Ladder 1

- Ladder 2

- Spacer

- SMD components

- Bias

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied

## Pixel Bus & Ladders (II)

- M. Morel

- 7-layer
- Aluminum
- Kapton Flex
- 200 m
- 150 m

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied

## ALICE Pixel ASIC

-  CMOS6 0.25 μm (8” wafers)
-  Radiation hard design (enclosed transistors)
-  ≈ 13.106 transistors
-  8192 pixel cells 50 μm x 425 μm
-  256 rows, 32 columns
-  Active area: 12.8mm x 13.6mm
-  10 MHz clock  (JTAG RDO: 5 MHz clock)
-  1.8V power supply
-   ~100 μW/channel

- M. Campbell

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied

## Pixel Cell 

- M. Campbell

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied

## SPD Sector (II)

- A. Pepato

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied

## ALICE SPD Layout settore

- Endcap sector support

- Innermost skin of the cylindrical support structure

- Capillars tubes

- Cooling collectores placed on the cylindrical SS.

- Outer layer dissipates
- about 1 kW

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied

## Mechanics & Cooling

- A. Pepato

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied

## Possible Proposal to STAR

- Copy the second layer of the ALICE Pixel setup
- Use the same wafers, electronics, support structure, and cooling
- Here are the numbers:
- 		radius: 7.6 cm, length: 28.3 cm, pixel size: 50 by 425 micron (425 in z-direction)
- 		pixel cell (wafer) size: 1.28 by 1.36 cm, number of pixel cells: 800
- 		number of readout channels: ~6.5 Million pixels, wafers per ladder: 20
- 		number of ladders: 4, radiation length (total): 0.9%
- 		rad.length (breakdown): 0.4% Si, 0.3% cooling, 0.2% support)
- 		cooling: evaporative
- If one wants to build a second layer at 15 cm the number of wafers (cells) will triple to 2400.

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied

## Comparison to PHENIX/ALICE setup

**http://www.phenix.bnl.gov/phenix/WWW/publish/akiba/2004/VTX_rev2/PHENIX-VTX-PROPOSAL.pdf**
- PHENIX uses the ALICE pixels for the two inner layers of their four layer detector.
- The pixel barrel radii are at 2.5 cm and 5 cm. Both barrels together consists of 480 ALICE pixels.
- Total pixel detector cost of about 4 Million Dollar.
- Just in terms of Silicon this project is about 60% of our single barrel approach at a radius of 7.6 cm.
- Rough cost estimate for our single layer approach ~ 5 Million Dollar.

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied

## Regarding Nikolai’s simulations

- A 2nd layer at r = 6.4 cm (inner layer to the SPD at 7.6 cm):
- The project size in terms of Silicon and electronics goes up by:
- 	~ 80% (~1500 instead of 800 pixel detectors)
- The detectors on the second layer would have to be rotated by 90 degrees in order to achieve the necessary benefit in the ‘weak resolution’ direction (z-direction). This is a very challenging concept in terms of support structure and readout.
- Adapting the ALICE support structure layout to a two layer detector might be easier than re-designing it for a single hybrid pixel layer
- One needs to evaluate the specific layout (and material budget) which was optimized for ALICE, e.g. is evaporative cooling really necassary ?

- STAR Tracking Upgrade Meeting, Boston, 07/10/06

- Rene Bellwied