# Presentation: 804309

## Pixel Readout Efficiency

- David Christian
- Fermilab

## Pixel sensor efficiency

- Most probable charge deposited  24000 e-.
- Landau distribution  MIP **always** deposits greater than 14000 e-.
- Sharing reduces the charge input to an individual electronics pixel, but with a discriminator threshold of 2000 e-, the detection efficiency is >99.9%.
- The fact that pixels provide space points & are ~100% efficient allows BTeV to use very simple & fast tracking algorithms & is **the** key to the success of the experiment.

- February 1, 2001

## Measured Landau Distribution (p-stop sensor)

- Small
- Amount of
- Charge loss
- At corners
- Should not be
- Present in
- Final sensors.

- February 1, 2001

## Readout Efficiency Simulation Methodology

- Generate pixel “hits” using BTeV Geant
- “Minimum bias” at 1E32, 2E32, 4E32, 6E32
- 	(Ave. of 1,2,4,6 interactions per crossing;
- 	 includes ~1/500 B events w ~2x normal
- 	 track multiplicity – **2E32 is nominal rate**)
- Translate file of pixel “hits” (given for one central plane) to list of hit pixels:
- x,y,dx/dz, dy/dz, (# pixels hit) 
- list of (row,col,adc)
- Use Verilog to simulate FPIX2 core (periphery assumed not to lose any data)

- February 1, 2001

## Step 1: BTeV Geant

- Well tested simulation Monte Carlo.
- Used (for proposal) to simulate detector response to a variety of B decays of interest... will be maintained for use throughout the life of the BTeV experiment.
- Includes a pretty good guess of all material in the active area.
- Charged particles are propagated through magnetic field; allowed to scatter, interact, & radiate photons in material.
- Neutrals propagated; allowed to scatter, interact, and (photons) pair produce e+e-.
- Simulation includes -rays with energy > 1 MeV

- February 1, 2001

## Step 2: Generate list of hit pixels

- FORTRAN program allows one to select an arbitrary chip position with respect to the beam hole.
- Uses track slope in x & y to figure out which pixels are traversed (includes sharing across columns as well as across rows).
- Adds a small dx & dy to account for charge diffusion.
- Calculates ADC using track length in cell (simply proportional to length; no Landau).

- February 1, 2001

## Step 3: Verilog Simulation

- Very simple model of sensor/FPIX front end
- Two parameters are set depending on (input) 5-bit pulse ht:
- Discriminator timewalk (with respect to BCO)
- Analog memory (time that no 2nd hit is allowed)
- Complete and accurate model of digital aspects of FPIX “core.”
- Models 160 rows x 18 columns
- Max. readout clock frequency determined by
- Horizontal & vertical token passing
- With 160 rows, vertical token limits clock to  30 ns
- Almost all data loss occurs because EOC timestamp registers fill up.  Minor EOC logic error identified.

- February 1, 2001

## Representative (preliminary)Verilog Results

| # interactions per crossing | R/O Eff. with 30 ns clock | R/O Eff. with 25 ns clock |
| --- | --- | --- |
| 1 | 99.8% |  |
| 2 | 99.7% |  |
| 4 | 99.1% | 99.3% |
| 6 | 96.4% | 98.2% |

- February 1, 2001

## Known deficiencies

- Geant ignores -rays below 1 MeV
-    (can be added in step 2).
- Geant include no “accelerator” backgrounds, such as tracks from beam-gas interactions or muons from scraping on magnets, etc.
- FORTRAN program (step 2) doesn’t include magnetic field effect (increases sharing across columns in non-bend view by ~12.5% & changes sharing along rows in the other view).
- FORTRAN program doesn’t yet include -rays.
- Procedure underestimates multiplicity slightly
-      (15-50%)?

- February 1, 2001

## Trigger sensitivity to pixel inefficiency

- Trigger loses efficiency **quickly** as pixel efficiency degrades

- Almost a 10% loss

| Inner chip
Efficiency | Efficiency of
Balance | Trigger Efficiency for Bs  DsK |
| --- | --- | --- |
| 100% | 100% | 74% |
| 99.5% | 99.5% | 72% |
| 99% | 99.5% | 71% |
| 97.5% | 99%; 99.5% | 68% |

- February 1, 2001

## What efficiency is achievable?

- Sources of loss:
- Missing bump bonds
- Hot pixels
- Data loss in FPIX2
- Missing bumps
- Experience so far  ~0.1% is achievable
- (although most of the sensors we have tested so far have regions containing no bumps amounting to >> 0.1%)
- Hot pixels
- Very little experience (limited statistics)
- (1-2)/1300 in each FPIX1 sensor + pixels connected to two electronics pixels; (1-2)/700 ...  0.3%
- Conclusion: Missing bumps + Hot pixels  0.5%

- February 1, 2001

## Readout efficiency requirement (proposed)

| Luminosity | Inner chip
efficiency | Efficiency of balance | Trigger Efficiency for Bs  DsK |
| --- | --- | --- | --- |
| Nominal
(2 x 1032) | >99.5% | >99.9% | 71% |
| 2 x Nominal
(4 x 1032) | >99% | >99.8% | ~70% |
| 3 x Nominal
(6 x 1032) | >98% | >99.5% | 68% |

- February 1, 2001