# Presentation: 153654

## The DØ Silicon Track Trigger

**Georg Steinbr****ü****ck**
**Columbia University, New York**
**On behalf of the D****Ø**** collaboration**
**Vertex 2002 Kailua-Kona, Hawaii**

**Introduction + Motivation**
**Design**
**Status**

- 7-November-2002

- G. Steinbrück

## The DØ Run 2 Detector

**The D****Ø Run 2 Detector**

**Relevant in this context: ****New state of the art tracker**

- SMT

- 7-November-2002

- G. Steinbrück

## Silicon Microstrip Tracker (SMT)

**Silicon Microstrip Tracker (SMT)**

- 6 Barrels

- 12 F-Disks

- 4 H-Disks

**Good angular coverage**
**10 ********m position resolution**
**793k readout channels**

- KS   +-

**D****Ø Run 2 Preliminary**

- 7-November-2002

- G. Steinbrück

**Notes:**
Momentum resolution of SMT only tracking

Pitch of strips

Comments on power supplies problems ?

Radiation dose accumulated so far ?

Working on improving the tracking and vertex
reconstruction software, using the disks

## The Central Fiber Tracker

**Scintillating Fibers**
**Up to |********|**** ****=1.7**
**20 cm < r < 51 cm**
**8 double layers **
**CFT: 77,000 channels**

- CFT

- 7-November-2002

- G. Steinbrück

## The DØ Trigger System

**2.3 ****MHz**

***5 k*****Hz**

***1 k*****Hz**

- L1

- L2

- L3

**50 Hz**

- Decision time
-      4.2s

- Decision time
-     100s

- Decision time
-       ~50ms

**p**

- p

**Crossing frequency**
**         ****2.3MHz**

- But data acquisition rate is limited to 50 Hz

****** ****3 Level Trigger System**

** ****Hardware based **
** ****Simple Signatures in each Sub-Detector**

** ****Software based **
** ****L2 pre- processors in Firmware **
** ****Physics Objects ****  e,********,jets, tracks**

** ****Software based **
** ****Simple versions of reconstruction algorithms**

**The D****Ø**** Trigger System**

- 7-November-2002

- G. Steinbrück

## DØ Trigger System

- 7-November-2002

- G. Steinbrück

## Physics Motivation for STT

**Increase inclusive bb production yield six-fold with low enough threshold to see Z********bb signal **
**Control sample for b-jet energy calibration, bb mass resolution, b trigger and tagging efficiencies    **
**Top quark physics**
**Factor of 2 improvement in top mass systematics due to improved jet energy scale calibration **
**Heavy bb resonances for Higgs searches**
**Double trigger efficiency for ZH********(********)(bb) by rejecting QCD gluons and light-quark jets **
**b-quark physics**
**Lower p****T**** threshold on single lepton and dilepton triggers                       (B****O************, B****s**** mixing, etc.)**
**Increase B****d****o********J/********K****S ****yield by 50% (CP violation) **
**STT proposed 1998 as addendum to D****Ø**** baseline**
**Received approval and funding in 1999**

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- 7-November-2002

- G. Steinbrück

## The Idea

**The Idea**

** ****b quarks are key in many areas:**
** ****Higgs Physics (ZH********bb****)**
** ****top physics ( t->Wb)**
** ****B physics**
** ****b quarks have a finite lifetime **
**  ****travel mm’s before they decay**
** ********displaced tracks****	**
** ****Use STT to trigger on displaced tracks**
** ****using the precision of the Silicon Tracker**
** ****Impact parameter resolution 35 ********m (includes 30 ********m from beamspot) **

**Need to make very fast decisions!**

- Tracks

- -

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- 7-November-2002

- G. Steinbrück

## STT Overview

- CFT outer layer

- 1-mm road

- SMT barrels

- CFT inner layer

- Find Silicon Hits in Roads defined by Central Fiber Tracker

- 7-November-2002

- G. Steinbrück

## STT Design

- TFC

- STC

- STC

- STC

- STC

- STC

- STC

- STC

- STC

- CPU

- 1

- 2

- spare

- 3

- SBC

- 4

- 5

- 6

- 7

- 9

- 10

- 11

- 12

- 13

- 14

- 15

- 16

- 20

- TFC

- 19

- 18

- 17

- 21

- spare

- terminator

- terminator

- to L2CTT

**SCL in**

- to L2CTT

- 8

- spare

- spare

- spare

- Layout of Run 2A STT Crate

- 6 Identical Crates with
- 1 Fiber Road Card
- 9 Silicon Trigger Cards
- 2 Track Fit Cards

**STT Design**

- Sector 1

- Sector 2

**L2 Global**

**L2 Global**

- 7-November-2002

- G. Steinbrück

## Motherboard and Communication Links

**Motherboard and Communication Links**

**9Ux400 mm VME64x****-compatible **
**3 33-MHz PCI busses**** for on-board communications**
**Data ****communicated between cards via point-to-point links**** (LVDS) (Link Transmitter and Receiver Cards)**
**Control signals sent over backplane using ****dedicated lines**
**VME bus used for Level 3 readout**** and initialization/monitoring**

**Universe II**

**PCI-PCI bridges**

- 7-November-2002

- G. Steinbrück

## Fiber Road Card (FRC) Design

**Receives tracks from L1 Central Track Trigger**
**Communicates with trigger framework via SCL receiver card**
**Transmits tracks and trigger info to other cards**
**Manages L3 buffering and readout via Buffer Controller (BC) daughter cards on each motherboard**

**Implemented in 6 Altera FPGA’s **
**FLEX 10k30E and 10k50E**
**30/50 k gates**
**24/40 k bits of RAM**
**208/240 pins**

- 7-November-2002

- G. Steinbrück

## FRC

- Buffer
- controller

- Link Receiver Board

- Link Transmitter Board

**Fiber Road Card (FRC) Design**

- 7-November-2002

- G. Steinbrück

## Silicon Trigger Card (STC) Design

**Performs Silicon clustering and cluster-road matching**
**Clusters Neighbouring SMT hits (axial and stereo) **
**Each STC processes 8 silicon  inputs simultaneously**
**Axial clusters are matched to ±1mm-wide roads around each fiber track via precomputed LUT**
**Mask bad strips and apply pedestal/gain corrections (via LUTs)**

**Implemented in FPGAs**
**Main functionality implemented in XILINX VIRTEX XCV812E**
** ****~ 800k gates**
** ****1.1 Mbits of RAM**** **
** ****560 pin BGA package**** **
**3 PCI interfaces use Altera ACEX EP1K30 chips**

- This project made possible with state-of-the-art FPGAs

- 7-November-2002

- G. Steinbrück

## Silicon Trigger Card (STC) Design

- Road
- LUT

- FPGA

**Silicon Trigger Card (STC) Design**

- 7-November-2002

- G. Steinbrück

## Track Fit Card (TFC) Design

**Performs final SMT cluster filtering and track fitting**
**Receives 2 CFT hits and axial SMT clusters in CFT road**
**Lookup table used to convert hardware to physical coordinates**
**Selects clusters closest to road center and performs linearized track fit using precomputed matrix elements stored in on-board LUT**
** **
**Require hits in only 3 out of 4 silicon layers**
**Output to L2CTT via Hotlink cards**

**C code running on 8 DSPs:**
**TI TMS320C6203B fixed point DSP **
**300 Mhz**
**two independent 32-bit I/O busses**
**performs 16 bit multiply/32 bit add instructions**
**rated at 2400 MIPS**

- 7-November-2002

- G. Steinbrück

## Track Fit Card (TFC) Design

- DSP

- Hotlink Card

- Matrix LUT

- Coordinate Conversion LUT

**Track Fit Card (TFC) Design**

- 7-November-2002

- G. Steinbrück

## Queuing Simulations

**Timing measurements of TFC i/o and processing times**
**Assume mean/ min time between events 100********s/9********s**
**Inputs:**

-  Latencies up to 250 ms for luminosities x4 higher than expected for Run 2b
-  no dead time

- Tracks

- Clusters

- 7-November-2002

- G. Steinbrück

## STT Performance

**STT Performance**

-  = 20 m

**50 GeV muons**
**No beam spot**

** ****Plots from STT Trigger Simulator**
** ****Exact DSP fitting code used**
** ****Has been instrumental in developing the fitting algorithm**
** ****Produces test vectors for all cards**

- Monte Carlo

- 7-November-2002

- G. Steinbrück

## Beamspot Monitoring

**Silicon Track Trigger is very sensitive to stability of the beam spot**
**Requirements: <10 ********m in xy, tilt <300 ********rad**
**Determine beam position online from tracks (DCA versus ********)**
**Write beamspot to file every ~5 min**
**Track Fit Card picks up beamspot from file on start of new run**
**Automatically stop run if beam spot moved too much **
**Feed beamspot back to Fermilab Main Control Room **
**Main Control Room could implement automatic beam adjustment**** **

- 7-November-2002

- G. Steinbrück

## System Integration

**All hardware at hand**
**Tested communication between the different boards using test vectors **
**Used fake data sender (tracks to FRC and hits to STC) to verify inputs, transfers between boards and for rate tests**
**Integration with the D0 trigger system ongoing **
**Will soon integrate with L1 central track trigger**
**Currently Instrumenting a 30****°**** sector/ half crate**
**Full track reconstruction**
**Output to L3 and private DAQ for L2**

**Installation of full system in November**
**Full Commissioning during the Winter**

- 7-November-2002

- G. Steinbrück

## Run2b: Silicon Detector Upgrade

**Single sided silicon, barrels only**
**Inner (vertexing) layers L0, L1**
**Axial only**
**mounted ****on carbon ****support **
**Outer (tracking) layers L2-L5**
**Axial and stereo**
**Stave ****structures**

- 7-November-2002

- G. Steinbrück

## Run 2B Silicon Track Trigger

**Run 2B STT can process hit information from 5 of the 6 Run 2B SMT layers **
**Achieved by adding 1 STC and 2 TFC’s per crate**

- 7-November-2002

- G. Steinbrück

## Conclusions

**The Silicon Track Trigger is crucial for a large part of the Run 2 physics program**
**Higgs, top, B physics**
**Proposed in 1998 as addendum to D0 baseline**
**Received funding in 1999 **
**Project far advanced**
**All hardware for Run 2a at hand!**
**Installation of full system in November**
**Full commissioning during Winter**
**Run 2b upgrades involve additional hardware**

- 7-November-2002

- G. Steinbrück

## Spares

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- G. Steinbrück

## Readout to Level 2

**Online package (on alpha/ beta) that receives L2 STT output**
**Formats and orders it appropriately**
**combines the inputs from the 12 tfcs into 1 ordered list of ctt or****  stt+ctt tracks (depending on if there's a stt fit)**
** ****sorts by pt, does a few conversions (phi bins, pt bins, etc)**
**Transmits it to L2 Global for final L2 decision**

- 7-November-2002

- G. Steinbrück

## Contributing Institutions

**Boston University**
**U. Heintz, M. Narain, E. Popkov (PD), L. Sonnenschein (PD), J. Wittlin (PD), K. Black (GS), S. Fatakia (GS), A. Zabi (GS), A. Das (GS), W. Earle (Eng), E. Hazen (Eng), S. Wu (Eng)**
**Columbia University**
**H. Evans, G. Steinbr****ü****ck (PD), T. Bose (GS), A. Qi (Eng)**
**Florida State University**
**H. Wahl, H. Prosper, S. Linn, T. Adams, B. Lee (PD), S. Tentindo Repond (PD), S. Sengupta (GS), J. Lazoflores (GS) **
**SUNY Stony Brook**
**J. Hobbs, W. Taylor (PD), H. Dong (GS), C. Pancake (Eng), B. Smart (Eng), J. Wu (Eng) **
**Manchester University**
**M. Sanders (PD)**

- 7-November-2002

- G. Steinbrück

## Hardware Status

- All Boards at hand

- 7-November-2002

- G. Steinbrück

## Beamspot Monitoring

**x**

**y**

**xz**

**yz**

**Beamspot Monitoring**

- Critical for the STT!

- 7-November-2002

- G. Steinbrück

## Downloading and Monitoring

**STT Crate Initialization **
**Controlled via Power PC at power-up**
**Downloads lookup tables and DSP code to STT cards**
**Written in C**** **
**Monitoring using EPICS**
**Fiber Road Card receives monitoring requests from trigger hub**
**Forward to CPU via an Interrupt**
**CPU collects information from cards for monitoring purposes**

- 7-November-2002

- G. Steinbrück

## Physics Improvements

- 99 DOE proposal

- Trigger efficiency for ZH****bb 35%80%
- Trigger efficiency for BoJ/Psi K**s  **K**s******24%32%
- sin 2 **** 0.170.15

- 7-November-2002

- G. Steinbrück

## Physics Improvements, Higgs

- 99 DOE proposal

- 7-November-2002

- G. Steinbrück

## Zbb

- 7-November-2002

- G. Steinbrück

## Jet triggers for bb

- Trigger Rates for 396 ns, Luminosity10**32** cm**-2**s**-1**

**L2, no STT**

**L2, with STT**

**L1**

- 7-November-2002

- G. Steinbrück