# Presentation: 051182

## L1 & L2  Trigger Data Flow

- MUO

- SMT

- CFT

- CPS

- FPS

- CAL

- L1MUO

- L1CFT

- L1FPS

- L1CAL

- L2MUO

- L2CFT

- L2CPS

- STT

- L2FPS

- L2CAL

***axial***

***stereo (u,v)***

- _L1 & L2  Trigger Data Flow_

- L2
- Global

***refit tracks***

***z-vertices (?)***

- All objects  in physics coordinates

- 1st event-wide trigger decision

**A.Maciel**
**L2mu**
**NIU**

- S
- L
- I
- C

*Level - 2*

*Front Ends*

*Level - 1*

*Level - 2*

*L2 - Global*

## DØ Level-2

- CIC

- FIC

- Data processing cards;

- Interface cards;

*Coaxial*

*G-link*

*Cypress Hotlink*

- SLIC

- MBT

- ALPHA

*Hotlink*

*Hotlink*

- SFO

**Nebraska**

**MSU UIC UM CDF**

** ****Saclay**

**Maryland**

**Nevis/NIU**

**Nebraska**

*MagicBus*

*Hotlink*

*From  FIC*
*From SCL*
*From MBT*
*From SLIC*

*MBT To/From Alphas*

***  ******Data Copies***

**D****Ø Level-2**

**D****Ø Level-2**

**(VME)**

- Obs;  not shown
- MPM&VBD , STT

*Hotlink*

*Hotlink*

*To  MBT** *

*To  SLIC** *

*To  MBT *

*Hotlink*

**A.Maciel**
**L2mu**
**NIU**

## DØ  Level-2  Card  I/O

- 4 optical
- inputs

- 6 paired
- UTP outputs

- 12 SMB
- inputs

- 4 single
- UTP outputs

**V**
**T**
**M**

- FIC

- Hotlink Interface for Muons

- Hotlink Interface for all L2 subsystems

- obs: Dual outputs are compatible only
- with SLIC inputs, and must be split to
- singles for any other destination (SFO)

- SFO

- 6 UTP inputs
- 12 UTP outputs
- all single channel

- Fanout Modes;
-   (1 to 12)
-   (1 to 10)& 1 (1 to 2)
-   (1 to 8)  & 2 (1 to 2)
-   (1 to 6)  & 3 (1 to 2)
-   (1 to 4)  & 4 (1 to 2)
-   6 (1 to 2)

- obs: FIC’s send data to MBT’s  (via SFO’s for copies)

**A.Maciel**
**L2mu**
**NIU**

_**D**__**Ø  Level-2  Card  I/O**_

- MBT

- Interface H.Links – M.Bus.
- Buffering and alignment
- of data input to alpha

-  7 input channels
-  2 output channels
-  1 output SCL copy

- Hotlinks

**SCL Mezzanine (Pilot);**
**Receives SCL from L1FW**
**Makes hotlink copy (fanout)**

**Output to Global &**
**Output of L2 Global**
**decisions to L2FW**

## SLIC

**channel 0**
- L1 (SCL)

- • • •
**16 inputs**

**channel 1**
- Front Ends

**channel 2**
- Front Ends

**channel 15**
- Front Ends

- input fpga’s set headers, trailers, word counts, DSP routing bits

**output  to**
- MBT

- DSP

- DSP

- DSP

- DSP

- DSP

**sort  & format**

**physics**

**physics**

**physics**

**physics**

**monitor, **

- channel-0 and DSP-5 are responsible for event alignment

**FIFO**

**fpga**

**FIFO**

**fpga**

**FIFO**

**fpga**

**FIFO**

**fpga**

**FIFO**

**fpga**

**A. Maciel**
**(NIU)**
**L2 muon**

**1**

**3**

**4**

**5**

**2**

_**SLIC**_

## L2 Test Stand 

**A.Maciel**
**L2mu**
**NIU**

- create an image of
- the online system

- establish parasitic
- connection with
- online system

- Data sources:
- (1)  Optical Signals for FICs
- (2)  UAZ  Hotlinks test card
- (4)  Patch Panel from real time

-  Online:
-  “shadow processing”
-  test/debug hardware
-  test/debug algorithms

-  Offline:
-  “pre-commissioning”
-  board development
-  systems integration
-  long term maintenance

- L2 has 5 sub-systems
- (preprocessors):
- CAL, PSH, CTT, MUC , MUF
- and one GLOBAL processor

- [3 racks]

**power**

- four L2-like crates

**FIC (optical)**
**tester crate**

**L3 node**

**Connections**
**panel to MCH**

**power**

**power**

## MBT

- Alpha

- SFO

- SLIC

- SFO

- CIC

- Front Ends

- L1 (SCL)

- Alpha

- SLIC

_**Example: Test Stand Shadowing a SLIC**_

- Test Stand

**A.Maciel**
**L2mu**
**NIU**

_***Target***_

_***Shadow***_

- MBT/Alpha outputs
-  not shown

***coaxial***

***UTP***

**undo**

- (*)

- (*)

- Need SFO at receiving end because SLICs are not transformer
- coupled, and therefore should not be plugged to long cables.
- You also want to send single channels only to test stand.

- SFO

**pigtail**

**pigtail**

**pigtail**

## L2 to Test Stand Connections 

- MCH3
- Muon

- MCH2
- STT
- CTT , PS

- MCH1
- CAL
- Global

- FCH2
- Test
- Stand

**Patch **
**Panel**

**Image**
**Patch **
**Panel**

**Permanent **
**cabling**

- Patch panels have
- identical maps

| Source | # Inputs |
| --- | --- |
| SCL (Hub) | 1 |
| SCL | 6 |
| CAL | 10 |
| PSH | 12 |
| CTT | 16 |
| MUO | 18 |
| Global | 10 |
| L1 Mask | 1 |
| SLIC | 14 |
| Total | 88 |

- _L2 to Test Stand Connections _

-  **MBT Channels**

**SLIC Channels**

**A.Maciel**
**L2mu**
**NIU**

- Permanent cabling between
- MCH and T.Stand is open
-  ended at MCH for minimal
- noise. Cables are bundled
- acc. to table above.
- Connect as needed

- obs: window
- is 45x45 cm
- conn.=2x3cm

- (*)

- (*) The only non-hotlink
-         connection in P.Panel

## FIC

- _L2 Test Stand & Commissioning News_
_**(Sept.28,00)**_

-  All L2 crates @fnal & prep’ed
-  All MCH-3 racks fully rigged,
-  except muon, (planned as last)
-  Long cables done (inter racks),
-    and to patch panel, to test-stand
-  Short cables map/labels now
-    being reviewed (intra racks)
-  1st T-Stand rack fully rigged
-  2nd to be built next week (Arko)
-  3rd has FIC tester and L3 node
-  Logic analyzer arr. last Monday
-  UAZ tester data source in 2 weeks

**A.Maciel**
**L2mu**
**NIU**

-  Two known (minor) bugs
-  Saclay crew visit in October
-  upgrade fpga code
-  re-tune board timing

-  under tests
-  so far, all functions fine
-  DØ inspectors not comfortable
-  beefed up version under study

-  All tests OK
-  Driver code development
-  DSP code development

-  problems understood, solutions being implemented
-  two development fronts;
-  SCL  MBT mezzanine receiver
-  MBT  Alpha communications

***FIC***

***CIC &***
***SFO***

***SLIC***

***MBT***

## Muon Front End Data Collection Into L2

- SFE

- SFE

- SFE

- SRC

- SLIC

- MRC

- CIC

- FEB

- FEB

- FEB

- CB

- • • •
**8 SFE’s**

- 48 scints feed one SFE

- SLIC

- MRC

- CIC

- One PDT feeds 3 or 4 FEB’s

- FEB

**L3**

**L2**

**L2**

**L2**** ****,**** L3**

**L2**** ****,**** L3**

**L3**

- SCL

***Platform***

***MCH3***

**Patch**
**Panel**

**A.Maciel**
**L2mu**
**NIU**

*Muon L2*
*receivers*

## Example L2 Crate; Muon

- P
- M
- -
- B
- I
- T
- 3

- V
- B
- D

- A
- L
- P
- H
- A

- A
- L
- P
- H
- A

- S
- L
- I
- C

- S
- L
- I
- C

- S
- L
- I
- C

- M
- B
- T

- M
- B
- T

- All Hotlink connections are single channel UTP cables on Front Panels
- MBT (hotlinks) outputs L2 objects to Global MBT receiver

- Coax. (SMB cable) inputs from FE &L1
- into 14 CIC’s in dedicated crate

**muon**

**admin**

**pilot**

**assist.**

- eleven MBT channels

- _Example L2 Crate; Muon_

**A.Maciel**
**L2mu**
**NIU**

**SCL**

*MagicBus*

- to L3

- •••

**eleven**
**total**

- double channel UTP
- cables to SLIC’s

- MCH3

- to Global

## Shadow L2 Crate; Muon

- M
- P
- M
- -
- B
- I
- T
- 3

- V
- B
- D

- A
- L
- P
- H
- A

- A
- L
- P
- H
- A

- S
- L
- I
- C

- S
- L
- I
- C

- S
- L
- I
- C

- M
- B
- T

- M
- B
- T

- Coax. (SMB cable) inputs from FE &L1
- into CIC’s in dedicated crate

**muon**

**admin**

**pilot**

**assist.**

- eleven MBT channels

- _Shadow L2 Crate; Muon_

**A.Maciel**
**L2mu**
**NIU**

**SCL**

*MagicBus*

- to L3

- •••

**eleven**
**total**

- double channel UTP
- cables to SLIC’s

- S
- L
- I
- C

***Patch Panel***

- generic:
- 14 singles

- obs: every cable that reaches the test stand patch panel is coming from an SFO (copier)

- Real time replication of
-  1) Individual SLIC
- 2) MBT+ALPHA

- Test
- Stand

- FCH2

- to Global

## Global L2 Crate 

- P
- M
- -
- B
- I
- T
- 3

- V
- B
- D

- A
- L
- P
- H
- A

- A
- L
- P
- H
- A

- M
- B
- T

- M
- B
- T

**glob.**

**admin**

**pilot**

**assist.**

- ten MBT channels

- _Global L2 Crate _

**A.Maciel**
**L2mu**
**NIU**

**SCL**

*MagicBus*

- to L3

- _PP-MBT output from_;
- 1) em   2) jet  3) ET
- 4) track PT
- 5) track IP
- 6) muon central
- 7) muon forward
- 8) CPS  9) FPS
- 10) Z-vtx

- MCH1

- L2 decision
- sent to L2FW

- L1FW trigger
- decision bits
- (hotlinks)

## Example L2 Crate; Calorimeter

- P
- M
- -
- B
- I
- T
- 3

- V
- B
- D

- A
- L
- P
- H
- A

- A
- L
- P
- H
- A

- A
- L
- P
- H
- A

- A
- L
- P
- H
- A

- F
- I
- C

- F
- I
- C

- F
- I
- C

- M
- B
- T

- M
- B
- T

- All Hotlink connections are single channel UTP cables on Front Panels
- MBT (hotlinks) outputs L2 objects to Global MBT receiver

- Optical Signal inputs from L1
-    4       2       4

**em**

**jet**

**E****T**

**admin**

**pilot**

**assist.**

- six MBT channels

- four MBT channels

- _Example L2 Crate; Calorimeter_

**A.Maciel**
**L2mu**
**NIU**

**SCL**

*MagicBus*

- to L3

- MCH1

- to Global

## Shadow L2 Crate; Calorimeter

- M
- P
- M
- -
- B
- I
- T
- 3

- V
- B
- D

- A
- L
- P
- H
- A

- A
- L
- P
- H
- A

- A
- L
- P
- H
- A

- A
- L
- P
- H
- A

- F
- I
- C

- F
- I
- C

- F
- I
- C

- M
- B
- T

- M
- B
- T

- Optical Signal inputs from L1
-    4       2       4

**em**

**jet**

**E****T**

**admin**

**pilot**

**assist.**

- six MBT channels

- four MBT channels

- _Shadow L2 Crate; Calorimeter_

**A.Maciel**
**L2mu**
**NIU**

**SCL**

*MagicBus*

- to L3

- Ten copies of MBT
- channels provided by
- SFO’s in main crate,
- and the TFW-SCL

***Patch Panel***

- Real time replication
- of online system
- (also L2CTT and L2PS)

- Test
- Stand

- Test
- Stand

- obs: every cable that reaches the test stand patch panel is coming from an SFO (copier)

- FCH2

## L2 Crate Locations 

- _L2 Crate Locations _

## Level-2 Hotlinks Totals

|  | cable length(*) | connectors |
| --- | --- | --- |
| non-muon | 3350m | 520 male |
| muon | 2850m | 500 male
10 female |
| total | 6200m | 1120 male(*)
20 female |

- (*) includes 10% added

_**Level-2 Hotlinks Totals**_

## UTP Cable Terminations 

**A.Maciel**
**L2mu**
**NIU**

**Idle pairs grounded and capacitor terminated**
**(rec.) to eliminate DCs from ground offsets**

- Active (signal) pair is transformer
- coupled on both input and output