# Presentation: 551099

## The Level-2 Muon Trigger

-  Muon Level-2 Outline
-  System’s Description
-  Algorithms and Performance
-  Simulation

**A. Maciel**
** ****(N.I.U.)**
**Muon-L2**

***ITEP -- LMU(Munich) -- Nevis Labs -- NIU***

## Muon Level-2 Outline

- Data processing happens in three stages;

- (1) _SLIC_’s   (track segment finding)

- (2)_ALPHA_  preprocessor  (track assembly)

- (3) _GLOBAL_  Level-2  (trigger decisions)

_**INPUT**_**	****	**_**PROCESSING**_**	****    **_**OUTPUT**_

**Muon Front**
**End Data**
- L1  Data

-    Pattern   Recognition
- Re-Format

- A - Layer Track Stubs
- BC-Layer Track Stubs
- L1-objects  (+Aphi)

******Compare all SLIC reported objects,  search for matches**
******Assemble matches (or singles) into final L2 muon candidates**
******Report track params. and ID-quality to L2(global) and L3(seeds)**

** ****Relate muon L2 candidates to other L2 objects, report triggers**

**A. Maciel**
** ****(N.I.U.)**
**Muon-L2**

***(C-code on T.I. DSP’s)***

***(C++ on Linux)***

***(C++ on Linux)***

## L2-Global Muon Candidates 

**Global L2 has two main functions; **
**Muon **_**selection**_** ****(****Number, Pt, ************range****, ****Track-Q, Time-Q****)**
**object **_**relations**_**  ****( JET , EM , MEt , MU , TRK , IP )**
**Examples of Muon **_**relations**_**;**
**Angular separation, Dimuon mass [CFT resolution]**
**Isolation,  muon inside jet,  track match **(Pt,η,φ) **, IP**
**Global can request object matches, but cannot do  track re-fits, or ID building beyond CFT****(Pt,****η,φ****)**
** ****SLICs and ALPHAs do the object-ID building**
**      ****Global  is  responsible  for  the  ****rejection**

**A. Maciel**
** ****(N.I.U.)**
**Muon-L2**

## L2

-  Extra rejection can come from;
-  Tighter time gates
-  Event-wide inspection

***L2 is more of a physics trigger than an object-ID trigger***

|  Pt  | 4 GeV | (2,2)GeV | (2,4)GeV |
| --- | --- | --- | --- |
| η < 1 | 1 | 0.2 |  |
| η < 1.5 | 2 | 2 | 0.2 |
| η < 2 | 4 | 10 |  |

*~Expected L1 Muon Rates (KHz)*

***L1 muon bandwidth ~few KHz***

**5 MHz**

**10 KHz**

**1 KHz**

**20 Hz**

***L1***

***L2***

***L3***

- single
- track

***L2***

**>**
**~**

## Overview of Muon L2 Algorithms

- Pre-Global muon ID is based on muon system only,  no cross referencing among different subdetectors  (L1 CFT Pt-thresh).
- Track segment finding for A and BC layers separately. Run1 Pt.
- Segments built from _both_ wire and scintillator elements.
- Calib: central wires have drift and φ(ΔT), Scints are T**0** subtracted.
- L2 reports single-cell-wide 3D tracks in (Pt,η,φ) coordinates.
- Central PDT (A)segments must satisfy track residual requirements.
- No vertexing, but hit patterns must be compatible with int. region.
- Added resolution (over L1) in track counting, pointing and timing.
- L2 candidate searches are not biased by or related to L1 results.

**A. Maciel**
** ****(N.I.U.)**
**Muon-L2**

##     L2 Impact on L1 Muon-ID

-  Smallest granularity 3D tracking, improved wire-scint and L-L correl
-  More accurate object counting;   removes multiple triggers (stubs) resolves closely spaced tracks
-  Pt matching to L1 threshold
-  Narrower rejection time gate
-  Scint-TOF discrimination for Prompt - Slow - Out of Time
-  Recover crossing octant tracks
-  η dependence of hit patterns

**CFT**
**φ wedge**

- MTC05

**region ****wide**
**scint match**
**(φ wedge)**

**octant ****wide**
**scint match**
**(η wedge)**

- MTC10

**PDT centroid**

- L1 Muon ID

**calib**

**punch**

**pointing**

**A. Maciel**
** ****(N.I.U.)**
**Muon-L2**

**non-CFT fwd.**

**dimuons**

**MSP searches**

**(Pt,****η,φ****)**

## SLIC

**channel 0**
- L1 (SCL)

- • • •
**16 inputs**

**channel 1**
- Front Ends

**channel 2**
- Front Ends

**channel 15**
- Front Ends

- input fpga’s set headers, trailers, word counts, DSP routing bits

**output  to**
- MBT

- DSP

- DSP

- DSP

- DSP

- DSP

**sort  & format**

**physics**

**physics**

**physics**

**physics**

**monitor, **

- channel-0 and DSP-5 are responsible for event alignment

**FIFO**

**fpga**

**FIFO**

**fpga**

**FIFO**

**fpga**

**FIFO**

**fpga**

**FIFO**

**fpga**

**1**

**3**

**4**

**5**

**2**

_**SLIC**_

***event size***
***reduction***
***~20  ***

**A. Maciel**
** ****(N.I.U.)**
**Muon-L2**

## Slide 8

## Slide 9

## The Level-2 Muon Trigger

-  Muon Level-2 Outline
-  System’s Description
-  Algorithms and Performance
-  Simulation

**A. Maciel**
** ****(N.I.U.)**
**Muon-L2**

***ITEP – LMU(Munich) -- Nevis Labs -- NIU***

- 2nd part of talk on a different file