# Presentation: 661721

## Pixel Detector configuration

Complex detector in many ways
Very large number of pixels ~ 66M
Every pixel has 2 parameters that can change
4 trim bits (threshold)
1 mask bit (enable/disable)
Multiple communication protocols
PSI2C, (token ring+I2C), VME
Multiple stages in communication channels
Multiple device types & device limitations
Analog signal transmission

Operating this detector without a DB will be extremely difficult

**Pixel Detector configuration**
**Complex detector in many ways**
**Very large number of pixels ~ 66M**
**Every pixel has 2 parameters that can change**
- 4 trim bits (threshold)
- 1 mask bit (enable/disable)
**Multiple communication protocols**
**PSI2C, (token ring+I2C), VME**
**Multiple stages in communication channels**
**Multiple device types & device limitations**
**Analog signal transmission**
**Operating this detector without a DB will be extremely difficult**

## Barrel: 3 layers
Modules		TBMs		Sensors		ROCs
128 + 32		288		160		2304
224 + 32		480		256		3840
320 + 32		352		352		5376
768			1120		768		11520

Forward: 4 disks
Panels		TBMs		Sensors		ROCs
96			96		288		2304
96			96		384		2016
192			192		672		4320

960			1312		1440		15840

		Total pixels: ~ 66M

**Modules**		**TBMs**		**Sensors**		**ROCs**
- 128 + 32		288		160		2304
- 224 + 32		480		256		3840
- _320 + 32__	__	__352__	__	__352__	__	__5376_
**768****	****	****	****1120**		**768**		**11520**
**Forward: 4 disks**
**Panels**		**TBMs**		**Sensors**		**ROCs**
- 96			96		288		2304
- _96__	__	__	__96__	__	__384__	__	__2016_
**192****	****	****	****192****	****	****672****	****	****4320**
**960****	****	****	****1312****	****	****1440****	****	****15840**
**	****	****Total pixels: ~ 66M**

**Configuration DB: Pixel Control**

## ROC downloads
Each ROC: 26 DACS + 2 registers
Each pixel: 4 trim bits (threshold) + 1 mask bit (enable/disable)
ROC address + Pixel address
Need efficient download mechanism
Analog address levels (FED)

Configuration: I2C devices, HV/LV, etc.
Configuration data substantial
All of above information has to reside in the DB
Data in DB cannot be deleted. Only updates with timestamp.
DB contains history of each device

**Each ROC: 26 DACS + 2 registers**
**Each pixel: 4 trim bits (threshold) + 1 mask bit (enable/disable)**
**ROC address + Pixel address**
**Need efficient download mechanism**
**Analog address levels (FED)**
**Configuration: I2C devices, HV/LV, etc.**
**Configuration data substantial**
**All of above information has to reside in the DB**
**Data in DB cannot be deleted. Only updates with timestamp.**
**DB contains history of each device**

**Configuration DB: Pixel Control**

## Forward Pixel Logical Control Paths

**Port 0**
**Plaq**

**Port 3 Plaq**

**Port 2 Plaq**

**Port 1 Plaq**

**Port 4**
**TBM**

**VME**

**CAEN**
**Controller**

**PixFEC**

**HUB**

**TBM chipset**

**fiber (digital) **
**(PSI****2****C)**

**Adapter board**

**Port card**

- CCU

**TrkFEC**

**AOH**

**DOH**

**DCU**

**PLL**

**Fiber**
**(token ring)**

**copper**
**I****2****C**

**copper**

**fiber (analog)**

**To PixFED**

**Panel**

**Panel**

**Panel**

**Delay25**

**DCU**

**Forward Pixel Logical Control Paths**

## FPix 4 Disk configuration (Need Barrel info)
Data to be downloaded by Tracker FEC

4 CCUs (design not final)
32 Port Cards (8 Port Cards per CCU)
I2C devices on Port Card include

AOH (6 laser drivers)
DOH (2 laser drivers)
PLL
Delay25
DCU
4 mFECs, each connected to a CCU
1 mFEC supplied with I2C configuration for 8 port cards
Create table for Port Cards

**Data to be downloaded by Tracker FEC**
**4 CCUs (****design not final****)**
**32 Port Cards**** (8 Port Cards per CCU)**
**I****2****C devices on Port Card include**
**AOH**** (6 laser drivers)**
**DOH**** (2 laser drivers)**
**PLL**
**Delay25**
**DCU**
**4 mFECs, each connected to a CCU**
**1 mFEC supplied with I****2****C configuration for 8 port cards**
**Create table for Port Cards**

**Standard I****2****C Configuration: Tracker FEC**

## Device: AOH
2 devices (6 lasers), each with 4 internal registers
Address: 5 bits + 2 bits

Device: DOH
4 registers
Address: 5 bits + 2 bits

Device: PLL
1 PLL mounted on the Port Card
Address: 5 bits + 2 bits
5 control status registers – CTR 1, CTR 2, CTR 3, CTR4, CTR 5

Device: Delay25
1 mounted on Port Card
Address: 4 bits + 3 bits  (5 internal registers)

**2 devices (6 lasers), each with 4 internal registers**
**Address: 5 bits + 2 bits**
**Device: DOH**
**4 registers**
**Address: 5 bits + 2 bits**
**Device: PLL**
**1 PLL mounted on the Port Card**
**Address: 5 bits + 2 bits**
**5 control status registers – CTR 1, CTR 2, CTR 3, CTR4, CTR 5**
**Device: Delay25**
**1 mounted on Port Card**
**Address: 4 bits + 3 bits ******** (5 internal registers)**

**Standard I****2****C Configuration**

## Forward Pixels: Pixel FEC control chain more complicated
Pixel FEC Control Chain
 Connected to 1 Port Card
 Connected to 6 Adapter Cards
Connected to 6 panels mounted on 3 adjacent blades

FEC Supervisor does the following during configuration
fetches configuration data from database
Uses fetched information to construct PSI2C commands
Writes PSI2C commands to the VME address of the mFEC

A total of 32 mFECs (2 modules worth) transferring data concurrently.

**Pixel FEC Control Chain**
****** ****Connected to 1 Port Card**
****** ****Connected to 6 Adapter Cards**
**Connected to 6 panels mounted on 3 adjacent blades**
**FEC Supervisor does the following during configuration**
**fetches configuration data from database**
**Uses fetched information to construct PSI****2****C commands**
**Writes PSI2C commands to the VME address of the mFEC**
**A total of 32 mFECs (2 modules worth) transferring data concurrently.**

**Pixel FEC Control: Pixel FEC**

## mFEC has two sets of optical links (2 Port Cards)
Optical link terminates at Port Card
signals converted to electrical and fanned out to 6 adapter cards
Signal ends at a hub (5 bit address)
6 hubs connected to a mFEC (link)

Each hub has 5 ports
Port 4 always occupied by TBM (2 TBMs, A & B)
Ports 0  3 for ROCs
Forward: 1 Plaquette connected to a port
Barrel: 4 ROCs per port
Plaquette and Port matching varies

**Optical link terminates at Port Card**
**signals converted to electrical and fanned out to 6 adapter cards**
**Signal ends at a hub (5 bit address)**
******6 hubs connected to a mFEC (link)**
**Each hub has 5 ports**
**Port 4 always occupied by TBM (2 TBMs, A & B)**
**Ports 0 ******** 3 for ROCs**
**Forward: 1 Plaquette connected to a port**
**Barrel: 4 ROCs per port**
**Plaquette and Port matching varies**

**Pixel FEC Control**

## To access a particular ROC, an mFEC has to know
Hub address, port number: encoded in a 8 bit address
Number of combinations: 8 (Port Cards) x 6 (hubs) x 5 (Ports) = 240
ROC address (4 bits: 015)
For Barrel, each ROC can have a distinct address
For Forward, this is not possible on a panel.
Each ROC has distinct address only within a plaquette
Multiple ROCs with same address within a panel
TBM address (fixed: 0XE0 or 0XF0)
Could be quite messy

 To download, PixFEC Supervisor needs
 VME address + hub address + port ID + Plaquette ID + ROC ID + Pixel ID
 Parameter values

**Hub address, port number: encoded in a 8 bit address**
**Number of combinations: 8 (Port Cards) x 6 (hubs) x 5 (Ports) = 240**
**ROC address (4 bits: 0********15)**
**For Barrel, each ROC can have a distinct address**
**For Forward, this is not possible on a panel.**
**Each ROC has distinct address only within a plaquette**
**Multiple ROCs with same address within a panel**
**TBM address (fixed: 0XE0 or 0XF0)**
**Could be quite messy**
** ****To download, ****PixFEC Supervisor**** needs**
** ****VME address**** + hub address + port ID + ****Plaquette ID**** + ROC ID + Pixel ID**
** ****Parameter values**

**Pixel FEC Control**

## Total Barrel: 64 mFEC channels on 4 VME boards
Total Forward: 32 mFEC channels on 2 VME boards
mFEC basically a simple device & has 1 KB buffer

Configuration setup – what has to be done? A possible scenario

Consider a particular mFEC channel  (particular VME address)
Fetch all configuration data from database (@ panel (module) granularity)
SQL query to retrieve data for TBM and all ROCs on that panel
Construct PSI2C commands using data retrieved from DB
mFEC is a simple device with limited buffering
Store these commands sequentially in 1 KB buffers
Commands should not straddle buffers
Dispatch data to mFEC (VME address)
mFEC executes PSI2C commands

**Total Forward: 32 mFEC channels on 2 VME boards**
**mFEC basically a simple device & has 1 KB buffer**
**Configuration setup – what has to be done? ****A possible scenario**
**Consider a particular mFEC channel  (particular ****VME address****)**
**Fetch all configuration data from database (@ ****panel (module) granularity****)**
**SQL query to retrieve data for TBM and all ROCs on that panel**
**Construct PSI****2****C commands**** using data retrieved from DB**
**mFEC is a simple device with limited buffering**
**Store these commands sequentially in ****1 KB buffers**
**Commands should not straddle buffers**
**Dispatch data to mFEC**** (VME address)**
**mFEC ****executes PSI****2****C commands**

**Pixel FEC Control**

## Pixel Configuration DB Access

**Pixel Configuration DB Access**

## Slide 12

## Data in the Database

How should configuration data be arranged (stored) in the database?
Should we maintain a hierarchical structure as is currently done in the Pixel Construction DB? Access data using links in the DB.
If so, hierarchical structures built in the construction DB can be imported to the Configuration Database.
Should we have a separate table for each panel/module ?
Should we have a table for each mFEC?
How should we store pixel configuration data – as BLOBs???

Data in the Intermediate Stage
How should data be stored in the intermediate stage?

Need to conduct performance studies with pixel type data

**Data in the Database**
**How should configuration data be arranged (stored) in the database?**
**Should we maintain a hierarchical structure as is currently done in the Pixel Construction DB? Access data using links in the DB.**
**If so, hierarchical structures built in the construction DB can be imported to the Configuration Database.**
**Should we have a separate table for each panel/module ?**
**Should we have a table for each mFEC?**
**How should we store pixel configuration data – as BLOBs???**
**Data in the Intermediate Stage**
**How should data be stored in the intermediate stage?**
**Need to conduct performance studies with pixel type data**