# Presentation: 844379

## Using SiGe Technology for Extreme Environments

**John D. Cressler **

- Ken Byers Professor
- School of Electrical and Computer Engineering
- 777 Atlantic Drive, N.W.
- Georgia Institute of Technology
- Atlanta, GA 30332-0250 USA
- 			     **cressler@ece.gatech.edu**** **
- http://users.ece.gatech.edu/~cressler/
- 	                       Tel (404) 894-5161 / FAX (404) 894-4641
**New Electronic Technologies and Insertion into Flight Programs Workshop**
**NASA-GSFC, 1/30/07**

## Outline

** ****Using SiGe at Cryogenic Temperatures**
** ****Using SiGe in a Radiation Environment **
** ****Emerging NASA Applications**
** ****Summary**

**Outline**

## A Level-Set on Miracles

**A few monolayers**
** ****of**** **_**SiGe**_** Goes Here**
**... ****Very Carefully!**

**A Level-Set on Miracles**

## SiGe Strained Layer Epi

**  **_**The Idea:**_** ****	****Practice Bandgap Engineering (i.e., nanotechnology)                            ****	****	****	****	****	****in the Silicon Material System****! **
- 	**	****Introduce a small amount of Ge (smaller bandgap) into a Si BJT to ...**
**	**	**Selectively tailor the transistor for improved performance!**

**SiGe Strained Layer Epi**

## Consequences

**Type-I Band Alignment **(Valence Band Offset  = 74 meV / 10% Ge)
**Hole Mobility Enhancement **(good news)

**Consequences**

**100 meV grading across 100 nm = ****10 kV/cm**** electric field!**

**Strained SiGe****          Si**

**Δ****E****V**

## The SiGe HBT 

**The SiGe HBT**** **

**•****	****Conventional Shallow and Deep Trench Isolation + CMOS BEOL**
**•****	****Unconditionally Stable, UHV/CVD SiGe Epitaxial Base**
**•****	****100% Si Manufacturing Compatibility**
**  ****SiGe HBT + Si CMOS on wafer**

**E     B        C**

**SiGe**

**50 nm**

## The SiGe HBT

_**The Idea:**_**  ****Put Graded Ge Layer into the Base of a Si BJT**
_**Primary Consequences:**_
** ****smaller base bandgap increases electron injection   ****(****β****    ****)**
** ****field from ****graded base bandgap decreases base transit time   ****(f****T     **** ) **
** ****base bandgap grading produces higher Early voltage   ****(V****A      ****)**

**SiGe = III-V Speed + Si Manufacturing: Win-Win!**

## The SiGe Story

**1****st**
** **

**2****nd**
** **

**3****rd**
** **

**4****th**
** **

** ****Rapid**** ****Generational Evolution (full SiGe BiCMOS)**
** ****Significant In-roads in High-speed Communications ICs**

## Half-TeraHertz SiGe HBT!

** ****510 GHz Peak f****T**** at 4.5K!**
** ****World’s First Half-TeraHertz Si-based Transistor**
** ****Lot’s of Steam Left for SiGe HBTs ...**

**Half-TeraHertz SiGe HBT!**

## SiGe Applications

**Defense**
**Navigation**
**Automotive**
**Communications**

**Defense**
**Navigation**
**Automotive**
**Communications**

**SiGe Analog ICs **
**Are a Major Driver!**

## New Opportunities ...

**	****- 60 GHz ISM band (e.g., > 1Gb/sec wireless data links)**
**	****- wavelength at mm-wave enables monolithic antennae integration**
** ****SiGe Radar Systems**
** ****defense tactical radar (e.g., 10 GHz), ground sensing space radar**
** ****automotive radar (e.g., 24 GHz, 77 GHz) **
** ****SiGe Analog/Mixed-Signal Applications**
**	****- data converters (10Gb/sec 8 bit ADC!)**
** ****use of C-SiGe (npn +pnp) for op-amps, drivers, etc.**
-  **SiGe Extreme Environment Electronics**
- 	**- cryogenic temperatures (e.g., to 4K)**
**	****- radiation (e.g., space)**
**	****- high-temperature systems (e.g., to 200C or even 300C)**

**New Opportunities ...**

## SiGe mm-wave SoC

** ****Wireless 60 GHz (ISM band) Data Links**

- Courtesy of Ullrich Pfeiffer of IBM

## SiGe Radar Systems

**Begs For SiGe!**

**Potential Paradigm Shifting Impact for Phased Array Radar!**

**Single Chip X-band**
**SiGe T/R (4x4 mm****2****)**

## Outline

** ****Using SiGe at Cryogenic Temperatures**
** ****Using SiGe in a Radiation Environment **
** ****Emerging NASA Applications**
** ****Summary**

**Outline**

## SiGe HBTs for Cryo-T

_**Primary Consequences:**_
** ****smaller base bandgap increases electron injection   ****(****β****    ****)**
** ****field from ****graded base bandgap decreases base transit time   ****(f****T     **** )**** **
** ****base bandgap grading produces higher Early voltage   ****(V****A      ****)**

_**All **__**kT**__** Factors Are Arranged to Help at Cryo-T!**_

**SiGe HBTs for Cryo-T**

## SiGe HBTs at Cryo-T 

**27C**

**-230C**

**dc   ****                                                            ****ac**

**SiGe Exhibits Very High Speed **
**at Very Low Power!**** **

**IBM SiGe 5AM**

## SiGe HBTs at High-T

**SiGe HBTs at High-T**

** ****How About for High-Temperature (200-300C) Circuits?**
** ****Performance Degradation, But Plenty of Umph Left!**

**Gain                                                    Frequency Response**

## Outline

** ****Using SiGe at Cryogenic Temperatures**
** ****Using SiGe in a Radiation Environment **
** ****Emerging NASA Applications**
** ****Summary**

**Outline**

## SiGe For Space Systems

- 	- IC technology space-qualified _without_ additional hardening
- 	- high integration levels to support SoC / SiP (low cost)

**SiGe For Space Systems**

**      ****proton  +  ****electron belts**

_**Major Question**_**: **
**Can SiGe Play a Major Role in Space?**

**•  ****Total Ionizing Dose (TID) – ****ionizing radiation**
- 	- TID is measured in “rads” (1 rad = 100 ergs per gram of energy absorbed)
- 	- 100-500 krad(Si) over 10 years for typical orbit *(300 rad(Si) is lethal to humans!)*

**•  ****Single Event Upset (SEU) – ****high energy heavy ions**
- 	- measure data upset cross-section (σ) vs. Linear Energy Transfer (LET)
-  	- σ = # errors / particle fluence (ions/cm2): LET = charge deposition (pC/μm)
- 	- **Goals:** low cross-section + high LET threshold

## Radiation Experiments 

**	****	****	**- 1st Generation (50 GHz HBT + 0.35μm CMOS)
- 			- 2rd Generation (120 GHz HBT + 0.18μm CMOS)
- 			- 3rd Generation (200 GHz HBT + 130nm CMOS)
- 			- 4th Generation (pre-production 300 GHz HBT)
- 		- many different companies
**• ****Radiation Sources:**
- 		- 1.4 MeV gamma rays
- 		- 63 MeV protons (+ 77K!)
- 		- 10 keV x-ray
- 		- prompt dose (krad/nsec)
- 		- 1.0 MeV neutrons
** ****Single Event Effects:**
- 		- broad beam heavy ion
- 		- ion microbeam

**Radiation Experiments **
**(1995-2007)**

## Total-Dose Response

**• ****Multi-Mrad Total Dose Hardness ****(with no intentional hardening!)**
**	****- ionization + displacement damage very minimal; no ELDRS either!**
**• ****Radiation Hardness Due to Epitaxial Base Structure ****(not Ge)**
- 	- thin emitter-base spacer + heavily doped extrinsic base + very thin base

**63 MeV protons @ 5x10****13**** p/cm****2**** = ****6.7 Mrad TID!**

**200 GHz **
**SiGe HBT**

**3****rd**

**2****nd**

**1****st**

**4****th**

## Circuit TID Response 

**• ****60 GHz SiGe LNA Design**

**Circuit TID Response **

## Cryo-T Radiation

**First 77K Proton Irradiation Experiment in SiGe Technology**
- 	- 63 MeV protons at UC Davis (NASA-GSFC / DTRA collaboration)

** ****Radiation Damage Smaller at 77K Than at 300K ****(great news!)**

**100 krad**

**77K**

**no change in peak ****β**** at 100 krad at 77K!**

## Anomalies At a Glance...

**Source Dependent Variation in EB and STI Response **
- proton and x-ray more damaging than gamma in _*forward-mode*_
- gamma more damaging than proton and x-ray in _*inverse-mode*_

**Forward mode                                                                 Inverse Mode**

## GEANT4 MC Simulations

**Metallization and Overlayer Effects? **
- X-ray interaction with Cu/W origin of dose enhancement?
- Simulations do not support a “dose enhancement” for protons
- Need GEANT4 photon simulations with full metal overlayers

**Collaboration with R. Reed and Vanderbilt Team**

## Single Event Effects

**• ****Observed SEU Sensitivity in SiGe HBT Shift Registers**
- 	- low LET threshold + high saturated cross-section **(bad news!)**

- P. Marshall *et al*., *IEEE TNS*, 47, p. 2669, 2000

**1.6 Gb/sec**

**50 GHz SiGe HBTs**

**Goal...**

**Single Event Effects**

**The ‘Achilles Heel’ **
**of SiGe and Space!**

_**Moral**_**: SiGe is a **
**Rad-Soft Technology**

## An Intuitive Picture

**Collector-substrate (n****+****/p****-****) Junction Is a Problem **(SOI solves this)
**Lightly Doped Substrate Definitely Doesn’t Help!**

**An Intuitive Picture**

**Very Efficient Charge Collection!**

**Heavy Ion ****(GeV cosmic ray)**

## Aside on SEU in SiGe

**Aside on SEU in SiGe**

**Texas Instruments Has a C-SiGe/SOI Technology **(in production)
**Uses Thick Film SOI for Isolation ****(will provide SEU tolerance)**
**Core Next-Generation Analog / Mixed-Signal IC Design Platform**

***npn *****SiGe HBT**

***pnp *****SiGe HBT**

***npn *****SiGe HBT**

**Notes:**
MMW VCOs are used as local oscillator for wireless transceivers operating at 60 GHz ISM band, and as clocks for data retiming in optical networks operating at 40 Gb/s. 
These VCO have traditionally been implemented with III-V technologies, such as GaAs and InP.

Many metrics are used to evaluate the performance of a VCO. 
They include oscillation frequency, tuning range, output power, power dissipation, and phase noise or jitter.

In this work, we are examining the device-circuit interaction of high-performance SiGe HBTs on MMW VCO operation. 
More specifically, we are looking at how emitter length scaling and transistor biasing effect VCO performance.

## 3-D TCAD Modeling

**3-D TCAD Modeling**

**Collaboration with R. Reed of***** *****Vanderbilt Univ.**
**and G. Niu of Auburn Univ.**

## Most Charge Collection Occurs Through C/Sx Junction 
Long Collection Times for High LET Ion Strikes (nsec!)
Deep Collection Depth (16μm!) 

**Most Charge Collection Occurs Through C/Sx Junction **
**Long Collection Times for High LET Ion Strikes ****(nsec!)**
**Deep Collection Depth ****(16****μ****m!) **

**Charge Dynamics**

**Collaboration with Guofu Niu of Auburn Univ.**

**Drift                       Diffusion**

## TCAD to Circuits

- OUT

- DATA

- CLOCK

- “Ion Strike”

**Standard Master Slave Latch**

**    ****UPSETS**

**TCAD to Circuits**

**RHBD SiGe Latch**

**SEU “Soft”**

**Dual-Interleaved**

** ****Reduce Tx-Tx Feedback Coupling Internal to the Latch**
** ****Circuit Architecture Changes + Transistor Layout Changes **

**SEU Tolerant Latches**

**Limiting Cross-section (no errors!)**
**First Successful Hardening of SiGe!**

_**Leverage**_**:****	****DTRA + NASA-NEPP**
**	****	****	****	****	****	****	****	****	****	****DARPA + BSS + Mayo**
**	**

** ****Can We Eliminate TMR from SEU Hardening in SiGe?**
** ****Are There Even Better Latch Designs for SEU Immunity?**
** ****Can We Combine Transistor Layout RHBD + Circuit RHBD?**
** ****How About SEU at Cryo-T? **

**The Path Forward in SEU**

## Outline

** ****Using SiGe at Cryogenic Temperatures**
** ****Using SiGe in a Radiation Environment**** **
** ****Emerging NASA Applications**
** ****Summary**

**Outline**

## Space Exploration

**Moon                Mars            Outer Planets**

**Space Exploration**

**All Represent Extreme Environments!**
**(Wide Temperature Swings + Radiation)**

## Temperature Ranges:
+120C to -180C (300C swings!)
28 day cycles
-230C in shadowed polar craters

Radiation:
100 krad over 10 years
single event upset (SEU)
solar events

Many Different Circuit Needs:
digital building blocks
analog building blocks
data conversion (ADC/DAC)
RF communications
power conditioning
actuation and control
switches
sensors / sensor interfaces

- +120C to -180C **(300C swings!)**
- 28 day cycles
- -230C in shadowed polar craters
**Radiation:**
- 100 krad over 10 years
- single event upset (SEU)
- solar events
**Many Different Circuit Needs:**
- digital building blocks
- analog building blocks
- data conversion (ADC/DAC)
- RF communications
- power conditioning
- actuation and control
- switches
- sensors / sensor interfaces

**Requires Centralized “Warm Box”**

**Rovers / Robotics**

**The Moon:****  **
**A Classic Extreme Environment!**

**Highly Mixed-Signal Flavor!**

## Objective / Approach

**	****Develop and Demonstrate Extreme Environment Electronic **
**	****Components Required for Distributed Architecture Lunar / Martian **
**	****Robotic / Vehicular Systems Using SiGe HBT BiCMOS Technology****	**

**Objective / Approach**

**• ****Major Project Goals / Approach: **
- 		- prove SiGe BiCMOS technology for +120C to -180C applications
- 		- develop mixed-signal electronics with proven extreme T + rad capability
- 		- develop best-practice extreme T range circuit design approaches
- 		- _**deliver**_ compact modeling tools for circuit design **(design suite)**
- 		- _**deliver**_** **requisite mixed-signal circuit components **(component library)**
- 		- _**deliver**_** **robust packaging for these circuits **(integrated multi-chip module)**** ****	**
- 		- demonstrate device + circuit + package reliability per NASA specs
- 		- develop a robust maturation path for NASA mission insertion (TRL-6)
**                     **
**                      **_**Goal**_**:**** ****Be Ready for LPRP Mission Insertion**
** **

**Objective:****  **
**	****	****	****	****	****	**

**Extreme Environment Requirements (e.g., Lunar):**
**+120C (day) to -180C (night) + cycling** **(main focus)**
**radiation** (TID + SEU tolerant)

**“****SiGe Integrated Electronics for Extreme Environments”**

**     ****SiGe Integrated Electronics for      **
**Extreme Environments**

**NASA ETDP Funded – Project under RHESE, NASA-MSFC (M. Watson)**

## Remote Electronics Unit

- 5” wide by 3” high by 6.75” long = 101 cubic inches
- 11 kg weight
- 17.2 Watts power dissipation
- -55oC to +125oC

- 1.5” high by 1.5” wide by 0.5” long = 1.1 cubic inches
- < 1 kg
- < 2-3 Watts
** ****-180****o****C to +125****o****C, rad hard**

**Conceptual integrated REU system-on-chip SiGe BiCMOS die**

**The X-33 Remote Health Unit, circa 1998**

**The ETDP Remote Electronics Unit, circa 2009**

_**Specifications**_

_**Goals**_

**Analog front end die**

**Digital control die**

_**Possible REU Sensor Types**_**:**** **
**Temperature, Strain, Pressure, Acceleration, Vibration, Heat Flux, Position, etc.**** **

**REU in connector housing!**

## CRYO-II SiGe Designs

**  ****Georgia Tech #1             Georgia Tech #2         Univ. of Tennessee**

**   ****Univ. of Arkansas           Auburn Univ.                   JPL / Boeing**

**5.0x6.0 mm****2**

## Hardware Build Path

**Phase 1**

**Phase 2A**

**Phase 2B  **

- 4/15/05

- 4/28/06

- 4/28/07

**2005                 2006                 2007                  2008                 2009 **

**CRYO-1            CRYO-2                 CRYO-3        ****	****CRYO-4**
**proof of concept****	****refined CRYO-1****	****         ****refined CRYO-2****	****	****refined CRYO-3**
**V references****	****2 ADCs****	****         ****REU sub-paths****	****	****REU-on-a-chip**
**op amps****	****more op amps****	****         ****more digital****	****	****    library enhancements**
**DAC****	****drivers****	****         ****more sensors****	****	****    RHBD enhancements**
**VGA****	****T sensors****	****         ****actuation****	****	****        modeling enhancements**
**HV device****	****bus interface****	****         ****RF blocks****	****	****        low power variants**
**digital blocks****	****refined modeling****	****         ****more bus interfaces**
**test structures****	****radiation evaluation****	****         ****RHBD evaluation **
**modeling****	****low power variants****	****         ****low power variants**
**MUXs****	****ramp generator**
**	****REU components**
**	**

**Develop Infrastructure for Extreme Environment Components / Systems**** **

**CRYO-2.5**
**REU sub-path demo**

## SiGe Cryo-T Packages!

**Si****3****N****4**** Substrate**

**AlSi**
**Alloy**

**SiGe **
**Die**

## JWST Apps for SiGe (37K)

**Circuits**

**Current Mode BGR with Op-Amp optimized for low T range (-180:-111)C**
**Current Mode BGR with Op-Amp with reduced pads and without VSS pad**
**Low Power Current Mode BGR with Op-Amp**** **
**Exp. BGR with resistive shunt feedback**** ****Exp-BGR**
**Exp. BGR with resistive shunt feedback and resistive networks**
**Exp. BGR with reduced pads**
**Exp. BGR with reduced pads and without VSS pad**
**Current Mode BGR with Op-Amp with reduced pads**** **
**Current Mode BGR with Op-Amp and resistive networks**
**Low Power Current Mode BGR with Op-Amp and  resistive networks**

**1**

**2**

**3**

**4**

**5**

**6**

**7**

**8**

**9**

**10**

**Synergy / $ Leverage:**** **
**JWST – NASA Goddard**

_**Project Goal**_**:**** **
**Stable 37K / Rad-Tolerant  Voltage Source**

## 300 mK BGR Operation!

** **_**First**_** SiGe Circuit to Operate at Temperatures Below 4K!**
** ****CRYO-I Exponentially Compensated BGR – ****works fine to 300 mK!**
** ****Transistor Measurements in Progress ... ****Stay Tuned**

_**Leverage**_**:****	****NASA-GSFC, JWST**
**	**

## Summary

- 	- lots of progress – many new apps **(extreme environments)**
**• ****SiGe For Cryogenic Temperature Electronics**
- 	- major performance metrics improve with cooling
- 	- major new lunar application for +120C to -180C
-  	- exciting developments in the ultimate speed limits of SiGe HBTs
**        ****SiGe Is Very Promising for Extreme Environments!**_** **_

**Summary**

**• ****SiGe For High Temperature Electronics**
- 	- SiGe HBTs work fine up to 200-300C, but with performance loss
- 	- no obvious device-level reliability issues

**• ****SiGe For Radiation Environments**
- 	- built-in total-dose hardness (multi-Mrad!)
- 	- SEU mitigation approaches for high-speed logic now exist

## Acknowledgement

** ****Lew Cohn **
** ****Paul Marshall**
** ****Mike Watson, Don Frazier, Andrew Keys, Marvin Beatty,                              ****	****Diane Hope, Chris Moore, and the RHESE Team**
** ****The SiGe ETDP Team**
** ****Mohammad Mojarradi and Elizabeth Kolawa**
** ****Guofu Niu and team **
** ****Robert Reed and team**
** ****Ish Islam, Bob Meloy, Sachi Babu, and team**
**NASA-NEPP, DTRA, NASA-ETDP, DARPA, JPL, MURI, JWST**

**Acknowledgement**

## My Gang at Georgia Tech