# Presentation: 402141

## SLAC Aerial View

**Notes:**
The SLAC Timing System delivers triggers to timed devices on each beam line and experiment, except for SPEAR, which has its own independent timing system.

## SLAC ESD looking anew at timing

- The short-term (3 year) LCLS needs
- A long-term revamping of Klystron control
- A new look at the prototype NLC ideas
- Provide input to this meeting
- How do we join SLC timing to EPICS timing to run the LCLS injector and Argonne-supplied Undulator?

## SLAC Timing System Specifications

**Blue Book:**
**     **(~1968)
-   Resolution: 50 nSec
- -  Jitter: 15 nSec
-  - Main Trigger Line
-    Waveform:
-     + / - 400 Volts

**PEP – II:**
-      (~1998)
-  - Resolution: 2.1 nSec
-  - Jitter: 20 pSec
-  - NIM Level
-    Waveform:
-    0 to –0.7 V into 50 Ohms

**Notes:**
SLAC’s timing requirements have evolved over the years.

## Trigger Generation, simplified

**Notes:**
Main path of 476 MHz is shown across the top, from Master Oscillator to Main Drive Line.

Several critical components have hot spares standing by: Master Amplifier, Fiducial Generator, Sequence Generator.

A phase lock loop surrounds the amps and the Fiducial Generator.

The SLC Countdown chassis has an 8.5 MHz output which drives the Master Trigger Generator (SLC) for Damping Ring Synchronization.

The PEP Pattern Generator is closely coupled with the SLC Master Trigger Generator, providing phasing for PEP Injection.

The NIM Fiducial Generator (no longer actively in the system) is used locally to observe the phasing of the Fiducial going out on the Main Drive Line.

## Waveforms: 119 MHz and NIM Pulse

**FIDO Output**

**PDU Output**

**Notes:**
The FIDO receives 476 MHz with an amplitude Fiducial, and puts out a pulse train of 119 MHz with a missing pulse at Fiducial time.  

119 MHz from the FIDO is coupled to the SLC PDU through 1/4” Heliax cable.  The PDU has sixteen pulse channels, with each channel’s pulse repetition frequency and delay programmable through CAMAC.

## PDU – SLC Style

**Sixteen channels per PDU;**
**One channel shown**

**Notes:**
119 MHz from the FIDO drives a Counter, and the detected missing pulse Fiducial resets the counter.

Count length is set under SCP control via CAMAC.

If RE-USE is active, the counter is reloaded for each cycle.

The counter’s outputs are buffered and sent to the CAMAC Upper Timing Backplane as Differential ECL, where they are distributed to each CAMAC slot.

The front panel “X” LED flashes when the PDU is addressed by CAMAC.

Front Panel LEDs indicate whether the FIDUCIAL is DETECTed, and whether there has been a MISSING FIDUCIAL.  

Note:  these LEDs are under CAMAC control, not “real time” indications.

## PDU, Backplane, and STB

*Counters*

*Drivers*

**Notes:**
119 MHz clocks the PDU’s counters, and at end of count, the PDU outputs a differential ECL pulse on the enabled channel to the CAMAC Upper Timing Backplane.

This timing bus runs to all modules in the CAMAC crate.  

The Simple Timing Buffer lives next to the PDU in the crate.  It receives and buffers the timing pulses, and makes them available on the front panel LEMO connectors as NIM level pulses ( 0 to –0.7V into 50 Ohms).

The STB also contains ADC’s which measure CAMAC Voltages and temperature, data read and stored by SCP.

## Some Triggered Devices

- Kickers
- Single Beam Dumper Logic
- Beam Position Monitors
- PAU – pulsed analog read or write

- Toroid Charge Monitors
- Trigger Gate and Synchronizer
- Klystron Controls
- Gated ADC readout

**Notes:**
The Timing System drives a variety of triggered devices.

## Software aspects

- PDU is loaded with tables of delays (TMAT)
- These tables are indexed by beam code
- Beam code information is sent separately at 360 Hz (PNET)
- This information was once 16 bits, now is 128 bits, plan is for at least 1024 bits.
- 16 STB outputs are delayed as a function of beam code

## Software aspects - 2

- PNET broadcast includes base beam code (#<32), high-order bits of pulse ID, modes, and beam code information as a function of mode.
- Code can intervene to create more complex scenarios (beam code #>31)
- PNET includes information for current pulse, next, and/or next+1
- Since 128 bits is not nearly enough, much information is a function of modes (near front of buffer)
- This complexity is referred to as Regional Beam Codes

## What is included in timing?

- Stable phase reference
- Per-pulse digital information
- Preset timed data acquisition
- Preprogramming of complex scenarios
- Collecting beam-based acquisitions SLAC speak = BPM Buffered Acquisition
- Data do not pass through any database
- Correlation done on host machine using Pulse ID
- Can all this be digital at 1GHz (or faster)?