# Presentation: 295193

## Some Thoughts on HP & HPTC & IA-64SOS76-Mar-03

- Richard Kaufmann

## I Was Going To Brag About Marvel...

- But Jean and Michael beat me to it!
- So, on to...

## What is the Itanium® Architecture?

- It’s an architecture
- 64-bits
- Features designed to address silicon-imposed limits
- Prefetch, Speculation
- Two loads and a store to each FMAC unit from large, on-die caches
- It has a number of implementations
- Itanium-2
- Madison, Madison++
- Montecito
-  ...

- Itanium is a trademark of Intel.

## What is Itanium?

- A chip that does a great job on commercial workloads
- Record-breaking TPC-C results for large Itanium SMPs
- HP expects a successful launch of its Madison-based servers this summer
- One socket all the way up to 64 sockets
- HP’s first large servers featuring Itanium
- A chip that does a great job on cache-friendly HPTC apps
- Fastest SPECfp numbers of any microprocessor
- 95% of peak on Linpack

## The Current Implementations Are... 

- They are not cost-effective memory controllers
- Apps that beat up the memory system with small, random reads won’t see the performance benefits of the chip.
- Some of the causes are due to the chipsets rather than the processors
- Cost decisions dominate how many sockets share 6.4 GB/s (currently) memory bandwidth
- They are not priced the same as Pentium®
- The difference is worth it if:
- Your app can take advantage of very, very large on-die caches
- Your app needs 64 bit addressing
- You need large SMPs

- Pentium is a trademark of Intel.

## What It Could Be...

- If Itanium only achieves its goals of being great for commercial workloads and cache-friendly HPTC, it will be a great success
- But, the architecture is capable of more
- It can be better for non-stride-1 memory bashers
- Intel is now engaging advanced HPTC types (you know who you are) to look into this
- Chipsets can also differentiate here
- HP is engaged in Research (note the big R) to work on memory, density and system issues

## What Else Is HP Up To?

- HPUX Scale-Up
- Linux Scale-Out
- Software
- UPC, OpenMP, MPI, ...
- Lustre
- GoDiva
- HP Labs

## HPUX Scale-Up

- A wonderful ISV-led market of single systems scaling up to 64 sockets
- Scale-out variant available, but focus is on single-system applications
- Exceeds the revenue of our scale-out business

## Linux Scale-Out

- IA-32: Many relationships with 3rd parties
- IA-64: PNNL, followed by others
- XC: Itanium and IA-32 Linux Scale-Out Product

## Lustre

- Two foci at HP
- HPTC is looking to Lustre to be *the* highly scalable parallel file system for its scale-out systems
- HP’s Storage Division expects Lustre to be a key part of its NAS offerings
- What’s it to you?
- A way to separate procurements of storage and computes.
- Heterogeneous
- Open Source
- Scalable as all heck
- Both for home directories and large, parallel file systems

## Godiva

- DARPA HPCS investigation with HP Labs, HP’s HPTCD group, Rice, and USC ISI
- Looking at aggressive PIM designs
- Both hardware
- ...and software (esp. programming models)
- Tidbit: very strong synergies with a future SMP design

## HP Labs

- Linux
- Itanium lead an HP Labs member
- Systems Manageability
- UDC: Machine-room provisioning, thermal management, grid access, ...
- MRAM
- Non-volatile memory that has disk drive economics, with dramatically improved latency and bandwidth.
- New HPC group within HP Labs, led by Rob Schreiber
- Godiva part of this group’s portfolio