# Presentation: 755584

## Integrated Hardware/Software Security Support

**Integrated Hardware/Software Security Support**

- R. R. Brooks		Sam T. Sander
- Associate Professor	Assistant Professor
- Holcombe Department of Electrical and Computer Engineering
- Clemson University
- Clemson, SC 29634-0915
- Tel.   864-656-0920
- Fax.   864-656-5910
- email: rrb@acm.org

## FPGA security enforcement

- DAG access with hardware enforcement

## Differential Power Analysis

- Using statistic method in order break the secret key
- Using several runs on several sample inputs, for instance 1000 sample inputs
- An attacker guesses a particular key and based on that key he can determines a theoretical value for one of the intermediate bits generated by the program

## Dataflow Analysis

**a = ......**

**b = a ...**

**f = ......**

**d = b  ...**

**c = ......**

**e = ......**

**g = ......**

**h = b**

**Assume: ****“a”**** is the variable**
**that holds secret information**

## Differential Power Analysis Vulnerability

## Slide 6

## Conclusions  

- Since we do not hide the energy behavior of all instructions, our approach consumes less energy overhead than other approaches
- Our approach has 83% less energy overhead than dual-rail logic

## Overview of Symmetric Encryption Architectures

- The dotted lines indicate the smallest subset of hardware capable of performing a single encryption.
- Features to note:
- Parallel architectures have multiple key schedulers. This is both an advantage and a disadvantage.
- Parallel architectures employ feedback routing.

## Encryption Implementations – AES

- Industry & Published Results:
- Helsinki University of Technology:
- Virtex-II Pipelined: 17.8 Gbps
- Helion Technology:
- Spartan-3 Pipelined: 10.0 Gbps
- Virtex-II Pro Pipelined: 16.0 Gbps
- ASIC Pipelined:      25.0 Gbps
- Single Spartan-3:    1.0   Gbps
- Single Virtex-II Pro: 1.7   Gbps

## Encryption Implementations – AES

## FPGA Security Concerns

- Differential Power Analysis
- Published Solutions
- Selective dual-rail logic
- Use dual-rail logic to create a uniform power profile for sensitive operations. Only minimal additional energy is consumed as dual-rail operations are not always employed.
- Power supply noise injection
- Obfuscates the power profile by adding random noise to the supply voltage within a specific range. Maintains functionality while making differential power analysis practically infeasible.
- Both are good solutions

## FPGA Security Concerns

- Parallel Advantages
- Irregular power profile
- Variable number of simultaneous encryptions
- Variable number of different keys
- Variable number of active modules
- Variable number of implemented modules
- Dynamic key values
- Within each encryption module, both the key data and the encryption data are changed dynamically
- Differential power analysis becomes practically infeasible

## Conclusions

- A number of physical attacks exist:
-  Power analysis
-  Bit flipping
- Pure software solutions can not address them
- Pure hardware solutions can have prohibitive resource requirements (power, heat).
- Integrated compiler / instruction set support needed
- Hardware support essential for necessary throughput (ex. Symmetric encryption)
- Fixed hardware architecture can not adapt to varying system needs (ex. Number of processes requiring encryption.)
- Reconfigurable hardware architectures are attractive.
- Hierarchical verification possible.
- Isolating processes can take many forms (spatial, logical, temporal).