<!-- Title: 14:10:47  Tue Jan 11 2000 -->
<!-- Crewchief: Thomas Phillips -->
<!-- Op1: Bill Orejudos -->
<!-- Op2: Mike Kirby -->
<!-- Op3: Ting Miao -->
<!-- Op4: Ashutosh Kotwal -->
<!-- Op5: Kevin Pitts -->
<!-- Op6: &nbsp; -->
<!-- Notes: -->
TDC Checkout


<!-- Date: Tue Jan 11 14:12:26 2000 -->
<pre>Here is a repeat of the entries at the end of the previous file: 
 
Tue Dec 7 16:51:56   
 
Log entry for TDC checkout performed Nov. 26 - Nov 30. Total  
of 13 TDC's inspected with the commisioning software during  
this time.  
 tdc 561586: Failed SRAM read/write test. At first one could   
              still talk with TDC despite this fact. After  
              several trials, though, it became impossible to  
              talk with TDC. This is the current state of the  
              TDC.  
 tdc 561587: Two channels on board show problems: channel 73  
              does not output any data at all, and channel 45  
              shows the "split pulse problem". Symptoms of this  
              problem: the boards outputs two hits for some  
              of the events. The second hit begins 1 ns after  
              the first one ends. The sum of the two pulse   
              widths is consistent with the expected output  
              pulse width. It seems that some glitch is causing  
              a single bit to be held low. This problem occurred  
              on channel 45 for 6% of the events.   
 tdc 561588: Get many unpaired edges on channels 0 and 1 (and   
             maybe on channel 2 as well; this bears further  
             investigating).  
 tdc 561589: Split pulse problem on channel 61 for 1% of the   
             events.  
 tdc 561590: No output on channel 47. Also see an unpaired  
             edge and a second hit of correct pulse width  
             for a single event on channel 1. The start times  
             for these pulses do not seem to be correlated with  
             each other.   
 tdc 561591: Board passes all tests.  
 tdc 561592: Split pulse problem on channel 24 for 80% of the  
             events.   
 tdc 561593: Split pulse problem on channel 15 for <0.5% of the  
             events.  
 tdc 561594: Board passes all tests.  
 tdc 561596: Tail in the distribution of Start_ch45 - Start_ref  
             (where Start_ref is just the start time of channel  
             0). Tail extends out to about -25 ns. Note that the  
             correct distribution is a gaussian-like shape  
             with a rms < 1 ns.   
 tdc 561597: Problem in Start_ch50 - Start_ref distribution.  
             We get 2 populations: 80% at -244 ns and 20%  
             at 1804 ns. This problem may be due to a problem  
             with the calibration cell on the TDC - switching  
             to a different pulse caused this problem to go   
             away. Oddly enough, when I run this test with  
             front panel input (via ASDQ pulsing) I see two  
             populations: 80% at the correct value and 20%  
             off by about 240 ns.  
 tdc 561605: Board passes all tests.  
 tdc 561607: Problem in the Start_ch69-start_ref distribution.  
             There are three populations in this distribution.  
             Each population has rms <1 ns.  
             The means of the populations are seperated from   
             each other by about four ns. Also, the output  
             width of channel 69 has three populations. Each  
             population has the "correct" rms (again, <1 ns),  
             and the means of the populations are seperated by  
             about 4 ns.   
  Grand Total : 13 TDC's inspected  
                 3 pass all tests  
                 1 bad board  
                 10 boards with various problems on 1 or 2 (or at  
                 most 3) channels.         
                     
 
 - Bill Orejudos  
 
    Sun Jan 2 23:41:04   
 
Total of 6 LVDS boards tested over the holiday:  
  tdc 212 (prep ID 561603): Passed all tests  
  tdc 187 (prep ID 561598): Passed all tests  
  tdc 203 (prep ID 561601): Passed all tests  
  tdc 188 (prep ID 561599): Passed all tests  
  tdc 168 (prep ID 561602): Channels 0 and sometimes 1 have  
                            multiple hits at a very low level  
                            (less than 1% of events). Hits  
                            have the nominally correct width  
                            and are about 1000 ns apart.  
  tdc 166 (prep ID 561600)  Dead TDC? TDC did not come up   
                            in correct state (as indicated   
                            by front panel lights)   
                            on power up, when  TDC was reset,  
                            or when CPU was reset. 
 
 - Bill Orejudos  
 
    Mon Jan 3 16:39:42   
 
The entry from Dec. 7 only gives the Prep ID numbers. Here   
are the corresponding Michigan ID numbers:  
    561586 --> 193  
    561587 --> 169  
    561588 --> 155  
    561589 --> 209  
    561590 --> 189  
    561591 --> 151  
    561592 --> 178  
    561593 --> 181  
    561594 --> 186  
    561596 --> 190  
    561597 --> 167  
    561605 --> 201  
    561607 --> 185 
 
 - Bill Orejudos </pre>
<!-- Author: Bill Orejudos -->


<!-- Date: Tue Jan 11 14:28:44 2000 -->
<pre>I checked out three new cards using the frozen code in ~kirby/frozen.  Here are the results: 
 
	card 150 (prep 561241)	passed all tests 
	card 198 (prep 561606)	channels 27 & 84 had bad start RMS and bad width RMS 
						both had 7 second hits 
						ch 27 had 1 bad width 
	card 113 (prep 561894)	channels 54 & 59 same as ch 27 above 
 
I also tried a number of cards that Bill had tested, but with different results in some cases: 
	card 212 (prep 561603)	failed, lots of bad widths.  No change with cables removed. 
	card 187 (prep 561598)	channels 47,50, & 89 like ch27 on card 198 
	card 150 (repeat)		still passes 
	card 167 (prep 561597)	passes 
	card 168 (prep 561602)	channels 23,44,47,52,54,55,60,63 bad 
 
Details can be found on B0DAU30 in ~phillips/TDCcards/cardNNN.txt where I have saved the output for each card. 
</pre>
<!-- Author: Tom Phillips -->
<!-- Comment: Wed Jan 19 10;33;28 comment by...Tom Phillips -->
The output files are now web accessible at <A HREF="/internal/ops/tdc/"> /tdc/</A>
<!-- Date: Wed Jan 12 14:21:50 2000 -->
Tom and I looked at the 5 of the seven boards that Tom checked yesterday as listed in the previous entry.  The 2 boards we did not check were the ones that passed and given to Ting as stable boards.  These were boards # 150 and 167.  The tests were done using a version of FER checked out at 1135 this morning, and all boards passed.  The results have been moved to /data1/cot_tdc/  Still investigating the failures.  
<!-- Author: Kirby -->



<!-- Date: Wed Jan 19 15:34:03 2000 -->
<pre>Entry for test performed on Jan 4. I cleaned up the TSIE 
sequences, so that I excessive L1A, etc., are not put out. 
Also send a TSIE signal that chooses a specific TDC scanlist. 
Changes propagated to official code. With these changes, the  
boards that had multiple hits on channels 0-2 no longer have 
these hits. All other bad channels I noted before are still  
present, except for channel 50 of of TDC 167.</pre>
<!-- Author: Bill Orejudos -->


<!-- Date: Wed Jan 19 15:40:43 2000 -->
Entry for tests performed on Jan 17. Attempted to run with  
CDF TS and CLOCK. Some strange behavior vis-a-vis the 
Tracer pulses, but I made changes to my version of the 
code to cope with these changes. Still, all results should 
be viewed as provisional. I found that several boards have 
multiple hits on channels 0-2. In fact, the boards that had these 
multiple hits using the testclock before I cleaned up the 
TSIE signals are the ones that have multiple hits when I  
use the TS. This may indicate a noisy L2 trace. The summary 
text files for the cards I looked at with the TS are on  
b0dau30: ~vxworks/*_ts.txt. For comparison, the same cards,  
looked at with the testclock can be found as *_tk.txt.
<!-- Author: Bill Orejudos -->
<!-- Comment: Thu Jan 20 13;52;15 comment by...Tom Phillips -->
I moved all these files to /data1/cot_tdc/orejudos/ on b0dau30.  Other files moved to /data1/cot_tdc/vxworks/, so ~vxworks is now clear of tracktest output.


<!-- Date: Tue Jan 25 11:43:59 2000 -->
<pre>Tested 11 new TDCs and some old ones: 
Prep #	Michigan #	Result file (P or F denotes Pass or Fail) 
561598	187	<A HREF="/internal/ops/tdc/187/sum0001241040P.txt"> tdc/187/sum0001241040P.txt </A> 
561593	181	<A HREF="/internal/ops/tdc/181/sum0001241040F.txt"> tdc/181/sum0001241040F.txt </A> 
561245	154	<A HREF="/internal/ops/tdc/154/sum0001241040F.txt"> tdc/154/sum0001241040F.txt </A> 
561240	152	<A HREF="/internal/ops/tdc/152/sum0001241040F.txt"> tdc/152/sum0001241040F.txt </A> 
561239	105	<A HREF="/internal/ops/tdc/105/sum0001241040F.txt"> tdc/105/sum0001241040F.txt </A> 
561698	233	<A HREF="/internal/ops/tdc/233/sum0001241040F.txt"> tdc/233/sum0001241040F.txt </A> (muon TDC) 
 
561598	187	passed (file not saved) 
561366	134	<A HREF="/internal/ops/tdc/134/sum0001241124F.txt"> /tdc/134/sum0001241124F.txt </A> (muon TDC) 
561361	122	failed to reset--could not test (muon TDC) 
561909	172	<A HREF="/internal/ops/tdc/172/sum0001241124F.txt"> /tdc/172/sum0001241124F.txt </A> 
561908	183	<A HREF="/internal/ops/tdc/183/sum0001241124P.txt"> /tdc/183/sum0001241124P.txt </A> 
561904	160	<A HREF="/internal/ops/tdc/160/sum0001241124F.txt"> /tdc/160/sum0001241124F.txt </A> 
 
561598	187	passed (file not saved) 
561903	158	<A HREF="/internal/ops/tdc/158/sum0001241146F.txt"> /tdc/158/sum0001241146F.txt </A> 
561902	210	<A HREF="/internal/ops/tdc/210/sum0001241146F.txt"> /tdc/210/sum0001241146F.txt </A> 
561906	196	<A HREF="/internal/ops/tdc/196/sum0001241146P.txt"> /tdc/196/sum0001241146P.txt </A> 
561910	176	<A HREF="/internal/ops/tdc/176/sum0001241146P.txt"> /tdc/176/sum0001241146P.txt </A>  
561907	202	<A HREF="/internal/ops/tdc/202/sum0001241146P.txt"> /tdc/202/sum0001241146P.txt </A> 
561905	191	<A HREF="/internal/ops/tdc/191/sum0001241146P.txt"> /tdc/191/sum0001241146P.txt </A></pre>
<!-- Author: Tom Phillips -->


<!-- Date: Wed Feb 2 10:36:00 2000 -->
<pre>The following cards were tested in crate b0musc00 on January 27th.  Note that TrackTest must be run twice, since the first time a card is read an event is missed (presumably the first event).  This is the first recorded test for most of these boards. 
 
Prep #	Michigan #	Result file (P or F denotes Pass or Fail)  
561244	104	<A HREF="/internal/ops/tdc/104/sum0001271849P.txt"> tdc/104/sum0001271849P.txt </A>  
561243	112	<A HREF="/internal/ops/tdc/112/sum0001271849P.txt"> tdc/112/sum0001271849P.txt </A>  
561588	155	<A HREF="/internal/ops/tdc/155/sum0001271849P.txt"> tdc/155/sum0001271849P.txt </A>  
561597	167	<A HREF="/internal/ops/tdc/167/sum0001271849P.txt"> tdc/167/sum0001271849P.txt </A>  
561604	175	<A HREF="/internal/ops/tdc/175/sum0001271849P.txt"> tdc/175/sum0001271849P.txt </A>  
561592	178	<A HREF="/internal/ops/tdc/178/sum0001271849P.txt"> tdc/178/sum0001271849F.txt </A>  
561607	185	<A HREF="/internal/ops/tdc/185/sum0001271849P.txt"> tdc/185/sum0001271849F.txt </A>  
561590	189	<A HREF="/internal/ops/tdc/189/sum0001271849P.txt"> tdc/189/sum0001271849F.txt </A>  
561596	190	<A HREF="/internal/ops/tdc/190/sum0001271849P.txt"> tdc/190/sum0001271849F.txt </A>  
561606	198	<A HREF="/internal/ops/tdc/198/sum0001271849P.txt"> tdc/198/sum0001271849P.txt </A>  
561589	209	<A HREF="/internal/ops/tdc/209/sum0001271849P.txt"> tdc/209/sum0001271849F.txt </A>  
</pre>
<!-- Author: Tom Phillips -->
<!-- Comment: Wed Feb  2 10;43;18 comment by...Tom Phillips -->
Oops.  Bad URLs for the failed cards.  Use these:
<A HREF="/internal/ops/tdc/178/sum0001271849F.txt"> tdc/178/sum0001271849F.txt </A> --
<A HREF="/internal/ops/tdc/185/sum0001271849F.txt"> tdc/185/sum0001271849F.txt </A> --
<A HREF="/internal/ops/tdc/189/sum0001271849F.txt"> tdc/189/sum0001271849F.txt </A>  --
<A HREF="/internal/ops/tdc/190/sum0001271849F.txt"> tdc/190/sum0001271849F.txt </A> --
<A HREF="/internal/ops/tdc/209/sum0001271849F.txt"> tdc/209/sum0001271849F.txt </A> 	



<!-- Date: Mon Feb 28 13:03:40 2000 -->
<pre>	  Summary of TDC checkout (week of Febuary 21) 
 
1. Returned 18 bad TDCs to PREP 
 
   MICH IDs are:182,169,159,212,156,192,103,267,199, 
                271,112,154,152,105,386,122,293,178 
 
2. Test TDC/XTC and following passed all test 
 
   213,131,277,278,281,170,171,108,150,193 
 
 Above TDC/XTC pairs are installed into b0cot18 along  
with other 7 good TDCs checked out in previouse week. 
 
3. TDC 561924/293 passed all test in  b0 cleanroom and  
also in in b0cot18 before XTC test. But its buffer chips  
were blown during  XTC testing about 10 minutes later.  
There were no power on/off during  the period. 
  
4. Received 17 TDCs from PREP and 12 passed tests, two dead  
on arrival, two have VISION open failures and one  has bad 
channel 53 (all with unpaired leading edge hits). 
 
 290,312,291,285,295,289,288,184,298 passed with XTCs 
 313,299,205 passed (no XTC test applied) 
 
 301  dead on arrival   
 294  dead on arrival (+3.3V light off too) 
 287,174 VISION open fails 
 165: bad channel 53 
 
 Also measured resistances between Vcc and ground for dead TDCs  
to check buffer chips. They are all around 3 ohms so buffer chips  
are good.  
 
 5. Give Dave eight TDCs (with one or two bad channels) for use  
in IB4 COT test: 297,160,181,190,189,209,185,165 
 
 6.Installed TDC/XTCs into b0cot18 and b0cot19.  
 
  
  
  
  
  
  
 
  </pre>
<!-- Author: tmiao@fnal.gov -->


<!-- Date: Fri Mar 24 10:08:31 2000 -->
<pre>        Here is a summary of what Mike and I accomplished with TDC 
commissioning this week: 
 
TDC checkout 
Failed: 
Michigan Prep Problem 
287     562425  Channel 20 bad  (seen also by Kevin) 
328     562677  Ch 74 very bad-no data  (passed by Kevin) 
196     561906  Ch 0 no data    (seen also by Kevin) 
303     562672  Failed RW test: sRAM reads 0xff0000 (should be 0x0) 
333     562669  Chs 80-87 bad (Kevin found bad, passed our test, then 
                 failed again in crate B0COT02) 
176     561910  Ch 34 2nd hits on first test, then passed, then failed in 
                 B0COT02.  Passed for Kevin. 
        561365 (muon) bad memory light; could not read out 
326     562674  passed initially and once in B0COT02, but then hung 
                 crate on RW test: "Local done not set, or FIFO empty" 
 
 
 
Passed: 
324     562679  B0cot02 slot 2  XTC 107 ch 35 unpaired edges in b0cot02 
331     562675  B0cot02 slot 3  XTC 106 
311     562676  B0cot02 slot 4  XTC 105 
195     562668  B0cot02 slot 5  XTC 95 
211     562678  B0cot02 slot 6  XTC 98 
327     562681  B0cot02 slot 7  XTC 97  failed corkscrew for Kevin 
304     562686  B0cot02 slot 8  XTC 51 
114     561242  B0cot02 slot 9  XTC 52  has crosstalk problems here 
323     562683  B0cot02 slot 10 XTC 79 (29?)    crosstalk ch 60 
316     562665  B0cot02 slot 11 XTC 56  has crosstalk problems here 
325     562670  B0cot02 slot 12  
307     562667  B0cot02 slot 13                 crosstalk ch 75 
335     562666  B0cot02 slot 14 
341     562684  B0cot02 slot 15 XTC 53 
320     562673  B0cot02 slot 16 XTC 37  has crosstalk problems here 
 
310     562685  B0cot09 slot 7  XTC 104 
319     562680  B0cot09 slot 8  XTC 103 
163     562671  B0cot09 slot 9  XTC 102 
315     562682  B0cot09 slot 15 XTC 33  passed initially, had crosstalk errors in B0cot02 
191     561905  B0cot09 slot 17 XTC 50  passed initially, had crosstalk errors in B0cot02 
 
217     561693  muon card 
130     561221  muon card 
 
Note: there is no Testclock in B0cot09, so these cards have not been tested there. 
 
XTC test on crate B0cot02 was interrupted when an unrelated (empty?) crate had an over temp trip and knocked power off.  Failures seen on XTC 97, 79(29?), 56, 53 and 37 (assuming card count starts at 0) before trip.  "Card 5" (presumably 97) really bad.  Need to fix this first and rerun test.</pre>
<!-- Author: Tom Phillips -->


<!-- Date: Wed Apr 12 10:32:34 2000 -->
<pre>          Summary of TDC checkout (week of April 3) 
 
1. Checkout 16 TDCs from PREP  (18 shipped from Michigan). 
 
2. 14 passed all TDC and XTC tests in cleanroom. 
 
  ID 306,346,356,317,351,343,353,342,321,308,338,204,355,344.  
 
3. One (ID 352) has VME bus error. 
 
4. One (ID 339) passed TDC test but failed XTC test (VME bus error). 
 
5. Repeated XTC test on TDC 339 with different XTC cards but still failed. 
 
6. Installed TDCs into crate 9 and 7.  
 
7. TDC 343 had channel 79 dead on crate 7 but fine with cleanroom crate. 
 
8. TDC 338 has unstable +3.3V light after installation in crate 7. 
 
9. TDC 356 had XTC test problem but is fine in cleanroom.  
 
10.All three TDCs (343,338 and 356) were replaced for crate 7.   
 
 
			Susana & Ting </pre>
<!-- Author: Susana Cabrera & Ting Miao -->


<!-- Date: Fri Apr 28 10:32:54 2000 -->
<pre>Summary of TDC Testing the weeks of 4/12 - 4/28: 
 
21 TDC checked out, 18 LVDS and 3 ECL. 
16 Passed, 5 failed (4 LVDS, 1 ECL) 
Failed boards and reason: 
 
348 VME BusErrors 
334 Chan 72 bad start times, chan 86 was hot 
153 Chan 30 & 60 dead, 32-39 bad widths 
358 (ECL) failed cross talk and had bad starttimes for Chan 40-43 
194 "dead spot" on channels 24-31 
 
Passed boards: 
188,154,177,212,350,305,345,170,242(ECL),120(ECL),178,277,196,287 
301,328 
 
</pre>
<!-- Author: Michael Kirby -->


<!-- Date: Mon Aug 28 16:44:38 2000 -->
<pre>Much work done in the last 4 months - see TDC logbook for 
details. I will not try to update the electronic log for the 
last 4 months. What follows is a summary of the work done 
in the week 8/21/00 to 8/25/00 
 
 
    tracktest results from teststand: 
 
  8/21/00 
 
         TDC            result            XTC? 
 
         303        failed r/w test        
         206            passed               
         348            passed 
         531            passed 
         346            passed            17 
         172            passed            183 
         318            passed            182 
         171            passed            181 
 
  8/22/00 
 
         317            passed            101 
         300            passed            123 
         175            passed            180 
         202            passed            14 
         187            passed            16          
         166            fail, ch. 32-35    
         309            passed            185 
 
 8/24/00 
         
         356            passed             16 
         193            passed             192 
 
 8/25/00  
         122            passed              
         261            passed 
         129            passed 
         268            fails, ch.21, 29 
         386            passed 
         126            passed 
         250            passed 
         124            passed 
         374            passed 
         375            passed 
         143            failed r/w test 
         407            passed   
         118            passed 
         180            passed 
         281            passed 
         161            passed 
         313            passed 
         333            passed 
         316            passed 
         327            passed 
         311            passed 
                                
                   
  Installation in pit: 
 
            8/21/00 
 
                   removed TDC's 187 (slot 11) 
                                 175 
                                 202 
                                 160 (slots 3,8,10) from 
                                      b0cot08 
 
                   installed: slot3  209 
                              slot8  356  XTC=16 
                              slot10 193  XTC=192 
                              slot11 346  XTC=17 
 
        8/22       removed tdc 309? from slot 6 
                               317  from slot 8 
                               300  from slot 14 
 
                           from b0cot07 
 
                   installed:  slot   tdc   XTC 
                                 6    348   182 
                                 8    206 
                                 14   172   183 
                                 18   203 
                                 19   286 
                                 20   104 
                                 21   285        
 
       8/23/00 
 
                   b0cot17, removed:  slot  TDC  XTC 
                                        19  173   80 
                                        18  335   103 
                                        17  320   107 
                                        16  342   70 
 
                            installed   16  202   14 
                                        17  317   101 
                                        18  175   180 
                                        19  300   123 
 
                 b0cot18 removed:       4   312?   66? 
 
                         installed      4   309?   185 
                                        10  291 
                                        11  170 
                                        12  190 
                                        13  187 
 
                               TDC in slot 4 has prep ID 563449 
 
     8/24/00  Diode protection boards installed for b0cot07.  
              Still need to do b0cot03.</pre>
<!-- Author: Bill Orejudos -->


<!-- Date: Fri Sep 1 01:46:26 2000 -->
<pre>Some TDC's which previously passed found to cause trouble in 
the pit: 
 
 
  #175  Cant reprogram this TDC. Removed from b0cot17, slot 8. 
 
  # 203  This TDC was installed in b0cot17, slot 9. However, it 
         responds when slot 8 is addressed. Note that the address 
         for slot 8 is 0x40 and the address for slot 9 is 
         0x48, so there is a single bit which is causing  
         problems. I swapped TDC's in slots 3 and 9 to see 
         if #203 would work better in slot 3 (since the address 
         of slot 3 is 0x18, and there is no TDC in slot 2).  
         Managed to get DAQ to work, but in the end removed 
         #203 from slot 3. The end result is that #203 is 
         removed and #197 is in slot 9. 
 
 #544    This TDC seems to be responsible for putting the 
         crate into a strange state. Attempts to readout 
         the crate in run control result in non sequential 
         event ID's. I am not sure why the TDC does this but 
         I have verified that the effect moves from crate to 
         crate as the TDC is moved. In the end this TDC 
         has been removed altogether (note it was originally 
         in b0cot12, slot 7). B0cot12 is now usuable. 
 
 
These three TDC's are currently still in the pit, in b0cot16 
(not plugged in). They should go the prep ASAP.</pre>
<!-- Author: Bill Orejudos -->


<!-- Date: Sat Sep 2 12:05:10 2000 -->
<pre>Prepared the 8 COT crates for the cosmic running. I found 
potential problems with the following: 
 
 
  b0cot03: slots 20 and 21 had a header word problem (see 
            previous entry) 
 
  b0cot02: slot 8 failed on setup 
 
  b0cot17: slot 7 couldn't be read by tdctstand 
 
  b0cot18: slots 4 and 5 had a header word problem. 
 
I think that the the TDC in b0cot02, slot 8, is clearly bad, 
but for the other problems it is not clear to me if some 
sort of crate problem is responsible. We can look at these 
TDC's and see if any problems are really there... 
 
</pre>
<!-- Author: Bill Orejudos -->


<!-- Date: Sun Sep 3 15:34:10 2000 -->
While trying to include b0cot07 in the DAQ cosmic runs today, 
the card in slot 16 (TDC serial number 158) stopped responding 
to VME read/writes.  I tried to read the control register and  
got a VME BUS error.  Taking a look at the TDC, the select light 
and done light were both off and the TDC didn't respond to 
pushing the reset button.  I removed the TDC and placed it in the 
clean room crate for further investigation.  There were two TDCs 
that Angelo had tested on Friday in the clean room.  I removed 
XTC 42 from TDC 295 in order to place it in the stereo slot in 
b0cot07.  I also noted this in the TDC log book.
<!-- Author: Kirby -->


<!-- Date: Sun Sep 3 17:37:01 2000 -->
I was working on loading TDC 295 into b0cot07 slot 16.  the first the I tried was to reload the FRAM from the hdwdb.  The FRAM loading correctly and I confirmed this manually with VISIONdemo.  I then tried to test the crate in the DAQ system and wasn't receiving valid headers from slot 16.  (the ModID should be 424, and it was reporting 423)  I then went and reread the ModID using tdctstand, and sure enough the ModID was reading as 423.  I then loaded slot 16 a second time, and again it seemed to be loaded correctly.  I then looked at slot 17 to see what was loaded in that TDC.  This is where things get weird.  I read the two registers that contain the ModID (24fed48 & 24fed4c) and got the values 0xFFFFFF01 & 0xFFFFFFA0 respectively.  (this is an incorrect value)  I then immediately reread the values (in other words, just hit enter again using VISIONdemo) and this time got the values 0xFFFFFF01 & 0xFFFFFFA7 (the correct values)  Next, I decided to recheck slot 16, and it now gave BUS errors while trying to read.  So, in summary, the values read from the FRAM appear to change.  I don't understand this, but it appears to be centered around slot 16.
<!-- Author: Kirby -->


<!-- Date: Wed Sep 6 10:26:05 2000 -->
<pre>Seven TDCs were returned to PREP this morning: 
 
 304: always have "local TDC done not set or FIFO empty" error 
 
 277: same as 304 plus sometime also have VME crate map failure 
  
 521: buffer chips p2,pQ6 belown while in pit crate (with diode board attached) 
  
 175: "local TDC done" error. Front pannel done light is always   off. It was found having difficult for FRAM reporgaming in slot 8 of b0cot17. 
 
 544: This TDC was found to cause programs in crate readout. It put the crate in a strange state that attempts to readout crate in RC  result in non-sequential event IDs. See Bill's sept 1 post  
for more detail. 
 
 203: The TDC was found to have problem to repond to RC in slot 9 of b0cot17. It responds when slot 8 is addressed. See Bill's sept 1 post for more detail.  
 
 158: crate map failure. 
 
			9-6-2000 
 </pre>
<!-- Author: Ting Miao -->


<!-- Date: Wed Sep 6 10:42:31 2000 -->
<pre>We made TDC and XTC entries for top wedge crates b0cot02,03,12 and 13 in CDF module DB: open "http://miscomp.fnal.gov/cdfdb/", goto "Reports by Using MISWEB", then fill in "%DT96TDC-LVDS%" or "%XTC%"in the field "Module" in "Filled Positions with History".  
  
  One thing missing is the entries of the CPU names (b0cot02...) in the crates (named as CONWT-1 in the DB). We are working on that.   
 
		9-6-2000</pre>
<!-- Author: Ting Miao -->


<!-- Date: Mon Sep 11 11:25:55 2000 -->
<pre>The power for endwall crate is still off and the I&I crew is  
still blocking us out on the north side.  We installed 5 TDCs  into empty slots on the south side of the detctor: slot 20/21 of b0cot03, slot 7/8 of b0cot17 and slot 16 of b0cot07.   Also we  
started to fill dummy boards for permanently empty slots on the  
south side. </pre>
<!-- Author: Ting Miao  -->


<!-- Date: Tue Sep 12 11:03:57 2000 -->
Folling 5 TDCs were found with module ID problems in crate 3,7, and 18. The module ID kept changing in these crates. We attempt to repeat the problem in cleanroom crate but without sucess. We installed them in to crate 6,16,9,19.  The TDCs are: 309,298 (was in slot 4 and 5 in b0cot18), 281,161 (was in slot 20 and 21 in b0cot03), and 295 (was in slot 16 of b0cot07). 
<!-- Author: Ting Miao -->


<!-- Date: Tue Sep 12 11:07:24 2000 -->
Installed one TDC in slot 8 of b0cot02. 
 
 Installed 16 TDCs in b0cot01 -- full set. Also connected flat cables. Found the twinax cable on b0cot01 is missing. 
<!-- Author: Ting Miao -->


<!-- Date: Tue Sep 12 12:46:58 2000 -->
<pre> Installed 6 TDCs into b0cot12, slot 4-8 and slot 19.  
 
 Installed 15 TDCs into b0cot11, slot 4-18. 
 
 All flat cables were also connected.   
 
 We have 11 TDCs left in cleanroom and will install them into  
 axial slot of crate 6 and 16 this afternoon.  
 
 We will also install dummy boards for the finished crates. </pre>
<!-- Author: Ting Miao -->


<!-- Date: Tue Sep 12 16:05:55 2000 -->
<pre> Installed 2 TDCs into slot 4 and 5 of b0cot18.  
 
 Installed 4 more to axial slot of b0cot16 so it has now all  
axial slots filled (5-8,12-18).  
 
 Installed 5 more into b0cot06 so it has axial slots 6-8 and  
12-14 filled. It needs 2 more TDCs to finish axial slots.   
 
 Two flat cables for b0cot16 (slot 6, and 15) are too short to  
going through the cable guards.  We by passed the cable guards 
for these two slots.  
  
 So far we have 92 TDCS in top half of the detector, and 85 TDCs  
in bottom half of the detector. We need 32 to finish all bottom  
axial layer slots.  
 
  
 </pre>
<!-- Author: Ting  -->


<!-- Date: Wed Sep 13 14:40:15 2000 -->
<pre>Attempted to reprogram the TDC in the 8 wedge crates. FRAM 1 
had to be reprogrammed for all the TDC's because we wanted to 
write the XTC constants to the board - previously this was 
not possible, since the constants were not in the hardware 
database. Of course, for the TDC's Ting just installed we 
would have had to reprogram FRAM 1 anyway, to get the  
correct module ID. Here is a summary  of the work: 
 
   b0cot02: OK, slots 2-16 programmed 
 
   b0cot03: Crate turned off 
 
   b0cot12: Ok, slots 4-19 programmed 
 
   b0cot13: Ok, slot 5-19 programmed 
 
   b0cot07: Slot 14 came up empty in VISIONdemo. Did a crate 
            reset, was able to see slot 14. But when I started 
            trying to program the boards, I was not able to  
            see slots 7 and 11. Attempting to map this in 
            VISIONdemo confirmed the problem. 
            summary: slots 6-21 programmed, excluding 7 and 11 
 
   b0cot08: Slot 8 empty in VISIONdemo. Slot 10 shows the module 
            ID problem, and responds to commands addressed to  
            slot 11. 
            summary: slots 2-17 programmed, excluding 8 and 10 
 
   b0cot17: Cant program slot 8. Need to check for 12V switch 
            being ON, but note that we have seen similar problems 
            with other TDC's in this slot before (where the  
            12 V switch was in fact on).  
            summary: slots 4-19 programmed, excluding 8 
 
   b0cot18: Slot 9 empty in VISIONdemo. 
            summary: slots 4-20 programmed, excluding 9 
 
 
Note that the crates that are having problems (7/8/17/18) are 
all bottom crates with the old (i.e. small via) TDC's. 
 
 
          </pre>
<!-- Author: Bill Orejudos -->


<!-- Date: Thu Sep 14 12:49:26 2000 -->
<pre>Activities to fix bottom crates in yesterday afernoon: 
 
 1. Take TDCs in slot 7 and 11 in b0cit07 out and replaced with 
 500 series TDCs.  
 
 2. Take TDC in slot 8 and 10 in b0cot08 out and replaced with 
 500 series TDCs.  
 
 3.Checked switches for +12V on TDC in slot 8 and found they are 
 off. Swithed back on. But still have proble with module ID 
 programming. Will be replaced.  
  Meanwhile found TDC in slot 5 not working and replaced it with  
500 series TDCs.  
 
 4. Replaced TDC in slot 9 of b0cot18 with 500 series TDCs.  
 
 Above 5 TDCs taken out from bottom crates are tested in 
 cleanroom crates and they are fine. We will install them in  
 to crate 9/19/6/16. 
 </pre>
<!-- Author: Ting -->


<!-- Date: Thu Sep 14 15:09:00 2000 -->
<pre>Replaced TDC in slot 8 of b0cot17 with 500 series one.  
 
Filled TDC into b0cot17 slot 3 which we mistakenly skipped.  
 
Replaced TDC in slot 7 of b0cot07 with a new 500 series one.  
</pre>
<!-- Author: Ting -->


<!-- Date: Thu Sep 14 17:04:34 2000 -->
<pre> 
 Replaced TDCs in slot 5 and 9 in b0cot17 with 500 series TDCs.  
 
 Replaced TDC in slot 14 of b0cot07 with 500 series TDC.  
 
 Replaced in slot 9,10,11,16,17,19 in b0cot03 with 500 series TDCs. 
 
 Have to wait for someone help on reaching b0cot01,11.  
 
</pre>
<!-- Author: Ting -->


<!-- Date: Fri Sep 15 02:08:36 2000 -->
<pre>All TDC's in b0cot02,03,12,13,07,08,13 are now programmed with 
the correct module ID and are completely filled. This crates 
have also run successfully in run control. Note that we still 
often have problems with the crate mapping - a slot with a  
TDC will come up as empty. This is true for the new (500 series) 
TDC's as well as the old TDC's. Issuing a crate reset often  
solves the problem - my low statistics feeling is that the reset 
works more often for the crates with new TDC's than for crates 
with old TDC's. </pre>
<!-- Author: Bill Orejudos -->


<!-- Date: Fri Sep 15 11:19:09 2000 -->
<pre> 
 Replced all axial slots in b0cot17 with 500 series TDCs.  
 
 Replaced slot 9 of b0cot01, slot 5 and 9 of b0cot11.  
 
</pre>
<!-- Author: Ting  -->


<!-- Date: Sat Sep 16 18:09:40 2000 -->
<pre>Tried to get COT crates ready before closing on sunday. Final 
tally: 
 
 
   b0cot01: 2-17  (full crate) 
   b0cot02: 2-16  (full crate) 
   b0cot03: 7-21  , missing 16 
   b0cot12: 4-18  , missing 19 
   b0cot13: 5-19  (full crate) 
   b0cot07: 6-21  , missing 8, 16 
   b0cot08: 2-17  (full crate) 
   b0cot17: 3-19  , missing 8 
   b0cot18: 4-19 , missing 9, 20 
 
For b0cot13, I had to reseat the DAC its adapter. After that 
all the problems we saw with that crate went away. 
 
For b0cot17, slot 8 itself seems bad. I wasn't able to talk 
to the TDC in slot 8 (a new TDC). When I moved this TDC to  
slot 13 (to replace a bad TDC) I had no further problems. We 
need someone to look at slot 8... 
 
 For the other 5 crates I attempted to use: 
 
  b0cot11: crate map problems, couldn't fix even by pulling  
           cards.  
 
  b0cot06: Can talk to, no problem, but get "No new event" in 
           run control. 
 
  b0cot16: same as b0cot06 
 
  b0cot19: crate map problems 
 
  b0cot09: Can talk to, no problem, but get "Event ID not  
           sequential" in run control. 
 
If anyone comes in before 3 PM on sunday, I would suggest 
trying to work with crates 11, 6, and 16 to see if we can 
get them working.</pre>
<!-- Author: Bill Orejudos -->


<!-- Date: Sun Sep 17 15:39:21 2000 -->
I looked at b0cot06 and it seemed to work with both the DAQ and TrackTest.  All of the cards passed TrackTest except for Card 171 in slot 14.  It had 20 extra hits on channel 16, in the timing window around 1400 ns.  But I think that the crate is fine.  No explanation as to how I got it to work.  just the Midas touch I guess.
<!-- Author: Kirby -->
<!-- Comment: Sun Sep 17 16;13;55 comment by...Kirby -->
also, looked at b0cot16 and it appears to have done timeout problems using both the DAQ and TrackTest.  it never gets passed the first event.  This is something I don't understand.  possibly the done bit is stuck on one, or maybe the TS signals aren't getting there.  I don't know.


<!-- Date: Mon Sep 18 07:03:30 2000 -->
<pre>XTC->Finder Capture Test   18-SEP-2000   JRD 
-------------------------------------------- 
 
This morning I ran the XTC to Finder capture test on the COT TDC 
crates listed below.  The test could not be performed for some 
slots because (a) the TDC is missing, (b) the TDC is presumably 
present but hung, or (c) the XTC is missing.  All other slots pass 
a full test of 100 or more events.    
 
CONWT-1 b0cot02 Slots: 8,9,10,11,15,16                  Full Test 200/10 Pass.   
COSWT-1 b0cot03 Slots: 7,8,12,13,14,15                  Full Test 100/10 Pass.  
CONET-1 b0cot12 Slots: [4],5,[6],7,[8],14,15,16         Full Test 100/10 Pass.  
COSET-1 b0cot13 Slots: 7,8,9,15,16,17,18,19             Full Test 100/10 Pass.  
COSWB-2 b0cot07 Slots: 6,7,11,12,13,[14],15             Full Test 100/10 Pass.  
CONWB-2 b0cot08 Slots: 8,9,10,11,12,16,17               Full Test 100/10 Pass.  
COSEB-2 b0cot17 Slots: 5,6,[7],(8),14,[15],16,17,18,19  Full Test 300/10 Pass.  
CONEB-2 b0cot18 Slots: 4*,5*,6,7,8,(9),15,16,17,18      Full Test 100/10 Pass.  
 
Key:  () missing TDC, slot untested 
      [] TDC doesn't appear in crate map, slot untested 
       * missing XTC, slot untested 
</pre>
<!-- Author: Jay Dittmann -->


<!-- Date: Mon Sep 18 07:39:10 2000 -->
<pre>The problems that the shift crew is having with b0cot07, 12, 
and 17 are presumably due to the boards that are not mapping 
(see log entry above).  I used VISIONdemo to issue a bus 
reset on these three crates, and now those boards 
map again.  But is this fix enough, or will the crates need 
to be power cycled??</pre>
<!-- Author: Jay Dittmann -->


<!-- Date: Mon Sep 18 11:02:45 2000 -->
<pre>We had a meeting this morning to decide what to do with the 
COT crates. Present, Young-Kee Kim, Peter Wilson, Frank Chlebana, 
Jim Patrick, Bill Orejudos. The basic problem we are seeing 
is that for some crates, the VME interface for a given TDC 
latches up. When this happens, we can't access the TDC in 
mark it offline, which means that globalTDCdone will  
not work. Some points: 
 
 
   1)  From my list of 9 crates (see entry from saturday, 17 
       Sept.) 4 crates show this problem: 01,12,07,17. 07 and 
       17 have many of the old TDC's installed, but 01 and 12 
       have mostly new TDC's (they may in fact be completely 
       full of new TDC's; I need to check with Ting).  
 
   2) This latch-up problem can and does occur in the middle 
      of a run. In other words, a crate can come up ok  
      after power up, initialize ok, get many events in 
      run control, and then see this problem. After the 
      problem occurs, the slot maps as "EMPTY" in  
      VISIONdemo. 
 
   3) We can get the crate to map ok by using SYSRESET. However, 
      trying to run will again lead to the errors reported in 
      point 2. 
 
    4) For a given crate, the problem occurs in the same slots. 
       However, the problem slots differ from crate to crate. 
 
Here is the plan for dealing with this: 
 
    1) Frank, Jim and Arnd will modify the readout code to try  
       to use the localDone again. This needs to be done in such 
       a way to prevent conflicts between polling the TDC  
       status register and the DSP operations. 
 
    2) If necessary, when we get access (1-2 wks?) we can pull 
       boards (so we can use globalDone again). 
 
    3) We will take over one of the muon crates, fill them with 
       TDC's as they come in, and then exercise the hell out 
       of it in run control. Hopefully this will teach us more 
       about the latch up problem. 
 
 
                                  Comments?</pre>
<!-- Author: Bill Orejudos -->
<!-- Comment: Mon Sep 18 15;41;30 comment by...Ting -->
For the latch problem. It could  also be crate/slot  specific. My understanding is that we never did extensive VME readout  test for each slot in each pit crate before plugging TDCs.  During 
access time, we should ask Fred Lewis' people to check the pins 
for problematic slots. We can also try to read a good TDC in the problematic slot to isolate the problem.  
  
<!-- Date: Mon Sep 18 15:22:50 2000 -->
<pre> Following 10 TDCs will be returned to PREP for fix. 
 
 TDC 577, 183, 640,180,272,587,197,333 --VME map/open errors and 
 attempting to reprogram DSP did not help.  
 
  TDC 585  had buffer chips blown. Rvcc=1.6. It was in crate 01 
 where all 500 TDCs installed and all of them have pair of   
 pull-up resistors added.  They were installed last Tuesday  
 before endwall power was on.   We found the TDC not working on 
 Wednesday. 
 
  TDC 646 has sometimes VME open error. When it talks to VME, it 
also has "done bit not set" error.  
  </pre>
<!-- Author: Ting -->



<!-- Date: Tue Sep 19 14:50:56 2000 -->
<pre>Ron Moore and I have been investigating a problem in which 
the SELECT bit in the TDC control register would switch from 
0 (data are input from calibration cell) to 1 (data are 
input from front panel) at unexpected times.  This phenomenon 
started appearing in an XFT test in which we send simulated 
data from TDC/XTC boards on the detector to Finder boards in the 
first floor counting room.  This bit switch seemed to occur in 
many boards in various crates, but it was inconsistent and 
hard to reproduce. 
 
Ron checked the DSP v29 code, and found that the DSP may 
be setting the select bit in response to RECOVER.  After some 
investigating, it is not clear why the bit switch doesn't 
occur all the time, only sometimes!  Ron created a new 
version of DSP code (v30a) which should not set the select 
bit in response to RECOVER.  We reprogrammed FRAM 0 in 
6 TDCs (bocot02: 8,9,10,11,15,16) to test the new code. 
There was no bit flipping in 5 of the 6 boards (all but 
slot 8).  The TDC in Slot 8 was peculiar -- sometimes the 
bit flipped and sometimes it didn't, but there were also 
various VME bus errors.  In fact, yesterday there were times in which 
the board did not show up in the crate map.  So, it is 
likely that today's tests of the new DSP code were complicated 
by VME interface problems associated with the TDC in Slot 8. 
 
</pre>
<!-- Author: Jay Dittmann -->


<!-- Date: Tue Sep 19 15:31:39 2000 -->
<pre>Regarding Jay's mention of modified DSP code...yes, during RECOVER, DSP V29 (the current version) explicitly configures 
the TDC to expect front panel data.  Given what the XFT tests need, this is not the right thing to do.   In the latest development DSP code, a RECOVER will not change which data 
source the TDC is expecting.  I will create a new frozen version tonight or tomorrow.  I will email TDC users when that new code is available for reprogramming TDC FRAM 0.</pre>
<!-- Author: Ron Moore -->


<!-- Date: Thu Sep 21 18:47:12 2000 -->
<pre>Ran successfully with b0cot11 and b0cot19. For b0cot19, 
I used the local mode and readout slots 6-11. I am not sure 
what TDC's are physically present, but I at least know that 
there are TDC's in slots 5 and 15 that have crate map problems. 
For b0cot11, slot 11 doesn't map. I think it is physically 
present, but for some reason I was still able to use the 
global done method. 
 
Here is the list of crates with TDC's we have read out: 
 
   b0cot01 slots 2,4,6,7,10,11,13,14,17  (9 TDC's)  
   b0cot02 slots 2-16   (15 TDC's) 
   b0cot03 slots 7-15, 18-21  (14 TDC's) 
   b0cot06 slots 8, 12-16     (6 TDC's) 
   b0cot07 slots 6-7, 9-13, 15, 17-21 (13 TDC's) 
   b0cot08 slots 2-17  (16 TDC's)  
   b0cot11 slots 4-6, 8-18 (14 TDC's)  
   b0cot12 slots 5, 7-18 (13 TDC's) 
   b0cot13 slots 5-19, (15 TDC's) 
   b0cot17 slots 3-6, 9-14, 16-19 (14 TDC) 
   b0cot18 slots 4-8, 10-19 (15 TDC's) 
   b0cot19 slots 6-11 (6 TDC's) 
 
This comes to a total of 126 TDC's 
 
From the above list, we had to use localDone on crates  
1,7,12,17, and 19</pre>
<!-- Author: Bill Orejudos -->


<!-- Date: Thu Sep 21 18:49:41 2000 -->
<pre>I just spoke with Peter Wilson and Myron. During the next access 
modifications will be made to clean up the clock signal.  
These modifications will first be made on b0cot01, since that 
is a crate we have had a lot of problems with. We will first 
see if the modifications improve the situation before deciding 
to pull boards from this crate.</pre>
<!-- Author: Bill Orejudos -->


<!-- Date: Fri Sep 22 16:01:25 2000 -->
<pre>Using the information in DBANA and run 1, ver 60 that Bill took 
9/21/2000 1700, I made a list of unresponsive channels that are 
clustered in groups of 12 or 24 (i.e. either a whole cell or an 
entire flat cable)  Here is the list: 
 
 
Crate	Slot	Cable	Cell (0 or 1) 
-----	----	-----	------------- 
3	13	3	1 
3	7	1	0 
2	5	0	0 
1	2	0	0 
1	6	1	0 
1	7	0	0+1 
1	7	2	0+1 
1	14	1	0+1 
7	11	0	0 
7	11	2	0+1 
7	17	1	0+1 
8	4	1	0+1 
8	4	3	0+1 
8	6	all	all 
8	17	3	0 
11	4	2	0+1 
11	8	2	0+1 
11	9	3	0+1 
11	10	0	0+1 
11	14	0	0+1 
11	15	3	0+1 
12	14	3	0+1 
12	18	0	0+1 
 
There were also several TDCs that appeared bad in the run, but 
those are not listed here.  I was only trying to list problems 
potentially associated with cables.</pre>
<!-- Author: Mike Kirby -->


<!-- Date: Fri Sep 22 17:29:21 2000 -->
<pre>Peter Wilson and roberto did the backplane modifications on 
b0cot17, since b0cot01 was too difficult to reach. After 
the mods the TRACER passed all of our backplane tests. 
Peter and Roberto also installed a new TDC into slot 8 
of b0cot17. However, I *still* could not reprogram the 
module ID. This is the 4th TDC in this slot that shows this 
problem, so clearly something funny is still happening with 
this slot. I then tried running with Run Control, excluding 
slot 8 from the bankSet and using localDone. I kept getting 
the following right away: 
 
   
1 crate/s: b0cot17(65), Done TO.RXPT problems, BUSY TO registers: 
           ffffffff-ffffffff-fffffffd-ffffffff-ffffffff,  
           CSR:-5f7b7be6,[RXPT] 
 
Comments? Looks like something funny with the TRACER/TS link, 
right?</pre>
<!-- Author: Bill Orejudos -->


<!-- Date: Fri Sep 22 17:56:00 2000 -->
<pre>I tried reprogramming the new TDC's in b0cot06 - recall 
that slots 17-21 were filled with TDC's. However, upon 
mapping the crate with VISIONdemo, I got: 
 
geo32:/slot=1    |  (EMPTY) 
geo32:/slot=2    |  (EMPTY) 
geo32:/slot=3    |  (EMPTY) 
geo32:/slot=4    |  (EMPTY) 
geo32:/slot=5    |  (EMPTY) 
geo32:/slot=6    |  (EMPTY) 
geo32:/slot=7    |  (EMPTY) 
geo32:/slot=8    |  0x60000000 
geo32:/slot=9    |  0x60000000 
geo32:/slot=10   |  0x60000000 
geo32:/slot=11   |  0x60000000 
geo32:/slot=12   |  (EMPTY) 
geo32:/slot=13   |  (EMPTY) 
geo32:/slot=14   |  (EMPTY) 
geo32:/slot=15   |  (EMPTY) 
geo32:/slot=16   |  (EMPTY) 
geo32:/slot=17   |  (EMPTY) 
geo32:/slot=18   |  (EMPTY) 
geo32:/slot=19   |  (EMPTY) 
geo32:/slot=20   |  0x60000000 
geo32:/slot=21   |  (EMPTY) 
 
I issued a crate reset, but the mapping remained the same.  
 
After this, I moved onto b0cot18, which had TDC's (w/ mezzanine 
cards) installed into slots 4 and 5. I could reprogram slot 
4, but wasn't able to do slot 5. A crate mapping revealed 
that I could no longer see the board in slot 5. Note that I  
had been able to see this board when I did the mapping before 
attempting the reprogramming. 
 
I am removing b0cot06, b0cot18, and b0cot17 from the list  
of crates that should be tried by the shift crew.</pre>
<!-- Author: Bill Orejudos -->
<!-- Comment: Mon Sep 25 10;06;20 comment by...Ting  -->
Crate b0cot06 got VME latch-up (freezed up). This crate and crate 16 had been freezed up sept 15 and I managed to fix them by moving TRACERs around.  We need swap a new TRACER in and 
probably have to swap TDCs around to fix the crate this time. 

<!-- Date: Fri Sep 22 18:09:18 2000 -->
<!doctype html public "-//w3c//dtd html 4.0 transitional//en"> 
<html> 
<head> 
   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1"> 
   <meta name="GENERATOR" content="Mozilla/4.7 [en] (X11; I; Linux 2.2.16-3 i686) [Netscape]"> 
</head> 
<body> 
Under controlled access made the following changes/installations in COT&nbsp;crates. 
<p><b>COT17</b>: 
<ul> 
<li> 
Modified CDF_CLK termination (see General Log book)</li> 
 
<li> 
Installed TDC #683 in slot 8</li> 
</ul> 
<b>COT09:</b> 
<ul> 
<li> 
Removed TDC&nbsp;from slot 7 (returned to clean room)</li> 
</ul> 
<b>COT06 installed TDC in the floowing slots:</b> 
<ul> 
<li> 
<b>#</b>652 in slot 17</li> 
 
<li> 
#674 in slot 18</li> 
 
<li> 
#582 in slot 19</li> 
 
<li> 
#675 in slot 20</li> 
 
<li> 
#658 in slot 21</li> 
</ul> 
<b>COT18 swapped TDCs in the following slots to get XTC cards installed:</b> 
<ul> 
<li> 
#666 in slot 4</li> 
 
<li> 
#680 in slot 5</li> 
 
<li> 
Found that TDCs in slots 9&amp;20 were not inserted into backplane.&nbsp; 
These were left alone.</li> 
</ul> 
<b>Installed or reconnected calibration fanout Twinax cables to:</b> 
<ul> 
<li> 
<b>COT06</b></li> 
 
<li> 
<b>COT16</b></li> 
</ul> 
 
<br>&nbsp; 
</body> 
</html>
<!-- Author: Peter Wilson -->


<!-- Date: Fri Sep 22 22:15:30 2000 -->
<pre>More comments relevant for the work done on the controlled 
access. I tried b0cot09 (with the TDC removed from slot 7), 
but I still saw the "Event ID not sequential" error. I also 
added b0cot18 back to the list of crates to be tried by the 
shift crew after removing a couple TDC's (slots 5 and 7) from 
the bankSet and switching the crateSet to localDone readout 
mode. </pre>
<!-- Author: Bill Orejudos -->



<!-- Date: Mon Sep 25 13:10:27 2000 -->
<pre>          COT TDC problems and planned actions 
          ==================================== 
  		 
(1)10 COT Crates, 1,2,3,6,7,8,12,13,17&18, are in DAQ running.  
 
    Crate 11 and 19 had been reported having crate map problem but they  
    are fine now -- we should try to include them.  
    Crate 9 have "Event ID not sequential" and need fix.  
    Crate 16 only known had  error "No new event" in RC before.    
 
   9-21: b0cot11 and b0cot19 were added to DAQ run list.  
 
 (2)VME readout problem "Event ID not sequential" in b0cot09 
 
  I digged more in E-log and found TDC #281 had module ID changing 
  problem in b0cot03 before. Will try to take it out and run DAQ again? 
 
   9-22:  TDC #281 removed but still have the "Event ID not sequential"  
           error. Need to replace the TRACER next time 
 
  
 (3)TDC crate map (latch-up) 
 
  b0cot01: slot 3,5,8,9,12,15,16 
  b0cot12: slot 6, 19 (empty?) 
  b0cot07: slot 8,14,16 (8 and 16 empty) 
  b0cot17: slot 7,8,15 
 
  Will move them (15 total )to hadron TDC crate in 1st floor and fill  
  the slots with arriving TDCs. 
  
  9-22: Modified backplane to get better CDF clock quality. But cables  
        in Tracer possibily screwed up and received error: 
	"b0cot17(65), Done TO.RXPT problems, BUSY TO registers..." 
    
  9-22: slot 8 of b0cot17 was filled with a new TDC and again failed   
	module ID programming for 4th time. The slot need to be closely 
	examined (by Fred Lewis' people).  
 
  9-25: will fill 17 new TDCs into hadron TDC crate this afternoon.  
  
	 
 (4)dead TDC or empty slots 
 
  b0cot03: slot 16, b0cot11: slot 7, b0cot18: slot 9,20. 
  Will fill them with arriving TDCs. 
 
 (5)additions to axial slots of remaining bottom crates 
 
  b0cot06: slot 6, 7, b0cot16: slot 15, b0cot19: slot 15,16,17,18. 
  Will fill them from leftovers. 
 
  9-22:  Added more TDC to slot 17,18,19,20&21. But the crate got  
	 freezeup. Will try to fix it by replacing TRACER next time. 
	 
 (6)Missing XTC cards in b0cot18: slot 4 and 5 
 
  9-22:  Replaced TDC in slot 4 and 5. But new TDC dead  in slot 5. 
</pre>
<!-- Author: Ting Miao -->


<!-- Date: Mon Sep 25 16:22:38 2000 -->
<pre> In order to study the "TDC Non-reponsive" problem, 17 TDCs were 
 installed in hadron TDC crate: b0htdc00 (hadron_timing_00): 
 
 In Slot4   IDPROM = 0207 009 MICHIGAN TDC LVDS Rev D 
 In Slot5   IDPROM = 0671 009 MICHIGAN TDC LVDS Rev D 
 In Slot6   IDPROM = 0595 009 MICHIGAN TDC LVDS Rev D 
 In Slot7   IDPROM = 0669 009 MICHIGAN TDC LVDS Rev D 
 In Slot8   IDPROM = 0664 009 MICHIGAN TDC LVDS Rev D 
 In Slot9   IDPROM = 0618 009 MICHIGAN TDC LVDS Rev D 
 In Slot10   IDPROM = 0672 009 MICHIGAN TDC LVDS Rev D 
 In Slot11   IDPROM = 0625 009 MICHIGAN TDC LVDS Rev D 
 In Slot12   IDPROM = 0631 009 MICHIGAN TDC LVDS Rev D 
 In Slot13   IDPROM = 0685 009 MICHIGAN TDC LVDS Rev D 
 In Slot14   IDPROM = 0295 009 MICHIGAN TDC LVDS Rev D 
 In Slot15   IDPROM = 0356 009 MICHIGAN TDC LVDS Rev D 
 In Slot16   IDPROM = 0301 009 MICHIGAN TDC LVDS Rev D 
 In Slot17   IDPROM = 0624 009 MICHIGAN TDC LVDS Rev D 
 In Slot18   IDPROM = 0206 009 MICHIGAN TDC LVDS Rev D 
 In Slot19   IDPROM = 0281 009 MICHIGAN TDC LVDS Rev D 
 In Slot20   IDPROM = 0622 009 MICHIGAN TDC LVDS Rev D 
 
 TDC in slot 4 was installed before by Eric James and have 4 
 cables connected to the front input panel.  There is no  
 cable to other TDCs. We can install a 1:3 fanout module and  
 twinax cable if needed.  
 
				 
 
 
 </pre>
<!-- Author: Ting Miao -->


<!-- Date: Tue Sep 26 10:18:31 2000 -->
<pre> The 17 TDCs in b0htdc00 were reprogrammed in FRAM-1 and the  
module IDs are the same as the slot number. During the  
programming, I already encounted the "VME non-response" case in  
slot 8 -- it sent out BUS error complain and was a no shown in  
mapping during the FRAM1 downloading. I did recover it by bus  
restting. The TDC is  the latest batch from Michigan (#664). </pre>
<!-- Author: Ting Miao -->


<!-- Date: Wed Sep 27 18:01:12 2000 -->
<pre>For the record: 
 
I just did a couple of tests with our favourite problem-crate, b0cot01, and 
I think I found a pattern which will help to fix the problem (and also 
have some impact on what we do tomorrow...). For those not familiar with 
it: b0cot01 is the crate where the "VME non-accessability"-problem seemed 
to occur most, i.e. TDC(s) would during a DAQ run suddenly no longer be 
accessible through VME. 
 
- So I started runs with b0cot01 and a fast calibration trigger, and for 
  2.5 Million triggers at 1.5 kHz readout rate I saw not a single problem. 
  This is very different from earlier observations, where TDCs disappeared 
  all the time all over the place. 
- Then I opened another partition with b0cot02, in order to play with the 
  DAC voltages. When setting the voltages to 0, almost immediately 
  a TDC in b0cot01 would stop being accessible through VME. 
- I left the DAC settings on 0, and excluded TDC after TDC after TDC ..., 
  as they disappeared from the crate map one after the other. After 
  "killing" slots 5, 6, 15, 9, 12 that way, I was convinced that I could 
  make almost all TDC's hang that way. 
- So I changed back to "normal" DAC voltages (0,500,2000,2000,...), did 
  NOT reset the crate, and continued running - no more TDCs gave problems. 
- After a SYSRESET, all TDCs (slots 2-16) are fine again, and again no 
  errors for > 2 Mio. events, at which point I stopped. 
 
My conclusion is, that the "TDC disappearance" occurs when the TDC is 
blasted with enormous amounts of noise (with  voltages set to "0", the 
readout rate drops to below 100 Hz, and the DSP code takes more than 
5ms/event to execute ... I don't know how this translates to number of 
hits/channel, but it must be huge). 
 
It would be nice if somebody else could confirm this observation with 
other crate(s). 
 
The above would also explain why there are no problems whatsoever in 
the Hadron TDC crate (and probably the fact that the problem started to 
appear after the roll-in, with a different noise situation). 
 
In an ideal world, run control should take care that when a crate 
is booked, the crate with the corresponding DAC is also included 
(Bill?). Also, maybe there is a possible fix on the TDC board, if it's 
e.g. the DSP code (which is anyway always blamed for everything ...). 
 
</pre>
<!-- Author: Arnd -->


<!-- Date: Fri Sep 29 10:17:45 2000 -->
We accomplished a lot during yesterday's access.  Congrats 
to all!<br><br>  I'm sure people are still in the process of compiling 
a complete list of board swaps, etc.  I made up the following report which I hope will help.  This is a current snapshot of 
the COT crate status.<br><br> 
 
<pre> 
  Key: 
 
    A=axial, S=stereo  TDC slots 
 
    (empty) means either there is no board in the slot, or 
     a board is inserted but does not respond to VME reads of 
     the ID PROM addresses. 
 
    (not available) means the crate does not ping (it is 
     probably powered off) 
</pre> 
 
<pre> 
[b0cot00]  CONWT-3 
 b0cot00  2 S    (not available) 
 b0cot00  3 S    (not available) 
 b0cot00  4 S    (not available) 
 b0cot00  5 A    (not available) 
 b0cot00  6 A    (not available) 
 b0cot00  7 A    (not available) 
 b0cot00  8 A    (not available) 
 b0cot00  9 A    (not available) 
 b0cot00 10 A    (not available) 
 b0cot00 11 S    (not available) 
 b0cot00 12 S    (not available) 
 b0cot00 13 S    (not available) 
 b0cot00 14 A    (not available) 
 b0cot00 15 A    (not available) 
 b0cot00 16 A    (not available) 
 b0cot00 17      (not available) 
 b0cot00 18      (not available) 
 b0cot00 19      (not available) 
 b0cot00 20      (not available) 
 b0cot00 21      (not available) 
[b0cot01]  CONWT-2 
 b0cot01  2 S    IDPROM = 0586 009 MICHIGAN TDC LVDS Rev D 
 b0cot01  3 S    IDPROM = 0581 009 MICHIGAN TDC LVDS Rev D 
 b0cot01  4 S    IDPROM = 0500 009 MICHIGAN TDC LVDS Rev D 
 b0cot01  5 S    IDPROM = 0549 009 MICHIGAN TDC LVDS Rev D 
 b0cot01  6 S    IDPROM = 0590 009 MICHIGAN TDC LVDS Rev D 
 b0cot01  7 S    IDPROM = 0572 009 MICHIGAN TDC LVDS Rev D 
 b0cot01  8 S    IDPROM = 0583 009 MICHIGAN TDC LVDS Rev D 
 b0cot01  9 A    IDPROM = 0621 009 MICHIGAN TDC LVDS Rev D 
 b0cot01 10 A    IDPROM = 0604 009 MICHIGAN TDC LVDS Rev D 
 b0cot01 11 A    IDPROM = 0533 009 MICHIGAN TDC LVDS Rev D 
 b0cot01 12 A    IDPROM = 0580 009 MICHIGAN TDC LVDS Rev D 
 b0cot01 13 S    IDPROM = 0550 009 MICHIGAN TDC LVDS Rev D 
 b0cot01 14 S    IDPROM = 0270 009 MICHIGAN TDC LVDS Rev D 
 b0cot01 15 S    IDPROM = 0562 009 MICHIGAN TDC LVDS Rev D 
 b0cot01 16 A    IDPROM = 0593 009 MICHIGAN TDC LVDS Rev D 
 b0cot01 17 A    IDPROM = 0620 009 MICHIGAN TDC LVDS Rev D 
 b0cot01 18      (empty) 
 b0cot01 19      (empty) 
 b0cot01 20      (empty) 
 b0cot01 21      IDPROM = 0145 001 TRACER__V2.1A           
[b0cot02]  CONWT-1 
 b0cot02  2 S    IDPROM = 0505 009 MICHIGAN TDC LVDS Rev D 
 b0cot02  3 S    IDPROM = 0518 009 MICHIGAN TDC LVDS Rev D 
 b0cot02  4 S    IDPROM = 0510 009 MICHIGAN TDC LVDS Rev D 
 b0cot02  5 S    IDPROM = 0515 009 MICHIGAN TDC LVDS Rev D 
 b0cot02  6 S    IDPROM = 0513 009 MICHIGAN TDC LVDS Rev D 
 b0cot02  7 S    IDPROM = 0517 009 MICHIGAN TDC LVDS Rev D 
 b0cot02  8 A    IDPROM = 0582 009 MICHIGAN TDC LVDS Rev D 
 b0cot02  9 A    IDPROM = 0541 009 MICHIGAN TDC LVDS Rev D 
 b0cot02 10 A    IDPROM = 0507 009 MICHIGAN TDC LVDS Rev D 
 b0cot02 11 A    IDPROM = 0528 009 MICHIGAN TDC LVDS Rev D 
 b0cot02 12 S    IDPROM = 0547 009 MICHIGAN TDC LVDS Rev D 
 b0cot02 13 S    IDPROM = 0530 009 MICHIGAN TDC LVDS Rev D 
 b0cot02 14 S    IDPROM = 0506 009 MICHIGAN TDC LVDS Rev D 
 b0cot02 15 A    IDPROM = 0504 009 MICHIGAN TDC LVDS Rev D 
 b0cot02 16 A    IDPROM = 0502 009 MICHIGAN TDC LVDS Rev D 
 b0cot02 17      (empty) 
 b0cot02 18      (empty) 
 b0cot02 19      (empty) 
 b0cot02 20      (empty) 
 b0cot02 21      IDPROM = 0064 001 TRACER__V2.1A           
[b0cot03]  COSWT-1 
 b0cot03  2      IDPROM = 0133 001 TRACER__V2.1A           
 b0cot03  3      (empty) 
 b0cot03  4      (empty) 
 b0cot03  5      (empty) 
 b0cot03  6      (empty) 
 b0cot03  7 A    IDPROM = 0538 009 MICHIGAN TDC LVDS Rev D 
 b0cot03  8 A    IDPROM = 0540 009 MICHIGAN TDC LVDS Rev D 
 b0cot03  9 S    IDPROM = 0656 009 MICHIGAN TDC LVDS Rev D 
 b0cot03 10 S    IDPROM = 0630 009 MICHIGAN TDC LVDS Rev D 
 b0cot03 11 S    IDPROM = 0645 009 MICHIGAN TDC LVDS Rev D 
 b0cot03 12 A    IDPROM = 0526 009 MICHIGAN TDC LVDS Rev D 
 b0cot03 13 A    IDPROM = 0512 009 MICHIGAN TDC LVDS Rev D 
 b0cot03 14 A    IDPROM = 0501 009 MICHIGAN TDC LVDS Rev D 
 b0cot03 15 A    IDPROM = 0552 009 MICHIGAN TDC LVDS Rev D 
 b0cot03 16 S    IDPROM = 0643 009 MICHIGAN TDC LVDS Rev D 
 b0cot03 17 S    IDPROM = 0619 009 MICHIGAN TDC LVDS Rev D 
 b0cot03 18 S    IDPROM = 0531 009 MICHIGAN TDC LVDS Rev D 
 b0cot03 19 S    IDPROM = 0629 009 MICHIGAN TDC LVDS Rev D 
 b0cot03 20 S    IDPROM = 0564 009 MICHIGAN TDC LVDS Rev D 
 b0cot03 21 S    IDPROM = 0511 009 MICHIGAN TDC LVDS Rev D 
[b0cot04]  COSWT-2 
 b0cot04  2      IDPROM = 0043 001 TRACER__V2.1A           
 b0cot04  3      (empty) 
 b0cot04  4      (empty) 
 b0cot04  5      (empty) 
 b0cot04  6 A    (empty) 
 b0cot04  7 A    (empty) 
 b0cot04  8 S    (empty) 
 b0cot04  9 S    (empty) 
 b0cot04 10 S    (empty) 
 b0cot04 11 A    (empty) 
 b0cot04 12 A    (empty) 
 b0cot04 13 A    (empty) 
 b0cot04 14 A    (empty) 
 b0cot04 15 S    (empty) 
 b0cot04 16 S    (empty) 
 b0cot04 17 S    (empty) 
 b0cot04 18 S    (empty) 
 b0cot04 19 S    (empty) 
 b0cot04 20 S    (empty) 
 b0cot04 21 S    (empty) 
[b0cot05]  COSWT-3 
 b0cot05  2      IDPROM = 0162 001 TRACER__V2.1A           
 b0cot05  3      (empty) 
 b0cot05  4      (empty) 
 b0cot05  5      (empty) 
 b0cot05  6      (empty) 
 b0cot05  7 A    (empty) 
 b0cot05  8 A    (empty) 
 b0cot05  9 A    (empty) 
 b0cot05 10 S    (empty) 
 b0cot05 11 S    (empty) 
 b0cot05 12 S    (empty) 
 b0cot05 13 A    (empty) 
 b0cot05 14 A    (empty) 
 b0cot05 15 A    (empty) 
 b0cot05 16 A    (empty) 
 b0cot05 17 A    (empty) 
 b0cot05 18 A    IDPROM = ................................ 
 b0cot05 19 S    (empty) 
 b0cot05 20 S    (empty) 
 b0cot05 21 S    (empty) 
[b0cot06]  COSWB-1 
 b0cot06  2      IDPROM = 0042 001 TRACER__V2.1A           
 b0cot06  3      (empty) 
 b0cot06  4      (empty) 
 b0cot06  5      (empty) 
 b0cot06  6 A    IDPROM = 0652 009 MICHIGAN TDC LVDS Rev D 
 b0cot06  7 A    IDPROM = 0674 009 MICHIGAN TDC LVDS Rev D 
 b0cot06  8 A    IDPROM = 0193 009 MICHIGAN TDC LVDS Rev D 
 b0cot06  9 S    (empty) 
 b0cot06 10 S    (empty) 
 b0cot06 11 S    (empty) 
 b0cot06 12 A    IDPROM = 0282 009 MICHIGAN TDC LVDS Rev D 
 b0cot06 13 A    IDPROM = 0154 009 MICHIGAN TDC LVDS Rev D 
 b0cot06 14 A    IDPROM = 0171 009 MICHIGAN TDC LVDS Rev D 
 b0cot06 15 A    IDPROM = 0634 009 MICHIGAN TDC LVDS Rev D 
 b0cot06 16 A    IDPROM = 0635 009 MICHIGAN TDC LVDS Rev D 
 b0cot06 17 S    (empty) 
 b0cot06 18 S    (empty) 
 b0cot06 19 S    (empty) 
 b0cot06 20 S    (empty) 
 b0cot06 21 S    (empty) 
[b0cot07]  COSWB-2 
 b0cot07  2      IDPROM = 0084 001 TRACER__V2.1A           
 b0cot07  3      (empty) 
 b0cot07  4      (empty) 
 b0cot07  5      (empty) 
 b0cot07  6 A    IDPROM = 0348 009 MICHIGAN TDC LVDS Rev D 
 b0cot07  7 A    IDPROM = 0606 009 MICHIGAN TDC LVDS Rev D 
 b0cot07  8 S    IDPROM = 0698 009 MICHIGAN TDC LVDS Rev D 
 b0cot07  9 S    IDPROM = 0307 009 MICHIGAN TDC LVDS Rev D 
 b0cot07 10 S    IDPROM = 0152 009 MICHIGAN TDC LVDS Rev D 
 b0cot07 11 A    IDPROM = 0589 009 MICHIGAN TDC LVDS Rev D 
 b0cot07 12 A    IDPROM = 0326 009 MICHIGAN TDC LVDS Rev D 
 b0cot07 13 A    IDPROM = 0208 009 MICHIGAN TDC LVDS Rev D 
 b0cot07 14 A    IDPROM = 0654 009 MICHIGAN TDC LVDS Rev D 
 b0cot07 15 A    IDPROM = 0290 009 MICHIGAN TDC LVDS Rev D 
 b0cot07 16 S    IDPROM = 0688 009 MICHIGAN TDC LVDS Rev D 
 b0cot07 17 S    IDPROM = 0599 009 MICHIGAN TDC LVDS Rev D 
 b0cot07 18 S    IDPROM = 0320 009 MICHIGAN TDC LVDS Rev D 
 b0cot07 19 S    IDPROM = 0286 009 MICHIGAN TDC LVDS Rev D 
 b0cot07 20 S    IDPROM = 0104 009 MICHIGAN TDC LVDS Rev D 
 b0cot07 21 S    IDPROM = 0285 009 MICHIGAN TDC LVDS Rev D 
[b0cot08]  CONWB-2 
 b0cot08  2 S    IDPROM = 0196 009 MICHIGAN TDC LVDS Rev D 
 b0cot08  3 S    IDPROM = 0209 009 MICHIGAN TDC LVDS Rev D 
 b0cot08  4 S    IDPROM = 0201 009 MICHIGAN TDC LVDS Rev D 
 b0cot08  5 S    IDPROM = 0350 009 MICHIGAN TDC LVDS Rev D 
 b0cot08  6 S    IDPROM = 0185 009 MICHIGAN TDC LVDS Rev D 
 b0cot08  7 S    IDPROM = 0114 009 MICHIGAN TDC LVDS Rev D 
 b0cot08  8 A    IDPROM = 0628 009 MICHIGAN TDC LVDS Rev D 
 b0cot08  9 A    IDPROM = 0132 009 MICHIGAN TDC LVDS Rev D 
 b0cot08 10 A    IDPROM = 0612 009 MICHIGAN TDC LVDS Rev D 
 b0cot08 11 A    IDPROM = 0164 009 MICHIGAN TDC LVDS Rev D 
 b0cot08 12 A    IDPROM = 0346 009 MICHIGAN TDC LVDS Rev D 
 b0cot08 13 S    IDPROM = 0131 009 MICHIGAN TDC LVDS Rev D 
 b0cot08 14 S    IDPROM = 0288 009 MICHIGAN TDC LVDS Rev D 
 b0cot08 15 S    IDPROM = 0278 009 MICHIGAN TDC LVDS Rev D 
 b0cot08 16 A    IDPROM = 0188 009 MICHIGAN TDC LVDS Rev D 
 b0cot08 17 A    IDPROM = 0191 009 MICHIGAN TDC LVDS Rev D 
 b0cot08 18      (empty) 
 b0cot08 19      (empty) 
 b0cot08 20      (empty) 
 b0cot08 21      IDPROM = 0066 001 TRACER__V2.1A           
[b0cot09]  CONWB-1 
 b0cot09  2 S    (empty) 
 b0cot09  3 S    (empty) 
 b0cot09  4 S    (empty) 
 b0cot09  5 S    (empty) 
 b0cot09  6 S    (empty) 
 b0cot09  7 A    (empty) 
 b0cot09  8 A    IDPROM = 0198 009 MICHIGAN TDC LVDS Rev D 
 b0cot09  9 A    IDPROM = 0150 009 MICHIGAN TDC LVDS Rev D 
 b0cot09 10 A    IDPROM = 0108 009 MICHIGAN TDC LVDS Rev D 
 b0cot09 11 A    IDPROM = 0202 009 MICHIGAN TDC LVDS Rev D 
 b0cot09 12 S    (empty) 
 b0cot09 13 S    (empty) 
 b0cot09 14 S    (empty) 
 b0cot09 15 A    IDPROM = 0317 009 MICHIGAN TDC LVDS Rev D 
 b0cot09 16 A    IDPROM = 0302 009 MICHIGAN TDC LVDS Rev D 
 b0cot09 17 A    IDPROM = 0300 009 MICHIGAN TDC LVDS Rev D 
 b0cot09 18      (empty) 
 b0cot09 19      (empty) 
 b0cot09 20      (empty) 
 b0cot09 21      IDPROM = 0088 001 TRACER__V2.1A           
[b0cot10]  CONET-3 
 b0cot10  2      (empty) 
 b0cot10  3      (empty) 
 b0cot10  4      (empty) 
 b0cot10  5 A    IDPROM = 0695 009 MICHIGAN TDC LVDS Rev D 
 b0cot10  6 A    IDPROM = 0681 009 MICHIGAN TDC LVDS Rev D 
 b0cot10  7 A    IDPROM = 0637 009 MICHIGAN TDC LVDS Rev D 
 b0cot10  8 A    IDPROM = 0692 009 MICHIGAN TDC LVDS Rev D 
 b0cot10  9 A    IDPROM = 0703 009 MICHIGAN TDC LVDS Rev D 
 b0cot10 10 A    IDPROM = 0660 009 MICHIGAN TDC LVDS Rev D 
 b0cot10 11 A    IDPROM = 0697 009 MICHIGAN TDC LVDS Rev D 
 b0cot10 12 S    (empty) 
 b0cot10 13 S    (empty) 
 b0cot10 14 S    (empty) 
 b0cot10 15 A    IDPROM = 0689 009 MICHIGAN TDC LVDS Rev D 
 b0cot10 16 A    IDPROM = 0617 009 MICHIGAN TDC LVDS Rev D 
 b0cot10 17 A    IDPROM = 0616 009 MICHIGAN TDC LVDS Rev D 
 b0cot10 18 A    IDPROM = 0680 009 MICHIGAN TDC LVDS Rev D 
 b0cot10 19 S    (empty) 
 b0cot10 20 S    (empty) 
 b0cot10 21      IDPROM = 0081 001 TRACER__V2.1A           
[b0cot11]  CONET-2 
 b0cot11  2      (empty) 
 b0cot11  3      (empty) 
 b0cot11  4 A    IDPROM = 0610 009 MICHIGAN TDC LVDS Rev D 
 b0cot11  5 A    IDPROM = 0608 009 MICHIGAN TDC LVDS Rev D 
 b0cot11  6 A    IDPROM = 0615 009 MICHIGAN TDC LVDS Rev D 
 b0cot11  7 A    IDPROM = 0560 009 MICHIGAN TDC LVDS Rev D 
 b0cot11  8 A    IDPROM = 0561 009 MICHIGAN TDC LVDS Rev D 
 b0cot11  9 S    IDPROM = 0636 009 MICHIGAN TDC LVDS Rev D 
 b0cot11 10 S    IDPROM = 0594 009 MICHIGAN TDC LVDS Rev D 
 b0cot11 11 S    IDPROM = 0566 009 MICHIGAN TDC LVDS Rev D 
 b0cot11 12 S    IDPROM = 0603 009 MICHIGAN TDC LVDS Rev D 
 b0cot11 13 S    IDPROM = 0522 009 MICHIGAN TDC LVDS Rev D 
 b0cot11 14 A    IDPROM = 0563 009 MICHIGAN TDC LVDS Rev D 
 b0cot11 15 A    IDPROM = 0614 009 MICHIGAN TDC LVDS Rev D 
 b0cot11 16 A    IDPROM = 0508 009 MICHIGAN TDC LVDS Rev D 
 b0cot11 17 S    IDPROM = 0574 009 MICHIGAN TDC LVDS Rev D 
 b0cot11 18 S    IDPROM = 0567 009 MICHIGAN TDC LVDS Rev D 
 b0cot11 19      (empty) 
 b0cot11 20      (empty) 
 b0cot11 21      IDPROM = 0080 001 TRACER__V2.1A           
[b0cot12]  CONET-1 
 b0cot12  2      (empty) 
 b0cot12  3      (empty) 
 b0cot12  4 A    IDPROM = 0570 009 MICHIGAN TDC LVDS Rev D 
 b0cot12  5 A    IDPROM = 0600 009 MICHIGAN TDC LVDS Rev D 
 b0cot12  6 A    IDPROM = 0607 009 MICHIGAN TDC LVDS Rev D 
 b0cot12  7 A    IDPROM = 0542 009 MICHIGAN TDC LVDS Rev D 
 b0cot12  8 A    IDPROM = 0611 009 MICHIGAN TDC LVDS Rev D 
 b0cot12  9 S    IDPROM = 0543 009 MICHIGAN TDC LVDS Rev D 
 b0cot12 10 S    IDPROM = 0536 009 MICHIGAN TDC LVDS Rev D 
 b0cot12 11 S    IDPROM = 0509 009 MICHIGAN TDC LVDS Rev D 
 b0cot12 12 S    IDPROM = 0551 009 MICHIGAN TDC LVDS Rev D 
 b0cot12 13 S    IDPROM = 0519 009 MICHIGAN TDC LVDS Rev D 
 b0cot12 14 A    IDPROM = 0539 009 MICHIGAN TDC LVDS Rev D 
 b0cot12 15 A    IDPROM = 0503 009 MICHIGAN TDC LVDS Rev D 
 b0cot12 16 A    IDPROM = 0520 009 MICHIGAN TDC LVDS Rev D 
 b0cot12 17 S    IDPROM = 0516 009 MICHIGAN TDC LVDS Rev D 
 b0cot12 18 S    IDPROM = 0546 009 MICHIGAN TDC LVDS Rev D 
 b0cot12 19 S    IDPROM = 0584 009 MICHIGAN TDC LVDS Rev D 
 b0cot12 20      (empty) 
 b0cot12 21      IDPROM = 0079 001 TRACER__V2.1A           
[b0cot13]  COSET-1 
 b0cot13  2      IDPROM = 0078 001 TRACER__V2.1A           
 b0cot13  3      (empty) 
 b0cot13  4      (empty) 
 b0cot13  5 S    IDPROM = 0514 009 MICHIGAN TDC LVDS Rev D 
 b0cot13  6 S    IDPROM = 0535 009 MICHIGAN TDC LVDS Rev D 
 b0cot13  7 A    IDPROM = 0555 009 MICHIGAN TDC LVDS Rev D 
 b0cot13  8 A    IDPROM = 0523 009 MICHIGAN TDC LVDS Rev D 
 b0cot13  9 A    IDPROM = 0534 009 MICHIGAN TDC LVDS Rev D 
 b0cot13 10 S    IDPROM = 0525 009 MICHIGAN TDC LVDS Rev D 
 b0cot13 11 S    IDPROM = 0553 009 MICHIGAN TDC LVDS Rev D 
 b0cot13 12 S    IDPROM = 0554 009 MICHIGAN TDC LVDS Rev D 
 b0cot13 13 S    IDPROM = 0556 009 MICHIGAN TDC LVDS Rev D 
 b0cot13 14 S    IDPROM = 0529 009 MICHIGAN TDC LVDS Rev D 
 b0cot13 15 A    IDPROM = 0527 009 MICHIGAN TDC LVDS Rev D 
 b0cot13 16 A    IDPROM = 0558 009 MICHIGAN TDC LVDS Rev D 
 b0cot13 17 A    IDPROM = 0537 009 MICHIGAN TDC LVDS Rev D 
 b0cot13 18 A    IDPROM = 0524 009 MICHIGAN TDC LVDS Rev D 
 b0cot13 19 A    IDPROM = 0548 009 MICHIGAN TDC LVDS Rev D 
 b0cot13 20      (empty) 
 b0cot13 21      (empty) 
[b0cot14]  COSET-2 
 b0cot14  2      IDPROM = 0070 001 TRACER__V2.1A           
 b0cot14  3      (empty) 
 b0cot14  4      (empty) 
 b0cot14  5 S    (empty) 
 b0cot14  6 S    (empty) 
 b0cot14  7 A    (empty) 
 b0cot14  8 A    (empty) 
 b0cot14  9 A    (empty) 
 b0cot14 10 S    (empty) 
 b0cot14 11 S    (empty) 
 b0cot14 12 S    (empty) 
 b0cot14 13 S    (empty) 
 b0cot14 14 S    (empty) 
 b0cot14 15 A    IDPROM = 0627 009 MICHIGAN TDC LVDS Rev D 
 b0cot14 16 A    IDPROM = 0667 009 MICHIGAN TDC LVDS Rev D 
 b0cot14 17 A    IDPROM = 0613 009 MICHIGAN TDC LVDS Rev D 
 b0cot14 18 A    IDPROM = 0705 009 MICHIGAN TDC LVDS Rev D 
 b0cot14 19 A    IDPROM = 0704 009 MICHIGAN TDC LVDS Rev D 
 b0cot14 20      (empty) 
 b0cot14 21      (empty) 
[b0cot15]  COSET-3 
 b0cot15  2      (not available) 
 b0cot15  3 S    (not available) 
 b0cot15  4 S    (not available) 
 b0cot15  5 A    (not available) 
 b0cot15  6 A    (not available) 
 b0cot15  7 A    (not available) 
 b0cot15  8 A    (not available) 
 b0cot15  9 S    (not available) 
 b0cot15 10 S    (not available) 
 b0cot15 11 S    (not available) 
 b0cot15 12 A    (not available) 
 b0cot15 13 A    (not available) 
 b0cot15 14 A    (not available) 
 b0cot15 15 A    (not available) 
 b0cot15 16 A    (not available) 
 b0cot15 17 A    (not available) 
 b0cot15 18 A    (not available) 
 b0cot15 19      (not available) 
 b0cot15 20      (not available) 
 b0cot15 21      (not available) 
[b0cot16]  COSEB-1 
 b0cot16  2      IDPROM = 0141 001 TRACER__V2.1A           
 b0cot16  3 S    (empty) 
 b0cot16  4 S    (empty) 
 b0cot16  5 A    IDPROM = 0571 009 MICHIGAN TDC LVDS Rev D 
 b0cot16  6 A    IDPROM = 0309 009 MICHIGAN TDC LVDS Rev D 
 b0cot16  7 A    IDPROM = 0203 009 MICHIGAN TDC LVDS Rev D 
 b0cot16  8 A    IDPROM = 0341 009 MICHIGAN TDC LVDS Rev D 
 b0cot16  9 S    (empty) 
 b0cot16 10 S    (empty) 
 b0cot16 11 S    (empty) 
 b0cot16 12 A    IDPROM = 0184 009 MICHIGAN TDC LVDS Rev D 
 b0cot16 13 A    IDPROM = 0211 009 MICHIGAN TDC LVDS Rev D 
 b0cot16 14 A    IDPROM = 0174 009 MICHIGAN TDC LVDS Rev D 
 b0cot16 15 A    IDPROM = 0682 009 MICHIGAN TDC LVDS Rev D 
 b0cot16 16 A    IDPROM = 0578 009 MICHIGAN TDC LVDS Rev D 
 b0cot16 17 A    IDPROM = 0649 009 MICHIGAN TDC LVDS Rev D 
 b0cot16 18 A    IDPROM = 0650 009 MICHIGAN TDC LVDS Rev D 
 b0cot16 19      (empty) 
 b0cot16 20      (empty) 
 b0cot16 21      (empty) 
[b0cot17]  COSEB-2 
 b0cot17  2      IDPROM = 0030 001 TRACER__V2.1A           
 b0cot17  3 S    IDPROM = 0576 009 MICHIGAN TDC LVDS Rev D 
 b0cot17  4 S    IDPROM = 0273 009 MICHIGAN TDC LVDS Rev D 
 b0cot17  5 A    IDPROM = 0659 009 MICHIGAN TDC LVDS Rev D 
 b0cot17  6 A    IDPROM = 0661 009 MICHIGAN TDC LVDS Rev D 
 b0cot17  7 A    IDPROM = 0597 009 MICHIGAN TDC LVDS Rev D 
 b0cot17  8 A    (empty) 
 b0cot17  9 S    IDPROM = 0641 009 MICHIGAN TDC LVDS Rev D 
 b0cot17 10 S    IDPROM = 0336 009 MICHIGAN TDC LVDS Rev D 
 b0cot17 11 S    IDPROM = 0186 009 MICHIGAN TDC LVDS Rev D 
 b0cot17 12 S    IDPROM = 0283 009 MICHIGAN TDC LVDS Rev D 
 b0cot17 13 S    IDPROM = 0591 009 MICHIGAN TDC LVDS Rev D 
 b0cot17 14 A    IDPROM = 0644 009 MICHIGAN TDC LVDS Rev D 
 b0cot17 15 A    IDPROM = 0662 009 MICHIGAN TDC LVDS Rev D 
 b0cot17 16 A    IDPROM = 0719 009 MICHIGAN TDC LVDS Rev D 
 b0cot17 17 A    IDPROM = 0657 009 MICHIGAN TDC LVDS Rev D 
 b0cot17 18 A    IDPROM = 0668 009 MICHIGAN TDC LVDS Rev D 
 b0cot17 19 A    IDPROM = 0663 009 MICHIGAN TDC LVDS Rev D 
 b0cot17 20      (empty) 
 b0cot17 21      (empty) 
[b0cot18]  CONEB-2 
 b0cot18  2      (empty) 
 b0cot18  3      (empty) 
 b0cot18  4 A    IDPROM = 0666 009 MICHIGAN TDC LVDS Rev D 
 b0cot18  5 A    IDPROM = 0712 009 MICHIGAN TDC LVDS Rev D 
 b0cot18  6 A    IDPROM = 0289 009 MICHIGAN TDC LVDS Rev D 
 b0cot18  7 A    IDPROM = 0210 009 MICHIGAN TDC LVDS Rev D 
 b0cot18  8 A    IDPROM = 0178 009 MICHIGAN TDC LVDS Rev D 
 b0cot18  9 A    IDPROM = 0711 009 MICHIGAN TDC LVDS Rev D 
 b0cot18 10 S    IDPROM = 0291 009 MICHIGAN TDC LVDS Rev D 
 b0cot18 11 S    IDPROM = 0170 009 MICHIGAN TDC LVDS Rev D 
 b0cot18 12 S    IDPROM = 0190 009 MICHIGAN TDC LVDS Rev D 
 b0cot18 13 S    IDPROM = 0187 009 MICHIGAN TDC LVDS Rev D 
 b0cot18 14 S    IDPROM = 0192 009 MICHIGAN TDC LVDS Rev D 
 b0cot18 15 A    IDPROM = 0312 009 MICHIGAN TDC LVDS Rev D 
 b0cot18 16 A    IDPROM = 0700 009 MICHIGAN TDC LVDS Rev D 
 b0cot18 17 A    IDPROM = 0684 009 MICHIGAN TDC LVDS Rev D 
 b0cot18 18 A    IDPROM = 0679 009 MICHIGAN TDC LVDS Rev D 
 b0cot18 19 S    IDPROM = 0166 009 MICHIGAN TDC LVDS Rev D 
 b0cot18 20 S    IDPROM = 0623 009 MICHIGAN TDC LVDS Rev D 
 b0cot18 21      IDPROM = 0090 001 TRACER__V2.1A           
[b0cot19]  CONEB-1 
 b0cot19  2      (empty) 
 b0cot19  3      (empty) 
 b0cot19  4      (empty) 
 b0cot19  5 A    IDPROM = 0573 009 MICHIGAN TDC LVDS Rev D 
 b0cot19  6 A    IDPROM = 0342 009 MICHIGAN TDC LVDS Rev D 
 b0cot19  7 A    IDPROM = 0676 009 MICHIGAN TDC LVDS Rev D 
 b0cot19  8 A    IDPROM = 0327 009 MICHIGAN TDC LVDS Rev D 
 b0cot19  9 A    IDPROM = 0311 009 MICHIGAN TDC LVDS Rev D 
 b0cot19 10 A    IDPROM = 0316 009 MICHIGAN TDC LVDS Rev D 
 b0cot19 11 A    IDPROM = 0299 009 MICHIGAN TDC LVDS Rev D 
 b0cot19 12 S    (empty) 
 b0cot19 13 S    (empty) 
 b0cot19 14 S    (empty) 
 b0cot19 15 A    IDPROM = 0665 009 MICHIGAN TDC LVDS Rev D 
 b0cot19 16 A    IDPROM = 0651 009 MICHIGAN TDC LVDS Rev D 
 b0cot19 17 A    IDPROM = 0706 009 MICHIGAN TDC LVDS Rev D 
 b0cot19 18 A    IDPROM = 0575 009 MICHIGAN TDC LVDS Rev D 
 b0cot19 19 S    (empty) 
 b0cot19 20 S    (empty) 
 b0cot19 21      IDPROM = 0100 001 TRACER__V2.1A           
</pre>  
<!-- Author: Jay Dittmann -->


<!-- Date: Fri Sep 29 11:55:19 2000 -->
<pre>		COT TDC Crates Sept-28 Access Summary 
		===================================== 
 
   Overall  we managed to have 16 crates and total 210 TDC  
installed.  Before  end of the access, 15 crates were signed off  
for DAQ running. One crate (b0cot16) has DAQ cable problem.   
These crates are: 
 
       b0cot01,02,03,11,12,13 (top wedge), 
       b0cot07,8,17,18(bottom wedge), 
       b0cot06,9,16,19 (bottom wedge extension) and  
       b0cot10,14(bonus).  
  
 
(0a)Arnd's test run with different ASD thresholds before the  
    access pointed out the "TDC non-response" problem is caused  
    by the ASD threshold being too low and TDC is blasted with  
    enormous amounts of noise. We decided to leave the TDCs  
    marked with this problem alone in the crates. Arnd, Dave A.  
    and Nigel  will get together to figure a better way to   
    control the use of DAC setting.    
  
(0b)We got permition from Terri Shaw on hot insertion of TRACER  
    to solve  crate latch-up problem if other options run out.  
    Ron Moore also OKed TDC hot insertion for special cases. 
 
 
(1)Replace bad TDCs in the two wedges  
  
    b0cot01: slot 17A recovered by hot insertion 
    b0cot11: slot 7A replaced 
    b0cot12: slot 19S replaced 
    b0cot03: slot 16S replaced 	 
    b0cot07: slot 8S,16S, 17S replaced   
    b0cot17: slot 8 have bad slot (see below) 
    b0cot18: slot 5A,9A,17A,18A,20S replaced 
  
 
 (2)Fixed  latch-uped b0cot06 by hot TRACER insertion  
 
 (3)Fixed b0cot17  "DAQ return" cable and DAQ is working on  
    the crate. 
    Found one pin in p1 is missing for slot 8 of the crate.  
    Pulled TDC out and will decide how to fix. 
 
 (4)Replace TRACER in Crate 9 and DAQ is working.  
    But we forgot to connect the flat cables for installed TDCs.  
 
 (5)"DAQ return" cable for b0cot16 has problem.  
    Replaced with spare one but no help. Should check other end  
    in upstair later.  
  
 (6)additions to axial slots of remaining bottom crates 
  
    b0cot06: slot 6, 7 added 
    b0cot16: slot 15 added 
    b0cot19: slot 15,16,17,18 added.  TDC in slot 5  was  
             responding addressing to both slot 4 and 5. This  
             TDC also replaced.   
   
 
 (7)Installed TDC to b0cot10 and 14 
    b0cot14: 11 TDCs in axial slots:  5->11 and 15->18 
    b0cot10: 5  TDCs in axial slots:  15->19. 
   
 (8)Following flat cables were spotted to have loose connectors 
 
    b0cot16, cable  6-0 
    b0cot17, cable 17-1 
    b0cot19, cable  6-2, 7-3,16-3 
 
 (9)Following power supply were spotted having problem 
 
   b0cot00: a note from Fred attached to the switch says it's not  
            working 
   b0cot15: "DC fault" light was on.  
 
</pre>
<!-- Author: Ting Miao -->


<!-- Date: Fri Sep 29 16:14:43 2000 -->
<pre>There is a web page "/tdc/TDC.html"  
which we give out detail info on COT TDC crate.  The sub page  
 "Current COT TDC status in  each crate" may be useful for ACEs  
and DAQ experts. The sub page will be updated by Bill, Kirby and me. </pre>
<!-- Author: Ting Miao  -->


<!-- Date: Fri Sep 29 17:22:28 2000 -->
<pre>I tested TDC #106 in b0htdc00.  This TDC was in b0cot18 slot 16 
and had been reporting max # allowed hits (768) and was limiting 
readout of b0cot18 to ~25Hz.  When I tested this TDC in b0htdc00, 
crate readout was limited to ~25 Hz for about 30s, but then 
increased to ~900 Hz.  I could not reproduce the slow readout 
during the rest of the afternoon.  Perhaps that TDC has a real 
problem. 
 
When I powered up b0htdc00 after removing TDC #106, TDC #653 in 
slot 16 blew its buffer chips.  That TDC was removed as well. 
 
The b0htdc00 crate currently has TDCs in slots 4-15, 17-20.  I 
successfully readout the crate after my interventions.</pre>
<!-- Author: Ron -->


<!-- Date: Fri Sep 29 18:09:23 2000 -->
<!doctype html public "-//w3c//dtd html 4.0 transitional//en"> 
<html> 
<head> 
   <meta name="GENERATOR" content="Mozilla/4.7 [en] (X11; I; Linux 2.2.16-3 i686) [Netscape]"> 
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<body> 
This afternoon did a very simple test of voltage drop to the TDC boards.&nbsp; 
Installed a pair of wires connected to the fused side of Vcc on the fuse 
for the diode protection board.&nbsp; Another wire was attached to ground.&nbsp; 
This board was then installed in the Hadron TDC&nbsp;crate.&nbsp; The voltage 
was measured at the backplane studs where the 4/0 cables from the power 
supply is attached.&nbsp; It was then measured at Vcc on the TDC: 
<ul> 
<li> 
Backplane: 5.10V</li> 
 
<li> 
On TDC: 4.96V</li> 
</ul> 
So we see a 140mV drop from the backplane to the area of the board that 
has the DSP.&nbsp; I would expect minimal drop on the board itself since 
this has a substantial power plane.&nbsp; The drop probably comes on a 
combination of the backplane and the connection between the board and crate: 
connector and fuse. 
<p>With this large a drop and the possibility of crates with &lt;5.00V 
at the backplane, what is the minimum allowed voltage on the TDC board?&nbsp; 
This will imply what limits we should set on power supply voltage settings. 
<br>&nbsp; 
<br>&nbsp; 
</body> 
</html>
<!-- Author: Peter Wilson -->