<!-- Title: 19:24:36  Thu Aug  9 2001 -->
<!-- Crewchief: Peter Wilson -->
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<!-- Notes: -->
<pre>New file for daily summaries</pre>


<!-- Date: Thu Aug 9 19:28:41 2001 -->
<pre>No XFT hardware problems.  But 3+ dead CELLS suddenly appeared 
in COT axial layers - what happened? 
 
The spike in occupancy for linker tracks for around 50 
degrees (segment 40, 41, linker board 9 in b0xft03 slot 6)... 
...is from a large spike in the track segment occupancy in finder 
board 9... 
...which is from a huge spike in the Prompt & Delayed XTC hit 
occupancy for cells 54 and 55 in COT SL 6 (TDC in b0cot06 slot 8). 
 
Wires 0-11 in cells 54 and 55 are completely dead for us (prompt 
is cold, delayed is cold, p+d is hot) which is a behaviour we have seen for other dead wires in the COT. 
 
I also see cell 100 wires 7-11, cell 101 wires 0-11 dead in the same way in COT SL 2, also new 
 
Below is occupancy and sigma away from mean occupancy for 
P=prompt D=delayed and PD=prompt+delayed. 
 
 
Bin  648        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-2 wire  0   Cell   54 ( 50.6 deg, 0.884 rad) 
 Bin  649       14  -14.8 P COLD        34  -28.5 D COLD         1  -14.4 PD COLD    Board  9- 3-2 wire  1   Cell   54 ( 50.6 deg, 0.884 rad) 
 Bin  650        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-2 wire  2   Cell   54 ( 50.6 deg, 0.884 rad) 
 Bin  651        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-2 wire  3   Cell   54 ( 50.6 deg, 0.884 rad) 
 Bin  652        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-2 wire  4   Cell   54 ( 50.6 deg, 0.884 rad) 
 Bin  653       60  -11.9 P COLD       781   -3.4             9082  614.4 PD HOT     Board  9- 3-2 wire  5   Cell   54 ( 50.6 deg, 0.884 rad) 
 Bin  654        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-2 wire  6   Cell   54 ( 50.6 deg, 0.884 rad) 
 Bin  655        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-2 wire  7   Cell   54 ( 50.6 deg, 0.884 rad) 
 Bin  656        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-2 wire  8   Cell   54 ( 50.6 deg, 0.884 rad) 
 Bin  657        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-2 wire  9   Cell   54 ( 50.6 deg, 0.884 rad) 
 Bin  658        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-2 wire 10   Cell   54 ( 50.6 deg, 0.884 rad) 
 Bin  659        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-2 wire 11   Cell   54 ( 50.6 deg, 0.884 rad) 
 Bin  660        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-3 wire  0   Cell   55 ( 51.6 deg, 0.900 rad) 
 Bin  661        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-3 wire  1   Cell   55 ( 51.6 deg, 0.900 rad) 
 Bin  662        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-3 wire  2   Cell   55 ( 51.6 deg, 0.900 rad) 
 Bin  663        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-3 wire  3   Cell   55 ( 51.6 deg, 0.900 rad) 
 Bin  664        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-3 wire  4   Cell   55 ( 51.6 deg, 0.900 rad) 
 Bin  665        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-3 wire  5   Cell   55 ( 51.6 deg, 0.900 rad) 
 Bin  666        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-3 wire  6   Cell   55 ( 51.6 deg, 0.900 rad) 
 Bin  667        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-3 wire  7   Cell   55 ( 51.6 deg, 0.900 rad) 
 Bin  668        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-3 wire  8   Cell   55 ( 51.6 deg, 0.900 rad) 
 Bin  669        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-3 wire  9   Cell   55 ( 51.6 deg, 0.900 rad) 
 Bin  670        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-3 wire 10   Cell   55 ( 51.6 deg, 0.900 rad) 
 Bin  671        0  -15.7 P COLD         0  -29.7 D COLD      9926  672.8 PD HOT     Board  9- 3-3 wire 11   Cell   55 ( 51.6 deg, 0.900 rad) 
 </pre>
<!-- Author: Evelyn Thomson -->


<!-- Date: Fri Aug 17 20:28:46 2001 -->
<pre>Errors related to sending the tracklist along to L2 & SVT seem 
to occur most freqently in the XTRP data boards in slots 9 &  
10.  To see whether this is in fact to due some problem with 
these particular boards, I've swapped them with data boards  
in slots 7 & 12 - 
 
DB004 is now in slot 7 
DB003 is now in slot 9 
DB008 is now in slot 10 
DB006 is now in slot 12 
 
Note this now means wedge 8, seg 10 is no longer masked while 
wedge 12, segment 10 is now masked off.  The appropriate  
parameters in the hardware database have been updated.</pre>
<!-- Author: Nathan -->


<!-- Date: Sat Aug 18 16:25:09 2001 -->
The XTRP crate was hanging in partition and no amount of reset/power cycle voodoo would fix it.  It appeared to be hanging while trying to talk to the board in slot 11.  After taking a look at it, I found the problem was the the board in slot 15 was also trying to respond at the same time.  This was due to a bad via on one of the vme address lines for that board.  After fixing it, it's functional again.
<!-- Author: Nathan -->


<!-- Date: Tue Aug 21 20:47:30 2001 -->
<pre>Again swapped XTRP data boards.   
 
DB004 is now in slot 13 (not getting tracks) 
DB011 is now in slot 7 
 
DB004 is having a lot of problems passing tracks along to the 
clock/control board, but should be fine in slot 13 currently  
because it is not getting any tracks due to COT problems. 
 
Due to the change, wedge 14 segment 2 is no longer masked and 
wedge 2 segment 2 is masked.</pre>
<!-- Author: Nathan -->


<!-- Date: Thu Aug 23 16:26:59 2001 -->
<pre>XTRP Data Boards swapped 
 
DB006 now in slot 17 
DB015 now in slot 12 
 
This was done because DB015 has all calorimetry output masked 
off due to board problems and slot 12 is not recieving any 
tracks at the moment.  This means 
 
cal output is enabled for wedges 22 & 23  
cal output is disabled for wedges 12 & 13 
segment 10 of wedge 22 is now masked off 
</pre>
<!-- Author: Nathan -->


<!-- Date: Mon Aug 27 22:53:40 2001 -->
<pre>We have two new versions of XTRP firmware that we would like 
to test and implement as soon as possible, hopefully tomorrow 
morning if scheduling permits.</pre>
<!-- Author: Nathan and Kevin -->


<!-- Date: Thu Aug 30 22:09:24 2001 -->
<pre>We moved XTRP Databoard serial number 14 from slot 14 to 
slot 16.  We installed XTRP Databoard serial number 7  into 
slot 14.  Databoard 16 (formerly in slot 16) had intermittent  
VME problems and was removed.  Hardware database updated.</pre>
<!-- Author: Nathan and Kevin -->


<!-- Date: Thu Aug 30 23:30:29 2001 -->
<pre>We have installed the two new XTRP Databoards (VME011c). 
As far as we can tell with test data, all is well with 
these boards.  We are leaving them in the crate. 
 
Current  board/slot map: 
 
XTRP slot          bd serial number      masked segments 
---------          ----------------      --------------- 
  6                      2                   none 
   7                     17(vme011c)          none 
   8                     18(vme011c)          none 
   9                      3                   none 
  10                      5               wedge 8, seg 1 cal/mu 
  11                     10                   none 
  12                     15               wedges 12,13 cal 
  13                      4                   none 
  14                      8                   none 
  15                     11               wedge 18, seg 10 cal/mu 
  16                     14                   none 
  17                      6               wedge 22, seg 10 cal/mu 
 
Currently, we have configured the system so that the boards  
in slots 6, 7 and 8 (wedges 0-5) are sending tracks to L2/SVT. 
The rest of the boards are not sending tracks to L2/SVT. 
 
 
  </pre>
<!-- Author: Nathan and Kevin -->


<!-- Date: Mon Sep 3 15:41:36 2001 -->
<pre>In addition to the previous entry, today I masked off 
wedge 8, segment 10.    This was a known problem that 
we lost track of in last week's board swapping.  Also 
switched pipe FPGA algorithms back to version 6. </pre>
<!-- Author: Kevin Pitts -->


<!-- Date: Thu Sep 20 22:41:11 2001 -->
<pre>XTRP Status -  
 
New firmware is installed which appears to have solved issues 
with daq readout and sending track lists to SVT/L2.  All boards 
are once again being read out into XTRD. 
 
Xtrp Slot    Serial Number      Masks 
--------------------------------------------------------------- 
  6               2             none 
  7              18             none 
  8              14             none 
  9               3             none 
 10               5             wedge 8, seg 1 cal/mu 
 11              10             none 
 12              15             wedge 12,13 cal 
 13               6             wedge 14, seg 10 cal/mu 
 14               8             none 
 15              11             wedge 18, seg 10 cal/mu 
 16              17             wedge 20,21 tracks to SVT/L2 
 17               4             wedge 22,23 tracks to SVT/L2 
 
Other known issues - 
 
Wedge 3, seg 0,1,2 some bit errors in track pt sent to SVT/L2 
Wedge 5, seg 1,3,5 input track pt bits 1 & 3 are always 0 
Wedge 9, seg 7,9,11 input track pt bit 2 always 1 
 
 
 
</pre>
<!-- Author: Nathan -->


<!-- Date: Mon Sep 24 08:45:41 2001 -->
<pre>I remasked XTRP wedge 8 segment 10.  This segment was  
responsible for the difference in rates betweeen 
the TAU0_PT8, CMU0_PT8 and TRK8 triggers.  It is  
masked on both the CMU and Dirac sides.</pre>
<!-- Author: Kevin  -->


<!-- Date: Mon Sep 24 10:12:19 2001 -->
<pre>Beginning with Physics_0_01_v43, L1 Track triggers are now 
included in the table.  The following triggers are now 
coming through the Track Trigger board: 
 
L1 trigger name                         L1 Track  preFred  Fred 
----------------                        --------  -------  ---- 
L1_TRK8_PS250                             3         3       53 
 -&gt; 8 GeV four-layer track 
L1_TRK4_PS1K                              2         2       43 
 -&gt; 4 GeV four-layer track 
L1_TWO_TRK2_PS1K                          9        11       55    
 -&gt; any two tracks, p_T&gt;2 GeV 
L1_TWO_TRK2_OPPQ_DPHI135_SUMPT5.5_PS250   8        10       45 
 -&gt; scenario A trigger 
L1_SEVEN_TRK2_PS20                        7         7       41 
 -&gt;  more than 6 tracks with p_T&gt;2 GeV 
 
 
The "L1 Track" bits are found in the Track Trigger data word in 
the XTRD bank. 
 
The "preFred" bits are found in the TRKtrg word of the TL1D bank. 
  
The "Fred" bits are found in the TFRD bank. 
  
The Fred bits can change from table-to-table.  In principle, 
this is true for the L1 Track bits and the preFred bits as 
well.  In practice, the L1 Track and preFred bits WILL NOT 
change between now and the October shutdown. 
 
In events where the L1_SEVEN_TRK2 trigger is set, the  
Track Trigger board did not evaluate all possible tracks 
available for that event.   For all L1 Track Triggers, you 
should take the OR of your trigger and the L1_SEVEN  
trigger to get all of the events that potentially satisfy 
your criteria.  (This will always be true.) 
 
Track triggers are currently going into stream B. 
  
</pre>
<!-- Author: Kevin -->


<!-- Date: Fri Sep 28 10:25:08 2001 -->
<pre>For runs 127670 to 127805, all of wedge 18 was masked off for 
both Cal & Muons.  I've now masked just segment 1 of wedge 18 
for both Cal & Muons.  The current masked L1 triggers are now 
 
wedge 8, segments 1 & 10 cal/muon 
wedge 12, all cal 
wedge 13, all cal 
wedge 14, segment 10 cal/muon 
wedge 18, segments 1 & 10 cal/muon 
 
There are 12 segments per wedge with each segment covering 
1.25 degrees. 
 </pre>
<!-- Author: Nathan -->


<!-- Date: Fri Sep 28 15:14:19 2001 -->
<pre>I swapped boards in slots 16 & 17 with those in slots 10 & 11  
to put the boards not sending tracks to Svt/L2 in  wedges 8-11. 
After doing this, I found the pt8 track triggers were had  
about double the expected rates.  This turned out to be coming 
from segment 11 in wedge 14.  The masked wedges are now - 
 
Xtrp Slot    Serial Number      Masks  
---------------------------------------------------------------  
  6               2             none  
  7              18             none  
  8              14             none  
  9               3             none  
 10              17             wedge 8,9 tracks to SVT/L2  
 11               4             wedge 10,11 tracks to SVT/L2  
 12              15             wedge 12,13 cal  
 13               6             wedge 14, seg 10,11 cal/mu  
 14               8             none  
 15              11             wedge 18, seg 1,10 cal/mu  
 16               5             wedge 20, seg 1 cal/mu  
 17              10             none  
</pre>
<!-- Author: Nathan -->


<!-- Date: Sun Sep 30 05:20:31 2001 -->
<pre>Had to replace 017 in slot 10, with 007.  This means 
 
wedge 8   all segments masked to cal/muon 
wedge 9   segment 4 masked to cal/muon 
 
At this time, these two wedges will also continue to not 
send tracks along to L2/SVT.</pre>
<!-- Author: Nathan -->


<!-- Date: Mon Oct 1 17:21:07 2001 -->
XTRP STatus - put DB017 back in place of DB007 in slot 10 (wedges 8 & 9). DB007 was causing havoc with the two track board.  The status update from 9/28 is now again correct with the addition that board 4 in slot 10 is not being readout into the XTRD bank to prevent DTOs.
<!-- Author: Nathan -->


<!-- Date: Wed Oct 3 22:36:11 2001 -->
<pre>Two new XTRP data boards (21,20) have been installed to replace 
the board which was not reading out(17) and the board which did 
not send any info to cal(15).  The status is now - 
 
Xtrp Slot    Serial Number      Masks   
---------------------------------------------------------------   
  6               2             none   
  7              14             none   
  8               3             none   
  9              21             none   
 10               4             wedge 8,9 tracks to SVT/L2   
 11              20             none   
 12              18             none  
 13               6             wedge 14, seg 10,11 cal/mu   
 14               8             none   
 15              11             wedge 18, seg 1,10 cal/mu   
 16               5             wedge 20, seg 1 cal/mu   
 17              10             none   
</pre>
<!-- Author: Kevin & Nathan -->


<!-- Date: Tue Dec 4 11:26:28 2001 -->
<pre>The xtrp extrapolation parameters for the calorimetry were 
incorrectly entered into the hardware database.  The mapping 
code expects the K and dK parameters to be in degrees and  
these parameters were entered in radians.  The changes are 
 
Parameter   Old Value  New Value 
---------------------------------- 
   K          0.1522     8.72 
   dK         0.0213     1.22 
 
Because there has been a 5 degree misalignment term, this error 
was not immediately obvious.  We currently looking at refining 
these maps with current data at which time we will reduce the 
misalignment term.</pre>
<!-- Author: Kevin & Nathan -->


<!-- Date: Tue Dec 11 19:40:07 2001 -->
<pre>I've replaced DB3-021 in slot 13 with DB3-031.  DB3-021 was  
observed to have some very low level problems passing tracks 
to the TwoTrack Trigger board.</pre>
<!-- Author: Nathan -->


<!-- Date: Tue Dec 11 19:43:33 2001 -->
<pre>We are now using new Pipe FPGA algorithms which have a fix to 
correctly handle collisions between the L2 token and the L2 
readout.  This should eliminate low level occurences of  
incorrect track data in the XTRD bank.</pre>
<!-- Author: Nathan -->


<!-- Date: Wed Dec 19 12:13:27 2001 -->
<i>The TriggerDB code for downloading Dirac track info was adjusted for the new track parameters. This should fix the earlier problem related to TEST_ELECTRON_PHOTON runs.</i>
<!-- Author: Alexei Varganov -->