<!-- Title: 11:21:29  Mon Aug  6 2007 -->
<!-- Crewchief: The Silis -->
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<!-- Notes: -->
First week of the shutdown


<!-- Date: Mon Aug 6 11:25:49 2007 -->
<h3> System Configuration </h3> 
 
<ul> 
<li>SVX set point: -6°C</li>  
<li>ISL set point: 10°C</li>  
<li>SVX bulkhead and L00 trip temperatures: 2°C → 6°C</li>  
<li>Detector OFF</li>  
<li>+5V Enables OFF</li>  
</ul>   
<!-- Author: Jose -->


<!-- Date: Mon Aug 6 11:45:47 2007 -->
Mark has replaced on b0sili02 the degraded disk by a new one and rebuilt the raid (RAID 1 - system disks).
<!-- Author: Jose -->
<!-- Comment: Mon Aug  6 12;01;43 comment by...Mark -->
And I really wanted to make an elog entry.  I guess I need to be faster next time (I was waiting for the rebuild to finish).
<!-- Date: Mon Aug 6 11:47:42 2007 -->
Jim H. is exchanging the resin for SVX and ISL. We got a trip on low flow on ISL. Everything is off so no problem, but we should remember this for the next time. 
<!-- Author: Jose -->



<!-- Date: Mon Aug 6 12:24:30 2007 -->
<table border=0><td><tr><td bgcolor=#e0e030><pre>Please DON'T TOUCH TO THE DAQ UNTIL ANKUSH SAY SO!!!</pre></td></tr></td></table>
<!-- Author: Ankush and Hugo -->
<!-- Comment: Mon Aug  6 12;40;46 comment by...Ankush, Jose and Mark -->
<h3>Everything OK :-)</h3>

<p>Jose and Mark checked oout the GB and DAQ...the fault is with Ankush...phew....nothing serious !!</p>


<!-- Comment: Mon Aug  6 18;25;49 comment by...Ankush -->
<h4>I did fix one thing</h4>

<p>I was originally called in as it appeared the GLINK needed to be re-synched.  At the time Jose was unsure as he had looked at the LA and it appeared the SRC did not see any clock signals. </p>

<p>It turns out this was a red-herring...the SRC was OK and a quick   COLDSTART re-synched the GLINKS.  So everything Okey-Dokey.</p>

<p>For future reference, the LA pins on the SRC are not directly connected to the clock pins,etc.  Instead we observe the signals via the FPGA.  If the FPGA is <em>unhappy</em>, it may appear not to be receiving the signals. I'm sure the DAQ experts will now jump in and correct (& lambaste) me.</p> 
<!-- Date: Mon Aug 6 17:20:39 2007 -->
<h3> Cosmics overnight </h3> 
 
We have switched back the <b>+5V Enabled</b> to run cosmics SILICON_TAPE tonight with the full detector. The plan is to take a long cosmics run as a reference and for test. They plan for the cosmics to start around 6 pm or later. We will change configuration to <i>standard settings -10 C and +6 C for the cosmics</i>. 
 
Tomorrow they are opening the Walls but not the steel which is planned for the end of the week.
<!-- Author: Saty/Jose -->
<!-- Comment: Mon Aug  6 17;31;41 comment by...Ulrich -->
Please note that I have to tune flows for you to go ahead. I was under the impression that the default state now is OFF, and I would hate going forth and back every second day.

<!-- Comment: Mon Aug  6 17;33;15 comment by...Jose -->
They have some problems with CSL, up to they do not fix them we will not be able to get our cosmics.

<!-- Comment: Mon Aug  6 17;35;00 comment by...Jose -->
They told me about the cosmics after lunch, even now it is not sure that we will get any cosmics.

<!-- Comment: Mon Aug  6 18;05;09 comment by...Ulrich -->
Crappy planning! These things used to be planned at 8:00 meetings. If I had known this earlier, we could have saved some work. Anyway,  I have dialed down the BHE1 and BHW1 e-valves to avoid too large pressures at -10°C. The flow on ISL PCW is around 1.0 lpm, and the iFix alarm is currently ignored. ISL goes back to 7°C, so expect temperature warnings from the SVX Portcards.


<!-- Comment: Mon Aug  6 18;36;36 comment by...Jose -->
TE-PCE1B-1 went to warning (2.8 C). It looks stable so I have ignored it.

<!-- Comment: Mon Aug  6 22;20;06 comment by...Jose -->
Cosmics run postponed for tomorrow. The present configuration should be stable for tonight: SVX -6 C and ISL +7 C. One temperature had to be silenced, but was stable at 2.8 C. 
<br>Before leaving, I put the <b> +5V Enabled OFF </b> and the <b>AutoHocker to Manual</b>. 


<!-- Date: Tue Aug 7 12:17:40 2007 -->
The shift crew called me in my office (not sure why, there seems to be no problem with the cooling). They got an iFix alarm from ISL and L00, due to a communication failure with CAEN crate #16. Looking at the PS GUI, there is one L00 wedge that is blue, not the whole crate. Was there work ongoing? I instructed them to silence the ISL and L00 PS_ALARM iFix tags and make a note in the e-log.
<!-- Author: Ulrich -->

<!-- Date: Tue Aug 7 13:34:21 2007 -->
<p><font size=+1> D-mode Calibration Job Started </font>
<p><pre>
Job id            : 478
Calibration type  : standard
Run period tag    : Aug_2007
DPS-off run       : 246145
DPS-on run        : 246143
Requested by      : Petteri&Timo
Main process id   : 19177
Comment           : really the final
</pre>
<!-- Author: CDF silicon D-mode calibration job server v1.4 -->



<!-- Date: Tue Aug 7 14:24:32 2007 -->
I have unmasked the wedges without PS on IMON. Now if there is one PS missing for a wedge it will appear as BLUE.
<!-- Author: Jose -->
<!-- Comment: Tue Aug  7 18;35;46 comment by...Jose -->
ok, forget about it. I put back for the cosmics run...


<!-- Date: Tue Aug 7 18:41:47 2007 -->
<h3> Cosmics (Take 2) </h3> 
We will run cosmics tonight. The DAQ problems seem to be fixed and the COT is back to normal. <i>I have changed the SVX chiller set point to -10 C. The ISL chiller is set to +7 C</i> (to be able to run without making major changes with the present flow configuration).  
<br> Silicon is now in STANDBY and I have successfully run a coldstart (no time outs!!). The solenoid is coming up.
<!-- Author: Jose -->

<!-- Date: Tue Aug 7 18:56:17 2007 -->
<p><font size=+1> D-mode Calibration Job Finished </font>
<p><pre>
This is a computer-generated silicon D-mode calibration status report.
Silicon D-mode calibration job 478 FAILED.

Job info
--------
Calibration type : standard
DPS-off run      : 246145
DPS-on run       : 246143
Requested by     : Petteri&Timo
Submitted        : 2007-08-07 13:34:13
Completed        : 2007-08-07 18:56:11
Status           : FAILURE
Comment          : really the final

Last processing stage reported : comparing to the reference calibration
Failure diagnostics :
child process exited abnormally
</pre>
<!-- Author: D-mode script  -->



<!-- Date: Tue Aug 7 20:11:46 2007 -->
We are taking cosmics. The plan is to stop the run at 05:00 and go to end of store mode. The solenoid will be ramp down at that time. We have a few pinkies in SVX (temperature going down) and few more in ISL (we are running one degree warmer than usual). 
<!-- Author: Jose -->


<!-- Date: Tue Aug 7 22:47:05 2007 -->
<h3>Shutdown PS Work Kick-off!</h3> 
We made a comfortable start of the CAEN PS repair/replacement 
work, scheduled to keep us busy for the the next 10++ weeks! 
Today we restored the 4 ISL modules on the <b>PS crate #16</b> 
which were pulled out weeks earlier for drooping LV problem.  
Out of the 4, the one powering <b>IB4W0</b> was mistakenly  
taken out and doesn't require loadbox testing. Today we made a 
complete checkout of the one powering <b>IB5W5</b> and a partial 
checkout of <b>IB4W1</b>.<p> 
Tomorrow we would finish checking out <b>IB4W1</b> followed by 
<b>IB5W1</b> to complete our work on PS crate #16.<p> 
In addition to the module load testing, we setup a crate In the 
CH to adjust bias limits on SVX/L00 modules. We will be 
increasing the bias limits of channels L0,1,2 of L00 modules  
from 90 V to 160 V and the channels L2,4 of SVX modules from  
60 V to 140 V.  
<!-- Author: Satyajit, Ricardo, Jose -->


<!-- Date: Wed Aug 8 13:33:22 2007 -->
<h2>Day 2 of Shutdown PS Work (morning)</h2> 
This morning we finished up NE Bottom.  In crate 16, we completed the loadbox testing of <b>IB4W1</b>.  The BIAS0 voltage trip limits were set fine, but the BIAS1 voltage trip limits were at the maximum of 250 V, so we corrected those.  We also had to change the AVDD/DVDD voltages, they were set to 7.0/5.1 V instead of 7.5/5.6 V.  We then tested <b>IB5W1</b>; again, the BIAS1 trip limits were not set and AVDD/DVDD votlages were too low, so we corrected all of those.  These supplies tested fine and are now cabled to the silicon wedges.  We also cabled up <b>IB4W0</b>.<br> 
We also changed the voltage limits on all L00 supplies in NE Bottom.  This included <b>LB1W1</b> (crate 16), <b>LB1W5</b> (crate 15), <b>LB1W4</b> (crate 15), and <b>LB1W0</b> (crate 15).  The voltage trip limit on ALL channels is now set to <b>250 V</b>.<br> 
Crates 15 and 16 are now DONE, except that the supply for <b>IB4W5</b> (crate 15) needs to be returned from Prep.  All labeling was done for these crates as well.<br> 
Our afternoon plan is to work on NE Top (we hear they may be moving the steel tomorrow...)<br>
<!-- Author: Jen, Jose, Ignacio, Roberto -->
<!-- Comment: Wed Aug  8 20;50;23 comment by...Jen, Jose, Ignacio, Roberto, Oscar -->
<h3>PS Work (afternoon/evening)</h3>
This afternoon we worked on the NE Top crates (SVX crates), removing power supplies with severely drooping low voltages and changing the bias trip limits on L2 and L4 of all SVX supplies from 60 V to 140 V.<br>
Crate 10 went smoothly.  We removed four supplies to send to Prep (<b>IB5W0</b>, <b>SB4W3</b>, <b>SB3W0</b>, and <b>SB3W2</b>).  Those wedges are now blue in PSGui.  The remaining 5 SVX supplies had their bias trip limits changed.  For <b>SB5W3</b>, we also saw that the 2V DOIM was really low (1.68 V) and changed it to the nominal of 1.92 V.  After we finished, the 5 supplies still remaining in the crate were able to be powered without any problems.  The 2V and 5V DOIM currents on <b>SB5W3</b> have dropped because there's now a smaller voltage differential between the 2V and 5V.<br>
Crate 9 did not go so smoothly.  We removed two supplies to send to Prep (<b>SB5W10</b> and <b>SB3W10</b>).  The remaining 8 SVX supplies all had their bias trip limits changed.  We found four supplies with abnormal 2V DOIM voltages:
<ul>
<li> <b>SB3W1</b>: 2V DOIM was low (1.67 V)
<li> <b>SB5W1</b>: 2V DOIM was HIGH (2.12 V)
<li> <b>SB4W10</b>: 2V DOIM was low (1.77 V), 5V DOIM was low (5.33 V)
<li> <b>SB3W11</b>: 2V DOIM was low (1.64 V)
</ul>
All were set to the nominal of 1.92 V for the 2V DOIM (and 5.38 V for the one low 5V DOIM).<br>
When we tried to power the remaining supplies in crate 9, we found two supplies with problems.  <b>SB4W0</b> wouldn't turn on at all.  Upon investigation, it turned out that one of the enable pins in the low voltage cable was slightly bent (pin #20), and as a result the cable was not properly seated on the supply.  After straightening the pin and reseating the cable, this supply is now fine.<br>
The other problem was with <b>SB5W1</b>, he of the abnormally-high-2V-DOIM.  The symptom was the 2V DOIM tripped OverVoltage immediately.  Upon investigation, I found one of the 5V DOIM positive pins (pin #38) in the low voltage connector was badly bent.  It had been pushed INTO the connector, and the tip of the pin pushed flat against the connector base, so the connector appeared to be well-seated on the supply.  After some plier manipulation, I got the pin pulled out and straightened.  However, the supply continued tripping 2V DOIM OvV.  We then tried putting this LV cable on the <b>SB3W1</b> supply.  When we tried to turn on <b>SB3W1</b>, it tripped 5V DOIM OverVoltage!  On returning the cable to <b>SB5W1</b>, it continued tripping 2V DOIM Overvoltage.  I then did a cable probe of the 5V DOIM and 2V DOIM pins on the <b>SB3W1</b> and <b>SB5W1</b> LV connectors.  Both showed the same resistances, namely:
<ul>
<li> 5V DOIM positive-to-negative: ~3.5 MOhm
<li> 5V DOIM positive-to-positive: ~2.7 Ohm
<li> 2V DOIM positive-to-negative: OverLoad
<li> 2V DOIM positive-to-positive: ~2.7 Ohm
</ul>
So it looks like the <b>SB5W1</b> cable connecton to the junction card is still fine.  At this point we need some time to think of how to debug.  It may be that the supply doesn't like the new 2V DOIM voltage setting and that's why it's tripping.  And it may also be that the LV cable no longer makes a good connection with the bent 5V DOIM pin.  But it needs more debugging, and we were too tired to do it tonight.<br>
So, NE corner is <i>almost</i> done...<br>
<!-- Date: Wed Aug 8 14:33:59 2007 -->
<h3> Silicon is OFF </h3> 
Stupid mess! I wanted to switch off the silicon and I asked the cryo to change the set points to -6 C and +10 C, but I forgot to tell him to silence the alarms on Chiller alarms. Of course, both chillers went to alarm which scared me...  
<br>Did I have holidays like one week ago? It does not look like... Now the silicon is OFF.
<!-- Author: Jose -->



<!-- Date: Thu Aug 9 08:39:15 2007 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-11778&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-11778  width='300' align='top'></a></td><td>Yesterday's tripping wedge.</td></tr></table>
<!-- Author: Ignacio -->
<!-- Comment: Thu Aug  9 14;54;30 comment by...Ignacio -->
  I checked that the rest of the DOIM voltages we changed yesterday have been low (or high) since the beginning of the ntuple.
<!-- Date: Thu Aug 9 12:28:23 2007 -->
<h3>Day 3 of PS Shutdown work</h3> 
This morning we asked that the NE CMX arch be left in so that we could look more at <b>SB5W1</b>.  We decided to just swap the supply and see what happened.  So we put in a good spare SVX supply and completed a full loadbox check-out.  Then we cabled it up to the wedge; we tried turning the crate on, but PSGui was having problems.  When we tried to put crate 9 to standby, it gave an error saying it was unable to communicate with 10 of the power supplies in crate 9.  We then tried rebooting svxinter, but PSGui refused to start up again.  Eventually this was traced to having the wrong terminal settings -- Jose/Ignacio/Roberto can add more about that.  In the meantime, we tried turning on the <b>SB5W1</b> 2V and 5V DOIMs from the crate front panel, and they turned on fine!  Once PSGui was fixed, we verified that we could power that wedge and all of crate 9 with no trips.  <b>SB5W1 is back in business!</b><br> 
On another note, we looked around at all the other corners (SE, SW, NW), and realized we can't even access the bottom PS crates with the arches out.  In order to get all supplies fixed and tested in time, we really need to get the bad supplies out before the cooling work begins.  So we talked to Steve and showed him our dilemma, and he's going to talk to Dervin and try to work out a schedule where they put an arch back in and let us complete work in that corner.  For expediency, we will <i>only</i> work on SVX crates.<br>
<!-- Author: Jen, Satyajit, Ignacio, Jose, Roberto -->


<!-- Date: Thu Aug 9 19:25:42 2007 -->
<p><font size=+1> D-mode Calibration Job Started </font>
<p><pre>
Job id            : 479
Calibration type  : standard
Run period tag    : Aug_2007
DPS-off run       : 246145
DPS-on run        : 246143
Requested by      : timo
Main process id   : 29493
Comment           : now it is really final
</pre>
<!-- Author: CDF silicon D-mode calibration job server v1.4 -->



<!-- Date: Fri Aug 10 02:55:43 2007 -->
<h3>Power Outage</h3> 
At 23:50, all lights went off at CDF. Jose got the pages on the alphanumeric pager and called me. Together we re-established flow to the detector (the backup pumps kicked in just fine) and called Steve Hahn to take over. We have also moved the silicon cafe to the control room. At around 1:30, after I spent 15 minutes on the pink mattress, power came back. We re-established flows without major problems. The only problem was the flow switch on the ISL chiller, that I had to hit twice.
<!-- Author: Jose & Ulrich -->


<!-- Date: Fri Aug 10 03:30:15 2007 -->
<h3> Power Outage!!! </h3> 
 
 Today we had the second power outage of the week. I (Jose) was relaxed watching a film when the alphanumeric pager went off. Half a beep followed by a nice symphony that lasted up to I removed the battery. I tried to call the control room but nobody answered (we have gone to no owl shifts). The cryo was there to give the good news of the power outage.  
<br>I called Ulrich and we came in. Ulrich checked that the backup pump was running and reestablished flows on the detector. It was not clear how long the outage was going to be. <br>The MCR did not know what was going and they called <i>Two High Voltage Electricians</i>. 
<pre> 
00:27:50-   The off going crew drove around site a bit on their way out and it looks like the following areas are without power: 
Proton, D0 & CDF Assembly Buildings, CHL, Security, and the Industrial buildings. Feinman appears to be on its emergency generator but is otherwise without power. 
Prem has been informed and is on his way in. - CE 
-- Fri Aug 10 00:38:21 comment by...CE --  ComEd is curious about the outage and would like information as it becomes available. Ed Rivera is our contact. 
-- Fri Aug 10 00:45:17 comment by...je --  Two High Voltage Electricians and a Duty Electrician are on their way in to deal with the power outage. ETA is at least 45 minutes. 
</pre> 
 
Actually, after 45 minutes exactly the power came back. Now everything is back to normal clock, flows, racks and computers. We have reseted caen crates and fibs. But we have not done a Coldstart because the TSI was off. 
<h2>Do not switch on anything without checking that the SRC is working properly</h2>
<!-- Author: Ulrich and Jose -->
<!-- Comment: Fri Aug 10 03;31;45 comment by...Jose -->
It is possible that we will have another power outage tomorrow...
<pre>
02:46:38-   Power has been restored to all affected areas. The line connecting B0 and CHL is faulted and will be addressed tomorrow. - bS
</pre>
probably they will like to fix this.

<!-- Comment: Fri Aug 10 03;41;15 comment by...Jose -->
I did a Coldstart, now TSI is on.


<!-- Date: Fri Aug 10 08:34:19 2007 -->
Dee inform us that there will be no scheadule power outage today. We will start checking SRC.
<!-- Author: Ignacio & Ricardo-->
<!-- Author:  -->
<!-- Comment: Fri Aug 10 09;55;18 comment by...Ricardo/Ignacio -->

<li>Cooling was recovered yesterday to -6,10 setpoints.</li>
<li>svxinter/plc were on.</li>
<li>VRB crates were on.</li>
<li>FIB crates were on.</li>
<li> Clock fan out and CDF clock are OK</li>



<!-- Date: Fri Aug 10 11:15:30 2007 -->
<b>To recover the LA hooked to the GB we have to: </b>
<li>ncdf205 and LA should be off,</li> 
<li>Switch on LA  with ncdf205 off (wait 1 min)</li> 
<li>Switch on ncdf205</li> 
<li>Start LA program</li> 
  
<!-- Author: Ankush & Ignacio -->


<!-- Date: Fri Aug 10 12:07:57 2007 -->
<b>5 V enabeld</b>
<!-- Author: Ignacio -->


<!-- Date: Fri Aug 10 12:20:50 2007 -->
<h3>GB Checkout</h3> 
 
<p>As part of the post-power outage recovery, we checked the GB was functioning correctly.  We checked SVX and then ISL.  The GB reacted correctly.</p> 
 
<p>There is one oddity: 
<ul> 
<li>For SVX, the GB halts after 11 ticks....this is exactly correct.</li> 
<li>For ISL, the GB halts after 22 ticks...not sure why it halting x2 more. </li> 
</ul> 
 
<p>I&#39m sure there is something I am not doing correct. Again my leaky memory is failing me.</p>
<!-- Author: Ankush & Ignacio -->
<!-- Comment: Fri Aug 10 12;22;30 comment by...Ankush -->
<p>I forgot to mention we tried one of the guinea-pig ladder (f840).  It turned on and initialised OK from SVXDAQ.  We tried running it but kept stopping after 17 events....I suspect the GB is responsible for that.</p>

<p>So overall, I think the DAQ is fine....just leaky memory needs to be fixed.</p>

<!-- Date: Fri Aug 10 14:48:24 2007 -->
<p><font size=+1> D-mode Calibration Job Started </font>
<p><pre>
Job id            : 480
Calibration type  : standard
Run period tag    : Aug_2007
DPS-off run       : 246145
DPS-on run        : 246143
Requested by      : Petteri
Main process id   : 19947
Comment           : previous failed to complete due to the power outage, see if we can overwrite the old one
</pre>
<!-- Author: CDF silicon D-mode calibration job server v1.4 -->


<!-- Date: Fri Aug 10 19:40:10 2007 -->
<p><font size=+1> D-mode Calibration Job Finished </font>
<p><pre>
This is a computer-generated silicon D-mode calibration status report.
Silicon D-mode calibration job 480 FAILED.

Job info
--------
Calibration type : standard
DPS-off run      : 246145
DPS-on run       : 246143
Requested by     : Petteri
Submitted        : 2007-08-10 14:48:18
Completed        : 2007-08-10 19:37:08
Status           : FAILURE
Comment          : previous failed to complete due to the power outage, see if we can overwrite the old one

Last processing stage reported : comparing to the reference calibration
Failure diagnostics :
child process exited abnormally
</pre>
<!-- Author: D-mode script  -->


<!-- Date: Fri Aug 10 19:40:10 2007 -->
<p><font size=+1> D-mode Calibration Job Finished </font>
<p><pre>
This is a computer-generated silicon D-mode calibration status report.
Silicon D-mode calibration job 480 FAILED.

Job info
--------
Calibration type : standard
DPS-off run      : 246145
DPS-on run       : 246143
Requested by     : Petteri
Submitted        : 2007-08-10 14:48:18
Completed        : 2007-08-10 19:37:08
Status           : FAILURE
Comment          : previous failed to complete due to the power outage, see if we can overwrite the old one

Last processing stage reported : comparing to the reference calibration
Failure diagnostics :
child process exited abnormally
</pre>
<!-- Author: D-mode script  -->



<!-- Date: Fri Aug 10 20:52:28 2007 -->
<h3> Day 5 of Shutdown PS Work </h3> 
After Dervin moved back the ARCH, we were able to start working on the PS. The NE corner was done during this week, so we went to the other East corner (SE). The corner is almost finished, we have taken out <b>SB3W4, SB4W7, SB5W7, SB4W8, SB4W9 (crate 13) and SB4W5, SB3W6 and SB5W5 (crate 14)</b>. We will send these PS to PREP on Monday. We have changed the trip limits for PS <i>SB3W8, SB5W9, SB5W8, SB3W9 (crate 13) and SB3W5, SB4W4, SB5W6</i>. One PS is still missing SB4W6, we will do this and the check of the crates (now off) early on Monday. We should try to finish with the other two corners on Monday.  
<!-- Author: Saty, Jen, Ricardo, Ignacio, Jose -->
<!-- Comment: Fri Aug 10 21;18;33 comment by...Jose -->
The two crates are blue on IMON. I have disabled the CAEN +5V.

<!-- Comment: Fri Aug 10 23;54;11 comment by...Satyajit -->
While probing the bias trimmers for <b>SB3W7</b> we realized that
the trip limits for L2,3,4 were already bumped up to 170 V. Also
to be noted that modules powering <b>SB4W5</b> (removed today) and
<b>SB3W7</b> have their REF lines bundled together. I have kept 
the former's cable in the toolbox while it visits PREP for repair.

<!-- Comment: Mon Aug 13 00;26;19 comment by...Jen -->
Actually by the count established before, this was <b>Day 4</b>, not day 5.  And the modified limits for SB3W7 were noted in the PS DB on the date this supply was swapped in, on 06/25/07.
<!-- Date: Fri Aug 10 21:52:20 2007 -->
<p><font size=+1> D-mode Calibration Job Started </font>
<p><pre>
Job id            : 481
Calibration type  : standard
Run period tag    : Aug_2007
DPS-off run       : 246145
DPS-on run        : 246143
Requested by      : petteri
Main process id   : 2960
Comment           : blaaaah
</pre>
<!-- Author: CDF silicon D-mode calibration job server v1.4 -->



<!-- Date: Sat Aug 11 02:35:47 2007 -->
<p><font size=+1> D-mode Calibration Job Finished </font>
<p><pre>
This is a computer-generated silicon D-mode calibration status report.
Silicon D-mode calibration job 481 FAILED.

Job info
--------
Calibration type : standard
DPS-off run      : 246145
DPS-on run       : 246143
Requested by     : petteri
Submitted        : 2007-08-10 21:52:16
Completed        : 2007-08-11 02:34:48
Status           : FAILURE
Comment          : blaaaah

Last processing stage reported : comparing to the reference calibration
Failure diagnostics :
child process exited abnormally
</pre>
<!-- Author: D-mode script  -->
<!-- Comment: Sat Aug 11 10;24;55 comment by...Petteri -->
<pre>I forgot that we have a nice tool to recover the failed calibration! Doing it from the scratch was not succesfull, but using the recovery script on the partly finished job 479 did the job.

The job 479 was partly written in the database, but due to poweroutage, some parts were missing still. Now, after recovery, it is fine. We will investigate if the initial problems that the SVX_Z side failed in the comparison with the reference was due to high luminosity during the calibration run or due to some particular ladders.</pre>


<!-- Date: Sat Aug 11 10:31:44 2007 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-11779&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-11779  width='300' align='top'></a></td><td>Temperature change in the West SVX vacuum jacket temperatures. This seem to be correlated with the attempt to reduce the collision hall humidity. I don't think we have to worry about this too much, as it is only a small change. If the vacuum line breaks I would guess the temperatures drop much stronger.</td></tr></table>
<!-- Author: Ulrich -->
<!-- Comment: Sat Aug 11 10;49;29 comment by...Ulrich -->
<pre>We see a similar temperature drop on the East side, too, but starting at a higher temperature.</pre>

<!-- Comment: Sat Aug 11 21;42;59 comment by...Ulrich -->
Warren ended the collision hall humidity test around 17:00 today, and the last SVX vacuum jacket temperature went out of warning around 18:15.



<!-- Date: Mon Aug 13 08:40:58 2007 -->
<b>We will not have our weekly Monday meeting today due to shutdown work.</b>
<!-- Author: Ignacio -->