<!-- Title: 09:31:52  Sun Dec 29 2002 -->
<!-- Crewchief: Gino -->
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<!-- Notes: -->
<pre>New week New File</pre>


<!-- Date: Sun Dec 29 09:33:06 2002 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1213&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1213  width='300' align='top'></td><td>Regular SVT plot for run #155895 in store #2113</a></td></tr></table>
<!-- Author: Gino -->
<!-- Comment: Sun Dec 29 09;59;43 comment by...Gino -->
<pre>
Here are the numbers from Bill's script
           W0   W1   W2   W3   W4   W5   W6   W7   W8   W9   WA   WB
rate_B0    37*  65   89   90   85  100    0*  80   63   85   83   41*
rate_B1    96  100   70   79    0*   0*  95    0*  79   96   67   98 
rate_B2    78   88   88  100   92   62   71   63   85   70    0*  87 
rate_B3    76   85   72  100   94   90   83   69   78   77   72   69 
rate_B4    76   76   84  100   97   97   37*  74   91   87   59*  78 
rate_B5    76   98   96  100    0*  90   91   81   88   83   87   96 
dead 6 B0W6 B1W4 B1W5 B1W7 B2WA B5W4
ineff 4 B0W0 B0WB B4W6 B4WA
All this should be compared with the <a href=
'http://www-cdfonline.fnal.gov/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=135&frame=2&anchor=07:13:17'>last similar report</a> 

<b> COMMENTS:</b>
<LI>SB0W1 occupancy is higher probably due to <a href=
'/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=136&frame=2&anchor=17:27:48'>this work </a> </LI>
<LI>SB0W8 occupancy is higher for reasons unknown to me</LI>
<LI>SB4W8 is back to life due to the <a href=
'http://www-cdfonline.fnal.gov/cgi/elog/elog.pl?nb=2002&action=view&page=1082&frame=2&anchor=19:30:45'>SVT work on 3/3 </a> </LI>
<LI>Other differences seems negligible to me</LI>

</pre>


<!-- Date: Sun Dec 29 10:00:15 2002 -->
<pre>  Temperature for the RTD ISL_TE_CCE1_1OUT  
went up to 18.79 C once we powered the ISL. 
The history shows clearly that this is  
chiller dependant... Looking at the history plots  
from dec 11, 2002 when we were running with  
the spare chiller I see the same magic number  
18.79 C for this RTD.  
  Also ISL_TE_CCE1_3IN reads 22.47 C  
(an increase by 0.2 C after the 
chiller change); same value was read on  
dec 11, 2002. Till now we blamed the RTD for  
strange behaviour, which doesn't seem to be true! 
  For now me and Gino propose to ignore  
the warning in GAP (Global 
Alarm Page) and keep a close eye on this  
RTD (ISL_TE_CCE1_1OUT ). Also I raised the trip  
limit for ISL CCs from 20 C to 20.5 C to give a  
larger margin before the trip. 
 </pre>
<!-- Author: Mircea N Coca -->
<!-- Comment: Mon Dec 30 10;45;51 comment by...Andy H. -->
<p>Three comments:</p>
<ol>
<li>ISL_TE_CCE1_1OUT is on a "partially" cooled line and is quite
sensitive to whether or not the ISL chips have been initialized.
<li>I think CCE1.1 tends to get air bubbles trapped inside it when we switch chillers around -- diddling with the CCE1 and CCE2 valves can sometimes help work them out.
<li>ISL_TE_CCE1_3IN is on a blocked line -- it basically reports
the ambient temperature, so a change of 0.2 deg C is nothing too
significant.
</ol>
<!-- Date: Sun Dec 29 10:11:03 2002 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1214&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1214  width='300' align='top'></td><td>CCEast1 Temps in the last few hours.</a></td></tr></table>
<!-- Author: Mircea Coca -->


<!-- Date: Sun Dec 29 10:17:43 2002 -->
<center><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1215&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1215' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1216&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1216' width='300'></a></center>
<!-- Author: Mircea Coca -->


<!-- Date: Sun Dec 29 10:24:57 2002 -->
<pre>Two comments: 
1. I changed the LT-AIRSEP(Level of water in the AIRSEP) to 15 
in from 10 in. This will help us spot any similar problem in the  
future quick enough before we loose 40-50 gallons of water. 
2. The pressure in the AIRSEP is still higher than the expected  
one: 1.2 psia. Keep an eye on it ! 
 </pre>
<!-- Author: Mircea N. Coca -->

<!-- Date: Sun Dec 29 17:17:32 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB2W4L1 
<li>problem n: 835 
<li>Status: needs_observation
<li>Action: IMON_limits
<li>entered by: bolla 
<li>description is: <pre>Changed upper limit from 525 to 530 mA.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B2W4&layer=L1">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Sun Dec 29 17:25:57 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB2W4L1 
<li>problem n: 835 
<li>Status: fixed
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <pre>no digital errors from svxmon.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B2W4&layer=L1">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Sun Dec 29 17:28:01 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W0L0 
<li>problem n: 604 
<li>Status: needs_study_time
<li>Action: Monitoring
<li>entered by: bolla 
<li>description is: <pre>yellow in SVXMon. we should look at it now that it had low current for a while.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W0&layer=L0">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Mon Dec 30 06:46:33 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: IB0W3L4 
<li>problem n: 836 
<li>Status: needs_observation
<li>Action: IMON_limits
<li>entered by: bolla 
<li>description is: <pre>changed upper limit on Ibias from 15 to 20 uA.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=ISL&wedge=B0W3&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Mon Dec 30 06:46:33 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: IB0W3L4 
<li>problem n: 836 
<li>Status: needs_observation
<li>Action: IMON_limits
<li>entered by: bolla 
<li>description is: <pre>changed upper limit on Ibias from 15 to 20 uA.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=ISL&wedge=B0W3&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Mon Dec 30 08:34:49 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB3W2L0 
<li>problem n: 766 
<li>Status: needs_observation
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <pre>There has been a clear improvement:
 NO MORE HRR from SVXMON for this guy
Still the problem looks like a OBDV trouble.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B3W2&layer=L0">report</a></ul>
<!-- Author: Problem DB -->



<!-- Date: Mon Dec 30 15:15:38 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: LB1W5L3 
<li>problem n: 690 
<li>Status: needs_observation
<li>Action: Monitoring
<li>entered by: johnzhou 
<li>description is: The capid problem now occurs in more than 50% of the physics runs. Most with error rate > 10%. 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=L00&wedge=B1W5&layer=L3">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Mon Dec 30 15:40:19 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB4W10L4 
<li>problem n: 674 
<li>Status: needs_observation
<li>Action: Monitoring
<li>entered by: johnzhou 
<li>description is: Problem persists. 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B4W10&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Mon Dec 30 15:58:44 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB0W10L1 
<li>problem n: 837 
<li>Status: needs_work
<li>Action: Monitoring
<li>entered by: johnzhou 
<li>description is: DRO on the z-side. Occasioinally has z-side but with wrong capid and missing chip a1. Rate becomes single digit since run 155298 (12/12/02). 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B0W10&layer=L1">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Mon Dec 30 18:14:44 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB4W9L4 
<li>problem n: 332 
<li>Status: unfixable
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: No more trouble since Rdriver changes. 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B4W9&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Mon Dec 30 18:14:44 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB4W9L4 
<li>problem n: 332 
<li>Status: unfixable
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: No more trouble since Rdriver changes. 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B4W9&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Mon Dec 30 18:25:12 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB4W10L4 
<li>problem n: 674 
<li>Status: needs_observation
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <pre>Problem was inserted by second RDRIVER changes Similar to SB4W9L4
Changed RDRIVER 
from 2 to 4 on PHI side
from 4 to 0 on Z side (already a broken Jumper)
Let's see how it goes.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B4W10&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Mon Dec 30 18:26:35 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB4W10L4 
<li>problem n: 674 
<li>Status: needs_observation
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <pre>Problem was inserted by second RDRIVER changes Similar to SB4W9L4
Changed RDRIVER 
from 2 to 4 on PHI side
from 4 to 0 on Z side (already a broken Jumper)
Let's see how it goes.
Last run with old settings is 155919.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B4W10&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Mon Dec 30 18:51:12 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB0W10L1 
<li>problem n: 837 
<li>Status: needs_observation
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <pre>Changed RDRIVER from 4 to 7 for all chips.
Last run with old setting is 155919.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B0W10&layer=L1">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Mon Dec 30 19:14:00 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB5W7L0 
<li>problem n: 661 
<li>Status: fixed
<li>Action: Monitoring
<li>entered by: bolla 
<li>description is: <pre>SUPERFIB DID A GREAT JOB. FIXED</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B5W7&layer=L0">report</a></ul>
<!-- Author: Problem DB -->



<!-- Date: Mon Dec 30 19:45:48 2002 -->
<table><tr><td><a href=/elog/notebooks/silicon/Mon_Dec_30_2002_194536.ps align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1218  align='top'></td><td>SB3W1L4: I'm changing the thresholds in a chip by chip basis in order to cope with the HIGH READOUT TIME. This is to be consider an experiment and must be reviewed in a couple of days. I promise I will do it.</a></td></tr></table>
<!-- Author: Gino -->
<!-- Comment: Mon Dec 30 20;16;09 comment by...Gino Bolla -->
<pre>Last RUN before the changes 155919.
</pre>
<!-- Comment: Wed Jan  1 15;10;49 comment by...Gino -->
To see the impact on the readout time due to this changes 
compare this 
<a href= "http://nucsb03.fnal.gov/cgi-bin/readoutocc?RUN=ar0260f9.0001">RUN 155897 </a> 

with this other

<a href= "http://nucsb03.fnal.gov/cgi-bin/readoutocc?RUN=ar02615c.0001">RUN 155996 </a>
<!-- Comment: Wed Jan  1 16;28;11 comment by...Gino -->
<pre>Doing a second pass:
SB3W1L4 Side PHI chip changed threshold from 9 to 10
SB3W1L4 Side PHI chip changed threshold from 9 to 10
SB3W1L4 Side PHI chip changed threshold from 10 to 11
SB3W1L4 Side PHI chip changed threshold from 10 to 11
SB3W1L4 Side PHI chip changed threshold from 11 to 12
SB3W1L4 Side PHI chip changed threshold from 12 to 13
SB3W1L4 Side PHI chip changed threshold from 10 to 11 
SB3W1L4 Side Z chip changed threshold from 9 to 10
SB3W1L4 Side Z chip changed threshold from 9 to 10
SB3W1L4 Side Z chip changed threshold from 9 to 10
SB3W1L4 Side Z chip changed threshold from 10 to 11
SB3W1L4 Side Z chip changed threshold from 14 to 15
SB3W1L4 Side Z chip changed threshold from 10 to 11
SB3W1L4 Side Z chip changed threshold from 11 to 12

Last run with OLD setting is 156002.</pre>
<!-- Comment: Sat Jan  4 07;39;07 comment by...Gino -->
<pre>Doing a third pass (only on PHI side:
SB3W1L4 Side PHI chip changed threshold from 10 to 11
SB3W1L4 Side PHI chip changed threshold from 10 to 11
SB3W1L4 Side PHI chip changed threshold from 11 to 12
SB3W1L4 Side PHI chip changed threshold from 11 to 12
SB3W1L4 Side PHI chip changed threshold from 12 to 13
SB3W1L4 Side PHI chip changed threshold from 13 to 14
SB3W1L4 Side PHI chip changed threshold from 11 to 14 

</pre>
<!-- Comment: Sat Jan  4 07;40;41 comment by...Gino -->
<pre>Last run with old data 156099.</pre>
<!-- Date: Mon Dec 30 19:48:03 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB3W1L4 
<li>problem n: 80 
<li>Status: needs_observation
<li>Action: Monitoring
<li>entered by: bolla 
<li>description is: Thresholds changed in a chip by chip basis according to <a href= 'http://www-cdfonline.fnal.gov/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=137&frame=2&anchor=19:45:48'>this document </a>  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B3W1&layer=L4">report</a></ul>
<!-- Author: Problem DB -->



<!-- Date: Mon Dec 30 20:02:00 2002 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1220&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1220  width='300' align='top'></td><td>mean strip charge for one of the layers of IB2W1. </a></td></tr></table>
<!-- Author: cigdem  -->
<!-- Comment: Mon Dec 30 20;11;25 comment by...cigdem -->
<pre>This wedge, IB2W1_all, is causing problems today the whole day.
It is causing now and than HRR runs, 3-5 each separated by 
2min. 
I looked at SVXMON into the data we see. I do observe, that 
all phi-side of this wedge do have high mean strip charge up to 
200 as shown in the above example over nearly all channels. 
The strip RMS charge distributions for the phi sides do have 
also a range between 20-100. 
The strip occupancy of the phi-sides are jumping on a 10-15min
time scale from 2 to 10 and back to 2. 
In the problem database and in the bit reporter I see that 
this wedge has wedgewide stuck cell id, permanent stuck cell and
stuck ladder.

AVDD and DVDD currents of the layers are fine, except of the
spikes, which in parallel with the HRR. 

AVDDL0  975mA
    L1  1015mA
    L2  995 mA
    L3  992 mA
    L4  990 mA

DVDDL0-L4  ~335-350mA

I contacted David Stuart and described him the sympthoms. 
He thinks it is a FIB or FTM related problem, where the detector
is receiving buggy data and this may cause damage to the detector. 
We decided to take this wedge out of the hardware db and will 
ask to swap the FIB/FTM asap. 

</pre>



<!-- Comment: Tue Dec 31 07;43;24 comment by...SCN -->
What about IB2W0 i.e. the wedge that shares the same FIB/FTM?
Does it show any odd symptoms?  From a look at the PDB and elogs,
I see the Fib has been swapped on 7/12 (Out 126/560611 In 105 550267) 7/22 (Out 105/550267 In 126/560611) and 7/30 (Out 126/560611 In 133/560618) whereas the FTM had an RX swap 
on 11/25.  From the <a href='http://nkek15.fnal.gov/cgi-bin/errmon/makepage.pl?beginrun=30_days_ago&endrun=today&errors=All_unpacker_and_cellid&least_rate=1&least_freq=0&least_event=100&namefilter=IB2W%280%7C1%29L*'>bitreporter</a> it is pretty clear that the wedgewide problems start when the IB2W0 L4 problems are fixed.  I guess either we damaged a backplane pin or didn't reconnect the timing cable very well.
<!-- Date: Tue Dec 31 05:49:25 2002 -->
<pre>Quenched during termination of Store 2114 at F4I at 4:34am. 
Silicon was at Standby.  
No Trips.  
I did the post-Quench checkout. 
 
1) RC all fibs init. 
2) No pinkies in IMON. 
3) L00 crowbars are fine. 
 
</pre>
<!-- Author: cigdem -->



<!-- Date: Tue Dec 31 12:37:18 2002 -->
<pre>Quench at 12:25 as they were preparing for scraping. 
Quench was at A11U and A11L.  
 
Did the post-quench checkout.  
 
Everything is initializing. 
No L00 crowbars are blown.  
NO Imon pinkies.  
 
</pre>
<!-- Author: cigdem -->


<!-- Date: Tue Dec 31 14:46:57 2002 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1221&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1222  width='300' align='top'></td><td>I Avdd for SB3W6L4 which had a change in a prefire.  This is Oct-Dec of 2002, incident was on 679, 11 Nov. Seems stable but... higher. No other symptoms seem to  have come up.  </a></td></tr></table>
<!-- Author: Lester -->


<!-- Date: Tue Dec 31 14:55:30 2002 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1223&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1224  width='300' align='top'></td><td>IAvdd for SB3W7L2 which went from 845 to 825 after 11 Nov prefire. Seems to have recovered a few days later. <br> No errors have shown up otherwise. </a></td></tr></table>
<!-- Author: Lester -->


<!-- Date: Tue Dec 31 15:36:14 2002 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1225&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1226  width='300' align='top'></td><td>SB4W5L1 DVDD. Red is voltage time 10, black is current.<br> Listed as not having a demand current, but works fine.<br> Looks like this guy never read back a current except  on very special occasions.   </a></td></tr></table>
<!-- Author: Lester -->


<!-- Date: Tue Dec 31 15:54:04 2002 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1227&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1228  width='300' align='top'></td><td><b>Who says prefires are all bad?</b><br> IAvdd for SB5W5L4. <br> This guy had a change of current during the prefire on 679  (11 Nov). Seems stable and slightly higher. Behaviour of  ladder was unchanged. Chip A4 had problems previously since  14 Aug. (ds day 590). <br> Temperature change. Hah. Now a superfib swap took care of that. So this ladder is OK.  </a></td></tr></table>
<!-- Author: Lester -->


<!-- Date: Tue Dec 31 16:27:03 2002 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1229&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1230  width='300' align='top'></td><td>IB4W2L0 Ibias0 for last three months. It was noted to have zero current around 6 Dec.(days 704), this looks like normal behaviour. </a></td></tr></table>
<!-- Author: Lester -->

<!-- Date: Tue Dec 31 16:28:31 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB3W8L4 
<li>problem n: 737 
<li>Status: fixed
<li>Action: Action_request
<li>entered by: cigdem 
<li>description is: <pre>Init readback of this ladder unmasked. 
It is initiliazing successful in SVXDAQ. </pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B3W8&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Tue Dec 31 16:32:25 2002 -->
Entered in Silicon database: <ul>
<li>Ladder: SB4W7L2 
<li>problem n: 537 
<li>Status: fixed
<li>Action: Action_request
<li>entered by: cigdem 
<li>description is: <pre>Init readback of this ladder unmasked during quite time. 
Initiliazed in SVXDAQ succesfully.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B4W7&layer=L2">report</a></ul>
<!-- Author: Problem DB -->



<!-- Date: Tue Dec 31 16:34:45 2002 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1231&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1232  width='300' align='top'></td><td>IB5W2L2 IBias0 for Oct-Dec 2002. Was noted around Dec 6 (days 704) to have 0 current. Seems like f420 above to be normal. ADCMon and digital errors are fine. </a></td></tr></table>
<!-- Author: Lester -->


<!-- Date: Tue Dec 31 16:36:22 2002 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1233&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1234  width='300' align='top'></td><td>IB5W3L4 Bias0 current for Oct-Dec 2002.<br> Like f420 and f522, bias0 for this ladder was 0 in early  december. Ladder seems fine. </a></td></tr></table>
<!-- Author: Lester -->


<!-- Date: Wed Jan 1 02:52:03 2003 -->
<pre>Silicon is on, we are taking data.</pre>
<!-- Author: cigdem -->


<!-- Date: Wed Jan 1 14:38:56 2003 -->
<pre>f442 or IB4W4L2 
12:08:31 current AVDD jump from 1045 to 1210 
12:09:37 PM, Event 9081, RunNum 155997: SvxMon HRR: Stuck Cellid /I/B4/W4/L0/C4-7  
Ladder initialized well at 12:09:47  
12:11:01 current AVDD jump to 1360 
12:12:12 PM, Event 9123, RunNum 155997: SvxMon HRR: Stuck Cellid /I/B4/W4/L0/C4-7 
		 First Failure during initialization is at 12:12:21 
12:12:21 CST : 1041444741 Init Fib f442 hdi 2 ERRORS: tried 16 chip 
	         Always failed since then. 
12:14:52 PM, Event 9168, RunNum 155997: SvxMon HRR: Stuck Cellid /I/B4/W4/L2/C8-11 
		 More of this GUYS. 
12:30:58  Powered OFF 
12:32:33  Powered back STDBY 
	 2027 changed current from 0.000000 to 1360.000000 on Wed Jan  1 12:32:33  
13:00:55  Powered OFF 
	 2027 changed current from 1375.000000 to 0.000000 on Wed Jan  1 13:00:55  
13:01:26  Powered back STDBY 
         2027 changed current from 0.000000 to 1485.000000 on Wed Jan  1 13:01:26  
	 Layer 0 AVDD goes up from 0 to 1230 mA this is the handshake 
	 Layer 4 AVDD goes up from 0 to 1230 mA this is the handshake 
 
13:01:35 2027  0 -32765     7.52  1490.00  
13:01:54 2027  0 -32765     7.52  1375.00  
13:03:09 CST : 1041447789 Init Fib f442 hdi 2 ERRORS: tried 16 chips:  
13:07:58 CST : 1041448078 Init Fib f442 hdi 2 ERRORS: tried 16 chips:  
13:18:41 CST : 1041448721 Init Fib f442 hdi 2 ERRORS: tried 16 chips:  
13:22:59 CST : 1041448979 Init Fib f442 hdi 2 ERRORS: tried 16 chips:  
13:25:26 2027  0 -32765     7.52  1270.00  
13:25:36 2027  0 -32765     7.52  1375.00  
13:26:49 CST : 1041449209 Init Fib f442 hdi 2 ERRORS: tried 16 chips:  
13:37:08  Powered OFF 
         2027 changed current from 1375.000000 to 0.000000 on Wed Jan  1 13:37:08  
 
</pre>
<!-- Author: Gino -->
<!-- Comment: Wed Jan  1 16;25;23 comment by...cigdem -->
<pre>See also for a summary of what happened &lt;a href=
'http://www-cdfonline.fnal.gov/cgi/elog/elog.pl?nb=2003&action=view&page=2&frame=2&anchor=16:03:42'&gt;
see elog &lt;/a&gt; </pre>
<!-- Comment: Wed Jan  1 16;27;17 comment by...cigdem -->
<pre>&lt;a href=
'http://www-cdfonline.fnal.gov/cgi/elog/elog.pl?nb=2003&action=view&page=2&frame=2&anchor=16:03:42'&gt;
I ment this link, to the elog. &lt;/a&gt; 
</pre>
<!-- Comment: Thu Jan  2 08;04;26 comment by...SCN -->
Note:  For the "Init Fib" messages for f442, it is telling you
in the "2 ERRORS" part  that only 2 bits out of 16x192 are not what is expected.  I would niavely guess this is a bit error rather than something else, but one could check by looking in detail at the errors to see if it was always the same 2 bits and which 2 bits it was (It is all in the logfile).
<!-- Date: Wed Jan 1 15:18:11 2003 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1236&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1236  width='300' align='top'></td><td>This is the strip mean charge ofL0 of  IB4W4, als an example for the other layers.  The Z-side of this wedge looked grassy.  </a></td></tr></table>
<!-- Author: cigdem -->


<!-- Date: Wed Jan 1 15:54:01 2003 -->
<pre>During the stores, I reintraged f44_all (except L1,L3, they were out before).  
And was able initialized L0,L2,L4 without any problems in  
SVXDAQ. 
I see no dead chips in the histogramms, see below.  
</pre>
<!-- Author: cigdem -->


<!-- Date: Wed Jan 1 16:17:42 2003 -->
<center><a href='/elog/notebooks/silicon/Wed_Jan__1_2003_161630.ps'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1243' ></a><a href='/elog/notebooks/silicon/Wed_Jan__1_2003_161646.ps'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1245' ></a><a href='/elog/notebooks/silicon/Wed_Jan__1_2003_161656.ps'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1247' ></a></center>
<!-- Author: cigdem -->
<!-- Comment: Wed Jan  1 16;22;51 comment by...cigdem -->
<pre>svxdaq histos for f440,f442 and f444. 

I also could run rc and take some SVXCal data with f44_all 
integrated, which was not possible as I decided to take out 
this wedge from the hardware DB at the end of the last store. 
I don't yet understand what caused the problems in RC last time 
( we couldn't run RC with this wedge integrated we got
&lt;a href=
'http://www-cdfonline.fnal.gov/cgi/elog/elog.pl?nb=2003&action=view&page=2&frame=2&anchor=13:21:55'&gt;
,see elog&lt;/a&gt; )

We decided to leave this wedge in for the next store and see
if the problems with the HRR will reappear. 
</pre>





<!-- Date: Wed Jan 1 16:41:08 2003 -->
<center><a href='/elog/notebooks/silicon/Wed_Jan__1_2003_163926.ps'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1249' ></a></center>
<!-- Author: Gino -->
<!-- Comment: Wed Jan  1 16;41;55 comment by...Gino -->
<pre>SB3W10L4: I'm changing the thresholds in a chip by chip basis in order to cope
with the HIGH READOUT TIME. This is to be consider an experiment and must be reviewed in a
couple of days. I promise I will do it.</pre>


<!-- Comment: Fri Jan  3 09;29;41 comment by...Gino -->
<pre>Last Run with old setting is 156002.</pre>
<!-- Comment: Fri Jan  3 09;41;27 comment by...Gino -->
<pre>&gt;&lt;pre&gt; No big Impact on SVT, Here are the numbers after the changes (run 156082): 

           W0   W1   W2   W3   W4   W5   W6   W7   W8   W9   WA   WB
rate_B0    38*  61   90   90   86  100    0*  81   60*  85   84   42*
rate_B1    95  100   85   94    0*   0*  95    0*  78   95   66   97 
rate_B2    79   89   88  100   85   61   71   62   86   70    0*  88 
rate_B3    77   87   73  100   94   91   83   69   79   77   70   68 
rate_B4    77   77   86  100   98   97   37*  75   92   88   69   79 
rate_B5    78   98   96  100    0*  90   93   83   88   85   87   96 
dead 6 B0W6 B1W4 B1W5 B1W7 B2WA B5W4
ineff 4 B0W0 B0W8 B0WB B4W6



To be compared with the numbers from Before &lt;a href= 'http://www-cdfonline.fnal.gov/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=137&frame=2&anchor=09:33:06'&gt;155895 &lt;/a&gt; 
Basically from 72 to 70 (whatever this means). &lt;/pre&gt; </pre>
<!-- Date: Wed Jan 1 16:55:04 2003 -->
<table><tr><td><a href=/elog/notebooks/silicon/Wed_Jan__1_2003_165455.ps align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1251  align='top'></td><td>SB5W2L2: I'm changing the thresholds in a chip by chip basis in order to cope with the HIGH READOUT TIME. This is to be consider an experiment and must be reviewed in a couple of days. I promise I will do it.</a></td></tr></table>
<!-- Author: Gino -->
<!-- Comment: Fri Jan  3 09;30;01 comment by...Gino -->
<pre>Last Run with old setting is 156002.</pre>
<!-- Comment: Fri Jan  3 09;35;18 comment by...Gino -->
<pre>
No big Impact on SVT, Here are the numbers after the changes (run 156082):

           W0   W1   W2   W3   W4   W5   W6   W7   W8   W9   WA   WB
rate_B0    38*  62   91   90   86  100    0*  81   59*  86   85   42*
rate_B1    95  100   85   93    0*   0*  95    0*  78   96   66   97 
rate_B2    79   89   88  100   85   61   71   62   85   69    0*  88 
rate_B3    77   87   73  100   94   91   84   69   79   77   70   68 
rate_B4    78   77   86  100   98   97   37*  75   92   88   69   79 
rate_B5    78   98   96  100    0*  90   93   84   88   85   88   97 
dead 6 B0W6 B1W4 B1W5 B1W7 B2WA B5W4
ineff 4 B0W0 B0W8 B0WB B4W6

To be compared with the numbers from Before <a href=
'http://www-cdfonline.fnal.gov/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=137&frame=2&anchor=09:33:06'>155895 </a> 
Basically from 96 to 96 (whatever this means).
</pre>



<!-- Date: Wed Jan 1 17:03:15 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB3W10L4 
<li>problem n: 839 
<li>Status: needs_observation
<li>Action: Diagnosis
<li>entered by: bolla 
<li>description is: Changed thresholds in a chip by chip basis according to this <a href= 'http://www-cdfonline.fnal.gov/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=137&frame=2&anchor=16:41:08'>document </a>     
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B3W10&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Wed Jan 1 17:03:58 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB5W2L2 
<li>problem n: 738 
<li>Status: needs_observation
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: changed thresholds in a chip by chip basis according to this <a href= 'http://www-cdfonline.fnal.gov/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=137&frame=2&anchor=16:55:04'>document </a>  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B5W2&layer=L2">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Wed Jan 1 17:45:59 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB4W10L4 
<li>problem n: 674 
<li>Status: needs_observation
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <pre>Changed PHI RDRIVER from 4 to 7. No much changes induced by the previous step. The DVDD jumper is already lost so no increase of risk.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B4W10&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Wed Jan 1 18:13:59 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W0L0 
<li>problem n: 604 
<li>Status: needs_study_time
<li>Action: Monitoring
<li>entered by: bolla 
<li>description is: <pre>NOT ENOUGH TIME IN BETWEEN THESE STORES TO REALLY STUDY IT.
I POWER CYCLED IT WITHOUT ANY EFFECT ON THE AVDD CURRENT CONSUMPTION.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W0&layer=L0">report</a></ul>
<!-- Author: Problem DB -->



<!-- Date: Wed Jan 1 19:58:50 2003 -->
<pre>IB4W4 or f442 is making again troubles.  
The integrated Layers L0,L2,L4 do have DVVD currents jumping 
up, which cured by automatic HRR.  
I have decided to take this wedge out, because I am afraid 
we are damaging it.  
It is now taken out of the DB and I waiting for a Coldstart.  
Meanwhile I will look at its occupancy plots.  
</pre>
<!-- Author: cigdem -->
<!-- Comment: Wed Jan  1 21;56;51 comment by...cigdem -->
<pre>I asked for a coldstart and loaded the caenvolts dat to 
take out this wedge. 
Layer 2 started to have again (like last time today) to have
its AVDD pink in IMON.
The data don't look healty...and I did not want to wait longer. 
</pre>
<!-- Date: Wed Jan 1 20:02:31 2003 -->
<center><a href='/elog/notebooks/silicon/Wed_Jan__1_2003_200146.ps'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1255' ></a><a href='/elog/notebooks/silicon/Wed_Jan__1_2003_200125.ps'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1253' ></a><a href='/elog/notebooks/silicon/Wed_Jan__1_2003_200158.ps'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1257' ></a></center>
<!-- Author: cigdem -->
<!-- Comment: Wed Jan  1 20;10;12 comment by...cigdem -->
<pre>The first step up in DVDD current: I am turning them on to run
                                   SVXDAQ and RC. 
The Silicon was powered on at 18:55.

</pre>

<!-- Comment: Wed Jan  1 20;11;03 comment by...cigdem -->
<pre>"turning them on", I mean I turn them to standby. </pre>


<!-- Comment: Wed Jan  1 20;16;07 comment by...cigdem -->
<pre>By the way, these are the DVDD currents of f440,f442 and f444. 
Or IB4W4L0,IB4W4L2,IB4W4L4.</pre>
<!-- Date: Wed Jan 1 20:14:14 2003 -->
<pre>Meanwhile SB5W7 turned off at 20:07:17. 
The PSGui tells me: 
 
Illigal condition: Portcard Off, Ladder on, turning off SVX B5 W7 
 
I never saw this?</pre>
<!-- Author: cigdem -->



<!-- Date: Wed Jan 1 21:02:17 2003 -->
<center><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1258&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1258' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1259&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1259' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1260&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1260' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1261&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1261' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1262&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1262' width='300'></a></center>
<!-- Author: cigdem -->
<!-- Comment: Wed Jan  1 21;03;08 comment by...cigdem -->
<pre>mean strip charge and strip occupancy for f440. </pre>


<!-- Date: Wed Jan 1 21:06:14 2003 -->
<center><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1263&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1263' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1264&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1264' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1265&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1265' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1266&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1266' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1267&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1267' width='300'></a></center>
<!-- Author: cigdem -->
<!-- Comment: Wed Jan  1 21;06;59 comment by...cigdem -->
<pre>mean strip charge and strip occupancy for f442.</pre>


<!-- Date: Wed Jan 1 21:08:41 2003 -->
<center><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1268&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1268' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1269&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1269' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1270&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1270' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1271&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1271' width='300'></a></center>
<!-- Author: cigdem -->
<!-- Comment: Wed Jan  1 21;09;26 comment by...cigdem -->
<pre>mean strip charge and strip occupancy for f444.</pre>


<!-- Date: Wed Jan 1 23:43:43 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB0W6L3 
<li>problem n: 84 
<li>Status: unfixable
<li>Action: Diagnosis_update
<li>entered by: cigdem 
<li>description is: I set the rdriver of chip a0 from 4 to 0.  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B0W6&layer=L3">report</a></ul>
<!-- Author: Problem DB -->



<!-- Date: Wed Jan 1 23:44:57 2003 -->
<pre>rdriver of e242 of chip a0,a1,a2,a4 set from 4 to 0. </pre>
<!-- Author: cigdem -->

<!-- Date: Thu Jan 2 00:16:56 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: IB1W2L2 
<li>problem n: 424 
<li>Status: fixed
<li>Action: Monitoring
<li>entered by: cigdem 
<li>description is: Changed IMON limit from 435mA to 440mA.    
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=ISL&wedge=B1W2&layer=L2">report</a></ul>
<!-- Author: Problem DB -->



<!-- Date: Thu Jan 2 08:54:38 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB0W1L1 
<li>problem n: 825 
<li>Status: needs_observation
<li>Action: Monitoring
<li>entered by: bolla 
<li>description is: <pre>After RDRIVER changes things look much better. Still BIT2 LOW on CAPID of chip 83 at the 1 % level. NOT WORTH ANY ACCESS ACTION YET.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B0W1&layer=L1">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Thu Jan 2 08:59:58 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB0W10L1 
<li>problem n: 837 
<li>Status: needs_observation
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <pre>Things look way better now. Few more days and then like this and then declare it fixed.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B0W10&layer=L1">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Thu Jan 2 09:08:15 2003 -->
<p><font size=+1> D-mode Calibration Job Started </font>
<p><pre>
Job id            : 227
Calibration type  : standard
Run period tag    : Jan_2003
DPS-off run       : 155922
DPS-on run        : 155921
Requested by      : Jason Nielsen
Main process id   : 2983348
Comment           : Resubmit after problems with web script
</pre>
<!-- Author: CDF silicon D-mode calibration job server v1.3 -->
<!-- Comment: Thu Jan  2 10;35;17 comment by...Jason -->
The web script problems were due to fcdfsgi2 being down when the shift crew tried to submit the job.  (The CGI script tries to connect to a job server running on fcdfsgi2.)

<!-- Date: Thu Jan 2 12:56:09 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W2L4 
<li>problem n: 782 
<li>Status: needs_observation
<li>Action: Incident
<li>entered by: bolla 
<li>description is: <pre>With svxdaq the ladder works well only with RDRIVER of 7. ANy other setting gives errors. RDRIVER CHANGED back to 7 everywhere.
LEt's see how it goes. Last Run with old setting is 156007.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W2&layer=L4">report</a></ul>
<!-- Author: Problem DB -->



<!-- Date: Thu Jan 2 13:17:06 2003 -->
<pre>In Studies time with everything at STDBY I got the following  
trips correlated with a large spike in the losses. 
L00 B1W0L3 got a trip VBIAS13 Undervoltage 
L00 B0W0L3 got a trip VBIAS13 Overvoltage 
All crowbars are OK. 
 
L00 is now OFF. 
</pre>
<!-- Author: Gino -->

<!-- Date: Thu Jan 2 13:25:23 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W2L2 
<li>problem n: 49 
<li>Status: needs_observation
<li>Action: Diagnosis
<li>entered by: bolla 
<li>description is: <pre>Looked at it with svxdaq.
VEry hard to understand what is going on.
From the current behavior my best guessing is that:
We lost the DVDD jumper and there is a AVDD2 problem as well either on the jumper or on the first Z chip.
Truncated the read-out at the end of PHI side.
Rdriver to 7 for the PHi and 0 for the Z.
I wanna see the behavior now.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W2&layer=L2">report</a></ul>
<!-- Author: Problem DB -->



<!-- Date: Thu Jan 2 13:50:34 2003 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1272&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1273  width='300' align='top'></td><td>Analog and Digital current for SB1W2L2 during January 5th 2002. Clear indications of broken DVDD jumper between 20 and 21.</a></td></tr></table>
<!-- Author: Gino -->
<!-- Comment: Thu Jan  2 13;51;40 comment by...Gino -->
<a href=
'http://www-cdfonline.fnal.gov/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=87&frame=2&anchor=20:51:19'>Here is what (very SAD) was going ON in the Control Room at that time </a> 




<!-- Comment: Thu Jan  2 13;55;30 comment by...Gino -->
<a href=
'http://www-cdfonline.fnal.gov/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=87&frame=2&anchor=22:21:36'>Another SAD comment. </a> 




<!-- Date: Thu Jan 2 13:58:19 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W2L2 
<li>problem n: 49 
<li>Status: needs_observation
<li>Action: Diagnosis
<li>entered by: bolla 
<li>description is: <a href= 'http://www-cdfonline.fnal.gov/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=137&frame=2&anchor=13:50:34'> This is when BAD things happened </a>  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W2&layer=L2">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Thu Jan 2 14:21:25 2003 -->
<p><font size=+1> D-mode Calibration Job Finished </font>
<p><pre>
This is a computer-generated silicon D-mode calibration status report.
Silicon D-mode calibration job 227 finished successfully.

Job info
--------
Calibration type : standard
DPS-off run      : 155922
DPS-on run       : 155921
Requested by     : Jason Nielsen
Submitted        : 2003-01-02 07:07:33
Completed        : 2003-01-02 12:20:04
Status           : SUCCESS
Comment          : Resubmit after problems with web script
</pre>
<!-- Author: D-mode script run_calib_analysis.tcl -->



<!-- Date: Thu Jan 2 14:46:23 2003 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1274&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1275  width='300' align='top'></td><td>Here is evidence that ISL FIB cured SPT problem for fa02</a></td></tr></table>
<!-- Author: chill -->

<!-- Date: Thu Jan 2 14:48:54 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: LB1W0/1All 
<li>problem n: 744 
<li>Status: fixed
<li>Action: Diagnosis_update
<li>entered by: chill 
<li>description is: FIB swap to ISL type fixed problem, see plot in <a href= 'http://www-cdfonline.fnal.gov/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=137&frame=2&anchor=14:46:23'> e-log</a>. 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=L00&wedge=B1W0/1&layer=All">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Thu Jan 2 18:34:23 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W3L4 
<li>problem n: 70 
<li>Status: needs_observation
<li>Action: Monitoring
<li>entered by: bolla 
<li>description is: <pre>JUMPER IS ALREADY GONE SO:
changed RDRIVER back to 7 on the PHI side 
and back to 0 on the Z side
Let's see how it goes.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W3&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Thu Jan 2 18:49:22 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W3L4 
<li>problem n: 321 
<li>Status: needs_observation
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <a href= 'http://www-cdfonline.fnal.gov/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=135&frame=2&anchor=19:48:30'> CHIP DOES NOT SEE PHYSICS </a> indipendently on the problem ID.  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W3&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Thu Jan 2 19:01:49 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: IB3W0L2 
<li>problem n: 684 
<li>Status: needs_study_time
<li>Action: Diagnosis_update
<li>entered by: chill 
<li>description is: Chip b7 has last 2/3 channels which are noisy which causes high occupancy.  Chip b5 has all channels with DPS off, so occupancy is 100%.  Chip b5 also has first 1/3 channels which read at counter-modulo, the other 2/3 are normal DPS off pedestal (60 ADC).  Both anomalous chips see physics.  Investigate w/ SVXDAQ.  Try changing ISEL and bias ratio select bits back to maximum settings.  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=ISL&wedge=B3W0&layer=L2">report</a></ul>
<!-- Author: Problem DB -->



<!-- Date: Thu Jan 2 19:02:19 2003 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1276&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1276  width='300' align='top'></td><td>Chip 88 on SB1W3L4 has been dead since a long time.  It never recovered not even temporarely.</a></td></tr></table>
<!-- Author: Gino -->

<!-- Date: Thu Jan 2 19:05:56 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W3L4 
<li>problem n: 321 
<li>Status: unfixable
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <a href= 'http://www-cdfonline.fnal.gov/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=137&frame=2&anchor=19:02:19'>Long term behavior </a>  The chip is dead. 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W3&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Thu Jan 2 19:26:42 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB0W2L2 
<li>problem n: 437 
<li>Status: unfixable
<li>Action: Change_last_chip
<li>entered by: cigdem 
<li>description is: Rdriver set to 0 (before 4) for chips a0,a1,a2,a4. 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B0W2&layer=L2">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Thu Jan 2 19:30:51 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W10L2 
<li>problem n: 56 
<li>Status: needs_observation
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <pre>Improvements are such that ladder is back is it was.
Digital errors (event fragment and d0c2 termination so OBDV) 
limited only to Calibration runs. 
Not enough to make real trouble. Ladder is calibrated.
The SUPERFIB might make it even better.
We should use this one and NOT L4 in SVT.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W10&layer=L2">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Thu Jan 2 19:32:55 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB0W3L3 
<li>problem n: 660 
<li>Status: unfixable
<li>Action: Incident
<li>entered by: cigdem 
<li>description is: set rdriver for chip a0-a3 to 0 (before 4). 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B0W3&layer=L3">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Thu Jan 2 19:37:04 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB0W7L4 
<li>problem n: 662 
<li>Status: unfixable
<li>Action: Incident
<li>entered by: cigdem 
<li>description is: set rdriver of chips a0-a6 to 0 (before 4)  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B0W7&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Thu Jan 2 19:41:13 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB3W8L0 
<li>problem n: 415 
<li>Status: unfixable
<li>Action: Diagnosis_update
<li>entered by: cigdem 
<li>description is: set rdrivers of chip a0,a1 to 0 (before 4)  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B3W8&layer=L0">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Thu Jan 2 20:05:30 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB5W5L0 
<li>problem n: 449 
<li>Status: unfixable
<li>Action: Diagnosis_update
<li>entered by: cigdem 
<li>description is: rdriver of a0,a1 set to 0  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B5W5&layer=L0">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Thu Jan 2 20:14:08 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB5W3L1 
<li>problem n: 663 
<li>Status: unfixable
<li>Action: Incident
<li>entered by: cigdem 
<li>description is: chip a0-a2 rdrivers set to 0 (before 4)  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B5W3&layer=L1">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Thu Jan 2 20:38:54 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W0L0 
<li>problem n: 604 
<li>Status: needs_observation
<li>Action: Sparse_out_chip
<li>entered by: lmiller 
<li>description is: <pre>AVDD2 chip 83. 
Confirmed with svxdaq.
I was able to get it to initialize by changing ISEL for the 
offending chip, so we'll try that.
I changed the ISEL bits to 0 and put the threshold
to 255 for chip 83.
See if this helps.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W0&layer=L0">report</a></ul>
<!-- Author: Problem DB -->



<!-- Date: Fri Jan 3 03:32:31 2003 -->
<pre>Silicon up since 3:24am. No problems. We are taking data.  
</pre>
<!-- Author: cigdem -->


<!-- Date: Fri Jan 3 04:25:18 2003 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1277&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1277  width='300' align='top'></td><td>chip status map of L00 and ISL</a></td></tr></table>
<!-- Author: cigdem -->
<!-- Comment: Fri Jan  3 04;36;35 comment by...cigdem -->
<pre>See that in ISL B5 layer 19,20 we don't get data according to 
SVXMON. 
If I did the mapping correct, these should correspond to 
ISL B5 W5 L1.
I looked at the strip mean charge plots, occupancy and 
see no data in IB5W5L1C7(z),IB5W5L1C11(phi),IB5W5L1C3(Z) for all
channels. 
In IB5W5L1C15 I see data until channel 256 (chip 2).

In the error logger I see, DRO-00f3 and Bit 1 high. 
</pre>


<!-- Date: Fri Jan 3 04:37:41 2003 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1278&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1278  width='300' align='top'></td><td>strip charge of IB5W5L1C15, no data from channel 256 onwards.</a></td></tr></table>
<!-- Author: cigdem -->


<!-- Date: Fri Jan 3 04:46:08 2003 -->
<center><a href='/elog/notebooks/silicon/Fri_Jan__3_2003_044420.ps'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1280' ></a><a href='/elog/notebooks/silicon/Fri_Jan__3_2003_044543.ps'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1284' ></a></center>
<!-- Author: cigdem -->
<!-- Comment: Fri Jan  3 04;59;28 comment by...cigdem -->
<pre>These are  AVDD and DVDD currents of IB5W5L1.
I don't know why we see the spike at 2:30 in AVDD and in DVDD.
The step down (5mA) in AVDD at 00:30am and the step up at ~2:45
(5mA) is also for me not clear. The detector was at standby. 
At 2:43 I turned L00 on, but should this affect the AVDD 
current of ISL?
Beside these steps the AVDD current and DVDD currents are fine.
BIAS currents are stable.</pre>





<!-- Date: Fri Jan 3 10:23:08 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: IB5W5L1 
<li>problem n: 168 
<li>Status: needs_observation
<li>Action: Sparse_out_chip
<li>entered by: chill 
<li>description is: Chip 8d changed to DPS off due to 00f3.  Chip NOT sparsed out so that we can get some data to study.  Monitor to see if fix successful.  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=ISL&wedge=B5W5&layer=L1">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Fri Jan 3 11:13:08 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W5L2 
<li>problem n: 63 
<li>Status: needs_access_2hr
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <pre>Changed Z side RDRIVER from 1 to 7.
Let's see how it goes. Last run with old setting 156083.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W5&layer=L2">report</a></ul>
<!-- Author: Problem DB -->
<!-- Comment: Fri Jan  3 11;23;54 comment by...Gino -->
<pre>Depending on how this goes we might ask to change the pattern for SVT that is now using L4 that is giving no data at all.</pre>


<!-- Date: Fri Jan 3 11:36:40 2003 -->
<center><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1285&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1285' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1286&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1286' width='300'></a></center>
<!-- Author: Gino -->
<!-- Comment: Fri Jan  3 11;39;12 comment by...Gino -->
<pre>Sb1W5L2 (LEFT) and L4 (RIGHT) occupancy plots from SVXMON
for run 156083. 
The L4 is dead (we hope it will come back when we change the temperature )
The L2 has some troubles That I tried to fix/minimize by changing the RDRIVER on the Z side.
No matter what the L2 is better than the L4 and so the pattern in SVT should be changed.</pre>

<!-- Date: Fri Jan 3 15:48:54 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W10L4 
<li>problem n: 603 
<li>Status: needs_observation
<li>Action: Monitoring
<li>entered by: johnzhou 
<li>description is: In DEM, chip 88 always reads out channel 44 with its neighboring channels but no other channels. 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W10&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Fri Jan 3 17:20:05 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W5L2 
<li>problem n: 63 
<li>Status: needs_access_2hr
<li>Action: Action_request
<li>entered by: bolla 
<li>description is: <pre>No sensible changes. Agreed that it needs an RX swap for BIT 5 HIGH.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W5&layer=L2">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Fri Jan 3 18:04:03 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: IB5W5L1 
<li>problem n: 168 
<li>Status: needs_observation
<li>Action: Sparse_out_chip
<li>entered by: chill 
<li>description is: Setting 8d to DPS off allowed priority to be passed to next chip which read out correctly, but now DRO_00F3 is seen at chip 9a.  Chip 9a changed to DPS off. Chip NOT sparsed out so we can see data.  Need to monitor.  Changes will take place after 156089. 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=ISL&wedge=B5W5&layer=L1">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Fri Jan 3 22:15:50 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB0W7L4 
<li>problem n: 659 
<li>Status: needs_observation
<li>Action: Diagnosis_update
<li>entered by: cigdem 
<li>description is: Since run 156076 (02-Jan-2003, 21:34) we don't see any errors in David's error monitor. Bit Reporter does           not show this runs yet. The RDRiver resetting of yesterday (before 20:00) seems to solve the OBDV problem           (channel and data skip). Needs observation.    
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B0W7&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Fri Jan 3 22:19:12 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W8L2 
<li>problem n: 4 
<li>Status: needs_study_time
<li>Action: Incident
<li>entered by: cigdem 
<li>description is: Rdriver resetting did not solve the bit problems, which  started on the 31-Oct-2002.  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W8&layer=L2">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Sat Jan 4 03:09:23 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: IB5W5L1 
<li>problem n: 168 
<li>Status: needs_observation
<li>Action: Diagnosis_update
<li>entered by: cigdem 
<li>description is: I see now data on the channels after chip 9a. Turning off  DPS for chip 9a was successful. This ladder has now  couple of bit errors in SVXError Logger: bit 1 low/high, bit error(not 0/1), suspect data, no first chip, unknown channel.  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=ISL&wedge=B5W5&layer=L1">report</a></ul>
<!-- Author: Problem DB -->
<!-- Comment: Sat Jan  4 03;14;41 comment by...cigdem -->
<pre>DVDD current for f551 is pink. The current value is at 420 mA.
The high end is at 400mA. I do relate the jump in the DVDD current to the fact, that we turned off DPS for two chips on this
layer. 
The mean strip occupancy is higher. 


</pre>


<!-- Date: Sat Jan 4 03:16:26 2003 -->
<table><tr><td><a href=/elog/notebooks/silicon/Sat_Jan__4_2003_031621.ps align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1288  align='top'></td><td>DVDD current for f551. </a></td></tr></table>
<!-- Author: cigdem -->
<!-- Comment: Sat Jan  4 03;50;31 comment by...cigdem -->
<pre>I have redefined the upper end of DVDD current in IMON from 
400 to 430mA. 
The current has stabilized around 420mA. </pre>
<!-- Date: Sat Jan 4 03:39:09 2003 -->
<center><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1289&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1289' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1290&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1290' width='300'></a></center>
<!-- Author: cigdem -->
<!-- Comment: Sat Jan  4 03;48;03 comment by...cigdem -->
<pre>Strip occupancy plots for f551 chips 9b,9a,99,98 on the left side and 8f,8e,8d,8c on the right. 
We turned yesterday the addition to chip 8d, chip 9a DPS off. 
Now we see data on the channels. 
Before we only saw data until chip 9a. 
Chip 9a seems to be source of the bit errors, which I saw in in the SVXerrorloger. (But I am not 100% understanding what I see.)

</pre>


<!-- Date: Sat Jan 4 06:53:09 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB0W7L4 
<li>problem n: 659 
<li>Status: fixed
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <pre>No more errors even in the BER. FIXED.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B0W7&layer=L4">report</a></ul>
<!-- Author: Problem DB -->




<!-- Date: Sat Jan 4 09:25:41 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB4W10L4 
<li>problem n: 674 
<li>Status: fixed
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <pre>No more troubles since last changes. FIXED.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B4W10&layer=L4">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Sat Jan 4 10:21:56 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB3W2L0 
<li>problem n: 50 
<li>Status: needs_access_2hr
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <pre>CHIP a1 BACK TO NORMAL THRESHOLDS (9). No reason to loose those data that are good.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B3W2&layer=L0">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Sat Jan 4 10:53:11 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: SB1W2L2 
<li>problem n: 49 
<li>Status: needs_observation
<li>Action: Diagnosis_update
<li>entered by: bolla 
<li>description is: <pre>Ladder is almost error free right NOW. The Z side is lost though.
Let's give it a little more time in data taking and than look
at it with svxdaq again. We might end up decclaring it UNFIXABLE
and forget the Z side.</pre> 
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=SVX&wedge=B1W2&layer=L2">report</a></ul>
<!-- Author: Problem DB -->



<!-- Date: Sun Jan 5 02:59:03 2003 -->
Was paged during the evening shift of 04-Jan-03, because  
the bias current of L00 BIAS1 B1 W1 L3 went up and crossed 
the threshold.  
Because the background conditions were at that time  
nice and fine I decided to observe its behaviour.  
Apperently the bias current stabilized at 23.2 just right above the limit of 23mA.   
<a href= 
'http://www-cdfonline.fnal.gov/cgi/elog/elog.pl?nb=2003&action=view&page=12&frame=2&anchor=19:59:14'> 
see entry in shift elog</a> 
<!-- Author: cigdem  -->


<!-- Date: Sun Jan 5 03:13:54 2003 -->
<table><tr><td><a href=/elog/notebooks/silicon/Sun_Jan__5_2003_031331.ps align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1294  align='top'></td><td>BIAS1 current of L00 B1 W1 L3 in the past. One sees, that it was rising in the past, too. </a></td></tr></table>
<!-- Author: cigdem -->
<!-- Comment: Sun Jan  5 03;29;12 comment by...cigdem -->
<pre>At 590 I see a significant step down in the bias1 current
of this ladder. Since this day the current value and its
variation range are increasing. 
See figure below. </pre>
<!-- Date: Sun Jan 5 03:27:04 2003 -->
<table><tr><td><a href=/elog/notebooks/silicon/Sun_Jan__5_2003_032700.ps align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1296  align='top'></td><td>Bias1 current of LB1W1L3 at the day it made a step down,  and since this last big step down it is rising up.  The day the step down happened is 590, which corrensponds to 14-Aug-2002 (the day, when we cooled the Silicon  detector). </a></td></tr></table>
<!-- Author: cigdem -->



<!-- Date: Sun Jan 5 03:40:26 2003 -->
<pre>At 3:33am SB5W1L0 and L4 tripped on DVDD overcurrent.  
After two tries I could turn them on again.  
You see the imon DVDD currents below.  
</pre>
<!-- Author: cigdem -->


<!-- Date: Sun Jan 5 03:42:08 2003 -->
<table><tr><td><a href=/elog/notebooks/silicon/Sun_Jan__5_2003_034153.ps align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1301  align='top'></td><td>c</a></td></tr></table>
<!-- Author: cigdem -->
<!-- Comment: Sun Jan  5 03;43;08 comment by...cigdem -->
<pre>DVDD current of e514. </pre>


<!-- Date: Sun Jan 5 03:43:53 2003 -->
<table><tr><td><a href=/elog/notebooks/silicon/Sun_Jan__5_2003_034346.ps align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1303  align='top'></td><td>DVDD current of e510.</a></td></tr></table>
<!-- Author: cigdem -->


<!-- Date: Sun Jan 5 10:17:35 2003 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1304&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1305  width='300' align='top'></td><td>Bias Current for SB2W4L0 versus time. Raising smoothly with  the integrated luminosity. Changed IMON LIMIT from 18.76 to 30 uA.</a></td></tr></table>
<!-- Author: Gino -->


<!-- Date: Sun Jan 5 10:25:18 2003 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1306&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1307  width='300' align='top'></td><td>LB1W1L3 Ibias1 vs time (as previously posted by Cigdem but with a cut on the bias so that it doesn't show the STDVY state). Changed IMON limit from 23 to 30 uA.</a></td></tr></table>
<!-- Author: Gino -->
<!-- Comment: Sun Jan  5 10;30;31 comment by...Gino -->
<pre>I'm going to ask the monitoring ACE to restart IMON so the changes get picked up.</pre>


<!-- Date: Sun Jan 5 15:00:26 2003 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1308&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1309  width='300' align='top'></td><td>IB4W1L2 Ibias1 vs time. Changed IMON upper limit from 10 to 20 uA. </a></td></tr></table>
<!-- Author: Gino -->


<!-- Date: Sun Jan 5 18:47:42 2003 -->
<center><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1310&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1310' width='300'></a><a href='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1311&button=yes' target='xxx' onclick='jswindow()'><img src='/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1311' width='300'></a></center>
<!-- Author: cigdem -->
<!-- Comment: Sun Jan  5 19;21;11 comment by...cigdem -->
<pre>I was paged, because of ISL B1 W4 L0 and ISL B1 W0 L0 
had pinkies in DVDD for ~1hr, to be precise, there DVDD currents
kept on wiggeling around the high end limit, &lt;a href=
'http://www-cdfonline.fnal.gov/cgi/elog/elog.pl?nb=2003&action=view&page=15&frame=2&anchor=17:47:15'&gt;
see shift logbook&lt;/a&gt; and see &lt;a href=
'http://www-cdfonline.fnal.gov/cgi/elog/elog.pl?nb=2003&action=view&page=15&frame=2&anchor=17:49:41'&gt;
also here&lt;/a&gt; . 
I came in and looked at the strip occupancies of this guys and 
saw that for 

ISL B1 W4 L0 chip a3/a2 and a0 do have a high occupancy. 
See left plot above. 
In the PDB it is reported that this ladder has a pinhole. 

ISL B1 W0 L0 chip a1 has high strip occupancy. 
See right plot above. 
PDB: chip a4??? has DPS off due to 00f3. 
     </pre>
<!-- Date: Sun Jan 5 18:51:42 2003 -->
<table><tr><td><a href=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1312&button=yes target='xxx' onclick='jswindow()'; align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1312  width='300' align='top'></td><td>strip occupancy of ISL B1 W4 L0 </a></td></tr></table>
<!-- Author: cigdem -->
<!-- Comment: Sun Jan  5 19;32;31 comment by...cigdem  -->
This is the strip occupancy of ISL B1W4L0 after a little while. 
The red histogramm shows the strip occupancy between 18:43-18:49. 
I put this plot into the elog, because after I arrived the pinkies went away. And in the 
case of ISL B1W4L0 I see that the occupancy of chip a2 decreased. 
For ISLB1W0L0 I don't see such a dramatic change in 
strip occupancy. 


<!-- Date: Sun Jan 5 19:41:27 2003 -->
<table><tr><td><a href=/elog/notebooks/silicon/Sun_Jan__5_2003_194107.ps align=top><img src=/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=-1314  align='top'></td><td>DVDD current history for ISL B1 W4 L0 (black) and  ISL B1 W0 L0 (red). I will change the Imon limits.</a></td></tr></table>
<!-- Author: cigdem -->

<!-- Date: Sun Jan 5 19:45:56 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: IB1W0L0 
<li>problem n: 803 
<li>Status: fixed
<li>Action: IMON_limits
<li>entered by: cigdem 
<li>description is: Changed DVDD high limit from 420mA to 440mA.  See for more info <a href= 'http://www-cdfonline.fnal.gov/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=137&frame=2&anchor=18:47:42'> here.</a>  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=ISL&wedge=B1W0&layer=L0">report</a></ul>
<!-- Author: Problem DB -->


<!-- Date: Sun Jan 5 19:48:18 2003 -->
Entered in Silicon database: <ul>
<li>Ladder: IB1W4L0 
<li>problem n: 804 
<li>Status: needs_observation
<li>Action: IMON_limits
<li>entered by: cigdem 
<li>description is: Changed DVDD upper limit from 450mA to 470mA. For more info see <a href= 'http://www-cdfonline.fnal.gov/cgi/elog/det-system-elog.pl?nb=silicon&action=view&page=137&frame=2&anchor=18:47:42'> here. </a>  
<li>See <a href="http://nkek15.fnal.gov/cgi-bin/newproblemdb/DBreport.pl?detsys=ISL&wedge=B1W4&layer=L0">report</a></ul>
<!-- Author: Problem DB -->