**Date:** 10 April, 2003.

**Rev Date:** 16 April, 2003.

**Project:** D0 Burn-in test stands.

**Subject:** Safety Review Documentation for D0 Burn-in Test Stand Power
Distribution.

This note and its supplemental documents describe the low voltage DC
power distribution scheme and high voltage distribution scheme in Dzero
Run2B Burn-in Test setups.

# 

# Contact persons.

1\. Alexander Leflat, x8630, MS310, leflat@fnal.gov

2\. Cecil Needles, x3661, MS222, cecil@fnal.gov

# Location.

The Dzero Run2B Burn-in Test Stands are located in the Dzero test area
at SiDet LAB AB Bridge. The floor plan is shown in figure 1.

**General information:**

The burn-in Test Stands (TS) are used for long-term test of Hybrids
before the silicon sensor installed and for long-term test of Modules
after the sensor installation. The Hybrid TS does not use the sensor
bias voltage so High Voltage system is used for Module tests only
(**1**).

There are two 16-channel TS for Hybrid testing and two 32-channel TS for
Module testing. There is one rack (H1) containing two Readout VME crates
and two LV power supply sources for Hybrid TS, see figure 2. The two
shelve racks (S1 and S2) contain interface cards (so called Purple Card)
for Hybrid readout.

Two racks (M1 and M2) contain the Readout VME crate, HV Bi-Ra VME crate
and LV power supply source each, see figure 3. Four cooling racks (C1,
C2, C3 and C4) contain interface cards for Module readout and water
cooled aluminum cooling plates mounted on eight slide shelves in each
rack, see figure 4.

# AC Distribution.

AC power for these temporary installations is supplied to the racks H1,
M1 and M2 via a 25' extension cords plugged into an 115V 20A 1ph outlets
on the west and sough sides of the room. The 3-wire AWG 10 extension
cords are routed on the floor. The standard 10 outlet strips (Fermi
stock# 1110-100600) are used inside each electronics rack.

# High Voltage System.

The standard Dzero HV system manufactured by BiRa SYSTEMS is used in
Module TS.

[DC Distribution]{.underline}: The two VME power supply assemblies PS-1
and PS-2 are shown in figure 3. They provide DC power to two VME crates.
These power supply assemblies are provided as complete packaged units by
LAMBDA (**2**). The assemblies are connected to the VME crates by
harnesses designed to carry the maximum available currents from the
power supplies, see figure 5.

[Fusing]{.underline}: Each VME HV Motherboard (Bi-Ra) uses 5 separate
voltages from the VME backplane (+5V, +/-12V analog, +/-12V bulk). The
+5V and the +/-12V bulk use multiple VME pins in parallel as required to
limit the current density to acceptable values. Each voltage is fused
near the VME input connector.

[Cooling]{.underline}: Forced-air cooling is provided by fans located
between LAMBDA power sources and HV VME crates. The worst case operating
conditions of these particular installations do not require water-cooled
heat exchangers.

[HV Distribution]{.underline}: Every HV VME crate located in racks M1
and M2 contains four Bi-Ra motherboards (**3**) with 8 pods each. The
pods are rated at 3.2 kV @ 2.0mA. However, for use with silicon
detectors, the pods are limited to 300V via the front panel, screwdriver
adjustable, and HVmax potentiometer feature of the device. The HV system
is controlled by software program via vertical connection and commercial
processor modules located in each crate. The HV is extracted from the
module's front panel connectors via red RG-58 cable with SHV connectors.
Twelve feet long cables supported by appropriate hangars go to four
cooling racks C1 through C4 and bring HV to Purple cards via SHV
connectors. After passing through Purple cards HV goes to silicon
modules (Device-Under-Test) via custom design Digital Jumper Cables
capable to carry HV up to 1000 Volts.

There are two different types of silicon modules in point of view of HV.
Most of them have to be tested under 300V bias voltage. But the HV for
so called L0 modules has to be set up to 700 V. There are 8 Purple cards
(16 HV channels) located in C1 rack and modified to carry 700V voltage.
The modification is that the HV goes directly from the input card's SHV
connector to the output AVX connector via jumper, which is a piece of
red RG-58 cable, properly mounted under the card.

# Low Voltage DC Distribution.

The LV distribution system is designed to provide the board power (VCC)
for Purple cards and SVX chip power (AVDD and DVDD) for devices under
test. The worst-case operating conditions require 5.2V @ 3.0A summary
current at the Purple card's power connector header. The header (Molex
MiniFit Jr, 12-Pin, rated at 5.0 Amps per pin) is protected by the
circuit board's fuses 1.5 Amp current capability, which are located very
close to it. Every LV pin has its own fuse. The connector that plug into
this header is a female type and is satisfactorily protected. Its
contacts accept 6 three feet long 18 AWG wires. Three wires (VCC, AVDD
and DVDD) and three return wires are connected on female type terminals
(Fermi stock# 1110-441000). These terminals are connected to the LV rack
bus.

The LV rack bus inside of racks S1, S2, C1, C2, C3 and C4 (see figure 6)
consists of four vertical groups or eight 10 AWG wires connected with
PHOENIX CONTACT terminal blocks (UHK 4-FS, rated at 40 Amps per contact)
by the female type terminals (Fermi stock# 1110-441000). Every group
contains four pairs of terminal blocks. The bus wires are properly
mounted on the rail inside the rack.

The LV bus is connected with LV source via 12 AWG wire bundle. The
maximum length of that bundle is 8 feet. Terminal blocks (Fermi stock#
1490-206000) are used at both ends of the bundle.

Two Hybrid TS use two separate OVP power sources POWER-ONE SPL200-4100P
with 35 Amps current capability. Each of four groups has its own 12 Amp
fuse at the source's output.

Two Module TS also use separate OVP power sources QUALIDYNE Model#
1084-015 with 170A current capability. Each of eight groups has its own
12 Amp fuse at the source's output, which is enough to secure 18 AWG
wires. Four groups go to left hand cooling rack and four groups go to
right hand cooling rack. The scheme of Module TS low voltage source is
shown in figure 7.

**Reference:**

1.  RunIIB Upgrade Technical Design Report, D0 Collaboration, September
    12, 2002.

2.  LAMBDA power supply manual, ASSY #25156-2

3.  User manual, BiRa Systems, "Model VME 4877PS High Voltage Power
    Supply System Manual 2^nd^ Edition March 1998".

# Figures:

Figure 1. Dzero Burn-in TS floor plan.

Figure 2. Hybrid TS.

Figure 3. Module TS.

Figure 4. Slide shelf.

Figure 5. LAMBDA powers supply sources.

Figure 6. The LV rack bus.

Figure 7. Module TS low voltage source scheme.

![](media/image1.wmf)

**Figure 1. Dzero Burn-in TS floor plan.**

![](media/image2.wmf)

Figure 2. Hybrid TS.

![](media/image3.wmf)

Figure 3. Module TS.

![](media/image4.wmf)

Figure 4. Slide shelf.

![](media/image5.wmf)

Figure 5. LAMBDA powers supply sources.

![](media/image6.wmf)

Figure 6. The LV rack bus.

![](media/image7.wmf)

Figure 7. Module TS low voltage source scheme.