# Copper Inclusion and Migration from the Back Contact in CdTe Solar Cells 

C. R. Corwine, A. O. Pudov, M. Gloeckler, S. H. Demtsu, and J. R. Sites

Colorado State University

Department of Physics, Fort Collins, CO 80523

email: ccorwine@lamar.colostate.edu

## ABSTRACT

Metallic back contacts to CdS/CdTe solar cells will in general form
Schottky barriers. Better performance is achieved with the inclusion of
Cu in the back contact. This study uses current-voltage,
capacitance-voltage, and laser beam induced current measurements to
analyze as-deposited CdS/CdTe solar cells prepared with varying back
contact Cu amounts and to evaluate changes in cell performance following
elevated-temperature stress. A simple model is proposed to explain both
the observed differences in device behavior as copper is added or
removed from the contact region, and how copper movement depends on
electrical bias.

**Keywords:** CdTe solar cells, back contact, copper, stress, migration

**1. Introduction**

Copper is commonly used in the back contact to improve device
performance of thin-film n‑CdS/p‑CdTe solar cells \[1\]. Since CdTe has
a high electron affinity (χ) and band gap (E~g~), many metals will form
a Schottky barrier, resulting in a significant limitation to hole
transport from the p-CdTe. In a circuit model, this barrier will form a
diode of opposite polarity to the primary junction \[2\], which distorts
the current-voltage (J-V) curves by limiting the total device current at
higher voltage. The result is often referred to as the "roll-over"
effect \[3\]. A second effect, "cross-over" of light and dark curves, is
often explained by the photoconductivity in the CdS buffer layer of the
typical CdS/CdTe device. In general, cross-over, which is primarily
generated by a distortion of the dark curve, does not affect device
efficiency. Roll-over, however, decreases device efficiency by reducing
the fill factor and in extreme cases by limiting the V~oc~.

During device preparation, it is common to chemically etch the CdTe
layer after the CdCl~2~ treatment but prior to the back contact process
\[4-7\]. The etching creates a Te or Te-rich layer on the CdTe. The
effect of the etching process is not well understood, but many benefits
have been ascribed to it, including a change in the surface pinning of
the Fermi level when metals are contacted to CdTe \[4\] and a decrease
in the contact resistance when the contact is formed after etching
\[8\]. During the subsequent back contact process, Cu from the contact
can form a distinct Cu~x~Te~(1-x)~ layer and/or it can locally increase
the effective doping level in the CdTe at the back contact through
interdiffusion \[9\]. The former lowers the back contact barrier while
the latter narrows it. Most likely, both lowering and narrowing occur,
as depicted schematically in Figure 1. In either case, the current
through the back barrier should be less limited when copper is added,
since the current transport is diffusion-limited based on the thermionic
emission-diffusion theory \[10,11\] and depends therefore on the doping
density at the contact. Conversely, removal of copper from the back
contact region should progressively limit the current flow through the
back diode.

The electrical activity of Cu is an important aspect to the model in
Figure 1. Previous studies have shown that Cu can form donors (Cu~i~),
acceptors (Cu~Cd~), and neutral complexes (Cu~Cd~^-^-Cu~i~^+^) in CdTe
\[12-14\]. In the latter case, only a small percentage of Cu atoms would
be electrically active in the crystal lattice. A study by Balcioglu et
al. \[15\] explored the Cu-related impurities in polycrystalline
CdTe/CdS solar cells. Optical deep-level transient spectroscopy (ODLTS)
measurements on solar cells produced by the National Renewable Energy
Laboratory (NREL) suggested that the most probable Cu-related defect is
a deep donor and may be a doubly ionized Cu interstitial ion
(Cu~i~^++^). The concentration of the Cu~i~^++^ defect (from ODLTS)
corresponded to the Cu diffusion profile (from Secondary Ion Mass
Spectroscopy, or SIMS), and the highest concentration was at the
CdTe/CdS interface. The study also observed substitutional Cu impurities
(acceptors), found only in the bulk of the CdTe. Both defects are
believed to have originated from the Cu-containing back contact. The
results indicate that at least part of the Cu in the back contact is
electrically active: substitutional Cu will dope the CdTe, as discussed
previously, and Cu~i~^++^ ions can migrate through the CdTe.

Figure 1 shows how the primary junction field might influence Cu
movement. Cu is well known to be a fast diffuser. Most likely, the Cu
moves along grain boundaries, since Cu has been reported to diffuse
faster in polycrystalline CdTe than in single-crystal CdTe \[16\].
However, assuming that much of the Cu in the back contact is in the form
of a positive ion, the primary junction field of the cell will resist
the migration away from the contact. Hence, the rate of migration will
depend on the bias across the cell. This argument was confirmed
experimentally (Figure 2, reproduced from Ref. \[17\]), which shows
efficiency changes in CdTe cells made by First Solar, Inc. that were
held at 100°C for 20 days. The underlying assumption is that the major
degradation mechanism originates from the back contact. The samples were
stressed with elevated temperature under reverse bias (V \< 0), under
short circuit condition (SC), at the maximum power point (MP), using a
load resistance equal to half (R~MP~/2) and twice (2R~MP~) the maximum
power resistance, at open circuit (OC), and above open circuit voltage
(J \> 0). Both under illumination and in the dark, the change in
efficiency becomes significantly larger in forward bias when the
junction field is reduced. The changes in performance as a function of
forward-bias stress condition (see Figure 2) can be explained by the
model in Figure 1. Numerical modeling has shown that when cells are
depleted through much of their width, the built-in potential reduces
through the interaction of primary and secondary space charge regions,
which are respectively located at the front and back of the device
\[18\]. Additional loss of Cu-related acceptor levels through migration
supports the depletion and the V~bi~ -- limiting process, which results
in lower open circuit voltage and fill factor.

Again referring to Figure 1, the CdS layer most likely acts as a Cu
sink. Asher et al. \[19\] have monitored the Cu diffusion with SIMS
measurements on CdS/CdTe solar cells under stress and found that a
significant amount of copper diffuses through the CdTe into the CdS
layer. Cu is a likely candidate for causing a stronger compensation of
the shallow donor levels with deep acceptors in the CdS. Various groups
have reported on CdS/CdTe device models that included a heavily
compensated or even overcompensated, hence \"photoconductive,\" CdS
\[20-22\]. This can lead to a modulated barrier at the front of the
device that flattens the dark J-V curves, but has little effect on the
light J-V curves.

**2. Device Preparation**

The CdS/CdTe solar cells used in this study were fabricated at Colorado
State University using an in-line Close-Space Sublimation (CSS) process
\[23\]. The back contact of these devices is formed by the deposition of
a copper compound onto CdTe followed by the application a
graphite/nickel paste. The devices in this sample set were prepared with
no intentional copper and with 0.5, 1, 2, and 4 minutes of Cu-compound
deposition. The standard deposition time is 2 minutes, and is roughly
equivalent to 2 nm of Cu. The amounts of Cu in the back contact will be
referred to as no Cu and ¼, ½, 1, and 2 times the standard Cu.

**3. J-V Variations**

Figure 3(a) illustrates the typical variations seen in the CdTe
current-voltage (J-V) curves when the amount of copper in the back
contact is varied. Without intentional copper (circles), the fill factor
is significantly reduced and the back barrier limits the current above
V~oc~. There are progressive improvements up to the standard amount, but
additional copper makes little difference.

Figure 3(b) shows a highly suggestive reversal of the progression in
Figure 3(a) when a cell with a standard amount of copper is stressed
under illumination at short-circuit and elevated temperature (100°C) for
increasing lengths of time \[24\]. In this case, the circles are for the
as-deposited cell and the other curves correspond to stress times of 8
hrs, 8 days, and 24 days. At the latter two times, the current
limitation, or roll-over, has clearly returned. One difference between
Figure 3(a) and Figure 3(b) is found in the dark curves. Whereas the
non-stressed cells with various copper amounts show reasonably
well-behaved dark curves, the stressed cells have flatter dark curves,
leading to greater cross-over of the light and dark J-V curves. This
flattening is attributed to an additional front barrier that is
generated or enlarged by Cu diffusion into the CdS. The J-V of the
unstressed cells also exhibits flat dark curves at lower temperatures.
Thus, the main effect of stress on the dark J-V, which may have little
or no affect on the light curves, is to raise the additional front
barrier and therefore the onset temperature of the cross-over effect.

**4. Uniformity Variations**

Figure 3 makes the argument that out-diffusion of copper affects the
back barrier in the opposite direction as adding copper and possibly
raises the front barrier. This is reinforced by laser beam induced
current (LBIC) uniformity analysis, a small-spot measurement technique
that uses a focused diode laser with intensity at the cell adjusted to
approximately one sun \[25\]. Figure 4 shows photocurrent maps
(expressed as the quantum efficiency at 638 nm) for select cells from
this study. Figure 4(a) is from a cell fabricated with no intentional
copper at the back contact, and Figure 4(b) is from a cell with the
smallest intentional amount (¼ the standard Cu). The cell made without
Cu shows both a substantial current variation across the cell. When the
light-spot probe is focused to a smaller diameter, the contrast of the
small features increases. The large-scale variations are presumably
caused by manufacturing process non-uniformities, but seem to disappear
if sufficient copper is present in the device. This can be seen from
Figure 4(b), in which the device has only a small amount of Cu yet shows
a very uniform response.

When a uniform cell similar to the one from Figure 4(b) was subjected to
elevated-temperature stress (100°C for 2 days at open circuit and under
illumination), its uniformity decreased, as illustrated in Figure 4(c).
As with the cells that had no intentional copper, there is a substantial
current variation across the cell. The behavior with stress supports the
theory that Cu migrates away from the back contact, again making the
process non-uniformities visible.

**5. C-V Variations**

The capacitance-voltage (C-V) response of CdTe solar cells also varies
with the amount of copper used in back-contact fabrication. Figure 5
shows the typical progression for the same cells used in Figure 3. Prior
to measuring the capacitance of each cell as a function of voltage, the
capacitance vs. frequency was measured to assure that there was not
significant frequency dispersion present. Figure 5 plots the capacitance
data in the C^-2^-V format commonly used to deduce carrier density.

Without intentional copper, the capacitance of the cell was independent
of voltage and has a value corresponding to complete depletion of the
CdTe layer. As copper was added, the region near the back of the cell
was no longer fully depleted, suggesting that Cu interdiffusion
increased the carrier density in this region. The response of
capacitance to elevated-temperature stress, as with J-V and uniformity,
is highly suggestive of a reversal of copper addition. The post-stress
C‑V data, shown with open symbols in Figure 5, show that cells with the
smaller amounts of copper (¼ and ½ the standard) revert to flat C-V
curves very similar to those of the as-deposited cells with no
intentional copper. Again the physical interpretation is that most of
the CdTe is fully depleted since much of the copper has moved away from
the back contact region.

The capacitance data shown with solid symbols in Figure 5 are converted
to hole densities in Figure 6, assuming an one-sided junction. The
horizontal dashed line in the mid-10^14^ cm^-3^ range is based on the
authors\' experience with a large number of CdS/CdTe solar cells and is
consistent with the data in Figure 5. The other dashed lines are guides
to the eye to complete the picture. Although the details of Figure 6 are
speculative, the transition region widens as copper is added, and this
trend reverses with temperature stress according to the open symbols in
Figure 5, giving additional support to the thesis of barrier reduction
due to increased carrier density.

**6. Discussion**

The Cu back contact model proposes explanations for several experimental
observations: the need for Cu in the back contact, the role of Cu in
device degradation under elevated-temperature stress, and the influence
of applied forward bias during stress on device degradation. The model
presented, however, is not complete. It does not address the possible
effects of copper impurities in the CdTe layers, the reason (Figure 2)
for reduced efficiency resulting from reverse-bias stress, details of
the voltage loss alluded to in Section 1, or the reason why some
Cu-containing back contacts show different behavior (e.g., ZnTe:Cu
\[26\]). The model makes the assumption that at least part of the Cu is
electrically active, which was previously shown for only one specific
case of devices and may not always be true. Nevertheless, the Cu back
contact model is both intuitively appealing and consistent with a large
body of observed data. The implications of the model are that there
needs to be sufficient Cu in the contact initially and that cells should
be designed and operated so that the impact of Cu diffusion is minimal.
Strategies to achieve the latter would include engineering
polycrystalline CdTe so there is less surface migration, i.e., larger
grain sizes, avoiding periods of time when these devices are at
open-circuit voltage, and avoiding the exposure of devices to
unnecessarily high temperatures.

**7. Acknowledgements**

The authors wish to thank W. Sampath, K. Barth, and R. A. Enzenroth of
Colorado State University\'s Materials Engineering Department for
fabricating the CdTe solar cells used in this study. They also thank
many members of the National CdTe R&D Team, particularly T. A. Gessert
of NREL and T. J. Nagle of Colorado State, for numerous helpful
discussions. Financial assistance was provided by the U.S. National
Renewable Energy Laboratory.

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FIGURE LIST:

**Figure 1.** CdTe solar-cell band diagram showing possible effects due
to variation in back-contact copper. The Cu addition trend assumes the
formation of a Cu~x~Te~(1-x)~ layer, which is not shown explicitly.

**Figure 2.** Efficiency changes as a function of biasing conditions
during elevated-temperature stress.

**Figure 3.** Variations in J-V curves with (a) varying copper
concentration and (b) stress time.

**Figure 4**. LBIC uniformity measurements: Cells with (a) no Cu, as
deposited; (b) ¼ standard Cu, as deposited; (c) ¼ standard Cu, 2 days
stress at 100ºC, V~OC~.

**Figure 5.** Capacitance-Voltage Measurements: solid symbols represent
variations in cell capacitance with different amounts of Cu and open
symbols show flattening of capacitance curves with elevated-temperature
stress.

**Figure 6.** Changes in hole density near back contact. Points deduced
from Figure 5.

![](media/image1.wmf)

.

**C. R. Corwine et al., Figure 1**

![](media/image2.wmf)

**C. R. Corwine et al., Figure 2**

![](media/image3.wmf)

![](media/image4.wmf)

#### C. R. Corwine et al., Figure 3

![](media/image5.png){width="6.501388888888889in"
height="5.134722222222222in"}

**C. R. Corwine et al., Figure 4**

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**C. R. Corwine et al., Figure 5**

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**C. R. Corwine et al., Figure 6**