![](media/image1.png){width="5.954861111111111in"
height="0.41597222222222224in"}

53-960522-CLN-01

***TO: DISTRIBUTION***

***FROM: C NEUMEYER\
SUBJECT: OPTIONS FOR NSTX OH POWER SUPPLY***

This memo presents several options for implementation of the NSTX OH
power supply, making use of two 12-pulse TFTR rectifier units. Following
a discussion of the relative merits and features of each, an option is
selected for the NSTX application. Your comments and suggestions are
sought.

*Requirements*

As presently understood the required coil current and terminal voltage
waveforms are depicted in the following figures.

![](media/image2.pct){width="395.0in" height="209.0in"}

![](media/image3.pct){width="396.0in" height="220.0in"}

It is noted that the current and voltage requirements are bipolar, the
peak current is 20kA, and the peak voltage under load is around 3kV.
Notice further that there is no large plasma initiation pulse voltage
required for NSTX.

*Option I*

![](media/image4.pct){width="6.028472222222222in"
height="3.234722222222222in"}

Current flow is initiated in the path S4, R1, R2, S1. Switches S2, S3,
and S5 are blocking. Once the OH coils are precharged, the rectifiers
are inverted, and Ioh heads toward zero. Near zero current, switch S5 is
fired, after which the rectifiers are fully inverted, and at a current
\< Vinv/R, where R is the ohmic value of RES, the current in the
rectifiers is extinguished and all of the load current flows in RES. S1
and S4 are now blocking. Next, S2 and S3 are fired, and the rectifiers
are set to produce a (+) voltage, which further drives Ioh through zero
and then in the opposite direction. S5 is gate blocked. However, a
parasitic current will continue to flow in RES until such time that the
rectifiers are inverted.

*Option 2*

![](media/image5.pct){width="6.180555555555555in"
height="4.180555555555555in"}

Current is initiated by rectifiers R1 and R2 in series through the path
S4, R1, R2, S1. Switches S2, S3, and S5 are blocking. Once the OH coils
are precharged, the rectifiers are inverted, and Ioh heads toward zero.
Near zero current, rectifier R1 is fully inverted, and switch S5 is
fired, causing the current through R1 and S4 to commutate into S5. Next,
S3 is fired, which places R1 in anti-parallel with R2. R1 and R2 provide
4-quadrant circulating current converter control and drive the current
through zero. Next, S1 is blocked, S2 is fired, and the voltage produced
by R2 commutates the current out of S5 and into R2 and S2. Now S1, S4,
and S5 are blocking and R1 and R2 are again in series but in the
opposite polarity with respect to the coils.

*Option 3*

![](media/image6.pct){width="5.847222222222222in"
height="4.583333333333333in"}

Rectifiers R1 and R2, which are implemented from the TFTR rectifiers,
are internally reconfigured so that, out of the six modules in each
section, three are in the forward direction and three are in the reverse
direction (the rectifiers can carry current in both directions). Current
is initiated by rectifiers R1 and R2 in series through the path R1, S2,
R2. Switches S1 and S3 are blocking. Once the OH coils are precharged,
the rectifiers are inverted, and Ioh heads toward zero. Near zero
current, rectifier R1 is fully inverted, and switch S1 is fired, causing
the current through R1 and S2 to commutate into S1. Next, S3 is fired,
which places R1 in anti-parallel with R2. R1 and R2 provide 4-quadrant
circulating current converter control and drive the current through
zero. Next, S3 is blocked, and the voltage produced by R2 commutates the
current out of S3 and into R2 and S2. Now S1 and S3 are blocking and R1
and R2 are again in series but in the opposite polarity with respect to
the coils.

*Discussion*

Option 1 uses a commutating resistor which provides a negative voltage,
L/R decay action during the time that the rectifier polarity is being
switched. The highest current level at which the reversal process could
begin would be Vinv/R, where Vinv is the max available rectifier voltage
magnitude in the invert mode (say 60% of Vdo, 0.6 \* 4kV = 2.4kV), and R
is the ohmic value of the commutating resistor. The parasitic current
drawn by the resistor would have a maximum value of Vmax/R where V is
the maximum power supply voltage magnitude (4kV). The energy deposition
in the resistor drives its cost. If the resistor is introduced near
current zero and is assumed to be connected for the full pulse duration
thereafter and exposed to the maximum available voltage, then a worst
case loss could be computed. Allowing 10% of 20kA = 2kA at 4kV, R =
4kV/2kA = 2 Ω. The current reversal process could begin at 2.4kV/2 =
1.2kA. The energy dissipation due to 4kV for the pulse duration after
reversal (≈ 1 sec) would be 4kV\^2/2 = 8 MJoule. At a once per 600
second rate the average power would be 13.3kW. This is a modest size
resistor.

During the process of commutating the current out of S1 and S4, a brief
voltage spike with magnitude ≤  2.4kV will appear on the load. The
duration of the spike will depend on the commutating inductance and
current. Assuming that the CLRs are the same as those used on TFTR
(265µH), and assuming 2.4kV commutation voltage applied to force 1.2kA
into 2Ω, the time duration will be:

t = L/R\* ln((V-IoR)/V)

t \< 100µS

This short duration voltage spike should not have a deleterious effect
on the OH current.

Options 2 and 3 switch from series to anti-parallel near current zero,
and then back to series in the opposite current polarity, and provide
full control of the current around zero, albeit at half voltage.

Options 2 and 3 are similar, in that they provide full control of the
current as it passes through zero. Option 3 requires fewer new switching
devices than Option 2, but requires rectifier modification both in power
and control circuits. Probably the cost of the modifications exceeds the
savings in switching devices. Also, if the rectifier was reconfigured as
indicated then its ampacity would be adequate for the OH pulse, but not
for the 5 second pulse which it would see when used in the CHI function.
Therefore, Option 3 is excluded from further discussion.

Option 2 uses a more complicated rectifier control and switching
sequence than Option 1. This would make the use of mechanical switching
devices more difficult because of their long switching times and jitter.
It is desirable to leave open the possibility of mechanical switches
because of cost considerations.

Option 1 could use mechanical switches for S1, S2, S3, and S4 with the
only penalty for switching time delay being the loss of power supply
control of the current during the L/R decay interval near zero. Probably
a zero current detector would be required to protect S1 and S4. S2 and
S3 would have to close on to voltage but as long as the rectifiers are
held in invert then the R1, R2, S2, S3 loop remains back biased and no
current will flow. If S5 is a mechanical switch then it would probably
need to be held closed after reversal and would serve only to reduce the
resistor energy dissipation prior to reversal. A diode could be used in
which case the resistor would dissipate energy during the current
reversal process and whenever the rectifier polarity resulted in a
forward bias on the diode which (based on the nominal waveform) consists
of most of the period after reversal. Therefore the diode would behave
more or less like the switch, in so far as the resistor energy is
concerned. Similarly, if S5 is a thyristor then the gate could be
blocked after reversal but the current would only extinguish if the
rectifier polarity would reverse which, according to the nominal
waveform, does not occur until the conclusion of the pulse. Thus the
thyristor would also behave more or less like the switch, in so far as
the resistor energy is concerned. A GTO could be used for S5. It would
have to be of the symmetric (able to block both forward and reverse
voltage) type. The GTO would permit the exclusion of the resistor after
it had served its current reversal duty. Thus the resistor energy rating
could be lower, and the rectifiers would not be burdened by the extra
current load during the pulse.

*Conclusions and Recommendations*

Options 2 and 3 give a better degree of control during the current
reversal, but would likely be more costly than Option 1. Assuming that
this extra degree of control is not important, Option 1 should suffice
and, being less costly, should be adopted. Concerning the type of
switching devices, since it is not clear that mechanical switches (e.g.
vacuum contactors) would be less costly than thyristor switches,
thyristor switches will be assumed for now. Concerning switch S5 which
excludes the resistor outside of the current reversal interval, a GTO
switch will be assumed for now. Ultimately the cost of the GTO vs.
conventional thyristor switch vs. diode vs. mechanical switch needs to
be traded off against the cost of the resistor and the impact of the
parasitic current on the power supply performance. The GTO must be of
the symmetric blocking type, which may not be readily available at high
power ratings.

cc:

C Ancher H Anderson R Hatcher S Kaye M Ono

D Mc Bride M Peng S Ramakrishnan

NSTX File