### THE INFLUENCE OF VARIOUS FRONT CONTACT MATERIALS

### ON THE PERFORMANCE OF CdTe SOLAR CELLS

R. Mamazza, U. Balasabramanian, S. Gayam, S. Bapanapalli, L. Nemani, M.
Jayabal, H. Zhao,

D. L. Morel and C. S. Ferekides

Clean Energy Research Center, Department of Electrical Engineering

University of South Florida, Tampa, FL 33620

**ABSTRACT**

The use of a resistive, or buffer, layer in the front con-tact structure
of CdTe solar cells has been known to im-prove solar cell performance,
in particular when the CdS thickness is relatively small. This paper
reviews the per-formance of CdTe solar cells fabricated on various front
contact bi-layer combinations. Conductive (low-ρ) trans-parent oxides
utilized for this work include SnO~2~:F, Cd~2~SnO~4~ and ITO; resistive
(high-ρ) transparent oxides include SnO~2~, In~2~O~3~, and Zn~2~SnO~4~.
All high-ρ layers were found to be effective within a range of
processing condi-tions and process/device characteristics. Buffer layers
of Zn-Sn-O appear to be the most promising high-ρ films for the
fabrication of CdTe cells with small CdS thickness without compromising
the V~OC~ and FF.

**INTRODUCTION**

The most commonly used front contact materials for the fabrication of
CdTe/CdS solar cells are SnO~2~ and ITO. Tin oxide is suitable for these
devices for several reasons, including its thermal and chemical
stability when subjected to the various cell fabrication steps, while
ITO offers superior electro-optical properties. Work on alternative
transparent contacts and buffer layers, by the CdTe Group at NREL, has
resulted in record efficiencies for the CdTe technology \[1\]. An
important characteristic of the record performance devices was the use
of a resistive (buffer) Zn~2~SnO~4~ (ZTO) layer; the use of a buffer
layer at the front contact is known to enhance device performance and
its role becomes more critical for small CdS thicknesses. Thinner CdS
films are desirable for CdTe devices in order to enhance their response
at short wavelengths (\<510 nm) and therefore improve device
performance; the challenge associated with thin CdS films is well known,
as device characteristics degrade rapidly for thicknesses below approx.
800 Å. The primary objective of this work was to investigate and compare
the potential of several transparent oxides as front contact materials
for CdTe solar cells. Materials utilized in this study include binary
and ternary compounds based on Cd, Zn, Sn, and In. With one exception
all front contact materials were prepared by sputtering, a process that
offers significant manufacturing advantages for large area module
manufacturing.

**EXPERIMENTAL**

With the exception of conductive SnO~2~:F, all other transparent oxides
were deposited by rf (co)-sputtering. Table 1 summarizes the deposition
conditions used for the various compounds. In some cases these materials
were deposited at room temperature and subsequently heat treated at high
temperatures (400-625°C) in order to improve their structural
properties. For cell fabrication the front contact had a bi-layer
structure: low-ρ/high-ρ(buffer). Following the deposition of the
bi-layers, solar cells were completed using procedures described
previously \[2\]. The CdS and CdTe layers were deposited by chemical
bath deposition (CBD) and close-spaced sublimation (CSS) respectively.
All devices were subjected to the typical CdCl~2~ heat treatment and the
back contacts were formed using HgTe:Cu-doped graphite paste. Solar
cells were characterized using standard J-V and spectral response
measurements; thin films were characterized for resistivity, optical
transmission and crystallinity.

Table 1. Deposition Process Summary for the Various Oxide Films Used for
the Bi-layer Front Contacts

+-----------------------+----------------------------------------------+
| Material              | Deposition Process                           |
+-----------------------+----------------------------------------------+
| ITO (low-ρ)           | rf-sputt. of 90%In~2~O~3~:10%SnO~2~ (4N) in  |
|                       | Ar; T~SUB~=300°C                             |
| ρ≈2.0x10^-4^ Ω-cm     |                                              |
+-----------------------+----------------------------------------------+
| SnO~2~:F (low-ρ)      | CVD TMT and O~2~ (He ambient); T~SUB~=480°C  |
|                       |                                              |
| ρ≈4.0x10^-4^ Ω-cm     |                                              |
+-----------------------+----------------------------------------------+
| Cd~2~SnO~4~ (low-ρ)   | rf co-sput. of CdO and SnO~2~ (4N) in Ar;    |
|                       | room temp.                                   |
| ρ≈2.0x10^-4^ Ω-cm     |                                              |
+-----------------------+----------------------------------------------+
| SnO~2~ (high-ρ)       | react. sput. of Sn (4N) in Ar/O~2~;          |
|                       | T~DEP~=300°C                                 |
+-----------------------+----------------------------------------------+
| In~2~O~3~ (high-ρ)    | react. sput. of In (4N) in Ar/O~2~;          |
|                       | T~DEP~=300°C                                 |
+-----------------------+----------------------------------------------+
| Zn~2~SnO~4~ (high-ρ)  | rf co-sput. of SnO~2~ and ZnO in Ar;         |
|                       | T~DEP~=25-425°C                              |
+-----------------------+----------------------------------------------+

**RESULTS AND DISCUSSION**

**Cd~2~SnO~4~/SnO~2~ Bi-Layers**

One of the low-ρ oxides considered is Cd~2~SnO~4~ (CTO) due to its
superior electro-optical properties and the performance levels achieved
with this as the transparent contact \[1\]. For this work it was
utilized with both SnO~2~ and Zn-Sn-O as the high-ρ layers. Table 2
summarizes results from a series of CdTe solar cells fabricated using
Cd~2~SnO~4~/SnO~2~ as the front contact; the only process variation for
these devices is the deposition method used for the high-ρ SnO~2~. The
most notable result from this group of devices is the fact that the
device without a high-ρ layer exhibits performance comparable to those
fabricated with a high-ρ layer. Although, the role of the buffer is not
completely understood yet, it is believed that one of its functions is
to prevent the CdTe from coming in direct contact with the (low-ρ) front
contact, especially when cells are fabricated with thin CdS. It is
possible that in this case, the smooth surface of Cd~2~SnO~4~ influenced
the CBD CdS deposition and resulted in thin (80 nm) yet pinhole free CdS
films; as a result no CdTe/Cd~2~SnO~4~ micro-junctions were formed.
Since the as-deposited (at room temperature) Cd~2~SnO~4~ films are
highly resistive, another possibility is that the subsequent annealing
process, did not result in complete re-crystallization, leaving the
surface of Cd~2~SnO~4~ resistive and functioning as the high-ρ buffer
layer \[3\]. Based on these results it appears that one can fabricate
efficient CdTe cells directly on Cd~2~SnO~4~ without a buffer; it is
also apparent that the SnO~2~ deposition method is not a critical factor
influencing device performance, and therefore a process such as reactive
sputtering, which is cost effective with relatively fast deposition
rates, can be utilized for the fabrication of large area CdTe PV
modules.

Table 2. Solar Cell Results for Devices Fabricated on CTO/SnO~2~
Bi-layer Front Contacts

  ------------------------- -------------- ----------- -------------------
  Buffer                    V~OC~ \[mV\]   FF \[%\]    J~SC~ \[mA/cm^2^\]

  None                      821            69.6        23.1

  React. Sput SnO~2~        825            69.7        23.6

  Sput. SnO~2~              830            68.1        23.1

  CVD SnO~2~                849            68.9        23.9
  ------------------------- -------------- ----------- -------------------

**In~2~O~3~:SnO~2~(ITO)/In~2~O~3~ Bi-layers**

Another high-ρ material considered during this work is In~2~O~3~. Light
J-V for CdTe cells fabricated on ITO/In~2~O~3~ bi-layers are shown in
Fig. 1. These results suggest the front contact of the device fabricated
directly on ITO (i.e. no In~2~O~3~ buffer) is not ohmic (as indicated by
the I-V behavior around V~OC~). This is believed to be related to the
surface properties of ITO (O~2~ concentration), which can cause the work
function of this material to vary considerably \[4,5\]. All other
devices shown in Fig. 1 exhibit similar performance characteristics,
with small variations in their series resistance; these variations do
not appear to be related to the thickness of In~2~O~3~. In order to
determine how effective In~2~O~3~ films are as buffers for CdTe cells, a
series of devices were fabricated with varying In~2~O~3~ and CdS
thickness; the results are summarized in Fig. 2. Devices fabricated with
CdS of 60 and 70 nm thickness, exhibit similar performance
characteristics which are essentially independent of the In~2~O~3~
thickness; the V~OC~ and FF are greater than 810 mV and 65%
respectively. The overall efficiency was higher for the 60 nm cells due
to their higher J~SC~'s (0.3-0.5 mA/cm^2^ higher). The SR of the 60 nm
CdS cells is shown in Fig. 3 where the blue response (below the CdS
bandgap) is in the range of 50-70%. Smaller CdS thicknesses (50 nm) lead
to lower FF's (\<65%) and V~OC~'s (\<800 mV). These results indicate
that In~2~O~3~ can be an effective buffer layer, even at small
thicknesses on the order of 250 Å, which yielded the best overall
performance of 14.2%, corresponding to a V~OC~, FF and J~SC~ of 820 mV,
72%, and 24.04 mA/cm^2^ respectively.

![](media/image1.wmf){width="3.2417322834645668in"
height="3.05in"}![](media/image2.wmf){width="3.2417322834645668in"
height="3.042913385826772in"}

**Zn~2~SnO~4~ Buffer**

Work on the most successful to-date buffer, Zn~2~SnO~4~ (ZTO), has
focused on studying the effect several material and process parameters
on cell performance; these include the Zn/Sn ratio in the as-deposited
films, the film thickness, and post-deposition annealing temperature; as
indicated in table 1, Zn-Sn-O films were co-deposited from SnO~2~ and
ZnO and it was therefore possible to control the Zn/Sn ratio. All
Zn-Sn-O films deposited at room temperature were found to be amorphous
regardless of the Zn/Sn ratio, and devices fabricated with such films
were found to exhibit poor characteristics (results discussed later in
Fig. 5). Post-deposition annealing in inert ambient was found to lead to
re-crystallization. Fig. 4 shows XRD data for a series of Zn-Sn-O films
deposited on glass/SnO~2~:F substrates, at room temperature, with a
Zn/Sn ratio of 2.0, and heat treated in He (AD identifies as-deposited
films); data for a SnO~2~ film are also included for reference; (peaks
located at 26.56, 51.77, and 54.66° correspond to SnO~2~). The data in
Fig. 4 indicates that Zn-Sn-O films begin to crystallize at annealing
temperatures of 575°C; the peak located at approx. 34.30° (marked by the
vertical dotted line) corresponds to the (311) plane of the Zn~2~SnO~4~
phase. Additional peaks not clearly visible due to their low intensity
were also identified to belong to the Zn~2~SnO~4~ phase. For films
deposited with a Zn/Sn ratio of 2.5, XRD analysis revealed the formation
of Zn~2~SnO~4~ with no other Zn or Sn compounds present, suggesting
that: (a) the excess Zn evaporated during the annealing process, or (b)
amorphous Zn-O was present in these films. Results for Zn/Sn ratios
below 2.0 (1.0 and 1.5) are still preliminary, but it appears that for
these ratios the films do not crystallize after annealing (up to 600°C
annealing temperatures).

![](media/image3.wmf){width="3.2417322834645668in"
height="2.866535433070866in"}

Solar cell characteristics for a series of devices fabricated on
SnO~2~/Zn-Sn-O bi-layers for Zn-Sn-O films annealed under the same
conditions as those depicted in Fig. 4 are shown in Fig. 5. Clearly
performance improves with annealing temperature, with optimum
performance obtained for Zn-Sn-O films annealed at 600°C. Higher
temperatures (625°C) were also attempted with device results being
similar to those obtained for 600°C. Based on these results it is
apparent that the structural properties of the Zn-Sn-O buffer are having
a significant impact on device performance. It is preferable that the
Zn-Sn-O films are at least partially crystallized prior to the
deposition of CdS and CdTe.

![](media/image5.wmf){width="3.2417322834645668in"
height="3.025196850393701in"}

The SR of cells fabricated with Zn-Sn-O films annealed at different
temperatures is shown in Fig. 6; all other device characteristics and
processing was kept constant including the CdS thickness. The main
differences among these devices are in their "blue response" (\<510 nm).
The device fabricated on as-deposited Zn-Sn-O exhibits the highest
response suggesting that the CdS for this device has been consumed to a
greater extent than the other three. At the other extreme (i.e. lowest
blue response) is the device for
![](media/image6.wmf){width="3.248031496062992in"
height="3.0456692913385828in"}which the Zn-Sn-O was heat treated at
600°C suggesting that CdS consumption in this case was the lowest. The
other two devices exhibit similar SR, which lies between the two extreme
cases just described. These results suggest that the annealing
temperature of the Zn-Sn-O films, which as discussed above determines
their structural properties, can be used to control the consumption of
CdS during the fabrication process. The most significant results
obtained for cells fabricated with Zn-Sn-O (Zn/Sn=2.0) as the high-ρ
buffer layer are depicted in Fig. 7. The SR of these devices suggests
that the CdS is completely consumed, or possibly contributing to
collection, while the V~OC~ and FF remained at relatively high levels in
the range of 820-835 mV and 68-69% respectively, demonstrating the
potential of this buffer to be utilized with thin CdS films (J~SC~'s
were in the range of 24.5-25.0 mA/cm^2^). It should also be noted that
the devices depicted in Fig. 7 were fabricated with a
Cd~2~SnO~4~/Zn~2~SnO~4~ bi-layer front contact.

![](media/image7.wmf){width="3.2417322834645668in"
height="3.033464566929134in"}

Using monochromatic J-V measurements we have shown that one of the
positive effects of the high-ρ layer is enhancement of collection
leading to higher FF's \[6\]. A model on the role of the buffer and its
impact on device operation, suggesting that the electric field
distribution and therefore collection can be affected by this layer has
been recently proposed \[7\].

**CONCLUSIONS/SUMMARY**

Several low-ρ/high-ρ combinations have been investigated as front
contacts to CdTe solar cells. Of the high-ρ compounds studied: (a)
In~2~O~3~ was found to be effective at thicknesses of just 250 Å, while
the CdS thickness could be reduced to 600 Å; (b) SnO~2~ was also
effective regardless of the deposition method used, offering a wide
range of processing options including reactive sputtering; (c) Zn-Sn-O
films appear to offer the best alternative for reducing the CdS
thickness without losses in V~OC~ and FF, however, the overall process
is sensitive to several process/film characteristics which must be
optimized. The results obtained for Cd~2~SnO~4~ suggested that CdTe
cells can be fabricated directly on this material without a high-ρ
buffer layer. One of the benefits of utilizing a high-ρ buffer may be
its effect on field distribution in the absorber leading to higher FF's.

**Acknowledgements**

This work was supported by the National Renewable Energy Laboratory
(NREL) under subcontract NDJ-2-30630-18.

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