**SVX III Silicon Strip Detector Upgrade Project**

**G-Link/Finisar Transmitter and Receiver Cards**

**\--PRELIMINARY\--**

11/20/1995

Jeff Andresen

Document \# ESE-SVX-951018

Table of Contents

**1. GENERAL INFORMATION**

1.1 System Introduction

1.2 Description Of Component

2\. THEORY OF OPERATION AND OPERATING MODES

2.1 Basic Features & Operation

2.2 Diagnostic Features

2.2.1 INTERFACE SPECIFICATIONS

2.3 G-Link Daughter Card/Motherboard Pin Configuration

2.3.1 G-Link TX Card Connector Pin Configuration

2.3.2 G-Link RX Card Connector Pin Configuration

3\. ELECTRICAL & MECHANICAL SPECIFICATIONS

3.1 Packaging & Physical Size

3.2 PC Board Construction

3.3 Power Requirements

3.4 Cooling Requirements

4\. SAFETY FEATURES & QUALITY ASSURANCE PROCEDURES

4.1 Module Fusing

5\. APPENDICES

5.1 A1: Parts List

5.2 A2: Schematics

6\. References

# GENERAL INFORMATION 

This document describes the High Speed Optical Serial G-Link/Finisar
Transmitter and Receiver cards, hereafter referred to as the G-Link TX
and RX cards. The G-Link TX and RX cards are to be used on the SVX III
readout system. These modules interface with the Fiber Interface Board
(FIB), the VME Readout Buffer (VRB), and with the serial data G-Link
receiver section of the SVT to transmit data from the remote detector
location to the data acquisition system.

## System Introduction 

The G-Link TX is a daughter card that mounts on the FIB. Up to 20 bits
of parallel data is serialized and transmitted over fiber at data rate
speeds up to 1.25 Gbps. There will be four G-Link TX cards on a FIB. The
Finisar optical devices on the G-Link card use a ST fiber connector and
50/125 μm or 62.5/125 μm multimode fiber. The four G-Link card fibers
will have ST connectors on the front panel of the FIB. The data is
transmitted over 4 individual fibers within a cable to an optical
splitter. The data leaves the optical splitter on two fibers. One fiber
goes to the G-Link RX card mounted on the VRB while the other fiber goes
to the G-Link RX card at the SVT. To get a better understanding of the
Hewlette Packard G-Link and Finisar optical devices, refer to the
appropriate documentation \[1\] \[2\] \[3\]. There is a possibility that
fusion splices will be used at the optical splitter to eliminate two
connector losses. A block diagram of the hardware that makes up the data
path is in figure 1.

Figure 1: G-Link Data Path

The path to the SVT from the optical splitter is not shown but is the
same as the path going to the VRB.

## Description Of Component 

The G-Link TX is a 2 inch by 3.75 inch card containing a 60 pin AMP
104068-6 connector, a HP HDMP-1012 transmitter, a Finisar FTM-8510
transmitter, and a few discrete surface mount components. The G-Link RX
card contains the 60 pin AMP 104068-6 connector, the HP HDMP-1014
receiver, the Finisar FRM-8510 receiver, and some discrete surface mount
components.

# THEORY OF OPERATION AND OPERATING MODES

## Basic Features & Operation

The G-Link cards are general purpose serial optical link cards that can
be operated in several configurations. Control signals are available at
the AMP connector to allow the motherboards to select the mode of
operation. The simplex method III mode described in the HP data sheet
\[1\] is recommended by Finisar.

## Diagnostic Features

The G-Link cards can be tested with the Fermilab designed CD/ESE Bit
Error Rate Tester (BERT) via an Adapter card. The BERT is a three board
set consisting of the BERT, the G-Link TX Adapter board, the G-Link RX
Adapter board, and interconnecting differential cables. This permits the
motherboards to receive a tested G-Link card. With the use of extended
cables, testing can include environmental testing at elevated
temperatures.

### INTERFACE SPECIFICATIONS

## G-Link Daughter Card/Motherboard Pin Configuration 

### G-Link TX Card Connector Pin Configuration

The G-Link TX card connector is implemented on a 60 conductor 50 mil
pitch connector. The pin assignment for the G-Link TX is provided in
table 1.

  ---------------- ------------------- --------------- -------------------
  **Pin Number**   **Signal**          **Pin Number**  **Signal**

  1                DGND1               31              VCC4

  2                VTT1                32              LOCK

  3                VTT2                33              M20SEL

  4                FLAGSEL             34              VEE1

  5                VCC1                35              VEE2

  6                DAV\*               36              CAV\*

  7                FF                  37              TXSTRBIN+

  8                ED                  38              TXSTRBIN-

  9                D0                  39              FLAG

  10               D1                  40              VCC5

  11               D3                  41              D2

  12               D5                  42              D4

  13               D7                  43              D6

  14               D9                  44              D8

  15               VCC2                45              D10

  16               D11                 46              D12

  17               D13                 47              D14

  18               D15                 48              D16

  19               D17                 49              D18

  20               D19                 50              VCC6

  21               VCC3                51              NC2

  22               DIV1                52              OFC_STAT

  23               LOOPEN              53              RST\*

  24               RX_OPT_PWR          54              DIV0

  25               RX_SYS1             55              CS\*

  26               READY               56              SI

  27               RX_SIG_DET          57              SO

  28               RX_SYS2             58              SCLK

  29               DVCC                59              VCC7

  30               NC1                 60              DGND2
  ---------------- ------------------- --------------- -------------------

Table 1: G-Link TX Connector Pin Configuration

### G-Link RX Card Connector Pin Configuration

The G-Link RX card connector is implemented on a 60 conductor 50 mil
pitch connector. The pin assignment for the G-Link RX is provided in
table 2.

  ---------------- ------------------- --------------- -------------------
  **Pin Number**   **Signal**          **Pin Number**  **Signal**

  1                DVCC                31              DGND2

  2                DIV0                32              DIV1

  3                VCC1                33              ERR

  4                D0                  34              D1

  5                D2                  35              D3

  6                D4                  36              D5

  7                D6                  37              D7

  8                D8                  38              VCC4

  9                D9                  39              D10

  10               D11                 40              D12

  11               D13                 41              D14

  12               D15                 42              D16

  13               D17                 43              D18

  14               VCC2                44              VCC5

  15               D19                 45              CAV\*

  16               FLAG                46              LINKRDY\*

  17               FF                  47              LOOPEN

  18               DAV\*               48              ACTIVE

  19               RX_SIG_DET\*        49              FDIS

  20               STRBOUT-            50              VCC6

  21               STRBOUT+            51              EQEN

  22               SIMCLK-             52              RX_OPT_PWR

  23               SIMCLK+             53              RX_SYS2

  24               STAT1               54              RX_SYS1

  25               VCC3                55              FLAGSEL

  26               STAT0               56              VEE1

  27               M20SEL              57              VEE2

  28               VTT1                58              SMC1\*

  29               VTT2                59              SMC0\*

  30               DGND1               60              VCC7
  ---------------- ------------------- --------------- -------------------

Table 2: G-Link RX Connector Pin Configuration

# ELECTRICAL & MECHANICAL SPECIFICATIONS

## Packaging & Physical Size

The G-Link cards are designed as daughter cards which interface with the
motherboards. Figure 2 is a drawing of the G-Link cards.

Figure 2: G-Link Card

The size of the card is 2 inches by 3.75 inches and has a maximum height
of 0.583\" to meet the overall component height of a standard VME slot.
To accomplish this, the G-Link chip and Finisar module are mounted on
the bottom side of the G-Link card. Discrete surface mount devices can
be mounted on the top side of the card as long as the component height
is less than 0.070\". The motherboard uses a 60 pin AMP 104078-6
through-hole receptacle connector. The G-Link cards use a 60 pin AMP
104068-6 through-hole header connector. The 60 pin connector, HP G-Link
chip, and Finisar optical module are mounted on the bottom side of the
daughter card. The G-Link chip must have a correctly sized heat sink.
Mounting holes are located for attaching the Finisar module to the card,
attaching the card to the FIB or VRB, and attaching the card to the SVT
G-Link motherboard. The mounting holes have a diameter of 0.150\". The
top and bottom end mounting holes are 0.200\" from the corners of the
card. The Finisar mounting hole position is determined by the placement
of the Finisar. The middle two mounting holes are 1.5\" from the 60 pin
connector end of the card. The motherboard must be void of any
components under the daughter card. A 2.25 inch area where the ST fiber
optic connection is made must remain clear of any other components on
the motherboard. Figure 3 is a side view of the motherboard and daughter
card.

Figure 3: Side View of Daughter Card/Motherboard

The card to card spacing is 0.450\". Adding the 0.063\" for the
thickness of the daughter card results in a total height of 0.513\".
This height is within the height requirements of VME for a single slot
with 0.070\" for surface mount resistors and surface mount bypass
capacitors on the top side of the daughter card .

## PC Board Construction

The G-Link cards are made up of four power/ground planes and four
signals planes. The thickness of the card is 0.063\" with a tolerance of
0.007\". A 22 μF surface mount capacitor should be included on the +5 V
and -5.2 V supply layers. The card must be constructed using high speed
design rules. The G-Link traces must be less than 1 inch in length, with
a recommended trace width of 0.025\", and without any vias. The card
impedance is 50 ohms. The Finisar and HP reference material should be
referred to for further information on high speed layout.

## Power Requirements

The Table 3 provides an estimate on the power requirements for the
G-Link TX and G-Link RX.

+-------------+-----------------+-------------------+------------------+
| Device      | Supply Voltage  | Supply Current    | Power            |
+-------------+-----------------+-------------------+------------------+
| G-Link TX   | +5 V            | 120 mA            | 0.63 W           |
|             |                 |                   |                  |
|             | -5.2 V          | 400 mA            | 2 W              |
+-------------+-----------------+-------------------+------------------+
| G-Link RX   | +5 V            | 90 mA             | 0.48 W           |
|             |                 |                   |                  |
|             | -5.2 V          | 520 mA            | 2.6 W            |
+-------------+-----------------+-------------------+------------------+

Table 3: Power Supply Requirements for G-Link Cards

## Cooling Requirements

The Finisar optical modules do not present any special cooling problems.
The HP G-Link devices require heat sinks and fan cooling. The heat sink
should be sized and positioned to provide for optimum cooling of the
G-Link devices.

# SAFETY FEATURES & QUALITY ASSURANCE PROCEDURES

## Module Fusing

The G-Link cards will be powered by the motherboards that they are
attached to. Fusing of the G-Link cards shall be provided by the
motherboard in which they are installed.

# APPENDICES

## A1: Parts List

## A2: Schematics

# References

\[1\] \"Low Cost Gigabit Rate Transmit/Receive Chip Set\", Hewlett
Packard document.

\[2\] \"Design Notes: Using the FTM-8500, FRM-8500 and FCC-2000 to build
high speed fiber optic links\", Finisar Corporation document.

\[3\] \"Application Note: Interfacing Various Gb/s Chip Sets to FTR-XX10
Transceivers, FTM-XX10 Transmitters, FRM-XX10 Receivers\", Finisar
Corporation document.