# ICECUBE DAQ

# Phase 1 Deliverables for DAQ \"Plan B\"

April 25, 2002

Author: **David Nygren**

**Version 1.0, 25 April 2002, R.Stokstad and RHMinor**, updated string
18 reference and references to version G

**Version 1.1, 10 May 2002 DRNygren, RHMinor, CMcParland,** consistency

Version 1.2, 14 May 2002, DRNygren, RHMinor, CMcParland, R. Stokstad
updated document list. Corresponds to Work_plan_H_vsn1.2.doc and
daq_cost_vsn1.0.xls

## Deliverables:

-   DOM Main Board & DOM HUB Engineering Requirements Review (June 2002)

-   DOM Main Board & DOM HUB Protoype Design Review (summer 2002)

-   3.3.1.1 DAQ System Architecture (follows WBS)

-   3.3.1.2 System Design

-   3.3.1.3 DOM Main Board (MB) Design

-   3.3.2.1 System Software Architecture

-   3.3.1.4 DOM HUB Engineering Software

-   3.3.2.8 Hardware Test Software

-   18 - 24 fully loaded, tested, \"pre-production\" DOM Main Boards,
    ready for OM integration at UW.

-   Documentation, as noted

***General Scope:***

This description spans broader boundaries, not necessarily according to
WBS definitions

-   Documentation as noted below;

-   Coordination and management effort with UW Project Office.

-   Full-scope engineering of DOM Main board;

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-   Moderate investment of effort to minimize power dissipation;

-   Production engineering to optimize reliability;

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-   Complete *Main DOM Application* **software** (but probably not final
    version);

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-   Build on current version, with modifications appropriate to hardware
    changes;

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-   Complete *Main DOM Application* **firmware** (but probably not final
    version);

-   Test software, to demonstrate functionality of new DOM MB as defined
    Deliverable;

-   Test of single DOM MB for complete functionality with DOMCOM board;

-   Test of two DOMs on one twisted pair, demonstrating robust
    master/slave behavior;

-   Demonstration of technical advances using laboratory DOMs and String
    18;

-   Modest engineering improvements to the LED beacon board;

-   Modest engineering effort to accommodate an IceTop variant.

## Milestone Definitions:

-   **Single DOM Main Board Test**. This test phase will demonstrate
    functionality of all DOM MB features. Test effort will include
    cycling to temperatures below -40˚ C and operation at lowest
    possible temperature. This test phase will include PMT and PMT HV
    base (to be supplied by others. Performance will be measured using
    DOMCOM card interface, *test software suite.* Test results will be
    documented. The Main Board Test will include:

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-   **Robust operation of DOM application;**

-   **Robust operation of FPGA design;**

-   **Integration of PMT HV base control;**

-   **Integration of LED Beacon Board control;**

-   **Demonstration of robust boot-strap process;**

-   **Accuracy of ATWD capture of PMT signals;**

-   **Demonstration of seamless ping-pong ATWD operation;**

-   **Integration of feature extraction;**

-   **Simultaneous Acquire/Transmit of data;**

-   **Robust transfer of multi-event block-formatted data;**

-   **Demonstration of Fast communication at 500 kbits/s;**

-   **Optimized termination with minimized power dissipation;**

-   **Measurement of PMT analog signal path noise;**

-   **Characterization of FADC PMT data stream;**

-   **Measurement of dynamic range in ADC and photoelectrons;**

-   **Local clock stability;**

-   **Cable length offsets using RAP method;**

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-   **Two DOMs per Twisted Pair**. This test phase will demonstrate that
    two DOMs can be operated successfully using one twisted pair. This
    test phase will use the DOMCOM card interface using *test software*
    *suite*. Test results will be documented. The Two DOMs/twisted-pair
    Test will include:

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-   **Clock \"synchronization\" process;**

-   **Measured stability of both local clocks;**

-   **Cable offset measurements using RAP method;**

-   **Robust messaging behavior;**

-   **Robust boot-strap process;**

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-   **Master-slave relationship integrity;**

## Documentation:

-   DAQ System Requirements

-   DAQ Software Requirements

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-   DAQ System Architecture

-   DOM MB

-   DOM HUB

-   Master Clock Distribution

-   Test Software Suite

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-   DAQ Hardware Requirements

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-   DOM Main Board

-   DOM HUB

-   Master Clock Distribution

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-   DAQ System Design

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-   DOM MB Prototype Design Document,

-   DOM MB Software Design Document

-   DOM HUB Prototype Design Document, in collaboration with DESY

-   DOM HUB Software Design Document

-   Master Clock Design Document

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-   Test Results

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-   DOM Main Board Performance

-   Test Results: Two DOMs/twisted pair

## DOM Software:

1.  **Test Software** suite for Main DOM MB, using DOMCOM interface, and
    DOMSERVER software package.

2.  **Main DOM Application**, revised and completed.

## DOM Electrical Engineering:

### **Hardware:**

-   Fast Communications signal processing circuitry

-   Improved cable termination to save power

-   Improved common-mode noise rejection

-   Neighbor Logic to permit coherence length

-   3 PMT gain channels for ATWD

-   Improved characterization of ATWD performance

-   Optimize clock signal in ATWD

-   Optimize analog signal path noise & bandwidth

-   Optimize FADC dynamic range

-   Two DOMs/twisted pair

-   Characterize new Toyocom Oscillators

-   PMT HV Base Interface modifications

-   Commercial DC-DC converters

-   FPGA with embedded ARM CPU

-   New bottoms-up PCB Layout

-   Generalized interface for LED beacon board (or geophones,....)

### **Firmware:**

-   Robust Boot-strap scenario

-   Integration of Feature Extraction (supplied by Stockholm)

-   Event Buffering

-   Simultaneous read-out/write-in

-   Ping-Pong ATWD operation

-   FADC Data Stream for PMT

-   Two DOMs/twisted pair

***DOM HUB Software:***

> Functionality includes communication and testing of DOM HUB interface
> and design and initial implementation of DOM HUB software framework.

1.  Design interface mechanisms and data structures for interface
    firmware and Linux driver software.

2.  Design and implement Linux driver to above specifications.

3.  Provide rudimentary application-level test software to verify
    operation of driver/hardware interface.

4.  Design of low-level DOM MB data buffering structures and mechanisms.

5.  Design and implementation of DOM HUB external interface software.
    This primarily consists of TCP/IP port and messaging mechanisms for
    programmatic interactions between DOM HUB and other systems.

6.  Implementation of DOM MB data buffering mechanism and DOM HUB test
    program to verify correct operation.

## Perspective:

The scope definition of Plan B permits the realization of a coherent set
of deliverables. The minimum boundary of the deliverables is defined by
all those processes that depend on time synchronization at the
nanosecond level. Beyond that, it is essential to establish the general
framework of DAQ software. The deliverables are intended to meet our
understanding of the NSF requirements for Phase 1, and to provide for a
rapid and smooth transition to IceCube Project mode as future MRE
funding may permit. No contingency is included in the cost estimates.
IceCube DAQ engineering efforts are obviously very front-loaded, and
limitations in scope & milestones in phase 1 will have potentially
far-reaching negative impacts on deployment schedule. These deliverables
are for DAQ only, and do not include the Data System WBS elements.
String 18 work includes activities that directly enhance progress
towards the deliverables.

The DESY group is responsible for the detailed electrical engineering
design of the DOM HUB. The DESY group will fabricate several prototype
DOM HUB boards. While the DOM HUB is not an explicit Phase 1
deliverable, it will be needed to realize a subsequent \"**string
test**\" involving an ensemble of DOMs operating in time-synchronized
data acquisition. The transition from Phase 1 to a subsequent Phase 2
(or MRE-funded project) will, as an implicit strategy, focus on a smooth
transition from the milestone of two DOMs/twisted pair to a string test
milestone (not part of phase 1, yet to be defined).

## \"Plan B\" Reduction in Scope:

The main reduction in scope relative to Work Plan G is in the DOM HUB
\"production\" software that would be used in ICECUBE to acquire data,
to provide control, to establish and maintain timing, to ensure stable
operation and message flow, and ultimately to produce good physics. The
implications of this reduction are potentially significant for the
IceCube Project schedule. The absence of this software will delay
meeting important milestones, explicitly outside the scope of phase 1,
but essential for the IceCube Project. These milestones are those tests
that involve using the new DOM HUB card at various levels of \"loading\"
(a fully loaded DOM HUB card supports eight DOMs, and must be tested to
show that a single card works. The next level of loading is the test of
a fully loaded DOM HUB, with eight DOM HUB cards + CPU, running a
\"string\" of DOMs; this test should be completed successfully before
production starts for IceCube strings)

Certain Documents listed in Work Plan G are not included.