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| PROCESSING MATERIALS, DEVICES AND DIAGNOSTICS FOR THIN FILM           |
| PHOTOVOLTAICS:                                                        |
|                                                                       |
| **[FUNDAMENTAL AND MANUFACTURABILITY ISSUES]{.smallcaps}**            |
|                                                                       |
| **Annual Report**                                                     |
|                                                                       |
| **to**                                                                |
|                                                                       |
| **National Renewable Energy Laboratory**                              |
|                                                                       |
| **under**                                                             |
|                                                                       |
| **Subcontract No. ADJ-1-30630-12**                                    |
|                                                                       |
| **9/05/04 to 9/04/05**                                                |
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![](media/image1.wmf){width="2.615972222222222in"
height="1.1333333333333333in"}

**Institute of Energy Conversion**

**United States Department of Energy**

**University Center of Excellence**

###### For Photovoltaic Research and Education 

Annual Report

to

National Renewable Energy Laboratory

under

Subcontract No. ADJ-1-30630-12

9/05/04-9/04/05

R. W. Birkmire, W. N. Shafarman, E. Eser,

S. S. Hegedus, B. E. McCandless, R. Aparicio, K. D. Dobson

[Institute of Energy Conversion]{.smallcaps}

[University of Delaware]{.smallcaps}

[United States Department of Energy]{.smallcaps}

[University Center of Excellence]{.smallcaps}

[For Photovoltaic Research and Education]{.smallcaps}

[(National Renewable Energy Laboratory)]{.smallcaps}

[Newark, Delaware 19716-3820]{.smallcaps}

**SUMMARY**

### CdTe-based Solar Cells

Research on CdTe-based solar cells includes five tasks: (1) High
Throughput CdTe Processing; (2) Back Contact Processing Options; (3)
ZnTe:Cu Semi-Transparent Contacts for Bifacial Device Analysis;
(4)Understanding and Improving V~oc~; and (5) Accelerated Stressing.

Processing options, which address a number of critical issues relating
to processing of thin-film CdTe/CdS devices have been addressed. The
window layer properties, including configuration, composition and
thickness have been shown to have a significant effect on final device
performance. We have selected Ga~2~O~3~ as the best high resistance
interface layer for our process. Engineering and thermo-chemical aspects
of the post-deposition CdCl~2~ treatment of CdTe were investigated.
Annealing CdTe films in the presence of CdCl~2~ and O~2~ promotes CdS
diffusion into CdTe and also shifts the chemical equilibrium of the film
surface, which may influence the bulk electrical properties of the CdTe.
Comparisons of wet and vapor CdCl~2~ treatment were discussed including
the development of a packed bed reactor for vapor CdCl~2~ treatments.
High efficiency with good spatial uniformity was achieved with vapor
CdCl~2~ treatment. Careful control of the O~2~ and humidity in the
anneal atmosphere is required to avoid the formation of deleterious
oxides, which will affect the Cd-vacancy concentration within the CdTe
film, leading to poor device performance. High throughput was evaluated
by increasing the CdTe deposition rate to 9 µm/min, reducing the CdCl~2~
treatment time while increasing the treatment temperature, and reducing
the CdTe thickness. VT devices with 5-7 µm thick CdTe deposited on
moving substrates at 9 µm/min using a 20 min vapor CdCl~2~ treatment at
415ºC achieved V~oc~ up to 840 mV and efficiency \> 13%. Devices with
efficiency of 11% were obtained with 2 min CdCl~2~ treatments at 465ºC.
For cells with CdTe thickness \~1.5 µm, efficiency \>10% was obtained .
V~oc~ and FF decreased for cells with CdTe deposited at \>80 µm/min and
for cells with CdTe thinner than 1.5 µm.

A number of steps are required for successful processing of back
contacts to CdTe; removal of any oxides, the formation of a Te-rich
surface, application of a Cu source, contact annealing and deposition of
a secondary contact. A number of methods can be used for each of these
steps. Consideration of different processes should include simplicity
and ease of industrial scale up. The nature of each process may also be
critical for contact and device stability. A thorough knowledge of
etching mechanics will allow the development of alternate or modified
etches that may be more efficient and faster, perhaps through the use of
catalysts, and safer to use, all of which will assist possible
industrial scale-up of CdTe technology. The results obtained from
monitoring the etching processes have also highlighted the usefulness of
VASE and GIXRD as diagnostic tools for monitoring the quality of
material surfaces during processing.

The Te rich surface can be formed by wet chemical etching or by 'dry'
deposition of Te, however, application of Cu should be carried out
immediately, to prevent atmospheric oxidation of the Te-rich surface. A
number of simple methods of Cu application have been studied including
Cu metal, CuCl doped graphite, dipping in CuCl, and Cu-doped ZnTe.
Contact annealing should be carried out in an inert atmosphere to avoid
oxidizing the back contact. A full understanding of the role of Cu and
other possible contact metals in the back contact chemistry and their
behavior within the CdTe/CdS structure is required before optimization
of device performance and stability can be obtained.

The use of an aniline-based treatment for back contact processing of
CdTe/CdS devices was investigated. The treatment was found to form
reproducible Te-rich CdTe surfaces, similar to oxidizing etches, which
would be expected to allow processing of improved Cu-based back
contacts. Analysis of bath conditions highlights that the presence of
aniline, Cl^-^ ions, dissolved O~2~, consistent illumination and control
of pH are critical for successful treatments. A photocatalytic mechanism
is proposed, involving the reduction of dissolved O~2~ by conduction
band electrons to produce H~2~O~2~ or similar, which etches the CdTe.
The reduction is complemented by the oxidation of aniline by valance
band holes. Best device results, with efficiencies ∼12%, have been
obtained for treatment times as short as 30 min. At longer treatment
times, device performance decreases, though the effect is not as severe
as has been observed with over-treatment of CdTe in oxidizing etches.
Criteria for possible substitutes for the toxic aniline are presented.
Results of potential substitutes are discussed. A crucial advantage of
aniline is that it is compatible with thinner CdTe films. Unlike more
aggressive etches like BDH or NP, aniline etching gives a high yield and
negligible shunting with CdTe devices \< 3 µm thick.

## 

Cu-doped ZnTe films grown by galvanic deposition were developed to
provide transparent ohmic contacts to CdTe solar cells. Control of the
Cu doping with triethanolamine was critical to limit the free Cu in
order to achieve high transparency (\>60% in the visible) and to
minimize shunting. Devices with ZnTe:Cu contacts had comparable
performance to devices with Cu/Au or Cu/Ni contacts, achieving V~oc~ of
0.82 V and fill factor (FF) of 68% for standard front illumination. The
ability to form a low barrier, Ohmic contact with ZnTe:Cu depends on the
CdTe surface treatment. Typically, devices with BDH or anilene
treatments had better forward bias behavior and do not exhibit roll-over
beyond V~oc~, indicating an ohmic low barrier contact has been formed.
Devices with Br-methanol had lower FF and exhibited rollover. Bifacial
spectral response (SR) measurements, through front and back contacts,
were analyzed and yielded a diffusion length (L) of 0.8 µm and depletion
width (W) of 2.5 µm for 5 µm thick CdTe cells. Backwall SR measurements
made through the transparent ZnTe contact are much more sensitive to L
and W than are measurements for standard front illumination. ZnTe:Cu is
a promising material for bifacial characterization as well as tandem
cell interconnects and more stable Cu-doped contacts. characterization
of devices with CdTe layer thickness from 1.5 to 10 µm is in progress.
Accelerated stress testing on devices with ZnTe:Cu contacts with
different concentrations of Cu is planned.

Changing the bias voltage, light intensity and temperature during stress
can induce transient degradation or recovery in V~oc~ of CdTe solar
cells. Simulated day/night cycles leads to daily degradation in the
light and recovery in the dark. Greater recovery in the dark and less
bias dependence is correlated with better overall stability. These
transients complicate the correlation between cell (indoor) and module
(outdoor) performance. Results are consistent with changes in electronic
states and recombination. No single stress protocol is likely to
identify all instability mechanisms.

Increasing V~oc~ in VT CdTe/CdS cells to \>900 mV and maintaining it in
cells with sub-micron thick CdTe layers requires an understanding of
existing cells, determination of the recombination sources in the cell,
quantifying the influence of back contact on V~oc~, especially in thin
devices, and assessing changes induced by depositing onto a moving
substrate at elevated rate (\>10 μm/min). The problem has two parts: 1)
defining limits to V~oc~ in CdTe solar cells in general and 2) defining
the influence of VT processing, especially in thinner cells.

We have found that the following empirical factors affect V~oc~ in
present-generation VT CdTe devices. When initial d~CdS~ \< 80 nm or
final d~CdS~ \< 40 nm, a buffer layer is needed to maintain V~oc~. The
highest V~oc~ is obtained for CdTe deposition \>500ºC. V~oc~ decreases
as CdTe thickness decreases to d~CdTe~ \< 1.5 μm. Thinner CdTe requires
re-optimization of the CdCl~2~ temperature time cycle and a less
penetrating surface etch, such as anilene instead of BDH. The CdCl~2~
surface is critical to device performance with aging reducing the
effectiveness of the CdCl~2~ treatment, including reduction in V~oc~ and
yield. High V~oc~ requires an O~2~ partial pressure during VT growth. Cu
in the contact does not appear to be necessary for V~oc~ \~ 0.78V but
Cu + HT is necessary for V~oc~\>0.80V. We have determined that a back
contact barrier has no effect on V~oc~, at least for devices with 3-4 µm
CdTe, consistent with recontacting studies from several years ago.
Eliminating voltage dependent collection has little effect on improving
V~oc~ on devices with FF\>65% but can have significant improvement on
cells with FF\<60%. The upper limit to V~oc~ obtained at low temperature
is around 1 V, suggesting this is the built-in potential. The highest
V~oc~ at 28°C obtained this year was 0.84V.

# *Collaboration/Teaming*

Support of the National CdTe R&D team continued through sub-team
leadership (Brian McCandless), bifacial and stress analyses, and
film/cell supply to other team members. Unprocessed and CdCl~2~ treated
PVD and VT CdTe/CdS stacks were sent to Caroline Corwine (Colorado State
University) for photoluminescence investigations of defects. Completed
devices were sent to Fred Seymour (Colorado School of Mines) for
investigation of defect levels by admittance spectroscopy. The cell
fabrication matrix evaluated was: with/without CdCl~2~ treatment,
with/without Cu, and with less and more intrusive etching prior to
metallization. Preliminary results of these studies were presented at
the Team meeting held in May 5-6, 2005. Steve Hegedus and Brian
McCandless made presentations at the team meeting: "Bifacial
CdS/CdTe/ZnTe Device Characterization", "Effect of Applied Bias during
Stress", "Sensitivity of CdTe/CdS Device Operation to Processing
Variations". IEC provided extensive analysis of Cu~x~Te back contacts
developed by Ilvydas Mathoulis (Ceramem Corporation) using nanoparticle
precursors. On-going collaboration with the University of Toledo
continued on the fundamental surface chemistry associated with aniline
treatments. IEC also conducted bias-dependent tensile pull tests of
as-deposited and stressed UT cells to elucidate changes induced by
processing and stress variations. In these cells, the adhesion of all
layers was sufficiently high that failure occurred either at the
epoxy-cell interface or via glass cracking, which is a tacit
demonstration that cells with metallized contacts can exhibit high
mechanical durability. Other activities included providing VT samples to
Ken Kormanyos (McMaster Energy Enterprises, aka Solar Fields) for
start-up development of post deposition processing, providing Tim
Gessert (NREL) with technical details of the IEC VT system, and teaching
the chemical surface deposition (CSD) technique to several groups.

**[Cu(InGa)Se~2~ Based Solar Cells]{.underline}**

Research on CuInSe~2~-based solar cells includes four different tasks:
(1) In-Line Evaporation; (2) Wide Bandgap Materials; (3)
Cu(InGa)(SeS)~2~ Formation by H~2~Se/H~2~S Reaction; and (4) Fundamental
Materials and Interface Characterization. In each case, significant
progress has been made, as documented in this report.

The development of the process of in-line deposition of Cu(InGa)Se~2~ on
polymer substrates focused on the linear metal evaporation sources and
on the preliminary investigation on the understanding of the role of
oxygen in Mo back contact in preventing film cracking. The insulation of
the 6\" metal sources that are presently in use has been entirely
modified, switching over to rigid alumina boards. In parallel with this
change, all the carbon/graphite-based components in the source have been
replaced to eliminate reaction with metallic parts, such as
thermocouples and Ta shields. These changes enabled operation of the
sources at lower temperatures. The problem of metal vapors leaking
between the lid and the source body was also addressed. A sealed source
was designed and fabricated. This new source will be tested in the near
future. The instability of the Cu source power control at high
temperature was finally traced to the multi-channel thermocouple
interface module which generated a noisy signal for C-type thermocouple
when the signal gets to be higher than 20mV and that there are other
thermocouples connected to other channels. The temporary solution,
connecting the Cu source thermocouple to its own interface module,
allowed system operation without any control problem. In addition,
issues associated with the sources in scaling-up the in-line deposition
to 13\" web were investigated. A bell-jar system with a single source
was set-up to determine and analyze the temperature distribution on the
present 6\" source. Further, simulation of the temperature distribution
on a 13\" system was performed. The comparison showed that simple
scale-up of present sources, which give adequate film uniformity, would
result unacceptable non-uniformities over the 13\" wide web.
Consequently, a number of design options to overcome this problem were
evaluated. The issues related to source depletion over long runs,
resulting in thermal characteristics leading to drifts in the effusion
rates, were also examined. As to the role of oxygen in preventing the Mo
back contact film cracking, the Auger depth profiling analysis shed more
light to the problem. Comparison of the profiles before and after the
Cu(InGa)Se~2~ deposition showed that there is a diffusional
rearrangement of oxygen in the Mo layer, resulting in a uniform
distribution, irrespective of the initial oxygen distribution in the Mo
film. This point will be further pursued in the coming year.

Work on wide bandgap materials remained focused on Cu(InAl)Se~2~ films
deposited by multisource elemental co-evaporation. The primary problems
being addressed are poor reproducibility, partly caused by poor adhesion
at the Mo/Cu(InAl)Se~2~ interface, and poor performance with low V~oc~
as the bandgap is increased. Progress is reported in this report on
developing alternative evaporation sequences, characterizing the back
contact, and gaining a more complete understanding of the basic material
properties. A simplified continuous version of a three-stage evaporation
process was developed and end-point detection of the substrate
temperature was used to control the film composition. Films were grown
with different relative Al contents material. As Al content increased,
the grain size decreased, adhesion worsened, and device performance got
much worse. The variation in material and device properties as a
function of Cu off-stoichiometry was also studied. Formation of an
ordered vacancy chalcopyrite structure with low Cu content was verified.
Devices with this compound had poor device performance and an \~ 0.2 eV
shift in the long-wavelength QE, indicating a shift in bandgap.

Critical issues for the formation of Cu(InGa)(SeS)~2~ films by the
selenization or sulfization reactions of Cu-Ga-In precursor films have
been investigated. A complete understanding of the reaction process
requires characterizing phases in the as-deposited precursor films, and
after annealing with different time-temperature-gas concentration
profiles used to control the reaction pathway. Metal precursor films
were deposited by sputtering a Cu-Ga layer from a Cu~0.8~Ga~0.2~ alloy
target, followed by an In layer. The phases present in the sputtered
metal precursors after annealing at 450°C were Cu, In, CuIn and
Cu~9~(In~1‑x~Ga~x~)~4~. Films reacted in hydrogen selenide (H~2~Se) or
hydrogen sulfide (H~2~S) were characterized and unreacted intermetallic
Cu-Ga or Cu-In phases respectively were identified at the back of the
films. This indicates a reaction preference of Se with In, and S with
Ga. Homogenization of the Ga using a two-step selenization/sulfization
process that takes advantage of this reaction preference was confirmed,
and different time-temperature profiles were compared. Devices with
V~oc~ \> 0.64 V and eff. \> 13% were demonstrated. With a better
understanding of the reaction pathway, work will be focused on
optimization of the time-temperature sequence of the two-step reaction
to better understand the mechanism for Ga mobility to control the S
composition at the front of the film, and ultimately, to improve device
performance.

Fundamental characterization of materials and interfaces has largely
focused on a detailed characterization of the optical properties of
Cu(InGa)Se~2~ thin films as a function of changes in composition,
including variations in the relative gallium and copper concentrations.
The characterization was done using variable angle spectroscopic
ellipsometry with a novel technique developed previously at IEC, in
which the Cu(InGa)Se~2~ is lifted off the glass/Mo substrate to provide
access to a smooth surface for optical characterization. The complex
optical constants and critical transition energies of Cu(InGa)Se~2~ were
previously determined for films varying in relative gallium content
spanning from CuInSe~2~ to CuGaSe~2~. Since all Cu(InGa)Se~2~ solar
cells are made using Cu-deficient films, it is valuable to relate the
optical properties to the degree of Cu off-stoichiometry. A method has
been developed to determine the optical constants of films with
decreasing Cu content in the Cu-deficient two-phase region as a mixture
of the optical properties of the single-phase endpoints with high and
low Cu concentrations. The decrease in Cu is characterized by an
increase in the fundamental bandgap and broadening of critical point
features in the optical constants suggesting degradation of the
crystalline quality of the material. This optical analysis can be used
to determine the volume fraction of these two phases, which directly
determines the film composition.

An aqueous Br-etch has been used for smoothing Cu(InGa)Se~2~ films to
obtain a specular surface for optical modeling and interface
characterization. The etch also controllably reduces the Cu(InGa)Se~2~
thickness to study device behavior with thin absorbers and enable
characterization of the Mo/Cu(InGa)Se~2~ interface. The etch procedure
was optimized to give the smoothest surface and controllable etch rates.
Determination of Cu(InGa)Se~2~ optical constants using the etch surface
or the smooth surface obtained by peeling the films from the Mo contact
gave comparable results so the etch does not seem not change the bulk
Cu(InGa)Se~2~. Devices fabricated after etching for different times had
lower J~sc~ due to increased reflectivity with the specular surface and
a lower V~oc~ that is not understood. Further efforts will be used to
characterize the effects of Cu(InGa)Se~2~ thickness and the back
contact.

Research has also focused on the Cu(InGa)Se~2~/CdS interface. High
utilization chemical surface deposition was compared to chemical bath
deposition, and it was shown that, under well controlled conditions, the
same average device performance could be obtained. Also, optical
constants of the CdS grown by chemical bath deposition were measured
directly on Cu(InGa)Se~2~, using ellipsometry and showed broad optical
transition consistent with poor crystallinity.

#### **Collaboration and Team Activities**

IEC activities in support of the CuInSe~2~ National Team and other
research groups working on Cu(InGa)Se~2~ development have included the
following:

[Thin Film Partnership - CuInSe~2~ National Team]{.underline}

Bill Shafarman attended the CuInSe~2~ National Team meeting on March 8,
2005 and gave a presentation titled "Cu(InGa)Se~2~ processing research
at IEC: Composition control during selenization."

IEC also continued its ongoing collaboration with team members in the
characterization of Cu(InGa)Se~2~ films and devices from different
groups. This work has resulted in the paper: "Comparison of device
performance and measured transport parameters in widely-varying
Cu(In,Ga)(Se,S)~2~ solar cells" by I. L. Repins, B. J. Stanbery, D. L.
Young, S. S. Li, W. K. Metzger, C. L. Perkins, W. N. Shafarman, M. E.
Beck, L. Chen, V. K. Kapur, D. Tarrant, M. D. Gonzalez, D. G. Jensen, T.
J. Anderson, X. Wang, L. L. Kerr, B. Keyes, S. Asher, A. Delahoy, B. Von
Roedern, to be published in *Progress in Photovoltaics.*

[Energy Photovoltaics]{.underline}

IEC has collaborated with EPV on alternative back contacts. In
particular, IEC has fabricated and characterized devices using
alternative back contacts deposited by EPV, which should provide
improved reflectivity for devices with thin Cu(InGa)Se~2~ absorbers. In
addition, IEC has collaborated with EPV on evaporation source design and
provided a design for a laboratory scale Cu evaporation source.

[ISET]{.underline}

IEC has assisted ISET in the characterization of series resistance in
devices and the design of collection grids for solar cells. In addition,
IEC provided Mo-coated polyamide substrates for fabrication of flexible
Cu(InGa)Se~2~ solar cells.

[University of Illinois]{.underline}

IEC has provided samples for novel characterization at University of
Illinois This includes structural characterization using high resolution
TEM techniques and Near Field Scanning Optical Microscopy (NSOM)
measurements. This work has resulted in a paper "Application of Advanced
Microstructural and Microchemical Microscopy Techniques to Chalcopyrite
Solar Cells," C. Lei, C.M. Li, A. Rockett, I.M. Robertson and W.N.
Shafarman, Mat. Res. Soc. Symp. Proc., (2005) *In press.*

[University of Oregon]{.underline}

IEC has continued its ongoing collaboration with the U. of Oregon to
characterize electronic properties of Cu(InGa)Se~2~ solar cells. In the
past year this has resulted in two publications: "Detailed study of
metastable effects in the Cu(InGa)Se~2~ alloys: Test of defect creation
models," J.W. Lee, J.T. Heath, J.D. Cohen and W.N. Shafarman, Mat. Res.
Soc. Symp. Proc. **865**, 373 (2005)*,* and "Defect Studies Using
Photocapacitance Spectroscopy in the Copper Indium Diselenide Alloys,"
J.D. Cohen, J.T. Heath and W.N. Shafarman, Chapter 13 in Wide Gap
Chalcopyrites, ed. by U. Rau S. Siebentritt (Springer Scientific, 2005)
*In press*.

### Si Based Solar Cells

Aluminum-induced crystallization (AIC) of Si thin films on glass
substrates was investigated as potential techniques leading to
continuous large grain Si films. Silicon films were deposited by
Hot-Wire Chemical Vapor Deposition (HW-CVD), Plasma Enhanced Chemical
Vapor Deposition (PE-CVD) and Electron beam deposition (E-beam) onto Al
coated Corning 7059 glass substrates and the annealing of the samples
was performed at temperatures below the eutectic temperature of Si-Al
binary system (577^o^C). Both in-situ and ex-situ AIC was evaluated. The
grain structure of the polycrystalline silicon (poly-Si) films formed on
glass substrates and Al-Si interface were studied by various analytical
techniques. Continuous poly-Si films were obtained using Al layers with
a thickness of 500 nm or less, and with a Si/Al thickness ratio of at
least 1. The average grain size of poly-Si films was affected by the
a-Si deposition technique. E-beam deposited a-Si films resulted in 10-15
μm average grain size while PECVD and HWCVD deposited a-Si films
resulted in slightly smaller grain sizes. The nature and morphology of
the interface oxide layer between Al and Si layers was studied by XPS
and were found to be crucial for layer exchange process. The length of
time that the Al layer was exposed to air was used to vary the oxide
thickness. The effective activation energy for the ex-situ
crystallization and layer exchange process was determined to be 0.9 eV.

Continuous poly-Si films on glass substrates were obtained using an
*in-situ* aluminum-induced crystallization technique at 430^o^C. The 0.5
µm Al film was deposited by e-beam and the 0.6 µm Si deposited by HWCVD.
Poly-Si films had an average grain size of 10-13 μm, corresponding to a
grain size/thickness ratio greater than 20 and similar to poly-Si films
prepared by conventional AIC. A unique etching procedure was developed
involving repeated cycles of alternately etching the Al then the Si to
reveal the continuous Si layer below. Poly-Si layers prepared by either
an in-situ or conventional AIC process can be used as seed layers for
epitaxial Si growth or for back contact formation in c-Si solar cell
fabrication at temperature below 500^o^C. As an alternative to
conventional AIC, the in-situ AIC process eliminates an additional
annealing step, which saves considerable time during processing.

**[In-line Diagnostics and Process Control]{.underline}**

A wide range of thin film analyses using GIXRD were surveyed for
implementation into thin film PV device fabrication as a diagnostic and
monitoring tool. Construction of a hot stage allowed
*[in-situ]{.underline}* detection of CdTe surface oxidation and CdTe-CdS
interdiffusion. The oxidation studies were complimented by compositional
depth profiling by XPS using the system installed in 2005. Te film
thickness on etched CdTe was determined by regression of a layer model
with measured data at different incident beam angles. A unique solution
is facilitated by considering primary beam attenuation in the Te film.
Dual-axis GIXRD measurements of multiple (hkl) reflections allowed
determination of depth-distribution of residual stress in sputtered Mo
films. For ultra-thin CdS films with nanometer size particulates, the
particulate size was determined by fitting the GIXRD line profile and
evaluating the integral line breadth. Alloy distribution in
CuIn~1-x~Ga~x~Se~2~ films was determined by modeling GIXRD patterns
obtained at different incident beam angles and verified by measuring a
CuIn~1-x~Ga~x~Se~2~ film from both sides. This methodology is being used
to investigate reaction pathways for obtaining films with uniform
composition and could be used as a product sensor in a developed
process.

### 

# LIST OF CONTRIBUTORS- 9/05/2004 -- 9/04/2005

######### PRINCIPAL INVESTIGATORS

> Roger Aparicio
>
> Robert Birkmire
>
> Stuart Bowden
>
> Kevin Dobson
>
> Erten Eser
>
> Steven Hegedus
>
> Brian McCandless
>
> William Shafarman

######### RESEARCHERS

> Wayne Buchanan
>
> Shannon Fields
>
> **POST-DOCTORAL FELLOWS/**
>
> **LIMITED TERM RESEARCHER**
>
> Estela Calixto
>
> Ujjwal Das
>
> Moses Haimbodi
>
> Gregory Hanket
>
> Shiro Nishiwaki
>
> Puthar Devassey Paulson
>
> Sergey Rykov
>
> Nicholas Smith
>
> Alex Stavrides
>
> **FULBRIGHT SCHOLAR**
>
> Cheik Sene

######### TECHNICAL SUPPORT

> Joshua Cadoret
>
> Vicky DiNetta
>
> Ronald Dozier
>
> Kevin Hart
>
> **GRADUATE STUDENTS**
>
> Michael Burrows
>
> Darshini Desai
>
> Ozgenc Ebil
>
> Jonathan Frey
>
> Kapil Mukati
>
> Sarah Rickman
>
> Scott Stephens
>
> Jochen Titus

######### STUDENTS

> Michael Angelo
>
> Derek Birkmire
>
> William Crandley
>
> Stephanie Einstein
>
> Jennifer Griffith
>
> Sonam Gupta
>
> Mary Kondos
>
> Daniel Ryan
>
> Christopher Thompson
>
> Peter Wang
>
> James Wilson
>
> Chati Zony

######### DOCUMENT PREPARATION

> Steven Hegedus
>
> Elaine Koronik

# TABLE OF CONTENTS

Summary....................................................................................................
iii

CdTe-based Solar
Cells...............................................................................
iii

Cu(InGa)Se~2~-based Solar
Cells......................................................................
vi

Si-based Solar
Cells..................................................................................
ix

In-line Diagnostics and Process
Control........................................................... x

[List of Contributors xi](#list-of-contributors--9052004-9042005)

[Table of Contents xiii](#table-of-contents)

[List of Figures xiv](#list-of-figures)

[List of Tables xx](#list-of-tables)

1 Introduction

[1.1 CdTe-based Solar Cells
...........................................................................1](#cdte-based-solar-cells-1)

[1.2 CuInSe~2~-based Solar Cells
........................................................................1](#cuinse2-based-solar-cells)

[1.3 Si-based Solar Cells 2](#si-based-solar-cells-1)

[1.4 In-line Diagnostics 3](#in-line-diagnostics)

[1.5 Training and Education 3](#training-and-education)

[1.6 Publications 3](#publications)

[1.7 Organization of the Report 3](#organization-of-the-report)

2 CdTe Based Solar
Cells..................................................................................
4

2.1 High Throughput
Processing......................................................................
4

[2.2 Back Contact Processing
Options..................................................................27](#back-contact-processing-options)

2.3 Bifacial Analysis of Devices with Transparent ZnTe:Cu Back
Contacts.................. 46

2.4 Stability of Vapor Transport
CdTe............................................................\... 57

2.5 Understanding and Improving V~oc~ in Vapor Transport CdTe Solar
Cells................. 70

3 CIS Based Solar
Cells...................................................................................
77

3.1 Inline CIGS
System...............................................................................
77

3.2 Wide Bandgap Materials:
Cu(InAl)Se~2~.........................................................
94

4 Si-based Solar
Cells.....................................................................................131

4.1 Aluminum-induced Crystallization (AIC) Below the Eutectic Point:
ex-situ AIC...... 131

4.2 In-situ AIC below the eutectic point leading to 10 μm
grains...............................142

5
Diagnostics.............................................................................................
149

5.1
GIXRD..............................................................................................149

5.2 Diagnostics: Process Control for Co-evaporative PVD
Process.............................162

6
Abstract...................................................................................................166

7
References................................................................................................167

# LIST OF FIGURES

# 

[Figure 1. V~oc~ versus final CdS film thickness for PVD CdTe/CdS and
CdTe~1-x~S/CdS cells without buffer layers (solid) and with buffer
layers (open). 6](#__RefHeading___Toc125256006)

[**Figure 2. GIXRD pattern of CSD CdS as deposited (As Dep), after
anneal at 550ºC for 5 min (HTA) and after vapor CdCl~2~ treatment at
430°C for 10 min (CdCl~2~). CdS peaks at 2θ = 20º, 26.5º,28.2º, 44º, 52º
and 53º; remaining peaks due to ITO.** 8](#__RefHeading___Toc125256007)

[**Figure 3**. **Atomic force micrographs of CSD CdS film: as-deposited
at 65°C (left) and after vapor CdCl~2~ HT at 430°C (right).**
9](#__RefHeading___Toc125256008)

[Figure 4. Normalized optical transmission, T/(1-R), of window layer
used in VT cells. 9](#__RefHeading___Toc125256009)

[**Figure 5**. **AFM images of 5 μm thick CdTe films deposited by vapor
transport on moving substrates in He+O~2~ at 500°C (left) and 570°C
(right).** 13](#__RefHeading___Toc125256010)

[**Figure 6**. **AFM images of 1 μm (left) and 23 μm thick (right) CdTe
films deposited by vapor transport on moving substrates in He+O~2~ at
550°C.** 14](#__RefHeading___Toc125256011)

[**Figure 7.** **AFM images of 6 μm thick CdTe films deposited by vapor
transport on moving substrates in He+O~2~ at 8 μm/min (left) and 81
μm/min (right) at 550°C.** 14](#__RefHeading___Toc125256012)

[Figure 8. Schematic depiction of carrier gas passing through a packed
bed of CdCl~2~. 15](#__RefHeading___Toc125256013)

[**Figure 9.** **GIXRD patterns of VT CdTe in as-deposited and CdCl~2~
treated conditions, showing the contrast between wet and vapor
treatments.** 16](#__RefHeading___Toc125256014)

[Figure 10. Light (AM1.5, 28ºC) and dark J-V behavior for 13.3%
efficient baseline VT cell. 17](#__RefHeading___Toc125256015)

[Figure 11. Normalized spectral response (0V, light bias) for 13.3%
efficient baseline VT cell. 17](#__RefHeading___Toc125256016)

[Figure 12. GIXRD apparatus with ambient control shroud removed, showing
the hot stage for heating samples from RT to 600ºC.
20](#__RefHeading___Toc125256017)

[Figure 13. Time-progressive GIXRD scans of oxidation of CdTe in dry and
humid ambient at 500ºC. 21](#__RefHeading___Toc125256018)

[Figure 14. Time-progressive development of oxide thickness for CdTe
treated at 500ºC at different ambient humidity.
22](#__RefHeading___Toc125256019)

[Figure 15. XPS survey scans of the oxidized CdTe films of Figure 13
before and after sputter etching. 23](#__RefHeading___Toc125256020)

[Figure 16. Time-progressive XPS scans of the oxidized CdTe films of
Figure 13 during the sputter-etch process.
23](#__RefHeading___Toc125256021)

[**Figure 17.** **Light JV curves for the devices of Table VI.**
25](#__RefHeading___Toc125256022)

[Figure 18. VASE ε~2~ spectra of (a) an unetched CdTe film and CdTe
films following etching in (b) NP1 for 25 sec and in (c) 0.1% BM for 10
sec. 30](#__RefHeading___Toc125256023)

[Figure 19. Time-progressive GIXRD patterns of Te (101) reflection, for
a CdTe film immediately following a 25 sec NP1 etch. Incident angle was
2° and each scan cycle is ∼3 min apart.
31](#__RefHeading___Toc125256024)

[Figure 20. Time profiles of ε~2~ from (a) 25 sec NP1 and (b) 60 sec
0.1% BM etched CdTe films. ε~2~ values were obtained at 2.1 eV and 3.3
eV, respectively. 33](#__RefHeading___Toc125256025)

[Figure 21. Light and dark JV curves for CdTe/CdS devices processed with
methanol solutions containing CuCl (solid) and CuCl~2~ (dotted).
36](#__RefHeading___Toc125256026)

[Figure 22. GIXRD plot, at 2° incidence, of a 60s NP etched CdTe film
obtained following removal of a Cu powder/graphite paste contact.
38](#__RefHeading___Toc125256027)

[Figure 23. (a) Structure of aniline, and (b) VASE and (c) GIXRD plots
of CdTe following treatment in standard aniline-based baths for 1 hr and
5.5 hr with illumination on the glass. The VASE spectrum of non-treated
CdTe/CdS is shown for comparison. 42](#__RefHeading___Toc125256028)

[Figure 24. VASE spectra of non-CdCl~2~ treated CdTe recorded at various
times during etching in standard aniline-base solution with illumination
on the glass. 44](#__RefHeading___Toc125256029)

[Figure 25. Schematic of proposed mechanism for illuminated aqueous
aniline treatment of CdTe. 44](#__RefHeading___Toc125256030)

[Figure 26. Structures of (a) 1-naphthylamine and (b) 8-hydroxyquinoline
45](#__RefHeading___Toc125256031)

[Figure 27. Plots of J-V parameters vs. treatment time for devices
processed with the aqueous aniline treatment with illumination either
directly on the CdTe ( and ) or on the sample glass (). Results of
devices processed with 10 sec etching in 0.05% BM () are shown for
comparison. All devices were completed with Cu-containing back contacts.
46](#__RefHeading___Toc125256032)

[Figure 28. Galvanic deposition setup used for growing ZnTe: Cu films
47](#__RefHeading___Toc125256033)

[Figure 29. Optical transmission of glass/SnO~2~/ZnTe:Cu layers as a
function of TEA concentration. 48](#__RefHeading___Toc125256034)

[Figure 30. Initial J(V) curves for devices from Table VII with ZnTe:Cu
contacts for illumination through CdS (front), ZnTe:Cu (back) and dark.
Three different CdTe surface treatments were used. Also shown (lower
right) is J(V) from VT154-4 after stress showing similar differences
between front and back illumination at forward bias as seen on
VT178-2-1. 50](#__RefHeading___Toc125256035)

[Figure 31. Measured and calculated SR (fit with W=2.5 and L=0.8 µm).
51](#__RefHeading___Toc125256036)

[Figure 32. Calculated SR for L=0.5, 1.0, 1.5 µm with W=2.5 and t=5.0
µm. 51](#__RefHeading___Toc125256037)

[Figure 33. Backwall SR for VT145-1 at 3 voltage biases. Measured data
and fit with L, W values indicated are shown.
52](#__RefHeading___Toc125256038)

[Figure 34. Depletion width from C-V and from fitting backwall SR(V)
measurements for devices with CdTe thickness of 5 (left) and 10 (right)
µm 53](#__RefHeading___Toc125256039)

[Figure 35. (left) V~oc~ as a function of temperature for front and back
illumination at 100 and 10% intensity. 54](#__RefHeading___Toc125256040)

[Figure 36. (right) J~sc~ as a function of temperature for front and
back illumination at 100 and 10% intensity. Note the log scale.
54](#__RefHeading___Toc125256041)

[Figure 37. (left) QE as calculated from J~sc~ measured using filters
for front illumination. 55](#__RefHeading___Toc125256042)

[Figure 38. (Right) QE as calculated from J~sc~ measured using filters
for back illumination. 55](#__RefHeading___Toc125256043)

[Figure 39. J(V) curves for VT154.4-2 before and after stress for light
from the front (CdS side), rear (ZnTe side) or in the dark.
56](#__RefHeading___Toc125256044)

[Figure 40. V~oc~ at 85°C during 14 days stress for devices with Cu/Ni
or Ni contact at different bias conditions.
59](#__RefHeading___Toc125256045)

[Figure 41. (a) left and (b) right. Light and dark JV curves of VT128.5
and 128.6 before (a) and after (b) stress at 85°C for 15 days at OC bias
in light. 60](#__RefHeading___Toc125256046)

[Figure 42. (left) Relative change in efficiency with bias during stress
for devices from VT154 with different contacts.
62](#__RefHeading___Toc125256047)

[Figure 43. (right) V~oc~\@100°C during stress for devices from VT154
with different contacts stressed at OC.
62](#__RefHeading___Toc125256048)

[Figure 44. V~oc~ at 100°C vs. time at stress (type A/IEC). Bias
switched from SC to OC after 24 day (cell 1), and from OC to SC after 1
day (cell 2) or 24 days (cell 3). Insert shows V~oc~ for cell 2 on log
scale. 64](#__RefHeading___Toc125256049)

[Figure 45. V~oc~ at 85°C vs. time at stress (cell type VT-Ni/Cu). Cells
were at continuous SC or OC bias or switched from OC to 1.3 V~oc~ to SC
to OC every 4 days. 65](#__RefHeading___Toc125256050)

[Figure 46. V~oc~ vs. time for A1 and A2 devices stressed in cycle 1,
biased at OC or 0.5xOC. 66](#__RefHeading___Toc125256051)

[Figure 47. V~oc~ vs. time for type A1 and A2 devices from Figure 3
biases at OC in cycle 4 showing data at 9 am (16 hours dark) and at 5 pm
(8 hrs light) on same device. 67](#__RefHeading___Toc125256052)

[Figure 48. V~oc~ vs. time at stress for type B cells stressed at OC
with cycle 1 (triangles) and 0.5OC with cycle 4 (9 am and 5 pm).
68](#__RefHeading___Toc125256053)

[Figure 49. The Eff, V~oc~, FF and yield versus the sequence in CdCl~2~
processing. Both best cell and averaged values are shown. Yield is
defined in text. 73](#__RefHeading___Toc125256054)

[Figure 50. Measured and calculated V~oc~ for 17 devices. Calculated
V~oc~=AkT/q ln (J~sc~/J~o~). 74](#__RefHeading___Toc125256055)

[Figure 51. Power curves for device with correction for R~S~ and
J~L~(V). Note there is little increase in V~oc~.
75](#__RefHeading___Toc125256056)

[Figure 52. Auger depth profiling of the as-received Mo-on-UpilexS.
80](#__RefHeading___Toc125256057)

[Figure 53. Auger depth profiling of the Cu(InGa)Se~2~ on Mo coated
Upilex S. 80](#__RefHeading___Toc125256058)

[Figure 54. Asymmetric heater assembly.
82](#__RefHeading___Toc125256059)

[Figure 55. Temperature gradient in the graphite heater: (a) 2D
distribution, (b) along the lower branch.
82](#__RefHeading___Toc125256060)

[Figure 56. Melt level reduction with time (simulation).
83](#__RefHeading___Toc125256061)

[Figure 57. Experimental set-up. 84](#__RefHeading___Toc125256062)

[Figure 58. Thermocouple placement inside the source-boat.
84](#__RefHeading___Toc125256063)

[Figure 59. Temperature dynamics 85](#__RefHeading___Toc125256064)

[Figure 60. Temperature dynamics 85](#__RefHeading___Toc125256065)

[Figure 61. Thickness profile (Run 1) 85](#__RefHeading___Toc125256066)

[Figure 62. Thickness profile (Run 2) 85](#__RefHeading___Toc125256067)

[Figure 63. Temperature profiles 86](#__RefHeading___Toc125256068)

[Figure 64. Film thickness profile 86](#__RefHeading___Toc125256069)

[Figure 65. Variation of film thickness non-uniformity with
melt-temperature difference under the two nozzles.
88](#__RefHeading___Toc125256070)

[Figure 66. Nozzle-flow-rate difference due to temperature gradient.
88](#__RefHeading___Toc125256071)

[Figure 67. Symmetric heater assembly (Design 1).
89](#__RefHeading___Toc125256072)

[Figure 68. Temperature gradient in a symmetric heater in Design 1: (a)
2D distribution, (b) along a lower branch.
91](#__RefHeading___Toc125256073)

[Figure 69. Cylindrical boat with tilted nozzles.
92](#__RefHeading___Toc125256074)

[Figure 70. Linear boat with central opening
92](#__RefHeading___Toc125256075)

[Figure 71. Linear boat with tilted nozzles (Design 4)
92](#__RefHeading___Toc125256076)

[Figure 72. Comparison of designs 1, 2 and 4.
92](#__RefHeading___Toc125256077)

[Figure 73. Effect of source-to-substrate distance, H, on material
utilization efficiency and film thickness non-uniformity.
93](#__RefHeading___Toc125256078)

[Figure 74. Source temperatures and substrate heater power during the
deposition. 95](#__RefHeading___Toc125256079)

[Figure 75. Typical substrate temperature profile and its first
derivative. 95](#__RefHeading___Toc125256080)

[Figure 76. 112 XRD peaks from films with various Al content.
96](#__RefHeading___Toc125256081)

[Figure 77. Surface morphologies of (a) low Al (\[Al\]/\[In+Al\])=0.17)
and (b) high Al(\[Al\]/\[In+Al\])=0.58) content films.
96](#__RefHeading___Toc125256082)

[Figure 78. J-V curves with (a) \[Al\]/\[In+Al\]=0.25, (b)
\[Al\]/\[In+Al\]=0.33, and (c) \[Al\]/\[In+Al\]=0.52.
97](#__RefHeading___Toc125256083)

[Figure 79. Source temperatures and substrate heater power during the
deposition. 98](#__RefHeading___Toc125256084)

[Figure 80. Substrate temperature profile during a Cu(InAl)Se~2~
deposition using the profile in Figure 65.
98](#__RefHeading___Toc125256085)

[Figure 81. XRD pattern of a film with composition
Cu(In~0.85~,Al~0.15~)~2.9~Se~5.0~. Peaks characteristic of the OVC
structure are indicated. 99](#__RefHeading___Toc125256086)

[Figure 82. Cu(InAl)Se~2~ solar cell J-V curves with different Cu
content. 100](#__RefHeading___Toc125256087)

[Figure 83. QE curves of Cu-In-Al-Se samples (a) 50607, (b) 50608, and
(c) 50610 with compositions indicated in Table XV.
101](#__RefHeading___Toc125256088)

[Figure 84. CuKα~1~ XRD spectra of Cu-Ga-In precursors. Phases: 1 -- In;
2 -- CuIn ; 3 -- Cu~3~Ga; 4 -- Cu; 5 -- Cu~9~In~2.6~Ga~1.4~ (γ1); 6 --
Mo; 7 -- In~2~O~3~. 103](#__RefHeading___Toc125256089)

[Figure 85. SEM micrographs of precursors selenized for 10, 30, and 90
minutes at 104](#_Ref115948082)

[Figure 86. CuKα~1~ broad scans of selenized films, indicating very
little Ga incorporation into the chalcopyrite lattice. Peaks designated
"+" and "\*" are Cu~9~(Ga~0.8~In~0.2~)~4~ and CuGa~2~, respectively.
105](#__RefHeading___Toc125256091)

[Figure 87. Backsides of peeled selenized films. 106](#_Ref115948091)

[Figure 88. Residual intermetallics on Mo back contact after peeling of
Cu(InGa)Se~2~ films. 107](#_Ref115948120)

[Figure 89. XRD spectra of exposed Mo back contacts. The γ1 411 peak is
shifted from that shown in Figure 75 due to the absence of alloyed In.
108](#__RefHeading___Toc125256094)

[Figure 90. SEM micrographs of precursors sulfized for 10, 30, and 90
minutes at 450ºC in 0.35% H~2~S:0.0035% O~2~:balance Ar.
109](#__RefHeading___Toc125256095)

[Figure 91. In-rich nodules on surface of sulfized films.
110](#__RefHeading___Toc125256096)

[Figure 92. CuKα~1~ spectra of sulfized films. The peak labeled
Cu~x~In~y~ is exhibited by multiple Cu-In alloys, but is likely
Cu~16~In~9~ based on the EDS data. 111](#__RefHeading___Toc125256097)

[Figure 93. CrKα 112 line profiles of sulfized films.
111](#__RefHeading___Toc125256098)

[Figure 94. Backside SEM micrographs of films sulfized for 10, 30, and
90 minutes. 112](#__RefHeading___Toc125256099)

[Figure 95. XRD spectrum of Cu(InGa)(SeS)~2~ from process 4. (1 =
Cu(InGa)(SeS)~2~; 2 = Mo; \* = unknown).
114](#__RefHeading___Toc125256100)

[Figure 96. Compositional depth profile of Cu(InGa)(SeS)~2~ formed by
two-step reaction in H~2~Se and H~2~S process 4.
115](#__RefHeading___Toc125256101)

[Figure 97. Cu~2~Se-In~2~Se~3~ quasibinary phase diagram from Reference
84. Triangles indicate the compositions of CIGS films characterized in
this work. 116](#__RefHeading___Toc125256102)

[Figure 98. Optical model used for SE analysis.
118](#__RefHeading___Toc125256103)

[Figure 99. Optical constants of α-CIGS and δ~R~-CIGS films with y =
0.3. 120](#__RefHeading___Toc125256104)

[Figure 100. Comparison of optical constants obtained using an
oscillator model and EMA model for films in the α + δ~R~ mixed phase
region. The film on the left has 22.0 % Cu and the film on the right has
18.6 % Cu. 120](#__RefHeading___Toc125256105)

[Figure 101. Optical constants of CIGS films with y = 0.3 determined by
EMA analysis. Arrows indicate increasing Cu in sequence 23.6, 22.0,
20.7, 18.6, 15.4, 11.6 %. 122](#__RefHeading___Toc125256106)

[Figure 102. Extinction coefficient and index of refraction for
Cu(InGa)Se~2~ samples from a single run with smooth surfaces created by
peeling and etching. 123](#__RefHeading___Toc125256107)

[Figure 103. J-V characteristics with Br-etched Cu(InGa)Se~2~ and
subsequent KCN-etch and heat treatments to remove surface Se.
124](#__RefHeading___Toc125256108)

[Figure 104. Optical reflection of as-deposited and Br-etched
Cu(InGa)Se~2~ films and the thicknesses obtained from the interference
fringes. 125](#__RefHeading___Toc125256109)

[Figure 105. Change in thickness for different Br-etch times.
126](#__RefHeading___Toc125256110)

[Figure 106. Optical constants of CBD CdS layers deposited on different
substrates. The layer on ITO was annealed during CdTe device processing.
128](#__RefHeading___Toc125256111)

[Figure 107. Optical microscopy images of partially crystallized samples
with a-Si layers deposited by (a) PECVD, and (b) e-beam. PECVD deposited
sample has higher nucleation density yielding smaller grains due to
hydrogen in a-Si layers. 133](#__RefHeading___Toc125256112)

[Figure 108. SEM surface image of a crystallized sample (with an initial
Si/Al ratio of 2) after removing exposed Al on the surface. Excess Si
accumulated on top covers large poly-Si grains formed on top of the
substrate; however, some Si grains are visible.
134](#__RefHeading___Toc125256113)

[Figure 109. The change in the thickness of Al oxide layer with time
under ambient conditions. The calculated thickness (solid line) is in
good agreement with cross-sectional TEM studies (squares). A sudden
increase in the thickness of the oxide layer after 9 days is related to
changes in atmospheric conditions. 135](#__RefHeading___Toc125256114)

[Figure 110. Optical microscopy images of partially crystallized samples
with a-Si layers deposited by (a) HWCVD, and (b) PECVD. The higher
nucleation density and smaller grain size of HWCVD deposited sample is
related to etching of interfacial oxide layer by atomic hydrogen in the
deposition environment. 136](#__RefHeading___Toc125256115)

[Figure 111. Optical microscopy pictures of partially crystallized
samples taken through the glass substrate. Al layers were exposed to air
before Si deposition (a) for 24 hr, (b) for 48 hrs, and (c) for 80 days.
137](#__RefHeading___Toc125256116)

[Figure 112. XPS depth profile for Al 2p region of 100 nm thick Al film
on glass. The binding energy for Al-Al and Al-O are 73 eV and 75.6 eV,
respectively. The shift to a higher energy in the oxidation state is
noticeable. Sputtering cycles are marked on the right axis.
138](#__RefHeading___Toc125256117)

[Figure 113. XPS depth profile for O 1s region of 100 nm thick Al film
on glass showing a shift to a lower energy as the sputtering depth
increases. Red line corresponds to surface.
139](#__RefHeading___Toc125256118)

[Figure 114. Cross-sectional TEM image the sample with a layer sequence
of glass/500 nm Al/600 nm Si. The interfacial oxide layer with a
thickness of 10-15 Å was also identified.
140](#__RefHeading___Toc125256119)

[Figure 115. Another cross-sectional TEM image the sample shown in
Figure 114. The interface is not atomically sharp and has
discontinuities. 140](#__RefHeading___Toc125256120)

[Figure 116. Cross-section TEM image of a crystallized sample. The area
investigated lacks an interfacial oxide layer, which might be related to
the etching effect of atomic hydrogen in HWCVD system.
141](#__RefHeading___Toc125256121)

[Figure 117. Arrhenius plot of the temperature dependence of time for
crystallization. Samples had 500 nm a-Si layers deposited on 400 nm Al.
Overall activation energy for crystallization and layer exchange process
was calculated to be 0.9 eV. 142](#__RefHeading___Toc125256122)

[Figure 118. Schematic illustration of crystallization of Si during
deposition. Si first diffuses into Al layer where it nucleates. Growing
Si crystals replace Al until a continuous poly-Si layer is formed. After
crystallization process, Al and excess Si accumulate on top of newly
formed poly-Si film. 143](#__RefHeading___Toc125256123)

[Figure 119. SEM image of a sample after Si deposition in HWCVD system.
A 600 nm thick Si layer was deposited on 500 nm Al coated glass
substrate. The surface of the sample contains mostly Al and some excess
Si. 144](#__RefHeading___Toc125256124)

[Figure 120. SEM image of the sample after partial etching. The darker
areas are Si grains while the lighter areas are mixtures of amorphous
and nanocrystalline Si not etched yet. Grains of 10-15 nm are visible.
145](#__RefHeading___Toc125256125)

[Figure 121. A close up SEM image of the same area shown in Figure 112,
showing excess Si on top of continuous Si grains after etching.
Two-grain boundaries are visible on the left hand side of the image.
Average grain size was estimated around 10-13 μm.
146](#__RefHeading___Toc125256126)

[Figure 122. Raman spectra of exposed poly-Si layer after etching and
c-Si for comparison. The peak is symmetric and position matches with
c-Si, indicating high quality crystalline- phase.
146](#__RefHeading___Toc125256127)

[Figure 123. Optical microscopy images of 4 different samples taken
through the substrates. The Si/Al ratios and Al layer thicknesses were:
(a) 0.5 and 1000 nm, (b) 1.0 and 1000 nm, (c) 1.0 and 500 nm, and (d)
1.2 and 500 nm, where a continuous poly-Si film was obtained on the
substrate. 147](#__RefHeading___Toc125256128)

[Figure 124. Symmetric and asymmetric diffraction from a polycrystalline
aggregate. 150](#__RefHeading___Toc125256129)

[Figure 125. Coordinate system and two-circle diffractometer
configuration used for GIXRD thin film measurement.
150](#__RefHeading___Toc125256130)

[Figure 126. GIXRD diffraction volume in planar specimen.
151](#__RefHeading___Toc125256131)

[Figure 127. Comparison of CdTe (111) peak position versus z
displacement for Cu *K*α diffraction using Bragg-Brentano (circles) and
parallel beam 5 deg incidence GIXRD (squares) measurement geometries.
151](#__RefHeading___Toc125256132)

[Figure 128. Beam paths for visible light and x-rays in planar specimen.
152](#__RefHeading___Toc125256133)

[Figure 129. AFM images at 1 μm x 1 μm of as-deposited and treated CdS
films. 157](#__RefHeading___Toc125256134)

[Figure 130. GIXRD of CdS/ITO/7059 samples at 1 deg incidence for
samples of Figure 120. 157](#__RefHeading___Toc125256135)

[Figure 131. Measured and modeled CuIn~1-x~Ga~x~Se~2~ (112) GIXRD line
profiles for measurement through as-deposited surface (left) and exposed
surface after peeling (right). 158](#__RefHeading___Toc125256136)

[Figure 132. *in-situ* GIXRD patterns at 1 deg incidence of PVD CdTe
heat treated at 500ºC in dry (left) and humid ambient (right).
159](#__RefHeading___Toc125256137)

[Figure 133. *in-situ* GIXRD patterns of CdCl~2~ treated VT
CdTe/CdS/SnO~2~ at 5 deg incidence. 159](#__RefHeading___Toc125256138)

[Figure 134. GIXRD at different incident beam angles of NP etched PVD
CdTe. 159](#__RefHeading___Toc125256139)

[Figure 135. (Left) Modeled CdTe (111) and Te (110) peak intensities
versus incident beam angle for a 25 nm Te layer on 4 μm thick CdTe film
and (Right) measured and modeled Te(101)/CdTe (111) peak intensity
ratios versus incident beam angle for NP etched CdTe.
160](#__RefHeading___Toc125256140)

[Figure 136. In-plane Mo stress versus sampling depth for films
sputtered at 2 mTorr onto 7059 (left) and SL glass (right). Different
points at each depth are for different (hkl).
161](#__RefHeading___Toc125256141)

[Figure 137. Effect of tuning parameters on controller performance
attributes. The arrows indicate the direction of increasing parameter
values. 163](#__RefHeading___Toc125256142)

# LIST OF TABLES

[Table I. Nomenclature List 5](#__RefHeading___Toc125256143)

[Table II. AM1.5 JV results (28**°**C) for PVD CdTe devices with
7059/ITO, 7059/ITO/buffer/CdS, 7059/SnO~2~/buffer/CdS, and 7059/ITO/50nm
Cd~0.95~Zn~0.05~S window layers. All cells were processed with
580**°**C, 5 min pre-anneal and 420**°**C, 15 min vapor CdCl~2~
post-deposition treatments. 7](#__RefHeading___Toc125256144)

[Table III. Static equivalent growth rate and utilization of VT CdTe.
13](#__RefHeading___Toc125256145)

[Table IV. Best cell AM1.5 J-V results for devices fabricated with CSD
CdS, baseline VT CdTe and vapor CdCl~2~ treatment.
16](#__RefHeading___Toc125256146)

[Table V. Best cell AM1.5 J-V results for devices fabricated with
baseline vapor CdCl~2~ treatment (except \*) and with different CdS
thickness and CdTe deposition conditions.
18](#__RefHeading___Toc125256147)

[Table VI. Conditions prior to CdCl~2~ treatment and device results for
cells with VT CdTe. 24](#__RefHeading___Toc125256148)

[Table VII.JV results for VT devices fabricated with and without
intentional Cu and under different ambient conditions during vapor
CdCl~2~ treatment. 26](#__RefHeading___Toc125256149)

[Table VIII. JV results for VT devices fabricated with different Cu
thickness and with ZnCl~2~ treatment. 27](#__RefHeading___Toc125256150)

[Table IX. J-V characteristics for CdTe/CdS devices contacted with
graphite paste back contacts containing the listed Cu additives. The
strength of the effects are indicated by Y = yes, W = weak and N = no.
35](#__RefHeading___Toc125256151)

[Table X. Device results for devices from 2 VT runs made with ZnTe:Cu
contact for frontwall or backwall light with BDH, anilene, or
Br-Methanol surface treatment. Results with standard opaque contact also
shown in italics for VT149. 49](#__RefHeading___Toc125256152)

[Table XI. Initial JV values and relative change (%) after stress for
devices with Ni (VT128.5) or Cu/Ni (VT128.6) contacts. The device with
Cu/Ni stressed at SC in D became shunted.
58](#__RefHeading___Toc125256153)

[Table XII. JV results and relative change after stressing for 10 days
at 100°C in dry air in the light at OC.
61](#__RefHeading___Toc125256154)

[Table XIII. Typical initial performance for devices studied here. A1,
A2 and B were processed entirely at outside manufacturers.
63](#__RefHeading___Toc125256155)

[Table XIV. Simulated daily light/dark and temperature cycles.
65](#__RefHeading___Toc125256156)

[Table XV. Efficiency (%) of A1, A2 and B cells before and after 30 days
of 4 different stress cycles at OC and after 9 days dark storage.
69](#__RefHeading___Toc125256157)

[Table XVI. System calibration runs giving Cu(InGa)Se~2~ composition and
the best device characteristics. 79](#__RefHeading___Toc125256158)

[Table XVII. Scaled-up process. 87](#__RefHeading___Toc125256159)

[Table XVIII. Chemical composition of Cu(InAl)Se~2~ films determined by
EDS analyses. 99](#__RefHeading___Toc125256160)

[Table XIX. Cu(InAl)Se~2~ solar cell properties with different Cu
content (J-V curves and Cu content shown in Figure 82).
100](#__RefHeading___Toc125256161)

[Table XX. Compositions by EDS of selenized films.
105](#__RefHeading___Toc125256162)

[Table XXI. Composition by EDS of residual intermetallic compounds on Mo
back contact. 107](#__RefHeading___Toc125256163)

[Table XXII. Composition of sulfized films shown in Figure 90.
110](#__RefHeading___Toc125256164)

[Table XXIII. Composition by EDS of sulfized film backsides.
112](#__RefHeading___Toc125256165)

[Table XXIV. Composition of intermetallics on sulfized film backsides.
113](#__RefHeading___Toc125256166)

[Table XXV. Summary of investigated time-temperature profiles for
two-step reaction of metallic precursors.
113](#__RefHeading___Toc125256167)

[Table XXVI. Compositions of CIGS films and volume fractions of α and
δ~R~ phases obtained from Bruggeman EMA analysis. Samples in italics are
single phase films fit with an oscillator model.
122](#__RefHeading___Toc125256168)

[Table XXVII. Cell performance with different Cu(InGa)Se~2~ etches and
heat treatment. Samples marked with \* indicate results shown are after
a 2 min heat-treat of the completed device at 200°C in air. Other
samples did not improve with this treatment.
124](#__RefHeading___Toc125256169)

[Table XXVIII. Cu(InGa)Se~2~ thickness and device J-V parameters as a
function of Br-etch time of the Cu(InGa)Se~2~ absorber layer.
126](#__RefHeading___Toc125256170)

[Table XXIX. Comparison of Cu(InGa)Se~2~ devices with CBD and CdS
emitter layers based on 30 devices of each type.
127](#__RefHeading___Toc125256171)

[Table XXX. Characteristics of evaporated back contacts for
Cu(InGa)Se~2~ and device performance. The J-V results with the W and Ta
contacts are after a 2 min heat treat in air at 200°C which improved
performance. 129](#__RefHeading___Toc125256172)

[Table XXXI. Cu(InGa)Se~2~ device performance with an oxygenated Mo back
contact. 129](#__RefHeading___Toc125256173)

[Table XXXII. Optical properties of selected materials for Cu *K*α: λ =
0.15405 nm, hν = 0.008 MeV. 153](#__RefHeading___Toc125256174)

[Table XXXIII. Mo sputter deposition conditions and lattice parameter
results of in-plane stress analysis. Lattice parameter of Mo is: a~0~ =
0.3147 nm. 161](#__RefHeading___Toc125256175)

# 

**1 INTRODUCTION**

The primary objectives of this Institute of Energy Conversion (IEC)
research are specific to the 3 types of thin film solar cells currently
under commercial interest. In addition, generic process diagnostic and
control tools will be developed.

## **1.1 CdTe-based Solar Cells**

The CdTe effort will address increased voltage and stability, the
development of an in-line CdTe process to implement high rate and high
throughput deposition on a moving substrate, and fundamental studies of
CdTe surface chemistry. To meet these objectives, IEC will:

-   Separate and quantify the effect on V~oc~ of high resistance (HR)
    buffer layers such as Ga~2~O~3~ and In~2~O~3~ and widening the CdS
    window layer bandgap with Zn.

-   Develop and apply a transparent back contact to CdTe to probe back
    contact junction formation and degradation.

-   Evaluate methods for increasing V~oc~ by reducing space charge
    recombination.

-   Improve the stability of CdTe devices by developing alternative
    processing steps to 'stabilize' the junction and contact; and to
    compare the effects of well-controlled stress conditions on CdTe
    solar cells by performing detailed device analysis and relating
    results to differences in fabrication.

-   Develop the fundamental understanding needed for high throughput
    CdTe module fabrication by controlling high rate delivery of Cd and
    Te species to the moving substrate surface.

-   Develop rapid and reproducible post-deposition processing
    alternatives to the current CdCl~2~ vapor treatment.

-   Determine fundamental understanding of etching and wet processing
    steps on CdTe surfaces

-   Determine relation between the contact processing and CdTe surface
    chemistry, and the device performance and stability.

## **1.2 CuInSe~2~-based Solar Cells**

The CuInSe~2~-based effort will characterize fundamental properties of
interfaces in CuInSe~2~-based solar cells, develop approaches to
improving V~oc~ including alloying with S and Al, and will also include
the development of an in-line process for deposition on a moving
substrate. To meet these objectives, IEC will:

-   Develop the in-line deposition of Cu(InGa)Se~2~ films from
    stationary elemental evaporation sources onto moving rigid (Mo
    coated glass) and flexible (Mo coated polyamide) substrates at rates
    commensurate with commercial manufacturing.

-   Determine the relationship of the film properties, both
    compositional and structural, to the solar cell performance with
    particular emphasis on the effect of complex band-gap profiles due
    to the depth distribution of Ga and In and incorporation of Na.

-   Increase the operating voltage by increasing the bandgap, E~g~, in
    the absorber layer or in the space charge region using Cu(InAl)Se~2~
    alloys.

-   Investigate the feasibility of controlled p--type doping of the
    Cu(InGa)Se~2~ or Cu(InAl)Se~2~ absorber layers to increase V~oc~.

-   Provide a fundamental understanding of surface reactions and
    interface chemistry in the fabrication of CIGS devices using atomic
    level surface characterization techniques to study the Mo surface,
    Mo/ Cu(InGa)Se~2~ interface, the free Cu(InGa)Se~2~ surface and
    Cu(InGa)Se~2~/CdS interface.

-   Determine reaction pathways for the formation of Cu(InGa)Se~2~ and
    Cu(InGa)(SeS)~2~ on H~2~Se/H~2~S time-temperature-gas concentration
    profiles using sputtered Cu/Ga/In precursors.

-   Fabricate devices with CdS, ZnS, and CdZnS buffer layers and
    CuInSe~2~ with Ga, S, and/or Al alloy absorber layers in order to
    characterize the effect buffer layers have on device behavior and
    fundamental interface properties.

## **1.3 Si-based Solar Cells**

The Si-based effort will focus on developing a process for fabricating
polycrystalline Si solar cells and materials at low temperatures on low
cost substrates as well as the use of microcrystalline Si layers in
solar cells. To meet these objectives, IEC will:

-   Develop in-situ and/or post-deposition methods such as metal induced
    crystallization (MIC) to produce HWCVD deposited Si films and
    devices with grains in the micrometer range.

-   Investigate various forms of Eutectic Promoted Deposition (EPD)
    where very thin metal layers deposited on glass substrates are
    briefly heated above the metal-Si eutectic as the HWCVD Si
    deposition proceeds leading to precipitation of Si from the
    supersaturated liquid solution.

-   Develop all HWCVD p n junction devices by developing HWCVD emitter
    layers on large grain HWCVD absorbers.

## **1.4 In-line Diagnostics**

The in-line process diagnostic effort will develop diagnostic tools
needed for process control and the associated quantitative models that
link sensor outputs to process variables and material properties. To
meet these objectives, IEC will:

-   Understand the fundamentals of thin film growth and identification
    of critical properties that lead to efficient solar cells, i.e.,
    product specifications.

-   Identify process parameters to which film properties are sensitive,
    i.e., process determinants.

-   Develop robust, reliable and fast-response sensor equipment for
    in-situ applications in deposition reactors.

-   Develop quantitative models that relate sensor output to process
    determinants and film properties for use in model based process
    control, i.e., intelligent process control.

## 

## **1.5 Training and Education**

During the period of this subcontract (September 5, 2004 to September 4,
2005), IEC provided training and education for the following: nine
post-doctoral fellows; eight graduate students; and twelve undergraduate
students. Names are given in the list of contributors.

## **1.6 Publications**

As a result of research performed under this contract, IEC published 15
papers.

## **1.7 Organization of the Report**

This report is organized into four technical sections: CdTe-based solar
cells, CuInSe~2~-based solar cells, Si-based solar cells, and
diagnostics. Each section describes the progress made at IEC in
addressing the critical issues discussed above during the 12-months
period of this contract.

**2 CdTe Based Solar Cells**

**2.1 High Throughput Processing**

The following section was recently published in a special issue of Solar
Energy (vol. 77 (2004) p. 839).

**Introduction**

Thin-film solar cells based on CdTe continue to show promise for
terrestrial photovoltaic power generation. The optoelectronic properties
of CdTe provide an ideal match to the solar spectrum for high conversion
efficiency thin film devices.[^1] Thin-film polycrystalline CdTe/CdS
solar cell efficiencies have exceeded 15%, which is 65% of their
theoretical values, and module efficiencies greater than 10% have been
demonstrated for widely differing CdTe deposition technologies.[^2] CdTe
offers flexibility in device design in that it forms isostructural and
isoelectronic alloys with other group II-VI compounds such as HgTe and
ZnTe, thereby allowing the absorber layer bandgap to be narrowed or
widened for tandem cell and optical detector applications.[^3] The
chemical stability of CdTe and its deployment in thin film modules for
electrical energy production provides a mechanism to safely contain the
cadmium byproducts that originate in copper ore refining.[^4]

While laboratory-scale research groups seek the CdTe performance and
stability limits, manufacturing groups must also contend with the
challenge of scaling-up the laboratory fabrication processes and finding
ways to close the gap between small-area cell performance and module
performance. For laboratory-scale research, the key issues with respect
to cell performance are increasing the open circuit voltage (V~oc~)
beyond 850 mV, achieving short circuit current (J~sc~) approaching 30
mA/cm^2^, reducing V~oc~ sensitivity to the window layer configuration,
and forming low resistance contacts to CdTe. Performance and stability
cannot be treated exclusively, because viable processing schemes that
give excellent short-term performance are not necessarily those which
yield stable behavior over longer time under continuous or cyclic
operation. Adapting research-scale fabrication processes to the
manufacturing scale requires a detailed understanding of the function of
each processing step, its dependence on up-stream processing variations,
its influence on down-stream processing needs, and controlling these
steps over large area. As this understanding matures, simple and robust
processing alternatives can be developed that retain the salient
features required for high performance and good stability.

This section presents processing options for superstrate thin-film CdTe
solar cells, with emphasis on critical processing steps: window/buffer
layer fabrication; absorber layer processing and junction formation; and
back contact formation. Specific techniques for depositing CdTe are not
addressed, as these are covered extensively in published
literature.Error: Reference source not found Results will be shown for
laboratory-scale devices with CdTe films by physical vapor deposition
(PVD) and vapor transport deposition (VTD). Also, the discussion will be
restricted to superstrate cells since these have demonstrated the
highest performance and are presently under development by manufacturing
groups, including First Solar , Canrom (both USA) and Antec (Germany).
Cells made in the inverted configuration, with CdTe deposited onto a
suitable substrate, have been fabricated by several groups and suffer
from the same generic problems; low V~oc~ and FF, with poor electrical
contact between the CdTe and the substrate.[^5] Table I lists the
nomenclature used in the mathematical expressions presented in this
section.

[]{#__RefHeading___Toc125256143 .anchor}Table I. Nomenclature List

  ----------------- ----------------------------------- -----------------
  Symbol            Name                                Units

  J~sc~             short circuit current density       mA/cm^2^

  V~oc~             open circuit voltage                mV

  d~f~CdS           final thickness                     nm

  J~o~              recombination current               mA/cm^2^

  FF                fill factor                         \%

  Eff               conversion efficiency               \%

  D~AB~             mass diffusivity of gas A in gas B  cm^2^/s

  α                 thermal diffusivity                 cm^2^/s

  τ~m~              characteristic time for mass        s
                    diffusion                           

  t~T~              characteristic time for thermal     s
                    diffusion                           

  p                 pressure                            mTorr

  p~sat~            saturation pressure                 Torr

  1/T               inverse temperature                 1/K

  T                 temperature                         °C or K

  E~g~              optical band gap                    eV

  ∆G~rxn~           heat of reaction                    kJ/mol

  R~oc~             slope of power curve near open      mS/cm^2^
                    circuit                             

  Ω                 incident beam angle for GIXRD       degrees

  λ                 Wavelength                          nm
  ----------------- ----------------------------------- -----------------

**Window Layer**

For superstrate thin film CdTe solar cells, the window layer is broadly
defined as all the layers through which light passes before being
absorbed in the CdTe, and the glass superstrate. The best junction
performance, indicated by V~oc~ \~ 850 mV and FF \~ 75%, is obtained
using CdS as the heterojunction partner, with a band gap of 2.4 eV. It
has been widely shown that the CdS layer in a superstrate CdTe/CdS cell
contributes negligible photocurrent and therefore constitutes a
photocurrent loss for the wavelength range from 300 nm to \~520 nm;
despite the high absorption coefficient in CdS over this wavelength
range, \>10^5^ cm^-1^, the poor photoresponse is attributed in part to
low hole lifetime and high recombination. Thus, parasitic optical
absorption in the CdS layer is the predominant photocurrent loss, making
it necessary to minimize the CdS film thickness in the device.
Maintaining junction quality in superstrate structures with d~CdS~ \<
100 nm depends on maintaining a uniform interface throughout processing
to avoid formation of parallel junctions between CdTe and the
transparent conductive oxide (TCO), which have a much higher
recombination current, J~o~, than CdTe/CdS. In practice, however, the
occurrence of spatially non-uniform microscopic discontinuities in the
CdS film increases with diminishing CdS film thickness, resulting in a
decrease in V~oc~ with diminishing CdS thickness. This is shown in
Figure 1 for devices with PVD CdTe and CdTe~1-x~S~x~ absorber layers and
CdS/ITO window layers (solid markers). Controlling the CdS thickness
uniformity at the manufacturing scale requires control over the CdS
deposition and CdS-CdTe interdiffusion during post-deposition
processing. Deposition methods showing promise for controlling CdS film
thickness \< 100nm are chemical bath deposition (CBD) and chemical
surface deposition (CSD), with the latter method giving very high
chemical utilization of dissolved Cd species.[^6] The CdTe-CdS
interdiffusion which occurs during the post-deposition CdCl~2~ treatment
of devices has been shown to primarily consist of CdS diffusion into
CdTe; and the rate of CdS consumption depends greatly on the CdTe film
grain size and the chemical ambient conditions.[^7] For CdTe/CdS couples
treated in CdCl~2~ vapor at 420°C, the bulk diffusion coefficient was
found to be \~1 x 10^-13^ cm^2^/s and the grain boundary diffusion
coefficient depended on the grain size, with typical values for PVD CdTe
to be \~ 1 micron. This resulted in grain boundary diffusion coefficient
\~1 x 10^-8^ cm^2^/s, resulting in a net CdS consumption rate of \< 2 x
10^-10^ gmol/cm^2^-s, corresponding to an equivalent CdS thickness loss
rate of \< 0.05 nm/s. For CdTe films with 4 micron diameter grains,
deposited by either PVD or VTD, typical CdS thickness loss rates less
than 0.01 nm/s were measured. Such low rates can also be obtained in
small-grain CdTe films by forming the native oxide CdTeO~3~ in the CdTe
film prior to the CdCl~2~ treatment.[^8]

![](media/image2.png){width="4.333333333333333in"
height="3.657638888888889in"}

[]{#__RefHeading___Toc125256006 .anchor}Figure 1. V~oc~ versus final CdS
film thickness for PVD CdTe/CdS and CdTe~1-x~S/CdS cells without buffer
layers (solid) and with buffer layers (open).

Two options exist for maximizing photocurrent while retaining high
junction quality: 1) employing a high resistance buffer layer between
CdS and TCO to raise J~o~ in the CdTe/TCO junction and 2) using
Cd~1-x~Zn~x~S alloy films to widen the band gap and relax the thickness
constraint. Table II lists AM 1.5 current-voltage (JV) device results
for CdTe/CdS cells with CdTe deposited by PVD and high resistance oxide
buffer layers between the TCO and CdS film. The buffer layers evaluated
were SnO~2~, In~2~O~3~ and Ga~2~O~3~. In all three cases, the buffer
layers were fabricated by oxidation of thin films of Sn, In, or Ga
deposited on TCO/glass. The cell results in Table II and the V~oc~ plot
in Figure 1 (open markers) demonstrate high J~sc~ and retention of
junction quality for devices with CdS \< 100 nm. Incorporating a high
resistance SnO~2~ buffer layer on SnO~2~/7059 has resulted in devices
with conversion efficiencies \>13% for evaporated CdTe.

[]{#__RefHeading___Toc125256144 .anchor}Table II. AM1.5 JV results
(28°C) for PVD CdTe devices with 7059/ITO, 7059/ITO/buffer/CdS,
7059/SnO~2~/buffer/CdS, and 7059/ITO/50nm Cd~0.95~Zn~0.05~S window
layers. All cells were processed with 580°C, 5 min pre-anneal and 420°C,
15 min vapor CdCl~2~ post-deposition treatments.

+-----------+-----------+-----------+--------+--------+--------+--------+
| TCO       | Buffer    | d~f~(CdS) | V~oc~  | J~sc~  | FF     | Eff    |
|           |           |           |        |        |        |        |
|           | nm/       | nm        | mV     | mA     | \%     | \%     |
|           |           |           |        | /cm^2^ |        |        |
|           | type      |           |        |        |        |        |
+-----------+-----------+-----------+--------+--------+--------+--------+
| ITO       | None      | 0         | 440    | 25.0   | 47     | 5.0    |
+-----------+-----------+-----------+--------+--------+--------+--------+
| ITO       | None      | 50        | 590    | 23.9   | 47     | 6.6    |
+-----------+-----------+-----------+--------+--------+--------+--------+
| ITO       | None      | 110       | 790    | 20.3   | 70     | 11.3   |
+-----------+-----------+-----------+--------+--------+--------+--------+
| ITO       | 20        | 30        | 652    | 23.9   | 52     | 8.1    |
|           | In~2~O~3~ |           |        |        |        |        |
+-----------+-----------+-----------+--------+--------+--------+--------+
| ITO       | 50        | \< 20     | 754    | 26.2   | 60     | 11.9   |
|           | In~2~O~3~ |           |        |        |        |        |
+-----------+-----------+-----------+--------+--------+--------+--------+
| ITO       | 50        | 100       | 790    | 21.8   | 70     | 12.0   |
|           | In~2~O~3~ |           |        |        |        |        |
+-----------+-----------+-----------+--------+--------+--------+--------+
| ITO       | 50        | 40        | 760    | 24.0   | 62     | 11.4   |
|           | Ga~2~O~3~ |           |        |        |        |        |
+-----------+-----------+-----------+--------+--------+--------+--------+
| SnO~2~    | None      | 0         | 440    | 18.0   | 46     | 3.5    |
+-----------+-----------+-----------+--------+--------+--------+--------+
| SnO~2~    | None      | 90        | 753    | 22.8   | 63     | 10.8   |
+-----------+-----------+-----------+--------+--------+--------+--------+
| SnO~2~    | 50 SnO~2~ | \< 20     | 790    | 26.0   | 68     | 13.8   |
+-----------+-----------+-----------+--------+--------+--------+--------+
| ITO       | None      | 30        | 750    | 23.2   | 62     | 10.8   |
|           |           | Cd~0.95~  |        |        |        |        |
|           |           | Zn~0.05~S |        |        |        |        |
+-----------+-----------+-----------+--------+--------+--------+--------+

Another approach to maximizing transparency in the window layer is
replacing pure CdS with Cd~1-x~Zn~x~S, as reported in reference.[^9]
Calculations suggest that addition of Zn to the interface can reduce
valence band offsets[^10] which may translate to higher V~oc~. We
fabricated devices with no buffer layer but with Cd~1-x~Zn~x~S having
low Zn content, x \~ 0.05, and obtained higher V~oc~ than for devices
fabricated with, non-alloyed CdS (Table II).

High efficiency CdTe/CdS devices require uniform, ultra-thin,
pinhole-free CdS films to serve as the heterojunction window layer.
Although several methods exist to deposit CdS films with d \< 100 nm,
chemical surface deposition (CSD) offers high quality conformal films
with high growth rate and utilization of dissolved Cd. CSD offers
several advantages over chemical bath deposition (CBD), by allowing the
heated substrate to selectively provide the heat for reaction at the
substrate surface, thereby enhancing heterogeneous nucleation on the
substrate and reducing homogeneous nucleation in the bath, which
increases the utilization of solvated Cd species.[^11] In practice, CSD
can be accomplished by flow-on, spray, or other methods.[^12] For use in
cells with VT CdTe, CSD CdS films were deposited on 10 cm x 10 cm
Ga~2~O~3~/SnO~2~-coated glass (L.O.F. TEC15) from a solution containing
1.5 mM CdSO~4~, 0.15 M CS(NH~2~)~2~, and 1.8 M NH~4~OH. A 4 min.
deposition carried out at 55-60ºC produces 40-50 nm thick films (rate =
0.2 nm/sec), and the Cd species utilization is \>80%. Glancing incidence
x-ray diffraction (GIXRD) analysis of as-deposited films indicates
increasing crystallinity with deposition temperature, with wurtzite
structure and microcrystalline order \~ 20 nm for 60ºC deposition
(Figure 2). Heat treatment of the films in argon ambient at 550ºC for 5
minutes (HTA) or CdCl~2~:O~2~:Ar vapor at 430ºC for 5-10 minutes induces
primary recrystallization, producing sharp reflections of the wurtzite
phase. HTA preserves (001) film orientation while vapor CdCl~2~
treatment induces randomization and secondary recrystallization (Figure
3). Vapor CdCl~2~ treatment is used for cell processing, sharpens the
optical transmission edge and increases transparency (Figure 4).

![](media/image3.png){width="4.138888888888889in"
height="2.2395833333333335in"}

[]{#__RefHeading___Toc125256007 .anchor}**Figure 2. GIXRD pattern of CSD
CdS as deposited (As Dep), after anneal at 550ºC for 5 min (HTA) and
after vapor CdCl~2~ treatment at 430°C for 10 min (CdCl~2~). CdS peaks
at 2θ = 20º, 26.5º,28.2º, 44º, 52º and 53º; remaining peaks due to
ITO.**

![](media/image4.png){width="1.6069444444444445in"
height="1.6208333333333333in"}![](media/image5.png){width="1.5638888888888889in"
height="1.6208333333333333in"}

[]{#__RefHeading___Toc125256008 .anchor}**Figure 3**. **Atomic force
micrographs of CSD CdS film: as-deposited at 65°C (left) and after vapor
CdCl~2~ HT at 430°C (right).**

![](media/image6.png){width="3.079861111111111in"
height="1.9805555555555556in"}

[]{#__RefHeading___Toc125256009 .anchor}Figure 4. Normalized optical
transmission, T/(1-R), of window layer used in VT cells.

# 

# *Influence of Chemical and Structural Properties on Devices*

Post-deposition treatments at elevated temperatures in reactive chemical
environments such as O~2~ and CdCl~2~ shift the chemical state of the
films considerably compared to the as-deposited condition and improves
device performance. This section summarizes the basis for this and the
effect on device operation.

Over the past decade, detailed analysis of the interfacial region in
moderate and high efficiency CdTe/CdS cells by x-ray diffraction (XRD),
transmission electron microscopy (TEM) with microprobe (EDS), secondary
ion mass spectroscopy (SIMS) and opto-electronic measurements have shown
that the CdTe-CdS interface in a working device consists of
CdTe~1-x~S~x~/CdS~1-y~Te~y~ alloys.Error: Reference source not found The
interfacial values of x and y correspond to the solubility limits in the
CdTe-CdS system at the device processing temperature. The CdTe~1-x~S~x~
and CdS~1-y~Te~y~ alloys form via diffusion across the interface during
CdTe deposition and post-deposition treatments and affect photocurrent
and junction behavior. For the CdTe-CdS system, with CdTe~1-x~S~x~ and
CdS~1-y~ Te~y~ phases, the thermal dependence of the miscibility gap is
well approximated by a cubic fit:[^13]

$x = (4\text{.}\text{717}e^{- 2}) + ( - 3\text{.}\text{104}e^{- 4})T + (9\text{.}\text{543}e^{- 8})T^{2} + ( - 3\text{.}\text{687}e^{- \text{10}})T^{3}$
(7a)

$y = ( - 1\text{.}\text{684}e^{- 1}) + (1\text{.}\text{172}e^{- 3})T + ( - 2\text{.}\text{639}e^{- 7})T^{2} + (2\text{.}\text{348}e^{- \text{10}})T^{3}$
(7b)

The stable crystallographic forms of the solid alloys are zincblende
(F-43m) structure for Te-rich CdTe~1-x~S~x~ and wurtzite (P6~3~mc)
structure for S-rich CdS~1-y~Te~y~. The zincblende-wurtzite transition
in metastable films occurs at x = 0.3, and the lattice parameter within
each structure type follows Vegard's rule. Metastable and equilibrated
CdTe~1-x~S~x~ alloy films exhibit the same composition dependence of
optical bandgap (E~g~), with minimum E~g~= 1.39 eV at the
zincblende-wurtzite transition. The compositional dependence of the
CdTe~1-x~S~x~ bandgap is described by:Error: Reference source not found

*E~g~(x)* = 2.40*x* + 1.51*(1-x)* -- *bx(1-x)* (8)

where the bowing parameter, b = 1.8. Thus, for cells processed at
\~500°C, the CdTe~1-x~S~x~ composition is x \~ 0.09, and the
corresponding absorber layer optical bandgap is E~g~ \~ 1.44 eV. In
correlating measurable properties in CdTe/CdS solar cells and diagnostic
structures, it is helpful to recognize that alloy formation results in a
lattice parameter distribution, detectable by XRD, that corresponds to a
distribution in opto-electronic properties, which are detectable in
films by variable angle spectroscopic ellipsometry (VASE) and in devices
by quantum efficiency (QE). For compositionally graded alloys formed by
diffusion from CdS into the CdTe film, we expect the maximum bandgap
variation in the materials to occur at the CdTe-CdS interface and
possibly in grain boundary regions near the interface, due to enhanced
diffusion in the grain boundaries. In devices, the long-wavelength
quantum efficiency edge is generally found to correlate with
compositionally-broadened diffraction line profiles of prominent (hkl)
reflections in alloyed films.

Formation of the CdS~1-y~Te~y~ alloy on the S-rich side of the junction
reduces the bandgap and increases absorption, which reduces photocurrent
in the 500 to 600 nm range. This effect is suppressed by annealing the
CdS film prior to CdTe deposition to reduce crystallographic defects in
CdS. Formation of the CdTe~1-x~S~x~ alloy on the Te-rich side of the
junction reduces the absorber layer bandgap, due to the relatively large
optical bowing parameter of the CdTe-CdS alloy system. Overall, this has
little effect on efficiency since the increase in long wavelength QE
typically increases photocurrent by \~ 0.5 mA/cm^2^, which is nearly
offset by small reduction in V~oc~ \~ 25 mV.

Other significant effects of alloy formation include spatially
non-uniform consumption of the CdS layer, penetration of CdS into the
CdTe film grain boundaries, and relaxation of lattice strain between
CdTe and CdS. The rate of CdS consumption has been quantitatively
determined in terms of bulk and grain boundary diffusion. For treatment
at 420°C in 10 mTorr CdCl~2~ and 150 Torr O~2~, similar diffusion
coefficients for bulk (D~b~) and grain boundary (D~gb~) have been
determined for CdS diffusion into CdTe deposited by electrodeposition,
PVD, and CSS: D~b~ = 1.25 x 10^-13^ cm^2^/s and D~gb~ = 1.5 x 10^-8^
cm^2^/s.[^14] For PVD films with \~1 μm diameter grains and 3-4 μm film
thickness, the typical CdCl~2~ treatment at 420°C for 20 minutes
consumes CdS at an equivalent thickness rate of \~0.05 nm/s. Spatially
non-uniform consumption of CdS leads to parallel junctions between
CdTe~1-x~S~x~/CdS~1-y~Te~y~ and CdTe~1-x~S~x~/ITO (or SnO~2~); since the
CdTe~1-x~S~x~/TCO junctions have higher J~o~, the net result is an
increase in total J~o~, which reduces V~oc~. For two predominant types
of diode A and B and assuming comparable diode prefactors *(β =*q/AkT),
the overall diode current can be described in terms of the usual diode
equation and the fractional area of the two diode types:

$f = \frac{\text{Area}(A)}{\text{Area}(A + B)}$ (9)

$J = \left\lbrack J_{o}^{A}(1 - f) + J_{o}^{B}(f) \right\rbrack\text{exp}(\beta V) - J_{L}$
(10)

Solving for the open circuit voltage (*J* = 0) gives:

$V_{\text{oc}} = \frac{1}{\beta}\text{ln}\left\lbrack \frac{J_{L}}{J_{o}^{A}(1 - f) + J_{o}^{B}(f)} \right\rbrack$
(11)

Characterization of actual CdTe/CdS/ITO (A) and CdTe/ITO (B) cells shows
comparable diode A-factors \~ 1.7 but diode currents of $J_{o}^{A}$= 8 x
10^-8^ mA/cm^2^ and $J_{o}^{B}$= 1 x 10^-4^ mA/cm^2^, respectively. For
1% fractional area of holes in the CdS film, the V~oc~ would thus be
reduced by 300 mV. Modeling of thin-film device structures with a random
distribution of different quality diodes in-parallel is more extensively
covered in other recent work.[^15] Penetration of S-rich species into
the CdTe grain boundaries can produce a three-dimensional junction,
which increases the actual junction area, also limiting V~oc~. This
grain boundary penetration of CdS in CdTe is accelerated by CdCl~2~ and
O~2~ chemical activity during the post-deposition treatment and is
extremely sensitive to the physical and chemical state of the CdTe film
prior to the treatment.Error: Reference source not found

The exposed (back) surface of the CdTe film is subjected to a wide range
of ambient conditions during processing, which shift the surface state;
shifts in equilibrium are expected to influence bulk properties if the
processing is carried out at sufficient temperature to allow
re-distribution of excess species. Thus, it is also important to
consider the CdTe-O~2~-CdCl~2~ chemical system. For CdTe-CdCl~2~, the
occurrence of a eutectic at \~490°C suggests that enhanced surface
mobility can be expected for *T* \> 450°C and high CdCl~2~ concentration
due to liquid Cd(TeCl). Note that the solubility limit for CdCl~2~ in
CdTe is \< 0.1 wt% at 490°C. At lower temperatures and low CdCl~2~
concentration in the presence of O~2~, chemical reaction at the surface
and in grain boundary between CdCl~2~, O~2~, CdTe and CdS is expected.
For treatments where solid CdCl~2~ is in physical contact with CdTe in
air ambient, the solid phase reaction is:

1\) *CdCl~2~ (s) + O~2~ (g) + CdTe (s) ↔ TeCl~2~ (g) + 2CdO (s),
∆G~rxn~*(400°C) = -137.6 kJ/mol.

For vapor CdCl~2~:O~2~:Ar treatments, in which CdCl~2~ condensation is
prevented by maintaining the CdTe/CdS at a higher temperature than the
CdCl~2~ source, the reaction between gas phase CdCl~2~ and O~2~ and
solid CdTe is:

2\) *CdCl~2~ (g) + O~2~ (g) + CdTe (s) ↔ TeCl~2~ (g) + 2CdO (s),
∆G~rxn~* (400°C) = -206.2 kJ/mol.

Both cases are thermodynamically favored but the extent of reaction
depends on the activity coefficient of the reactive species, and a large
difference is expected between the solid-solid contact case (CdCl~2~
activity coefficient = 1) and the solid-vapor case (activity coefficient
\~ 10^-8^ atm). In fact, for vapor treatments, the CdCl~2~ partial
pressure can be varied over a wide range by controlling the source
temperature. Analogous reactions exist for CdS-CdCl~2~-O~2~.

In these overall reactions, volatile VIB-VIIA species is generated and
solid CdO phase is produced. We have verified this reaction scenario
experimentally for treatments of both CdTe and CdS powders and films.
The formation of volatile VIB-VIIA species provides a mechanism for
enhanced atomic mobility within grain boundaries and may be the key to
understanding enhanced diffusivity.

At the back surface of CdTe, the oxide is an undesired byproduct. CdO
has halite (Fm3m) structure, is thermally stable up to 900°C, has the
highest ionicity value in the Cd-VIB system (0.78), is insulating, and
therefore poses an obstacle for back contact formation.

For reaction in the presence of O~2~ alone, CdTe forms a native oxide
CdTeO~3~, which lies on the TeO~2~-CdO pseudobinary tie-line and is the
equilibrium native oxide of CdTe, has cubic structure and is
electrically insulating. We have verified this phase in films
experimentally by GIXRD measurements of CdTe films treated at 450°C to
600°C in dry air.Error: Reference source not found For treatments in air
containing a partial pressure of water, we have found that a different
oxide, CdTe~2~O~5~ is consistently formed. The deviations from
stoichiometry caused by oxide formation should have a profound effect on
the near-surface Cd-vacancy concentration,[^16] impacting the ability to
control both bulk and surface acceptor concentration.

# *Vapor Transport CdTe Deposition*

The VT deposition system previously describedError: Reference source not
found^,^[^17] was used to deposit CdTe films down onto moving 10 cm x 10
cm TEC-15 plates coated with CSD CdS films. In VT deposition, He or N~2~
carrier gas is saturated with Cd and Te~2~ vapor and then de-saturated
at the cooler substrate. The substrate rests on a graphite susceptor,
which translates at an adjustable rate over an array of quartz halogen
lamps. Baseline deposition conditions were established to provide a
benchmark for analyzing processing variations. For routine batch
operation, the system pressure is maintained at 100 Torr while the CdTe
source manifold is heated, then is reduced to 20 Torr as substrate
translation at 3 cm/min begins for deposition, and is finally increased
after deposition to \>100 Torr to suppress re-evaporation from the
substrate. Baseline deposition is carried out at a He carrier gas flow
rate of 20 sccm and source temperature of 800ºC, with a 3 mm wide exit
slit located 1.5 cm above the substrate, producing a CdTe delivery rate
of 5 x 10^-6^ mol/s and a uniform deposition zone 1-1.5 cm wide. CdTe
crystals with 6N purity from Alfa/Aesar were used for all depositions.
The growth rate was found to be invariant with substrate temperature
over the range studied, from 500ºC to 570ºC. The static equivalent
growth rates and utilization of transported CdTe vapor obtained for
different source temperatures and carrier gas flow rates are listed in
Table III. High deposition rates, up to nearly 100 μm/min, were
achieved, and utilization remained constant \~50% except at the highest
deposition rate. Scaling this process up is achievable by increasing the
deposition zone area, by matching the source slit length to the
substrate width and increasing the exit slit width.

[]{#__RefHeading___Toc125256145 .anchor}Table III. Static equivalent
growth rate and utilization of VT CdTe.

+---------------+----------------+-----------------+-------------------+
| T source (C)  | Flow (sccm)    | Rate            | Utilization       |
|               |                |                 |                   |
|               |                | (μm/min)        | (%)               |
+---------------+----------------+-----------------+-------------------+
| 780           | 20             | 6               | 50                |
+---------------+----------------+-----------------+-------------------+
| 800           | 20             | 8               | 56                |
+---------------+----------------+-----------------+-------------------+
| 820           | 20             | 12              | 53                |
+---------------+----------------+-----------------+-------------------+
| 840           | 20             | 18              | 52                |
+---------------+----------------+-----------------+-------------------+
| 780           | 20             | 6               | 50                |
+---------------+----------------+-----------------+-------------------+
| 780           | 40             | 8               | 49                |
+---------------+----------------+-----------------+-------------------+
| 840           | 20             | 18              | 52                |
+---------------+----------------+-----------------+-------------------+
| 840           | 40             | 35              | 47                |
+---------------+----------------+-----------------+-------------------+
| 860           | 40             | 81              | 7                 |
+---------------+----------------+-----------------+-------------------+

The effect of deposition conditions on CdTe film morphology and grain
size is illustrated in the following series of 20 μm x 20 μm AFM images.
As reported previously, O~2~ partial pressure, \<0.1 Torr, improves
lateral grain packing and nearly eliminates pinholes. All samples were
deposited in He ambient containing \~50 mTorr O~2~ partial pressure.
Figure 5 shows increasing grain size with increasing substrate
temperature for 5 micron thick films. Figure 6 shows increasing grain
size with increasing film thickness for 550ºC substrate temperature.
Figure 7 shows decreasing grain size with increasing deposition rate.
The appreciable differences measured have a direct bearing on the
effects of post-deposition processing, since diffusion in grain
boundaries significantly enhances overall CdS-CdTe diffusion during
CdCl~2~ treatment.Error: Reference source not found In this series, the
image in Figure 7-left corresponds to the baseline deposition.

![](media/image7.png){width="1.5145833333333334in"
height="1.5916666666666666in"}![](media/image8.png){width="1.6493055555555556in"
height="1.6208333333333333in"}

[]{#__RefHeading___Toc125256010 .anchor}**Figure 5**. **AFM images of 5
μm thick CdTe films deposited by vapor transport on moving substrates in
He+O~2~ at 500°C (left) and 570°C (right).**

![](media/image9.jpeg){width="1.6319444444444444in"
height="1.6076388888888888in"}![](media/image10.jpeg){width="1.525in"
height="1.54375in"}

[]{#__RefHeading___Toc125256011 .anchor}**Figure 6**. **AFM images of 1
μm (left) and 23 μm thick (right) CdTe films deposited by vapor
transport on moving substrates in He+O~2~ at 550°C.**

![](media/image11.jpeg){width="1.5069444444444444in"
height="1.5888888888888888in"}![](media/image12.jpeg){width="1.6319444444444444in"
height="1.6236111111111111in"}

[]{#__RefHeading___Toc125256012 .anchor}**Figure 7.** **AFM images of 6
μm thick CdTe films deposited by vapor transport on moving substrates in
He+O~2~ at 8 μm/min (left) and 81 μm/min (right) at 550°C.**

***Vapor CdCl~2~ Treatment***

Vapor CdCl~2~ treatment yields low surface residue and uniform device
performance, making it an attractive alternative for large-scale
processing.[^18]^,^[^19] Vapor CdCl~2~ treatment also offers a pathway
for rapid post-deposition treatment by allowing the treatment
temperature and CdCl~2~ concentration to be independently controlled and
by producing surfaces, which are free of oxide contamination, reducing
the need for etching. For treatments in which CdCl~2~ is coated on the
CdTe, raising the treatment temperature would simultaneously sublime
CdCl~2~ from the surface and increase diffusion into the CdTe film. The
chemical activity for the diffusion would be \~unity until all CdCl~2~
had sublimed away. With vapor processing, the chemical activity is
controlled by CdCl~2~ partial pressure in the ambient, and shorter
treatment times are achievable by raising the treatment temperature and
reducing the CdCl~2~ concentration. A treatment system for processing 5
cm x 5 cm samples, consisting of a packed-bed CdCl~2~ vapor generator
with N~2~ carrier gas and quartz halogen sample heater, has been
developed[^20] and is shown in Figure 8.

![](media/image13.wmf){width="3.977777777777778in"
height="4.059027777777778in"}

[]{#__RefHeading___Toc125256013 .anchor}Figure 8. Schematic depiction of
carrier gas passing through a packed bed of CdCl~2~.

Figure 9 shows GIXRD patterns of the surface of VT CdTe: 1)
as-deposited; 2) vapor CdCl~2~ treated; and 3) treated with
solution-applied CdCl~2~ (wet). Baseline CdCl~2~ treatments were carried
out at 415°C for 25 minutes. For the vapor treatments, the CdCl~2~
sources were maintained at 400°C, which produces a CdCl~2~ partial
pressure of 3.5 mTorr. The GIXRD scan of the as-deposited CdTe shows the
usual CdTe reflections (111), (220), (311) and (400). The vapor treated
sample exhibits a similar pattern. The wet-treated sample, on the other
hand, taken after a water rinse to remove CdCl~2~, contains reflections
from non-soluble phases, indexed as CdO (2θ = 33°) and a different
crystal form of CdTeO~3~. No grain growth was observed on baseline
deposited VT CdTe, having large as-deposited grains.

![](media/image14.wmf){width="3.8472222222222223in"
height="2.2131944444444445in"}

[]{#__RefHeading___Toc125256014 .anchor}**Figure 9.** **GIXRD patterns
of VT CdTe in as-deposited and CdCl~2~ treated conditions, showing the
contrast between wet and vapor treatments.**

# *Devices*

Baseline VT devices were fabricated by first performing a
post-deposition vapor CdCl~2~ treatment at 415ºC for 20 minutes in
Ar/O~2~ ambient. The CdTe surface was then etched in a three-step "BDH"
process to form a Te layer.[^21] Primary electrical contact to CdTe is
facilitated by formation of Cu~2~Te. This is accomplished by sequential
evaporation of Cu followed by application of the current carrying
conductor and treatment in argon at 180ºC for 30 minutes. Table IV lists
AM1.5 J-V parameters obtained for the baseline deposition process and
for different deposition conditions and contacts. The J-V and spectral
response behavior of the cell with 13.3% efficiency are shown in Figures
10 and 11, respectively.

[]{#__RefHeading___Toc125256146 .anchor}Table IV. Best cell AM1.5 J-V
results for devices fabricated with CSD CdS, baseline VT CdTe and vapor
CdCl~2~ treatment.

+---------------+-----------+--------+--------------+-------+--------+
| Vapor CdCl~2~ | Contact   | V~oc~  | J~sc~        | FF    | Eff    |
|               |           |        |              |       |        |
| Temp/time     |           | (mV)   | (mA/cm^2^)   | (%)   | (%)    |
|               |           |        |              |       |        |
| (C/min)       |           |        |              |       |        |
+---------------+-----------+--------+--------------+-------+--------+
| None          | Au        | 570    | 15.9         | 46.9  | 4.2    |
+---------------+-----------+--------+--------------+-------+--------+
| 415/25        | Au        | 801    | 23.0         | 71.7  | 13.2   |
+---------------+-----------+--------+--------------+-------+--------+
| 415/25        | Ni        | 810    | 23.7         | 70.8  | 13.6   |
+---------------+-----------+--------+--------------+-------+--------+
| 415/25        | Cr        | 814    | 23.0         | 62.5  | 11.7   |
+---------------+-----------+--------+--------------+-------+--------+
| 410/20        | Au        | 808    | 23.8         | 69.2  | 13.3   |
+---------------+-----------+--------+--------------+-------+--------+
| 440/2         | Au        | 634    | 20.4         | 60.2  | 7.8    |
+---------------+-----------+--------+--------------+-------+--------+
| 465/2         | Au        | 755    | 24.2         | 60.2  | 11.0   |
+---------------+-----------+--------+--------------+-------+--------+

![](media/image15.wmf){width="3.1131944444444444in" height="2.36875in"}

[]{#__RefHeading___Toc125256015 .anchor}Figure 10. Light (AM1.5, 28ºC)
and dark J-V behavior for 13.3% efficient baseline VT cell.

![](media/image16.wmf){width="3.1416666666666666in"
height="2.4090277777777778in"}

[]{#__RefHeading___Toc125256016 .anchor}Figure 11. Normalized spectral
response (0V, light bias) for 13.3% efficient baseline VT cell.

In Table IV, the cell processed with no CdCl~2~ treatment suffers from a
poor junction and low current, with 4% efficiency. For cells with
CdCl~2~ treatment at 410-415ºC, comparable cell performance is
demonstrated with Au, Ni and Cr contacts, with best cells having \>13%
efficiency. The last two rows in Table IV demonstrate that reduced
CdCl~2~ treatment time can be employed but must be offset with increased
treatment temperature to maintain performance at 11% efficiency.
Comparing the short wavelength QE in Figure 11 with the optical
transmission of the CdS in Figure 4, we estimate that the CdS thickness
was reduced during processing by \~20 nm. Not shown are data for cells
made with no intentional Cu, which gave V~oc~ from 740 to 790 mV but FF
\< 60%, with severe rollover in forward bias, attributed to a barrier at
the back contact.

The performance of cells with different CdS thickness and CdTe
deposition conditions but fixed CdCl~2~ treatment and contact are listed
in Table V. Each row corresponds to a separate deposition. Note that
trials without CdS or Ga~2~O~3~ buffer layers exhibited poor adhesion
after post-deposition processing and cells were not completed. The
initial CdS thicknesses are listed in the table. The first three samples
show relatively constant V~oc~ \~ 800 mV for 5-7 μm thick CdTe with
initial CdS thickness of 80 nm, indicating uniform junction quality.
Note that the cell with 7 μm thick CdTe and 80 nm CdS exhibited the
highest V~oc~ obtained with the VT baseline process. Doubling the CdS
thickness had no beneficial impact on the junction behavior but reduced
J~sc~, which indicates that the baseline CdS coating is sufficiently
thick to obtain a high quality junction. The CdS film thickness is
reduced in baseline processed cells by \~20 nm due to interdiffusion at
the interface, producing a negligible shift in long wavelength spectral
response.

The lower three rows in Table V show that very high CdTe growth rate
reduces junction quality. For the 6 μm thick sample deposited at 81
μm/min, this can be understood in terms of Figure 7-right, which shows
that this sample had very small as-deposited grain structure, similar to
4 μm thick PVD CdTe films deposited at 0.2 μm/min at \~300ºC. In such
cases, the additional grain boundary volume enhances CdS diffusion into
CdTe, allowing more blue light penetration into the absorber layer,
raising J~sc~, but also creating discontinuities in the CdS film,
lowering V~oc~ by formation of parallel diodes having higher
recombination current. This sample exhibited secondary
recrystallization, or grain growth, after the vapor CdCl~2~ treatment,
which is additional evidence for high atomic mobility, since grain
coalescence involves breaking and re-forming bonds along the moving
grain boundary front. Direct evidence for this was shown by
time-progressive AFM images of the CdTe surface after CdCl~2~ treatments
in a 1 minute time frame.[^22]

The last two rows in Table V show device results for cells with \~1 μm
thick CdTe films deposited at 9 and 18 μm/min, obtained by translating
the sample stage at higher speeds compared to the baseline speed of 1.25
cm/min. The films had small as-deposited grains (Figure 5-left), and the
CdCl~2~ treatment temperature was reduced to 390ºC for 15 min; these
conditions were based on earlier results obtained for PVD cells with 1.3
μm thick CdTe.[^23] In addition, the aggressive BDH process for treating
the back surface could not be employed, since it consistently produced
cells with severe shunt characteristics. Aniline was used to etch the
surfaces prior to application of the Cu/Ni contact. For the 1.4 μm thick
VT film deposited at 9 μm/min, the junction operation is similar to that
obtained with baseline CdTe thickness, resulting in \>10% efficiency.
For a cell with 1 μm CdTe deposited at higher growth rate, lower
junction quality is obtained and cannot be attributed to a loss of CdS.
Note that the J~sc~ is similar to baseline cells, indicating sufficient
CdTe thickness for high current generation.

[]{#__RefHeading___Toc125256147 .anchor}Table V. Best cell AM1.5 J-V
results for devices fabricated with baseline vapor CdCl~2~ treatment
(except \*) and with different CdS thickness and CdTe deposition
conditions.

+---------------+----------------+--------+------------+------+------+
| Window        | CdTe           | V~oc~  | J~sc~      | FF   | Eff  |
|               |                |        |            |      |      |
|               | thk/rate       | (mV)   | (mA/cm^2^) | (%)  | (%)  |
|               |                |        |            |      |      |
|               | (μm/μm/min)    |        |            |      |      |
+---------------+----------------+--------+------------+------+------+
| 80 nm CdS     | 5/7            | 792    | 23.4       | 66.6 | 12.3 |
+---------------+----------------+--------+------------+------+------+
| 80 nm CdS     | 6/8            | 808    | 23.8       | 69.2 | 13.3 |
+---------------+----------------+--------+------------+------+------+
| 80 nm CdS     | 7/10           | 845    | 24.1       | 64.0 | 13.0 |
+---------------+----------------+--------+------------+------+------+
| 160 nm CdS    | 7/10           | 800    | 21.2       | 63.6 | 10.8 |
+---------------+----------------+--------+------------+------+------+
| 80 nm CdS     | 6/81           | 736    | 24.8       | 53.4 | 9.7  |
+---------------+----------------+--------+------------+------+------+
| \*80 nm CdS   | 1.4/9          | 807    | 23.0       | 57.0 | 10.5 |
+---------------+----------------+--------+------------+------+------+
| \*80 nm CdS   | 1/18           | 650    | 23.2       | 54.1 | 8.2  |
+---------------+----------------+--------+------------+------+------+

To summarize the results of this section, CSD delivers high CdS growth
rate and Cd utilization and yields high quality CdTe/CdS junctions. For
CSD CdS, uniform films deposited with \>80% utilization of dissolved Cd
demonstrated good junction quality in baseline VT CdTe devices, yielding
13% conversion efficiency and V~oc~ \> 840 mV. For VT CdTe, unbaffled
batch deposition yields 50% utilization at static equivalent growth
rates up 40 μm/min. Much higher utilization would be expected for
continuous deposition since much of the non-utilized CdTe is lost during
the heat-up and substrate translation delay time, and the chamber would
be continuously at steady state. For 100% utilization, achievable by
adding baffles, a source T = 840ºC would yield \>100 μm/min growth rate
and a 1 μm film could be deposited over a 1 m length (module size) in 1
min.

Vapor CdCl~2~ treatment offers control of CdCl~2~ concentration,
temperature and time and yields a clean CdTe surface. The performance of
cells deposited on commercial SnO~2~/glass substrates with a Ga~2~O~3~
buffer layer, translating at 3 cm/min at 550ºC, demonstrates that high
efficiency can be achieved with a simple, robust process. A
post-deposition CdCl~2~ treatment time as low as 2 minutes was used to
fabricate cells with 11% efficiency. Promising cell results were
obtained for cells deposited at very high growth rates, yielding \~10%
efficiency. Finally, VT deposition offers a path for development of
cells with thin CdTe layers, \~1 μm thick, by adjusting the CdCl~2~
treatment conditions. This has yielded cells with \>10% efficiency for
1.4 μm thick CdTe and \>8% efficiency for 1 μm thick CdTe.

***Effect of humidity and oxidation during post-processing***

CdTe oxidation at the back surface impedes contact formation. Oxidation
along grain boundaries can influence junction operation and cell
stability. The chemistry of oxide formation depends on the ambient
composition and film structure: XPS, GIXRD and surface energy
measurements have shown the primary oxides to be CdO and CdTeO~3~, while
CdTe~2~O~5~ has been found in samples treated or stored in humid
ambient. The specific oxides formed affect film defect chemistry and
grain boundary composition.

Based on GIXRD of CdTe films and XRD of CdTe powder, the crystalline
phase residues show that the reaction to form CdO requires O~2~ and
CdCl~2~ together. At 400ºC, the TeCl~2~ is volatile, leaving the powder
container and condensing at the cold ends of the reaction vessel.
Without CdCl~2~, i.e., for ambient containing O~2~, the chemical
reaction forms CdO and TeO~2~, which spontaneously reacts to form
CdTeO~3~, which is the native oxide of CdTe. For reaction in humid
ambient, CdTe~2~O~5~ residue is detected, which is evidence for
preferential removal of Te in the presence of H~2~O vapor. In such
cases, further treatment time produces CdTeO~3~ as excess Cd is forced
to oxidize and react to satisfy chemical equilibrium.

The sensitivity of oxidation rate and products to temperature and
ambient composition were investigated by in-situ treatment during GIXRD
analysis of the surface. Experiments were conducted with PVD CdTe films
at RH = 0, 20, 40% and T = 400ºC, 500ºC, 550ºC (9 samples) and VT CdTe
films at RH = 40% and T = 500ºC (1 sample). The different humidity
conditions were achieved by using bottled dry air for RH = 0%, a bubbler
for RH \~ 20% and room air for RH \~ 40%. The GIXRD apparatus with hot
stage installed and with ambient control shroud removed is shown in
Figure 12. The scans were acquired with Cu ka x-rays over the 2θ angular
range from 20 to30 degrees, which spans the predominant peaks of CdTe
and its oxides, in 10 minute cycles at an incident beam angle of 1
degree, which attenuates the beam at a depth of 116 nm in CdTe and 112
nm in CdTeO~3~.

![](media/image17.jpeg){width="5.329861111111111in"
height="3.9972222222222222in"}

[]{#__RefHeading___Toc125256017 .anchor}Figure 12. GIXRD apparatus with
ambient control shroud removed, showing the hot stage for heating
samples from RT to 600ºC.

The time-progressive GIXRD data are shown for PVD films treated at 500ºC
in dry and humid ambient in Figure 13. For treatment in dry ambient, the
monoclinic crystalline phase α-CdTeO~3~ is detected after 10 minutes of
treatment and increases monotonically with time to 100 minutes. The CdTe
(111) peak is reduced in intensity over this period due to attenuation
from the developing oxide. In humid air, the tetragonal oxide TeO~2~ is
detected in the first 10 minutes, followed by the development of
α-CdTeO~3~ and conversion to β-CdTeO~3~.

![](media/image18.wmf){width="5.051574803149606in"
height="3.9015748031496065in"}

![](media/image19.wmf){width="5.053543307086614in"
height="3.902755905511811in"}

[]{#__RefHeading___Toc125256018 .anchor}Figure 13. Time-progressive
GIXRD scans of oxidation of CdTe in dry and humid ambient at 500ºC.

The thickness of the overlying oxides can be easily determined from the
reduction of the CdTe peak intensity \[see section 5 of this report\],
since the CdTe film does not undergo any detectable re-orientation
during air anneals at 300-500ºC. Figure 14 shows the time-progressive
development of oxide thickness for CdTe treated at 500ºC at RH = 0, 20
and 40%. Whereas at RH = 0, the oxide develops very slowly and formed
\~20 nm oxide, at RH = 20 and 40%, there is a very rapid initial
oxidation rate, followed by a slower, probably diffusion-limiting,
formation rate, producing oxide layers of 50-100 nm thick.

![](media/image20.wmf){width="7.120138888888889in"
height="4.313194444444444in"}

[]{#__RefHeading___Toc125256019 .anchor}Figure 14. Time-progressive
development of oxide thickness for CdTe treated at 500ºC at different
ambient humidity.

XPS survey analysis of the films after the 100 minute treatments (Figure
15-top) shows only Cd, Te and O peaks at the exposed surface, and yields
concentrations consistent with CdTeO~3~: 20 wt% Cd, 20 wt% Te, 60 wt% O,
irrespective of ambient humidity. Sputter etching (Ar^+^, 2kV, 25 mA)
showed that for the film oxidized in dry air, the oxide was removed
after 180 minutes (Figure 15-bottom, left). For the film oxidized in
humid ambient, oxygen was still present after etching for 260 minutes
(Figure 15-bottom, right). The transition from Te-O bonding to Te-Cd
bonding is seen in Figure 16 for 10 sputter etch cycles (each \~ 18
minutes duration) of both samples. The saturation of Cd-Te bonds is
reached in the dry treatment case after \~ 150 minutes, while it is
never reached for the humid treatment case. This experiment, carried out
on smooth CdTe films deposited by PVD, is being repeated on CdTe films
deposited by VT.

![](media/image21.png){width="5.809722222222222in"
height="3.8631944444444444in"}

[]{#__RefHeading___Toc125256020 .anchor}Figure 15. XPS survey scans of
the oxidized CdTe films of Figure 13 before and after sputter etching.

![](media/image22.png){width="6.229861111111111in"
height="3.0902777777777777in"}

[]{#__RefHeading___Toc125256021 .anchor}Figure 16. Time-progressive XPS
scans of the oxidized CdTe films of Figure 13 during the sputter-etch
process.

The effect on device operation of CdTe oxidation prior to CdCl~2~
treatment is alteration of the film stoichiometry at chemical levels,
which can affect doping and defect concentrations in the CdTe film. VT
devices were fabricated with samples cut from adjacent locations on VT
plate 161, with 6 μm thick CdTe and subjected to different processing
prior to the CdCl~2~ treatment. Otherwise, all three samples received
the same fabrication and post-deposition processing. The JV parameters
for the three pieces are listed in Table VI and the JV curves are shown
in Figure 17. The control sample was stored in vacuum for 1 week after
CdTe deposition and yielded 12% efficiency. The sample stored in humid
ambient at 40ºC for 16 hours prior to CdCl~2~ treatment exhibited lower
V~oc~ and FF, with 9.5% efficiency. The sample treated in humid air at
400ºC for 5 minutes prior to CdCl~2~ treatment also exhibited lower
V~oc~ and FF, with the FF being the predominant loss. Another signature
of cells exposed to humidity prior to CdCl~2~ treatment is pronounced
hysteresis between forward and reverse J-V scans, suggesting the
existence of metastable states in the CdTe film or at the contacts.
Since all samples were etched with the aggressive BDH process and had
identical contacts, the origin of the metastability is likely in the
CdTe film. The JV data clearly shows that exposure to humidity prior to
CdCl~2~ treatment is detrimental to device operation. It is suspected
that stoichiometric change brought about by the reaction with humid air,
which initially preferentially removes Te to form TeO~2~, shifts the
internal film stoichiometry sufficiently to limit the ability to form
V~Cd~ needed for p-type conductivity. In these cases, the subsequent
CdCl~2~ treatment doesn't "heal" the film and a poor diode, dominated by
low FF, is obtained.

[]{#__RefHeading___Toc125256148 .anchor}Table VI. Conditions prior to
CdCl~2~ treatment and device results for cells with VT CdTe.

+---------+--------------------+-------+--------------+-------+------+
| Piece   | Condition          | V~oc~ | J~sc~        | FF    | Eff  |
|         |                    |       |              |       |      |
|         | prior to vapor     | (mV)  | (mA/cm2)     | (%)   | (%)  |
|         | CdCl2              |       |              |       |      |
+---------+--------------------+-------+--------------+-------+------+
| 161.2   | Vacuum Stored      | 812   | 23           | 64    | 12.0 |
|         |                    |       |              |       |      |
|         | 25ºC, 1 week       |       |              |       |      |
+---------+--------------------+-------+--------------+-------+------+
| 161.1   | Stored in air      | 764   | 22.5         | 56    | 9.5  |
|         | 40ºC, 16H          |       |              |       |      |
|         |                    |       |              |       |      |
|         | (\~0.1 g/L)        |       |              |       |      |
+---------+--------------------+-------+--------------+-------+------+
| 161.4   | HT in air 400ºC, 5 | 778   | 22           | 45    | 7.5  |
|         | min                |       |              |       |      |
|         |                    |       |              |       |      |
|         | (5 g/L)            |       |              |       |      |
+---------+--------------------+-------+--------------+-------+------+

![](media/image23.png){width="4.395138888888889in"
height="5.020138888888889in"}

[]{#__RefHeading___Toc125256022 .anchor}**Figure 17.** **Light JV curves
for the devices of Table VI.**

The fabrication of CdTe thin film cells relies on the delivery of
CdCl~2~, O and Cu at various stages of the post deposition processing.
We have shown that for VT CdTe, the optimized process can be disrupted
by the condition of the films prior to CdCl~2~ treatment. In order to
further elucidate the role of oxygen in the post-deposition process and
to separate the O effects from Cu effects on junction operation, a
matrix of cells was fabricated with and without intentional Cu added at
the back contact and with different ambient conditions during the
CdCl~2~ treatment (Table VII). The samples were all cut from the same VT
plate, stored in vacuum until use and received Ni contacts at the same
time. The post-deposition treatments were: 1) no CdCl~2~ treatment; 2)
vapor CdCl~2~ treatment for 25 minutes in Ar ambient; 3) vapor CdCl~2~
treatment for 30 seconds in Ar + O~2~ ambient followed by 24.5 minutes
in Ar ambient; and 4) vapor CdCl~2~ treatment for 25 minutes in Ar +
O~2~ ambient (baseline conditions). Cells with no CdCl~2~ treatment had
similar poor performance, dominated by low J~sc~, independent of the
presence of Cu in the contact. Cells with vapor CdCl~2~ treatment in Ar
ambient with no Cu exhibited low V~oc~, high FF, light-dark crossover
and rollover. High V~oc~ with no JV anomalies were obtained with the
addition of Cu to the back contact. Cells with vapor CdCl~2~ treatment
in ambient with oxygen present for a short period at the start of the
treatment exhibited comparable results, with some hysteresis found for
the sample without Cu at the contact. Cells with baseline processing,
i.e., with oxygen present throughout the vapor CdCl~2~ treatment,
yielded the highest V~oc~ but not the highest FF. A detailed diode
analysis is needed to further quantify and separate out the actions of
the different treatments on the electronic constituents of these
devices. Similar results were obtained but not published in an identical
experiment with PVD devices conducted at this lab in the mid-1990's.

[]{#__RefHeading___Toc125256149 .anchor}Table VII.JV results for VT
devices fabricated with and without intentional Cu and under different
ambient conditions during vapor CdCl~2~ treatment.

+----+----------+---------+-----+-----+--------+----+-----+----------+
| P  | CdCl2    | Ambient | Cu  | Voc | Jsc    | FF | Eff | Comment  |
| ie |          |         |     |     |        |    |     |          |
| ce | temp,    |         | Thk | (   | (m     | (  | (%) |          |
|    | time     |         |     | mV) | A/cm2) | %) |     |          |
|    |          |         | (   |     |        |    |     |          |
|    |          |         | nm) |     |        |    |     |          |
+----+----------+---------+-----+-----+--------+----+-----+----------+
| 12 | None     | \-      | 0   | 584 | 11.5   | 45 | 3.0 | LDX,     |
| 5. |          |         |     |     |        |    |     | Roll     |
| 41 |          |         |     |     |        |    |     |          |
+----+----------+---------+-----+-----+--------+----+-----+----------+
| 12 | None     | \-      | 15  | 606 | 10.5   | 55 | 3.5 | LDX      |
| 5. |          |         |     |     |        |    |     |          |
| 42 |          |         |     |     |        |    |     |          |
+----+----------+---------+-----+-----+--------+----+-----+----------+
| 12 | 415ºC,   | Ar      | 0   | 603 | 23     | 63 | 8.7 | LDX,     |
| 5. | 25 min   |         |     |     |        |    |     | Roll     |
| 61 |          |         |     |     |        |    |     |          |
+----+----------+---------+-----+-----+--------+----+-----+----------+
| 12 | 415ºC,   | Ar      | 15  | 773 | 23     | 61 | 1   |          |
| 5. | 25 min   |         |     |     |        |    | 0.8 |          |
| 62 |          |         |     |     |        |    |     |          |
+----+----------+---------+-----+-----+--------+----+-----+----------+
| 12 | 415ºC,   | 20%     | 0   | 704 | 22.5   | 65 | 1   | Hyst     |
| 5. | 25 min   | O~2~30  |     |     |        |    | 0.3 |          |
| 11 |          | s       |     |     |        |    |     |          |
+----+----------+---------+-----+-----+--------+----+-----+----------+
| 12 | 415ºC,   | 20%     | 15  | 755 | 23     | 65 | 1   |          |
| 5. | 25 min   | O~2~30  |     |     |        |    | 1.3 |          |
| 12 |          | s       |     |     |        |    |     |          |
+----+----------+---------+-----+-----+--------+----+-----+----------+
| 12 | 415ºC,   | 20%     | 0   | 795 | 23     | 61 | 1   | Hyst,    |
| 5. | 25 min   | O~2~    |     |     |        |    | 1.1 | LDX      |
| 51 |          |         |     |     |        |    |     |          |
+----+----------+---------+-----+-----+--------+----+-----+----------+
| 12 | 415ºC,   | 20%     | 15  | 788 | 23     | 59 | 1   |          |
| 5. | 25 min   | O~2~    |     |     |        |    | 0.7 |          |
| 52 |          |         |     |     |        |    |     |          |
+----+----------+---------+-----+-----+--------+----+-----+----------+

LDX = light-dark crossover on JV plot

Roll = "rollover" in JV characteristic at V \> Voc

Hyst = hysteresis between forward and reverse JV sweeps

The implication of Cu in some degradation modes of CdTe cells provides a
motivation for investigation of Cu-free contacts. The potential hazards
of working with CdCl~2~ provide a motivation for finding alternative,
safer, treatment agents to activate the junction in CdTe/CdS cells. An
experiment was conducted to examine the effect of Cu thickness in the
Cu/Ni contact and the utility of ZnCl~2~ treatment to activate the
junction (Table VI). All cells were treated with 20% oxygen in the
treatment ambient. As found with the previous experiment (Table V),
efficiency \> 10% was achieved without Cu in the back contact, but the
cells exhibit light-dark crossover and roll-over in the forward bias
characteristic. However, Cu in the contact raises V~oc~ and FF, with 13%
efficiency obtained for vapor CdCl~2~ treatment at pCdCl~2~ = 3 mTorr.
Using a vapor ZnCl~2~ treatment, with pZnCl~2~ = 3 mTorr and using the
optimized Cu/Ni contact yielded similar cell performance as obtained
with vapor CdCl~2~ treatment with Ni only. It is believed that
re-optimization of the Cu/Ni contact process may lead to higher
performance using vapor ZnCl~2~ treatment.

[]{#__RefHeading___Toc125256150 .anchor}Table VIII. JV results for VT
devices fabricated with different Cu thickness and with ZnCl~2~
treatment.

+-----+-----------+---------+---+-----+--------+----+----+--------+
| Pi  | Halide    | Ambient | C | Voc | Jsc    | FF | E  | C      |
| ece |           |         | u |     |        |    | ff | omment |
|     | Vapor     |         |   | (   | (m     | (  |    |        |
|     |           |         | T | mV) | A/cm2) | %) | (  |        |
|     |           |         | h |     |        |    | %) |        |
|     |           |         | k |     |        |    |    |        |
|     |           |         |   |     |        |    |    |        |
|     |           |         | ( |     |        |    |    |        |
|     |           |         | n |     |        |    |    |        |
|     |           |         | m |     |        |    |    |        |
|     |           |         | ) |     |        |    |    |        |
+-----+-----------+---------+---+-----+--------+----+----+--------+
| 12  | 5 mTorr   | 20% O2  | 0 | 749 | 23     | 62 | 10 | LDX,   |
| 7.6 | CdCl2     |         |   |     |        |    | .5 | Roll   |
+-----+-----------+---------+---+-----+--------+----+----+--------+
| 12  | 5 mTorr   | 20% O2  | 1 | 791 | 23     | 68 | 12 |        |
| 7.4 | CdCl2     |         | 0 |     |        |    | .5 |        |
+-----+-----------+---------+---+-----+--------+----+----+--------+
| 12  | 5 mTorr   | 20% O2  | 1 | 801 | 23     | 71 | 13 |        |
| 7.5 | CdCl2     |         | 5 |     |        |    | .0 |        |
+-----+-----------+---------+---+-----+--------+----+----+--------+
| 12  | 5 mTorr   | 20% O2  | 1 | 746 | 23     | 62 | 10 |        |
| 7.2 | ZnCl2     |         | 5 |     |        |    | .5 |        |
+-----+-----------+---------+---+-----+--------+----+----+--------+

# 2.2 Back Contact Processing Options

The following section was recently published in a special issue of Solar
Energy (vol. 77 (2004) p. 839).

# *Introduction* 

Due to the high work function of CdTe, ohmic contact formation is not
possible with metal films. Pseudo-ohmic contacts are, therefore,
produced by making the CdTe back surface more p-type.[^24] Thus, while
increasing the barrier height for electron flow at the back contact
interface, the resultant narrowing of the barrier allows electron
tunneling. Formation of a pseudo-ohmic contact is usually obtained by
the introduction of impurity metals at the back contact interface.
Though a number of metals have been used to produce CdTe back contacts,
including Au, Pb, Ni, Hg and Ag,[^25] Cu is almost ubiquitously
employed. CdTe itself is difficult to dope with impurity atoms,
therefore, to produce a p+-surface, a Te-rich surface is nearly always
produced during back contact processing to improve the efficiency and
extent of the impurity doping or reaction at the back contact interface.
However, this observation and the high Cu concentrations generally used,
suggest that a chemical reaction takes place at the back contact to
produce a bulk phase contact material[^26] as opposed to the concept of
a 'doped' CdTe back surface.

A number of steps are required for the successful formation of back
contacts to CdTe/CdS devices; and nearly every research group applies
their own contacting method, via different and varied empirically
derived approaches. Often the steps employed have a historical basis,
may not be necessary for successful back contact processing and may only
complicate possible industrial scale up. The procedures employed for
back contact processing of CdTe/CdS devices by most laboratories
generally incorporate the following steps; i) removal of residual
surface oxides and other contaminants on the CdTe surface, ii) formation
of a Te-rich surface to improve CdTe reactivity for contacting, iii)
application of Cu or other impurity metals, iv) formation of the back
contact, generally via annealing, and v) application of secondary
contact and device completion. Many different contacting procedures have
evolved empirically. Some may incorporate single treatments, which
accomplish more than one of the above steps or some steps may not be
required; for example, uninterrupted *in vacuo* CdTe processing is
unlikely to require the removal of surface oxides, but the basic process
sequence generally remains constant. Our approach is to begin to
understand the fundamental materials chemistry of each of the common
processing steps. With this, the goal is to develop a simple and
universally applicable process that offers good quality and stable back
contacts for CdTe/CdS for devices, irrespective of CdTe history and
properties. In this section, each of the above processing points will be
discussed, including briefly reviewing recent experiments at IEC and
some of the recent literature.

#### **Etching of CdTe**

Prior to contacting, the CdTe back surface generally must be modified,
as described above, to remove residual oxides and to form a Te-rich CdTe
surface.[^27] Most research groups generally employ a wet chemical etch
step to achieve either or both of these modifications. At an industrial
scale, due to the corrosive nature of most etchants, 'dry' techniques
are being sought. However, wet chemical etching is used in a number of
electronic technologies to achieve contaminant-free materials surfaces.
For CdTe back contact processing, wet etches allow fast treatment times
and are generally easy to use in the laboratory, requiring only small
volumes and often no heating of the solution. CdTe etchant chemicals,
however, tend to be toxic, corrosive and reactive. Common etchants
include Br~2~/methanol solutions (BM) and aqueous nitric acid/phosphoric
acid mixtures (NP). Other CdTe etchants have included, H~2~O~2~,
hydrazine, thiosulfate, acidified dichromate, citric acid, ammonia and
alkali metal hydroxides. One treatment that has had very good success at
IEC, but also highlights the hazardous nature of these treatments, is
the Br~2~-Dichrol-Hydrazine (BDH) etch.Error: Reference source not found
This treatment consists of three steps; a short etch in dilute BM to
remove residual surface oxides, immediately followed by a dip in
acidified dichromate (commercial dichrol solution) to produce a mixed
Te/TeO~2~ surface, and finally immersion in potentially explosive
hydrazine at ∼55°C to reduce surface TeO~2~ to Te. This treatment
generates a good quality, 50 nm crystalline-Te (c-Te) surface layer on
CdTe. At an industrial level, where the use corrosive chemicals may need
to be avoided, pre-contact surface treatments may be ignored or less
corrosive chemicals sought. For example, organic multi-dentate ligands,
including diaminoethane and ethylendiaminetetreaacetic acid, EDTA, has
had some success in an industrial process.[^28] The action of such
etches is thought to progress by solubilizing the Cd^2+^ ions from the
CdTe surface by complexation, and leaving a Te-rich surface layer.

A number of factors regarding wet etching during contact processing are,
however, of concern. These include; i) the behavior of residual etchant
within the grain boundaries, which is not understood in relation to
device chemistry and performance, ii) the effects of the atmosphere on
the freshly etched CdTe surface prior to application of Cu, iii) effects
of the significant changes to film and GB morphology following etching
on device performance, and iv) the irreproducibility of wet etches, due
to subtle differences in solution and substrate conditions, which may
produce inconsistent surface products and morphological effects.
Considering these points, and also the ease of industrial scale-up,
considering the safety and disposal issues, of the contacting process,
'dry' or vacuum processes to form Te-rich CdTe surfaces have also been
used.[^29]

Despite their widespread and historical use, the mechanism and dynamics
of these etches on CdTe are not well understood. A knowledge of etchant
behavior and the nature of the CdTe surface throughout the reaction,
including its reactivity towards the atmosphere and back contact metals,
will assist optimization of wet chemical treatments and contact
processing to achieve the development of stable back contacts to
CdTe/CdS devices. The development of a universal and safe wet etchant
that can be easily applied to CdTe films, independent of thickness and
history, would be advantageous for scale-up of the CdTe device
processing.

As discussed in a previous section, CdCl~2~ treatments of CdTe can,
depending on treatment conditions, produce a range of Cd and Te surface
oxides. The presence of significant oxide on the CdTe can produce an
insulating and unreactive surface, and thus prevent the formation of a
favorable back contact. If a wet chemical etch is used to produce the
Te-rich surface for contacting, then the single treatment can suffice
for both oxide removal and Te generation. However, for 'dry' depositions
of Te for contacting or in order to carry out measurements or
experiments directly on the CdTe surface, removal of the residual oxides
is required. For this, short etches in weak BM solutions, ca. 5s in
∼0.01% BM, successfully removes the oxides without significant etching
of the CdTe itself. Following etching, samples should be removed from
the atmosphere, or immediately continued to the next processing step to
minimize atmospheric oxidation of the surface.

The chemical treatments required for the formation of a Te-rich CdTe
back surface for contacting, commonly involve an oxidation step, e.g.
Br~2~ and nitric acid, of BM and NP, respectively, are oxidizing agents.
These treatments oxidize surface telluride ions, Te^2-^, to elemental
tellurium, Te^0^, and dissolve Cd^2+^ ions, which are unable to remain
in a tellurium environment, from the film. Reducing and complexing
treatments have also been applied to CdTe devices. For successful back
contacting, generally treatments of 5-20s in 0.1 - 1% BM[^30] or a ∼60s
in aqueous ∼1% HNO~3~:∼70% H~3~PO~4~ mixture (NP)Error: Reference source
not found^,^[^31]^,^[^32] are used. As NP etching progresses, the
formation of bubbles on the Te surface is generally observed after ∼20s
immersion. These bubbles are due to the formation of gaseous NO or~­~­
NO~2~ products. The time for bubbles to appear can vary, dependent on
temperature, solution concentration and the presence of surface oxides.
The acidity of the NP etch is expected to remove any tellurium oxides
formed during treatment.Error: Reference source not found Following
etching, the CdTe surface is silvery-gray and roughened, due to GB
etching, with a ∼50 -- 100 nm surface Te layer.
^Error:\ Reference\ source\ not\ found,Error:\ Reference\ source\ not\ found,Error:\ Reference\ source\ not\ found^
Because of the aggressive nature of the NP etch, this treatment can
generally only be used for etching thicker, \>∼5 μm, CdTe layers. BM
etching produces a polished CdTe surface, generally consisting of \~7-8
Å Te surface layer without significant GB etching.Error: Reference
source not found^,Error:\ Reference\ source\ not\ found^

Understanding the nature of the CdTe surface prior to, during and
following etching is critical importance to the successful optimization
and outcome of the back contacting process. We have recently reported
the use of the surface sensitive techniques VASE and GIXRD to monitor
effects of etching the CdTe surface, to clarify etch chemistry and the
nature of the CdTe surface both during and following treatment.Error:
Reference source not found Figure 18 shows the 1.5 to 4.6 eV range of
the ε~2~ vs. photon energy spectra, obtained from VASE, of 5μm
CdTe/ITO/7059 films prior to and following etching in NP and BM. ε~2~ is
the imaginary part of the complex dielectric constant and is
proportional to the absorption coefficient of the material. Therefore,
with knowledge of the electronic transitions of different materials,
peaks in the ε~2~ spectra can be directly related to materials present
within the sample.Error: Reference source not found The ε~2~ spectrum of
unetched CdTe (curve a) contains two peaks at 3.3 and 3.9 eV. These
peaks are due to the E~1~ and E~1~+∆~1~ transitions of CdTe,
respectively. The CdTe peak intensity, with respect to the 3.3 eV
transition, depends on the presence of native oxides, highlighting the
use of the non-destructive VASE technique as a research and industrial
processing diagnostic tool for fast analysis of the CdTe surface.
Following 25s NP etch, the ε~2~ spectrum now contains a single broad
peak at 2.1 eV, due to Te (curve b). The CdTe peaks are barely
detectable, indicating a high degree of Te on the CdTe surface. Within a
few minutes of etching, the Te peak was observed to grow and sharpen in
subsequent VASE scans, before finally reaching a maximum intensity, due
to crystallization of surface Te, which was confirmed with rapid GIXRD
measurements. Figure 19 shows the sequential GIXRD scans, ∼3 mins apart,
of a CdTe sample immediately following a 25s NP etch. The Te (101)
reflection at 27.6° is observed to grow, completing crystallization
after \~10 min following etching.

![](media/image24.wmf){width="4.207638888888889in"
height="3.7416666666666667in"}

[]{#__RefHeading___Toc125256023 .anchor}Figure 18. VASE ε~2~ spectra of
(a) an unetched CdTe film and CdTe films following etching in (b) NP1
for 25 sec and in (c) 0.1% BM for 10 sec.

TABLE

![](media/image25.wmf){width="4.853472222222222in"
height="4.660416666666666in"}

[]{#__RefHeading___Toc125256024 .anchor}Figure 19. Time-progressive
GIXRD patterns of Te (101) reflection, for a CdTe film immediately
following a 25 sec NP1 etch. Incident angle was 2° and each scan cycle
is ∼3 min apart.

NP Etching for \<35s results in amorphous-Te (a-Te) films that
spontaneously crystallize following removal from solution.
Crystallization time increases for shorter etches, e.g. less than 5 min
for a 35 sec etch to over 1 hr for a 15 sec etch. a-Te is known to be
unstable at room temperatureError: Reference source not found and
spontaneously crystallizes. The slower crystallization with shorter
etches can be attributed to the lesser amounts of generated a‑Te
requiring a longer time to complete molecular rearrangements. It was
found that for NP etches \>40s, crystallization occurs during etching
and a c-Te film is observed.

In contrast to NP, curve c in Figure 18 shows that, following BM
etching, only an increase the CdTe VASE ε~2~ intensity is observed. This
is due to smoothing of the surface, which produces a greater surface
sampling area and reduces scattering. Only very thin Te films are
expected, and hence, no Te peak is observed with VASE or GIXRD. Modeling
of the VASE data has indicated a 7-8 Å Te surface layer is formed, which
is consistent with literature data.[^33] From VASE measurements, BM
etching has been found to be reproducible, giving very similar surfaces
on CdTe films of differing microstructure and surface oxide amounts.
This very important result allows confidence in the nature of the
surface following BM etching.

IEC has also developed 'dry Te' or all-vapor processes for back contact
processing.Error: Reference source not
found^,Error:\ Reference\ source\ not\ found^ A Te layer of only a few
nm thickness can be deposited by vapor deposition or evaporation before
application of a Cu layer and other back contact components. These dry
processes completely avoid difficulties in handling corrosive chemicals
and contamination of the device structure. Smooth crystalline Te films
are deposited with good reproducibility and control of film thickness.
Devices with 12% efficiency have been processed using dry Te contacting
process.Error: Reference source not found However, preparation for dry
and/or high vacuum techniques can take significant time, prevention of
atmospheric oxidation of deposited layers is critical, and the scale up
of such processes may involve far greater start-up costs and
difficulties. We note, however, that a wet etch may still be required to
remove residual oxides formed during optimized CdCl~2~ treatment.

### *Atmospheric Oxidation of Te on Etched CdTe*

### Delays in contacting the devices following Te formation, and exposure to atmosphere allows the formation of oxides on the CdTe surface. These will affect reactivity of the Te layer and, hence, affect back contact formation, performance and reproducibility. VASE has been used to monitor the stability of freshly etched CdTe surfaces towards atmospheric oxidation.Error: Reference source not found Figure 20 shows the amplitudes of the 2.1 eV and 3.3 eV photon energies obtained from ε~2~ spectra of 25s NP and 60s 0.01% BM etched CdTe films, respectively, over the first 100 min following etching. These energies coincide with the Te peak and CdTe E~1~ peaks for NP and BM etched pieces, respectively, of the Figure 20 ε~2~ spectra. As Te cannot be detected following BM etching, the CdTe E~1~ peak is profiled as oxidation of the surface will result in a decrease in dielectric response and, hence, spectral intensity. A decrease in the CdTe E~1~ peak is used as a signature for the formation of a surface layer, resulting in a loss of CdTe sampling depth, and, therefore, a loss in intensity.

![](media/image26.wmf)

[]{#__RefHeading___Toc125256025 .anchor}Figure 20. Time profiles of ε~2~
from (a) 25 sec NP1 and (b) 60 sec 0.1% BM etched CdTe films. ε~2~
values were obtained at 2.1 eV and 3.3 eV, respectively.

Following NP etching, a rapid increase in intensity is observed due to
Te crystallization. Following completion of crystallization, no changes
are observed until ∼60 mins after etch, when the intensity begins to
decrease as a result of atmospheric oxidation. This oxidation continues
till around 7-8 hrs after etching. No oxidation was apparent on NP
etched CdTe films that were stored in vacuum or dry air immediately
following etching, suggesting humidity plays a significant role in
atmospheric oxidation of Te. Following BM etching, oxidation of the Te
begins almost immediately and continues for 3-6 hours. The fast
oxidation of the BM etched surface can be attributed to the Te film
being very thin and amorphous. These observations highlight the need for
cells to be contacted immediately following Te formation to minimize
oxidation of the surface.

#### **Application of Cu** 

There are several methods to apply Cu to the CdTe back surface,
including evaporation of thin Cu films onto the CdTe surface,
application of graphite paste containing Cu powder, Cu salts or
compounds or Cu-doped alloys, and dipping or spraying the surface with
Cu salt solutions. An anneal step is generally required following
contacting to force the chemical reaction between Cu and Te to
completion, to form the desired copper telluride, Cu~2-x~Te, phaseError:
Reference source not found and distribute Cu into the CdTe film. The
application of a secondary contact, to provide for lateral current
conduction, is also generally required to complete the back contact. The
order of these steps is not always critical, being dependent on the
nature of Cu deposition and simplification of the process. Sometimes
following annealing and deposition of a metal film secondary contact, a
short BM etch, which freely penetrates most metal films, is applied to
remove excess Cu from the CdTe surface and GBs.Error: Reference source
not found The presence of excess Cu at the junction and/or in the CdS
layer, distributed by GB diffusion, has been suspected as a possible
component of the instability exhibited by some CdTe/CdS devices.Error:
Reference source not found

Vacuum evaporation of high purity Cu for back contact formation of CdTe
devices offers good control of deposited metal layer thickness, which
allows for careful tuning of the amount of applied Cu to give
stoichiometric Cu~2-x~Te back contacts. The Te layer and metal secondary
contact can also be sequentially deposited during the same vacuum
process. Annealing of the back contact can also be carried out under
vacuum immediately following contact deposition, thus avoiding any
deleterious contact with the atmosphere. However, despite the control of
deposited Cu, this method delivers an amount of Cu in excess of that
required for successful contacting. High-vacuum techniques also require
significant purging and pump down times and generally only a limited
number of pieces may be processed at any given time in a laboratory
setting.

The use of graphite pastes containing a Cu source allows fast and
vacuum-free processing of back contacts, and has received much use at a
research level. The paste, containing a suitable impurity additive, is
merely applied or painted through a mask to a freshly etched CdTe
surface and the device is annealed following drying. The graphite paste
also acts as the current carrying secondary contact, but can also be
coated with metal paste to improve conductivity. Acheson electrodag
(#505-SS) is generally the graphite paste used, and often contains
resins to improve adhesion and strength of the baked graphite layer. A
number of Cu-source additives can be used, including elemental Cu
powder, simple Cu salts and compounds, and Cu-doped alloys, e.g. Cu:HgTe
and Cu: ZnTe. Care must be taken to ensure homogeneous mixing of the
paste and additives.

Methyl ethyl ketone or similar is commonly used as the paste solvent. We
have compared a range of Cu-based additives of elemental Cu powder,
simple Cu^+^ and Cu^2+^ salts, and Cu^2+^ complexes with simple chelate
ligands. Table IX lists the JV characteristics of CdTe/CdS devices
contacted with graphite pastes containing these additives. An indicator
for series resistance in JV behavior is the slope, dV/dJ at V~oc~, which
is represented as R~oc~. For high performance devices, R~oc~ is
typically less than 2 mS/cm^2^, and devices having poor contact behavior
or high contact resistance exhibit R~oc~ in excess of 10 mS/cm^2^. In
Table IX, we list R~oc~ and qualitative JV curve characteristics,
including forward bias curvature (rollover), crossover between the light
and dark curves (crossover), and forward-reverse JV retrace hysteresis.
Rollover is a manifestation of a back-contact barrier as demonstrated in
other work.Error: Reference source not found Crossover between light and
dark curves, or loss of superposition, is commonly attributed to
photoconductivity in the device. The occurrence of low-frequency (0.01-1
Hz) hysteresis can be due to either deep traps states in CdTe or
additional capacitance from an insulating surface layer. GIXRD
measurements have shown residual oxide phases present at the back
surface on devices that exhibit significant retrace hysteresis. In Table
IX, pastes containing Cu powder, Cu^0^, or Cu^+^ salt additives produce
the best devices with the lowest R~oc~ and the least amount of crossover
or hysteresis. Simple dehydrated Cu^2+^ salts can produce reasonable
back contacts, but tend to yield lower performance than Cu^+^ salts.
Cu^2+^ chelate complexes do not produce good contacts due to the
stability of these molecules preventing reaction of Cu ions with Te.

[]{#__RefHeading___Toc125256151 .anchor}Table IX. J-V characteristics
for CdTe/CdS devices contacted with graphite paste back contacts
containing the listed Cu additives. The strength of the effects are
indicated by Y = yes, W = weak and N = no.

+-----------+--------------+------+---------+-----+-------+----------+
| ########  |              | Cu   | R~oc~   | #   | C     | Hy       |
| Cu source |              | S    |         | ### | ross- | steresis |
|           |              | tate | (mS     | ### |       |          |
|           |              |      | /cm^2^) |  Ro | over  |          |
|           |              |      |         | ll- |       |          |
|           |              |      |         |     |       |          |
|           |              |      |         | o   |       |          |
|           |              |      |         | ver |       |          |
+-----------+--------------+------+---------+-----+-------+----------+
| > none    |              | \-   | 34.8    | W   | Y     | W        |
+-----------+--------------+------+---------+-----+-------+----------+
| > Cu      | Cu powder    | 0    | 13.6    | N   | Y     | N        |
| > salts   |              |      |         |     |       |          |
+-----------+--------------+------+---------+-----+-------+----------+
|           | CuCl         | 1    | 13.1    | N   | W     | N        |
+-----------+--------------+------+---------+-----+-------+----------+
|           | CuI          | 1    | 11.2    | N   | W     | N        |
+-----------+--------------+------+---------+-----+-------+----------+
|           | CuSCN        | 1    | 17.7    | N   | Y     | N        |
+-----------+--------------+------+---------+-----+-------+----------+
|           | CuCN         | 1    | 30.1    | Y   | Y     | W        |
+-----------+--------------+------+---------+-----+-------+----------+
|           | Cu(acetate)  | 2    | 24.1    | N   | Y     | N        |
+-----------+--------------+------+---------+-----+-------+----------+
| > Cu      | Cu(oxalate)  | 2    | 21.4    | N   | Y     | W        |
| >         |              |      |         |     |       |          |
| complexes |              |      |         |     |       |          |
+-----------+--------------+------+---------+-----+-------+----------+
|           | Cu(maleate)  | 2    | 63.7    | N   | N     | N        |
+-----------+--------------+------+---------+-----+-------+----------+
|           | C            | 2    | 25.2    | N   | Y     | N        |
|           | u(succinate) |      |         |     |       |          |
+-----------+--------------+------+---------+-----+-------+----------+
|           | C            | 2    | 35.2    | N   | Y     | N        |
|           | u(phthalate) |      |         |     |       |          |
+-----------+--------------+------+---------+-----+-------+----------+
|           | Cu(8         | 2    | 34.8    | N   | Y     | N        |
|           | -quinolinol) |      |         |     |       |          |
+-----------+--------------+------+---------+-----+-------+----------+
|           | Cu(EDTA)     | 2    | 85.8    | N   | Y     | N        |
+-----------+--------------+------+---------+-----+-------+----------+

While the concentration of Cu in the paste can be well controlled, an
excess of Cu must be delivered to the device to ensure surface reaction
and to dope the CdTe p-type, though only a limited amount of Cu will
initially react with the Te-rich CdTe surface. Thermal treatment, such
as experienced during contact annealing and accelerated life testing, of
completed CdTe devices is likely to diffuse excess Cu from the paste
into the CdTe.Error: Reference source not found Scale-up to industry may
be difficult, though screen-printing, spin coating, spray or simple
painting approaches have been demonstrated. A similar approach has been
reported at an industrial scale, where a clay-based dielectric paste
containing Cu salt additivesError: Reference source not found is applied
to the Te-rich CdTe surfaces for contacting. To complete devices,
however, the paste had to be removed and conducting contacts applied.

Another method to deliver Cu species is via application of Cu salt
solutions, by dipping or spraying onto the CdTe surface, or by
evaporation.Error: Reference source not found Dipping allows a small
amount of Cu to become incorporated in the device, however, and similar
to the solution CdCl~2~ treatments, complete and uniform coverage of the
surface cannot be guaranteed as the sample dries, resulting in a loss of
control of the amount of Cu applied. Spray or evaporation methods allow
more uniform delivery of precise quantities of Cu species to an area of
substrate. Based on the work with Cu-Te metal contacts, devices with
Cu~2~Te, with Cu in the +1 valence state, Cu^+^, yield the highest
efficiency. This also seems to extend to the optimal valence state for
Cu salts, as shown in Figure 21. In the figure, devices were fabricated
by spraying identical quantities of methanol solutions of CuCl and
CuCl~2~ onto dry etched CdTe, heating at 200°C for 20 minutes, then
applying graphite contacts. Devices prepared with Cu^+^ salt exhibit 50
mV higher V~oc~ and higher FF than devices prepared with Cu^2+^ salt.
Furthermore, no crossover was found between light and dark curves for
devices prepared with Cu^+^, indicating superposition of the dark diode
characteristic. GIXRD analysis of the samples of Figure 21 show Cu~2~Te
phase for the sample prepared with CuCl, Cu^+^, and CuTe phase for the
sample prepared with CuCl~2~, Cu^2+^. Thus, solutions of Cu^+^ salts
seem preferable, though solutions containing simple dehydrated Cu^2+^
salts can produce reasonable devices. For application of Cu^+^ salts,
dry non-aqueous solvents must be used as Cu^+^ ions are generally
unstable in aqueous conditions. After delivery of the Cu salt, the
samples require annealing to promote reaction with Te, which can be
carried out before or after application of the secondary contact.

![](media/image27.png){width="4.697916666666667in"
height="5.842361111111111in"}

[]{#__RefHeading___Toc125256026 .anchor}Figure 21. Light and dark JV
curves for CdTe/CdS devices processed with methanol solutions containing
CuCl (solid) and CuCl~2~ (dotted).

***Other Back Contacts***

A number of other, "Cu-free", back contact materials, deposited by
various methods, have been evaluated for CdTe devices e.g. including
vacuum evaporated ZnTe and Sb~2~Te~3~, and solution deposited metals and
NiTe~2.Error:\ Reference\ source\ not\ found~ Generally, these contacts
have not been superior to Cu-based contacts, or not as simple to process
as some of the Cu-based options. The unexpected Cu contamination in some
"Cu-free" cell processes may also have led to reported high device
efficiencies.[^34] The success of Cu-based contacts, the simplicity of
Cu application, and the difficulty in avoiding copper contamination in
CdTe, CdS and back contacts, indicate that Cu containing contacts are
yet a worthwhile R&D challenge for future successful device and module
processing. However, this will require thorough understanding and
control of the chemistry of Cu throughout the device structure, both
during processing and post-fabrication, operational stresses.

***Back Contact Anneal***

Annealing of devices following Cu application is almost always required
to produce the desired Cu~2-x~Te back contact.Error: Reference source
not found Most back contact anneals are carried out at 150 -- 250°C for
times of ∼20-60 mins. Annealing should always be carried out in a dry,
inert atmosphere or under vacuum to avoid oxidation. Thin Cu films,
Cu^+^ ions and Te are susceptible to reaction with O~2~ and water vapor,
producing stable and insulating oxides.

The reaction between Cu metal and elemental Te is spontaneous, but
heating is required to ensure this reaction goes to completion, or to
force the reaction of Cu ions/salts with Te. Previously we showed the
formation of Cu~2-x~Te on devices with back contacts formed by
deposition and annealing of stoichiometric Cu and Te layers on
CdTe.Error: Reference source not found Interestingly, the transformation
of Cu~2-x~Te to CuTe with device stressing has been observed, linking
chemical changes in the back contact with device degradation.Error:
Reference source not found Literature on the electrical properties of
the Cu-Te compounds is sparse; and we speculate that the difference in
electrical properties of CuTe and Cu~2-x~Te account for the increased
R~oc~ and forward bias rollover observed for stressed devices. In
comparative studies we have found that the CuTe phase dominates contacts
formed by application of Cu powder/graphite pastes to NP and BM etched
CdTe surfaces (Figure 22). The difference in phases observed between the
paste contact and stoichiometrically deposited metallic films is
accounted for by excess surface Te and slow Cu delivery from the
graphite paste. This observation highlights that CuTe may be a
reasonable back contact, though likely poorer than Cu~2-x~Te.

![](media/image28.jpeg){width="4.8590277777777775in"
height="3.2847222222222223in"}

[]{#__RefHeading___Toc125256027 .anchor}Figure 22. GIXRD plot, at 2°
incidence, of a 60s NP etched CdTe film obtained following removal of a
Cu powder/graphite paste contact.

Significant diffusion of Cu throughout the cell structure occurs during
the back contact anneal, which leads to an increase in accumulated Cu at
the junction/CdS region of the device.Error: Reference source not found
In addition, untreated CdTe/CdS structures, without purposefully added
Cu, already contain significant Cu levels in the CdTe and CdS
layers.Error: Reference source not found With contacting and subsequent
thermal stressing, the level of Cu increases in both CdTe and CdS
layers,[^35] which reduces junction quality, manifested by a loss in
V~oc~ and FF. We have carried out controlled experiments in which Cu was
introduced to the device structure as a thin metal film between the CdS
and CdTe and also between the CdS and the TCO. These devices exhibited
markedly lower V~oc~ and FF than control devices, with the CdS
exhibiting photoconductivity which was evident in short wavelength
QE.[^36]

***Secondary Contacts and Device Completion***

The secondary contact is the robust current-carrying contact. The most
common secondary contacts are metal films or graphite paste. For back
contacts produced from Cu-containing pastes, the graphite layer acts as
both the Cu source and secondary contact. The secondary contact also
protects the back contact from mechanical abrasion and from the
atmosphere. Graphite paste, for example, will immediately seal the
surface, preventing contact with the atmosphere, and should be applied
immediately following etching or application of Cu. Following annealing,
the dried graphite paste will be somewhat permeable to the atmosphere,
however, both the thickness (\~ 100 μm) and the gettering properties of
the graphite may indeed provide some additional protection to the back
contact from O~2~ and water vapor over contacts made with thin metal
films. The secondary contacts have been shown to influence device
performance and stability.[^37]

Completion of devices requires isolation of the cells by scribing and
metallization of the front contact. The secondary contacts should be
isolated, by scribing, to prevent current collection outside the back
contact area. The front contact is generally completed by application of
In or other metal solders or metal pastes/paints to exposed CdS or TCO.

***Contact Stability***

Thermal stressing in air of devices contacted with Cu-doped graphite has
shown increased performance degradation compared to devices thermally
stressed in dry inert atmospheres, though no difference in the rate of
Cu diffusion through the devices was observed.[^38] This reinforces the
concept that chemistry changes in the back contact region primarily
dominate device stability and that it is critical to protect the back
contact from the atmosphere during processing and stress. While modules
in the field will be encapsulated from the atmosphere, effects of
exposure to the atmosphere during processing or effects on device
performance if encapsulation failure occurs, need to be understood.

We have recently shown Cu-based contacts that are less susceptible to
atmospheric effects. A series of devices processed at IEC and other
sources were stressed for an extensive period of time in the dark at
80°C in atmospheres of varying humidity levels. Devices contacted with
Cu/Au films deposited on a thick, ∼100 nm, Te film, produced by a BDH
etching followed by Te evaporation, showed significant chemistry
occurring during stress, e.g. formation of TeO~2~ at low humidity and
hydroxides/hydrated oxide phases at high humidity. However, very little
change in device performance was noted. Other devices, processed with
very thin Te layers, while exhibiting good initial performance (\>10%),
showed significant degradation after 80°C thermal stress. These results
suggest that thick Te may make back contacts more robust towards
chemical changes and atmospheric oxidation. Due to the chemical affinity
of Te for Cu, a thick Te film is also expected to attenuate Cu diffusion
through the device by gettering Cu at the back of the device and thus
maintaining the favorable back contact for a longer period. This was
also confirmed by stress testing of devices with varying back contact Te
thicknesses, processed by NP etches of different times and completed
with graphite paste containing 6% Cu powder. Initial efficiencies of all
devices were similar, however, after stressing for ∼50 days at 80°C in
the dark, the devices with thinner Te, or shorter etch times, exhibited
back contact degradation as evidenced increased R~oc~, while the devices
with thicker Te contacts showed almost no loss of performance. Thick
Te-based contacts contribute to device robustness and may lengthen
device lifetime.

***Surface Chemistry of Aniline-based Etching***

The following section was published in the proceedings of the Spring MRS
Meeting, San Francisco, CA, March 2005.

# 

# *Introduction*

Surface preparation of CdTe remains a critical aspect of CdTe/CdS
photovoltaic device processing. It is generally accepted that treatment
of the surface prior to back contacting is carried out to remove
contaminants and to produce a Te-rich layer to allow easier reaction
with metal impurities, generally Cu, added to improve back contact
properties.Error: Reference source not found^,^[^39] CdTe treatments
generally involve oxidizing wet chemical etches, for example
Br~2~/methanol (BM) and HNO~3~/H~3~PO~4~ (NP), but these often tend to
be reactive, corrosive and toxic, and care is required to prevent
over-etching of the CdTe surface. Recently, a new surface treatment was
reported by Roussillon et al.,[^40] where CdTe/CdS structures where
treated under illumination in red wine and in aqueous solutions based on
aniline (see Figure 14a for structure). Following contacting, devices
treated with these solutions showed significant improvements in
performance, exceeding 11% conversion efficiency, compared to devices
that had not received treatment. It was proposed that the observed
improvements in initial device performance were due to clogging of
pinholes and neutralization of electrical micro-nonuniformities through
the adsorption of charged colloids. In the case of the aniline-based
treatment, the formation of charged polyaniline colloids was expected
via electropolymerization of aniline on the illuminated CdTe surface.

In this section, the chemistry of aniline-based treatments of CdTe is
investigated. Particular emphasis is placed on evaluating the nature of
the treated surface, identifying and understanding the chemical
mechanisms involved and optimizing the treatment conditions for device
processing. Device results highlight this treatment to be very promising
for processing of good quality CdTe/CdS devices. The toxicity of
aniline, however, is a concern and, with understanding of the chemical
mechanisms involved, possible substitutes are being sought.

***Experimental Details***

Standard aqueous aniline baths are based on those of Roussillon et
al.,Error: Reference source not found containing 0.1 M aniline, 0.01 M
*p*-toluenesulfonic acid (p-TSA) and 1 M NaCl electrolyte at pH∼6.2. All
baths were freshly prepared unless otherwise stated. Samples consisted
of ∼5 μm thick CdTe films vapor transport deposited on SnO~2~/glass
coated with ∼50 nm chemical solution deposited CdS films. Some CdTe
films received vapor-CdCl~2~ treatment at ∼410°C for 20 min.
Aniline-treatments were carried out by illuminating CdTe/CdS samples
immersed in the aniline bath in a Pyrex beaker with a 100 W light bulb.
The samples were illuminated either through the glass side of the pieces
or directly on the CdTe. Devices were processed, following aniline
treatment, by applying a Cu-based back contact, completing with a
graphite paste secondary contact and annealing for 15 min at 200°C.

Variable angle scanning ellipsometry (VASE) measurements were carried
out using a J.A. Woollam rotating analyzer ellipsometer equipped with an
auto-retarder. Spectra were recorded at 75° incident angles. For
discussion of the theory of this measurement, see reference Error:
Reference source not found. Glancing incidence x-ray diffraction (GIXRD)
measurements were carried out using a Rigaku D/Max 2100 x-ray
diffractometer in asymmetric mode with parallel beam geometry at 40 kV
CuK~α~. Measurements were obtained at 1° incidence angle. Atomic force
microscopy (AFM) was carried out using a Digital Instruments Dimension
3100 microscope in tapping mode. Current Voltage (J-V) curves were
measured using an Oriel Xenon solar simulator at AM1.5 and 25°C.

***Results and Discussion***

As observed by Roussillon et al.,Error: Reference source not found
following a successful treatment, the CdTe surface changes to a light
gray color. Sometimes, following certain treatment conditions, an
organic film can be observed on the CdTe surface. The nature of the
surface of the treated samples was investigated using VASE and GIXRD.
Figures 23b and 23c show the VASE ε~2~ vs. photon energy plots and GIXRD
patterns, respectively, of CdTe/CdS samples following 1 hr and 5.5 hr
treatments in standard aniline baths with illumination on the glass. The
VASE spectrum of an untreated sample is also presented, which exhibits
the two characteristics CdTe E~1~ and E~1~+∆~1~ transition peaks at 3.3
and 3.9 eV, respectively.Error: Reference source not found Following
treatment, the VASE spectra now contain only a single broad peak at ∼2
eV, similar to those obtained following NP etching of CdTe,Error:
Reference source not found that produces a crystalline Te-rich surface.
The formation of crystalline Te was confirmed by GIXRD, which shows peak
at 27.6°, assigned to the Te (101) reflection. The CdS reflection in
Figure 23c originates from areas exposed at the edge of the piece. These
data confirm that the aniline-based treatments produce a crystalline Te
surface, similar to some oxidizing etches. GIXRD peak analysis indicates
that a ∼4.5x increase in generated Te between the 5.5 hr and 1 hr
treated samples, suggesting the rate of Te formation is linear with
time. Modeling of the GIXRD data indicated a ∼10 nm surface Te film is
formed during the 5.5 hr treatment. The presence of a Te-rich surface
will improve back contact properties, allowing an easier formation of
the Cu~2-x~Te during contact processing, and accounts for the
differences observed between treated and non-treated devices.Error:
Reference source not found The GIXRD pattern of a CdTe sample that had
received a 5.5 hr treatment shows that more Te has been generated on the
CdTe surface compared to the 1 hr treatments. The VASE spectrum of this
piece shows a similar intensity to the 1 hr treated piece, despite a
greater amount of Te being generated. A dark organic film, most likely
polyaniline, was also visible on the surface of the 5.5 hr treated
piece. While a stronger Te peak is expected the VASE spectral intensity
is decreased through light scattering by the organic film. AFM
measurements showed significant changes to the film surface following
treatment, with formation of smaller grained Te on the surface of
successfully treated films. Organic species were also often detected by
AFM on the surface of treated CdTe.

![](media/image29.png){width="2.39251968503937in"
height="2.238976377952756in"}![](media/image30.png){width="2.8598425196850394in"
height="2.2409448818897637in"}![](media/image31.png){width="0.9519685039370078in"
height="1.6311023622047245in"}

[]{#__RefHeading___Toc125256028 .anchor}Figure 23. (a) Structure of
aniline, and (b) VASE and (c) GIXRD plots of CdTe following treatment in
standard aniline-based baths for 1 hr and 5.5 hr with illumination on
the glass. The VASE spectrum of non-treated CdTe/CdS is shown for
comparison.

To understand the chemical mechanism involved, the effects of varying
bath composition and treatment conditions were monitored. The presence
of aniline, p-TSA and NaCl, with illumination, was found to be necessary
for the etching of CdTe to occur. Increasing aniline concentration had
no effect on the rate of the surface reaction, though halving the
aniline concentration stopped the reaction. Increasing the concentration
of p-TSA also prevented the surface reaction from occurring, suggesting
the protonated form of aniline is unreactive to CdTe. This was confirmed
by preparing baths based on aniline hydrochloride, which had no effect
on CdTe when treated under illumination. The protonated form of aniline
is known to be more difficult to oxidize or polymerize.[^41] The p-TSA
is, therefore, likely only required to improve aniline solubility and
was successfully substituted with a range of other organic acids,
indicating the species itself is not critical to the surface reaction.
Increasing the NaCl concentration enhanced the rate of reaction and
resulted in the formation of adsorbed polymer on the sample surface,
while no reaction occurred in the absence of the electrolyte. Adding KCl
showed similar behavior to NaCl; however, adding NaBr or NaI
electrolytes significantly attenuated the reaction. Removing O~2~ from
the bath, by Ar(g) purge, and from the CdTe surface, by a short anneal
in Ar(g), resulted in no surface reaction. Treatments with the same
solution following an O~2~(g) purge resulted in significant reaction of
the CdTe, including the visible adsorption of an organic film.

CdTe/CdS structures that had not received CdCl~2~ treatments reacted
similarly with the aniline-based bath, though the reaction proceeded at
a slightly slower rate. Similar Te levels were obtained following ∼90
min treatment for non-CdCl~2~ treated pieces. The differences compared
to the CdCl~2~-treated samples may be due to morphological effects or
lower conductivity of the non-treated films. Different substrates;
CdTe/SnO~2~/glass (no CdS) and CdTe/glass (no CdS or TCO), were also
tested. In each case, a crystalline Te surface was produced, indicating
that only the CdTe layer of the structures is involved in the bath
reaction. Treatment of glass slides in aniline baths with illumination
resulted in the adsorption of an organic film on the glass surface,
suggesting that aniline can degrade in light and that polymerization of
aniline is not necessarily involved in the CdTe surface reaction.

Treatments carried out in the dark resulted in no surface reaction and
no change to the VASE spectra. However, VASE measurements of samples
treated under ambient laboratory lighting indicated subtle changes to
the CdTe surface, similar to the initial plots in Figure 24, with a
decrease in the intensity of the CdTe 3.9 eV peak. This may be related
to adsorption of aniline on the CdTe surface, as similar VASE features
could be modeled for a system with a thin organic film on CdTe. The
absence of this effect with dark treatments suggests that the adsorption
of aniline to CdTe is photo-initiated. Orientation of illumination
affected the reaction, with direct illumination of the CdTe producing
slightly faster rate of treatment compared to illumination on the glass.
Areas where the illuminated surface is shadowed, for example from the
clip holding the sample in solution, no reaction occurs. This was
confirmed by carrying out a treatment with a substrate, which had a
small cross pattern of tape placed on the glass. Following treatment
with illumination on the glass, a pattern of unreacted CdTe in the shape
of the taped pattern was observed on the film surface. VASE confirmed
that Te was generated on the CdTe only over areas outside the taped
pattern. Ensuring consistent illumination of the sample is required to
obtain uniform treatment of the whole CdTe surface. Treatments carried
out in the dark at 50°C showed no reaction, indicating that warming of
the bath by the illuminating bulb does not affect the treatment.

Figure 24 shows VASE spectra of non-CdCl~2~ treated CdTe obtained at
various times during aniline etching with illumination on the glass.
During the initial stages, effects of aniline adsorption are observed.
After ∼60-90 min, the Te peak is clearly forming, and continues to
increase in intensity reaching a maximum level after \>400 min. At
longer times VASE showed little change to the surface, though GIXRD
measurements indicate that Te continues to be generated over a number of
hours. These observations indicate that Te is non-reactive towards the
bath, which was confirmed by treatment of evaporated Te films. In
contrast, oxidizing etches rapidly react with the freshly generated Te
and, hence, these treatments are often non-reproducible.Error: Reference
source not found While the aniline treatment may be slower compared to
other etches, stability of the generated Te will help to avoid
over-treatment of the CdTe surface and produces consistent and
reproducible surfaces. From this list of observations, the requirements
for successful treatment include the presence of aniline, Cl^-^ ions,
acid, dissolved O~2~ and consistent illumination. The nature of the CdTe
film and substrate structure are, however, not critical to the reaction.
Therefore, the substrate may be considered as an immobilized colloidal
solution, where, with illumination, generated carriers will be available
at the grain surface for reaction. The proposed mechanism for aniline
treatment of CdTe, shown as a schematic in Figure 25, is similar to that
of the photocatalytic degradation of organic species in aqueous
semiconductor colloid solutions, most commonly TiO~2~.[^42] Initially,
photo-assisted adsorption of aniline on the CdTe surface occurs. With
time, the adsorbed aniline is oxidized by the generated holes to
polyaniline or to complete mineralization to form CO~2~(g). The presence
of certain anions is known to affect the oxidation of aniline and
similar molecules. For example, the presence of Cl^-^ salts has been
shown to decrease the oxidation potential of aniline, therefore, making
it easier to oxidize,Error: Reference source not found and would allow
the etch reaction to occur at a faster rate. This effect may be due to
destabilization of the aniline structure by complexation with the Cl^-^
ions, and increasing the reactivity of aniline. Complementing the
oxidation step is the reduction of dissolved O~2~ by conduction band
electrons. H~2~O~2~, O~2~^-^ or hydroxyl radicals have been proposed as
products of O~2~ reduction with illumination of TiO~2~
suspensions,Error: Reference source not found and are the likely active
agents for the removal of organics during photocatalytic treatment of
wastewater with colloidal TiO~2~. We propose that in this system, these
species oxidize the CdTe surface to form the observed crystalline Te. As
the surface becomes saturated with Te, the reaction ceases.

![](media/image32.png){width="2.790944881889764in"
height="2.0507874015748033in"}

[]{#__RefHeading___Toc125256029 .anchor}Figure 24. VASE spectra of
non-CdCl~2~ treated CdTe recorded at various times during etching in
standard aniline-base solution with illumination on the glass.

![](media/image33.png){width="2.4901574803149606in"
height="2.0838582677165354in"}

[]{#__RefHeading___Toc125256030 .anchor}Figure 25. Schematic of proposed
mechanism for illuminated aqueous aniline treatment of CdTe.

The toxicity of aniline is a serious concern for the widespread
application of this treatment. Understanding of the chemical mechanism
involved will assist with the search for a less toxic substitute.
Possible alternatives require a number of criteria to be met, including;
low toxicity, safe and easy handling, be reasonably soluble in water,
have an oxidation potential similar to aniline, and oxidation products
must be non-reactive towards CdTe and Te. The use of aniline to treat
CdTe is successful as its oxidation results in the formation of either
unreactive polyaniline or complete mineralization to CO~2~. The less
toxic potassium ferrocyanide, K~4~Fe(CN)~6~, which meets most of the
above criteria, was tested as a possible substitute and was found to
exhibit activity towards CdTe under illumination. As with aniline, no
reaction was observed in the dark. However, the product of oxidation,
Fe(CN)~6~^3‑^(aq), reacts with CdTe and Te to produce surface oxides of
these species,[^43] which are deleterious to back contact formation and
performance. Recently, two other possible substitutes of aniline had
exhibited promising behavior during photo-treatment of CdTe. Treatments
in solutions of 1-napthylamine and 8-hydroxyquinoline (Figure 26a and b,
respectively) under illumination resulted in uniform and consistent
etching of CdTe, However, it was found that during treatment, the
temperature of the solution was rising higher than expected, to ∼45°C.
At this temperature, solutions of just p-TSA and NaCl also successfully
etch CdTe. Controlling solution temperature to ∼20°C by carrying out the
reaction in a jacketed beaker resulted in no etching of CdTe by NaCl +
p-TSA, 1-napthylamine or 8-hydroxyquinoline solutions, confirming the
observed action on CdTe was due to the acid and salt mixture at elevated
temperature. Temperature-controlled aniline solutions still successfully
etch CdTe as expected.

[]{#__RefHeading___Toc125256031 .anchor}Figure 26. Structures of (a)
1-naphthylamine and (b) 8-hydroxyquinoline

Figure 27 shows plots of the J-V parameters of devices, which received
aniline treatments over various times with illumination directly on the
CdTe layer. Plotted for comparison are the J-V data for cells processed
with a 60 min aniline treatment with illumination on the glass and 10
sec etching in 0.05% BM. The data indicate that very good device
performance can be obtained with the aniline etch, with the best devices
receiving 30 and 60 min treatments with light on the CdTe and glass,
respectively. These devices exhibit V~oc~∼800 mV, J~sc~∼23 mA/cm^-2^,
FF\>65% and eff∼12%. The similarity of these two devices suggests that
similar surfaces are obtained with these two treatments. At longer
treatment times, device performance decreases due to increasing series
resistance. After the 5 hr treatment, a decrease of V~oc~ to 770 mV was
also observed. In comparison the BM etched sample showed comparable
performance, but exhibited higher series resistance compared to the best
aniline etched devices. Despite the slow reaction of the aniline
treatment and stability of the generated Te, the best devices are
obtained after only relatively short treatment times. This indicates
that the treatment may also affect the CdTe grain boundaries, though the
effects are not as harsh or as rapid as can occur during over-treatment
with oxidizing etches.Error: Reference source not found

![](media/image34.png){width="3.3173228346456693in"
height="2.2838582677165356in"}![](media/image35.png){width="3.16259842519685in"
height="2.2736220472440944in"}

[]{#__RefHeading___Toc125256032 .anchor}Figure 27. Plots of J-V
parameters vs. treatment time for devices processed with the aqueous
aniline treatment with illumination either directly on the CdTe ( and
) or on the sample glass (). Results of devices processed with 10 sec
etching in 0.05% BM () are shown for comparison. All devices were
completed with Cu-containing back contacts.

2.3 Bifacial Analysis of Devices with Transparent ZnTe:Cu Back Contacts

***ZnTe:Cu Deposition and Bifacial Device Performance***

We have developed a semi-transparent back contact using Cu-doped ZnTe.
Development of ZnTe: Cu contacts[^44]^,^[^45] has been motivated by the
high p-type conductivity of the ZnTe and its use as a source of Cu,
leading to high FF. This type of contact has four potential
applications: as a more ohmic and stable contact to CdTe; as an
alternative controlled source for copper doping of CdTe; as a tool
allowing bifacial characterization of transport and junction behavior;
and as a transparent interconnect layer for the tandem polycrystalline
solar cell.

With a transparent back contact, junction and transport properties can
be determined by applying bifacial characterization techniques.[^46] For
front illumination, most of the light is absorbed in the depletion
region and back junction is in dark. In contrast, for back illumination,
most of the light is absorbed in the field free region and minority
carriers must travel a much greater distance to be collected at the
front junction. A bifacial device provides a tool to study photocurrent
collection behavior previously unavailable with front illumination. A
preliminary report of this work has been presented elsewhere.[^47]

Semi-transparent Cu-doped ZnTe films were made by galvanic deposition on
CdTe and SnO~2~ coated glass substrates.Error: Reference source not
found This method offers excellent control over thin film properties.
Process conditions that were investigated included temperature, chemical
concentration of compounds, pH and deposition time. The anode was Zn
foil and the cathode was either SnO~2~ coated glass or a
glass/SnO~2~/CdS/CdTe substrate. Figure 28 shows the cathodic deposition
setup.

![](media/image36.png)

[]{#__RefHeading___Toc125256033 .anchor}Figure 28. Galvanic deposition
setup used for growing ZnTe: Cu films

Two chemical pathways were pursued in this study. The electrolytes
evaluated as the source of Zn and Cu were either chloride (ZnCl~2~,
CuCl~2~) or sulphate (ZnSO~4~, CuSO~4~) based. The sulphate-based films
had better transparency and resulted in devices with more repeatable JV
curves and lower retrace hysteresis. Hence, all the films reported here
were made using ZnSO~4~ and CuSO~4~ as primary sources for Zn and Cu. Te
was obtained from TeO~2~. The depositions were done at T=68°C with
solution pH=3 and source concentrations of 0.1M ZnSO~4~, 0.001M, TeO~2~
and 0.0001M CuSO~4~. The chemical reaction involved in formation of this
film can be described as

A cathodic current of 2.6 mA was measured during film deposition,
allowing determination of the film thickness, since there are 6
electrons per mole of ZnTe.[^48] We estimate these ZnTe films to be 450
Å for deposition time of 1.5 minutes. Films were evaluated using x-ray
diffraction. The primary difficulty encountered during these
measurements was the extreme thinness of the film and the roughness of
the CdTe substrate. On the SnO~2~ coated glass, substrates correlation
between deposition time and thickness was observed, and the peak
intensity was proportional to film thickness. The thicker films
indicated the presence of cubic phase (111) ZnTe:Cu. A trace of CuTe was
observed in films with the highest Cu concentration.

## 

Copper is commonly used to provide an ohmic CdTe contact as well as a
CdTe dopant source[^49] even though it has been implicated in device
degradation.[^50] In these films, the free Cu concentration was
controlled using triethanolamine (TEA), which acts as a complexing
agent. TEA reduces the level of free Cu in solution, which reduces the
amount of deposited Cu in the film, which increases the film
transparency. Figure 29 shows the normalized transmission obtained using
different TEA concentration ranging from none to 20 drops, which
corresponds to \~1 cc and gives a Cu^+2^ activity of 10^-8^ M based on
half-cell measurements. Films without TEA had very low transmission.
There was significant improvement in transmission with 5 drops, but
little difference between 10 and 20 drops of TEA. Thus, the addition of
TEA increased the transmission at 800 nm from 60% to 85%.

![](media/image37.wmf){width="3.125in" height="3.1493055555555554in"}

[]{#__RefHeading___Toc125256034 .anchor}Figure 29. Optical transmission
of glass/SnO~2~/ZnTe:Cu layers as a function of TEA concentration.

ZnTe:Cu films were grown on glass/SnO~2~/CdS/CdTe substrates. The CdTe
was 5 µm thick and was deposited at 550°C by vapor transport (VT) at the
IEC. The CdTe surface was first treated by one of three processes to
remove any oxide present and create a Te rich surface.[^51] The 3 wet
chemical surface treatments include: the 3 step BDH process
(Bromine-methanol, then Dichromate, then Hydrazine); anilene; or
Br-methanol. For the devices whose results are presented here, the
ZnTe:Cu films were grown for 1.5 minutes with 20 drops of TEA in the
solution. Devices without TEA had significant JV hysteresis and retrace
instability consistent with too much Cu. Sputtered ITO and evaporated
Ni/Al grids were used as secondary back contacts.

Table X lists the device parameters for different CdTe surface
treatments for devices from VT149 and VT178. The J~sc~ and V~oc~ are
much lower for back illumination due to reduced carrier collection. In
general, ZnTe:Cu contacts typically produce devices with similar or
better frontwall performance as compared to standard metal contacts as
shown for VT149 pieces, indicating that ZnTe:Cu has equivalent
properties in terms of forming the Cu~2~Te layer for a low resistance
back contact and doping the bulk CdTe for high V~oc~.

[]{#__RefHeading___Toc125256152 .anchor}Table X. Device results for
devices from 2 VT runs made with ZnTe:Cu contact for frontwall or
backwall light with BDH, anilene, or Br-Methanol surface treatment.
Results with standard opaque contact also shown in italics for VT149.

+------------------+----------+---------+------+----------+----+----+
| **Contact        | **CdTe** | **      | *    | #        | ** | *  |
| (Sample#)**      |          | Light** | *V~o | ## J~sc~ | FF | *E |
|                  | **S      |         | c~** |          | ** | ff |
|                  | urface** | **dire  |      | **(mA/   |    | ** |
|                  |          | ction** | **(m | cm^2^)** | *  |    |
|                  | **tre    |         | V)** |          | *( | *  |
|                  | atment** |         |      |          | %) | *( |
|                  |          |         |      |          | ** | %) |
|                  |          |         |      |          |    | ** |
+------------------+----------+---------+------+----------+----+----+
| ZnTe (VT149.4)   | BDH      | Front   | 822  | 23.1     | 68 | 13 |
|                  |          |         |      |          |    | .0 |
|                  |          | Back    | 661  | 0.6      | 66 |    |
|                  |          |         |      |          |    | 0. |
|                  |          |         |      |          |    | 26 |
+------------------+----------+---------+------+----------+----+----+
| *Cu/Ni           | *BDH*    | *Front* | *    | *24.5*   | *6 | *1 |
| (VT149.2)*       |          |         | 842* |          | 6* | 3. |
|                  |          |         |      |          |    | 6* |
+------------------+----------+---------+------+----------+----+----+
| ZnTe (VT 178.5)  | Anilene  | Front   | 814  | 22.2     | 68 | 12 |
|                  |          |         |      |          |    | .3 |
|                  |          | Back    | 677  | 1.2      | 70 |    |
|                  |          |         |      |          |    | 0  |
|                  |          |         |      |          |    | .5 |
+------------------+----------+---------+------+----------+----+----+
| ZnTe (VT178.2)   | Br-Meth  | Front   | 804  | 22.4     | 67 | 12 |
|                  |          |         |      |          |    | .1 |
|                  |          | Back    | 672  | 1.48     | 67 |    |
|                  |          |         |      |          |    | 0  |
|                  |          |         |      |          |    | .7 |
+------------------+----------+---------+------+----------+----+----+

The J(V) curves for CdTe devices often show light-to-dark crossover at
forward bias attributed to Cu-doped photoconductive CdS[^52] or they
show rollover (curvature) attributed to blocking contacts.[^53] Devices
with ZnTe:Cu can show either type of behavior as well. Figure 30 shows
the J(V) curves for the three devices from Table X. They are typical of
a larger number of pieces we have processed. Namely, devices receiving a
BDH or anilene treatment prior to ZnTe:Cu growth typically have no
rollover and either no or slight LDXO. Devices receiving BR-methanol
typically have rollover, indicating a higher barrier. Yet the J(V)
results are not strongly affected. The penetrating nature of the BDH
treatment results in shorted devices when the CdTe is less than 5 µm.
Bifacial characterization of devices having CdTe from 1 to 10 µm is
planned to fully understand the operation and stability of CdTe solar
cells. Therefore, subsequent processing of these cells with ZnTe:Cu will
use the anilene treatment since it results in ohmic contacts and high
yields in thin devices. Another factor requiring optimization is the
post-contact heat treatment, typically at 180°C for 20 minutes but some
devices do not improve at all, others benefit from slightly higher
temperature.

A crucial new result is shown in the Figure 30 for VT178-2. There is
rollover in forward bias for light through the front or in the dark *but
not for light through the ZnTe:Cu*. We have observed this on several
other pieces from other CdTe runs and with different ZnTe:Cu runs and
after stress (i.e. VT154-4 in Figure 30). The J(V) curve for front
illumination for devices VT178-2 and VT154-4 in Figure 30 show rollover
(curvature) and high resistance attributed to blocking rear contact. Due
to the high absorption of CdTe, the back contact is in the dark for
front illumination. However, the JV curve for the back illumination
rises without curvature and has lower resistance. This shows that the
back barrier is photosensitive; i.e. either the ZnTe:Cu or the
contact/junction region are photoconductive and create a blocking
contact unless illuminated with light above 1.4 eV. It is consistent
with recontacting studies reportedError: Reference source not found
where replacing the graphite back contact eliminated the roll-over,
which developed after stressing.

![](media/image38.wmf){width="3.0in"
height="3.158333333333333in"}![](media/image39.wmf){width="3.0in"
height="3.232638888888889in"}

![](media/image40.wmf){width="2.9993055555555554in"
height="3.09375in"}![](media/image41.wmf){width="2.997916666666667in"
height="3.060416666666667in"}

[]{#__RefHeading___Toc125256035 .anchor}Figure 30. Initial J(V) curves
for devices from Table VII with ZnTe:Cu contacts for illumination
through CdS (front), ZnTe:Cu (back) and dark. Three different CdTe
surface treatments were used. Also shown (lower right) is J(V) from
VT154-4 after stress showing similar differences between front and back
illumination at forward bias as seen on VT178-2-1.

# *Bifacial Spectral Response Characterization and Modeling*

Bifacial SR measurements are a powerful tool to analyze the transport
properties and to isolate the effect of the front and back junction. A
model had been developed previously for bifacial spectral analysis of
transparent contact for CIS based photovoltaic devices.Error: Reference
source not found This model evaluates the spectral response as a
function of absorber thickness (t), depletion width (W) and diffusion
length (L). Figure 31 shows the front wall and back wall measured and
simulated SR. The SnO~2~/CdS and ZnTe:Cu absorption is accounted for in
the analysis for the front wall and back response, respectively. The
measured CdTe absorption coefficient was adjusted slightly to give a
good fit to the falling edge of the front wall data. L and W were then
fit to the measured back wall response with L=0.8 and W=2.5 µm. There is
good agreement between the measured and fitted data.

![](media/image42.wmf){width="3.201388888888889in"
height="3.009027777777778in"}![](media/image43.wmf){width="3.1493055555555554in"
height="3.009027777777778in"}

+----------------------------------+-----------------------------------+
| .                                | []{#__RefHeading___Toc125256037   |
|                                  | .anchor}Figure 32. Calculated SR  |
| []{#__RefHeading___Toc125256036  | for L=0.5, 1.0, 1.5 µm with W=2.5 |
| .anchor}Figure 31. Measured and  | and t=5.0 µm.                     |
| calculated SR (fit with W=2.5    |                                   |
| and L=0.8 µm).                   |                                   |
+----------------------------------+-----------------------------------+

Due to the extremely high CdTe absorption coefficient and steep
absorption edge, over 90% of the photocurrent is generated within the
first micron for either illumination direction. For standard front wall
measurements, the light is absorbed in the high field depletion regions
leading to very high collection probability independent of t, W or L
providing t and W exceed \~1.5 µm. For back wall measurements, most of
the electrons generated in the CdTe bulk must diffuse to the CdS
junction depletion region. This is represented by the increasing tail
from 400 to 800 nm Carriers generated in the depletion region by weakly
absorbed near-bandgap light (800-860 nm) are collected with high
probability. This is represented by the peak from 800-860 nm. Typically,
we observed very little increase in front wall QE from zero to --1V
bias, indicating good collection and consistent with the strong
absorption in the depletion region. The depletion width of 2.5μm is very
consistent with values obtained by capacitance on these devices,
providing independent confirmation of the fitted value. Figure 32 shows
the calculated response as function of diffusion length for W=2.5μm and
t=5 µm. The front wall response is insensitive to changes in L, but the
backwall response shows increased collection at all wavelengths with
increasing L. Increasing W primarily increases the collection from
800-860 nm. The back wall spectral response measurements are much more
sensitive to transport parameters (L) and depletion collection (W) than
front wall spectral response.

Front wall SR is relatively insensitive to reverse bias on a good cell
due to the high fraction of photocurrent collected at 0V. However, back
wall is sensitive to both W and L since the distance the carriers must
diffuse is (t-W) which is 2-3 µm at 0V for t=5µm. This is much larger
than L. So W can be determined more accurately from back wall
measurements. We have measured SR as a function of forward and reverse
bias voltages on several devices with different values of t. Figure 33
shows the SR measured at --0.8V, 0V and +0.5V on VT178. The fitted value
is also shown along with values of W and L. The depletion width was also
determined independently from C(V) measurements at a range of
frequencies. Figure 34 shows W as a function of V from SR fitting and
C(V) measurements for devices wit h5 and 10 µm CdTe. There is relatively
good agreement at reverse bias. The poorer agreement at forward bias is
to be expected since the C(V) has greater frequency dependence and the
SR has greater possibility of photoconductive effects influencing the
measurements. But clearly they both indicate that the W is likely around
a micron at forward bias. This is the comparable to the absorption depth
of AM1.5 light incident on the front of the cell. This explains why
there is so little dependence on diffusion length for front wall light
even in forward bias.

![](media/image44.wmf){width="5.868055555555555in" height="3.40625in"}

[]{#__RefHeading___Toc125256038 .anchor}Figure 33. Backwall SR for
VT145-1 at 3 voltage biases. Measured data and fit with L, W values
indicated are shown.

![](media/image45.wmf){width="3.0416666666666665in"
height="3.217361111111111in"}![](media/image46.wmf){width="3.0416666666666665in"
height="3.217361111111111in"}

[]{#__RefHeading___Toc125256039 .anchor}Figure 34. Depletion width from
C-V and from fitting backwall SR(V) measurements for devices with CdTe
thickness of 5 (left) and 10 (right) µm

#### **Temperature Dependent Bifacial Spectral Response**

We have investigated the properties of CdS/CdTe junctions at low
temperature using bifacial V~oc~-T, J~sc~-T and "effective" QE. V~oc~
and J~sc~ were measured at different white light intensities in the
temperature range of 100-300K for front and back illumination. The
effective QE was determined using narrow band-pass spectral filters. We
have characterized several devices and are still trying to understand
the implications of the data. Here we briefly present results from
VT149-4 whose J(V) data was presented above in this section.

The temperature dependence of V~oc~ at 100 and 10% light is shown in
Figure 35. As T decreases, for front light increases nearly linearly as
predicted to around 200K then begins to saturate and become independent
of temperature and intensity. V~oc~ for back light has the opposite
behavior, remaining low and relatively constant above 200K then
increasing sharply. On some devices, V~oc~ for back light has exceeded
that for front light at 120K. A common feature of over 30 devices (about
20 with standard contacts including some from First Solar or BP Solar
and 10 with ZnTe:Cu contact) characterized so far is that V~oc~ for
front light saturates around 0.95-1 V at low temperature, and becomes
independent of intensity. We speculate that this is the built-in voltage
or maximum achievable V~oc~ resulting from an absence of recombination,
which is frozen out. The quasi-fermi levels are pinned by the front and
back contact. This is supported by the following qualitative analysis.
The bandgap of CdTe at low temperature is reported to be 1.6 eV, the
electron Fermi level at the SnO~2~ is reported to be 0.3 eV below E~c~,
and the hole Fermi level is pinned by the Cu defect at 0.3 eV above eV.
This leads to a potential difference of 1 eV for the maximum quasi-fermi
level splitting in the CdTe.

Figure 36 shows the J~sc~ measured at the same time as V~oc~ for two
different light intensities for illumination through front and back
contact. J~sc~ for front illumination is relatively constant within
temperature range 200-300K and then rapidly *decreases below 200K*.
Opposite behavior is observed for back illumination; i.e. J~sc~
*increases below 200K*. CdTe cells have a large depletion region, even
at room temperature, which ensures efficient carrier collection. The
J~sc~ for front and back illumination shows opposite temperature
dependence. This cannot be explained by reduction in mobility unless the
minority carrier switches from electrons to holes and the holes would
have to have a much higher mobility at lower temperature. We did
spectrally dependent J(V) bifacial measurements to identify carrier
transport limitations.

![](media/image47.wmf){width="3.140972222222222in"
height="3.2916666666666665in"}![](media/image48.wmf){width="3.0in"
height="3.2694444444444444in"}

[]{#__RefHeading___Toc125256040 .anchor}Figure 35. (left) V~oc~ as a
function of temperature for front and back illumination at 100 and 10%
intensity.

[]{#__RefHeading___Toc125256041 .anchor}Figure 36. (right) J~sc~ as a
function of temperature for front and back illumination at 100 and 10%
intensity. Note the log scale.

The J~sc~ for these cells was measured as a function of temperature
using narrow band pass filters having FWHM\~25 nm. The correction
factors for filter transmission and the ELH lamp spectrum were
determined using the QE, as measured on our standard monochromator based
chopped light QE system at 300K, as a reference. The QE as a function of
temperature was then calculated from the J~sc~ values. Figures 37 and 38
show the QE calculated for the front and back illumination for different
temperatures.

Due to the high absorption coefficient, most of the carriers generated
for front illumination are efficiently collected in the high field
region located near CdS/CdTe interface. The depletion width is \>2 µm,
so all nearly carriers are collected. For the back illumination, the
carrier collection is limited by diffusion length of the carriers to
that front junction as discussed above. Only the carriers generated
close enough to diffuse to the collecting junction can contribute to the
photocurrent. Applying this model would suggest that the diffusion
length and depletion region increase with decreasing temperature for
carriers collected from the back but decreases for carriers collected
from front light.

There are several complications, which may influence interpretation of
these results such as formation of blocking contacts and long time
constants causing slow transients at low temperatures. The
interpretation of constant V~oc~ while J~sc~ is decreasing is also
problematic. Clearly bifacial device characterization as a function of
temperature is a rich area for exploring the operation of CdTe devices,
and more work remains.

![](media/image49.wmf){width="3.011111111111111in"
height="3.004861111111111in"}![](media/image50.wmf){width="2.997916666666667in"
height="2.998611111111111in"}

[]{#__RefHeading___Toc125256042 .anchor}Figure 37. (left) QE as
calculated from J~sc~ measured using filters for front illumination.

[]{#__RefHeading___Toc125256043 .anchor}Figure 38. (Right) QE as
calculated from J~sc~ measured using filters for back illumination.

*Characterization of Stability Using Bifacial J(V) Measurements*

CdTe devices with ZnTe:Cu contacts have been reported to be relatively
stable.[^54] Samples from VT154 received several different contacts and
were stressed at 10 days in the light at 100°C in dry air at 4 different
bias conditions. Results comparing the different contacts are shown in
Section 2.4. Here, we use bifacial J(V) measurements to provide new
insight into contact degradation using the piece with transparent
ZnTe:Cu contact.

Figure 39 shows the J(V) curves for light incident from the front
(glass), from the back (ZnTe:Cu) and in the dark before and after
stress. All of the devices from this particular run had low FF (Table
IX) but that does not influence the interpretation of results here since
we are focusing on the behavior of the J(V) curve beyond V~oc~ where the
back contact injection can be limited by a blocking barrier. After
stress, the J(V) curves for illumination from the front or in the dark
show curvature in forward bias, classic evidence of a blocking contact.
In fact, for this device, there was little change in V~oc~ or FF with
stress for front illumination. The largest effect was in forward bias.
For back illumination (lower left figure) there is essentially no change
in forward bias. This is a new result providing direct evidence that the
blocking contact formed after stress is at the back contact and it is
light activated. Either photocarriers increase the conductivity of the
CdTe or ZnTe or the depletion region formed by the increased barrier
collapses. Either of these would restore high injection from the ITO
back contact. Further work will include varying the spectrum of the
light to see if the effect only occurs with light above the ZnTe
bandgap.

![](media/image51.wmf){width="3.0305555555555554in"
height="2.9993055555555554in"}![](media/image52.wmf){width="3.040277777777778in"
height="3.009027777777778in"}

![](media/image53.wmf){width="3.2416666666666667in"
height="3.2083333333333335in"}

[]{#__RefHeading___Toc125256044 .anchor}Figure 39. J(V) curves for
VT154.4-2 before and after stress for light from the front (CdS side),
rear (ZnTe side) or in the dark.

2.4 Stability of Vapor Transport CdTe

***Effect of Contacts on Stability***

It is well established that stability of CdTe devices depends partially
on the contact processing. In a recently published study by our
group,[^55] it was found that there was little difference in degradation
between devices that had a wet-etched CdTe surface or a dry-deposited Te
layer, if they had Cu in their contact. However, there was a significant
difference between devices with or without Cu in the contact layer, and
significant differences between wet or dry processing for devices
without Cu in the contact. That work was performed using devices from
First Solar. During this year, we have initiated stability studies on
devices from IEC's VT system.

Devices from run VT128 were processed with evaporated Cu/Ni and Ni
contacts. The Cu was 15 nm and Ni was 50 nm. The CdTe surface received
the wet BDH treatment. Pieces were stressed for 14 days in continuous
light (L) or dark (D) at 85°C in dry air. Bias was either open circuit
(OC) or short circuit (SC). Other pieces were stressed with time-varying
bias cycles and are discussed in the next section.

Table XI lists the relative change in JV performance for the two types
of contacts after stress at SC in L and D or OC in L. Initial JV values
of typical device also listed. The device without Cu stressed at SC, D
is interesting since the junction is at equilibrium with no
recombination, it has no Cu in the contact, and has no current flow
during stress. Its degradation of 7% is considered somewhat intrinsic to
the CdS/CdTe device structure. In the light, degradation increases at
either OC or SC bias. Degradation was greater at OC than SC for the
device with Cu in the contact. This is consistent with many previous
studies here using First Solar (FS) and BP Solar (BPS) devices. However,
the opposite trend was seen in the device without Cu. Figure 25 shows
the V~oc~ at 85°C during stress for three devices. For stress in the
light, the decrease in V~oc~ is comparable for devices with or without
Cu in the contact, in agreement with JV results at 25°C in Table XI.
This contradicts our earlier results using FS devices. The device
without Cu stressed in the dark at OC has a different rate of
degradation suggesting a different mechanism.

[]{#__RefHeading___Toc125256153 .anchor}Table XI. Initial JV values and
relative change (%) after stress for devices with Ni (VT128.5) or Cu/Ni
(VT128.6) contacts. The device with Cu/Ni stressed at SC in D became
shunted.

+----------+--------------+--------+----------------+--------+--------+
| **C      | **Stress**   | **V~o  | **J~sc~**      | **FF** | *      |
| ontact** |              | c\ ~** |                |        | *Eff** |
|          | *            |        | **(mA/cm^2^)** | *      |        |
| **(      | *Condition** | *      |                | *(%)** | *      |
| piece)** |              | *(V)** | **or Change**  |        | *(%)** |
|          |              |        |                | **or   |        |
|          |              | **or   |                | Ch     | **or   |
|          |              | Ch     |                | ange** | Ch     |
|          |              | ange** |                |        | ange** |
+----------+--------------+--------+----------------+--------+--------+
| Ni       | Initial      | 0.77   | 20.1           | 58.2   | 9.0    |
|          |              |        |                |        |        |
| (        |              |        |                |        |        |
| VT128.5) |              |        |                |        |        |
+----------+--------------+--------+----------------+--------+--------+
|          | SC, D        | -5%    | -1%            | -2%    | -7%    |
+----------+--------------+--------+----------------+--------+--------+
|          | SC, L        | -9%    | -1%            | -12%   | -21%   |
+----------+--------------+--------+----------------+--------+--------+
|          | OC, L        | -8%    | -5%            | -1%    | -13%   |
+----------+--------------+--------+----------------+--------+--------+
| Cu/Ni    | Initial      | 0.81   | 20.7           | 69.5   | 11.6   |
|          |              |        |                |        |        |
| (        |              |        |                |        |        |
| VT128.6) |              |        |                |        |        |
+----------+--------------+--------+----------------+--------+--------+
|          | SC, L        | -5%    | -2%            | -14%   | -21%   |
+----------+--------------+--------+----------------+--------+--------+
|          | OC, L        | -10%   | -5%            | -18%   | -30%   |
+----------+--------------+--------+----------------+--------+--------+

![](media/image54.wmf){width="3.986111111111111in"
height="3.3055555555555554in"}

[]{#__RefHeading___Toc125256045 .anchor}Figure 40. V~oc~ at 85°C during
14 days stress for devices with Cu/Ni or Ni contact at different bias
conditions.

Figure 41 shows the light and dark JV for the devices stressed at OC, L
having Ni and Cu/Ni contacts. Before stress (Fig.41a), the device with
the Cu/Ni contact has no light-dark crossover, while the device with Ni
contact has both rollover in forward bias and LDXO, as commonly seen in
devices without Cu contact. This is generally attributed to the blocking
back contact. JV results for same two devices after stress is in Figure
41. In distinct contrast to the initial JV behavior, after stress, the
light and dark curves of both devices are remarkably similar. The
*light* curve for the device *without* Cu has straightened out in
forward bias while the *dark* curve for the device *with* Cu has become
very resistive. The only difference is slightly lower FF for the device
without Cu. The similarity after stress contradicts past resultsError:
Reference source not found where devices with Cu *develop* blocking
contacts after stress while devices without Cu *maintain* their blocking
contact after stress. These differences suggest that our present VT
devices have different degradation processes than previously studied
devices.

![](media/image55.wmf){width="2.910416666666667in"
height="2.8243055555555556in"}![](media/image56.wmf){width="2.970138888888889in"
height="3.24375in"}

\(a\) (b)

[]{#__RefHeading___Toc125256046 .anchor}Figure 41. (a) left and (b)
right. Light and dark JV curves of VT128.5 and 128.6 before (a) and
after (b) stress at 85°C for 15 days at OC bias in light.

We have a substantial data base of stressing devices from FS or BPS at
100°C for 10 days at 4 biases: -0.5V, SC, MP, and OC. We fabricated
devices from standard run VT154 having 4 different contacts -- Cu/Ni,
CuI/Ni, Ni, and ZnTe:Cu/ITO. This allows us to compare 3 different
sources of providing Cu to the contact and the CdTe. Devices were
stressed for 10 days at 100°C in dry air in the light at the above 4
biases. Table XII lists results for the device stressed at OC.

[]{#__RefHeading___Toc125256154 .anchor}Table XII. JV results and
relative change after stressing for 10 days at 100°C in dry air in the
light at OC.

+----------+--------------+--------+----------------+--------+--------+
| **C      | **Stress**   | **V    | **J~sc~**      | **FF** | *      |
| ontact** |              | ~oc~** |                |        | *Eff** |
|          | *            |        | **(mA/cm^2^)** | *      |        |
| **(      | *condition** | *      |                | *(%)** | *      |
| piece)** |              | *(V)** | **or Change**  |        | *(%)** |
|          |              |        |                | **or   |        |
|          |              | **or   |                | Ch     | **or   |
|          |              | Ch     |                | ange** | Ch     |
|          |              | ange** |                |        | ange** |
+----------+--------------+--------+----------------+--------+--------+
| Ni       | Initial      | 0.79   | 25.0           | 56.5   | 11.3   |
|          |              |        |                |        |        |
| (        |              |        |                |        |        |
| VT154.6) |              |        |                |        |        |
+----------+--------------+--------+----------------+--------+--------+
|          | change       | -19%   | -4%            | -17%   | -36%   |
+----------+--------------+--------+----------------+--------+--------+
| Cu/Ni    | Initial      | 0.80   | 24.4           | 60.1   | 11.8   |
|          |              |        |                |        |        |
| (        |              |        |                |        |        |
| VT154.1) |              |        |                |        |        |
+----------+--------------+--------+----------------+--------+--------+
|          | change       | -5%    | -6%            | -18%   | -27%   |
+----------+--------------+--------+----------------+--------+--------+
| CuI/Ni   | Initial      | 0.81   | 24.3           | 63.4   | 12.5   |
|          |              |        |                |        |        |
| (        |              |        |                |        |        |
| VT154.2) |              |        |                |        |        |
+----------+--------------+--------+----------------+--------+--------+
|          | change       | -9%    | -3%            | -10    | -21%   |
+----------+--------------+--------+----------------+--------+--------+
| ZnT      | Initial      | 0.77   | 23.2           | 53.9   | 9.7    |
| e:Cu/ITO |              |        |                |        |        |
|          |              |        |                |        |        |
| (        |              |        |                |        |        |
| VT154.4) |              |        |                |        |        |
+----------+--------------+--------+----------------+--------+--------+
|          | change       | -2%    | -15%           | -16    | -30%   |
+----------+--------------+--------+----------------+--------+--------+

Comparing Tables XI and XII for devices with Ni or Cu/Ni contacts shows
that the VT154 pieces in Table XII had lower initial FF despite
nominally identical processing. Yet the V~oc~ values are comparable.
Degradation of all pieces in Table XII was significant, indicating that
to first order, how the Cu is incorporated or even the presence of Cu in
the contact does not dramatically influence the degradation for cells
stressed at OC. Figure 42 shows the relative change in efficiency for
these devices as a function of the stress bias. The devices with CuI and
ZnTe:Cu behave similar to each other, yet quite different from what we
often typically observed; specifically, the decrease in efficiency for
stress at MP followed an increase for stress at OC. The devices with
Cu/Ni or Ni behave as expected with the caveat that the degradation is
larger than typically seen. Figure 43 shows the V~oc~ vs. time. Most
degradation occurred in the first 4 days. The V~oc~ for VT154.4 with
ZnTe:Cu shows negligible change consistent with Table IX. Given the poor
initial performance of the control devices and unusual behavior for MP
bias, it is not clear how much can be conclusively drawn from these
results of Tables XI and XII, other than the observation that the VT
devices show significant degradation despite differences in their
contact materials. Critical insights about the formation and nature of
the blocking contact has been discussed in Section 2.3, using bifacial
measurements on the devices with ZnTe contacts.

![](media/image57.wmf){width="2.825in"
height="2.9166666666666665in"}![](media/image58.wmf){width="3.14375in"
height="2.988888888888889in"}

[]{#__RefHeading___Toc125256047 .anchor}Figure 42. (left) Relative
change in efficiency with bias during stress for devices from VT154 with
different contacts.

[]{#__RefHeading___Toc125256048 .anchor}Figure 43. (right) V~oc~\@100°C
during stress for devices from VT154 with different contacts stressed at
OC.

*Transient Degradation and Recovery*

Indoor stress experiments typically have continuously applied light,
temperature, and bias.Error: Reference source not
found^,^[^56]^,^[^57]^,^[^58]^,^[^59] In contrast, modules operate at
maximum power MP\~ 0.75x V~oc~ and experience daily cycles of light and
temperature. Outdoor module performance has been reported to be
relatively more stable[^60]^,^[^61] than devices experiencing indoor
stressing.

This section describes CdTe solar cell transient degradation and
recovery, showing complex behavior on differently fabricated devices.
Recovery in CdTe devices in the dark and with applied bias during and
after stressing has not been reported previously. Much of the results in
this section were recently presented.[^62]

The focus of this work is on V~oc~ measured in-situ during stress. V~oc~
degrades during stress due to increased recombination,Error: Reference
source not found^,Error:\ Reference\ source\ not\ found^ and thus, is a
sensitive and easily measured parameter to monitor the electronic
properties of the junction. FF also degrades but is complicated by
recombination, contact and series resistance effects.Error: Reference
source not
found^,Error:\ Reference\ source\ not\ found,Error:\ Reference\ source\ not\ found^

***Experimental***

Devices were obtained from several sources. Some cells were cut from
production modules from two commercial sources (A and B). The CdTe for
type A cells was made by VT and was 3-4 µm. Manufacturer A provided
cells from two nominally identically processed modules (A1 and A2),
fabricated within a short period of each other, yet having different
performance and stability. Some devices were hybrids where IEC deposited
a C/Cu contact on CdS/CdTe substrates from manufacturer A, referred to
as A/IEC. Type B cells were made by electrodeposition and were \<2 µm
thick. Devices were made with CdTe deposited by VT at IEC that was \~6
µm and had Ni/Cu contacts referred to as VT.[^63] Table XIII lists
typical initial solar cell performance. Differences in J~sc~ are due to
SnO~2~ and CdS absorption and are not important for this paper.

Devices were stressed at IEC in a system allowing exposure to controlled
ambient, bias, light, and temperature (60 to 100°C), while monitoring
performance in-situ.Error: Reference source not found The chambers were
pumped out to \~50 mT and purged with Ar several times before stress to
remove moisture. Stressing was done with dry bottled air unless stated
otherwise. Light during stress was at \~ 1 sun from halogen flood lamps.

[]{#__RefHeading___Toc125256155 .anchor}Table XIII. Typical initial
performance for devices studied here. A1, A2 and B were processed
entirely at outside manufacturers.

+---------------+-----------+------------------+----------+----------+
| **Cell Type** | **V~oc~** | **J~sc~**        | **FF**   | **Eff.** |
|               |           |                  |          |          |
|               | **(V)**   | **mA/cm^2^**     | **(%)**  | **(%)**  |
+---------------+-----------+------------------+----------+----------+
| ####  **A1**  | 0.82      | 21               | 68       | 11       |
+---------------+-----------+------------------+----------+----------+
| # A2          | 0.74      | 20               | 64       | 9.5      |
+---------------+-----------+------------------+----------+----------+
| **B**         | 0.81      | 18               | 69       | 10       |
+---------------+-----------+------------------+----------+----------+
| **A/IEC**     | 0.81      | 20               | 69       | 11       |
+---------------+-----------+------------------+----------+----------+
| **VT**        | 0.80      | 23               | 70       | 13       |
+---------------+-----------+------------------+----------+----------+

# *Results*

[Voltage Bias-Induced Transients]{.underline}

Three A/IEC cells were stressed at 100°C in dry air for 38 days in the
light. The bias was switched during stress between OC or SC. Figure 44
shows the V~oc~ measured in-situ at 100°C. Cell 1 was at SC for 24 days,
then switched to OC; cells 2 and 3 were at OC for 1 or 24 days before
switching to SC, respectively. The insert shows cell 2 on a log scale.

![](media/image59.wmf){width="3.5083333333333333in"
height="3.402083333333333in"}

[]{#__RefHeading___Toc125256049 .anchor}Figure 44. V~oc~ at 100°C vs.
time at stress (type A/IEC). Bias switched from SC to OC after 24 day
(cell 1), and from OC to SC after 1 day (cell 2) or 24 days (cell 3).
Insert shows V~oc~ for cell 2 on log scale.

V~oc~ for cell 1 at SC decreased 40 mV in the first 5 days, then
remained constant until switched to OC causing V~oc~ to decrease 100 mV
in the next 14 days. Cells at OC showed immediate degradation. V~oc~
decreased 120 mV in the first day. V~oc~ on cells 2 and 3 had common
general behavior: it decreases while at OC; when switched to SC there is
a rapid drop followed by a slow recovery, which peaks, then continues to
degrade. For example, cell 2 at OC decreases \~120 mV (from 650 to 530
mV) in 1 day until switched to SC. At that point, V~oc~ plummets another
50 mV in a few hours (see insert), then begins a slow recovery, reaching
a maximum after 15 days. V~oc~ recovery was 20 times slower than
degradation at this temperature. Cell 3 behaved similarly but its
recovery was minimal. *Thus, with increasing time at OC before switching
to SC, the maximum value to which V~oc~ can be restored decreases.*
Identical behavior was observed for devices stressed in H~2~/Ar so we
conclude that these effects are not due to ambient or random damage to a
given cell. Cells stressed at MP degraded and recovered the same as
those at OC, indicating that the threshold for major degradation is
between SC and MP for these devices.

VT devices from IEC were also stressed with varying bias conditions.
Figure 45 shows V~oc~ vs. time for 3 devices on the same substrate. In
contrast to the A/IEC device of Figure 44, degradation was very similar
between SC or OC, decreasing only 40-60 mV and nearly leveling off after
only 4 days. A third cell was at OC for 4 days, then at 1.3xOC
(corresponding to forward bias current of \~2xJ~sc~) for 4 days,
resulting in accelerated degradation. When switched to SC, V~oc~
plummeted \~80 mV in a few hours but then continued to decrease slowly
for 4 days. V~oc~ recovered just as rapidly when switched to OC. This
represents *nearly opposite bias dependence* from A/IEC devices in
Figure 44. The V~oc~ vs. time for a companion piece processed without Cu
in the contact looked very similar to Figure 45, including the rapid
decrease and recovery with SC or OC. Thus, the bias dependent behavior
cannot be explained solely by Cu ion drift changing with field polarity.

![](media/image60.wmf){width="3.0965277777777778in"
height="2.942361111111111in"}

[]{#__RefHeading___Toc125256050 .anchor}Figure 45. V~oc~ at 85°C vs.
time at stress (cell type VT-Ni/Cu). Cells were at continuous SC or OC
bias or switched from OC to 1.3 V~oc~ to SC to OC every 4 days.

### Simulated Day/Night Cycles

A key difference between laboratory stressing and outdoor module
performance is that lab cells are typically stressed at constant
illumination and temperature for weeks, while outdoor modules see daily
cycles. Table XIV lists stress conditions designed to simulate daily
light/dark and high/low temperature cycles experienced by modules
outdoors.

[]{#__RefHeading___Toc125256156 .anchor}Table XIV. Simulated daily
light/dark and temperature cycles.

Table XV shows the efficiency for A1, A2 and B cells before and after 30
days at each of the 4 stress cycles at OC. Cells at 0.5xOC had
negligible changes during any of the cycles. Figure 46 shows V~oc~ vs.
time for A1 and A2 cells stressed at OC and 0.5xOC for cycle 1 where the
cells were constantly at 65°C in the light. V~oc~ for either type of
cell was nearly unchanged at 0.5xOC. Those at OC stress degraded rapidly
then more slowly after 15 days. However, after 15 days of stress at
65°C, A2 cells have \~50 mV higher V~oc~ than A1 cells, despite starting
with 70 mV lower V~oc~ (Table X). A1 cells degraded \~120 mV more than
A2 cells, consistent with their much greater decrease in efficiency
(Table XV).

![](media/image61.wmf){width="3.0965277777777778in"
height="3.0965277777777778in"}

[]{#__RefHeading___Toc125256051 .anchor}Figure 46. V~oc~ vs. time for A1
and A2 devices stressed in cycle 1, biased at OC or 0.5xOC.

Part of the explanation may be found in results from cycle 4. Figure 47
shows V~oc~ measured daily for 9 am, after 16 hours of darkness at 65°C,
and at 5 pm after 8 hours of light at 65°C. A1 cells had negligible
recovery in the dark. A2 cells show substantial recovery every night
cycle. Thus, every night after 16 hours in the dark at 65°C, the V~oc~
increased, initially by 30 mV and increasing to 50 mV. This is
consistent with a change in the recombination due to a nightly
relaxation of traps with a response time of a few hours.

![](media/image62.wmf){width="3.0965277777777778in"
height="3.0965277777777778in"}

[]{#__RefHeading___Toc125256052 .anchor}Figure 47. V~oc~ vs. time for
type A1 and A2 devices from Figure 3 biases at OC in cycle 4 showing
data at 9 am (16 hours dark) and at 5 pm (8 hrs light) on same device.

Figure 48 shows similar V~oc~ data for 2 type B cells during cycle 1 and
4 stress. One cell was under constant illumination at OC in cycle 1.
After an initial loss of \~50 mV in the first 3 days, it shows a slow
steady increase. The other cell has an initial degradation of \~30 mV
and the similar steady increase over the next 27 days but also exhibits
nightly recovery of \~30mV. So there is both a daily
recovery/degradation cycle (30 mV/day) as well as a slower monotonic
recovery (30 mV/27days). Every day V~oc~ decreased during stress in the
light and increased the same amount during the dark 65°C. Degradation in
type B was essentially independent of voltage bias, in strong contrast
to A/IEC, A1 or A2 cells. Cycle 3 caused very little degradation for
type B cells at either OC or 0.5xOC (Table XV).

![](media/image63.wmf){width="3.0965277777777778in"
height="3.0965277777777778in"}

[]{#__RefHeading___Toc125256053 .anchor}Figure 48. V~oc~ vs. time at
stress for type B cells stressed at OC with cycle 1 (triangles) and
0.5OC with cycle 4 (9 am and 5 pm).

Outdoor array data from manufacturer B was analyzed to compare
performance in the morning and late afternoon when the irradiance was
approximately \~750 W/m^2^. After correcting for higher afternoon
temperatures, it was found that module output decreased during the day
by an amount consistent with our findings, confirming that the night
time recovery and daily degradation occurred in real outdoor
exposure.[^64]

### Recovery in Dark at Room Temperature

A1 and B cells were retested after 9 days in dark at room temperature
following the cyclic stressing. Results are in Table XV. Type A1 showed
no change, consistent with their lack of day/night recovery. Type B
cells show significant recovery. Nearly all degradation is restored
within 9 days. Degradation in type B cells is due mostly to V~oc~, and
recovery of V~oc~ is nearly complete within 9 days, independent of the
bias during stress.

[]{#__RefHeading___Toc125256157 .anchor}Table XV. Efficiency (%) of A1,
A2 and B cells before and after 30 days of 4 different stress cycles at
OC and after 9 days dark storage.

+--------------+-------------+-------------+-------------+-------------+
| # Stress     | **1**       | **2**       | **3**       | **4**       |
+--------------+-------------+-------------+-------------+-------------+
| ##### A1     |             |             |             |             |
+--------------+-------------+-------------+-------------+-------------+
| **Before**   | 11.8        | 11.4        | 11.5        | 11.9        |
+--------------+-------------+-------------+-------------+-------------+
| **After**    | 7.4         | 7.5         | 7.6         | 8.1         |
+--------------+-------------+-------------+-------------+-------------+
| **9 days**   | 7.5         | 7.6         | 7.5         | 8.3         |
+--------------+-------------+-------------+-------------+-------------+
| **A2**       |             |             |             |             |
+--------------+-------------+-------------+-------------+-------------+
| **After**    | 9.3         | 9.5         | 9.7         | 9.2         |
+--------------+-------------+-------------+-------------+-------------+
| **Before**   | 8.0         | 7.7         | 8.6         | 7.9         |
+--------------+-------------+-------------+-------------+-------------+
| **B**        |             |             |             |             |
+--------------+-------------+-------------+-------------+-------------+
| **Before**   | 9.9         | 10.1        | 9.8         | 10.2        |
+--------------+-------------+-------------+-------------+-------------+
| **After**    | 8.8         | 9.4         | 9.6         | 9.0         |
+--------------+-------------+-------------+-------------+-------------+
| **9 days**   | 9.6         | 9.8         | 9.6         | 9.9         |
+--------------+-------------+-------------+-------------+-------------+

***Discussion and Conclusions***

In general, degradation increases with forward bias but the threshold
for significant degradation varies; i.e. between SC and MP on A/IEC
devices; between 0.5xOC and OC on type A1, A2, and B devices; and
between OC and 1.3xOC on IEC's VT devices. The bias for recovery differs
as well: A/IEC devices recover with SC while VT devices recover with OC.

Degradation and recovery is shown here at 65, 85 and 100°C. We have not
seen qualitative differences in device behavior between temperatures in
this range. Bias and light have a much stronger influence than
temperature. Stress at only a single bias or in continuous light would
not have identified the various recovery modes. Since performance is
typically measured within 24 hours after the end of the stress,
significant recovery may have already occurred by the time they are
measured, while further recovery may occur in the days and weeks
following.

The identification of recovery modes in CdTe solar cells with time
constants of hours is very important. Previously, degradation has been
viewed as an irreversible process, suggesting mechanisms like chemical
decomposition or diffusion. Recovery due to changing bias, either
applied directly or though light bias at OC, suggests other mechanisms
such as defect conversion via capture or emission which changes
recombination in the junction region. Thermal and field enhanced drift
of species may create defects, which trap charge in the presence of
light or forward bias injection. In the absence of generation (i.e.
dark, low temperature, SC), the defects may slowly capture or emit
trapped charges and become neutral again. Changing the band bending can
also change the trap occupancy. Figures 46-48 and Table XV show that
dark recovery is correlated with more stable devices. Stability improves
from A1 to A2 to B, as does the degree dark recovery of V~oc~. Type B
cells have less degradation for any cycle condition than A1 or A2, which
correlates with their greater recovery in V~oc~ during and after stress.
It is not known if this is related to differences in CdTe film
properties or in other processing steps. The nominally identical A1 and
A2 devices differ in their stability and in their tendency for nightly
recovery. This suggests that the two mechanisms may be correlated.

The presence of Cu is a critical variable and needs to be studied
further. IEC has stressed several devices without any intentional Cu and
found them to degrade less than those with intentional Cu but they were
not completely stable.

5.  **Understanding and Improving V~oc~ in Vapor Transport CdTe Solar
    Cells**

Increasing V~oc~ in VT CdTe/CdS cells to \>900 mV and maintaining it in
cells with sub-micron thick CdTe layers requires an understanding of
existing cells, determination of the recombination sources in the cell,
quantifying the influence of back contact on V~oc~, especially in thin
devices, and assessing changes induced by depositing onto a moving
substrate at elevated rate (\>10 μm/min). The problem has two parts: 1)
defining limits to V~oc~ in CdTe solar cells in general and 2) defining
the influence of VT processing especially in thinner cells.

The highest open circuit voltage ever achieved with a p-type CdTe
absorber is V~oc~ = 892 mV, for single crystal CdTe with an ITO window
layer, i.e., no CdS.[^65] The highest efficiency CdTe/CdS solar cell (η
= 16.4%) has V~oc~ = 845 mV and has superstrate structure with 10 μm CSS
CdTe/60 nm CBD CdS/i-SnO~2~ (the i-SnO~2~ is a buffer layer on more
conductive SnO~2~).[^66] The highest V~oc~ achieved at IEC is 853 mV,
for 4 μm PVD CdTe[^67] and 843 mV, for 7 μm VT CdTe. The PVD cell used
200 nm thick CdS and no buffer layer, while the VT cell used 60 nm thick
CdS with an intrinsic Ga~2~O~3~ buffer. The buffer layer allows V~oc~ to
be maintained as the CdS thickness is reduced to maximize J~sc~.
Typically, devices without CdS yield V~oc~ \< 300 mV for CdTe/ITO and
CdTe/SnO~2~ without a buffer layer and V~oc~ \> 400 mV with In~2~O~3~,
Ga~2~O~3~, for i-SnO~2~ buffer layers. The collective results of CdTe
research groups demonstrate that V~oc~ \> 800 mV is achievable in cells
with CdTe films with thickness from 1.5 to \>10 μm and grain size from
300 nm to 10 μm, suggesting a passive role for grain boundaries in
operation of devices with high V~oc~.

Analysis of superstrate CdTe cells leads to a working model for V~oc~ in
thin film CdTe/CdS devices. The forward diode current is primarily
limited by SRH recombination in the CdTe layer.[^68] Sources of
recombination include defect states within CdTe caused by intrinsic and
foreign impurities as well as crystallographic defects. No evidence
exists to show that the CdS film contributes a significant amount to
J~L~ or to built-in voltage. Hence, reducing its thickness increases
J~L~ by reduction of parasitic optical loss, while increasing its
bandgap by alloying with ZnS has no demonstrable effect on V~oc~ or
built-in voltage. The CdS functions at the grain-by-grain level to
create the CdTe inversion layer needed to separate excess charge. The
forward current is the result of band-to-band recombination in this
region and is controlled by the quasi Fermi level separation and extent
of the space-charge width. A detailed band model is difficult to
assemble, since CdTe is highly compensated and the net space-charge
density is the difference of two large numbers, N~a~-N~d~.[^69]

The defect levels originate from native (stoichiometric) defects,
foreign impurities and complexes. The concentration of native defects,
such as V~Cd~ and introduced impurities, such as Cu and Cl, can far
exceed measured carrier densities, which is consistent with relatively
low doping efficiency. The species needed to produce electrically active
carriers are therefore present in excess in typical devices. Acceptor
doping in CdTe is attributed to V~Cd~ and to complexing with Cu~i~,
which is easily ionized (E~A~ = 0.17 eV). During the CdCl~2~ treatment,
which is typically carried out in air, oxidation at the surface shifts
the stoichiometry beneath the surface, resulting in preferential
formation of CdO: ∆G~f~ (CdO) = -54 kcal/mol and ∆G~f~ (TeO~2~) = -15
kcal/mol. This disproportionate oxidation of Cd increases V~Cd~, despite
excessive Cd at the surface in the form of CdCl~2~. The overall reaction
between CdTe and CdCl~2~ in air to form CdO is further supported by the
formation of TeCl~2~ via: CdTe + CdCl~2~ + O~2~ ↔ 2CdO + TeCl~2~,
∆G~rxn~ (400ºC) = -49 kcal/mol. Note that excess CdO and TeO~2~ at the
CdTe surface will react to form CdTeO~3~: CdO + TeO~2~ ↔ CdTeO~3~,
∆G~rxn~ (400ºC) = -5 kcal/mol. The V~Cd~ concentration near the CdTe
surface can be estimated from the volume of CdO produced and from
Frenkel disorder formation kinetics, resulting in \~ 10^18^ cm^-3^.
These defects are expected to easily distribute throughout the film
during the course of a 30 minute treatment at 400ºC. With respect to Cu
concentration, a 1 nm Cu layer distributed evenly through a 4 μm CdTe
film would yield an atomic density of 1 x 10^18^ cm^-3^. Capacitance
measurements of carrier concentrations, \~10^14^ cm^-3^ are far below
the physical concentrations, and more fundamental work is needed to
understand the mechanisms affecting the doping efficiency.

The CdCl~2~ step is sensitive to ambient and the source itself can
evolve over time, reducing cell performance by reduction in junction
quality. For the baseline treatment used at IEC, the CdS/CdTe structures
are exposed to CdCl~2~ in a reactor configured in close-space
sublimation mode, in which the CdCl~2~ source powder is pressed into a
graphite susceptor parallel to the CdTe specimen, which is held on a
mica spacer \~ 1 mm from the CdCl~2~ surface.. Both the substrates and
the CdCl~2~ are radiatively heated by quartz FCM type lamps. Typically
isothermal reactions are carried out, with both substrate and CdCl~2~
temperature equal to 420°C. The system is maintained under flowing argon
and is operated with a bake at 200ºC under vacuum before each sample is
treated. These steps are crucial in spring and summer, when ambient
humidity is high. In a previous report, we showed how the chemical
composition of the CdCl~2~ powder changes with exposure to humid
ambient, resulting in the formation of cadmium chlorates.[^70] Without
properly desiccating the source and sample before each treatment, the
close-space treatment configuration entraps the liberated water,
whereupon it becomes a reactive species in the vapor ambient.

During this year, some serially-processed devices exhibited performance,
suggesting insufficient CdCl~2~ exposure despite identical CdCl~2~
treatments. Visual inspection of the CdCl~2~ bed after removing from the
susceptor indicated that the CdCl~2~ powder had fused into mm-size
platelets at the CdCl~2~-susceptor interface. Also, a faint grey
discoloration was observed on the source surface which powder XRD
measurement showed to be CdO. These changes would reduce the total
exposed CdCl~2~ surface area and reduce the heat transfer from the
susceptor, both of which would significantly reduce the CdCl~2~
evaporation rate. This was verified by performing CdCl~2~ depositions
onto glass substrates, resulting in significantly thinner deposits than
obtained with a fresh source. A fresh CdCl~2~ source bed was prepared,
and pieces from four identically deposited CdCl~2~ "baseline" runs were
treated (VT170, 172, 173, 174). The pieces came from the same location
of the CdS/CdTe plate to eliminate possible spatial variations in the VT
reactor. They were given the CdCl~2~ treatment (20 minutes in Ar/O~2~ at
420°C) in a random order to eliminate any sequential degradation in the
VT system. After CdCl~2~ treatment, they were all processed identically,
receiving BDH etching and 15 nm Cu/ 50 nm Ni contacts in the same
evaporator run. There were 8 cells per piece with 0.36 cm^2^ area.

The device results are shown in Figure 49. The x-axis is their sequence
in the CdCl~2~ process after replacing the source. Data is shown for
both best cell per piece and average, after eliminating obviously
shunted devices (FF\<40% or G~sc~\>15 mS/cm^2^). The best device was
VT174.1-3, the first piece to receive CdCl~2~ treatment, and had
V~oc~=0.793V, J~sc~=23.4 mA/cm^2^, FF=69.9% and efficiency=12.9%,
consistent with our typical best cell performance. However, the average
values and the best single cell values degrade significantly after 1 or
2 CdCl~2~ treatments. The average V~oc~ decreased 0.1V and the average
FF by 10 points. The yield is also shown in the bottom graph of Figure
49. Looking from the first to the fourth piece in the sequence, average
efficiency decreased from 11.0 to 7.0% and the yield decreased from 87
to 50%. The hysteresis, determined from difference in maximum power
between the up and down J-V traces also increased significantly from the
first to fourth piece. Thus, all measurable device parameters degraded
with subsequent processing with the same CdCl~2~ source. Re-compacting
the source into the susceptor base restores CdCl~2~ delivery as shown by
depositions onto glass, resulting in recovery of cell performance.
However, re-packing the bed or otherwise preparing a fresh CdCl~2~
source bed for each treatment is impractical and unreliable, and new
methods are being developed for reproducibly delivering both CdCl~2~
vapor and O~2~ to the CdTe surface. Results will be presented in the
next report.

![](media/image64.wmf){width="3.2083333333333335in"
height="6.554166666666666in"}

[]{#__RefHeading___Toc125256054 .anchor}Figure 49. The Eff, V~oc~, FF
and yield versus the sequence in CdCl~2~ processing. Both best cell and
averaged values are shown. Yield is defined in text.

For SRH recombination, the built-in barrier is coupled to the absorber
layer band gap, which can be reduced by alloying with CdS. We have found
that the V~oc~ saturates at 0.95-1V below -180ºC and is independent of
intensity for many types of CdTe/CdS cells (electrodeposited, PVD, VT),
which suggests pinning of the quasi-Fermi levels by states near the band
edges.[^71] This upper limit suggests a built-in voltage of \~1V.
Clearly increasing V~oc~ beyond 900 mV will require a reduction in band
tail states and/or an decrease in band misalignment at the interfaces.

A statistical survey was made of devices processed, since the most
recent VT reactor modification (VT114-174). The sample population was
determined in various ways. In general, it was always found that
efficiency was correlated with FF, not V~oc~ or J~sc~. The V~oc~ was not
correlated with J~sc~, as would be expected if random variations in CdS
thickness resulted in higher blue response but greater shunting. The
dark JV curves of devices on 17 pieces were analyzed to determine J~o~
and A. Figure 50 compares the V~oc~ calculated from the standard
relationship assuming superposition with the measured V~oc~. There is
very poor correlation. The FF was similarly uncorrelated with dark A or
J~o~ and V~oc~ was not correlated with FF. This indicates that neither
FF nor V~oc~ are governed by the dark JV curve, as would be expected
according to the standard superposition model. Instead, we have shown
that the voltage dependent collection J~L~(V) is a major loss governing
the FF. We have calculated the efficiency that would result after
correction for series resistance and J~L~(V) losses. Figure 51 shows the
power curve for a device VT174.1 that was in Figure 40 as the first
plate in the CdCl~2~ processing sequence. The as-measured efficiency was
12.0%. After correction for R~s~, then R~s~ plus J~L~(V), it increased
to 13.0 then 13.9%. There was little increase in V~oc~ with correction
for J~L~(V). Eliminating R~s~ and JL(V) losses leaves primarily junction
recombination losses. For our present devices, that would limit us to
around 14%.

![](media/image65.wmf){width="3.217361111111111in"
height="2.967361111111111in"}

[]{#__RefHeading___Toc125256055 .anchor}Figure 50. Measured and
calculated V~oc~ for 17 devices. Calculated V~oc~=AkT/q ln (J~sc~/J~o~).

![](media/image66.wmf){width="4.024305555555555in"
height="3.6166666666666667in"}

[]{#__RefHeading___Toc125256056 .anchor}Figure 51. Power curves for
device with correction for R~S~ and J~L~(V). Note there is little
increase in V~oc~.

The grain surfaces and boundary regions can influence forward current by
providing or limiting lateral current paths. Likewise, grain boundaries
may be active, i.e., conductive, and contribute to shunt conductance, or
they may be passive, i.e., oxidized. The presence of the blocking
barrier at the back contact is not to first order a loss in V~oc~.
Figure 41a showed two cells with very different back contact behavior.
The device with normal forward bias curve was Cu-doped, while the one
with blocking behavior had no Cu in the contact, yet their V~oc~'s
differed by only 30 mV. Likewise, Table XV showed data for 4 different
types of back contact layers where the Cu-containing layer was the major
variable, including one with no Cu. Yet, they all have comparable V~oc~.
Clearly the back contact barrier and Cu availability are not first order
influences on V~oc~. This suggests that front junction V~oc~ is
decoupled from any band bending at the rear, and that the rear contact
is not phtovoltaically active, hence, not limiting V~oc~ at present.

In summary, the empirical factors found to affect V~oc~ in
present-generation VT cells are as follows:

1\. CdS thickness

When d~CdS~ \< 80 nm, buffer layer used to maintain V~oc~

V~oc~ decreases for final d~CdS~ \< 40 nm

2\. T~sub~ during CdTe VT growth

Highest V~oc~ obtained for deposition \>500ºC

3\. CdTe thickness

Highest V~oc~ for d~CdTe~ \> 2 μm

V~oc~ decreases for d~CdTe~ \< 1.5 μm

4\. Ambient composition during VT growth

Require O~2~ partial pressure

5\. Cu + HT needed to push V~oc~ from 600 mV range to \> 750 mV

Highest V~oc~ for Cu driven from back surface

Single crystal device had no Cu

2.  **CIS BASED SOLAR CELLS**

3.1 Inline CIGS System

***Introduction***

During the past year, research on the roll-to-roll deposition of
Cu(InGa)Se~2~ on polymer substrates concentrated on process improvements
in the in-line system and on investigating the scale-up issues relating
to the linear evaporation sources. The latter work is being performed in
an independent bell-jar system where the operation of a linear source is
being characterized.

The work in the roll-to-roll system uses 50 µm Upilex S web substrates
coated on both sides by Mo having thicknesses of 2000Å and 200Å
respectively. In some cases, 1000Å Mo back contact was also
investigated. The back contact Mo film sputter deposited and contained
5-to-10 at% oxygen on the top half of its thickness to suppress cracking
during the Cu(InGa)Se~2~ deposition. In order to better understand the
effect of oxygen in the films, they were characterized in terms of the
oxygen distribution through the thickness.

The substrates in the form of 6\" rolls were prepared by Techni-Met,
Inc. of Windsor, Connecticut according to specifications and parameters
provided by IEC. While these \"oxygenated\" substrates have consistently
been crack free after Cu(InGa)Se~2~ depositions, in one lot, crack
formation has been observed. However, this problem was traced back to an
operational mistake at the supplier and has been corrected.

In all cases prior to the Cu(InGa)Se~2~ layer, an adhesion promoting a
layer of 100Å to 300Å β-(Ga~1-x~In~x~)~2~Se~3~ has been deposited on the
Mo film.

[Roll-to-roll Process Improvements]{.underline}:

# *Sources*

In order to accommodate higher temperatures required for higher rates,
the insulation of the Cu source has been re-designed. Multilayer
graphelt/Ta/grafoil parts have been replaced with rigid alumina and Ta
foils. Such a rigid insulation system would be reproducible and would
have predictable thermal characteristics. Operationally, it also showed
a better insulation characteristic in that the source was found to
operate at lower temperatures to give Cu(InGa)Se~2~ films of similar
thickness. Other graphite parts in the source were also changed and
replaced with boron nitride so as to eliminate the reaction with alumina
insulation. Presently the only graphite part left in the source is the
heater.

After several months of operation in the Cu source, the new insulation
has been implemented into the Ga and In sources as well.

Another issue that is of concern for high temperature operation of the
sources is the vapor leakage through the joint between the lid and the
body of the source. Presently, a small amount of leak is observed but it
does not result in any operational problem. However, at high rates of
effusion, such a leak will reach unacceptable levels. As a result, a
sealed source has been designed and fabricated and will be tested at the
earliest opportunity.

A new Se source was also found to be necessary because the old design
was found to be leaking as the temperature was increased. As a result,
the Se was effusing not only through the manifold but also through the
grafoil seal between the cap and the body of the source. The new source
is made out of graphite and is sealed. It is controlled with an inconel
sheathed thermocouple immersed into Se. The source also incorporates
water cooling capability. At the end of a run, the Se heater is turned
off and water cooling is turned on. At that point, the source cools more
rapidly than the manifold and acts like a Se pump, avoiding condensation
of Se in the manifold or elsewhere in the Se distribution system.

As far as the new Na source is concerned, the decision was made to use
the design of the present metal sources. This would be the most
expedient approach since there would be no need to design and test a
totally new source. Furthermore, software to control the source would
also be the same. In fact, the Na source control component has already
been added to the present software program running the system. The Na
source will be supplied by a DC power supply that would give more
flexibility in monitoring both voltage and current and thus provide
additional system monitoring capability. As this DC power supply\'s
operational characteristics is better known, similar powers supplies may
be used for the other metal sources replacing presently used
transformers.

# *Cu Source Control*

Severe control problem with the Cu source have re-surfaced again during
the deposition of Cu(InGa)Se~2~ films. The problem, which is in the form
of highly unstable behavior in both temperature readings and power
outputs, was the same one observed during the previous years and was
thought to have been resolved. It took more than a month to resolve the
issue that was traced to a design fault in the National Instrument\'s
Field Point Thermocouple Module (FP-TC-120). The module generates
unstable temperature reading if the C-type thermocouple, used for the
evaporation sources, generates a voltage more than 20mV
[and]{.underline} there are more than one thermocouple attached to the
module. When this behavior was discovered, Cu control thermocouple was
connected to an independent FP-TC-120 module all by itself. The other
seven input ports were shorted. In this way, control instabilities were
totally removed and the system became fully operational.

After these changes, a number of depositions were performed on
Mo-on-UpilexS substrates to recalibrate the system in terms of the
Cu(InGa)Se~2~ composition and device performance level using two
different Mo coatings thickness, 2000Å and 1000Å. Table XVI gives the
results obtained at the end of this recalibration process.

[]{#__RefHeading___Toc125256158 .anchor}Table XVI. System calibration
runs giving Cu(InGa)Se~2~ composition and the best device
characteristics.

  ----------- ------------- ---- ------- --------- -------- ------------ ------ ------
                                                   Best                         
                                                   Device                       

  Run         Mo Thck            At %    Ratio     V~oc~    J~sc~        FF     Eff

              (Å)                        (M/III)   \(V\)    (mA/cm^2^)   (%)    (%)

  70321       2000          Cu   24.2    0.90      0.554    31.3         57.1   9.9

                            Ga   9.3                                            

                            Se   49.1                                           

                            In   17.5                                           

                                                                                

  70322       2000          Cu   24.2    0.92      0.539    33.5         54.9   9.9

                            Ga   10.7    0.41                                   

                            Se   49.5                                           

                            In   15.6                                           

                                                                                

  70324       1000          Cu   25.5    0.99      0.546    31.6         47.2   8.2

                            Ga   10.5    0.41                                   

                            Se   48.7                                           

                            In   15.3                                           

                                                                                
  ----------- ------------- ---- ------- --------- -------- ------------ ------ ------

The lower device performance on 1000Å Mo may be due to the difficulty in
making a back contact for probing without damaging the Mo layer. This
point is presently under investigation. Nevertheless, the data show that
the system with the new source insulation and control scheme can give
reproducible compositions and acceptable device performance.

# *Analysis of Oxygenated Mo Films*

In order to better understand the process by which oxygen suppresses the
film cracking during Cu(InGa)Se~2~ deposition, Auger depth profiling
data was obtained for Mo films both before and after Cu(InGa)Se~2~
deposition. Figure 52 gives the profile of the typical 2000Å as-received
Mo film on Upilex S. The figure reflects the configuration of
Techni-Met\'s sputtering system as well as the way oxygen is introduced
into the system. Sputtering system has two targets separated by some
distance. The web stretched over a cooling drum travels over the
targets. The sputtering gas is directed over each target through two gas
inlets. The Mo film profiled in Figure 52 had oxygen mixed with argon
gas directed onto the second target. The flow rate of oxygen was set at
5% of the Ar flow rate. The sputtering gas directed onto the first
target was pure Ar. The two dips in the oxygen signal correspond
respectively to the concentrations of oxygen in the top and bottom half
of the Mo film. The oxygen peak in the middle, on the other hand,
represents the oxygen adsorbed by the Mo film deposited by the first
target during the transit of the web between the two targets.

![](media/image67.jpeg){width="5.995138888888889in"
height="3.2743055555555554in"}

[]{#__RefHeading___Toc125256057 .anchor}Figure 52. Auger depth profiling
of the as-received Mo-on-UpilexS.

![](media/image68.jpeg){width="5.997916666666667in"
height="3.122916666666667in"}

[]{#__RefHeading___Toc125256058 .anchor}Figure 53. Auger depth profiling
of the Cu(InGa)Se~2~ on Mo coated Upilex S.

Auger depth profiling of the films following the deposition of the
Cu(InGa)Se~2~ film on the Mo profiled in Figure 52 is shown in Figure
53. The difference in the oxygen distribution in the Mo film is
dramatic. It illustrates the large scale diffusional transport of oxygen
in the Mo resulting in a uniform composition of around 9 at%.
Furthermore, this level of oxygen also implies that the adsorbed oxygen
contributes to the overall oxygen content in the Mo film. Clearly more
work is needed in this area.

[Scale-up Issues in Linear Evaporative Sources]{.underline}:

The key quality variables that influence final solar cell efficiency are
film thickness and composition, and their uniformity across the
substrate width. The overall operational objective for a successful
commercial process is robust and tight control of the mean values of
film thickness and composition as well as their uniformity across
large-area substrate, for long deposition times. The film thickness
variation (or non-uniformity) is given by:

$T_{\text{nu}} = \frac{t_{\text{max}} - t_{\text{min}}}{2t_{\text{max}}}$
(12)

where, $t_{\text{max}}$and$t_{\text{min}}$are the maximum and minimum
film thicknesses respectively (thickness variation of more than ±10%
around the mean value is unacceptable).

Successful scale-up involves problems in both design and control that
must be considered simultaneously; and unless the process is designed
with explicit due consideration for the desired final film quality
specifications, successful scale-up to achieve desired control and
overall process performance will be difficult.

It has been customary to regard the scale-up of physical vapor
deposition (PVD) processes strictly as a problem that can be handled
exclusively by control, ignoring the possibility that pilot-scale
process design assumptions, such as equal nozzle-effusion-rates in a
multi-nozzle source boat, may no longer apply at the commercial scale.
For the specific system under study, we have identified two primary
issues (relatively insignificant for a pilot-scale process) that *must*
be resolved for a successful commercial-scale development: (i)
melt-temperature gradients, and (ii) the reduction of melt-level with
time.

***Melt Temperature Gradient***

For the specific system under study, linear thermal boats with two
nozzles each are used as sources for copper, gallium and indium. The
heater assembly in the source-boat is asymmetric (see Figure 54); the
resulting melt-temperature profile will therefore be asymmetric because
of the temperature gradient in the graphite heater, conductive heat loss
through the current leads, and direct radiative heat loss through the
holes drilled in the insulation (to accommodate the current leads).
Since nozzle effusion rate essentially depends upon the melt-surface
temperature directly underneath the nozzle, an asymmetric
melt-temperature profile will result in a mismatch in the vapor flow
rates through the two nozzles, and hence, lead to film thickness
non-uniformity.

![](media/image69.jpeg){width="6.0in" height="1.6402777777777777in"}

[]{#__RefHeading___Toc125256059 .anchor}Figure 54. Asymmetric heater
assembly.

  ------- -----------------------------------------------------------------
  \(a\)   ![](media/image70.jpeg){width="4.200694444444444in"
          height="2.6069444444444443in"}

          

  \(b\)   ![](media/image71.jpeg){width="4.202083333333333in"
          height="3.2215277777777778in"}
  ------- -----------------------------------------------------------------

[]{#__RefHeading___Toc125256060 .anchor}Figure 55. Temperature gradient
in the graphite heater: (a) 2D distribution, (b) along the lower branch.

Figure 55 shows the result of the simulation performed in Femlab
software to determine expected temperature gradient in the graphite
heater. It is assumed that the heater is placed in a vacuum chamber and
is radiating heat to the surroundings at 300K; the current flowing
through the heater is assumed to be 100 Amps. Note the appreciable
temperature gradient between the lead side and far side of the heater.

***Melt Level Reduction With Time***

The melt level inside a source-boat will drop with time due to mass loss
through the nozzles. For relatively small deposition times (\< 2 hours)
or lower flow rates, melt level reduction may be neglected (Figure 56).
However, in a high-throughput commercial-scale process, in addition to
higher vapor flow rates, deposition run-times are longer (\>8 hours).
Consequently, significant reduction in the melt-level occurs, affecting
the melt-surface temperature as well as the nozzle flow rates and hence,
the film thickness. Since it is difficult to prevent melt-level
reduction by source-boat design modification (though designs with low
melt cross-section area to melt-height ratio will have more pronounced
melt-level drop than the others), the disturbance introduced in the
process variables by the slow decrease in the melt-height should be
rejected by process control. The development of a coupled heat and mass
transfer model to describe how reduction in the melt level affects the
vapor flow rates will be the topic of future study.

![](media/image72.png){width="4.363194444444445in"
height="3.145138888888889in"}

[]{#__RefHeading___Toc125256061 .anchor}Figure 56. Melt level reduction
with time (simulation).

Considering how these issues arise from elemental source design, and
considering their impact on process controllability, we divide the
scale-up issues into the following two components: (i) *The design
issue* -- where an elemental source is designed such that
melt-temperature gradients are minimized, thereby reducing product
quality variations, and (ii) *The control issue --* where the mean
values of the final film quality variables are robustly controlled such
that the desired set-points are achieved while simultaneously rejecting
the disturbances introduced by the melt-level reduction.

***Experimental Results***

An independent vacuum bell-jar system was assembled to quantify
temperature gradients within the source-boat, so that the normal
operation of the pilot-scale inline process is not interrupted. Figure
57 shows a schematic representation of the experimental system. A
source-boat similar to the one currently in use in the pilot-scale
system is placed inside the bell-jar. A 10-inch-by-1-inch glass
substrate is located 9 inches directly above the source boat for copper
film deposition to obtain the thickness profile along the substrate
width. Since it is not possible to measure the temperature of the melt
directly, thermocouples are placed as shown in Figure 58 to measure the
boat-end temperatures, thereby providing an indirect indication of the
melt temperature gradient. The source-boat bottom temperature is
controlled using a digital PID controller implemented using the LabVIEW
package.

![](media/image73.jpeg){width="5.042361111111111in"
height="2.5006944444444446in"}

[]{#__RefHeading___Toc125256062 .anchor}Figure 57. Experimental set-up.

![](media/image74.jpeg){width="5.033333333333333in"
height="1.5006944444444446in"}

[]{#__RefHeading___Toc125256063 .anchor}Figure 58. Thermocouple
placement inside the source-boat.

Figures 59 and 60 show the experimental results for temperature dynamics
at the boat-ends for two separate runs (Run 1 and Run 2), while Figures
61 and 62 show the respective film thickness profiles (negative
co-ordinates are on the "Lead Side": see Figure 58). As expected, the
lead-side of the source-boat is cooler than the far-side. Observer that
for Run 1, the lead side temperature continues to drop even when the
boat-bottom temperature has reached steady-state; this is probably due
to the direct heat loss through the insulation holes (the slight
increase in the far side temperature may be due to interference from the
ground loops). In Run 2, the clearance between the current leads and the
insulation holes is removed by essentially screwing the leads through
the insulation; the lead side temperature drop is reduced significantly.

+-----------------------------------+----------------------------------+
| ![](media/image75.                | ![](media/image76.               |
| png){width="2.9277777777777776in" | png){width="2.922222222222222in" |
| height="2.1875in"}                | height="2.191666666666667in"}    |
|                                   |                                  |
| []{#__RefHeading___Toc125256064   | []{#__RefHeading___Toc125256065  |
| .anchor}Figure 59. Temperature    | .anchor}Figure 60. Temperature   |
| dynamics                          | dynamics                         |
|                                   |                                  |
| (Run 1)                           | (Run 2)                          |
+-----------------------------------+----------------------------------+
| ![](media/image77                 | ![](media/image78.               |
| .png){width="2.922222222222222in" | png){width="2.922222222222222in" |
| height="2.191666666666667in"}     | height="2.191666666666667in"}    |
|                                   |                                  |
| []{#__RefHeading___Toc125256066   | []{#__RefHeading___Toc125256067  |
| .anchor}Figure 61. Thickness      | .anchor}Figure 62. Thickness     |
| profile (Run 1)                   | profile (Run 2)                  |
+-----------------------------------+----------------------------------+

Variation in the temperature dynamics for different experimental runs is
also observed, attributable to the changes in insulation properties (due
to wear and tear, and deposited material). The temperature difference
between the two ends of the boat (ΔT=T~FS~-T~LS~) was observed to be
between 20 °C to 50 °C. However, for relatively small 6"-wide
substrates, this difference is not substantial enough to cause serious
film thickness non-uniformity (the thickness uniformity for both Run 1
and Run 2 is less than 10%).

The following simple qualitative modeling of the heat fluxes at the
boat-ends is sufficient to explain the observed temperature difference.
The total heat loss at the lead side of the boat is given by:

${\overset{˙}{Q}}_{L} = {\overset{˙}{q}}_{L}^{\text{rad}} + {\overset{˙}{q}}_{L}^{\text{cond}}$
(13)

where ${\overset{˙}{q}}_{L}^{\text{rad}}$is the heat loss term due to
radiation to the surroundings and ${\overset{˙}{q}}_{L}^{\text{cond}}$is
the conductive heat loss through the power leads. The total heat loss at
the far side of the boat is given by:

${\overset{˙}{Q}}_{F} = {\overset{˙}{q}}_{F}^{\text{rad}}$ (14)

where, ${\overset{˙}{q}}_{F}^{\text{rad}}$is the radiative heat loss at
the far side. Also,
${\overset{˙}{q}}_{L}^{\text{rad}}$\>${\overset{˙}{q}}_{F}^{\text{rad}}$
due to the presence of holes in the insulation (for the power leads)
allowing direct radiative heat loss from the boat that is at a very high
temperature. Clearly, ${\overset{˙}{Q}}_{L}$ is higher
than${\overset{˙}{Q}}_{F}$. Together with the fact that the
graphite-heater temperature is lower at the lead side, this mismatch of
heat losses at the boat ends is responsible for the temperature gradient
in the source-boat.

An appropriate amount of extra insulation on the lead side may
approximately balance ${\overset{˙}{Q}}_{L}$ and${\overset{˙}{Q}}_{F}$.
However, conductive-loss through the current leads and the temperature
gradient in the heater itself cannot be removed completely. Moreover,
insulation property changes due to material deposition and wear and
tear, will make this a non-robust design. The results of one such
attempt (Run 3) are shown in Figures 63 and 64. The lead side
temperature in this case is observed to be higher than the far side
temperature, suggesting over-use of the insulation at the lead-side.
However, the film thickness non-uniformity is, again, within the desired
limits. Also note that there is a delay between the time when the
controlled boat-bottom temperature reaches steady state and when the
boat-end temperatures attain steady state.

+-----------------------------------+-----------------------------------+
| ![](media/image79                 | ![](media/image80                 |
| .png){width="2.922222222222222in" | .png){width="2.922222222222222in" |
| height="2.191666666666667in"}     | height="2.191666666666667in"}     |
|                                   |                                   |
| []{#__RefHeading___Toc125256068   | []{#__RefHeading___Toc125256069   |
| .anchor}Figure 63. Temperature    | .anchor}Figure 64. Film thickness |
| profiles                          | profile                           |
|                                   |                                   |
| (Run 3).                          | (Run 3).                          |
+-----------------------------------+-----------------------------------+

***Melt Temperature Gradient In Scaled-Up Process***

For the pilot-scale (6"-wide substrate) system, the presence of an
asymmetric melt-surface temperature profile was found to have no serious
effect on the film thickness uniformity. In this section, we investigate
via simulation whether this observation is valid in a scaled-up process.
For co-evaporative inline PVD processes, the scale-up entails
determination of optimum nozzle-to-nozzle distance, nozzle-to-substrate
distance, and boat-to-boat distance such that the material utilization
efficiency is maximized for a given substrate-width, and a film
thickness non-uniformity constraint. In addition to the above mentioned
parameters, there are several other design parameters that have to be
fixed (such as length of the deposition zone, number of nozzles in the
source boat, maximum tolerable substrate temperature, web speed). For a
scaled-up process with 13"-wide substrate, a two-nozzle boat and a film
thickness non-uniformity constraint of 10%, the optimum design
parameters are listed in Table XVII. The other design parameters are
assumed to be same as currently used in the pilot scale-system
(deposition zone = 15 in., web speed = 1 in/min). The material
utilization efficiency, assuming the source-boat is placed at the center
of the deposition zone, is 57%.

[]{#__RefHeading___Toc125256159 .anchor}Table XVII. Scaled-up process.

  ------------------------------------- ---------------------------------
  Design Parameter                      Parameter Value (inch)

  Substrate width                       13

  Nozzle-to-nozzle distance             9.2

  Nozzle-to-substrate distance          8

  Boat-to-boat distance                 3.5
  ------------------------------------- ---------------------------------

Results of simulations conducted to determine how the film thickness
non-uniformity increases with melt-temperature difference underneath the
nozzles are shown in Figure 65. It can be observed that a temperature
difference as low as 5 °C is enough to cause film thickness
non-uniformity to exceed the acceptable limit of 10%. From the
experimental results, we have observed that a temperature difference as
high as 50°C is present between the source-boat ends depending upon the
insulation degradation. The temperature difference is relatively lower
between the melt-surfaces under the nozzles, but greater than 5°C. Thus,
to achieve the desired film thickness uniformity, a change in the
elemental source-boat design is essential.

![](media/image81.png){width="4.36875in" height="3.276388888888889in"}

[]{#__RefHeading___Toc125256070 .anchor}Figure 65. Variation of film
thickness non-uniformity with melt-temperature difference under the two
nozzles.

![](media/image82.png){width="4.409722222222222in"
height="3.298611111111111in"}

[]{#__RefHeading___Toc125256071 .anchor}Figure 66. Nozzle-flow-rate
difference due to temperature gradient.

Figure 66 shows the results of two-dimensional Direct Simulation Monte
Carlo (DSMC) simulations performed for a source-boat with a 30°C
melt-temperature difference under the two nozzles. There is significant
difference between the two nozzle-flow-rates. (The values of the flow
rates are not realistic since it is a 2D simulation; however, the
difference is real); this flow-rate difference is enough to exceed the
film thickness non-uniformity of 11.2% (acceptable limit being 10%).

Maintaining film thickness within desired limits is not realizable
unless equal vapor flow rates through the two nozzles are maintained.
This can be accomplished by the following alternative design approaches:

1.  A design that produces a symmetric temperature profile inside the
    boat so that the melt-surface temperatures under each nozzle are
    equal, and

2.  A design in which nozzles are supplied from a common area on the
    melt surface.

● Symmetric Melt Temperature:

A simple way to obtain symmetric melt temperature profile is to use a
symmetric heater assembly (as shown in Figure 58), thereby providing
equal thermal energy to the two nozzles and also balancing the heat
losses at the boat ends. This design modification

![](media/image83.jpeg){width="6.0in" height="1.6263888888888889in"}

[]{#__RefHeading___Toc125256072 .anchor}Figure 67. Symmetric heater
assembly (Design 1).

(Design 1) achieves the desired equality of the nozzle flow rates since
the melt temperature under each nozzle is equal (see Figure 68). Note
that the melt-temperature profile is symmetric, but not uniform; hence,
introduction of a third center nozzle will entail either reduction in
the nozzle-diameter or decrease in resistive heating in the central part
of the heater.

● Supply From A Common Melt Surface:

There are three other potential ways, as shown in Figures 69, 70, and 71
by which flow through the nozzles can be made to originate from the same
point on the melt surface thus giving equal effusion rates.

a)  Design 2: a cylindrical source-boat with tilted nozzles (Figure 60)
    such that the melt-side nozzle openings are close to each other
    "seeing" the same melt-surface;

b)  Design 3: a linear boat with a mixing chamber (Figure 61) with a
    single central opening to the melt volume;

c)  Design 4: a linear boat with tilted nozzles (Figure 62) placed near
    the center of the boat again "seeing" the same melt-surface.

  ------- -----------------------------------------------------------------
  \(a\)   ![](media/image84.jpeg){width="4.200694444444444in"
          height="2.6in"}

          

  \(b\)   ![](media/image85.jpeg){width="4.202083333333333in"
          height="3.204861111111111in"}
  ------- -----------------------------------------------------------------

[]{#__RefHeading___Toc125256073 .anchor}Figure 68. Temperature gradient
in a symmetric heater in Design 1: (a) 2D distribution, (b) along a
lower branch.

The proposed designs lead to equal nozzle effusion rates and hence
desired film thickness uniformity, provided other design parameters
(such as nozzle-to-substrate ratio and nozzle-to-nozzle distance) are
chosen appropriately. Design 1, where only a symmetric heater assembly
is required, is the simplest and involves minimum change in the system.
Designs 1 and 3 are identical in terms of film thickness uniformity and
material utilization efficiency; however, Design 3 will have lower
nozzle effusion rate than that of Design 1 because the vapor flow is
restricted by the central opening.

+------------------------+---------------------------------------------+
| []{#__Ref              | []{#__RefHeading___Toc125256075             |
| Heading___Toc125256074 | .anchor}Figure 70. Linear boat with central |
| .anchor}Figure 69.     | opening                                     |
| Cylindrical boat with  |                                             |
| tilted nozzles.        | (Design 3)                                  |
|                        |                                             |
| **(Design 2)**         |                                             |
+------------------------+---------------------------------------------+
|                        | []{#__RefHeading___Toc125256076             |
|                        | .anchor}Figure 71. Linear boat with tilted  |
|                        | nozzles (Design 4)                          |
+------------------------+---------------------------------------------+

Figure 72 shows a comparison of Design 1, Design 2, and Design 4 in
terms of thickness non-uniformity (t~nu~) and material utilization
efficiency (m~eff~). Note that for a boat with tilted nozzles, both
t~nu~ and m~eff~ are strong functions of the nozzle tilt angle.

![](media/image89.png){width="4.36875in" height="3.276388888888889in"}

[]{#__RefHeading___Toc125256077 .anchor}Figure 72. Comparison of designs
1, 2 and 4.

Also, note that m~eff~ of Design 2 is significantly lower than that of
Design 1. Material utilization efficiency can be improved for Design 2
by increasing the beam collimation parameter (*n*) from a value of 3 to
5; however, from the DSMC calculation results, it was not possible to
increase the value of *n* (by increasing nozzle length-to-diameter
ratio) since the vapor flow is in transitional regime. Design 4 with
tilted nozzles separated by 4 inches provides improved m~eff~ compared
to Design 2; however, it is still less compared to that of Design 1.

From these arguments, it is clear that Design 1 is the better option
both in terms of ease of implementation and material utilization
efficiency. However, for source-boats with 3 nozzles, Design 4 has the
advantage that the nozzle flow rates are guaranteed to be equal. Future
work involves conducting experiments with the modified source-boat to
evaluate improvements in film thickness uniformity for wider substrates.

It should also be pointed out that source-to-substrate distance, *H*,
affects the source design as well. For example, as shown in Figure 73
for a 13"-wide substrate, film thickness non-uniformity of 10% or lower
cannot be obtained with a two-nozzle source-boat if nozzle-to-substrate
distance is less than 7 inches; a three nozzle boat has to be used.

![](media/image90.png){width="4.36875in" height="3.276388888888889in"}

[]{#__RefHeading___Toc125256078 .anchor}Figure 73. Effect of
source-to-substrate distance, H, on material utilization efficiency and
film thickness non-uniformity.

**3.2 Wide Bandgap Materials: Cu(InAl)Se~2~**

Cu(InAl)Se~2~ based solar cells have demonstrated comparable
efficiencies to Cu(InGa)Se~2~ for bandgap 1.1 -- 1.2 eV;[^72] but, with
higher bandgap V~oc~ with Cu(InAl)Se~2~ is lower than with
Cu(InGa)Se~2.~[^73] In addition, poor adhesion at the Mo/Cu(InAl)Se~2~
interface was identified as a critical issue and was substantially
improved by incorporating a thin, \~ 5 nm, Ga layer sputtered onto the
Mo film prior to the Cu(InAl)Se~2~ deposition.Error: Reference source
not found The improved adhesion enabled films to be deposited at high
substrate temperature T~SS~ = 530°C resulting in higher efficiency
cells. Most notably, with Al/(In+Al) = 0.13 and E~g~ = 1.16 eV, a cell
with 16.9% efficiency was demonstrated after application of an
anti-reflection layer. However, efforts to study devices with increasing
bandgap or to implement different deposition processes were still
severely hampered by poor Mo/Cu(InAl)Se~2~ adhesion, resulting in many
films delaminating during device processing or characterization. An
inverse relation between the Al content at the back of the Cu(InAl)Se~2~
film and adhesion was observed. Consequently, efforts on Cu(InAl)Se~2~
were partly focused during this period on obtaining a more fundamental
understanding of the Mo/CuInSe~2~-alloy interface, and this is discussed
in the section, "Fundamental Materials and Interface Characterization,"
below.

Cu(InAl)Se~2~ films have been deposited by multisource elemental
co-evaporation onto Mo-coated soda lime glass substrates. In addition to
characterization of the back contact, efforts on Cu(InAl)Se~2~ have
focused on developing alternative evaporation sequences and a more
complete understanding of the material.

Cu(InAl)Se~2~ films have been deposited using a 3-stage evaporation
process, incorporating end-point detection of the substrate temperature
(T~SS~) to control the final composition. A description of the process
and characterization of the films follows. Figure 74 shows the
time-temperature profile of the elemental sources and the substrate
heater power during a typical deposition. Figure 66 shows the measured
T~SS~ profile during a typical deposition. The 3-stage process is
characterized by sequential deposition and reaction of 3 layers. In the
first stage, In, Al, and Se are deposited on the Mo coated soda-lime
glass at relatively low T~SS~. Subsequently, Cu and Se are deposited
onto the film to form the chalcopyrite phase at higher T~SS~ and then
continued to form a Cu-Se phase on the film surface. Finally, In, Al,
and Se are deposited to make the film slightly Cu poor, so it is
suitable for devices. The typical final composition gives
\[Cu\]/\[In+Al\] = 0.8-0.9. Figure 75 shows that at time A during the
second stage, a sudden drop in T~SS~ can be measured. This corresponds
to the formation of the Cu-Se phase on the film, which changes the
emissivity. T~SS~ later increases when the Cu-Se phase is consumed in
the third stage. The reproducibility of the 3-stage process owes to the
temperature drop at time A, since it enables the operator to carefully
monitor the subsequent film growth.

![](media/image91.wmf){width="3.9506944444444443in"
height="3.064583333333333in"}

[]{#__RefHeading___Toc125256079 .anchor}Figure 74. Source temperatures
and substrate heater power during the deposition.

![](media/image92.wmf){width="4.361111111111111in"
height="2.8361111111111112in"}

[]{#__RefHeading___Toc125256080 .anchor}Figure 75. Typical substrate
temperature profile and its first derivative.

Films were grown with different relative Al contents and the (112) XRD
peaks are shown in Figure 76. Clear shifts to high angle and broadening
of the peak with increasing Al content (\[Al\]/\[In+Al\]) can be seen.
In Figure 77, the surface morphology of low (\[Al\]/\[In+Al\]=0.17) and
high (\[Al\]/\[In+Al\]=0.58) Al content films are shown by SEM
micrographs. The low Al film contains 1-2 μm grains, while the high Al
film has submicron grains.

![](media/image93.wmf){width="3.8784722222222223in"
height="2.872916666666667in"}

[]{#__RefHeading___Toc125256081 .anchor}Figure 76. 112 XRD peaks from
films with various Al content.

![](media/image94.wmf){width="5.175in" height="1.6631944444444444in"}

[]{#__RefHeading___Toc125256082 .anchor}Figure 77. Surface morphologies
of (a) low Al (\[Al\]/\[In+Al\])=0.17) and (b) high
Al(\[Al\]/\[In+Al\])=0.58) content films.

Solar cells were fabricated using the standard device structure with
CdS/ZnO/ITO window layers. Figure 78 shows J-V curves of the best solar
cells with different Al content. Devices with \[Al\]/\[In+Al\]\~0.2 show
a reproducible efficiency \> 12%. So far, the best performance obtained
is an efficiency of 13.6%, with V~oc~ = 0.546V, J~SC~ = 32.8 mA/cm^-2^,
FF = 75.9 % so no improvement with the 3-stage process has been
achieved. As previously reported, higher \[Al\]/\[In+Al\] samples
generally peel off during CdS buffer layer deposition. The exception is
with stoichiometric or Cu-rich films with \[Cu\]/\[In+Al\] ≥ 1.0 which
have better adhesion. Devices in this case, as with \[Al\]/\[In+Al\] =
0.52 in Figure 78, are fabricated after a KCN etch.

![](media/image95.wmf){width="3.188888888888889in"
height="2.9965277777777777in"}

[]{#__RefHeading___Toc125256083 .anchor}Figure 78. J-V curves with (a)
\[Al\]/\[In+Al\]=0.25, (b) \[Al\]/\[In+Al\]=0.33, and (c)
\[Al\]/\[In+Al\]=0.52.

Evaporation of Cu(InAl)Se~2~ using the 3-stage process is complicated in
the baseline IEC evaporators by the relatively slow thermal response
times of the insulated Knudsen-type sources. Thus, a simplified version
of this process was also developed. In Figure 78, schematic temperature
profile of the metal sources during this process is shown. The In and Al
source temperatures are kept constant and determine the relative Al
content. Once the shutter is opened, the Cu source temperature is ramped
from 1100°C to a designated temperature (e.g. 1350°C in the case show)
with a ramp rate of 10°C/min. Then T(Cu) is held constant. The final Cu
temperature is determined so that the impingement rate of Cu is higher
than the sum of In and Al (\[Cu\]/\[In+Al\] \>1), and the film
composition changes from Cu poor to Cu rich. Figure 79 shows a typical
substrate temperature profile during the deposition. Similar to the
3-stage process, the temperature changes under constant substrate heater
power. Due to the formation and then consumption of Cu-Se phases, these
changes can be measured and used for composition control. After the film
becomes Cu-rich, the Cu source is turned off; and when the film becomes
sufficiently Cu-poor again, the In and Al sources are turned off.

Cu(InAl)Se~2~ films deposited with this process have similar morphology
to those deposited with the standard 3-stage process. This process can
be easily modified to start the deposition with different relative
Cu-contents, as long as \[Cu\]/\[In+Al\] \<1 at the start.

![](media/image96.wmf){width="3.801388888888889in"
height="2.7993055555555557in"}

[]{#__RefHeading___Toc125256084 .anchor}Figure 79. Source temperatures
and substrate heater power during the deposition.

![](media/image97.wmf){width="3.81875in" height="2.8020833333333335in"}

[]{#__RefHeading___Toc125256085 .anchor}Figure 80. Substrate temperature
profile during a Cu(InAl)Se~2~ deposition using the profile in Figure
65.

The simplified 3-stage process has been used to study the effect of
initial Cu concentration on devices behavior. One of the fundamental
questions regarding Cu(InAl)Se~2~ films is whether they form an ordered
vacancy compound (OVC) in analogy to Cu(InGa)Se~2~. Cu-In-Al-Se films
were deposited using the modified 3-stage process described in the May
2005 report under this subcontract and with different relative
Cu/(In+Al) contents. The film compositions from EDS analyses are listed
in Table XVIII. Sample 50607 with 23 at.% Cu has the reference
composition of the chalcopyrite crystal structure. The composition
formulas of samples 50608 and 50610 are
Cu(In~0.85~,Al~0.15~)~2.2~Se~3.8~ and Cu(In~0.85~,Al~0.15~)~2.9~Se~5.0~,
respectively. An XRD profile of sample 50610 is shown in Figure 81 where
characteristic peaks of the OVC type structure against the chalcopyrite
structure are indicated. A similar XRD profile was obtained for sample
50608.

[]{#__RefHeading___Toc125256160 .anchor}Table XVIII. Chemical
composition of Cu(InAl)Se~2~ films determined by EDS analyses.

+---------+-------+-------+-------+-------+------------------------+
| Sample  | Cu    | In    | Al    | Se    | Composition formula    |
|         |       |       |       |       |                        |
|         | (     | (     | (     | (     |                        |
|         | at.%) | at.%) | at.%) | at.%) |                        |
+---------+-------+-------+-------+-------+------------------------+
| 50607   | 23    | 23    | 3     | 51    | Cu(In~0.88~            |
|         |       |       |       |       | ,Al~0.12~)~1.1~Se~2.3~ |
+---------+-------+-------+-------+-------+------------------------+
| 50608   | 14    | 27    | 5     | 54    | Cu(In~0.85~            |
|         |       |       |       |       | ,Al~0.15~)~2.2~Se~3.8~ |
+---------+-------+-------+-------+-------+------------------------+
| 50610   | 11    | 28    | 5     | 56    | Cu(In~0.85~            |
|         |       |       |       |       | ,Al~0.15~)~2.9~Se~5.0~ |
+---------+-------+-------+-------+-------+------------------------+

![](media/image98.wmf){width="4.000694444444444in"
height="3.0006944444444446in"}

[]{#__RefHeading___Toc125256086 .anchor}Figure 81. XRD pattern of a film
with composition Cu(In~0.85~,Al~0.15~)~2.9~Se~5.0~. Peaks characteristic
of the OVC structure are indicated.

Solar cell performance decreases dramatically with the lower Cu
concentrations as shown by the J-V curves in Figure 82 and in Table XIX.
QE curves in the dark and under illumination are shown in Figure 83. As
shown, a rough estimation of E~g~ can be made from the long wavelength
edge of the dark QE. This indicates a widening of E~g~ with changing the
structure type from the chalcopyrite to OVC, similar to the system of
Cu-(In,Ga)-Se. Sample 50607 of the chalcopyrite type has E~g~ ≈ 1.14 eV,
as shown in Figure 74(a), coinciding with E~g~ calculated from the film
composition. Sample 50608 has a wavelength tail that could be related to
a mixture of the chalcopyrite and OVC phases. From the QE of sample
50610, E~g~ ≈ 1.32 eV can be estimated. With the 2 lower Cu content
films in Figures 83(b) and 83(c), distinct difference in the QE curves
in the dark and under illumination are seen corresponding to the poor
device J-V performance.

[]{#__RefHeading___Toc125256161 .anchor}Table XIX. Cu(InAl)Se~2~ solar
cell properties with different Cu content (J-V curves and Cu content
shown in Figure 82).

+-------------+-------------+-------------+-------------+-------------+
| Sample      | Eff.        | V~oc~       | J~SC~       | FF          |
|             |             |             |             |             |
|             | (%)         | \(V\)       | (mA/cm^2^)  | (%)         |
+-------------+-------------+-------------+-------------+-------------+
| 50607       | 11.5        | 0.577       | 28.8        | 0.692       |
+-------------+-------------+-------------+-------------+-------------+
| 50608       | 3.8         | 0.385       | 21.2        | 0.483       |
+-------------+-------------+-------------+-------------+-------------+
| 50610       | 0.7         | 0.231       | 9.9         | 0.291       |
+-------------+-------------+-------------+-------------+-------------+

![](media/image99.wmf){width="3.861111111111111in"
height="3.192361111111111in"}

[]{#__RefHeading___Toc125256087 .anchor}Figure 82. Cu(InAl)Se~2~ solar
cell J-V curves with different Cu content.

![](media/image100.wmf){width="3.0902777777777777in"
height="6.497916666666667in"}

[]{#__RefHeading___Toc125256088 .anchor}Figure 83. QE curves of
Cu-In-Al-Se samples (a) 50607, (b) 50608, and (c) 50610 with
compositions indicated in Table XV.

***Cu(InGa)(SeS)~2~ Formation by H~2~Se/H~2~S Reaction***

The manufacture of Cu(InGa)(SeS)~2~ films by selenization/sulfization of
metallic precursors is a scalable process that has been used to produce
modules with photovoltaic conversion efficiencies in excess of
13%.[^74]^,^[^75] Despite the successful demonstration of various
selenization/sulfization processes at the laboratory and module
scales,[^76]^,^[^77] some fundamental questions still remain regarding
the reaction pathways and development of various elemental concentration
profiles during growth. It is anticipated that more detailed studies of
this process will ultimately lead to improvements in the process itself,
and to a better understanding of the Cu(InGa)(SeS)~2~ system in general.

The accumulation of Ga at the back contact during selenization of
metallic precursors was initially reported by Jensen et al.[^78] but the
driving force for Ga movement towards the back contact is still not
entirely clear. Two methods have been demonstrated to homogenize the Ga
in selenized films: 1) annealing at \>500ºC in an inert atmosphere (no
Se);[^79] and 2) sulfization at \>500ºC of partially selenized
films.Error: Reference source not found Ga accumulation and
homogenization may both be significant mechanisms for influencing device
performance.

The selenization/sulfization process as performed at IEC utilizes an
atmospheric pressure quartz tube reactor heated by an external heating
jacket. The process is performed under flowing Ar, with 0.35% H~2~Se or
H~2~S as appropriate, and O~2~, if desired, at a concentration of
0.0035%. Selenizations are typically performed at 400 -- 450ºC, while
sulfizations are performed at 500 -- 550ºC.

[Characterization of Metallic Precursor Layers]{.underline}

Precursors were deposited by sequentially sputtering a Cu-Ga alloy film
from a Cu~0.8~Ga~0.2~ target followed by an elemental In layer onto a
Mo-coated soda lime glass substrate. The thicknesses of the films were
349 nm for the Cu-Ga film and 489 nm for the In film to give an overall
composition of Cu/(In+Ga) = 0.9 and Ga/(In+Ga) = 0.22.

To approximate the Cu-Ga-In phase equilibrium at typical selenization
conditions, samples were heat treated at 450ºC for 10 minutes in the
absence of hydride, with and without O~2~. Figure 84 shows the CuKα~1~
x-ray diffraction (XRD) spectrum of one of these samples. The detected
phases include In and a Cu~9~In~4~-Cu~9~Ga~4~ (γ1) alloy with
composition Cu~9~(Ga~0.36~In~0.64~)~4~ estimated from the peak position
by assuming Vegard's law applies. In~2~O~3~ is observed in the sampled
annealed in 0.0035% O~2~, but not observed in the sample annealed in Ar
only. The as-sputtered precursor, shown for comparison, is comprised of
In, CuIn, and Cu~3~Ga.

![](media/image101.png){width="3.401388888888889in"
height="3.401388888888889in"}

[]{#__RefHeading___Toc125256089 .anchor}Figure 84. CuKα~1~ XRD spectra
of Cu-Ga-In precursors. Phases: 1 -- In; 2 -- CuIn ; 3 -- Cu~3~Ga; 4 --
Cu; 5 -- Cu~9~In~2.6~Ga~1.4~ (γ1); 6 -- Mo; 7 -- In~2~O~3~.

[Cu(InGa)Se~2~ Formation by reaction of H~2~Se with Cu-Ga-In
precursors]{.underline}

Cu-Ga-In precursors were selenized at 450ºC in 0.0035% O~2~ for 10, 30,
and 90 minutes. Samples were analyzed as-reacted, and also peeled from
the Mo back contact for interface analysis.

The surface morphology of the selenized films, shown in Figure 85, does
not show a significant change with increasing reaction time. Composition
of the films measured by EDS is shown in Table III with Ga/(In+Ga) ≤
0.03. XRD analysis (Figure 86), which indicates a chalcopyrite structure
with Ga/(Ga+In) content of \<5% by Vegard analysis, is consistent with
the EDS measurements. This is different than previously reported results
where a small peak due to CuGaSe~2~ was also identified.Error: Reference
source not found The 10-minute XRD spectrum additionally indicates the
presence of a Cu~9~(Ga~0.8~In~0.2~)~4~ intermetallic, and what is
believed to be the CuGa~2~ phase. CuGa~2~ has been observed previously
under varying conditions by Dittrich,[^80] Lindahl,[^81] and
Marudachalam.[^82]

The backside morphologies of the peeled films, shown in Figure 87,
exhibit significant voiding at all reaction times. EDS measurements of
the backsides, also listed in Table XX, indicate higher Cu and Ga
content than the front.

![](media/image102.wmf)

[]{#_Ref115948082 .anchor}

Figure 85. SEM micrographs of precursors selenized for 10, 30, and 90
minutes at

450ºC in 0.35% H~2~Se:0.0035% O~2~:balance Ar.

[]{#__RefHeading___Toc125256162 .anchor}Table XX. Compositions by EDS of
selenized films.

+-----------+-------+-------+-------------+-------+-------+----------+
| H~2~Se    | Front |       |             | Bac   |       |          |
| time      | side  |       |             | kside |       |          |
|           |       |       |             |       |       |          |
| (min)     |       |       |             |       |       |          |
+-----------+-------+-------+-------------+-------+-------+----------+
|           | $$\   | $$\   | Se          | $$\   | $$\   | Se       |
|           | frac{ | frac{ |             | frac{ | frac{ |          |
|           | \text | \text | (at. %)     | \text | \text | (at. %)  |
|           | {Cu}} | {Ga}} |             | {Cu}} | {Ga}} |          |
|           | {\tex | {\tex |             | {\tex | {\tex |          |
|           | t{In} | t{In} |             | t{In} | t{In} |          |
|           |  + \t |  + \t |             |  + \t |  + \t |          |
|           | ext{G | ext{G |             | ext{G | ext{G |          |
|           | a}}$$ | a}}$$ |             | a}}$$ | a}}$$ |          |
+-----------+-------+-------+-------------+-------+-------+----------+
| 10        | 0.96  | 0.03  | 46.5        | 0.53  | 0.16  | 44.2     |
+-----------+-------+-------+-------------+-------+-------+----------+
| 30        | 1.00  | 0.02  | 46.2        | 0.71  | 0.42  | 47.9     |
+-----------+-------+-------+-------------+-------+-------+----------+
| 90        | 1.01  | 0.02  | 46.4        | 0.81  | 0.48  | 47.3     |
+-----------+-------+-------+-------------+-------+-------+----------+

![](media/image103.png){width="2.9965277777777777in"
height="2.9965277777777777in"}

[]{#__RefHeading___Toc125256091 .anchor}Figure 86. CuKα~1~ broad scans
of selenized films, indicating very little Ga incorporation into the
chalcopyrite lattice. Peaks designated "+" and "\*" are
Cu~9~(Ga~0.8~In~0.2~)~4~ and CuGa~2~, respectively.

![](media/image104.wmf)

[]{#_Ref115948091 .anchor}

Figure 87. Backsides of peeled selenized films.

Inspection of the Mo back contact after Cu(InGa)Se~2~ peel-off reveals
residual nodules shown in Figure 88. EDS measurements shown in Table XXI
indicate that the nodules contain negligible Se. The measurements at all
three reaction times indicate a Cu/(Ga+In) ratio of approximately 1.85.
The intermetallic phase at 10 min has a small amount of In, while those
at 30 and 90 min are comprised solely of Cu and Ga. The identification
of these nodules as intermetallics is further confirmed by XRD analysis
as shown in Figure 89.

![](media/image105.wmf)

[]{#_Ref115948120 .anchor}

Figure 88. Residual intermetallics on Mo back contact after peeling of
Cu(InGa)Se~2~ films.

[]{#__RefHeading___Toc125256163 .anchor}Table XXI. Composition by EDS of
residual intermetallic compounds on Mo back contact.

+--------+--------+--------+--------+--------+----------+----------+
| Se     | Cu     | In     | Ga     | Se     | $$\      | $$\      |
| time   |        |        |        |        | frac{\te | frac{\te |
|        | at%    | at%    | at%    | at%    | xt{Cu}}{ | xt{Ga}}{ |
| (min)  |        |        |        |        | \text{In | \text{In |
|        |        |        |        |        | } + \tex | } + \tex |
|        |        |        |        |        | t{Ga}}$$ | t{Ga}}$$ |
+--------+--------+--------+--------+--------+----------+----------+
| 10     | 52.8   | 6.5    | 21.4   | 3.2    | 1.89     | 0.77     |
+--------+--------+--------+--------+--------+----------+----------+
| 30     | 52.1   | 0.0    | 27.5   | 0.8    | 1.90     | 1.00     |
+--------+--------+--------+--------+--------+----------+----------+
| 90     | 42.9   | 0.05   | 24.4   | 1.2    | 1.76     | 1.00     |
+--------+--------+--------+--------+--------+----------+----------+

![](media/image106.png){width="2.9965277777777777in"
height="2.9965277777777777in"}

[]{#__RefHeading___Toc125256094 .anchor}Figure 89. XRD spectra of
exposed Mo back contacts. The γ1 411 peak is shifted from that shown in
Figure 75 due to the absence of alloyed In.

These results demonstrate the incongruent reaction of Cu-Ga-In
intermetallics in H~2~Se, with the extraction of In being favored over
that of Ga. Qualitatively, the slow depletion of the Cu-Ga intermetallic
phase correlates with the slow incorporation of Cu and Ga into the
backside of the Cu(InGa)Se~2~ film. The segregation caused by the
preferred reaction of In may be a contributing mechanism to the
migration of Ga to the backside of selenized Cu-Ga-In precursor films.

[Cu(InGa)S~2~ Formation by Reaction of H~2~S with Cu-Ga-In
Precursors]{.underline}

Cu-Ga-In precursors were also reacted in H~2~S under identical
conditions. Unlike the selenization experiments, excessive In
agglomeration is observed on the surface, resulting in spherical In
nodules approximately 50 μm in diameter. Micrographs of the films and
nodules are shown in Figures 90 and 91, respectively. The compositions
of the films are shown in Table XXI.

XRD analysis of the sulfized films indicates a very complicated phase
structure. At least three distinct Cu(GaIn)S~2~ compositions are
apparently present, with the possibility of graded chalcopyrite
compositions also existing. Broad scans are shown in Figure 92, with
(112) line profiles shown in Figure 93. The 10- and 30-minute broad
scans exhibit a Cu-In intermetallic peak that is exhibited by multiple
Cu~x~In~y~ phases. EDS data indicates that the composition of these
phases corresponds to the Cu~16~In~9~ phase, consistent with the
observed XRD peak. The line profiles of Figure 93 clearly indicate a
slow incorporation of In into the chalcopyrite -- the opposite
observation of selenized films.

![](media/image107.wmf)

[]{#__RefHeading___Toc125256095 .anchor}Figure 90. SEM micrographs of
precursors sulfized for 10, 30, and 90 minutes at 450ºC in 0.35%
H~2~S:0.0035% O~2~:balance Ar.

![](media/image108.wmf)

[]{#__RefHeading___Toc125256096 .anchor}Figure 91. In-rich nodules on
surface of sulfized films.

[]{#__RefHeading___Toc125256164 .anchor}Table XXII. Composition of
sulfized films shown in Figure 90.

+--------+--------+--------+--------+--------+----------+----------+
| S time | Cu     | In     | Ga     | S      | $$\      | $$\      |
|        |        |        |        |        | frac{\te | frac{\te |
| (min)  | at%    | at%    | at%    | at%    | xt{Cu}}{ | xt{Ga}}{ |
|        |        |        |        |        | \text{In | \text{In |
|        |        |        |        |        | } + \tex | } + \tex |
|        |        |        |        |        | t{Ga}}$$ | t{Ga}}$$ |
+--------+--------+--------+--------+--------+----------+----------+
| 10     | 24.3   | 15.2   | 9.6    | 50.9   | 0.98     | 0.39     |
+--------+--------+--------+--------+--------+----------+----------+
| 30     | 25.2   | 17.2   | 8.1    | 49.5   | 1.00     | 0.32     |
+--------+--------+--------+--------+--------+----------+----------+
| 90     | 25.6   | 21.4   | 4.1    | 47.2   | 1.01     | 0.16     |
+--------+--------+--------+--------+--------+----------+----------+

![](media/image109.png){width="2.9965277777777777in"
height="2.9965277777777777in"}

[]{#__RefHeading___Toc125256097 .anchor}Figure 92. CuKα~1~ spectra of
sulfized films. The peak labeled Cu~x~In~y~ is exhibited by multiple
Cu-In alloys, but is likely Cu~16~In~9~ based on the EDS data.

![](media/image110.png){width="2.9965277777777777in"
height="2.9965277777777777in"}

[]{#__RefHeading___Toc125256098 .anchor}Figure 93. CrKα 112 line
profiles of sulfized films.

The sulfized films were also peeled from the Mo back contacts for
backside analysis. Unlike the selenized films, the sulfized films left
no appreciable residue on the Mo back contact after peeling. Backsides
of the sulfized films are shown in Figure 94, with the corresponding EDS
data shown in Table XXIII. The distinct, monochromatically colored light
regions are Cu-In intermetallics, as indicated by the EDS data in Table
XXIII.

![](media/image111.wmf)

[]{#__RefHeading___Toc125256099 .anchor}Figure 94. Backside SEM
micrographs of films sulfized for 10, 30, and 90 minutes.

[]{#__RefHeading___Toc125256165 .anchor}Table XXIII. Composition by EDS
of sulfized film backsides.

+--------+--------+--------+--------+--------+----------+----------+
| S time | Cu     | In     | Ga     | S      | $$\      | $$\      |
|        |        |        |        |        | frac{\te | frac{\te |
| (min)  | at%    | at%    | at%    | at%    | xt{Cu}}{ | xt{Ga}}{ |
|        |        |        |        |        | \text{In | \text{In |
|        |        |        |        |        | } + \tex | } + \tex |
|        |        |        |        |        | t{Ga}}$$ | t{Ga}}$$ |
+--------+--------+--------+--------+--------+----------+----------+
| 10     | 29.75  | 20.79  | 9.21   | 40.26  | 0.99     | 0.31     |
+--------+--------+--------+--------+--------+----------+----------+
| 30     | 29.74  | 19.26  | 8.63   | 42.37  | 1.07     | 0.31     |
+--------+--------+--------+--------+--------+----------+----------+
| 90     | 24.97  | 17.20  | 8.25   | 49.58  | 0.98     | 0.32     |
+--------+--------+--------+--------+--------+----------+----------+

[]{#__RefHeading___Toc125256166 .anchor}Table XXIV. Composition of
intermetallics on sulfized film backsides.

+--------+--------+--------+--------+--------+----------+----------+
| S time | Cu     | In     | Ga     | S      | $$\      | $$\      |
|        |        |        |        |        | frac{\te | frac{\te |
| (min)  | at%    | at%    | at%    | at%    | xt{Cu}}{ | xt{Ga}}{ |
|        |        |        |        |        | \text{In | \text{In |
|        |        |        |        |        | } + \tex | } + \tex |
|        |        |        |        |        | t{Ga}}$$ | t{Ga}}$$ |
+--------+--------+--------+--------+--------+----------+----------+
| 10     | 60.38  | 34.44  | 1.50   | 3.68   | 1.68     | 0.04     |
+--------+--------+--------+--------+--------+----------+----------+
| 30     | 62.08  | 35.94  | 0.96   | 1.02   | 1.68     | 0.03     |
+--------+--------+--------+--------+--------+----------+----------+

[Cu(InGa)(SeS)~2~ Formation by H~2~Se/H~2~S Reaction]{.underline}

A process to form Cu(InGa)(SeS)~2~ by a two step reaction in H~2~Se at
400 -- 450°C followed by reaction in H~2~S at higher temperature has
been shown to produce a uniform Ga distribution.Error: Reference source
not found^,Error:\ Reference\ source\ not\ found^ The key process
variables to control the film composition are the gas concentrations and
the temperatures and durations of the two reaction steps.

Cu(InGa)(SSe)~2~ films were formed by the reaction of precursor
structures with H~2~Se at either 400 or 450ºC followed by H~2~S at 500
or 550ºC. Four time-temperature profiles were investigated and are
summarized in Table XXV. Processes 1 and 2, using a 400ºC H~2~Se
reaction, were both found to be incompletely reacted after the 500ºC
H~2~S reaction, and intermetallic phases were detected by XRD. Process
3, utilizing a 30 min H~2~Se reaction at 450ºC, gave Ga/(In+Ga) = 0.08
by EDS, less than the value of 0.2 in the precursor. It is suspected
that the H~2~Se reaction was carried too far, so that there was
insufficient Cu~9~Ga~4~ for Ga homogenization. Process 4, with a 15 min
H~2~Se reaction at 450ºC followed by a 30 min 550ºC H~2~S reaction,
produced the high performance Cu(InGa)(SeS)~2~ film characterized below.

[]{#__RefHeading___Toc125256167 .anchor}Table XXV. Summary of
investigated time-temperature profiles for two-step reaction of metallic
precursors.

+------+--------+--------+----------+--------+-----------------------+
| Pro  | H~2~Se | H~2~S  | Ga       | S/     | Comments              |
| cess |        |        | /(Ga+In) | (S+Se) |                       |
|      | re     | re     |          |        |                       |
|      | action | action |          |        |                       |
+------+--------+--------+----------+--------+-----------------------+
| 1    | 400ºC  | 500ºC  | 0.21     | 0.47   | Residual              |
|      |        |        |          |        | intermetallics\       |
|      | 30 min | 15 min |          |        | Shorted devices       |
+------+--------+--------+----------+--------+-----------------------+
| 2    | 400ºC  | 500ºC  | 0.16     | 0.46   | Residual              |
|      |        |        |          |        | intermetallics,\      |
|      | 45 min | 15 min |          |        | Shorted devices       |
+------+--------+--------+----------+--------+-----------------------+
| 3    | 450ºC  | 550ºC  | 0.08     | 0.25   | Ga not homogenized,\  |
|      |        |        |          |        | Flaking in CdS bath   |
|      | 30 min | 15 min |          |        |                       |
+------+--------+--------+----------+--------+-----------------------+
| 4    | 450ºC  | 550ºC  | 0.17     | 0.28   | Ga homogeneous\       |
|      |        |        |          |        | Device: V~OC~ =0.64   |
|      | 15 min | 30 min |          |        | V, 13.2% efficiency   |
+------+--------+--------+----------+--------+-----------------------+

The composition of the reacted film from process 4 measured by EDS is
Cu/(In+Ga) = 0.90, Ga/(In+Ga) = 0.17, and S/(Se+S) = 0.28. The relative
Cu, Ga, and In compositions match the precursor. The XRD spectrum, shown
in Figure 95, indicates a high degree of compositional uniformity within
the Cu(InGa)(SeS)~2~ phase, as evidenced by the narrow peak width. All
peaks index to Mo or Cu(InGa)(SeS)~2~ except a small peak at 21.8º,
which might indicate residual In(SSe) within the film. Compositional
depth profiles measured by Auger electron spectroscopy (measured by
Craig Perkins at NREL) are shown in Figure 96. These indicate a uniform
through-film Ga/(In+Ga) profile but a steep S gradient near the surface.

![](media/image112.png){width="2.9965277777777777in"
height="2.798611111111111in"}

[]{#__RefHeading___Toc125256100 .anchor}Figure 95. XRD spectrum of
Cu(InGa)(SeS)~2~ from process 4. (1 = Cu(InGa)(SeS)~2~;\
2 = Mo; \* = unknown).

Devices were fabricated using a SL/Mo/Cu(InGa)(SeS)~2~/CdS/ZnO/ITO/Ni-Al
grid structure. The best device had efficiency = 13.2 % with V~oc~ =
0.641 V, J~sc~ = 31.6 mA/cm^2^, and FF =

65.1 %. The relatively poor FF may be due to a barrier-to-collection of
electrons caused by the steep S gradient.

\(a\) ![](media/image113.png){width="3.8958333333333335in"
height="2.908333333333333in"}

\(b\) ![](media/image114.png){width="3.8875in" height="2.89375in"}

[]{#__RefHeading___Toc125256101 .anchor}Figure 96. Compositional depth
profile of Cu(InGa)(SeS)~2~ formed by two-step reaction in H~2~Se and
H~2~S process 4.

The above results demonstrate the difficulties with the exclusive
reaction of either selenium or sulfur, and indicate the benefit, if not
necessity, of a 2-step reaction: Se to incorporate In into the
chalcopyrite lattice, and S to incorporate the Ga. The selenization and
sulfization data lend significant insight into the mechanisms of 2-step
selenization/sulfization processes. Indium is preferentially reacted
during the selenization step, while the sulfization step reacts the
remaining Cu-Ga intermetallic. The 2-step process appears to encompass
two issues: 1) the quantity of Cu~9~Ga~4~ remaining after the
selenization step, and 2) the transport mechanism of Ga resulting in a
homogenous Ga profile. The quantity of Cu~9~Ga~4~ present after the
selenization step is determined by temperature and reaction time. The Ga
transport mechanism is still unknown.

***Fundamental Materials and Interface Characterization***

[Cu(InGa)Se~2~ Optical Characterization]{.underline}

One of the properties of Cu(InGa)Se~2~ that make it uniquely promising
for thin film solar cells is its tolerance to deviations in
stoichiometry and composition. High efficiency solar cells have been
demonstrated using Cu(InGa)Se~2~ films with the Cu atomic concentration
from 21 to 25 % and the effect of varying y ≡ Ga/(In+Ga) from CuInSe~2~
to CuGaSe~2~ has been studied extensively.[^83] The compositions of
Cu-In-Se thin films tend to fall along the quasibinary tie-line between
Cu~2~Se and In~2~Se~3~. Thus, the CuInSe~2~ film composition can be
written as (Cu~2~Se)~x~(In~2~Se~3~)~1‑x~. A section of the
Cu~2~Se--In~2~Se~3~ tie-line taken from the comprehensive Cu-In-Se phase
diagram of Gödecke et al.[^84] is shown in Figure 97. The composition in
most solar cells falls in the single phase α region or the mixed phase
α + δ~R~ region where α includes stoichiometric CuInSe~2~ with x = 0.5
and δ~R~ includes CuIn~3~Se~5~ with x = 0.25. The δ~R~-CIS phase is
commonly referred to as an ordered defect compound, since it maintains
the chalcopyrite structure of the α phase with a crystallographic
ordering of defects. In addition, the In~2~Se~3~ end-point of the
tie-line can be alloyed with Ga to form (In~1‑y~Ga~y~)~2~Se~3~ and
measured film compositions still fall along the tie line. Therefore,
CIGS is used as shorthand for the composition described by
(Cu~2~Se)~x~\[(In~1‑y~Ga~y~)~2~Se~3~\]~1‑x~. The CIGS phase diagram is
assumed to follow an analogous phase diagram in the region of Figure 97,
although the range of the α-CIGS phase may be expanded with the
inclusion of Ga.[^85] Similarly, the addition of Na in most thin films
extends the range of α-CIGS.Error: Reference source not found

![](media/image115.wmf){width="3.3402777777777777in" height="3.20625in"}

[]{#__RefHeading___Toc125256102 .anchor}Figure 97. Cu~2~Se-In~2~Se~3~
quasibinary phase diagram from Reference Error: Reference source not
found. Triangles indicate the compositions of CIGS films characterized
in this work.

Complete characterization of the optical properties of CIGS must address
the variations in composition and stoichiometry. In particular, the
optical constants must be specified as a function of relative Ga
concentration over the complete range 0 ≤ y ≤ 1 and of Cu
off-stoichiometry over the region 0.25 ≤ x ≤ 0.5 which includes the α
and δ~R~ phases in films used for solar cells. The α-CIS range is
relatively narrow at room temperature but the δ~R~-CIS range is very
broad, extending roughly from 10 ≤ Cu ≤ 15 % or 0.25 ≤ x ≤ 0.33. The
behavior of the optical constants in the mixed phase α + δ~R~ region
will depend on the volume fraction of the phases and, in general, on how
the phases are mixed. XPS studies of these films revealed a Cu deficient
surface layer on CIGS films with composition similar to
CuIn~3~Se~5~.[^86] However, it is not clear that there is a distinct
surface layer of this compound.

Optical characterization involves determining the dielectric response or
dipole moment per unit volume of the material. In this work, variable
angle spectroscopic ellipsometry (SE) has been used to determine the
dielectric response of CIGS thin films as a function of relative Ga
content and to study the effects of Cu off-stoichiometry. We have
previously developed a method to characterize CIGS films despite their
surface roughness, which can make the films unsuitable for SE
analysis.[^87] Accurate values of the refractive index (n) and
extinction coefficient (k) were obtained and the effects of varying Ga
concentration on the electronic transitions determined. By comparison to
single crystal results,[^88] it was shown that the polycrystalline
nature of the films did not affect the optical constants indicating that
the change in the path length as a result of grain boundary reflection
is not significant.Error: Reference source not found It was further
shown that the presence of Na did not affect the optical properties.

The dielectric response of a polycrystalline or amorphous material can
be used to determine the volume fraction of the materials in a mixed
phase by combining the individual dielectric responses of the
constituent phases using models incorporating an effective medium
approximation (EMA). The quasibinary phase diagram in Figure 65 does not
contain any eutectic points so a precipitation of secondary phases is
expected rather than a homogeneous mixture of phases. This may lead to
the formation of grains of dominant phases decorated with precipitate
from the secondary phase, a case approximated by the Maxwell Garnett
EMA.[^89] However for compositions for which the two phases are equally
present it may not be appropriate to define a dominant phase and a
Bruggeman EMA may be more appropriate.Error: Reference source not found

In this work, we first present SE characterization of single phase α and
δ~R~ CIGS films and review the effect of Ga concentration in α-CIGS.
Then extensive ellipsometric measurements on CIGS films with y ≈ 0.3 and
x varying from \~ 0.25 to 0.5 to include the δ~R~ and α phases are
presented. These mixed phase samples are analyzed using both EMA models
to determine the volume fraction of the two phases.

***Optical Characterization: Experimental Details***

CIGS films were deposited by elemental evaporation from Cu, In, Ga, and
Se sources with 550°C substrate temperature and constant elemental
fluxes through the deposition to form films with uniform through-film
composition. All films were deposited on Mo-coated soda lime glass
substrates so they contained Na due to diffusion from the glass.
Baseline characterization of the films included energy dispersive x-ray
spectroscopy at 20kV to determine elemental composition. The Cu
concentrations of the CIGS films characterized in this report are shown
in Figure 87 relative to the phase diagram, although it must be
re-iterated that the phase diagram may differ with the addition of Ga.
All films had y = 0.3.

SE measurements were made with a J.A. Woollam Variable Angle
Spectroscopic Ellipsometer over the energy range of 0.75--4.6 eV using
the procedure described previously.Error: Reference source not found Mo
was deposited on the exposed surface of the CIGS and then the films were
peeled to expose the CIGS back surface, providing a smooth surface for
characterization. Measurements were carried out at room temperature
keeping the sample under argon flow to minimize the surface
contamination or oxidation. Optical modeling was carried out using the
WVASE^®^ software from J. A. Woollam.

The SE measurements determine ψ and ∆, the changes in phase and
amplitude of the reflected light. Determination of the optical constants
from ψ and ∆ requires the construction of an optical model for the
peeled CIGS samples as shown in Figure 98. The top layer in the model is
a surface roughness layer, which is modeled as a Bruggeman EMA layer
containing CIGS and a void fraction. Below this is the CIGS layer.
Single phase CIGS layers are modeled using a linear summation of
Kramers-Kronig consistent
oscillators^.Error:\ Reference\ source\ not\ found^ Mixed phase CIGS
films were modeled with an EMA layer containing α and δ~R~ phases. The
Bruggeman EMA model assumes that the grains in the binary phases
material are spherical in shape. The Maxwell Garnett EMA model, assumes
that the majority phase has spherical shape and the minority phase is a
coating over the sphere. Both EMA models assume that the particle size
is less than 1/10 of the wavelength of the probing light. The
ellipsometry scans are carried out over the range 275 to 1700 nm so
accurate analysis requires the grain size to be less than 100 nm for the
central wavelength of this range. However, these models have been
successfully used for feature size comparable to the probing light. The
optical model is completed by an interface layer modeled by an EMA
mixture of Mo and the CIGS, although the fit is largely insensitive to
this layer, and the Mo film.

  -----------------------------------------------------------------------
  *Surface roughness*

  *CIGS*

  *Interface layer*

  *Mo*
  -----------------------------------------------------------------------

[]{#__RefHeading___Toc125256103 .anchor}Figure 98. Optical model used
for SE analysis.

***Optical Characterization: Single-phase Modeling***

The optical constants of α-CIGS alloy films with varying Ga
concentrations have been determined using multilayer optical modeling
with an oscillator model for the absorber layer.Error: Reference source
not found For the CIGS alloy system, the valance band maximum at the
Brillouin zone center is triply degenerate. These states are split due
to the tetragonal crystal field perturbation that results from the
change in symmetry from zincblende to chalcopyrite structure and to the
spin-orbit interaction. Experimentally, the critical point energies
resulting from these and higher energy transitions are obtained from the
minima of the second derivative of the imaginary part of the complex
dielectric response, ε~2~. The energies E~0~(A), E~0~(B) and E~0~(C)
corresponding to these triply degenerate fundamental transitions for
varying Ga concentration can be fit to a 2nd degree polynomial as shown
below.Error: Reference source not found

> E~0~(A) = 1.035 + 0.389y + 0.264y^2^ (15)
>
> E~0~(B) = 1.037 + 0.626y + 0.104y^2^ (16)
>
> E~0~(C) = 1.276 + 0.664y + 0.057y^2^ (17)

Equation 15 for the lowest energy transition E~0~(A) determines the
bandgap and gives a value of 0.26 for the optical bowing parameter. This
is comparable to the optical bowing parameters reported from
experiments, 0.24,[^90] and theoretical calculation, 0.21.[^91] It is
worth noting that the triple degeneracy of the valence band maximum
means that the optical absorption coefficient α(E) does not follow a
simple relationship with αE^2^ ∝ (E-Eg) as is often assumed for direct
bandgap materials.

Optical constants of single phase δ~R~-CIGS with x = 0.23 and y = 0.31
have also been determined using a multilayer optical model as in Figure
98 with an oscillator model for the δ~R~-CIGS. The optical constants
thus obtained are shown in Figure 99 along with the those of α-CIGS
films. Two features are apparent. First, the fundamental bandgaps are
shifted to higher energies with decreasing Cu concentration, in this
case from 1.18 to 1.38 eV. This bandgap increase with decreasing Cu
concentration is consistent with reduced repulsive coupling of the Cu 3d
and Se 4p orbitals resulting in lowering of the valance band maxima.
However, higher energy transitions are not noticeably shifted. Second,
the critical point features at fundamental bandgap energy as well as at
higher energies become broader as the Cu concentration decreases
indicating degradation in crystalline quality. As a result, the crystal
field splitting becomes less visible for Cu poor samples.

***Optical Characterization: Two-phase films***

Optical constants of the mixed phase films are obtained from the EMA
models using the optical properties of α-CIGS and δ~R~-CIGS shown in
Figure 99. There is no significant difference between the Bruggeman and
Maxwell Garnett EMA's in the quality of the fit, determined by the root
mean square error (MSE), or in the resulting volume fractions obtained.
The EMA results for two films are compared in Figure 99 to results
obtained by treating the materials as single phase and using an
oscillator model. The volume fractions of the α and δ~R~ phases used for
the EMA fits are indicated in the Figure. The EMA model can successfully
be used to model the mixed phase films and determine the relative volume
fractions or Cu concentration. There is good agreement in the transition
energies determined by the oscillator and EMA models and low values of
the MSE are achieved with both. This analysis cannot distinguish whether
the films are really comprised of two separate phases or a homogeneous
metastable phase. A detailed and comprehensive analysis of x-ray
diffraction spectra may be able to answer this question.

![](media/image116.wmf){width="3.522222222222222in"
height="2.6034722222222224in"}

[]{#__RefHeading___Toc125256104 .anchor}Figure 99. Optical constants of
α-CIGS and δ~R~-CIGS films with y = 0.3.

![](media/image117.wmf){width="3.1590277777777778in"
height="2.3680555555555554in"}
![](media/image118.wmf){width="3.1590277777777778in"
height="2.3680555555555554in"}

[]{#__RefHeading___Toc125256105 .anchor}Figure 100. Comparison of
optical constants obtained using an oscillator model and EMA model for
films in the α + δ~R~ mixed phase region. The film on the left has 22.0
% Cu and the film on the right has 18.6 % Cu.

Table XXVI lists the volume fractions obtained from the EMA analysis for
the CIGS films in the mixed phase region and the values of x determined
from these volume fractions by

assuming they are a mixture of x = 0.5 and x = 0.25. These agree well
with x determined from the EDS composition data. Figure 101 shows n and
k from the EMA model for these films. As noted above, there is a bandgap
increase and broadening in the critical point features with decreasing
Cu concentration. The volume fractions show a phase boundary for α and
δ~R~ phases at Cu concentrations between 23.6 and 22.0 % Cu. While the
discrepancy with the phase boundary in Figure 97 may just be due to the
uncertainty in the composition measurements, it is also consistent with
a broadening of the α-phase region due to Ga and Na in the film.Error:
Reference source not found Three compositions of films fall within the
wide δ~R~-phase region. However, the optical constants of these films
vary with the Cu concentration with no phase boundary indicated near 15
% Cu, as expected from the phase diagram. The EMA analysis was done
using the film with the lowest Cu which gave composition close to
Cu(In~0.7~Ga~0.3~)~3~Se~5~ or x = 0.25 This discrepancy with the phase
diagram may result from the assumptions used for the modeling or from
differences in phase behavior CIGS and CIS. A similar set of CIS films
is currently being characterized to enable better comparison with the
phase diagram and remove uncertainties due to variations in relative Ga
concentration.

[Cu(InGa)Se~2~ Etching]{.underline}

An aqueous Br-etch has been previously developed for smoothing
Cu(InGa)Se~2~ films and reducing their thickness.[^92] This etch has
been further characterized for two purposes. First, the etch to obtain a
smooth surface for precise optical characterization by spectroscopic
ellipsometry without peeling the Cu(InGa)Se~2~ film as has been used
previously.Error: Reference source not found The etch will leave the
back contact intact and enable devices to be fabricated and the optical
characterization of surface treatments and emitter layers deposited on
the Cu(InGa)Se~2~ to be directly compared with devices. Second, the etch
can provide a means to controllably reduce the Cu(InGa)Se~2~ thickness
for characterizing the effect of absorber layer thickness on devices.

[]{#__RefHeading___Toc125256168 .anchor}Table XXVI. Compositions of CIGS
films and volume fractions of α and δ~R~ phases obtained from Bruggeman
EMA analysis. Samples in italics are single phase films fit with an
oscillator model.

  ------------- -------- -------- -------- -------- -------- ---------- ------- -------
  Composition                                                EMA                
  determined by                                              analysis           
  EDS                                                                           

  Cu\           In\      Ga\      Se\      x        y        α\         δ~R~\   x
  (%)           (%)      (%)      (%)                        (%)        (%)     

  *24.8*        *18.3*   *8.3*    *48.7*   *0.48*            *NA*               

  23.6          19.9     7.3      49.2     0.46     *0.31*   100        0       0.50

  22.0          19.8     8.2      50.0     0.44     0.27     80         20      0.45

  20.7          19.6     9.4      50.3     0.42     0.29     52         48      0.38

  18.6          19.6     10.3     51.5     0.38     0.32     35         65      0.34

  15.4          22.4     9.7      52.6     0.32     0.34     32         68      0.33

  11.6          23.6     9.9      54.9     0.26     0.30     13         87      0.28

  *10.4*        *24.2*   *11.0*   *54.4*   *0.23*   0.30     *NA*               
  ------------- -------- -------- -------- -------- -------- ---------- ------- -------

![](media/image119.wmf){width="2.8777777777777778in"
height="2.5034722222222223in"}
![](media/image120.wmf){width="2.8777777777777778in"
height="2.5034722222222223in"}

[]{#__RefHeading___Toc125256106 .anchor}Figure 101. Optical constants of
CIGS films with y = 0.3 determined by EMA analysis. Arrows indicate
increasing Cu in sequence 23.6, 22.0, 20.7, 18.6, 15.4, 11.6 %.

This can be further used to characterize the optical properties of the
Mo/Cu(InGa)Se~2~ interface, where a MoSe~2~ interlayer is expected to
form, and to enable better structural characterization of the interface
by increasing sensitivity of XRD measurements through a thinner
Cu(InGa)Se~2~ film.

The Br-etch of evaporated Cu(InGa)Se~2~ films have been optimized as a
function of concentration and time to produce the smoothest surface and
best control. A Br concentration of 0.06 M Br~2~ was found to produce
the smallest rms surface roughness and z-range (maximum peak to valley
height) as measured by AFM. The RMS surface roughness and Z-range values
were reduced from 60 ± 10 nm and 550 ± 50 nm to 11 ± 3 nm and 100 ± 20
nm respectively with a one minute etch. By measuring the change in mass
of the samples, the etch rate was calculated at 0.6 ± 1 µm/min.

SE data was measured on peeled and etched films from the same run and
modeled as previously to determine optical constants over the range 0.6
≤ E ≤ 4.6 eV. These are compared in Figure 102, showing good agreement.
In particular, the critical optical transitions, which can be defined by
inflection points in the optical constants, agree well. Small
differences in magnitude might be due to different surface contamination
in the two cases, with oxidation of the peeled surface and excess Se on
the etched sample. as discussed below, or simply the result of sample to
sample variation.

![](media/image121.wmf){width="6.495833333333334in"
height="2.6847222222222222in"}

[]{#__RefHeading___Toc125256107 .anchor}Figure 102. Extinction
coefficient and index of refraction for Cu(InGa)Se~2~ samples from a
single run with smooth surfaces created by peeling and etching.

To verify that the Br-etch does not critically affect the properties of
the Cu(InGa)Se~2~ film, devices were fabricated after etching. However,
it has been reported that XPS characterization reveals excess free Se on
the surface after a similar etch.[^93] It was further shown that this
could be removed with a KCN etch. Therefore, samples from a single
Cu(InGa)Se~2~ run were smoothed with the Br-etch as described above. One
was further etched in KCN and a second was given a vacuum heat treatment
at 250°C for 30 min to remove surface Se. J-V curves for the best cells
from these samples are shown in Figure 103 along with the control device
with as-deposited Cu(InGa)Se~2~ and the J-V parameters are listed in
Table XXVII. Also listed in the table are additional control samples,
which received the KCN-etch and vacuum heat treatments on the
as-deposited Cu(InGa)Se~2~.

Clearly, the Br-etch severely degrades the device performance but it is
mostly recovered by removing surface Se, with the vacuum anneal more
effective in this case than the KCN etch. In both cases, a reduction in
current may have been caused by greater optical reflection from the
smoothed surface. The cause for the lower V~OC~ is not known but it
seems to be related to the Cu(InGa)Se~2~ surface treatments since both
the KCN-etch and HT reduces V~oc~ even without the smoothing Br-etch. It
should be noted that cells originally fabricated after the aqueous Br
etch used an evaporated emitter layer deposited at 200°CError: Reference
source not found so, if there was excess Se on the surface, it would
have evaporated during heat up.

![](media/image122.wmf){width="3.8979166666666667in"
height="3.2305555555555556in"}

[]{#__RefHeading___Toc125256108 .anchor}Figure 103. J-V characteristics
with Br-etched Cu(InGa)Se~2~ and subsequent KCN-etch and heat treatments
to remove surface Se.

[]{#__RefHeading___Toc125256169 .anchor}Table XXVII. Cell performance
with different Cu(InGa)Se~2~ etches and heat treatment. Samples marked
with \* indicate results shown are after a 2 min heat-treat of the
completed device at 200°C in air. Other samples did not improve with
this treatment.

  ----------- ------------------ --------- ---------- ------------ ---------
  Sample      Treatment          Eff\      V~oc~\     J~sc~\       FF\
                                 (%)       (Volts)    (mA/cm^2^)   (%)

  33888.22    As-deposited       15.8      0.623      33.2         76.3

  33888.32 \* Br-etch            3.2       0.470      23.3         43.1

  33888.33 \* Br-etch / KCN etch 11.2      0.524      29.8         72.1

  33888.23    Br-etch / HT       12.8      0.575      30.1         73.9

  33888.31    KCN-etch           12.7      0.537      32.7         72.7

  33888.12 \* HT                 13.6      0.569      32.1         74.2
  ----------- ------------------ --------- ---------- ------------ ---------

Experiments have been done to explore the use of the Br-etch to vary
thickness in a well controlled manner, enabling more fundamental study
of the effects of reducing Cu(InGa)Se~2~ thickness (d) and
characterization of optical reflection at the Mo/Cu(InGa)Se~2~ contact.
One issue for characterizing the etched films is the precise
determination of the Cu(InGa)Se~2~ thickness. Several possible methods
have been evaluated including measuring the change in mass of the film,
cross-sectional SEM images, and extinction of the Mo peak in the EDS
spectrum. A simple, non-destructive method is to measure the optical
reflection (R) and determine thickness from the optical interference
fringes in the transparent region at energies below the bandgap using a
procedure reported by Swanepoel.[^94] This requires knowing the
refractive index as a function of wavelength which we have determined
using SE.Error: Reference source not found Figure 104 shows the total
reflection for an as-deposited Cu(InGa)Se~2~ film with Ga/(In+Ga) = 0.3
and films after 2 and 4 min Br etches in an aqueous 0.03M Br solution at
room temperature. The as-deposited film has lower R in the absorbing
region λ \< 1000 nm and smaller amplitude of the interference fringes in
the transparent region at higher λ. This is attributed to the scattering
due to the rough surface of the as-deposited film. The spacing of the
maxima or minima in the spectra increases with increasing etch time as
the films become thinner and were used to determine the thicknesses
listed. The change in thickness determined with this method is shown in
Figure 105 for etch times up to 4 min and the slope gives an etch rate
of 0.2 µm min^1^.

![](media/image123.wmf){width="3.5006944444444446in" height="3.19375in"}

[]{#__RefHeading___Toc125256109 .anchor}Figure 104. Optical reflection
of as-deposited and Br-etched Cu(InGa)Se~2~ films and the thicknesses
obtained from the interference fringes.

![](media/image124.wmf){width="3.5680555555555555in" height="3.19375in"}

[]{#__RefHeading___Toc125256110 .anchor}Figure 105. Change in thickness
for different Br-etch times.

Samples from a single Cu(InGa)Se~2~ run were etched for 1, 2, 3, and 4
min and, after R was measured, devices were fabricated. The resulting
thickness and device parameters are listed in Table XXVIII. All the
etched films had slightly lower J~SC~ than the un-etched sample, which
can be attributed to higher reflection losses with the secular etched
films. V~OC~ was also slightly lower but the reason is not known.

[]{#__RefHeading___Toc125256170 .anchor}Table XXVIII. Cu(InGa)Se~2~
thickness and device J-V parameters as a function of Br-etch time of the
Cu(InGa)Se~2~ absorber layer.

+---------+---------+---------+--------+---------+----------+--------+
| Sample  | etch    | Cu(InG  | η      | V~oc~   | J~sc~    | FF     |
| \#      | time    | a)Se~2~ |        |         |          |        |
|         |         |         | (%)    | \(V\)   | (m       | (%)    |
|         | (min)   | d (µm)  |        |         | A/cm^2^) |        |
+---------+---------+---------+--------+---------+----------+--------+
| 3       | as-dep  | 1.92    | 14.5   | 0.621   | 31.1     | 75.0   |
| 3930.22 |         |         |        |         |          |        |
+---------+---------+---------+--------+---------+----------+--------+
| 3       | 1       | 1.67    | 11.8   | 0.582   | 28.1     | 72.1   |
| 3930.12 |         |         |        |         |          |        |
+---------+---------+---------+--------+---------+----------+--------+
| 3       | 2       | 1.46    | 12.7   | 0.593   | 28.6     | 74.7   |
| 3930.13 |         |         |        |         |          |        |
+---------+---------+---------+--------+---------+----------+--------+
| 3       | 3       | 1.33    | 13.8   | 0.602   | 30.5     | 75.4   |
| 3930.21 |         |         |        |         |          |        |
+---------+---------+---------+--------+---------+----------+--------+
| 3       | 4       | 1.18    | 12.1   | 0.583   | 28.7     | 72.5   |
| 3930.23 |         |         |        |         |          |        |
+---------+---------+---------+--------+---------+----------+--------+

[CdS Deposition and Characterization]{.underline}

Chemical surface deposition (CSD)[^95] of CdS has significant potential
advantages over conventional chemical bath deposition. This includes
very high utilization of Cd with the CSD process and the potential for
simpler incorporation into an in-line process.

We have previously compared Cu(InGa)Se~2~ devices with CdS deposited by
CBD CSD and found similar performance but with evidence of slightly
higher V~oc~ using the CBD process.[^96] To further determine whether
there is any difference in devices, a more extensive set of samples was
processed. A total of 10 Cu(InGa)Se~2~ samples from 2 different, but
nominally identical runs, were processed using 5 with each CdS process.
This gave a total of 30 devices with each type. Results are summarized
in Table XXIX, which lists the best device of each type and the average
and standard deviation. While the best cell with CBD CdS was slightly
better, the averages were the same indicating no difference in device
performance. The variability in device performance which yields 12.9%
overall average efficiency compared to 14.8 -- 15.4 % for the best cells
is due to variation in the shunt conductance. Causes for this are being
investigated.

[]{#__RefHeading___Toc125256171 .anchor}Table XXIX. Comparison of
Cu(InGa)Se~2~ devices with CBD and CdS emitter layers based on 30
devices of each type.

+-------+--------+-------+-------+--------+------+--------+--------+
| CdS   |        | Eff\  | V     | J~SC~\ | FF\  | R~OC~\ | G~SC~  |
| dep.  |        | (%)   | ~OC~\ | (mA/   | (%)  | (Ω-    |        |
|       |        |       | (V)   | cm^2^) |      | cm^2^) | (mS/   |
|       |        |       |       |        |      |        | cm^2^) |
+-------+--------+-------+-------+--------+------+--------+--------+
| CBD   | Best   | 15.4  | 0.633 | 31.7   | 76.6 | 1.4    | 1      |
|       | cell   |       |       |        |      |        |        |
+-------+--------+-------+-------+--------+------+--------+--------+
|       | A      | 12.9  | 0.604 | 30.6   | 69.0 | 2.2    | 5      |
|       | verage |       |       |        |      |        |        |
+-------+--------+-------+-------+--------+------+--------+--------+
|       | Std.   | 1.7   | 0.019 | 0.8    | 8.7  | 1.0    | 8      |
|       | Dev.   |       |       |        |      |        |        |
+-------+--------+-------+-------+--------+------+--------+--------+
| CSD   | Best   | 14.8  | 0.621 | 31.4   | 76.0 | 1.4    | 2      |
|       | cell   |       |       |        |      |        |        |
+-------+--------+-------+-------+--------+------+--------+--------+
|       | A      | 12.8  | 0.605 | 30.6   | 68.8 | 1.9    | 4      |
|       | verage |       |       |        |      |        |        |
+-------+--------+-------+-------+--------+------+--------+--------+
|       | Std.   | 1.2   | 0.013 | 0.5    | 5.1  | 0.4    | 2      |
|       | Dev.   |       |       |        |      |        |        |
+-------+--------+-------+-------+--------+------+--------+--------+

The optical constants of CdS layers have been characterized by
spectroscopic ellipsometry to determine if the CdS properties are
affected by the Cu(InGa)Se~2~ surface or with different CdS deposition
processes. For characterization of films deposited on Cu(InGa)Se~2~, a
smooth surface must be used. This is formed by a smoothing Br-etch
followed by a KCN etch to remove excess Se on the surface, as shown
above.

The refractive index (n) and extinction coefficient (k) of CdS films
formed by CBD on Mo and on smoothed Cu(InGa)Se~2~ are compared in Figure
106. Prior to CdS deposition, the precise optical constants of the Mo
and Cu(InGa)Se~2~ were determined. The optical model used to determine n
and k of the CdS includes the bulk Mo or Cu(InGa)Se~2~, then a thin
interface/roughness layer fit using an effective medium approximation
(EMA), then the bulk CdS film, and finally, a surface roughness EMA
layer. A harmonic oscillator model is used for the CdS layer. The CdS
films were \~ 50 nm thick. The results in Figure 106 are also compared
to n and k determined for a thicker CdS film deposited on crystallized
ITO in a CdTe device. In that case, the SE measurements were done after
the CdTe was peeled off and the CdS had been annealed in the presence of
CdCl~2~ during device processing. The CdS on Mo or Cu(InGa)Se~2~ has a
much broader fundamental transition at 2.4 eV, while the CdS in the CdTe
more closely matches published properties of crystalline CdS. These
differ also in the high-energy range \> 3.5 eV. The reasons for these
differences in optical behavior are being further investigated. Possible
reasons include: different crystallinity of the annealed CdS in the CdTe
device, differences in the CdS/Cu(InGa)Se~2~ and CdS/Mo interfaces, and
thickness effects in the CdS or in the optical fitting.

![](media/image125.wmf){width="3.3604166666666666in"
height="3.0034722222222223in"}

[]{#__RefHeading___Toc125256111 .anchor}Figure 106. Optical constants of
CBD CdS layers deposited on different substrates. The layer on ITO was
annealed during CdTe device processing.

[Mo/CuInSe~2~ Interface Characterization]{.underline}

Alternative back contacts are being evaluated to determine if they might
provide improved adhesion at the interface with the CuInSe~2~-alloy
absorber. Poor adhesion, for example with wide bandgap Cu(InAl)Se~2~ is
believed caused by the formation of a MoSe~2~ interlayer. Initial
experiments were done to evaluate Cu(InGa)Se~2~ devices formed on W, Ta,
and Ti back contacts which all gave good device performance in a recent
study by Orgassa et al.[^97] In addition, these metals have higher
reflection than Mo and may therefore be advantageous in devices with
thin absorber layers where losses in current occur due to optical
absorption at the back contact.

W, Ta, Ti, and Mo layers were deposited by electron beam evaporation on
soda lime glass substrates. The evaporated Mo was included as a control
for comparing an evaporated contact to the baseline Mo deposited by dc
sputtering. The thicknesses and sheet resistances are listed in Table
XXX. The Ti films did not adhere to the glass substrate after
Cu(InGa)Se~2~ deposition so no results were obtained. These refractory
metals are difficult to evaporate so the thicknesses, and hence sheet
resistances, were limited.

Results of J-V measurements for the best device with each contact are
listed in Table XXX. The sputtered Mo contact gave the best performance
and the evaporated Mo gave comparable V~OC~ but lower fill factor. The
latter is at least partly due to greater series resistance as indicated
by R~OC~ ≡ dV/dJ at J = 0 which is equal to the series resistance plus a
diode term if the J-V results are described by a standard diode
equation. The Ta and W contacts also had lower V~oc~ than the Mo
contacts. Possible explanations for the reduced V~oc~ with the Ta and W
contacts include blocking of beneficial Na from the soda lime glass or
introduction of impurities into the Cu(InGa)Se~2~ layer.

[]{#__RefHeading___Toc125256172 .anchor}Table XXX. Characteristics of
evaporated back contacts for Cu(InGa)Se~2~ and device performance. The
J-V results with the W and Ta contacts are after a 2 min heat treat in
air at 200°C which improved performance.

  ---------- ---------- ------------ -------- ------------- --------- ------------ ------ -----------
  Sample \#  Back                             Best Device                                 
             Contact                          Performance                                 

             Material   Thickness\   R~sh~\   Eff\          V~oc~\    J~sc~\       FF\    R~OC~\
                        (µm)         (Ω/sq)   (%)           (Volts)   (mA/cm^2^)   (%)    (Ω-cm^2^)

  33882.21   Mo sputt.  0.7          0.2      15.0          0.607     33.4         73.7   1.6

  33882.32   Mo evap.   0.1          23       12.0          0.610     32.1         61.4   4.2

  33882.23   W          0.1          35       10.9          0.577     31.9         59.2   4.5

  33882.12   Ta         0.2          26       9.4           0.526     29.3         60.7   4.3
  ---------- ---------- ------------ -------- ------------- --------- ------------ ------ -----------

Another option for the back contact is oxygenated Mo which can minimize
reaction of the Mo with Se since Mo oxides are more stable than the
selenides. Mo films were prepared containing around 8 at% oxygen by
sputtering in a mixed Ar/O~2~ atmosphere. Cell results comparing the
oxygenated Mo contact to the baseline Mo contact sputtered in pure Ar
are shown in Table XXXI. With the oxygenated Mo the fill factor is a
little lower for unknown reason but other cell parameters are the same
within error. In the next quarter, Cu(InAl)Se~2~ films with different
relative Al content will be deposited on different back contacts and
evaluated for improved adhesion as well as device behavior.

[]{#__RefHeading___Toc125256173 .anchor}Table XXXI. Cu(InGa)Se~2~ device
performance with an oxygenated Mo back contact.

  ------------ ----------- --------- --------- ------------ -------- -----------
  Sample \#    Back\       Eff\      V~oc~\    J~sc~\       FF\      R~OC~\
               contact     (%)       (Volts)   (mA/cm^2^)   (%)      (Ω-cm^2^)

  33871.13     Mo.         14.9      0.611     31.5         77.1     1.3

  33871.32     Mo-O        14.0      0.609     32.1         71.7     1.9
  ------------ ----------- --------- --------- ------------ -------- -----------

***Cu(InGa)Se~2~ Summary***

[Two-step H~2~Se/H~2~S process]{.underline}

The incongruent reaction of Cu-Ga-In intermetallics with either H~2~Se
or H~2~S offers significant insight into the 2-reaction
selenization/sulfization of Cu-Ga-In precursors. With a better
understanding of the reaction pathway, work will now be focused on
optimizing the time-temperature sequence of the 2-step reaction, as well
as better understanding the Ga mobility mechanism.

Optimization of the 2-reaction process introduces additional issues, an
example being the steep S gradient observed at the surface of the
champion Cu(InGa)(SeS)~2~ film in this study. This introduces the S
profile as another dependent variable in addition to the Ga profile.
Fortunately, by developing a better understanding of the reaction
pathway, it may be possible to decouple these variables by considering
the Ga profile to be primarily dependent on the degree of selenization,
and the surface S profile likely being dependent on duration of
sulfization. Ideally, optimum selenization and sulfization conditions
and times can be identified that yield uniform Ga with only a modest
sulfur gradient at the Cu(InGa)(SeS)~2~ surface.

[Optical Characterization]{.underline}

Multilayer optical modeling of variable angle spectroscopic ellipsometry
measurements has been used to determine the optical constants and
electronic transitions of CIGS thin films with varying Cu and Ga
concentrations. Mixed phase films were effectively modeled using EMA
models with comparable results using Bruggeman and Maxwell Garnett
models. This analysis shows that the changes in the optical constants as
a function of Cu off-stoichiometry can be used to determine the relative
volume fractions of α and δ~R~ phases in the CIGS. The decrease in Cu is
characterized by an increase in the fundamental bandgap and broadening
of critical point features in the optical constant suggesting
degradation of the crystalline quality of the material.

**4 Si-based Solar Cells**

**4.1 Aluminum-induced Crystallization (AIC) Below the Eutectic Point:**

***ex-situ* AIC**

*Introduction to AIC*

Thin-film poly-Si is potentially a good alternative to a-Si and
crystalline silicon (c-Si) based photovoltaic devices because of its
unique properties. Poly-Si offers large area manufacturability at
temperatures below 600^o^C, and device efficiencies, in theory,
comparable to c-Si based devices. One of the most critical issues with
poly-Si thin-film photovoltaic devices is the minority carrier life
time, which is limited by the nanocrystalline grain structure of
poly-Si. Nanocrystalline grain structure is usually associated with low
temperature deposition processes required to reduce thermal budget of
the production by using low cost substrates such as glass. AIC process
is one of the many techniques used to prepare poly-Si thin-films with
grain sizes comparable to the film thickness at temperatures below
600^o^C. Although the crystallization of a-Si when in contact with
certain metals at low temperatures was known for several decades, the
use of this technique to produce poly-Si films for device applications
is relatively new. There are many studies on metal-induced
crystallization (MIC) of a-Si films, most of those studies are focused
on the characterization of poly-Si films formed after
crystallization.[^98]^,^[^99]^,^[^100]^,^[^101]^,^[^102]^,^[^103]^,^[^104]
The kinetics of MIC process is still not well understood. One of the
least studied, if any, is the interface oxide layer separating the metal
and a-Si layers. In this study, the effects of a-Si deposition technique
and aluminum oxide interface layer on the crystallization process are
reported. Much of this work has been submitted to Progress in
Photovoltaics in a paper entitled "Effects of silicon deposition and
interface oxide on aluminum-induced crystallization of amorphous silicon
thin-films."

***Experimental***

Aluminum films with 100, 250, 500, and 1,000 nm thicknesses were
deposited on Corning 7059 type glass substrates by electron beam
evaporation at a fixed deposition rate of 4 Å/s. The thicknesses of the
Al layers were confirmed by profilometer measurements. All Al coated
glass substrates were exposed to air from 24 hours to several months
prior to Si deposition. Amorphous silicon films with 100, 250, 500, and
1,000 nm thicknesses were deposited using HWCVD, PECVD and electron-beam
systems.

Before the deposition of a-Si films, the background pressure in HWCVD
system was always kept below 5x10^-7^ Torr. The deposition of a-Si films
was performed at a fixed filament temperature of 1850^o^C and a reactor
pressure of 25 mTorr. The deposition was started at room temperature,
and the substrate heater was off during the deposition. Growth rate was
always greater than 10 μm/hr to reduce the deposition time; therefore,
keeping the substrate temperature as low as possible. Due to the
radiation from the filament, the substrate temperature reached to a
maximum of 110^o^C at the end of the deposition. After the deposition,
the filament was immediately turned off, and samples were removed as
soon as the substrate temperature dropped to 50^o^C.

Amorphous Si films were also deposited in a single chamber PECVD system
(13.5 Mhz) with two load-locks. The reactor base pressure was always
kept below 5x10^-7^ Torr. All a-Si depositions in PECVD system were
performed at a substrate temperature of 175^o^C and a deposition
pressure of 200 mTorr. Silane diluted with hydrogen was used for source
gas.

Deposition of a-Si films in e-beam system was performed at a growth rate
8 Å/sec (\~ 3 μm/hr). The substrate temperature did not exceed 75^o^C at
any time during the deposition of a-Si.

The thermal annealing of the samples was performed in high temperature
furnace. Samples were placed onto a high temperature glass holder
sitting inside a quartz tube. Argon gas was used to flush the tube for
20 minutes at a 200 sccm flow rate before introducing the tube into the
furnace. Samples were annealed at 430^o^C, 475^o^C, and 540^o^C from 15
minutes to 10 hours under an argon flow of 30 sccm. Three different
samples including e-beam, PECVD and HWCVD deposited a-Si layers were
annealed together to prevent any differences in thermal histories.

*Effect of a-Si Deposition Method*

Optical microscopy images taken through the glass substrates in
reflection mode were used to calculate the nucleation density of Si
crystals and the average grain size for partially crystallized Si
samples in order to evaluate the effect of a-Si on AIC process. The
differences seen in the grain structure of poly-Si layers formed after
AIC process are directly related to the nature of a-Si layer. Although
Si films before the annealing were all amorphous, Si films deposited by
different techniques had different hydrogen contents due to different
deposition chemistries. E-beam deposited samples contain no hydrogen
since the e-beam deposition does not involve any component other than
the pure source material. On the other hand, PECVD deposited a-Si films
contain hydrogen, since the gas phase chemistry in PECVD consists of
mostly Si radicals, not elemental Si. The deposition temperature in
PECVD system was fixed at 175^o^C,; therefore, films contain up to 10%
hydrogen, which was confirmed by SIMS and FTIR. Figure 107 shows the
optical microscopy images of annealed samples taken through the glass
substrate. Darker Si crystals growing on the glass surface are clearly
seen on highly reflective Al. Compared to sample containing PECVD
deposited a-Si (Figure 107a), sample with e-beam deposited a-Si (Figure
107b) has slightly larger grains. It should be noted that the
crystallization process is not complete yet; however, the differences in
the average grain size after AIC process is complete will be similar. It
seems that the hydrogen in a-Si layer has a negative effect on the AIC
process. This is expected since hydrogen passivates some of the dangling
bonds in a-Si and reduces the excess energy, which is the main driving
force for the crystallization process. Amorphous Si layer deposited by
HWCVD will be discussed later since additional parameters affect the
crystallization process.

![](media/image126.png){width="5.998611111111111in"
height="2.592361111111111in"}

[]{#__RefHeading___Toc125256112 .anchor}Figure 107. Optical microscopy
images of partially crystallized samples with a-Si layers deposited by
(a) PECVD, and (b) e-beam. PECVD deposited sample has higher nucleation
density yielding smaller grains due to hydrogen in a-Si layers.

***Effect of Si/Al Ratio and a-Si Deposition Rate***

It has been shown that the thickness of the poly-Si layer formed after
layer exchange process in AIC is determined by the initial thickness of
the metal layer.[^105] This phenomena was also observed in
crystallization of Si during deposition onto Al coated glass
substrates.[^106] When Si layer thickness is smaller than Al layer
thickness, crystallization of a-Si films still occurs; however, poly-Si
film formed is not continuous. Continuous poly-Si films by AIC process
on glass can only be obtained when Si/Al thickness ratio is equal or
greater than unity. Increasing the Si/Al thickness ratio does not
improve the quality or the thickness of the poly-Si layer formed on the
glass substrate. Excess Si is accumulated on top of poly-Si layer and is
mixed with aluminum replaced by the growing Si crystals. Figure 108
shows the SEM surface image of a crystallized sample with an initial
Si/Al ratio of 2 after removing the exposed Al by etching. Excess Si is
seen on top of poly-Si layer formed on the glass substrate, and it is
mixed with Al replaced by poly-Si film. If a poly-Si layer is to be used
as a seed layer for subsequent epitaxial Si growth, excess Si and
aluminum on top of poly-Si layer must be removed by etching. Therefore,
having a very thick Si layer is not practical. A Si/Al thickness ratio
of slightly greater than unity ensures a continuous poly-Si layer will
be formed and excess Si, and Al on top to be etched will have a minimal
thickness.

![](media/image127.jpeg){width="4.0in" height="3.0833333333333335in"}

[]{#__RefHeading___Toc125256113 .anchor}Figure 108. SEM surface image of
a crystallized sample (with an initial Si/Al ratio of 2) after removing
exposed Al on the surface. Excess Si accumulated on top covers large
poly-Si grains formed on top of the substrate; however, some Si grains
are visible.

In order to determine the effect of the deposition rate of a-Si on the
AIC process, a-Si layers were deposited at 1 μm/hr and 10 μm/hr in HWCVD
system. The amorphous nature of the films were confirmed by XRD before
annealing since HWCVD films tend to be nano-crystalline at low growth
rates. No differences in the nucleation density and average grain size
were observed. Provided that the Si films are amorphous before the
annealing, there seems to be no effect of the deposition rate of a-Si on
the AIC process.

**Effect of Oxide at the Al-Si Interface**

Depending on the layer sequence, a naturally formed Al or Si oxide layer
separates two layers provided that the vacuum is broken between
depositions. In this study, the analysis of aluminum oxide layer is of
interest since the layer structure is glass/Al/a-Si. Variable Angle
Spectroscopic Ellipsometry (VASE) measurements were performed to analyze
the increase of the thickness of the natural Al oxide layer. Figure 109
shows the calculated thickness of the oxide layer of a 500 nm Al film on
7059 glass substrate when exposed to air in laboratory environment. VASE
measurements were started as soon as Al deposition is done and performed
under nitrogen flow. The thickness of the oxide layer increased by about
10 Å in the first 48 hours as seen in Figure 109.

![](media/image128.png){width="4.745138888888889in"
height="3.6881944444444446in"}

[]{#__RefHeading___Toc125256114 .anchor}Figure 109. The change in the
thickness of Al oxide layer with time under ambient conditions. The
calculated thickness (solid line) is in good agreement with
cross-sectional TEM studies (squares). A sudden increase in the
thickness of the oxide layer after 9 days is related to changes in
atmospheric conditions.

In the following 12 days, the thickness increases gradually to 20 Å. It
should be noted that extended exposure time might also increase possible
contamination of the sample, and also the changes in the humidity in the
environment might change the growth rate of the oxide layer. The
observed changes in the thickness might also be related to restructuring
of the oxide layer. In the previous section, the effect of a-Si layer
and hydrogen content on AIC process was discussed by comparing e-beam
and PECVD deposited a-Si layers. In case of HWCVD deposited a-Si films,
the situation is a little different. In order to evaluate the effect of
the hydrogen and interface oxide on AIC process where HWCVD deposited
a-Si layer is used, two different aspects must be taken into account;
first, the hydrogen content in the a-Si layer, and second, the atomic
hydrogen in the gas phase during deposition and its effect on the native
oxide layer which was shown to be crucial for layer exchange process. By
comparing e-beam and PECVD deposited a-Si layers in the AIC process, it
is reasonable to suggest that the hydrogen in the a-Si layer has a
slightly detrimental effect. The gas phase in HWCVD system is very rich
in hydrogen and a-Si layers have significant hydrogen content since the
deposition temperature for a-Si was lower than 110^o^C and depositions
rate was greater than 10 μm/hr. It is also suggested that very reactive
atomic hydrogen supplied by the filament might reduce any oxide layer
formed on the aluminum surface. A quick thermodynamic analysis for the
reaction at temperatures below 500*^o^*C suggest that the reduction of
Al~2~O~3~ is favorable (ΔG~rx~ = -283 kJ/mol). Unfortunately, there is
no way to check the effect of atomic hydrogen on the native oxide in the
reactor, and an oxide layer is formed immediately when samples are
removed from the reactor. Based on the above thermodynamic analysis, it
is expected that the atomic hydrogen interacts and reduces the thickness
of the native oxide layer. If the process is fast enough, atomic
hydrogen should remove the whole oxide layer, and the layer exchange
process should not occur. However, if the reduction of the oxide layer
is not fast enough, it should only increase the nucleation density of Si
crystals, because the thinner oxide layer will result in faster
diffusion of Si and Al. Optical microscopy images of partially
crystallized a-Si layer deposited by HWCVD shows a slightly increased
nucleation density compared to PECVD deposited a-Si layers as seen in
Figure 110, and increased nucleation density translates into smaller
grain size. The layer exchange process was also observed in fully
crystallized samples, indicating that the etching effect of atomic
hydrogen on the native oxide layer is not very significant since the
layer exchange process only occurs in the presence of an interfacial
oxide layer. The smaller average grain size of HWCVD deposited samples
can also be related to the amount of hydrogen in the a-Si layer rather
than interface oxide.

![](media/image129.png){width="5.996527777777778in"
height="2.5770833333333334in"}

[]{#__RefHeading___Toc125256115 .anchor}Figure 110. Optical microscopy
images of partially crystallized samples with a-Si layers deposited by
(a) HWCVD, and (b) PECVD. The higher nucleation density and smaller
grain size of HWCVD deposited sample is related to etching of
interfacial oxide layer by atomic hydrogen in the deposition
environment.

At this point, it is reasonable to suggest that the differences in the
average grain size of AIC crystallized a-Si layer are related only to
the amount of hydrogen in a-Si layers, and hydrogen seems to be
increasing the nucleation density of Si crystals. The driving force for
crystallization process is expected to be greater for a-Si films without
any hydrogen, since hydrogen helps to reduce the excess energy by
passivating some of the dangling bonds in a-Si. Figure 111 shows OM
images of 3 partially crystallized samples prepared under identical
conditions and annealed at 475^o^C for 15 minutes. All samples had 500
nm Al and a-Si deposited by HWCVD. The samples were exposed to air for
24 hours (a), 48 hours (b), and 80 days (c) prior the deposition of
a-Si. The exposure time is directly related to the thickness of oxide
layer. Thicker oxide layer in Figure 111c results in slower diffusion
process and lower nucleation density, which yields larger Si grains when
the crystallization process is complete. Only 10% of the substrate
surface is covered with Si crystals. The thinner oxide layer in Figure
111a results in higher nucleation density, which also yields smaller
grain size compared to Figure 111c when the crystallization process is
complete. However, the thinner oxide layer also enhances the diffusion
process; more than 90% of the substrate surface is covered with Si
crystals (Figure 111a).

![](media/image130.png){width="2.6305555555555555in"
height="7.1819444444444445in"}

[]{#__RefHeading___Toc125256116 .anchor}Figure 111. Optical microscopy
pictures of partially crystallized samples taken through the glass
substrate. Al layers were exposed to air before Si deposition (a) for 24
hr, (b) for 48 hrs, and (c) for 80 days.

The nature of the oxide layer was also investigated using X-Ray
Photoelectron Spectroscopy (XPS). Aluminum layers with different
thicknesses were deposited on 7059 glass substrates by e-beam
deposition. The analysis was focused on Al 2p and O 1s core levels.
Figure 112 shows XPS depth profile of Al 2p regions for 100 nm thick Al
film on glass. A total of 6 levels are shown, each taken after
sequential etching for 30 seconds. The binding energies for Al-Al and
Al-O bonds are 73 eV and 75.6 eV, respectively, and each profile is
normalized with respect to Al-O peak. The intensity of bulk Al 2p peak
increases (at 73 eV) as the sputtering depth increases indicating a
decrease in the oxidation state.

![](media/image131.png){width="3.7333333333333334in" height="3.45625in"}

[]{#__RefHeading___Toc125256117 .anchor}Figure 112. XPS depth profile
for Al 2p region of 100 nm thick Al film on glass. The binding energy
for Al-Al and Al-O are 73 eV and 75.6 eV, respectively. The shift to a
higher energy in the oxidation state is noticeable. Sputtering cycles
are marked on the right axis.

Figure 113 shows the depth profile for O 1s where the binding energy is
533.8 eV at the surface and 532.5 eV after 6 sputtering cycles
supporting the presence of an oxide on the surface. A detailed analysis
of XPS depth profiles suggests that the oxide layer actually a bilayer
structure; Al(OH)~3~ on top of Al~2~O~3~ layer. The changes in the
optical properties of the aluminum surface observed by ellipsometry
might be related to the restructuring of the hydroxide and oxide layers.
It should be noted that the interfacial oxide layer remains intact
throughout the entire crystallization process. XPS studies performed on
samples with glass/Al/a-Si initial layer sequence before and after the
crystallization process below eutectic temperature indicates that the
initial position of the oxide layer does not change. The diffusion of
metal and Si atoms occur through the oxide layer, while the layer itself
stays intact. The findings on the effect of the thickness of the oxide
layer and XPS studies suggest that the interfacial oxide layer should be
thin or inhomogeneous enough to allow the material transport but stable
enough to stay intact throughout the process.

![](media/image132.png){width="4.127777777777778in"
height="3.7916666666666665in"}

[]{#__RefHeading___Toc125256118 .anchor}Figure 113. XPS depth profile
for O 1s region of 100 nm thick Al film on glass showing a shift to a
lower energy as the sputtering depth increases. Red line corresponds to
surface.

Figure 114 and Figure 115 show cross-section TEM images of a-Si/Al
interface of a sample. This particular sample has 600 nm a-Si layer
deposited by e-beam onto a 500 nm thick Al layer on 7059 glass
substrate. Figure 114 shows that a-Si/Al interface is not atomically
sharp. There is a thin transitional layer. This thickness is in well
agreement with calculated thickness of the interfacial oxide layer from
the ellipsometry measurements. Figure 115 shows a different cross
sectional area on the same sample. In this case, the layer between Si
and Al is not visible. Figure 116 shows cross-sectional TEM image of a
sample prepared by AIC. The sample had a Si/al ratio of 1.1 with an
initial Al layer thickness of 1 μm. The examined area of this particular
sample does not have any transition region or interfacial layer.
Amorphous Si mixed with Al lies on top of a Si grain in which several
defects are clearly visible. The absence of a separating layer between
Si and Al might be related to either the discontinuity of native oxide
layer due to the surface roughness of initial Al layer or the etching
effect of atomic hydrogen mentioned above. TEM images indicate that the
structure of the interfacial oxide layer is not uniform; there are
discontinuities and thickness variations.

![](media/image133.jpeg){width="3.220138888888889in"
height="3.5034722222222223in"}

[]{#__RefHeading___Toc125256119 .anchor}Figure 114. Cross-sectional TEM
image the sample with a layer sequence of glass/500 nm Al/600 nm Si. The
interfacial oxide layer with a thickness of 10-15 Å was also identified.

![](media/image134.png){width="3.879166666666667in"
height="3.2888888888888888in"}

[]{#__RefHeading___Toc125256120 .anchor}Figure 115. Another
cross-sectional TEM image the sample shown in Figure 114. The interface
is not atomically sharp and has discontinuities.

![](media/image135.png){width="4.8180555555555555in" height="2.98125in"}

[]{#__RefHeading___Toc125256121 .anchor}Figure 116. Cross-section TEM
image of a crystallized sample. The area investigated lacks an
interfacial oxide layer, which might be related to the etching effect of
atomic hydrogen in HWCVD system.

It is clear that the layer exchange process which is usually associated
with conventional metal-induced crystallization occurs only in the
presence of an interfacial oxide layer. This interfacial oxide layer,
however, is not required for the crystallization process. This also
indicates that the role of interface oxide might be limited to acting as
a physical barrier to prevent Si crystals growing into the a-Si layers
and facilitate lateral growth on the substrate surface. The oxide layer
also controls the diffusion process and determines the speed of
crystallization. A thinner oxide layer results in enhanced diffusion but
small grain size due to higher nucleation density. A thicker oxide layer
slows the crystallization process but yields larger grains. Depending on
the structure of the aluminum layer used and process conditions such as
annealing time and temperature, there has to be an optimum oxide layer
thickness which will yield the desired grain size in a reasonable amount
of time.

The effective activation energy for the crystallization and layer
exchange process was also calculated using OM images of partially
crystallized samples annealed at 430^o^C, 475^o^C, and 540^o^C. Figure
117 shows the plot of temperature dependence of the time needed for 50%
surface coverage. From the slope of the line, the effective activation
energy for AIC process was determined to be 0.9 eV. The calculated
activation energy is lower than reported value of 1.2 eV in
literature.Error: Reference source not found^,^[^107] On the other hand,
Widenborg[^108] reported a lower activation energy of 0.5-0.65 eV for a
modified MIC process based on an aluminum hydroxide interfacial layer.
Considering the characterization of interfacial oxide layer and the
existence of aluminum hydroxide as well as aluminum oxide at the
interface, the activation energy of 0.9 eV reported in this study seems
to be in good agreement with Widenborg\'s results. It seems that the
limiting factor in the AIC process is not the diffusion of Si into Al,
but rather the material transport through the interfacial oxide layer.

![](media/image136.jpeg){width="5.041666666666667in"
height="3.5743055555555556in"}

[]{#__RefHeading___Toc125256122 .anchor}Figure 117. Arrhenius plot of
the temperature dependence of time for crystallization. Samples had 500
nm a-Si layers deposited on 400 nm Al. Overall activation energy for
crystallization and layer exchange process was calculated to be 0.9 eV.

***Summary***

It has been shown that the grain size of poly-Si film formed after the
crystallization and layer exchange process is determined by three
factors; the grain structure of Al layer, the nature of the interfacial
oxide, and crystallization temperature. The interface oxide is crucial
for layer exchange process but not required for crystallization. The
oxide layer formed on Al films has a bilayer structure containing
Al~2~O~3~ and Al(OH)~3~, and the structure of the oxide layer determines
the material transport during layer exchange process. The overall
activation energy for crystallization and layer exchange process was
determined to be 0.9 eV. The limiting factor is the material transport
through the interfacial oxide layer. The gas phase chemistry during
deposition of a-Si layers is important. Hydrogen in a-Si layers seems to
have a detrimental effect on crystallization process by reducing the
overall driving force for crystallization.

**4.2 In-situ AIC below the eutectic point leading to 10 µm grains**

Most AIC studies reported in the literature perform the crystallization
thermal step *ex-situ*, after the low-temperature deposition of both Si
and Al layers as described in Section 4.1 above. However, attempts to
obtain continuous large grain poly-Si films using *ex-situ* AIC have
generally not been successful at IEC or elsewhere. Here, an *in-situ*
AIC crystallization process where Si is deposited by HWCVD on Al coated
glass substrates at 430^o^C leading to grains \>10 µm is discussed.

The glass substrates (Corning 7059 type) were cleaned using a mild soap
solution and DI water rinse. Aluminum films with 500 nm and 1000 nm
thicknesses were deposited on substrates by electron beam evaporation at
a fixed deposition rate of 4 nm/s. All Al coated glass substrates were
exposed to air, at least 24 hours prior to Si deposition to ensure the
formation of an oxide layer as discussed above.

In-situ AIC experiments were performed using the HWCVD system. The
background pressure in the HWCVD system was always kept below 5x10^-7^
Torr. Silane gas was used as the source gas without hydrogen dilution.
Silicon films with 500, 600 and 1000 nm thicknesses were deposited at
fixed substrate and filament temperatures of 430^o^C and 1850^o^C,
respectively, and a pressure of 25 mTorr. The deposition rate of Si was
either 1 or 5 μm/hour.

In a conventional AIC process where a-Si and Al layers are annealed at
temperatures below 500^o^C, the poly-Si film is formed on the glass
substrate, replacing the initial Al layer. Al is accumulated on top of
the newly formed poly-Si layer. If the thickness of the a-Si layer is
greater than the thickness of the initial Al layer, the excess Si is
accumulated on top of the newly formed poly-Si layer. The newly formed
poly-Si layer is covered with a surface layer of mixed Si and Al. This
mixture must be removed before the poly-Si can be used as a seed layer.
The schematic illustration of the crystallization process is shown in
Figure 118.

![](media/image137.wmf){width="4.625in" height="2.7625in"}

[]{#__RefHeading___Toc125256123 .anchor}Figure 118. Schematic
illustration of crystallization of Si during deposition. Si first
diffuses into Al layer where it nucleates. Growing Si crystals replace
Al until a continuous poly-Si layer is formed. After crystallization
process, Al and excess Si accumulate on top of newly formed poly-Si
film.

The crystallization process can be divided into 3 steps: First, Si
diffuses into Al layer. Depending on the flux of Si atoms, a thin Si
film might be formed on top of the Al layer. Next, the Al layer is
supersaturated with Si and dissolved Si crystallizes at Al grain
boundaries. The grain boundaries are preferential nucleation sites
because supersaturation can be achieved locally, although Al grains are
not supersaturated. Finally, Si grains grow both laterally and
vertically until they reach the glass substrates. After that, only
lateral growth is possible, since the oxide layer at the a-Si/Al
interface acts as a physical barrier.

Si grains grow laterally, replacing the initial Al layer. Al diffuses
through the interface and accumulates on top of the newly formed poly-Si
layer. The thickness of the poly-Si layer is determined by the thickness
of the initial Al layer. Figure 119 shows the SEM surface image of a
sample after Si deposition. The substrate was 500 nm Al coated glass
substrate, and the thickness of the Si layer deposited was 600 nm.
Deposition and crystallization of Si occurred at the same time. EDS
analysis of the sample revealed the presence of Al and Si on the
surface, indicating that the initial Al layer was replaced by poly-Si
film. Depending on the thicknesses of Si and Al layers and the
deposition rate of Si, samples showed a variety of different surface
morphologies.

![](media/image138.wmf){width="2.952777777777778in"
height="2.970138888888889in"}

[]{#__RefHeading___Toc125256124 .anchor}Figure 119. SEM image of a
sample after Si deposition in HWCVD system. A 600 nm thick Si layer was
deposited on 500 nm Al coated glass substrate. The surface of the sample
contains mostly Al and some excess Si.

In the literature, the poly-Si layer is commonly exposed, by using a
standard Al etching solution. This solution consists of 80 parts of
phosphoric acid, 5 parts of nitric acid, 5 parts of acetic acid, and 10
parts of deionized water, and is applied at temperatures of 50^o^C -
55^o^C. However, this solution removes only the exposed Al on the
surface, not the Al clusters surrounded by excess Si.

In order to reveal the grain structure of poly-Si hidden by the excess
Si and Al, a new etching procedure was developed. This etching recipe
involves the use of a standard Al etching solution mentioned above as
well as the use of XeF~2~ gas. XeF~2~ gas etches a-Si and nano-Si
rapidly compared to the etching rate for the crystalline phase. The new
etching procedure involves sequential etching using XeF~2~ and standard
Al etching solution for different times, depending on the thickness of
the initial Al layer and Si film deposited.

Figure 120 shows the SEM image of a sample with an initial layer
structure of glass/500 nm Al/ 600 nm a-Si after partial etching, using
the new etching process. The sequential etching removes excess Si as
well as the exposed and unexposed Al trapped in the Si matrix, resulting
in almost planar etching. Since the etching is not complete, some excess
Si is still visible (lighter areas) on top of Si grains (darker areas).

![](media/image139.jpeg){width="2.990972222222222in"
height="2.9993055555555554in"}

[]{#__RefHeading___Toc125256125 .anchor}Figure 120. SEM image of the
sample after partial etching. The darker areas are Si grains while the
lighter areas are mixtures of amorphous and nanocrystalline Si not
etched yet. Grains of 10-15 nm are visible.

Figure 121 shows the SEM image of the same sample at higher
magnification. Three individual Si grains and two-grain boundaries
between them are clearly visible on the left hand side of the image. The
average grain size was estimated to be 10 to 13 μm after complete
etching of the excess Si from the surface.

![](media/image140.jpeg){width="2.990972222222222in"
height="2.988888888888889in"}

[]{#__RefHeading___Toc125256126 .anchor}Figure 121. A close up SEM image
of the same area shown in Figure 112, showing excess Si on top of
continuous Si grains after etching. Two-grain boundaries are visible on
the left hand side of the image. Average grain size was estimated around
10-13 μm.

![](media/image141.wmf){width="4.165277777777778in"
height="2.9611111111111112in"}

[]{#__RefHeading___Toc125256127 .anchor}Figure 122. Raman spectra of
exposed poly-Si layer after etching and c-Si for comparison. The peak is
symmetric and position matches with c-Si, indicating high quality
crystalline- phase.

Figure 122 shows the Raman spectrum taken from the Si grain on the left
hand side in Figure 121. For comparison, the Raman profile of c-Si is
also shown. The Raman profile reveals a high quality Si crystal without
any amorphous or nano-crystalline phase, which would be seen at 480 and
504 cm^-1^, respectively. The crystalline Si peak is symmetric, and the
peak position matches with c-Si at 519 cm^-1^, indicating a high quality
Si film with little or no stress.

The effects of Si and Al layer thicknesses on the nucleation density and
the surface coverage of Si grains was evaluated using optical
microscopy. In reflection mode, Si crystals reaching to the glass
substrate are seen as dark spots, compared to a highly reflective Al
layer. Figure 123 shows OM images of 4 samples taken through the glass
substrates, each representing a different level of crystallization. The
Si/Al thickness ratios and Al layer thicknesses were; (a) 0.5 and 1000
nm, (b) 1.0 and 1000 nm, (c) 1.0 and 500 nm, and (d) 1.2 and 500 nm.

> ![](media/image142.wmf){width="5.4743055555555555in"
> height="4.648611111111111in"}

[]{#__RefHeading___Toc125256128 .anchor}Figure 123. Optical microscopy
images of 4 different samples taken through the substrates. The Si/Al
ratios and Al layer thicknesses were: (a) 0.5 and 1000 nm, (b) 1.0 and
1000 nm, (c) 1.0 and 500 nm, and (d) 1.2 and 500 nm, where a continuous
poly-Si film was obtained on the substrate.

Although the Si layer thicknesses were different, the
deposition/crystallization times were comparable. Increasing the amount
of Si available for crystallization increases the surface coverage of Si
crystals from 5% in Figure 123a to 50% in Figure 123b, but does not
change the nucleation density. When the Al layer thickness was reduced
to 500 nm in Figure 123c, the surface coverage of the Si crystals
increased to over 90%.

It was first thought that aluminum clusters that were stuck between
growing poly-Si grains prevented formation of a continuous poly-Si film.
However, when the Si/Al ratio was increased from 1.0 to 1.2 to provide
enough Si for crystallization, a continuous poly-Si film (Figure 123d)
was obtained. A few, very small Al clusters can still be seen between
the poly-Si grains for the sample in Figure 123d. However, no Al
clusters were observed in similar samples with a maximum Al layer
thickness of 500 nm. Actually, the sample shown in Figure 123d is the
same sample shown in Figure 119. Using an Al layer thickness greater
than 500 nm resulted in non-continuous poly-Si films with Al clusters
between Si grains. This is the result of Si grains coalescing and
forming a diffusion barrier for Al atoms, as the Si grains grow faster
along Si/Al interface than on the glass surface.

In order to prevent Al clusters on the glass surface after
crystallization, the initial layer of the Al layer must be equal or less
than 500 nm when the deposition conditions mentioned above are used.
When thicker Al layers were used, the formation of a continuous poly-Si
layer along Si/Al interface prevented diffusion of Al, resulting in an
incomplete crystallization process with some of the Al trapped between
glass and continuous poly-Si layer at the Si/Al interface.

Increasing the Si/Al ratio further does not improve either the quality
or the thickness of the poly-Si film. Increasing the Si layer thickness
results in a continuous poly-Si film with a thickness equal to the
thickness of the initial layer of Al, and on top of that layer, a
mixture of excess Si and Al. XRD analysis of the poly-Si layer revealed
preferential (400) or (422) orientations. The major limitation of
poly-Si layers prepared by *in-situ* or conventional *ex-situ* AIC
process is Al contamination.

In previous reports, Al concentrations in the order of 10^19^
Atoms/cm^3^ have been measured in poly-Si layers prepared by
conventional AIC. Although AIC poly-Si layers with this level of Al are
inadequate as a solar cell absorber, they can be used as potential seed
layers for epitaxial growth of bulk Si.

In summary, continuous poly-Si films on glass substrates were obtained
using an *in-situ* aluminum-induced crystallization technique at
430^o^C. The Al film deposited by e-beam was 0.5 µm and the Si deposited
by HWCVD was 0.6 µm. Poly-Si films had an average grain size of 10-13
μm, corresponding to a grain size/thickness ratio greater than 20 and
similar to poly-Si films prepared by conventional metal-induced
crystallization. Poly-Si layers prepared by either an in-situ or
conventional AIC process can be used as seed layers for epitaxial Si
growth or for back contact formation in c-Si solar cell fabrication at
temperature below 500^o^C. As an alternative to conventional AIC, the
in-situ AIC process eliminates an additional annealing step, which saves
considerable time during processing.

**5 DIAGNOSTICS**

**5.1 GIXRD**

*Introduction*

The development of thin film materials for photovoltaics is facilitated
by non-destructive analytical methods which can provide quantitative
information on the physical and chemical state of the constituent
layers, their interfaces and surfaces. Glancing incidence x-ray
diffraction (GIXRD) is a powerful diagnostic tool for non-destructive
analysis of thin film materials and structures which provides this
capability by decoupling incident and diffracted beam paths, allowing
depth-specific quantification of phase distribution, alloy formation,
residual stress, and particle size. The addition of a heater and means
for ambient control allows real-time *[in situ]{.underline}*
investigation of chemical reactions between thin film specimens and
ambient and between different layers within the thin film structure.

*GIXRD Fundamentals*

The *symmetric* diffraction condition, in which the incident and
diffracted beam angles are identical, produces a diffraction signal only
for sets of crystal planes whose normal bisects the incident and
diffracted beam direction (shaded circles in Figure 124, left). In its
most common application, powder diffractometry, the diffraction pattern
is measured over a wide angular range for a powder bed containing
randomly oriented particles with size \>100 μm, using the Bragg-Brentano
(B-B) parafocusing optical configuration.[^109] The B-B method permits
accurate intensity measurement for lattice planes lying parallel to the
focusing plane, allowing quantitative assessment of phase mixtures to be
reliably determined to ±1 weight percent. By substituting a thin film
for the powder in the focal plane, randomness is not guaranteed and the
crystallographic texture of the specimen with respect to the substrate
can be assessed. Whereas powder line profiles in B-B mode are primarily
sensitive to instrumental effects, those of thin films are sensitive to
both sample and instrumental effects: asymmetrical broadening by beam
divergence; broadening by specimen planarity; non-uniform stress and
small domain volumes; and angular shifting by specimen displacement from
focusing circle and uniform stress. Parallel beam geometry reduces some
of these effects significantly. Furthermore, since the incident beam
angle changes as the intensity pattern is acquired; greater incident
beam penetration is obtained at higher diffraction angles. For example,
the sampling depth for Cu *K*α x-rays in CuIn~0.7~Ga~0.3~Se~2~ is 3.3 μm
for (112) and 6.3 μm for the (312)/(116) doublet. Thus, peaks obtained
at different diffraction angles arise from different depths in the
specimen, known as the diffraction volume, and the utility of the
symmetric diffraction mode for quantitative analysis of thin film
specimens is limited by the inability to differentiate between phase
mixtures and layers.

![](media/image143.wmf){width="5.186805555555556in"
height="1.448611111111111in"}

[]{#__RefHeading___Toc125256129 .anchor}Figure 124. Symmetric and
asymmetric diffraction from a polycrystalline aggregate.

The *asymmetric* diffraction condition is defined by decoupling of the
incident and diffracted beams. For a fixed incident beam angle, only
lattice planes located at the Bragg angle for that incident beam angle
give diffraction intensity (shaded circles in Figure 124, right). Fixing
the incident beam at different, low angles allows measurement of
diffraction patterns over a fixed sampling depth, in a constant
diffraction volume. Diffraction patterns obtained at very shallow, or
glancing, incident angles contain information relating to the film
surface, since mass absorption of the x-rays by the specimen attenuate
the incident beam intensity in the surface region. Diffraction patterns
obtained at higher incident beam angles contain information averaged
over a greater fraction of the film depth, and analysis of diffraction
patterns acquired at varying incident beam angles permits quantitative
determination of film thickness, compositional distribution, and
residual stress distribution. Figure 125 shows the coordinate system and
configuration employed for GIXRD in this work.

![](media/image144.wmf){width="4.688888888888889in"
height="2.8944444444444444in"}

[]{#__RefHeading___Toc125256130 .anchor}Figure 125. Coordinate system
and two-circle diffractometer configuration used for GIXRD thin film
measurement.

The GIXRD geometry with parallel beam optics is shown in Figure 126. The
Bragg condition for diffraction in a refractive index matched
(air-specimen) system is $2\theta = \Omega + \xi$.

![](media/image145.wmf){width="3.6354166666666665in"
height="1.5923611111111111in"}

[]{#__RefHeading___Toc125256131 .anchor}Figure 126. GIXRD diffraction
volume in planar specimen.

Parallel beam optics offer advantages over parafocusing methods, such as
higher beam intensity and reduced angular sensitivity to specimen
displacement offsets in the z-direction, in and out of the calibration
plane. However, the angular resolution is typically lower. The measured
*2θ* peak positions of the CdTe (111) peak in B-B parafocusing and
parallel beam configurations are shown in Figure 127 for displacement
above and below the calibration plane (focal plane of the B-B geometry).
The results show that for B-B geometry, a total offset range of 2.2 mm
causes a *2θ* variation of 1.6 deg. For parallel beam geometry, the
displacement does not measurably change the *2θ* position and only
affects the intensity due to irradiated area differences.

![](media/image146.wmf){width="3.926388888888889in" height="2.3125in"}

[]{#__RefHeading___Toc125256132 .anchor}Figure 127. Comparison of CdTe
(111) peak position versus z displacement for Cu *K*α diffraction using
Bragg-Brentano (circles) and parallel beam 5 deg incidence GIXRD
(squares) measurement geometries.

The path of light incident from air to a planar medium changes by the
differing refractive indices. Figure 128 shows this effect for light at
\~600 nm and 0.154 nm. For depth profiling and lattice parameter
calculation, the incident beam angle must thus be corrected for
refraction:

$\Omega' = \left( \frac{n_{1}}{n_{0}} \right)\text{arcsin}(\Omega)$ (18)

![](media/image147.wmf){width="4.925694444444445in" height="1.125in"}

[]{#__RefHeading___Toc125256133 .anchor}Figure 128. Beam paths for
visible light and x-rays in planar specimen.

The refractive index (*n*) is a complex quantity and is fully expressed
as

*n = 1 - δ - iβ, * where (19)

$\delta = \frac{r_{e}\lambda^{2}}{2\pi}\sum_{i}^{}{N_{i}\left( Z_{i} + {\Delta f}_{i}^{'} \right)}$
and
$\beta = \frac{r_{e}\lambda^{2}}{2\pi}\sum_{i}^{}{\Delta f}_{i}^{\text{\} \} N rSub \{ size 8\{i\} \} \} \} \{}}$
(20)

where *r~e~* is the electron radius = 2.82 x 10^-15^ m, *λ* is the x-ray
wavelength, *Z~i~* is the atomic number of the i^th^ atom, *N~i~* is the
number of i^th^ atoms per unit volume, and *∆f'* and *∆f"* are the
elemental dispersion corrections.[^110] The index determines the
critical angle, *θ~c~*, at which total reflection occurs, below which
diffracted intensity tends to zero. The imaginary part of the refractive
index (*β*) is related to the specimen mass absorption coefficient by:

$\mu = \frac{4\text{πβ}}{\lambda}$ (21)

The sampling depth (SD) depends on the mass absorption of the specimen
and the incident angle, which determine the penetration depth (PD):

$\text{SD} = \text{PD}\text{sin}(\Omega') = \left( \frac{1}{\mu} \right)\text{sin}(\Omega')$
(22)

For mixtures or compounds, the linear mass absorption coefficient
(*μ~m~*) is calculated using:

$\mu_{m} = \frac{1}{\rho_{m}}\left\lbrack \sum_{i}^{}{C_{i}\left( \frac{\mu}{\rho} \right)}_{i} \right\rbrack^{- 1}$
(23)

where *ρ~m~* is the net specimen density, *C~i~* is the weight fraction
of the i^th^ elemental component, and (*μ/ρ*)~i~ is the corresponding
elemental mass absorption coefficient. The absorption length (*1/μ*) is
the length at which the incident beam is attenuated to 1/e of the
incident intensity. Table XXXII lists the optical constants for selected
elemental and compound materials encountered in thin film photovoltaic
research, calculated using the equations above. The sampling depth, SD,
is calculated for incident beam angle, *Ω* = 1 deg, corrected for
refraction.

[]{#__RefHeading___Toc125256174 .anchor}Table XXXII. Optical properties
of selected materials for Cu *K*α: λ = 0.15405 nm, hν = 0.008 MeV.

+---------+---------+---------+---------+---------+---------+---------+
| M       | *1/μ*   | *δ*     | *β*     | *n*     | *θ~c~*  | SD @ 1º |
| aterial |         |         |         |         |         |         |
|         | (μm)    |  (x     |  (x     |         | (deg)   | (nm)    |
|         |         | 10^-5^) | 10^-7^) |         |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| Al      | 76.15   | 0.847   | 1.93    | 0       | 0.24    | 1325    |
|         |         |         |         | .999992 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| Cr      | 17.40   | 2.12    | 23.1    | 0       | 0.37    | 303     |
|         |         |         |         | .999981 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| Ni      | 14.98   | 3.11    | 7.49    | 0       | 0.45    | 261     |
|         |         |         |         | .999970 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| Mo      | 6.05    | 2.83    | 20.4    | 0       | 0.43    | 106     |
|         |         |         |         | .999974 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| WC      | 3.20    | 4.68    | 37.9    | 0       | 0.55    | 55      |
|         |         |         |         | .999957 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| Se      | 22.8    | 1.29    | 5.08    | 0       | 0.29    | 396     |
|         |         |         |         | .999988 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| Te      | 5.46    | 1.67    | 21.9    | 0       | 0.33    | 95      |
|         |         |         |         | .999985 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| Si      | 70.82   | 0.755   | 2.13    | 0       | 0.22    | 1236    |
|         |         |         |         | .999993 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| Ge      | 24.82   | 1.44    | 5.18    | 0       | 0.31    | 433     |
|         |         |         |         | .999986 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| α-CdS   | 10.44   | 1.36    | 11.9    | 0       | 0.30    | 182     |
|         |         |         |         | .999988 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| CdSe    | 9.94    | 1.56    | 12.2    | 0       | 0.32    | 174     |
|         |         |         |         | .999986 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| CdTe    | 6.68    | 1.53    | 18.1    | 0       | 0.32    | 117     |
|         |         |         |         | .999987 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| β−ZnS   | 34.96   | 1.20    | 3.78    | 0       | 0.28    | 610     |
|         |         |         |         | .999988 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| ZnSe    | 23.86   | 1.48    | 5.06    | 0       | 0.31    | 416     |
|         |         |         |         | .999986 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| ZnTe    | 8.48    | 1.50    | 14.2    | 0       | 0.31    | 148     |
|         |         |         |         | .999986 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| HgS     | 6.22    | 2.04    | 21.4    | 0       | 0.37    | 109     |
|         |         |         |         | .999982 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| HgSe    | 6.69    | 2.05    | 19.5    | 0       | 0.37    | 117     |
|         |         |         |         | .999981 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| HgTe    | 5.11    | 2.00    | 24.8    | 0       | 0.36    | 89      |
|         |         |         |         | .999983 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| C       | 42.66   | 1.05    | 3.18    | 0       | 0.26    | 745     |
| uAlS~2~ |         |         |         | .999990 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| Cu      | 27.20   | 1.31    | 4.44    | 0       | 0.29    | 475     |
| AlSe~2~ |         |         |         | .999987 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| C       | 32.71   | 1.26    | 3.97    | 0       | 0.29    | 571     |
| uGaS~2~ |         |         |         | .999988 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| Cu      | 23.20   | 1.50    | 5.15    | 0       | 0.31    | 405     |
| GaSe~2~ |         |         |         | .999986 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| C       | 13.81   | 1.36    | 9.17    | 0       | 0.30    | 241     |
| uInS~2~ |         |         |         | .999987 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| Cu      | 12.80   | 1.55    | 9.54    | 0       | 0.32    | 223     |
| InSe~2~ |         |         |         | .999985 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| SiO~2~  | 132.54  | 0.706   | 0.935   | 0       | 0.22    | 2313    |
|         |         |         |         | .999930 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| CdO     | 6.03    | 2.25    | 20.3    | 0       | 0.38    | 105     |
|         |         |         |         | .999979 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| ZnO     | 35.22   | 1.60    | 3.53    | 0       | 0.32    | 615     |
|         |         |         |         | .999984 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| In      | 6.86    | 2.00    | 17.9    | 0       | 0.36    | 120     |
| ~2~O~3~ |         |         |         | .999982 |         |         |
+---------+---------+---------+---------+---------+---------+---------+
| C       | 7.69    | 1.63    | 15.6    | 0       | 0.33    | 134     |
| dTeO~3~ |         |         |         | .999985 |         |         |
+---------+---------+---------+---------+---------+---------+---------+

In a polycrystalline assemblage such as a powder, sintered pellet, or
film, each grain can have a unique crystallographic orientation, size,
stress, and composition compared to its neighbors. The extent of
texture, or preferred orientation, with respect to the sample surface is
closely tied to the thermo-chemical history of the film and can only be
completely determined by pole figure measurements, where diffraction
intensities are collected for a fixed Bragg angle but at different
positions of *φ* (about z-axis) and *Ψ *(away from *Ω−ξ* plane).
Single-axis texture coefficients (*TC~hkl~*) can be determined from B-B
measurements by normalizing peak intensities:

$\text{TC}_{\text{hkl}} = N\left\lbrack \frac{I^{\text{hkl}}}{I_{0}^{\text{hkl}}} \right\rbrack\left\lbrack \sum_{\text{all} - \text{hkl}}^{}\frac{I}{I_{0}} \right\rbrack^{- 1}$
(24)

where *N* = the number of peaks considered, and *I/I~0~* is the measured
intensity rank of each peak, normalized to the powder standard. Similar
*TC* is obtained with GIXRD and B-B methods for films with random and
slight low-order orientation, e.g., for CdTe films with *TC~111~* \< 5.

The measured diffraction intensity is the convolution of the pure
material intensity function with the effects of the polycrystalline
assemblage and the diffractometer instrument function. The resulting
line profile can be mathematically represented by the Pearson VII
function:

$I = I_{0}\left\lbrack 1 + \left( \frac{2\left( 2\theta - 2\theta_{p} \right)\sqrt{2^{\frac{1}{m}} - 1}}{H} \right)^{2} \right\rbrack^{- 1}$
(25)

where *2θ~p~* is the centrum, *H* is the peak half-breadth and *m* is
the shape parameter. The peak width, representing a lattice parameter
distribution, is affected by many factors, most significantly
non-uniform stress, particle size and alloying. Precise uncoupling of
these effects with two-circle diffraction is not possible without
additional specimen-specific information, such as a compositional depth
profile or microscopic imaging to assess grain size. However, in II-VI
and I-II-VI~2~ films, the angular distortions can be ranked in terms of
their magnitude. For films with large crystallites, alloying exerts the
greatest effect. The integral line breadth, *B* = ratio of peak area to
peak maximum, of a given (hkl) reflection, is inversely related to the
number of planes contributing to the diffraction intensity. Different
treatments of the problem have led to the same result:[^111]^,^[^112]

$B(2\theta) = \frac{\lambda}{L\text{cos}(\theta)}$ (26)

where the parameter L is a volume average of the crystal dimension
normal to the reflecting planes. For spherical particles with diameter,
*D*, the parameter *L* \~ *D*. For fibrous grains with width, *D*', the
parameter *L* \~ 1.1*D*'. In a polycrystalline film, both shape and
width of the line profile are affected, depending on the distribution of
particle sizes; therefore some *[a priori]{.underline}* assessment of
grain size distribution is invaluable before attributing broadening to
compositional or stress related effects. The Cu *K*α particle size
broadening effect at 2*θ* = 25° is *B* = 9 for *D* = 1 nm and B = 0.09
deg for *D* = 100 nm.

Uniform stress (*σ*) from a given direction (*Ψ*) results in uniform
lattice strain (*ε~Ψ~*), which causes angular peak displacement, while
non-uniform stress distorts peak shape. The measured strain is related
to the applied stress by the elastic compliance coefficients. The
in-plane strain-stress relationship for f.c.c. materials is:[^113]

$\varepsilon_{\Psi}^{\text{hkl}} = \left( \frac{d_{\Psi} - d_{0}}{d_{0}} \right)^{\text{hkl}} = \sigma\left\lbrack \frac{\left( 2S_{\text{11}} + 4S_{\text{12}} - S_{\text{44}} \right)}{3} + \left( \frac{S_{\text{44}}}{2} \right)\text{sin}^{2}\Psi \right\rbrack$
(27)

where *S~ab~* are the compliance coefficients and *d~Ψ~* is the
d-spacing of (hkl) planes with their normals subtending the angle *Ψ* to
the substrate normal. In B-B geometry, *Ψ* is always zero, while in
GIXRD, *Ψ* equals the Bragg angle (*2θ/2*) minus the incident beam angle
(*Ω*). By convention, tensile in-plane stress is positive, while
compressive is negative.

Multi-layer film structures in which the layers are thinner than the
absorption length can be analyzed by GIXRD for layer thickness, alloy
formation via interdiffusion, and other chemical changes incurred during
processing. Assuming planar geometry, the relation between thickness and
peak intensity of the *n^th^* film layer in a multi-layer stack
is:[^114]

$I_{n} = \frac{K_{n}}{\text{sin}\Omega}\frac{1 - \text{exp}\left\lbrack - \left( \frac{\mu}{\rho} \right)_{n}\left( \frac{1}{\text{sin}\Omega} + \frac{1}{\text{sin}\xi} \right)\rho_{n}d_{n} \right\rbrack}{\left( \frac{\mu}{\rho} \right)_{n}\left( \frac{1}{\text{sin}\Omega} + \frac{1}{\text{sin}\xi} \right)\rho_{n}}\prod_{i = 1}^{n - 1}{\text{exp}\left\lbrack - \left( \frac{\mu}{\rho} \right)_{i}\left( \frac{1}{\text{sin}\Omega} + \frac{1}{\text{sin}\xi} \right)\rho_{i}d_{i} \right\rbrack}$
(28)

where *K* is the intensity scaling factor at incident beam angle. The
peak intensity of an underlying substrate (*s*) is calculated using:

$I_{s} = \frac{K_{s}}{\text{sin}\Omega}\frac{\prod_{i = 1}^{n}{\text{exp}\left\lbrack - \left( \frac{\mu}{\rho} \right)_{i}\left( \frac{1}{\text{sin}\Omega} + \frac{1}{\text{sin}\xi} \right)\rho_{i}d_{i} \right\rbrack}}{\left( \frac{\mu}{\rho} \right)_{s}\left( \frac{1}{\text{sin}\Omega} + \frac{1}{\text{sin}\xi} \right)\rho_{s}}$
(29)

**Measurement and Film Preparation**

GIXRD measurements were made on a Rigaku D/Max 2100 diffractometer with
an 18.5 cm radius two-circle goniometer using Cu *K*α radiation with
stationary anode, at 40 kV and 40 mA. Parallel beam optical geometry was
employed for the measurements using narrow Soller slit assemblies in
incident and diffracted beam paths, with incident beam area of 10 mm x
15 mm. Wide angle scans were made at a step size of 0.05 deg and a step
rate of 1 deg/min. For higher precision needed for lattice parameter
determination and line profiles, scans were acquired at a step size of
0.02 deg. Raw data was smoothed using 5 point binomial smoothing and
stripped of *K*α~2~ component with the Rachinger correction. B-B
measurements were made with a Philips/Norelco powder diffractometer
using Cu *K*α radiation at 35 kV and 20 mA. GIXRD line profiles of CdTe
and CuInSe~2~ films deposited at high temperatures having grain size \>
1 μm exhibit Pearson VII distributions with shape parameter 3 \< m \< 10
and full width at half maximum (FWHM) of 0.35 deg. The B-B line profiles
of the same CdTe and CuInSe~2~ films exhibit Pearson VII distributions
with shape parameter m = 3 and FWHM of 0.12 deg.

Films were also analyzed by atomic force microscopy (AFM) with a digital
Instruments Dimension 3100 system in tapping mode. Scanning electron
microscopy with an Amray 1810T system was used to assess surface
morphology in conjunction with energy dispersive x-ray spectroscopy
(EDS) by Oxford Instruments for composition. EDS was carried out at 20
kV, which provides average composition over a depth of \~1 μm, for films
with ρ = 6 g/cm^3^.

CdS films were deposited by chemical surface deposition from an aqueous
bath containing CdSO~4~, thiourea and ammonia onto In~2~O~3~:SnO (ITO)
coated Corning 7059 glass substrates at 40ºC.Error: Reference source not
found CuIn~1-x~Ga~x~Se~2~ films were fabricated by reaction of sputtered
metal precursor films with H~2~Se gas at 450ºC.[^115] CdTe films were
deposited physical vapor deposition (PVD) at 0.1 μm/min onto stationary
substrates at 325ºC and by vapor transport deposition (VT) at 10 μm/min
onto substrates translating at 10 cm/min at 550ºC.[^116] Films were
subjected to *[in situ]{.underline}* oxidation in dry and humid ambient,
*[in situ]{.underline}* CdCl~2~ treatment, and *[ex situ]{.underline}*
etching in 1:70 nitric:phosphoric (NP) acid. Mo films were deposited
onto Corning 7059 and Glaverbel soda lime glass by DC sputtering onto
stationary substrates at 700W in argon at pressures of 2, 3 and 5 mTorr.

**GIXRD Applications**

***Recrystallization of chemical surface deposited CdS***

Chemical surface deposited CdS films are used as window layers for thin
film CdTe and CuInSe~2~ based solar cells. Figures 129 and 130 show AFM
images and GIXRD patterns of 40 nm thick CdS films deposited at 40ºC
onto ITO/7059 substrates and heat treated. Two heat treatments were
used: 550ºC in argon for 10 min (HTA) and 400ºC for 20 min in 9 mTorr
CdCl~2~ vapor in air (CdCl~2~). As-deposited films are dense, conformal
and free of surface residues but exhibit very small particulate size.
The as-deposited GIXRD pattern shows numerous In~2~O~3~ peaks of the ITO
substrate and a low broad peak at the position expected for CdS (100)
and (002). Analysis of the peak shape using equations 8 and 9 above
yield as-deposited average particulate size of 10 nm, consistent with
the small features in the AFM image. HTA treatment promoted secondary
recystallization, with (002) orientation and narrow grain size
distribution. CdCl~2~ treatment promoted primary and secondary
recrystallization, with random orientation and a broader range of
crystallite size.

![](media/image148.wmf){width="6.0in" height="2.042361111111111in"}

[]{#__RefHeading___Toc125256134 .anchor}Figure 129. AFM images at 1 μm x
1 μm of as-deposited and treated CdS films.

![](media/image149.wmf){width="3.563888888888889in"
height="1.9673611111111111in"}

[]{#__RefHeading___Toc125256135 .anchor}Figure 130. GIXRD of
CdS/ITO/7059 samples at 1 deg incidence for samples of Figure 120.

***Composition Profile in Selenized CuIn~1-x~Ga~x~Se~2~***

A promising approach for fabricating CuIn~1-x~Ga~x~Se~2~ films at the
commercial scale is by reaction of sputtered metal precursor films in
H~2~Se ambient, known as "selenization", and the critical issue is
controlling Ga distribution through the film. Selenization of a
SL/Mo/Cu~0.8~Ga~0.2~/In bilayer precursor was carried out at 450ºC for
30 min in 0.35vol% H~2~Se in Ar:O~2~ (O~2~:H~2~Se = 0.01). The resulting
film was characterized by EDS and multi-incidence GIXRD to survey the
through-film composition. The film was then bonded to a glass substrate,
peeled from the Mo substrate and re-measured. Broad GIXRD patterns
showed that all reflections had the same shape dependence on incident
beam angle. Figure 131 shows four sets of diffraction patterns of the
(112) peak and EDS results; the upper row shows measured data for the
as-deposited (left) and exposed (right) surfaces. The film is found to
contain higher Ga at the Mo interface than at the surface. The line
profiles for the two cases were modeled for an exponentially varying Ga
composition from the Mo interface towards the film surface (inset).
Modeling the GIXRD patterns from both sides supports the effort to
quickly diagnose uniformity by a single measurement from the
as-deposited surface.

![](media/image150.wmf){width="5.342361111111111in" height="4.5in"}

[]{#__RefHeading___Toc125256136 .anchor}Figure 131. Measured and modeled
CuIn~1-x~Ga~x~Se~2~ (112) GIXRD line profiles for measurement through
as-deposited surface (left) and exposed surface after peeling (right).

**[CdTe/CdS Treatments]{.underline}**

Post-deposition treatments needed to fabricate high efficiency thin film
CdTe/CdS cells produce multiple effects such as surface oxidation and
reduction and interdiffusion.[^117] GIXRD with *[in situ]{.underline}*
heating and ambient control was used to directly investigate oxide
formation and interdiffusion. Figure 132 shows time-progressive patterns
for PVD CdTe films annealed in dry and humid air (\~0.1 g/L) at 500ºC.
In dry air, α-CdTeO~3~ formed after 20 min, decreasing the (111) peak
intensity. The oxide thickness followed a parabolic time dependence,
indicating diffusion limited formation rate. Humidity enhanced the
oxidation rate, with α-CdTeO~3~ peaks forming within the first 10 min
then transforming to β-CdTeO~3~. Figure 133 shows time-progressive
patterns obtained for 400ºC CdCl~2~ treatment of a VT CdTe cell with 1
μm CdTe and 80 nm CdS on L.O.F. TEC-15 SnO~2~/soda-lime glass; the AM1.5
conversion efficiency of the completed cell treated for 20 minutes was
11%. In the figure, note that the SnO~2~ (110) peak position was
unchanged by the treatment, but interdiffusion between CdTe and CdS
shifted the CdTe (111) and CdS (002) peak positions to those of
CdTe~0.95~S~0.05~ and CdS~0.95~Te~0.05~.

![](media/image151.wmf){width="5.990972222222222in"
height="2.0819444444444444in"}

[]{#__RefHeading___Toc125256137 .anchor}Figure 132.
*[in-situ]{.underline}* GIXRD patterns at 1 deg incidence of PVD CdTe
heat treated at 500ºC in dry (left) and humid ambient (right).

![](media/image152.wmf){width="3.551388888888889in"
height="2.102777777777778in"}

[]{#__RefHeading___Toc125256138 .anchor}Figure 133.
*[in-situ]{.underline}* GIXRD patterns of CdCl~2~ treated VT
CdTe/CdS/SnO~2~ at 5 deg incidence.

Figure 134 shows the GIXRD pattern of a Te layer formed after etching
CdTe in NP acid mixture for 60 s. The CdTe (111) and Te (101) peak
intensities and ratios versus *Ω* were modeled using equations 11 and 12
above and intensity factors from film standards. The modeled CdTe and Te
peak intensities and intensity ratios are shown in Figure 135.

![](media/image153.wmf){width="3.551388888888889in"
height="2.0819444444444444in"}

[]{#__RefHeading___Toc125256139 .anchor}Figure 134. GIXRD at different
incident beam angles of NP etched PVD CdTe.

Pearson VII peak fitting was used to separate the CdTe (111) peak from
the Te (100) in the measured data. Iterative solutions were calculated
by changing only the Te thickness to minimize the difference between
measured and modeled Te/CdTe intensity ratio, yielding 25 nm.

![](media/image154.wmf){width="2.207638888888889in"
height="1.8444444444444446in"} ![](media/image155.wmf){width="2.25in"
height="1.8659722222222221in"}

[]{#__RefHeading___Toc125256140 .anchor}Figure 135. (Left) Modeled CdTe
(111) and Te (110) peak intensities versus incident beam angle for a 25
nm Te layer on 4 μm thick CdTe film and (Right) measured and modeled
Te(101)/CdTe (111) peak intensity ratios versus incident beam angle for
NP etched CdTe.

**[Stress in Sputtered Mo Films]{.underline}**

Sputter deposition of metals can lead to incorporated stress, depending
on deposition pressure. Residual stress in Mo films used as substrates
for CuInSe~2~ based solar cells can affect Mo reactivity, adhesion and
crack formation in both Mo and CuInSe~2~ layers. The depth variation of
stress was investigated with multi-incidence GIXRD of different (hkl)
peaks in films deposited at 2, 3 and 5 mTorr on Glaverbel soda-lime
glass and Corning 7059 glass. In-plane stress was calculated using
equation 10 above and plotted versus sample depth (Figure 136). Lattice
parameter results are compared to those obtained by
Nelson-Riley-Sinclair-Taylor reduction of symmetric XRD patterns. Table
XXXIII lists the lattice parameter, texture coefficient and bulk stress
values obtained. In all cases, the surface stress was positive,
indicating in-plane tension in the top 100 nm. The XRD and GIXRD bulk
lattice parameters were in good agreement, and bulk stress was negative
at 2 mTorr, indicating compression. Higher pressures resulted in
essentially unstressed bulk. Orientation was random for 3 mTorr and
slightly preferred (110) for 2 and 5 mTorr. The results also show that
films deposited on soda lime glass are slightly less stressed than those
on 7059.

![](media/image156.wmf){width="3.1555555555555554in"
height="2.2284722222222224in"}![](media/image157.wmf){width="3.0083333333333333in"
height="2.240972222222222in"}

[]{#__RefHeading___Toc125256141 .anchor}Figure 136. In-plane Mo stress
versus sampling depth for films sputtered at 2 mTorr onto 7059 (left)
and SL glass (right). Different points at each depth are for different
(hkl).

[]{#__RefHeading___Toc125256175 .anchor}Table XXXIII. Mo sputter
deposition conditions and lattice parameter results of in-plane stress
analysis. Lattice parameter of Mo is: a~0~ = 0.3147 nm.

+--------+---------+-----------------+--------+----------+-----------+
| S      | Su      | a~0~            | B-B    | Bulk     | Surface   |
| putter | bstrate |                 |        |          |           |
|        |         | (±0.0001 nm)    | T      | Stress   | Stress    |
| Pr     |         |                 | C~110~ |          |           |
| essure |         | B-B GIXRD       |        | (±25     | (±25 MPa) |
|        |         |                 |        | MPa)     |           |
| (      |         |                 |        |          |           |
| mTorr) |         |                 |        |          |           |
+--------+---------+-----------------+--------+----------+-----------+
| 2      | 7059    | 0.3152 0.3150   | 2.8    | -100     | +350      |
+--------+---------+-----------------+--------+----------+-----------+
| 2      | SL      | 0.3154 0.3150   | 2.9    | -100     | +225      |
+--------+---------+-----------------+--------+----------+-----------+
| 3      | 7059    | 0.3145 0.3146   | 1.1    | +25      | +300      |
+--------+---------+-----------------+--------+----------+-----------+
| 3      | SL      | 0.3146 0.3145   | 0.7    | 0        | +250      |
+--------+---------+-----------------+--------+----------+-----------+
| 5      | 7059    | 0.3144 0.3146   | 2.4    | +25      | +200      |
+--------+---------+-----------------+--------+----------+-----------+
| 5      | SL      | 0.3147 0.3142   | 1.6    | 0        | +150      |
+--------+---------+-----------------+--------+----------+-----------+

**Summary**

GIXRD provides a means for non-destructive diagnostic analysis of
polycrystalline thin films. Beyond providing overall crystalline phases,
GIXRD can be used to quantify film thickness, orientation, composition,
and stress in the constituent layers. For ultra-thin CdS films with
nanometer size particulates, the particulate size was determined by
fitting the line profile and evaluating the integral line breadth. Alloy
distribution was determined by modeling GIXRD patterns obtained at
different incident beam angles and verified by measuring a
CuIn~1-x~Ga~x~Se~2~ film from both sides. This methodology is being used
to investigate reaction pathways for obtaining films with uniform
composition and could be used as a product sensor in a developed
process. CdTe oxidation and CdTe-CdS interdiffusion in solar cells were
investigated by *[in situ]{.underline}* heating and reaction. Te film
thickness on etched CdTe was determined by regression of a layer model
with measured data at different incident beam angles. A unique solution
is facilitated by considering primary beam attenuation in the Te film.
In-plane stress profiles were determined for sputtered Mo films on
different types of glass and offers a means for routine quality
assessment.

5.2 Diagnostics: Process Control for Co-evaporative PVD Process

The performance of a well-designed co-evaporative physical vapor
deposition process for CIGS thin-film growth depends mainly on the ease
of controlling individual elemental vapor fluxes. This is done
essentially by manipulating the individual source-boat temperature
set-points provided by a model predictive controller to achieve the
desired film thickness and composition. In such a cascaded control
structure, fast and accurate inner-loop controllers are essential. The
popular PID controllers are usually employed to control the inner
temperature loops.

Even though employed widely in industrial practice, the popular PID
controller has weaknesses that limit its achievable performance, and an
intrinsic structure that makes tuning not only more complex than
necessary, but also less transparent with respect to the key attributes
of the overall controller performance, namely: robustness, set-point
tracking, and disturbance rejection. We have proposed an alternative
control scheme[^118] that combines the simplicity of the PID controller
with the versatility of model predictive control (MPC) while avoiding
the tuning problems associated with both. The tuning parameters of the
proposed control scheme are related directly to the controller
performance attributes; they are normalized to lie between 0 and 1; and
they arise naturally from the formulation in a manner that makes it
possible to tune the controller directly for each performance attribute
independently. The result is a controller that can be designed and
implemented much more directly and transparently, and one that
outperforms the classical PID controller both in set-point tracking and
disturbance rejection while using precisely the same process reaction
curve information required to tune PID controllers. Figure 137 shows how
the four tuning parameters directly influence the controller performance
attributes of set-point tracking, robustness, disturbance rejection and
overall controller aggressiveness.

Placement of thermocouples for source-boat temperature measurement is
another important issue directly affecting the performance of
temperature controllers. Presently, thermocouples are placed at the
bottom-center of the source-boats. Since the heater is placed near the
top of an effusion source, any change in the heater-power will
immediately affect the melt-surface-temperature thereby changing the
vapor flow rate; the corresponding change in the boat bottom-center
temperature is relatively gradual. Hence, it is important to place the
temperature sensor in the top-lid for faster response. The issue of
thermocouple placement becomes even more problematic if a linear
source-boat with three or more nozzles is used because the temperature
at the source-center is higher than that of boat-ends. A two-dimensional
and, if possible, three-dimensional thermal modeling is necessary to
estimate the melt temperature profile. This will allow us not only to
infer melt-temperatures under all the nozzles by a single temperature
measurement at the top-lid center (and, hence, to use a simple
single-input-single-output controller), but also to determine the nozzle
diameters such that equal effusion rates are obtained from multiple
nozzles for a given source temperature set-point.

  ----------------------------------------------------- -----------------------------------------------------
  ![](media/image158.png){width="2.922222222222222in"   ![](media/image159.png){width="2.922222222222222in"
  height="2.191666666666667in"}                         height="2.191666666666667in"}

  ![](media/image160.png){width="2.922222222222222in"   ![](media/image161.png){width="2.922222222222222in"
  height="2.191666666666667in"}                         height="2.191666666666667in"}
  ----------------------------------------------------- -----------------------------------------------------

[]{#__RefHeading___Toc125256142 .anchor}Figure 137. Effect of tuning
parameters on controller performance attributes. The arrows indicate the
direction of increasing parameter values.

# 

**6 ABSTRACT**

This report describes results achieved during phase IV of a V-phase
subcontract to develop and understand thin film solar cell technology
associated to CuInSe~2~ and related alloys, a-Si and its alloys and
CdTe. Modules based on all these thin films are promising candidates to
meet DOE long-range efficiency, reliability and manufacturing cost
goals. The critical issues being addressed under this program are
intended to provide the science and engineering basis for the
development of viable commercial processes and to improve module
performance. The generic research issues addressed are: 1) quantitative
analysis of processing steps to provide information for efficient
commercial scale equipment design and operation; 2) device
characterization relating the device performance to materials properties
and process conditions; 3) development of alloy materials with different
bandgaps to allow improved device structures for stability and
compatibility with module design; 4) development of improved
window/heterojunction layers and contacts to improve device performance
and reliability; and 5) evaluation of cell stability with respect to
illumination, temperature and ambient and with respect to device
structure and module encapsulation.

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