Real Time Control System for the National Spherical Torus Experiment
(NSTX)

C. Neumeyer, D. Gates, T. Gibney, R. Hatcher, S. Kaye,

R. Marsala, D. Mueller, G. Oliaro, S. Ramakrishnan

Princeton University Plasma Physics Laboratory\*

Princeton, New Jersey 08543

Abstract

The NSTX \[1\] is a new national facility for the study of plasma
confinement, heating, and current drive in a low aspect ratio, spherical
torus (ST) configuration. The ST configuration is an alternate magnetic
confinement concept which is characterized by high (ratio plasma
pressure to magnetic field pressure) and low toroidal field compared to
conventional tokamaks, and could provide a pathway to the realization of
a practical fusion power source.

The NSTX depends on a real time, high speed, synchronous, and
deterministic control system acting on a system of thyristor rectifier
power supplies to 1) establish the initial magnetic field configuration;
2) initiate plasma within the vacuum vessel; 3) inductively drive plasma
current; and 4) control plasma position and shape. For the initial \"day
0\" 1st plasma operations (Feb. 1999), the system was limited to closed
loop proportional-integral current control of the power supplies based
on preprogrammed reference waveforms. For the next \"day 1\" phase of
operations beginning mid-summer 1999 the loop will be closed on plasma
current and position. The ultimate \"day 2\" system is envisioned to
include real time reconstruction of the plasma internal current
distribution so that control can be exercised over internal plasma
parameters such as current and pressure profile.

This paper addresses the day 1 system, with emphasis on the magnet power
supply control. Companion papers address plasma control \[2,3\].

I. Introduction

A cross section of the NSTX device is shown in Figure 1. Parameters and
ratings are summarized in Table 1. A hydrogen (deuterium) plasma is
contained in an axi-symmetric toroidal vacuum chamber surrounded by
water cooled copper magnets which carry current in the toroidal and
poloidal directions to produce poloidal field (PF) and toroidal field
(TF), respectively. The plasma current I~p~ flows in the toroidal
direction. The net magnetic field is predominant in the toroidal
direction but with a helical twist due to the poloidal field from the PF
coils and plasma. Plasma particles tend to follow the magnetic field
lines and are thereby confined. The vertical component of the magnetic
field in the z direction (B~z~) exerts radial J x B force on the plasma
and the radial component B~r~ a horizontal force. The plasma cross
sectional shape and current profile result from an equilibrium force
balance between the J x B forces arising from the applied fields and the
plasma current, along with its kinetic gas pressure.

^\*^ Under USDOE Contract #DE-AC02-76-CHO3073

Table 1

NSTX Parameters and Ratings

  ------------------------------------------ ----------------- ----------
  Major Radius (R0)                          85.4              cm

  Aspect Ratio (R/a)                         1.25              \-

  Plasma Current                             1.0               MA

  Toroidal Field @ R0 (max.)                 6.0               kG

  Plasma Ramp Time                           0.2 - 0.4         sec

  Plasma Flat Top (max.)                     5.0               sec

  Repetition Period (min.)                   300.0             sec
  ------------------------------------------ ----------------- ----------

![](media/image1.pct){width="4.097222222222222in"
height="5.333333333333333in"}Figure 1: Cross Section View of the NSTX
Device

During a pulse the typical sequence of events is as follows:

• Central Ohmic Heating (OH) solenoid coil is precharged

> • TF is applied
>
> • Fuel gas is injected
>
> • OH coil current is rapidly decreased; resultant toroidal loop
> voltage ionizes the fuel gas
>
> • Plasma current is driven by induction via OH coil
>
> • PF coils (1a, 1b, 2, 3, 4, and 5) are used to control plasma shape
> and position

A conceptual block diagram of the system is given in Figure 2.
Typically, upon initiation of a pulse the Power Supply Real Time
Controller (PSRTC) performs closed loop current control to precharge the
OH coil, initiate the TF coil current, and pre-bias other PF coils as
required. Then, at the start of a pre-programmed time window, the Plasma
Real Time Controller (PRTC) \[1,2\] initiates the plasma and controls
plasma current, position, shape, etc. via voltage requests to the PSRTC.
Upon termination of the plasma current the PSRTC extinguishes the
current in all coil systems according to pre-programmed current
derivatives.

![](media/image2.pct){width="3.533333333333333in"
height="3.4090277777777778in"}

Figure 2: Conceptual Block Diagram of Control System

II. Power Supplies & Circuits to be Controlled

A. Power Supplies

NSTX utilizes the PPPL \"Power Supply\" (PS) facility originally built
for the Tokamak Fusion Test Reactor (TFTR) project, consisting of
thirty-nine (39) modular 12-pulse phase controlled thyristor rectifiers.
Twenty-one (21) of the units are used for NSTX (total installed capacity
for NSTX is 500MVA). Each PS consists of two 6-pulse \"Power Supply
Sections\" (PSS) which are electrically isolated from each other but
subject to the same \"Firing Generator\" (FG ). Each PSS is equipped
with a full rated bypass module which can carry the load current when
the rectifiers are suppressed. Each PSS is rated to produce a maximum
average DC output voltage of 1012.85VDC (≈1kV), no load, with 13.8kV AC
input voltage applied to the converter transformer primary. Nominal
pulse current rating of each PSS is 24kA-6sec/300sec. The FG of each PS
controls, in effect, the voltage produced by its two PSS by phase
controlling the thyristor firing pulses in accordance with a Control
Word received as an input from the PSRTC. The Control Word is an 11 bit
digital command.

B. Circuits

Circuit types to be controlled are as depicted in Figure 3, where the
boxed thyristor symbol represents one or more PSS connected in
series/parallel combination. The lines connecting the circles represent
removable bus links.

![](media/image3.pct){width="3.282638888888889in"
height="4.248611111111111in"}

Figure 3: NSTX Circuit Configurations

a\. Type I is a \"Unipolar\", \"2-Wire\" circuit. Current flows in one
direction through one load coil group.

b\. Type II is a \"Unipolar\", \"3-Wire\" circuit. Current flows in one
direction through two load coil groups; the magnitude of the current may
be different in the two \"twin\" load coil groups.

c\. Type III is a \"Bipolar\", \"2-Wire\" circuit. Current flows in
either direction through one load coil group.

d\. Type IV is a \"Bipolar\", \"3-Wire\" circuit. Current flows in
either direction through two load coil groups; the magnitude and
polarity of the current may be different in the two \"twin\" load coil
groups.

A listing of the NSTX circuits along with type, number of DC poles, and
number of PSS is given in Table 2.

The voltage applied to, or the current produced in, each of the circuits
must be explicitly controlled. Therefore, eleven (11) separate circuit
control loops are required in case all of the bus links are in place,
plus one spare, for a total of twelve (12). However, if the bus links
are not installed in the Type II and Type IV circuits, then they reduce
to Type I and Type III, respectively, and the number of explicit control
loops is correspondingly reduced. When the bus links are not in place
two halves of the former Type II or Type IV circuits are treated in all
respects by the PSRTC as single Type I or Type III circuits,
respectively.

Table 2

NSTX Circuit Types, Poles, and PSS

+-------------------+-------------+-----------------+-----------------+
| Circuit           | Type        | DC Poles        | Series/Parallel |
|                   |             |                 |                 |
|                   |             |                 | PSS             |
+-------------------+-------------+-----------------+-----------------+
| TF                | I           | 2               | 1/4             |
+-------------------+-------------+-----------------+-----------------+
| OH                | III         | 2               | 6/2             |
+-------------------+-------------+-----------------+-----------------+
| PF1a Upper        | II          | 3               | 2/1             |
+-------------------+-------------+-----------------+-----------------+
| PF1a Lower        |             |                 | 2/1             |
+-------------------+-------------+-----------------+-----------------+
| PF1b              | I           | 2               | 2/1             |
+-------------------+-------------+-----------------+-----------------+
| PF2 Upper         | II          | 3               | 2/1             |
+-------------------+-------------+-----------------+-----------------+
| PF2 Lower         |             |                 | 2/1             |
+-------------------+-------------+-----------------+-----------------+
| PF3 Upper         | IV          | 3               | 2/1             |
+-------------------+-------------+-----------------+-----------------+
| PF3 Lower         |             |                 | 2/1             |
+-------------------+-------------+-----------------+-----------------+
| PF4/5             | I           | 2               | 2/1             |
+-------------------+-------------+-----------------+-----------------+
| CHI               | I           | 2               | 2/2             |
+-------------------+-------------+-----------------+-----------------+
| Spare             |             | 2               | 2               |
+-------------------+-------------+-----------------+-----------------+
| Total             | 12 ckt      | 21 pole         | 42 PSS          |
+-------------------+-------------+-----------------+-----------------+

III\. Power Supply Real Time Controller

A. Power Supply Control Function

The Power Supply Control Function is depicted in Figure 4. The same
basic function is applied to all of the circuits. The output of the
control function consists of the firing angle () and convert bit
commands which are delivered to the PS in the form of the PS Control
Words. Since the firing angle is related to the voltage, these commands
are, essentially, voltage commands. The voltage commands are derived
either from closed loop proportional - integral (PI) current control
against a programmable reference, or from a direct voltage request. The
direct voltage request is obtained from either a programmable reference,
or a signal supplied in real time by the PRTC. When in the voltage
control mode, a current clamp feature is applied if the current
approaches a programmable limit. Additional features include rate
limiting, and control of antiparallel rectifiers, including the required
limiting. Following is a description of these features, with reference
to Figure 4.

1\) Closed Loop Current Control

The load current Iload is subtracted from a programmable reference
Ireference. The difference is the error Ierror. Ierror is multiplied by
proportional gain Gp, and is integrated and multiplied by integral gain
Gi. The sum of these two terms is the voltage requested by current
control Vcurrent. The integrator includes an \"anti-wind-up\" reset
feature which is a function of time; one reset time is allowed per
circuit.

2\) Voltage Control & Current Clamp

The source of the command Vcommand can be either the programmable
reference Vreference or a real time signal provided by the PRTC (VPRTC).
The time window during which VPRTC is set by preprogrammed plasma start
and end times. Voltage control is subject to an override by a current
clamping feature which comes into play when limits are reached. The
clamping is based on PI control which generates a voltage adjustment
term Vclamp whenever the load current Iload passes outside the range
between the positive and negative clamp settings Iclamp\>0 and
Iclamp\<0. When the current returns to the allowable range the clamp
integrator is reset. The net voltage request based on voltage control
Vvoltage is the result of the addition of Vcommand and Vclamp.

3\) Voltage to Alpha Conversion

The selection of the source of the voltage request V0 from either
voltage control Vvoltage or current control Vcurrent is a function of
time. V1 is the per unit version of V0 based on V1=V0/Vmax, where Vmax
is the maximum no-load voltage available for the circuit in question.
Vmax is based on the programmable number of series PSS (NS), and the
primary side AC rms line-to-line source voltage E (nominally 13.8kV at
D-site). V2 is a rate and magnitude limited version of V1, where the
rate limit is programmable for each circuit and the magnitude limit is
-1 to 1 per unit. The rate limit is only applied when the antiparallel
mode is in effect (see next section). 0 is the firing angle request, and
1 is the final firing angle command after limiting. If antiparallel
operation is not in effect, then the allowable range of 1 is 0 to max ,
where max is the maximum permissible delay angle. It is calculated based
on the load current per PSS, equal to Iload/NP where NP is the number of
parallel PSS branches in the circuit being controlled, the AC source
frequency , the commutating inductance Lc, and the AC source voltage E,
along with a programmable inversion margin angle . If antiparallel
operation is in effect, then the minimum permissible delay angle min is
set equal to 180 - max , so that the allowable range of alpha is
therefore min ≤ 1 ≤ max in the antiparallel mode.

![](media/image4.pct){width="7.149305555555555in"
height="3.814583333333333in"}

Figure 4: Power Supply Control Function

4\) Antiparallel Operation

Antiparallel Operation permits bipolar current flow in the load without
delay around current zero. When it is in effect, the antiparallel
converters (a.k.a. the (+) and (-) converters) must be operated at
symmetric (about 90 degrees) delay angles min and max. This is required
to minimize the circulating current which is impeded only by the Current
Limiting Reactors (CLRs). The antiparallel mode is declared when the
magnitude of the load current Iload falls below a threshold Ithresh.
Thus the comparison is conditioned by a hysteresis function which only
declares the mode to be true if the previous magnitude exceeded the
threshold. A switch is provided to enable/disable antiparallel operation
for each circuit.

B. Current Measurements

PSS branch currents are measured by several types of DC current
transducers. Redundant measurements are provided in each branch. At each
time step, the difference between the magnitude of the two measurements
is calculated (after applying scale factor including polarity) and
compared to a programmable allowable as a check for the validity of the
measurements. The measurement with the larger magnitude is used for
further processing. The coil currents I~load~ are obtained from the sum
of the individual branch measurements.

C. Protection Features

Following protection features are provided in the PSRTC:

• instantaneous overcurrent protection

• single pulse ∫i2(t)dt protection

• adiabatic coil temperature rise protection

> • RMS current checks (based on continuous simulation of heating
> (during pulse) and cooling (between pulses) of DC cable systems.

D. Simulation Mode

In order to test the PSRTC, a simulation package is attached which
interfaces with the real time control code at the same points of input
and output as in normal operation (the inputs being the PSS branch
currents and the outputs being the commands to the power supplies.
Following features are included:

> • Transient solution of mutually coupled L/R circuits (10 simulation
> time steps per control system time step) using PPPL's LRSIM code
>
> • Simulation of latency of input data by utilization of simulation
> results obtained midway between control system time steps as inputs to
> control algorithm
>
> • Simulation of transient heating of coils and its effect on ohmic
> resistance
>
> • Simulation of delays and limits of power supplies; however
> individual thyristor commutations are not modeled

E. Implementation

> The PSRTC is written primarily in FORTRAN (some adjuncts are in C) and
> runs on a VME based computer system inherited from prior experiments
> at PPPL \[4\]. It consists of the following components:
>
> • Themis host computer (Sparc 10 running Sun OS)

-   ethernet connectivity

-   user interface

-   data management and software development

> • Skybolt I Shamrock real time computer

-   four parallel Intel 80860 processors

-   64MB shared memory

-   DMA port

• Precision Filters data acquisition system (DAS)

-   two 32 channel analog input modules

-   10kHz

-   DMA to Skybolt

• Power Conversion (PC) Link driver

> \- interface to serial command link which distributes commands to 39
> distributed PS at PPPL facility

The PSRTC occupies one of the four parallel i860 processors; the other
three are available to the PRTC. The control system update rate is 1kHz
(once per millisecond). Typical execution time of the PSRTC algorithms
with all circuits running is less than 800µS.

The PSRTC utilizes 47 of the 64 DAS channels available. The remainder
are reserved for the PRTC Ip, flux loop, and B probe signal inputs.
 These signals are transmitted from the transducers located in the NSTX
test cell to the location of the control computer rack via analog fiber
optic links.

F. Future Plans

A graphical user interface is under development to provide capability
for editing the text files used to input the control and waveform data.

An upgrade to a new computer system \[3\] is planned for late 1999
(a.k.a. "day 2"). This will include:

• Upgraded Themis host computer

• Upgraded Sky computer

> • Distributed data acquisition system based on multiple VME crates
> strung together using fiber optic links and Front Panel Data Port
> (FPDP) direct access to the real time processor.

The new computer system is not required in principle for the PSRTC but
will instead facilitate an advance in the PRTC development, including
more than a doubling of the number of inputs.

IV\. References

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> Figures and tables should preferably fit within a column. However, if
> necessary because of the amount of detail, they may extend across both
> columns (but may not extend into the margins). Table 3 is an example
> of a two-column wide table.

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C.  
D.  

\[1\] C. Neumeyer, et al, \"Engineering Overview of the National

> Spherical Torus Experiment", Transactions of 17^th^ IEEE/NPSS
> Symposium on Fusion Engineering, San Diego, CA, October 1997, IEEE No.
> 0-7803-4226-7/98

\[2\] D. Gates, et al, "NSTX Control System Development Plan", RT99
Paper #181

\[3\] D. Mueller, et al, "Upgrade to NSTX Control Computer", RT99 Paper
#144

\[4\] P. Sichta et al, \"Computing Hardware for the PBX-M Plasma Control
System, ", Transactions of 16^h^ IEEE/NPSS Symposium on Fusion
Engineering, Champaign, Ill, October 1995, IEEE No. 0-7803-2969-4/95