# September 22, 2003

Dr. Harin Ullal, Technical Monitor

National Renewable Energy Laboratory

1617 Cole Boulevard

Golden, CO 80401

Dear Harin,

This is the second quarterly report for Phase II for EPV's cost-shared
subcontract RDJ-2-30630-21 **Advanced CIGS Photovoltaic Technology**
awarded under the Thin Film Photovoltaics Partnership Program. The
nominal period covered by the report is 6/1/03 - 8/31/03.

As mentioned previously, the core CIGS group consists of Dr. Alan
Delahoy, Dr. Leon Chen, Dr. Baosheng Sang, Dr. Masud Akhtar, John
Cambridge, Frank Ziobro, Ramesh Govindarajan, and Renata Saramak. Dr.
Sheyu Guo assists with hollow cathode sputtering.

This report deals with the following areas of activity:

1)  Hybrid CIGS (normal and all-Zeus)

2)  Hybrid CIGS with IGS compound evaporation in Hercules

3)  ZnO performance improvement at elevated substrate temperature in
    in-line sputtering system

4)  New ZnO configuration for interconnection

5)  Mo peeling (and solution) and laser scribe improvement

6)  New window layer/TCOs

7)  Preliminary experiments concerning the temperature resistance of
    junctions

8)  Module reliability test

9)  Optical ripple reduction

10) Plans for next quarter

11) Other news

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1)  **Hybrid CIGS (normal and all-Zeus)**

A hybrid CIGS deposition process has been operated at EPV for more than
a year. It includes evaporation of In and Ga, and sputtering of Cu to
take advantage of better uniformity. It was developed in Hercules, an
R&D bell jar system, and the process was then transferred to Zeus for
large area CIGS deposition. The basic process concept is similar to the
NREL three-stage process. We evaporate the first In and Ga layer with Se
presence in the Zeus or Hercules system, and then the substrate is moved
into an in-line sputtering system for Cu deposition. Finally, the
substrate is moved back to Zeus or Hercules for Cu selenization followed
by a third stage In and Ga finishing layer evaporation. In our original
(normal) three-stage hybrid process, vacuum has to be broken twice, i.e.
before and after sputtering Cu in the in-line system. There is,
naturally, the concern that oxidation of the IGS film before sputtering
Cu and/or oxidation of the Cu film after sputtering Cu might occur
(while the substrate is in air), and that such oxidation might have a
negative impact on CIGS device performance. If, on the other hand, we
could eliminate the vacuum breaks by depositing all of the layers in the
Zeus, then oxidation would be avoided. In addition, we would expect that
the process throughput could be drastically increased.

In this quarter, to eliminate such vacuum breaks, we designed and
installed a magnetron sputtering cathode fitted with a Cu target in the
ante-chamber of the Zeus system so that all three stages could be
processed in Zeus. Initially, arcing led to the extinguishing of the Ar
plasma. Various steps were taken to solve these teething problems, and
sputtering of Cu can now be conducted in the Zeus. Mid-frequency
sputtering is used, and operating conditions are different from those
used in the in-line sputtering system. The conductivity of sputtered Cu
films produced in Zeus is almost as good as that of films produced in
the in-line sputtering system. It is also encouraging that
Zeus-sputtered Cu films made on large-area glass plates show excellent
uniformity. The sheet resistance of a typical film is plotted in Fig. 1.

![](media/image1.wmf)

Fig. 1. Sheet resistance uniformity of Cu sputtered in the Zeus system

Listed in Table I is the performance of some devices cut from large
plates fully processed in the Zeus system. The plates were coated in
some of the first runs using this technique.

Table I. Device performance from all-Zeus hybrid process

+--------------+---------------+---------+---------+--------+--------+
| **ID**       | **Process**   | **Voc** | **FF**  | *      | η      |
|              |               |         |         | *Jsc** |        |
+--------------+---------------+---------+---------+--------+--------+
| > Z1575-1 A1 | All-Zeus      | 558     | 67.8    | 24.2   | *      |
|              |               |         |         |        | *9.2** |
+--------------+---------------+---------+---------+--------+--------+
| > Z1575-1 C1 | All-Zeus      | 538     | 67.1    | 24.9   | *      |
|              |               |         |         |        | *9.0** |
+--------------+---------------+---------+---------+--------+--------+
| > Z1580-7 B5 | All-Zeus      | 613     | 63.0    | 25.8   | **     |
|              |               |         |         |        | 10.0** |
+--------------+---------------+---------+---------+--------+--------+
| > **Z1580-7  | **All-Zeus**  | **659** | *       | **     | **     |
| > A1**       |               |         | *63.9** | 23.9** | 10.0** |
+--------------+---------------+---------+---------+--------+--------+

The results demonstrate great potential for our hybrid process with
all-Zeus processing. We are confident that these parameters can be
further improved .

Our 'normal' hybrid process has also yielded some very exciting results
recently. Never seen before, some devices show very high Voc of 636 mV
as well as excellent FF of 72.4%. Plotted in Fig. 2 is one of device J-V
curves.

![](media/image2.wmf)

Fig.2. J-V from device made from Zeus CIGS (normal hybrid process)

2)  **Hybrid CIGS with IGS compound evaporation in Hercules**

We have reduced the number of evaporation sources from three (Cu, In and
Ga) to two (In and Ga) in addition to Se in our hybrid process. A
further simplification of the hybrid process is to use the compound
source material (In,Ga)~2~Se~3~ (here denoted by In/Ga/Se or IGS),
synthesized at EPV, as a single evaporation source material to replace
the individual evaporation elements In and Ga. The merits for such a
process include:

-   Fixed Ga ratio in starting material

-   Lower process temperature due to higher vapor pressure for IGS
    compound

-   Reduced number of control parameters

-   Elimination of interaction between multiple evaporation sources at
    different temperatures

We started by measuring the ratios of Ga/III and Se/III in the IGS
compound by ICP AES. As hoped for, the Ga/III ratio is 0.31-0.33 while
the Se/III ratio is 1.48-1.51. This indicates that our home-made
In/Ga/Se compound is stochiometric (In ~0.68~, Ga ~0.32~)~2~Se~3~. An
In/Ga/Se film evaporated from the compound at a substrate temperature
350°C without Se presence exhibits a similar Ga/III ratio. However, the
Se/III ratio of the film drops to 1.2-1.3, which some Se loss due to
compound decomposition (either of the source material or of the material
on the heated substrate). It is very interesting to find that the Se/III
ratio for the film on the heated substrate becomes close to 1.5 once
again when the IGS compound is evaporated with co-evaporation of
additional Se.

The performance of some of the devices made from CIGS prepared using
this hybrid process (IGS compound evaporation and sputtered Cu) is
rather encouraging. The performance parameters are listed in Table II.

Table II. Device performance from hybrid process with IGS compound
evaporation

+--------------+---------------+---------+---------+--------+--------+
| **ID**       | **Process**   | **Voc   | **FF**  | *      | η      |
|              |               | (mV)**  |         | *Jsc** |        |
+--------------+---------------+---------+---------+--------+--------+
| > H193-2 A   | IGS compound  | 527.4   | 59.47   | 32.32  | **1    |
|              |               |         |         |        | 0.14** |
+--------------+---------------+---------+---------+--------+--------+
| > **H193-2   | **IGS         | **      | **      | **3    | **1    |
| > B**        | compound**    | 559.8** | 57.96** | 1.28** | 0.15** |
+--------------+---------------+---------+---------+--------+--------+

An excellent current density was achieved. The modest values of Voc and
FF leave plenty of room for further process optimization.

3)  **ZnO performance improvement at elevated substrate temperature in
    in-line sputtering system**

For quite some time in the past we have known that one of the best ways
to improve our large area ZnO film properties, for ZnO produced by
mid-frequency sputtering of a ceramic target, is to preheat the
substrate. However, because of the very short inner vertical dimension
of the sputter chambers, this had never been properly implemented. In
this quarter we successfully designed, built, and installed a large area
heater with temperature control in the in-line sputtering system. This
has enabled us to produce a much better quality ZnO on 0.43 m^2^ glass
substrates, and the hope is that this advance can be successfully
applied to our module processing. Much effort was devoted to
re-optimizing the process parameters for ZnO, the parameters including
sputter power, plate moving speed, gas ratio of Ar to O~2~, number of
scans, and preheating temperature. Finally, we settled upon a set of
parameters except preheating temperature, which we are using as the last
fine tuning parameter to optimize ZnO properties as well as device
performance. Plotted in Fig. 3 are the ZnO film properties as a function
of preheating temperature.

Fig.3. Improved ZnO properties at elevated substrate temperature

The data in Fig. 3 shows that ZnO properties keep improving at elevated
temperature, which is consistent with what we have reported earlier.
However, to determine final process conditions, optimization should be
conducted with respect to the performance of CIGS modules, or at least
performance of CIGS devices, rather than just the ZnO film on plain
glass. With this in mind, a series of CIGS devices was processed at
different elevated temperatures for ZnO deposition. The results are
shown in Table III.

Table III. Device performance as a function of preheating temperature

+----------+---------------+--------+--------+--------+-------+-------+
| **       | **Preheating  | **Voc  | *      | **Jsc  | *     | **    |
| Sample** | T**           | (mV)** | *Jsc** | (      | *FF** | Eff** |
|          |               |        |        | -1V)** |       |       |
|          | **(°C)**      |        | **     |        | **    | **    |
|          |               |        | (mA/cm | **     | (%)** | (%)** |
|          |               |        | ^2^)** | (mA/cm |       |       |
|          |               |        |        | ^2^)** |       |       |
+----------+---------------+--------+--------+--------+-------+-------+
| Z1575-2  | 30            | 567.8  | 23.27  | 25.49  | 39.24 | 5.18  |
+----------+---------------+--------+--------+--------+-------+-------+
| Z1575-6  | 30            | 526.6  | 22.08  | 25.04  | 26.62 | 3.10  |
+----------+---------------+--------+--------+--------+-------+-------+
| Z1575-1A | 100           | 562.3  | 20.91  | 24.66  | 58.9  | 6.93  |
+----------+---------------+--------+--------+--------+-------+-------+
| Z1575-5A | 100           | 562.4  | 20.71  | 24.67  | 58.34 | 6.80  |
+----------+---------------+--------+--------+--------+-------+-------+
| Z1575-3A | 125           | 531.9  | 19.83  | 25.44  | 52.71 | 5.56  |
+----------+---------------+--------+--------+--------+-------+-------+
| Z1575-6A | 125           | 552.2  | 19.78  | 25.58  | 50.08 | 5.47  |
+----------+---------------+--------+--------+--------+-------+-------+
| Z1575-3  | 150           | 553.3  | 16.37  | 26.46  | 43.6  | 3.95  |
+----------+---------------+--------+--------+--------+-------+-------+
| Z1575-5  | 150           | 497.9  | 17.88  | 27.2   | 43.93 | 3.91  |
+----------+---------------+--------+--------+--------+-------+-------+

Table III strongly suggests that device performance deteriorates at a
preheating temperature at 150°C. The main indication is that Jsc at zero
bias drops severely despite being recoverable at a reverse bias of -1V.
This is probably caused by junction damage at high temperature. The best
device performance emerges at a preheating temperature of 100°C. It may
be noted that the 'real' CIGS temperature under the sputtering target is
probably higher than the substrate preheating temperature.

4)  **New ZnO configuration for interconnection**

The disadvantage of using the conventional i-n, two-layer ZnO structure
in conjunction with the interconnection between the ZnO front contact
and the Mo back contact is that we have to break vacuum for the 2^nd^
(CIGS) scribe after depositing the i-ZnO and before depositing the
n-ZnO. This awkward vacuum break is the least time-effective process
during the entire module production sequence. Many other organizations,
such as ZSW (see their paper at the 30^th^ IEEE), are also actively
seeking a better process. In our last quarterly report, we mentioned
trying scribe #2 followed by direct i-ZnO+n-ZnO as an alternative.
However, the FF of mini-modules with such an interconnection appears
much worse than that with a n-ZnO interconnection. This is due to a
larger series resistance at the interconnect, as reflected in the J-V
curve. This large interconnection resistance was also confirmed by
directly measuring the ZnO/Mo voltage drop over the interconnection line
with the module forward biased (see Table IV(A) below).

In this quarter, a new type of ZnO configuration was successfully
developed at EPV for use in an interconnection process without vacuum
break. It not only maintains device performance at the level of the
normal two-layer ZnO, but it also yields a small interconnect resistance
like n-ZnO. Thus the processing sequence now is CBD CdS, followed right
away by the CIGS scribe, followed by the new type of ZnO without vacuum
break, followed by the ZnO scribe.

Listed in Table IV are two set of J-V test data comparing the new type
of ZnO with the normal two-layer ZnO. There are eight pairs of devices
in Table IV altogether. The two devices in each pair have the normal and
new ZnO for comparison. The devices in each pair are spaced only 1mm
apart to eliminate any effect of CIGS non-uniformity.

Table IV(A). Performance comparison of Z1559-51

+------------+---------+---------+--------+--------+---------+------+
| ** **      | **Voc** |         | **FF** |        | **Roc   |      |
|            |         |         |        |        | (       |      |
|            | ** **   |         | ** **  |        | norm)** |      |
+------------+---------+---------+--------+--------+---------+------+
| **         | Normal  | New     | Normal | New    | Normal  | New  |
| Z1559-51** |         |         |        |        |         |      |
+------------+---------+---------+--------+--------+---------+------+
| 1          | 525.8   | 549.9   | 58.96  | 67.86  | 0.156   | 0    |
|            |         |         |        |        |         | .123 |
+------------+---------+---------+--------+--------+---------+------+
| 2          | 555.6   | 555.7   | 65.09  | 66.96  | 0.127   | 0    |
|            |         |         |        |        |         | .113 |
+------------+---------+---------+--------+--------+---------+------+
| 3          | 554.4   | 561.4   | 59.97  | 66.42  | 0.137   | 0    |
|            |         |         |        |        |         | .118 |
+------------+---------+---------+--------+--------+---------+------+
| 4          | 541.4   |         | 60.71  |        | 0.142   |      |
+------------+---------+---------+--------+--------+---------+------+
| *          | **      | **      | **     | **     | **      | *    |
| *Average** | 544.3** | 555.7** | 61.2** | 67.1** | 0.141** | *0.1 |
|            |         |         |        |        |         | 18** |
+------------+---------+---------+--------+--------+---------+------+

Table IV(B). Performance comparison of Z1559-32

+------------+---------+---------+--------+--------+---------+------+
| ** **      | **Voc** |         | **FF** |        | **Roc   |      |
|            |         |         |        |        | (       |      |
|            | ** **   |         | ** **  |        | norm)** |      |
+------------+---------+---------+--------+--------+---------+------+
| **         | Normal  | New     | Normal | New    | Normal  | New  |
| Z1559-32** |         |         |        |        |         |      |
+------------+---------+---------+--------+--------+---------+------+
| 1          | 460.5   | 468.9   | 60.01  | 63.76  | 0.163   | 0.12 |
+------------+---------+---------+--------+--------+---------+------+
| 2          | 454.6   | 470.8   | 56.63  | 62.53  | 0.208   | 0    |
|            |         |         |        |        |         | .137 |
+------------+---------+---------+--------+--------+---------+------+
| 3          | 456.9   | 460.2   | 58.71  | 62.33  | 0.152   | 0    |
|            |         |         |        |        |         | .142 |
+------------+---------+---------+--------+--------+---------+------+
| 4          | 453     | 458.2   | 60.75  | 60.73  | 0.162   | 0    |
|            |         |         |        |        |         | .139 |
+------------+---------+---------+--------+--------+---------+------+
| *          | **      | **      | **     | **     | **      | *    |
| *Average** | 456.3** | 464.5** | 59.0** | 62.3** | 0.171** | *0.1 |
|            |         |         |        |        |         | 35** |
+------------+---------+---------+--------+--------+---------+------+

The data in Table IV clearly show that the device performance obtained
with the new type of ZnO is at least as good as that with normal
two-layer ZnO. In fact, an improvement of FF is apparent, and Voc is a
little higher, too. The improved FF is due mainly to the lower series
resistance, as reflected in the value of R~oc~(normalized) shown in the
far right column.

Encouraged by its performance, we used the new type of ZnO to form the
interconnects in mini-modules. Listed in Table V are seven mini-modules
processed with three different processes for the ZnO interconnection,
namely, the normal process (H188-2, H190-4 and H190-5), the new type of
ZnO (H188-4, H190-2 and H190-3), as well as the failed process (H188-3)
with the i-ZnO+n-ZnO interconnection mentioned earlier in section 3.
Their interconnection resistances were measured by voltage drop at
forward bias over modules.

Table V. Interconnect resistance for seven mini-modules

+-------+---------------------+------------+---------------+----------+
| **S   | **ZnO type**        | **CIGS     | **Inte        | **Resi   |
| ample |                     | scribe     | rconnection** | stance** |
| ID**  |                     | after**    |               |          |
|       |                     |            |               | **(Ω)**  |
+-------+---------------------+------------+---------------+----------+
| H     | Normal process      | i-ZnO      | n-ZnO         | 0.4      |
| 188-2 |                     |            |               |          |
+-------+---------------------+------------+---------------+----------+
| H     | Failed Process      | CdS        | i-ZnO/n-ZnO   | 10       |
| 188-3 |                     |            |               |          |
+-------+---------------------+------------+---------------+----------+
| H     | New Process         | CdS        | New type ZnO  | 0.13     |
| 188-4 |                     |            |               |          |
+-------+---------------------+------------+---------------+----------+
| H     | New Process         | CdS        | New type ZnO  | 0.36     |
| 190-2 |                     |            |               |          |
+-------+---------------------+------------+---------------+----------+
| H     | New Process         | CdS        | New type ZnO  | 0.36     |
| 190-3 |                     |            |               |          |
+-------+---------------------+------------+---------------+----------+
| H     | Normal process      | i-ZnO      | n-ZnO         | 0.44     |
| 190-4 |                     |            |               |          |
+-------+---------------------+------------+---------------+----------+
| H     | Normal process      | i-ZnO      | n-ZnO         | 1.28     |
| 190-5 |                     |            |               |          |
+-------+---------------------+------------+---------------+----------+

The interconnect resistance for all three mini-modules in the new
process group is in the range of 0.13-0.36 ohm, which is as good or
better than that for the normal group (0.4-1.28 ohm) within experimental
error. The resistance yielded by the failed process using i-ZnO plus
n-ZnO jumps to 10 ohm, more than an order of magnitude higher. Similar
experiments, both at the device level and module level, have now been
repeated several times at EPV. We are confident that the new type of ZnO
configuration stands ready to replace the conventional two-layer ZnO
(and to eliminate the vacuum break) in large area module production.

5)  **Mo peeling (and solution) and laser scribe improvement**

We recently found that Mo films sputtered in the in-line system tended
to peel off during the laser scribe process. This was quite abnormal. It
was realized that the peeling materialized after the Cr target had been
moved to a new position to make room for the installation of a large
area heater. Having checked many process parameters such as glass side,
cleaning procedure, laser condition, Mo power etc., we eventually found
the plasma voltage in the Cr sputtering step to be about 40-50 V higher
than normal, which we took to imply that the Cr target was somehow
contaminated. After thoroughly pre-sputtering the Cr target at a higher
power and for a substantially longer time than that normally used in our
operations, we were able to restore the plasma voltage to its original
value around 270V. The exercise confirmed our previous experience that a
thin underlayer is essential to maintain good adhesion of the Mo.

As a by-product of these investigations, we found that the laser used
for Mo scribing was cutting about 3000 A deep into the glass when
'normal' Mo scribing conditions were used. It was feared that this could
cause module breakage during lamination. After carefully optimizing the
laser power, we found that 80% of the original power is sufficient to
separate the Mo quite well, while the depth of cutting into the glass is
much shallower. Listed in Table VI are some experiments regarding laser
power optimization.

Table VI. Laser power and cutting depth in glass

  ------------------------ ------------ ------------ ---------- ----------
  **Laser Power**          100 %        90 %         80 %       **70 %**

  Cutting depth into glass **3 kA**     **2 kA**     **500 A**  **None**
  ------------------------ ------------ ------------ ---------- ----------

6)  **New window layer/TCOs**

The hollow cathode (HC) sputtering system developed under EPV's ATP
award with NIST has been used to prepare several types of transparent
conducting oxide. These TCOs have been applied to CIGS with various
buffer layers to fabricate devices. Some of the results are collected in
Table VII. In the "Buffer" column, T denotes a CIGS post-deposition
treatment.

Table VII. Selected results using HC-sputtered TCO

<table style="width:100%;">
<colgroup>
<col style="width: 7%" />
<col style="width: 9%" />
<col style="width: 12%" />
<col style="width: 13%" />
<col style="width: 8%" />
<col style="width: 9%" />
<col style="width: 7%" />
<col style="width: 7%" />
<col style="width: 7%" />
<col style="width: 7%" />
<col style="width: 7%" />
</colgroup>
<tbody>
<tr class="odd">
<td><p><strong>HC</strong></p>
<p><strong>run</strong></p></td>
<td><p><strong>CIGS</strong></p>
<p><strong>sample #</strong></p></td>
<td><strong>TCO</strong></td>
<td><strong>Buffer</strong></td>
<td><strong>i layer</strong></td>
<td><p><strong>Power</strong></p>
<p><strong>(W)</strong></p></td>
<td><p><strong>T</strong></p>
<p><strong>(°C)</strong></p></td>
<td><strong>V<sub>OC</sub></strong></td>
<td><strong>J<sub>SC</sub></strong></td>
<td><strong>FF (%)</strong></td>
<td><p><strong>η</strong></p>
<p><strong>(%)</strong></p></td>
</tr>
<tr class="even">
<td>148</td>
<td>H146</td>
<td>ZnO</td>
<td>No CdS</td>
<td>N</td>
<td>300</td>
<td>100</td>
<td>444</td>
<td>31</td>
<td>56</td>
<td>7.7</td>
</tr>
<tr class="odd">
<td>539</td>
<td>NREL</td>
<td>ZnO:B</td>
<td>T/No CdS</td>
<td>Y</td>
<td>300</td>
<td>155</td>
<td>564</td>
<td>36</td>
<td>63</td>
<td>12.7</td>
</tr>
<tr class="even">
<td>547</td>
<td>CIGS</td>
<td>ZnO:B</td>
<td>CdS</td>
<td>Y</td>
<td>300</td>
<td>120</td>
<td>510</td>
<td>29</td>
<td>65.5</td>
<td>9.6</td>
</tr>
<tr class="odd">
<td>554</td>
<td>H224</td>
<td>ZnO:B</td>
<td>T/ZIS+</td>
<td>Y</td>
<td>300</td>
<td>120</td>
<td>428</td>
<td>32</td>
<td>48</td>
<td>6.6</td>
</tr>
<tr class="even">
<td>786</td>
<td>Z1574-I</td>
<td>In<sub>2</sub>O<sub>3</sub>:Mo</td>
<td>T/CdS</td>
<td>N</td>
<td>180</td>
<td>150</td>
<td>322</td>
<td>25</td>
<td>45</td>
<td>3.6</td>
</tr>
</tbody>
</table>

The first two entries in Table VII have been reported previously. The
third entry shows a 9.6% cell using HC-sputtered ZnO:B using a CdS
buffer, and the fourth entry 6.6% using a ZnIn~2~Se~4~ buffer. Excellent
In~2~O~3~:Mo TCO layers have been produced by HC sputtering, but cell
results are usually disappointing (fifth entry, 3.6%).

7)  **Preliminary experiments concerning the temperature resistance of
    junctions**

What are the maximum temperature/time exposures a CIGS junction can
sustain? This kind of information is needed for ZnO deposition
optimization at elevated temperature, as mentioned in section 3 above.
Similar information and testing is required to design a process for top
junction deposition in a tandem structure for advanced high performance
cells.

In this period, two more annealing experiments were conducted. First, a
normal CBD CdS layer was deposited on CIGS samples to form the device
junction. Then the samples were annealed for half an hour at elevated
temperatures in either a vacuum or N~2~ environment. Finally, the
devices were finished with normal RF sputtered, two-layer ZnO. In both
environments the devices' performance deteriorated at high temperature.
However, the observed threshold was quite different. As can be seen in
Fig. 4, the performance of devices annealed in N~2~ was maintained even
at annealing temperatures as high as 200°C, while that of devices
annealed in vacuum declined dramatically between 140-170°C. Thus far, it
is not clear what causes the difference.

![](media/image3.wmf){width="5.427777777777778in"
height="3.7020833333333334in"}

Fig. 4. V~oc~FF product for junctions annealed at various temperatures
before ZnO deposition

8)  **Module reliability test**

Module reliability is an important concern of the PV industry, and the
various thin films face particularly challenging issues in order to
demonstrate reliability. A recently-organized National Team (Thin Film
Module Reliability National Team) is focused on these issues, and EPV is
one of the active contributors in both the Si thin film and
polycrystalline thin film areas. In the former area, EPV has reported a
laboratory technique for TCO delamination testing. EPV is also active in
studying and reporting on glass breakage susceptibility, an effort that
is applicable to both thin film areas.

In the CIGS group of EPV, we recently started a damp heat (DH) program
for various TCOs (including ZnO, SnO~2~ and In~2~O~3~) with the
intention of extending the work to devices and modules. The motivation
is to study how DH impacts TCO properties, especially resistivity. As a
first step, we investigated the effect of water immersion. All films
were deposited on plain glass. The ZnO:Al was prepared by RF sputtering,
the In~2~O~3~:Mo by hollow cathode sputtering, and the SnO~2~:F was
procured commercially. Most of the samples were un-laminated except for
one ZnO sample that was laminated with EVA and a top glass sheet.
De-ionized water temperatures of 25°C and 60°C were selected. Plotted in
Fig. 5 is the measured CTO sheet resistance as a function of immersion
time. As can be seen from the figure, the resistivity of un-laminated
ZnO keeps increasing with immersion time, while that of laminated ZnO
basically doesn't change even at 60°C. In contrast to un-laminated ZnO,
the resistivity for un-laminated SnO~2~:F and for In~2~O~3~:Mo both
appear stable even for immersion at 60°C.

![](media/image4.wmf){width="5.551388888888889in"
height="3.540277777777778in"}

Fig. 5. Sheet resistance of various TCO samples versus water immersion
time

9)  **Optical ripple reduction**

Until recently, the lamps used for irradiating our CIGS modules so that
I-V curves can be obtained were powered directly off the AC line. The
optical ripple in light intensity led to annoying undulations in the I-V
trace. To eliminate the optical ripple, a DC power supply was designed
and built. It uses three-phase power, which greatly reduces the
filtering that is necessary. The resulting I-V curves are now smooth,
with data of publishable quality.

10) **Plans for the next quarter**

A highly-targeted three-month program has been put in place, with
realistic assignment of manpower, to fabricate large-area CIGS modules
incorporating improved processing in almost all areas. Improved
fixturing will allow reduction of dead area due to scribing; new CBD
tanks should enable better control, and more streamlined and safer
operations; we are hoping that the all-Zeus hybrid process will prove
itself during this period; and finally, improved ZnO on modules will be
realized through substrate heating.

**11) Other news**

EPV has been awarded a one-year \$500,000 R&D grant under the State of
New Jersey's Clean Energy Program. EPV's goal is to stimulate greater
market penetration of thin-film PV modules through improvements in
product performance, reduction in product cost, and enhanced
certification. Work under this award will be in the thin Si area.

EPV has received and accepted an order from a German entity for 3,000
40-watt EPV-40 modules. On the basis of this order, EPV has started to
recall some of its production workers that were furloughed last year.

All of the equipment needed for the module manufacturing facility in
Tianjin, China has been shipped, and installation has begun. EPV has
started to ship equipment to Greece for the Heliodomi joint venture
project.

EPV was the cover story in the June 30, 2003 issue of NJBIZ, a weekly
publication that focuses on business in New Jersey.

Sincerely,

![](media/image5.png)

# Alan E. Delahoy Leon Chen

# Principal Investigator Senior Scientist