---------------------------------------------------- ----------------------- ---------------- ------------
  ![](media/image1.wmf){width="0.9326388888888889in"   Development and                          
  height="0.975in"}                                    Integration of Modular                   
                                                       Assemblies with Reduced                  
                                                       Services for the ATLAS                   
                                                       Silicon Strip Tracking                   
                                                       Layers                                   

  ATLAS Upgrade Document No:                           Institute Document No.  Created :        Page: **1 of
                                                                               **08/03/2006**   15**

                                                                               Modified :       Rev. No .:
                                                                               **15/06/2006**   **2.00**
  ---------------------------------------------------- ----------------------- ---------------- ------------

+-----------------------+-----------------------+-----------------------+
| **Abstract**          |                       |                       |
|                       |                       |                       |
| ####### For high l    |                       |                       |
| uminosity running at  |                       |                       |
| the upgraded LHC (sLH |                       |                       |
| C) the segmentation o |                       |                       |
| f the tracking will h |                       |                       |
| ave to be increased b |                       |                       |
| y a factor of 5-10 ti |                       |                       |
| mes. In this proposal |                       |                       |
|  we focus on the barr |                       |                       |
| el tracking layers ou |                       |                       |
| tside a 20 cm radius  |                       |                       |
| (outside the pixel re |                       |                       |
| gion). We study the c |                       |                       |
| oncept of modular ass |                       |                       |
| emblies ("staves") wh |                       |                       |
| ich each contain a la |                       |                       |
| rge number of individ |                       |                       |
| ual tracking modules. |                       |                       |
|  Such an approach can |                       |                       |
|  lead to material and |                       |                       |
|  services reduction a |                       |                       |
| nd less complexity an |                       |                       |
| d cost in design, ass |                       |                       |
| embly, and integratio |                       |                       |
| n.  {#for-high-lumino |                       |                       |
| sity-running-at-the-u |                       |                       |
| pgraded-lhc-slhc-the- |                       |                       |
| segmentation-of-the-t |                       |                       |
| racking-will-have-to- |                       |                       |
| be-increased-by-a-fac |                       |                       |
| tor-of-5-10-times.-in |                       |                       |
| -this-proposal-we-foc |                       |                       |
| us-on-the-barrel-trac |                       |                       |
| king-layers-outside-a |                       |                       |
| -20-cm-radius-outside |                       |                       |
| -the-pixel-region.-we |                       |                       |
| -study-the-concept-of |                       |                       |
| -modular-assemblies-s |                       |                       |
| taves-which-each-cont |                       |                       |
| ain-a-large-number-of |                       |                       |
| -individual-tracking- |                       |                       |
| modules.-such-an-appr |                       |                       |
| oach-can-lead-to-mate |                       |                       |
| rial-and-services-red |                       |                       |
| uction-and-less-compl |                       |                       |
| exity-and-cost-in-des |                       |                       |
| ign-assembly-and-inte |                       |                       |
| gration. .unnumbered} |                       |                       |
|                       |                       |                       |
| #######  {            |                       |                       |
| #section .unnumbered} |                       |                       |
|                       |                       |                       |
| ####### Th            |                       |                       |
| is proposal addresses |                       |                       |
|  the needed R&D to de |                       |                       |
| velop a tracker which |                       |                       |
|  can function after a |                       |                       |
| n integrated luminosi |                       |                       |
| ty of 2,500 fb^-1^ at |                       |                       |
|  the sLHC under PBS 1 |                       |                       |
| .1.4 and 1.1.5 {#this |                       |                       |
| -proposal-addresses-t |                       |                       |
| he-needed-rd-to-devel |                       |                       |
| op-a-tracker-which-ca |                       |                       |
| n-function-after-an-i |                       |                       |
| ntegrated-luminosity- |                       |                       |
| of-2500-fb-1-at-the-s |                       |                       |
| lhc-under-pbs-1.1.4-a |                       |                       |
| nd-1.1.5 .unnumbered} |                       |                       |
|                       |                       |                       |
| #######  {#s          |                       |                       |
| ection-1 .unnumbered} |                       |                       |
|                       |                       |                       |
| ####### The R&D pr    |                       |                       |
| ogram will include:   |                       |                       |
| {#the-rd-program-will |                       |                       |
| -include .unnumbered} |                       |                       |
|                       |                       |                       |
| ####### Prototyp      |                       |                       |
| ing of a simplified s |                       |                       |
| tave with long strips |                       |                       |
|                       |                       |                       |
| ####### Study of pow  |                       |                       |
| ering options (DC-DC, |                       |                       |
|  series) on the stave |                       |                       |
|                       |                       |                       |
| ####### Study         |                       |                       |
|  of mechanical and co |                       |                       |
| oling issues within a |                       |                       |
|  long stave structure |                       |                       |
|                       |                       |                       |
| ##                    |                       |                       |
| ##### Design of full  |                       |                       |
| scale staves meeting  |                       |                       |
| sLHC specifications ( |                       |                       |
| long and short strip) |                       |                       |
|                       |                       |                       |
| #####                 |                       |                       |
| ## Prototyping and me |                       |                       |
| asurements of full sc |                       |                       |
| ale stave structures  |                       |                       |
|                       |                       |                       |
| ####### Developmen    |                       |                       |
| t of DAQ tools for pa |                       |                       |
| rallel module tests o |                       |                       |
| n staves on the bench |                       |                       |
|                       |                       |                       |
| #######               |                       |                       |
| Work with industrial  |                       |                       |
| partners to develop s |                       |                       |
| ources for components |                       |                       |
|                       |                       |                       |
| a.  Development of    |                       |                       |
|     prototype         |                       |                       |
|     assembly tooling  |                       |                       |
|     and processes     |                       |                       |
|                       |                       |                       |
| ####                  |                       |                       |
| ### The goal of the p |                       |                       |
| rogram is the design  |                       |                       |
| and prototyping of pr |                       |                       |
| actical stave structu |                       |                       |
| res and assembly proc |                       |                       |
| edures which will mee |                       |                       |
| t the specifications  |                       |                       |
| for the upgraded ATLA |                       |                       |
| S tracker. The struct |                       |                       |
| ures developed will a |                       |                       |
| ccommodate both short |                       |                       |
|  strips for the inter |                       |                       |
| mediate radius region |                       |                       |
|  (20cm -- 60 cm) and  |                       |                       |
| long strips for the o |                       |                       |
| uter radius region (\ |                       |                       |
| > 60 cm).  {#the-goal |                       |                       |
| -of-the-program-is-th |                       |                       |
| e-design-and-prototyp |                       |                       |
| ing-of-practical-stav |                       |                       |
| e-structures-and-asse |                       |                       |
| mbly-procedures-which |                       |                       |
| -will-meet-the-specif |                       |                       |
| ications-for-the-upgr |                       |                       |
| aded-atlas-tracker.-t |                       |                       |
| he-structures-develop |                       |                       |
| ed-will-accommodate-b |                       |                       |
| oth-short-strips-for- |                       |                       |
| the-intermediate-radi |                       |                       |
| us-region-20cm-60-cm- |                       |                       |
| and-long-strips-for-t |                       |                       |
| he-outer-radius-regio |                       |                       |
| n-60-cm. .unnumbered} |                       |                       |
|                       |                       |                       |
| #######  {#s          |                       |                       |
| ection-2 .unnumbered} |                       |                       |
|                       |                       |                       |
| #######               |                       |                       |
|  The proposal is subm |                       |                       |
| itted by ATLAS instit |                       |                       |
| utions with expertise |                       |                       |
|  in development of si |                       |                       |
| licon strip systems a |                       |                       |
| nd new institutes joi |                       |                       |
| ning for the upgrade. |                       |                       |
|  The former also had  |                       |                       |
| major involvement in  |                       |                       |
| the successful design |                       |                       |
| , construction and te |                       |                       |
| sting of the ATLAS SC |                       |                       |
| T. In addition, the i |                       |                       |
| nstitutes have secure |                       |                       |
| d upgrade R&D funding |                       |                       |
|  from their national  |                       |                       |
| funding agencies. Sub |                       |                       |
| mitted by Brookhaven  |                       |                       |
| National Lab, Lawrenc |                       |                       |
| e Berkeley National L |                       |                       |
| ab, the, the Universi |                       |                       |
| ty of California at S |                       |                       |
| anta Cruz, Hampton Un |                       |                       |
| iversity, New York Un |                       |                       |
| iversity, and the Uni |                       |                       |
| versity of Milano. {# |                       |                       |
| the-proposal-is-submi |                       |                       |
| tted-by-atlas-institu |                       |                       |
| tions-with-expertise- |                       |                       |
| in-development-of-sil |                       |                       |
| icon-strip-systems-an |                       |                       |
| d-new-institutes-join |                       |                       |
| ing-for-the-upgrade.- |                       |                       |
| the-former-also-had-m |                       |                       |
| ajor-involvement-in-t |                       |                       |
| he-successful-design- |                       |                       |
| construction-and-test |                       |                       |
| ing-of-the-atlas-sct. |                       |                       |
| -in-addition-the-inst |                       |                       |
| itutes-have-secured-u |                       |                       |
| pgrade-rd-funding-fro |                       |                       |
| m-their-national-fund |                       |                       |
| ing-agencies.-submitt |                       |                       |
| ed-by-brookhaven-nati |                       |                       |
| onal-lab-lawrence-ber |                       |                       |
| keley-national-lab-th |                       |                       |
| e-the-university-of-c |                       |                       |
| alifornia-at-santa-cr |                       |                       |
| uz-hampton-university |                       |                       |
| -new-york-university- |                       |                       |
| and-the-university-of |                       |                       |
| -milano. .unnumbered} |                       |                       |
+-----------------------+-----------------------+-----------------------+
| Prepared by:          | Checked by:           | Approved by:          |
|                       |                       |                       |
| C. Haber (Lawrence    | ATLAS High Luminosity |                       |
| Berkeley Lab)         | Upgrade Steering      |                       |
|                       | Group                 |                       |
| M. Gilchriese         |                       |                       |
| (Lawrence Berkeley    |                       |                       |
| Lab)                  |                       |                       |
+-----------------------+-----------------------+-----------------------+
| Distribution List     |                       |                       |
|                       |                       |                       |
| ATLAS High Luminosity |                       |                       |
| Steering Group        |                       |                       |
+-----------------------+-----------------------+-----------------------+

# 1 Introduction  {#introduction .unnumbered}

The luminosity increase expected for the LHC upgrade ("Super-LHC",
"sLHC") requires a critical evaluation of the tracking performance of
the proposed all-silicon tracking detector in the Inner Detector (ID) of
the upgraded ATLAS detector \[1\]. Compared with the LHC, the higher
instantaneous rate requires re-optimization of the tracker granularity,
i.e. the strip geometry as a function of radius. To maintain the
occupancy and merged cluster rates specified for the pre-upgrade SCT,
the segmentation will have to increase by a factor of 5-10 and the straw
tubes will be replaced by silicon strips. In a baseline concept for a
sLHC tracker, the innermost radial region is covered by pixel detectors,
and starting at a radius of about 20 cm, the mid-radius region is
covered by short strips (of length \~ 3 cm) and the outer region beyond
about 55 cm by long strips (of length \~ 10 cm).

A typical barrel layout of an sLHC tracker was discussed at the Genoa
Meeting of July 2005. This is represented in Figure 1.

![](media/image2.wmf){width="7.0784722222222225in"
height="4.118055555555555in"}

Figure 1: Proposed barrel layers of the ATLAS sLHC tracker.

This layout could consist of two basic units, a short (\~1 meter) stave
in the region between 20 and 50 cm and a long stave (\~2m) beyond 50 cm.
The short stave would consist of detectors with \~3cm strips, thereby
increasing the granularity over the present SCT. The long stave would
consist of detectors with \~10-12 cm strips, replacing the TRT. Figure 2
indicates some basic configurations for these staves. The long stave
design represents an extreme case for services, cooling, and mechanical
performance. Table I indicates some starting assumptions for stave
specifications.

***Table I: Basic Stave Specifications (nominal)***

  --------------------------------- -------------- ----------------------
  **Property**                      **Short        **Long Stave**
                                    stave**        

  Width                             6.4 cm         12.8 cm

  length (nominal)                  98 cm          192 cm

  detector width                    6.4 cm         12.8 cm

  detector length                   3 cm           10-12 cm

  detectors per side\*              15-18          12-16

  gap between detector along the    2.4 cm         3 mm
  stave                                            

  detector thickness                280 microns    300 microns

  number of strips                  768            768

  strip pitch                       80 microns     160 microns

  Power in front end chips (per     3 watts        3 watts
  hybrid)                                          

  Power in silicon -- no dose (per  1 milliwatt    2 milliwatt
  crystal)                                         

  Power in silicon -- high dose     1 watt         2 watt
  (per crystal)                                    

  Maximum temperature at silicon    -25 C          -10 C

  Maximum temperature variation     \<5 C          \<5C

  Max detector position shift from  30 microns     30 microns
  nom Dy                                           

  Max detector position shift from  30 microns     30 microns
  nom Dx                                           

  Survey accuracy Sy                5 microns      5 microns

  Survey accuracy Sx                10 microns     5 microns

  Survey accuracy Sq                0.13 mRad      0,13 mRad

  Ladder sag maximum\*\*            60 microns     60 microns

  Ladder sag stability\*\*\*        25 microns     25 microns
  --------------------------------- -------------- ----------------------

\*actual number will depend on details of layout, this is a likely range
for design purposes

\*\* this is for the staves at 12 and 6 o'clock positions around the
barrel which have the most gravitational sag. The sag direction is down,
along a radius of the barrel. This requirement could be relaxed if an
appropriate and rad-hard monitoring method was found to track the stave
positions.

\*\*\* with this level of stability short term drifts (between track
alignment surveys) should have an insignificant effect of the axial phi
coordinate resolution.

In a stave design the redundant support of passive barrels would be
avoided. The staves would instead be held on a set of "endplate" discs
tied together with a minimum set of passive barrels. This is indicated
schematically in Figure 3.

![](media/image3.jpeg){width="7.160416666666666in" height="2.14375in"}

Figure 2: Generic concepts for the long (top) and short (bottom) staves
of the ATLAS sLHC tracker. In this figure the long stave has 16
detectors 12 x 12.4 cm on each side. The readout electronics (not shown)
would be placed over the detector and be serviced by an embedded bus
cable. The short stave is here shown with 18 detectors 3 x 6.4 cm on
each side. The readout electronics (not shown) would be placed in the
gaps between adjacent detectors. The detectors on the opposite side are
staggered to provide complete coverage.

![](media/image4.png){width="5.8284722222222225in"
height="3.4784722222222224in"}

Figure 3: Endplate support for the stave layers. Barrels would exist at
100 and 20 cm only.

This proposal focuses on the development of the staves and their
components and includes:

-   Engineering of prototype barrel staves for both the inner and out
    regions of the strip layers including materials and geometry. The
    long stave design represents and extreme case and therefore serves
    to explore the limits of this approach.

-   Fabrication, assembly and test (mechanical and electrical) processes

-   Stave internal electrical interconnections

-   Hybrids

-   Detailed thermal and mechanical simulations of stave structures

-   Study of alternative powering schemes and their test and
    implementation in stave prototypes.

It should also be understood that the tracker development effort is
still in an early stage. The concepts being described here are a path,
to illustrate a concrete route to a design on the required time scale.
This will serve to identify issues and solutions, but there are likely
to be other concepts to be evaluated before any convergence on a final
design can be achieved. As more resources becomes available as other
groups join the effort, other concepts will be evaluated and, if
promising, will be considered by the group as a whole before coming to a
final design.

Other proposals to the sLHC Steering group address the silicon strip
detectors (SSD) and the front end electronics (FEE). This proposal can
support the integration of SSD and FEE with staves. There is significant
overlap in personnel between this and the SSD and FEE proposals. It is
expected the efforts would remain in close contact and coordination. In
particular detector, electronics, and stave geometries would be
determined coherently.

We would also expect other, as yet to be proposed R&D efforts, would
relate to and overlap the stave effort. These include development of a
cooling technology and system for the upgraded tracker, development of
an overall mechanical support structure (endplate and/or barrels etc),
and broader studies of alternative powering options.

To be clear, this proposal does not include:

-   Development of SSD

-   Development of FEE

-   Detailed engineering of the overall support structure, endplates and
    barrels (indicated in Figure 3). It will be assumed that supports
    will be located at certain fixed positions.

-   Detailed engineering of the cooling system., we will assume certain
    temperatures and gradients are available based upon the thermal
    mechanical simulations.

-   Design of the forward/backward disc layers.

-   Development of the optical links. It will be assumed the links are
    accessed at the outside end of staves and copper connections are
    used within the stave.

-   Development of new alternative powering architectures or circuits.
    We do however plan to test available circuitry on the prototype
    staves to evaluate noise, performance, and stave design issues.

# 2 Participating Institutions  {#participating-institutions .unnumbered}

USA Brookhaven National Laboratory D.Lissauer, D.Lynn, P.Nevski

Hampton University K.Baker, K. MacFarlane

University of California at Santa Cruz A.Grillo, A.Seiden, H.Sadrozinski

Lawrence Berkeley National Laboratory C.Haber, M.Gilchriese, W.Miller
(consultant), R.Ely,

M. Garcia-Sciveres

New York University P. Nemethy, A. Mincer, R. Djilkibaev

Italy Milano M. Citterio

# 3 Topic(s) and goal(s) of the R&D proposal  {#topics-and-goals-of-the-rd-proposal .unnumbered}

####### This proposal aims at developing highly modular components for the silicon strip layers of an upgraded ATLAS tracker under PBS 1.1.4 and 1.1.5. Such a tracker would be considerably larger in terms of silicon area and channel count than the present SCT+TRT subsystems. A key aspect of this R&D is to dramatically reduce the services burden which would otherwise overwhelm ATLAS. The basic element of this new tracker will be a "stave", a single unit which will integrate (approx) 30 individual modules into a structure which provides mechanical support, cooling, and electrical services. We will explore services reduction by providing power in alternative ways such as with serial current or with DC-DC converters. This integrated approach can reduce material in a number of ways. {#this-proposal-aims-at-developing-highly-modular-components-for-the-silicon-strip-layers-of-an-upgraded-atlas-tracker-under-pbs-1.1.4-and-1.1.5.-such-a-tracker-would-be-considerably-larger-in-terms-of-silicon-area-and-channel-count-than-the-present-scttrt-subsystems.-a-key-aspect-of-this-rd-is-to-dramatically-reduce-the-services-burden-which-would-otherwise-overwhelm-atlas.-the-basic-element-of-this-new-tracker-will-be-a-stave-a-single-unit-which-will-integrate-approx-30-individual-modules-into-a-structure-which-provides-mechanical-support-cooling-and-electrical-services.-we-will-explore-services-reduction-by-providing-power-in-alternative-ways-such-as-with-serial-current-or-with-dc-dc-converters.-this-integrated-approach-can-reduce-material-in-a-number-of-ways. .unnumbered}

####### The stave supports the modules, eliminating the redundant barrel supports 

i.  Electrical services are provided by a single bus cable to all
    modules

ii. Cooling is in common to all modules on a stave

iii. Cables are reduced using alternative powering such as series power

This approach can simplify the manufacture and reduce cost. With a
limited number of module and stave designs the tooling effort and cost
is reduced.

#######  {#section-3 .unnumbered}

####### After a three-year R&D program, an ATLAS specific stave would be designed, built, and tested. All the basic issues of mechanics, cooling, electrical performance, and assembly would be investigated. In the following, the planned tasks are discussed briefly together with their principal issues. Table II shows the distribution of tasks among the participating institutions.  {#after-a-three-year-rd-program-an-atlas-specific-stave-would-be-designed-built-and-tested.-all-the-basic-issues-of-mechanics-cooling-electrical-performance-and-assembly-would-be-investigated.-in-the-following-the-planned-tasks-are-discussed-briefly-together-with-their-principal-issues.-table-ii-shows-the-distribution-of-tasks-among-the-participating-institutions. .unnumbered}

#######  {#section-4 .unnumbered}

####### The R&D program will include:  {#the-rd-program-will-include-1 .unnumbered}

####### Prototyping of a simplified stave with long strips

####### Study of powering options (DC-DC, series)

####### Study of mechanical and cooling issues within long stave structures

####### Design of full scale staves meeting sLHC specifications (long and short strip)

####### Prototyping and measurements of full scale stave structures 

####### Development of DAQ tools for bench top parallel module tests on staves

####### Work with industrial partners to develop sources for components

a.  Development of prototype assembly tooling and processes

```{=html}
<!-- -->
```
a)  **Prototyping of a simplified stave with long strips**

As a beginning of the stave investigation we will utilize existing and
well understood components to test the behavior of ATLAS style readout
in a multi-module configuration. Stave structures have already been used
in CDF \[3\] and CMS. To the extent practical we will utilize this prior
experience as well. The simplified stave will use the ABCD-3T chips
mounted on new hybrids. The geometry will be similar to a long strip
configuration (for the outer layers). This work is already well underway
as part of early sLHC R&D in the US. Figure 4 shows the prototype 6
module stave, Figure 5 is an expanded view of the structure and Figure 6
is a cross-section.

![](media/image5.jpeg){width="6.534722222222222in" height="1.05625in"}

Figure 4: Prototype 6 module stave. Scale is \~60 cm. Design represents
a fraction of the proposed long outer stave layer.

All stave components are currently in hand. Elements of this prototype
are under test at present. The prototype addresses some of the issues of
signal and power distribution for integrated structures.

![](media/image6.wmf){width="3.7777777777777777in"
height="4.966666666666667in"}

Figure 5: Expanded view of stave and components

![](media/image7.png){width="4.339583333333334in"
height="2.2020833333333334in"}

Figure 6: Cross section of stave

b)  **Study of powering options**

In the present SCT separate power and signals are brought to each
module. This is not practical for a much larger system. Two alternatives
which promise to dramatically reduce the cable burden, serial powering
(SP) and DC-DC (DCPP) converters, will be studied. Both schemes would
solve the cable congestion problem. At the same time, they offer large
savings in passive material, much increased power efficiency and much
reduced costs \[4, 5\]. A second version of the simple stave of a) will
be built and tested with serial powering. In future iterations DCPP
powering may be implemented as well.

Serial powering was explored for ATLAS pixel detectors and looks
promising \[4\]. Its application in large scale strip detectors hinges
on achieving good electrical performance in a closely coupled complex
electronic system with multiple grounds, and understanding and
suppressing failure mechanisms. The challenges in DC-DC conversion
parallel powering are related to the reliability and noise injection of
the switched capacitor DC-DC conversion chip and in minimizing failure
mechanisms.

To explore the prospects of SP and DCPP in large silicon strip detector
systems systematically, we propose the following program.

1\. Test of serial powering with ATLAS SCT modules

The RAL group has already built and tested a simple serial powering PCB
carrying a commercial shunt regulator, a voltage regulator, and LVDS
buffers. Using these boards they operated ATLAS SCT modules powered in
series on the SCT DAQ system. First results on this set-up are
encouraging \[5\] and were presented already at the Genoa workshop. The
concept will be extended to test up to 6 modules in series; to measure
the actual power savings for different cable resistances and compare
them with our estimates; to inject an AC noise current into the system
and determine its response; and to look for signs of common mode noise
in dead-timeless operation.

2\. Grounding and interference issues in a densely packed detector
system

The SCT modules used for the noise tests described above are
geometrically separated and contained in shielded boxes for protection.
In a real detector system, the detectors are much closer to each other,
which can give rise to various interference mechanisms. A stave is the
ultimate test bed for serial powering. After construction of the first
stave (Section 3a), we will build a stave for serial powering operation.
A miniaturized version of the serial powering board described in 3b-1,
above, will be developed at RAL, suitable for placement on a silicon
sensor adjacent to the hybrid. This board will be used for the serial
powered stave. Full electrical system tests will be performed on this
serial powered version of the prototype stave. The parts in hand
(hybrids, detectors) are already compatible with a serial powering
configuration which included this extra interface card.

Demonstrating satisfactory noise performance on such a serially powered
stave is the major goal of this step

3\. Develop a redundancy and failure protection scheme

Serial powering could lead to the loss of a large number of modules if
the current supply is interrupted due to a single-point failure in the
system. It is crucial to eliminate failure mechanisms e.g. a breakdown
of the regulators or readout chips. This step of the project is largely
independent of 3b-1,2 and will be pursued in parallel.

We will identify and analyse the various failure modes systematically
and then design and test circuitry providing maximum protection against
them. The failure modes depend on the implementation of the regular
circuitry, with either one regulator unit or several regulator units in
parallel. The protection circuitry can be tested either on the stave (if
space permits) or with the setup for SCT modules.

4\. Integration of the serial powering circuitry into a new front-end
readout chip

For a final implementation of serial powering, regulators and LVDS
buffers may eventually be contained in the front-end readout chip or a
dedicated ASIC. The design of a new front-end chip is addressed in a
different ATLAS SLHC proposal \[6\]. Perhaps we can provide the starting
point for it by providing the schematics for serial powering building
blocks adapted for integration into a front-end chip layout. Work on
this step would be done in collaboration with CERN IC designers and
other collaborators. The final results of the stave tests might
influence the circuitry and thus this part of the project cannot be
completed before the stave testing results are conclusive. On the other
hand, a new front-end chip with serial powering circuitry should
eventually be evaluated using a stave.

A similar program is envisaged for DC-DC (DCPP) conversion schemes. LBNL
has submitted a prototype chip based on the design presented at the
Genoa workshop \[7\] and laid out in the Austria Microsystems 0.35
micron HV process. This chip will be used to build a prototype power
supplies for both the present 0.25 micron pixel front end chip and the
prototype .13 micron pixel front end chip. These supplies will be used
to measure the noise associated with the switched capacitor technology
and for studies to maximize the efficiency of the DC-DC conversion
process. LBNL will also study the radiation hardness of the AMS process
by irradiations at the LBNL 88 inch cyclotron. Failure modes of DCPP
schemes are frequently orthogonal to those of serial powering and will
be analyzed as well.

The silicon strip stave prototypes for the outer layers of the ID
upgrades are being designed with interface boards external to each
hybrid that could be used to implement serial powering or DC-DC
conversion, depending on the flavor of adapter used.

More details regarding the proposed new powering schemes are given in
\[8\].

c)  **Study of mechanical and cooling issues for long stave structures**

As described, the inner stave will be (typically) 1 meter and the outer
stave (typically) 2 meters long. These staves will be supported by discs
at some (minimum) number of locations. The gravitational sag and
stability of the stave must be controlled as determined by performance
and interference specifications. Using mechanical design and FEA methods
the geometrical and physical (sag, resonance frequency, thermal
properties) parameters of long staves will be studied and determined.
These results will be input to the design of full scale staves.

Detailed mechanical and thermal modelling of the stave structures and
their connections to supporting bulkheads are already underway. The
initial work has concentrated on modelling of the short stave,
approximately 1 m long. The model includes all of the components of the
stave -- detectors, hybrids, electronics, bus cable, composite supports,
cooling tubes, and closeouts. Studies of gravitational deflections (sag)
are underway with various assumptions on the geometry and supporting
boundary conditions. An example of a finite-element model of the maximum
gravitational deflection for a 96 cm long stave is shown in Figure 7. We
propose to control gravity sag by preferentially orienting most of the
stave composite fibers along the stave axis. For the illustrated
solution, 4 times as many fibers are placed in the longitudinal
direction as in the lateral, achieving tensile modulus greater than
steel.

![](media/image8.wmf)

Figure 7: NASTRAN solution for stave gravity sag with aluminum cooling
tubes. Distortion scale is in meters, with peak resultant distortion of
66.7µm; essentially all deflection is in the Y-direction, normal to the
stave.

Studies of distortions that result from mismatch in thermal properties
of the various materials comprising a stave have been initiated using a
32cm stave section. Cooling the assembly from room temperature to -25ºC
is used to quantify this effect. The results indicate that distortions
are within an acceptable range, largely due to the stave detector
elements being mounted on both sides, albeit with a shift to provide the
desired strip coverage. A distortion pattern tracking the above and
below alternating strip and hybrid placement is evident in Figure 8.

![](media/image9.wmf)

Figure 8: Thermal strain solution for 50ºC temperature change (room
temperature to -25ºC), with aluminum cooling tube. Alternating detectors
above and below on the stave produces a low amplitude cyclic pattern
(10.6microns). Stave composite facings are constructed with 4 to 1 fiber
orientation.

Stave cooling is accomplished by a dual pass evaporative cooling
circuit, located between the stave composite facings. Cooling entrance
and exit for the 96cm stave model occurs at one end, forming a long
U-shaped passage between the stave composite facing. Preliminary thermal
solutions have been made for both aluminium and PEEK coolant tube
materials using the short 32cm stave section (Figure 9). Enhancing the
lower thermal conductivity PEEK[^1] material with carbon-fibers produces
acceptable thermal performance, although an aluminium tube provides the
best performance by a noticeable amount. The difference in peak chip
temperature between the two materials is \~4 ºC, with nearly the same
difference in strip detector temperature. In each case, the coolant
reference temperature is -25ºC but there is no temperature gradient
along the direction of the coolant flow in this model. The temperature
difference between the reference temperature and the silicon detectors
is less than about 3^o^C(5^o^C) for the aluminium(carbon-filled PEEK)
coolant tubes.

![](media/image10.wmf)

Figure 9: Comparison between Aluminium and carbon-fiber filled PEEK
cooling tubes using the 32cm long stave model. Each chip is dissipating
0.5W. Chips are mounted on a BeO hybrid

These modelling studies will continue in the first half of 2006 and
expand to include models of longer staves. The influence of the
connections to supporting bulkheads will also be studied. The
appropriate next step after completing the initial modelling studies
would be to fabricate a full-length (about 1m) stave that is close to
complete mock-up of the mechanical and cooling properties. The
electronics and detector heat sources would be simulated, possible with
resistive metals deposited on silicon of the correct size as was done
extensively for the current ATLAS pixel system. The mock-up would be
instrumented with thermal sensors; infrared thermography would also be
used to measure temperatures and compare with the FEA modelling.
Distortions under thermal loads would be measured using techniques
employed for the ATLAS pixel project, direct optical imaging and
measurement, and separately with TV holography. The goal would be to
validate the modelling of both mechanical and thermal properties. The
design of this mock-up could begin by about mid-2006, with fabrication
to follow in the 2^nd^ half of 2006 and then the measurement program in
early 2007.

The finite-element modelling has been and will be done by Mr. William
Miller of Innovative Technologies International (ITI). Mr. Miller has
had extensive experience in modelling of the ATLAS pixel support frame
and local supports (and many other projects). The mechanical mock-up
design would be done by Mr. Miller and LBNL. The fabrication of the
mock-up and testing would be the responsibility of LBNL.

####### **Design of full scale staves meeting sLHC specifications (long and short strip)**

This effort will be done in concert with the SSD development (PBS 1.1.2)
and the FEE development (PBS 1.1.3), if sufficiently far along. Based
upon the results of a), b), and c) a full scale ATLAS stave(s) will be
designed. This includes the design of various components including
hybrids, bus cables, and interface cards. Conceptually this effort
mirrors a) above but is particularly sLHC specific and integrates the
first and second year developments.

One scheme would extend naturally from the concepts of Section 3a and
the mechanical considerations of Section 3c, and result in a design
similar to that shown in Figures 4-6 but geometrically like Figure 2 for
the required length. This concept may be the most compact, low mass, and
economical. It would however go beyond certain specifications adopted
for the present SCT. For example hybrids would be glued directly on the
active silicon in order to achieve a direct thermal path to the embedded
cooling lines.

A possible alternative stave concept starts from the SCT barrel module
design (see Figure 10) which was optimised to separate the ASIC and
sensor thermal paths to the cooling. In the SCT barrel module design,
the cooling block is available at one end of the hybrid structure and
the Cu/polyimide flexible multilayer circuits carrying the ASICs are
wrapped around the sensor sandwich with a thermalized pyrolytic graphite
(TPG) baseboard between the front and back sensors. \[9\] The TPG
provides a highly conductive cooling path directly to the cooling block.
The hybrids are supported away from the silicon surface with only
connections via wire-bonds down to the surface. They are laminated to a
carbon-carbon substrate which provides an independent low-mass
connection to the cooling.

![](media/image11.png){width="2.5034722222222223in"
height="1.6819444444444445in"}

Figure 10: **ATLAS SCT Barrel Module**

This approach, being developed in parallel to that described in section
3a, has been presented at conferences and within ATLAS workshops\[10\].
(See Figures 11a and b)

![](media/image12.png){width="2.625in" height="2.2083333333333335in"}
![](media/image13.jpeg){width="1.4645669291338583in"
height="1.2255905511811023in"}![](media/image14.jpeg){width="0.7755905511811023in"
height="0.6755905511811023in"}![](media/image15.jpeg){width="1.0244094488188977in"
height="0.8917322834645669in"}![](media/image16.jpeg){width="0.8925196850393701in"
height="0.7110236220472441in"}e Figure 11a: **9cm Wide Ministrip Stave
(50µm Pitch)** Figure 11b: **Thermal simulations including**

> **effects of silicon self-heating after irradiation**

The intention will be to explore this concept with other possible strip
pitches and to better optimise the design to reduce the inactive width
(assuming a single-sided option can be appropriate with the only z
measurement coming from the 3cm granularity in that direction). Designs
more consistent with that described in Section 3a will be studied and
the aim will be to converge rapidly on a single design concept,
appropriately optimised to cope with the concerns over thermal runaway.
This issue strongly influenced the current ATLAS module designs and the
problem is expected to be more extreme at sLHC requiring 20^o^C lower
sensor temperature for any given design. Whether this implies a similar
bridge structure is needed or not will be part of the simulation and
prototyping studies of this programme.

It should be noted that there are several other module/stave
macro-assembly concepts for the sLHC tracker also under discussion
within the SCT community. Groups still heavily involved in the delivery
of the current tracker have expressed a strong desire to be able to join
this activity at a later stage when they have the necessary effort
available. The prototype described in Section 3a provides an excellent
test-bed for addressing a wide range of issues and a clearly defined
programme of work that can be undertaken immediately. However, the
evolution towards to final concept will inevitably involve the widest
possible participation of the available experts from the full
collaboration.

####### **Prototyping and measurements of full scale stave structures** 

Full scale staves will have to be characterized electrically and
mechanically. Considerable experience exists from the SCT and Pixel
efforts in this regard already. On the electrical side a key aspect will
be to understand system level effects. These include:

-   Failure modes and behavior of the alternative powering circuits

-   Noise and interference due to operating multiple modules on a common
    stave. This is an aspect which was basically absent at the module
    testing stage of the SCT. It will have to be in-place from the start
    for stave.

Mechanically we will exploit both the small scale optical metrology
methods and the larger scale interference based methods to perform QA
and analysis on these large objects.

####### **Development of DAQ tools for parallel module tests on staves**

The present SCT bench test DAQ is designed to test small numbers of
modules. The ATLAS DAQ lacks some of the flexibility required to study a
\~30 module stave. Since the time these systems were developed
considerable advances have occurred in commercial high speed digital DAQ
for multi-channel systems. Exploration of such alternatives is already
underway with consultations with vendors and parts on order for
evaluation. The procurement and development of this multi-module testing
capability is part of currently funded efforts. This effort does not
represent an attempt to develop a new tracker DAQ for ATLAS.

####### **Work with industrial partners to develop sources for components**

The overall philosophy of the stave approach is to simplify the design
and construction. None-the-less certain high-performance custom
components are foreseen already. These include:

-   Beryllia (BeO) fine pitch hybrids

-   Long flexible cables

-   Fine pitch thin film fan-outs

-   Carbon-fiber laminations

-   Power management components

As part of the on-going prototyping efforts described in a) and b) above
vendor sources for these components have been developed. This will
continue and second sources will be found for critical components.

d)  **Development of prototype assembly tooling and processes**

Considerable experience exists in the collaboration from the SCT module
assembly. Stave assembly mirrors this but the items are now much larger.
As part of the sLHC specific stave activity we will incorporate and
extend the SCT experience in order to study the assembly and inspection
of these large scale objects. To some extent also these issues are
explored in the simple stave prototype effort of a). A results of this
aspect could be an estimate of the assembly time, cost, and other
requirements.

Table II : Activity Matrix of the Participating Institutions

+----------+---------+--------+------+------+------+--------+-------+
| **Insti  | **Simp  | **Powe | **Me | **Fu | *    | *      | **    |
| tution** | lifed** | ring** | ch** | ll** | *Tes | *DAQ** | Indus |
|          |         |        |      |      | ts** |        | tr.** |
|          | **      | **Opt  | *    | **   |      |        |       |
|          | Stave** | ions** | *&** | Stav |      |        | *     |
|          |         |        |      | es** |      |        | *Part |
|          |         |        | **Co |      |      |        | ner** |
|          |         |        | ol** |      |      |        |       |
+----------+---------+--------+------+------+------+--------+-------+
| BNL      |         | x      | x    | x    | x    | x      | x     |
+----------+---------+--------+------+------+------+--------+-------+
| Hampton  |         |        |      |      | x    | x      |       |
+----------+---------+--------+------+------+------+--------+-------+
| UCSC     |         |        |      | x    | x    |        |       |
+----------+---------+--------+------+------+------+--------+-------+
| LBNL     | x       | x      | x    | x    | x    | x      | x     |
+----------+---------+--------+------+------+------+--------+-------+
| Milano   |         | x      |      |      |      |        |       |
+----------+---------+--------+------+------+------+--------+-------+
| NYU      |         | x      |      | x    | x    |        |       |
+----------+---------+--------+------+------+------+--------+-------+

# 4 Relation to existing efforts  {#relation-to-existing-efforts .unnumbered}

The proposed R&D program will work closely with existing ATLAS upgrade
efforts, as shown in the following. There is much personnel overlap with
many of these programs.

i.  **Silicon Strip Detectors (SSD)**

The stave effort works naturally with the SSD effort as the stave design
and SSD geometry and configuration go hand-in-hand. The construction of
a full scale stave relies also on the availability of the new SSD
designs. There is significant overlap with people in the SSD effort as
well as physical adjacency with people.

ii. **Front-end Electronics**

The performance and protocols for a new front end chip (to replace the
ABCD-3T) are closely coupled to the stave effort since the stave
integrates the data transmission and power distribution features. All
the reliability and failure mode issues must be addressed in concert
with the FEE development.

iii. **Development of DC-DC converters for the ATLAS ID upgrade**

This proposal to the Steering Group overlaps strip and pixel needs.
Efforts here are partly included in the present proposal as well.

iv. **New efforts**

New efforts addressing cooling, overall mechanics, alignment monitoring,
and powering would be logical to connect to the stave effort, and are to
be expected.

v.  **National Programs**

There are national upgrade programs in existence or being put in place.
The funding of this proposal will come from these programs.

USA

# 5 Open issues {#open-issues .unnumbered}

# Beyond the overall mechanics, cooling, and powering aspects and their new R&D efforts, there are open questions within the stave aspect as well. First and foremost this proposal does not address endcap structures. When an endcap design emerges a connection should be made. Even in the SCT the assembly process developed by the endcap groups in the UK was adopted by many of the barrel groups as well. Another open issue concerns the implementation of Z coordinate readout on the inner staves. The design discussed here uses short 3 cm detectors but only reads the phi coordinate. If called for by the layout and simulation studies this must be considered in detail. For the outer staves, stereo is already included in the design. Another open issue which couples directly to the stave specification is alignment and monitoring. If track data is used to monitor stave positions on a "long" timescale, some specification could be relaxed if a good rad-hard monitoring procedure were introduced for short term measurements. {#beyond-the-overall-mechanics-cooling-and-powering-aspects-and-their-new-rd-efforts-there-are-open-questions-within-the-stave-aspect-as-well.-first-and-foremost-this-proposal-does-not-address-endcap-structures.-when-an-endcap-design-emerges-a-connection-should-be-made.-even-in-the-sct-the-assembly-process-developed-by-the-endcap-groups-in-the-uk-was-adopted-by-many-of-the-barrel-groups-as-well.-another-open-issue-concerns-the-implementation-of-z-coordinate-readout-on-the-inner-staves.-the-design-discussed-here-uses-short-3-cm-detectors-but-only-reads-the-phi-coordinate.-if-called-for-by-the-layout-and-simulation-studies-this-must-be-considered-in-detail.-for-the-outer-staves-stereo-is-already-included-in-the-design.-another-open-issue-which-couples-directly-to-the-stave-specification-is-alignment-and-monitoring.-if-track-data-is-used-to-monitor-stave-positions-on-a-long-timescale-some-specification-could-be-relaxed-if-a-good-rad-hard-monitoring-procedure-were-introduced-for-short-term-measurements. .unnumbered}

# 6 Schedule  {#schedule .unnumbered}

The preliminary schedule for the LHC upgrade requires that the detector
upgrades start procurement of parts like stave components in the 2009
time frame. Thus starting in 2006, a three-year R&D program to develop a
stave design, components, and an assembly process ready for fabrication
would be consistent with that schedule.. The schedule is shown in Table
III. The project logically divides into the following phases.

Phase 1 (2006) Test of simplified prototype stave

Mechanical and cooling design study

Begin mechanics and cooling tests

Study of powering options, inclusion into an iteration of simplified
prototype

Develop DAQ components

Phase 2 (2007) Complete test of mechanics and cooling prototypes

Design and development of full scale stave

Phase 3 (2008) Complete full scale staves

Testing of full scale staves

Development of production-like assembly tooling and procedures

Table III: Preliminary Schedule of R&D for Staves

  --------------- ---------- ---------- ---------- ----------- ---------- ---------- ---------- ----------- ---------- ---------- ---------- -----------
  **Year**        **2006**                                     **2007**                                     **2008**                         

  **Quarter**     **1.1.**   **4.1.**   **7.1.**   **10.1.**   **1.1.**   **4.1.**   **7.1.**   **10.1.**   **1.1.**   **4.1.**   **7.1.**   **10.1.**

  **Task:**                                                                                                                                  

  **Basic Stave**                                                                                                                            

  Assemble        x          x                                                                                                               

  Test                       x          x          x                                                                                         

  **Powering**                                                                                                                               

  Design          x          x                     x           x                                                                             

  Assemble                   x          x          x                      x          x                                                       

  Test                                  x          x           x                     x          x           x                                

  **Mech+Cool**                                                                                                                              

  Design          x          x                                 x          x                                                                  

  Assemble                   x          x          x                      x          x          x                                            

  Test                                                         x          x          x          x           x          x                     

  **Full Staves**                                                                                                                            

  Design                     x          x          x           x          x                                 x                                

  Assemble                                                     x          x          x          x                      x          x          

  Test                                                                               x          x           x          x          x          x

  **DAQ**                                                                                                                                    

  Design          x          x          x                                                                                                    

  Test                       x          x          x           x                                                                             

  **Assembly**                                                                                                                               

  Design                                                       x          x          x          x                                            

  Prototype                                                                                     x           x          x          x          x
  --------------- ---------- ---------- ---------- ----------- ---------- ---------- ---------- ----------- ---------- ---------- ---------- -----------

# 6 Resources  {#resources .unnumbered}

As mentioned above, the resources for the proposed R&D activities
originate in the national R&D programs. In the following (Table IV) is a
list identifying FTE (the total number of physicists, technical
personal, students), and the approximate amount of funding available per
year. The funding status is identified as funded (F) or proposed (P).

Table IV: Resources (averaged per year)

  --------------------------- --------------- ----------------- -----------
  **Year**                    **\# of FTE**   **Funds \[k€\]**  **Status F
                                                                / P**

  year 1                      8               300               F

  year 2                      10              500               P

  year 3                      11              400               P
  --------------------------- --------------- ----------------- -----------

**Acknowledgement**:

Significant contributions were made by Marc Weber (RAL) to Section 3b
and by Phil Allport (Liverpool) to Section 3d.

**References**.

1.  High-Luminosity Steering Group (ed. S. Tapprogge) "Outline of R&D
    activities for ATLAS at an upgraded LHC", com-gen-2005-002.pdf

2.  Hartmut F.-W. Sadrozinski and Abe Seiden, "Tracking Detectors for
    the sLHC, the LHC Upgrade", Nucl.Instrum.Meth.A541, 434-440, 2005.

3.  The CDF Run IIb Silicon Detector: Design, preproduction and
    performance, NIM A 556 (2006) 459-481

4.  T. Stockmanns, P. Fischer, F. Hügging, I. Peric, Ö. Runolfsson, N.
    Wermes, **Serial powering of pixel modules**, Nucl. Instr. and Meth.
    A 511, 174-179 (2003).

5.  Marc Weber, Giulio Villani, Mika Lammentausta, **Serial powering for
    Silicon Strip Detectors at SLHC**, Proceedings of the 11^th^
    Workshop of Electronics for LHC and future Experiments.

6.  F. Anghinolfi, W. Dabrowski, A. Grillo, J. Kaplon, M. Weber, T.
    Weidberg, **ABC-Next Specification Requirements -- Proposal to the
    HLSG**, in preparation.

7.  R. Ely, M. Garcia-Sciveres, Talk at ATLAS SLHC Tracker meeting,
    <http://agenda.cern.ch/fullAgenda.php?ida=a053875>, Genoa July 2005.

8.  **Marc Weber,** Novel powering schemes for the ATLAS SLHC Tracker -
    working document, **November 2005.**

9.  USA Patent US 6,514,616 B1, February 4, 2003: 'A Thermal Management
    Device and Method of making such a Device', AA Carter, R De Oliveira
    and A Gandi

10. P.P. Allport, G. Casse, P. Sutcliffe, J.J. Velthuis, J. Vossebeld,
    \"Performance of P-type Micro-strip Detectors After Irradiation to
    7.5×10^15^ p/cm^2^ \'\', IEEE Nuclear Science Symposium and Medical
    Imaging Conference, October 2004, Rome, Italy

[^1]: Unfilled PEEK produces a significant thermal gradient