6 December 2004

To: Paul Philp, DOE Project Manager, Run IIb D-Zero Detector Project

From: Vivian O'Dell, Project Manager, Run IIb D-Zero Detector Project

Subject: Run IIb D-Zero Detector Project Report for October 2004

Attached is the monthly report summarizing the October 2004 activities
and progress for the Fermilab RunIIb D-Zero Detector Project.

electronic cc:

M. Abolins

J. Appel

E. Arroyo

L. Bagby

E. Barberis

A. Bean

J. Blazey

A. Bross

W. Cooper

M. Demarteau

D. Edmunds

T. Erickson

H. Evans

S. Fuess

G. Ginther

U. Heintz

M. Hildreth

R. Hirosky

D. Hoffer

K. Johns

M. Johnson

D.  Knapp

> R. Lipton

P. Lukens

R. McCarthy

J. Monhart

H. Montgomery

M. Narain

A. Nomerotski

V. O'Dell

P. Padley

R. Partridge

V. Pavlicek

TJ Sarlina

R. Sidwell

P. Slattery

K. Stanfield

RP Smith

J. Strait

L. Stutte

E. Temple

C. Trimby

V. White

M. Witherell

J. Womersley

D. Wood

C. Yoshikawa

Fermi National Accelerator Laboratory

Run IIb D-Zero Detector Project

**Fermilab Experiment Number E925**

################################################################################################################################################################################################################################## Progress Report No. 23 {#progress-report-no.-23 .unnumbered}

**October 2004**

############################### Project Description

The Tevatron Collider at Fermilab offers a unique capability to
elucidate many of the major issues currently facing particle physics.
Its high center-of-mass energy and recently upgraded luminosity offer us
the capability of shedding light on the Higgs mechanism - which has the
potential of offering insight into the origin of mass - and pushing the
boundaries of searches for supersymmetry and other new phenomena beyond
the Standard Model. It also makes accessible improved precision
measurements of the W boson and top quark properties that, by further
constraining the Standard Model, provide increasingly stringent tests of
its precepts. The Tevatron offers the most cogent experimental probes of
Standard Model physics, and beyond, during the coming 5+ years.

The Run IIb D-Zero Detector Project has been designed to allow the
D-Zero Experiment to continue operating in the high intensity Tevatron
environment for the remainder of the coming decade. The integrated
exposure of the D-Zero Detector to colliding beam will result in
radiation damage to the silicon detector that will compromise its
efficiency. Adequate b-tagging is an essential ingredient of the Run II
physics program. In order to maintain adequate b-tagging, D-Zero is
adding an inner layer detector of radiation-hard silicon to enhance
tracking efficiency as the Run IIa detector ages. In addition, the
trigger system must be upgraded in order to provide sufficient rejection
and to limit the dead time at the higher instantaneous rates that will
be delivered by the Tevatron as the run progresses. The Run IIb D-Zero
Detector Project provides for the additional D-Zero Layer 0 silicon
detector and the upgrade of the D-Zero trigger, DAQ, and online systems
in order to enable the continued efficient running of the experiment,
and the acquisition of forefront physics data, for the foreseeable
lifetime of the Tevatron collider program.

############################### Overview of Project Status 

Strip testing at Stony Brook was completed for one sensor of each of the
four types ordered, and all sensors met specifications. Four test
modules are being readout and first results look good, with a
signal/noise of \~14:1. Four Layer 0 readout chains were installed into
DZero during the shutdown, and work on firmware and software is in
progress. A Layer 0 carbon fiber support structure was completed at the
University of Washington and shipped to Fermilab. This structure arrived
intact and is expected to be mechanically and electrically accurate. As
planned, University of Washington will build an additional Layer 0
structure as a backup. Most of the silicon assembly fixtures needed for
the sensor-hybrid module fabrication have fabricated at Michigan State
University and have been delivered.

Measurements were made of the clearances for the Layer 0 detector inside
the current Run IIa silicon, and while the clearances were smaller than
expectations, the difference should not be significant. Additional
infrastructure work was done during October, including installing the
Wiener LV Power Supplies needed for the Layer 0. The power supply
installation and integration should be finished by the end of the
shutdown.

For the trigger upgrade, the layout work for the ADF v2 board is now
finished and different fabrication/assembly houses are being contacted
to build the boards. The TAB/GAB Production Readiness Review occurred at
Nevis on October 7 (see attached report), and assembly of the TAB/GAB
boards will go forward. Work continued on a 5% prototype test for the
BLS-ADF transition system, needed to feed signals from the calorimeter
readout to the new L1 Calorimeter ADF boards. The Cal Track-Match boards
have been submitted for fabrication. The preproduction DFEA boards have
been tested with the new crate and crate controller at BU and all seems
to be working well. A DFE subrack and power supplies were installed,
cabled and inspected on the west platform in the DZero collision hall
and ORC was granted. A DFEA/M board was installed on the west platform
and integration with the experiment in ongoing. A new single board
computer for the L2 processor project was selected and ordered. It will
be evaluated in November. Scenarios for the L2STT project are still
being considered and a decision will be made late November or early
December. Meanwhile the Buffer Controller production at Columbia will
move forward.

The trigger simulation work continues, and studies of the electron
algorithm and isolation region for the L1Cal are nearing completion. The
L1Cal simulation has been carefully debugged against data. The L1CTT IIb
equations are now being used to generate test vectors for the
verification of the firmware on the IIb boards on the platform. The AFE
II prototype boards and the TripT chips have been received and are under
test.

The online systems are progressing well. Most of the new server system
backbones will be installed during the 2004 shutdown with the bulk of
the CPU and disk purchases in 2005. We are still on target for migrating
online operations to the new servers by the end of the fall shutdown.

############################### Project Milestone Summary (as of 31 October 2004)

The DOE baseline milestones are shown in Figure 1 as solid diamonds.
These fixed milestones are defined in the modified DOE Project Execution
Plan approved in December 2003. Shown as open diamonds on the same line,
are the project's projected dates for achieving the milestones. Actual
dates of achieving milestones are shown as solid stars. The silicon,
trigger and online milestones are shown separately with milestones
sorted by current forecast date.

Table 1 shows the difference in the current forecast and last month's
forecast for achieving the DOE milestones. This table lists all the
approved Level 0-1-2 DOE milestone dates along with the project's
current (and previous month's) forecast for achieving them. The list is
sorted by DOE Milestone date. Milestones with forecast dates that have
changed significantly in the last month are discussed in Section VIII of
this report.

![](media/image1.png){width="8.284027777777778in" height="6.44375in"}

**Figure 1:** Run IIb D-Zero Detector Project DOE Level 2/Director's
Milestones. Closed (open) diamonds represent baseline (current forecast)
dates. Closed stars represent completed milestones.

  ------------------------------ ------------------ ---------- ----------- ------------------ ----------- ------------
  **L2/Director\'s Milestones vs                                                                          
  Current Forecast**                                                                                      

  **(Sorted by L2/Director\'s                                                                             
  Baseline Date)**                                                                                        

  **Milestone Description**      **L2/Director\'s   **Last     **This      **L2/Director\'s   **Monthly   **Notes**
                                 Baseline (10/04)** Month\'s   Month\'s    Variance (work     Variance    
                                                    Forecast   Forecast    days)**            (work       
                                                    (9/04)**   (10/04)**                      days)**     

  **WBS 1.2 Trigger**                                                                                      

  L1 Calorimeter Trigger TAB/GAB 05/03/04           05/26/04   05/26/04    18                 0           Complete
  Prototyping Complete                                                                                    

  Start Production TAB           02/25/05           10/22/04   10/08/04    \(90\)             \(10\)      Complete
  Fabrication                                                                                             

  L2 Silicon Track Trigger       10/17/05           04/01/05   05/27/05    \(138\)            40           
  Production and Testing                                                                                  
  Complete                                                                                                

  L1 Trigger Cal-Trk Match       01/03/06           05/31/05   05/31/05    \(143\)            0            
  Production and Testing                                                                                  
  Completed                                                                                               

  L1 Calorimeter Trigger         01/05/06           08/03/05   08/17/05    \(91\)             10           
  Production And Testing                                                                                  
  Complete                                                                                                

  L2 Beta Trigger Production And 01/05/06           05/23/05   05/23/05    \(151\)            0            
  Testing Complete                                                                                        

  L2 Trigger Upgrade Production  01/05/06           05/23/05   05/27/05    \(147\)            4            
  and Testing Complete                                                                                    

  L1 Central Track Trigger       01/10/06           08/19/05   08/19/05    \(92\)             0            
  Production And Testing                                                                                  
  Complete                                                                                                

  L1 Trigger Upgrade Production  04/10/06           08/19/05   08/19/05    \(154\)            0            
  and Testing Complete                                                                                    

  **WBS 1.3 Online/DAQ**                                                                                   

  Online System Production and   10/07/05           06/17/05   06/17/05    \(78\)             0            
  Testing Complete                                                                                        

  **WBS 1.6 Layer 0 Silicon                                                                                
  Detector**                                                                                              

  Freeze Mechanical Parameters   01/06/04           12/15/03   12/15/03    \(9\)              0           Complete

  Release Sensors for Production 05/26/04           02/26/04   02/26/04    \(63\)             0           Complete

  Release Hybrids for Production 06/04/04           03/25/04   03/25/04    \(50\)             0           Complete

  Release Analog Cables for      06/04/04           03/19/04   03/19/04    \(54\)             0           Complete
  Production                                                                                              

  All Analog Cables Delivered    03/11/05           08/10/04   08/10/04    \(141\)            0           Complete
  and Tested                                                                                              

  All Sensors Delivered and      05/23/05           09/28/04   09/28/04    \(159\)            0           Complete
  Tested                                                                                                  

  All L0 Hybrids Delivered,      08/25/05           01/10/05   01/10/05    \(160\)            0            
  Stuffed, and Tested                                                                                     

  All Adapter Cards Delivered    10/17/05           03/16/05   03/11/05    \(153\)            \(3\)        
  and Tested                                                                                              

  Silicon L0 Module Production   11/29/05           02/16/05   02/16/05    \(198\)            0            
  Complete                                                                                                

  Layer 0 Silicon Detector Ready 05/25/06           07/08/05   07/05/05    \(217\)            \(3\)        
  to Move to DAB                                                                                          

                                                                                              status      10/31/2004
                                                                                              date:       
  ------------------------------ ------------------ ---------- ----------- ------------------ ----------- ------------

> **Table 1:** Run IIb D-Zero Detector Project DOE Level 2/Director's
> Milestones vs. Current Month and Previous Month's forecast. Entries
> are sorted by DOE L2/Director's Milestone date. Monthly variances are
> also provided.

############################### Management Highlights -- V. O'Dell

A TAB/GAB production readiness review was held October 7. The committee
was comprised of I. Bertram (Trigger Board chair), D. Edmunds (ADF
expert), R. Hirosky (review committee chair and Level 2 expert) and J.
Steinberg (Cal Trk-Match expert). The committee agreed that the TAB/GAB
boards had been extensively tested and were ready for production.

More information about the review and the review report can be found at:

http://d0server1.fnal.gov/projects/run2b/Management/Posted_Info/PRRs/RunIIb_PRRs.htm

We also scheduled a Layer 0 silicon module production PRR for November
24.

# Procurement Highlights -- V. O'Dell

The remaining large procurements for the project are mainly going
through Universities. The MOUs for Columbia University, Boston
University and the University of Arizona are in place. The University of
Virginia requisition is working its way through the system. The FY05
Boston University and University of Arizona requisitions are being held
pending resolution of the Continuing Resolution. This should not present
a big problem until the end of November.

############  {#section .unnumbered}

I.  **Silicon L0 (WBS 1.6) Schedule and Budget Information -- A.
    Bean, R. Lipton**

############################### Sensors (WBS 1.6.1) -- M. Demarteau, R. McCarthy

> In October one sensor of each type underwent full strip testing at
> Stony Brook. Of 1024 strips on the 4 sensors, one strip was found to
> be bad due to a pinhole. The reason for the problem was found,
> actually before the testing. The sensor was scratched at Hamamatsu.
> The scratch was observed on arrival at Fermilab from Hamamatsu and was
> also observed on arrival at Stony Brook from Fermilab. (Most of the
> sensors are not scratched.) One per cent of the strips are allowed to
> be bad. Hence the sensors meet specifications.

############################### Readout (WBS 1.6.2) -- A. Nomerotski, R. Sidwell

> Testing the hybrids at both 132ns and 396ns is required because test
> stand operations with the Standalone Sequencer default is normally
> 132ns, but operation in the experiment is at 396ns timing. Tests were
> made to look for dependence of signal on bandwidth(BW), leaking of
> charge to neighbor channels, crosstalk, and noise vs BW to optimize
> signal/noise. It was concluded that the charge leakage at 132ns is
> greater than for 396ns, for higher bandwidth settings, and a 10%
> charge loss occurs. S/N is optimzed for BW\> 5 (this is a download
> parameter to the SVX 4 chips).
>
> Four modules are being read out, and first results are being compiled
> of a study of noise vs spacer thickness, which is an ongoing study.
> Noise is excellent and corresponds to S/N of \~14:1.
>
> In terms of installing electronics into DZero, four Layer 0 readout
> chains were installed, replacing 4 non-working H-disks. The chains
> included two modules (with sensors), and two bare hybrids, and are
> located between the Calorimeter and the first muon layer at eta\~-0.4.
> Work on firmware and software was in progress at the end of the
> reporting period. Recabling of H-disks was begun.
>
> The first 40 hybrids were stuffed with the wrong resistor value (this
> affects the gain calibration). This is fixable, with care. The hybrids
> are in any case useable for testing and other studies.

############################### Mechanical Design and Fabrication (WBS 1.6.3) -- W. Cooper

> A Layer 0 carbon fiber support structure, which is expected to be
> dimensionally and electrically accurate, was completed by the
> University of Washington and shipped to Fermilab. Thanks to careful
> packaging, the structure was delivered without incident. CMM
> measurements of the structure are in progress. Measurements of
> deflection under load will also be made. Based upon current
> information, we expect that this structure will be used for layer 0
> and installed at D-Zero. The only known defect is a slight, local loss
> of gold plating at a few locations on one of the kapton-copper mesh
> ground circuits. The circuit vendor has been contacted and will check
> with his plating sub-contractor. We had planned to make two support
> structures so that a back-up would be available should the first
> structure be damaged. While we do not anticipate that a second
> structure will be needed, the University of Washington will begin its
> fabrication.
>
> Fabrication of silicon assembly fixtures continued at Michigan State
> University, with completed fixtures arriving at a regular rate. The
> majority of fixtures for sensor-- hybrid module fabrication have been
> delivered. The design of fixtures for placing modules on the layer 0
> support structure was completed. Drawings of those fixtures will be
> sent to Michigan State University for fixture fabrication. The design
> of fixturing to hold the support structure during sensor--hybrid
> module installation is progressing at a good rate.
>
> While not directly included in the layer 0 project, measurements were
> made of clearances for layer 0 installation within the existing Run
> IIa silicon. Measured radial installation clearance (0.86 mm) is
> consistent with, but slightly less than, expectation (0.91 mm). The
> difference should not be significant.

############################### Detector Modules and Final Detector Integration (WBS 1.6.4, 1.6.5) -- L. Bagby

> The Wiener LV Power Supply is now operating correctly after a visit
> from the vendor to correct construction errors. Four modules, one for
> each detector quadrant, are fully operational with a spare module
> available in the mainframe housing. Interlock permits from the Glycol
> and VESDA safety systems are in place and operational. Integration of
> the power supply status into the EPICS monitoring system is underway.
> Documentation for Partial Operation Readiness Clearance is being
> finalized. Operation clearance is expected to occur before the
> shutdown ends.

############################### Trigger (WBS 1.2) Schedule and Budget Information -- B. P. Padley, D. Wood

Among the main events in October were the successful Production
Readiness review for the TAB and GAB boards for L1cal (Oct 7th at Nevis)
and a simulation meeting to decide on the EM algorithm for L1cal (Oct
22nd at Fermilab).

The accelerator shutdown continued, and progress was made in the

collision has for L1CTT and L1cal-track systems.

1.  **Level 1 Calorimeter Upgrade (WBS 1.2.1) -- M. Abolins, H. Evans**

> Layout work on the ADF v2 at MSU finished in October. Discussion is
> ongoing with several PCB fabricators and assemblers to determine who
> is capable of producing these boards.
>
> At Nevis, the TAB/GAB production readiness review was held on October
> 7. The review committee determined that the boards are ready for
> production with no modifications to the prototype design required.
> Since we fabricated enough boards for the full production run in the
> prototype phase (the incremental cost of doing this was negligible),
> the only remaining step is to assemble them. An order to do this has
> now been submitted and the boards are currently undergoing a safety
> review at Fermilab.
>
> October saw continuing work on TAB and GAB firmware at Nevis. A first
> pass at a simple list of L1Cal trigger terms, output by the GAB has
> been implemented in the GAB\'s firmware. This list replicates the
> existing Run IIa terms and adds a few example topological triggers.
> The firmware has been simulated, but not yet tested in the actual GAB
> board. This testing will be started in November.
>
> We have also determined, through Monte Carlo and data studies, that
> the baseline EM trigger algorithm is not optimal. A new algorithm with
> significantly better performance has been proposed and studied. This
> new algorithm will be implemented in the TAB firmware during the
> months of November and December.
>
> At Fermilab, work continued on the 5% prototype run of all the
> components of the BLS-to-ADF transition system. In particular, tests
> of signal quality using different impedance matching schemes between
> the existing BLS cables and the transition system were made.
> Additionally, a mock-up of the system\'s mechanical connection was
> also constructed. This was used to show that cable routing in the new
> system should not be a problem.

2.  **Level 1 Calorimeter/Track Matching (WBS 1.2.2) -- K. Johns**

> The production MTCxx cards were fabricated and will be submitted for
> assembly shortly. Layout changes to the production UFB cards were
> completed and the cards will be sent out for fabrication in the next
> couple of days. Termination of the long haul cables from the collision
> hall to MCH1 was completed.

############################### Level 1 Track Trigger (WBS 1.2.3) -- M. Narain

> Digital Front-End Card (DFEM/DFEA):
>
> DFEA board test data injection and data capture features have been
> successfully tested. Design files with both Run IIa and Run IIb
> equations were provided to the Fermilab group for tests. New equation
> formats have been implemented. An equation file reduction program has
> been developed and tested. Some problems in the equation files were
> found. At the moment, event capturing features are under revision to
> meet the new requirements put forward by Jamieson Olsen and are
> expected to be finished soon. The SLDB interface has not been tested
> yet due to lack of SLDB hardware. A board was sent to Fermilab and it
> has been installed on the platform.
>
> DFE Stand-Alone Tester (DSAT):
>
> We are still awaiting the SLDB hardware. No progress on this tester
> board. Since the DFE board is now on the platform, we can test the
> serial link interface directly at FNAL, but we still plan to make it
> work at BU (pending hardware arrival).
>
> Backplane, Subrack and Power Supplies:
>
> A fully assembled DFE subrack was installed in PW02 (west platform in
> the DZero collision hall) this week. Power supplies have been
> installed, cabled, and inspected. Permission to run unattended was
> given on 26 October 2004. The power supply GUI is up and running and
> everything looks good.
>
> A DFEA/M board has been installed on the west platform. We were able
> to initialize this board with no problems. A 9th CTOC (Central Tracker
> Octant Card) board has also been installed and connected to the DFEA/M
> outputs. The L3 output of this CTOC feeds into our readout crate X13.
> We are just beginning to look at the status bits from the DFEA/M and
> new CTOC now.
>
> ERNI connectors for the SLDB-to-backplane \"pigtail\" are at FNAL. Ken
> Johns will arrange to have these cables assembled. All LVDS cables are
> installed.
>
> Gigabit Ethernet Fiber optics are installed. Online Linux PCs (d0ol10
> and d0ol11) have been moved into place in MCH2. We are using the
> command line utilities to download the latest firmware to the board on
> the west platform.
>
> Crate Controller:
>
> The crate controller is working well with the DFEB boards on the BU
> test stand. The DFEB can be initialized from files stored on Linux.
> The major firmware development is completed, and Jamieson Olsen is
> working on minor bug fixes and improving performance.
>
> Eight DFEC2 boards are back from B.E.S.T. after having the BGA and QFN
> components reflowed and inspected. These boards are being stuffed and
> checked out now. Two new DFEC2\'s have been fully stuffed, tested and
> check out OK.

############################### Level 2 Beta (WBS 1.2.4) -- R. Hirosky

> We reviewed literature and contacted technical support for several
> alternate Single Board Comupter (SBC) manufacturers. A new SBC was
> ordered to test in the L2Beta motherboards. The new board manufactured
> by ADLINK uses about 30% less power than other boards in its class and
> requires no connections from a mezzanine connector.
>
> We expect delivery around mid-November. This board may require a us to
> design a simple IDE cable connector.
>
> Develop & Simulate New Run2b Algorithms:
>
> In algorithm development and simulation, a new MSU graduate student
> has began to study missing ET tools at L2.

############################### Silicon Track Trigger (WBS 1.2.5) -- U. Heintz

> We are still debating the wisdom of going forward with the STT
> upgrade. A decision will be made end of November or beginning of
> December. Meanwhile, production of the additional buffer controllers,
> needed in any event for the Layer 0 detector, will go ahead at
> Columbia University.

############################### Trigger Simulation (WBS 1.2.6) -- E. Barberis, M. Hildreth

> More studies were carried out on the electron algorithm. They suggest
> that a 1x2or2x1 Atlas type of Region of Interest performs better than
> any other selection, for a wide range on pT\'s. This forms the basis
> of the default algorithm, although more cross-checks are underway.
> More studies are also been carried out to define the shape of the
> isolation region. In order to do that, we must understand the
> treatment of pedestals in the upgraded L1Cal, and therefore, the
> behavior of negative tower energies.
>
> The L1Cal simulator (tsim_l1cal2b) has been updated against the
> implementation of the Sliding window in the trigger_rate_tool. We have
> also began studying how the simulator needs to be modified in order to
> interface it with tsim_l1l2, within trigsim.
>
> Work on the L1CTT updated simulator is also underway. Most of the
> infrastructure, which will operate for both IIa, and IIb, is in place.
> We are currently working on feeding the IIb equations to the code. The
> L1CTT IIb equations are being used, with a preliminary version of the
> simulation, to generate test vectors for the verification of the
> firmware on the prototype DFEP Boards.
>
> Work on the L1Caltrack simulator is progressing, and we are starting
> to look at possible L2 algorithms, although a clear identification of
> manpower is needed there.

############################### Analog Front End II (WBS 1.2.8) -- A. Bross

> The first 3 loaded AFE II prototype boards have been received and are
> under test. A few parts were installed improperly, but these problems
> have been fixed. Power-on studies have been completed and the all
> power-on functionality has been verified. Download studies have begun
> as well as testing of the firmware. There are an additional 18 boards
> ready to be stuffed once we give the OK.
>
> The TriPt chips from the MOSIS run have been received and the first
> few devices have been tested. So far, all functionality of the chip
> works. There are some pedestal shifts associated with the timing
> information and these are being studied. Even if this effect cannot be
> eliminated, the problem can be addressed in the FPGA's.
>
> The transfer of the AFE II schematic from ORCAD into Veribest has been
> completed and layout of the AFE IIt board has begun.

II. **DAQ/Online (WBS 1.3) Schedule and Budget information-- S. Fuess**

Activity in October 2004 continued on work to be completed during the
current accelerator shutdown. We expect to meet the target of having
most of the RunIIb Online system components operational by the end of
the Fall 2004 accelerator shutdown period.

############################### Level 3 Systems (WBS 1.3.1) D. Chapin, G. Watts

> There were no scheduled tasks in this subproject during October 2004.
> Operation of the most recent Level 3 farm node acquisition continues
> without problem. The next activity in this WBS is another farm node
> acquisition, with the process to begin in Spring 2005.

############################### Network and Host Systems (WBS 1.3.2) -- J. Fitzmaurice, S. Krzywdzinski

> Control and Monitoring systems: 1.3.2.2, 1.3.2.3
>
> A set of 12 Linux systems for general-purpose control room and DAQ
> monitoring functions was received on 9/15/2004. These systems were
> installed and configured during October.
>
> DAQ Host, ORACLE, and File Server Systems: 1.3.2.6, 1.3.2.7, 1.3.2.8
>
> The bulk of the activity and progress in the DAQ/Online area has been
> in the installation, configuration, and commissioning of the clustered
> server systems. There are four operational clusters for DAQ, database,
> file serving, and general "service" (web, alarms, electronic log)
> functions. All computing and network hardware has been installed and
> configured. We made the transition of the development and production
> Oracle systems to the new cluster in late October. Performance tests
> of the DAQ process chain (data logging, data transmission to the FCC)
> have continued during this period; all indications are that system
> capabilities are more than adequate for planned DAQ rates. The new NFS
> cluster is in partial use; we have discovered and are addressing some
> issues with the Linux kernel that affect operations with a large
> number of files. Cluster functions, such as power controller operation
> and redundant failover mechanisms, have been tested. We remain on
> target for migrating Online operations to the Linux servers from the
> current Alpha servers by the end of the Fall shutdown period.

############################### Control Systems (WBS 1.3.3) -- F. Bartlett, G. Savage, V. Sirotenko

############################### Testing continues on a Motorola PowerPC 8500 processor. Additional applications have been verified to properly function. More of these processors will be purchased in Spring 2005, for installation in the Summer 2005 shutdown period. {#testing-continues-on-a-motorola-powerpc-8500-processor.-additional-applications-have-been-verified-to-properly-function.-more-of-these-processors-will-be-purchased-in-spring-2005-for-installation-in-the-summer-2005-shutdown-period. .unnumbered}

############################### DAQ/Online Management (WBS 1.3.4) -- S. Fuess

> This is a continuing task for the long term, low duty-factor
> management activities for the DAQ/Online subsystem. There continues to
> be a minimal level of effort required to evaluate future personnel
> needs.

# Schedule Variance Analysis (as of 31 October 2004)

Schedule variances are reported against director's milestones in section
III. Eight milestones have already been successfully achieved. All
remaining milestones are projected ahead of the DOE baseline dates.

1.  **D-Zero Run IIb L0 Upgrade (WBS 1.6)**

> There are no unfavorable schedule variances for this subproject.

2.  **D-Zero Run IIb Trigger Upgrade (WBS 1.2)**

> The L2STT complete milestone slipped 40 days in the last month. This
> is because no work is going on for building new boards while we decide
> the best course of action. There will likely be a change control in
> December documenting the decision and corrections needed to the
> project.
>
> The only other slip of notice is 10 days in the L1 Calorimeter Trigger
> Production and Testing Complete milestone, due to the ongoing slips in
> the ADFv2 board. However, the board layout was completed in October,
> and the board is now going out for fabrication.

############################### 3. D-Zero Run IIb Online (WBS 1.3) {#d-zero-run-iib-online-wbs-1.3 .unnumbered}

There is no unfavorable schedule variance for this subproject.

############################### Department of Energy Milestones (as of 31 October 2004)

No additional milestones were predicted or achieved during the month of
October. Table 2 shows the status of the DOE Milestones.

  ----------------------------- ------------------ ----------- ----------- ------------------ ----------- ------------
  **L1 DOE Milestones vs                                                                                  
  Current Forecast**                                                                                      

  **(Sorted by L1 Baseline                                                                                
  Date)**                                                                                                 

  **Milestone Description**     **L2/Director\'s   **Last      **This      **L2/Director\'s   **Monthly   **Notes**
                                Baseline (10/04)** Month\'s    Month\'s    Variance (work     Variance    
                                                   Forecast    Forecast    days)**            (work       
                                                   (9/04)**    (10/04)**                      days)**     

  **WBS 1.2 Trigger**                                                                                      

  L2 Trigger Upgrade Production 01/05/06           5/23/2005   5/27/2005   \(147\)            4            
  and Testing Complete                                                                                    

  L1 Trigger Upgrade Production 04/10/06           8/19/2005   8/19/2005   \(154\)            0            
  and Testing Complete                                                                                    

  **WBS 1.3 Online/DAQ**                                                                                   

  Online System Production and  10/07/05           06/17/05    06/17/05    \(78\)             0            
  Testing Complete                                                                                        

  **WBS 1.6 Layer 0 Silicon                                                                                
  Detector**                                                                                              

  Layer 0 Silicon Detector      05/25/06           7/08/2005   7/05/2005   \(210\)            \(3\)        
  Ready to Move to DAB                                                                                    

                                                                                              status      10/31/2004
                                                                                              date:       
  ----------------------------- ------------------ ----------- ----------- ------------------ ----------- ------------

> **Table 2:** Run IIb D-Zero Detector Project DOE Level 1 Milestones
> vs. Current Month and Previous Month's forecast. Entries are sorted by
> DOE L1 Milestone date. Monthly variances are also provided.

############################### Obligation Reports (as of 31 October 2004)

The DZero Obligation Reports can be found below. The first report shows
total obligations without the cost of the original Run IIb silicon and
related closeout costs. The second report shows all obligations.

![](media/image2.png){width="8.5375in" height="6.605555555555555in"}

![](media/image3.png){width="8.603472222222223in"
height="6.639583333333333in"}