Issue 1

> November 1, 1990
>
> STANDARD SPECIFICATION

16911

[LARGE PROGRAMMABLE CONTROLLER]{.underline}

[PART 1 - GENERAL]{.underline}

1.01 [SCOPE]{.underline}

> A. This specification shall cover the material and installation
> methods required for programmable controllers.
>
> B. Other sections of these specifications shall be included in this
> specification by reference.

1.02 [SUBMITTALS]{.underline}

> Provide submittals in accordance with Section 01300 of these these
> specifications.

1.03 [RESPONSIBILITY]{.underline}

> A. The contractor shall furnish, install and make ready for use the
> programmable controller and accessories indicated on the drawings and
> required for a complete and totally functional system.
>
> B. All programmable controller programming will be provided by Sandia
> National Laboratories (Design Engineer) unless otherwise specified on
> the drawings.
>
> [PART 2 - PRODUCTS]{.underline}

2.01 GENERAL

> A. Environmental ratings for all components of the programmable
> controller (P.C.) system, except programming equipment, shall meet or
> exceed the following requirements:
>
> 1\) Humidity rating of 0 to 95% relative humidity (non-condensing).
>
> 2\) ambient temperature rating 0 to 60oC (32 to 140oF) operational and
> -40 to +80oC (-40 to 176oF) storage.
>
> B. All system modules shall be of such a design as to provide for free
> air flow convection cooling. No internal fans or other means of
> cooling, except heat sinks, shall be required.
>
> C. The controller shall be UL listed and CSA approved.
>
> D. All components comprising the controller system shall be
> manufactured by a company engaged in the manufacture of programmable
> controllers for at least 10 years.
>
> E. As a safety precaution, the entire PC system shall immediately shut
> down and annunciate (via LED) the occurrence of any of the following
> abnormal circumstances:
>
> 1\) Memory parity error.
>
> 2\) Loss of signal communication between CPU and I/O\'s.
>
> 3\) Loss of logic power to any portion of the system.
>
> 4\) Halt or interruption of memory scan.
>
> 5\) detection of any \"incomplete\" relay ladder rungs in memory.
>
> F. A single logic power supply shall suffice for a PC system up to 512
> local I/O\'s. Systems which have remote I/O\'s may utilize logic power
> supplies at each remote location.
>
> G. The power supply shall contain its own overcurrent and overvoltage
> protection.
>
> H. the system power supply fuse or ON/OFF switch/circuit breaker shall
> be accessible from the front of the system power supply.

[2.02]{.underline} [CENTRAL PROCESSOR UNIT]{.underline}

> A. The Central Processor Unit (CPU) enclosure shall be microprocessor
> based, encased in a sheet metal enclosure, and shall perform the logic
> control functions based upon the program stored in memory and the
> status of inputs and outputs.
>
> B. The [minimum]{.underline} standard control functions of the CPU
> shall include:
>
> 1\) relay ladder logic.
>
> 2\) latch/unlatch relays.
>
> 3\) timers (0.01 sec.,0.1 sec. and 0.1 min.)
>
> 4\) counters (up/down).
>
> 5\) data comparisons (=, , \_, \<).
>
> 6\) data transfers.
>
> 7\) synchronous shift registers forward, reverse (1,8 and 16 channel.
>
> 8\) transitional output.
>
> 9\) Master Control Relay
>
> 10)bit read and control
>
> 11)I/O Forcing
>
> 12)BCD to binary conversion
>
> 13)Binary to BCD conversion
>
> 14)Immediate I/O update
>
> C. A key operated selector switch shall be used for the selection of
> at least these minimum modes of operation:
>
> 1\) HALT - Processor is not scanning program in memory and outputs are
> turned off.
>
> 2\) RUN - Processor is executing program in memory and output are
> controlled according to the program.
>
> D. The keyswitch shall allow the CPU to be locked (key removed) in any
> position.
>
> E. The processor shall incorporate extensive self-diagnostic features
> which will halt the processor. In addition separate visual indicators
> will annunciate at the following conditions:
>
> 1\) RUN - Indicates that the processor is operating properly and
> executing the program in memory.
>
> 2\) HALT - Indicates that the processor is not executing the program
> in memory and all outputs are turned off, due to key position, fault
> in I/O or memory or through programming.
>
> 3\) MEMORY - Indicates that a parity error or malfunction has been
> detected in memory. Also, the HALT indicator will be on.
>
> 4\) FORCE - Indicates that one or more inputs or outputs have been
> forced ON or OFF, via programming equipment.
>
> 5\) I/O - Indicates a malfunction has occurred within the input/output
> system. Also, the HALT indicator will be on.
>
> F. In addition to the visual self-diagnostic indicators (LED\'s) the
> processor shall have a specifically designated block of at least 192
> internal diagnostic registers, which shall provide more detailed
> system status and fault diagnostic information accessible by
> programming equipment or intelligent peripherals.
>
> G. At a minimum the internal diagnostic registers shall provide the
> following information:
>
> 1\) Type of digital (input or output) or intelligent (analog, BCD,
> etc.) I/O module inserted in a particular slot.
>
> 2\) If an I/O module is not in a slot.
>
> 3\) Type of intelligent I/O module failure.
>
> 4\) rack and slot location of the I/O module causing a system failure.
>
> 5\) If the digital I/O module has a blown fuse (deluxe I/O only).
>
> 6\) Processor Keyswitch status (RUN, HALT, DISABLE OUTPUTS).
>
> 7\) Processor diagnostic LED status.
>
> 8\) Type and cause of processor failure.
>
> 9\) Type of incorrect operator action attempted and reason for same.
>
> H. A single communication port shall be used for programming and
> communications to other compatible devices. From this port,
> communication up to 1,000 ft. shall be supported.
>
> I. The data rate of the communication port shall be programmable. The
> following shall be the minimum available data (baud) rates: 4800 and
> 9600.

[2.03]{.underline} [MEMORY]{.underline}

> A. The program storage medium shall be battery-backed RAM available in
> a minimum of 4K word versions.
>
> B. The memory shall be housed in the same enclosure as the processor.
>
> C. Whenever words (contacts, entire rungs, etc.) are intentionally
> deleted from an existing logic program, the remaining program words
> shall be automatically repositioned so as to fill this temporary void.
>
> D. Memory shall not be used to store data (numbers). A unique register
> memory (General Purpose Storage Registers) which is separate from the
> ladder logic (program) memory will be used to store data.
>
> E. Typical scan time for 1K words shall be no greater than 10ms.
>
> F. Memory word length will be no less than 16 bits.
>
> G. Whenever words (contacts, entire rungs, etc.) are intentionally
> inserted into an existing logic program, the original program shall be
> automatically repositioned so as to \"open up\" a gap of sufficient
> size to accommodate the additional words. NOTE: This shall be possible
> insofar as there is adequate unused memory available to accommodate
> the enlarged program.
>
> H. In order to reduce the effective scan time for select local I/O\'s
> (to detect both high frequency and short pulse duration inputs), it
> shall be possible to program an immediate I/O update function.
>
> I. The minimum word utilization for program STORAGE shall be as
> follows:
>
> 1\) No more than one word for each contact or coil, including address.
>
> 2\) No more than one word for each opening branch.
>
> 3\) No more than one word for each closing branch.
>
> 4\) No words for spaces or connects.
>
> 5\) No words to begin a new rung.
>
> J. The processor RAM memory shall retain its program indefinitely
> provided AC power is maintained.
>
> K. If AC power is removed from the system, the system power supply
> battery shall maintain the RAM memory for a minimum of 1 year with a
> fresh battery or, 2 weeks after the \"Battery Low\" indicating LED is
> on.

[2.04]{.underline} [INTERNAL RELAY EQUIVALENTS, SPECIAL FUNCTION OUTPUTS
AND INSTRUCTIONS]{.underline}

> A. The processor shall be equipped with no less than 192 internal
> relay equivalents.
>
> B. The number of normally open (N.O.) and normally closed (N.C.)
> contacts of an internal output shall be virtually unlimited, dependent
> only upon memory capacity to store the control logic.
>
> C. It shall be possible to make any internal coil transition-sensitive
> with the use of a single command.
>
> D. It shall be possible to program any internal relay as a latch relay
> with both a latch and unlatch coil.
>
> E. It shall be possible to program multiple Master Control Relay (MCR)
> functions which will provide the ability to control separate
> designated blocks of the control program.
>
> F. It shall be possible to use programming equipment, intelligent
> peripherals (D-LOG modules, computers, etc.) with PC protocol or, the
> PC control program to operate special PC instructions (coils or
> register addresses) which perform the following functions:
>
> 1\) Place the processor in the HALT mode.
>
> 2\) Place the processor in the DISABLE OUTPUTS mode.
>
> 3\) return the processor to the RUN mode (with programming equipment
> or intelligent peripherals only).
>
> 4\) Inhibit programming equipment from Forcing I/O unless a special
> programmer OVERRIDE mode is used.
>
> 5\) Inhibit programming equipment from altering all register data when
> the processor is in RUN; however, when the programmer is in OVERRIDE
> it will be able to change register data regardless of processor
> keyswitch position.
>
> 6\) Inhibit programming equipment from altering two user specified
> blocks of registers when the processor is in RUN; however, when the
> CRT programmer is in OVERRIDE it will be able to change register data
> regardless of processor keyswitch positions.

[2.05]{.underline} [GENERAL PURPOSE STORAGE REGISTERS]{.underline}

> A. Each register shall be 16 bit and capable of storing a five digit
> decimal value (+32767 to -32768).
>
> B. It shall be possible to enter data into a storage register in
> either binary, decimal, or hexadecimal form.
>
> C. Programming techniques shall allow each register to be programmed
> as a counter, timer, shift register or for data storage.
>
> D. It shall be possible to monitor and alter any register via the
> programming equipment without Halting the processor, provided those
> registers have not been intentionally made inaccessible.
>
> E. It shall be possible to monitor and alter the individual bits of a
> storage register using programming techniques or directly with the
> programming equipment.
>
> F. Circuit design techniques shall allow for decoding the \"bit\"
> information from any zone of any programmed shift register \... and
> from as many zones as desired. The decoding of a zone, regardless of
> channel width (number of bits), shall be possible within a single
> circuit rung.
>
> G. The processor shall be equipped with no less than 112 general
> purpose registers.
>
> H. Register data shall be retained in the event of AC power loss by
> the system power supply battery.

[2.06]{.underline} [COUNTERS AND TIMERS]{.underline}

> A. There shall be at least a 0.1 sec. time base.
>
> B. The controller shall have the capacity of no less than 96 counters
> and/or timers. Each counter and timer shall be capable of storing a
> four digit decimal value (0-9999).
>
> C. Programming techniques shall allow for cascading timers and
> counters.
>
> D. Programming techniques shall allow for programming ON delay and OFF
> delay timers.
>
> E. It shall be possible to program up counters, down counters, and
> up/down counters.
>
> F. It shall be possible to program a reset contact(s) or data
> comparison(s) such that counter operation can be halted and counter
> value reset.
>
> G. Programming techniques shall provide for as many timer and counter
> decode (comparison) values as desired.
>
> H. Programming techniques will allow decoding an interval of a timer
> or counter.

[2.07]{.underline} [DATA FUNCTIONS, SHIFT REGISTERS]{.underline}

> A. It shall be possible to program the following compare condition
> functions between storage registers (-32,768 to -32,767) or between a
> storage register and a constant value (0 to 32,767).
>
> 1\) Equality (A=B).
>
> 2\) Inequality (AB).
>
> 3\) Less than (A\<B).
>
> 4\) Greater than or equal to (A_B).
>
> B. It shall be possible to program up to five comparison/condition
> functions on one line of logic.
>
> C. It shall be possible to perform a block data transfer of up to 9
> registers (register to register or constant to register) per line of
> relay ladder logic.
>
> D. It shall be possible to implement data transfer and
> comparison/condition instructions once every scan or for a single
> scan, the latter occurring upon the opened to closed transition of the
> combinational logic, or, false to true data comparison/condition
> function preceding the instruction.
>
> E. It shall be possible to perform a Binary-to-BCD or BCD-to-Binary
> conversion.

[2.08]{.underline} [DIGITAL INPUTS AND OUTPUTS]{.underline}

> A. Each input or output module shall be a self-contained unit housed
> within an enclosure.
>
> B. Input and output modules shall be U.L. listed and CSA approved.
>
> C. Pressure type screw terminals will accept one No. 12 or two No. 14
> stranded or solid wires.
>
> D. Convenience marker strips shall be provided adjacent to the I/O
> field wiring terminals for user labeling of I/O\'s.
>
> E. It shall be possible to replace any I/O module without disturbing
> or removing user field wiring.
>
> F. Several versions of digital modular I/O systems will be available.
> All versions shall be capable of being mixed in a single system and
> used with any processor. Modules will be color coded to help identify
> input modules from output modules, and as a user option, keyed to
> prevent future incorrect placement.
>
> 1\) Standard 4 function modular I/O system:
>
> a\) Each I/O shall have a single LED (light emitting diode) to provide
> visual display of device ON/OFF status.
>
> b\) Each output point shall be individually fused on the module. Fuses
> will be side accessible.
>
> c\) Each output point shall be capable of carrying 2 amps (except TTL
> and reed relay).
>
> d\) Each 4 I/O points will share a single common.
>
> e\) A dead-front I/O wiring terminal cover shall be available.
>
> f\) All I/O shall provide optical or hard contact (reed delay)
> isolation between the internal logic and external power circuits.
> Minimum isolation shall be 2500 volts RMS per NEMA standards.
>
> g\) I/O modules shall be able to be plugged into any location of any
> I/O rack assembly, which shall be capable of handling four, eight, or
> sixteen modules (15, 32, or 64 I/O points).
>
> h\) the maximum allowable panel space an I/O rack assembly shall
> consume will be as follows: 16 function - 155 sq. in., 32 function -
> 266 sq. in., and 64 function - 475 sq. in.
>
> i\) The following I/O modules shall be available at a minimum:
>
> [Inputs]{.underline} [Outputs]{.underline}
>
> · 12-24V AC/DC · 9-55V DC (2 Amp)
>
> · 48V AC/DC · 60-160V DC (2 Amp)
>
> · 120V AC/DC · 10-250V DC (2 Amp)
>
> · 240V AC/DC · 120V AC (2 Amp)
>
> · TTL · 240V AC (2 Amp)
>
> · Simulator Input · TTL
>
> · Reed Relay (N.O. & N.C.
>
> contacts available)
>
> · Simulator
>
> 2\) 8 Function modular I/O system:
>
> a\) Each I/O will have a single LED to provide visual display of
> device ON/OFF status.
>
> b\) Each output point will be individually fused on the module. Fuses
> will be accessible from the side of the module. A single LED will
> indicate a blown fuse condition for four of eight points.
>
> c\) Each output point shall be capable of carrying 2 amps (except TTL
> and reed relay).
>
> d\) The system shall allow application flexibility in that four points
> can share a single common or provide individual isolation.
>
> e\) A dead-front I/O wiring terminal cover shall be available.
>
> f\) All I/O shall provide optical or hard contact (reed relay)
> isolation between the internal logic and external power circuits.
> Minimum isolation shall be 2500 volts RMS per NEMA standards.
>
> g\) I/O modules shall be able to be plugged into any location of any
> I/O rack assembly, which shall be capable of handling eight or sixteen
> modules (64 or 128 I/O points).
>
> h\) The maximum allowable panel space an I/O rack assembly shall
> consume will be as follows: 64 function - 225 sq. in., and 128
> function 0 380 sq. in.
>
> i\) The following I/O modules shall be available at a minimum:
>
> [Inputs]{.underline} [Outputs]{.underline}
>
> · 12-24V AC/DC · 9-55V DC (2 Amp)
>
> · 48V AC/DC · 60-160V DC (1.5 Amp)
>
> · 120V AC/DC · 12-50V AC (2 Amp)
>
> · 120V AC/DC
>
> (Isolated) · 120V AC (2 Amp)
>
> · 240V AC/DC · 120V AC (2 Amp, Isolated)
>
> · TTL · 240V AC (2 Amp)
>
> Simulator Input · TTL
>
> · Reed Relay (N.O.contact)
>
> · Simulator
>
> 3\) 16 Function I/O
>
> a\) Each I/O will have a single LED to provide visual display of
> device ON/OFF status.
>
> b\) A group of four points shall share a single fuse. When a fuse
> blows an LED will light on the module.
>
> c\) Each output point shall be capable of carrying 2 amps.
>
> d\) A group of four points shall share a single common.
>
> e\) All I/O shall provide optical isolation between the internal logic
> and external power circuits. Minimum isolation shall be 2500 volts RMS
> per NEMA standards.
>
> f\) The maximum allowable panel space an I/O rack assembly shall
> consume will be as follows: 64 function - 158 sq. in., and 128
> function - 249 sq. in.
>
> g\) The following I/O modules shall be available at a minimum:
>
> [Inputs]{.underline} [Outputs]{.underline}
>
> · 120V AC/DC · 120V AC

[2.09]{.underline} [INTELLIGENT INPUTS AND OUTPUTS]{.underline}

> A. Shall be microprocessor based.
>
> B. Modules shall be U.L. listed and CSA approved.
>
> C. It shall be possible to replace any module without disturbing or
> removing user field wiring.
>
> D. Convenience marker strips shall be provided adjacent to the field
> wiring terminals for user labeling and terminal function
> identification.
>
> E. Module keying shall be provided as a user option to prevent future
> incorrect positioning of replacement modules.
>
> F. Variable voltage or current ranges and special functions shall be
> dipswitch selectable.
>
> G. At a minimum, a single indicating LED will indicate proper module
> operation.
>
> H. Each module will take only a single register slot in a rack
> assembly.
>
> I. A line of special function, Intelligent I/O modules, shall be
> available with the following minimum functional characteristics in
> addition to those already mentioned:
>
> 1\) Analog Input Module
>
> a\) Shall have, at a minimum, four single ended input channels.
>
> b\) Shall have the following user selectable ranges, 1-5V DC, 0-10V
> DC, ± 10V DC and 4-20 mA.
>
> c\) Shall require no external resistors for voltage ranges.
>
> d\) Shall require no user calibrations over varying temperature ranges
> (self-calibrating).
>
> e\) Shall require no external power supply.
>
> f\) Shall have minimum resolution of 1 part in 2000.
>
> g\) Shall have minimum accuracy of ±0.5% of full scale over the
> temperature range 0-60oC.
>
> 2\) Analog Output Module
>
> a\) Shall have, at a minimum, four single ended output channels.
>
> b\) Shall have the following user selectable ranges, 1-5V DC, 0-10V
> DC, ±10V DC and 4-20mA.
>
> c\) Shall require no external resistors for voltage output.
>
> d\) Shall require no external power supply. Field device power shall
> be supplied from the PC system power supply.
>
> e\) Shall have the user option to HOLD or RESET the outputs on CPU
> HALT.
>
> f\) Outputs shall be short circuit protected and conform to ISA-S50.1.
>
> g\) Shall have minimum resolution of 1 part in 2047.
>
> h\) Shall have minimum accuracy of ±0.5% of full scale over the
> temperature range 0-60oC.
>
> 3\) Multiplexed BCD Input Module
>
> a\) Shall have the ability to read CD or nines complement of BCD from
> up to sixteen 1 to 4 digit thumbwheel sets in the multiplexed mode.
>
> b\) Shall require no external power supply for system operation in the
> multiplexed mode.
>
> c\) Shall interface with a single 5V DC or 12V DC BCD or Gray Code
> device that outputs data at a rapid rate in the single channel mode.
>
> d\) Data lines shall be short circuit protected to ground.
>
> e\) Shall have a self-test mode for ease of startup.
>
> 4\) Multiplexed BCD Output Module
>
> a\) Shall be able to display BCD data to at least sixteen 1 to 4 digit
> LED displays.
>
> b\) Data line shall be TTL compatible.
>
> c\) Data lines shall be short circuit protected to ground.
>
> d\) Shall have a self-test mode for ease of startup.
>
> 5\) High Speed Counter Module
>
> a\) Shall be able to count pulses at up to 100,000 cycles per second.
>
> b\) Shall have a counter range of at least +8,000,000 to
>
> -8,000,000.
>
> c\) Shall, at a minimum, have three different counting modes:
> quadrature, single count pulse train with direction, separate count
> up/count down pulse trains.
>
> d\) Shall have, at a minimum, three individually fused on board
> outputs for local control based on counter value.
>
> e\) Shall have a minimum of seven diagnostics indication LED\'s.
>
> f\) Shall interface with devices operating between 5024 VDC.
>
> g\) Shall have a self-test mode for ease of startup.
>
> 6\. Speech Output Module
>
> a\) Shall have a stored fixed vocabulary of at least 590 words.
>
> b\) Shall have a speaker output terminal with at least 1.5 watts of
> output power at 4 ohms.
>
> c\) Shall have a headphone terminal.
>
> d\) Shall have a line output terminal for connection to an external
> amplifier.
>
> e\) Shall have a volume adjust potentiometer for use with the speaker
> and headphone terminals.
>
> f\) Shall have a self-test pushbutton which when pressed, will speak a
> canned message.
>
> g\) Shall have provisions to be programmed by a processor D-LOG Data
> Controller, or other ASCII output devices.

[2.10]{.underline} [REMOTE INPUTS AND OUTPUTS]{.underline}

> A. The remote I/O system shall be compatible with all of the
> company\'s modular processors.
>
> B. The remote I/O system shall be compatible with all of the
> company\'s modular I/O systems, both digital and intelligent
> (register).
>
> C. Any module comprising the system shall consume no more than one I/O
> rack assembly slot.
>
> D. No special power supply shall be required for system operation.
> Power will be provided by the I/O rack assembly power supply.
>
> E. The system shall consist of a multi-channel, multi-drop
> configuration having at least two independent channels with eight
> drops per channel minimum.
>
> F. The method of communication between the modules comprising the
> system shall be continuous, full duplex serial differential.
>
> G. Each channel shall support at least 1024 digital I/O and provide
> 127 registers for register I/O.
>
> H. Each drop shall support at least 128 digital I/O.
>
> I. The I/O scan of the remote I/O system shall be independent of the
> processor memory scan.
>
> J. The maximum serial data rate shall be at least 31.25K baud for each
> independent channel.
>
> K. The maximum cable distance between the processor and the last drop
> on a channel shall be no less than 10,000 ft.
>
> L. The local control module of the remote I/O system shall have a
> minimum of seven diagnostic LED\'s and each remote module shall have a
> minimum of five diagnostic LED\'s.
>
> M. The remote I/O system shall have a group of preassigned diagnostic
> registers which shall be used to report system faults to the main
> processor.
>
> N. Upon failure of a particular drop or upon a user defined condition,
> it shall be possible to shut down one or all of the other drops on the
> remote I/O system.
>
> O. System design shall allow the user to have the option to select how
> the outputs of the system will fail (reset OFF or freeze in last
> state) should any of the following occur:
>
> 1\) A user selected condition.
>
> 2\) A system communication failure.
>
> 3\) Loss of processor due to power outage or CPU fault.
>
> P. System design shall allow the user to have the option to continue
> system operation should a fault occur on a single drop of either
> channel.
>
> Q. Each module comprising the system shall have a removable wiring
> terminal for ease of module replacement.

[2.11]{.underline} [FIBER OPTICS]{.underline}

> A. A modular fiber optic communication system, providing high EMI/RFI
> immunity and complete electrical isolation shall be available.
>
> B. The fiber optic communication systems shall operate as a
> communication link between any of the company\'s differential devices.
> This is to include processors and remote I/O, programmers, processors
> to processors, and processors to remote I/O links.
>
> C. Each module comprising the fiber optic communication system shall
> consume no more than one rack assembly slot.
>
> D. No special power supply shall be required for the fiber optic
> system. Power will be provided by the rack assembly power supply.
>
> E. System design shall allow the use of repeaters (multiple
> transmitters/receivers) up to a maximum of at least seven.
>
> F. The maximum distance for a single (one transmitter and one
> receiver) fiber optic link shall be no less than 3,280 ft. (1000m),
> 22,960 ft. (7000m) with seven repeaters.
>
> G. The system shall allow the use of standard fiber optic connectors
> and 100 micron core multi-mode fiber optic cable.

[2.12]{.underline} [OPERATOR INTERFACE]{.underline}

> A. A hand-held or panel mounted loader/monitor device shall be
> available with the following capabilities:
>
> 1\) Shall have the ability to enter and display register data in
> decimal, hexadecimal and binary format.
>
> 2\) Shall have a security key selector switch to prevent unauthorized
> entering of register data.
>
> 3\) Shall have a 16 character alphanumeric display minimum.
>
> 4\) Shall have a sealed keypad with tactile feedback.
>
> 5\) Shall have the ability to display English language message,
> generated by the user program stored in processor memory.
>
> B. A preassembled control station designed to reduce the installed
> cost of I/O in control panels shall be available. This system shall
> have the following minimum characteristics:
>
> 1\) It shall operate as a single drop of the company\'s remote I/O
> system allowing it to be located up to 10,000 ft. from the processor.
>
> 2\) It shall consist of a 19\", NEMA 1 main and expander rack.
>
> 3\) Each rack (main and expander) shall house any combination of
> special function modules. The minimum number of modules a single rack
> will house shall be four.
>
> 4\) The modules shall have, at a minimum, the following functions:
> Thumbwheel Input, Pushbutton Input, Digital Display Output and Backlit
> Display.
>
> 5\) The thumbwheel input module shall allow entering a four digit
> value into a processor register.
>
> 6\) The Digital Display module shall have a \"push-to-test\" button.
> It shall be able to display a value ranging between +32,767 to
> -32,768.
>
> 7\) The Backlit Display module shall have a multi-colored user
> configuration display kit.

[2.13]{.underline} [PROGRAMMING EQUIPMENT]{.underline}

> A. The company shall manufacture its own hand-held and CRT
> programmers, and have several program packages which will allow an IBM
> personal or industrial computer or equivalent to program its
> programmable controllers.
>
> B. The CRT and Hand-Held programmer shall have a self test mode.
>
> C. Environment ratings for the Hand-Held and CRT programmers shall
> meet or exceed the following requirements:
>
> 1\) Humidity rating of 0 to 95% relative humidity (non-condensing).
>
> 2\) Ambient temperature rating 0-50oC (32 to 122oF) operational and
> -20 to 65oC (-4 to 150oF) storage.
>
> D. All programmers shall at a minimum allow displaying the following
> processor STATUS information:
>
> 1\) The type of processor including its software revision.
>
> 2\) Size of the processor\'s memory.
>
> 3\) The amount of memory (in words) currently being used.
>
> 4\) The number of ladder diagram rungs currently programmed.
>
> 5\) The status of the processor\'s keyswitch.
>
> 6\) If any I/O point is currently being Forced.
>
> E. To allow monitoring of a malfunctioning machine or process, it
> shall be possible to connect or disconnect programming equipment at
> all times \-- even when the system is running.
>
> F. Programs developed with the company manufactured programmers or IBM
> program packages shall be compatible with each other.
>
> G. The company manufactured programmers and IBM program packages shall
> program any current processor manufactured by the company.
>
> H. The company manufactured programmers and IBM program packages shall
> contain all keys necessary to program their designated control,
> searching, monitoring, altering, etc. functions. No special \"key
> overlays\" will be required.
>
> I. The CRT programmers and IBM program packages shall employ
> multifunction \"soft\" function keys and screen displayed programming
> instructions which will serve to prompt the user through keystroke
> sequences.
>
> J. The CRT programmers shall also operate as a standard data terminal
> with RS-232C capability.
>
> K. The CRT programmers and IBM program packages shall allow direct
> processor connection at distances up to 10,000 feet (3048m).
>
> L. The CRT programmers and IBM program packages shall be able to
> display and monitor (indicate I/O status) several ladder rungs (which
> do not have to be consecutive) on the screen at the same time.
>
> M. Several versions of the IBM programming package shall be available
> with different capabilities.
>
> 1\) A standard IBM program package shall provide the IBM personal
> computer with the following capabilities in addition to those already
> stated.
>
> a\) Provide online RUN MODE programming o all functions for all
> processors manufactured by the company.
>
> b\) Allow assigning alphanumeric names to program files stored on
> floppy disk.
>
> c\) Allow recording programs, register data, etc. as separate disk
> files.
>
> d\) Have the ability to provide hardcopy documentation of the
> processor control program, storage register contents,
> cross-referencing of addresses used in the control program or any
> other block of information formatted to appear on the CRT screen via
> any standard printer which accepts ASCII data.
>
> 2\) A deluxe IBM program package shall provide the IBM personal
> computer with the following capabilities in addition to those already
> stated.
>
> a\) Off-line programming (no processor necessary) of all programmable
> controller functions.
>
> b\) Transfer of all or part (block transfer) of the control program to
> or from the programmer\'s off-line memory.
>
> c\) Ability to document a control program by assigning an 18 character
> alphanumeric label to each I/O element and up to a one page comment
> per rung along with a cross reference of the output element.
>
> d\) Ability to program and search for an I/O by label.
>
> e\) Ability to monitor the I/O status with the I/O label displayed on
> the CRT.

[2.14]{.underline} [PROGRAMMING]{.underline}

> A. It shall be possible to program relay rungs comprised of a contact
> matrix 10 contacts across by seven contacts down (70 contacts per
> rung).
>
> B. It shall be necessary to issue a two-part command in order to
> delete all relay ladder rungs from memory. The second part shall
> provide a safeguard wherein the operator must verify his intentions to
> erase the entire control program.
>
> C. The programmer display shall give readout of I/O address number,
> relay symbols, rung number, line and position reference, special
> function symbols, storage register address number and data, I/O
> status, and forcing indication.
>
> D. It shall be possible to search the program for any contact address,
> coil address, storage register, rung number, master control relay,
> forced I/O address and any other special function the CPU supports.
>
> E. It shall be possible to alter or delete all or any part of a rung
> without affecting the remainder of the program. In these cases the
> program shall be automatically recompiled to accept the new rung or
> remove the old rung thus leaving no gap.
>
> F. It shall be possible to force any external input or output on or
> off via the programming equipment.
>
> G. It shall be possible to program nested branches (branch circuits
> within branch circuits).
>
> H. It shall be possible to program any given I/O address as often as
> desired.
>
> I. Programming equipment shall provide an English language indication
> of the nature of programming errors or incorrect operating procedures.

[2.15]{.underline} [DATA LOGGING.]{.underline}

> A. A dedicated microprocessor based plug in module thats primary
> function is to assemble programmable controller data and generate
> messages, graphic CRT displays, and hardcopy reports shall be
> available with the following features:
>
> 1\) Shall be available in battery backed RAM memory to 25K.
>
> 2\) Shall program in Extended BASIC.
>
> 3\) Shall have at least two RS-422 compatible ports for communication
> to CRT\'s, printers, barcode readers, etc., or the company\'s
> programmable controllers either by direct cable connection or over the
> company\'s Local Area Network. The functionality (COMM, PTR, etc.)
> shall be programmable and BAUD rate selectable.
>
> 4\) Shall have a battery backed time-of-day clock.
>
> 5\) Shall have ASCII read/write capability.
>
> 6\) Shall have programmable interrupts such as keyboard, time, and
> programmable controller data value.
>
> B. The company shall have communication software packages for IBM\*
> personal computers which will provide at a minimum register read/write
> capability for general data logging.

[2.16]{.underline} [NETWORKING]{.underline}

> A. Design shall allow direct (without additional hardware) processor
> to processor communication at data transmission rates up to 9600 Baud
> and distances up to 10,000 ft. (3048m) via
>
> RS-422 compatible communication.
>
> B. Design shall allow direct processor to processor communication at
> data transmission rates up to 9600 Baud and distances up to 22,960 ft
> (7000m) using fiber optic communication provided Fiber Optic Interface
> Modules are used.
>
> C. A baseband, timed floating master, high speed Local Area Network
> (LAN) shall be available with the following capabilities.
>
> 1\) Transmission type will be Manchester Encoded HDLC with message
> format complying with ANSI 3.28 and CRC error checking.
>
> 2\) The communication data rate of the high speed LAN shall be
> selectable up to 500K Baud.
>
> 3\) The maximum high speed LAN cable distance shall be at least 10,000
> ft. (3048m).
>
> 4\) A single LAN shall allow communication of up to 200 devices (CPU,
> programmers, computers, etc.).
>
> 5\) A single Network Interface Module shall manage the transmission of
> at least two devices (CPU, programmers, computers, etc.) through two
> separate low speed RS-422 compatible communication ports.
>
> 6\) The communication rate of the Network Interface Module low sped,
> RS-422 compatible ports, shall be selectable up to 19.2K Baud.
>
> 7\) The Network Interface Module low speed ports will support RS-422
> compatible or Fiber Optic Communication.
>
> 8\) The maximum distance between the Network Interface Module and a
> device connected to either of its low speed communication ports shall
> be at least 10,000 ft (3048m) for RS-422 compatible communication and
> 22,960 ft. (7000m) for Fiber Optic Communication.
>
> 9\) All programming functions will be supported over the Local Area
> Network. These are to include programming, altering, monitoring,
> forcing I/O, program upload/download via computer.
>
> D. The LAN design shall allow communication between devices on
> individual Local Area Networks (Net-to-Net communications).
>
> E. The Local Area Network design shall allow for LAN redundancy.
>
> F. The company shall have a Network Interface Module that will permit
> a Fisher Controls PRoVOX\* with PCIU interface or, computer with
> MODBUS\* protocol, the ability to read or write the register data from
> the company\'s programmable controllers, or other intelligent devices,
> on the LAN.
>
> G. The company shall have a Network Interface Module that will permit
> a Honeywell TDC process management system Data Highway Port (DHP), or
> computer with MODBUS\* protocol, the ability to force I/O, read/write
> register and I/O data, from the company\'s programmable controllers,
> or other intelligent devices, on the LAN.
>
> H. the company shall have a software package that will allow an IBM
> personal computer the ability to read and write register and I/O data
> either by direct cable connection or over the LAN.
>
> [PART 3 - EXECUTION]{.underline}

3.01 [GENERAL]{.underline}

> The installation shall comply with all provisions of the NEC.

3.02 [PROCESSOR AND EXPANSION UNITS]{.underline}

> A. These units shall be installed in strict accordance with the
> manufacturer\'s requirements and the drawings and these
> specifications.
>
> 1\. Physical mounting shall be secure with no rattle or \"play\"
> allowed.
>
> 2\. Clearances around the units shall be adequate to provide proper
> cooling and shall conform to the manufacturer\'s requirements.
>
> B. All terminals shall be marked with the exact full digit number of
> the wire that is connected to them. Omission of leading zeros is not
> permitted. The marking shall be clearly lettered in a neat and legible
> manner. The marking method used shall be waterproof and not easily
> wiped off or rendered illegible. The \"write-on\" surface shall be
> thoroughly cleaned with an appropriate grease-cutting solvent before
> the marking is applied.
>
> C. The grounding of the processor and expansion units is very
> important. The grounding method shown on the drawings shall be
> followed exactly. All contacting surfaces of all grounding connections
> shall be thoroughly cleaned before being \"made\".

3.03 [WIRING]{.underline}

> All wiring shall be thoroughly checked prior to energizing the
> processor.
>
> 1\. Inputs to the processor shall be tested for proper voltage level
> before being connected to the processor.
>
> 2\. Output wiring shall be tested with an ohmmeter to locate possible
> shorts before they can cause damage to the processor. (This will be
> done prior to terminating the [real]{.underline} output i.e., light,
> relay coil.)
>
> 3\. Grounding connections shall be checked in the final installation
> with an ohmmeter before the system is energized.
>
> 4\. Power supply voltage shall be actually measured before the
> energization of the system.
>
> 5\. Shielded wiring shall be grounded at the grounding connection in
> the controller [only]{.underline}.
>
> 6\. All wiring shall be continuous. Splicers will not be acceptable.

3.04 [LABELS]{.underline}

> A. Each control device shall be provided with an engraved laminated
> phenolic resin label as specified on dwg. 73740/E3.
>
> B. Each wire shall be labeled at both ends per the drawings. Labels
> shall be of heat-shrink type.
>
> C. Nomenclature shall correspond to that shown on the project
> drawings.

3.05 [PROGRAM]{.underline}

> A. [GENERAL]{.underline}
>
> The contractor shall notify the SDR in writing at the completion of
> the installation of the programmable controller and its accessories.
>
> END OF SECTION