uint16_t xmc4400EthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
   uint8_t regAddr)
{
   uint16_t data;
   uint32_t temp;

   //Valid opcode?
   if(opcode == SMI_OPCODE_READ)
   {
      //Take care not to alter MDC clock configuration
      temp = ETH0->GMII_ADDRESS & ETH_GMII_ADDRESS_CR_Msk;
      //Set up a read operation
      temp |= ETH_GMII_ADDRESS_MB_Msk;
      //PHY address
      temp |= (phyAddr << ETH_GMII_ADDRESS_PA_Pos) & ETH_GMII_ADDRESS_PA_Msk;
      //Register address
      temp |= (regAddr << ETH_GMII_ADDRESS_MR_Pos) & ETH_GMII_ADDRESS_MR_Msk;

      //Start a read operation
      ETH0->GMII_ADDRESS = temp;
      //Wait for the read to complete
      while((ETH0->GMII_ADDRESS & ETH_GMII_ADDRESS_MB_Msk) != 0)
      {
      }

      //Get register value
      data = ETH0->GMII_DATA & ETH_GMII_DATA_MD_Msk;
   }
   else
   {
      //The MAC peripheral only supports standard Clause 22 opcodes
      data = 0;
   }

   //Return the value of the PHY register
   return data;
}
uint16_t xmc4400EthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
   uint8_t regAddr)
{
   uint16_t data;
   uint32_t temp;

    
   if(opcode == SMI_OPCODE_READ)
   {
       
      temp = ETH0->GMII_ADDRESS & ETH_GMII_ADDRESS_CR_Msk;
       
      temp |= ETH_GMII_ADDRESS_MB_Msk;
       
      temp |= (phyAddr << ETH_GMII_ADDRESS_PA_Pos) & ETH_GMII_ADDRESS_PA_Msk;
       
      temp |= (regAddr << ETH_GMII_ADDRESS_MR_Pos) & ETH_GMII_ADDRESS_MR_Msk;

       
      ETH0->GMII_ADDRESS = temp;
       
      while((ETH0->GMII_ADDRESS & ETH_GMII_ADDRESS_MB_Msk) != 0)
      {
      }

       
      data = ETH0->GMII_DATA & ETH_GMII_DATA_MD_Msk;
   }
   else
   {
       
      data = 0;
   }

    
   return data;
}