int rte_pmd_mlx5_host_shaper_config(int port_id, uint8_t rate,
				    uint32_t flags)
{
	struct rte_eth_dev *dev = &rte_eth_devices[port_id];
	struct mlx5_priv *priv = dev->data->dev_private;
	bool lwm_triggered =
	     !!(flags & RTE_BIT32(MLX5_HOST_SHAPER_FLAG_AVAIL_THRESH_TRIGGERED));

	if (!lwm_triggered) {
		priv->sh->host_shaper_rate = rate;
	} else {
		switch (rate) {
		case 0:
		/* Rate 0 means disable lwm_triggered. */
			priv->sh->lwm_triggered = 0;
			break;
		case 1:
		/* Rate 1 means enable lwm_triggered. */
			priv->sh->lwm_triggered = 1;
			break;
		default:
			return -ENOTSUP;
		}
	}
	return mlxreg_host_shaper_config(dev, priv->sh->lwm_triggered,
					 priv->sh->host_shaper_rate);
}
int rte_pmd_mlx5_host_shaper_config(int port_id, uint8_t rate,
				    uint32_t flags)
{
	struct rte_eth_dev *dev = &rte_eth_devices[port_id];
	struct mlx5_priv *priv = dev->data->dev_private;
	bool lwm_triggered =
	     !!(flags & RTE_BIT32(MLX5_HOST_SHAPER_FLAG_AVAIL_THRESH_TRIGGERED));

	if (!lwm_triggered) {
		priv->sh->host_shaper_rate = rate;
	} else {
		switch (rate) {
		case 0:
		 
			priv->sh->lwm_triggered = 0;
			break;
		case 1:
		 
			priv->sh->lwm_triggered = 1;
			break;
		default:
			return -ENOTSUP;
		}
	}
	return mlxreg_host_shaper_config(dev, priv->sh->lwm_triggered,
					 priv->sh->host_shaper_rate);
}