Source document: https://docs-lawep.s3.us-east-2.amazonaws.com/1698061198310.pdf (Liberia)
NCP502, NCP502A 80 mA CMOS Low Iq, Low- Dropout Voltage Regulator The NCP502/A series of fixed output linear regulators are designed for handheld communication equipment and portable battery powered applications which require low quiescent.

The NCP502/A series features an ultra−low quiescent current of 40 A.

Each device contains a voltage reference unit, an error amplifier, a PMOS power transistor, resistors for setting output voltage, current limit, and temperature limit protection circuits.
The NCP502/A has been designed to be used with low cost ceramic capacitors.

The device is housed in the micro−miniature SC70−5 and TSOP−5 surface mount packages.

Standard voltage versions are 1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 2.9 V, 3.0 V, 3.1 V, 3.3 V, 3.4 V, 3.5 V, 3.6 V, 3.7 V and 5.0 V. Other voltages are available in 100 mV steps.
Features • Low Quiescent Current of 40 A Typical • Excellent Line and Load Regulation • Low Output Voltage Option • Output Voltage Accuracy of 2.0% • Industrial Temperature Range of −40°C to 85°C, NCV502, TA = −40°C to 125°C • NCP502: 1.3 V Enable Threshold High, 0.3 V Enable Threshold Low • NCP502A: 1.0 V Enable Threshold High, 0.4 V Enable Threshold Low • NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable • These are Pb−Free Devices Typical Applications • Cellular Phones • Battery Powered Consumer Products • Hand−Held Instruments • Camcorders and Cameras Battery or Unregulated Voltage + C1 ON OFF 1 2 3 5 4 Vout + C2 This device contains 86 active transistors Figure 1.
Typical Application Diagram http://onsemi.com http://onsemi.com 4 5 1 2 3 SC70−5 SQ SUFFIX CASE 419A MARKING DIAGRAM xxx M 5 1 TSOP−5 (SOT23−5, SC59−5) SN SUFFIX CASE 483 5 1 xxx AYW 5 1 xxx A Y W M = Specific Device Code = Assembly Location = Year = Work Week = Date Code = Pb−Free Package (Note: Microdot may be in either location) PIN CONNECTIONS Vin GND 1 2 5 Vout Enable 3 4 N/C (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2013 January, 2013 − Rev.

19 1 Publication Order Number: NCP502/D ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ NCP502, NCP502A ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ PIN FUNCTION DESCRIPTION ÁÁÁÁ ÁÁÁÁPin No.
Pin Name Description ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ1 ÁÁÁÁÁVin ÁÁÁÁÁ Positive power supply input voltage.

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ2 GND Power supply ground.

ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 3 Enable This input is used to place the device into low−power standby.

When this input is pulled low, the device is disabled.
If this function is not used, Enable should be connected to Vin.

ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ4 ÁÁÁÁÁN/C No internal connection.

ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ5 ÁÁÁÁÁVout Regulated output voltage.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ MAXIMUM RATINGS ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ Rating ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ Input Voltage Enable Voltage Output Voltage Power Dissipation and Thermal Characteristics Power Dissipation Operating Junction Temperature Operating Ambient Temperature Symbol ÁÁÁÁÁ ÁÁÁÁÁVin Value 12 Unit ÁÁÁÁ ÁÁÁÁV Enable −0.3 to Vin +0.3 ÁÁÁÁ ÁÁÁÁV ÁÁÁÁÁ ÁÁÁÁÁVout −0.3 to Vin +0.3 ÁÁÁÁ ÁÁÁÁV ÁÁÁÁÁPD Internally Limited ÁÁÁÁW TJ NCP502 NCV502 ÁÁÁÁÁTA ÁÁÁÁÁ +150 −40 to +85 −40 to +125 °C °C ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ Storage Temperature Tstg −55 to +150 °C Stresses exceeding Maximum Ratings may damage the device.
Maximum Ratings are stress ratings only.

Functional operation above the Recommended Operating Conditions is not implied.

Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1.

Latchup capability (85°C) 100 mA DC with trigger voltage.
Unit °C/W 205 THERMAL CHARACTERISTICS Rating Symbol Test Conditions Value ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ Thermal Characteristics, TSOP−5 (Note 2) Thermal Resistance, Junction−to−Air (Note 3) RJA 1 oz Copper Thickness, 100 mm2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ Thermal Resistance, Junction−to−Ambient, SC70−5 RJA 400 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ W °C/W ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ NOTE: Single component mounted on a 80 x 80 x 15 mm FR4 PCB with stated copper head spreading area.
Using the following boundary conditions as stated in EIA/JESD 51−1, 2, 3, 7, 12.

2.

True no connect.

Printed circuit board traces are allowable.

3.

This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL−STD−883, Method 3015.

Machine Model Method 200 V.. http://onsemi.com 2 NCP502, NCP502A ELECTRICAL CHARACTERISTICS (Vin = Vout(nom.)

+ 2.0 V, Venable = Vin, Cin = 1.0 F, Cout = 1.0 F, TJ = 25°C, unless otherwise noted.)
Characteristic Output Voltage (TA = 25°C, Iout = 10 mA) Vin = Vout (nom.)

+1.0 V 1.5 V 1.8 V 2.5 V 2.7 V 2.8 V 2.9 V 3.0 V 3.1 V 3.3 V 3.4 V 3.5 V 3.6 V 3.7 V 5.0 V Output Voltage (TA = Tlow to Thigh, Iout = 10 mA) Vin = Vout (nom.)
1.5 V 1.8 V 2.5 V 2.7 V 2.8 V 2.9 V 3.0 V 3.1 V 3.3 V 3.4 V 3.5 V 3.6 V 3.7 V 5.0 V Line Regulation (Vin = Vout + 1.0 V to 12 V, Iout = 10 mA) Load Regulation (Iout = 1.0 mA to 80 mA) Output Current (Vout = (Vout at Iout = 80 mA) −3%) Dropout Voltage (TA = Tlow to Thigh, Iout = 80 mA, Measured at Vout −3.0%) 1.5 V−1.7 V 1.8 V−2.4 V 2.5 V−2.6 V 2.7 V−2.9 V 3.0 V−4.0 V 4.1 V−5.0 V NCV502 − 5.0 V Quiescent Current (Enable Input = 0 V) (Enable Input = Vin, Iout = 1.0 mA to Io(nom.))
Output Short Circuit Current (Vout = 0 V) Ripple Rejection (f = 1.0 kHz, 15 mA) Output Voltage Noise (f = 100 Hz to 100 kHz) Enable Input Threshold Voltage (NCP502) (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Enable Input Threshold Voltage (NCP502A) (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Output Voltage Temperature Coefficient 4.

Maximum package power dissipation limits must be observed.
PD TJ(max) TA RJA Symbol Min Typ Max Vout Vout Regline Regload Io(nom.)
Vin−Vout IQ Iout(max) RR Vn Vth(en) Vth(en) TC 1.455 1.746 2.425 2.646 2.744 2.842 2.94 3.038 3.234 3.332 3.43 3.528 3.626 4.900 1.455 1.746 2.425 2.619 2.716 2.813 2.910 3.007 3.201 3.298 3.43 3.528 3.626 4.900 − − 80 − − − − − − − − − 90 − − 1.3 − 1.0 − − − − − − − 1900 1700 1400 1300 1200 900 1100 1.0 90 500 − − − 0.3 − 0.4 − Unit V V mV/V mV/mA mA mV A mA dB Vrms V V ppm/°C 5.
Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.

http://onsemi.com 3 ) A ( T N E R R U C T N E C S E U Q I , Q I NCP502, NCP502A VOUT = 3.0 V ) A ( T N E R R U C T N E C S E U Q I , Q I VIN = 5.0 V VOUT = 3.0 V 45 42.5 40 37.5 35 32.5 30 −60 −40 −20 VIN, INPUT VOLTAGE (V) 0 20 T, TEMPERATURE (°C) 40 60 80 100 45 40 35 30 25 20 15 10 5 0 0 Figure 2.

Quiescent Current versus Input Voltage Figure 3.
Quiescent Current versus Temperature 6 5 4 60 40 20 0 −20 −40 60 30 0 100 50 0 −50 ) V ( E G A T L O V ) V m ( I N O T A V E D I ) A m ( T N E R R U C ) V m ( I N O T A V E D I T U P N I , N V I E G A T L O V T U P T U O T U P T U O , T U O I E G A T L O V T U P T U O −100 VIN = 4.0 V to 5.0 V COUT = 1.0 F IOUT = 30 mA E L B A N E T U P T U O , T U O V 0 10 20 30 60 50 40 t, TIME (s) 70 80 90 100 ) V ( E G A T L O V ) V ( E G A T L O V 10 5 0 3.0 2.0 1.0 0 0 VIN = 4.0 V VENABLE = 0 to 4.0 V IOUT = 30 mA COUT = 1.0 F 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 t, TIME (ms) Figure 4.
Line Transient Response Figure 5.

Enable Response 70 ) B d ( 60 COUT = 1.0 F VOUT = 3.0 V VIN = 4.0 V I N O T C E J E R E L P P R I 50 40 30 VIN = 4.5 V + 0.5 VP−P VOUT = 3.0 V IOUT = 30 mA COUT = 1.0 F 0 50 100 150 200 250 t, TIME (s) 300 350 400 450 20 0.01 0.1 1.0 10 100 FREQUENCY (kHz) Figure 6.

Load Transient Response Figure 7.


Ripple Rejection/Frequency http://onsemi.com 4 ) V ( E G A T L O V T U P T U O , T U O V NCP502, NCP502A 2.995 2.99 2.985 2.98 2.975 2.97 2.965 2.96 IOUT = 10 mA VIN = 12 V ) V ( VIN = 4.0 V E G A T L O V T U P T U O , T U O V CIN = 1.0 F COUT = 1.0 F VENABLE = VIN 3.5 3 2.5 2 1.5 1 0.5 0 −60 −40 −20 0 20 T, TEMPERATURE (°C) 40 60 80 100 0 VIN, INPUT VOLTAGE (V) Figure 8.

Output Voltage versus Temperature Figure 9.


Output Voltage versus Input Voltage 1200 1000 ) V m ( E G A T L O V T U O P O R D , T U O V − N V I 800 600 400 200 0 80 mA LOAD 40 mA LOAD 10 mA LOAD −50 −25 0 25 50 75 100 125 T, TEMPERATURE (°C) Figure 10.

Dropout Voltage versus Temperature http://onsemi.com 5 NCP502, NCP502A DEFINITIONS Load Regulation Line Regulation The change in output voltage for a change in output current at a constant temperature.
Dropout Voltage The input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage.

Measured when the output drops 3.0% below its nominal.

The junction temperature, load current, and minimum input supply requirements affect the dropout level.

Maximum Power Dissipation The maximum total dissipation for which the regulator will operate within its specifications.
Quiescent Current The quiescent current is the current which flows through the ground when the LDO operates without a load on its output: internal IC operation, bias, etc.

When the LDO becomes loaded, this term is called the Ground current.

It is actually the difference between the input current (measured through the LDO input pin) and the output current.

The change in output voltage for a change in input voltage.
The measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected.

Line Transient Response Typical over and undershoot response when input voltage is excited with a given slope.

Thermal Protection Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded.

When activated at typically 160°C, the regulator turns off.
This feature is provided to prevent failures from accidental overheating.

Maximum Package Power Dissipation The maximum power package dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e.

125°C.

Depending on the ambient power dissipation and thus the maximum available output current.

http://onsemi.com 6 NCP502, NCP502A APPLICATIONS INFORMATION A typical application circuit for the NCP502/A series is shown in Figure 1, front page.
Input Decoupling (C1) A 1.0 F capacitor either ceramic or tantalum is recommended and should be connected close to the NCP502/A package.

Higher values and lower ESR will improve the overall line transient response.

If large line or load transients are not expected, then it is possible to operate the regulator without the use of a capacitor.
TDK capacitor: C2012X5R1C105K, or C1608X5R1A105K Output Decoupling (C2) The NCP502/A is a stable regulator and does not require any specific Equivalent Series Resistance (ESR) or a minimum output current.

Capacitors exhibiting ESRs ranging from a few m up to 5.0 can thus safely be used.

The minimum decoupling value is 1.0 F and can be augmented to fulfill stringent load transient requirements.

The regulator accepts ceramic chip capacitors as well as tantalum devices.
Larger values improve noise rejection and load regulation transient response.

TDK capacitor: C2012X5R1C105K, C1608X5R1A105K, or C3216X7R1C105K Enable Operation The enable pin will turn on the regulator when pulled high and turn off the regulator when pulled low.

These limits of threshold are covered in the electrical specification section of this data sheet.

If the enable is not used then the pin should be connected to Vin.

Hints Please be sure the Vin and GND lines are sufficiently wide.
When the impedance of these lines is high, there is a chance to pick up noise or cause the regulator to malfunction.

Set external components, especially the output capacitor, as close as possible to the circuit, and make leads as short as possible.

Thermal As power across the NCP502/A increases, it might become necessary to provide some thermal relief.

The maximum power dissipation supported by the device is dependent upon board design and layout.
Mounting pad configuration on the PCB, the board material and also the ambient temperature effect the rate of temperature rise for the part.

This is stating that when the NCP502/A has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power dissipation applications.
The maximum dissipation the package can handle is given by: PD TJ(max) TA RJA If junction temperature is not allowed above the maximum 125°C, then the NCP502/A can dissipate up to 250 mW @ 25°C.
The power dissipated by the NCP502/A can be calculated from the following equation: Ptot Vin * Ignd (Iout) [Vin Vout] * Iout or VinMAX Ptot Vout * Iout Ignd Iout If an 80 mA output current is needed then the ground current from the data sheet is 40A.
For an NCP502/A (3.0 V), the maximum input voltage will then be 6.12 V. http://onsemi.com 7 NCP502, NCP502A ORDERING INFORMATION Device Nominal Output Voltage Marking Package Shipping† NCP502SQ15T2G NCP502SQ18T1G NCP502SQ18T2G NCP502SQ25T2G NCP502SQ27T2G NCP502SQ28T2G NCP502SQ29T2G NCP502SQ30T2G NCP502SQ31T2G NCP502SQ33T2G NCP502SQ34T2G NCP502SQ35T2G NCP502SQ36T2G NCP502SQ37T2G NCP502SQ50T2G NCP502ASQ15T1G NCP502ASQ18T1G NCP502ASQ25T1G NCP502ASQ27T1G NCP502ASQ28T1G NCP502ASQ30T1G NCP502ASQ33T1G NCP502ASQ35T1G NCP502ASQ50T1G NCP502SN28T1G NCP502SN29T1G NCP502SN30T1G NCP502SN31T1G NCP502SN33T1G NCP502SN34T1G NCP502SN35T1G NCP502SN36T1G NCP502SN37T1G NCP502SN50T1G NCV502SN50T1G* LCC LCD LCE LCF LCG LJI LCH LJJ LCI LJK LGO LIU LJQ LCJ LGP LGQ LGR LGS LGT LGU LGV LGW LGX LKD LJN LKE LJO LKF LJK LJ6 AC4 LKC LKG LKG SC70−5 (Pb−Free) 3000 / Tape & Reel TSOP−5 (Pb−Free) 3000 / Tape & Reel Additional voltages in 100 mV steps are available upon request by contacting your ON Semiconductor representative.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.
http://onsemi.com 8 NCP502, NCP502A PACKAGE DIMENSIONS SC−88A (SC−70−5/SOT−353) SQ SUFFIX CASE 419A−02 ISSUE K A G 5 S 1 2 4 3 −B− D 5 PL 0.2 (0.008) M B M N J C H K SOLDERING FOOTPRINT* 0.50 0.0197 NOTES: 1.

DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2.

CONTROLLING DIMENSION: INCH.

3.

419A−01 OBSOLETE.

NEW STANDARD 419A−02.

4.

DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS.
INCHES MIN 0.071 0.045 0.031 0.004 MAX 0.087 0.053 0.043 0.012 0.026 BSC --- 0.004 0.004 0.004 0.010 0.012 0.008 REF MILLIMETERS MAX MIN 2.20 1.80 1.35 1.15 1.10 0.80 0.30 0.10 0.65 BSC --- 0.10 0.10 0.10 0.25 0.30 0.20 REF 0.079 0.087 2.00 2.20 DIM A B C D G H J K N S 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 0.0748 SCALE 20:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com 9 NCP502, NCP502A PACKAGE DIMENSIONS TSOP−5 SN SUFFIX CASE 483−02 ISSUE H M K DETAIL Z DETAIL Z J 2X 2X NOTE 5 0.10 T D 5X 0.20 C A B 0.20 T 5 1 2 4 3 B S L G A 0.05 H C T SEATING PLANE SOLDERING FOOTPRINT* 1.9 0.074 0.95 0.037 NOTES: 1.

DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2.

CONTROLLING DIMENSION: MILLIMETERS.

3.

MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS.

MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.

4.
4.

DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS.

5.

OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION.

TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY.
MILLIMETERS MAX 3.00 BSC 1.50 BSC 0.95 BSC 0.90 0.25 DIM MIN A B C D G H J K L M S 0.01 0.10 0.20 1.25 0 2.50 1.10 0.50 0.10 0.26 0.60 1.55 10 3.00 2.4 0.094 1.0 0.039 0.7 0.028 SCALE 10:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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