Patent ID: 9742447
Date: 2017-08-22
CPC Classifications: H03C,H03L,H04B

Claim:
1. A clock signal generating apparatus, comprising: circuitry configured to: detect a phase difference between an input reference clock signal serving as a reference and a feedback signal, and output a control signal in accordance with the phase difference; a generate a clock signal with a frequency in accordance with the control signal; determine one of a plurality of phases to be selected based on a cycle of the clock signal and a first phase shift amount determined in advance for changing the cycle of the clock signal; and select the one of the plurality of phases obtained by equally dividing one cycle of the clock signal into a certain number, generate a phase-shifted clock signal whose signal level changes in the selected one of the plurality of phase, and output the generated phase-shifted clock signal as another feedback signal, wherein the circuitry is configured to generate a pattern by switching, at a certain time interval, between a plurality of patterns of a second phase shift amount that periodically changes every certain time, add the first phase shift amount to the second phase shift amount having the generated pattern, and determine the one of the plurality of phases to be selected so that a cycle of the phase-shifted clock signal matches the cycle of the clock signal changed by the first phase shift amount to which the second phase shift amount having the generated pattern is added.