Patent ID: 9536882
Date: 2017-01-03
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a semiconductor substrate; a fin structure on said semiconductor substrate, said fin structure being perpendicular to said semiconductor substrate and comprising an upper portion and a lower portion; a source region and a drain region adjacent to said fin structure; a gate structure surrounding said upper portion of said fin structure; a well region below said fin structure; and a well contact point in said semiconductor substrate, said lower portion of said fin structure comprising a sub-fin, said sub-fin being between the region surrounded by said gate structure and said semiconductor substrate, said sub-fin directly contacting said semiconductor substrate, said sub-fin comprising an upper portion of said sub-fin and a lower portion of said sub-fin, said upper portion of said fin structure and said upper portion of said sub-fin being undoped, and an electrical potential applied from said well contact point to said lower portion of said sub-fin through said well region reducing leakage currents from said upper portion of said fin structure.