Patent ID: 9583517
Date: 2017-02-28
CPC Classifications: H01L

Claim:
1. A method of manufacturing a polycrystalline oxide thin-film transistor array substrate, characterized in that the method comprises the following steps: 1) forming an amorphous oxide thin film layer on a substrate; 2) selectively etching the amorphous oxide thin film layer; 3) passivating and annealing the amorphous oxide thin film layer after the step 2; 4) forming a second oxide thin film on the oxide thin film layer after the step 3; and 5) annealing the second oxide thin film formed in the step 4; wherein the step 4 further comprises forming active layer channels by a patterning process after the formation of the second oxide film; or the step 5 further comprises forming active layer channels by a patterning process after annealing the second oxide thin film.