Patent ID: 9570472
Date: 2017-02-14
CPC Classifications: G02F,H01L

Claim:
1. An array substrate, comprising: a base substrate, comprising a pixel region and a peripheral region; data lines and gate lines formed to transversely and longitudinally cross each other on the base substrate to form a plurality of pixel units in the pixel region, wherein each of the pixel units comprises a switching element, a pixel electrode and a common electrode above the pixel electrode, and the common electrode has slits in each pixel unit and is a plate-shaped electrode in the pixel region, and when powered on, the common electrode forms a horizontal electric field together with the pixel electrode of each pixel unit; and a plurality of common electrode lines formed in the pixel region and connected with the common electrode, wherein the switching element comprises a gate electrode, a active layer, a source electrode and a drain electrode, each of the plurality of common electrode lines has a double-layer structure comprising a lower layer and an upper layer, the lower layer is provided as a same layer as the active layer and is formed as a same material as the active layer, and the upper layer is provided as a same layer as the source and drain electrodes and is formed as a same material as the source and drain electrodes.