Patent ID: 9664966
Date: 2017-05-30
CPC Classifications: G02F,H01L

Claim:
1. A display device comprising: a gate line structure disposed on a substrate, the gate line structure comprising a gate line and a first dielectric pattern sequentially stacked on the substrate; a data line structure disposed on the substrate, the data line structure comprising a first dielectric pattern, a first conductive pattern, and a data line sequentially stacked on the substrate; a thin film transistor disposed on the substrate, the thin film transistor comprising a gate electrode, a gate dielectric pattern, and an active pattern sequentially stacked on the substrate, the thin film transistor further comprising source and drain electrodes disposed on the active pattern; and a black matrix pattern comprising: a first region disposed directly on the gate line structure; a second region disposed directly on the data line structure; and a third region disposed directly on the thin film transistor, wherein lateral dimensions of the first region of the black matrix pattern, top of the gate line and the first dielectric pattern of the gate line structure are substantially equal to one another, wherein lateral dimensions of the second region of the black matrix pattern, the data line and the first dielectric pattern of the data line structure are substantially equal to one another, and wherein lateral dimensions of the third region of the black matrix pattern and the gate dielectric pattern are substantially equal to one another.