Patent ID: 9691861
Date: 2017-06-27
CPC Classifications: G01R,H01L

Claim:
1. A method for analyzing lifetimes of traps in a semiconductor device, comprising steps: determining a first-order derivative of a signal representing an operation of the semiconductor device over time to produce a signal rate change over time; determining a number of lifetimes based on a number of peaks of the signal rate change, wherein the peaks are locally largest magnitudes of an absolute value of the of the signal rate change; fitting the signal representing the operation of the semiconductor device over time to a multiexponential function formed as a linear combination of exponential curves, wherein a number of the exponential curves in the linear combination equals the number of the lifetimes, and wherein each exponential curve has an exponent value and a coefficient; and determining one or a combination of the lifetimes in the semiconductor device and corresponding magnitudes of the lifetimes, wherein the lifetimes correspond to the exponent values of the exponential curves and the magnitudes correspond to the coefficients of the exponential curves in the linear combination, wherein the steps are performed in a processor.