Patent ID: 9594675
Date: 2017-03-14
CPC Classifications: G06F

Claim:
1. One or more non-transitory computing device readable media having instructions stored thereon that, if executed by one or more processing units, perform a method comprising: receiving a memory access request including a logical address; converting a virtual chip enable, from the logical address, to a physical chip enable utilizing a virtual chip enable data structure, and determining one or more operating parameters utilizing the virtual chip enable data structure for the physical chip enable, wherein the virtual chip enable data structure maps one of the plurality of virtual chip enables to a plurality of memory devices or maps two or more virtual chip enables to one of a plurality of memory devices, and wherein the virtual chip enable data structure relates each of a plurality of chip enables to physical chip enables and one or more operating parameters of a corresponding block programmable memory device; translating the logical address to a physical address utilizing an address translation data structure; and enabling one of the plurality of memory devices using the physical chip enable converted from the virtual chip enable number utilizing the virtual chip enable data structure, routing the memory access request to the enabled memory device using the physical address translated utilizing the address translation data structure and causing the enabled memory device to execute the memory access at the physical address using the one or more operating parameters determined utilizing the virtual chip enable data structure.