Patent ID: 9665399
Date: 2017-05-30
CPC Classifications: G06F,Y02D

Claim:
1. A power management system for controlling power to a plurality of functional blocks included in a system-on-chip, the power management system comprising: a plurality of nano controllers including first through n-th nano controllers that are programmable nano controllers, where n is a natural number that is greater than or equal to two; an instruction memory that is shared by the plurality of nano controllers, the instruction memory including a plurality of instructions stored therein that are used by the plurality of nano controllers; and a signal map memory that is shared by the plurality of nano controllers, the signal map memory configured to store a plurality of signals that are provided to the plurality of functional blocks under the control of one or more of the plurality of nano controllers, wherein the first nano controller is programmed as a central sequencer, and the second through n-th nano controllers are programmed as first sub-sequencers that are dependent on the first nano controller.