Patent ID: 9595805
Date: 2017-03-14
CPC Classifications: G02B,H01S

Claim:
1. A semiconductor device comprising: a substrate structure including a semiconductor material layer that is present directly on a buried dielectric layer in a first portion of the substrate structure and an isolation dielectric material that is present directly on the buried dielectric layer in a second portion of the substrate structure; a III-V optoelectronic device is present in direct contact with and atop the isolation dielectric material and on the buried dielectric layer in a first region of the second portion of the substrate structure; and a dielectric wave guide is present in direct contact with and atop the isolation dielectric in a second region of the second portion of the substrate structure, the dielectric waveguide being composed of a dielectric material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, hafnium oxide, aluminum oxide, silica and combinations thereof, wherein the dielectric wave guide has a first width portion that is in closest proximity to an emission face of the III-V optoelectronic device, wherein the dielectric wave guide tapers along its length to a second width that is less than the first width in a direction away from the emission face.