Patent ID: 9747858
Date: 2017-08-29
CPC Classifications: G09G

Claim:
1. A source driver of a liquid crystal panel of unequal row drive width, comprising an input signal decoding control unit and a plurality of data signal output channels electrically coupled to the input signal decoding control unit; the input signal decoding control unit receives a data signal output channel start address signal, a data signal output channel end address signal and a data signal input sequence control signal; the input signal decoding control unit outputs a data signal output sequence control signal; the input signal decoding control unit controls an amount of activated data signal output channels to adjust a row drive width for each scan according to the received data signal output channel start address signal and the received data signal output channel end address signal; wherein the input signal decoding control unit comprises a combination switch, and the combination switch comprises a first thin film transistor, a second thin film transistor and a third reverse thin film transistor; a gate of the first thin film transistor is electrically coupled to the data signal output channel start address signal, and a source is electrically coupled to the data signal input sequence control signal, and a drain is electrically coupled to a register of the data signal output channel corresponding to a start address and a source of the third reverse thin film transistor; a gate of the second thin film transistor is electrically coupled to the data signal output channel end address signal, and a source is electrically coupled to the data signal output sequence control signal, and a drain is electrically coupled to a register of the data signal output channel corresponding to an end address and a drain of the third reverse thin film transistor; a gate of the third reverse thin film transistor is electrically coupled to the data signal output channel start address signal, and the source is electrically coupled to the drain of the first thin film transistor, and the drain is electrically coupled to the drain of a second thin film transistor.