Patent ID: 9583360
Date: 2017-02-28
CPC Classifications: H01J,H01L

Claim:
1. A substrate processing apparatus, comprising: a chamber; a first electrode disposed in the chamber; a second electrode disposed in the chamber to face the first electrode, and to hold a substrate; an RF power supply to apply an RF voltage with a frequency of 50 MHz or more to the second electrode; a first DC power supply to supply a negative voltage; a second DC power supply to supply a positive voltage; an output end connected to the second electrode; a first switch connecting the first power supply and the output end; a second switch connecting the second power supply and the output end; a third switch connecting the ground potential and the output end; and a gate pulser configured to sequentially control a combination of the first to third switches repeatedly to form a voltage waveform including a negative voltage pulse and a positive voltage pulse following the negative voltage pulse, and repeatedly apply said voltage waveform to the second electrode while superposing on the RF voltage applied to the second electrode, the negative voltage pulse having a negative peak voltage corresponding to the negative voltage, the positive voltage pulse having a positive peak voltage corresponding to the positive voltage, the positive voltage pulse having a delay time of 50 nano-seconds or less after the application of the negative voltage pulse, wherein a duty ratio of the positive voltage pulse is 1% or more and 18% or less, the duty ratio being defined by a ratio of a pulse width of the positive voltage pulse to a period of said voltage waveform.