Patent ID: 9747448
Date: 2017-08-29
CPC Classifications: G06F,H04L

Claim:
1. A computing device comprising: one or more hardware processors; and one or more memory devices storing instructions, the instructions executable by the one or more processors to perform operations comprising: identifying a section of source code of an application to apply zero-knowledge proofs of knowledge; generating a first performance model for a first security engine, the first performance model indicating a first performance of the first security engine to produce first zero-knowledge proofs of knowledge for the section of source code; generating a second performance model for a second security engine, the second performance model indicating a second performance of the second security engine to produce second zero-knowledge proofs of knowledge for the section of source code; determining, based at least partly on the first performance and the second performance, that the first security engine is to produce the first zero-knowledge proofs of knowledge for the section of source code; and obtaining machine readable code from the first security engine, the machine-readable code including expressions that are executable to produce the first zero-knowledge proofs of knowledge for the section of source code.