Patent ID: 9691659
Date: 2017-06-27
CPC Classifications: H01L

Claim:
1. A method of forming a semiconductor structure, the method comprising: forming a first dielectric material including a metal conductor embedded therein on a substrate; forming a second dielectric material above the first dielectric material and said metal conductor; forming a via opening in the second dielectric material; forming a metal liner on exposed surfaces within the via opening located in the second dielectric material; exposing the substrate to a gaseous ion plasma to remove portions of the metal liner that are horizontally oriented and to reduce a height of the metal liner from portions thereof that are vertically oriented; forming a trench opening in the second dielectric material, wherein the trench opening is connected with the via opening, wherein at least a portion of said metal liner remains on sidewall surfaces within the via opening during said forming of the trench opening; forming a diffusion barrier liner within the trench opening and the via opening; and forming a conductive material within of the trench opening and the via opening.