Patent ID: 9728465
Date: 2017-08-08
CPC Classifications: H01L

Claim:
1. A method of manufacturing a semiconductor device, the method comprising: forming a first gate structure in a first region of a substrate and a second gate structure in a second region of the substrate; forming a first semiconductor pattern including germanium in the first region of the substrate; forming a first metal layer in the first and second regions of the substrate including at a location to cover the first semiconductor pattern; performing a first heat treatment process such that the first semiconductor pattern and the first metal layer react with each other to form a first metal-semiconductor composite pattern in the first region and a semiconductor material of the substrate and the first metal layer react with each other to form a second metal-semiconductor composite pattern in the second region; removing the first metal-semiconductor composite pattern; forming a second metal layer on the substrate to cover the second metal-semiconductor composite pattern, the second metal layer including a material different from the first metal layer; and performing a second heat treatment process such that the substrate and the second metal layer react with each other to form a third metal-semiconductor composite pattern in the first region.