Patent ID: 9620433
Date: 2017-04-11
CPC Classifications: H01L

Claim:
1. A method for fabricating a microelectronic unit, said method comprising: forming a first semiconductor element having a first top surface and a first bottom surface remote from said first top surface; forming a first semiconductor device adjacent to said first top surface, wherein said first semiconductor device comprises an active region of said first semiconductor element; forming a first blind via extending from said first bottom surface toward said first top surface directly below said active region of said first semiconductor device and toward said active region and partially into a thickness of said first semiconductor element; filling said first blind via with a thermally conductive material for dissipating heat generated from said first semiconductor device; forming a second semiconductor element having a second top surface and a second bottom surface remote from said second top surface; forming a second semiconductor device adjacent to said second top surface; forming a second blind via extending from said second bottom surface toward said second top surface directly below said active region of said second-semiconductor device and partially into a thickness of said second semiconductor element; filling said second blind via with said thermally conductive material for dissipating heat generated from said second semiconductor device; and stacking said second semiconductor device on said first semiconductor device.