Patent ID: 9679983
Date: 2017-06-13
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a semiconductor substrate including isolation regions defining first and second active regions, the first active region having a first conductivity type and the second active region having a second conductivity type that is different from the first conductivity type; first threshold voltage control regions in predetermined regions of the first active region, wherein the first threshold voltage control regions have the first conductivity type and a higher impurity concentration than the first active region; a first gate trench extending across the first active region, wherein portions of side bottom portions of the first gate trench adjacent to the respective isolation region are disposed at a higher level than a central bottom portion of the first gate trench, and the first threshold voltage control regions remain in the first active region under the side bottom portions of the first gate trench adjacent to the respective isolation region; and a first gate pattern filling the first gate trench and covering the first threshold voltage control regions, wherein the first gate trench extends deeper into the semiconductor substrate than the first threshold voltage control regions.