Patent ID: 9570370
Date: 2017-02-14
CPC Classifications: H01L

Claim:
1. A method for manufacturing a multi chip package, the method comprising: mounting a first chip and a second chip over an upper surface of a first substrate; forming a protective layer that covers the first chip and the second chip; removing a part of an upper side of the protective layer and a part of upper sides of the first chip and the second chip by planarizing an upper surface of the first chip, an upper surface of the second chip, and an upper surface of the protective layer to form a global planar surface; grinding the global planar surface to form rough surfaces of convex and concave shapes; forming a thermal interface material over the upper surface of the first chip, over the upper surface of the second chip, and over the upper surface of the protective layer; and attaching a heat spreader to the thermal interface material, wherein the first substrate has an interposer structure including a first interconnection part, a second interconnection part, and a through electrode, wherein the first chip is positioned beside the second chip over the interposer structure, wherein the second interconnection part has a horizontal connection structure to connect the first chip and the second chip, and wherein the first interconnection part connects the first chip to the through electrode.