Patent ID: 9691437
Date: 2017-06-27
CPC Classifications: G11C,H01L

Claim:
1. A microelectronic package configured to provide multiple channel memory access, comprising: a substrate having first and second opposite surfaces, the first surface having third and fourth corners opposite one another along a first diagonal of the first surface, and first and second corners opposite one another along a second diagonal of the first surface transverse to the first diagonal, the first diagonal dividing the first surface in first and second half areas each extending from the first diagonal to one of the first corner or the second corner, the substrate including a plurality of terminals at the first surface, the terminals including first terminals configured to carry data and second terminals configured to carry address information, the first terminals and the second terminals in the first half area providing access to a first memory storage array corresponding to a first memory channel, and the first terminals and the second terminals in the second half area providing access to a second memory storage array corresponding to a second memory channel different from the first memory channel; and first and second microelectronic elements overlying the second surface and stacked in first and second orientations transverse to one another, the first and second microelectronic elements comprising the first and second memory storage arrays.