Patent ID: 9748356
Date: 2017-08-29
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a semiconductor substrate; a recessed metal gate in the semiconductor substrate; a source region in the semiconductor substrate, the source region including a first quantum dot that is a metal, the source region including a first recess; a drain region in the semiconductor substrate, the drain region including a second quantum dot that is a metal, the drain region including a second recess; a channel region coupled between the source and drain regions, the recessed metal gate and portions of the channel region having co-planar upper surfaces, the first and second quantum dots having a molecular composition that includes clusters of monomers; a first silicide layer lining bottom and side walls of the first recess, the first quantum dot being positioned in the first recess and being surrounded by the first silicide layer; and a second silicide layer lining bottom and side walls of the second recess, the second quantum dot being positioned in the second recess and being surrounded by the second silicide layer.