Patent ID: 9595597
Date: 2017-03-14
CPC Classifications: H01L

Claim:
1. A method of fabricating a semiconductor device, the method comprising: forming at least one semiconductor fin on an upper surface of a semiconductor substrate, the at least one semiconductor fin including a channel region interposed between opposing source/drain regions; recessing a portion of the source/drain regions with respect to the channel region; epitaxially growing a first semiconductor material from opposing sidewalls of the channel region and from the recessed source/drain regions, and selectively removing a base portion of the first semiconductor material formed on the recessed source/drain regions while maintaining a side portion of the first semiconductor material formed on respective sidewalls of the channel region; and epitaxially growing a second semiconductor material from the side portions and from the recessed source/drain regions so as to form embedded source/drain regions having a substantially symmetrical shape.