Patent ID: 9548704
Date: 2017-01-17
CPC Classifications: H03F

Claim:
1. A circuit comprising: an input balun circuit responsive to an input signal, the input balun circuit being configured to provide two output signals that are out of phase with each other; an actual switched amplification stage configured to direct one of the balun output signals to the phase inverter output; and a replica switched amplification stage connected in parallel with the actual switched amplification stage; wherein the actual switched amplification stage and the replica switched amplification stage are responsive to the two output signals from the input balun circuit to direct one of the balun output signals to the phase inverter output, and wherein the actual switched amplification stage and the replica switched amplification stage are configured to have a constant load impedance for both switch states that matches an impedance of the input balun circuit, and wherein the actual switched amplification stage and the replica switched amplification stage each comprises an amplification circuit of transistors and switches, and wherein the circuit further comprises a control device that controls a state of the transistors and the switches during operation of the circuit.