Patent ID: 9613582
Date: 2017-04-04
CPC Classifications: G09G,G11C

Claim:
1. A gate driver including a plurality of stages respectively transferring gate-on voltages to a plurality of gate lines, wherein a stage comprises: a pull-up driver including a first transistor, the first transistor having a control terminal connected to a first node, an output terminal connected to an output terminal of a present stage and an input terminal connected to a first clock terminal; a first node pull-down portion including a second transistor, the second transistor having an input terminal connected to a buffer node, an output terminal connected to the first node and a control terminal connected to a second node; and a buffer node stabilizer including a third transistor, the third transistor having an input terminal and a control terminal connected to an input terminal which is directly connected to the first node of the present stage, and an output terminal connected to the buffer node.