Patent ID: 9633791
Date: 2017-04-25
CPC Classifications: H01G

Claim:
1. A monolithic capacitor comprising: a multilayer body including a plurality of dielectric layers and six surfaces, the six surfaces including a first surface defining a mount surface, a second surface opposed to the first surface, a third surface and a fourth surface extending perpendicularly or substantially perpendicularly to the first surface and the second surface and perpendicularly or substantially perpendicularly to a stacking direction of the dielectric layers, and opposed to each other, and a fifth surface and a sixth surface extending perpendicularly or substantially perpendicularly to the first to fourth surfaces and opposed to each other; a plurality of first capacitor electrodes and second capacitor electrodes arranged inside the multilayer body; and a first outer electrode and a second outer electrode arranged on at least one surface of the multilayer body; wherein the first capacitor electrodes and the second capacitor electrodes are arranged perpendicularly or substantially perpendicularly to the first surface and the second surface; each of the first capacitor electrodes includes a capacitor portion opposed to the second capacitor electrode with the dielectric layer interposed therebetween, a lead portion led out from the capacitor portion to at least one surface of the multilayer body and connected to the first outer electrode, and an intermediate portion connected to the capacitor portion and to the lead portion and not opposed to the second capacitor electrodes; each of the second capacitor electrodes includes a capacitor portion opposed to the first capacitor electrode with the dielectric layer interposed therebetween, and a lead portion led out from the capacitor portion to at least one surface of the multilayer body and connected to the second outer electrode, and an intermediate portion connected to the capacitor portion and to the lead portion and not opposed to the first capacitor electrodes; the intermediate portion of each of the first capacitor electrodes and the intermediate portion of each of the second capacitor electrodes extend along the first surface of the multilayer body parallel or substantially parallel to the first surface; the intermediate portion of each of the first capacitor electrodes and the intermediate portion of each of the second capacitor electrodes do not overlap each other; the first capacitor electrodes and the second capacitor electrodes are led out to the first surface and are not led out to the second surface; the intermediate portion of each of the first capacitor electrodes and the intermediate portion of each of the second capacitor electrodes are arranged in a gap area that is surrounded, when viewed in the stacking direction, by imaginary lines extending from an inner exposed end of the lead portion of each of the first capacitor electrodes and an inner exposed end of the lead portion of each of the second capacitor electrodes in a direction interconnecting the first surface and the second surface, by the capacitor portions of each of the first capacitor electrodes and the second capacitor electrodes, and by the first surface; and when each of the first and second capacitor electrodes is viewed in the stacking direction, a dimension of the intermediate portion of each of the first capacitor electrodes or each of the second capacitor electrodes in a direction parallel to the first surface is greater than a dimension of the lead portion in the direction parallel to the first surface.