Patent ID: 9666716
Date: 2017-05-30
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a semiconductor substrate having isolation regions formed therein; a fin-shaped semiconductor structure protruding vertically above the isolation regions and extending laterally in a first direction, wherein the fin-shaped semiconductor structure forms a continuous extension of a bulk semiconductor substrate without having a buried oxide layer below the fin-shaped semiconductor structure; and a gate dielectric directly overlying a channel region of the fin-shaped semiconductor structure and a gate electrode directly overlying the gate dielectric, the channel region being interposed in the first direction between a source region and a drain region, wherein the channel region has sloped sidewalls and a width that continuously decreases from a base towards a peak of the channel region, wherein the channel region comprises an undoped volume inversion region having a minimum width between about 3 nm and about 4 nm and a maximum width between about 4 nm and about 8 nm, the volume inversion region further having a height extending downwardly from an apex of the fin-shaped semiconductor structure, the height being greater than about 25% of a total height of the channel region, and wherein the volume inversion region comprises a region in which, under an inversion condition, surface depletion regions extending from the opposing sloped sidewalls overlap.