Patent ID: 9583197
Date: 2017-02-28
CPC Classifications: G11C

Claim:
1. A nonvolatile memory device which includes a plurality of memory cell strings and each of the memory cell strings including a plurality of memory cells stacked in a direction perpendicular to a substrate, the device comprising: a first memory cell string coupled to a selected bit line and a selected string selection line; a second memory cell string coupled to the selected bit line and an unselected string selection line; and a third memory cell string coupled to an unselected bit line, wherein during a first bit line setup section of a program operation, a turn-on voltage is applied to both the selected string selection line and the unselected string selection line and during the first bit line setup section of a program operation, a bit line program voltage is applied to the selected bit line and a program inhibition voltage is applied to the unselected bit line, wherein the turn-on voltage is sufficient to turn on a string selection transistor coupled to the selected or unselected string selection line.