Patent ID: 9564528
Date: 2017-02-07
CPC Classifications: H01L

Claim:
1. A method for manufacturing a semiconductor device, comprising: forming a fin structure over a substrate; after forming the fin structure, forming an isolation insulating layer so that an upper part of the fin structure protrudes from the isolation insulating layer; after forming the isolation insulating layer, forming a gate structure over a part of the fin structure and over the isolation insulating layer; and after the gate structure is formed, forming recesses in the isolation insulating layer at both sides of the fin structure; and after the gate structure is formed, etching a portion of the fin structure which is not covered by the gate structure and protrudes from the isolation insulating layer, thereby forming a recess, wherein the recess in the fin structure and the recesses in the isolation insulating layer are formed such that a depth D1 of the recess in the fin structure and a depth D2 of the recesses in the isolation insulating layer measured from an uppermost surface of the isolation insulating layer satisfy 0≦D1≦D2, where D1 and D2 are not zero at the same time.