Patent ID: 9640488
Date: 2017-05-02
CPC Classifications: H01L

Claim:
1. A method for forming a chip package, comprising: providing at least one semiconductor substrate having a first surface and a second surface; removing a portion of the semiconductor substrate from the first surface to form a first recess and a second recess, wherein the first recess extends towards the second surface, and the second recess extends from a bottom of the first recess towards the second surface; forming an insulating layer over the first surface, wherein the insulating layer extends into the first recess and the second recess; forming a wire layer over the insulating layer, wherein the wire layer extends into the first recess and/or the second recess; forming a metal light shielding layer over the insulating layer, wherein the metal light shielding layer has at least one hole, and a shape of the at least one hole is a quadrangle; and performing a dicing process along at least one predetermined scribe line of the semiconductor substrate to form at least one chip package, wherein a sidewall and the bottom of the first recess and a second sidewall and a second bottom of the recess together form an exterior side surface of the semiconductor substrate after the dicing process.