Patent ID: 9680016
Date: 2017-06-13
CPC Classifications: H01L,Y10S

Claim:
1. A method to form a transistor, comprising: forming a gate dielectric adjacent a base semiconductor material, the gate dielectric comprising oxygen and at least one other element; forming a gate electrode adjacent the gate dielectric, the gate electrode comprising silicon; forming a first spacer, the first spacer being located to a first side of the gate electrode; forming a second spacer, the second spacer being located to a second side of the gate electrode, the second side being opposite the first side; removing a first portion of the base semiconductor material to the first side of the gate electrode; removing a second portion of the base semiconductor material to the second side of the gate electrode; forming a source region in a first volume formerly occupied by the first portion of the base semiconductor material, the source region comprising silicon and germanium; forming a drain region in a second volume formerly occupied by the second portion of the base semiconductor material, the drain region comprising silicon and germanium; forming a source contact on the source region, the source contact comprising silicon, germanium, and nickel; and forming a drain contact on the drain region, the drain contact comprising silicon, germanium, and nickel.