Patent ID: 9601519
Date: 2017-03-21
CPC Classifications: H01L

Claim:
1. A thin film transistor, comprising: a gate electrode on a substrate; a channel layer overlapping the gate electrode; a gate dielectric layer disposed between the gate electrode and the channel layer; a source electrode and a drain electrode electrically connected to the channel layer; a passivation layer overlying the source electrode, the drain electrode, and the gate dielectric layer; a via hole through the passivation layer; and a conductive pattern on the passivation layer to serve as a pixel electrode, wherein the conductive pattern is in contact with the drain electrode through the via hole, wherein the channel layer comprises an oxide semiconductor, wherein the channel layer includes two contact portions being in contact with the source electrode and the drain electrode, respectively, and a non-contact portion located between the two contact portions, and wherein one of the two contact portions has a first thickness in a first direction, the non-contact portion has a second thickness in the first direction, the first direction is perpendicular to a surface of the substrate, and the first thickness is greater than the second thickness.