Patent ID: 9575759
Date: 2017-02-21
CPC Classifications: G06F,G11C,Y02D

Claim:
1. A memory system processing data according to a received first request, the memory system comprising: a first memory comprising a first area and a second area, and configured to provide data from the first area to the second area; and a memory controller comprising a scoreboard configured to indicate that a first piece of sub-data of a first set of sub-data of the data has been provided from the first area to the second area, wherein, based on the scoreboard, the memory controller is configured to perform processing of the first request by using the first piece of sub-data before providing of other pieces of sub-data of the first set of sub-data from the first area to the second area is completed, and wherein the scoreboard is configured to: store an in-use bit indicating whether provision of the first set of sub-data of the data to the second area is being performed, store a tag indicating a start address of the second area, and store a plurality of full/empty bits respectively indicating whether each piece of sub-data of the first set of sub-data has been provided to a respective sub-area of the first set of sub-areas of the second area.