Patent ID: 9698044
Date: 2017-07-04
CPC Classifications: H01L

Claim:
1. A semiconductor structure comprising: a substrate; a first power device in a first well region and a second power device in a second well region of the substrate; a pickup region between the first well region and the second well region; at least one isolation feature between the first well region and the second well region, wherein the at least one isolation feature has a bottom and a plurality of sidewalls; at least one shallow trench isolation (STI) feature in direct contact with a sidewall of the plurality of sidewalls; a trapping feature adjoining the bottom and an entirety of the plurality of sidewalls, wherein the trapping feature separates an entirety of the isolation feature from the pickup region and the first well region or from the pickup region and the second well region; and a pickup electrode in direct contact with the pickup region.