Patent ID: 9548299
Date: 2017-01-17
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a semiconductor layer that is a first-conductivity-type semiconductor layer; a first semiconductor region that is a second-conductivity-type first semiconductor region, selectively provided in a surface layer of the first-conductivity-type semiconductor layer and connected to a first potential; a second semiconductor region that is a second-conductivity-type second semiconductor region, selectively provided in a surface layer of the semiconductor layer and connected to a second potential which is lower than that of the first potential; a third semiconductor region that is a first-conductivity-type third semiconductor region, selectively provided inside the first semiconductor region and connected to a third potential which is lower than that of the second potential; a fourth semiconductor region that is a first-conductivity-type fourth semiconductor region, selectively provided inside the second semiconductor region and connected to the third potential; a plurality of a first element provided in each of the first semiconductor region, the second semiconductor region, the third semiconductor region, and the fourth semiconductor region, and operating with the third potential as a reference potential; a first isolation region that is a first-conductivity-type first isolation region, that is provided between the first semiconductor region and the second semiconductor region and in contact with the first semiconductor region and the second semiconductor region, that is electrically connected to the semiconductor layer, which is connected to a fourth potential which is lower than the first potential and the second potential; and a second isolation region that is a second conductivity-type-second isolation region which encloses the periphery of the first semiconductor region and the second semiconductor region, which maintains a withstand voltage of the first semiconductor region and the second semiconductor region, and which has an impurity concentration which is lower than that of the first semiconductor region and the second semiconductor region.