Patent ID: 9659835
Date: 2017-05-23
CPC Classifications: G06F,H01L

Claim:
1. A method of designing an integrated circuit, comprising: placing, by a data processing system, standard cells across a first surface of a substrate of an integrated circuit (IC) design; locating, by the data processing system, at least two unoccupied regions across the first surface that do not include standard cells; determining, by the data processing system, aspect ratios for one or more micro fill vias that can be placed in the at least two unoccupied regions; placing, by the data processing system, the one or more micro fill vias in that at least two unoccupied regions; and placing by the data processing system, one or more partial thermal vias from a second surface of the integrated circuit, opposite the first surface, to thermally couple the one or more partial thermal vias to the one or more micro fill vias to create thermal paths from the first surface to the second surface.