Patent ID: 9748192
Date: 2017-08-29
CPC Classifications: H01L,H05K

Claim:
1. A printed circuit board for a semiconductor package, comprising: a first substrate having a first mounting area for mounting a package substrate and a second mounting area for mounting a semiconductor element; an uppermost layer of the first substrate; an outer circuit layer on the uppermost layer; a solder resist on the outer circuit layer and having an opening to expose an upper surface of the outer circuit layer of the first mounting area; and a post bump disposed on an uppermost layer of the first mounting area, and connected to an exposed upper surface of the outer circuit layer; wherein the post bump comprises: a first portion on the outer circuit layer and filled in the opening; and a second portion on the first portion and protruding from an upper surface of the solder resist, wherein an upper surface of the second portion of the post bump has a concave shape on an inner side of the post bump corresponding to an ellipsoidal shape of a lower portion of a solder bump to be placed on the upper surface of the second portion of the post bump, wherein the second portion of the post bump has a height of 50 to 400 μm, and the upper surface of the second portion has a maximum depth of 20 μm, wherein a radius of the upper surface of the second portion is 20 to 100 μm, wherein the upper surface of the second portion has a curvature of 1 to 0.01 μm wherein a width of the second portion of the post bump is narrower than a diameter of the solder bump.