Patent ID: 9741828
Date: 2017-08-22
CPC Classifications: G03F,H01L

Claim:
1. A manufacturing method of a thin film transistor, including steps of: forming an active layer above a second substrate; forming a source-drain metal layer above the active layer; and performing one patterning process on the active layer and the metal layer by using a mask, so as to form an active layer pattern, a source and a drain, a channel region being formed between the source and the drain, wherein the mask including a first substrate and phase shift patterns formed above the first substrate, an opening area being formed between the adjacent phase shift patterns, and a halftone pattern being formed directly on surfaces of the phase shift patterns away from the first substrate and being formed within the opening area between the adjacent phase shift patterns, wherein the halftone pattern is capable of shifting phase of light passing therethrough by 0 degrees, and the phase shift patterns are capable of shifting phase of light passing therethrough by 180 degrees; and a width of the channel region is smaller than a width of the opening area.