Patent ID: 9608070
Date: 2017-03-28
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising an array of field effect transistors in a semiconductor substrate having a first main surface, the array of field effect transistors including: a source contact trench and a drain contact trench, each running in a second direction parallel to the first surface, a conductive material in the source contact trench forming a source contact and a conductive material in the drain contact trench forming a drain contact, the source contact trench and the drain contact trench being formed in the first main surface; gate electrode structures and body regions, extending between the source contact trench and the drain contact trench, the gate electrode structures and the body regions being arranged in an alternating manner along the second direction, a source region electrically connected to the conductive material in the source contact trench and adjacent to the body regions and a drain region directly adjacent to the drain contact and electrically connected to the conductive material in the drain contact trench and directly adjacent to the body regions, and a body contact adjacent to the source contact trench and electrically connected to the conductive material in the source contact trench.