Patent ID: 9678831
Date: 2017-06-13
CPC Classifications: G06F

Claim:
1. An error correction method, applied to a memory device, wherein the memory device has a plurality of pages, and the error correction method comprises: sequentially retrieving data of a plurality of first sectors of a first page of the pages in response to a first read command; starting to perform a first error correction on the retrieved data of the first sectors by an error correction module during retrieval of the data of the first sectors; starting to sequentially retrieve data of a plurality of second sectors of a second page of the pages in response to a second read command at a time that a last sector of the first sectors is retrieved from the first page; continually performing the first error correction on the retrieved data of the first sectors during retrieval of the data of the second page; and starting to perform a second error correction on the retrieved data of the second sectors by the error correction module after the first error correction is finished during retrieval the data of the second page.