Patent ID: 9578755
Date: 2017-02-21
CPC Classifications: H01L,H05K,Y10T

Claim:
1. A printed wiring board, comprising: a multilayer core substrate comprising a first insulation layer, a second insulation layer and a double-sided board interposed between the first insulation layer and the second insulation layer; a first buildup layer formed on a first surface of the multilayer core substrate; and a second buildup layer formed on a second surface of the multilayer core substrate, wherein the multilayer core substrate has a first conductive layer formed on the first insulation layer, a second conductive layer formed between the first insulation layer and the double-sided board, a third conductive layer formed between the second insulation layer and the double-sided board, a fourth conductive layer formed on the second insulation layer, and a cylindrical through-hole structure comprising a cylindrical conductor formed on a wall of a penetrating hole penetrating through the first insulation layer, the double-sided board and the second insulation layer such that the cylindrical conductor is connecting the first conductive layer and the fourth conductive layer, a resin filler filling a space formed inside the cylindrical conductor and a plurality of covering circuits covering the resin filler at end portions of the cylindrical conductor, respectively, the first conductive layer includes a first through-hole land formed around one of the end portions of the cylindrical through-hole structure such that the first through-hole land is directly connected to the cylindrical conductor, the first through-hole land includes a first electroless plated film, a first electrolytic plated film formed on the first electroless plated film, a second electroless plated film formed on the first electrolytic plated film and a second electrolytic plated film formed on the second electroless plated film, and the cylindrical conductor is comprising the second electroless plated film and the second electrolytic plated film formed on the second electroless plated film such that the second electroless plated film is in contact with side walls of the first electroless plated film and first electrolytic plated film exposed by the penetrating hole of the multilayer core substrate.