Patent ID: 9536981
Date: 2017-01-03
CPC Classifications: H01L

Claim:
1. A method for fabricating a field effect transistor device, the method comprising: forming a fin on a substrate; forming a first dummy gate stack and a second dummy gate stack over the fin; forming spacers adjacent to the fin, the first dummy gate stack, and the second dummy gate stack; etching to remove portions of the fin and form a first cavity partially defined by the spacers; depositing an insulator material in the first cavity; patterning a mask over the first dummy gate stack and portions of the fin; etching to remove exposed portions of the insulator material; epitaxially growing a first semiconductor material on exposed portions of the fin; removing the mask; depositing a layer of insulator material on the fin, the first dummy gate stack and the second dummy gate stack; patterning a mask over the second dummy gate stack and portions of the fin; etching to remove exposed portions of the insulator material and the layer of insulator material to form a second cavity partially defined by the spacers; and epitaxially growing a second semiconductor material on exposed portions of the fin.