Patent ID: 9588696
Date: 2017-03-07
CPC Classifications: G06F

Claim:
1. A data processing method based on Montgomery modular multiplication, wherein a first random memory is configured to store a multiplier, a second random memory is configured to store a multiplicand and a third random memory is configured to store a modulus, the method comprises: step 1, comprising: initializing, by a CPU, a fifth random memory and initializing a first offset and a second offset; step 2, comprising: reading, by the CPU, one word from the second random memory according to the first offset and writing the word into a first arithmetic register; step 3, comprising: invoking, by the CPU, a multiply-add module to perform an operation of multiplying content of the first arithmetic register and content of the first random memory and adding a multiplying result to content of the fifth random memory, writing a computing result obtained into the fifth random memory ordered from a low bit to a high bit according to the second offset; step 4, comprising: reading, by the CPU, one word from the fifth random memory and writing the word into a second arithmetic register according to the second offset, multiplying content of the second arithmetic register with content of a constant register and writing a low bit of a multiplying result into a fourth register; step 5, comprising: reading, by the CPU, content of the fourth register, content of the third random memory and the content of the fifth random memory; invoking the multiply-add module to multiply the content of the fourth register and the content of the third random memory and to add a multiplication result to the content of the fifth random memory; adding 1 to the second offset and writing a computing result obtained from the multiply-add module according to the second offset ordered from a low bit to a high bit into the fifth random memory; step 6, comprising: determining, by the CPU, whether the first offset is equal to a preset step, executing step 8 if the first offset is equal to the preset step; executing step 7 if the first offset is not equal to the preset step; step 7, comprising: adding 1 to the first offset and going back to step 2; step 8, comprising: reading, by the CPU, the content of the fifth random memory and the content of the third random memory, determining whether a value of the content of the fifth random memory is more than or equal to a value of the content of the third random memory, execute step 9 if the value of the content of the fifth random memory is more than or equal to the value of the content of the third random memory, executing step 0 if the value of the content of the fifth random memory is not more than or equal to the value of the content of the third random memory; step 9, comprising: subtracting, by the CPU, the content of the third random memory from the content of the fifth random memory, and writing a subtraction result into the fifth random memory ordered from a low bit to a high bit according to the second offset; executing step 10; and step 10, comprising: outputting, by the CPU, the content of the fifth random memory.