Patent ID: 9740497
Date: 2017-08-22
CPC Classifications: G06F

Claim:
1. A method implemented by a processor to obtain computation results, the method comprising: storing, in a unified reuse table, a plurality of entries that include both single instructions and a set of instructions of a trace, each entry of the plurality of the entries corresponding with a computation instruction and including values of operands of the computation instruction and an output of the computation instruction, and, based on the computation instruction being one of the set of instructions of the trace, an indication of a subsequent instruction in the trace, wherein based on the computation instruction being one of the set of instructions of the trace, in at least one of the plurality of entries, the values of the operands include the output of a previous computation instruction that is a previous instruction of the set of instructions of the trace; performing a computation, using a functional unit, based on a corresponding instruction; and obtaining a result associated with an input based on either or both of the unified reuse table and the functional unit.