Patent ID: 9647062
Date: 2017-05-09
CPC Classifications: B82Y,H01L

Claim:
1. A semiconductor device, comprising: a substrate; a fin structure formed in the substrate subjected to an undercut etch that removes at least a portion of one or more fins following a partial removal of a protective layer and a removal of an optical planarization layer; a nanowire of the fin structure resulting from the undercut etch, the nanowire wrapped in a high-k layer, wherein a work function metal is wrapped around the high-k layer that wraps around the nanowire; an insulating layer formed on the substrate, another high-k layer formed on top of the insulating layer, and another work function metal formed on top of the another high-k layer; and a filling material formed under the work function metal wrapped around the high-k layer that wraps around the nanowire, such that the filling material separates the work function metal from the another work function metal, wherein the filling material is underneath the nanowire.