Patent ID: 9711497
Date: 2017-07-18
CPC Classifications: H01L

Claim:
1. A semiconductor unit comprising: a substrate of a first conductive type; a transistor configured to provide electrical conduction between a first terminal and a second terminal based on a trigger signal, the transistor including a source region, a gate region, and a drain region in the substrate that are arranged in series along a first direction within a transistor region of the substrate; a trigger device configured to generate the trigger signal based on a voltage applied to the first terminal, the trigger device positioned in series between the gate region and the drain region and including a resistive layer on a part of the substrate that is between the gate region and the drain region along the first direction; and a semiconductor region of a second conductive type opposite the first conductive type between the gate region and the part of the substrate of the first conductive type on which the resistive layer is positioned, wherein,