Patent ID: 9564368
Date: 2017-02-07
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a substrate with a first region, a second region, and a third region between the first and second regions; first active patterns protruding upward from the first region of the substrate, extending in a first direction crossing the first to third regions, and being spaced apart from each other in a second direction crossing the first direction; second active patterns protruding upward from the second region of the substrate, extending in the first direction, and being spaced apart from each other in the second direction, first distances between adjacent ones of the first active patterns are different from second distances between adjacent ones of the second active patterns when measured in the second direction; a first gate structure crossing the first active patterns; and a second gate structure crossing the second active patterns, wherein the third region is defined by a trench, which is provided on the substrate and between the first and second regions, sidewall surfaces of the first active patterns are aligned along the second direction at a boundary between the first and third regions, and sidewall surfaces of the second active patterns are aligned along the second direction at a boundary between the second and third regions.