Patent ID: 9646977
Date: 2017-05-09
CPC Classifications: H01L

Claim:
1. A method for fabricating a nonvolatile memory device, comprising: forming a gate conductive layer over a substrate which has a logic region and a memory region; selectively etching the gate conductive layer and forming a gate in the logic region and a floating gate in the memory region; forming spacers on sidewalls of the gate and the floating gate; forming an interlayer dielectric layer over an upper surface of the substrate; and forming a first contact plug and a second contact plug which pass through the interlayer dielectric layer on first and second sides of the floating gate, wherein the first contact plug is formed to contact the spacer, wherein the floating gate and the first contact plug have a major axis in a second direction and a minor axis in a first direction perpendicular to the second direction, and wherein the floating gate and the first contact plug are extended in the second direction.