Patent ID: 9601433
Date: 2017-03-21
CPC Classifications: G02F,H01L

Claim:
1. A manufacturing method of semiconductor device comprising the steps of: (a) forming a first field effect transistor having a first gate insulation film, a first gate electrode, a first impurity region and a second impurity region on a semiconductor substrate; (b) forming a first insulation film covering the first field effect transistor over the semiconductor substrate; (c) planarizing a surface of the first insulation film; (d) after the step (c), forming a second insulation film over the first insulation film; (e) forming a first contact hole which penetrates the first insulation film and the second insulation film and reaches the first impurity region, and forming a second contact hole which penetrates the first insulation film and the second insulation film and reaches the second impurity region; (f) embedding a conductive film into the first contact hole to form a first plug, and embedding a conductive film into the second contact hole to form a second plug; and (g) forming a first wire connected to the first plug and a second wire connected to the second plug, wherein the first insulation film includes a third insulation film and a fourth insulation film, the step (b) includes the steps of: (b1) forming the third insulation film covering the first field effect transistor by use of first plasma; and (b2) forming the fourth insulation film over the third insulation film by use of second plasma, and a density of the first plasma is higher than a density of the second plasma.