Patent ID: 9590531
Date: 2017-03-07
CPC Classifications: H02M,Y02B

Claim:
1. A circuit comprising: a DC bus capacitor; a full bridge inverter coupled in parallel to said DC bus capacitor between a positive node and at a negative node; an output filter coupled to said full bridge inverter; an auxiliary circuit coupled to said inverter; wherein said full bridge inverter comprises a first leg and a second leg, each leg comprising a pair of power semiconductor subcircuits coupled in series to each other, said first leg having its pair of power semiconductor subcircuits being coupled to each other at a first coupling point, said second leg having its pair of power semiconductor subcircuits being coupled to each other at a second coupling point; said auxiliary circuit comprises an auxiliary inductor coupled in series to an auxiliary capacitor, said auxiliary circuit being coupled between said first coupling point and said negative node; said output filter comprises an inductor, said output filter being coupled between an output and said first coupling point, said output also being coupled between said output filter and said second coupling point; said second leg of said inverter is switched at a frequency of current in a power grid connected to said output.