Patent ID: 9666283
Date: 2017-05-30
CPC Classifications: G11C,H01L

Claim:
1. A nonvolatile memory device, comprising: a plurality of cell strings formed in a direction perpendicular to a substrate layer, each of the plurality of cell strings is connected between the substrate layer and a corresponding bit line, each of the plurality of cell strings includes a plurality of cell transistors connected serially to each other; a first gate line connected to at least one cell transistor of a first layer; a second gate line connected to at least one cell transistor of a second layer; a first and second pass transistors connected to both end sides of the first gate line to transmit a first driving signal; and a third pass transistor connected to one end side of the second gate line to transmit a second driving signal, wherein the first layer is an uppermost layer of the plurality of cell strings, and the second layer is one of a plurality of layers formed below the first layer.