Patent ID: 9711719
Date: 2017-07-18
CPC Classifications: H01L

Claim:
1. A memory element programmable between different impedance states, comprising: a first electrode layer comprising a semimetal or semiconductor (semimetal/semiconductor); a second electrode; and a switch layer in physical contact with the first and second electrodes and comprising an insulating material, the switch layer configured to create a reversible change in the impedance of the memory element by altering the impedance of conductive regions traversing the insulating material by application of electric fields, the conductive regions comprising semimetal/semiconductor atoms from the first electrode layer; wherein, the impedance is relatively high in response to application of a voltage having a first polarity with respect to the first and second electrodes, and the impedance is relatively low in response to application of a voltage having a second polarity with respect to the first and second electrodes.