Patent ID: 9600426
Date: 2017-03-21
CPC Classifications: G06F

Claim:
1. A bus control device comprising: a plurality of bus masters respectively assigned with different priority levels in accessing a slave, and classified into a plurality of groups of bus masters according to the priority level; a plurality of group buses, each group bus being connected to a corresponding group of bus masters, and being assigned with a priority level determined according to the priority levels of the corresponding group of bus masters; an upper priority bus having a priority level higher than the priority level of any one of the plurality of group buses and configured to arbitrate a plurality of bus obtaining requests received from the plurality of bus masters via the plurality of group buses; a plurality of masks respectively provided for the plurality of bus masters and each configured to mask the bus obtaining request addressed to the corresponding group bus from the corresponding bus master before the bus obtaining request reaches the corresponding group bus; and a plurality of access controllers respectively provided for the plurality of group buses, and each configured to output at least one mask signal that controls operation of at least one corresponding mask connected to the corresponding group bus, wherein each access controller includes: a counter configured to output a counter value based on a predetermined number of bits; and at least one mask controller configured to control the at least one mask signal based on comparison between the counter value and a threshold counter value.