Patent ID: 9679835
Date: 2017-06-13
CPC Classifications: H01L

Claim:
1. A resin-encapsulated semiconductor device, comprising: a plurality of leads each comprising an inner lead and an outer lead; a die pad; a semiconductor chip disposed on the die pad; a metal plating layer formed on at least a top surface of each of the inner leads; metal wires connecting the semiconductor chip and the metal plating layer on the top surfaces of the inner leads; an encapsulation resin disposed on the semiconductor chip, the die pad, the metal wires and the inner leads having the metal plating layer, wherein the outer leads are exposed from the encapsulation resin, and an outer edge of the metal plating layer on the top surfaces of the inner leads coincides with an outer surface of the encapsulation resin; and a solder plating layer disposed on a top surface of each of the outer leads, an inner edge of the solder plating layer coinciding with the outer edge of the metal plating layer on the top surfaces of the inner leads.