Patent ID: 9627037
Date: 2017-04-18
CPC Classifications: G11C,H01L

Claim:
1. A semiconductor device comprising: a first power line configured to provide a first power supply voltage; a first logic transistor; a second logic transistor connected in series with the first logic transistor; a first power transistor connected between the first power line and the first logic transistor; and a second power transistor connected in parallel with the first power transistor, wherein the first power transistor comprises: a first source or drain connected to the first power line; a second source or drain connected to a first source or drain of the first logic transistor using a shared semiconductor junction; and a gate receiving a power gating control signal, and wherein a first source or drain of the second logic transistor is connected to the second power transistor, and a second source or drain of the first logic transistor is connected to a second source or drain of the second logic transistor.