Patent ID: 9685453
Date: 2017-06-20
CPC Classifications: H01L

Claim:
1. A method of manufacturing a semiconductor device comprising: a semiconductor substrate having a main surface, the main surface including a first region and a second region in a plan view, a nonvolatile memory cell formed in the first region; and a field effect transistor formed in the second region, the nonvolatile memory cell including: a well formed in the semiconductor substrate; a source region formed in the well; a drain region formed in the well, separated from the source region; a channel region sandwiched between the source region and the drain region; a first insulating film formed over the channel region; a charge storage film formed over the first insulating film; a second insulating film formed over the change storage film; and a first gate electrode formed over the second insulating film, the source region and the drain region each including: a first semiconductor region having a first impurity concentration, the method comprising the steps of: (a) forming an insulating film over the semiconductor substrate; (b) forming a first conductor film over the insulating film; (c) removing the first conductor film from the first region by using a first mask that exposes the first region and covers the second region; (d) after the step (c), forming the first insulating film over the semiconductor substrate and the first conductor film; (e) forming the charge storage film over the first insulating film; (f) forming the second insulating film over the charge storage film; (g) forming a second conductor film over the second insulating film; (h) patterning the second conductor film by using a second mask that covers a first gate electrode formation portion of the first region and exposes the second region and thereby forming the first gate electrode in the first region; (i) after the step (h), forming the first semiconductor region in the semiconductor substrate by ion implantation at both sides of the first gate electrode; and (j) after the step (i), patterning the first conductor film by using a third mask that covers a second gate electrode formation region of the second region and covers the first region and thereby forming a second gate electrode of the field effect transistor in the second region, the method further comprising, between the step (h) and the step (i), the steps of: (k) removing the second mask; (l) after the step (k), removing the second insulating film exposed from the first gate electrode; (m) after the step (l), oxidizing an exposed surface of the first gate electrode; and (n) after the step (m), removing the charge storage film exposed from the first gate electrode.