Patent ID: 9572249
Date: 2017-02-14
CPC Classifications: H01L,H05K,Y10T

Claim:
1. A circuit comprising: a substrate; a plurality of separate groups of pre-formed, semiconductor electrical devices that have been mixed in a solution, deposited over the substrate, and cured, each group containing a plurality of substantially identical electrical devices connected in parallel within each group, all electrical devices connected in parallel forming a single group, all electrical devices connected in parallel in each group forming a random two-dimensional arrangement of the electrical devices on the substrate, wherein a total number of electrical devices connected in parallel within each group is random, wherein the electrical devices connected in parallel within each group are not aligned with each other in any predetermined way; an interconnection conductor pattern that interconnects at least some of the groups together to achieve an electrical logic function; at least one input terminal connected to the interconnection conductor pattern for receiving input signals for transformation by the electrical logic function to generate output signals; and at least one output terminal connected to the interconnection conductor pattern for receiving the output signals.