Patent ID: 9548394
Date: 2017-01-17
CPC Classifications: H01L

Claim:
1. A method for manufacturing a two-dimensional thin film transistor, the method comprising: layering a semiconducting channel material on a substrate; providing a first electrode material on top of the semiconducting channel material; patterning a source metal electrode and a drain metal electrode at opposite ends of the semiconducting channel material from the first electrode material; opening a window between the source metal electrode and the drain metal electrode; removing the first electrode material from the window located above the semiconducting channel material; providing a gate dielectric above the semiconducting channel material; and providing a top gate above the gate dielectric, the top gate formed from a second electrode material, wherein each of the semiconducting channel material, the source metal electrode, the drain metal electrode, and the gate dielectric is comprised of one to seven atomic layers in crystalline form.