Patent ID: 9746501
Date: 2017-08-29
CPC Classifications: G01R,H01L

Claim:
1. A voltage detection circuit for use with a power gated circuit, the voltage detection circuit having an input and an output, and comprising: a first PMOS transistor connected between the input and a positive supply voltage (VDD); a first NMOS transistor connected between a reset input pin (RN) and a negative supply voltage (VSS); second and third NMOS transistors connected together as a stack between the input and VDD; a stack of high voltage threshold incrementing NMOS transistors connected between the input and VDD and configured to set the output to a value of 1 in response to detection of an input voltage at the input greater than an operational voltage of the switched power supply; and a pull-down circuit configured to actively pull the voltage detection circuit output low before the circuit input drops below a low input threshold of the voltage detection circuit.