Patent ID: 9716157
Date: 2017-07-25
CPC Classifications: H01L

Claim:
1. A silicon carbide semiconductor device comprising a silicon carbide substrate including a first main surface and a second main surface facing each other, said silicon carbide substrate including a first impurity region having a first conductivity type, a well region being in contact with said first impurity region and having a second conductivity type different from said first conductivity type, and a second impurity region separated from said first impurity region by said well region and having said first conductivity type, said first main surface including a first region in contact with a channel region sandwiched between said first impurity region and said second impurity region, and a second region different from said first region, said silicon carbide semiconductor device further comprising: a first silicon dioxide region arranged on said first region; a second silicon dioxide region arranged on said second region; a gate electrode in contact with said first silicon dioxide region and said second silicon dioxide region; and a gate runner electrically connected to said gate electrode and arranged in a position facing said second silicon dioxide region, the thickness of said second silicon dioxide region being greater than the thickness of said first silicon dioxide region, a carbon concentration in said second silicon dioxide region being lower than a carbon concentration in said first silicon dioxide region.