Patent ID: 9673296
Date: 2017-06-06
CPC Classifications: H01L

Claim:
1. A method of forming a semiconductor structure comprising: obtaining a semiconductor wafer; forming a gate structure on the semiconductor wafer; forming first and second trenches for a source and a drain, respectively, adjacent to the gate structure, each trench of the first and second trenches having vertical sides extending 90 degrees relative to a bottom of the trench; and epitaxially growing a doped epitaxial silicon, that is not an alloy or compound of silicon, to partially fill the trenches to form a recessed source and a recessed drain, each having an inverted facet, wherein the inverted facets comprise vertical side walls at the vertical sides at an outer periphery of the source and drain and angled walls extending from the vertical side walls towards a center and a bottom of the source and drain.