Patent ID: 9547535
Date: 2017-01-17
CPC Classifications: G06F,G09G

Claim:
1. A computer-implemented method for creating a first process that executes on a first graphics processing unit (GPU) within a plurality of GPUs included in a computer system, the method comprising: maintaining a list of a set of processes executing on the plurality of GPUs, wherein the set of processes includes the first process; maintaining a list of address range entries, wherein each address range entry in the list of address range entries comprises an address range corresponding to a different shared memory buffer in a set of shared memory buffers; requesting that an address space be allocated in the first GPU for the first process; requesting that the first GPU map the address range associated with each of the address range entries in the list of address range entries into the allocated address space, wherein a first address range is associated with a pinned memory buffer that is mapped into a second address space allocated in a second GPU within the plurality of GPUs; and adding the first process to the list of the set of processes, wherein the first process has access to any shared memory buffer corresponding to at least one of the address ranges mapped into the allocated address space.