Patent ID: 9667265
Date: 2017-05-30
CPC Classifications: H03F,H03M

Claim:
1. A circuit for an analog-to-digital converter comprising: a first circuit configured to receive an input signal having an amplitude and form a first signal that is representative of the input signal, the first circuit configured to form the first signal during a first time interval; an amplifier configured to amplify signals having an amplitude that is within a first range of values; an adjustment circuit configured to adjust an amplitude of the first signal to be within the first range of values thereby forming an adjusted signal that is representative of the input signal; the amplifier configured to receive the adjusted signal during a second time interval and form an output signal on an output of the amplifier during the second time interval; and a pre-drive circuit configured to, during the first time interval, form an estimated value of the output signal and form a pre-drive signal having a value that is substantially the estimated value of the output signal and charge a capacitor with the pre-drive signal, the pre-drive circuit configured to couple the capacitor to the output of the amplifier during a portion of the second time interval but not during the first time interval.