Patent ID: 9741425
Date: 2017-08-22
CPC Classifications: G11C

Claim:
1. A memory device, comprising: a first memory bank comprising first and second memory blocks; a second memory bank comprising third and fourth memory blocks, wherein the first to fourth memory blocks include a plurality of word lines; and a bank selection unit suitable for selecting a memory bank corresponding to a bank address among the first and the second memory banks when an active command is applied, wherein the selected memory bank activates a word line corresponding to a row address among the plurality of word lines of an unselected memory block when the selected memory bank is set in a first mode, performs a normal refresh to refresh a word line corresponding to a counting address among the plurality of word lines of the unselected memory block when the selected memory bank is set in a second mode, and performs a target refresh to refresh a word line corresponding to a target address among the plurality of word lines of the unselected memory block when the selected memory bank is set in a third mode, while activates a word line of a memory block that is selected by a block address among memory blocks of the selected memory bank.