Patent ID: 9536982
Date: 2017-01-03
CPC Classifications: H01L

Claim:
1. A method of forming a semiconductor device comprising: recessing a sacrificial gate structure relative to sacrificial spacers abutting the sacrificial gate structure to expose an interior surface of the sacrificial spacers; laterally etching the interior surface of the sacrificial spacers; replacing a remainder of the sacrificial gate structure with a functional gate structure; removing at least a majority of the sacrificial spacer to provide a spacer opening having a lesser width at an upper portion than at a lower portion, wherein the lesser width corresponds to said interior surface that was laterally etched; forming a conformal dielectric material in the spacer opening, wherein the conformal dielectric material merges in the upper portion of the spacer opening to enclose an air gap in the lower portion of the spacer opening; and forming an etch resistance cap material atop the recessed portion of the spacer dielectric material, wherein the etch resistance cap material, the conformal dielectric material and the air gap provide a composite gate sidewall spacer.