Patent ID: 9653156
Date: 2017-05-16
CPC Classifications: G11C

Claim:
1. A memory system comprising a nonvolatile semiconductor memory and a memory controller controlling the nonvolatile semiconductor memory, the memory controller comprising: the nonvolatile semiconductor memory comprising: wherein each of the memory cells is capable of storing n bits (n is a natural number of two or more), and the memory controller is configured to: set the first signal to a first value, and an i-th value (i is a natural number of two or more) in series, and set the second signal to a first value, and an i-th value in series, where the k-th value of the first signal corresponds to the k-th value of the second signal, the k-th value is one of the first to i-th values, and the temperature coefficient specified by the k-th value of the second signal is different from the temperature coefficient specified by the (k+1)-th value of the second signal when the read voltage specified by the k-th value of the first signal is provided in a first range different from the second range in which the read voltage specified by the (k+1)-th value of the first signal is provided, and determine a 2