Patent ID: 9640732
Date: 2017-05-02
CPC Classifications: H01L

Claim:
1. A diode chiplet comprising: an n-type group III-nitride portion, a p-type group III-nitride layer, and a group III-nitride light emitting region sandwiched between the n- and p-type portion; a first metal layer having a bottom side coupled to the p-type III-N layer and a top side including a first terminal, the bottom side of the first metal layer has a lateral size that is substantially equal to the p-type III-N layer, the first terminal being centrally located above the light emitting region; an electrically-insulating layer directly coupled to the top side of the first metal layer, sides of the first metal layer and sides of the p-type III-N layer, sides of the light emitting region, and sides of a first part of the n-type III-N layer, wherein the first terminal and sides of a second part of the n-type III-N layer are exposed from the electrically-insulating layer, wherein the sides of the first part of the n-type III-N layer are respectively (i) parallel to the sides of the second part of the n-type III-N layer and (ii) directly connected in line with the sides of the second part of the n-type III-N layer; and a second metal layer including a second terminal directly coupled to the electrically-insulating layer and to the sides of the second part of the n-type III-N portion, wherein the second metal layer is directly coupled to a top side of a portion of the electrically-insulating layer that is coupled to the top side of the first metal layer, wherein a perimeter of the diode chiplet is smaller than 600 micrometers and a thickness of the diode chiplet excluding the second terminal is between 2 and 20 micrometers.