Patent ID: 9653543
Date: 2017-05-16
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: at least one trench formed in a semiconductor substrate, the at least one trench comprising sidewalls, a bottom surface, a lower portion, and an upper portion, the semiconductor substrate comprising a major surface; a first liner disposed over the sidewalls and the bottom surface of the at least one trench, wherein the first liner extends above the major surface of the semiconductor substrate, and wherein the first liner overlaps with the major surface of the semiconductor substrate; a second liner disposed over the first liner in the lower portion of the at least one trench, wherein a top most surface of the second liner is below the major surface of the semiconductor substrate; a first insulating material disposed over the second liner in the lower portion of the at least one trench; and a second insulating material disposed over the first insulating material in the upper portion of the at least one trench, wherein a top surface of the first insulating material is below the major surface of the semiconductor substrate, wherein the first liner, the second liner, the first insulating material, and the second insulating material comprise an isolation region of the semiconductor device, wherein the at least one trench comprises a retrograde trench and another trench different in shape from the retrograde trench, wherein the lower portion of the retrograde trench comprises a retrograde section having a cross-sectional width larger than a cross-sectional width of the bottom surface of the retrograde trench.