Patent ID: 9647067
Date: 2017-05-09
CPC Classifications: H01L

Claim:
1. A fabrication method of a fin-shaped field-effect transistor (FinFET), comprising the steps of: providing a substrate; depositing a shallow trench isolation (STI) layer on the substrate; depositing a plurality of alternative layers of oxygen-containing dielectric layers and insulating layers on the STI layer; forming a trench through the STI layer and the pluralities of alternative layers of the oxygen-containing dielectric layers and the insulating layers by a first etching process; selectively etching the insulating layers of the pluralities of alternative layer in an inner side wall of the trench by a second etching process to make the inner side wall of the trench have a vertical stacked bowls cross-sectional shape; selective epitaxially growing a buffer layer on the substrate in the trench; selective epitaxially growing a III-V group material on the buffer layer in the trench; selectively removing the pluralities of alternative layers of the oxygen-containing dielectric layers and the insulating layers; depositing a high dielectric constant dielectric layer on an upper layer of the STI layer and a surrounding of the III-V group material; and depositing a conducting material surrounding the high dielectric constant dielectric layer for forming a gate electrode.