Patent ID: 9620453
Date: 2017-04-11
CPC Classifications: C23C,C25D,H01L

Claim:
1. A method, comprising: providing a semiconductor structure comprising a recess, said recess comprising at least one of a contact via and a trench; depositing a layer of a first metal over said semiconductor structure, said layer of a first metal having a passivation layer comprising an oxide of said first metal disposed thereon; performing an electroless deposition process, said electroless deposition process removing said passivation layer, removing a first portion of said layer of said first metal from said semiconductor structure, and depositing a first layer of a second metal over said semiconductor structure; and performing an electroplating process, said electroplating process depositing a second layer of said second metal over said first layer of said second metal; wherein a second portion of said layer of said first metal remains in said semiconductor structure.