Patent ID: 9648758
Date: 2017-05-09
CPC Classifications: F03B,F03D,F05B,H05K,Y02E

Claim:
1. Method for producing a circuit board, comprising the following steps: providing at least a first element including at least two interconnected layers; applying a material to a portion on one of the at least two interconnected layers where the material prevents adhesion to the portion of the first element and defines a region of the first element to be exposed; severing a region in at least one further layer that is to cover the region of the first element to be exposed; applying the at least one further layer to the first element after the region in the at least one further layer has been severed; wherein the further layer is formed from a material that essentially covers the region to be exposed and is non-conductive; connecting the first element and the at least one further layer; severing a portion of the at least one further layer along at least one edge of the region of the at least one further layer that has been severed and is over the region of the first element to be exposed; and removing the region of the at least one further layer that is over the region of the first element to be exposed of the further layer to expose the region of the first element of the first element to be exposed.