Patent ID: 9601369
Date: 2017-03-21
CPC Classifications: H01L

Claim:
1. A method of making a semiconductor device, comprising: providing a first semiconductor die; providing a second semiconductor die; forming a first via through a first surface of the first semiconductor die; forming a second via through the first surface of the first semiconductor die; forming a trench in a peripheral region between the first semiconductor die and second semiconductor die and extending parallel with adjacent edges of the first semiconductor die from the first via to the second via; depositing a first conductive layer conformally in the trench and extending continuously from the first via to the second via; back-grinding a second surface of the semiconductor die opposite the first surface to remove a portion of the first conductive layer in the trench; and removing the peripheral region between the first semiconductor die and second semiconductor die to electrically isolate the first via from the second via.