Patent ID: 9552046
Date: 2017-01-24
CPC Classifications: G06F,Y02D

Claim:
1. A performance management method for an electronic device with multiple central processing units (CPUs), comprising: performing thread loading rearrangement and CPU frequency evaluation to obtain a plurality of evaluated performance values for different amounts of CPUs, wherein the plurality of evaluated performance values are relevant to power consumption values of the multiple CPUs; and determining whether to adjust an amount of used CPUs based on the plurality of evaluated performance values corresponding to the different amounts of CPUs, wherein the step of performing thread loading rearrangement and CPU frequency evaluation to obtain the plurality of evaluated performance values for the different amounts of CPUs further comprises: wherein the first amount of used CPUs indicates the amount of CPUs which are being currently used, the second amount of used CPUs indicates the amount of CPUs which are being currently used plus an amount of CPUs assumed to be opened, and the third amount of used CPUs indicates the amount of CPUs which are being currently used minus the amount of CPUs assumed to be shut down, and wherein the step of performing thread loading rearrangement and CPU frequency evaluation to obtain the first, second and third evaluated performance values for the first, second and third amounts of used CPUs further comprises: