Patent ID: 9665147
Date: 2017-05-30
CPC Classifications: G06F,H02M,Y02B

Claim:
1. A computing device, comprising: a plurality of voltage regulators including a first voltage regulator and a second voltage regulator, the first voltage regulator configured to output voltage at a first voltage level, the second voltage regulator configured to output voltage at a second voltage level, the second voltage level being different from the first voltage level, wherein the voltage at the first voltage level and the voltage at the second voltage level are supplied to different sub-systems of the computing device; a multi-phase oscillator, connected to the first voltage regulator and the second voltage regulator, configured to synchronize the first voltage regulator and the second voltage regulator; and a common input capacitance bank including a plurality of capacitors, wherein the first voltage regulator and the second voltage regulator are connected to the common input capacitance bank, wherein a number of the plurality of capacitors is less than a number of capacitors required by the computing device if the first voltage regulator and the second voltage regulator are operating asynchronously.