Patent ID: 9722546
Date: 2017-08-01
CPC Classifications: H03F

Claim:
1. A bias circuit for applying a bias current to a low quiescent current amplifier, the bias circuit comprising: a first transistor connected to a supply bias voltage source (Vbias) and an auxiliary bias voltage source (Vaux), operation of the first transistor being controlled by an auxiliary bias voltage output from the auxiliary bias voltage source (Vaux), wherein the first transistor acts as a current source; a second transistor connected to the supply bias voltage source (Vbias) and an output of the first transistor, operation of the second transistor being controlled by the output of the first transistor to selectively buffer an amount of supply bias current from the supply bias voltage source (Vbias) provided to the low quiescent current amplifier via a bias resistor, enabling stable biasing of the low quiescent current amplifier in at least one of a Class-B mode or a Class-C mode; and a transistor pair circuit comprising a third transistor and a fourth transistor connected in series between the first transistor and ground, one of the third transistor and the fourth transistor also being connected in parallel with a dividing resistor, wherein the transistor pair circuit acts as a voltage source.