Patent ID: 9734904
Date: 2017-08-15
CPC Classifications: G05F,G11C

Claim:
1. A digital LDO (Low Drop-Out) regulator, comprising: a reference voltage comparison circuit configured to compare an output voltage to a reference voltage having a first level, and to output a reference load switching signal when the output voltage rises above the reference voltage; a push-pull logic circuit configured to output a control current in a push-pull manner in response to the reference load switching signal; a transient load voltage comparison circuit configured to compare the output voltage to a transient reference voltage having a second level, and to output a transient load switching signal when the output voltage rises above the transient reference voltage; a transient current switching circuit configured to perform a switching operation in response to the transient load switching signal, the switching operation controlling the push-pull logic circuit to pass a transient current; a current mirroring circuit configured to provide a mirroring current to the push-pull logic circuit after a transient state; a load current supply circuit configured to switch in response to the control current outputted from the push-pull logic circuit, and to supply a load current; and a capacitor coupled in parallel to a control terminal of the load current supply circuit.