Patent ID: 9705457
Date: 2017-07-11
CPC Classifications: G01R,H03F

Claim:
1. A signal level detector comprising: a level detector configured to detect peak voltage of an input voltage signal, wherein the level detector comprises a first differential amplifier and a low pass filter, wherein the first differential amplifier comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor and a first resistor, wherein the first transistor comprises a source connected to a ground voltage, a drain connected to a source of the third transistor and a drain of the second transistor, and a gate connected to a bias voltage, wherein the second transistor comprises a source connected to the ground voltage, a drain connected to a source of the fourth transistor and the drain of the first transistor, and a gate connected to the bias voltage, wherein the third transistor comprises a source connected to the first transistor, a drain connected to a drain and a gate of the fifth transistor, and a gate connected to a positive input node to receive a signal, wherein the fourth transistor comprises a source connected to the second transistor, a drain connected to the first resistor, and a gate connected to a negative input node to receive a first reference voltage, wherein the fifth transistor comprises a source connected to a power voltage, a gate connected to the sixth transistor, and a drain connected to the gate and the third transistor, wherein the sixth transistor comprises a source connected to the power voltage, a drain connected to the first resistor, and a gate connected to the fifth transistor, wherein the first resistor is configured to connect the fourth transistor and the sixth transistor; a reference voltage generator configured to generate second reference voltage by receiving the first reference voltage, wherein the reference voltage generator comprises a second differential amplifier; a comparator configured to compare the peak voltage and the second reference voltage and output a discrimination value according to a comparison result; and a latch configured to store the differential output from the comparator, wherein the first differential amplifier of the level detector and the second differential amplifier of the reference voltage generator are identical circuits to have same operation characteristics regardless of changing temperature or a processing parameter.