Patent ID: 9601523
Date: 2017-03-21
CPC Classifications: G02F,H01L

Claim:
1. A dual gate TFT substrate structure utilizing COA skill, comprising: a substrate, a bottom gate positioned on the substrate, a bottom gate isolation layer covering the bottom gate and the substrate, an active layer positioned on the bottom gate isolation layer above the bottom gate, an etching stopper layer positioned on the active layer and the bottom gate isolation layer, a source/a drain positioned on the etching stopper layer and respectively contacted with two ends of the active layer, a color filter positioned on the source/the drain and the etching stopper layer and a top gate positioned on the color filter and contacted with the bottom gate; wherein the color filter is employed to be a passivation layer and a top gate isolation layer at the same time; and wherein the bottom gate and the top gate are located on opposites sides of the active layer and corresponding to the active layer, the bottom gate and the top gate being electrically connected to have a common electrical potential to be both acting on the active layer.