Patent ID: 9742429
Date: 2017-08-22
CPC Classifications: H03M

Claim:
1. A subranging superconducting analog to digital converter, comprising: a splitter, configured to receive a first analog signal and provide a first portion and a second portion having an apportionment ratio; a coarse analog to digital converter portion receiving the first portion, and comprising a first delta modulator configured to generate a first single bit stream of oversampled digital data, which is fed to a first digital integrator and a first digital filter to produce a coarse analog to digital converter output; an inter-range mixed signal processor receiving the second portion, configured to receive the first single bit stream of oversampled digital data from the first delta modulator, comprising a circuit configured to generate a second analog signal corresponding to the single bit stream of oversampled digital data from the delta modulator, an analog subtractor, and at least one delay, configured to time-align the generated second analog signal with the second portion to generate a difference signal; a fine analog to digital converter portion receiving the difference signal, and comprising a second modulator configured to generate a fine analog to digital converter output, and a digital combiner, configured to combine the coarse analog to digital converter output and the fine analog to digital converter output, into a combined digital output.