Patent ID: 9741854
Date: 2017-08-22
CPC Classifications: H01L

Claim:
1. A method for manufacturing a semiconductor device, the method comprising: forming a structure including a sacrificial pattern layer on a substrate, the sacrificial pattern layer having a line shape extending in a first direction and including first and second parts; forming a mask layer exposing the first part of the sacrificial pattern layer; removing the first part of the sacrificial pattern layer exposed by the mask layer to form an opening in the structure; forming a first layer of a pattern isolation portion covering at least a portion of an inner wall of the opening including a side surface of the second part exposed through the opening; forming a second layer of the pattern isolation portion filling the opening; removing the second part of the sacrificial pattern layer; removing at least a portion of the first layer exposed by removing the second part of the sacrificial pattern layer; and forming a conductive pattern layer in a region formed by removing the second part of the sacrificial pattern layer and the portion of the first layer.