Patent ID: 9575766
Date: 2017-02-21
CPC Classifications: G06F

Claim:
1. A processor comprising: a functional unit to output a first signal in response to an occurrence of a type of event within the processor; a first event counter to count the occurrence of the type of event within the processor, the first event counter to count the occurrence of the type of event based at least in part on the first signal output from the functional unit, the first event counter to output a second signal in response to reaching a first predefined count; and a second event counter coupled with the functional unit and the first event counter, the second event counter to be activated in response to the second signal from the first event counter, the second event counter to cause an interrupt of the processor in response to reaching a second predefined count, wherein the first event counter comprises a first number of bits, the second event counter comprises a second number of bits, and the first number of bits is greater than the second number of bits.