Patent ID: 9711532
Date: 2017-07-18
CPC Classifications: H01L

Claim:
1. A three-dimensional stacked non-volatile memory device, comprising: a first memory hole defined as extending vertically at least from a top of and through a stack of alternating word line layers and dielectric layers, the first memory hole having a vertically extending interior coated with a layer of programmable material having a first thickness and with a more interior layer of channel forming material having a second thickness, the channel forming material being one of an undoped semiconductive material and a lightly doped semiconductive material of a first conductivity type; a source region disposed at an underneath portion of the channel forming material and having a second conductivity type opposite to said first conductivity type, the underneath portion of the channel forming material being disposed at and extending horizontally parallel with a bottom of the first memory hole; and a horizontally extending layer of the programmable material continuing from the programmable material coating the vertically extending interior of the first memory hole and being disposed underneath the alternating word line and dielectric layers.