Patent ID: 9685607
Date: 2017-06-20
CPC Classifications: H01L

Claim:
1. A non-volatile semiconductor memory device comprising: a plurality of first wiring lines that extend in a first direction; a plurality of second wiring lines that extend in a second direction intersecting the first direction to cross the first wiring lines; and memory cells, each of which is provided where a first wiring line crosses a second wiring line, wherein each memory cell includes a variable resistance layer where the first wiring line crosses the second wiring line, a seam where portions of a material forming at least a portion of the variable resistance layer are in contact with each other, the seam extending in a direction along which the first wiring line and the second wiring line are spaced from one another, and a metal supply layer contacting the variable resistance layer and the seam therein, and wherein the variable resistance layer further comprises a metal diffusion film and a variable resistance film, the seam extending through the metal diffusion film.