Patent ID: 9601635
Date: 2017-03-21
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a first conductive layer and a capacitor wiring over a substrate, wherein each of the first conductive layer and the capacitor wiring contains copper; a first insulating layer over the first conductive layer and the capacitor wiring, wherein the first insulating layer contains nitrogen; a second insulating layer over the first insulating layer, wherein the second insulating layer contains oxygen; an oxide semiconductor layer over the second insulating layer; a third insulating layer over the oxide semiconductor layer; an opening in the third insulating layer; a second conductive layer over the third insulating layer, wherein the second conductive layer is electrically connected to the oxide semiconductor layer through the opening, and wherein the second conductive layer contains at least one selected from the group consisting of W, Ta, Mo, Ti and Cr; a third conductive layer over the second conductive layer, wherein the third conductive layer is electrically connected to the oxide semiconductor layer, wherein the third conductive layer contains copper; and a fourth conductive layer electrically connected to the oxide semiconductor layer, wherein the fourth conductive layer contains a transparent conductive material, and wherein the fourth conductive layer overlaps the capacitor wiring.