Patent ID: 9548701
Date: 2017-01-17
CPC Classifications: H03F

Claim:
1. A bias circuit for a transistor amplifier, the bias circuit comprising a low-pass filter block, a reference transistor, a sum node, a reference current source, and a current difference block, wherein the low-pass filter block is configured to sense a DC bias voltage at a control terminal of the transistor amplifier and provide the DC bias voltage to a control terminal of the reference transistor; the reference transistor is configured to output a bias current in response to the DC bias voltage and provide the bias current to the sum node; the sum node is configured to receive a reference current from the reference current source and combine the reference current with the bias current from the reference transistor to provide a difference current; and the current difference block includes a gate, a first current electrode, and a second current electrode, and is configured to receive the difference current from the sum node at the first current electrode and provide the difference current at the second current electrode to the control terminal of the transistor amplifier.