Patent ID: 9685936
Date: 2017-06-20
CPC Classifications: G06F,H03K

Claim:
1. A self-feedback control circuit, electrically connected to a controller area network bus for controlling a high-level output and a low-level output, comprising: a controller area network driving circuit, connected to said controller area network bus and comprising a first transistor, a second transistor, a first passive element and a second passive element, wherein said first transistor and said first passive element are connected in series between an input voltage and said high-level output while said second transistor and said second passive element are connected in series between a ground and said low-level output; and a replica circuit, connected in parallel with said controller area network driving circuit and comprising an upper feedback path and a lower feedback path, wherein said upper feedback path and said lower feedback path are connected jointly to a common mode, said replica circuit provides a feedback signal from said common mode, and said feedback signal is respectively transmitted to said first transistor through said upper feedback path and to said second transistor through said lower feedback path so as to control DC level stability of said high-level output and said low-level output, said upper feedback path further comprises a third transistor, a third passive element and a third resistor, in which said third transistor, said third passive element and said third resistor are connected in series between said input voltage and said common mode, and said third transistor is electrically connected to said first transistor of said controller area network driving circuit and controls said first transistor of said controller area network driving circuit, and each of said first transistor and said third transistor is a P metal oxide semiconductor (PMOS), and gates of said first transistor and said third transistor are electrically connected with said common mode, and said lower feedback path further comprises a fourth transistor, a fourth passive element and a fourth resistor, in which said fourth transistor, said fourth passive element and said fourth resistor are connected in series between said ground and said common mode, and said fourth transistor is electrically connected to said second transistor of said controller area network driving circuit and controls said second transistor of said controller area network driving circuit, and each of said second transistor and said fourth transistor is an N metal oxide semiconductor (NMOS), and gates of said second transistor and said fourth transistor are electrically connected with said common mode.