Patent ID: 9690942
Date: 2017-06-27
CPC Classifications: G06F

Claim:
1. A gateway controller, comprising: an operation code (opcode) analysis logic circuit; an address number analysis logic circuit; an opcode and address number dispatch logic circuit; and a switch logic circuit, wherein the opcode analysis logic circuit retrieves an opcode from a signal via a serial peripheral interface (SPI) bus; the address number analysis logic circuit retrieves an address number from the signal; the opcode and address number dispatch logic circuit compares the retrieved opcode and the retrieved address number with a restrict opcode and a restrict address number; when either the retrieved opcode matches the restrict opcode, or the retrieved address number matches the restrict address number, the switch logic circuit blocks the signal, and when both the retrieved opcode does not match the restrict opcode and the retrieved address number does not match the restrict address number, the switch logic circuit lets the signal pass through.