Patent ID: 9716498
Date: 2017-07-25
CPC Classifications: G01R,H03K

Claim:
1. An impedance-to-digital converter for sensing an impedance value of a to-be-sensed component, said impedance-to-digital converter comprising: a sensing unit to be coupled to the to-be-sensed component, disposed to receive a sensing signal, and configured to periodically convert the sensing signal into a first electric charge by providing, within every operation period of said impedance-to-digital converter, the sensing signal to the to-be-sensed component, an amount of the first electric charge being proportional to a magnitude of the sensing signal; an offset impedance unit disposed to receive an offset signal, and configured to convert the offset signal into a second electric charge every operation period of said impedance-to-digital converter, an amount of the second electric charge being proportional to a magnitude of the offset signal; a reference impedance unit disposed to receive a reference signal and a digital signal, and including a reference impedance circuit configured to convert the reference signal into a third electric charge every operation period of said impedance-to-digital converter, an amount of the third electric charge being proportional to a magnitude of the reference signal, a polarity of the third electric charge being associated with a logic level of the digital signal; and a conversion block receiving the first electric charge, the second electric charge and the third electric charge that are respectively outputted by said sensing unit, said offset impedance unit and said reference impedance unit to cooperatively form a resultant electric charge, and configured to convert the resultant electric charge into the digital signal; wherein the impedance value sensed by said impedance-to-digital converter has a linear relationship with a number of the operation periods that correspond to a predetermined logic level of the digital signal among a predetermined number of the operation periods; wherein a central value of a sensible impedance range of said impedance-to-digital converter is proportional to a ratio of a magnitude of the offset signal to a magnitude of the sensing signal; wherein the sensing signal, the offset signal and the reference signal are independent from each other.