Patent ID: 9715464
Date: 2017-07-25
CPC Classifications: G06F

Claim:
1. A method performed by a direct memory access (DMA) engine disposed in a system having components that include a plurality of central processing units (CPUs), one or more memory devices, one or more remote DMA engines, and an interconnect that provides interconnections among the components, the method comprising: creating a dependency pairing between descriptors in the system, the descriptors describing DMA-facilitated data movement among components over the interconnect, the dependencies being between one or more master descriptors and one or more slave descriptors; when a master descriptor is next in a queue for processing, polling a memory that stores handshake bits between master descriptors and slave descriptors, the handshake bits including a master bit configured for toggling by a master descriptor and a slave bit configured for toggling by a slave descriptor; if the polling indicates that the handshake bits are mismatching, then holding processing of the master descriptor that is next in the queue for processing; and if the polling indicates that the handshake bits are matching, then enabling processing of the master descriptor that is next in the queue for processing.