Patent ID: 9641190
Date: 2017-05-02
CPC Classifications: H03M

Claim:
1. A multi-rate cascaded continuous-time analog-to-digital converter comprising: at least one first continuous-time sigma-delta modulator configured to operate at a first sampling rate, each of the at least one first continuous-time sigma-delta modulators having an input, an output, and a feedback loop coupled between the input and the output; a second continuous-time sigma-delta modulator configured to operate at a second sampling rate higher than the first sampling rate, the second continuous-time sigma-delta modulator having an input, an output, a continuous-time voltage controlled oscillator (VCO) quantizer, and a feedback loop coupled between the input and the output, wherein the second continuous-time sigma-delta modulator is cascaded with the at least one continuous-time sigma-delta modulator; and a summation element having inputs coupled to the outputs of the at least one first continuous-time sigma-delta modulator and the second continuous-time sigma-delta modulator, and an output.