Patent ID: 9608061
Date: 2017-03-28
CPC Classifications: H01L

Claim:
1. A semiconductor structure having multiple fin field-effect transistors, comprising: a semiconductor substrate; a plurality of fins formed on a surface of the substrate; an insulation layer with a surface lower than top surfaces of the fins formed on the surface of the substrate; a high-K gate dielectric layer formed over the top surfaces and side surfaces of the fins and the surface of the insulation layer; a metal gate formed on the high-K gate dielectric layer; sidewalls formed on side surfaces of the high-K gate dielectric layer; a contact etching stop layer formed on the side surfaces of the high-K dielectric layer and the surface of the insulation layer; and a dielectric layer treated with oxygen-contained de-ionized water to eliminate a plurality of voids formed in the dielectric layer formed on the contact etching stop layer.