Patent ID: 9638482
Date: 2017-05-02
CPC Classifications: F41A,G01N

Claim:
1. An apparatus comprising: a detector including a first input port, a second input port and a first output port, wherein at least the first output port is a tri-state port for selectively providing a high voltage output, a low voltage output and a high-impedance output; a sensor unit including an emitter device and a receiver device, the first output port coupled to the receiver device for charging and discharging a capacitance of the receiver device, the second input port coupled to the emitter device for driving the emitter device; and a microprocessor controlling a switch, the first output port and a second output port of the detector as a function of an output of an A/D converter circuit; in which the second measurement phase is after the first measurement phase in time and in which the control sequence, during an evaluation phase, derives the sensor output value from the second elapsed time T wherein the detector includes the A/D converter circuit coupled to the receiver device via the first input port, to derive a sensor output value from the receiver device during a number of charging and discharging cycles.