Patent ID: 9614075
Date: 2017-04-04
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a fin-shaped silicon layer on a surface of a silicon substrate, the fin-shaped silicon layer having a longitudinal axis extending in a first direction parallel to the surface; a first insulating film around the fin-shaped silicon layer; a pillar-shaped silicon layer on the fin-shaped silicon layer, a pillar diameter of the pillar-shaped silicon layer being equal to a fin width of the fin-shaped silicon layer, the pillar diameter and the fin width parallel to the surface; a first diffusion layer in an upper portion of the fin-shaped silicon layer and a lower portion of the pillar-shaped silicon layer; a second diffusion layer in an upper portion of the pillar-shaped silicon layer; a silicide in an upper portion of the first diffusion layer in the upper portion of the fin-shaped silicon layer; a gate insulating film around the pillar-shaped silicon layer; a metal gate electrode around the gate insulating film; a metal gate wiring connected to the metal gate electrode, the metal gate wiring having a longitudinal axis extending in a second direction parallel to the surface and perpendicular to the first direction of the longitudinal axis of the fin-shaped silicon layer; and a contact on the second diffusion layer in the upper portion of the pillar-shaped silicon layer so as to make direct contact with the second diffusion layer.