Patent ID: 9711463
Date: 2017-07-18
CPC Classifications: H01L

Claim:
1. A method, comprising: providing a semiconductor wafer comprising a device layer arranged thereover; forming a device structure on or within an upper surface the device layer; forming a crack stop surrounding the device structure, wherein the crack stop is configured to reinforce the semiconductor wafer to limit cracking; using a laser to form a groove along a scribe line outside the crack stop, wherein the groove has a bottommost surface recessed below the device layer and recessed into an upper surface region of the semiconductor wafer, wherein the groove establishes a first pair of vertical sidewalls on die regions directly adjacent to the groove, wherein the first pair of vertical sidewalls are spaced apart by a first distance corresponding to a width of the groove and wherein a bottom portion of the groove terminates in a rounded, concave, spherical, or tapered surface in the upper surface region of the semiconductor wafer; and cutting the semiconductor wafer along the groove with a cutting blade that passes through the bottommost surface of the groove to singulate the semiconductor wafer into two or more die.