Patent ID: 9625774
Date: 2017-04-18
CPC Classifications: G02F

Claim:
1. An array substrate, comprising: a substrate; a first metal layer disposed on the substrate, the first metal layer comprising a scanning line and a gate electrode area of a thin-film field-effect transistor; a first insulative layer disposed partially on the first metal layer; a semiconductor layer disposed on the first insulative layer; a second metal layer disposed on the semiconductor layer, the second metal layer comprising a source electrode area of the thin-film field-effect transistor, a drain electrode area of the thin-film field-effect transistor, a data line, and a trace; a transparent electrode layer comprising a pixel electrode connected to the drain electrode area and a reinforcing part covered on the trace, wherein an area of the reinforcing part is the same as an area of the trace, and the reinforcing part is covered over the trace; and a second insulative layer disposed on the transparent electrode layer and the thin-film field-effect transistor.