Patent ID: 9712142
Date: 2017-07-18
CPC Classifications: H01L,H03K

Claim:
1. A high frequency semiconductor device comprising: a plurality of unit FETs; an input dividing/matching circuit having a plurality of divided output ends connected to the plurality of unit FETs and an input end, the input dividing/matching circuit being symmetrical about a center axis of the input end; an output combining/matching circuit having a plurality of divided input ends connected to the plurality of unit FETs and an output end, the output combining/matching circuit being symmetrical about a center axis of the output end; and a resistor, an inductor and a capacitor (RLC) low-frequency-oscillation-suppressing-circuit connected between at least one of the input end of the input dividing/matching circuit and the output end of the output combining/matching circuit and ground, wherein the input dividing/matching circuit and the output combining/matching circuit are in a line symmetrical shape about a symmetric axis which is a straight line passing through the input end of the input dividing/matching circuit and the output end of the output combining/matching circuit.