Patent ID: 9672104
Date: 2017-06-06
CPC Classifications: G06F,G11C

Claim:
1. A memory system comprising: a nonvolatile memory device including a plurality of first memory cells and a plurality of second memory cells, each of the plurality of first memory cells being configured to store 3-bit data, each of the plurality of second memory cells being configured to store 1-bit data; and a controller configured to control the nonvolatile memory device to perform a read operation, a program operation and a re-program operation, wherein: the controller is configured to perform an error checking and correction (ECC) operation on first data to generate ECC-performed first data, the first data being read from a first portion of the plurality of first memory cells at a first voltage level, the controller is configured to perform a read retry operation and the ECC operation on second data to generate ECC-performed second data when a number of error bits of the ECC-performed first data exceeds a threshold correctable by the ECC operation, the read retry operation including reading the second data stored in the first portion of the plurality of first memory cells at a second voltage level that is different from the first voltage level, the second data being read from the first portion of the plurality of first memory cells, the controller is configured to output to the nonvolatile memory device first page data including either the ECC-performed first data or the ECC-performed second data, the nonvolatile memory device is configured to program the first page data in a first portion of the plurality of second memory cells, the nonvolatile memory device is configured to read the programmed first page data in the first portion of the plurality of second memory cells, the nonvolatile memory device is configured to program in a second portion of the plurality of first memory cells the programmed first page data that is read at a first time from the first portion of the plurality of second memory cells, and the nonvolatile memory device is configured to re-program in the second portion of the plurality of first memory cells the programmed first page data that is read at a second time from the first portion of the plurality of second memory cells.