Patent ID: 9589910
Date: 2017-03-07
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a base substrate including a conductive base material and first and second opposing surfaces; a first conductive layer formed over the first surface of the base substrate and including a first contact pad, a second contact pad, and a conductive trace extending from the first contact pad to the second contact pad; a second conductive layer including an etch-resistant material formed over the second surface of the base substrate, wherein portions of the base substrate form isolated base leads from the conductive base material disposed between the first conductive layer and second conductive layer including a first base lead extending from the second contact pad of the first conductive layer to a third contact pad of the second conductive layer; a first semiconductor die mounted to the first conductive layer including a first conductive bump of the first semiconductor die bonded to the first contact pad of the first conductive layer, wherein the second contact pad is located outside a footprint of the first semiconductor die; an encapsulant deposited over the first semiconductor die and first conductive layer; and a second semiconductor die mounted to the first conductive layer opposite the first semiconductor die and between the base leads including a second conductive bump of the second semiconductor die bonded to the first contact pad of the first conductive layer directly opposite the first conductive bump.