Patent ID: 9582315
Date: 2017-02-28
CPC Classifications: G06F

Claim:
1. A method of controlling a coalescing of outermost memory transactions, the coalescing causing committing of memory store data to memory for a first transaction to be done at transaction execution (TX) end of a second transaction, the method for generating optimized machine instructions based on an intermediate representation of a program, the method comprising: generating, by a processor, a first module of optimized non-transactional machine instructions based, at least in part, on the intermediate representation of a program; determining whether two atomic tasks are to be coalesced into a single atomic task based, at least in part, on the intermediate representation identifying at least two atomic tasks to be performed, the at least two atomic tasks consisting of a first atomic task and a second atomic task; and based on a determination that the two atomic tasks are to be coalesced, generating for the two atomic tasks, a single coalesced transaction of transactional machine instructions to be executed.