Patent ID: 9748406
Date: 2017-08-29
CPC Classifications: H01L

Claim:
1. A semi-floating-gate device, the device comprising: a semiconductor substrate of a first doping type; a perpendicular channel region formed in the semiconductor substrate; wherein a bottom of the perpendicular channel region is connected with a source region of a second doping type and a top of the perpendicular channel region is connected with a drain region of the second doping type; a first layer of insulation film which covers the source region, the drain region, and the perpendicular channel region; a floating gate opening region formed in the first layer of insulation film which covers the perpendicular channel region and is disposed above the semiconductor substrate; a floating gate of the first doping type which covers the first layer of the insulation film and the floating gate opening region, the floating gate being used as a charge storage node; wherein, through the floating gate opening region, a p-n junction diode is formed between the floating gate and the drain region; and wherein the floating gate covers the first layer of insulation film of the perpendicular channel region, controlling a current of the perpendicular channel region by controlling an electric field; a second layer of insulation film which covers the source region, the floating gate, and the p-n junction diode; and a control gate disposed above the second layer of insulation film covering the floating gate and the p-n junction diode.