Patent ID: 9735285
Date: 2017-08-15
CPC Classifications: G06F,H01L

Claim:
1. A semiconductor device comprising: a first wiring, a second wiring, a third wiring, a fourth wiring and a fifth wiring; a first transistor, a second transistor, a third transistor and a fourth transistor; and a first capacitor, a second capacitor, a third capacitor and a fourth capacitor, wherein the first wiring is electrically connected to a gate of the first transistor and a gate of the second transistor, wherein the second wiring is electrically connected to a gate of the third transistor and a gate of the fourth transistor, wherein the third wiring is electrically connected to one of a source and a drain of the first transistor and one of a source and a drain of the third transistor, wherein the fourth wiring is electrically connected to one of a source and a drain of the second transistor and one of a source and a drain of the fourth transistor, wherein the other of the source and the drain of the first transistor is electrically connected to one of electrodes of the first capacitor, wherein the other of the source and the drain of the second transistor is electrically connected to one of electrodes of the second capacitor, wherein the other of the source and the drain of the third transistor is electrically connected to one of electrodes of the third capacitor, wherein the other of the source and the drain of the fourth transistor is electrically connected to one of electrodes of the fourth capacitor, wherein each of the other of the electrodes of the first capacitor, the other of the electrodes of the second capacitor, the other of the electrodes of the third capacitor and the other of the electrodes of the fourth capacitor is electrically connected to the fifth wiring, wherein each of the first transistor, the second transistor, the third transistor and the fourth transistor comprises an oxide semiconductor layer including a channel formation region and comprising oxygen, indium, zinc and a metal other than indium and zinc, wherein a value of off-state current through the oxide semiconductor layer of each of the first transistor, the second transistor, the third transistor and the fourth transistor is less than or equal to 1×10