Patent ID: 9640457
Date: 2017-05-02
CPC Classifications: H01L

Claim:
1. A device, comprising: a wiring structure including a first surface and a second surface opposite the first surface; a first semiconductor die on the first surface of the wiring structure, the first semiconductor die including a first power amplifier unit; a second semiconductor die on the first surface of the wiring structure, the second semiconductor including a second power amplifier unit and being spaced apart from the first semiconductor die; a first input port at the second surface of the wiring structure; a first conductor, in the wiring structure, configured to electrically connect the first input port to the first semiconductor die and the second semiconductor die; and a first output port at the second surface of the wiring structure; and a second conductor, in the wiring structure, configured to connect the first semiconductor die and the second semiconductor die to the first output port, wherein the second conductor provides a first transmission path for delivering power from the first semiconductor die to the first output port, and a second transmission path for delivering power from the second semiconductor die to the first output port.