Patent ID: 9653612
Date: 2017-05-16
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a gate electrode having a first side wall at an end thereof; a gate insulating layer on a top surface and the first side wall of the gate electrode; an oxide semiconductor layer facing the first side wall, the gate insulating layer being between the first side wall and the oxide semiconductor layer; a first insulating layer on the oxide semiconductor layer, the oxide semiconductor layer being between the gate insulating layer and the first insulating layer; a first electrode connected with a first portion of the oxide semiconductor layer; and a second electrode connected with a second portion of the oxide semiconductor layer, wherein the first insulating layer is in contact with the oxide semiconductor layer, the oxide semiconductor layer is connected with the first electrode via a first opening in the gate insulating layer; and the second electrode is connected with the oxide semiconductor layer via a second opening in the first insulating layer.