Patent ID: 9536977
Date: 2017-01-03
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a precursor, the precursor including: a source region disposed in a top portion of the protrusion structure and overlapping and in contact with a top portion of the gating surface of the gate stack; a sidewall spacer disposed along a sidewall of the source region, on top of the gating surface and connecting with the isolation dielectric layer, an outer edge of the sidewall spacer extending beyond an outer edge of the top portion of the gating surface; a dielectric layer disposed over the source region; a source contact with a critical dimension (CD) that is substantially larger than a width of the source region, formed on the source region and extending to the sidewall spacer; and a gate contact formed through the isolation dielectric layer and directly contacting multiple layers of the gate stack.