Patent ID: 9711651
Date: 2017-07-18
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising an inverter circuit and a pixel, the inverter circuit comprising: wherein a source of the first transistor is electrically connected to a drain of the second transistor; wherein a gate of the first transistor is electrically connected to the source of the first transistor, wherein a channel formation region of at least one of the first transistor and the second transistor comprises a first oxide semiconductor layer and a second oxide semiconductor layer, the second oxide semiconductor layer comprising indium and zinc, wherein the second oxide semiconductor layer is provided on the first oxide semiconductor layer, and wherein the first oxide semiconductor layer has a lower resistivity than the second oxide semiconductor layer, and the pixel comprising a third transistor, wherein a channel formation region of the third transistor is formed of a single layer of a third oxide semiconductor layer.