Patent ID: 9646941
Date: 2017-05-09
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a first substrate; a metallic member disposed within the first substrate and including a first end and a second end opposite to the first end; a first pad disposed on the first substrate and including a third end and a fourth end opposite to the third end; a via portion extending between and coupled with the metallic member and the first pad; a second substrate disposed opposite to the first substrate; a second pad disposed on the second substrate and including a fifth end and a sixth end opposite to the fifth end; and a conductive bump disposed between and directly on the first pad and the second pad, wherein the metallic member, the first pad, the second pad and the conductive bump are vertically aligned with each other, and the via portion is disposed distal to the first end of the metallic member and proximal to the second end of the metallic member, and the first end of the metallic member is vertically aligned with the fifth end of the second pad and the second end of the metallic member is vertically aligned with the sixth end of the second pad.