Patent ID: 9711536
Date: 2017-07-18
CPC Classifications: G09G,H01L

Claim:
1. A semiconductor device comprising: a first circuit, a second circuit, and a third circuit, wherein: the first circuit receives a first signal and is configured to boost a first voltage of the first signal into a second voltage, the second circuit is configured to convert the first signal into a second signal, the third circuit receives the second signal and is configured to amplify a first amount of current of the second signal to a second amount of current and is configured to output the second amount of current, the second circuit comprises first to fourth wirings and first to third transistors, wherein one of a source and a drain of the first transistor is electrically connected to the first wiring, wherein one of a source and a drain of the second transistor is electrically connected to the second wiring, wherein one of a source and a drain of the third transistor is electrically connected to the third wiring, wherein the other of the source and the drain of the first transistor, the other of the source and the drain of the second transistor, and the other of the source and the drain of the third transistor is directly connected to the fourth wiring, wherein gates of the first to third transistor is electrically connected to the first circuit, wherein the fourth wiring is electrically connected to the third circuit, the first to third wirings are configured to transmit different voltages, the first to third transistors are configured to operate as switches, and each of the first to third transistors comprises a semiconductor layer comprising an oxide semiconductor.