Patent ID: 9621046
Date: 2017-04-11
CPC Classifications: B60R,H02M

Claim:
1. A power converter, comprising: a reference signal generator configured to generate a reference signal with a predetermined period and output the reference signal; a current detector configured to detect a current flowing in the power converter and output a value of the detected current; a reset signal generator configured to generate a reset signal when the value of the detected current is larger than a value of a predetermined current command, and output the reset signal; and a driving unit configured to drive a switch provided in the power converter such that: (i) the switch is turned on, and subsequently is turned off: (a) in synchronization with the reference signal when the reset signal is not outputted before the reference signal is outputted; and (b) in synchronization with the reset signal when the reset signal is outputted before the reference signal is outputted; but (ii) the switch is not turned off in synchronization with the reset signal during a predetermined time period including a first predetermined time period before an output timing of the reference signal and a second predetermined time period after the output timing of the reference signal, the first predetermined time period being a period from a predetermined time point before the output timing of the reference signal to the output timing of the reference signal, the second predetermined time period being a period from the output timing of the reference signal to a predetermined time point after the output timing of the reference signal, the second predetermined timed period and the first predetermined time period being consecutive periods, the predetermined time period being expressed by T=T_pre+T_post, where T is the predetermined time period, T_pre is the first predetermined time period, T_post is the second predetermined time period, and T_pre and T_post are consecutive periods, wherein the reset signal generator is configured to force an output voltage of the reset signal generator to be set to zero during the predetermined time period including the first predetermined time period before the output timing of the reference signal and the second predetermined time period after the output timing of the reference signal.