Patent ID: 9583033
Date: 2017-02-28
CPC Classifications: G09G

Claim:
1. A display panel for display devices comprising: a substrate on which a plurality of signal lines and a plurality of main signal transmission lines to transmit signals for controlling pixels of the display panel are formed, the plurality of signal lines disposed in a first direction and the plurality of main signal transmission lines disposed in a second direction, wherein one of any two adjacent signal lines is directly connected to at least one of the plurality of main signal transmission lines through which drive voltages are applied to the pixels, and the other one of the two adjacent signal lines is maintained in a floating state in which the other one of the two adjacent signal lines is not connected to any one of the main signal transmission lines during an input test signal being applied to the other one of the two adjacent signal lines to test whether or not the two adjacent signal lines are shorted or opened.