Patent ID: 9569358
Date: 2017-02-14
CPC Classifications: G06F,G11C,H01L

Claim:
1. An electronic device comprising a semiconductor memory that comprises: a selection element; a first plug and a second plug that are coupled with two different sides of the selection element, respectively; a variable resistance element formed over the first plug and configured to store data; and a dummy variable resistance element formed over the second plug and configured to include a conductive path coupled with the second plug; wherein the variable resistance element includes a magnetic tunnel junction that includes two magnetic layers separated by a barrier layer to allow for tunneling of electrons and is capable of exhibiting different resistance states for storing different data and the dummy variable resistance element is a dummy magnetic tunnel junction that includes two magnetic layers that is separated from each other but is connected by the conductive path and is incapable of exhibiting different resistance states for storing different data.