Patent ID: 9666491
Date: 2017-05-30
CPC Classifications: H01L

Claim:
1. A method of forming a semiconductor device, comprising: providing a substrate having a first surface and a second surface opposite to the first surface; forming a first transistor on the first surface of the substrate; performing a thinning process on the second surface of the substrate to form a third surface; forming a first insulating layer on the third surface of the substrate; forming an oxide semiconductor (OS) layer on the first insulating layer; forming a source and a drain on the OS layer; forming a second insulating layer covering the source, the drain and the OS layer; forming a first gate electrode on the OS layer between the source and the drain, wherein the OS layer, the second insulating layer, the source, the drain and the first gate electrode together form a second transistor on the third surface; performing a first annealing process to form a seal layer covering the second transistor; forming a second gate electrode on the first insulating layer; and performing a second annealing process to form a third insulating layer covering the second gate electrode.