Patent ID: 9721829
Date: 2017-08-01
CPC Classifications: H01L

Claim:
1. A method comprising: forming a first recess between two portions of a first plurality of shallow trench isolation (STI) regions; performing a first epitaxy to grow a first epitaxy strip in the first recess, wherein the first epitaxy strip is over and contacting a first semiconductor strip portion of a semiconductor substrate; forming a second recess between additional two portions of a second plurality of STI regions; performing a second epitaxy to grow a second epitaxy strip in the second recess, wherein the first epitaxy strip is over and contacting a second semiconductor strip portion of the semiconductor substrate; and recessing the first plurality of STI regions and the second plurality of STI regions to form a first semiconductor fin and a second semiconductor fin, respectively, wherein the first plurality of STI regions is recessed to a first depth smaller than a height of the first epitaxy strip, and the second plurality of STI regions is recessed to a second depth greater than a height of the second epitaxy strip.