Patent ID: 9673200
Date: 2017-06-06
CPC Classifications: H01L

Claim:
1. A method for forming a semiconductor device structure, comprising: forming an isolation feature in a substrate; forming a first gate stack structure and a second gate stack structure on the substrate, wherein the first gate stack structure comprises a first spacer adjacent to the second gate stack structure; forming an U-shaped capping layer between the first gate stack structure and the second gate stack structure, wherein a lateral sidewall of the U-shaped capping layer is in direct contact with the first spacer of the first gate stack structure, and a top of the lateral sidewall of the U-shaped capping layer is below a top of the first spacer of the first gate stack structure; forming a resist protective oxide (RPO) layer on the first gate stack structure, the second gate stack structure and the U-shaped capping layer; and removing a portion of the RPO layer to form a remaining RPO layer, wherein while removing the portion of the RPO layer, a portion of the isolation feature which is not covered by the U-shaped capping layer is recessed.