Patent ID: 9557381
Date: 2017-01-31
CPC Classifications: G01R,G06F

Claim:
1. A computer-implemented method for inserting diagnostic circuit elements in a scan chain of a chip comprising: creating, via a processor, a segment for each latch of a plurality of latches in the scan chain to create a plurality of adjacent and connected segments; merging, via the processor, the two adjacent and connected segments to form a super-segment comprising all latches contained in the two adjacent and connected segments based on an objective function, wherein the objective function comprises a predetermined rule; analyzing a placement of the segment to identify two adjacent segments that satisfy the objective function comprises: inserting, via the processor, a logic circuit element between the super-segment and a segment that is adjacent and connected to the super-segment in the scan chain, wherein the logic circuit element allows diagnostic isolation of the scan chain super-segment.