Patent ID: 9673859
Date: 2017-06-06
CPC Classifications: G06G,H04B

Claim:
1. A circuit for combining a plurality of digital bitstreams, the circuit comprising: first and second bitstream generators, the first bitstream generator being operative to receive a first analog signal and to generate a first digital bitstream as a function of the first analog signal, the second bitstream generator being operative to receive a second analog signal and to generate a second digital bitstream as a function of the second analog signal, the first and second bitstream generators being configured to maintain a substantially ninety-degree phase difference between the first and second digital bitstreams; and a directional coupler configured to receive, at a first port, a first input signal comprising the first digital bitstream, and configured to receive, at a second port, a second input signal comprising the second digital bitstream, the directional coupler maintaining a substantially ninety-degree phase difference between the first and second input signals, the directional coupler including a third port that is terminated, the directional coupler generating, at a fourth port, a first output signal which is indicative of a combination of the first and second input signals in such a manner that an image component associated with at least one of the first and second input signals is suppressed in power at the fourth port without a need for filtering to attenuate the image component.