Patent ID: 9705510
Date: 2017-07-11
CPC Classifications: H03K,H03L,H03M,H04L

Claim:
1. A clock data recovery control circuit that detects a phase shift of input data that is taken in with a phase-adjusted clock, and generates phase control data that controls a phase of the clock based on the detected phase shift, the clock data recovery control circuit comprising: a change detection circuit that detects an over-change in the phase shift based on an amount of a change of the phase shift during a first period of time; and a selection circuit that outputs the phase shift before change, which is the phase shift before the time of detection of the over-change, as the phase shift for the first period of time at the time of detection of the over-change, wherein during the first period of time after the time of detection of the over-change, the phase control data is generated based on the phase shift before change.