Patent ID: 9727681
Date: 2017-08-08
CPC Classifications: G06F

Claim:
1. A method performed by a computer system for designing an integrated circuit that contains at least two memory instances, the method comprising: accessing a listing of memory instances, the listing generated from a register transfer level (RTL) description of the integrated circuit, wherein the RTL description includes calls to a generic memory model of the memory instances, each call for a memory instance using (a) a generic memory call interface for the generic memory model, the generic memory call interface including a set of memory parameters, and (b) memory parameters for the memory instance; wherein the listing includes the memory parameters for each memory instance; and for each such memory instance in the listing, processing the generic memory model using memory parameters corresponding to the memory instance to synthesize a specific memory model for the memory instance, wherein the specific memory model is useable in a later step in a flow for designing and fabricating the integrated circuit.