Patent ID: 9583057
Date: 2017-02-28
CPC Classifications: G06F,G09G,H01L

Claim:
1. A pixel circuit comprising: a pixel including a display cell in which a display state is changed based on a pixel data voltage held in a pixel node; a first switch circuit to control a conducting state between a data signal line and the pixel node based on a signal level of a scanning signal line, and transferring the pixel data voltage supplied from the data signal line to the pixel node; and a memory circuit to store a hold voltage having a constant relationship with the pixel data voltage in a storage node electrically separated from the pixel node, and restoring a voltage state of the pixel node to the pixel data voltage to be derived from the hold voltage, based on the hold voltage, wherein the memory circuit includes: the voltage supply line is supplied with a predetermined fixed voltage, and the drain electrode of the first transistor is directly connected to one terminal of the second switch circuit and one terminal of the third switch circuit.