Patent ID: 9735771
Date: 2017-08-15
CPC Classifications: H01L,H02M,H03K

Claim:
1. An apparatus comprising: a gate drive circuit having at least one gate drive output configured to produce a gate drive signal on said gate drive output; a wide-bandgap (WBG) switching device having a first gate, a first drain, and a first source; a semiconductor switch having a second gate, a second drain, and a second source, said WBG switching device and said semiconductor switch being connected in a parallel arrangement wherein (i) said first drain and said second drain are electrically connected and (ii) said first source and said second source are electrically connected, said second gate being connected to said gate drive circuit output to receive said gate drive signal; and a delay block having an input connected to said gate drive circuit output and an output configured to produce a delayed gate drive signal, said first gate of said WBG switching device being connected to said delay block output to receive said delayed gate drive signal.