Patent ID: 9748259
Date: 2017-08-29
CPC Classifications: H01L

Claim:
1. A method of forming a semiconductor device structure, the method comprising: providing an SOI substrate comprising a substrate material, an active semiconductor layer positioned above said substrate material, and a buried insulating material interposed between said active semiconductor layer and said substrate material; forming an insulating structure in said SOI substrate, said insulating structure laterally separating a first substrate portion of said substrate material from two adjacent SOI substrate portions; after forming said insulating structure, forming a recess in said first substrate portion, a bottom of said recess exposing an upper surface portion of said substrate material; applying an etching process to said recess, said etching process being unselective with regard to said insulating structure and said substrate material; and after applying an etching process to said recess, forming a gate electrode inside of said recess and above said upper surface portion of said substrate material at said bottom of said recess.