Patent ID: 9685275
Date: 2017-06-20
CPC Classifications: C30B,H01G,H01L,H01M,Y02E,Y02P,Y02T

Claim:
1. A method for manufacturing a power storage device comprising: forming over a current collector an active material layer comprising a crystalline silicon layer by a low-pressure CVD method using a deposition gas including silicon as a source gas such that a mixed layer is formed between the current collector and the crystalline silicon layer, the crystalline silicon layer comprising a crystalline silicon region and a whisker-like crystalline silicon region over the crystalline silicon region; forming a negative electrode comprising the active material layer; providing a positive electrode; and providing an electrolyte between the negative electrode and the positive electrode, wherein the whisker-like crystalline silicon region comprises a first protrusion and a second protrusion, wherein a length in an axis of the first protrusion is greater than or equal to 0.5 μm and less than or equal to 1000 μm, wherein a width of the first protrusion is greater than or equal to 500 nm and less than or equal to 3 μm, wherein the current collector comprises a metal element which forms silicide by reacting with silicon on a surface region of the current collector, wherein the active material layer comprising the crystalline silicon layer is formed over the current collector such that a metal oxide layer consisting essentially of the metal element and oxygen is formed between the mixed layer and the crystalline silicon layer, and wherein the mixed layer comprises silicon and the metal element.