Patent ID: 9704919
Date: 2017-07-11
CPC Classifications: G11C,H01L

Claim:
1. A magnetic random access memory (MRAM) bit cell, comprising: a substrate; an active semiconductor layer disposed above the substrate, the active semiconductor layer comprising an access transistor, the access transistor comprising a gate, a source, and a drain; a source contact coupled to the source of the access transistor; a drain contact coupled to the drain of the access transistor; a dielectric layer comprising a plurality of interconnection layers disposed above the active semiconductor layer, each interconnection layer comprising at least one interconnection line; a source line comprising an interconnection line of a first interconnection layer of the plurality of interconnection layers, the source line coupled to the source contact; and a magnetic tunnel junction (MTJ) coupling column disposed across at least two interconnection layers of the plurality of interconnection layers between the drain contact and an MTJ, the MTJ coupling column comprising a vertical interconnect access (via) coupling a first end electrode of the MTJ to the drain contact without coupling to any interconnection lines in the at least two interconnection layers; the MTJ comprising a tunnel junction disposed between the first end electrode and a second end electrode; and a bit line comprising an interconnection line of a second interconnection layer of the plurality of interconnection layers, the bit line coupled to the second end electrode of the MTJ.