Patent ID: 9748335
Date: 2017-08-29
CPC Classifications: B82Y,H01L

Claim:
1. A method, comprising: providing a semiconductor structure comprising a semiconductor substrate; at least one fin comprising one or more first layers and one or more second layers, wherein the first layers and the second layers are interspersed and each of the second layers is more susceptible to oxidation than any of the first layers; and a dummy gate structure comprising a first spacer material disposed on sidewalls of the dummy gate; selectively oxidizing two portions of each of the second layers, wherein the two portions are exposed on the sidewalls of the fin; selectively stripping the two portions of each of the second layers, to yield a plurality of second layer recesses; depositing a second spacer material on at least the sidewalls of the fin, wherein the second spacer material fills the plurality of second layer recesses; and epitaxially growing a source/drain material from at least portions of each of the first layers exposed on the sidewalls of the fin.