Patent ID: 9627533
Date: 2017-04-18
CPC Classifications: H01L

Claim:
1. A method comprising: obtaining a FET structure comprising a semiconductor substrate, a gate stack on the substrate, source/drain regions operatively associated with the gate stack, and a silicon nitride cap on the gate stack by forming the gate stack on the semiconductor substrate, forming silicon nitride spacers on the gate stack, epitaxially depositing the source/drain regions on the semiconductor substrate, and forming the silicon nitride cap on the gate stack such that the silicon nitride cap extends above the spacers; generating a fluorohydrocarbon-containing plasma selective to silicon by decomposition of C anisotropically etching the silicon nitride cap and the spacers simultaneously employing the fluorohydrocarbon-containing plasma to form a first hydrofluorocarbon polymer layer having a first thickness on the source/drain regions and a second hydrofluorocarbon polymer layer having a second thickness on the silicon nitride cap, the first thickness being greater than the second thickness, the second hydrofluorocarbon polymer layer further comprising a volatile nitrogen-containing compound formed by interaction of the fluorohydrocarbon-containing plasma with the silicon nitride comprising the silicon nitride cap, and removing the first hydrofluorocarbon polymer layer from the source/drain regions.