Patent ID: 9543155
Date: 2017-01-10
CPC Classifications: H01L

Claim:
1. A method of manufacturing a semiconductor device, the method comprising: sequentially forming a first etch target layer and a first mask layer on a substrate, the substrate having a first region and a second region therein; forming a plurality of sacrificial patterns on the first mask layer in a second direction, each of the sacrificial patterns extending in a first direction crossing the second direction; forming spacers on sidewalls of each of the sacrificial patterns; removing the sacrificial patterns; etching the first mask layer using the spacers as an etching mask to form a plurality of first masks; forming second masks on sidewalls of each of the first masks in the second direction in the second region to define a plurality of third masks, each of the third masks including each of the first masks and the second masks on the sidewalls thereof; and etching the first etch target layer using the first masks and the third masks as an etching mask to form a plurality of first patterns and a plurality of second patterns in the first region and the second region, respectively, each of the first patterns having a first width in the second direction, and each of the second patterns having a second width, the second width being greater than the first width in the second direction.