Patent ID: 9728453
Date: 2017-08-08
CPC Classifications: H01L

Claim:
1. A method, comprising: defining an integrated circuit function using a front-end substrate having one or more active devices and a back-end substrate having connections formed in metal layers in dielectric material, wherein the back-end substrate is free from active devices; manufacturing the front-end substrate in a first semiconductor process; manufacturing the back-end substrate in a second semiconductor process; converting a first portion of bonding surfaces on the front-end substrate to a first oxide using a first controlled oxidation process to oxidize the first portion of the bonding surfaces on the front-end substrate to a first depth; converting a second portion of bonding surfaces on the back-end substrate to a second oxide using a second controlled oxidation process to oxidize the second portion of the bonding surfaces on the back-end substrate to a second depth, the second depth being less than a sum of the first depth and 20 Å; performing a wet etch process on the bonding surfaces of the front-end substrate and the back-end substrate, wherein the wet etch process on the bonding surfaces of the front-end substrate removes the first oxide and the second oxide and creates a convex surface on the first portion of the bonding surfaces; matching a pad profile on the front-end substrate with a pad profile on the back-end substrate; physically contacting bonding surfaces of the front-end substrate and the back-end substrate; performing wafer bonding to form bonds between the front-end and back-end substrates to form an integrated circuit, wherein the performing wafer bonding bonds a first conductive region to a second conductive region and also bonds a first dielectric region to a second dielectric region; manufacturing a second front-end substrate, wherein the second front-end substrate has an identical pattern of one or more second active devices as the one or more active devices of the front-end substrate; manufacturing a second back-end substrate, wherein the second back-end substrate is free from active devices and has a different pattern of second metallization layers than the metallization layers of the back-end substrate; and bonding the second front-end substrate to the second back-end substrate, wherein the bonding the second front-end substrate to the second back-end substrate electrically interconnects the one or more second active devices in the second front-end substrate through the second metallization layers of the second back-end substrate.