Patent ID: 9590029
Date: 2017-03-07
CPC Classifications: H01L

Claim:
1. A method of manufacturing an insulated gate bipolar transistor, comprising: providing a substrate, forming a field oxide layer at a front side of the substrate, photoetching and etching the field oxide layer by using a terminal guard ring photomask, and forming a terminal guard ring by implanting P-type ions into the substrate under an etched area; photoetching and etching the field oxide layer on an active region by using an active region photomask, implanting N-type ions to the substrate by using a photoresist as a mask film, and depositing polysilicon on the substrate where the field oxide layer being etched, forming a protecting layer on the deposited polysilicon; forming a polysilicon gate by photoetching and etching surplus polysilicon and the protecting layer by using a polysilicon photomask, forming a carrier enhanced region after driving-in an implantation area of N-type ions; or photoetching and etching the field oxide layer of the active region by using the active region photomask, implanting N-type ions to the substrate by using the photoresist as the mask film, and then forming the carrier enhanced region after performing a driving-in process, and depositing polysilicon on the substrate where the field oxide layer being etched, forming the protecting layer on the deposited polysilicon, forming a polysilicon gate by photoetching and etching surplus polysilicon and the protecting layer by using a polysilicon photomask; photoetching the carrier enhanced region by using a P well photomask and implanting P-type ions to the carrier enhanced region, and forming a P-type body region after performing a driving-in process; self-alignedly implanting N-type ions to the P-body region by using the polysilicon gate, and forming an N-type heavily doped region after performing a driving-in process; forming a spacer at both sides of the polysilicon gate, then implanting P-type ions to the N-type heavily doped region, and forming a P-type heavily doped region after performing a driving-in process; implanting and doping polysilicon to the polysilicon gate after removing the protecting layer; and forming an interlayer dielectric, performing a frontside metalized process of the insulated gate bipolar transistor, performing backgrinding, implanting of P-type ions and an annealing process, and performing a backside metalized process of the insulated gate bipolar transistor.