Patent ID: 9570353
Date: 2017-02-14
CPC Classifications: H01L

Claim:
1. A method for manufacturing a semiconductor device, the method comprising: forming an interlayer insulating film on a semiconductor substrate; etching a part of the interlayer insulating film to form a contact hole and an alignment hole in the interlayer insulating film, the alignment hole having a width wider than a width of the contact hole; depositing a first metal layer on a surface of the interlayer insulating film, an inner surface of the contact hole, and an inner surface of the alignment hole, the first metal layer having a thickness thicker than a half of the width of the contact hole and thinner than a half of the width of the alignment hole; etching the first metal layer so that the surface of the interlayer insulating film and a bottom surface of the alignment hole are exposed and the first metal layer remains covering a bottom surface of the contact hole; sensing a position of the alignment hole and treating the semiconductor substrate based on the sensed position of the alignment hole; and cutting a part of the semiconductor substrate including the alignment hole to divide a semiconductor device having the contact hole from the semiconductor substrate.