Patent ID: 9704783
Date: 2017-07-11
CPC Classifications: H01L

Claim:
1. A method of manufacturing a device, the method comprising: forming a dielectric structure comprising a plurality of metallization layers including at least a bottom metallization layer and a top metallization layer, the plurality of metallization layers each formed in a respective one of a plurality of dielectric layers; forming a passivation layer over the top metallization layer of the dielectric structure; etching a first opening in the passivation layer and the dielectric structure, wherein the first opening exposes a metal pad disposed in one of the plurality of dielectric layers; etching a second opening through the passivation layer and the dielectric structure and into a portion of a substrate disposed below the dielectric structure, wherein the etching the first opening and the etching the second opening occur simultaneously; lining a top surface of the passivation layer and sidewalls and a bottom surface of each of the first opening and the second opening with an insulation layer; removing portions of the insulation layer along the bottom surface of the first opening to expose the metal pad; after removing the portions of the insulation layer, forming a diffusion barrier layer over the top surface of the passivation layer and along the sidewalls and the bottom surface of each of the first opening and the second opening; and simultaneously filling the first opening and the second opening with a conductive material, an uppermost surface of the conductive material extending above an uppermost surface of the passivation layer.