Patent ID: 9570342
Date: 2017-02-14
CPC Classifications: H01L

Claim:
1. A method for forming a via comprising: forming a first seed layer on an upper surface of a substrate, the first seed layer comprising a layer of a first electrically conducting material; forming a first electrically conducting trace on the first seed layer by electroplating a second electrically conducting material on the first seed layer; forming a first column in electrical contact with the first trace by electroplating a third electrically conducting material in contact with the first trace; removing the first seed layer where the first seed layer does not underlie the first trace; forming an insulating layer on the first trace, the first column and the upper surface of the substrate; forming a smooth upper surface on the insulating layer in which the first column is exposed; forming a second seed layer, wherein the second seed layer is electrically conductive; forming a second electrically conductive trace on the second seed layer; and forming a second column in electrical contact with the second trace, wherein the second column is electrically conductive, wherein the second seed layer is in electrical connection with the first column, and wherein the second column is aligned with the first column along a vertical axis that is perpendicular to the upper surface of the substrate.