Patent ID: 9564445
Date: 2017-02-07
CPC Classifications: H01L

Claim:
1. A semiconductor structure comprising: semiconductor fins located on a substrate, wherein each of said semiconductor fins is laterally bound by a pair of lengthwise sidewalls and a pair of widthwise sidewalls; trench capacitors located within said substrate, wherein an inner electrode of each trench capacitor is electrically shorted to a source region in one of said semiconductor fins; a gate structure straddling one of said semiconductor fins and overlying one of said trench capacitors, said gate structure comprising a stack of a gate dielectric and a gate electrode; a gate spacer laterally surrounding said gate dielectric and said gate electrode; and a dummy gate structure including dielectric surfaces located between a widthwise sidewall of one of said semiconductor fins and a widthwise sidewall of another of said semiconductor fins, and between a sidewall of one of said trench capacitors and a sidewall of another of said trench capacitors, said dummy gate structure laterally extending along a same direction as said gate structure.