Patent ID: 9647078
Date: 2017-05-09
CPC Classifications: H01L

Claim:
1. A semiconductor power device supported on a semiconductor substrate comprising: a plurality of transistor cells each having a source and a drain region disposed on opposite sides of a gate electrode for controlling an electric current transmitted between the source and the drain regions; a first insulation layer covering the semiconductor device having a plurality of contact openings opened through the first insulation layer and said contact openings are filled with source metal contacts and drain metal contacts for contacting the source and drain regions respectively; a first metal layer covering over said first insulation layer and patterned into a plurality of source metal stripes contacting said source metal contacts and a plurality of drain metal stripes contacting said drain metal contacts; a second insulation layer covering said first set of source and drain metal stripes wherein said second insulation layer having a plurality of source via contacts and drain via contacts penetrate therethrough for contacting said first set of source metal strips and said first set of drain metal strips respectively; a second metal layer disposed on top of said second insulation layer and patterned into a source metal and a drain metal for contacting said source via contacts and said drain via contacts respectively through said second insulation layer; and wherein each of the source metal stripes having a lower portion wider than an upper portion of the source metal stripes to reduce a lower portion source resistance.