Patent ID: 9697903
Date: 2017-07-04
CPC Classifications: G11C

Claim:
1. A data storage device comprising: a nonvolatile memory device; and a controller coupled to the nonvolatile memory device, the controller being suitable for providing a normal erase command or a fine erase command to the nonvolatile memory device; wherein the nonvolatile memory device is suitable for performing a first normal erase loop and a first fine erase loop according to the normal and fine erase commands, respectively, wherein the first normal erase loop comprises applying a first normal erase voltage and an erase verify voltage to erase target memory cells selected according to the normal erase command, and the first fine erase loop comprises applying a first fine erase voltage and an erase verify voltage to the erase target memory cells, wherein, when it is determined that the erase target memory cells are not erased by the first normal erase loop, the nonvolatile memory device performs a second normal erase loop in which a second normal erase voltage increased by a first increment from the first normal erase voltage and the erase verify voltage are applied to the erase target memory cells, wherein, when it is determined that the erase target memory cells are not erased by the first fine erase loop, the nonvolatile memory device performs a second fine erase loop in which a second fine erase voltage increased by a second increment from the first fine erase voltage and the erase verify voltage are applied to the erase target memory cells, and wherein a magnitude of the first increment between the normal erase loops is larger than a magnitude of the second increment between the fine erase loops.