Patent ID: 9607838
Date: 2017-03-28
CPC Classifications: H01L

Claim:
1. A method of fabricating a fin field-effect transistor (Fin FET) device, the method comprising: providing a substrate having a first fin structure and a second fin structure; forming an isolation layer on the substrate, the isolation layer formed adjacent to the first fin structure and the second fin structure; forming a first gate structure on at least a portion of the first fin structure and the isolation layer; forming a second gate structure on at least a portion of the second fin structure and the isolation layer; forming a first strain material by an epitaxial growth operation, the first strain material providing stress to a channel region of the first fin structure; forming a second strain material by the epitaxial growth operation, the second strain material providing stress to a channel region of the second fin structure; implanting a phosphorus dimer dopant to at least a first region of the first strain material, the first region having a first doping concentration of the phosphorus dimer dopant, the first doping concentration being greater than a second doping concentration of a phosphorus dopant in a second region of the first strain material; and applying a thermal anneal operation to at least the first fin structure and the first strain material to provide the channel region of the first fin structure with a greater channel mobility than the channel region of the second fin structure.