Patent ID: 9685544
Date: 2017-06-20
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a first conductive-type semiconductor layer; a second conductive-type base region that is arranged in a front surface portion of the first conductive-type semiconductor layer; a plurality of trenches that extend from a front surface of the first conductive-type semiconductor layer beyond a bottom portion of the second conductive-type base region, an active region being defined between the plurality of trenches; a plurality of first conductive-type emitter regions, that are arranged in the active region, each connecting the trenches that are adjacent to each other such that each of the first conductive-type emitter regions is not divided while extending from one of the trenches to another of the trenches; a gate electrode that is embedded in the trenches; an embedding insulating film that is embedded in the trenches on the gate electrode and that has an upper surface in the same height position as the front surface of the first conductive-type semiconductor layer or in a height position lower than the front surface; and an emitter electrode that covers the active region and the embedding insulating film and that is electrically connected to the second conductive-type base region and the first conductive-type emitter regions.