Patent ID: 9559175
Date: 2017-01-31
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a substrate; a gate electrode formed over the substrate; side walls formed over side faces of the gate electrode; impurity regions which are formed in the substrate and become a source and a drain; a first insulating layer and a second insulating layer formed of a material having a dielectric constant lower than that of the first insulating layer, the first insulating layer and the second insulating layer collectively covering the gate electrode, the side walls, and the impurity regions; a contact which passes through the first insulating layer and is connected to one of the impurity regions, wherein the second insulating layer is embedded between one of the sidewalls and the contact; and an air gap which is formed in the second insulating layer and is located between one of the side walls and the contact, and which faces the contact at the side face on the contact side via the second insulating layer.