Patent ID: 9548434
Date: 2017-01-17
CPC Classifications: H01L

Claim:
1. An LED wafer level package comprising: a bottom wafer with one or more vias; a passivation layer in contact with the bottom wafer; one or more metal pads in contact with the passivation layer; one or more bond pads in contact with the one or more metal pads; an LED attached to at least one of the one or more bond pads; one or more encapsulation layers in contact with the LED; a bonding layer in contact with the one or more encapsulation layers; a top wafer in contact with the bonding layer; an isolation layer in contact with the bottom wafer; and electroplated structures in contact with the isolation layer; wherein the one or more metal pads extend into the one or more vias of the bottom wafer and are in contact with the electroplated structures forming an electrical connection between the LED attached to the at least one bond pad and the electroplated structures.