Patent ID: 9667289
Date: 2017-05-30
CPC Classifications: H04B

Claim:
1. An apparatus, comprising: a circuit input configured to receive a plurality of analog input signals; an analog to digital converter circuit configured to output a digital representation of an analog voltage; a selection circuit configured to select one of the analog input signals received at the circuit input; a buffer coupled to receive the selected one of the analog input signals; a filter coupled to the buffer having a filter output coupled to a sampling capacitor and including a resistor that is selectively series coupled to the sampling capacitor during a sampling period, responsive to a control signal, and configured to perform a first sample operation having a first time constant corresponding to the sampling capacitor and a second sample operation having a second time constant greater than the first time constant corresponding to the series coupled resistor and the sampling capacitor; and the sampling capacitor having an output coupled to the analog to digital converter.