Patent ID: 9537475
Date: 2017-01-03
CPC Classifications: H03K

Claim:
1. A method for dynamically updating a phase interpolator circuit module using an update control circuit module coupled to the phase interpolator circuit module, the method comprising: receiving, in the phase interpolator circuit module, a set of input clock phases including four input clock phases nominally spaced apart by 90 degrees; receiving, in the update control circuit module, a new phase interpolator code; receiving, in the update control circuit module, a phase interpolator update signal; generating, in the update control circuit module, a blanking signal in response to the phase interpolator update signal; stopping, by the update control circuit module, an old clock output signal of the phase interpolator circuit module after a last clock pulse of the old clock output signal in response to the blanking signal, the old clock output signal being characterized by an old phase interpolator code; updating, by the update control circuit module, a phase select multiplexer for a rising edge integrator in the phase interpolator circuit module according to the new phase interpolator code following a last rising edge of the old clock output signal; updating, by the update control circuit module, a phase select multiplexer for a falling edge integrator in the phase interpolator circuit module according to the new phase interpolator code after a last falling edge of the old clock output signal characterized by the old phase interpolator code; determining, in the update control circuit module, a phase jump code; releasing, by the update control circuit module, the blanking signal during a discharge time interval of the rising edge integrator, the releasing of the blanking signal being after a phase jump duration corresponding to the phase jump code; generating, in the phase interpolator circuit module, the new clock output signal after the releasing of the blanking signal.