Patent ID: 9715570
Date: 2017-07-25
CPC Classifications: G06F

Claim:
1. A computer-implemented method for generating a computer readable model of a via for performing computer based analysis of the via, the method comprising the steps of: receiving in memory a data structure containing a representation of an intended physical structure of the via having intersections with a first circuit layer and a second circuit layer, the data structure comprising at least one of: (i) a first pad dimension a determining by a processor, if only the first condition is true, if only the second condition is true, or if both the first and second conditions are true; selecting by the processor at least one model parameter based on the determination; computing by the processor an admittance parameter corresponding to a section of the via located between the first and second layers using the selected model parameter; and including the admittance parameter in the computer readable model of the via.