Patent ID: 9613888
Date: 2017-04-04
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a lead frame comprising a die pad and an electrode terminal; and at least one semiconductor chip bonded to a surface of said die pad via a die bond resin provided therebetween, wherein said lead frame excluding a bottom surface thereof and said semiconductor chip are sealed by a sealing resin, an unevenness is introduced only on a bonding interface between the surface of said die pad and said semiconductor chip, said unevenness is introduced on said bonding interface by forming an unevenness portion on the surface of said die pad, a projecting surface of said unevenness does not protrude beyond an upper lead frame surface of said lead frame, portions of said die bond resin are positioned in said unevenness, said die bond resin extends along an entire bottom surface of said semiconductor chip, and top surfaces of said unevenness are coplanar with top surfaces of portions of said die pad that are immediately adjacent to said electrode terminal.