Patent ID: 9564093
Date: 2017-02-07
CPC Classifications: G09G,H04N

Claim:
1. A liquid crystal display panel, comprising: multiple data lines; multiple scanning lines; multiple pixels, each pixel connected with a corresponding one of the data lines and a corresponding one of the scanning lines; and multiple control transistors; wherein, a gate electrode of each control transistor is connected with a same scanning line; a source electrode of each control transistor is connected with a corresponding one of the data lines; each of the control transistors has a drain electrode, and the drain electrodes are directly connected with each other; wherein, each of the multiple pixels comprises a pixel transistor, a storage capacitor, and a liquid crystal capacitor; a gate electrode of each pixel transistor is connected with a corresponding one of the scanning lines; a source electrode of each pixel transistor is connected with a corresponding one of the data lines; terminals of each storage capacitor and each liquid crystal capacitor are both connected with a drain electrode of each pixel transistor; the other terminals of each storage capacitor and each liquid crystal capacitor are both connected with a common electrode; and wherein, the multiple control transistors are disposed outside the multiple pixels; wherein, the drain electrode of each control transistor connects with a common electrode; wherein, in a blank time domain of a (2n)th frame, the multiple control transistors and the multiple pixel transistors are all turned on such that all data lines are connected with the common electrode through the multiple control transistors so as to display a black picture, wherein, n is a positive integer; and wherein, a scanning sequence of a (2n−1)th frame and a scanning sequence of the (2n)th frame are inverse such that a left eye can see a complete 3D image.