Patent ID: 9666569
Date: 2017-05-30
CPC Classifications: H01L

Claim:
1. A switch circuit comprising: first and second transistors; a source pad connected to a second node of the second transistor through a first signal path and connected to a gate node of the first transistor through a second signal path, a gate pad connected to a gate node of the second transistor through a third signal path; and a drain pad connected to a first node of the first transistor through a fourth signal path, wherein a second node of the first transistor and a first node of the second transistor are connected to each other through a fifth signal path, and wherein the gate node of the first transistor and the second node of the second transistor are connected to each other through a sixth signal path, wherein the second transistor comprises: wherein the first signal path comprises an interconnection connecting the source terminal of the second transistor and the source pad, and wherein the third signal path comprises an interconnection connecting the gate terminal of the second transistor and the source pad.