Patent ID: 9691731
Date: 2017-06-27
CPC Classifications: H01L

Claim:
1. A microelectronic package comprising: a substrate having a first region and a second region, the substrate having a first surface and a second surface remote from the first surface; at least one microelectronic element overlying the first surface within the first region and having contacts at a surface thereof; first electrically conductive elements exposed at at least one of the first surface and the second surface of the substrate within the second region, at least some of the first conductive elements being electrically connected to the at least one microelectronic element; first wire bonds having bases joined to respective ones of the first conductive elements, and end surfaces remote from the substrate and remote from the bases, each first wire bond defining an edge surface extending between the base and the end surface thereof; second wire bonds having bases joined to respective ones of the contacts of the microelectronic element, and end surfaces remote from the surface of the microelectronic element and remote from the bases, each second wire bond defining an edge surface extending between the base and the end surface thereof; and a dielectric encapsulation layer extending from at least one of the first or second surfaces and filling spaces between the first wire bonds and between the second wire bonds such that the first wire bonds and the second wire bonds are separated from one another by the encapsulation layer, the encapsulation layer overlying at least the second region of the substrate, wherein unencapsulated portions of the first wire bonds and the second wire bonds are defined by at least portions of the end surfaces of the first wire bonds and the second wire bonds that are uncovered by the encapsulation layer.