Patent ID: 9614817
Date: 2017-04-04
CPC Classifications: H04L,H04W

Claim:
1. An apparatus comprising: a memory; and a processor coupled to the memory and configured to: receive a certain frame from another apparatus, the certain frame including a first amount of time that has elapsed since a start-up time of the another apparatus, determine a first total amount of time by adding the first amount of time that has elapsed since the start-up time of the another apparatus and a second amount of time that has elapsed between reception of the certain frame and transmission of a first data frame to the another apparatus, when a second data frame transmitted from the another apparatus is received, determine a second total amount of time by adding the first amount of time that has elapsed since the start-up time of the another apparatus and a third amount of time that has elapsed since the certain frame was received, generate a first common key using the first total amount of time, encrypt the first data frame using the first common key, and transmit the encrypted first data frame to the another apparatus, and generate a second common key using the second total amount of time and decrypt the second data frame received from the another apparatus using the second common key.