Patent ID: 9564458
Date: 2017-02-07
CPC Classifications: G02F,H01L

Claim:
1. A manufacturing method of a thin film transistor (TFT) substrate, comprising: providing a substrate; forming a gate electrode on the substrate; forming a first insulation layer and an active layer on the gate electrode in turn; forming a first black matrix on the active layer; forming a source electrode and a drain electrode on the first black matrix; forming a second insulation layer on the source electrode and the drain electrode; forming a pixel electrode on the second insulation layer, the pixel electrode being electrically connected to the source electrode or the drain electrode via the second insulation layer; wherein the step of forming the gate electrode further comprises forming at least one scanning line on the substrate, the scanning line being arranged on the same layer with the gate electrode, and wherein the first insulation layer further covers the scanning line, and the active layer has not covered the scanning line; wherein the step of forming the first black matrix further comprises forming a second black matrix on the scanning line, and the second black matrix being arranged on the same layer with the first black matrix; wherein the step of forming the source electrode and the drain electrode on the first black matrix further comprises forming a capacitance electrode on the second black matrix, the capacitance electrode being arranged on the same layer with the source electrode and the drain electrode, wherein the second insulation layer further covers the capacitance electrode, and the pixel electrode being electrically connected to the capacitance electrode via the second insulation layer; and wherein the first black matrix and the second matrix are made by black resin material; the method further comprises: forming a photoresist layer between the pixel electrode and the second insulation layer; and forming an insulation protection layer between the photoresist layer and the pixel electrode; wherein the step of forming the photoresist layer between the pixel electrode and the second insulation layer further comprises forming a first contacting hole and a second contacting hole respectively in locations on the photoresist layer corresponding to the source or drain electrode and the capacitance electrode, wherein the second insulation layer being exposed by the first contacting hole, and the second contacting hole being passed through the second insulation layer such that the capacitance electrode being exposed; wherein the step of forming the insulation protection layer between the photoresist layer and the pixel electrode further comprises: forming the insulation protection layer within the first contacting hole and the second contacting hole; forming a third contacting hole within the insulation protection layer of the first contacting hole and the second contacting hole, the insulation protection layer within the second contacting hole being arranged on the second insulation layer, wherein the pixel electrode being electrically connected to the drain electrode or the source electrode via the third contacting hole, and the pixel electrode being electrically connected to the capacitance electrode via the second contacting hole.