Patent ID: 9679838
Date: 2017-06-13
CPC Classifications: G11C,H01L

Claim:
1. A microelectronic package, comprising: first and second microelectronic elements each having memory storage array function, each microelectronic element having one or more columns of element contacts, each column of element contacts extending in a first direction along a face of such microelectronic element; a substrate having first and second opposed surfaces and first and second opposed edges extending between the first and second surfaces, the first surface having first substrate contacts and second substrate contacts thereon, the first substrate contacts facing the element contacts of the first microelectronic element and joined thereto, and the second substrate contacts facing the element contacts of the second microelectronic element and joined thereto; and a plurality of terminals exposed at the second surface of the substrate and electrically connected with the first and second substrate contacts, the terminals being disposed at positions within a plurality of columns extending along the second surface of the substrate and being configured to connect the microelectronic package to at least one component external to the microelectronic package, the terminals including first and second duplicate sets of data terminals, the columns of the first and second duplicate sets of data terminals each extending in the first direction, wherein signal assignments of the first and second duplicate sets of data terminals are symmetric about an axis of symmetry extending in the first direction, the terminals further including other terminals disposed between the first and second duplicate sets of data terminals that are configured to carry signals other than the signals carried by the data terminals.