Patent ID: 9634673
Date: 2017-04-25
CPC Classifications: H02J,H03L

Claim:
1. A phase-locked loop circuit for controlling an output voltage of a power converter interfacing with a power distribution grid, comprising a phase detector configured to receive as an input the output voltage of the power converter; a feedback circuit for returning an output frequency or phase signal of the phase-locked loop circuit to the phase detector; and a signal alteration circuit configured to either wherein the phase-locked loop circuit is configured to provide the output frequency or phase signal to a current controller for adjusting the output voltage of the power converter, and wherein the periodically varying gain signal or the periodically varying phase delay is chosen such that when the power converter is connected to the grid, an output frequency of the power converter tracks the grid frequency by negative feedback of a signal in the phase-locked loop circuit and when the power converter is disconnected from the grid the output frequency of the power converter is driven away from the grid frequency by positive feedback of a signal in the phased-lock loop circuit.