Patent ID: 9740559
Date: 2017-08-22
CPC Classifications: G06F,H03M

Claim:
1. A system for accessing a flash memory device, the system comprising: a data read circuit operable to compare voltages read from a set of M groups of N flash memory cells with a first threshold value to yield a binary output set, wherein the binary output set includes a set of M groups of N binary values, and wherein M and N are integers; a compaction based partial decoder circuit operable to compact a subset of the M groups of N binary values to yield a compacted output, wherein the compacted output is represented in fewer bits than a number of bits used to represent the subset of the M groups of N binary values; and a first data decoding circuit operable to generate at least one soft data value based upon the compacted output, wherein the soft data value corresponds to an element of a given codeword represented by the M groups of N binary values.