Patent ID: 9653464
Date: 2017-05-16
CPC Classifications: H01L

Claim:
1. A method for forming a semiconductor device, the method comprising: forming one or more fin structures on a semiconductor substrate, wherein the fin structure defines a source and drain region; forming a gate stack in contact with the fin structure; depositing a first contact insulator layer on the substrate; applying a first etching process to remove exposed portions of the first contact insulator layer, adjacent to the fin structure, to form a trench in the first contact insulator layer that extends to the source region; depositing an epitaxial lower band gap source material into the trench and extending to the source region; depositing a second contact insulator layer on the substrate; applying a second etching process to remove exposed portions of the second insulator layer, adjacent to the fin structure, to form a trench in the second contact insulator layer that extends to the source and drain regions; and depositing a metalizing material over the substrate.