Patent ID: 9640101
Date: 2017-05-02
CPC Classifications: G09G

Claim:
1. A display apparatus, comprising: a display panel where display elements connected to a scanning line and a signal line are arrayed in a two dimensional matrix, and a driving circuit unit configured to drive the display panel, the driving circuit unit including a gate driver configured to feed a scanning signal to the scanning line such that a back gate voltage of a field effect transistor configuring an output buffer for generating the scanning signal is controllable, wherein the output buffer includes a first transistor and a second transistor, a source/drain region of the first transistor is connected to a source/drain region of the second transistor, a first voltage is applied to another source/drain region of the first transistor, a second voltage is applied to another source/drain region of the second transistor, a back gate voltage of the first transistor and a back gate voltage of the second transistor are controllable based on temperature information of the gate driver.