Patent ID: 9565015
Date: 2017-02-07
CPC Classifications: H03L,H04L

Claim:
1. A signal reproduction circuit comprising: an oscillator configured to generate a frequency-variable first clock and a second clock having a frequency the same as a frequency of the first clock and having a phase different from a phase of the first clock; and a feedback circuit configured to control the oscillator in accordance with a phase relation and a frequency relation between input data and the first clock such that the input data and the first clock synchronize with each other, wherein the feedback circuit includes: a controller configured to control the oscillator in accordance with the phase relation between the input data and the first clock, a first phase detection circuit configured to generate a clock phase control signal in accordance with the phase relation between the input data and the first clock, a second phase detection circuit configured to generate a clock phase detection signal in accordance with a phase relation between the input data and the second clock, a frequency-phase detection circuit configured to compare the clock phase control signal and the clock phase detection signal and generate a frequency phase signal indicating the frequency relation between the input data and the first clock, a state detection circuit configured to detect, using the clock phase detection signal or the frequency phase signal, a lock state in which falling edges or rising edges of the input data and the first clock synchronize with each other and a frequency difference state in which frequencies of the input data and the first clock are different from each other, and a selector configured to switch between supplying the frequency phase signal to the controller in the frequency difference state and not supplying the frequency phase signal to the controller in the lock state.