Patent ID: 9673325
Date: 2017-06-06
CPC Classifications: H01L

Claim:
1. A method for forming a semiconductor device, comprising: forming a fin structure of a first semiconductor material on a substrate, the fin structure comprising a source region, a drain region, and a channel region between the source and drain regions, the source and drain regions each having a first height, a first width, and a first length; forming a gate structure overlying the channel region; removing an outer portion of the first semiconductor material from a top surface, from first and second side surfaces opposite to each other, and from an end surface of the source region or the drain region to form a reduced source region or a reduced drain region having a second height smaller than the first height, a second width smaller than the first width, and a second length smaller than the first length; and forming a layer of a second semiconductor material on the top surface, the first and second side surfaces, and the end surface of the reduced source region or the reduced drain region.