Patent ID: 9590071
Date: 2017-03-07
CPC Classifications: H01L

Claim:
1. A manufacturing method of a semiconductor device, comprising: (a) forming a first nitride semiconductor layer over a substrate; (b) forming a second nitride semiconductor layer whose electron affinity is smaller than that of the first nitride semiconductor layer over the first nitride semiconductor layer; (c) forming an insulating film over the second nitride semiconductor layer; (d) forming a trench which penetrates the insulating film and the second nitride semiconductor layer and reaches inside of the first nitride semiconductor layer by etching the insulating film, the second nitride semiconductor layer, and the first nitride semiconductor layer; (e) forming a third nitride semiconductor layer over a side surface and a bottom surface of the trench by using an epitaxial growth method; (f) forming a gate insulating film over the third nitride semiconductor layer, and (g) forming a gate electrode over the gate insulating film, wherein a film thickness of the third nitride semiconductor layer formed in the step (e) over the side surface of the trench is smaller than a film thickness of the third nitride semiconductor layer over the bottom surface of the trench.