Patent ID: 9583592
Date: 2017-02-28
CPC Classifications: H01L

Claim:
1. A method of manufacturing a semiconductor device, the method comprising: forming a dummy gate structure on a substrate; forming a spacer layer on the substrate to cover the dummy gate structure; subsequently performing an implantation process comprising implanting impurities into an upper portion of the substrate using the dummy gate structure as a mask to thereby form an impurity region of the substrate adjacent to the dummy gate structure; subsequently nitriding the spacer layer; etching the nitrided spacer layer to form a spacer on a side surface of the dummy gate structure; forming a trench in the substrate by removing an upper portion of the substrate adjacent to the dummy gate structure; cleaning an interior surface that defines the trench; forming an epitaxial layer in the trench; and replacing the dummy gate structure with a gate structure.