Patent ID: 9647645
Date: 2017-05-09
CPC Classifications: H03K

Claim:
1. A low voltage to high voltage level translator, comprising: a first transistor of a first conductivity type having a first current terminal coupled to a first supply voltage, having second current terminal, and having a control terminal coupled to a first output node; a second transistor of said first conductivity type having a first current terminal coupled to said first supply voltage, having second current terminal, and having a control terminal coupled to a second output node; a first resistor having a first terminal coupled to said second current terminal of said first transistor of said first conductivity type, and having a second terminal coupled to said second output node; a second resistor having a first terminal coupled to said second current terminal of said second transistor of said first conductivity type, and having a second terminal coupled to said first output node; a first input stage of a second conductivity type having a first current terminal coupled to a second supply voltage, having a second current terminal coupled to said second output node, and having a control terminal coupled to a first input node; a second input stage of said second conductivity type having a first current terminal coupled to said second supply voltage, having a second current terminal coupled to said first output node, and having a control terminal coupled to a second input node; wherein said first input stage comprises a first transistor of said second conductivity type and wherein said second input stage comprises a second transistor of said second conductivity type; and wherein said first and second transistors of said second conductivity type each have a width to length dimension ratio that depends only on a threshold voltage of said first and second transistors of said first conductivity type and a resistance of said first and second resistors.