Patent ID: 9685541
Date: 2017-06-20
CPC Classifications: H01L

Claim:
1. A method for forming a semiconductor structure, at least comprising the following steps: providing a substrate, a fin structure disposed on the substrate, and a gate structure crossed over parts of the fin structure, an inner spacer formed on two sidewalls of the gate structure, wherein the inner spacer covers a top surface of the fin structure; performing a pull down process on the fin structure to remove parts of a top portion and parts of a sidewall portion of the fin structure, wherein after the pull down process is performed, the top surface of the fin structure which is not covered by the gate structure is defined as a second top surface, and a space is then formed between the second top surface and a bottom surface of the inner spacer; and forming an outer spacer, at least covering the second top surface and filling in the space.