Patent ID: 9672905
Date: 2017-06-06
CPC Classifications: G06F,G11C

Claim:
1. A storage system, comprising: a plurality of storage nodes having solid-state memory, each storage node of the plurality of storage nodes configurable to write data across the plurality of storage nodes using erasure coding, each portion of data having a plurality of data bits and one or more parity bits; and each storage node of the plurality of storage nodes configurable to identify portions of the solid-state memory having a first access rate and portions of the solid state memory having a second access rate, the first access rate faster than the second access rate; and each storage node of the plurality of storage nodes configurable to write the data bits to the portions of the solid-state memory having the first access rate and write the one or more parity bits to the portions of the solid-state memory having the second access rate.