Patent ID: 9735276
Date: 2017-08-15
CPC Classifications: H01L

Claim:
1. A non-planar transistor comprising: a fin comprising a top surface and sidewalls, the fin comprising a first portion, a second portion, and a third portion disposed between the first and the second portion, the first portion comprising a first source/drain region, the second portion comprising a second source/drain region, the third portion comprising a channel region; an epitaxial semiconductor layer on the top surface and sidewalls of the fin on opposing sides of the third portion, the epitaxial semiconductor layer having a first doping profile; a dopant rich semiconductor layer having a second doping profile disposed over the epitaxial semiconductor layer, the dopant rich semiconductor layer comprising a first conductivity type, the first doping profile different than the second doping profile, the dopant rich semiconductor layer disposed over the first portion and the second portion; the channel region comprising a second conductivity type opposite the first conductivity type; and a silicide layer disposed on a top surface and sidewalls of the dopant rich semiconductor layer, wherein the silicide layer is adjacent to the dopant rich semiconductor layer.