Patent ID: 9716039
Date: 2017-07-25
CPC Classifications: B23K,B28D,H01L

Claim:
1. A wafer processing method for processing a wafer including a substrate and a functional layer formed on a front side of said substrate, said functional layer being formed with a plurality of crossing division lines and a plurality of devices individually formed in a plurality of separate regions defined by said crossing division lines, said wafer having a device area where said devices are formed and a peripheral marginal area surrounding said device area, said wafer processing method comprising: a protective tape attaching step of attaching a protective tape curable by an external stimulation to a front side of said functional layer; a cut groove forming step of cutting said substrate from a back side thereof along each division line by using a cutting blade after performing said protective tape attaching step, thereby forming a cut groove having a depth not reaching said functional layer with a part of said substrate left between a bottom of said cut groove and said functional layer; and a dividing step of applying a laser beam having an absorption wavelength to said substrate along said cut groove after performing said cut groove forming step, thereby dividing said part of said substrate left between the bottom of said cut groove and said functional layer to divide said wafer into a plurality of device chips; wherein in said cut groove forming step, an uncut portion in which said cut groove is not formed is left in said peripheral marginal area of said wafer.