Patent ID: 9735164
Date: 2017-08-15
CPC Classifications: B82Y,H01L,Y10S

Claim:
1. A method for forming a device comprising: providing a substrate prepared with at least a first region for accommodating an anti-fuse based memory cell; forming a fin structure in the first region, the fin structure comprises top and bottom fin portions and comprises channel and non-channel regions defined along the length of the top fin portion; forming an isolation layer on the substrate, wherein the isolation layer has a top isolation surface disposed below a top fin surface, leaving the top fin portion exposed; performing one or more etch processes on at least a portion of the exposed top fin portion to form a sharpened tip profile in at least the channel region of the fin structure, wherein the sharpened tip profile is defined by the one or more etch processes; and forming a gate having a gate dielectric and a metal gate electrode over the substrate, wherein the gate wraps around the channel region of the fin structure, and the gate dielectric covers the sharpened tip profile of the fin structure.