Patent ID: 9713274
Date: 2017-07-18
CPC Classifications: G06F,H01H,H05K

Claim:
1. An electronic apparatus comprising: a housing configured to have: (i) an inner layer portion having first and second spaced apart surfaces, the second surface of the inner layer portion forming an inner surface of the housing, and (ii) an outer layer portion having first and second spaced apart surfaces, the first surface of the outer layer portion forming an outer surface of the housing, wherein the inner layer portion and the outer layer portion are formed by primary and secondary molding steps such that the inner layer portion and the outer layer portion are in a multi-layer, configuration in which a substantial portion of the first surface of the inner layer portion is in contact with, and is adhered to, the second surface of the outer layer portion; at least one recess disposed within the inner surface of the housing, the at least one recess characterized by a region in which the inner layer portion is one of not formed and thinner than other regions of the inner layer portion; and a component disposed in the housing and located such that at least a portion thereof is located within the recess.