Patent ID: 9634118
Date: 2017-04-25
CPC Classifications: H01L

Claim:
1. A method for fabricating a semiconductor device, the method comprising: forming an interlayer insulation film on a substrate, the interlayer insulation film comprising a first trench therein and a second trench therein that are spaced apart from each other; conformally forming a first dielectric film in the first trench and a second dielectric film in the second trench; forming a first conductive film on the first dielectric film and a second conductive film on the second dielectric film; forming a first shield film on the first conductive film and a second shield film on the second conductive film; performing annealing after the forming of the first and second shield films; removing the first and second shield films and the first conductive film after performing the annealing; forming a third conductive film on the first dielectric film and a fourth conductive film on the second conductive film; and forming a first gate metal on the third conductive film and a second gate metal on the fourth conductive film.