Patent ID: 9640458
Date: 2017-05-02
CPC Classifications: H01L

Claim:
1. A stacked microelectronic device, comprising: a first interposer substrate having a first side and a second side facing away from the first side; a microelectronic die having an active side and a backside, wherein the microelectronic die includes a plurality of terminals arranged in an array on the active side, and wherein the backside is attached to the first side of the first interposer substrate, and wherein the microelectronic die has a first lateral surface; a plurality of interconnect elements positioned corresponding to and electrically coupled to the plurality of terminals; a second interposer substrate having a first side facing away from the microelectronic die, a second side facing the microelectronic die, a plurality of contacts on the second side corresponding to the plurality of terminals, and a circuitry extending through the second interposer and electrically coupled to the contacts on the second side, and wherein the microelectronic die is positioned between the first and second interposer substrates, and wherein the first interposer substrate is electrically coupled to the microelectronic die via the plurality of terminals, the plurality of contacts of the second interposer substrate, the plurality of interconnect elements, and the circuitry through the second interposer, and wherein the second interposer substrate has a second lateral surface; and an underfill material positioned between the microelectronic die and the second interposer substrate, wherein the underfill material at least partially bears stress between the microelectronic die and the second interposer substrate, wherein the underfill material is formed with an outmost surface, and wherein the outmost surface is substantially flush with the first lateral surface and the second lateral surface.