Patent ID: 9549204
Date: 2017-01-17
CPC Classifications: H04N

Claim:
1. A video decoding apparatus comprising: a processor to determine whether to apply a first filter to a reference pixel value of a current block based on an intra prediction mode of the current block and a size of the current block, to derive a prediction value of the current block using the reference pixel value derived according to whether to apply the first filter, and to apply a second filter to the prediction value based on the intra prediction mode of the current block and the size of the current block, for thereby producing a filtered prediction value, wherein the first filter is used for the reference pixel value and the second filter is used for the prediction value, wherein the reference pixel value is used for the intra prediction mode and corresponds to at least one of an upper position, an upper-right position, an upper-left position and a left position of the current block, wherein when the intra prediction mode of the current block is a DC mode, the processor applies the second filter to prediction pixels of the current block adjacent to a boundary of the reference pixel value, wherein when the intra prediction mode of the current block is the DC mode, the processor applies the second filter to top pixels of the current block and leftmost pixels of the current block, wherein when the second filter is applied, the processor selectively applies a 3-tap filter or a 2-tap filter according to positions of the prediction pixels adjacent to the boundary of the reference pixel value, wherein when the second filter is applied, the processor applies a 3-tap filter to a top leftmost pixel of the current block among the prediction pixels of the current block adjacent to the boundary of the reference pixels and applies a 2-tap filter to remaining pixels among the prediction pixels of the current block adjacent to the boundary of the reference pixels, except for the top leftmost pixel of the current block.