Patent ID: 9673161
Date: 2017-06-06
CPC Classifications: H01L

Claim:
1. A method of manufacturing a semiconductor device comprising: receiving a first contact post on a first substrate, wherein the first contact post has a first elongated shape, a first sidewall, and a second sidewall opposite the first sidewall; and receiving a passivation layer over a second substrate, the passivation layer comprising an opening that exposes a conductive region, the opening having a third sidewall and a fourth sidewall opposite the third sidewall, wherein the third sidewall and the fourth sidewall enclose a central region; and electrically connecting the first contact post and the conductive region, wherein after the electrically connecting the first contact post and the conductive region the first sidewall is directly over the central region and the second sidewall is offset from the central region in a direction parallel with a major surface of the first substrate.