Patent ID: 9711635
Date: 2017-07-18
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a first semiconductor layer that has a first conductivity type and is formed at a surface of a semiconductor substrate; an insulating layer that is formed on the surface of the semiconductor substrate; a first electrode that is electrically connected to the first semiconductor layer; a second semiconductor layer that has a second conductivity type opposite to the first conductivity type and is formed from a first region, which is adjacent to the first semiconductor layer in the semiconductor substrate in a depth direction perpendicular to the surface of the semiconductor substrate, to a second region, which is in contact with the surface of the semiconductor substrate and is adjacent to the first semiconductor layer in one direction parallel to the surface of the semiconductor substrate; a second electrode that is formed above a part of the second semiconductor layer, which is exposed to the insulating layer at the surface of the semiconductor substrate, with the insulating layer interposed therebetween; a third semiconductor layer that has the first conductivity type and is formed from a third region, which is adjacent to the second semiconductor layer in the depth direction, to a fourth region, which is in contact with the surface of the semiconductor substrate and is adjacent to the second semiconductor layer in the one direction; a fourth semiconductor layer that has the first conductivity type with an impurity concentration higher than that of the third semiconductor layer and is formed from a fifth region, which is adjacent to the third semiconductor layer in the depth direction, to a sixth region, which is in contact with the surface of the semiconductor substrate and is adjacent to the third semiconductor layer in the one direction; a third electrode that is electrically connected to the fourth semiconductor layer at a position closer to a back surface of the semiconductor substrate than an end portion of the third semiconductor layer on a back surface side of the semiconductor substrate in the depth direction; and a conductor that is separated from the second electrode in the one direction, is formed above a part of the third semiconductor layer, which is exposed to the insulating layer at the surface of the semiconductor substrate, with an insulating layer interposed therebetween, and is kept at the same potential as the first electrode, wherein the third semiconductor layer includes a first impurity region, which is in contact with the surface of the semiconductor substrate and is separated from the second semiconductor layer in the one direction, and a second impurity region, a part of which is in contact with the surface of the semiconductor substrate and is provided between the second region of the second semiconductor layer and the first impurity region, wherein the first impurity region has an impurity concentration higher than an impurity concentration of the second impurity region, and wherein a width of the second electrode in the one direction is less than a width of the first impurity region in the one direction.