Patent ID: 9626112
Date: 2017-04-18
CPC Classifications: G06F

Claim:
1. A device comprising: a first processor; a multimedia card memory (“eMMC”); a second processor; a client eMMC interface between the second processor and the first processor; a host eMMC interface between the second processor and the eMMC; an NVRAM (“Non-Volatile Random Access Memory”) in communication with the second processor, the second processor configured to manage data storage to the eMMC and the NVRAM so that the eMMC and the NVRAM appears as a single storage device to the first processor; a third processor; and a second client eMMC interface between the second processor and the third processor, each of the client eMMC interface and the second client eMMC interface comprising a respective interrupt line between the second processor and a respective one of the first processor and the third processor, the second processor further configured to: