Patent ID: 9721526
Date: 2017-08-01
CPC Classifications: G09G,H03K

Claim:
1. A display driver comprising: a level shift circuit ( a high voltage supply node (VE a first load circuit and a second load circuit ( a first current supply node (VE a second current supply node (VE a first output terminal (VOB) configured to output the first output signal; and a second output terminal (VO) configured to output the second output signal, wherein the first P-channel MOS transistor is coupled between the high voltage supply node and the first output terminal, wherein the second P-channel MOS transistor is coupled between the high voltage supply node and the second output terminal, wherein the gate of the first P-channel MOS transistor is coupled to the second output terminal via the first load circuit, wherein the gate of the second P-channel MOS transistor is coupled to the first output terminal via the second load circuit, and wherein in the output stable state, both the first P-channel MOS transistor and the second P-channel MOS transistor turn off by charging operations of the first load circuit and the second load circuit respectively.