Patent ID: 9595592
Date: 2017-03-14
CPC Classifications: H01L

Claim:
1. A method of forming contact silicide for a semiconductor structure, the method comprising: forming a dielectric layer over a p-type region of a semiconductor structure comprising a gate stack and source and drain regions, the source and drain regions being formed within a semiconductor layer; forming a first contact trench and a second contact trench within the dielectric layer exposing at least a portion of the source region and a portion of the drain region, respectively; forming a first metal layer within the first and second contact trenches; forming a second metal layer in contact with the first metal layer, the second metal layer comprising a metallic material that is different from a metallic material of the first metal layer; intermixing the metallic materials of the first and second metal layers in a lower region of the first and second contact trenches, the intermixing forming an intermixed metallic material from the first and second metal layers; and forming a silicide within the source and drain regions from the semiconductor layer and the intermixed metallic material.