Patent ID: 9577091
Date: 2017-02-21
CPC Classifications: H01L

Claim:
1. A vertical transistor comprising; a patterned metal oxide layer formed above a substrate, wherein the patterned metal oxide layer comprises a first patterned conductive layer and a first patterned insulator layer; a patterned metal layer formed on the first patterned insulator layer, wherein the patterned metal layer comprises: a semiconductor layer; and a third patterned conductive layer, wherein the semiconductor layer is interposed between the patterned metal oxide layer and the third patterned conductive layer; wherein the first patterned conductive layer and the first patterned insulator layer are made by using a single metal oxide material, and the oxygen concentration of the first patterned conductive layer is different from the oxygen concentration of the first patterned insulator layer; wherein the patterned metal oxide layer further comprises: