Patent ID: 9570116
Date: 2017-02-14
CPC Classifications: G11C,H01L

Claim:
1. A semiconductor device comprising a first circuit, the first circuit comprising a first input terminal, a first output terminal, a first transistor, and a second circuit, and the second circuit comprising a second to a (2n+1)th transistor, a first to an n-th capacitor, a first to an n-th wiring, a first gate wiring, and a first to an n-th storage node (n is an integer of 2 or more), wherein a gate of the 2i-th transistor is electrically connected to the first gate wiring (i is an integer of 1 to n), wherein a first terminal of the 2i-th transistor is electrically connected to a gate of the (2i+1)th transistor and a first terminal of the i-th capacitor through the i-th storage node, wherein the first wiring is electrically connected to a second terminal of the first transistor, wherein the i-th wiring is electrically connected to a second terminal of the 2i-th transistor, wherein the first input terminal is electrically connected to a first terminal of the first transistor, wherein a second terminal of the first transistor is electrically connected to a first terminal of the third transistor, wherein a second terminal of a (2i−1)th transistor is electrically connected to a first terminal of the (2i+1)th transistor, and wherein a second terminal of the (2n+1)th transistor is electrically connected to the first output terminal.