Patent ID: 9552003
Date: 2017-01-24
CPC Classifications: G05F,H02M,H03F,H03G,H03K,H03M

Claim:
1. A circuit for generation of a reference voltage for an electronic system, which circuit comprises at least one digital buffer (U 21 , U 31 , U 32 , U 41 , U 51 ), a low pass filter (R 21 , C 21 ; R 31 , C 31 ; R 41 , C 41 ; R 51 , C 51 ) and an operational amplifier (OA 21 , OA 31 , OA 41 , OA 51 ), which circuit is adapted to revive an input in the form of a bandgap reference voltage into the digital buffer, which digital buffer is adapted to receive a digital input from a Pulse Width Modulated (PWM) signal, which digital buffer is adapted to generate an output signal adapted to be fed to the low pass filter, which output signal after filtration is adapted to be fed to a positive input terminal of the operational amplifier, which operational amplifier comprises a feedback circuit, which feedback circuit comprises at least one capacitor (C 22 , C 32 , C 44 , C 54 ) adapted to be connected from an output terminal of the operational amplifier towards a negative input terminal of the operational amplifier so as to form an integrator, whereby the feedback circuit further comprises at least one chopped signal path (R 22 , S 21 ; R 33 , R 34 , S 32 ; R 33 , R 35 , C 35 , S 31 ), which chopped signal is adapted to be modulated by the output signal of the digital buffer.