Patent ID: 9704987
Date: 2017-07-11
CPC Classifications: H01L

Claim:
1. A manufacturing method of a lateral double diffused metal oxide semiconductor (LDMOS) device, comprising: providing a P-type substrate, which has an upper surface and a lower surface opposite to each other in a vertical direction; forming an epitaxial layer on the P-type substrate, wherein the epitaxial layer is in direct contact with the upper surface and has an epitaxial layer surface opposite to the upper surface in the vertical direction; forming a P-type high voltage well in the epitaxial layer, wherein the P-type high voltage well is in direct contact with the upper surface of the P-type substrate; forming a P-type body region in the epitaxial layer and on the P-type high voltage well, the P-type body region being formed between and connecting the P-type well and the epitaxial layer surface, wherein the P-type body region includes a peak concentration region which has a highest P-type impurity concentration in the P-type body region, and the peak concentration region being in direct contact with and beneath the epitaxial layer surface; forming an N-type well in the epitaxial layer, wherein the N-type well is in direct contact with and beneath the epitaxial layer surface in the vertical direction, and is adjacent to the P-type body region in a lateral direction; forming an isolation oxide region on the epitaxial layer to define an operation region; forming a drift oxide region in the operation region and on the epitaxial layer, wherein the drift oxide region is in direct contact with the N-type well in the vertical direction; forming a gate on the epitaxial layer in the operation region and on or above the epitaxial layer, wherein the gate overlays at least part of the drift oxide region, part of the N-type well and part of the P-type body region, and part of the gate is in direct contact with the epitaxial layer; forming an N-type contact region in the P-type body region, wherein the N-type contact region is in direct contact with and beneath the epitaxial layer surface in the vertical direction; forming a P-type contact region in the P-type body region, wherein the P-type contact region is in direct contact with and beneath the epitaxial layer surface in the vertical direction, and is adjacent to the N-type contact region in the lateral direction; forming an top source on the epitaxial layer, wherein the top source is in direct contact with the N-type contact region and the P-type contact region in the vertical direction; forming a bottom source beneath the lower surface of the P-type substrate, wherein the bottom source is in direct contact with and beneath the lower surface in the vertical direction; and forming an N-type drain in the N-type well, wherein the N-type drain is in direct contact with and beneath the epitaxial layer surface, and the N-type drain is located between the drift oxide region and the isolation oxide region; wherein part of the P-type body region is located beneath the N-type contact region and the P-type contact region in the vertical direction, wherein the peak concentration region is not located below the N-type contact region and the P-type contact region in the vertical direction, and the peak concentration region is adjacent to the N-type contact region in the lateral direction; wherein a conductive current flows from the N-type drain to the bottom source in a normal operation when the LDMOS device is turned ON.