Patent ID: 9620509
Date: 2017-04-11
CPC Classifications: G11C,H01L

Claim:
1. A static random access memory (SRAM) device including an SRAM array comprising a plurality of SRAM cells arranged in a matrix along a row direction and a column direction, wherein: each of the SRAM cells includes six vertical field effect transistors (VFETs), the SRAM array includes a plurality of groups of conductive regions extending in the column direction, each of the plurality of groups of conductive regions includes a first conductive region, a second conductive region, a third conductive region and a fourth conductive region arranged in this order in the row direction, the first to fourth conductive regions being separated by insulating regions from each other, the first, second and third conductive regions are coupled to sources of first conductive type VFETs, and the fourth conductive region is coupled to sources of second conductive type VFETs, and the plurality of groups of conductive regions are arranged in the row direction such that the fourth conductive region of one group of conductive regions is adjacent to the first conductive region of adjacent one group of conductive regions.