Patent ID: 9684923
Date: 2017-06-20
CPC Classifications: G06Q,H02J,H04L

Claim:
1. First and second circuits, each respectively terminating an end of at least one twisted pair of wires for simultaneously exchanging a plurality of bidirectional information signals, each bidirectional information signal being on a separate and distinct frequency between a terminal and a server, with the first circuit being a circuit of said terminal and said second circuit being a complimentary circuit to the first circuit and linked to said server; both said first and second circuits terminate said twisted pair of wires via one of a balanced/unbalanced and differential signal processors, each of the circuits modulate and demodulate at least one of more than two of the bidirectional information signals individually and simultaneously, said bidirectional information signals being synchronously controlled by timing protocols and synchronizing signals generated by a CPU of each of said circuits, the synchronizing signals being exchanged via at least one of said bidirectional information signals between I/O ports of the CPUs of said first and second circuits; each said bidirectional information signal transacts processing and data streams propagated at a distinct one of a higher and a lower speed, modulated by distinctly different modulation medium onto one of a plurality of higher and lower carrier frequencies respectively, for separating said simultaneously propagated signals from each other on the basis of said carrier frequency of each bidirectional information signal.