Patent ID: 9690602
Date: 2017-06-27
CPC Classifications: G06F

Claim:
1. A computer-implemented method for programming and verifying backplane controller chip firmware on a plurality of target backplane controller chips, comprising one or more of following operations: connecting a backplane controller chip validation board to a host computer with a Universal Serial Bus (USB) communication link, wherein the backplane controller chip validation board has installing at least one target backplane controller chip to be validated on one of a plurality of target backplane controller chip sockets; receiving backplane controller chip firmware from the host computer; programming the target backplane controller chip to be validated with the backplane controller chip firmware from the host computer; configuring the backplane simulator for verifying the functions of the target backplane controller chip firmware; sending verifying commands and control data from the host computer to the backplane controller chip validation board to validate the functions of the backplane controller chip firmware programmed on the target backplane controller chip; and sending results of the verification back to the host computer.