Patent ID: 9666681
Date: 2017-05-30
CPC Classifications: H01L

Claim:
1. A silicon carbide semiconductor device comprising: a silicon carbide substrate including a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer, said first semiconductor layer having a first conductivity type, said second semiconductor layer being provided on said first semiconductor layer, said second semiconductor layer having a second conductivity type, said third semiconductor layer being provided on said second semiconductor layer, said third semiconductor layer being separated from said first semiconductor layer by said second semiconductor layer, said third semiconductor layer having said first conductivity type, said silicon carbide substrate being provided with a trench, said trench including a bottom surface and a side wall surface, said bottom surface being constituted of said first semiconductor layer, said side wall surface having first to third side surfaces respectively constituted of said first to third semiconductor layers; a gate insulating film provided on said trench, said gate insulating film having a first insulating film and a second insulating film, said first insulating film directly covering each of said side wall surface and said bottom surface, said second insulating film being provided on said first insulating film, said first insulating film having a first bottom portion and a first side wall portion, said first bottom portion being located on said bottom surface, said first side wall portion being located on said side wall surface, said first side wall portion having first to third regions respectively located on said first to third side surfaces, said second insulating film having a second bottom portion and a second side wall portion, said second bottom portion being located on said first bottom portion, said second side wall portion being located on said first side wall portion, said second side wall portion having one end and an other end, said one end being connected to said second bottom portion, the other end being located on one of said first and second regions, the other end being separated from said third region; and a gate electrode provided on said trench with said gate insulating film being interposed therebetween.