Patent ID: 9706207
Date: 2017-07-11
CPC Classifications: H04N

Claim:
1. A decoding device comprising: at least one processor; and non-transitory storage coupled to the at least one processor; wherein the at least one processor is configured to perform the following: wherein when the size of the sub-block is a first size which is smaller than the size of the block, the selecting selects the second probability table, wherein when the size of the sub-block is a second size which is smaller than the first size, the selecting selects the second probability table, wherein when the size of the sub-block is smaller than a maximum size of the sub-block, the selecting selects the second probability table, the maximum size of the sub-block being indicated in the bitstream, wherein switching is performed between decoding conforming to a first codec standard and decoding conforming to a second codec standard according to an identifier which is included in the bitstream and indicates the first codec standard or the second codec standard, the second codec standard being different from the first codec standard, and wherein the decoding the image on the block-by-block basis is performed as the decoding conforming to the first codec standard when the identifier indicates the first codec standard.