Patent ID: 9627502
Date: 2017-04-18
CPC Classifications: H01L

Claim:
1. A method of forming a circuit arrangement, comprising: forming, in a semiconductor substrate, a doped region of a first conductivity type extending from a first surface of the semiconductor substrate to an opposite second surface of the semiconductor substrate, comprising a first doped region extending from the first surface into the semiconductor substrate and a first electrode of a capacitor extending from the second surface into the semiconductor substrate; forming a dielectric layer over the first electrode on the second surface extending from the second surface away from the semiconductor substrate; forming a conductive region over the dielectric layer, thereby forming a second electrode of the capacitor opposite the first electrode; forming at least one semiconductor device monolithically integrated in the semiconductor substrate, wherein the at least one semiconductor device is a second capacitor, comprising: a first electrode comprising a doped region of a second conductivity type forming at least part of the second surface; a dielectric formed over the first electrode of the second capacitor; a second electrode formed over the dielectric of the second capacitor; and an electrical contact formed over the second surface and electrically connected to the first electrode of the second capacitor.