Patent ID: 9654130
Date: 2017-05-16
CPC Classifications: H03M

Claim:
1. An analog-to-digital converter comprising: a sample and hold circuit configured to sample an analog input signal to generate a plurality of bits; a first analog-to-digital converter configured to generate a first digital signal based on the analog input signal, comprising a second analog-to-digital converter configured to generate a second digital signal based on an output of the first analog-to-digital converter, wherein the second analog-to-digital converter comprises a delta sigma digital-to-analog converter, wherein the delta sigma digital-to-analog converter is configured to convert a second least significant bit of the plurality of bits, wherein the second digital signal is generated based on an output of the delta sigma digital-to-analog converter, and wherein the second analog-to-digital converter is a fine conversion analog-to-digital converter relative to the first analog-to-digital converter; and a combination circuit configured to combine the first digital signal and the second digital signal to provide a resultant output signal.