Patent ID: 9742595
Date: 2017-08-22
CPC Classifications: H03M,H04L

Claim:
1. A reception apparatus, comprising: a fast Fourier transform processor that converts a received time signal into a frequency signal; a pilot subcarrier extractor that extracts pilot subcarriers from the frequency signal; a channel estimator that estimates a channel between transmission and reception by performing a linear interpolation process on a pilot subcarrier extraction signal extracted by the pilot subcarrier extractor; an equalizer that performs equalization using the frequency signal and a result of the channel estimator; a bit log-likelihood ratio calculator that calculates bit log likelihood ratios from an output of the equalizer; a deinterleaver that rearranges the bit log-likelihood ratios in original order, the deinterleaver making a pair with an interleave section that rearranges the bit log-likelihood ratios in a predetermined order on a transmission side; a soft-in soft-out decoder that performs error correction in manner of soft-in soft-out on an output of the deinterleaver; an interleaver that rearranges an encoded bit log-likelihood ratios, in the predetermined order same as the transmission side, out of an output of a section of the soft-in soft-out error correction; a soft symbol calculator that generates a soft symbol from an output of the interleaver; a hard decision processor that performs a hard decision on the generated soft symbol; and a reliability evaluator that generates reliability information from the encoded bit-log likelihood ratio of the output of the interleaver.