Patent ID: 9747252
Date: 2017-08-29
CPC Classifications: G06F

Claim:
1. A method for use in coding a hardware source code in Hardware Description Language (HDL, hereafter) for an integrated circuit of wave-pipelining, the method comprising: coding a first code component in HDL, HDL being selected from a group comprising VHDL, Verilog and System Verilog, and the first code component being synthesized to generate a first logic block of the integrated circuit; coding a second code component in HDL, the second code component being interconnected with the first code component, and the second code component being synthesized to generate a second logic block of the integrated circuit; and coding one of a plurality of new concurrent link statements in HDL, the link statement identifying both the first code component and the second code component based on a dual code component property of the integrated circuit, the link statement in combination with the first code component and the second code component forming a standard wave-pipelining ready code, and the standard wave-pipelining ready code triggering a synthesis tool to generate a circuit as the integrated circuit of wave-pipelining instead of a normal pipeline circuit.