Patent ID: 9685525
Date: 2017-06-20
CPC Classifications: H01L

Claim:
1. A method of forming a high electron mobility transistor (HEMT) on a substrate, comprising: forming a binary III-nitride channel layer over the substrate; forming a ternary III-nitride barrier layer over the binary III-nitride channel layer, wherein the ternary III-nitride barrier layer meets the binary III-nitride channel layer at a heterojunction interface; forming a binary III-nitride gate layer over the ternary III-nitride barrier layer and doping the binary III-nitride gate layer with donor or acceptor impurities; removing selected portions of the doped binary III-nitride gate layer to form a patterned doped binary III-nitride gate structure having an upper gate surface and outer gate sidewalls and leaving an upper surface region of the ternary III-nitride barrier layer exposed; forming a first conformal passivation layer over the upper gate surface, outer gate sidewalls, and exposed upper surface region of the ternary III-nitride barrier layer; forming a second conformal passivation layer over the first conformal passivation layer; forming a source/drain mask over the second conformal passivation layer; with the source/drain mask in place, performing an etch to form source/drain openings which extend through the first and second conformal passivation layers and which terminate on the ternary III-nitride barrier layer; and filling the source/drain openings with a conductive material.