Patent ID: 9728464
Date: 2017-08-08
CPC Classifications: H01L

Claim:
1. A method for forming a fin-based transistor structure, the method comprising: forming a fin on a substrate, the fin extending from the substrate; forming shallow trench isolation material on opposing sides of the fin; recessing the fin to provide a first recess; forming a substitute fin including strained silicon-germanium (SiGe) in the first recess, the substitute fin comprising a channel of the transistor structure, the substitute fin having a width of less than 30 nanometers, a height of greater than 35 nanometers, and a germanium concentration of greater than 40%; and forming a gate over three surfaces of the substitute fin to form a tri-gate structure, wherein the substitute fin includes strained SiGe throughout all of the substitute fin after the gate is formed over three surfaces of the substitute fin.