Patent ID: 9594626
Date: 2017-03-14
CPC Classifications: G06F,H03M,H04L

Claim:
1. A method for serial data transmission in a bus system having at least two subscribed data processing units that exchange messages via a bus in the bus system, each of the messages having a logical structure including a start-of-frame bit, an arbitration field, a control field, a data field, a Cyclical Redundancy Checking (“CRC”) field, an acknowledge field and an end-of-frame sequence, the control field including a data length code, which contains information about the length of the data field, the method comprising: interpreting, in a transmitted message, values of bits of the data length code: i) in deviation from the Controller Area Network (“CAN”) standard International Organization for Standardization (“ISO”) 11898-1 for determining a number of bits of the data field when a first switchover condition is satisfied, and ii) in conformance with the CAN standard ISO 11898-1 for determining the number of bits of the data field when the first switchover condition is not satisfied, wherein satisfaction of the first switchover condition is determined based on at least one switchover bit included in a portion of the logical structure of the transmitted message, the portion not including the data length code.