Patent ID: 9646892
Date: 2017-05-09
CPC Classifications: H01L

Claim:
1. A device, comprising: a first channel region formed in a first portion of a substrate, the first channel region being doped with a dopant of a first type of conductivity; a second channel region formed in a second portion of the substrate, the second channel region being doped with a dopant of a second type of conductivity; a gate insulating layer and a dielectric capping layer formed on the first channel region and on the second channel region, the dielectric capping layer comprising a capping layer including at least one of the following: aluminium oxide, rare earth oxide, and hafnium oxide; a first metal gate region formed to be spaced with regard to the first channel region by the gate insulating layer and the dielectric capping layer; and a second metal gate region formed to be spaced with regard to the second channel region by the gate insulating layer and the dielectric capping layer; wherein one of the first metal gate region and the second metal gate region comprises ytterbium ions or yttrium ions, and wherein the first metal gate region and the second metal gate region include the same metal selected from the group consisting of titanium, molybdenum, and tungsten.