Patent ID: 9691465
Date: 2017-06-27
CPC Classifications: G11C,H01L

Claim:
1. A method of programming a thyristor, comprising: providing the thyristor to comprise a structure containing two electrode regions and a segment between the electrode regions, at least one section of the segment being proximate a gate and thus being a gated portion of the segment; inducing a conductivity type within the gated portion of the segment with an electrical field formed with the gate to form four regions of alternating p-type and n-type conductivity within the structure; two of the four regions being the electrode regions, and the other two of the four regions being base regions the electrode regions being a first electrode region and a second electrode region; the base regions being a first base region and a second base region; the first base region being between the first electrode region and the second base region; the second base region being between the second electrode region and the first base region; and utilizing a voltage differential between the two electrode regions, together with capacitive coupling from the gate, to induce a memory state within the thyristor.