Patent ID: 9660940
Date: 2017-05-23
CPC Classifications: H04L

Claim:
1. An apparatus, comprising: a processor configured to be operatively coupled to a memory and that is configured to execute a flow control module; and the flow control module configured to receive a first plurality of sample data packets from an output queue of a stage of a multi-stage switch at a first sample rate when an available capacity of the output queue crosses a first threshold, the flow control module configured to (1) stop receiving the first plurality of sample data packets from the output queue of the stage of the multi-stage switch at the first sample rate and (2) receive a second plurality of sample data packets from the output queue of the stage of the multi-stage switch at a second sample rate greater than the first sample rate, when the available capacity of the output queue crosses a second threshold, the available capacity of the output queue being greater at the first threshold than at the second threshold, the flow control module configured to send a flow control signal to an edge device of the multi-stage switch from which the first plurality of sample data packets or the second plurality of sample data packets entered the multi-stage switch, the flow control signal being an out-of-band flow control signal.