Patent ID: 9569581
Date: 2017-02-14
CPC Classifications: G06F

Claim:
1. A method, executed by a computer, for routing a circuit, the method comprising: receiving a logic structure for a circuit; retrieving a logic template, the logic template comprising a wiring formula that defines an interconnection pattern for interconnecting a plurality of cell stages; the logic template further comprising a topology formula that is datawidth dependent and defines a cell type and a cell quantity for at least one cell stage of the plurality of cell stages; determining whether the logic structure for the circuit matches the logic template; routing the circuit using a routing recipe corresponding to the logic template in response to determining that the logic structure matches the logic template; wherein the routing recipe is dependent on a datawidth of the circuit and at least one circuit metric selected from the group consisting of circuit speed, circuit power consumption, and circuit density; and wherein the routing recipe comprises parameters useful for guiding a routing process including two or more of a routing priority, a routing weight, a scenic ratio, a wirecode assignment, and a layer assignment.