Patent ID: 9746876
Date: 2017-08-29
CPC Classifications: G06F,H04J,H04L

Claim:
1. A method for operating a counter in a processor of a computing system, the method comprising: storing a first value of a local counter device of the processor of the computing system and a first value of a reference counter device, the local counter device configured to output an incrementing value based on a first clock signal and the reference counter device configured to output an incrementing value based on a second clock signal; a period of time after storing the first value of the local counter device, obtaining a current value of the local counter device and a current value of the reference counter device; calculating a drift in the local counter device by subtracting an update rate of the local counter device from an update rate of the reference counter device to obtain an update rate mismatch value; calculating a counter value mismatch by subtracting the current value of the local counter device from the current value of the reference counter device; and adjusting a rate of incrementing of the incrementing value of the local counter device at least in response to the calculated drift in the local counter device and the counter value mismatch, wherein the calculated drift equals the update rate mismatch value plus the counter value mismatch.