Patent ID: 9570377
Date: 2017-02-14
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a semiconductor substrate including an integrated circuit therein; an interlayer dielectric layer on the semiconductor substrate to cover the integrated circuit; an intermetal dielectric layer on the interlayer dielectric layer; at least one metal line in the intermetal dielectric layer, the at least one metal line being electrically connected to the integrated circuit; a through electrode that vertically penetrates the interlayer dielectric layer and the semiconductor substrate, the through electrode being electrically connected to the at least one metal line and comprising a top end that faces the at least one metal line; a first protection layer covering the top end of the through electrode and including a conducting metal element that is also included in the through electrode; and a second protection layer on the first protection layer, wherein the at least one metal line comprises a first metal line that is on the interlayer dielectric layer and is electrically connected to the through electrode, wherein the intermetal dielectric layer comprises a first insulation layer that is on the interlayer dielectric layer and the second protection layer, and wherein the first metal line is in the first insulation layer and penetrates the second protection layer.