Patent ID: 9705531
Date: 2017-07-11
CPC Classifications: H03M

Claim:
1. A viterbi decoder, comprising: circuitry to output one or more data symbol values, the circuitry setting the one or more data symbol values to a first quantity of unit intervals in a first decoding mode and to set the one or more data symbol values to a second quantity of unit intervals in a second decoding mode, the second quantity of unit intervals being greater than the first quantity of unit intervals; a branch metric circuit to, in the first decoding mode, generate a set of viterbi branch metrics based on the data symbol values for the first quantity of unit intervals, and, in the second decoding mode, generate the set of viterbi branch metrics based on the data symbol values for the second quantity of unit intervals; and a path metric circuit to generate viterbi path metrics based on the set of viterbi branch metrics.