Patent ID: 9627268
Date: 2017-04-18
CPC Classifications: H01L

Claim:
1. A method for fabricating semiconductor device, comprising: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a shallow trench isolation (STI) around the first fin-shaped structure and the second fin-shaped structure so that each of the first fin-shaped structure and the second fin-shaped structure is divided into a top portion and a bottom portion; forming a first doped layer on the STI and on the top portion of the second fin-shaped structure; forming a second doped layer on the STI and the top portion of the first fin-shaped structure, wherein the first doped layer and the second doped layer comprise dopants of same type; and performing an anneal process.