Patent ID: 9704869
Date: 2017-07-11
CPC Classifications: G11C,H01L

Claim:
1. A semiconductor memory cell formed in a semiconductor, the semiconductor memory cell comprising: a floating body region defining at least a portion of a surface of the semiconductor memory cell, the floating body region having a first conductivity type; and a buried region located within the semiconductor memory cell and located adjacent to the floating body region, wherein the buried region has a second conductivity type, and the buried region is discontinuous along one direction; wherein said floating body region stores a charge or lack of charge indicative of a state of the semiconductor memory cell selected from at least first and second states; and wherein said buried region is configured to generate impact ionization when the semiconductor memory cell is in one of said first and second states, and wherein said buried region is configured so as not to generate impact ionization when the semiconductor memory cell is in the other of said first and second states.