Patent ID: 9667228
Date: 2017-05-30
CPC Classifications: H03D,H03H,H03K

Claim:
1. An apparatus, comprising: a multiplexer, including a first input for receiving a ground potential, a second input for receiving a bias voltage, a third input for receiving an enable signal, and an output for selecting one of the ground potential and the bias voltage based on the enable signal; a first transistor, including a gate, a first terminal, and a second terminal, wherein the gate of the first transistor is connected to the output of the first multiplexer, and wherein the first terminal of the first transistor receives a first differential modulated signal; a first variable capacitor, including a first terminal, a second terminal, and an input, wherein the first terminal of the first variable capacitor is connected to the second terminal of the first transistor, and wherein the input of the first variable capacitor is configured to set a capacitance value of the first variable capacitor; a first inductor, including a first terminal and a second terminal, wherein the first terminal of the first inductor is connected to the second terminal of the first transistor, and wherein the second terminal of the first inductor is connected to the second terminal of the first variable capacitor; a second transistor, including a gate, a first terminal, and a second terminal, wherein the gate of the second transistor is connected to the output of the first multiplexer, wherein the first terminal of the second transistor receives a second differential modulated signal, and wherein the second terminal of the second transistor is connected to the second terminal of the first inductor; a second inductor mutually coupled to the first inductor, including a first terminal and a second terminal; a balun-bias switch, including a first input for receiving the ground potential, a second input for receiving a power supply voltage, a third input for receiving an inverse of the enable signal, and an output, wherein the output of the balun-bias switch is connected to the second terminal of the second inductor; a second capacitor, including a first terminal, and a second terminal for receiving a polar signal, wherein the first terminal of the second capacitor is connected to the first terminal of the second inductor; and a port-switch, including a first input for receiving the enable signal, a second input for receiving the inverse of the enable signal, a third input, and an output, wherein the third input of the port-switch is connected to the first terminal of the second inductor.