Patent ID: 9570476
Date: 2017-02-14
CPC Classifications: G06F,H01L

Claim:
1. An array substrate, comprising: a substrate; a plurality of scanning lines and a plurality of data lines are arranged on the substrate, wherein the scanning lines cross and are insulated from the data lines, and wherein the data lines comprise first data lines and second data lines, and the first data lines are arranged in a same layer with the scanning lines; a first insulating layer arranged between the second data lines and the scanning lines, and between the second data lines and the first data lines, wherein first via holes are arranged in the first insulating layer, and the second data line electrically connects two adjacent first data lines via the first via holes; and a plurality of first signal lines and a plurality of common electrodes in mutual electrical connection on the substrate, wherein the first signal lines are arranged insulated from and in a same layer with the second data lines.