Patent ID: 9666790
Date: 2017-05-30
CPC Classifications: H01L

Claim:
1. A method for manufacturing a magnetoresistive random access memory (MRAM) cell, the method including: forming a dielectric layer over a semiconductor substrate; forming an opening in the dielectric layer, and filling the opening with a metal layer to establish a metal line which is operably coupled to a via; forming an etch stop layer disposed over an upper surface of the dielectric layer, wherein the etch stop layer exhibits an opening that leaves at least a portion of an upper surface of the metal line exposed; forming a conformal bottom electrode layer over the etch stop layer and the metal layer, wherein the conformal bottom electrode layer includes a peripheral portion overlying the etch stop layer and a central portion extending downward through the opening to the upper surface of the metal line; forming a magnetic tunnel junction over the central portion of the conformal bottom electrode layer; forming a top electrode layer over the magnetic tunnel junction; and forming a conformal sidewall spacer layer which extends over an upper surface of the peripheral portion of the bottom electrode layer, along sidewalls of the magnetic tunnel junction, and along sidewalls of the top electrode layer, wherein the conformal sidewall spacer layer has an outer sidewall which is substantially planar or which monotonically increases in height from the upper surface of the peripheral portion of the bottom electrode layer to a top surface of the top electrode layer.