Patent ID: 9618922
Date: 2017-04-11
CPC Classifications: G05B,G06F

Claim:
1. A central processing unit (CPU) of a programmable logic controller (PLC), the CPU comprising: a microprocessor that executes a first control program and a scheduler program, the first control program, when executed by the microprocessor, generates output data using input data, and the scheduler program, when executed by the microprocessor, controls execution of the first control program; a memory that stores the first control program and the scheduler program; a setting unit that determines a period of a control cycle; and a communication circuit that transmits the output data and receives the input data for every control cycle; the scheduler program, when executed by the microprocessor, wherein the CPU is configured to control a control target of the PLC by repeating transmission of the output data, reception of the input data, and execution of the first control program.