Patent ID: 9589087
Date: 2017-03-07
CPC Classifications: G06F

Claim:
1. A method for verifying environments utilizing hardware description languages, the method comprising: identifying, by one or more computer processors, a register-transfer level design description of a simulated device under test in a first computer language, wherein the first computer language is a hardware description language; identifying, by one or more computer processors, one or more tests to perform on the register-transfer level design description of the simulated device under test; parsing, by one or more computer processors, the one or more tests into one or more software objects, wherein the one or more software objects are described in a second computer language; converting, by one or more computer programs, the software objects into one or more commands, wherein the one or more commands are written in the first computer language; in a one-time initialization, (i) generating, by one or more computer processors, a table of commands from the one or more commands to execute on the register-transfer level design description of the simulated device under test and (ii) copying, by one or more computer processors, the table of commands to a driver for the simulated device under test, wherein the driver is simulated in the first computer language; and the driver inputting, by one or more computer processors, one or more commands in the table of commands into an interface of the register-transfer level design description of the simulated device under test.