Patent ID: 9564573
Date: 2017-02-07
CPC Classifications: H01L

Claim:
1. A method of forming a trilayer Josephson junction structure, the method comprising: depositing a dielectric layer on a base electrode layer, wherein the base electrode layer is deposited on a substrate; depositing a counter electrode layer on the dielectric layer; forming a first counter electrode and a second counter electrode from the counter electrode layer; forming a first dielectric layer and a second dielectric layer from the dielectric layer; forming a first base electrode and a second base electrode from the base electrode layer, wherein the first counter electrode, the first dielectric layer, and the first base electrode form a first stack, wherein the second counter electrode, the second dielectric layer, and the second base electrode form a second stack, and wherein a shunting capacitor is formed between the first base electrode and the second base electrode; depositing conformally an inter-level dielectric layer on a top surface of the substrate, the first and second counter electrodes, and the first and second base electrodes; forming a contact bridge connecting the first counter electrode and the second counter electrode, after planarizing the inter-level dielectric layer to expose tops of the first and second counter electrodes; and forming an air gap underneath the contact bridge by removing the inter-level dielectric layer.