Patent ID: 9710002
Date: 2017-07-18
CPC Classifications: G05F

Claim:
1. A low drop out regulator system comprising: (a) maximum current selector circuitry having a first input for a first current, a second input for a second current, and a bias current output for a bias current selected from the larger of the first current and the second current; (b) a low drop out regulator including: (i) a bias current input coupled to the bias current output; (ii) a voltage output; (iii) a series connection of two resistors coupled between the voltage output and a circuit ground; (iv) an output drive transistor having a connection to a supply voltage, a connection to the voltage output, and a control input; (v) an error amplifier having a non-inverting input coupled to a reference voltage, an inverting input coupled to between the two resistors, and an output coupled to the control input; (vi) a first pair of transistors coupled in a current mirror having a first connection coupled to the bias current input, control inputs coupled to the bias current input, ground connections to the circuit ground, and a second connection coupled to the control input; and (vii) a third transistor coupled between the error amplifier and circuit ground and having a control input coupled to the bias current input.