Patent ID: 9628085
Date: 2017-04-18
CPC Classifications: G11C,H03K

Claim:
1. A method for accessing signals of a programmable logic device having a functional level and a configuration level at run time when the programmable logic device is executing a predefined configuration, the method comprising: requesting an access to at least one signal value that comprises a number of bits, wherein the individual bits in the configuration are each located in an address unit with one address offset apiece such that one or more bits of a signal value are located in one address unit, wherein the access comprises a reading from and/or a writing to the configuration level; performing a bitwise access to the requested signal values; and sorting the accesses to the individual bits as a function of the address unit containing the applicable bit such that the accesses to all bits located in an address unit take place in sequence as a function of the address offset, independently of the signal containing the applicable bit, wherein accesses with ascending address offset take place later.