Patent ID: 9640633
Date: 2017-05-02
CPC Classifications: H01L

Claim:
1. A method of forming a semiconductor device comprising: forming a replacement gate structure in contact with a first device channel and a second device channel, wherein the replacement gate structure includes a sacrificial gate conductor and a dielectric cap layer that includes a bump portion between the first and second semiconductor device channel; removing the bump portion of the dielectric cap layer and the underlying portion of the sacrificial gate conductor to provide an isolation gate opening having a first width between the first and second device channels; removing the portion of the replacement gate structure over the first and second device channels to provide functional gate openings having a second gate width that is less than the first gate width; and forming a first and second functional gate structure in the functional gate openings to the first and second semiconductor device channels, wherein a voidless dielectric material in the isolation gate opening provides for process isolation between the first functional gate structure and the functional second gate structure.