Patent ID: 9620644
Date: 2017-04-11
CPC Classifications: H01L

Claim:
1. A method of forming a semiconductor device comprising: forming an inner spacer layer on source and drain portions of a fin structure and a gate structure that is present on the channel portion of the fin structure; forming an outer spacer layer on the inner spacer layer; removing a portion of the outer spacer layer to expose a portion of the inner spacer layer that is present on an upper surface of the source and drain portions of the fin structure, wherein a remaining portion of the outer spacer layer is present overlying sidewalls of the lower surface of the source and drain portions of the fin structure; removing the inner spacer layer selectively to the remaining portion of the outer spacer layer to exposed said sidewalls of the lower surface of the source and drain portions of the fin structure; and forming doped epitaxial semiconductor material on the lower surface of the source and drain portions of the fin structures.