Patent ID: 9590154
Date: 2017-03-07
CPC Classifications: H01L,H05K,Y02P

Claim:
1. A wiring substrate comprising: a metal plate arranged as a lowermost layer of the wiring substrate and including an exposed lower surface; an insulation layer formed entirely on an upper surface of the metal plate and including a plurality of recesses; a reflection layer arranged on the insulation layer; a plurality of separated wires embedded in the recesses of the insulation layer, wherein each of the wires includes an upper surface, a lower surface, and a side surface, the upper surface of each wire is at a same level as a lowermost surface of the reflection layer, the entire lower surface of each wire and the entire side surface of each wire are covered by the insulation layer; a first plating layer formed on an upper surface of each of the wires, wherein the reflection layer includes a first opening that exposes at least a portion of the first plating layer as a connection pad; and an electronic component mounted on the lower surface of each of the wires, wherein the electronic component is embedded in the insulation layer; wherein the electronic component is separated from the metal plate so that the insulation layer lies between the electronic component and the metal plate and so that the electronic component is located between the lower surface of each of the wires and the upper surface of the metal plate.