Patent ID: 9716088
Date: 2017-07-25
CPC Classifications: H01L

Claim:
1. A three-dimensional (3D) bonded semiconductor structure comprising: a first semiconductor structure including a first wafer, a first interconnect structure, and a first bonding oxide layer containing first nitridized oxide regions and at least one nitridized high-k dielectric material embedded therein, wherein said at least one nitridized high-k dielectric material is located on a surface of a first metallic structure which is also embedded in said first bonding oxide layer; and a second semiconductor structure including a second wafer, a second interconnect structure, and a second bonding oxide layer containing second nitridized oxide regions and at least one second metallic structure embedded therein, wherein a bonding interface is present between said first and second nitridized oxide regions and another bonding interface is present between a nitridized high-k dielectric material and said at least one second metallic structure.