Patent ID: 9633907
Date: 2017-04-25
CPC Classifications: H01L

Claim:
1. A method comprising: forming a pattern-reservation layer over a semiconductor substrate, wherein the semiconductor substrate comprises a major surface; performing a first self-aligned multi-patterning process to etch the pattern-reservation layer, wherein remaining portions of the pattern-reservation layer comprise pattern-reservation strips having first lengthwise directions extending in a first direction that is parallel to the major surface of the semiconductor substrate; performing a second self-aligned multi-patterning process to etch the pattern-reservation strips formed by the first self-aligned multi-patterning process, wherein the first self-aligned multi-patterning process and the second self-aligned multi-patterning process comprise a first etching step and a second etching step, respectively, with the first etching step and the second etching step being separate etching steps, wherein etching masks used in the second self-aligned multi-patterning process have second lengthwise directions extending in a second direction parallel to the major surface of the semiconductor substrate, wherein remaining portions of the pattern-reservation layer comprise patterned features; and using the patterned features as an additional etching mask to form semiconductor nanowires by etching the semiconductor substrate.