Patent ID: 9651751
Date: 2017-05-16
CPC Classifications: G02B,H01L,H01S,H04B,H05K,Y02P

Claim:
1. An optical transceiver by hybrid multichip integration comprising: a Si-photonics chip attached on a PCB, wherein the Si-photonics chip comprises a modulator and photo diodes embedded inside an SOI wafer and respectively coupled to multiple first conductive pads and multiple second conductive pads formed on a top surface of the SOI wafer; a first TSV interposer and a second TSV interposer separately attached nearby the Si-photonics chip on the PCB; a driver chip flip-bonded partially on the Si-photonics chip through a first sets of bumps and partially on the first TSV interposer through a second sets of bumps; wherein the first set of bumps comprises one or more first signal bumps alternatively arranged with one or more first ground bumps in a staggered manner along a nominal direction, each first signal bump being soldered to one of the first conductive pads connected to a first transmission line on the Si-photonics chip and each first ground bump being soldered to a neighboring one of the first conductive pads connected to a first GND plane on the Si-photonics chip, the first transmission line having a first width substantially smaller than a width of the first GND plane; wherein the first transmission line comprises a first trace section connected directly to the corresponding one of the first conductive pads, the first trace section having a reduced width of at least half of the first width resulting in reduced parasitic capacitance and enhanced inductance associated with the first signal bump connection between the driver chip at top to the Si-photonics chip at bottom connected to the modulator embedded therein; wherein the first GND plane comprises a cut-out portion around corresponding one of the first conductive pads such that the first GND plane on the Si-photonics chip substantially not overlaps with another GND plane on the driver chip, resulting in reduced parasitic capacitance and enhanced inductance associated with the first ground bump connection between the driver chip at top to the Si-photonics chip at bottom connected to the modulator embedded therein; and a transimpedance amplifier module chip flip-bonded partially on the Si-photonics chip through a third sets of bumps and partially on the second TSV interposer through a fourth set of bumps.