Patent ID: 9703911
Date: 2017-07-11
CPC Classifications: G06F

Claim:
1. A method, comprising: converting a first threshold voltage related (VT-related) cell of a first standard cell library to a first modified VT-related cell, the first standard cell library comprising the first VT-related cell and a first base cell, the first VT-related cell and the first base cell each comprising different portions of a layout design of a first standard cell corresponding to a first performance setting, the different portions being overlaid to obtain the layout design of the first standard cell; generating a second standard cell library based on the first base cell and the first modified VT-related cell, the first modified VT-related cell and the first base cell each comprising different portions of a layout design of a second standard cell corresponding to a second performance setting; generating a layout design for an integrated circuit based on the second standard cell library; and forming a set of masks based on the layout design.