Patent ID: 9559116
Date: 2017-01-31
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: an insulating layer provided in one body on a substrate and configured to extend between adjacent contacts of a plurality of contacts in first and second directions perpendicular to each other; a first gate electrode and a second gate electrode disposed on the insulating layer, the first and second gate electrodes extending in the first direction parallel to a top surface of the substrate; a first channel structure penetrating the first gate electrode and the insulating layer so as to be connected to the substrate; a second channel structure penetrating the second gate electrode and the insulating layer so as to be connected to the substrate; and wherein the adjacent contacts penetrate the insulating layer between the first gate electrode and the second gate electrode and are connected to common source regions formed in the substrate, the common source regions having a first conductivity type, wherein the first gate electrode and the second gate electrode are spaced apart from each other in a second direction at the same level from the substrate, and wherein the second direction intersects the first direction and is parallel to the top surface of the substrate.