Patent ID: 9558364
Date: 2017-01-31
CPC Classifications: G06F

Claim:
1. A computing machine, where a plurality of OSs (Operating Systems) each operate and are configured to access a device, comprising: a memory configured to store a device allocation table to allocate the device to one of the plurality of OSs, in order of occurrence of access; and processing circuitry configured, when an access to the device occurs, to determine to which OS of the plurality of OSs the device is allocated, based on the device allocation table, when the device is not allocated to any OS, to update the device allocation table in order to allocate the device to an OS being an accessing party and to allow the access to the device, and when the device is allocated to an OS other than the OS being the accessing party, to deny the access to the device, wherein the device allocation table is data correspondingly indicating a physical address space of the device and the OS to which the device is allocated, and when the device is not allocated to any OS, the processing circuitry further maps all of the physical address space of the device indicated by the device allocation table to a virtual address space of the OS being the accessing party, and when the access to the device is an access to a PCI (Peripheral Components Interconnect bus) configuration register received from the OS being the accessing party, the processing circuitry intercepts the access to the PCI configuration register and accesses the PCI configuration register of the device instead of allowing the access to be performed by the OS being the accessing party.