Patent ID: 9595474
Date: 2017-03-14
CPC Classifications: H01L

Claim:
1. A method comprising joining a first integrated circuit (IC) die having at least a first transistor comprising a first gate electrode to a second IC die having at least a second transistor comprising a second gate electrode, the joining including: electrically connecting the second gate electrode to the first gate electrode by a path including a first through substrate via (TSV), and electrically connecting the second transistor in series with the first transistor by path including a second TSV, wherein the step of electrically connecting the second transistor in series includes: forming the second TSV with an offset from a source of the first transistor and a drain of the second transistor, forming respective contacts on the source of the first transistor and the drain of the second transistor, and forming respective conductive lines in respective interconnect layers above the source of the first transistor and the drain of the second transistor, for coupling the contact on the source to the contract on the drain.