Patent ID: 9542345
Date: 2017-01-10
CPC Classifications: G06F,Y02D

Claim:
1. A method for suppressing interrupts in a computer system, comprising: receiving a first packet; receiving, at a processor, a first interrupt from a network interface based at least in part on the first packet; processing, at the processor, the first packet; enabling an interrupt-suppression state in the processor based at least in part on the processing the first packet, wherein the interrupt-suppression state suppresses subsequent interrupts from the network interface; receiving a second packet; disabling the interrupt-suppression state in the processor based at least in part on a pre-specified threshold being met, wherein the pre-specified threshold is based at least in part on a time interval, wherein the time interval is determined based at least in part on an attribute of the first packet, the attribute of the first packet based at least in part on a type of the first packet, a source address for the first packet, or a destination address for the first packet; and processing, at the processor, the second packet based at least in part on the disabling.