Patent ID: 9741644
Date: 2017-08-22
CPC Classifications: H01L

Claim:
1. A stacked integrated circuit system comprising: a substrate defining a substrate major surface; a contour support comprising: a first integrated circuit die comprising a first integrated circuit die major surface, wherein the first integrated circuit die major surface is substantially parallel to the substrate major surface and a first side of the first integrated circuit die abuts the first lateral contact surface, such that at least a portion of the first integrated circuit die is between the support plate and the substrate major surface; and a second integrated circuit die comprising a second integrated circuit die major surface, wherein the second integrated circuit die major surface is substantially parallel to the substrate major surface and a first side of the second integrated circuit die abuts the second lateral contact surface, such that at least a portion of the first integrated circuit die and at least a portion of the support plate are between the second integrated circuit die and the substrate major surface, wherein the contour support defines a mounting aperture that extends through the contour support in a direction substantially orthogonal to the substrate major surface.