Patent ID: 9575885
Date: 2017-02-21
CPC Classifications: G06F

Claim:
1. A data storage apparatus, comprising: a transmission interface; a nonvolatile memory, wherein the nonvolatile memory is a flash memory comprising a plurality of physical blocks, the controller records a mapping relation for mapping a plurality of logical blocks to the plurality of physical blocks; a controller for recording a non-completed flag; wherein when the controller receives a first initialization command via the transmission interface, the controller performs a first initialization setting to the nonvolatile memory and sets the the non-completed flag as a non-completed status; wherein when the controller receives a second initialization command via the transmission interface, the controller performs a second initialization setting to the nonvolatile memory and sets the non-completed flag as a completed status; wherein when the controller receives a write command via the transmission interface, write data are scrambled and then the scrambled write data are written to the nonvolatile memory; wherein when the non-completed flag indicates the non-completed status, if the controller receives a read command to the nonvolatile memory via the transmission interface, no matter whether data associated to an indicated address of the read command are scrambled, the controller descrambles the data associated to the indicated address and then provides the descrambled data associated to the indicated address via the transmission interface; wherein the controller records whether the physical block associated with each logical block is valid according to a valid flag; wherein only when the non-completed flag indicates the completed status, the controller determines whether to return the descrambled data according to the valid flag.