Patent ID: 9589886
Date: 2017-03-07
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a substrate having a center and a plurality of edges spaced apart from the center; an electrode that is disposed over the substrate; a first wiring that is disposed over the substrate and electrically connected to the electrode, the first wiring extending, in a plan view of the substrate, in a first direction from one of the edges to the center; an insulating layer that is disposed over the first wiring; a second wiring that is disposed over the insulating layer and electrically connected to the first wiring through a hole in the insulating layer, the second wiring extending, the plan view of the substrate, in a second and non-overlapping direction from the center back towards the one edge; and a terminal that is disposed over the second wiring and directly electrically connected to the second wiring; wherein an angle between the first wiring and the second wiring is 90 degrees or less in the plan view of the substrate; and wherein the angle of a part of the first wiring and a part of the second wiring adjacent to the hole is acute in the plan view.