Patent ID: 9727454
Date: 2017-08-08
CPC Classifications: G06F,G11C

Claim:
1. A memory controller integrated circuit for flash memory, the memory controller integrated circuit to store and retrieve data at locations in the flash memory responsive to host commands, the memory controller integrated circuit comprising: storage for entries, each entry representing status of a page in the flash memory capable of storing data pursuant to the host commands, all pages capable of storing data pursuant to the host commands having a corresponding entry regardless of the values of data stored in a given one of the pages; logic to update the entries responsive to changes in status of corresponding pages in the flash memory; logic to receive a query from the host which seeks identification of one or more of the locations in the flash memory that satisfy at least one condition from the set of (a) data stored at the corresponding location satisfies a data age requirement, (b) data stored at the corresponding location satisfies an access frequency requirement, (c) a requisite number of physical pages at the corresponding location have been released but are in an unerased condition, or (d) all physical pages corresponding to the location have been released but are in an unerased condition; logic to detect, responsive to the query, when the entries indicate that one or more of the locations in the flash memory satisfy the at least one condition; and logic to, responsive to detection that the one or more locations satisfy the at least one condition, to transmit address information to the host corresponding to the one or more locations for which the at least one condition is satisfied; and logic to receive from the host a maintenance command dependent on the address information transmitted to the host and to process the received maintenance command, wherein the maintenance command is to cause said memory controller integrated circuit to perform at least one of (i) relocation of a page within the one or more locations to a different erase block in the flash memory or (ii) erasure of an erase block corresponding to the one or more locations, and wherein the maintenance command is to specify an address of each page or erase block within the one or more locations that is to be the subject of the at least one of relocation or erasure pursuant to the maintenance command.