Patent ID: 9673853
Date: 2017-06-06
CPC Classifications: H03F,H04B

Claim:
1. A power amplification system comprising: an input transistor having an input transistor gate configured to receive a radio-frequency (RF) signal, an input transistor source coupled to a ground voltage, and an input transistor drain; an output transistor having an output transistor drain coupled to a supply voltage via an inductor and configured to output an amplified version of the RF signal, an output transistor gate coupled to a bias voltage, and an output transistor source; one or more middle transistors coupling the input transistor drain to the output transistor source, the one or more middle transistors including a first middle transistor having a first middle transistor gate coupled to the bias voltage and a first middle transistor drain coupled to the output transistor source; and a high voltage limiter coupled between the output transistor drain and output transistor gate, the high voltage limiter configured to prevent a gate-drain voltage of the output transistor from exceeding a high voltage threshold.