Patent ID: 9748136
Date: 2017-08-29
CPC Classifications: B81C,H01L

Claim:
1. Method for forming an electrically conductive via in a substrate, said method comprising the steps of: a) providing a first substrate as said substrate; b) forming a through hole in said first substrate, said through hole extending between a first surface and a second surface of said first substrate; c) providing a second substrate; d) bringing a first surface of said second substrate into contact with said first surface of said first substrate, such that said through hole in said first substrate is covered by said first surface of said second substrate; e) filling said through hole in said first substrate with an electrically conductive material by means of electroplating to form said electrically conductive via, wherein said electrically conductive material is deposited on said first surface of said second substrate, and f) removing said second substrate including said first surface of said second substrate on which said electrically conductive material is deposited, wherein said first surface of said first substrate and said first surface of said second substrate each have a surface roughness Ra of less than 2 nm, and in that in step (d) said first surface of said first substrate and said first surface of said second substrate are brought in direct contact with each other, such that a direct bond is formed there between.