Patent ID: 9666677
Date: 2017-05-30
CPC Classifications: H01L,H01S

Claim:
1. A method for manufacturing a semiconductor device, the method comprising: providing a gallium and nitrogen containing substrate having a surface region; forming a gallium and nitrogen containing epitaxial material overlying the surface region, the epitaxial material comprising a release material overlying the gallium and nitrogen containing substrate and at least an intrinsic-type or unintentionally doped gallium and nitrogen containing region overlying the release material or at least an n-type gallium and nitrogen containing region overlying the release material or at least a p-type gallium and nitrogen containing region overlying the release material or at least a combination of one or more of the n-type gallium and nitrogen containing region, the p-type gallium and nitrogen containing region, and the intrinsic-type or unintentionally doped gallium and nitrogen containing region overlying the release material; patterning the epitaxial material and forming mesas to form a plurality of dice arranged in an array, each die corresponding to at least one semiconductor device and being arranged by a first pitch between the adjacent die in the array; forming an interface region overlying the epitaxial material, the interface region comprising a metal, a semiconductor, dielectric, oxide, glass, or a polymer; subjecting the release material to a photo electrochemical (PEC) etch to fully or partially remove the release material; bonding the interface region to a carrier wafer to form a bonded structure, while maintaining the release material completely or partially etched away from the bonded structure, wherein the PEC etch of the release material is performed prior to the bonding step; releasing the plurality of dice provided on the gallium and nitrogen containing substrate member to transfer a plurality of dice to the one or more carrier wafers wherein each pair of the transferred dice is configured with a second pitch between each pair of dice on a carrier wafer, the second pitch being equal or greater than the first pitch; processing at least one of the plurality of dice on at least one of the carrier wafers to form at least a semiconductor device.