Patent ID: 9590091
Date: 2017-03-07
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a semiconductor substrate having opposing first and second main surfaces; a first well extending into the semiconductor substrate from the first main surface; a vertical power device disposed partly in the first well and having a vertical current path that extends in a direction perpendicular to the first and second main surfaces; a second well extending into the semiconductor substrate from the first surface and spaced apart from the first well by a separation region of the semiconductor substrate; a plurality of logic devices disposed in the second well; and a minority carrier conversion structure in the separation region, the minority carrier conversion structure comprising a first doped region of the same conductivity type as the first and second wells that extends into the semiconductor substrate from the first main surface, a second doped region of the opposite conductivity type as the first doped region that extends into the semiconductor substrate from the first main surface, and a conducting layer that connects the first and second doped regions, wherein the first doped region is disposed closer to the second well than to the first well, wherein the second doped region is wider between the first doped region and the first well than between the first doped region and the second well.