Patent ID: 9620471
Date: 2017-04-11
CPC Classifications: H01L

Claim:
1. A semiconductor package comprising: a semiconductor die that includes a power device having at least a first power electrode and a second power electrode over a top surface of said semiconductor die, each power electrode including spaced power fingers originating from each respective power electrode; a first conductive clip over said top surface of said semiconductor die and coupled to said first power electrode, said first conductive clip including a first mounting surface and a first plurality of spaced fingers; a second conductive clip coupled to said second power electrode, said second conductive clip including a second mounting surface and a second plurality of spaced fingers being coplanar with said first plurality of spaced fingers, and said second mounting surface of said second conductive clip being coplanar with said first mounting surface of said first conductive clip such that said semiconductor die is configured for surface mounting.