Patent ID: 9722075
Date: 2017-08-01
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising a semiconductor substrate in which an element region and a termination region surrounding the element region are provided, wherein the element region comprises: a gate trench; a gate insulating film covering an inner surface of the gate trench; and a gate electrode located inside of the gate insulating film, the termination region comprises: a plurality of termination trenches provided around the element region; an inner trench insulating layer located inside of each of the plurality of termination trenches; and an upper surface insulating layer located at an upper surface of the semiconductor substrate in the termination region, the upper surface insulating layer comprises a first portion and a second portion having a thinner thickness than the first portion and located at a location separated from the element region than the first portion, and a gate wiring is located at an upper surface of the first portion and is not located at an upper surface of the second portion.