Patent ID: 9691550
Date: 2017-06-27
CPC Classifications: B32B,H01G

Claim:
1. A multi-layer capacitor comprising: a plurality of dielectric layers; a plurality of electrode layers, wherein the dielectric layers and electrode layers are arranged between each other, the dielectric and electrode layers being arranged so that the multi-layer capacitor comprises a plurality of segments that are connected to one another, wherein at least one connection region is located between the segments, and wherein the segments are strongly connected with each other in the at least one connection region; and a relief region disposed between the segments, wherein the relief region and the at least one connection region are located at the same height relative to a stacking direction of the dielectric and electrode layers, wherein the relief region is at least partially located in an inactive zone and the at least one connection region is at least partially located in an active zone of the multi-layer capacitor, and wherein the segments are not connected to each other or weakly connected to each other in the relief region compared to a connection of the dielectric and electrode layers within the segments.