Patent ID: 9622348
Date: 2017-04-11
CPC Classifications: H05K

Claim:
1. A multilayer circuit board, comprising: a plurality of stacked substrates, each of which has a conductor pattern, wherein a surface at a side of each of the substrates has an exposed portion which is not covered by the neighboring substrate; a plurality of first conductive lands provided on the exposed portions of the outer periphery of the substrates, wherein each exposed portion is provided with at least one of the first conductive lands; and a plurality of second conductive lands provided on the exposed portion of the outermost substrate; wherein each of the conductor pattern is electrically connected to one of the first conductive lands and one of the second conductive lands respectively; wherein a central portion of a surface at at least one side of each of the substrates is covered by the neighboring substrate; a plurality of plated holes, wherein each of the plurality of plated holes respectively penetrates at least one of the substrates, and is connected to one of the conductor patterns with one end thereof; wherein each of the conductor patterns is electrically connected to one of the second conductive lands through one of the plated holes.