Patent ID: 9627202
Date: 2017-04-18
CPC Classifications: H01L

Claim:
1. A method for forming fine patterns of a semiconductor device, the method comprising: forming a buffer mask layer on a hard mask layer including a first region and a second region around the first region, the buffer mask layer having first holes in the first region; forming first pillars and second pillars, the first pillars filling the first holes and disposed on the buffer mask layer in the first region, the second pillars disposed on the buffer mask layer in the second region, the first pillars having a first width, and the second pillars having a second width smaller than the first width; forming a block copolymer layer covering the first and second pillars on the buffer mask layer; phase-separating the block copolymer layer to form first block patterns spaced apart from the first and second pillars and a second block pattern surrounding the first and second pillars and the first block patterns; and removing the first block patterns and forming second holes in the buffer mask layer under the first block patterns.