Patent ID: 9665677
Date: 2017-05-30
CPC Classifications: G06F,G11C,H03K,Y02D

Claim:
1. A method for implementing a design using a configurable integrated circuit comprising a programmable logic block (PLB), a configurable memory controller, and a plurality of interconnect stations, the method comprising: mapping the design to use the PLB and the configurable memory controller; identifying a plurality of signal nodes associated with at least one selected from a group consisting of the PLB and the configurable memory controller; configuring the plurality of interconnect stations to connect the plurality of signal nodes, wherein configuring the plurality of interconnect stations comprises bypassing a pipeline register of at least one of the plurality of interconnect stations; and setting values in configuration registers via a dedicated interface; wherein the setting values in the configuration registers includes indicating memory types, address, data width, and operating frequency to the configurable memory controller.