Patent ID: 9704890
Date: 2017-07-11
CPC Classifications: H01L

Claim:
1. A display substrate, comprising: a lower common electrode disposed on a substrate; an insulating layer disposed on the lower common electrode; a gate pattern comprising: a gate insulating layer disposed on the gate pattern; a semiconductor layer disposed on the gate insulating layer; an etch stopping layer disposed on the gate insulating layer; source and drain electrodes disposed on the etch stopping layer; a pixel part extending from the source and drain electrodes; a first conductive layer connected to the common electrode contact part; a second conductive layer connected to the direct contact part; and a passivation layer disposed on the source and drain electrodes, the first conductive layer, and the second conductive layer, wherein the pixel part comprises a transparent conducting oxide (TCO) wire forming the source and drain electrodes, and wherein the source and drain electrodes comprise a material different from the pixel part.