Patent ID: 9727767
Date: 2017-08-08
CPC Classifications: G06K,H04B,H04J,H04L

Claim:
1. A method for clock synchronization in a radio frequency identification (RFID) equipped device, the method comprising: measuring a difference between a field clock frequency generated from an external clock and an internal clock frequency generated from an internal clock; and generating outgoing bits in the RFID equipped device in response to the measured difference, wherein generating the outgoing bits comprises adjusting the bit length of at least one of the outgoing bits in response to the measured difference while keeping an average bit length error of the outgoing bits below a predefined percentage threshold, wherein adjusting the bit length of at least one of the outgoing bits comprises adding a clock period to a non-shifting signal section of at least one of the outgoing bits or removing a clock period from a non-shifting signal section of at least one of the outgoing bits.