Patent ID: 9658793
Date: 2017-05-23
CPC Classifications: G06F,Y02D

Claim:
1. A method of switching a memory access mode of a processor, the method comprising: generating a memory address for the process to perform a memory access, the memory address being generated in accordance with a current memory access mode which is one of a local memory access (LP) mode and a non-local memory access (NP) mode, wherein a range of memory addresses of the memory address is limited to a local memory when the current memory access mode is the LP mode, and the range of memory addresses of the memory address includes the local memory and a non-local memory when the current memory access mode is the NP mode; monitoring the memory access based on the memory address generated for the processor, wherein a result of the monitoring indicates whether the memory access is to the local memory or to the non-local memory; and switching the memory access mode for one or more subsequent memory accesses, in response to the monitoring the memory access, from the current memory access mode to a next memory access mode which is the other of the LP mode and the NP mode, wherein the local memory and the non-local memory are separate.