Patent ID: 9653986
Date: 2017-05-16
CPC Classifications: H02M

Claim:
1. A multi-level, step-up converter circuit comprising: an inductor including one terminal in communication with an input voltage supply; N transistor pairs connected in series, where N is an integer greater than two, wherein first and second transistors of a first pair of the N transistor pairs are connected together at a node, and wherein the node is in communication with another terminal of the inductor, and wherein third and fourth transistors of a second pair of the N transistor pairs are connected to the first and second transistors, respectively; (N−1) capacitors having terminals connected between the N transistor pairs, respectively; an output capacitor having a terminal in communication with at least one transistor of the N transistor pairs; and a soft start module configured to sequentially charge the (N−1) capacitors to (N−1) fractions of an output voltage, respectively, wherein the inductor, the (N−1) capacitors, and N transistor pairs are integrated to create a monolithic converter system.