Patent ID: 9723725
Date: 2017-08-01
CPC Classifications: H01L,H05K

Claim:
1. A circuit interconnect comprising: a first printed circuit board (PCB) including a first electrically conductive pad and a first spacer consisting of a first electrically conductive plate and a first dielectric layer located on the first electrically conductive plate; a second PCB including a second electrically conductive pad and a second spacer consisting of a second electrically conductive plate and a second dielectric layer located on the second electrically conductive plate; the first spacer and the second spacer configured to at least partially abut and to position the first PCB relative to the second PCB such that a space remains between the first PCB and the second PCB after the first electrically conductive pad and the second electrically conductive pad are conductively connected in a soldering process, wherein the first spacer and the second spacer each have a height equivalent to one-half the height of the space that remains between the first PCB and the second PCB; and an electrically conductive solder joint conductively connecting the first electrically conductive pad and the second electrically conductive pad.