Patent ID: 9673367
Date: 2017-06-06
CPC Classifications: H01L

Claim:
1. A chip mounting substrate, comprising: a plurality of conductive portions configured to apply an electrode voltage to a mounted chip having electrode portions; at least one insulation portion configured to electrically isolate the conductive portions; and a plurality of bumps formed at a predetermined height to be bonded to the electrode portions of the chip wherein the chip is mounted on the bumps, wherein a cavity depressed inward of the conductive portions and configured to provide a space in which the chip is mounted is formed in the conductive portions, and a recess depressed downward from a bottom surface of the cavity is formed at a central portion of the cavity, wherein the electrode portions of the chip are formed on one surface of the chip facing surfaces of the conductive portions having the cavity, and the bumps protrude upward from a bottom surface of the recess, and wherein a height of each of the bumps is set such that a side surface of the chip mounted on the bumps is located higher than the bottom surface of the cavity so as to prevent a light emitted from the side surface of the chip from being obstructed.