Patent ID: 9577087
Date: 2017-02-21
CPC Classifications: H01L

Claim:
1. A semiconductor apparatus comprising: an active region formed on a first main surface side; a peripheral region encircling the active region and having a termination; a low-resistance layer formed on a second main surface side; a parallel pn-layer formed between the first main surface and the low-resistance layer and composed of planar first-conductive regions of a first conductivity alternately arranged with planar second-conductive regions of a second conductivity, the parallel pn-layer surrounding the active region and comprising an insulating layer covering the parallel pn-layer in the peripheral region; a first conductive layer covering part of the parallel pn-layer that is closer to the active region in the peripheral region via the insulating layer; and a second conductive layer connected electrically to the termination of the peripheral region and covering part of the parallel pn-layer that is closer to the termination in the peripheral region via the insulating layer, the second sub-region extending from a position that is closer to the termination than the first conductive layer is, to a position under the first conductive layer, and the first sub-region extending from a position that is closer to the active region than the second conductive layer is, to a position under the second conductive layer.