Patent ID: 9628063
Date: 2017-04-18
CPC Classifications: H03F,H03K

Claim:
1. An apparatus, comprising: a processor comprising a first input node, a first output node, and a second output node, in which the processor is configured to: receive at least one analog signal at the first input node; modulate the first output node at a first constant potential when the received analog signal is larger than a first threshold value and at a second constant potential when the received analog signal is smaller than a second threshold value, wherein the first constant potential is different from the second constant potential; and modulate the second output node by switching the second output node between the first constant potential and the second constant potential corresponding to the received analog signal, wherein the second output node is switched between the first constant potential and the second constant potential while the first output node is held at either the first constant potential or the second constant potential.