Patent ID: 9697006
Date: 2017-07-04
CPC Classifications: G06F

Claim:
1. A computer implemented method for performing a generic data access operation for a group of threads executing on a processor, the method comprising: receiving a memory access request from a thread within the group of threads; determining that a portion of data associated with the memory access request is not present in a cache memory unit; retrieving the portion of data associated with the memory access request from global memory; storing the portion of data within the cache memory unit during execution of the group of threads on the processor; designating an entry in a tag table to reflect a location associated with the portion of data within the cache memory unit, wherein the entry further indicates that the entry in the tag table should be invalidated when each thread within the group of threads has completed executing on the processor; flushing the portion of data from the cache memory unit upon determining that each thread within the group of threads has completed executing on the processing unit; and invalidating the entry in the tag table upon determining that each thread within the group of threads has completed executing on the processor.