Patent ID: 9715374
Date: 2017-07-25
CPC Classifications: G06F

Claim:
1. A multi-branch determination syntax optimization apparatus characterized by comprising: a memory that retains multi-branch determination syntax including tokens; a database section that retains CPU performance information and a frequently-appearing token table, the CPU performance information being a parameter depending on a CPU incorporated in the multi-branch determination syntax optimization apparatus and set based on time required for multi-branch determination processing, the frequently-appearing token table representing types and rates of an appearance of tokens sorted in order of appearance frequency in a query that statically analyzes a source code and performs lexical analysis in advance; and a conversion section that executes a determination for the multi-branch determination syntax by referring to the CPU performance information and the frequently-appearing token table, and creates a branch code converted so as to make a speculatively executable branch for a first token type having a high frequency of appearance and so as to make a branch using a jump table for a second token type having a low frequency of appearance, wherein the CPU performance information is a value set such that an execution time of a comparison instruction that is executed n times equals an execution time of the jump table, wherein a value of n is set to the CPU performance information and n is a positive integer.