Patent ID: 9673308
Date: 2017-06-06
CPC Classifications: H01L

Claim:
1. A semiconductor device manufacturing method comprising: a first step in which, on a first main surface and a second main surface, which is a surface opposite to the first main surface of a semiconductor substrate, phosphorous is implanted in the second main surface by using multiple ion implantations of different acceleration energies so as to form a first impurity region on the semiconductor substrate; a second step in which a second conductivity-type impurity is implanted in the second main surface using an acceleration energy lower than the multiple ion implantations, and a second impurity region is formed so that a non-implantation region in which the impurity is not implanted is left between that and the first impurity region in the semiconductor substrate; a heat treatment step in which heat treatment is applied to the semiconductor substrate so that a buffer layer is formed by the phosphorous, a collector layer is formed by the second conductivity-type impurity, and a non-diffusion region in which the phosphorous and the second conductivity-type impurity do not diffuse is left between the buffer layer and the collector layer; and a step in which a collector electrode in contact with the collector layer is formed.