Patent ID: 9620487
Date: 2017-04-11
CPC Classifications: H01L

Claim:
1. A light emitting diode bank structure comprising: a substrate; an insulating layer on the substrate; an array of bank openings in the insulating layer, each bank opening including a bottom surface and sidewalls; a corresponding array of vertical light emitting diode devices mounted within the array of bank openings, wherein each vertical light emitting device has a maximum width of 1 μm-100 μm and includes: a passivation layer spanning sidewalls of the array of vertical light emitting diode devices and least partially filling the array of bank openings, wherein the passivation layer does not completely cover the top conductive electrode of each vertical light emitting diode device; and a transparent conductor layer over and in electrical contact with the top conductive electrode for each vertical light emitting diode device.