Patent ID: 9633873
Date: 2017-04-25
CPC Classifications: H01L,H03H,H05K

Claim:
1. An electronic device comprising: a wiring substrate; a plurality of device chips that are flip-chip mounted on an upper surface of the wiring substrate through bumps, have air gaps which expose the bumps between the device chips and the upper surface of the wiring substrate, and include at least one device chip that has a substrate having a thermal expansion coefficient more than a thermal expansion coefficient of the wiring substrate; a single junction substrate that is joined to the plurality of device chips, and has a thermal expansion coefficient equal to or less than the thermal expansion coefficient of the substrate included in the at least one device chip; and a sealer that covers the junction substrate, and seals the plurality of device chips, wherein respective top surfaces of all of the plurality of device chips that have been flip-chip mounted on the wiring substrate are in direct contact with a bottom surface of the single junction substrate, and wherein the sealer is not provided between the plurality of device chips.