Patent ID: 9634010
Date: 2017-04-25
CPC Classifications: H01L

Claim:
1. A field effect transistor device comprising: a first semiconductor fin arranged on a substrate, the first semiconductor fin is doped with n-type dopants; a second semiconductor fin arranged on the substrate, the second semiconductor fin is doped with p-type dopants; a first gate stack arranged over the first semiconductor fin; a second gate stack arranged over the second semiconductor fin; a first spacer arranged adjacent to the first gate stack, the first spacer having a substantially uniform thickness; and a second spacer arranged adjacent to the second gate stack, the second spacer having a substantially uniform thickness, wherein the thickness of the first spacer is substantially similar to the thickness of the second spacer; wherein the first semiconductor fin includes a first epitaxially grown semiconductor material grown from a surface of the first semiconductor fin, the first epitaxially grown semiconductor material adjacent to at least a portion of sides of the first spacer; and wherein the second semiconductor fin includes a second epitaxially grown semiconductor material grown from a surface of the first semiconductor fin, the second epitaxially grown semiconductor material adjacent to at least a portion of sides of the second spacer.