Patent ID: 9712124
Date: 2017-07-18
CPC Classifications: H03F

Claim:
1. A distributed amplifier, comprising: a drain transmission line, wherein the drain transmission line comprises a first matching section at a first end of the drain transmission line and a second matching section at a second end of the drain transmission line, the first end of the drain transmission line is connected with a drain bias voltage, the second end of the drain transmission line is used as an output end of the distributed amplifier; a gate transmission line, wherein the gate transmission line comprises a third matching section at a first end of the gate transmission line and a fourth matching section at a second end of the gate transmission line, the first end of the gate transmission line is used as an input end of the distributed amplifier, and the second end of the gate transmission line is connected with a gate bias voltage; graphene field-effect transistors, in which the graphene field-effect transistors are identical and are arranged sequentially to form GFET stages; sources of the graphene field-effect transistors are respectively grounded; gates of the graphene field-effect transistors respectively connected with a plurality of first shunt capacitors which are grounded; the gate transmission line is connected with a plurality of first nodes respectively between the gates of the graphene field-effect transistors and the plurality of first shunt capacitors, having a plurality of first inductors respectively between each two first nodes; drains of the graphene field-effect transistors respectively connected with a plurality of second shunt capacitors which are grounded; the drain transmission line is connected with a plurality of second nodes respectively between the drains of the graphene field-effect transistors and the plurality of second shunt capacitors, having a plurality of second inductors respectively between each two second nodes.