Patent ID: 9660004
Date: 2017-05-23
CPC Classifications: H01L,Y02E

Claim:
1. Display circuitry for a display having an active area and an inactive bonding area, the display circuitry comprising: a substrate; transistors in the active area, wherein the transistors comprise gate conductors and active semiconductor material; buffer layers formed on the substrate wherein, in the active area, each of the buffer layers is interposed between the gate conductors and the substrate and between the active semiconductor material and the substrate, wherein each of the buffer layers extends into the inactive bonding area, and wherein each of the buffer layers is formed at a distance away from an edge of the substrate in the inactive bonding area so that a portion of the substrate in the inactive bonding area is not covered by the buffer layers; display pixels formed over the buffer layers within the active area; and a bond pad formed directly on the buffer layers.