Patent ID: 9536964
Date: 2017-01-03
CPC Classifications: H01L

Claim:
1. A method for forming a semiconductor device structure, comprising: forming a first metal layer over a substrate; forming an etch stop layer on the first metal layer; forming a dielectric layer over the etch stop layer; forming an antireflection layer over the dielectric layer; forming a hard mask layer over the antireflection layer; forming a patterned photoresist layer over the hard mask layer; etching a portion of the antireflection layer by using the patterned photoresist layer as a mask and by performing a first etching process; etching through the antireflection layer and etching a portion of the dielectric layer by performing a second etching process to form openings in the dielectric layer, wherein the sidewalls of the openings are vertical; and etching through the dielectric layer and the etch stop layer by performing a third etching process to expose the first metal layer and to form a via portion on the first metal layer, wherein the via portion comprises a bottom surface, a first sidewall, and a second sidewall, the first sidewall extends between the bottom surface and the second sidewall and is sloped from the second sidewall to the bottom surface, the second sidewall extends upward and vertically from a top of the first sidewall, and the top of the first sidewall is below a top of the etch stop layer.