Patent ID: 9741798
Date: 2017-08-22
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a structure having a first surface, comprising a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type, and having a portion comprising the first semiconductor region, the second semiconductor region arranged in contact with the first semiconductor region, and the third semiconductor region arranged in contact with the second semiconductor region in a first direction along the first surface; an insulating film provided on the first surface of the structure; a control electrode provided on the insulating film; a first electrode electrically connected to the third semiconductor region; and a second electrode electrically connected to the first semiconductor region, the insulating film comprising a charge trap region trapping charges; and a bias voltage being applied to the first electrode and the second electrode, and the bias voltage comprising a shift voltage, the shift voltage making a reference potential of a voltage applied to the first electrode and the second electrode shift from a reference potential of a voltage applied to the control electrode by a certain voltage, wherein the charge trap region comprises SiN, and wherein a composition ratio of Si to a composition ratio of N in SiN present in the charge trap region is 0.85 or more and 0.95 or less.