Patent ID: 9685431
Date: 2017-06-20
CPC Classifications: H01L

Claim:
1. An electrostatic discharge (ESD) protection circuit, comprising: a lowly doped P region; a lowly doped N region formed in the lowly doped P region; a first highly doped P region formed entirely within the lowly doped P region; a second highly doped N region formed entirely within the lowly doped P region; a third highly doped P region formed entirely within the lowly doped N region; a fourth highly doped N region formed entirely within the lowly doped N region; a fifth highly doped N region formed entirely within the lowly doped P region, wherein the fifth highly doped N region is directly connected to the third highly doped P region, and wherein the second highly doped N region is disposed between the fifth highly doped N region and the lowly doped N region; and a trigger circuit coupled to at least one of the first highly doped P region or the fourth highly doped N region, wherein the trigger circuit includes at least a forward coupled diode; wherein: