Patent ID: 9558001
Date: 2017-01-31
CPC Classifications: G06F

Claim:
1. A method of selecting instructions to issue to a functional unit in an out-of-order processor, the method comprising: receiving a plurality of instructions at a reservation station, each instruction being one of a plurality of types of instructions and being classified into one of a plurality of categories based on the type of instruction; storing, at the reservation station, each instruction in one of a plurality of instruction queues, each instruction queue being associated with one of the plurality of categories, each instruction queue being assigned a priority and a maximum number of instructions assessed in a clock cycle; and selecting, at the reservation station, instructions from one or more of the instruction queues to issue to the functional unit in order of the assigned priorities so that instructions are selected based on a relative priority of the plurality of types of instructions; wherein the selecting for a particular instruction queue comprises sequentially assessing, in a clock cycle, each of one or more instructions in that particular instruction queue up to the maximum number of instructions for that particular queue to determine if that instruction is ready and has not been previously issued; and wherein for at least one of the instruction queues, the assigned maximum number of instructions assessed in a clock cycle is two or more.