Patent ID: 9538111
Date: 2017-01-03
CPC Classifications: H04N

Claim:
1. An integrated circuit device, comprising: a sampling circuit comprising a comparator having a first input terminal connected to a ramp signal, a second input terminal connected to an input signal from an image-sensor pixel array and an output terminal, the sampling circuit configured to perform a correlated double sampling (CDS) operation on a reset component of the input signal and an image component of the input signal; and a reset circuit having a first terminal connected to a reference signal and a second terminal connected to the output terminal of the comparator, the reset circuit configured to provide an output signal at the output terminal of the comparator with a first voltage in response to a reset control signal, which is active during at least one of a first reset interval and a second reset interval, said first reset interval preceding a first comparison interval during which a first comparison operation is performed on the ramp signal and the reset component, and said second reset interval preceding a second comparison interval during which a second comparison operation is performed on the ramp signal and the image component, wherein the reset control signal is inactive during the first comparison interval and during the second comparison interval.