Patent ID: 9614041
Date: 2017-04-04
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a substrate having a first dopant type; a first gate electrode formed over the substrate; a second gate electrode formed over the substrate and spatially separated from the first gate electrode; a first region of a second dopant type formed in the substrate between and partially underlying the first and second gate electrodes, the first region having a first dopant concentration; a first pocket of the first dopant type formed in the first region, the pocket being spaced apart from the first and second gate electrodes and having a second dopant concentration; a source region formed in the semiconductor substrate on an opposing side of the first gate electrode from the first region, the source region having the second dopant type; and a drain region formed in the semiconductor substrate on an opposing side of the second gate electrode from the first region, the drain region having the second dopant type; and a second pocket of the first dopant type formed in the drain region, the second pocket being adjacent to and spaced apart from the second electrode, the second pocket having a third dopant concentration.