Patent ID: 9742392
Date: 2017-08-22
CPC Classifications: G06F,H03K

Claim:
1. A semiconductor device comprising: a boot-up start signal generation unit configured to generate a boot-up start signal which is enabled in synchronization with a time point at which a preset delay period has passed from a time at which an initialization signal is enabled after a power-up period is ended; a boot-up period signal generation unit configured to generate a boot-up period signal which is enabled according to a set pulse generated in synchronization with a time at which the boot-up start signal is enabled, and a boot-up operation circuit configured to perform a boot-up operation in which control data generated in response to the boot-up period signal is transferred to a first data latch unit and a second data latch unit, wherein the boot-up period signal is disabled in response to an end pulse.