Patent ID: 9595519
Date: 2017-03-14
CPC Classifications: H01L

Claim:
1. An electrical system comprising: a metal oxide semi-conductor (MOS) field effect transistor (MOSFET) section disposed in a first substrate section, said MOSFET section comprising a MOSFET control gate, a source region, a drain region, and a semi-conductive channel region within a gate insulator region, said semi-conductive channel region formed between said source region and said drain region, said MOSFET control gate is disposed in proximity with and partially overlapping one side of said source region and one side of said drain region, said MOSFET gate is further disposed on a first side of said semi-conductive channel region; and a monolithic junction field effect transistor (JFET) section disposed on a second side of said gate insulator region that faces away from said MOSFET control gate, said JFET section comprises an opposite dopant of said semi-conductive channel region, said JFET section is further formed comprising a doped region that is not in physical contact with either said source or said drain region and is positioned at a first distance from said MOSFET control gate, said first distance is determined based on a required distance that an electromagnetic field generated by said JFET must travel to pass through said semi-conductive channel region; wherein said JFET section is disposed perpendicularly to said MOSFET on one side of said MOSFET.