Patent ID: 9748286
Date: 2017-08-29
CPC Classifications: H01L

Claim:
1. A method for manufacturing a thin film transistor substrate, the method comprising: forming a gate electrode on a substrate; forming a gate insulating layer covering the gate electrode; depositing a source-drain metal layer on the gate insulating layer; depositing a first photoresist on the source-drain metal layer; patterning the first photoresist to have a first thickness on a first area, and a second thickness thinner than the first thickness on a second area, using a half-tone mask; forming a source-drain photoresist pattern by thinning the first photoresist until the first photoresist of the second thickness is eliminated; patterning the source-drain metal layer with the source-drain photoresist pattern as a mask; removing the source-drain photoresist pattern so that a source electrode overlapping with one side of the gate electrode, and a drain electrode overlapping with other side of the gate electrode and being apart from the source electrode are formed on the gate insulating layer; depositing an oxide semiconductor material on the source electrode and the drain electrode; depositing an inorganic insulating material on the oxide semiconductor material; depositing a second photoresist on the inorganic insulating material; patterning the second photoresist using the half-tone mask; patterning the inorganic insulating material and the oxide semiconductor material using the patterned second photoresist as a mask; and removing the patterned second photoresist, so that an oxide semiconductor layer extending from the source electrode to the drain electrode, and an etch stopper having the same shape and size with the oxide semiconductor layer on the oxide semiconductor layer are formed.