Patent ID: 9633859
Date: 2017-04-25
CPC Classifications: H01L

Claim:
1. A method for manufacturing a semiconductor device, comprising the steps of: (a) providing a semiconductor substrate, (b) forming a first gate electrode over the semiconductor substrate in a first region of the main surface of the semiconductor substrate, and forming a second gate electrode over the semiconductor substrate in a second region of the main surface of the semiconductor substrate, forming a first gate insulation film between the first gate electrode and the semiconductor substrate, and forming a second gate insulation film between the second gate electrode and the semiconductor substrate, (c) forming a first insulation film having a charge accumulation part in the inside thereof at the main surface of the semiconductor substrate, the surface of the first gate electrode, and the surface of the second gate electrode in the first region and the second region, (d) forming a first conductive film over the first insulation film, (e) forming a second insulation film containing silicon over the first conductive film, (f) forming a first film formed of silicon over the second insulation film, (g) in the first region, etching back the first film, and thereby leaving the first film at a first side surface of the first gate electrode via the first insulation film, the first conductive film, and the second insulation film to form a first sidewall part, and in the second region, removing the first film, (h) removing the portion of the second insulation film exposed from the first sidewall part, and (i) etching back the first conductive film, and thereby forming a third gate electrode formed of the first conductive film between the first sidewall part and the first gate electrode, and between the first sidewall part and the semiconductor substrate, and leaving the first conductive film at a second side surface of the second gate electrode via the first insulation film to form a fourth gate electrode, wherein the gate length of the third gate electrode is longer than the gate length of the fourth gate electrode.