Patent ID: 9595958
Date: 2017-03-14
CPC Classifications: H01L,H02M,H02P,H03K

Claim:
1. A semiconductor device, comprising: a switching arm unit including a first wide bandgap semiconductor element and a second wide bandgap semiconductor element, each having a body diode, connected in series between a positive line and a negative line, the switching arm unit having a node between the first and second wide bandgap semiconductor elements that is configured to be connected to a load; a current detecting unit that detects a current in the second wide bandgap semiconductor element that indicates a flyback current flowing in the second wide bandgap semiconductor element, the flyback current being generated as a result of said load been driven by the first wide bandgap semiconductor element; a driving unit that drives said first wide bandgap semiconductor element and said second wide bandgap semiconductor element; and a memory storing a fault inhibiting characteristic curve defining a border between a fault growth region and a fault inhibiting region for a crystalline semiconductor constituting the second wide bandgap semiconductor element, wherein said driving unit determines, by referring to said fault inhibiting characteristic curve, whether the detected current of the second wide bandgap semiconductor element falls within the fault growth region or within the fault inhibiting region, and when a result of said determination indicates that the detected current is within the fault growth region, the driving unit outputs, to the first wide bandgap semiconductor element, a driving signal that reduces a current flowing in the first wide bandgap semiconductor element when driving said load therethrough so that a resultant current detected by the current detecting unit falls within the fault inhibiting region.