Patent ID: 9691768
Date: 2017-06-27
CPC Classifications: G06F,H01L

Claim:
1. A circuit, comprising: a first transistor; a second transistor; an interconnect connecting a terminal of the first transistor to a terminal of the second transistor, the interconnect comprising one or more nanowires or one or more 2D material strips arranged in parallel; and patterned conductors including nanowires or 2D material strips, wherein a first set of nanowires or a first set of 2D material strips in the patterned conductors is arranged as a first patterned conductor in a first direction over an area where channels of the first transistor and the second transistor are disposed, and a second set of nanowires or a second set of 2D material strips in the patterned conductors is arranged as a second patterned conductor in a second direction orthogonal to the first direction and over the first set of nanowires.