Patent ID: 9543893
Date: 2017-01-10
CPC Classifications: H03B,H03M,H04H,H04N

Claim:
1. A circuit for frequency sampling, the circuit comprising: a first input coupled to receive a first satellite signal at a first satellite downlink frequency; a second input coupled to receive a second satellite signal at a second satellite downlink frequency; a first analog-to-digital converter having an input coupled to receive the first satellite signal and an output, the first analog-to-digital converter configured to create a first digital output signal representing the first satellite signal; a second analog-to-digital converter having an input coupled to receive the second satellite signal and an output, the second analog-to-digital converter configured to create a second digital output representing the second satellite signal; a dielectric resonator oscillator having an output; and a clock generator circuit having an input coupled to the oscillator output and configured to output one or more clocks used by the first and second analog-to-digital converters; wherein the first and second analog-to-digital converters are implemented as part of an integrated circuit and a resonator element of the dielectric resonator oscillator is coupled to the integrated circuit.