Patent ID: 9552034
Date: 2017-01-24
CPC Classifications: G06F,Y02D

Claim:
1. A method for providing hardware limit management and enforcement, the method comprising: monitoring a chip component on a system on chip (SoC) with a sensor module; storing sensor data from the sensor module in a local limit management (LLM) hardware component, wherein the sensor data comprises an estimated current consumption of the monitored chip component and wherein the LLM hardware component is associated with a domain limit manager (DLM) component in a parent/child relationship such that the DLM component is configured as a parent component to budget a programmable battery current consumption limit to a child LLM component; storing the battery current consumption limit in the LLM hardware component; comparing the estimated current consumption of the monitored chip component to the battery consumption limit stored in the LLM hardware component; and if the estimated current consumption exceeds the battery consumption limit, initiating a predefined throttling action for enforcing the battery consumption limit.