Patent ID: 9620196
Date: 2017-04-11
CPC Classifications: G11C

Claim:
1. A reception circuit comprising: a control signal generation circuit that generates a first asynchronous transfer circuit that latches reception data based on the first enable signal and the strobe signal and outputs output data corresponding to the latched reception data based on the second enable signal and the core clock signal; a pattern data generation circuit that generates determination pattern data from the first enable signal and inverts a logic of the determination pattern data in accordance with a change in the first enable signal; a second asynchronous transfer circuit that latches the determination pattern data based on the first enable signal and the strobe signal and outputs determination data corresponding to the latched determination pattern data based on the second enable signal and the core clock signal; a determination circuit that determines a timing for generating the pointer control signal based on the determination data output from the second asynchronous transfer circuit; and a set value calculation circuit that calculates the transfer set value based on a determination result of the determination circuit.