Patent ID: 9721632
Date: 2017-08-01
CPC Classifications: G11C

Claim:
1. A method of accessing a magnetoresistive memory cell that stores a single data bit using a first magnetic tunnel junction and a second magnetic tunnel junction coupled in series, wherein each of the first and second magnetic tunnel junctions has a respective initial state that is one of a first state, a second state, and a defective state, the method comprising: detecting a first resistance across the memory cell, wherein the first resistance depends on the initial states of the first and second magnetic tunnel junctions; after detecting the first resistance, initiating a current through the memory cell, wherein, when at least one of the first and second magnetic tunnel junctions is in the first state, the current has sufficient magnitude to switch at least one of the first and second magnetic tunnel junctions from the first state to the second state; after initiating the current, detecting a second resistance across the memory cell, wherein the second resistance depends on resulting states of the first and second magnetic tunnel junctions after the current is initiated; and determining the single data bit stored in the memory cell based on the first resistance and the second resistance.