Patent ID: 9721954
Date: 2017-08-01
CPC Classifications: G11C,H01L

Claim:
1. A Static Random Access Memory (SRAM) device, comprising: at least one memory cell arranged in a first wiring layer; a first wiring arranged in a second wiring layer; a second wiring arranged in the second wiring layer; a third wiring arranged in the second wiring layer between the first and second wirings; a first projecting portion integrally formed with the first wiring between the first and second wirings in the second wiring layer; a fourth wiring arranged in a third wiring layer, the fourth wiring intersecting with the first wiring and the first projecting portion; a first via coupling between the first wiring and the fourth wiring; and a second via coupling between the first projecting portion and the fourth wiring, wherein the first via coupling is formed on a portion on the first wiring that is adjacent to the first projecting portion such the first via coupling and the second via coupling are adjacent to each other.