Patent ID: 9575499
Date: 2017-02-21
CPC Classifications: G05F

Claim:
1. A low-dropout voltage regulator (LDO), comprising: a power transistor, receiving a driving signal, controlled by the driving signal for switching and converting an input voltage into an output voltage to provide to a load; a feedback circuit, coupled to the power transistor and generating a feedback voltage according to the output voltage; a driving stage circuit, generating the driving signal according to the feedback voltage and the reference voltage; a bias power source, coupled to the driving stage circuit and configured to provide a bias current; and an auxiliary reference current generation circuit, coupled to the power transistor, the driving stage circuit and the bias power source and configured to sample an output current flowing through the power transistor, adjust the sampled output current to generate an adjustment current by means of mapping and superpose the adjustment current onto the bias current to generate a reference current to control drive capability of the driving stage circuit.