Patent ID: 9582320
Date: 2017-02-28
CPC Classifications: G06F

Claim:
1. A processing system, comprising: a processor configured to execute a plurality of instructions corresponding to a task, wherein the plurality of instructions comprises a resource transfer instruction to indicate a transfer of processing operations of the task from the processor to a different resource and a hint instruction which precedes the resource transfer instruction by a set of instructions within the plurality of instructions; and a processor task scheduler, coupled to the processor, configured to schedule tasks to the processor, wherein, in response to execution of the hint instruction of the task, the processor task scheduler finalizes selection of a next task to utilize the processor and loads a context of the selected next task into a background register file of the processor, wherein: wherein a time required to execute the set of instructions after execution of the hint instruction is predicted to be at least as long as a time required to load the context of the selected new task into the background register file.