Patent ID: 9627033
Date: 2017-04-18
CPC Classifications: G11C

Claim:
1. A sense amplifier comprising: an equalization unit configured to precharge a pair of bit lines to a level of a bit line precharge voltage in response to a bit line equalizing signal; an amplification unit configured to sense and amplify voltages of the pair of bit lines, supply, during an active operation, a ground voltage to a pull-down node of a latch section, and supply, a first voltage lower than the ground voltage to the pull-down node of the latch section during a period from a point of time when a precharge signal is enabled to before the bit line equalizing signal is enabled; and a driving signal control circuit configured to disable the bit line equalizing signal and enable a word line when an active signal is enabled, enable a first driving signal after a predetermined delay time when the active signal is enabled, and disable the first driving signal and enable a second driving signal when the precharge signal is enabled, wherein the driving signal control circuit comprises: a bank control block configured to generate an inverted signal of the bit line equalizing signal, a pull-up driving signal, a first pull-down driving signal and a second pull-down driving signal in response to the active signal and the precharge signal; and a sense amplifier driving block configured to drive the inverted signal of the bit line equalizing signal, the pull-up driving signal, the first pull-down driving signal and the second pull-down driving signal, and output the bit line precharge signal, the first driving signal and the second driving signal, wherein the bank control block comprises: a command control unit configured to output the active signal and the precharge signal in response to a bank control signal; a first delay unit configured to delay the active signal; a second delay unit configured to delay the precharge signal; a driving signal generation unit configured to generate the inverted signal of the bit line equalizing signal in response to the active signal and an output of the second delay unit; a pull-up control unit configured to generate the pull-up driving signal in response to the output of the second delay unit and an output of the first delay unit; a first pull-down control unit configured to drive the output of the first delay unit and the precharge signal; and a second pull-down control unit configured to control the first pull-down driving signal and the second pull-down driving signal in response to the output of the second delay unit and an output of the first pull-down control unit.