Patent ID: 9583629
Date: 2017-02-28
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a first line configured to extend in a first direction along a surface of a semiconductor substrate; a first transistor configured to be disposed above the first line, the first transistor including, a second line configured to be connected to an upper face of the first semiconductor layer and to extend in the second direction; a plurality of third lines configured to extend along the surface of the semiconductor substrate and to intersect with the second line above the first transistor; and a plurality of memory cells configured to be disposed at positions where the second line and the plurality of third lines intersect, a face of the first gate electrode which abuts on the first gate insulating film being curved along the second direction so that a portion in the face on a side of the first semiconductor region is spaced apart from the first semiconductor layer, and a film thickness along the first direction of a first portion being thicker than a film thickness along the first direction of a second portion, the first portion being a portion that is on a side of the first semiconductor region in the first gate insulating film, the second portion being portion that is on a side of the third semiconductor region in the first gate insulating film.