Patent ID: 9691746
Date: 2017-06-27
CPC Classifications: H01L

Claim:
1. A method for packaging a semiconductor die assembly, the method comprising: providing a first die and a plurality of second dies arranged in a stack and attached to the first die, wherein the first die has a peripheral region extending laterally outward from the stack of second dies; positioning at least a first portion of a thermal transfer structure at the peripheral region of the first die, wherein the first portion has a first sidewall extending from the peripheral region to a height at an intermediate elevation of the stack of second dies, and wherein the thermal transfer structure comprises a thermally conductive material; flowing an underfill material between the second dies after positioning the thermal transfer structure on the peripheral region of the first die, wherein the underfill material has a fillet extending laterally from the stack of second dies, wherein the lateral extension of the underfill material is limited by the first sidewall of the first portion of the thermal transfer structure, and wherein the fillet has an upper surface that is curved; and attaching a second portion of the thermal transfer structure to the first portion of the thermal transfer structure after flowing the underfill material, wherein the second portion includes a cover having a top and a second sidewall pendent from the top, and wherein the second sidewall is configured to attach to the first sidewall at the intermediate elevation.