Patent ID: 9698183
Date: 2017-07-04
CPC Classifications: H01L,H04N

Claim:
1. A CMOS image sensor comprising: an image array including M rows and N columns of pixels and N output conductive tracks corresponding respectively to the N columns, where for each column, the pixels of the column are connected to the corresponding output conductive track, and the pixels of different columns are connected to different output conductive tracks, each pixel including a photodiode, a sense node, a transfer transistor coupling the sense node to a first node of the photodiode, a reset transistor coupling the sense node to a pixel reset voltage node, and a read circuit coupling the sense node to the output conductive track corresponding to the column that includes the pixel; and a test circuit including a first assembly of N elementary reference cells respectively coupled to the N output conductive tracks, each elementary reference cell including a resistor, a sense node, a transfer transistor coupling the sense node of the elementary reference cell to a first node of the resistor, a reset transistor coupling the sense node of the elementary reference cell to a cell reset voltage node, and a read circuit coupling the sense node of the elementary reference cell to the output track to which the elementary reference cell is coupled, the resistors of said first assembly being series-coupled between first and second reference voltage nodes.