Patent ID: 9639280
Date: 2017-05-02
CPC Classifications: G06F

Claim:
1. A method for processing a memory command on a computer system, comprising: obtaining, by a command scheduler executing on a memory controller of the computer system, a predicted latency of the memory command based on a memory address to be accessed by the memory command; and ordering, by the command scheduler, the memory command with other memory commands in a command queue for subsequent processing by a memory resource on the computer system based on the predicted latency of the memory command, wherein ordering the memory command comprises, when the predicted latency exceeds a latency threshold, delaying issuance of the memory command until a delay condition is met, wherein, while issuance of the memory command is delayed, when the memory command comprises data to be written to the memory, using the memory command to forward data to later read commands directed to the memory address.