Patent ID: 9625523
Date: 2017-04-18
CPC Classifications: G01R,G11C

Claim:
1. A test circuitry for testing an interconnection between interconnected dies, comprising: a cell embedded within one of the interconnected dies, the cell comprising: a selection logic module, comprising: a first multiplexer configured to receive a first control signal and provide a first output test signal; and a second multiplexer configured to receive a second control signal and provide a second output test signal; a transition generation module configured to receive a third control signal; wherein the first and second output test signals are generated based on a combination of states of the first, second, and third control signals, and wherein the test circuitry is configured to use the first and second output test signals to perform at least two of: a DC test on the interconnection in a first mode, an AC test on the interconnection in a second mode, and a burn-in-test on the interconnection in a third mode.