Patent ID: 9660097
Date: 2017-05-23
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: an oxide semiconductor layer; a first electrode layer over and in contact with the oxide semiconductor layer; a second electrode layer over and in contact with the oxide semiconductor layer; a first insulating layer over the first electrode layer and the second electrode layer, the first insulating layer comprising an opening; a second insulating layer over the first insulating layer and the oxide semiconductor layer, the second insulating layer being in contact with a part of the oxide semiconductor layer; a gate electrode layer over the second insulating layer, the gate electrode layer overlapping the part of the oxide semiconductor layer; and a third insulating layer over the gate electrode layer, the third insulating layer being in contact with the first insulating layer, wherein the opening of the first insulating layer and the part of the oxide semiconductor layer overlap each other.