Patent ID: 9569223
Date: 2017-02-14
CPC Classifications: G06F

Claim:
1. A method comprising: providing, by a processing device executing a hypervisor of a host computer, a shared memory area writeable by a first virtual processor and a second virtual processor that are runnable on the processing device, wherein the shared memory area is associated with the processing device and is shared by the hypervisor with the first virtual processor and the second virtual processor; storing, in the shared memory area by the processing device executing the hypervisor, information accessible by the first virtual processor; in response to determining that the first virtual processor has stopped running on the processing device, retrieving, by the processing device executing the hypervisor, the information stored in the shared memory area before the second virtual processor starts running on the processing device; and storing, by the processing device executing the hypervisor, the information retrieved from the shared memory area in a non-shared memory area, wherein the non-shared memory area is accessible by the hypervisor, but is inaccessible by the first virtual processor and by the second virtual processor.