Patent ID: 9679977
Date: 2017-06-13
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a substrate comprising an NMOS region having a first protruding active region and a PMOS region having a second protruding active region; a first gate structure formed on the NMOS region and extending across the first protruding active region in a first direction, the first gate structure including portions horizontally adjacent to sidewalls of the first protruding active region; a second gate structure formed on the PMOS region and extending across the second protruding active region in the first direction, the second gate structure including portions horizontally adjacent to sidewalls of the second protruding active region; a first source/drain region formed on a side of the first gate structure and on the first protruding active region; a second source/drain region formed on a side of the second gate structure and on the second protruding active region; a first contact plug formed on the first source/drain region; and a second contact plug formed on the second source/drain region, wherein, with respect to vertical cross sections taken in a direction parallel to the first direction, a shape of the first contact plug is not symmetric with a shape of the second contact plug.