Patent ID: 9748229
Date: 2017-08-29
CPC Classifications: H01L

Claim:
1. A method for manufacturing a semiconductor device, comprising: forming a floating region of a first conductivity type selectively in a semiconductor substrate of a second conductivity type and a trench in the semiconductor substrate at a position bordering the floating region; forming an insulating film on a surface of the semiconductor substrate and on inner surfaces of the trench; thereafter, forming a conductive layer on the surface of the semiconductor substrate and on the inner surfaces of the trench having the insulating film thereon; performing anisotropic etching on the conductive layer to pattern the conductive layer such that, in the trench, the patterned conductive layer provides an emitter connecting part on one inner surface of the trench at a side facing the floating region and a trench gate on another inner surface of the trench at a side opposite thereto, the emitter connecting part and the trench gate being separated from each other by a gap; forming a center insulating film that separates and insulates the emitter connecting part from the trench gate in the trench; forming an emitter region of the second conductivity type in the surface of the semiconductor substrate and a base region of the first conductivity type under the emitting region at a side of the trench opposite to the floating region; thereafter, forming an interlayer insulating film on the surface of the semiconductor substrate; forming a contact trench that extends vertically downwardly and penetrates through the interlayer insulating film and the emitter region, thereby reaching an inside of the base region thereunder; forming a base contact region of the first conductivity type in the inside of the base region that has been exposed by the contact trench; forming an emitter electrode on the surface of the semiconductor substrate so that the emitter electrode contacts the emitter region, the base region, and the base contact region through the contact trench; and forming a collector region of the first conductivity type on a rear surface of the semiconductor substrate, wherein the forming of the floating region and the trench includes: