Patent ID: 9647008
Date: 2017-05-09
CPC Classifications: G02F,H01L

Claim:
1. A method of fabricating an array substrate, comprising: forming a via extending through a first insulating layer of a first insulating material and a second insulating layer of a second insulating material, the via comprising a first sub-via in the first insulating layer and a second sub-via in the second insulating layer, the first insulating material being different from the second insulating material; mobilizing a portion of the first insulating material surrounding the first sub-via; and distributing a mobilized first insulating material over a sidewall of the second sub-via; wherein the step of forming the via comprises etching the first insulating layer to form the first sub-via; and etching the second insulating layer to form the second sub-via; the method further comprises pre-curing the first insulating layer after the etching of the first insulating layer and prior to the etching of the second insulating layer.