Patent ID: 9620602
Date: 2017-04-11
CPC Classifications: H01L,H05K

Claim:
1. A semiconductor device, comprising: a first fin having a rectangular parallelepiped shape extending in a first direction; a second fin having a rectangular parallelepiped shape arranged being spaced from and parallel to the first fin; a gate electrode arranged over the first and second fins via a gate insulating film and extending in a second direction intersecting the first direction; a first drain diffusion layer formed in the first fin located on one side of the gate electrode; a first source diffusion layer formed in the first fin located on the other side of the gate electrode; a second drain diffusion layer formed in the second fin located on one side of the gate electrode; a second source diffusion layer formed in the second fin located on the other side of the gate electrode; a drain region arranged over the first and second drain diffusion layers and extending in the second direction; a source region arranged over the first and second source diffusion layers and extending in the second direction; a first drain plug formed over the drain region; and a plurality of source plugs, including a first source plug and a second source plug, formed over the source region and arranged being spaced from each other, wherein the first source plug and the second source plug are arranged so that their positions in the second direction overlap with the first fin and the second fin, respectively, wherein the first source plug and the second source plug are arranged so that their positions are adjacent in the second direction, and wherein, so as to correspond to a region between the first source plug and the second source plug, the first drain plug is arranged in a displaced manner so that its position in the second direction does not overlap with any of the plurality of source plugs, including the first source plug and the second source plug.