Patent ID: 9560748
Date: 2017-01-31
CPC Classifications: H05K,Y10T

Claim:
1. A flexible printed circuit, comprising: a first insulating substrate layer; a top electrically conductive shielding layer located adjacent to a first side of the first insulating substrate layer, the top electrically conductive shielding layer having a first portion that is substantially solid and a second portion having a multiplicity of voids in a pattern for providing a lower stiffness in the second portion relative to the first portion, thereby providing more flexibility in the second portion relative to the first portion; a middle electrically conductive layer comprising a plurality of electrically conductive traces for conducting one or more of electrical signals and electrical power from a first part of the flexible printed circuit to a second part of the flexible printed circuit, the middle conductive layer being located adjacent to a second side of the first insulating substrate layer; a second insulating layer, the middle electrically conductive layer being located adjacent to a first side of the second insulating layer; and a bottom electrically conductive shielding layer located adjacent to a second side of the second insulating layer, the bottom electrically conductive shielding layer having a first portion that is substantially solid and a second portion having a multiplicity of voids in a pattern for providing a lower stiffness in the second portion of the bottom electrically conductive shielding layer relative to the first portion of the bottom electrically conductive shielding layer, thereby providing more flexibility in the second portion of the bottom electrically conductive shielding layer relative to the first portion of the bottom electrically conductive shielding layer, wherein the sections between adjacent voids in the top electrically conductive shielding layer and bottom electrically conductive shielding layer are substantially solid, and when the top electrically conductive shielding layer, middle conductive layer, and bottom electrically conductive shielding layer are stacked in a vertical configuration, the sections in each of the shielding layers are oriented such that they are not parallel to the conductive traces of the middle conductive layer.