Patent ID: 9564540
Date: 2017-02-07
CPC Classifications: H01L

Claim:
1. A method of manufacturing a semiconductor device, comprising the steps of: (a1) providing a semiconductor substrate having, over the main surface thereof, a first region, a second region, and a third region; (b1) stacking a first insulating film, a first polysilicon film, and a second polysilicon film successively over the main surface of the semiconductor substrate; (c1) processing the first polysilicon film and the second polysilicon film in the first region to form a selective gate electrode including the first polysilicon film and the second polysilicon film; (d1) forming a memory gate electrode adjacent to the sidewall of the selective gate electrode and the main surface of the semiconductor substrate via a third insulating film formed by successively stacking a second insulating film and a charge storage film; (e1) after the step (d1), injecting an impurity of a first conductivity type to the second polysilicon film from above the second polysilicon film in the second region and the third region; (f1) processing the second polysilicon film and the first polysilicon film in the second region and the third region to form, in the second region and the third region, a first gate electrode and a second electrode each including the first polysilicon film and the second polysilicon film; and (g1) forming a nonvolatile memory including the selective gate electrode, the memory gate electrode, and the third insulating film, forming a first field effect transistor of the first conductivity type including the first gate electrode, and forming a second field effect transistor of the first conductivity type including the second gate electrode and having a drive voltage lower than that of the first field effect transistor.