Patent ID: 9741417
Date: 2017-08-22
CPC Classifications: G11C

Claim:
1. A sense amplifier circuit comprising: a first transistor and a second transistor, the first transistor configured as a current source for a first current path during at least a latter portion of a first phase of a memory read operation and during at least an initial portion of a second phase of a memory read operation and the second transistor configured as a current source for a second current path during at least a latter portion of a first phase a memory read operation and during at least an initial portion of a second phase of a memory read operation; a third transistor located in the first current path; a fourth transistor located in the second current path; a capacitor having a first electrode and a second electrode, during a first phase of a memory read operation, the first electrode is coupled to a node of the first current path and the second electrode is coupled to a node of the second current path, wherein during a second phase of a memory read operation, the first electrode is coupled to a control terminal of the third transistor and the second electrode is coupled to the node of the second current path; wherein during a first phase of a memory read operation, the first current path is coupled to a first cell via a first switch in a closed position and the second current path is coupled to a second cell via a second switch in a closed position, during a first phase of a memory read operation, a third switch and a fourth switch are open, wherein during a second phase of a memory read operation, the first current path is coupled the second cell via the third switch in a closed potion and the second current path is coupled to the first cell via the fourth switch in a closed position, during a second phase of a memory read operation, the first switch and the second switch are open.