Patent ID: 9590648
Date: 2017-03-07
CPC Classifications: H03M

Claim:
1. An apparatus for conversion of an input digital signal to an output analog signal having a maximum output level, said input digital signal being nominally a signal of K bits, comprising: a bit grouping providing system which provides said input digital signal as a low-path digital signal of L primary bits and a high-path digital signal of H primary bits, where L+H is greater than or equal to J, and J is a number of bits of said input digital signal utilized by said bit divider where J is less than or equal to K, a low-path digital-to-analog converter for digital inputs of R a high-path digital-to-analog converter for digital inputs of R a low-path attenuator which attenuates said low-path digital-to-analog converter output signal to produce an attenuated low-path analog signal, a high-path amplifier which amplifies said high-path digital-to-analog converter output signal to produce an amplified high-path signal having a maximum level equal to said maximum output level, and a passive summing node which, combines an ultimate low-path signal derived from said attenuated low-path analog signal and an ultimate high-path signal derived from said amplified high-path signal to produce said output analog signal.