Patent ID: 9680055
Date: 2017-06-13
CPC Classifications: H01L

Claim:
1. A hetero-substrate comprising: a silicon substrate; a buffer layer provided on the silicon substrate; a nucleation layer between the silicon substrate and the buffer layer, wherein the nucleation layer is formed by using an Al coating layer on the silicon substrate; a first semiconductor layer provided on the buffer layer, the first semiconductor layer comprising a nitride semiconductor; a second semiconductor layer provided on the first semiconductor layer, the second semiconductor layer comprising a first conductive type nitride semiconductor having a first doping concentration between 5×10 a stress control structure provided between the first semiconductor layer and the second semiconductor layer, the stress control structure comprising a plurality of stress compensation layers and a plurality of third semiconductor layers that are alternately arranged with respect to each other, the third semiconductor layer comprising the first conductive type nitride semiconductor having a second doping concentration that is less than or equal to the first doping concentration, wherein respective second doping concentrations of the plurality of third semiconductor layers increase, from 15% to 90% of the first doping concentration between 5×10 wherein at least one stress compensation layer is provided between the third semiconductor layers and the second semiconductor layer, and wherein the first semiconductor layer is doped and has a lower doping concentration than that of the third semiconductor layer.