Patent ID: 9621183
Date: 2017-04-11
CPC Classifications: H03M

Claim:
1. A modulator comprising: a. a forward path coupling a input summing block with an data out block, the forward path including at least a Nth order filter coupled to said input summing block and a plurality of interleaved multi-bit Analog to Digital Converters (ADCs), the interleaved multi-bit ADCs the having inputs which are coupled to said Nth order filter and outputs which are coupled to said data out block; and b. a feedback path including a plurality of interleaved multi-bit Digital to Analog Converters (DACs), the interleaved multi-bit DACs having inputs which are coupled to respective outputs of the interleaved multi-bit ADCs, the interleaved multi-bit DACs having outputs which are summed together and applied to said input summing block, with connections between the interleaved multi-bit DACs and the Nth order filter.