Patent ID: 9681543
Date: 2017-06-13
CPC Classifications: H01L,H05K

Claim:
1. An electronic device comprising: a substrate having an upper surface; an electrically conductive pattern on the upper surface of said substrate and comprising a plurality of traces; a cover layer having a lower surface directly on the upper surface of said substrate and said electrically conductive pattern, said cover layer having a plurality of openings therein aligned with said electrically conductive pattern, each opening having a respective width less than that of a respective trace in said electrically conductive pattern; and an integrated circuit (IC) having a lower surface in direct contact with an upper surface of said cover layer, said IC having a plurality of bond pads on the lower surface thereof electrically coupled to adjacent ones of said plurality of traces, said cover layer having a first portion under said IC, and a second portion extending laterally beyond said IC; said first portion of said cover layer having a thickness greater than a thickness of said second portion of said cover layer.