Patent ID: 9543534
Date: 2017-01-10
CPC Classifications: H01L

Claim:
1. A method of fabricating a carbon nanotube semiconductor device, the method comprising: forming at least one carbon nanotube on an insulating portion of a substrate, the at least one carbon nanotube including a channel portion interposed between opposing doped source/drain portions; forming a contact stack atop the insulating portion to cover the at least one carbon nanotube, and forming a trench in the contact stack that extends along a first direction to expose the channel portion; selectively etching the contact stack in the first direction to form opposing buffer regions in the contact stack on opposite sides of the trench; and depositing a gate dielectric layer that lines the sidewalls of the trench and fills the buffer regions so as to form dielectric extension regions that isolate the trench from the doped source/drain portions.