Patent ID: 9594727
Date: 2017-03-14
CPC Classifications: G06F

Claim:
1. A non-transitory computer readable medium that stores instructions, which, when executed, cause a computer to perform a method comprising: defining a Gaussian surface around an origin net of an integrated circuit (IC) design; partitioning the Gaussian surface into a plurality of regions; using a Monte Carlo field solver, performing an initial plurality of random walks from each region, wherein each of the initial plurality of random walks ends on a conductor of the IC design; dynamically allocating an additional plurality of random walks among the plurality of regions, wherein a number of the additional plurality of random walks allocated to each region is based on a statistical error associated with the initial plurality of random walks performed from the region; summing results of random walks performed from each of the regions to estimate a parasitic capacitance of the origin net; and using the estimated parasitic capacitance to modify the IC design.