Patent ID: 9727682
Date: 2017-08-08
CPC Classifications: G06F

Claim:
1. A method performed by a computer system for designing an integrated circuit that contains at least two memory instances, the method comprising: accessing a register transfer level (RTL) description of the integrated circuit, wherein the RTL description includes calls to a generic memory model of the memory instances, each call for a memory instance using (a) a generic memory call interface for the generic memory model, the generic memory call interface including a set of memory parameters, and (b) memory parameters for the memory instance; and processing the register transfer level (RTL) description of the integrated circuit as a step in a flow for designing and fabricating the integrated circuit, wherein processing the register transfer level (RTL) description comprises: for the calls to the generic memory model of the memory instances, processing specific memory models for the memory instances, the specific memory model for each memory instance synthesized from the generic memory model using the memory parameters corresponding to the memory instance, the processed RTL description used in the flow for designing and fabricating the integrated circuit.