Patent ID: 9698807
Date: 2017-07-04
CPC Classifications: H03L,H03M

Claim:
1. An apparatus comprising: a first time-based digital-to-analog converter configured to generate a first clock signal based on a first reference clock signal and a first digital code, the first clock signal having one of a delay based on the first digital code and a period based on the first digital code; a second time-based digital-to-analog converter configured to generate a second clock signal based on a second reference clock signal and a second digital code, the first reference clock signal having a first frequency and the second reference clock signal having a second frequency that is harmonically related to the first frequency; and a time signal converter configured to generate an output signal having a level indicative of a time-of-arrival of a first edge of the first clock signal relative to a time-of-arrival of a second edge of the second clock signal.