Patent ID: 9640556
Date: 2017-05-02
CPC Classifications: G02F,H01L

Claim:
1. A thin film transistor comprising: a substrate; and, disposed on or over the substrate in the sequence set forth, a gate electrode; a gate insulator film; an oxide semiconductor layer; source-drain electrodes; and a passivation film that protects the source-drain electrodes, the oxide semiconductor layer being a multilayer assembly comprising: a first oxide semiconductor layer comprising In, Ga, Zn, Sn, and O; and a second oxide semiconductor layer comprising In, Ga, Sn, and O, the second oxide semiconductor layer being disposed on or over the gate insulator film, the first oxide semiconductor layer being disposed between the second oxide semiconductor layer and the passivation film, ratios (atomic ratios, hereinafter the same) in contents of the individual metal elements to all the metal elements in the first oxide semiconductor layer meeting conditions expressed as follows: Ga/(In+Ga) is from 0.50 to 0.80; Ga/(In+Ga+Zn+Sn) is from 0.15 to 0.45; and Sn/(In+Ga+Zn+Sn) is from 0.05 to 0.25, ratios in contents of the individual metal elements to all the metal elements in the second oxide semiconductor layer meeting conditions expressed as follows: In/(In+Ga) is from 0.60 to 0.75; In/(In+Ga+Sn) is from 0.30 to 0.58; and Sn/(In+Ga+Sn) is from 0.15 to 0.38.