Patent ID: 9613796
Date: 2017-04-04
CPC Classifications: H01L

Claim:
1. A method of flattening a wafer, comprising: providing at least a wafer, the wafer comprising a substrate and at least a dielectric layer disposed on the substrate, the wafer comprising a central region and a wafer bevel region surrounding the central region; providing a wafer-protecting mask, wherein the wafer-protecting mask comprises a center sheltering region, covering all the central region of the wafer, and at least a wafer bevel sheltering region, extending outwardly from the center sheltering region, covering parts of the wafer bevel region, and exposing the other parts of the wafer bevel region when viewed in bottom view, wherein the shape of the wafer bevel sheltering region is a semicircular tab and the wafer bevel sheltering region being configured along the edge of the center sheltering region; performing a wafer bevel etching process, the wafer bevel etching process uses the wafer-protecting mask to cover the central region and parts of the wafer bevel region, to etch parts of the wafer bevel region, and not etching the central region and other parts of the wafer bevel region; and performing a chemical mechanical polishing (CMP) process on the wafer.