Patent ID: 9698795
Date: 2017-07-04
CPC Classifications: G06F,H03K

Claim:
1. An input/output (I/O) circuit comprising: an I/O port having a data input and an I/O output enable input, the I/O output enable input configured to be terminated to a fixed voltage; and an OR gate having a first input, a second input, and an output, the output of the OR gate coupled to the data input of the I/O port, the first input of the OR gate coupled to receive an inverted output enable signal, the second input of the OR gate coupled to receive a data input signal, wherein a signal at the output of the OR gate coupled with the data input of the I/O port is used to provide one of a first voltage and a second voltage on an output node of the I/O port, the first voltage provided based on the inverted output enable signal being at a first state, the second voltage being provided based on the inverted output enable signal being at a second state, wherein the inverted output enable signal and the data input signal are independent of each other.