Patent ID: 9679654
Date: 2017-06-13
CPC Classifications: G11C

Claim:
1. A method, comprising: providing, via a current source, channel current for a memory cell having a source terminal, a drain terminal, and a gate terminal, wherein the current source is coupled to the source terminal or the drain terminal of the memory cell; and continuously programming the memory cell at an adaptive rate, based on a target voltage for programming, using a feedback loop to monitor the gate terminal of the memory cell and continuously adapting at least one of an amount of current that is supplied by the current source or the drain-to-source voltage of the memory cell set by a linearizing amplifier, wherein the linearizing amplifier sets a drain-to-source voltage of the memory cell using the feedback loop, from the source terminal or drain terminal of the memory cell, to the gate terminal of the memory cell, wherein the current source comprises a current mirror, circuitry for programming comprises an operational transconductance amplifier (OTA) having an output and a pair of differential inputs, the current mirror is coupled to the source terminal of the memory cell, the output of the OTA is coupled to a reference control input of the current mirror, and the differential inputs of the OTA are coupled to the gate of the memory cell and the target voltage for programming.