Patent ID: 9746442
Date: 2017-08-29
CPC Classifications: G01N

Claim:
1. An apparatus comprising: an electrically insulating layer; a crystalline semiconductor layer adjoining a first side of the electrically insulating layer; a handle substrate adjoining a second side of the electrically insulating layer; one or more switched capacitor circuits, each of the one or more switched capacitor circuits including metal oxide semiconductor field effect transistors on the crystalline semiconductor layer, each of the transistors including source and drain regions; a plurality of capacitor structures extending perpendicularly with respect to the crystalline semiconductor layer, each of the plurality of capacitor structures being electrically connected to a pair of the transistors, and a plurality of microwells extending within the handle substrate, the plurality of capacitor structures extending within the plurality of microwells, the plurality of capacitor structures and the plurality of microwells being configured such that the one or more switched capacitor circuits are responsive to changes in ion concentration within one or more of the plurality of microwells.