Patent ID: 9680683
Date: 2017-06-13
CPC Classifications: H04L

Claim:
1. An apparatus, comprising: data arranging circuitry, which, in operation, arranges ACK/NACK information included in a signal to an end portion of a data portion of the signal, the signal including a plurality of data symbols; one or more data modulation circuits coupled to the data arranging circuitry, wherein the one or more data modulation circuits, in operation, modulate ACK/NACK information and other information, and the data arranging circuitry, in operation, arranges other modulated information to the data portion of the signal; and cyclic prefix generation circuitry, which, in operation: generates a cyclic prefix including the ACK/NACK information arranged to the end portion of the data portion of the signal; and attaches the cyclic prefix to the data portion of the signal.