Patent ID: 9685212
Date: 2017-06-20
CPC Classifications: G11C

Claim:
1. A data latch timing adjustment apparatus for receiving m external strobe signals and m groups of external data in synchronism with the m external strobe signals respectively, where m is an integer greater than or equal to 2, the apparatus comprising: m sets of a data delay selection section, a strobe latch section and a system latch section; and at least one clock delay selection section generating a clock for the system latch section, wherein each set of the m sets is associated with one of the m external strobe signals respectively, wherein the data delay selection section delays one group of the m groups of the external data, wherein the strobe latch section latches data from the data delay selection section, and wherein the system latch section latches data from the strobe latch section with the clock from the clock delay selection section.