Patent ID: 9570682
Date: 2017-02-14
CPC Classifications: H01L

Claim:
1. A method of manufacturing a semiconductor memory device which includes a variable resistance element comprising: a lower electrode; a variable resistance layer formed on the lower electrode and including a first variable resistance layer comprising a transition metal oxide and a second variable resistance layer comprising a transition metal oxide having an oxygen content percentage higher than an oxygen content percentage of the transition metal oxide in the first variable resistance layer; and an upper electrode formed on the variable resistance layer, said method comprising: forming a first lower conductive layer on a semiconductor substrate; forming a first interlayer insulating layer on the semiconductor substrate so as to cover the first conductive layer; forming a first contact hole penetrating through the first interlayer insulating layer down to the first conductive layer; forming a first contact plug inside the first contact hole so that a recess is formed from a top surface of the first interlayer insulating layer toward the substrate; depositing a lower electrode material film on the first interlayer insulating layer so as to cover the first contact plug, a shape of a depression created in a top surface of the lower electrode material film reflecting a shape of the recess when the lower electrode material film is deposited; planarizing the deposited lower electrode material film to form the lower electrode with a flat and continuous top surface, wherein the planarizing includes polishing the top surface of the lower electrode material film until the depression in the top surface of the lower electrode material film is removed, and wherein only the lower electrode material film is polished in the polishing, and only the lower electrode material film is left behind on the top surface of the first interlayer insulating layer throughout a wafer of the semiconductor memory device; forming, on the lower electrode, variable resistance layer material films and an upper electrode material film, in this order, the variable resistance layer material films to become the variable resistance layer, and the upper electrode material film to become the upper electrode; and forming the variable resistance element by patterning the lower electrode, the variable resistance layer, and the upper electrode.