Patent ID: 9565138
Date: 2017-02-07
CPC Classifications: H04L

Claim:
1. A network device comprising: a plurality of egress ports; one or more processors; and a memory coupled with and readable by the one or more processors, the memory including instructions that, when executed by the one or more processors, cause at least one processor from the one or more processors to perform operations including: generating an identifier for a first data packet using a hash function and one or more attributes of the data packet; determining a first class for the first data packet based on a specified first set of attributes of the first data packet; determining a second class for a second data packet based on a specified second set of attributes of the second data packet; determining a first set of ports from the plurality of egress ports, wherein the first set of ports is determined using the identifier and a first table from a plurality of tables, wherein the first table is associated with a first VLAN from a plurality of VLANS, wherein the first VLAN is associated with the first class but not the second class; determining a second set of ports from the plurality of egress ports, wherein the second set of ports is determined using a second table from the plurality of tables, wherein the second table is associated with a second VLAN from the plurality of VLANS, wherein the second VLAN is associated with the second class but not the first class; sending a copy of the first data packet through each egress port from the first set of ports; and sending a copy of the second data packet through each egress port from the second set of ports.