Patent ID: 9620635
Date: 2017-04-11
CPC Classifications: H01L

Claim:
1. A device comprising: a buried layer over a substrate; an epitaxial layer over the buried layer; a first trench extending through the epitaxial layer and partially through the buried layer; a second trench extending through the epitaxial layer and partially through the buried layer, wherein a bottom of the first trench is substantially level with a bottom of the second trench; a dielectric layer in a bottom portion of the first trench; a plurality of drain/source regions; a first gate region in an upper portion of the first trench, wherein a bottom surface of the first gate region is higher than a top surface of the dielectric layer and a height of the first gate region is substantially equal to a height of the dielectric layer, and wherein the first gate region extends partially through the epitaxial layer, and wherein bottom surfaces of the plurality of drain/source regions are higher than the bottom surface of the first gate region; and a second gate region in the second trench, wherein the second gate region extends through the epitaxial layer and partially through the buried layer.