Patent ID: 9634667
Date: 2017-04-25
CPC Classifications: H03K,H03M

Claim:
1. An integrated circuit (IC) device, comprising: a plurality of input/outputs (I/Os) of the IC device; a plurality of analog blocks, wherein the plurality of analog blocks is different from the plurality of I/Os, the plurality of analog blocks including: an analog multiplexer (MUX) configured to selectively connect any of the plurality of I/Os to the plurality of analog blocks, the analog MUX including at least one low noise signal path pair having a lower resistance than other signal paths of the analog MUX; a digital section comprising digital circuits; a processor interface coupled to the plurality of analog blocks; and a reconfigurable routing network configured to provide at least two different types of signal routing between any of the plurality of analog blocks, comprising a standard routing and at least one or more of a low resistance routing and a low noise routing, wherein the reconfigurable routing network is configured to provide at least one of: