Patent ID: 9721976
Date: 2017-08-01
CPC Classifications: H01L

Claim:
1. A thin film transistor, comprising: a gate electrode, a source electrode and a drain electrode disposed in a same layer on a base substrate; a gate insulating layer disposed on the gate electrode, the source electrode and the drain electrode; an active layer disposed on the gate insulating layer; and a passivation layer disposed on the active layer and the gate insulating layer; wherein a first via hole and a second via hole penetrate through the passivation layer and are disposed at regions corresponding to the active layer; a third via hole and a fourth via hole penetrate through the passivation layer and the gate insulating layer and are disposed at regions respectively corresponding to the source electrode and the drain electrode; a first connection pattern and a second connection pattern are disposed in a same layer on a side of the passivation layer away from the base substrate; the first connection pattern is connected with the active layer and the source electrode through the first via hole and the third via hole respectively; the second connection pattern is connected with the active layer and the drain electrode through the second via hole and the fourth via hole respectively.