Patent ID: 9673339
Date: 2017-06-06
CPC Classifications: G11C,H01L

Claim:
1. A semiconductor device comprising: (a) a semiconductor substrate including a well region having a first conductivity type; (b) a gate insulating film formed over the well region, the gate insulating film including a charge accumulation portion; (c) a gate electrode formed over the gate insulating film and having a first end and a second end opposite the first end; (d) a first semiconductor region having a second conductivity type opposite to the first conductivity type and being formed in the well region under the first end of the gate electrode; and (e) a second semiconductor region having the second conductivity type and being formed in the well region under the second end of the gate electrode, wherein the gate electrode includes an upper silicon film portion and a lower silicon film portion, wherein the lower silicon film portion is between the upper silicon film portion and the gate insulating film, wherein the upper silicon film portion and the lower silicon film portion have the first conductivity type, wherein an impurity concentration of the upper silicon film portion is higher than an impurity concentration of the lower silicon film portion, and wherein the gate insulating film includes: