Patent ID: 9735010
Date: 2017-08-15
CPC Classifications: H01L

Claim:
1. A method for fabricating a semiconductor structure, the method comprising: providing a semiconductor substrate; forming an insulating layer on the semiconductor substrate; forming a cavity structure above the insulating layer, the cavity structure comprising a lateral growth channel and a fin seed structure arranged in the lateral growth channel, the fin seed structure providing a seed surface for growing a fin structure; growing sequentially in the growth channel from the seed surface in an alternating way one or more first semiconductor structures of a first semiconductor material and one or more second semiconductor structures of a second semiconductor material, the first semiconductor material being different from the second semiconductor material, wherein the first semiconductor structures provide a seed surface for the second semiconductor structures and the second semiconductor structures provide a seed surface for the first semiconductor structures; selectively etching the second semiconductor structures, thereby forming the fin structure comprising a plurality of parallel fins of the first semiconductor structures.