Patent ID: 9642259
Date: 2017-05-02
CPC Classifications: H01L,H05K

Claim:
1. A substrate comprising: a first surface and a second surface, wherein the first surface is located on an opposite side to the second surface; a first dielectric layer adjacent to the second surface; a bridge structure embedded in the first dielectric layer, the bridge structure configured to provide an electrical connection between a first die and a second die, the first and second dies configured to be coupled to the substrate, the bridge structure comprising a first set of interconnects and a second dielectric layer, the first set of interconnects embedded in the first dielectric layer; and a first solder resist layer, wherein the first solder resist layer covers a portion of the first surface of the substrate, and wherein the first solder resist layer comprises a first interconnect configured to couple to the first die and a second interconnect configured to couple to the second die.