Patent ID: 9653414
Date: 2017-05-16
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a device die having bond pads providing connection to device die circuitry; a QFN half-etched lead frame with a package boundary, the QFN half-etched lead frame having a top-side surface and an under-side surface, the QFN half-etched lead frame including: an envelope of molding compound encapsulating the device die mounted on the top-side surface of the QFN half-etched lead frame, wherein the envelope covers vertical faces of the I/O terminals at the package boundary, and vertical faces of the additional terminals are exposed through the envelope at the package boundary; and a radio frequency (RF) shield layer on a top-side surface and on vertical surfaces of the envelope of the molding compound, wherein the RF shield layer covers and contacts the vertical faces of the additional terminals exposed through the envelope, and the RF shield layer is electrically connected to the additional terminals.