Patent ID: 9558950
Date: 2017-01-31
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a gate disposed over a substrate, the gate having a longitudinal axis defining a length of the gate, a transverse axis defining a width of the gate, and a first distal end and a second distal end arranged at opposing ends of the gate on the longitudinal axis of the gate, the length of the gate being greater than the width of the gate; and a hard mask disposed over the gate, the hard mask having a longitudinal axis defining a length of the hard mask, a transverse axis defining a width of the hard mask, and a first distal end and a second distal end arranged at opposing ends of the hard mask on the longitudinal axis of the hard mask, the length of the hard mask being greater than the width of the hard mask, and the hard mask comprising an insulating material; wherein the width of the gate and the hard mask are substantially the same, the length of the hard mask is greater than the length of the gate, and the hard mask has a first overhang region arranged over the first distal end of the gate and a second overhang region arranged over the second distal end of the gate; and wherein the gate comprises a polysilicon material or an amorphous silicon material that extends continuously from the substrate to the hard mask.