Patent ID: 9679622
Date: 2017-06-13
CPC Classifications: G06F,G11C

Claim:
1. A control method of a memory device, comprising: performing a data access operation on the memory device asynchronously with respect to a system clock according to address information and an access signal generated from a memory control unit external to the memory device; when the access signal indicates a read operation and the address information indicates a memory location in the memory device, generating a data tracking signal according to a memory internal read time, wherein the memory internal read time is a period of time elapsed between when the memory device receives the access signal and when the memory device outputs data stored in the memory location to the memory control unit; and outputting the data tracking signal along with the data to the memory control unit external to the memory device, such that the outputted data tracking signal is used as a reference signal for the memory control unit to capture the data.