Patent ID: 9553680
Date: 2017-01-24
CPC Classifications: H04B,H04L,H04W

Claim:
1. One or more non-transitory computer-readable storage media storing computer-readable instructions for an interference mitigation algorithm thereon that, when executed by a computing device, perform the following process steps: dividing a subframe frequency dimension into a plurality of resource block (RB) zones; allocating a middle band RB zone to a user equipment (UE) when the middle band RB zone is available; reducing a power level of one or more sub-carriers of an edge band RB zone when there are no middle band RB zones available; allocating the edge band RB zone with the reduced power level of one or more sub-carriers to the UE; and reducing a number of RBs to the UE when the power level of the one or more sub-carriers cannot be reduced.