Patent ID: 9537766
Date: 2017-01-03
CPC Classifications: H04L

Claim:
1. A system, comprising a switching processor and logic integrated with the switching processor, the logic being configured to: receive a packet, wherein the packet comprises a header and a payload; determine, without using a look-up table, a destination port based on a destination address stored in the header; send the packet to the destination port; and select a destination port associated with a value, wherein each destination port is pre-associated with only one value, wherein the logic configured to select the destination port associated with the value is further configured to choose the destination address for a device from an address allocation table such that applying an algorithm to a chosen destination address results in the value that is associated with the destination port connected to the device, and wherein the address allocation table is created during a start-up process of a server and stored to a non-transitory computer readable storage medium.