Patent ID: 9559711
Date: 2017-01-31
CPC Classifications: H03M

Claim:
1. An A/D converter comprising: an input buffer that receives an analog signal and outputs an output analog signal; N (an integer of two or more) sub-A/D converters including N first sampling circuits that are connected to an output side of the input buffer, and that sample the output analog signal in respective sampling slots different from each other; a control circuit that executes calibration for the N first sampling circuits one by one; a reference A/D converter including a second sampling circuit that is connected to the output side of the input buffer, and that samples the output analog signal in the same sampling slot as the sampling slot of one first sampling circuit under execution of the calibration among the N first sampling circuits; and a third sampling circuit that is connected to the output side of the input buffer, and that samples the output analog signal in the same sampling slots as the sampling slots of the (N−1) first sampling circuits out of the execution of the calibration.