Patent ID: 9590109
Date: 2017-03-07
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a first semiconductor layer over an insulating surface, the first semiconductor layer being sandwiched between a source electrode and a drain electrode; a gate insulating layer over the first semiconductor layer; and a gate electrode over the gate insulating layer, wherein each of the source electrode and the drain electrode is a metal electrode, wherein an end side surface of the gate insulating layer is substantially coincident with an end side surface of the gate electrode, wherein a first side surface of the source electrode is in direct contact with a first side surface of the first semiconductor layer, wherein a first side surface of the drain electrode is in direct contact with a second side surface of the first semiconductor layer, wherein at least one side of the first side surface of the first semiconductor layer is in direct contact with at least one side of the first side surface of the source electrode, wherein a bottom surface of the first semiconductor layer is higher than a bottom surface of the source electrode, and wherein a length of the first semiconductor layer in a channel width direction is substantially the same as a length of the source electrode in the channel width direction.