Patent ID: 9722035
Date: 2017-08-01
CPC Classifications: H01L

Claim:
1. A method for manufacturing a termination structure of a semiconductor device, wherein the semiconductor device comprises an active area and a termination area adjacent to the active area, and the termination area has the termination structure, the method comprising: forming an epitaxy layer on a substrate, wherein the epitaxy layer has a voltage-sustaining region in the termination area; forming a plurality of trenches in the voltage-sustaining region and in the active area, wherein the trenches in the voltage-sustaining region extend along a direction and are parallel with each other; forming a dielectric layer in the trenches in the active area and in the in the voltage-sustaining region; forming a conductive material layer on the dielectric layer in each of the trenches; removing a portion of the dielectric layer in the active area, wherein a top surface of the dielectric layer in the voltage-sustaining region is higher than a top surface of a remained portion of the dielectric layer in the active area; and forming a conductive layer on the trenches in the active area and in the in the voltage-sustaining region, wherein the conductive layer is in contact with the conductive material layer and a portion of the epitaxy layer.