Patent ID: 9613568
Date: 2017-04-04
CPC Classifications: G09G

Claim:
1. A semiconductor device comprising: a transistor; a first capacitor whose first terminal is electrically connected to a gate terminal of the transistor; a second capacitor whose first terminal is electrically connected to a second terminal of the first capacitor; a first switch whose first terminal is directly connected to a first terminal of the transistor, and whose second terminal is electrically connected to a second terminal of the second capacitor; a second switch whose first terminal is directly connected to the first terminal of the transistor, and whose second terminal is electrically connected to the second terminal of the first capacitor and the first terminal of the second capacitor; a third switch whose first terminal is electrically connected to the gate terminal of the transistor, and whose second terminal is electrically connected to a line; a first gate signal line, wherein on/off of the second switch and the third switch are controlled by the first gate signal line; a second gate signal line, wherein on/off of the first switch is controlled by the second gate signal line; and a display element directly connected to a second terminal of the transistor, wherein the first terminal of the transistor is electrically connected to the second terminal of the second capacitor via the first switch, and wherein the second switch is connected between the first terminal of the transistor and the first terminal of the second capacitor.