Patent ID: 9618981
Date: 2017-04-11
CPC Classifications: G06F

Claim:
1. A capacitive input device comprising: a processing system; a sensor electrode pattern disposed on a first side of a substrate and comprising: a plurality of routing traces disposed along a first edge of said sensor electrode pattern on said first side of said substrate and configured to communicatively couple at least some of said sensor electrodes with said processing system; a pair of guard traces disposed outside of said sensor electrode pattern, along said first edge, in the same layer as said plurality of routing traces such that said pair of guard traces brackets said plurality of routing traces; a guard overlapping said routing traces and disposed proximate said routing traces on said first side of said substrate, and wherein said guard ohmically couples said pair of guard traces with one another by extending over said routing traces between a first coupling to a first of said pair of guard traces and a second coupling to a second of said pair of guard traces; and a second insulator disposed between said routing traces and said guard, wherein said second insulator and said first insulator are disposed in the same layer, wherein a thickness of said second insulator creates a maximum gap of T between said routing traces and said guard, and wherein said guard is spaced a distance of at least T/ wherein said processing system is configured to: