Patent ID: 9711503
Date: 2017-07-18
CPC Classifications: H01L

Claim:
1. A transistor device, comprising: first and second spaced-apart active regions of a semiconductor substrate; first and second spaced-apart gate electrode structures positioned above said first and second active regions, respectively, said first and second gate electrode structures comprising opposing first and second end face surfaces, respectively; a line-end protection layer positioned on and in contact with an entirety of said opposing first and second end face surfaces and positioned on an upper surface of each of said first and second gate electrode structures; a gate cap protection layer positioned on and in contact with said line-end protection layer positioned on said upper surface of each of said first and second gate electrode structures; and a sidewall spacer positioned adjacent said gate cap protection layer and adjacent opposing sidewall surfaces of each of said first and second spaced-apart gate electrode structures but not adjacent said opposing first and second end face surfaces having said line-end protection layer positioned thereon.