Patent ID: 9710584
Date: 2017-07-18
CPC Classifications: G06F

Claim:
1. A method of implementing circuitry from an application, comprising: partitioning, using a processor, an array of the application into a plurality of virtual blocks according to a streaming dimension of the array; determining, using the processor, that a first function and a second function of the application that access the array have same access patterns for the virtual blocks of the array; including, using the processor, a first-in-first-out memory within a circuit design implementing the application, wherein the first-in-first-out memory couples a first circuit block implementing the first function with a second circuit block implementing the second function; and including, using the processor, control circuitry within the circuit design, wherein the control circuitry is configured to implement concurrent operation of the first circuit block and the second circuit block by controlling accesses of the first circuit block and the second circuit block to a plurality of buffers in the first-in-first-out memory.