Patent ID: 9654315
Date: 2017-05-16
CPC Classifications: H04L

Claim:
1. A slicer apparatus, comprising: an equalizer, outputs an equalized differential output signal pair; a positive voltage error slicer, coupled to the equalizer and performing an error slicing operation on the equalized differential output signal pair according to a first differential reference signal pair, so as to output a first error slicing signal pair; a negative voltage error slicer, coupled to the equalizer and performing the error slicing operation on the equalized differential output signal pair according to a second differential reference signal pair, so as to output a second error slicing signal pair; a first offset calibration circuit, coupled to the positive voltage error slicer and adjusting the first differential reference signal pair according to the first error slicing signal pair, so as to calibrate an offset voltage of the positive voltage error slicer; and a second offset calibration circuit, coupled to the negative voltage error slicer and adjusting the second differential reference signal pair according to the second error slicing signal pair, so as to calibrate the offset voltage of the negative voltage error slicer.