Patent ID: 9548735
Date: 2017-01-17
CPC Classifications: G06F,H03K,Y02D

Claim:
1. A method for managing power in an electronic system, the method comprising: applying first and second control signals to a hazard-free logic component to synchronize a plurality of functional blocks that comprise data independent synchronous data processing circuits, the hazard-free logic component being use to at least partially control a transition from a purely asynchronous mode of operation to a partially synchronous mode of operation; applying the first control signal and a handshake signal to a power gating circuit that supplies power to at least one of the independent synchronous data processing circuits; performing a data processing step on data in response to energizing the at least one synchronous data processing circuit; outputting the handshake signal to acknowledge completion of logical operations; applying the first and handshake signals to the power gating circuit to de-energize the at least one synchronous data processing circuit; and outputting the processed data.