Patent ID: 9600617
Date: 2017-03-21
CPC Classifications: G06F

Claim:
1. A method of improving automated timing analysis, the method comprising: generating a directed acyclic graph for an input netlist, the input netlist comprising a list of terminals of electronic components (“nodes”) in a circuit and a list of electrical conductors (“edges”) that interconnect the nodes, the directed acyclic graph comprising nodes of the netlist arranged in an acyclic manner to indicate the nature of edges among the nodes; generating a second order graph distance metric based at least on the directed acyclic graph; scheduling a timing calculation for a set of nodes of the input netlist based at least on the second order graph distance metric; generating a work resistance for each of a plurality of edges from a node to a plurality of successor nodes based at least on the second order graph distance metric; generating a work potential for each of the plurality of edges based at least on the work resistance; generating a work potential for the node based at least on the work potential for each of the plurality of edges; and scheduling a task based at least on the work potential for the node.