Patent ID: 9576890
Date: 2017-02-21
CPC Classifications: H01L,H05K

Claim:
1. a semiconductor device comprising: a wiring substrate having a core substrate, a first build-up substrate which is formed over a first main surface of the core substrate, and a second build-up substrate which is formed over a second main surface opposite the first main surface of the core substrate; a semiconductor chip having an obverse surface and a reverse surface opposite the obverse surface, the semiconductor chip being mounted over the first build-up substrate of the wiring substrate such that the obverse surface thereof faces to the first build-up substrate and being electrically connected with the wiring substrate via a plurality of first bump electrodes; a sealing resin being disposed between the first build-up substrate of the wiring substrate and the obverse surface of the semiconductor chip such that the sealing resin seals the plurality of first bump electrodes; and a plurality of second bump electrodes being disposed over the second build-up substrate of the wiring substrate, wherein the core substrate has a first insulating layer, a plurality of first through holes which penetrate through the first insulating layer in a thickness direction of the first insulating layer, a plurality of first through electrodes formed in the plurality of first through holes respectively, and a plurality of first wiring layers formed over a top surface and bottom surface of the first insulating layer are electrically connected each other via the plurality of first through electrodes in the plurality of first through holes, respectively, wherein the first build-up substrate has a second insulating layer, a plurality of second through holes which penetrate through the second insulating layer in a thickness direction of the second insulating layer, a plurality of second through electrodes formed in the plurality of second through holes respectively, and a plurality of second wirings of a second wiring layer formed over a surface of the second insulating layer and electrically connected with the plurality of the second through electrodes in the plurality of second through holes respectively, wherein the second build-up substrate has a third insulating layer, a plurality of third through holes which penetrate through the third insulating layer in a thickness direction of the third insulating layer, a plurality of third through electrodes formed in the plurality of third through holes respectively, and a plurality of third wirings of a third wiring layer formed over a surface of the third insulating layer and electrically connected with the plurality of the third through electrodes in the plurality of third through holes respectively, wherein the first insulating layer of the core substrate has a plurality of first resin layers and a plurality of first glass cloths, wherein the second insulating layer of the first build-up substrate and the third insulating layer of the second build up substrate have a second resin layer and a second glass cloth, respectively, wherein each of the first and second glass cloths is woven a glass fiber in a shape of a cloth, and wherein a thickness of the second glass cloth contained in each of the first and second build-up substrates is thinner than a thickness of each of the first glass cloths contained in the core substrate.