Patent ID: 9627320
Date: 2017-04-18
CPC Classifications: B82Y,H01L

Claim:
1. An electronic device comprising: a substrate, a first electrically conductive region on the substrate, the first electrically conductive region comprising a trace including a metal layer; a plurality of nanowires positioned on the trace, the plurality of nanowires each including a first end in direct contact with the metal layer and a second end that is electrically isolated from any additional electrically conductive regions comprising a trace on the substrate; a first dielectric layer positioned in direct contact with the plurality of nanowires; an additional trace comprising a metal layer positioned on the first dielectric layer, and a plurality of additional nanowires positioned on the additional trace, wherein the first dielectric layer is positioned between the additional trace and the plurality of nanowires, and wherein the first dielectric layer is positioned between the additional trace and the substrate; and a second dielectric layer positioned on the plurality of additional nanowires, wherein the second dielectric layer is separated from the substrate by at least the first dielectric layer.