Patent ID: 9543452
Date: 2017-01-10
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a well region of a first conductivity type disposed in a substrate; a field region of a second conductivity type disposed in the well region; a first doped region of the first conductivity type disposed in the well region on a first side of the field region; a second doped region of the second conductivity type disposed in the field region, wherein the second doped region at least partially surrounds the first doped region; a third doped region of the first conductivity type disposed in the well region on a second side of the field region, wherein the field region is disposed between the first doped region and the third doped region; a first top doped region of the second conductivity type disposed between the third doped region and the second doped region; a plurality of second top doped regions of the second conductivity type disposed in the well region between the field region and the first doped region; and a fourth doped region of the second conductivity type disposed in the substrate on the second side of the field region, wherein the third doped region is disposed between the first top doped region and the fourth doped region.