Patent ID: 9696598
Date: 2017-07-04
CPC Classifications: G02F,H01L

Claim:
1. A display panel, comprising multiple rows of pixel units, edges of the multiple rows of pixel units being arranged in a step-like manner, each row of pixel units comprising at least one central pixel unit and at least one marginal pixel unit, wherein each central pixel unit comprises a plurality of sub-pixels and first thin film transistors respectively corresponding to the plurality of sub-pixels of a respective central pixel unit, and each first thin film transistor has a first semiconductor region; each marginal pixel unit comprises a plurality of sub-pixels and second thin film transistors respectively corresponding to the plurality of sub-pixels of a respective marginal pixel unit, and each second thin film transistor has a second semiconductor region; a length of the first semiconductor region is set to be a first set length, a width of the first semiconductor region is set to be a first set width, a length of the second semiconductor region is set to be a second set length, and a width of the second semiconductor region is set to be a second set width such that brightness of the marginal pixel unit is smaller than brightness of the central pixel unit during display.