Patent ID: 9552247
Date: 2017-01-24
CPC Classifications: G06F

Claim:
1. A computer-implemented method for detecting unexpectedly high latency due to excessive retries, the computer-implemented method comprising, by a processor and associated memory: monitoring, by one or more host machines external to a storage area network (SAN), one or more completion time characteristics of one or more accesses between a given storage device of a set of storage devices of the storage area network (SAN) and the one or more host machines, the one or more accesses including one or more retries, the one or more completion time characteristics including at least one of: write latency and read latency; comparing, by the one or more host machines, the one or more completion time characteristics with a given threshold; and as a result of the comparison, detecting and reporting, by the one or more host machines, at least one soft error associated with the given storage device, prior to detection of or reporting of the soft error by the storage area network (SAN).