Patent ID: 9659134
Date: 2017-05-23
CPC Classifications: G06F

Claim:
1. A method for determining wiring paths on a printed circuit board (PCB) executable by a control device of a computing device, the PCB comprising a T topology circuit, the T topology circuit comprising a first electronic component, a second electronic component, and two third electronic components, the second electronic component connected to the third electronic components via the first electronic component with a T topology, the method comprising: obtaining pins of the first electronic component that are connected to the second electronic component or the third electronic components; creating a model of the first electronic component according to the obtained pins; modifying the model to form extended nets of the first electronic component, wherein each of the extended nets comprises three nets of the T topology circuit that are interconnected through three obtained pins, wherein the three obtained pins comprise a common pin that has a connection relationships with each of the other two of the three obtained pins; setting pin pairs of the extended nets; setting match groups from the pin pairs; determining the wiring paths according to the match groups; and outputting the wiring paths to an output device.