Patent ID: 9577832
Date: 2017-02-21
CPC Classifications: G09C,H04L

Claim:
1. A method comprising: (a) storing an amount of incoming data in a processor, wherein the amount of incoming data comprises a first portion and a second portion; (b) maintaining a hash register value in a hash register; (c) supplying the first portion of the amount of incoming data onto a set of input leads of a modulo- (d) using the modulo- (e) using a programmable nonlinearizing function circuit to perform a nonlinearizing function on the hash register value and thereby generating a modified version of the hash register value; (f) using a first modulo- (g) using a modulo- (h) using a second modulo- (i) loading the division remainder value into the hash register, wherein (a) through (i) are performed by the processor, and wherein the hash register, the modulo-