Patent ID: 9535693
Date: 2017-01-03
CPC Classifications: G05B,G06F

Claim:
1. A signal processing circuit, comprising: a plurality of sequence control units each for performing sequence control based on data and an instruction; and an arithmetic operation processing unit for performing arithmetic operation processing based on a request for an arithmetic operation from any of the sequence control units, wherein the arithmetic operation processing unit includes: a common arithmetic operation element shared between or among_the sequence control units; and an arbitration circuit for, when the sequence control units simultaneously generate the arithmetic operation requests to use the common arithmetic operation element, selecting one of the sequence control units based on priority information about each of the sequence control units set prior to the simultaneous generation of the arithmetic operation requests, causing the common arithmetic operation element to execute the arithmetic operation requested from the selected sequence control unit, and returning a result of the arithmetic operation to the selected sequence control unit.