Patent ID: 9735114
Date: 2017-08-15
CPC Classifications: H01L

Claim:
1. A method of packaging a semiconductor device, comprising: providing a first insulation layer comprising stacked prepreg layers; forming a metallic protective layer on a first surface of the first insulation layer; forming a first alignment mark on the first insulation layer; forming an accommodation cavity in the first insulation layer according to the first alignment mark; forming a second alignment mark on a second surface of the first insulation layer; attaching a carrier plate on the first surface of the first insulation layer through a thermal release tape layer; temporarily fixing the semiconductor device on the thermal release tape layer within the accommodation cavity according to the second alignment mark; placing a semi-cured second insulation layer over the second surface of the first insulation layer, and laminating and curing the second insulation layer; removing the carrier plate and the thermal release tape layer; and forming a re-distribution layer on the second insulation layer, the re-distribution layer being electrically connected with the semiconductor device.