Patent ID: 9653496
Date: 2017-05-16
CPC Classifications: H01L

Claim:
1. A preparation method of a poly-silicon thin film transistor (TFT) array substrate, comprising: forming patterns of light-shielding layers and a poly-silicon layer on a base substrate by a first patterning process; performing a second patterning process, to form a photoresist layer on the poly-silicon layer, and exposing and developing the photoresist layer with a gray tone mask to form patterns of a photoresist completely-reserved region, a photoresist partially-reserved regions and a photoresist completely-removed region; removing part of the poly-silicon layer located in the photoresist completely-removed regions to form patterns of active layers; ashing the photoresist so as to expose part of the active layers located in the photoresist partially-reserved regions and inject P+ ions of high concentrations into the part of the active layers, to form doping regions of patterns of source-drain electrodes of a P-type TFT; and stripping off remaining photoresist.