Patent ID: 9607121
Date: 2017-03-28
CPC Classifications: G06F,H01L

Claim:
1. A method, comprising: a) creating an intermediate model of a MOS device based on an initial model such that the intermediate model of the MOS device includes an active area having first and second contacts, a gate including a gate contact disposed over the active area, and a plurality of fingers each having a respective gate contact, each of the fingers having equal gate lengths as one another, each finger respectively defining a transistor with the active area, a first subset of the transistors having a first threshold voltage and a second subset of the transistors having a second threshold voltage, each of the transistors having a respective breakdown voltage; b) simulating a circuit including the intermediate model of the MOS device to determine whether each of the breakdown voltages satisfies a predetermined criterion; c) in response to the determination, adjusting a number of transistors in at least one of the first and second subsets; d) repeating steps b) and c) until each of the breakdown voltages satisfies the predetermined criterion; and e) after determining that each of the breakdown voltages satisfies the predetermined criterion, storing the intermediate model of the MOS device as a final model of the MOS device in a computer readable storage medium, wherein at least one mask for a photo process is fabricated based on the final model of the MOS device.