Patent ID: 9704601
Date: 2017-07-11
CPC Classifications: G06F,G11C

Claim:
1. A method for repairing one or more defective memory cells of a semiconductor memory device included in a system, the method comprising: checking whether an error has occurred in data read from the semiconductor memory device when the system is booted; generating a system management interrupt (SMI) to invoke a basic input/output system (BIOS) service routine when the error has occurred in the read data; checking and storing defective cell information corresponding to the one or more defective memory cells causing a read error in the semiconductor memory device during an execution of the BIOS service routine; reading the defective cell information during a power-on self test (POST) of the BIOS when the system is rebooted; and after the system is rebooted, performing a repair operation to repair the one or more defective memory cells using one or more spare memory cells of the semiconductor memory device, based on the defective cell information, before an operating system (OS) of the system is loaded.