Patent ID: 9583697
Date: 2017-02-28
CPC Classifications: G11C,H01L

Claim:
1. A semiconductor device comprising: a contact plug pattern in a first interlayer dielectric layer formed on a substrate, top surfaces of the contact plug pattern and the first interlayer dielectric layer being substantially coplanar; a first electrode pattern on the contact plug pattern and conductively coupled to the contact plug pattern; a first magnetic conductive pattern on the first electrode pattern; a second magnetic conductive pattern on the first magnetic conductive pattern; a tunnel barrier pattern between the first magnetic conductive pattern and the second magnetic conductive pattern and having a first surface on which the second magnetic conductive pattern is formed and a second surface that is opposite the first surface; and a metal oxide layer that is on a portion of the second surface of the tunnel barrier pattern that does not contact the first magnetic conductive pattern and that is adjacent, in a direction parallel to a top surface of the substrate, a side surface of a widest portion of the first magnetic conductive pattern, wherein a bottom surface of the metal oxide layer is nearer the second surface of the tunnel barrier pattern than a bottom surface of the first magnetic conductive pattern.