Patent ID: 9639774
Date: 2017-05-02
CPC Classifications: G01N,G06K,G06T

Claim:
1. A method, comprising: processing a first semiconductor product along a reference processing path to form a first processing pattern on the first product; processing a second semiconductor product along an alternative processing path to form a second processing pattern on the second product; determining a similarity index quantifying a similarity between the first processing pattern and the second processing pattern, wherein the similarity index=Σ(a wherein a μ σ wherein the alternative processing path and the reference processing path have a common end and first and second respective free ends, wherein the first free end comprises a first tool and the second free end comprises a second tool, wherein the common end comprises a third tool, wherein the first tool and the second tool are either an etcher or a deposition tool, and wherein the third tool is a stepper or an etcher; and confirming applicability of the alternative processing path if the similarity index is no less than a threshold, wherein the threshold ranges between 0.65 and 1.