Patent ID: 9559709
Date: 2017-01-31
CPC Classifications: H03K,H03L

Claim:
1. A digital controlled oscillator (DCO) for a phase locked loop (PLL) control system, the DCO comprising: a plurality of selectable delay cells, wherein a number of the selectable delay cells that are part of a delay cell chain is configurable based on a delay cell number control vector, wherein the delay cell chain is configured to generate a delay cell output signal; a first load adjustment delay cell being configured to receive the delay cell output signal from the delay cell chain, and a second load adjustment delay cell; a first set of load cells that collectively generate, in response to a load control signal, a first load signal to control an amount of loading on the second load adjustment delay cell, and a second set of load cells that collectively generate, in response to the load control signal, a second load signal to control an amount of loading on the first load adjustment delay cell; and first and second capacitance elements, each having a substrate voltage that is adjustable, wherein a control signal adjusts the substrate voltages of the first and second capacitance elements, to adjust loading in the DCO.