Patent ID: 9613868
Date: 2017-04-04
CPC Classifications: H01L

Claim:
1. A method for fabricating FinFETs, comprising: providing a substrate; forming a plurality of fins on a surface of the substrate; forming a gate structure overlying on at least one of the plurality of fins; forming a barrier layer covering top and side surfaces of the gate structure, and top and side surfaces of exposed portions of the plurality of fins; performing a radical oxidation process to convert a surface portion of the barrier layer to a passive layer over a remaining portion of the barrier layer and to cause top surfaces of the fins to remain to be flat after subsequent etching processes including an etch-back process and a wet etch process; performing the etch-back process on the passive layer to form passive sidewalls on sidewall surfaces of the remaining portion of the barrier layer on the side surfaces of the fins; and removing portions of the remaining portion of the barrier layer on the top surfaces of the fins by the wet etching process using the passive sidewalls as an etching mask.