Patent ID: 9672935
Date: 2017-06-06
CPC Classifications: G11C

Claim:
1. An article of manufacture comprising a memory circuit comprising: volatile output circuitry (VOC); and a programmable non-volatile memory (NVM) cell configured to generate an NVM output signal indicative of a program state of the NVM cell, the NVM cell comprising: a first anti-fuse device; a second anti-fuse device; a first select device connected in series with the first anti-fuse device at a first node; a second select device connected in series with the second anti-fuse device at a second node; a first pass device connected between the first node and a VOC input node of the volatile output circuitry and usable to selectively pass a voltage at the first node to the VOC input node; and a second pass device connected between the second node and the VOC input node and usable to selectively pass a voltage at the second node to the VOC input node, wherein the volatile output circuitry is connected to receive the NVM output signal from the NVM cell at the VOC input node and generate a VOC output signal indicative of the program state of the NVM cell.