Patent ID: 9646869
Date: 2017-05-09
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a first semiconductor substrate; a second semiconductor substrate over and bonded to the first semiconductor substrate; a conductive material of the second semiconductor substrate being over an insulator material comprised by the first semiconductor substrate in a bonded structure, the bonded structure having an amorphous adhesive material between and contacting the insulator material and the conductive material, the amorphous adhesive material comprising one or both of amorphous silicon and amorphous germanium, the amorphous adhesive material and the conductive material being patterned; at least one diode comprising a single crystalline silicon material over the conductive material, the at least one diode comprising a first doped region overlying the conductive material and a second doped region overlying the first doped region, wherein a conductivity of the first doped region is opposite a conductivity of the second doped region; and a memory cell over the second doped region; the memory cell comprising a bottom electrode, a memory medium, and a top electrode; the top electrode being a bit line in contact with the memory medium without electrically coupling to any separate top electrode material between the bit line and the memory medium.