Patent ID: 9728639
Date: 2017-08-08
CPC Classifications: H01L

Claim:
1. A tunnel field effect transistor, comprising: a semiconductor substrate; a source region of the tunnel field effect transistor in the semiconductor substrate; a drain region of the tunnel field effect transistor in the semiconductor substrate; a channel region of the tunnel field effect transistor in the semiconductor substrate between the source region and the drain region; a gate electrode of the tunnel field effect transistor on the semiconductor substrate above the channel region, wherein a gate insulating layer is between the gate electrode and the channel region; wherein the source region comprises a first region having a first conductivity type, a third region having a second conductivity type that is different from the first conductivity type, and a second region having an intrinsic conductivity type that is between the first region and the third region, wherein the first region of the source region forms a first homojunction with the second region of the source region, wherein the third region of the source region forms a second homojunction with the channel region, and wherein the second region of the source region forms a heterojunction with the third region of the source region, wherein the second region of the source region extends along a vertical sidewall of the first region and is in direct contact with the gate insulating layer, and wherein the third source region is in direct contact with the gate insulating layer.