Patent ID: 9666748
Date: 2017-05-30
CPC Classifications: C12Q,H01L

Claim:
1. A semiconductor structure comprising: a semiconductor substrate comprising a first region and an adjoining second region, wherein at least one photodetector is present in said first region of said semiconductor substrate and located on a portion of a sub-surface of said semiconductor substrate, and wherein a plurality of semiconductor devices is present in said second region of said semiconductor substrate and located on a topmost surface of said semiconductor substrate; a dielectric material laterally surrounding said at least one photodetector and located directly on exposed portions of said sub-surface of said semiconductor substrate; a contact wire located on a surface of said dielectric material and contacting a topmost surface of said at least one photodetector and a portion of one of said semiconductor devices; an interconnect structure located above said first region and said second region of said semiconductor substrate, said contact wire and said plurality of semiconductor devices; and a metal layer located above a topmost surface of said interconnect structure, wherein said metal layer has an opening that provides a zero waveguide module located above said first region of said semiconductor substrate.