Patent ID: 9665678
Date: 2017-05-30
CPC Classifications: G06F

Claim:
1. A method of designing an integrated circuit (IC), comprising: a processor receiving input data defining an IC with a plurality of first standard cells, the first standard cells having first footprints and pinouts and physical attributes that result in first yield and performance characteristics; the processor preparing at least one second standard cell having the same, first, footprint and pinout and as a corresponding one of the first standard cells and having a layout including physical features that provide different yield or performance characteristics of the IC than a corresponding one of the plurality of first standard cells; the processor swapping at least one of the first standard cells included in the IC for the corresponding second standard cell; and the processor generating output data defining the IC including the second standard cell, wherein the first and second standard cells have the same function, and wherein the swapping of the at least one of the first standard cells for the corresponding second standard cell comprises swapping a first standard cell that is not connected to a critical path of the IC according to the input data for the second standard cell.