Patent ID: 9673145
Date: 2017-06-06
CPC Classifications: H01L

Claim:
1. A semiconductor integrated circuit (IC) layout structure comprising: a first active region; a second active region isolated from the first active region; a gate structure extending along a first direction and straddling the first active region and the second active region, the first active region at two opposite sides of the gate structure respectively forming a first source region and a first drain region, and the second active region at the two opposite sides of the gate structure respectively forming a second source region and a second drain region; and a plurality of conductive structures comprising a plurality of slot-type conductive structures and one island-type conductive structure, the island-type conductive structure being formed on the gate structure, the slot-type conductive structures respectively being formed on the first source region, the first drain region, the second source region, and the second drain region, and the slot-type conductive structures on the first source region, the first drain region, the second source region and the second drain region being physically spaced apart from each other.