Patent ID: 9553166
Date: 2017-01-24
CPC Classifications: H01L

Claim:
1. A method of forming a semiconductor structure, said method comprising: providing at least one sacrificial gate structure straddling over at least one semiconductor material portion that is located on a surface of a substrate, wherein a layer of silicon nitride is located on exposed surfaces of said at least one sacrificial gate structure, said at least one semiconductor material and said substrate; patterning said layer of silicon nitride to expose a drain region located on one side of said at least one sacrificial gate structure; removing an exposed portion of said at least one semiconductor material portion in said drain region to provide an opening to said substrate; forming a semiconductor buffer layer in a portion of said opening; removing said at least one sacrificial gate structure to provide a gate cavity that exposes a remaining portion of said at least one semiconductor material portion; removing the exposed portion of said remaining portion of said at least one semiconductor material to provide at least one semiconductor material portion structure; laterally etching an exposed sidewall surface of said buffer layer; epitaxially growing a high mobility semiconductor channel material from sidewall surfaces of said at least one semiconductor material portion structure and from sidewall surfaces of a remaining portion of said buffer layer; forming a functional gate structure in said gate cavity and on a portion of said high mobility semiconductor channel material, wherein another portion of said high mobility semiconductor channel material in said drain region extends beyond sidewalls of said at least one functional gate structure; providing a contact opening on a source side and a drain side of said functional gate structure; removing said at least one semiconductor material portion structure and said remaining portion of said buffer layer within said contact openings; and forming a source-side epitaxial doped semiconductor material in said source side and extending laterally from a sidewall surface of said high mobility semiconductor channel material and on another portion of said topmost surface of said surface, and a drain-side epitaxial doped semiconductor material in said drain side and on said another portion of said high mobility semiconductor channel material in said drain region that extends beyond sidewalls of said at least one functional gate structure.