Patent ID: 9595499
Date: 2017-03-14
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a semiconductor layer having a first surface and a second surface; a through electrode penetrating the semiconductor layer and having a protruding portion that protrudes over the second surface of the semiconductor layer by a predetermined height; a front-side bump disposed over the first surface of the semiconductor layer and electrically connected to the through electrode; a passivation pattern surrounding a sidewall of the protruding portion of the through electrode and extending onto the second surface of the semiconductor layer; and a back-side bump covering an end surface of the protruding portion of the through electrode and extending onto the passivation pattern, wherein a first portion of the passivation pattern under the back-side bump has a first thickness and a second portion of the passivation pattern at a position on the second surface of the semiconductor layer that does not overlap with the back-side bump has a second thickness, wherein the second thickness of the passivation pattern is less than the first thickness of the passivation pattern.