Patent ID: 9535785
Date: 2017-01-03
CPC Classifications: G06F,G11C

Claim:
1. A method of operating a memory comprising: storing data sets including a plurality of addressable segments, and extended error correcting codes ECCs for the data sets in the memory, a particular extended ECC including a first field for an ECC derived from the corresponding data set and a second field for a first additional ECC bit derived from the ECC; when writing new data in addressable segments of a selected data set in the memory, setting the extended ECC for the new data and data previously programmed in the selected data set, if a number of the addressable segments storing the new data and data previously programmed in the selected data set includes at least a predetermined number of addressable segments, wherein the extended ECC is set to a first predetermined value to indicate a first state to disable use of the data in the first field, and the extended ECC is set to a second predetermined value to indicate a second state if the ECC derived from the corresponding data set and the first additional bit derived from the ECC are equal to the first predetermined value.