Patent ID: 9583586
Date: 2017-02-28
CPC Classifications: H01L

Claim:
1. A method for manufacturing a transient voltage suppressor (TVS) device, comprising: a) forming a first epitaxial layer of a first conductivity type on top of a semiconductor substrate of the first conductivity type; b) forming a buried layer of a semiconductor material of the first conductivity type within a top surface of the first epitaxial layer; c) forming an implant layer of semiconductor material of a second conductivity type within the first epitaxial layer, wherein the implant layer is located below the buried layer and a length of the implant layer extends beyond a length of the buried layer, wherein an NPN junction is formed by the buried layer, the implant layer, the first epitaxial layer and the substrate; d) forming a second epitaxial layer of semiconductor material of the first conductivity type on top of the first epitaxial layer; e) forming a pair of implant regions of a semiconductor material of the second conductivity type within the top surface of the second epitaxial layer; f) forming a punch-through implant region of a semiconductor material of the second conductivity type within the top surface of the second epitaxial layer g) forming a set of trenches in the first and second epitaxial layers, the set of trenches including a first trench at an edge of the buried layer and an edge of the implant layer, and between the punch-through implant region and the first implant region, a second trench at another edge of the buried layer and extending into the implant layer, and a third trench at another edge of the implant layer; h) at least lining each trench with a dielectric material; i) forming a set of source regions of a semiconductor material of the first conductivity type within a top surface of the second epitaxial layer, the set of source regions including a first source region located above the punch-through implant region, a second source region located between the first and second trenches, a third source region located between the second and third trenches, and a fourth source region located such that the third trench is between the third and fourth source regions, wherein the first implant region is located between the second and third source regions, the second implant region is located between the third trench and the third source region adjacent a sidewall of the third trench, a vertical PN junction being formed by the first source region, the punch-through implant region and the second epitaxial layer, a lateral PN junction being formed by the second source region, the second epitaxial layer and the first implant region, a second vertical PN junction being formed by the buried layer, the second epitaxial layer and the first implant region, and a second lateral PN junction being formed by the third source region, the second epitaxial layer and the second implant region.