Patent ID: 9620649
Date: 2017-04-11
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: an oxide semiconductor protrusion disposed on an oxide substrate; a source and a drain respectively disposed on opposite ends of the oxide semiconductor protrusion; an oxide semiconductor layer disposed on the oxide substrate and covering the oxide semiconductor protrusion, the source, and the drain; a first O-barrier layer disposed on the oxide semiconductor layer; a gate electrode disposed on the first O-barrier layer and across the oxide semiconductor protrusion; a second O-barrier layer disposed on the gate electrode; an H-barrier layer disposed on the oxide substrate and covering the second O-barrier layer; a hard mask layer disposed on a top surface of the second O-barrier layer; and spacers, wherein the spacers are disposed on the first O-barrier layer and located on sidewalls of the gate electrode, wherein the source and the drain are only located on a top surface of the oxide semiconductor protrusion.