Patent ID: 9568986
Date: 2017-02-14
CPC Classifications: G06F,Y02D

Claim:
1. A method for system-wide power conservation using memory cache, the method comprising: receiving a memory access request at a location in a memory architecture of a data processing system where processing the memory access request has to use a last level of cache before reaching a memory device holding a requested data, wherein a cache device is used as the last level of cache; causing, using a memory controller, the memory access request to wait, and omitting adding the memory access request to a queue of existing memory access requests accepted for processing using the last level of cache; processing all the existing memory access requests in the queue using the last level of cache; purging the last level of cache to the memory device; marking a portion of the cache device such that the portion cannot be used to store data in the cache device; processing the memory access request using an alternative path to the memory device that avoids the last level of cache; and powering down the cache device.