Patent ID: 9558993
Date: 2017-01-31
CPC Classifications: H01L

Claim:
1. A method for forming a pattern structure in a semiconductor device, comprising: forming a layer to be etched, on a substrate; forming a sacrificial pattern structure on a predetermined portion of the layer to be etched; forming a spacer formation layer on the sacrificial pattern structure and the layer to be etched; forming a photoresist pattern partially exposing the spacer forming layer and the sacrificial pattern structure; etching the spacer formation layer the sacrificial pattern structure using the photoresist pattern as an etch mask to form a first opening; removing a lower portion of the sacrificial pattern structure, the lower portion being exposed by a sidewall of the first opening; partially removing the spacer formation layer and the sacrificial pattern structure to form an etching mask structure; and etching the layer to be etched using the etching mask structure to form a pattern structure.