Patent ID: 9553014
Date: 2017-01-24
CPC Classifications: H01L

Claim:
1. A semiconductor structure, comprising: at least one bonded semiconductor structure including two or more processed semiconductor structures that are attached together along a first direct bonded interface therebetween, the first direct bonded interface including direct metal-to-metal atomic bonds and direct dielectric-to-dielectric atomic bonds; and a temporary carrier die or wafer directly bonded to one processed semiconductor structure of the at least one bonded semiconductor structure along a second direct bonded interface therebetween, the second direct bonded interface comprising direct atomic or molecular bonds between at least one of silicon oxide and silicon nitride on a first side of the second direct bonded interface, and at least one of silicon, silicon oxide, and silicon nitride on a second side of the second direct bonded interface, the temporary carrier die or wafer having a weakened zone comprising a plurality of implanted ions therein at an average depth from a surface of the temporary carrier die or wafer bonded to the one processed semiconductor structure of the at least one bonded semiconductor structure.