Patent ID: 9590617
Date: 2017-03-07
CPC Classifications: H02M,H03K

Claim:
1. A semiconductor device comprising: a first transistor having a first electrode connected to a first node; a second transistor having a first electrode connected to a second electrode of said first transistor, and a second electrode connected to a second node; a third transistor having a first electrode connected to said second electrode of said first transistor, and a second electrode connected to said second node, said first transistor having a higher breakdown voltage between said first and second electrodes than said second and third transistors do, said second transistor having an amplification factor smaller than that of said third transistor, wherein the semiconductor device includes a plurality of sets of said first to third transistors, a plurality of the first transistors have first electrodes, respectively, all connected to said first node, a plurality of the second transistors have first electrodes, respectively, connected to said plurality of said first transistors at second electrodes, respectively, said plurality of the second transistors have second electrodes, respectively, all connected to said second node, a plurality of the third transistors have first electrodes, respectively, connected to said plurality of said first transistors at said second electrodes, respectively, said plurality of the third transistors have second electrodes, respectively, all connected to said second node, said plurality of the first transistors have control electrodes, respectively, all connected to a first control node, said plurality of the second transistors have control electrodes, respectively, all connected to a second control node; said plurality of the third transistors have control electrodes, respectively, all connected to a third control node, and the second control node and the third control node are different and configured to send respective control signals at different timings.