Patent ID: 9564209
Date: 2017-02-07
CPC Classifications: G11C

Claim:
1. A non-volatile static random access memory cell, comprising: a first inverter, having a first input node and a first output node, voltage supplied by a first differential supply, wherein the first inverter comprises: a second inverter, having a second input node and a second output node, voltage supplied by a second differential supply, wherein the first input node is coupled to the second output node, the second input node is coupled to the first output node, wherein the second inverter comprises: a first access transistor having a gate terminal coupled to a first word line, the first access transistor having a source terminal coupled to the first output node; a second access transistor having a gate terminal coupled to the first word line, the second access transistor having a source terminal coupled to the second output node; and a variable resistive element coupling with a third access transistor in series, directly coupled between the first output node and the second output node; wherein the non-volatile static random access memory cell operates in a restore operation comprising a dual supply initialization phase and a pulse-overwrite phase, during the dual supply initialization phase the first high voltage raises before the second high voltage while the first low voltage is the same as the second low voltage and the first output node is initialized as logic “1”, during the pulse-overwrite phase the third access transistor is turned on for a switch period in order to discharge the first output node.