Patent ID: 9691454
Date: 2017-06-27
CPC Classifications: G06F,G11C

Claim:
1. A method of operating an apparatus comprising a pad for coupling to a bidirectional data bus supporting data transfer with one or more memory devices separate from the apparatus, the apparatus also comprising a read data path on which data is transferred for read memory operations with the one or more memory devices via the pad, and a write data path on which data is transferred for write memory operations with the one or more memory devices via the pad, the method comprising generating, at a first clock output, a first phase adjusted clock signal from a clock signal; generating, at a second clock output, a second phase adjusted clock signal from the clock signal; selectively coupling one of the first clock output and the second clock output to either the read data path or the write data path during a first memory operation; and selectively coupling the other of the first clock output and the second clock output to either the read data path or the write data path during a second memory operation following the first memory operation.