Patent ID: 9544080
Date: 2017-01-10
CPC Classifications: H04J,H04L,H04M

Claim:
1. A system for passing Time Division Multiplexing (TDM) traffic through a packet switch, comprising: a packet switch having a plurality of data ports and being capable of routing Fixed Size Data Unit (FSDU) packets between the plurality of data ports; a TDM encapsulation circuit coupled to a data flow of TDM data and having a circuit demultiplexer for processing an incoming data flow of TDM data to buffer data associated with different TDM circuits into different buffer locations, a timer for monitoring a frame boundary, a FSDU generator for generating an FSDU and filling the generated FSDU with data associated with a respective one of the TDM circuits and for generating header information representative of information for allowing the packet switch to route the generated FSDU to a port associated with the respective one of the TDM circuits; and a jitter buffer for reducing variable delays arising from passing through the packet switch, wherein the jitter buffer has a size selected to maintain jitter below 125 microseconds.