Patent ID: 9659954
Date: 2017-05-23
CPC Classifications: H01L

Claim:
1. A nonvolatile memory device, comprising: a plurality of spaced-apart strings of vertically arranged nonvolatile memory cells on a memory cell region of a substrate; channel regions vertically extending through the plurality of spaced-apart strings; an electrically insulating layer on a peripheral circuit region of the substrate, which extends adjacent the memory cell region; a plurality of spaced-apart first capacitor electrodes on the peripheral circuit region, said first capacitor electrodes extending vertically and at least partially through said electrically insulating layer in a direction parallel to the channel regions in said plurality of spaced-apart strings of vertically arranged nonvolatile memory cells; and a trench insulating layer embedded within the peripheral circuit region of the substrate; wherein the plurality of spaced-apart first capacitor electrodes extend through said electrically insulating layer and into a portion of the trench insulating layer extending below the surface of the substrate.