Patent ID: 9712461
Date: 2017-07-18
CPC Classifications: H04L

Claim:
1. A data caching system for an Ethernet device, the data caching system comprising: an input package process device IPC configured to receive data frames from various Ethernet interfaces, and convert the data frames received from the Ethernet interfaces into data frames having a uniform bit width and a uniform encapsulation format; a package address management device PMG configured to maintain a cache address in which data has already been written and a currently idle cache address in a cache; a memory control device MCT configured to receive the currently idle cache address from the PMG, generate a write instruction and/or a read instruction for the cache, and perform a write operation and/or a read operation to write the converted data frames received and processed by the IPC into an currently idle cache or to read data from the cache, wherein the read instruction and/or the write instruction are/is based on an internal read request and/or an internal write request of the system or are/is generated according to a read request received from the outside of the system; and an output package process device OPC configured to perform bit conversion and format encapsulation on the data that is read by the MCT based on the read request, and output the data subjected to the bit conversion and the format encapsulation through a corresponding Ethernet interface.