Patent ID: 9544141
Date: 2017-01-10
CPC Classifications: G09C,H04L

Claim:
1. A processor comprising: at least one interconnect; a first circuit, coupled to the at least one interconnect, to generate a hardware key based on at least one unique physical characteristic of the processor; nonvolatile memory, coupled to the first circuit by the at least one interconnect, to store an encrypted key, the encrypted key stored in the nonvolatile memory being a first key received from a tester circuit external to the processor and encrypted using the hardware key; a second circuit connected to the nonvolatile memory and the first circuit by the at least one interconnect, the second circuit to decrypt the encrypted key stored in the nonvolatile memory with at least the hardware key to provide a decrypted key and generate a validation indicator based on the decrypted key; and fixed logic circuitry coupled to the first circuit and the second circuit by the at least one interconnect, the fixed logic circuitry to compare the validation indicator to the first key to generate a validator indicating whether the decrypted key is valid and provide the validator to the tester circuit external to the processor, the tester circuit to validate the encrypted key using the validator.