Patent ID: 9747974
Date: 2017-08-29
CPC Classifications: G06F,G11C

Claim:
1. A non-volatile memory apparatus comprising: a non-volatile storage circuit configured to set at least one read-voltage in accordance with a read-voltage parameter of a read command, read a corresponding data voltage set in accordance with an address of the read command, and convert the corresponding data voltage set to a corresponding data in accordance with the at least one read-voltage; and a controller, coupled to the non-volatile storage circuit for providing the read command and receiving the corresponding data, and configured to decide whether to perform an on-the-fly self-adaptive read-voltage adjustment in accordance with a number of error bits of the corresponding data, wherein the on-the-fly self-adaptive read-voltage adjustment comprises: providing a left read-voltage parameter to the non-volatile storage circuit for converting the corresponding data voltage set to a left corresponding data; providing a right read-voltage parameter to the non-volatile storage circuit for converting the corresponding data voltage set to a right corresponding data; and deciding an adjusting-direction and an adjusting-amount of the read-voltage parameter in accordance with a relationship between the corresponding data, the left corresponding data and the right corresponding data, wherein at least one left read-voltage corresponding to the left read-voltage parameter is less than the at least one read-voltage, and at least one right read-voltage corresponding to the right read-voltage parameter is greater than the at least one read-voltage, wherein the corresponding data comprises a lower page corresponding data R1L, and the non-volatile storage circuit converts the corresponding data voltage set to obtain a lower page left corresponding data R2L of the left corresponding data, the non-volatile storage circuit converts the corresponding data voltage set to obtain a lower page right corresponding data R3L of the right corresponding data, wherein the controller calculates R1L XOR R2L to obtain a calculation result R12L, the controller counts N12 with logic 1 in the calculation result R12L, the controller calculates R1L XOR R3L to obtain a calculation result R13L, the controller counts N13 with logic 1 in the calculation result R13L, the controller decides an adjusting-direction and an adjusting-amount of a lower page read-voltage parameter of the read-voltage parameter in accordance with a relationship between N12 and N13, wherein N12 and N13 are amount of bits.