Patent ID: 9659779
Date: 2017-05-23
CPC Classifications: H01L

Claim:
1. A semiconductor structure comprising: a plurality of functional gate structures located on a surface of a substrate; a dielectric spacer comprising a first dielectric material and located along an entirety of a pair of opposing sidewalls of each functional gate structure of said plurality of functional gate structures; and a second dielectric material located on each end portion of each functional gate structure and contacting an entirety of each end portion of said dielectric spacer, wherein said second dielectric material comprises a different dielectric material than said first dielectric material of said dielectric spacer and wherein said second dielectric material is entirely orthogonal to said dielectric spacer and each functional gate structure, said second dielectric material having a first sidewall surface in contact with a sidewall surface of each functional gate structure, and a second sidewall surface opposite said first sidewall surface contacting a planarization dielectric layer, said planarization dielectric layer is entirely separated from each functional gate structure by said dielectric spacer and said second dielectric material.