Patent ID: 9711488
Date: 2017-07-18
CPC Classifications: H01L

Claim:
1. A semiconductor package assembly, comprising: a semiconductor die; a first molding compound covering a back surface of the semiconductor die; a redistribution layer (RDL) structure disposed on a front surface of the semiconductor die, wherein the semiconductor die is coupled to the RDL structure; a second molding compound disposed on the front surface of the semiconductor die and embedded in the redistribution layer (RDL) structure; a passive device disposed on the second molding compound and coupled to the semiconductor die; and conductive structures disposed on a first surface of the redistribution layer (RDL) structure, the first surface facing away from the semiconductor die, wherein the conductive structures are coupled to the redistribution layer (RDL) structure, and a thickness of the passive device is less than a diameter of the conductive structures as viewed in vertical cross-section.