Patent ID: 9537004
Date: 2017-01-03
CPC Classifications: H01L

Claim:
1. A method for manufacturing a semiconductor device, the method comprising: forming a gate stack over a channel region of a substrate; forming a first layer adjacent to the channel region; forming a second layer adjacent to the first layer, wherein the first layer has a higher diffusibility than the second layer and wherein the first layer has a lower concentration of a dopant than the second layer, wherein forming the first layer is performed at a higher pressure than the second layer, wherein the first layer is formed at least in part in an environment having a pressure between about 200 torr and about 1 atmospheres, and wherein the second layer is formed at least in part in an environment having a pressure between about 5 torr and about 300 torr, wherein the second layer comprises a second dopant that is different from the first dopant, wherein the first dopant has a first concentration within interstitial locations of the first layer and the second dopant has a second concentration within interstitial locations of the second layer less than the first concentration; and performing an annealing process, wherein the annealing process diffuses a first material from the first layer into the channel region.