Patent ID: 9654086
Date: 2017-05-16
CPC Classifications: H03K

Claim:
1. A circuit structure comprising: an operational amplifier comprising: a pair of stacked first transistors; an output node; a pair of stacked second transistors connected in series to the output node; at least one third transistor, the pair of stacked first transistors and the pair of stacked second transistors being connected to the third transistor; and, a trip point adjustment node between the stacked first transistors; a current source electrically connected to the trip point adjustment node; and an output buffer electrically connected between the output node and the current source, the output buffer outputting a digital output signal based on an output voltage at the output node and the current source being selectively disabled when the digital output signal has a first value and selectively enabled to adjust a voltage level at the trip point adjustment node by a predetermined amount when the digital output signal has a second value to provide falling edge hysteresis.