Patent ID: 9594561
Date: 2017-03-14
CPC Classifications: G06F

Claim:
1. A method for tracing instruction streams for a multi-threaded processor, the method comprising: storing, within a last thread register, a thread index that indicates a last executed thread; storing, within each of a plurality of storage locations within a tracing memory, state information corresponding to a dispatch cycle for a multi-threaded processor; wherein the tracing memory is partitioned into a plurality of partitions and wherein each partition of the plurality of partitions corresponds to a particular thread; wherein the state information comprises instruction information corresponding to a group of instructions dispatched in the same cycle; wherein the instruction information indicates an operation code corresponding to one or more micro-operations; wherein the state information comprises program counter information, an execution unit identifier, a register identifier, a group identifier, and a pipeline identifier; wherein the state information comprises a previous thread index and a flip bit that is used to determine a current insertion point within the tracing memory; and reconstructing state information including the instruction information, the program counter information, the execution unit identifier, the register identifier, the group identifier, the pipeline identifier and the previous thread index for each of one or more threads from the state information within the plurality of storage locations within the tracing memory.