Patent ID: 9728472
Date: 2017-08-08
CPC Classifications: H01L

Claim:
1. A method of etching a wafer in a deep silicon trench etching process, comprising: a) absorbing a wafer electrostatically by using an electrostatic chuck; b) performing etching sub steps of a wafer main process, a time of performing the etching sub steps of the main process being shorter than a required time of the wafer main process; c) after step b, releasing the electrostatic adsorption of the electrostatic chuck to the wafer; d) after step c, determining whether a cumulative time of the etching sub steps of the main process reaches a threshold value, upon a determination that the threshold value has been reached the method continues to step e; and upon a determination that the cumulative time is less than the threshold value the method continues by repeating step a to step c; and e) connecting the wafer to a ground to release static charges and ending a wafer manufacturing process.