Patent ID: 9741858
Date: 2017-08-22
CPC Classifications: H01L

Claim:
1. An amorphous silicon semiconductor thin-film transistor (TFT) backboard structure, comprising: a base plate, a gate electrode formed on the base plate, a gate insulation layer set on and covering the gate electrode and the base plate, a semiconductor layer formed on the gate insulation layer and located above the gate electrode, and a source electrode and a drain electrode formed on the gate insulation layer and each in contact with an upper surface of the semiconductor layer, wherein the semiconductor layer comprises a multi-layer structure, which comprises a bottom amorphous silicon layer in contact with the gate insulation layer, an N-type heavily-doped amorphous silicon layer in contact with the source electrode and the drain electrode, at least two N-type lightly-doped amorphous silicon layers sandwiched between the bottom amorphous silicon layer and the N-type heavily-doped amorphous silicon layer, a first intermediate amorphous silicon layer separating every two adjacent ones of the lightly-doped amorphous silicon layers, and a second intermediate amorphous silicon layer separating the N-type heavily-doped amorphous silicon layer from the one of the lightly-doped amorphous silicon layers that is closest to the N-type heavily-doped amorphous silicon layer; and a channel section formed in the middle of the semiconductor layer and extending through the N-type heavily-doped amorphous silicon layer, the second intermediate amorphous silicon layer, the first intermediate amorphous silicon layer, and all the N-type lightly-doped amorphous silicon layers.