Patent ID: 9553036
Date: 2017-01-24
CPC Classifications: H01L

Claim:
1. A method for manufacturing a semiconductor package, comprising: forming a heat-dissipating material layer on a carrier; forming an insulating material layer on the heat-dissipating material layer, the insulating material layer having a plurality of accommodating openings to expose a portion of the heat-dissipating material layer; disposing a plurality of chips in the accommodating openings respectively and filling a thermal interface material in the accommodating openings, so that the thermal interface material covers the chips and exposes active surfaces of the chips, wherein the insulating material layer, the thermal interface material, and the active surfaces of the chips are coplanar to each other; and forming a re-distribution circuit structure directly on the insulating material layer, the thermal interface material and the active surfaces of the chips, wherein the re-distribution circuit structure comprises a plurality of re-distribution layers, and each of the re-distribution layers is electrically connected to a corresponding chip respectively.