Patent ID: 9553546
Date: 2017-01-24
CPC Classifications: H03F

Claim:
1. A differential output stage of an amplification device, for driving a load, comprising: a first differential output stage portion having a first differential input terminal and a first differential output terminal, said first differential input terminal comprising a first input terminal and a second input terminal; a second differential output stage portion having a second differential input terminal and a second differential output terminal, said second differential input terminal comprising a third input terminal and a fourth input terminal, the load being electrically connected between said first and second differential output terminal; the first differential output stage portion further comprising: a first output circuit connected between a first reference potential and said first differential output terminal; a second output circuit between a second reference potential and said first differential output terminal; a first driving circuit of the first output circuit arranged to connect said first input terminal to a first driving terminal of said first output circuit, said first driving circuit comprising a first biasing circuit arranged to provide to the first driving terminal a first driving signal; a second driving circuit of the second output circuit arranged to connect said second input terminal to a second driving terminal of said second output circuit, said second driving circuit comprising a second biasing circuit arranged to provide to the second driving terminal a second driving signal; and wherein the first differential output stage portion further comprises: a third output circuit connected between a first node of said first biasing circuit and the first differential output terminal, said third output circuit having a third driving terminal connected to said first driving terminal, a fourth output circuit connected between a first node of said second biasing circuit and the first differential output terminal, said fourth output circuit having a fourth driving terminal connected to said second driving terminal.