Patent ID: 9613706
Date: 2017-04-04
CPC Classifications: G06F,G11C

Claim:
1. A method of operating a memory device, comprising: sending a number of program/erase cycles from a memory of control logic of the memory device to a counter of the control logic, wherein the number of program/erase cycles has been previously applied to one or more memory cells of an array of memory cells of the memory device; using the counter to increment the number of program/erase cycles each time an additional program/erase cycle is applied to the one or more memory cells; using compare logic of the control logic to compare the incremented number of program/erase cycles to a numerical value; and using starting-voltage level control logic of the control logic to adjust a program starting voltage level and/or an erase starting voltage level based on the comparison of the incremented number of program/erase cycles to the numerical value.