Patent ID: 9583483
Date: 2017-02-28
CPC Classifications: H01L

Claim:
1. An integrated circuit structure comprising: a semiconductor substrate; a first gate stack over the semiconductor substrate; a first silicon germanium region extending into the semiconductor substrate and adjacent to the first gate stack, wherein the first silicon germanium region comprises a first top surface, with a center portion of the first top surface recessed from edge portions of the first top surface to form a recess, wherein the first top surface extends above an interface between the first gate stack and the semiconductor substrate, and wherein the first top surface comprises: second gate stack over the semiconductor substrate; a second opening extending into the semiconductor substrate, wherein the second opening is adjacent to the second gate stack; and a second silicon germanium region in the second opening, wherein the second silicon germanium region comprises a second top surface, and wherein the second top surface does not have recessed center portions.