Patent ID: 9735062
Date: 2017-08-15
CPC Classifications: H01L

Claim:
1. A method of forming a semiconductor structure comprising: forming a silicon germanium layer over a thinned silicon layer located over a substrate; recessing a portion of the silicon germanium layer located in a first device region of the substrate, while masking another portion of the silicon germanium layer located in a second device region of the substrate, to provide a recessed portion of the silicon germanium layer in the first device region and a non-recessed portion of the silicon germanium layer in the second device region laterally abutting the recessed portion, wherein a top surface of the recessed portion of the silicon germanium layer is located below a top surface of the non-recessed portion of the silicon germanium layer; removing the recessed portion of the silicon germanium layer to expose a portion of the thinned silicon layer in the first device region; and epitaxially growing silicon from a top surface of the exposed portion of the thinned silicon layer and a sidewall surface of the another portion of the silicon germanium layer located in the second device region to form an epitaxial silicon layer over the exposed portion of the thinned silicon layer in the first device region.