Patent ID: 9678894
Date: 2017-06-13
CPC Classifications: G06F

Claim:
1. An apparatus comprising: an interface to receive an incoming request to access a memory region protected by counter mode encryption and a counter tree structure having a plurality of levels; a plurality of trackers, implemented at least partly in one or more of configurable logic or fixed-functionality hardware logic, to accept the incoming request and determine whether to suspend the incoming request on a per-level basis with respect to the counter tree structure, wherein the plurality of trackers includes a first level tracker and a second level tracker, wherein the first level tracker is to conduct a first dependency check at a first level of the counter tree structure and to pass the incoming request to the second level tracker when the first dependency check indicates that the incoming request lacks a shared node at the first level with the in-process request and authentication of the access is unsuccessful at the first level, wherein the plurality of trackers use one or more buffers, the one or more buffers comprising one or more of register files or flip-flops to complete read and fill accesses in one cycle, wherein the first level tracker is to suspend the incoming request when the first dependency check indicates that the incoming request shares the node of the first level with an in-process request, and wherein authentication of the access includes conducting a code search of a message authentication code buffer for data corresponding to the incoming request.