Patent ID: 9640654
Date: 2017-05-02
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: (a) a laterally diffused MISFET, including: (b) a source contact disposed in a second region located on the one side of the gate electrode over the semiconductor substrate to be electrically coupled to the source region; (c) a source wiring disposed over the source contact; (d) a drain contact disposed in a first region located on the other side of the gate electrode over the semiconductor substrate to be electrically coupled to the drain region; and (e) a drain wiring disposed over the drain contact, wherein, in plan view, the drain contact includes a plurality of separated drain contacts disposed at first intervals in the first direction in the first region, wherein, in plan view, the source contact includes a plurality of separated source contacts disposed at first intervals in the first direction in the second region, wherein the respective separated drain contacts are arranged in parallel such that a position of each of the separated drain contacts in the first direction corresponds to a position of each of the separated source contacts in the first direction, and wherein, in plan view, the drain wiring includes a plurality of separated drain wirings arranged at second intervals in the first direction in the first region.