Patent ID: 9565037
Date: 2017-02-07
CPC Classifications: H04L

Claim:
1. An apparatus comprising: a feedforward equalizer (FFE); an FFE data slicer to threshold detect a sample of a received analog training signal, a result of the threshold detecting corresponding to an input signal digital decision; and FFE least mean square (LMS) circuitry to determine a plurality of FFE coefficients based, at least in part, on an output of the FFE data slicer and based, at least in part, on a mean square error corresponding to a difference between an equalized sample and a reference; wherein the output of the FFE data slicer comprises three sequential input signal digital decisions separated in time by a delay, D, and the FFE LMS circuitry is to determine three FFE coefficients based, at least in part, on the three sequential input signal digital decisions.