Patent ID: 9640538
Date: 2017-05-02
CPC Classifications: H01L

Claim:
1. A method comprising: forming first and second dummy electrodes on a substrate, each dummy electrode having spacers at opposite sides and being surrounded by an inter-layer dielectric (ILD); removing the first and second dummy electrodes, forming first and second cavities, respectively; forming a spin-on glass hardmask over the substrate, the spacers and ILD and filling in the first and second cavities with the spin-on glass hardmask down to an upper surface of the substrate such that the spin-on glass hardmask is in direct contact with the upper surface of the substrate; forming a photoresist over the second cavity and exposing the first cavity; forming a deep trench in the substrate through the first cavity; removing the spin-on glass hardmask; and forming a capacitor in the first cavity and deep trench and concurrently forming an access transistor in the second cavity.