Patent ID: 9601399
Date: 2017-03-21
CPC Classifications: H01L

Claim:
1. A module arrangement for power semiconductor devices, comprising: one or more power semiconductor modules, wherein the one or more power semiconductor modules each includes a substrate with a first surface and a second surface being arranged opposite to the first surface, wherein for each of the one or more modules, the substrate is at least partially electrically insulating, a conductive structure is arranged at the first surface of the substrate, and at least one power semiconductor device is arranged on said conductive structure and electrically connected thereto, wherein the one or more modules each comprises an inner volume for receiving the at least one power semiconductor device, the inner volume of at least one of the one or more modules being hermetically sealed from its surrounding by a module enclosure, wherein the module arrangement comprises an arrangement enclosure at least partly defining a volume for receiving the one or more modules, wherein the arrangement enclosure covers said volume, and wherein the arrangement enclosure hermetically seals the volume defined therefrom.