Patent ID: 9634104
Date: 2017-04-25
CPC Classifications: H01L

Claim:
1. A method of fabricating a fin field effect transistor (FinFET) comprising: forming a first fin and a second fin extending upward from a substrate major surface to a first height, wherein the first fin and the second fin are adjacent; forming an insulation layer comprising a top surface extending upward from the substrate major surface to a second height less than the first height, wherein a portion of the first fin and a portion of the second fin extend beyond the top surface of the insulation layer; selectively forming a bulbous epitaxial layer covering a portion of each fin, wherein the bulbous epitaxial layer defines an hourglass shaped cavity between the first and second fins, wherein the hourglass cavity at its narrowest point provides a gap between the bulbous epitaxial layer of the first fin and the bulbous epitaxial layer of the second fin; depositing a first metal layer on the bulbous epitaxial layer; annealing the substrate and the first metal layer to convert at least a portion of the bulbous epitaxial layer and at least a portion of the first metal layer to silicide; after the annealing, etching a portion of the first metal material in the hourglass cavity, wherein the portion is unreacted first metal material; and after annealing, depositing a second metal layer within the hourglass cavity.