Patent ID: 9570297
Date: 2017-02-14
CPC Classifications: H01L

Claim:
1. A method of removing defects in a semiconductor formed in a long aspect ratio trapping (ART) trench, the method comprising: providing a dielectric layer on a substrate; forming a long trench in the dielectric layer exposing the substrate, wherein a length of the long trench is longer than a width of the long trench; forming a first semiconductor in the long trench; forming a first spacer on sidewalls of the long trench above the first semiconductor, wherein a portion of the top surface of the first semiconductor includes an exposed portion; recessing the exposed portion of the top surface of the first semiconductor; forming an insulator layer on the recessed top surface of the first semiconductor, wherein a sidewall portion of the first semiconductor is exposed above the insulator layer, and the sidewall portion of the first semiconductor is directly below the first spacer; forming a second semiconductor in the long trench along exposed sidewall portions of the first semiconductor, the second semiconductor is directly above the insulator layer, and the top surface of the second semiconductor is below the top surface of the first spacer; forming a second spacer in the long trench on sidewalls of the first spacer, the second spacer is directly above a sidewall portion of the second semiconductor, wherein the top surface of the second semiconductor includes a second exposed portion; removing the exposed portion of the second semiconductor, wherein the sidewall portion of the second semiconductor is exposed between the insulator layer and the second spacer; and removing a front end and a back end of the first semiconductor and the second semiconductor from above the insulator layer, wherein the front end and back end are separated by a central region which extends across the width of the long trench.