Patent ID: 9627544
Date: 2017-04-18
CPC Classifications: H01L

Claim:
1. A method of forming a semiconductor device, comprising: forming at least one suspended first silicon-based nanowire and two first silicon-based blocks at two ends of the first silicon-based nanowire in a first area, and forming at least one suspended second silicon-based nanowire and two second silicon-based blocks at two ends of the second silicon-based nanowire in a second area; forming a germanium-based semiconductor layer on a surface of the first silicon-based nanowire and on surfaces of the second silicon-based blocks; driving germanium atoms of the germanium-based semiconductor layer into underlying layers, so the first silicon-based nanowire is transformed into a germanium-based nanowire and the second silicon-based blocks are transformed into two germanium-based blocks; forming a first gate dielectric layer and a second gate dielectric layer respectively on surfaces of the germanium-based nanowire and the second silicon-based nanowire; and forming at least one first gate across the germanium-based nanowire and forming at least one second gate across the second silicon-based nanowire, wherein the first area is an N-type device area, and the second area is a P-type device area.