Patent ID: 9553121
Date: 2017-01-24
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a semiconductor substrate having a main surface; a first diffusion barrier film on the main surface of the semiconductor substrate; a connection portion connecting a copper-based first wiring layer arranged on the semiconductor substrate side of the first diffusion barrier film with a copper-based second wiring layer arranged on an opposite side to the semiconductor substrate side of the first diffusion barrier film; an interlayer insulating film covering the first diffusion barrier film, the first diffusion barrier film including a first opening region formed in a semiconductor circuit region that is a partial region in a two-dimensional view and a second opening region formed as an opening region different from the first opening region in a two-dimensional view, the first and second opening regions being formed in a region different from an opening region formed to allow the connection portion to pass through the first diffusion barrier film, the second wiring layer being formed so as to fill in a groove formed in the interlayer insulating film in the semiconductor circuit region; a mark wiring layer arranged immediately above the second opening region as the same layer as the second wiring layer; and a second diffusion barrier film arranged in contact with an upper surface of the mark wiring layer.