Patent ID: 9666670
Date: 2017-05-30
CPC Classifications: H01L

Claim:
1. A device, comprising: a substrate; a first insulating layer on the substrate, the first insulating layer having a top surface; a first recess and a second recess in the substrate; a second insulating layer in the first and second recess, the second insulating layer having a top surface, the top surface of the second insulating layer being below the top surface of the first insulating layer; a first semiconductor layer on the top surface of the first insulating layer and extending between the first and second recess; a gate structure on the first semiconductor layer, the gate structure having a first portion on a top surface of the first semiconductor layer and a second portion on the top surface of the second insulating layer, the gate structure being adjacent to both the top surface of the first semiconductor layer and side surfaces of the first semiconductor layer.