Patent ID: 9711509
Date: 2017-07-18
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a substrate; a first interlayer insulating film located over the substrate; a first capacitor including first and second electrodes and a first capacitor insulating film disposed between the first and second electrodes, and formed in a first recess having an opening in a surface of the first interlayer insulating film; a second capacitor including third and fourth electrodes and a second capacitor insulating film disposed between the third and fourth electrodes, and formed in a second recess having an opening in the surface of the first interlayer insulating film and adjacent to the first capacitor; a wiring disposed between the first recess and the second recess; and a first isolation insulating film formed in the first interlayer insulating film, located between the first recess and the second recess in plan view, formed from a material different from that of the first interlayer insulating film, and covering the wiring, wherein: a shortest distance from the wiring to the substrate is greater than a shortest distance from one of the first and second capacitor insulating films to the substrate, an upper surface of the first isolation insulating film and an upper surface of the first interlayer insulating film are flush with each other, and the wiring is disposed between the upper surface of the first isolation insulating film and the substrate.