Patent ID: 9553011
Date: 2017-01-24
CPC Classifications: H01L

Claim:
1. A method of forming an integrated circuit, comprising: providing a substrate comprising a semiconductor material of a first conductivity type; forming a deep well of a second, opposite, conductivity type disposed in said semiconductor material of said substrate, said deep well extending to a depth of 1 micron to 5 microns; subsequently forming a deep isolation trench disposed in said substrate through said deep well, so as to separate a functional portion of said deep well from a separated portion of said deep well, said separated portion being free of an active component of said integrated circuit, said separated portion being electrically isolated from said functional portion; forming an active component of said integrated circuit in said functional portion; forming a well contact region of said second conductivity type in said separated portion; and forming an electrical connection from said well contact region to a voltage terminal of said integrated circuit.