Patent ID: 9653553
Date: 2017-05-16
CPC Classifications: C30B,H01L

Claim:
1. A semiconductor substrate comprising: a SiC layer having a surface inclined in a <11-20> direction plus or minus 5° from a {0001} face at an off angle of 0° to 10°, wherein the SiC layer includes threading edge dislocation clusters, each of the threading edge dislocation clusters includes a plurality of threading edge dislocations on the surface, the threading edge dislocations included in each of the threading edge dislocation clusters exist in a region that extends in a [1-100] direction plus or minus 5° and has a width of 30 μm or less, each of the threading edge dislocation clusters includes at least three threading edge dislocations adjacent at an interval of 30 μm or less, an interval of adjacent threading edge dislocations in each of the threading edge dislocation clusters is 70 μm or less, and area density of the threading edge dislocation clusters in the SiC layer is 18.8 cm