Patent ID: 9653045
Date: 2017-05-16
CPC Classifications: G09G

Claim:
1. A memory control device, comprising: a frame memory having a predetermined recording capacity; a compression section for (i) compressing image data for a single frame, the image data being transferred from a host, into a size not larger than the recording capacity and (ii) writing the compressed image data into the frame memory; an expansion section for (i) reading the compressed image data from the frame memory, (ii) expanding the compressed image data, and (iii) transferring the expanded image data to a display control section; and a timing control section for, until an inhibit time period Ts passes from a start of reading compressed image data for a first frame, inhibiting a start of writing compressed image data for a second frame subsequent to the first frame, the inhibit time period Ts being so preset as to prevent coincidence between a range of a move of a read position over the frame memory and a range of a move of a write position over the frame memory; wherein the inhibit time period Ts is not shorter than a critical time period Td and is shorter than a read time period Tout, the critical time period Td being a time period preset so as to prevent coincidence between a range of a move of a read position over the frame memory and a range of a move of a write position over the frame memory provided that a write rate of writing by the compression section is variable between a minimum write rate and a maximum write rate and a read rate of reading by the expansion section is variable between a minimum read rate and a maximum read rate, and the read time period Tout being a fixed time period over which the expansion section reads the compressed image data for the single frame.