Patent ID: 9620239
Date: 2017-04-11
CPC Classifications: G11C

Claim:
1. A method for operating a memory having an array of memory cells arranged in a plurality of rows and a plurality of columns, each row of memory cells including a label storage unit storing a labeling value, the method comprising: receiving a first to-be-programmed data set to be stored into a target row of memory cells; determining whether at least one programming condition on the target row of memory cells is satisfied; when it is determined that the at least one programming condition on the target row of memory cells is satisfied, performing a first operation on the first to-be-programmed data set to obtain a second to-be-programmed data set, programming the second to-be-programmed data set into the target row of memory cells, and setting a value of the label storage unit corresponding to the target row of memory cells to be a first labeling value; and when it is determined that the at least one programming condition on the target row of memory cells is not satisfied, performing a second operation on the first to-be-programmed data set to program the first to-be-programmed data set into the target row of memory cells, and setting the value of the label storage unit corresponding to the target row of memory cells to be a second labeling value, when one memory cell in the target row of memory cells fails to be written, one or more remaining memory cells in the same target row of memory cells are able to be written without being inverted; wherein the plurality of columns of memory cells include N number of columns of data memory cells and one column of label memory cells, each column of data memory cells are connected to a first input end of a corresponding XOR calculator, and a second input end of each XOR calculator is connected to the column of label memory cells.