Patent ID: 9740663
Date: 2017-08-22
CPC Classifications: G06F

Claim:
1. A data processing device for performing a stage of an N point Fast Fourier Transform, the stage comprising computing N output operands on the basis of N input operands by applying a set of N/P radix-P butterflies to the N input operands, with N being a positive integer and P being a value equal to 2 or 4, wherein the data processing device comprises: an input operand memory unit arranged to store a plurality of input operands addressable in blocks of K operands, with K being a positive integer; an input buffer comprising a plurality of addressable memory cells arranged in lines and columns; K/P radix-P operation units for calculating the N/P radix-P butterflies, each operation unit being connected to the input buffer; a logic circuit arranged to control the input operand memory unit and the input buffer according to an addressing scheme so as to perform the following actions: