Patent ID: 9620647
Date: 2017-04-11
CPC Classifications: H01L

Claim:
1. A thin film transistor, comprising: a substrate; a gate, a gate insulation layer, a first semiconductor layer, an etch stop layer and a second semiconductor layer, which are sequentially stacked on a surface of the substrate; and a source and a drain formed separating from each other and the source and the drain overlapping two ends of the second semiconductor layer respectively; wherein a first via and a second via are formed on the etch stop layer corresponding to the source and the drain respectively; the source connects the first semiconductor layer through the first via; the drain connects the first semiconductor layer through the second via; and wherein the first semiconductor serves as a semiconductor layer and the gate of the second semiconductor layer at the same time, the source and the drain are connected to the first semiconductor and the second semiconductor for effectively increasing the on-state current of the thin film transistor and have a faster switching speed.