Patent ID: 9619009
Date: 2017-04-11
CPC Classifications: G06F,Y02D

Claim:
1. A processor comprising: a plurality of processor cores of the processor to operate at variable performance levels, wherein one of the plurality of processor cores may operate at one time at a performance level different than a performance level at which another one of the plurality of processor cores may operate at the one time; logic of the processor to set one or more operating parameters for one or more of the plurality of processor cores; logic of the processor to monitor activity of one or more of the plurality of processor cores; and logic of the processor to select a maximum operating point from a plurality of pre-determined maximum operating points based on at least in part on the monitored activity and knowledge of one or more cooling solutions available to the plurality of processor cores, each of the plurality of pre-determined maximum operating points comprising a respective maximum operating frequency and voltage; logic of the processor to constrain power of one or more of the plurality of processor cores based at least in part on the selected maximum operating point, wherein the logic to constrain power is to limit a frequency, via a communicated frequency limit, at which one or more of the plurality of processor cores may be set, the communicated frequency limit is based at least in part on the selected maximum operating point.