Patent ID: 9564926
Date: 2017-02-07
CPC Classifications: H03M,H04L

Claim:
1. A Forward Error Correction (FEC) coding system comprising: a FEC coding device; a first error decorrelator, operatively coupled to the FEC coding device, to apply multiple permutation operations to an encoded data stream in respective different dimensions; and a second error decorrelator to apply multiple permutation operations to a data stream in respective different dimensions to generate a permuted data stream, the FEC coding device comprising an encoder operatively coupled to the second error decorrelator to receive and encode the permuted data stream from the second error decorrelator to generate the encoded data stream, the multiple permutation operations of the first error decorrelator being inverses of the multiple permutation operations of the second error decorrelator, the FEC coding system further comprising: a third error decorrelator operatively coupled to the first error decorrelator to apply multiple permutation operations in respective dimensions to a permuted encoded data stream from the first error decorrelator, the multiple permutation operations of the third error decorrelator matching the multiple permutation operations of the second error decorrelator; a decoder operatively coupled to the third error decorrelator to decode a permuted data stream from the third error decorrelator to generate a decoded data stream; a fourth error decorrelator operatively coupled to the decoder to apply multiple permutation operations in respective dimensions to the decoded data stream, the multiple permutation operations of the fourth error decorrelator matching the multiple permutation operations of the first error decorrelator.