Patent ID: 9645829
Date: 2017-05-09
CPC Classifications: G06F

Claim:
1. An apparatus comprising: circuitry at a controller for a non-volatile memory capable of preserving data maintained in volatile memory, the non-volatile and the volatile memory resident on a non-volatile dual in-line memory module (NVDIMM), the NVDIMM comprising a first set of registers, a second set of registers, and a third set of registers; a receive component for execution by the circuitry to receive a status request and a first command, the first command to be received via assertion of a first set of bits maintained in the first set of registers, the assertion of the first set of bits based on a register map; a status component for execution by the circuitry to determine a status responsive to the status request; and an indicate component for execution by the circuitry to indicate the status via selective assertion of a second set of bits maintained in the second set of registers and to indicate acceptance and completion status of the first command via assertion of a third set of bits maintained in a third set of registers of the NVDIMM, the selective assertion based on the register map and the assertion of the third set of bits based on the register map.