Patent ID: 9619160
Date: 2017-04-11
CPC Classifications: G06F

Claim:
1. A system comprising: a central processing unit (CPU) of a node coupled to storage devices of a storage array; a non-volatile random access memory (NVRAM) coupled to the CPU, a portion of the NVRAM configured as one or more logs; and a memory coupled to the CPU and configured to store a storage input/output (I/O) stack having a plurality of layers including a persistence layer executable by the CPU, the persistence layer cooperating with the NVRAM to employ the one or more logs to record in sequence write requests received from a host and to acknowledge successful receipt of the write requests to the host, the one or more logs having a set of entries, each entry including (i) write data of a write request, (ii) a previous offset referencing a previous entry of the log and (iii) and an outstanding enteries field indication a number of outstanding I/O operations in the log at the time that the respective entry is created, wherein after a power loss, the acknowledged write requests are recovered by replay of the one or more logs in reverse sequential order using the previous offset of each entry to traverse the log, wherein recovery of a last write request received from the host is enabled by the replay of the logs corresponding to write requests pending in the storage I/O stack at a time of creation of a tail entry of the log.