Patent ID: 9659806
Date: 2017-05-23
CPC Classifications: H01L

Claim:
1. A semiconductor package, comprising: a base layer having opposing first and second surfaces, and a receiving part penetrating the first and second surfaces; a plurality of conductive pillars disposed on the second surface of the base layer, each of the conductive pillars having opposing first and second terminals, with the second terminals being of a distant from the second surface of the base layer; a semiconductor element received in the receiving part of the base layer and having an active surface being exposed from the first surface of the base layer and a passive surface opposing the active surface; and an encapsulant formed on the second surface of the base layer, encapsulating the conductive pillars and the semiconductor element, and having opposing third and fourth surfaces, wherein the second terminals of the conductive pillars are exposed from the fourth surface of the encapsulant.