Patent ID: 9634109
Date: 2017-04-25
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a substrate in which a trench is formed; a first impurity region and a second impurity region formed in the substrate separated from each other by the trench; a gate electrode formed to fill a lower part of the trench; and a capping layer formed over the gate electrode to fill an upper part of the trench, wherein the gate electrode comprises: a first work function liner formed over a bottom surface and lower sidewalls of the lower part of the trench, not overlapping with the first impurity region and the second impurity region, and is formed of titanium aluminum nitride; a second work function liner formed over upper sidewalls of the lower part of the trench over the first work function liner, overlapping with the first impurity region and the second impurity region, and including a silicon-containing non-metal material; and a low resistivity electrode fully filling the lower part of the trench over the first work function liner and the second work function liner, wherein the low resistivity electrode is formed of a single layer.