Patent ID: 9681536
Date: 2017-06-13
CPC Classifications: H01L,H05K

Claim:
1. A package substrate, comprising: a capacitance layer having a first side, a second side opposite to the first side, and an opening; a plurality of first patterned circuits disposed on the first side, and adjacent two of the first patterned circuits having a gap formed in-between, wherein the opening is located within the gap; at least one second patterned circuit disposed on the second side, wherein the second patterned circuit at least covers the opening; a dielectric layer disposed on the first side, wherein the dielectric layer has a first through hole formed within, wherein the first through hole is extended through the gap and the opening, and reached the second patterned circuit; and a conductive material disposed inside the first through hole, and extended between the second patterned circuit and a surface of the dielectric layer away from the capacitance layer, wherein the dielectric layer is disposed between and insulate the capacitance layer and the conductive material.