Patent ID: 9679771
Date: 2017-06-13
CPC Classifications: H01L

Claim:
1. A method to reduce the effect of edge-placement errors using dual-material self-aligned quadruple patterning (dmSAQP) and selective etching processes comprising: a bottom-mandrel layer formed over a wafer substrate; a first hard-mask layer formed over the bottom-mandrel layer; a top-mandrel layer formed over the first hard-mask layer; a second hard-mask layer formed over the top-mandrel layer; coating a first thin film of bottom anti-reflective coating (BARC) and then a first thin film of resist; a lithographic step to pattern the first thin film of resist coated on the wafer substrate; trimming the first thin film of resist and the first thin film of BARC to tune a feature Critical-Dimension (CD); etching the second hard-mask layer and using it as a hard mask for the following etching; etching the top-mandrel layer and stripping the second hard-mask layer residue; depositing a first CVD layer over the top-mandrel layer; etching the first CVD layer to form first spacers on sidewalls of the top-mandrel layer; using oxygen plasma process to strip the top-mandrel layer; etching the bottom hard-mask layer and using it as a hard mask for the following etching; etching the bottom-mandrel layer and stripping the bottom hard-mask layer residue; depositing a second CVD layer over the bottom-mandrel layer; etching the second CVD layer to form second spacers on sidewalls of the bottom mandrel layer; filling trenches formed by the second spacers with a material different from that of the bottom-mandrel layer to form filled-in features; partially etching or polishing back the filled-in material to expose the second spacers; etching the second spacers without attacking the bottom-mandrel layer and the filled-in features; coating a second thin film of BARC and then a second thin film of resist; a lithographic step to pattern cut-hole features on the second thin film of resist using one decomposed cut mask which only expose those lines to be etched; etching one group of lines that are exposed and made of the same material; coating a third thin film of BARC and then a third thin film of resist; a lithographic step to pattern cut-hole features on the third thin film of resist using the other decomposed cut mask which only expose those lines to be etched in the following etching process; etching the other group of lines that are exposed and made of a different material; etching to transfer the final pattern to the wafer substrate.