Patent ID: 9608096
Date: 2017-03-28
CPC Classifications: H01L

Claim:
1. A method of fabricating a device structure, the method comprising: forming one or more trench isolation regions in a substrate to define a first device region having a first width; forming a protect layer on a top surface of the one or more trench isolation regions; forming a first opening in the protect layer that coincides with a top surface of the device region and that has a second width that is less than or equal to the first width of the first device region; and forming a base layer of a first bipolar junction transistor having a first section on the first device region inside the first opening and a second section on the protect layer, wherein the first section of the base layer is comprised of single crystal semiconductor material, and the protect layer and the second section of the base layer are comprised of polycrystalline semiconductor material.