Patent ID: 9634648
Date: 2017-04-25
CPC Classifications: G05F,H03K

Claim:
1. A circuit, comprising: a divider circuit block configured to generate a trim term signal that is temperature and process independent; and a processing circuit block configured to multiply a temperature dependent reference voltage signal by a factor, and to sum the trim term signal with a result of the multiplication to generate an output reference voltage; wherein the divider circuit block comprises: wherein the processing circuit block comprises: a second amplifier comprising a first input configured to receive the temperature dependent reference voltage signal and a second input; a fourth p-transistor having a gate coupled to an output of the second amplifier; a second resistor having a first end coupled to a drain of the fourth p-transistor forming a circuit node that generates the output reference voltage; and a third resistor having a first end coupled in series to a second end of the second resistor; and wherein the second input of the second amplifier is directly coupled to the second end of the second resistor forming a feedback loop and is directly coupled to the output node of the control circuit.