Patent ID: 9653604
Date: 2017-05-16
CPC Classifications: H01L

Claim:
1. A method of manufacturing a semiconductor device including a FinFET, the method comprising: forming a first fin structure and a second fin structure over a substrate, the first and second fin structures extending in a first direction and protruding from an isolation insulating layer; forming a gate structure over part of the first and second fin structures, the gate structure extending in a second direction perpendicular to the first direction; forming sidewall spacers on opposing major side surfaces of each of the first and second fin structures not covered by the gate structure; forming first metal layers on the sidewall spacers, thereby filling a space between the first and second fin structures; after forming the first metal layers, removing the sidewall spacers; after removing the sidewall spacers, forming an amorphous layer in contact with the first and second fin structures; forming a recrystallized layer by partially recrystallizing the amorphous layer on the first and second fin structures; removing a remaining amorphous layer which is not recrystallized; after removing the remaining amorphous layer, forming a second metal layer; and forming silicide layers formed by a silicide reaction between the recrystallized layer and the first metal layers and the second metal layer.