Patent ID: 9583700
Date: 2017-02-28
CPC Classifications: H01L

Claim:
1. A memory cell, comprising: an insulation layer having an upper surface and an indentation in the upper surface; an interlayer conductor in a via extending through the insulation layer in the indentation, wherein a first end of the interlayer conductor is located proximal to a bottom surface of the insulation layer and the second end of the interlayer conductor located distal to the bottom surface comprises an electrode surface recessed below the upper surface of the insulation layer; a memory element in electrical contact with the electrode surface; and a conductor over and in contact with the memory element within the indentation; wherein the electrode surface has a surface roughness RA less than 3nm, and the indentation includes a concave sidewall portion above the electrode surface extending outwardly from the interlayer conductor toward the upper surface.