Patent ID: 9601506
Date: 2017-03-21
CPC Classifications: H01L

Claim:
1. A semiconductor structure, comprising: a substrate; a plurality of stacks formed on the substrate, wherein each of the stacks comprises: a group of alternating conductive strips and insulating strips; a first string select line formed on the group of the conductive strips and the insulating strips; a first insulating layer formed between the first string select line and the group of the conductive strips and the insulating strips; a second insulating layer formed on the first string select line; and a third insulating layer formed on the second insulating laver; a blocking layer-trapping layer-tunneling layer structure formed on the stacks, the blocking layer-trapping layer-tunneling layer structure being formed conformally with the stacks; a plurality of channel layers formed on the blocking layer-trapping layer-tunneling layer structure, the channel layers being formed conformally with the stacks; a first insulating material formed between the stacks, the first insulating material covering portions of the channel layers; a dielectric layer formed on portions of the channel layers that are not covered by the first insulating material; and a plurality of second string select lines formed between the stacks on the first insulating material, wherein the second string select lines are separated from the channel layers by the dielectric layer.