Patent ID: 9734777
Date: 2017-08-15
CPC Classifications: G09G

Claim:
1. A display device comprising: a plurality of pixels arranged in a column direction and a row direction; a plurality of data lines of which each data line is connected to the pixels of two consecutive rows arranged alternately with the pixels of two adjacent consecutive rows; and a plurality of gate circuit parts of which each gate circuit part is configured to apply a gate signal to a gate line, wherein the plurality of gate circuit parts include: a first, a second, a third, and a fourth gate circuit part, a first clock-terminal signal of the first, the second, the third and the fourth gate circuit part is a first, a second, a third and a fourth clock signal inverted every 4H (‘H’ is a horizontal period) respectively, and a second clock-terminal signal of the first, the second, the third and the fourth gate circuit part is a fifth, a sixth, a seventh and an eighth clock signal having a phase opposite to the first, the second, the third and the fourth clock signal respectively.