Patent ID: 9618923
Date: 2017-04-11
CPC Classifications: G01R,G04F,G05B,H03M

Claim:
1. An apparatus comprising: an input port configured to receive an analog signal that varies as a function of time; a symbol generator that generates an ordered sequence of symbols from said analog signal, said symbols being characterized by a number of symbol states, said number of symbol states being less than or equal to 16; an FSM characterized by an input word, and a plurality of FSM states, said FSM changing from a current one of said plurality of FSM states to another one of said plurality of FSM states that is determined by said input word and said current one of said plurality of FSM states in response to a cycle signal being received; and a controller that causes said FSM to search for a pattern in said ordered sequence of symbols, said controller loading said input word with one or more of said symbols, generating said cycle signal, and coupling said cycle signal to said FSM.