Patent ID: 9536861
Date: 2017-01-03
CPC Classifications: H01L

Claim:
1. A semiconductor package comprising: a substrate having a first surface and a second surface facing away from the first surface, a window defined through a center portion of the substrate, and a plurality of first bond fingers, a plurality of second bond fingers, and a plurality of external electrodes arranged on the second surface; two or more first semiconductor chips each having a plurality of first bonding pads arranged adjacent to edges of the first semiconductor chips, and each of the first semiconductor chips separately attached to the first surface of the substrate in a face-down type position exposing the first bonding pads; and a second semiconductor chip having a plurality of second bonding pads arranged at a center portion of the second semiconductor chip, and attached to each of the first semiconductor chips in a face-down type position exposing the second bonding pads through the window, wherein the first semiconductor chips are attached allowing the edges of the first semiconductor chips to project outwardly relative to the outer edges of the substrate in a second direction substantially perpendicular to a first direction, and have a structure in which the first bonding pads are arranged adjacent to the projecting edges, wherein the first bond fingers are arranged on the second surface of the substrate in the first direction adjacent to edges of the substrate, and the second bond fingers are arranged on the second surface of the substrate in the second direction adjacent to the window, wherein the first bonding pads are arranged in the first direction adjacent to edges of the first semiconductor chips, and wherein the second bonding pads are arranged in the second direction at a center portion of the second semiconductor chip.