Patent ID: 9747212
Date: 2017-08-29
CPC Classifications: G06F

Claim:
1. A method for modifying program instructions comprising: receiving a request to execute a store instruction to modify first data at a memory location identified by a memory address; determining that one or more bits of the store instruction are set to directly indicate that second data referenced by the store instruction comprises a program instruction to replace the first data; in response to determining that the one or more bits of the store instruction are set to directly indicate that the second data referenced by the store instruction comprises the program instruction, storing a first instruction cache memory address and the program instruction in an associative memory pipeline coupled between a data cache and an instruction cache, wherein a first level cache comprises the data cache, the instruction cache, and the associative memory pipeline; receiving a fetch request specifying a second instruction cache memory address; in response to receiving the fetch request, determining if the second instruction cache memory address matches the first instruction cache memory address; and in response to determining that the second instruction cache memory address matches the first instruction cache memory address, protecting an instruction cache entry associated with the second instruction cache memory address from instruction fetches until the program instruction is written to the instruction cache.