Patent ID: 9748398
Date: 2017-08-29
CPC Classifications: H01L

Claim:
1. A method for manufacturing a thin film transistor, comprising: forming a single layered gate metal layer; forming the single layered gate metal layer into a step-like gate structure by one patterning process; performing a first ion implantation procedure to form a first heavily doped area and a second heavily doped area with the step-like gate structure as a mask, the first heavily doped area being separated apart from the second heavily doped area by a first length; forming a gate electrode with a single height value from the step-like gate structure; and performing a second ion implantation procedure to form a first lightly doped area and a second lightly doped area, the first lightly doped area being separated apart from the second lightly doped area by a second length less than the first length.