Patent ID: 9627368
Date: 2017-04-18
CPC Classifications: H01L

Claim:
1. A method of fabricating a semiconductor device, the method comprising: sequentially forming a seed layer and a copper layer on a top surface of a first semiconductor die that comprises a bond pad and a through silicon via (TSV); forming a first encapsulation unit on the copper layer; exposing the TSV by at least performing chemical mechanical polishing (CMP) on a bottom surface of the first semiconductor die; forming an interposer comprising a redistribution layer connected to the TSV; connecting a second semiconductor die to the redistribution layer of the interposer; forming a second encapsulation unit encapsulating the second semiconductor die; after forming the second encapsulation unit, exposing the copper layer by at least grinding the first encapsulation unit; sequentially etching the copper layer and the seed layer; and bonding a solder ball to the bond pad.