Patent ID: 9710334
Date: 2017-07-18
CPC Classifications: G06F

Claim:
1. A server system, comprising: a first BIOS (Basic Input/Output System) chip; a second BIOS chip; a BMC (Baseboard Management Controller) electrically connected with a multiplexer, the multiplexer being directly electrically connected with the first BIOS chip and the second BIOS chip, the BMC electrically being directly connected with the first BIOS chip and the second BIOS chip; and a platform controller, electrically connected with the BMC; wherein in a preset mode, the platform controller is conductively and indirectly connected with the first BIOS chip through the BMC and the multiplexer so that the server system is activated by the first BIOS chip; upon detecting a failure of a POST (Power-on self-test) initialization of the first BIOS chip, the BMC transmits a control command to the multiplexer so as to make the platform controller conductively connecting with the second BIOS chip through the BMC and the multiplexer so that the server system is activated by the second BIOS chip.