Patent ID: 9594868
Date: 2017-03-14
CPC Classifications: G01R,G06F

Claim:
1. A method for adjusting voltage on an integrated circuit chip, the method comprising: identifying, by one or more computer processors, a location that corresponds to an integrated circuit chip on a wafer, wherein identifying the location that corresponds to an integrated circuit chip on a wafer comprises: wherein identifying, by one or more computer processors, the on-chip variation of the integrated circuit chip comprises: determining, by one or more computer processes, a desired voltage for the integrated circuit chip based upon the identified on-chip variation of the integrated circuit chip; adjusting, by one or more computer processors, the voltages of the integrated circuit chip via a voltage regulated on the integrated circuit chip based on the determined desired voltage, and based on the identified radiation timing bin location; and modifying, by one or more computer processors, the integrated circuit chip design based upon the desired voltage and the adjusted voltage.