Patent ID: 9685958
Date: 2017-06-20
CPC Classifications: G01R,G11C,H01L,H03K

Claim:
1. A locking system for an integrated circuit (IC) chip, the system comprising: an arrangement of at least one antifuse in a signal path of the IC chip, the at least one antifuse being configured to operate in a first state, corresponding to a normally open switch, to inhibit normal operation of the IC chip, the at least one antifuse device configured to transition from the first state to a permanent second state, corresponding to a closed switch, in response to a program signal applied to at least one terminal of the IC chip to enable the normal operation of the IC chip; a program device configured to selectively apply at least one program signal to a selected subset of terminals of the IC chip to transition the at least one antifuse from the first state to the permanent second state; measurement circuitry to measure impedance across signal paths that include or are electrically influenced by at least one of the plurality of antifuse devices in the IC chip; and authentication logic to determine if the IC chip is recycled based on the impedance measurements or in response to detecting the at least one antifuse has already been programmed to the permanent second state.