Patent ID: 9570305
Date: 2017-02-14
CPC Classifications: H01L

Claim:
1. A method of manufacturing a semiconductor device, the method comprising: forming a first patterned mask layer, the first patterned mask layer having a first opening and a second opening, the first opening having a first longitudinal axis and the second opening having a second longitudinal axis, the first opening and the second opening are aligned along a same longitudinal axis in a plan view, the first opening and the second opening having projections extending toward one another in the plan view, a first end of the first opening having a first center region and first side regions on opposing sides of the first center region, the first side regions extending away from the first center region and extending toward the second opening in the plan view; performing an enlargement process to reduce a distance the first side regions extend from the first center region, thereby forming an enlarged pattern; and after the performing the enlargement process, transferring the enlarged pattern to an underlying layer, thereby forming openings in the underlying layer.