Patent ID: 9564881
Date: 2017-02-07
CPC Classifications: H03K

Claim:
1. A pulse generator, comprising: a latch module configured to store a first state or a second state, the latch module having a first latch-module input, a second latch-module input, and a latch-module output, the first latch-module input being coupled to a clock; a pulse clock module configured to generate a clock pulse, the pulse clock module having a first pulse-clock-module input, a second pulse-clock-module input, and a pulse-clock-module output, the first pulse-clock-module input being coupled to the clock, the second pulse-clock-module input being coupled to the latch-module output; and a delay module configured to delay the clock pulse at the second latch-module input, the delay module having a delay module input and a delay module output, the delay module being coupled between the latch-module output and the second pulse-clock-module input or between the pulse-clock-module output and the second latch-module input, wherein the delay module is configured to provide functionally