Patent ID: 9735092
Date: 2017-08-15
CPC Classifications: H01L

Claim:
1. A manufacturing method of a chip package structure, comprising: providing a substrate, the substrate comprising a first metal layer, a second metal layer, and an insulation layer located between the first metal layer and the second metal layer; forming a first groove in the first metal layer to form a first patterned metal layer, wherein the first patterned metal layer comprises a chip pad and a plurality of bonding pads, the first groove exists between each of the bonding pads and the chip pad, the chip pad comprises a first main body, a plurality of first extensions and a plurality of first recesses located at a periphery of the chip pad, and the bonding pads are respectively located in the first recesses, the first extensions extend in a direction away from the first main body, such that the first extensions and the first main body collectively define the first recesses, each of the first extensions respectively extends between every two adjacent bonding pads, and at least one edge of each of the first extensions is aligned to at least one edge of the adjacent bonding pads; forming a second groove in the second metal layer to form a second patterned metal layer, wherein the second patterned metal layer comprises a heat dissipation block and a plurality of terminal pads, the second groove exists between each of the terminal pads and the heat dissipation block, the heat dissipation block comprises a plurality of second recesses located at a periphery of the heat dissipation block, the terminal pads are respectively located in the second recesses, and the heat dissipation block is thermally coupled to the chip pad; forming a plurality of conductive vias, the conductive vias respectively penetrating the bonding pads and the insulation layer and being connected to the corresponding terminal pads so as to electrically connect the bonding pads with the terminal pads; disposing a chip on the first main body of the chip pad and electrically connecting the chip to the bonding pads; and forming an encapsulant, the encapsulant covering the first patterned metal layer and the chip.