Patent ID: 9721805
Date: 2017-08-01
CPC Classifications: H01L

Claim:
1. A method for forming a semiconductor device structure, comprising: forming a first fin structure and a second fin structure over a semiconductor substrate, wherein each of the first fin structure and the second fin structure has an upper portion and a lower portion; forming a phosphosilicate glass (PSG) layer surrounding the upper portion and the lower portion of the first fin structure; doping the PSG layer to form a doped PSG layer; forming a borosilicate glass (BSG) layer surrounding the upper portion and the lower portion of the second fin structure, wherein the BSG layer extends over the doped PSG layer; forming an isolation layer over the BSG layer; and partially etching the isolation layer, the BSG layer and the doped PSG layer to expose the upper portion of the first fin structure and the upper portion of the second fin structure.