Patent ID: 9748191
Date: 2017-08-29
CPC Classifications: G02F,H01L

Claim:
1. A semiconductor device comprising: a semiconductor substrate having a first side extending along a first direction, a second side extending along the first direction and being opposite to the first side, a third side extending along a second direction perpendicular to the first direction, and a fourth side extending along the second direction and being opposite to the third side; a multilayer wiring structure formed over the semiconductor substrate; a first pad electrode, a second pad electrode and dummy patterns formed in an uppermost layer of the multilayer wiring structure; a first insulating film formed over the first pad electrode, the second pad electrode and the dummy patterns; a first opening and a second opening formed in the first insulating film and located over the first pad electrode and the second pad electrode, respectively; and a first bump electrode and a second bump electrode formed over the first insulating film and electrically connected to the first pad electrode and the second pad electrode through the first opening and the second opening, respectively, wherein the first pad electrode and the second pad electrode are located near the first side, at substantially a same distance from the first side, and are spaced along the first direction in a plan view, and wherein, in the first direction, at least one of the dummy patterns is located between the first pad electrode and the second pad electrode in the plan view.