Patent ID: 9594611
Date: 2017-03-14
CPC Classifications: G06F,G11C

Claim:
1. An information processing device comprising: a semiconductor memory device including: a host device configured to transmit a read command and write command to the semiconductor memory device, wherein each of the nonvolatile semiconductor memory and the volatile semiconductor memory is configured to store first information for specifying a physical address of the nonvolatile semiconductor memory corresponding to logical address information received from the host device via the host interface, when receiving the write command from the host device via the host interface, the controller is configured to generate a correction code by using data received from the host device and to store the data and the correction code in the nonvolatile semiconductor memory, and when receiving the read command from the host device via the host interface, based on data and a corresponding correction code read from the nonvolatile semiconductor memory using the first information, the controller is configured to correct the read data, the nonvolatile semiconductor memory is configured to further store: the host device is configured to display, on a display device connected to the host device, first status information of the nonvolatile semiconductor memory based on the second information or the third information, second status information of the nonvolatile semiconductor memory based on the fourth information or the fifth information, and third status information of the nonvolatile semiconductor memory based on the seventh information, and the semiconductor memory device is configured to erase, in the first unit, data stored in a corresponding physical address based on a command and logical address information received from the host device, and to change the sixth information.