Patent ID: 9741727
Date: 2017-08-22
CPC Classifications: H01L

Claim:
1. A U-shaped channel semiconductor memory, comprising: a semiconductor substrate of a first doping type provided with a U-shaped channel region; a source region and a drain region both of a second doping type provided in the semiconductor substrate, the U-shaped channel region being provided between the source region and the drain region; a first layer of insulating film disposed on the U-shaped channel region, the first layer of insulating film extending to a horizontal surface of the drain region; a floating gate opening region provided in the first layer of insulating film, the floating gate opening region being located on a side wall of the drain region on a top of the U-shaped channel region; a floating gate of the first doping type covering the first layer of insulating film and the floating gate opening region; and a p-n junction diode between the floating gate and the drain region; wherein the U-shaped channel semiconductor memory further comprises: a control gate covering the second layer of insulating film, the control gate, the second layer of insulating film, and the p-n junction diode forming a gated diode which uses the control gate as a gate; and a notch of the floating gate provided between a top of the floating gate and the source region, the notch has a groove structure with asymmetrical position in the floating gate, wherein a side wall of the groove is in direct contact with the source region and an opposite side wall of the groove is in direct contact with the floating gate, a bottom of the control gate is formed in the groove, and a second layer of insulating film covering a side wall of the source region on the top of the U-shaped channel region and the floating gate, the second layer of insulating film extending towards both sides of the U-shaped channel region to the source region and the p-n junction diode.