Patent ID: 9678555
Date: 2017-06-13
CPC Classifications: G06F,Y02D

Claim:
1. A voltage regulator (VR) system, comprising: at least one integrated power stage (IPstage) comprising a power output, current sense circuitry configured to sense output current from the at least one IPstage, and an IPstage identification (ID) recognition module having a power device identification signal output that is indicative of the identity of the at least one IPstage; at least one processing device configured as a VR system controller coupled to control operation of the at least one IPstage, the at least one processing device also being coupled to receive a current sense output signal from the IPstage current sense circuitry and to receive the power device identification signal output from the at least one IPstage; and non-volatile memory (NVM) coupled to the VR system controller, the memory storing different IPstage operating parameter values corresponding to multiple different types of IPstages that include the at least one IPstage; where the at least one processing device is configured to: