Patent ID: 9727503
Date: 2017-08-08
CPC Classifications: G06F,H04L,Y02D

Claim:
1. A host computer for accessing a data storage system, comprising: a host memory; a host central processing unit (CPU); a peripheral component interface bus connecting the host CPU to peripheral components; and a host network interface controller (NIC) configured to expose both a storage interface and a network communication interface to the peripheral component interface bus, and is configured to receive, through the storage interface, from processes running on the CPU of the host computer, commands in accordance with a protocol defined for accessing local storage devices connected to the peripheral component interface bus, and upon receiving a storage access command in accordance with the protocol defined for accessing local storage devices, to initiate a remote direct memory access (RDMA) operation instructing a storage server, via the network, to execute a storage transaction specified by the command in accordance with the protocol defined for accessing local storage devices, wherein the protocol is an NVM Express protocol, and the storage server comprises a solid-state drive (SSD), wherein the storage server is configured, after committing the storage transaction, to cause a server NIC of the storage server to transmit a completion notification via the network to a completion queue in the host memory, wherein the server NIC is configured to detect a completion entry posted by a controller of the storage server, and to transmit the completion notification, in response to the detected completion entry, via the network to the host NIC, and wherein each of the storage interface and the network communication interface occupies a corresponding address range on the peripheral component interface bus, and wherein the corresponding address ranges of the storage interface and the network communication interface do not include a common range.