Patent ID: 9653444
Date: 2017-05-16
CPC Classifications: H01L

Claim:
1. A method of manufacturing a microelectronic device, the method comprising: stacking a first die package having a first dielectric casing and a first bottom side on a top side of a second die package having a second dielectric casing, wherein the first dielectric casing defines at least a portion of the first bottom side, and wherein the second dielectric casing defines at least a portion of the top side; aligning first metal leads coupled to the first bottom side of the first die package with second metal leads coupled to the second bottom side of the second die package; forming individual external inter-package connectors attached to a first portion of individual first leads and to a second portion of individual second leads that are spaced apart from a lateral side of the second casing and project towards the first package; and coupling package bond pads of the second die package to metal bump pads associated with an interposer substrate.