Patent ID: 9536584
Date: 2017-01-03
CPC Classifications: G11C,H03K

Claim:
1. A nonvolatile logic gate device characterized by comprising: a resistive network of a memory structure comprising at least three nonvolatile resistive elements which are combined with each other and which exhibit a first combined resistance value in a low-resistance state and a second combined resistance value in a high-resistance state; a reference resistive network comprising a same number of nonvolatile resistive elements as the resistive network of the memory structure and a reference resistance value between the first combined resistance value and the second combined resistance value; a writing part configured to selectively put the resistive network into the low-resistance state or the high-resistance state by selectively writing the first combined resistance value and the second combined resistance value into the resistive network; and a logic circuit structure configured to determine a resistance value of the resistive network to selectively sat the resistive network into the low-resistance state or the high-resistance state by comparing each of the first combined resistance value and the second combined resistance value with the reference resistance value.