Patent ID: 9748480
Date: 2017-08-29
CPC Classifications: H01L

Claim:
1. A semiconductor construction, comprising: conductive interconnects having upper surfaces; conductive structures over the conductive interconnects; the conductive structures being paired with the conductive interconnects to form structure/interconnect configurations; the conductive structures having horizontal first portions joining to non-horizontal second portions at corners of about 90°; the horizontal first portions comprising regions along upper surfaces of the conductive interconnects; the non-horizontal second portions having upper edges above the horizontal first portions; and at least one of the structure/interconnect configurations comprising the upper edge of the non-horizontal second portion laterally offset relative to the upper surface of the conductive interconnect so that the upper edge of the non-horizontal second portion of said at least one structure/interconnect configuration is not directly over the upper surface of the conductive interconnect of said at least one structure/interconnect configuration.