Patent ID: 9553097
Date: 2017-01-24
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a semiconductor substrate; a first transistor comprising: a first source electrode positioned in the semiconductor substrate, a first drain electrode positioned in the semiconductor substrate, a first source connecting terminal formed of a first material and electrically connected to the first source electrode, a first drain connecting terminal formed of the first material and electrically connected to the first drain electrode, a first gate electrode overlapping a portion of the semiconductor substrate that is positioned between the first source electrode and the first drain electrode, and a first gate dielectric layer positioned between the first gate electrode and the semiconductor substrate; and a second transistor comprising: a doped region positioned in the semiconductor substrate, a second source electrode positioned in the semiconductor substrate, a second drain electrode positioned in the semiconductor substrate, a control gate electrode formed of the first material and overlapping a part of the semiconductor substrate that is positioned between the second source electrode and the second drain electrode, a second gate dielectric layer positioned between the control gate electrode and the semiconductor substrate and directly contacting the control gate electrode, a floating gate electrode having a first portion extending through an opening of the second gate dielectric layer to contact the doped region and having a second portion positioned between the control gate electrode and the second gate dielectric layer, and an insulating member positioned between the control gate electrode and the floating gate electrode.