Patent ID: 9553446
Date: 2017-01-24
CPC Classifications: H02H

Claim:
1. An integrated circuit comprising: an ESD clamp circuit; a first bus coupled to a first current electrode of the ESD clamp circuit; a first diode coupled between the first bus and the first current electrode; a second bus coupled to the first current electrode of the ESD clamp circuit; a second diode coupled between the second bus and the first current electrode; a first plurality of terminals, each terminal of the first plurality coupled to the first bus; a second plurality of terminals, each terminal of the second plurality coupled to the second bus; and a trigger circuit including a first input coupled to a first node to sense an ESD event occurring on at least one terminal of the first plurality of terminals, a second input coupled to a second node to sense an ESD event occurring on at least one terminal of the second plurality of terminals, and an output coupled to a control electrode of the ESD clamp circuit for making the ESD clamp circuit conductive in response to a sensed ESD event on at least one terminal of the first plurality of terminals to discharge current from the sensed ESD event on the first bus through the first diode and for making the ESD clamp circuit conductive in response to a sensed ESD event on at least one terminal of the second plurality of terminals to discharge current from the sensed ESD event on the second bus through the second diode.