Patent ID: 9741788
Date: 2017-08-22
CPC Classifications: H01L

Claim:
1. A method for fabricating a semiconductor device, comprising the steps of: forming a first impurity region of a first conductivity type in a main surface of a substrate; forming a RESURF (Reduced Surface Field) layer of a second conductivity type at said main surface in said first impurity region; forming a second impurity region in contact with said RESURF layer and arranged at said main surface in said first impurity region, said second impurity region being of the second conductivity type and having an impurity concentration higher than an impurity concentration of said RESURF layer; and forming a plurality of field plates including (i) a plurality of lower field plates and (ii) an upper field plate located at a position farther from said substrate than said plurality of lower field plates in a whole area, at least one of said plurality of lower field plates being electrically connected to said first impurity region, at least another one of said plurality of lower field plates being electrically connected to said second impurity region, and said plurality of lower field plates being capable of generating a lower capacitive coupling with said substrate, said upper field plate being capable of generating an upper capacitive coupling with said plurality of lower field plates, said upper capacitive coupling having a capacitance greater than the capacitance of said lower capacitive coupling.