Patent ID: 9735153
Date: 2017-08-15
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a first fin structure disposed on a substrate, the first fin structure extending in a first direction; a first sacrificial layer pattern disposed on an upper surface of the first fin structure, the first sacrificial layer pattern including a left portion and a right portion arranged in the first direction, wherein the left portion and the right portion are separated from each other; a dielectric layer pattern disposed on the upper surface of the first fin structure and interposed between the left portion and the right portion of the first sacrificial layer pattern; a first active layer pattern disposed on the first sacrificial layer pattern and the dielectric layer pattern, the first active layer pattern extending in the first direction, wherein the first active layer pattern is in contact with the first sacrificial layer pattern and the dielectric layer pattern; and a first gate electrode structure disposed on a portion of the first active layer pattern disposed on the dielectric layer pattern, the first gate electrode structure extending in a second direction crossing the first direction and the portion of the first active layer pattern being interposed between the dielectric layer pattern and the first gate electrode structure, wherein the first fin structure protrudes in a third direction from the substrate, and wherein the third direction is substantially perpendicular to the first and second directions.