Patent ID: 9639651
Date: 2017-05-02
CPC Classifications: G06F

Claim:
1. A routing method for an integrated circuit, comprising: determining a signal path between a signal source and a corresponding receiving terminal according to a routing structure of a system power/ground mesh; placing at least one buffer along the signal path for buffering a signal generated by the signal source; disposing a deep well region corresponding to the at least one buffer in a substrate of the integrated circuit; determining a routing structure of an independent power/ground mesh that is independent from the system power/ground mesh according to the signal path; and performing a routing process according to the determined routing structure of the independent power/ground mesh and the signal path; wherein the system power/ground mesh and the independent power/ground mesh are respectively coupled to different voltage sources; and at least one portion of the routing structure of the independent power/ground mesh is aligned with the signal path.