Patent ID: 9535326
Date: 2017-01-03
CPC Classifications: G03F,H01L

Claim:
1. A method of manufacturing a semiconductor device, the method comprising: forming a neutral layer on an anti-reflective coating layer, the neutral layer having a photosensitive property and a reflow property; performing an exposure process and a development process on the neutral layer to form a preliminary neutral pattern having a first opening, wherein the first opening exposes the anti-reflective coating layer and has a first width; heating the preliminary neutral pattern to form a neutral pattern having a second opening, wherein the second opening exposes the anti-reflective coating layer and has a second width; forming a block copolymer layer on the neutral pattern; and heating the block copolymer layer to form a block copolymer pattern comprising: a first pattern disposed in the second opening of the neutral pattern; and a second pattern disposed on the neutral pattern and chemically bonded to the first pattern; wherein the second width is less than the first width.