Patent ID: 9535439
Date: 2017-01-03
CPC Classifications: G05F

Claim:
1. A low drop out linear voltage regulator circuit comprising: (a) a power lead and a ground lead; (b) a source follower circuit having a source lead and a drain lead; (c) an output stage having a regulated output lead; (d) first and second pass transistors connected in series between the power lead and the ground lead, the regulated output lead and the source lead of the source follower circuit being connected between the pass transistors, each pass transistor having a gate, a source, and a drain, and the gate of the second pass transistor being connected to the drain lead of the source follower circuit; (e) a control transistor and a reference transistor coupled in series between the power lead and the gate of the second pass transistor, the control transistor and the reference transistor each having a gate, a source, and a drain; (f) a sense transistor having a source and a drain connected in series with a current source between the power lead and the ground lead, a gate of the sense transistor being connected with the gate of the first pass transistor, and the gate of the control transistor being connected between the sense transistor and the current source; and (g) a capacitor connected in parallel with the current source.