Patent ID: 9640130
Date: 2017-05-02
CPC Classifications: G06F,G09G

Claim:
1. A display driver connectable with a display panel having a plurality of source lines wired to run in an up-and-down direction and a plurality of gate lines wired to run in left and right directions when viewed from a direction perpendicular to a substrate, and a plurality of pixels respectively arranged at intersections where the source and gate lines intersect with one another, in which electric charges corresponding to display data are transmitted from the source lines to the pixels selected by the driven gate line, the display driver comprising: an output-amplitude-adjustment circuit capable of adjusting, in output amplitude, a group of first gate drive circuits operable to drive, of the plurality of gate lines, a group of first gate lines wired from the left, and a group of second gate drive circuits operable to drive a group of second gate lines wired from the right, wherein the output-amplitude-adjustment circuit adjusts said first and second gate line groups independently of one another, and wherein the output-amplitude-adjustment circuit comprises a first register which determines a first maximum amplitude among amplitudes driven by the first gate drive circuits, and a second register which determines a second maximum amplitude among amplitudes driven by the second gate drive circuits, so as to decrease differences between first maximum amplitudes on the first gate lines which are controlled by setting a first value in the first register, and second maximum amplitudes on the second gate lines which are controlled by setting a second value in the second register.