Patent ID: 9712154
Date: 2017-07-18
CPC Classifications: G05F,H03K

Claim:
1. An integrated circuit comprising: a beta-multiplier voltage generator initialized in response to a first power on reset signal, and suitable for generating a first reference voltage on a first output node using an external voltage; a band-gap voltage generator initialized in response to the first power on reset signal, and suitable for generating a second reference voltage on a second output node using the external voltage; a low drop out regulator voltage generator initialized in response to the first power on reset signal, and suitable for generating an internal voltage on a third output node using any one of the first reference voltage and the second reference voltage, and the external voltage; and a first to a third pull-down driving units suitable for respectively pull-down driving the first to third output nodes in responses to a second power on reset signal delayed from the first power on reset signal.