Patent ID: 9748478
Date: 2017-08-29
CPC Classifications: H01L

Claim:
1. A method of manufacturing a memory device comprising the steps of: forming an insulation layer on a lower electrode layer and opening a hole in the insulation layer reaching the lower electrode layer: forming, on top surfaces of the insulation layer and surfaces of the hole, a nitride film or an oxide film of a metal element selected from Ti, Ta, Ru, Mn, Al, Co, or W, or an alloy of any of these metal elements, and which is thinner than a depth of the hole; removing the nitride film or oxide film in a lower portion of the hole and exposing the lower electrode layer via the hole while leaving some of the nitride film or oxide film at least on sidewalls of the hole: forming a first film that comes into contact with the lower electrode layer and with the nitride film or the oxide film and that is thinner than the depth of the hole; forming, on the first film, a second film part of which is buried in the hole and which contains at least an element selected from Cu, Ag, Zn, Al, or-and-Zr, and at least one element selected from Te, S, or-and-Se; planarizing a surface to remove portions of the nitride film or oxide film, the first film, and the second film, which are located on the insulation layer, with remainder portions of the nitride film or oxide film, the first film, and the second film in the hole being made to remain and forming a diffusion preventing barrier film that is made from the remainder portion of the nitride film or oxide film, a memory layer made from the remainder portion of the first film, and an ion source layer made from the remainder of the second film, and forming an upper electrode layer on the ion source layer.