Patent ID: 9666549
Date: 2017-05-30
CPC Classifications: H01L

Claim:
1. A method of forming a microelectronic package, comprising: forming a first circuit substrate including forming a first circuit on a first substrate, the first circuit exposed along an upper surface of the first substrate, wherein the first substrate is configured for coupling the first circuit with an integrated circuit above an upper surface of the first circuit substrate; forming a mold onto an upper surface of the first circuit substrate over and on the first circuit of the first circuit substrate; defining an opening in the mold, the opening extending from a top surface of the mold to at least a portion of the first circuit to expose the portion of the first circuit; situating a first solder in the opening, including conforming the first solder to the opening and the portion of the first circuit; extending a height of the first solder in the opening to create an extended first solder; situating the integrated circuit on the mold and aligning a second solder on the integrated circuit with the opening in the mold; reflowing the extended first solder and the second solder to form an electrical connection between the extended first solder and the second solder; wherein situating the first solder in the opening includes at least one of printing the first solder into the opening and melting at least one first solder ball into the opening; and wherein extending the height of the first solder includes at least one of printing a second solder into the opening and onto the first solder and melting at least one second solder ball into the opening and onto the first solder.