Patent ID: 9711478
Date: 2017-07-18
CPC Classifications: H01L

Claim:
1. A semiconductor device with an anti-pad peeling structure, comprising: a semiconductor substrate comprising a Through Substrate Via (TSV) including a conductive portion; a dielectric layer on the semiconductor substrate and comprising a plurality of recesses therein; and a pad above the semiconductor substrate to cover a portion of the dielectric layer and extend to the recesses, wherein from a top-down perspective the pad fully covers the TSV, and a distance between an edge of the pad and the outermost edge of the recesses is greater than a specified length; wherein a plural portion of the plurality of the recesses has planar boundaries that partially overlap that of the conductive portion of the TSV; and for the recesses that partially overlap the conductive portion of the TSV, an overlap ratio is less than a specified ratio of an area of the recess.