Patent ID: 9735184
Date: 2017-08-15
CPC Classifications: G06F,H01L

Claim:
1. A forming method for an array substrate, comprising: providing a substrate; forming a plurality of scanning lines and a plurality of first data lines on the substrate, wherein the plurality of scanning lines are insulated from and cross the plurality of first data lines, and wherein the plurality of first data lines are arranged in a same layer with the plurality of scanning lines; forming a first insulating layer on the plurality of first data lines and the plurality of scanning lines; forming a plurality of first via holes in the first insulating layer; forming a plurality of second data lines on the first insulating layer, wherein the plurality of second data lines are electrically connected to the plurality of first data lines via the first plurality of via holes; and forming a plurality of first signal lines, wherein the plurality of first signal lines are insulated from the plurality of second data lines, and wherein the plurality of first signal lines are in a same layer with the plurality of second data lines.