Patent ID: 9536826
Date: 2017-01-03
CPC Classifications: H01L

Claim:
1. A semiconductor device structure, comprising: a first metal layer formed over a substrate; and an interconnect structure formed over the first metal layer, wherein the interconnect structure comprises an upper portion, a middle portion and a lower portion, the middle portion is connected between the upper portion and the lower portion, the upper portion and the lower portion each have a constant width, and the middle portion has a tapered width which is tapered from the upper portion to the lower portion, wherein the interconnect structure comprises an adhesion layer and a second metal layer formed on the adhesion layer, the adhesion layer is a discontinuous layer and comprises a first portion and a second portion below the first portion, and the first portion has an extended bottom portion protruding in a horizontal direction from a curved sidewall of the second metal layer in the middle portion of the interconnect structure.