Patent ID: 9559825
Date: 2017-01-31
CPC Classifications: H04B,H04J,H04L,H04W

Claim:
1. An integrated circuit for controlling a process, the process comprising: decoding a downlink control channel, which is transmitted on one or more control channel element(s) (CCE(s)) with consecutive CCE number(s) from a base station, in a search space that is comprised of a plurality of CCEs; and transmitting a response signal to the base station on a uplink control channel, an index of which is associated with a CCE number of the CCE, on which the downlink control channel is transmitted, wherein: the search space is comprised of the plurality of CCEs corresponding to a plurality of downlink control channel candidates to be attempted to be decoded; and the search space for each aggregation size corresponding to a number of the CCE(s), on which the downlink control channel is transmitted, is comprised of the plurality of CCEs that are defined by starting on a CCE with a CCE number, which depends on both a total number of CCEs in a subframe and the aggregation size, and at least part of the search space for the each aggregation size is comprised of CCEs with consecutive CCE numbers.