Patent ID: 9711610
Date: 2017-07-18
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: an oxide semiconductor layer including a channel formation region; a source electrode and a drain electrode over and in contact with the oxide semiconductor layer; a first insulating layer over the source electrode, the drain electrode and the oxide semiconductor layer; a gate electrode over the first insulating layer; and a second insulating layer over the gate electrode, wherein the gate electrode is able to reduce a concentration of hydrogen in the channel formation region, wherein the gate electrode is stacked layers, and one of the stacked layers includes at least one selected from an alloy of titanium and cobalt, an alloy of titanium and manganese, and an alloy of titanium and iron, wherein the source electrode and the drain electrode are each stacked layers, and one of the stacked layers is a material layer which is able to reduce the concentration of hydrogen in the channel formation region, wherein the concentration of hydrogen in the channel formation region is lower than 5×10 wherein part of the oxide semiconductor layer which is in contact with the source electrode or the drain electrode has a higher concentration of hydrogen than the channel formation region.