Patent ID: 9576921
Date: 2017-02-21
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a semiconductor substrate; a plurality of wiring layers formed over the semiconductor substrate; a pad electrode being part of an uppermost wiring layer among the plurality of wiring layers; an insulating film formed over the uppermost wiring layer and having a first opening above the pad electrode; a rewiring electrically connected to the pad electrode and extending over the insulating film; a protective film covering an upper surface of the rewiring and the insulating film, and having a second opening exposing part of the upper surface of the rewiring; an external pad electrode electrically connected to the rewiring through the second opening and extending over the protective film; and a wire connected to the external pad electrode, wherein, in a plan view, part of the external pad electrode is located in a region outside the rewiring.