Patent ID: 9576889
Date: 2017-02-21
CPC Classifications: H01L

Claim:
1. A method for fabricating an electronic package, the method comprising: forming a first intermediate layer on a first substrate such that the first intermediate layer covers a contact pad disposed on the first substrate, the first intermediate layer comprising an electrically insulating material having a first viscosity; forming an opening through the first intermediate layer to expose the contact pad; forming an un-patterned second intermediate layer on the first intermediate layer, the second intermediate layer comprising an adhesive having a second viscosity less than the first viscosity, wherein a region of the second intermediate layer obstructs the contact pad; removing the region to re-expose the contact pad through the opening; aligning a second substrate with the first substrate such that a via of the second substrate is aligned with the opening; after forming the first intermediate layer on the first substrate and after forming the second intermediate layer on the first intermediate layer, bonding the first substrate and the second substrate together by bringing the second substrate into contact with the second intermediate layer and applying a force to at least one of the first substrate and the second substrate while heating the second intermediate layer; and forming an interconnect in contact with the contact pad by depositing an electrically conductive material through the via and the opening.