Patent ID: 9684746
Date: 2017-06-20
CPC Classifications: G06F

Claim:
1. A computer-implemented method for reconstructing at least one output signal associated to a sequential logic circuitry block of a circuit, at least one input signal being associated to the circuitry block, the method comprising: simulating, through a computer, a value of the at least one output signal depending on the at least one input signal; determining, through the computer, a transfer function for computing the value of the at least one output signal directly after a simulation timestamp depending on at least one of the at least one input signal and on the value of the at least one output signal directly before the simulation timestamp; computing, by the computer, the value of the at least one output signal directly after the simulation timestamp as a function value of the transfer function if a predefined reconstruction condition is fulfilled; and storing, by the computer, the simulated value of the at least one output signal directly after the simulation timestamp into a file if the reconstruction condition is not fulfilled.