Patent ID: 9553040
Date: 2017-01-24
CPC Classifications: H01L

Claim:
1. A semiconductor package, comprising: a substrate having a die attach surface; a conductive trace disposed on the substrate, wherein the conductive trace is elongated and carries a signal or a ground across at least a portion of the substrate; a conductive structure disposed on the conductive trace at an intermediate portion thereof; and a die mounted on the die attach surface of the substrate via a conductive pillar bump, the conductive pillar bump being rounded and elongated such that the conductive pillar bump extends along a length of the conductive trace and contacts the conductive trace at an end thereof; wherein the die comprises a metal pad electrically coupling to the conductive pillar bump, wherein the metal pad has a first edge and a second edge substantially vertical to the first edge, wherein a length of the first edge is different from that of the second edge from a plan view, and wherein the first edge is not adjacent to the second edge.