Patent ID: 9714911
Date: 2017-07-25
CPC Classifications: G01N,H01L,H05K,Y10T

Claim:
1. An assembly for testing thermal interfaces, comprising: a printed circuit board; a plurality of electronic components mounted to and operatively associated with the printed circuit board; a heat spreader positioned for absorbing heat generated by the electronic components; a gap between the plurality of electronic components and the heat spreader; a first electrode associated with the heat spreader; a plurality of second electrodes associated, respectively, with the plurality of electronic components; a plurality of tapes associated, respectively, with each of the electronic components, each tape including a first layer of electrically conductive tape within the gap and above one of the plurality of electronic components, a second layer of electrically conductive tape within the gap and between the first layer of electrically conductive tape and the heat spreader, and a dielectric layer between and electrically isolating the first layer of electrically conductive tape and the second layer of electrically conductive tape, each of the second layers of electrically conductive tape comprising one of the plurality of second electrodes, each first layer of electrically conductive tape configured for blocking capacitive coupling from one of the plurality of electronic components; and a device for monitoring electrical capacitances between the first and second electrodes.