Patent ID: 9667841
Date: 2017-05-30
CPC Classifications: G06T,H04N

Claim:
1. An apparatus comprising: a memory configured to store a program; and a processor configured to execute the program stored in the memory, wherein the processor: (A) reduces, by a factor of 2 to 1, each of (a) a reference image, having a plurality of pixels with each pixel having a pixel signal value, to a reduced reference image and (b) a comparative image, having a plurality of pixels with each pixel having a pixel signal value, to a reduced comparative image, the reducing being performed by setting a pixel signal value for each pixel in (i) the reduced reference image and (ii) the reduced comparative image using the pixel signal values for a group of four pixels in each of the reference image and in the comparative image, respectively, (B) extracts, from the reduced reference image, a first feature point corresponding to an edge in the reduced reference image, (C) specifies (a) a first point in the reduced comparative image that corresponds to the first feature point extracted from the reduced reference image using a first filter with a 3×3 pixel size to produce corresponding point, (b) a second feature point in the reference image based on a position of the first feature point in the reduced reference image, and (c) a second corresponding point in the comparative image that corresponds to the second feature point in the reference image using a second filter with a 5×5 pixel size, the second feature point corresponding to the first feature point, and the second corresponding point corresponding to the first corresponding point, respectively, and (D) calculates a motion vector between the reference image and the comparative image using a difference between the second feature point and the second corresponding point.