Patent ID: 9735151
Date: 2017-08-15
CPC Classifications: H01L

Claim:
1. A memory device, comprising: a plurality of layers, wherein the plurality of layers comprises: a plurality of first trenches, wherein the plurality of first trenches extends through the plurality of layers, wherein each of the plurality of first trenches is filled with a first dielectric material, and wherein the second portion is disposed in each of the plurality of first trenches, the second portion having rounded edges and a top surface that is coplanar with a top surface of the first portion and a bottom surface that is coplanar with a bottom surface of the first portion; and a plurality of second trenches, wherein the plurality of second trenches extends through the selector layer, the memory element layer, and the second metal layer, wherein each of the plurality of second trenches is filled with a second dielectric material, and wherein the plurality of second trenches runs orthogonal the plurality of first trenches.