Patent ID: 9645949
Date: 2017-05-09
CPC Classifications: G06F,Y02D

Claim:
1. A data processing apparatus comprising: a processor configured to operate under control of an executable comprising instructions, and in any of a plurality of operating modes including a non-privileged mode and a plurality of privileged modes including a trusted mode; an associated memory for storing a plurality of stacks; a first stack pointer register for storing a pointer to an address in a first of said plurality of stacks; and a second stack pointer register for storing a pointer to an address in a second of said plurality of stacks, wherein said data processing apparatus is configured to use said second stack pointer register both when said processor is operating in the non-privileged mode and when said processor is operating in the trusted mode; said data processing apparatus is configured to use said first stack pointer register when said processor is operating in any other privileged mode other than said trusted mode; and the processor and the associated memory transfer operation of said processor from the non-privileged mode to the trusted mode in response to an event, whilst maintaining use of the second stack pointer register instead of switching to the first stack pointer register.