Patent ID: 9641436
Date: 2017-05-02
CPC Classifications: H04L

Claim:
1. An integrated circuit comprising: an input port through which an incoming packet is received onto the integrated circuit; a first Characterize/Classify/Table Lookup and Mux Circuit (CCTC) comprising: a second CCTC comprising: an exact-match flow table structure coupled to receive the Flow ID that is output by the second TLMC, wherein the exact-match flow table structure maintains an exact-match flow table, wherein the exact-match flow table comprises a plurality of flow entries, wherein each flow entry comprises a Flow ID and an action value, and wherein the exact-match flow table structure determines, for each Flow ID received from the multiplexer circuit of the second TLMC, whether the Flow ID is an exact bit-by-bit match for any Flow ID of any flow entry stored in the exact-match flow table.