Patent ID: 9583339
Date: 2017-02-28
CPC Classifications: H01L

Claim:
1. A method for forming spacers for a gate of a field effect transistor, the gate being situated above a layer of semiconductor material, comprising: forming a layer of nitride covering the gate; modifying the layer of nitride by plasma implantation of light ions, having an atomic number equal or less than 10, in the layer of nitride in order to form a modified layer of nitride, the modifying being performed so as not to modify the layer of nitride over its entire thickness at flanks of the gate; and removing the modified layer of nitride by a selective wet etching, or a selective dry etching, of the modified layer of nitride relative to said layer of semiconductor material and relative to the non-modified layer of nitride at the flanks of the gate, without etching the layer of semiconductor material, wherein an entire length of the non-modified layer of nitride at the flanks of the gate remains after the selective wet etching, or after the selective dry etching.