Patent ID: 9697008
Date: 2017-07-04
CPC Classifications: G06F

Claim:
1. A method of hiding at least one logical processor in a computer having a plurality of logical processors, comprising: initializing the plurality of logical processors by executing a pre-boot routine in system firmware; identifying at least one logical processor of the plurality of logical processors to be hidden from an operating system (OS) of the computer to provide at least one hidden logical processor and at least one visible logical processor; placing each of the at least one hidden logical processor into a system management mode (SMM) by executing a park routine in the system firmware; booting the OS of the computer to use the at least one visible logical processor; receiving, from the OS, a global system management interrupt (SMI) to be handled by the at least one hidden logical processor placed into SMM and the at least one visible logical processor; and in response to receiving the global SMI, returning the at least one visible logical processor for use by the OS.