Patent ID: 9576930
Date: 2017-02-21
CPC Classifications: H01L

Claim:
1. A semiconductor package, comprising: a wafer carrier having an adhesive layer on an upper surface of the wafer carrier; at least one chip attached to the wafer carrier through the adhesive layer; an insulating barrier layer formed over the at least one chip and exposed regions of the adhesive layer; a thermally conductive layer formed over the insulating barrier layer, the thermally conductive layer at least partially encapsulating the at least one chip, wherein the thermally conductive layer comprises a thermally conductive path which dissipates heat to the ambient environment; and a molding compound formed over the thermally conductive layer, wherein the molding compound has a composition that differs from a composition of the thermally conductive layer, wherein the molding compound directly contacts the insulating barrier layer over the at least one chip.