Patent ID: 9648760
Date: 2017-05-09
CPC Classifications: H01L,H05K

Claim:
1. A substrate structure, comprising: a dielectric layer comprising a first surface and a second surface opposite to the first surface, the first surface having a plurality of recesses; a metal foil disposed on the second surface; a first patterned solder-resist layer filled into each of the recesses, a top surface of the first patterned solder-resist layer being substantially coplanar with the first surface; a patterned metal layer disposed on the first surface and having a plurality of openings at least partially exposing the first patterned solder-resist layer; a release layer disposed between the first patterned solder-resist layer and the dielectric layer and between the patterned metal layer and the dielectric layer; and a second patterned solder-resist layer disposed on the first patterned solder-resist layer and in the openings of the patterned metal layer, and covering a portion of the patterned metal layer.