Patent ID: 9641140
Date: 2017-05-02
CPC Classifications: H01P,H03F,H03H

Claim:
1. A matching network comprising: an input terminal for receiving an input signal; a bias feed microstrip structure having a first bias feed end connected to the input terminal and a second bias feed end coupled to a direct current (DC) voltage source, the bias feed microstrip structure having a bias feed microstrip electrical length less than one fifth of a fundamental wavelength of a fundamental frequency component of the input signal, wherein the bias feed microstrip structure provides a quarter-wave transformer for the harmonic frequency component of the input signal; a harmonic impedance transformation network having a first harmonic impedance transformation network terminal coupled to the input terminal, the harmonic impedance transformation network configured to present, with respect to the input terminal, an optimum impedance for a harmonic frequency component of the input signal; a tuned impedance element coupled to a second harmonic impedance transformation network terminal of the harmonic impedance transformation network, the tuned impedance element presenting a short circuit impedance at the second harmonic impedance transformation network terminal for the harmonic frequency component and presenting a higher impedance for the fundamental frequency component, wherein the harmonic frequency component is a harmonic of the fundamental frequency component; and a fundamental impedance transformation network having a first fundamental impedance transformation network terminal coupled to the second harmonic impedance transformation network terminal and a second fundamental impedance transformation network terminal coupled to a first load terminal of a load, the fundamental impedance transformation network configured to match a fundamental impedance transformation network input impedance for the fundamental frequency component to a load impedance of the load.