Patent ID: 9660665
Date: 2017-05-23
CPC Classifications: H03M

Claim:
1. A delta sigma modulator comprising: a first input port and a second input port, the first input port and the second input port configured to receive a differential input signal; a digital to analog converter (DAC) coupled to the first input port and the second input port, and configured to receive a differential feedback signal and a plurality of selection signals; a loop filter coupled to the first input port and the second input port, and configured to generate a differential filtered signal in response to a differential error signal, the differential error signal is proportional to a difference in the differential input signal and the differential feedback signal; a quantizer coupled to the loop filter and configured to generate a quantized output signal in response to the differential filtered signal; and a modified data weighted averaging (DWA) block coupled between the quantizer and the DAC, the modified DWA block configured to receive a chop clock, a regular clock, the quantized output signal and a plurality of selection index signals, and configured to generate the plurality of selection signals in response to the chop clock, the regular clock, the quantized output signal and the plurality of selection index signals, wherein a selection index signal of the plurality of selection index signals is dependent on previously generated plurality of selection signals.