Patent ID: 9551745
Date: 2017-01-24
CPC Classifications: G01B,G01R,H01L

Claim:
1. A semiconductor device assessment apparatus that electrically assesses a semiconductor device formed on a semiconductor substrate, comprising: a holding unit having a surface to hold a semiconductor substrate thereon; and a detection unit to detect irregularity on said surface of said holding unit, wherein said irregularity includes a variation in a distance between said detection unit and said surface of said holding unit, said holding unit on said surface including a plurality of grooves formed such that when said semiconductor substrate is held on said surface said grooves overlap a periphery of said semiconductor substrate and also have a portion located outer than the periphery of said semiconductor substrate, said grooves, in a region outer to the periphery of said semiconductor substrate, have a step different from a radially outer end of said grooves, a bottom surface of said grooves varies in depth, as measured from said surface of said holding unit, in the region outer to the periphery of said semiconductor substrate, with said semiconductor substrate held on said surface of said holding unit, between a subregion closer to a center of said semiconductor substrate and that farther away from the center of said semiconductor substrate, and said detection unit is configured to detect a distance between the periphery of said semiconductor substrate and a boundary between said subregion closer to the center of said semiconductor substrate and that farther away from the center of said semiconductor substrate.