Patent ID: 9601425
Date: 2017-03-21
CPC Classifications: H01L

Claim:
1. A circuit substrate for a chip bonding thereon, comprising: a core substrate having a chip-side surface and a bump-side surface opposite to the chip-side surface, wherein the first through via plug has a first terminal and a second terminal; a first through via plug passing through the core substrate; a first conductive line pattern and a second conductive line pattern close to the first conductive line disposed on the chip-side surface; and a pad disposed on the bump-side surface, wherein the first through via plug is in direct contact with and partially overlapping the first conductive line pattern and the pad, such that the first terminal of the first through via plug is in direct contact with the first conductive line pattern, and the second terminal of the first through via plug is in direct contact with the pad, and wherein the first conductive line pattern and the second conductive line pattern transmit voltage supplies of the same type by the first through via plug.