Patent ID: 9543425
Date: 2017-01-10
CPC Classifications: H01L

Claim:
1. A method of forming a semiconductor field-effect transistor, the method comprising: forming a multilayer stack on the substrate, wherein the multilayer stack comprises a group III nitride epilayer, a back barrier layer, and a spacer layer; forming a ultra-thin barrier layer on the multilayer stack, wherein the ultra-thin barrier layer has a thickness of about 0.5 nm to about 10 nm; forming a dielectric, discontinuous thin film layer comprising SiO forming a plurality of source electrodes and drain electrodes on the exposed areas of the ultra-thin barrier layer in an alternating pattern such that the dielectric, discontinuous thin film layer is positioned between adjacent source electrodes and drain electrodes; and forming gate electrodes on the dielectric, discontinuous thin film layer.