Patent ID: 9715270
Date: 2017-07-25
CPC Classifications: G06F,H04L,H04W,Y02D

Claim:
1. A method for operating a communications interface having a plurality of parallel lines for communicating data in a first direction from a first digital data device to a second digital data device and a respective receiver synchronization circuit in said second digital data device for receiving data on each line of said plurality of parallel lines, the method comprising: automatically determining to operate said communications interface in a reduced power mode wherein one or more respective components of each receiver synchronization circuit of one or more of said parallel lines are temporarily powered down; temporarily powering down the one or more respective components of each receiver synchronization circuit of the one or more of said parallel lines responsive to the automatic determination, wherein temporarily powering down the one or more respective components of each receiver synchronization circuit of the one or more of said parallel lines causes loss of synchronization of at least one respective component of each receiver synchronization circuit of the one or more of said parallel lines; re-powering the one or more respective components of each receiver synchronization circuit associated with a temporarily powered down line to enable a corresponding line to carry functional data; and responsive to the re-powering the temporarily powered down line, re-synchronizing the respective receiver synchronization circuit associated with the temporarily powered down line by matching a pre-determined data pattern transmitted by a transmitter circuit associated with the temporarily powered down line in the first digital data device with a corresponding pre-determined data pattern generated by the second digital data device.