Patent ID: 9748957
Date: 2017-08-29
CPC Classifications: H03K

Claim:
1. A level shifter circuit configured to receive first and second complementary input signals, each of the first and second complementary input signals having a value of either a first supply voltage or a first reference voltage and the level shifter further including a strong latch circuit operable in response to the first and second complementary input signals to drive one of first and second complementary output signals to a second supply voltage and including a weak latch circuit operable to drive the other of the first and second complementary output signals to a second reference voltage; wherein the strong latch circuit is coupled between a first supply voltage node and first and second complementary output nodes on which the first and second output signals are provided, respectively; wherein the weak latch circuit is coupled between a first reference voltage node and the first and second complementary output nodes; and wherein the level shifter circuit further includes: