Patent ID: 9568520
Date: 2017-02-14
CPC Classifications: G01R

Claim:
1. A frequency detection circuit, comprising: an under-frequency D-type flip-flop with a switchable logic state, a clear input, and a clock input; a one-shot with a trigger input and an output, wherein the one-shot output is connected to the under-frequency D-type flip-flop clear input; a monitoring lead connecting the trigger input of the one-shot and the clock input of the under-frequency D-type flip-flop to switch the logical state of the under-frequency D-type flip-flop based on change in voltage applied to the monitoring lead, wherein the under-frequency D-type flip-flop has a set input, and further including a voltage source terminal connected to the under-frequency D-type flip-flop set input for setting a logic level of a latch, wherein the latch is an under-frequency latch; and an over-frequency D-type flip-flop with a clock input and a set input, wherein the over-frequency D-type flip-flop clock input is connected to the monitoring lead and set input is connected to the voltage source terminal for setting a logical high.