Patent ID: 9692395
Date: 2017-06-27
CPC Classifications: H03K,H03L

Claim:
1. A clock generating apparatus, comprising: an oscillator, for generating a reference clock signal; and a fractional divider, directly or indirectly coupled to the oscillator, for receiving the reference clock signal and outputting a target clock signal, wherein the target clock signal is adjusted according to at least a process related parameter and/or at least a temperature related parameter, wherein the fractional divider is an open-loop circuit, the at least a process related parameter corresponding to process fabrication information, the at least a temperature related parameter corresponding to temperature condition information; wherein the fractional divider includes a phase control circuit having a phase selector and a phase interpolator, wherein the phase selector selects at least two phase shifts from different phase characteristics generated based on the reference clock signal, and the phase interpolator further interpolates the selected phase shifts to generate the target clock signal.