Patent ID: 9667262
Date: 2017-05-30
CPC Classifications: G04F,G06F,H03K,H03L

Claim:
1. A digital control oscillator circuit comprising: a ring oscillator having a plurality of delay elements that delay a pulse signal and are connected in series in a ring shape; a counter circuit that counts the number of circulations of the pulse signal in the ring oscillator; a rough period generation unit that: acquires a period setting value represented as a magnification ratio with respect to a period of a predetermined reference clock; counts the reference clock using an integer part of the magnification ratio as a count value; and generates a rough period timing of each period represented by the integer part; a fraction conversion unit that converts a decimal point part of the magnification ratio into the number of stages of the delay elements passed by the pulse signal, and generates a fraction; and an output processing unit that: