Patent ID: 9583518
Date: 2017-02-28
CPC Classifications: G06F,H01L

Claim:
1. A method of manufacturing a display device, the method comprising: sequentially forming a first material layer for forming a semiconductor layer and a source/drain electrode layer on a surface of a substrate on which a gate electrode and a gate insulating film are formed; simultaneously patterning the first material layer and the source/drain electrode layer to form a first pattern in a thin film transistor region and to form a second pattern in a data pad region, the first pattern comprising a first portion of the semiconductor layer and a first portion of the source/drain electrode layer, and the second pattern comprising a second portion of the semiconductor layer and a data pad formed from a second portion of the source/drain electrode layer; sequentially forming first and second passivation films structured such that a hole exists through the first and second passivation films through which at least a part of the source/drain electrode layer is exposed in the thin film transistor region including the first pattern; sequentially forming a second material layer and a third material layer on the second passivation film; forming a sensing line pattern, a pixel electrode pattern, and a connection electrode pattern connected with the data pad by patterning the second and third material layers through a patterning process using a half tone mask; forming a third passivation film on the sensing line pattern, the pixel electrode pattern, and the connection electrode pattern; and forming a common electrode connected with the sensing line pattern and forming a data pad electrode connected with the connection electrode pattern on the third passivation film.