Patent ID: 9684921
Date: 2017-06-20
CPC Classifications: G06Q,H02J,H04L

Claim:
1. An apparatus interlocking at least one of plurality of terminals with a main router of a main server via two circuits terminating two ends of a single twisted pair line of internal communication lines connecting said terminals to said main router for exchanging bidirectional information signals; said two circuits complementary to each other are one of a differential signal and balanced impedance terminating circuits with each of the circuits is timed by a synchronizing CPU with multi I/O ports connected to an high frequency carrier FSK and a lower frequency carrier ASK modulators and demodulators for synchronously and simultaneously timing two bidirectional modulated and demodulated high speed and lower speed data signals separated by their carrier frequencies for at least one of output and receive, at least one of data content and operate protocols, and at least one of synchronized timing signals and synchronized responses for simultaneously propagating said two bidirectional timed signals, synchronized by one of self signal timing and by one of the other speed signal timing and both signals timing via said single twisted pair.