Patent ID: 9601595
Date: 2017-03-21
CPC Classifications: H01L

Claim:
1. A method for forming a multi-gate lateral-diffused-metal-oxide-semiconductor (LDMOS) device having a centrally located LDMOS region and a peripherally located LDMOS region, comprising: providing a semiconductor-on-insulator (SOI) structure comprising a dielectric layer overlain by a first semiconductor layer of a first conductivity type; forming a second semiconductor layer over the first semiconductor layer; forming the centrally located and the peripherally located LDMOS region substantially in or on the second semiconductor layer; forming a deep trench isolation (DTI) region in the first and second semiconductor layers, the DTI region extending to the dielectric layer and laterally bounding the peripherally located LDMOS region; forming a buried layer of a second, opposite conductivity type in the first semiconductor layer, the buried layer further laterally bounded by the DTI region; and wherein the buried layer is formed in the first semiconductor layer, and wherein the second semiconductor layer is epitaxially grown over the first semiconductor layer after the formation of the buried layer therein.