Patent ID: 9536748
Date: 2017-01-03
CPC Classifications: H01J,H01L

Claim:
1. A method of forming channels or nanowires for a gate-all-around device or other electronic device, the method comprising: (a) providing a substrate on a substrate holder in a reaction chamber, the substrate comprising a patterned mask layer over semiconductor material, wherein the patterned mask layer comprises a plurality of linear mask portions oriented substantially parallel to one another; (b) orienting the substrate with respect to an ion trajectory in a first orientation and directing ions toward the substrate in a first direction, wherein the ions impact the substrate at a first incidence angle to thereby anisotropically etch the semiconductor material to form a first set of trenches; (c) orienting the substrate with respect to the ion trajectory in a second orientation and directing ions toward the substrate in a second direction, wherein the ions impact the substrate at a second incidence angle to thereby anisotropically etch the semiconductor material to form a second set of trenches; (d) repeating (b)-(c) to further etch the first and second sets of trenches to form the channels or nanowires in a direction parallel to the plurality of linear mask portions; and (e) forming the gate-all-around device, wherein the channels or nanowires formed in (a)-(c) are channels or nanowires in the gate-all-around device.