Patent ID: 9703603
Date: 2017-07-11
CPC Classifications: G06F

Claim:
1. A data processing system, comprising: a processor that includes a plurality of registers and executes a first program task, wherein a register of the plurality of registers stores task context information of the first program task; a register context memory connected to the processor, wherein the processor transfers the task context information from the register to the register context memory for executing an accelerator call instruction of the first program task, wherein the task context information includes a command descriptor of an accelerator call function of the first program task, and wherein the accelerator call function includes the accelerator call instruction; an accelerator scheduler, connected to the processor, that receives the command descriptor and an accelerator ID from the processor when the processor transfers the task context information to the register context memory; a plurality of accelerator cores connected to the accelerator scheduler and the register context memory; a stack memory, connected to the processor, for storing the first set of function arguments, which indicate a difference between the number of the plurality of function arguments and the number of the plurality of registers,