Patent ID: 9589899
Date: 2017-03-07
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a first gate structure on a substrate, the first gate structure extending in a first direction and having a first end portion; a second gate structure on the substrate, the second gate structure extending in the first direction and being spaced apart from the first gate structure, and the second gate structure having a second end portion opposite to the first end portion of the first gate structure in a diagonal direction with respect to the first direction; a cross-coupling pattern between the first and second gate structures, the cross-coupling pattern contacting sidewalls of the first and second gate structures and electrically connecting the first and second gate structures to each other; a first contact plug directly contacting an upper portion of the first end portion of the first gate structure and a first upper boundary of the cross-coupling pattern, the first contact plug extending in the first direction; and a second contact plug directly contacting an upper portion of the second end portion of the second gate structure and a second upper boundary of the cross-coupling pattern, the second contact plug extending in the first direction; wherein the substrate includes a gate cutting region having a substantially rectangular shape in plan view between first and second gate electrodes, wherein edges of the gate cutting region are adjacent to the first and second end portions of the first and second gate structures, and wherein the cross-coupling pattern is confined within the edges of the gate cutting region.