Patent ID: 9716128
Date: 2017-07-25
CPC Classifications: H01L

Claim:
1. A method of manufacturing a semiconductor device, comprising: forming a plurality of active patterns in a substrate, the active patterns being spaced apart from each other by an isolation layer; forming gate structures, each of which extends in the isolation layer through the active patterns, each of the active patterns being divided by the gate structures into a central portion and a peripheral portion facing the central portion; forming a protrusion from each of the active patterns, the protrusion being exposed from a top surface of the isolation layer; transforming each of the protrusions into silicide such that a first silicide ohmic pad is formed at the central portion of each of the active patterns, and a second silicide ohmic pad is formed at the peripheral portion of each of the active patterns; forming a conductive line structure electrically connected to the first silicide ohmic pad; forming a conductive contact electrically connected to the second silicide ohmic pad; and forming a data storage unit electrically connected to the conductive contact.