Patent ID: 9685406
Date: 2017-06-20
CPC Classifications: H01L

Claim:
1. A method for manufacturing a semiconductor device, comprising: forming a dielectric layer on a substrate; forming a plurality of openings in the dielectric layer; conformally depositing a barrier layer on the dielectric layer and on sides and a bottom of each one of the plurality of openings; depositing a contact layer on the barrier layer in each one of the plurality of openings; removing a portion of each contact layer from each one of the plurality of openings; and removing a portion of the barrier layer from each one of the plurality of openings; wherein at least the removal of the portion of the barrier layer is performed using an etchant comprising: (a) a compound selected from group consisting of -azole, -triazole, and combinations thereof; (b) a compound containing one or more peroxy groups; (c) one or more alkaline metal hydroxides; and (d) water; and forming a cap layer on remaining portions of each contact layer after the removing of the portion of each contact layer, and prior to the removing of the portion of the barrier layer.