Patent ID: 9735682
Date: 2017-08-15
CPC Classifications: H02M

Claim:
1. A step-down circuit, comprising: input and output terminals; a first transistor of N-type having a channel between an input terminal and a first node, and a gate to which a reference voltage is applied, wherein the reference voltage is lower than a peak value of an AC voltage applied to the input terminal; a second transistor of P-type having a channel between the input terminal and a second node, and a gate to which the reference voltage is applied; a third transistor of N-type having a channel between the first node and the output terminal, and a gate to which the AC voltage is applied; a fourth transistor of P-type having a channel between the second node and the output terminal, and a gate to which the AC voltage is applied; a first capacitor connected between the first node and the second node; and a second capacitor connected between the output terminal and a reference potential terminal.