Patent ID: 9620547
Date: 2017-04-11
CPC Classifications: G01N,H01L

Claim:
1. A method of fabricating a backside-illuminated avalanche image sensor, the method comprising: forming an intrinsic or p-doped silicon epitaxial layer on a silicon wafer with a p-dopant concentration less than 2×10 forming at least one of CMOS, CCD and bipolar circuits on a front-side surface of the epitaxial layer, said circuits comprising at least a buried n-type channel, and at least part of those circuits are formed in a p+-doped well with a doping concentration greater than 10 polishing or etching away the silicon wafer to expose a back-side surface of the epitaxial layer in at least a light sensitive area; epitaxially growing a p-type layer on the exposed surface with a dopant concentration greater than 5×10 epitaxially growing an n-type layer on the exposed surface with a dopant concentration between 5×10 depositing a pure boron coating on the exposed back-side surface of the epitaxial layer.