Patent ID: 9671844
Date: 2017-06-06
CPC Classifications: G06F,H04B,H04L,Y02D

Claim:
1. A method for controlling power consumption in a multi-core processor chip, the method comprising: accumulating, at a central controller within the multi-core processor chip, one or more power estimates associated with multiple core processors within the multi-core processor chip, the accumulating including sending a read command from the central controller to at least one core processor of the multiple core processors and wherein the at least one core processor receiving the read command from the central controller updates a parameter value of the read command representing a cumulative sum of power estimates to produce an updated cumulative sum and forwards the read command with the updated cumulative sum to one other core processor or to the central controller; determining a global power threshold based on a cumulative power estimate, the cumulative power estimate being determined based at least in part on the one or more power estimates accumulated; and causing power consumption at each core processor to be controlled based on the global power threshold determined; wherein determining the global power threshold includes: adjusting a parameter value representing the global power threshold based on the cumulative power estimate determined and a corresponding average over time, relative to a desired target power.