Patent ID: 9733520
Date: 2017-08-15
CPC Classifications: G02F

Claim:
1. A display panel comprising: a gate line; a first data line crossing the gate line, and to which a first voltage is applied; a second data line in parallel with and contiguous to the first data line and spaced apart from the first data line, and to which a second voltage different from the first voltage is applied; a first thin film transistor electrically connected to the first data line; a second thin film transistor electrically connected to the second data line; a first pixel electrode electrically connected to the first thin film transistor and disposed between the first data line and the second data line; a second pixel electrode electrically connected to the second thin film transistor and disposed opposite to the first pixel electrode with reference to the second data line; a common electrode overlapping the first and second pixel electrodes, wherein a first slit opening line corresponding to the first pixel electrode and extending in the length direction of the second data line and a second slit opening line corresponding to the second pixel electrode and extending in the length direction of the second data line, are defined in the common electrode.