Patent ID: 9652430
Date: 2017-05-16
CPC Classifications: G06F

Claim:
1. A reconfigurable register device, comprising: an arrangement of storage elements, a combinatorial logic circuitry connectable to the arrangement of storage elements, wherein the combinatorial logic circuitry is configured to enable the arrangement of storage elements to form a binary synchronous counter; a bypass logic circuitry connectable to the arrangement of storage elements, wherein the bypass logic circuitry is configured to enable the arrangement of storage elements to form a serial shift register; and a switching circuitry having a mode signal input terminal for receiving a mode signal indicative of at least one of a counter mode and a shift register mode, wherein the switching circuitry is configured to selectively connect the arrangement of storage elements to the combinatorial logic circuitry if the mode signal indicates the counter mode, and to selectively connect the arrangement of storage elements to the bypass logic circuitry if the mode signal indicates the shift register mode; a buffer comprising a number of storage cells corresponding to the number of storage elements in the arrangement, wherein each of the storage cells is configured for storing a state of a binary signal, the buffer is connected to the arrangement of storage elements and is configured to store the state of each storage element of the arrangement in a respective storage cell of the buffer; and a control logic circuitry configured to load of the states of the storage elements into the respective storage cells.