Patent ID: 9548269
Date: 2017-01-17
CPC Classifications: H01L

Claim:
1. An interconnect structure for an integrated circuit, the interconnect structure comprising: an interlayer dielectric layer disposed above a substrate; and a grating structure disposed above the interlayer dielectric layer and comprising co-planar alternating pluralities of dielectric hardmask lines and conductive lines, wherein one or more of the plurality of conductive lines extends into the interlayer dielectric layer, and one or more of the plurality of conductive lines does not extend into the interlayer dielectric layer, and wherein the plurality of conductive lines has a constant pitch between a first conductive line and a successive second conductive line and between the successive second conductive line and a successive third conductive line wherein one of the one or more of the plurality of conductive lines that extends into the interlayer dielectric layer extends only partially into the interlayer dielectric layer to provide a conductive metal line for a metallization layer comprising the interlayer dielectric layer.