Patent ID: 9590037
Date: 2017-03-07
CPC Classifications: H01L

Claim:
1. A method of forming a semiconductor structure, comprising: forming a dummy gate above a semiconductor substrate, the dummy gate defining a source-drain region adjacent to the dummy gate and a silicon channel region below the dummy gate; epitaxially growing a silicon-germanium layer above the source-drain region, the silicon-germanium layer having a target concentration of germanium atoms; annealing the semiconductor structure to diffuse germanium atoms from the silicon-germanium layer into the silicon channel region to form a silicon-germanium channel region; and removing the silicon-germanium layer from above the source-drain region; forming a doped epitaxial layer adjacent to the silicon-germanium channel region to form a raised source-drain region; wherein forming the doped epitaxial layer comprises epitaxially growing in-situ boron doped silicon-germanium or in-situ boron doped silicon.