Patent ID: 9729889
Date: 2017-08-08
CPC Classifications: H04N

Claim:
1. A video encoder that implements a multi-pass quantization and bit packing engine (PAK) parameters algorithm comprising: a feedback loop configured to feed back a final quantization parameter (QP) and a frame statistic used on a recent bit-rate transmission; a bit-rate control (BRC) component configured to receive the feedback from the feedback loop, the BRC component calculates and provides a calculated QP and a calculated current frame size based from the received feedback, wherein the BRC parameter further provides a user specified target frame size of a current image frame; a multi-pass PAK parameters component configured to calculate a mismatch between the calculated current frame size and the user specified target frame size, wherein the multi-pass PAK parameters component applies an adjusted quantization parameter (QP) from a look-up table (LUT) based on the calculated mismatch to achieve the target frame size for the current image frame; a mode decision component configured to provide a sequence of intra (1) frame, a predictive (P) frame, and/or a bidirectional (B)-frame encoding approaches to be performed on the current image frame after achieving the target frame size; and a PAK hardware (HW) component to perform bit-rate transmission using the provided I, P, and/or B—frame encoding approaches, wherein the PAK HW component feeds back the final QP and the frame statistic through the feedback loop for a next bit-rate transmission.