Patent ID: 9691627
Date: 2017-06-27
CPC Classifications: H01L

Claim:
1. A method of fabricating a semiconductor device, comprising: forming a preliminary mask pattern on a substrate, the preliminary mask pattern having a line shape that extends in a direction; forming a mask layer on sidewalls and an upper surface of the preliminary mask pattern, the mask layer comprising a plurality of openings that are spaced apart from each other in the direction and expose portions of the preliminary mask pattern, respectively; removing the portions of the preliminary mask pattern by etching the preliminary mask pattern using the mask layer as an etch mask, thereby forming a plurality of mask patterns on the substrate; forming a plurality of auxiliary patterns on sidewalls of the plurality of mask patterns, respectively; and etching the substrate using the plurality of mask patterns and the plurality of auxiliary patterns as an etch mask to form a trench defining a plurality of active patterns.