Patent ID: 9741730
Date: 2017-08-22
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a control electrode extending a first direction; a first insulating layer provided on the control electrode, the first insulating layer containing a metal oxide; a charge storage layer provided on the first insulating layer; an intermediate insulating layer provided on the charge storage layer; a floating electrode layer provided on the intermediate insulating layer; a second insulating layer provided on the floating electrode layer; a semiconductor layer provided on the second insulating layer; a first separation film separating the control electrode, the first insulating layer, the charge storage layer, the intermediate insulating layer, the floating electrode layer, and the second insulating layer in the first direction; and a second separation film separating a first stacked unit in a second direction, the first stacked unit including the charge storage layer, the intermediate insulating layer, the floating electrode layer, the second insulating layer, and the semiconductor layer, the second direction intersecting the first direction, the second separation film containing silicon, the semiconductor layer containing an n-type impurity and a p-type impurity, and a concentration of the p-type impurity having a peak on the second insulating layer side of a center position in a thickness direction of the semiconductor layer.