Patent ID: 9589887
Date: 2017-03-07
CPC Classifications: H01F,H01L,H04B

Claim:
1. A semiconductor device, comprising: a first semiconductor chip, comprising: a second semiconductor chip, comprising: an insulation sheet interposed between the first insulation film of the first semiconductor chip and the second insulation film of the second semiconductor chip, wherein the first semiconductor chip and the second semiconductor chip are stacked one over another via the insulation sheet with the first insulation film of the first semiconductor chip and the second insulation film of the second semiconductor chip facing each other, wherein the first coil and the second coil are magnetically coupled with each other, wherein first wires and first dummy wires are formed at a first uppermost-layer wiring layer of an uppermost-layer wiring layer of the first wiring structure, wherein second wires and second dummy wires are formed at a second uppermost-layer wiring layer of an uppermost-layer wiring layer of the second wiring structure, and wherein the first dummy wires are located within and around the first coil, and the second dummy wires are located within and around the second coil.