Patent ID: 9595517
Date: 2017-03-14
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a semiconductor layer of a first conductivity type formed on a substrate; a first trench formed in the semiconductor layer, a first trench gate being formed in the first trench and insulated from the sidewall of the first trench by a first gate dielectric layer; a second trench formed in the semiconductor layer and extending into the substrate, a second trench gate being formed in the second trench and insulated from the sidewall of the second trench by a second gate dielectric layer; and a first transistor device formed in the semiconductor layer adjacent the first trench, the first transistor device having a gate terminal formed by the first trench gate, a body region of a second conductivity type formed in the semiconductor layer adjacent the first trench, a source region of the first conductivity type formed in the body region and adjacent the first trench, and a drain region of the first conductivity type formed in the semiconductor layer, wherein the second trench encircles active area of the first transistor device to provide electrical isolation of the first transistor device.