Patent ID: 9679824
Date: 2017-06-13
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a separation carrier including a temporary base material; a conductive layer including a plurality of trace lines each in direct contact with the separation carrier and comprising a first terminating end of the trace line with a width equal to a width of the trace line and a contact pad with a width greater than the width of the trace line located at an opposite terminating end of the trace line from the first terminating end of the trace line, wherein the contact pads are offset to reduce pitch between adjacent trace lines; a semiconductor die including a plurality of contact pads disposed over the first terminating ends of the trace lines; a plurality of bumps in direct contact with the contact pads of the semiconductor die and the first terminating ends of the trace lines, wherein a width of the bump is greater than the width of the trace line and the bumps overlap a side surface of the trace lines and a terminating side surface of the first terminating ends; and an encapsulant deposited over the semiconductor die.