Patent ID: 9711552
Date: 2017-07-18
CPC Classifications: H01L

Claim:
1. A wafer-level method of fabricating optoelectronic modules, the method comprising: providing a silicon wafer in which or on which a plurality of optoelectronic devices are formed; dicing the silicon wafer to form a plurality of discrete optoelectronic devices; subsequently applying upper and lower vacuum injection tools to the plurality of optoelectronic devices each of which is integrated in or disposed on a respective silicon substrate, wherein the tools define spaces separating the silicon substrates from one another; injecting a polymer material into the spaces; curing the polymer material to form a spacer, wherein the polymer material is substantially opaque to light at wavelengths emitted by or detectable by the optoelectronic devices; attaching one or more optics assemblies to the spacer so as to obtain a resulting structure in which each of the one or more optics assemblies is disposed over at least one of the optoelectronic devices; and separating the resulting structure into a plurality of optoelectronic modules each of which includes at least one optical channel.