Patent ID: 9564856
Date: 2017-02-07
CPC Classifications: H03F,H03G

Claim:
1. An amplifier circuit, comprising: a cascade of amplifier stages, providing an RSSI-sum as a measure for the level of a signal at the input of the cascade, the cascade of amplifier stages having a large signal behavior defined by a difference between a maximum contribution defined by a clipping level of one of the amplifier stages and a minimum contribution corresponding to an output voltage of one of the amplifier stages absent an input voltage, each of the amplifier stages of the cascade of amplifier stages having a small signal gain and a gain control input; a control line configured to provide a control signal to the gain control input of each of the amplifier stages; a feedback circuit having an input port for a reference signal, the feedback circuit configured to generate the control signal in response to the reference signal and an output of the cascade of amplifier stages; and a feedback loop connecting the feedback circuit to the control line, the feedback loop configured to fix the large signal behavior of the cascade of amplifier stages and control the small signal gain of each of the amplifier stages in response to the control signal.