Patent ID: 9559136
Date: 2017-01-31
CPC Classifications: H01L

Claim:
1. A semiconductor device manufacturing method comprising: forming an insulating film on a first conductive member, the insulating film including a first insulating layer, a second insulating layer, and a third insulating layer, the second insulating layer being made of a material different from a material of the first insulating layer and a material of the third insulating layer, the second insulating layer being positioned between the first insulating layer and the third insulating layer so that the second insulating layer provides a first interface between the first insulating layer and the second insulating layer and provides a second interface between the second insulating layer and the third insulating layer; forming a hole reaching the first insulating layer over the first conductive member by etching the third insulating layer and the second insulating layer using a first mask; forming a trench reaching the second insulating layer and in communication with the hole by etching the third insulating layer using a second mask after the first mask is removed; forming an opening exposing the first conductive member to the hole by etching the first insulating layer after the hole and the trench are formed; and forming a second conductive member connected to the first conductive member by embedding a conductive material in the opening, the hole, and the trench, wherein when forming the hole, a protection layer is positioned between the first mask and the third insulating layer, and when forming the trench, the protection layer is positioned between the second mask and the third insulating layer, and wherein the trench is formed via an etching condition such that an etching rate with respect to the second insulating layer is less than an etching rate with respect to the third insulating layer.