Patent ID: 9583534
Date: 2017-02-28
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a cell transistor comprising a channel region, a first impurity region and a second impurity region, the first impurity region and the second impurity region being respectively arranged on both sides of the channel region in a channel direction of the cell transistor, the first impurity region and the second impurity region being asymmetrical about a center of the cell transistor in the channel direction with respect to at least one of a shape or an impurity concentration distribution, the first impurity region comprising a first hollow region formed in contact with a lower portion of a first source/drain region, and the first source/drain region and the first hollow region comprising different conductivity types; a source line coupled to the first impurity region of the cell transistor; and a magneto-resistive device coupled to the second impurity region of the cell transistor.