Patent ID: 9639362
Date: 2017-05-02
CPC Classifications: G06F

Claim:
1. An integrated circuit device comprising: at least one instruction processing module arranged to receive a bit-manipulation instruction, the bit-manipulation instruction for enabling selection of single bits from a plurality of bits for manipulation, the single bits from any location of at least one source data register according to a plurality of sets of control bits from at least one control data register, each set of control bits from the plurality of sets of control bits corresponding to only a single bit to be manipulated, and in response to receiving the bit-manipulation instruction to select a single bit from the at least one source data register in accordance with a value of at least one control bit of the set of the control bits corresponding to the single bit, select from a group of candidate values comprising a value of the single selected bit, a bit value of ‘0’, a bit value of ‘1’, and a bit value of a target bit cell within the at least one output data register, a manipulation value for the single selected bit in accordance with a value of at least one further control bit of the set of control bits, and store the selected manipulation value for the single selected bit in at least one output data register.