Patent ID: 9634148
Date: 2017-04-25
CPC Classifications: H01L

Claim:
1. A thin film transistor, comprising: a substrate; a first semiconductor layer, an etch stop layer and a second semiconductor layer sequentially stacked on a surface of the substrate; a first via and a second via formed on the etch stop layer; a source and a drain formed separating from each other and the source and the drain overlapping two ends of the second semiconductor layer respectively, wherein the source connects the first semiconductor layer through the first via; the drain connects the first semiconductor layer through the second via; a gate insulation layer formed on the source and the drain; a gate formed on the gate insulation layer; and wherein, the first semiconductor serves as a semiconductor layer and the gate of the second semiconductor layer at the same time, the source and the drain are connected to the first semiconductor and the second semiconductor for effectively increasing the on-state current of the thin film transistor and have a faster switching speed.