Patent ID: 9748042
Date: 2017-08-29
CPC Classifications: H01G

Claim:
1. A multilayer feedthrough capacitor comprising: an element body of a rectangular parallelepiped shape, the element body including a pair of principal surfaces opposing each other in a first direction, a pair of first side surfaces opposing each other in a second direction perpendicular to the first direction, and a pair of second side surfaces opposing each other in a third direction perpendicular to the first and second directions; a plurality of internal signal electrodes and internal ground electrodes alternately disposed in the element body to oppose each other in the first direction; first and second terminal signal electrodes disposed on the element body and connected to the plurality of internal signal electrodes; and a terminal ground electrode disposed on the element body and connected to the plurality of internal ground electrodes, wherein a length in the first direction of the element body is smaller than a length in the second direction of the element body and smaller than a length in the third direction of the element body, wherein the terminal ground electrode is located between the first terminal signal electrode and the second terminal signal electrode in the third direction, wherein each of the first and second terminal signal electrodes and the terminal ground electrode includes an electrode portion disposed on one of the principal surfaces, wherein a thickness of the electrode portion of the terminal ground electrode is smaller than a thickness of the electrode portion of the first terminal signal electrode and smaller than a thickness of the electrode portion of the second terminal signal electrode, wherein each of the first and second terminal signal electrodes and the terminal ground electrode includes a sintered conductor layer formed on the element body, and a plated layer formed on the sintered conductor layer, wherein a thickness of the sintered conductor layer of the electrode of the terminal ground electrode is not more than a thickness of the sintered conductor layer of the electrode portion of the first terminal signal electrode and not more than a thickness of the sintered conductor layer of the electrode portion of the second terminal signal electrode, and wherein an area of the sintered conductor layer of the terminal ground electrode is smaller than a total value of an area of the sintered conductor layer of the first terminal signal electrode and an area of the sintered conductor layer of the second terminal signal electrode.