Patent ID: 9653607
Date: 2017-05-16
CPC Classifications: H01L

Claim:
1. A thin film transistor (TFT) comprising: a substrate; a semiconductive layer on the substrate and comprising a channel region, a first lightly doped drain (LDD) region and a second LDD region respectively located at opposite sides of the channel region, a first heavily doped drain (HDD) region located at a side of the first LDD region away from the channel region, and a second HDD region located at a side of the second LDD region away from the channel region; a first inter-layer drain (ILD) layer on the semiconductive layer; a second ILD layer on the first ILD layer; and at least one contact hole passing extending through the first ILD layer and the second ILD layer, each of the at least one contact hole comprising a first portion extending through the second ILD layer and a second portion extending through the first ILD layer, wherein the second portion gradually narrows along a direction from a top surface to a bottom surface of the first ILD layer; a cross section of the first portion is rectangular, and a cross section of the second portion is trapezoidal; the first portion has a same width along a direction from a top surface to a bottom surface of the second ILD layer; a projected area of the first portion projected on the substrate is greater than an area of the first HDD region.