Patent ID: 9647141
Date: 2017-05-09
CPC Classifications: H01L

Claim:
1. A thin film transistor, comprising: a gate insulation layer, an active layer, a source and a drain, wherein the active layer of the thin film transistor is provided with a first groove and a second groove which neither pass through the active layer, so that a vertical distance between a top surface of the gate insulation layer and a portion of a top surface of the active layer where the first groove and the second grove are formed, is less than a vertical distance between the top surface of the gate insulation layer and the other portion of the top surface of the active layer, the source and the drain of the thin film transistor are formed at least partially in the first groove and the second groove, respectively, and the source and the drain are in contact with the active layer through the first groove and the second groove, respectively.