Patent ID: 9698729
Date: 2017-07-04
CPC Classifications: H03F

Claim:
1. A CMOS cascode amplifier, comprising: a cascode circuit comprising a plurality of branches in parallel, each branch comprising a first transistor and a second switchable transistor connected in series forming a cascode pair, wherein the cascode circuit is configured to amplify an input signal; a bias circuit configured to bias the cascode circuit by providing a bias signal to the first transistor in each of the plurality of the branches in the cascode circuit; and a switching control circuit configured to control a quiescent current in the cascode circuit based on selectively activating the plurality of branches by providing a switching control signal that switches on the second switchable transistor in the one or more activated branches, wherein the cascode pair comprising the first transistor and the second switchable transistor in each of the branches have weighted W/L size.