Patent ID: 9575822
Date: 2017-02-21
CPC Classifications: G06F

Claim:
1. A system for tracking a relative arrival order of a plurality of events stored in at least two queues, the system comprising: a processor, coupled with a memory, and configured to perform the actions of: storing each of a plurality of received events in a separate entry from among a plurality of entries in one of at least two queues with a separate counter value set from an arrival order counter at the time of storage, wherein the arrival order counter is incremented after storage of each of the plurality of received events and on overflow the arrival order counter wraps back to zero; calculating an exclusive OR value of a first top bit of a first counter for a first queue from among the at least two queues and a second top bit of a second counter for a second queue from among the at least two queues; comparing the exclusive OR value with a comparator bit to determine whether a first counter value in the first counter was stored before a second counter value in the second counter; for a plurality of queues greater than two queues, for each of a selection of pairings of the plurality of queues from among a plurality of selections of pairings of the plurality of queues: for each queue from among the plurality of queues, calculating a separate logical AND value from among a plurality of logical AND values of a separate logical combination of a separate selection of outputs from among the plurality of selection of pairings, wherein only one of the plurality of logical AND values calculates a logical “1” indicating on oldest queue; selecting, as an oldest entry from among the plurality of queues, a particular entry from a particular queue associated with the only one of the plurality of logical AND values that calculates a logical “1”.