Patent ID: 9601691
Date: 2017-03-21
CPC Classifications: H01L

Claim:
1. A semiconductor apparatus comprising: a variable resistor including a variable resistance layer and an insert layer, wherein a space is formed in the variable resistance layer, wherein the insert layer completely fills the space so that the insert layer is surrounded by the variable resistance layer, wherein the variable resistance layer includes a first lower portion and a first upper portion, wherein the insert layer includes a second lower portion and a second upper portion, wherein the first lower portion of the variable resistance layer surrounds the second lower portion of the insert layer, wherein the first upper portion of the variable resistance layer surrounds the second upper portion of the insert layer; and an upper electrode including a third upper portion and a third lower portion, wherein the third upper portion of the upper electrode is formed over the first upper portion of the variable resistance layer and over the second upper portion of the insert layer, wherein the third lower portion of the upper electrode extends from the third upper portion of the upper electrode downward to surround the first upper portion of the variable resistance layer, wherein the first upper portion of the variable resistance layer is provided between the second upper portion of the insert layer and the third lower portion of the upper electrode, wherein the second upper portion of the insert layer is spaced apart from the third lower portion of the upper electrode, and wherein the insert layer has a resistivity different from that of the variable resistance layer.