Patent ID: 9685446
Date: 2017-06-20
CPC Classifications: H01L

Claim:
1. A method of manufacturing a semiconductor device having a first semiconductor element provided in a first region in a semiconductor substrate, and a second semiconductor element provided in a second region in the semiconductor substrate, the method comprising: preparing a light ion source, a first mask and a second mask; shielding a side of the first region on a top surface of the semiconductor substrate by using the first mask; irradiating the top surface of the semiconductor substrate, the side of the first region thereon being shielded with the first mask, with light ions by operating the light ion source to introduce lattice defects at a specified depth on a side of the second region on the top surface of the semiconductor substrate, wherein the lattice defects at the specified depth on the side of the second region define a first lifetime control region having a first edge under a gate electrode of the first semiconductor element, the gate electrode extending from the first region into the second region; shielding the side of the second region on a bottom surface of the semiconductor substrate by using the second mask; and irradiating the bottom surface of the semiconductor substrate, the side of the second region thereon being shielded with the second mask, with light ions by operating the light ion source to introduce lattice defects at a specified depth on the side of the first region on the bottom surface of the semiconductor substrate, wherein the lattice defects at the specified depth on the side of the first region define a second lifetime control region having a second edge under the gate electrode and are substantially co-planar with the first edge of the first lifetime control region.