Patent ID: 9691844
Date: 2017-06-27
CPC Classifications: H01L

Claim:
1. A power semiconductor device comprising: a substrate having a first surface and a second surface opposite to the first surface; a drift region located on the substrate having a first conductivity type; an emitter electrode located on the first surface of the substrate; a drain electrode located on the second surface of the substrate; an emitter contact region in contact with the emitter electrode; a trench gate structure that surrounds four sides of the emitter contact region; a base region located under the emitter contact region having a second conductivity type; a floating region located on an exterior region of the trench gate structure that surrounds the trench gate structure and is deeper than the trench gate structure; and a termination region located in the substrate and surrounding a cell region, wherein the floating region is electrically floating and surrounds a bottom surface of the trench gate structure and is separate from the base region, and wherein an impurity concentration of the floating region is lower than an impurity concentration of the base region, and wherein the cell region comprises the trench gate structure and the floating region, and wherein the termination region comprises a termination ring region and a gate bus line.