Patent ID: 9607886
Date: 2017-03-28
CPC Classifications: H01L

Claim:
1. A method for forming conductive lines on a semiconductor wafer, the method comprising: forming a first hardmask on an insulator layer, a planarizing layer on the first hardmask, and a second hardmask on the planarizing layer; removing portions of the second hardmask; depositing a third hardmask over portions of the planarizing layer and the second hardmask, a layer of sacrificial mandrel material on the third hardmask and a fourth hardmask on the layer of sacrificial mandrel material; removing portions of the fourth hardmask to expose portions of the layer of sacrificial mandrel material; forming a mask on the fourth hardmask and exposed portions of the layer of sacrificial mandrel material; removing exposed portions of the second hardmask; removing exposed portions of the layer of sacrificial mandrel material to expose portions of the third hardmask and form a first sacrificial mandrel and a second sacrificial mandrel on the third hardmask, wherein the first sacrificial mandrel has a gap defined by a first portion of the first sacrificial mandrel and a second portion of the first sacrificial mandrel; depositing a layer of spacer material in the gap, and over exposed portions of the first sacrificial mandrel, the second sacrificial mandrel and the third hardmask; removing portions of the spacer material to expose the first sacrificial mandrel and the second sacrificial mandrel; depositing a filler material between the first sacrificial mandrel and the second sacrificial mandrel; removing a portion of the filler material to expose the first sacrificial mandrel and the second sacrificial mandrel; removing the first sacrificial mandrel and the second sacrificial mandrel; removing exposed portions of the third hardmask and the second hardmask; removing exposed portions of the planarizing layer; removing the spacer material and the third hardmask; removing exposed portions of the planarizing layer; removing exposed portions of the first hardmask; removing the second hardmask and the planarizing layer; removing exposed portions of the insulator layer to form a trench in the insulator layer; and filling the trench with a conductive material.