Patent ID: 9553181
Date: 2017-01-24
CPC Classifications: H01L

Claim:
1. A method of fabricating a single layer of dielectric material on a first III-V semiconductor layer, the method comprising: forming the first III-V material semiconductor layer having a first lattice constant; and forming the single layer of dielectric material having a second lattice constant on the first III-V material semiconductor layer, the single layer of dielectric material comprising a first region located at a lower surface of the single layer of dielectric material, the forming of the single layer comprising wherein the first region is located at an interface between the single layer dielectric material and the first III-V material semiconductor layer, within the single layer of dielectric material, a mismatch between the first lattice constant and the second lattice constant causing the first region to transition to a second region that is adjacent to an upper surface of the single layer of dielectric material via an interfacial region, the upper surface being opposite to the lower surface, and further wherein the first region has a crystalline structure and the second region has an amorphous structure.