Patent ID: 9685531
Date: 2017-06-20
CPC Classifications: H01L

Claim:
1. A method for manufacturing semiconductor device having metal gates, comprising: providing a substrate comprising a first transistor and a second transistor formed thereon, the first transistor having a first gate trench formed therein and the second transistor having a second gate trench formed therein; forming a patterned first work function metal layer in the first gate trench; forming a second sacrificial masking layer respectively in the first gate trench and the second gate trench; performing an etching process to remove portions of the patterned first work function metal layer to form a U-shaped first work function metal layer in the first gate trench; and performing a two-step etching process to remove the second sacrificial masking layer and portions of the U-shaped first work function metal layer from the first gate trench to form a taper top on the U-shaped first work function metal layer, wherein the two-step etching process comprises a strip step and a wet etching step.