Patent ID: 9691761
Date: 2017-06-27
CPC Classifications: H01L

Claim:
1. A method of manufacture of a compound semiconductor integrated circuit; the method comprising: providing a first substrate; forming a first epitaxial layer on top of the first substrate; forming a first electronic component in said first epitaxial layer; removing said first epitaxial layer not part of said first electronic component; forming a layer of a first dielectric material on top of said first substrate and including said first electronic component; forming a recess in said layer of a first dielectric material that exposes a first region of said first substrate; providing a second substrate; forming a second epitaxial layer on top of the second substrate; forming a second electronic component in said second epitaxial layer; removing said second epitaxial layer not part of said second electronic component; forming a layer of a second dielectric material on top of said second substrate and including said second electronic component; attaching a handle on top of said layer of a second dielectric material; removing said second substrate; removing said second dielectric layer except around said second electronic component; attaching said layer of the second dielectric material around said second electronic component to said first substrate on top of said first region of said first substrate.