Patent ID: 9722064
Date: 2017-08-01
CPC Classifications: H01L

Claim:
1. An insulating gate field effect transistor, comprising: a substrate; a nitride transistor structure arranged on the substrate; a dielectric layer on the nitride transistor structure, wherein the dielectric layer comprises a first dielectric layer on the nitride transistor structure, a second dielectric layer on the first dielectric layer, and a third dielectric layer on the second dielectric layer, wherein material of both the first dielectric layer and the second dielectric layer comprise metal, a gate region and two ohmic contact regions respectively located at two sides of the gate region are defined on the dielectric layer, and each of the two ohmic contact regions is through the dielectric layer; a groove formed in the gate region, wherein the groove is at least partially through the dielectric layer in a thickness direction, with sidewalls of the groove being substantially plane, and wherein an oxidized dielectric is disposed at the bottom of the groove, the oxidized dielectric comprising the metal and the dielectric layer material; a metal gate formed in the groove, wherein the metal gate is in direct contact with the dielectric layer or in indirect contact with the dielectric layer through an additional dielectric layer; and a source electrode and a drain electrode located at the two ohmic contact regions.