Patent ID: 9564517
Date: 2017-02-07
CPC Classifications: H01L

Claim:
1. A method for manufacturing a semiconductor device, comprising the steps of: forming a gate electrode; forming a wiring; forming a gate insulating film over the gate electrode and the wiring; forming a semiconductor layer over the gate insulating film; performing first rear surface exposure to form a first photoresist over the semiconductor layer; etching the semiconductor layer using the first photoresist to form a semiconductor island; forming an electrode over the semiconductor island; forming a second photoresist over and in contact with the semiconductor island and the electrode by using a multi-tone mask; exposing a top surface of the wiring by etching part of the gate insulating film using the second photoresist; exposing a top surface of the gate insulating film by ashing the second photoresist; forming a transparent conductive film over the second photoresist subjected to the ashing; removing the second photoresist and the transparent conductive film formed over the second photoresist together to form a pixel electrode; forming an insulating layer over the pixel electrode; performing second rear surface exposure to form a third photoresist over the insulating layer; performing a reflow process on the third photoresist; and etching the insulating layer using the third photoresist subjected to the reflow process, wherein the second photoresist subjected to the ashing is formed over and in direct contact with a first part of the gate insulating film, and wherein the first part of the gate insulating film is exposed by etching the insulating layer.