Patent ID: 9741919
Date: 2017-08-22
CPC Classifications: H01L

Claim:
1. A manufacturing method of a nano-scale superconducting quantum interference device, at least comprising the following steps of: S1: providing a substrate, and growing a first superconducting material layer thereon; S2: forming a photo-resist layer on a surface of the first superconducting material layer, and patterning the photo-resist layer, to expose the surface of the first superconducting material layer in a predetermined region; S3: etching the first superconducting material layer in the predetermined region, to expose the substrate, and to reserve remaining photo-resist; S4: covering a layer of insulation material on a top and a side of a structure obtained in step S3; S5: growing a second superconducting material layer on the insulation material, such that an upper surface of the second superconducting material layer in the predetermined region is flush with an upper surface of the first superconducting material layer; S6: removing the structure above the plane where the upper surface of the first superconducting material layer locates, to obtain a plane superconducting structure, in the middle of which at least one insulating interlayer is inserted; S7: on a surface of the plane superconducting structure, forming at least one nanowire vertical to the insulating interlayer and connecting the first superconducting material layer with the second superconducting material layer, so as to form two nano-junctions in parallel, to obtain the nano-scale superconducting quantum interference device.