Patent ID: 9536971
Date: 2017-01-03
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a transistor comprising a conductive gate within and projecting elevationally outward of a trench in semiconductive material; a gate dielectric within the trench between the conductive gate and the semiconductive material; the conductive gate comprising opposing laterally outermost vertically oriented conductive gate sidewalls that are elevationally outward of the semiconductive material laterally outward of semiconductive material sidewalls of the trench, “elevationally” and “laterally” being with respect to two different directions that are perpendicular relative to one another, the gate comprising opposing laterally inner vertically oriented conductive gate sidewalls elevationally outward of the semiconductive material; a dielectric spacer along each of the laterally outermost vertical gate sidewalls; and a dielectric vertical spacing layer elevationally inward of the laterally outermost vertical gate sidewall on each of opposing sides of the gate, the vertical spacing layer extending laterally outward and laterally inward relative to the laterally outermost vertical gate sidewall on each of the opposing sides of the conductive gates, at least one of the dielectric vertical spacing layers on one of the opposing sides of the gate having a first portion that is under the gate and above the semiconductive material on that one opposing gate side and having a second portion that is under the spacer and above the semiconductive material on that one opposing gate side, the first portion that is under the gate being elevationally thicker than the second portion that is under the spacer, the first portion having a laterally outer sidewall on that one opposing gate side, the dielectric spacer on that one opposing gate side being directly against the first portion laterally outer sidewall on that one opposing gate side, no part of the second portion on that one opposing gate side being directly against the conductive gate.