Patent ID: 9652407
Date: 2017-05-16
CPC Classifications: G06F

Claim:
1. A method for processing an error directory of a node in a Cache Coherence Non-Uniform Memory Access (CC-NUMA) system, comprising: when a quantity of bits of a correctable error of a directory stored in a directory memory of the node is greater than a preset threshold, controlling all processors in the CC-NUMA system to write dirty data in a corresponding cache back to a corresponding main memory, flush the dirty data, and directly flush clean data in the corresponding cache; controlling the CC-NUMA system to enter a quiescent state, wherein the quiescent state is used to indicate that none of the processors in the CC-NUMA system sends a request to the directory memory, and all the processors receive responses to all requests that have been sent; and clearing a record stored in the directory memory to zero, and controlling, after the zero clearing is completed, the CC-NUMA system to exit the quiescent state.