Patent ID: 9654001
Date: 2017-05-16
CPC Classifications: H01L,H02M

Claim:
1. A semiconductor device comprising: a semiconductor layer laminate disposed on a semiconductor substrate; a first low-side transistor disposed on the semiconductor layer laminate, and having a gate electrode, a source electrode, and a drain electrode; a second low-side transistor disposed on the semiconductor layer laminate, and having a gate electrode, a source electrode, and a drain electrode; a first high-side transistor disposed on the semiconductor layer laminate, and having a gate electrode, a source electrode, and a drain electrode; and a second high-side transistor disposed on the semiconductor layer laminate, and having a gate electrode, a source electrode, and a drain electrode, wherein the second low-side transistor is disposed between the first low-side transistor and the first high-side transistor, the first high-side transistor is disposed between the second low-side transistor and the second high-side transistor, the source electrode of the first low-side transistor and the source electrode of the second low-side transistor are combined into one common source electrode, the drain electrode of the first high-side transistor and the drain electrode of the second high-side transistor are combined into one common drain electrode, and the drain electrode of the second low-side transistor and the source electrode of the first high-side transistor are combined into one common first electrode.