Patent ID: 9666618
Date: 2017-05-30
CPC Classifications: H01L,H04N

Claim:
1. A pixel array comprising: a plurality of pixel structures, each pixel structure comprising: a first transfer gate control line connected to the first transfer gates of a first sub-set of the pixel structures in the array; a second transfer gate control line connected to the second transfer gates of a second sub-set of the pixel structures in the array, wherein the first sub-set of pixel structures and second sub-set of pixel structures partially overlap, having at least one pixel structure in common between them, wherein the second transfer gate is connected adjacent to the charge conversion element and is configured to be operated so as to adjust a capacitance of the charge conversion element between a high capacitance mode and a low capacitance mode when the second transfer gate is switched on or off, respectively, and wherein each pixel structure comprises a reset stage for resetting the photo-sensitive element, the reset stage comprising a first reset gate and a second reset gate, connected in series, between the photo-sensitive element and a reset supply line, the pixel array further comprising control logic which is arranged to control a start of an exposure period for the pixel by switching on the first reset gate and the second reset gate at the same time as operating the reset stage.