Patent ID: 9601207
Date: 2017-03-21
CPC Classifications: G06F,G11C,H01L

Claim:
1. A method of operating a semiconductor memory device including a plurality of cell string groups having pages stacked over a substrate, the plurality of cell string groups comprising first and second cell string groups, the first cell string group being commonly coupled to a first drain select line, the second cell string group being commonly coupled to a second drain select line, and the first cell string group and the second cell string group being commonly coupled to word lines, the method comprising: performing least significant bit programs to first pages of the first cell string group, the first pages being all of the pages in the first cell string group and being coupled to the word lines; performing most significant bit programs to the first pages after least significant bit programs to all of the first pages are performed; performing least significant bit programs to second pages of the second cell string group after most significant bit programs to the first pages are performed, the second pages being all of the pages in the second cell string group and being coupled to the word lines, and the second cell string group being adjacent to the first cell string group; and performing most significant bit programs to the second pages after least significant bit programs to the second pages are performed.