Patent ID: 9557378
Date: 2017-01-31
CPC Classifications: G01R,G06F

Claim:
1. A method comprising: manufacturing integrated circuit devices according to an integrated circuit design using manufacturing equipment, said integrated circuit design producing integrated circuit devices that are identically designed and perform at different operating speeds caused by manufacturing process variations; testing operating speeds of said integrated circuit devices using a tester to establish maximum frequency and minimum frequency at maximum voltage and minimum voltage; sorting said integrated circuit devices into voltage bins based on said operating speeds, said voltage bins comprising at least a first voltage bin with relatively-slow integrated circuit devices and a second voltage bin with relatively-fast integrated circuit devices, each integrated circuit having a lowest operating voltage capable of sustaining a required frequency; establishing a bin-specific voltage limit for each of said voltage bins needed for core performance at system use conditions; comparing said bin-specific voltage limit to core minimum chip-level functionality voltage at system maximum frequency and minimum frequency specifications; correlating system design evaluation of design maximum frequency and design minimum frequency at design maximum voltage and design minimum voltage conditions with tester evaluation of tested maximum frequency and tested minimum frequency at tested maximum voltage and tested minimum voltage conditions; establishing a chip-specific functionality voltage limit for said integrated circuit device; and setting initial system voltage for all integrated circuit devices from one of said voltage bins at a greater of said bin-specific voltage limit and said chip-specific functionality voltage limit.