Patent ID: 9608072
Date: 2017-03-28
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a first well region of a first conduction type formed in a surface layer section of a semiconductor substrate and configured to receive a first voltage; a second well region of a second conduction type formed in a surface layer section of the first well region and configured to receive a second voltage different from the first voltage; a charge extracting region of the first conduction type formed in a surface layer section of the second well region and configured to receive the first voltage; a region of the second conduction type in the semiconductor substrate and underneath the first well region; a first contact region of the first conduction type, and of a higher impurity concentration than that of the first well region, formed in the surface layer section of the first well region and configured to receive the first voltage; and a second contact region of the second conduction type, and of a higher impurity concentration than that of the second well region, formed in the surface layer section of the second well region and configured to receive the second voltage, the second contact region having the charge extracting region arranged in proximity thereto.