Patent ID: 9641069
Date: 2017-05-02
CPC Classifications: H02M

Claim:
1. A charge pump circuit comprising a plurality of stages, each stage of the charge pump circuit comprising: a first transistor, one of source and drain of the first transistor being output of the stage, the other one of source and drain of the first transistor being input of the stage; a second transistor, gate of the second transistor being connected to source of the first transistor, one of source and drain of the second transistor being connected to drain of the first transistor, the other one of source and drain of the second transistor being connected to gate of the first transistor, body of the second transistor being connected to body of the first transistor; a third transistor, gate of the third transistor being connected to drain of the first transistor, one of the source and drain of the third transistor being connected to source of the first transistor, the other one of source and drain of the third transistor being connected to body of the first transistor and body of the third transistor; a first capacitor having a first end connecting to gate of the first transistor and a second end being a driving end of the stage; a second capacitor connecting the output of the stage to a predetermined signal end; and a third capacitor connecting body of the first transistor to drain of the first transistor; wherein the plurality of stages comprises a first stage, a plurality of intermediate stages and a last stage; the driving end of each odd stage of the plurality of intermediate stages is driven by the output of a predetermined stage; and the driving end of each even stage of the plurality of intermediate stages is driven by the output of a stage next to the predetermined stage.