Patent ID: 9673332
Date: 2017-06-06
CPC Classifications: H01L

Claim:
1. A method of manufacturing a circuit substrate comprising a semiconductor element disposed on a transparent substrate, said method comprising: forming a gate wiring on the transparent substrate; forming a gate insulating film on the gate wiring; forming an island-shaped oxide semiconductor layer on the gate insulating film, overlapping the gate wiring on the transparent substrate; forming a patterned etch-stop layer made of an insulating material so as to cover a center portion of the island-shaped oxide semiconductor layer and expose a prescribed area of the island-shaped oxide semiconductor layer; depositing a conductive layer over an entire surface of the transparent substrate including the patterned etch-stop layer; forming a patterned resist on the conductive layer; and etching the conductive layer using the patterned resist as a mask to form a patterned conductive layer from the conductive layer, wherein the patterned conductive layer includes a source electrode, a source wiring line, and a drain electrode, and covers and electrically contacts a middle portion of the exposed prescribed area of the island-shaped oxide semiconductor layer, leaving respective portions of the prescribed area of the island-shaped oxide semiconductor layer on respective sides of said middle portion uncovered and exposed in a plan view, the step of etching continuing to etch and completely remove the exposed respective portions of the prescribed area of the island-shaped oxide semiconductor layer thereunder using the patterned conductive layer and the patterned etch-stop layer as a mask to form cutouts on respective sides of said middle portion in the island-shaped oxide semiconductor layer in the plan view.