Patent ID: 9614577
Date: 2017-04-04
CPC Classifications: G06F,H02H,H02J,H04B,H04J

Claim:
1. A method of synchronizing a first clock and a second clock located respectively at a first end and a second end of an AC power line, the method comprising: producing a first representation of an oscillating power line quantity by measuring the power line quantity at the first end of the power line, and time-stamping the first representation by the first clock; producing a second representation of the oscillating power line quantity by measuring the power line quantity at the second end of the power line, and time-stamping the second representation by the second clock; comparing the first and the second representations to determine a clock time offset between the first clock and the second clock; adjusting one or both of the first clock and second clock to reduce the determined clock time offset; and checking whether a Line Differential Protection function signals fault-free operation of the power line, wherein the adjusting of the one or both of the first clock and second clock does not occur until a fault-free operation is restored and signaled.