Patent ID: 9646686
Date: 2017-05-09
CPC Classifications: G11C

Claim:
1. A reconfigurable circuit comprising: circuit blocks arranged with a matrix of A rows and B columns, each of the circuit blocks comprising: M row conductive lines; N column conductive lines crossing the row conductive lines; output inverters each having input and output terminals, the input terminal of each output inverter connected to corresponding one of the row conductive lines; input inverters each having input and output terminals, the output terminal of each input inverter connected to corresponding one of the column conductive lines; and resistance change elements between the row conductive lines and the column conductive lines, each of the resistance change elements including a first terminal and a second terminal, the first terminal being connected to corresponding one of the row conductive lines, the second terminal being connected to corresponding one of the column conductive lines, the resistance change element between the m the reconfigurable circuit further comprising: an interconnection connected between the output terminal of the output inverter connected to the row conductive line in one of the circuit blocks and the input terminal of the input inverter connected to the column conductive line in the other one of the circuit blocks; and a row address replacement circuit for replacing address a