Patent ID: 9559683
Date: 2017-01-31
CPC Classifications: H02M,H03K,Y02B

Claim:
1. A circuit comprising: a first driver comprising a first output configured to be coupled to a control node of a normally-off transistor, the first driver configured to drive a first switching signal at the first output in a cascode mode and configured to drive a first constant voltage at the first output in a direct drive mode, wherein the normally-off transistor has a first load path between a first load path terminal of the normally-off transistor and a second load path terminal of the normally-off transistor; and a second driver comprising a second output configured to be coupled to a control node of a normally-on transistor, the second driver configured to drive a second switching signal at the second output in the direct drive mode and configured to drive a static signal at the second output in the cascode mode, wherein the normally-on transistor has a second load path between a third load path terminal of the normally-on transistor and a fourth load path terminal of the normally-on transistor, the second load path terminal of the normally-off transistor is coupled to the third load path terminal of the normally-on transistor.