Patent ID: 9659785
Date: 2017-05-23
CPC Classifications: H01L

Claim:
1. A semiconductor device, comprising: a fin patterned in a substrate, a length of the fin defined by a longitudinal axis, and a width of the fin defined by a transverse axis, the length being greater than the width, and the fin having a first distal endwall and a second distal endwall arranged on opposing ends of the fin along the longitudinal axis; a bilayer liner disposed onto the first distal endwall, the bilayer liner comprising an oxide layer and a hard mask material layer; and a monolayer liner disposed onto the second distal endwall, the monolayer liner comprising an oxide layer, and the oxide layer of the monolayer liner having a thickness that is greater than a thickness of the oxide layer of the bilayer liner; wherein the bilayer liner and the monolayer liner are partially recessed with respect to a top surface of the fin.