Patent ID: 9632968
Date: 2017-04-25
CPC Classifications: G06F,Y02D

Claim:
1. A method for implementing inter-processor communication, comprising: pairing a first plurality directional wireless transmitters/receivers individually connected to a plurality of CPU cores with a cooperating second plurality of directional wireless transmitters/receivers individually connected to a plurality of ports in a bus interface: and implementing, with a processor, an inter-processor communication scheme between the plurality of CPU cores via a plurality of individual wireless communication links established between cooperating pairs of the first plurality of CPU core-connected directional wireless transmitters/receivers and the second plurality of interface port-connected directional wireless transmitters/receivers; wherein inter-processor communication is selectively done through mmWave radios operating at a same frequency or at a different frequency; wherein the plurality of individual wireless communication links supporting data transmission rates greater than 6 Gbps; wherein sub-carrier frequencies for the plurality of individual wireless communication links being individually selectable.