Patent ID: 9613945
Date: 2017-04-04
CPC Classifications: H01L,H03K

Claim:
1. A semiconductor device, comprising: a semiconductor substrate of a first conductivity type; a first semiconductor region of a second conductivity type that is selectively formed in a surface layer of a front surface of the semiconductor substrate; a second semiconductor region of the first conductivity type that is selectively formed in the first semiconductor region; a third semiconductor region of the second conductivity type that is selectively formed in the first semiconductor region and separated from the second semiconductor region and that has a higher impurity concentration than the first semiconductor region; a fourth semiconductor region of the first conductivity type that is selectively formed on the front surface of the semiconductor substrate with an insulating film interposed therebetween, said fourth semiconductor region being made of a polycrystalline silicon layer; a fifth semiconductor region of the second conductivity type that is selectively formed on the front surface of the semiconductor substrate with said insulating film interposed therebetween, said fifth semiconductor region being made of a polycrystalline silicon layer that contacts the fourth semiconductor region; a first electrode that contacts the second semiconductor region and the fourth semiconductor region; a second electrode that contacts the third semiconductor region; and a third electrode that contacts the fifth semiconductor region, wherein the first semiconductor region faces the fourth semiconductor region and the fifth semiconductor region in a depth direction.