Patent ID: 9679784
Date: 2017-06-13
CPC Classifications: G02B,H01L,H01S

Claim:
1. A method for fabricating an optical subassembly comprising: fabricating a top layer silicon wafer, the top layer silicon wafer comprising a plurality of individual units of a top layer; fabricating a base layer silicon wafer, the base layer silicon wafer comprising a plurality of individual units of a base layer; aligning and bonding the top layer silicon wafer and the base layer silicon wafer thereby forming a first wafer assembly; assembling a plurality of active optoelectronic elements onto the first wafer assembly; fabricating a glass wafer; aligning and bonding the glass wafer to the first wafer assembly thereby forming a second wafer assembly; and dicing the second wafer assembly into individual optical subassemblies; wherein: the step of fabricating the top layer silicon wafer comprises etching a primary cavity and a plurality of peripheral cavities on each individual unit of the top layer; and the active optoelectronic elements are assembled within the primary cavities of the first wafer assembly.