Patent ID: 9666799
Date: 2017-05-30
CPC Classifications: H01L

Claim:
1. A memory device, comprising: a substrate having a major surface; and a first stack comprising an alternating plurality of electrically conductive lines elongated in a first direction substantially parallel to the major surface of the substrate and electrically insulating lines elongated in the first direction, wherein: wherein the memory device further comprises: a read/write memory material at least partially filling each of the first plurality of recesses; and an electrically conductive bit line elongated in a third direction substantially perpendicular to the major surface of the substrate, wherein the electrically conductive bit line is in electrical contact with the read/write memory material, wherein for each one of the first plurality of recesses, the read/write memory material partially fills the recess and a protective material different from the read/write memory material and different from a material of the electrically conductive bit line fills a remainder of the recess.