Patent ID: 9536983
Date: 2017-01-03
CPC Classifications: H01L

Claim:
1. A method of forming a semiconductor device, comprising: forming a gate electrode on a substrate; forming a first spacer on a sidewall of the gate electrode; forming a gate dielectric pattern between the gate electrode and the first spacer; forming a second spacer that is spaced apart from the gate electrode on an outer sidewall of the first spacer, wherein the first spacer is interposed between the second spacer and the gate electrode; forming a capping pattern on top surfaces of the gate electrode, the first spacer and the second spacer, wherein a sidewall of the capping pattern is vertically aligned with an outer sidewall of the second spacer; and forming a contact adjacent to a sidewall of the gate electrode and electrically connected to the substrate, wherein the contact is in direct contact with the sidewall of the capping pattern, the outer sidewall of the second spacer, and the lower portion of the outer sidewall of the first spacer.