Patent ID: 9704740
Date: 2017-07-11
CPC Classifications: H01L

Claim:
1. A method of manufacturing a semiconductor device comprising: forming a first insulating layer over a semiconductor substrate, the insulating layer containing oxygen; forming a first wire in the first insulating layer; forming a second insulating layer over the first insulating layer and the first wire, the second insulating layer containing oxygen; selectively removing the second insulating layer to form a first groove and a second groove over the first insulating layer; selectively removing the second insulating layer on the inner wall of the first groove to form a first opening exposing the first wire formed under the first groove; forming a first metal layer over the inner wall of the first groove, the second groove and the first opening, the first metal layer containing manganese; forming a second metal layer in the first groove, the second groove and the first opening, the second metal layer containing copper; forming, in the second groove, a plurality of oxide structures which projects from a bottom portion of the second groove; and performing a heat treatment to form a barrier layer between the second metal layer and the second insulating layer, the barrier layer containing manganese oxide.