Patent ID: 9641102
Date: 2017-05-02
CPC Classifications: H01L,H02M,H02P

Claim:
1. A semiconductor device comprising: a first chip mounting part including a first portion and a second portion; a second chip mounting part; a third chip mounting part; a first semiconductor chip mounted on the first portion of the first chip mounting part, and having a first power transistor; a second semiconductor chip mounted on the second chip mounting part, and having a second power transistor; a third semiconductor chip mounted on the second portion of the first chip mounting part, and having a third power transistor; a fourth semiconductor chip mounted on the third chip mounting part, and having a fourth power transistor; a first lead; a second lead formed integrally with the second portion of the first chip mounting part; a third lead; a fourth lead formed integrally with the first portion of the first chip mounting part; and a sealing member sealing the first chip mounting part to the third chip mounting part, the first semiconductor chip to the fourth semiconductor chip, a part of the first lead, a part of the second lead, a part of the third lead, and a part of the fourth lead, the sealing member including an upper surface, a lower surface positioned on an opposite side of the upper surface, a first side surface positioned between the upper surface and the lower surface in a thickness direction, and a second side surface facing the first side surface, wherein the first chip mounting part to the third chip mounting part are arranged along a first direction in which the first side surface of the sealing member extends, wherein the second chip mounting part is arranged between the first portion of the first chip mounting part and the second portion of the first chip mounting part when seen in a plan view, wherein the second portion of the first chip mounting part is arranged between the second chip mounting part and the third chip mounting part when seen in a plan view, wherein each of the first lead, the second lead, the third lead and the fourth lead includes a protruding portion protruding from the first side surface of the sealing member, wherein the protruding portion of the second lead includes a part capable of being connected to a mounting substrate, wherein a first rear surface electrode of the first semiconductor chip and a third rear surface electrode of the third semiconductor chip are electrically connected with each other via the first chip mounting part, wherein a second rear surface electrode of the second semiconductor chip is electrically connected with the second chip mounting part, wherein a fourth rear surface electrode of the fourth semiconductor chip is electrically connected with the third chip mounting part, wherein a first front surface electrode of the first semiconductor chip and the second chip mounting part are electrically connected with each other via a first conductive member, wherein a second front surface electrode of the second semiconductor chip and the first lead are electrically connected with each other via a second conductive member, wherein a third front surface electrode of the third semiconductor chip and the third chip mounting part are electrically connected with each other via a third conductive member, and wherein a fourth front surface electrode of the fourth semiconductor chip and the third lead are electrically connected with each other via a fourth conductive member.