Patent ID: 9627335
Date: 2017-04-18
CPC Classifications: H01L

Claim:
1. A method for processing a semiconductor workpiece, comprising: depositing a first metallization layer over a semiconductor workpiece; patterning the first metallization layer; depositing a third metallization layer over the semiconductor workpiece and patterning the third metallization layer, wherein depositing the first metallization layer over the semiconductor workpiece comprises depositing the first metallization layer over the third metallization layer; and depositing a second metallization layer over the patterned first metallization layer, wherein depositing the second metallization layer comprises an electroless deposition process comprising immersing the patterned first metallization layer in a metal electrolyte, wherein the second metallization layer is not subsequently patterned after deposition; wherein depositing the second metallization layer over the patterned first metallization layer comprises covering a top side and all sidewalls of the patterned first metallization layer and all sidewalls of the patterned third metallization layer with the second metallization layer, and wherein the semiconductor workpiece comprises an electrically conductive area and the third metallization layer is deposited directly on the electrically conductive area, wherein the second metallization layer is a final metallization layer comprising gold, and the first metallization layer comprises nickel vanadium, and the third metallization layer comprises titanium.