Patent ID: 9553057
Date: 2017-01-24
CPC Classifications: H01L,H01P

Claim:
1. A method of forming an E-plane probe comprising: forming a plurality of monolithically integrated circuits on a wafer, each monolithically integrated circuit comprising: mounting the wafer on an ultra-violet (UV) tape; cutting the wafer with a laser at a first power and a first linear cutting speed along vertical streets and then along horizontal streets, the vertical and horizontal streets separating each monolithically integrated circuit onto a separate substrate cut from the wafer; turning the laser off and directing the laser via the previously cut vertical and horizontal streets to a location to cut a rectangle or a portion of a rectangle from one or more of the separate substrates to form one or more narrow substrate extensions on one or more of the substrates; turning the laser on while the laser is positioned on a vertical or horizontal street; cutting with the laser at a second power and a second linear cutting speed a rectangle or a portion of a rectangle from one or more of the separate substrates to form one or more narrow substrate extensions on one or more of the substrates; repeating for each rectangle or portion of a rectangle to be cut the steps of: curing the ultra-violet (UV) tape to remove each monolithically integrated circuit from the UV tape; wherein the E-plane probes are on the narrow substrate extensions.