Patent ID: 9558974
Date: 2017-01-31
CPC Classifications: H01L

Claim:
1. A semiconductor processing station, comprising: a first platform having a first load lock, a first plurality of processing chambers, and at least one first platform robot within the first platform arranged to transfer a wafer between the first plurality of processing chambers for processing the wafer; a second platform having a second load lock, a second plurality of processing chambers, and at least one second platform robot within the second platform arranged to transfer the processed wafer between the second plurality of processing chambers for additional processing; and a vacuum tunnel connecting the first and the second load locks, wherein the vacuum tunnel has a first side adjacent to the first platform and a second side opposite to the first side and adjacent to the second platform, wherein one of the at least one first platform robot is arranged to directly transfer, via a first single robot arm, the wafer between two of the first plurality of processing chambers and directly transfer, via said first single robot arm, the wafer between the first load lock and the first plurality of processing chambers, and wherein one of the at least one second platform robot is arranged to directly transfer, via a second single robot arm, the wafer between two of the second plurality of processing chambers and directly transfer, via said second single robot arm, the wafer between the second load lock and the second plurality of processing chambers.