Patent ID: 9742428
Date: 2017-08-22
CPC Classifications: G06F,H03M

Claim:
1. A delta-sigma modulator comprising: a loop filter; a quantizer configured to convert an analog signal into a digital signal; and a digital-to-analog converter (DAC) configured to receive the digital signal, and including a first capacitor and a second capacitor, wherein in a first sampling period, the first capacitor is discharged, and at the same time, the second capacitor is charged with a reference voltage, in a second sampling period, the digital signal includes a noise caused by a clock jitter, the first capacitor is charged with the reference voltage, and the second capacitor is discharged and generates a charge corresponding to the noise, and in a subsequent first sampling period that is after the second sampling period, the first capacitor is discharged, and at the same time, the second capacitor generates a noise current corresponding to the noise using the charge and is charged with the reference voltage.