Patent ID: 9548314
Date: 2017-01-17
CPC Classifications: H01L

Claim:
1. A method for forming a semiconductor device, comprising: forming a select gate over a substrate; forming a charge storage layer and a control gate over the select gate, wherein the charge storage layer and control gate overlap a first sidewall of the select gate and the charge storage layer is between the select gate and the control gate; forming a protective spacer, wherein the protective spacer has a first portion adjacent a first sidewall of the charge storage layer and on the substrate; thinning the protective spacer; forming logic gates for logic devices, wherein the thinning of the protective spacer occurs during the forming the logic gates; and after the thinning the protective spacer, forming a sidewall spacer over the protective spacer, wherein the sidewall spacer has a first portion on the substrate, and the first portion of the protective spacer is between the first sidewall of the control gate and the first portion of the sidewall spacer.