Patent ID: 9710008
Date: 2017-07-18
CPC Classifications: G05F

Claim:
1. A fast start-up power circuit, comprising: a) a current source configured to provide current to the start-up circuit; b) a current mirror circuit configured to receive current from said current source, wherein a first transistor of the current mirror circuit is directly connected to the current source, a second transistor of the current mirror circuit provides current via an enable switch to a first terminal of an transistor of an input driver circuit and a third transistor of the current mirror circuit provides a reference current; c) said input driver circuit, configured to control a current mirror network, comprising said transistor of the input driver circuit, wherein a gate of said transistor is directly connected to the first terminal of said transistor and a second terminal of said transistor is connected to ground, said enable switch, an amplifier, configured to keep a gate voltage of the current mirror network at the same potential as a gate voltage of said transistor until the start-up phase is completed, while both gate voltages are connected only via the amplifier during start-up phase, wherein the amplifier is disabled upon completion of the start-up phase; d) said current mirror network comprising a plurality of transistors, whose gates are all connected together, wherein one terminal of each transistor of the current mirror network is connected to ground, wherein a first transistor of the current mirror network provides drive current for a comparison with the reference current generated by the third transistor of the current mirror circuit, wherein each of the other transistors of the current mirror network generates bias current; e) said amplifier; f) a trigger circuitry, which is configured to set a signal when a current comparator detects that the reference current is higher than the current generated by the first transistor of the current mirror network and, if it so, the first control switch is opened; g) said first control switch configured to be open during start-up phase only; h) a capacitor connected between the gate of the first transistor of the current mirror network and ground.