Patent ID: 9666719
Date: 2017-05-30
CPC Classifications: H01L

Claim:
1. A method for manufacturing a semiconductor device, comprising the steps of: forming a gate electrode layer over a substrate; forming a first gate insulating film over the gate electrode layer; performing a first plasma treatment on the first gate insulating film; forming a second gate insulating film over the first gate insulating film; forming an oxide semiconductor layer over the second gate insulating film; performing a second plasma treatment on the oxide semiconductor layer in an atmosphere containing Cl forming a channel protective layer over the oxide semiconductor layer; forming a pair of buffer layers over the oxide semiconductor layer; and forming source and drain electrode layers over the pair of buffer layers, wherein the pair of buffer layers covers edge portions of the oxide semiconductor layer, wherein a carrier concentration of the pair of buffer layers is higher than that of the oxide semiconductor layer, and wherein the oxide semiconductor layer and the source and drain electrode layers are electrically connected to each other through the pair of buffer layers.