Patent ID: 9581644
Date: 2017-02-28
CPC Classifications: G01R,G06F

Claim:
1. A digital integrated circuit simulation method, comprising: obtaining, by a computing device, a circuit diagram of the digital integrated circuit, as described in a computing language, and a checkpoint in the circuit diagram; determining, by the computing device, a point relevant to a boundary between a two-value simulation and a multi-value simulation in the circuit diagram and a state of the relevant point according to the checkpoint, the two-value simulation being representative of a one logical bit with only binary value 0 and 1 and the multi-value simulation being representative of a one logic bit by multiple values; determining, by the computing device, a boundary position, as well as a boundary type of the boundary position, of the boundary between the two-value simulation and the multi-value simulation in the circuit diagram according to the relevant point and the state of the relevant point; inserting, by the computing device, a conversion circuit at the boundary position according to the boundary type of the boundary position; and modeling and simulating, by the computing device, the circuit diagram into which the conversion circuit is inserted.