Patent ID: 9544638
Date: 2017-01-10
CPC Classifications: H04L,H04N

Claim:
1. In a communications system, a clock recovery apparatus to recover an encoder clock for received packets, comprising: a packet receiver configured to detect packet count information and a transport rate value embedded in the received packets and that is representative of the encoder clock for the received packets; a voltage controlled oscillator for generating a local system time clock, the voltage controlled oscillator having an input that allows a frequency of the local system time clock to be adjusted in proportion to a control signal received on the input; a feedback loop adapted to output an error signal that represents a difference between the frequency of the local system time clock and a frequency of the encoder clock; and a low-pass filter circuit adapted to filter the error signal for input to the voltage controlled oscillator, wherein the packet receiver includes a packet timing extractor for outputting timestamp data that is representative of the encoder clock based on the packet count information and the transport rate value, and wherein the feedback loop further comprises a counter to output local timestamp data whose value increments with cycles of the local system time clock, the counter having an input that initializes its output value, and a jitter calculator to output the error signal equal to a difference between the local timestamp data from the counter and the timestamp data from the packet receiver.