Patent ID: 9608650
Date: 2017-03-28
CPC Classifications: H03L

Claim:
1. A device for controlling a single-phase phase-locked loop (PLL), comprising a first finite impulse response (FIR) filter, a second FIR filter and a Park converter, wherein each of the first FIR filter and the second FIR filter is connected to the Park converter, and configured to perform FIR filtration on a collected power grid voltage signal so as to acquire a filtered signal, and output the filtered signal to the Park converter; a first filtered signal (Vα) outputted by the first FIR filter and a second filtered signal (Vβ) outputted by the second FIR filter form a set of virtual two-phase signals in an αβ coordinate system; and the Park converter is configured to perform Park conversion on the first filtered signal (Vα) and the second filtered signal (Vβ), so as to output a set of two-phase signals comprising a first two-phase signal (Vd) and a second two-phase signal (Vq) in a dq coordinate system.