Patent ID: 9704781
Date: 2017-07-11
CPC Classifications: H01L

Claim:
1. A semiconductor die, comprising: a semiconductor material having solid-state components; a plurality of interconnects extending at least partially through the semiconductor material; and a plurality of under-bump metal (UBM) structures, wherein individual UBM structures are electrically coupled to corresponding interconnects and the individual UBM structures comprise a first material electrically coupled to one of the interconnects, a second material electrically coupled to the first material, and a suppressant material on the second material, wherein the second material is positioned between the first material and the suppressant material, wherein the second material has a top surface above the interconnect and the suppressant material is directly on the top surface of the second material, wherein the first material is positioned between the suppressant material and at least one of the interconnects, and wherein the first material has a first electrical potential, the second material has a second electrical potential, and the suppressant material reduces a difference in electrical potential between the first and second materials.