Patent ID: 9733303
Date: 2017-08-15
CPC Classifications: B60L,G01R,Y02T

Claim:
1. An interlock detector comprising: a first differential input of the interlock detector configured to connect to a signal loop of an interlock circuit to receive a first signal from an interlock generator arranged in the signal loop of the interlock circuit; an output of the interlock detector configured to connect to a microprocessor and provide the microprocessor with a second signal; a differential amplifier circuit having at least one amplifier, the differential amplifier circuit having a first input, a second input, and an output, the first input of the differential amplifier circuit and the second input of the differential amplifier circuit being connected to the first differential input of the interlock detector; a comparator circuit having at least one comparator, the comparator circuit having an input and an output, the input of the comparator circuit being connected to the output of the differential amplifier circuit, the output of the comparator circuit being connected to the output of the interlock detector; at least one second input of the interlock detector configured to receive at least one a diagnosis signal, the at least one second input of the interlock detector being connected at least one of (i) the input of the comparator circuit, (ii) the first input of the differential amplifier circuit, and (iii) the second input of the differential amplifier circuit.