Patent ID: 9589804
Date: 2017-03-07
CPC Classifications: H01L

Claim:
1. A method for forming a semiconductor device, comprising: recessing a semiconductor substrate to form a plurality of isolation regions in the semiconductor substrate and at least one semiconductor fin between the isolation regions and over top surfaces of the isolation regions, wherein the at least one semiconductor fin has a top surface, a first side surface adjacent to the top surface, and a second side surface which is formed under and adjacent to the first side surface; forming a lining oxide layer conformal to the at least one semiconductor fin; forming a silicon nitride based layer conformal to the lining oxide layer; forming a plurality of trench isolation structures on the isolation regions to peripherally enclose the silicon nitride based layer on the second side surface; and converting the silicon nitride based layer on the top surface and the first side surface into a gate oxide layer.