Patent ID: 9704562
Date: 2017-07-11
CPC Classifications: G11C,H01L

Claim:
1. A semiconductor device comprising: a sense amplifier circuit comprising a first sense amplifier and a second sense amplifier; and a cell array over the sense amplifier circuit, the cell array comprising first to fourth memory cells, wherein the first memory cell and the second memory cell are electrically connected to the first sense amplifier through a first bit line and a second bit line, respectively, wherein the third memory cell and the fourth memory cell are electrically connected to the second sense amplifier through a third bit line and a fourth bit line, respectively, wherein each of the first sense amplifier and the second sense amplifier is electrically connected to a first global bit line and a second global bit line, and wherein the sense amplifier circuit is configured to select one of potentials of the first to fourth bit lines and output a selected potential to the first global bit line or the second global bit line.