Patent ID: 9589957
Date: 2017-03-07
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a substrate including a first region and a second region; an inter-layer insulating film disposed on the substrate, and including a first trench on the first region of the substrate and a second trench on the second region of the substrate; a first metal gate structure disposed in the first trench; a second metal gate structure disposed in the second trench; a first work-function metal layer disposed in the first trench; and a second work-function metal layer disposed in the second trench, wherein a topmost surface of the first work-function metal layer is higher than a topmost surface of the second work-function metal layer, and wherein a top portion of the first metal gate structure is wider than a bottom portion of the first metal gate structure, a top portion of the second metal gate structure is wider than a bottom portion of the second metal gate structure, and the bottom portion of the second metal gate structure is wider than the bottom portion of the first metal gate structure.