Patent ID: 9613667
Date: 2017-04-04
CPC Classifications: G11C

Claim:
1. A data storage device comprising: a memory device suitable to perform an internal operation in response to a command set; a processor suitable to generate command generation information for the command set; and a command set processing block suitable to determine at least one pattern based on the command generation information, generate at least one base sequence corresponding to the pattern, and generate the command set based on the base sequence, wherein the base sequence is configured by a plurality of signals, wherein the command set processing block includes: a finite state machine suitable to generate the plurality of signals by performing state transition between a plurality of states corresponding to the plurality of signals based on timing information and enabling only a signal corresponding to a current state among the plurality of signals, and a waveform generation circuit suitable to generate a final sequence by applying a logic calculation to the base sequence using the plurality of signals and generate the command set based on the final sequence.