Patent ID: 9740225
Date: 2017-08-22
CPC Classifications: G05F,H02M,H03F,H03G

Claim:
1. A low dropout regulator circuit, comprising: a first stage having a reference voltage as a first input and a feedback voltage as a second input, the first stage generating a first output voltage; a second stage configured to receive the first output voltage and to generate a second output voltage; a third stage configured to receive the second output voltage and to generate a third output voltage, the third output voltage being an output voltage at an output terminal of the low dropout regulator circuit; a fourth stage configured to receive the second output voltage and to generate a fourth output voltage; and a feedback stage configured to receive the fourth output voltage and the third output voltage and to generate a feedback voltage that is controlled by a first feedback factor of a main loop and a second feedback factor of a replica feedback frequency compensation (RFFC) loop of the low dropout regulator circuit.