Patent ID: 9704736
Date: 2017-07-11
CPC Classifications: H01L

Claim:
1. A method for fabricating a semiconductor device, comprising: providing a structure comprising a stressor layer stack on a first surface of a semiconductor substrate; forming an interfacial release layer on a second exposed surface of the semiconductor substrate; bonding the interfacial release layer to a rigid handle substrate using an epoxy adhesive; removing at least a portion of the stressor layer stack from the semiconductor substrate; processing the semiconductor substrate; applying a back contact layer to the semiconductor layer; isolating cells in the back contact layer in the semiconductor substrate; and removing the semiconductor substrate from the interfacial release layer using a pressure-sensitive carrier tape to impart flexibility to the semiconductor substrate; wherein isolating cells in the back contact layer in the semiconductor substrate comprises patterning the back contact layer and etching the back contact layer and semiconductor substrate down to the epoxy adhesive.