Patent ID: 9733662
Date: 2017-08-15
CPC Classifications: G05F,H03L

Claim:
1. A bias generator comprising: a bias generator circuit; a master startup circuit that is configured to apply a first startup current to a first node in the bias generator circuit; a second startup circuit that is configured to apply a second startup current to additional nodes in the bias generator circuit; and a power switch that is configured to receive power from a power supply and provide power to the bias generator circuit, wherein the master startup circuit is configured to receive a first timing control signal, the second startup circuit is configured to receive a second timing control signal, the second timing control signal is a delayed version of the first timing control signal, the power switch, the master startup circuit, and the second startup circuit are turned on in a desired order, and both the first timing control and the second timing control signal are applied to the master startup circuit.