Patent ID: 9607896
Date: 2017-03-28
CPC Classifications: H01L

Claim:
1. A method of preparing semiconductor dies from a semiconductor wafer having a plurality of fabrication regions separated by dicing lines on the top side of the wafer, and an adhesive coating on the back side of the wafer, comprising: partially dicing the wafer to a depth to form fabrication regions and dicing lines on the top side of the wafer; applying on the top side of the wafer a repellent material to the fabrication regions and partially diced lines to form plugged dicing lines where the adhesive coating is not intended to be printed, and allowing the repellent material to harden; laminating backgrinding tape onto the top side of the wafer and over the hardened repellent material, and backgrinding the back side of the wafer to meet the depth of the plugged dicing lines to expose portions of repellant material and form a supported set of dies; applying the adhesive coating to the back side of the supported set of dies and exposed portions of repellant material, wherein upon contact, the adhesive coating is chemically repelled off of the exposed portions of repellent material; partially curing the adhesive coating; laminating dicing tape onto the partially cured adhesive coating of the supported set of dies and removing the back grinding tape; removing the repellent material from the fabrication regions and plugged dicing lines; and separating the supported set of dies along the dicing lines into individual dies.