Patent ID: 9613879
Date: 2017-04-04
CPC Classifications: H01L,H03K

Claim:
1. A complementary metal-oxide-semiconductor (CMOS) logic device formed with single-walled carbon nanotubes (SWCNTs), comprising: at least one p-type metal-oxide-semiconductor (PMOS) thin-film transistor (TFT) formed with the SWCNTs, wherein each of the at least one PMOS TFT has a gate, a source and a drain; and at least one n-type metal-oxide-semiconductor (NMOS) TFT formed with the SWCNTs, wherein each of the at least one NMOS TFT has a gate, a source and a drain, wherein the gate of each of the at least one PMOS TFT and the gate of each of the at least one NMOS TFT is configured to alternatively receive at least one input voltage; wherein at least one of the drain of the at least one PMOS TFT and the drain of the at least one NMOS TFT is configured to output an output voltage V wherein the gate of each of the at least one PMOS TFT and the gate of each of the at least one NMOS TFT respectively comprises a local metallic gate structure formed of a metal; wherein a threshold voltage of the at least one PMOS TFT and a threshold voltage of the at least one NMOS TFT are symmetric; and wherein each of the at least one NMOS TFT is chemically doped with benzyl viologen.