Patent ID: 9698275
Date: 2017-07-04
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: a first oxide semiconductor layer; a second oxide semiconductor layer over the first oxide semiconductor layer; a third oxide semiconductor layer over the second oxide semiconductor layer; and a gate electrode layer comprising a region overlapping with the first oxide semiconductor layer, the second oxide semiconductor layer and the third oxide semiconductor layer, wherein energy at a bottom of a conduction band of the second oxide semiconductor layer is lower than energy at a bottom of a conduction band of the first oxide semiconductor layer and energy at a bottom of a conduction band of the third oxide semiconductor layer, wherein the bottom of the conduction band of the first oxide semiconductor layer and the bottom of the conduction band of the second oxide semiconductor layer are continuously connected in an energy band diagram, wherein the bottom of the conduction band of the second oxide semiconductor layer and the bottom of the conduction band of the third oxide semiconductor layer are continuously connected in the energy band diagram, and wherein the third oxide semiconductor layer covers and is in contact with a side surface of the first oxide semiconductor layer and a top surface and a side surface of the second oxide semiconductor layer.