Patent ID: 9607539
Date: 2017-03-28
CPC Classifications: G09G

Claim:
1. A drive circuit capable of reducing a voltage level changing frequency of a select signal, wherein the drive circuit is employed to control a pixel array in a corresponding display panel to show images, and the drive circuit comprises: a data signal providing module, generating a data signal, and the data signal is provided to the pixel array; a first select signal generation module, providing a first select signal; a second select signal generation module, providing a second select signal; and a select module, and the select module comprises: at least two select switch combinations, and the select switch combination is electrically coupled to the first select signal generation module, the second select signal generation module, the data signal providing module and the pixel array, and the select switch combination receives the first select signal, the second select signal and the data signal, and outputs the data signal to the pixel array according to the first select signal and the second select signal; the select switch combination comprises: a first switch, and the first switch is electrically coupled to the first select signal generation module, the data signal providing module and a first pixel column in the pixel array, wherein the first switch is directly electrically coupled between the first pixel column and the data signal providing module; a second switch, and the second switch is electrically coupled to the second select signal generation module, the data signal providing module and a second pixel column in the pixel array, wherein the second switch is directly electrically coupled between the second pixel column and the data signal providing module; a third switch, and the third switch is electrically coupled to the first select signal generation module and the data signal providing module; and a fourth switch, and the fourth switch is electrically coupled to the second select signal generation module, the third switch and a third pixel column in the pixel array; the drive circuit further comprises a scan signal providing module, and the scan signal providing module is electrically coupled to the pixel array, and the scan signal providing module generates a scan signal, and sends the same to the pixel array, wherein the first select signal generation module controls the data signal to be inputted to the first pixel column in the pixel array, the second select signal generation module controls the data signal to be inputted to the second pixel column in the pixel array, and the first select signal generation module and the second select signal generation module control the data signal to be inputted to the third pixel column in the pixel array.