Patent ID: 9639415
Date: 2017-05-02
CPC Classifications: G06F

Claim:
1. A method for salvaging a hardware transaction, the method comprising: executing, by a processor, a first salvage checkpoint instruction in a code region during transactional execution of the code region of a hardware transaction; based on the executing the first salvage checkpoint instruction, recording, by the processor, transaction state information comprising an address of the first salvage checkpoint instruction within the code region, wherein at least a portion of a speculative state of the transactional execution is a speculative store stored in a gathering store cache; detecting, by the processor, a pending point of failure in the code region during the transactional execution; based on the detecting, determining, by the processor, that transaction state information has been recorded; and based on the detecting, transferring control to an about-to-fail handler; and based on executing the about-to-fail handler, returning to the execution of the code region of the transaction at the address of the first salvage checkpoint instruction.