Patent ID: 9613976
Date: 2017-04-04
CPC Classifications: H01L

Claim:
1. A semiconductor memory device, comprising: a substrate; a stacked body provided on the substrate, and including a plurality of electrode films and a plurality of insulating films, each of the plurality of electrode films and each of the plurality of insulating films being alternately stacked along a first direction; a semiconductor pillar provided in the stacked body, and extending in the first direction of the plurality of electrode films; a memory film provided between the semiconductor pillar and the plurality of electrode films; a partitioning member provided in the stacked body; a first interlayer insulating film provided on the stacked body; and a first plug provided in the first interlayer insulating film, the first plug being connected to the semiconductor pillar, a central axis of the first plug being shifted from a central axis of the semiconductor pillar, and a distance between the central axis of the first plug and a central axis of a nearest partitioning member being smaller than a distance between the central axis of the semiconductor pillar and the central axis of the nearest partitioning member.