Patent ID: 9658164
Date: 2017-05-23
CPC Classifications: B82Y,G01N,Y10S

Claim:
1. An optical sensing chip, comprising: a substrate, wherein the substrate has an insulating layer, at least one insulating oxide layer thereon and an electrode pattern located under the at least one insulating oxide layer, wherein the electrode pattern is directly disposed on the insulating layer and the at least one insulating oxide layer conformally covers a top surface and sidewalls of the electrode pattern; an isolation layer, covering the substrate and disposed over the at least one insulating oxide layer, wherein the isolation layer has at least one opening; and a three-dimensional nanostructure array, disposed directly on the at least one insulating oxide layer and over the substrate, wherein a position of the electrode pattern corresponds to a position of the three-dimensional nanostructure array, the three-dimensional nanostructure array is exposed to contact an analyte to be detected, and the three-dimensional nanostructure array comprises a plurality of three-dimensional nanostructures arranged in rows and columns, and any of the plurality of three-dimensional nanostructures comprises at least one three-dimensional polymer structure and a metal layer conformally covering the at least one three-dimensional polymer structure, wherein the metal layer also covers a surface of the at least one insulating oxide layer that is not covered by the plurality of three-dimensional nanostructures, wherein the plurality of three-dimensional nanostructures serves as surface plasmon resonance structures, while the electrode pattern serves as an electrostatic manipulation electrode.