Patent ID: 9627494
Date: 2017-04-18
CPC Classifications: H01L

Claim:
1. A pillar-shaped semiconductor device comprising: a semiconductor pillar standing on a substrate in a direction perpendicular to a flat surface of the substrate; a first interlayer insulating layer in the semiconductor pillar; a first impurity region containing donor or acceptor atoms, the first impurity region in the semiconductor pillar in contact with the first interlayer insulating layer and under the first interlayer insulating layer; a second impurity region containing donor or acceptor atoms, the second impurity region being in the semiconductor pillar in contact with the first interlayer insulating layer and above the first interlayer insulating layer; a first alloy layer in the semiconductor pillar and around an outer periphery of the semiconductor pillar, the first alloy layer in contact with a side surface of the first impurity region; a second alloy layer in the semiconductor pillar and around the outer periphery of the semiconductor pillar, the second alloy layer in contact with a side surface of the second impurity region; and a second interlayer insulating layer between the first alloy layer and the second alloy layer and having a side surface at a distance from a side surface of the semiconductor pillar.