Patent ID: 9553189
Date: 2017-01-24
CPC Classifications: H01L

Claim:
1. A semiconductor structure, comprising: a semiconductor layer; a first layer formed in contact with a surface of the semiconductor layer; a first portion of a gate structure formed above the first layer; a second layer formed in contact with a side surface of the first portion of the gate structure and a bottom surface of the first portion of the gate structure; a sidewall layer formed in contact with the side surface of the second layer such that a part of the second layer is positioned between the first portion of the gate structure and the sidewall layer; an impurity region formed above the semiconductor layer; a silicide layer comprising a silicide formed above the impurity region; at least one dielectric layer formed above the silicide layer, the at least one dielectric layer having a via and a contact opening pattern formed therein, wherein an area of the silicide layer is larger than an area of the contact opening, and the first layer is formed between the semiconductor layer and the second layer, the first layer being not formed between the first portion of the gate structure and the sidewall layer, and the first layer being in contact with the bottom surface of the second layer.