Patent ID: 9548705
Date: 2017-01-17
CPC Classifications: H03F

Claim:
1. An amplifier comprising: an input amplifier stage having a first tuning element used to control a first performance criteria of the amplifier and a pair of complementary metal oxide semiconductor (CMOS) transistors; an output amplifier stage operatively coupled to the input amplifier stage; and a bias circuit operatively coupled to the output amplifier stage and having a second tuning element used to control a second performance criteria of the amplifier; wherein the first tuning element operates substantially independent of the second tuning element; wherein the pair of complementary metal oxide semiconductor (CMOS) transistors includes a positive-channel complementary metal oxide semiconductor (PMOS) transistor and a negative-channel complementary metal oxide semiconductor (NMOS) transistor; wherein a matching resistor is operatively coupled between each gate node and each drain node of the PMOS and NMOS transistors; and wherein the first tuning element is operatively coupled between the matching resistor and the drain node of the PMOS transistor.