Patent ID: 9685223
Date: 2017-06-20
CPC Classifications: G11C

Claim:
1. A voltage controller, configured to couple to a voltage inducing circuit that is connected to a static random-access memory (SRAM) cell, comprising: a voltage clamping circuit comprising a clamp enabling transistor that has a drain connected to a second node of the voltage inducing circuit and a source connected to a first voltage clamping transistor, the voltage clamping circuit configured to inhibit a second voltage of a second signal at the second node from exceeding a first specified voltage threshold to inhibit a fifth voltage of a fifth signal at a fifth node of the voltage inducing circuit from exceeding a second specified voltage threshold, where the fifth node is connected to the SRAM cell; a first voltage controller transistor connected to a first voltage source and to the second node; and a second voltage controller transistor connected to a second voltage source and to the second node.