Patent ID: 9728646
Date: 2017-08-08
CPC Classifications: H01L

Claim:
1. A method of fabricating a fin field-effect transistor (Fin FET) device, the method comprising: providing a substrate having a fin structure, an upper portion of the fin structure having a first fin surface profile; forming an isolation region on the substrate and in contact with the fin structure; recessing at least a portion of the isolation region by an etch process to form a recessed portion and to expose the upper portion of the fin structure, the recessed portion having a first isolation surface profile; applying a thermal hydrogen treatment consisting essentially of hydrogen gas to the fin structure and the recessed portion; and forming a gate dielectric layer with a substantially uniform thickness over the fin structure, wherein the thermal hydrogen treatment provides: the isolation region with a second surface profile having a substantially flat step height, the substantially flat step height being defined by a downward slope from sidewalls of the fin structure toward a top surface of the isolation region which relates to a fraction of the height of the channel region.