Patent ID: 9589519
Date: 2017-03-07
CPC Classifications: G09G,G11C

Claim:
1. A display panel comprising: a display area comprising a gate line and a data line; and a gate driver connected to a terminal of the gate line, wherein the gate driver comprises a plurality of stages that are integrated on a substrate, and at least one of the stages comprises an inverter unit, an output unit, and a carry signal generator, the output unit comprising a first transistor and a first capacitor, wherein the first transistor includes an input terminal for receiving a clock signal, a control terminal connected to a node Q, and an output terminal connected to a gate voltage output terminal to output a gate voltage at a first low voltage, the inverter unit configured to output voltage-at a second low voltage, the carry signal generator configured to generate a carry signal at a third low voltage and output the carry signal to a transmission signal output terminal connected to a next stage, wherein the second low voltage has a lower voltage level than the first low voltage, and the third low voltage has a lower voltage level than the second low voltage.