Patent ID: 9564464
Date: 2017-02-07
CPC Classifications: H01L,H04N

Claim:
1. Imaging circuitry, comprising: a first substrate layer that includes photodiodes and floating diffusion regions; a second substrate layer that is bonded to the first substrate layer and that includes pixel transistors; an interconnect stack formed on the second substrate layer, wherein the interconnect stack includes metal structures that are coupled to the floating diffusion regions in the first substrate layer and to the pixel transistors in the second substrate layer, and wherein the second substrate layer is interposed between the first substrate layer and the interconnect stack; a third substrate layer that is bonded to the second substrate layer and that includes digital signal processing circuits; and an additional interconnect stack that is formed on the third substrate layer and that includes metal structures that are coupled to the pixel transistors in the second substrate layer, wherein the pixel transistors in the second substrate layer are fabricated using a first technology node and wherein the digital signal processing circuits on the third substrate layer are fabricated using a second technology node that is different than the first technology node.