Patent ID: 9712302
Date: 2017-07-18
CPC Classifications: H04L,H04N,H04W,Y02D

Claim:
1. An apparatus comprising processing circuitry to: receive a downlink signal from a transmitter, the downlink signal comprising a radio frame having multiple subframes comprising a band of physical resource blocks (PRBs), the PRBs comprising orthogonal frequency division multiplex (OFDM) symbols; demodulate the received downlink signal using a first demodulation reference signal (DMRS) pattern for a first group of PRBs having a potential for collisions with one or more synchronization signals, wherein the first group of PRBs comprises a center group of six PRBs disposed about a center of system bandwidth; and demodulate the received downlink signal using a second DMRS pattern for a second group of PRBs without a potential for collisions with one or more synchronization signals, wherein the second group of PRBs comprises a group of PRBs located outside the center group of six PRBs; wherein the first DMRS pattern is arranged to avoid collision between a reference signal and a synchronization signal; and wherein the first DMRS pattern for the first group of PRBs comprises UE reference signals on OFDM symbols 0-1 and 7-8 for one or more PRBs of the first group of PRBs, and wherein the first DMRS pattern is used as the second DMRS pattern for the second group of PRBs in one or more subframes.