Patent ID: 9658930
Date: 2017-05-23
CPC Classifications: G06F

Claim:
1. A computing device comprising: a plurality of processor cores; a memory; firmware logic to (i) allocate at least one of the plurality of processor cores to a spare set of processor cores, (ii) establish a spare processor core hardware description table in the memory that includes each of the allocated processor cores, (iii) establish a main processor core hardware description table in the memory that includes each of the unallocated processor cores, (iv) determine whether a processor core error was caused by an allocated processor core, (v) instruct a software application executed on the computing device using the spare set of processor cores to restart in response to a determination that the processor core error was caused by the allocated processor core, and (vi) assign a new processor core of the spare set of processor cores to the software application in response to the software application being restarted; and processor control logic to control a processor register to indicate whether each processor core of the plurality of processor cores is an allocated or unallocated processor core.