Patent ID: 9739832
Date: 2017-08-22
CPC Classifications: G01R

Claim:
1. An integrated circuit comprising: A. a first power pad, a second power pad, and a ground pad; B. functional circuitry having functional input and output leads and having a first power lead, a second power lead, and a ground lead coupled to the power and ground pads; C. test circuitry having test leads connected to the functional circuitry and having a first device test lead and a second device test lead extending from the test circuitry, the first and second device test leads being free of the functional input and output leads; D. input test messaging and control circuitry having a test input lead and a test circuitry lead connected to the first device test lead; E. output test messaging and control circuitry having a test output lead and a test circuitry lead connected to the second device test lead; F. demodulation circuitry having an input coupled to the first power pad and an output coupled to the test input lead of the input test messaging and control circuitry; G. modulation circuitry having an output coupled to the second power pad and an input coupled to the test output lead of the output test messaging and control circuitry; H. first filter circuitry connecting the first power pad to the first power input lead between the input of the demodulation circuitry and the first power lead; and I. second filter circuitry connecting the second power pad to the second power input lead between the output of the modulation circuitry and the second power lead.