Patent ID: 9716072
Date: 2017-07-25
CPC Classifications: H01L

Claim:
1. A method of manufacturing a power semiconductor device comprising: preparing a lead frame having an inner lead, an outer lead connected to the inner lead, a die pad disposed at a position lower than that of the inner lead, and a bent portion connecting the inner lead and the die pad; fixing a power semiconductor element on the die pad; bonding a metal plate to a lower surface of the die pad via an insulating film; and encapsulating the inner lead, the die pad, the power semiconductor element, the insulating film and metal plate with an encapsulation resin in a cavity between a lower mold and an upper mold, wherein the lower mold has a stepped portion provided in a bottom surface of the cavity below the inner lead, a height of an upper surface of the stepped portion is larger than a height of an upper surface of the power semiconductor element disposed in the cavity, and when the encapsulation resin is injected into the cavity, a lower surface of the metal plate is in contact with the bottom surface of the cavity, and the encapsulation resin is caused to flow downward from above the stepped portion toward the upper surface of the power semiconductor element.