Patent ID: 9741865
Date: 2017-08-22
CPC Classifications: H01L

Claim:
1. A method for manufacturing a semiconductor device comprising the steps of: forming a gate electrode layer; forming a first gate insulating layer using a first mixed gas comprising a gas containing silicon and a gas comprising nitrogen; forming a second gate insulating layer using a second mixed gas comprising a gas containing silicon and a gas containing dinitrogen monoxide; forming a first oxide semiconductor layer over the second gate insulating layer; forming a second oxide semiconductor layer over the first oxide semiconductor layer; forming a source electrode layer over the second oxide semiconductor layer; and forming a drain electrode layer over the second oxide semiconductor layer, wherein the second oxide semiconductor layer is a crystalline oxide semiconductor layer, wherein the first oxide semiconductor layer comprises one or more of indium, gallium, and zinc, and wherein the second oxide semiconductor layer comprises one or more of indium, gallium, and zinc.