Patent ID: 9646987
Date: 2017-05-09
CPC Classifications: H01L

Claim:
1. A semiconductor memory device, comprising: when three directions intersecting each other are assumed to be a first direction, a second direction, and a third direction, a memory cell array, the memory cell array including a stacked body and a semiconductor film, the stacked body including a plurality of first layers stacked in the third direction, the semiconductor film having a side surface facing the plurality of first layers, and the semiconductor film extending in the third direction, the stacked body having a first portion and two second portions, the first portion having two first ends which are ends in the first direction, and the first portion having the semiconductor film disposed therein, and each second portion being positioned on a side of each first end of the first portion, and each second portion having disposed therein a connecting line that contacts one of the plurality of first layers and extends in the third direction, each second portion having a projecting portion that projects further in the second direction than the first portion, the projecting portion of one of the second portions and the projecting portion of another of the second portions being divided in the first direction by a gap which is surrounded on three sides by the first portion and these two projecting portions, and a side surface facing the gap of the projecting portion of one of the second portions having a stepped structure extending in the first direction, and a side surface facing the gap of the first portion having a planar structure extending in the first direction and the third direction.