Patent ID: 9570624
Date: 2017-02-14
CPC Classifications: H01L

Claim:
1. A thin film transistor, comprising: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the substrate; an oxide semiconductor layer formed on the gate insulating layer, the oxide semiconductor layer including a source region, a channel region and a drain region; an oxide buffer layer formed on the oxide semiconductor layer including the source region, the channel region and the drain region, the oxide buffer layer having a carrier concentration lower than that of the oxide semiconductor layer, and the oxide buffer layer completely covering the channel region; a protective layer formed on the oxide buffer layer and the gate insulating layer, the protective layer having contact holes formed therein so that the oxide buffer layer in the source and drain regions are exposed therethrough; and source and drain electrodes coupled with the oxide buffer layer in the source and drain regions through the contact holes.