Patent ID: 9589791
Date: 2017-03-07
CPC Classifications: H01L

Claim:
1. A method of fabricating a semiconductor device, the method comprising: forming a III-V semiconductor stack on an upper surface of a wafer, the III-V semiconductor stack including an intermediate III-V layer interposed between an III-V channel layer and a III-V buffer layer formed on the wafer, the III-V buffer layer comprising indium (In) and extending continuously along the entire length of the wafer; patterning the III-V channel layer to form at least one semiconductor fin on an upper surface of the intermediate III-V layer, the at least one semiconductor fin including a III-V channel portion comprising indium (In); and oxidizing the intermediate III-V layer to form a III-V oxidation layer directly on an upper surface of the III-V buffer layer such that the III-V oxidation layer is interposed between the III-V channel portion and the III-V buffer layer such that the at least one semiconductor fin is isolated from the III-V buffer layer.