Patent ID: 9640554
Date: 2017-05-02
CPC Classifications: H01L

Claim:
1. A pixel structure comprising: a semiconductor layer comprising a first semiconductor pattern, the first semiconductor pattern having a first channel region, a first source region, and a first drain region; an insulating layer disposed on the semiconductor layer; a first conductive layer disposed on the insulating layer, the first conductive layer comprising a first gate, a first source, a first drain, and a data line connected to the first source; a second conductive layer disposed above the first conductive layer, the second conductive layer comprising a scan line; a passivation layer covering the first conductive layer, the second conductive layer, and the semiconductor layer, wherein the passivation layer has a first opening, a second opening, and a third opening, the first opening exposes the first source and the first source region of the first semiconductor pattern, the second opening exposes the first drain and the first drain region of the first semiconductor pattern, and the third opening exposes the first gate and the scan line; and a first electrode layer disposed on the passivation layer, wherein the first electrode fills into the first opening, the second opening, and the third opening, such that the first source and the first source region are electrically connected to each other, the first drain and the first drain region are electrically connected to each other, and the first gate and the scan line are electrically connected to each other.