Patent ID: 9660856
Date: 2017-05-23
CPC Classifications: H03C,H03D,H03F,H04B,H04L

Claim:
1. An analog distortion compensation circuit configured to compensate for a distortion in a baseband in-phase (I) signal and a distortion in a corresponding baseband quadrature (Q) signal, the analog distortion compensation circuit comprising: an in-phase I attenuator configured to attenuate the baseband in-phase I signal; a quadrature Q attenuator configured to attenuate the baseband Q signal; and a plurality of the following calculation circuits configured to receive the attenuated in-phase I signal and the attenuated baseband Q signal and perform calculations based on the received attenuated I and Q signals: a second order intermodulation circuit configured to calculate a second order intermodulation correction signal IM2 based on IM2=I (ii) a second order harmonic distortion circuit configured to calculate a second order harmonic correction signal HD2@0° based on HD2@0°=I (iii) a second order harmonic distortion circuit configured to calculate a second order harmonic correction signal HD2@90° based on HD2@90°=2IQ; (iv) a third order intermodulation circuit configured to calculate a third order intermodulation correction signal IM3@0° based on IM3@0°=I (v) a third order intermodulation circuit configured to calculate a third order intermodulation correction signal IM3@90° based on IM3 @90°=I (vi) a third order harmonic distortion circuit configured to calculate a third order harmonic correction signal HD3@0° based on HD3@0°=I (vii) a third order harmonic distortion circuit configured to calculate a third order harmonic correction signal HD3@90° based on HD3@90°=3 wherein the analog distortion compensation circuit is configured to use a result of the plurality of the calculation circuits to generate an I distortion compensation signal at a first output and a Q distortion compensation signal at a second output.