Patent ID: 9735664
Date: 2017-08-15
CPC Classifications: H02M

Claim:
1. A multilevel power converter comprising: n input stages, n being greater than or equal to 2, each input stage of rank k, k being 1 through n, having k+1 identical input converters that are connected to one another, each converter being supplied with an input voltage and controlled to apply an electrical potential to an output on the basis of said input voltage; each input converter of the input stage of rank k−1 being supplied with a voltage resulting from the electrical potentials applied to two outputs by two converters of input stage of rank k; an output stage connected to the input stage of rank 1 and having an output converter supplied with a differential voltage resulting from a first electrical potential applied to an output of a first input converter of the input stage of rank 1 and from a second electrical potential applied to an output of a second input converter of the input stage of rank 1, said output converter being controlled to apply an electrical potential to an output; wherein the input converters exhibit an identical topology, chosen from among architectures of Neutral Point Clamped (NPC), Active Neutral Point Clamped (ANPC) and Neutral Point Piloted (NPP); wherein the output converter exhibits a different topology than the topology chosen for the input converters, said topology of the output converter being chosen from among architectures of Flying Capacitor (FC), Stacked Multicell Converter (SMC), Neutral Point Clamped (NPC), Neutral Point Piloted (NPP) and Active Neutral Point Clamped (ANPC) type; wherein the input stage of rank 1 includes only two input converters conformed by the first input converter of the input stage of rank 1 and the second input converter of the input stage of rank 1; wherein the input stage of rank 2 includes only three input converters conformed by a first input converter of the input stage of rank 2, a second input converter of the input stage of rank 2 and a third input converter of the input stage of rank 2; wherein the first input converter of the input stage of rank 1 is directly connected to the first and the second input converters of the input stage of rank 2, and the output converter, without any intervening converter; and wherein the second input converter of the input stage of rank 1 is directly connected to the second and the third input converters of the input stage of rank 2, and the output converter, without any intervening converter.