Patent ID: 9646853
Date: 2017-05-09
CPC Classifications: H01L

Claim:
1. An integrated circuit package, comprising: a non-conductive substrate having a die side configured to receive an IC die and a lead side opposite the die side, a pattern formed on the substrate, wherein the pattern defines openings that extend between the die side and the lead side of the substrate, and wherein the openings comprise a plurality of holes that extend vertically from the lead side to the die side; an IC die having an active side with bond pads, wherein the die is mounted on the die side of the substrate, and wherein the bond pads and the holes are in direct contact and vertically aligned with each other; and a conductive material that fills the openings in the substrate and defines leads on the lead side of the substrate, and forms electrical connections between the die bond pads and the leads, and wherein the openings in the substrate further comprise a plurality of cavities on the lead side of the substrate filled with the conductive material to form the leads of the IC package.