Patent ID: 9747216
Date: 2017-08-29
CPC Classifications: G06F

Claim:
1. A computer processor for use with system memory, the computer processor comprising: at least one level of cache that stores operands referenced by at least one instruction: a first memory structure, separate from the cache and the system memory, that operates over multiple cycles to temporarily store operands referenced by at least one instruction; a plurality of functional units that execute operations specified by the at least one instruction over the multiple cycles, wherein the operations produce and access operands stored in the first memory structure; and a second memory structure, separate from the first memory structure and the cache and the system memory, that is accessed to copy an operand from the first memory structure to the second memory structure before it is removed from the first memory structure and that is also accessed to copy an operand stored in the second memory structure back to the first memory structure for subsequent use by at least one functional unit, wherein the second memory structure is organized with a byte-addressable memory space and all operands stored in the second memory structure are accessed by respective byte addresses in the byte-addressable memory space.