Patent ID: 9553192
Date: 2017-01-24
CPC Classifications: H01L

Claim:
1. A method of manufacturing a semiconductor device, the method comprising: preparing a substrate that includes a protruding pattern that extends in a first direction; forming an isolation layer that covers a lower portion of the protruding pattern; forming an extending pattern structure that comprises an extending pattern that extends in a second direction that is different from the first direction to intersect the protruding pattern, an insulation layer that is between the protruding pattern and the extending pattern, and a gate spacer that covers respective lateral surfaces of the extending pattern and the insulation layer; forming a fin structure that comprises a protrusion and a pair of recesses on opposite sides of the protrusion by removing portions of the protruding pattern that are on opposite sides of the extending pattern structure; forming a first strain-inducing layer that defines a channel region within the protrusion, by diffusing strain-inducing atoms via a lateral surface of the protrusion; and forming a second strain-inducing layer that covers the first strain-inducing layer within each of the pair of recesses, wherein the first strain-inducing layer directly contacts the gate spacer.