Patent ID: 9666587
Date: 2017-05-30
CPC Classifications: H01L

Claim:
1. A method of manufacturing a semiconductor device, the method comprising: forming a plurality of gate electrodes over a first region of a semiconductor substrate, the plurality of gate electrodes extending in a first direction; forming a first metal layer over the plurality of gate electrodes in the first region, wherein each individual line in the first metal layer within the first region extends in a second direction perpendicular with the first direction, wherein the first metal layer is free from fuses; forming a second metal layer over the first metal layer in the first region, wherein each individual line in the second metal layer within the first region extends in the first direction, wherein the second metal layer is free from fuses; and forming a third metal layer over the second metal layer in the first region, wherein each individual line in the third metal layer within the first region extends in the second direction, wherein the third metal layer comprises fuses.