Patent ID: 9548397
Date: 2017-01-17
CPC Classifications: H01L

Claim:
1. A semiconductor device comprising: an oxide semiconductor stack including a first oxide semiconductor layer, a second oxide semiconductor layer in contact with a top surface of the first oxide semiconductor layer, and a third oxide semiconductor layer in contact with a top surface of the second oxide semiconductor layer; a source electrode layer and a drain electrode layer adjacent to the oxide semiconductor stack; a gate insulating film adjacent to the oxide semiconductor stack; and a gate electrode layer adjacent to the oxide semiconductor stack with the gate insulating film interposed therebetween, wherein, in the oxide semiconductor stack, a region which does not overlap the source electrode layer or the drain electrode layer has a higher oxygen concentration than a region which overlaps the source electrode layer or the drain electrode layer, and wherein the third oxide semiconductor layer covers side surfaces of the second oxide semiconductor layer and the first oxide semiconductor layer in a channel width direction.