Patent ID: 9583475
Date: 2017-02-28
CPC Classifications: H01L

Claim:
1. A microelectronic package comprising: a first microelectronic unit including a first semiconductor chip having first chip contacts, an encapsulant contacting an edge of the first semiconductor chip, and first unit contacts exposed at a surface of the encapsulant and electrically coupled with the first chip contacts; a second microelectronic unit including a second semiconductor chip having a front surface and an edge extending away from the front surface, and second chip contacts at the front surface, an encapsulant contacting the edge of the second semiconductor chip and having a planar surface extending away from the edge, the front surface of the semiconductor chip and the planar surface of the encapsulant of the second microelectronic unit defining a face of the second microelectronic unit, wherein the first and second microelectronic units are stacked such that the face of the second microelectronic unit faces away from the first microelectronic unit; and package terminals at the planar surface of the second microelectronic unit electrically coupled with (i) the first unit contacts through first electrically conductive structure extending above the planar surface of the second microelectronic unit and laterally relative to the package terminals, and with (ii) the second chip contacts through second electrically conductive structure coupled with the second chip contacts.