Patent ID: 9543287
Date: 2017-01-10
CPC Classifications: H01L

Claim:
1. An apparatus that comprises an integrated circuit, wherein said integrated circuit comprises a substrate, an electronic component, a first electrical conductor, and a second electrical conductor, wherein said substrate extends in a substrate plane, wherein said substrate has a plurality of external substrate surfaces, wherein said electronic component is disposed at a location selected from the group consisting of inside one of said plurality of external substrate surfaces and on one of said plurality of external substrate surfaces, wherein said first electrical conductor comprises a first bump contact, wherein said first bump contact is on one of said plurality of external substrate surfaces, wherein said first electrical conductor comprises a first end, wherein said first electrical conductor is electrically insulated from said substrate, wherein said second electrical conductor comprises a second bump contact, wherein said second electrical conductor comprises a second end, wherein said second bump contact is on one of said plurality of external substrate surfaces, wherein said second electrical conductor is electrically insulated from said substrate, wherein said second electrical conductor is electrically insulated from said first electrical conductor except at said second end of the second conductor, wherein said second end of the second conductor is mechanically and electrically directly in contact with said first end of the first conductor to form an electrical junction, wherein said first and second ends are entirely buried to at least 5 μm deep inside said substrate relative to one of said plurality of external substrate surfaces, wherein said first and second ends are formed of different materials chosen to achieve a Seebeck coefficient of said junction having an absolute value that is greater than 1 μV/K at 20° C., and wherein a combination of said first and second conductors forms a temperature probe.