Patent ID: 9600361
Date: 2017-03-21
CPC Classifications: G06F

Claim:
1. A computer implemented method comprising: receiving a fetch request from a requestor for a data block, the receiving at a cache memory system that includes a cache memory that is partitioned into a plurality of cache data ways including a cache data way that contains the data block; fetching the data block from the cache memory; determining whether to bypass in-line error-correcting code (ECC) checking and correcting, the determining based on a bypass indicator corresponding to the cache data way; based on determining that the in-line ECC checking and correcting should be bypassed, returning the fetched data block to the requestor and performing an ECC process for the fetched data block subsequent to returning the fetched data block to the requestor; based on determining that the in-line ECC checking and correcting should not be bypassed, performing the ECC process for the fetched data block and returning the fetched data block to the requestor subsequent to performing the ECC process; and based on both the ECC process detecting errors in the fetched data block and on determining that the in-line ECC checking and correcting should not bypassed, updating the bypass indicator corresponding to the cache data way to indicate that the in-line ECC checking and correcting should not be bypassed and re-fetching the data block from the cache memory.