Patent ID: 9541603
Date: 2017-01-10
CPC Classifications: G01R,G06F

Claim:
1. A method comprising: providing a logic signal from an output of a first comparator to a clock input of a first flip-flop; storing, in a register, a logic value output by the first flip-flop; comparing a first value of a reference voltage to a value of a supply voltage, wherein said comparing is performed by the first comparator; changing a state of the logic signal output by the comparator responsive to determining that the value of the supply voltage is less than the first value of the reference voltage; changing the logic value output by the flip-flop to a first logic value from a second logic value responsive to the comparator changing the state of the logic signal; determining that the value of the supply voltage is greater than the first value of the reference voltage; changing the reference voltage to a second value; and repeating said comparing subsequent to changing the reference voltage to the second value.