Patent ID: 9548449
Date: 2017-01-17
CPC Classifications: H01L

Claim:
1. A material layer stack for a memory element, the material layer stack comprising: a first conductive electrode having an uppermost surface; an insulating layer disposed on the uppermost surface of the first conductive electrode and having an opening with sidewalls therein, wherein the opening exposes only a portion of the first conductive electrode; a conductive oxide layer disposed in the opening, the conductive oxide layer having a first portion directly on and conformal with the exposed portion of the first conductive electrode, and having a second portion directly on and conformal with the sidewalls of the opening; and a second conductive electrode disposed in the opening and completely filling the remainder of the opening, wherein the second electrode is disposed directly on the conductive oxide layer, and wherein the second electrode has an uppermost surface co-planar with an uppermost surface of the insulating layer.