Patent ID: 9659540
Date: 2017-05-23
CPC Classifications: G09G

Claim:
1. A GOA circuit of reducing power consumption, comprising a plurality of GOA unit circuits which are cascade connected, and the GOA unit circuit of every stage comprises a first pull-up controlling module, a second pull-up controlling and transmission module, a pull-up module, a first pull-down module, a second pull-down module, a bootstrap capacitor module and a pull-down holding module, and each module comprises one or more thin film transistors; N is set to be a positive integer and except the GOA unit circuit of the first stage and the GOA unit circuit of the last stage, in the GOA unit circuit of an Nth stage: the first pull-up controlling module receives a stage transfer signal of the GOA unit circuit of a former N−1th stage, and is electrically coupled to a first node to control a voltage level of the first node; the second pull-up controlling and transmission module is electrically coupled to the first node and the pull-up module, and the second pull-up controlling and transmission module receives a mth set of clock signal corresponding to the GOA unit circuit of the Nth stage to control the pull-up module according to the voltage level of the first node and a voltage level of the mth set of clock signal, and meanwhile outputs a stage transfer signal; the pull-up module receives a constant high voltage level, and outputs a scan driving signal to output the constant high voltage level to the scan driving signal with being controlled by the second pull-up controlling and transmission module; the first pull-down module receives a stage transfer signal of the GOA unit circuit of a latter N+1th stage and a m+1th set of clock signal corresponding to the GOA unit circuit of the latter N+1th stage, and is electrically coupled to the scan driving signal and a constant low voltage level to pull down a voltage level of the scan driving signal in a non-function period; the second pull-down module receives the stage transfer signal of the GOA unit circuit of the latter N+1th stage, and is electrically coupled to the first node and the constant low voltage level to pull down the voltage level of the first node in the non-function period; the bootstrap capacitor module is electrically coupled to the first node and the second pull-up controlling and transmission module to charge and discharge the first node; the pull-down holding module is electrically coupled to the first node, the scan driving signal, the stage transfer signal, the mth set of clock signal and the constant low voltage level to maintain low voltage levels of the first node, the scan driving signal and the stage transfer signal in the non-function period; the constant high voltage level is higher than a high voltage level of the clock signal; the mth set of clock signal and the m+1th set of clock signal are inverse in phase.