Patent ID: 9748276
Date: 2017-08-29
CPC Classifications: H01L

Claim:
1. A thin film transistor, comprising an active layer, an etching barrier layer, a gate electrode, a gate insulating layer, a source electrode and a drain electrode, wherein: the source electrode comprises a first source electrode and a second source electrode, the drain electrode comprises a first drain electrode and a second drain electrode, and the first source electrode and first drain electrode are formed on the active layer and directly contact the active layer; the etching barrier layer at least covers a portion of the active layer between the first source electrode and the first drain electrode, and includes portions located on upper surfaces of the first source electrode and the first drain electrode to cover a portion of the first source electrode and a portion of the first drain electrode adjacent to each other respectively; the second source electrode and the second drain electrode are formed on the etching barrier layer, the second source electrode is electrically connected with the first source electrode and the second drain electrode is electrically connected with the first drain electrode; and the thin film transistor further comprises a metal oxide insulation layer formed on the first source electrode and the first drain electrode and between the first source electrode and the first drain electrode and the etching barrier layer.