Patent ID: 9748147
Date: 2017-08-29
CPC Classifications: H01L

Claim:
1. A method of fabricating an epitaxial layer, comprising: providing a silicon substrate comprising a dielectric layer disposed thereon; forming a recess in the silicon substrate and the dielectric layer; performing a selective epitaxial growth process to form a first epitaxial layer in the recess, wherein the first epitaxial layer does not cover a top surface of the dielectric layer and the first epitaxial layer is free from contacting the dielectric layer; performing a non-selective epitaxial growth process to form a second epitaxial layer in the recess, and the second epitaxial layer covering the top surface of the dielectric layer, wherein the recess is only filled up by the first epitaxial layer and the second epitaxial layer; and planarizing the second epitaxial layer to align the second epitaxial layer with the top surface of the dielectric layer.