Patent ID: 9727495
Date: 2017-08-08
CPC Classifications: G06F,Y02D

Claim:
1. A peripheral equipment control device controlling data flow via a peripheral equipment, the peripheral equipment control device comprising: a peripheral equipment control processor that controls an operation of at least one peripheral equipment; and a bus adapted to connect the peripheral equipment control processor, a main processor, and the peripheral equipment, the main processor being provided outside the peripheral equipment control device to control the operation of the peripheral equipment, wherein the bus stores addresses that are referenced by the main processor and the peripheral equipment control processor to access the peripheral equipment, and the bus prohibits access to the peripheral equipment by the peripheral equipment control processor while the main processor is active, wherein each of the peripheral equipment includes a storage device adapted to store data accessible by the main processor and the peripheral equipment control processor, wherein data stored in the storage device includes an operating system program executed by the main processor to control the operation of the peripheral equipment control device and the peripheral equipment, wherein the bus stores a first storage device reference address used to access arbitrary data stored in the storage device and a second storage device reference address used to access the area of the storage device other than that which stores the operating system program of all the data stored in the storage device, and the bus prohibits the peripheral equipment control processor from referencing the first storage device reference address, wherein the peripheral equipment control device further comprises an access indicator storage section adapted to store an access yes/no indicator that indicates whether or not the peripheral equipment control processor can reference the second storage device reference address, wherein the bus permits the peripheral equipment control processor to reference the second storage device reference address when the access yes/no indicator stored in the access indicator storage section indicates that the second storage device reference address can be referenced by the peripheral equipment control processor, wherein the bus prohibits the peripheral equipment control processor from referencing the second storage device reference address when the access yes/no indicator stored in the access indicator storage section indicates that the second storage device reference address is not referenced by the peripheral equipment control processor, and wherein the access indicator storage section prohibits the peripheral equipment control processor from making a change to the access yes/no indicator.