Patent ID: 9711423
Date: 2017-07-18
CPC Classifications: G01N,H01J,H01L

Claim:
1. A manufacturing method of a semiconductor device, comprising the steps of: (a) forming, over a main surface of a semiconductor substrate, laminated wiring including, sequentially from below, three layers of a titanium nitride film, an aluminum film, and a titanium nitride film; (b) forming an insulating film over the laminated wiring so as to cover the laminated wiring; (c) coating a photoresist film over the insulating film in order to form a via hole pattern by lithography; and (d) forming a via hole in the insulating film by dry etching with the use of the via hole pattern as a mask, wherein, when the dry etching of the insulating film is performed, an end point of the dry etching of the insulating film is detected by monitoring emission intensities of at least CO, CN, and AlF.