Patent ID: 9590656
Date: 2017-03-07
CPC Classifications: G06F,H03M,H04L

Claim:
1. A method of providing one or more log likelihood ratio (LLRs) of a target cell to a low-density parity check (LDPC) decoder, the method comprising: storing a neighboring cell contribution LLR look-up table associated with the nonvolatile memory storage module, the neighboring cell contribution LLR look-up table including combinations of possible read patterns for the target cell and the neighboring cells, and associated LLR's, each of the LLR's corresponding to a bit error rate for the associated possible read pattern; reading a threshold voltage of a target cell stored in a nonvolatile memory storage module; reading a threshold voltage of one or more neighboring cells of the target cell stored in the nonvolatile memory storage module; accessing the neighboring cell contribution LLR look-up table associated with the nonvolatile memory storage module; extracting from the neighboring cell contribution LLR look-up table the LLR corresponding to the pattern of the read of the threshold voltage of the target cell and the read of the threshold voltage of the one or more neighboring cells; and providing the extracted LLR to an LDPC decoder.