Patent ID: 9564406
Date: 2017-02-07
CPC Classifications: H01L,H02J

Claim:
1. A battery protection package comprising: a first common-drain metal oxide semiconductor field effect transistor (MOSFET) having a first plurality of bonding pads and a second plurality of bonding pads; a second common-drain MOSFET having a first plurality of bonding pads and a second plurality of bonding pads; a passivation layer formed on top of the first and second common-drain MOSFETs, the passivation layer having openings to expose the first and second pluralities of bonding pads of the first common-drain MOSFETs and the first and second pluralities of bonding pads of the second common-drain MOSFETs; a metal layer deposited on bottom surfaces of the first and second common-drain MOSFETs; a power control integrated circuit (IC) vertically stacked on top of the first and second common-drain MOSFETs; a plurality of solder balls attached to the first plurality of bonding pads of the first common-drain MOSFETs and the first plurality of bonding pads of the second common-drain MOSFETs; a plurality of conductive bumps; and a packaging layer; wherein at least a majority portion of the power control IC and at least majority portions of the plurality of solder balls are embedded into the packaging layer and wherein the power control IC is electrically coupled to the second plurality of bonding pads of the first common-drain MOSFET and the second plurality of bonding pads of the second common-drain MOSFET via the plurality of conductive bumps.