Patent ID: 9680458
Date: 2017-06-13
CPC Classifications: H03K

Claim:
1. An input-controlled multiple threshold debounce system configured to receive an input signal, a maximum allowable threshold and an assertion threshold, and to control a debounce system output, the debounce system comprising: a first comparison subsystem configured to assert a first signal when the input signal is greater than the assertion threshold; a second comparison subsystem configured to assert a second signal when the input signal is greater than the maximum allowable threshold; a first delay subsystem selectively enabled when the first signal is asserted and the second signal is deasserted, and configured to assert a first output after a first delay and while the input signal is greater than the assertion threshold; and a second delay subsystem selectively enabled when the first signal is asserted and the second signal is asserted, and configured to assert a second output after a second delay and while the input signal is greater than the assertion threshold, the second delay being longer than the first delay; and a debounce system output configured to assert based on one of the first output and the second output.