Patent ID: 9633900
Date: 2017-04-25
CPC Classifications: H01L

Claim:
1. A method comprising: forming a through substrate via in a substrate, the substrate comprising a device substrate and metallization layers over a first side of the device substrate, the through substrate via comprising a first conductive material having a sidewall, a protruding end of the through substrate via protruding from a second side of the device substrate, wherein a liner covers the sidewall of the first conductive material from a first end of the first conductive material to a second end of the first conductive material; forming a first passivation layer over the second side of the device substrate and over the liner, the first passivation layer having a surface that is closer to the device substrate than a protruding end of the through substrate via; recessing the first passivation layer and the liner to expose the sidewall of the first conductive material, wherein the first passivation layer forms a stair-step pattern; and forming a second conductive material in contact with the sidewall of the first conductive material.