Patent ID: 9570362
Date: 2017-02-14
CPC Classifications: H01L

Claim:
1. A method for manufacturing a semiconductor device including a MOS transistor, the method comprising: a step of forming a gate electrode on a first insulating film formed on a semiconductor substrate by etching a gate electrode material layer formed on the first insulating film, and forming a protective film to cover at least a lower part of a side face of the gate electrode and a part of the first insulating film adjacent to the side face; a step of forming a first resist pattern to cover the gate electrode and the protective film; a step of forming a first diffusion region by performing ion implantation into the semiconductor substrate using the first resist pattern as a mask; a first removing step of removing the first resist pattern, which covers the gate electrode and the protective film, wherein the first removing step includes ashing the first resist pattern and then cleaning the semiconductor substrate with a sulfuric acid-hydrogen peroxide mixture; a step of forming a second insulating film to cover the gate electrode and the protective film after the first removing step; a step of forming a side spacer at a side of the gate electrode from the second insulating film by etching the second insulating film such that the side spacer is arranged to cover a portion of the protective film, which covers, under the side spacer, the lower part of the side face of the gate electrode and the part of the first insulating film adjacent to the side face; a step of forming a second resist pattern to cover the side spacer, which covers the portion of the protective film; a step of forming a second diffusion region by performing ion implantation into the semiconductor substrate using the second resist pattern as a mask; and a second removing step of removing the second resist pattern, wherein the second removing step includes ashing the second resist pattern and then cleaning the semiconductor substrate with an ammonium-hydrogen peroxide-water mixture or hydrofluoric acid-based cleaning, and wherein in the cleaning in the second removing step, the lower part of side face of the gate electrode and the part of the first insulating film are protected from etching by the portion of the protective film and the side spacer.