Patent ID: 9748219
Date: 2017-08-29
CPC Classifications: H01L

Claim:
1. A self-balanced silicon-controlled rectification device comprising: a substrate; an N-type doped well arranged in said substrate; a P-type doped well arranged in said substrate and arranged adjacent to said N-type doped well; at least one heavily doped clamping fin arranged in said N-type doped well and said P-type well and protruded up from a surface of said substrate; and at least one first P-type heavily doped fin and at least one first N-type heavily doped fin respectively arranged in said N-type doped well and said P-type doped well, respectively arranged at two opposite sides of said heavily doped clamping fin, and protruded up from said surface of said substrate, and said heavily doped clamping fin and each of said first P-type heavily doped fin and said first N-type heavily doped fin are spaced at a fixed interval, and said N-type doped well, said P-type doped well, said heavily doped clamping fin, said first P-type heavily doped fin and said first N-type heavily doped fin form a plurality of silicon-controlled rectifiers (SCRs), and said first P-type heavily doped fin and said first N-type heavily doped fin are respectively coupled to a high voltage terminal and a low voltage terminal, and voltages of said high voltage terminal and said low voltage terminal forward bias said SCRs to generate a plurality of uniform electrostatic discharge (ESD) currents through said SCRs.