Patent ID: 9711097
Date: 2017-07-18
CPC Classifications: G09G,H03K

Claim:
1. A semiconductor integrated circuit configured to drive a liquid crystal display (LCD), the semiconductor integrated circuit comprising: an input buffer configured to choose, in accordance with a first control clock, to output a first data signal or output a high-impedance signal; a master flip-flop configured to choose, in accordance with a second control clock, to output a second data signal based on the first data signal or retain a currently output data signal; a master-slave switch configured to choose, in accordance with the second control clock, to output a high-impedance signal or output a third data signal based on the second data signal; a slave flip-flop that chooses, in accordance with the second control clock, to retain a currently output data signal or output a fourth data signal based on the third data signal; a first clock buffer configured to receive an external clock and output the second control clock; and a second clock buffer configured to receive the second control clock, retard rising and/or falling edges of the second control clock, and output the first control clock, wherein the input buffer does not receive the second control clock, wherein each of the master flip-flop, master-slave switch, and slave flip-flop does not receive the first control clock.