Patent ID: 9614068
Date: 2017-04-04
CPC Classifications: B82Y,H01L

Claim:
1. A semiconductor device, comprising: a first active region; a field insulating layer disposed in the first active region; a first nanowire pattern disposed on the first active region and extended in a first direction, wherein the first nanowire pattern comprises a first part, a second part, and a third part spaced apart from one another in the first direction; a first gate disposed on the first active region and extended in a second direction crossing the first direction, wherein the first gate entirely covers the first part of the first nanowire pattern; and a source or drain epitaxial layer disposed on at least one side of the first nanowire pattern, wherein the first gate comprises a first region disposed on the first nanowire pattern and having a first width, and a second region disposed beneath the first nanowire pattern and having a second width wider than the first width.