Patent ID: 9634555
Date: 2017-04-25
CPC Classifications: H02M,Y02B

Claim:
1. A synchronous rectifier power factor correction (PFC) boost circuit comprising: an upper switching device comprising an FET with a body diode having a low reverse recovery charge for operating as a synchronous rectifier in continuous conduction mode; a lower switching device comprising an FET with a body diode having a low reverse recovery charge for operating as a synchronous rectifier in continuous conduction mode; a first gate driver coupled to the upper switching device; a second gate driver coupled to the lower switching device; a boost inductor having an inductor current passing therethrough; a load capacitor; and a PFC controller configured to control the first and second gate drivers and the upper and the lower switching devices using predictive diode emulation, wherein the PFC controller monitors the inductor current and, when the inductor current decreases below a predetermined threshold indicating that there is insufficient energy stored in the boost inductor for the inductor current to fully commutate the upper switching device, the PFC controller turns off the upper switching device, the PFC controller also being configured to operate in synchronous and non-synchronous modes.