Patent ID: 9654135
Date: 2017-05-16
CPC Classifications: H03M

Claim:
1. An AD converter for converting an analogue input voltage into a digital value including a most significant bit to a least significant bit, the AD converter comprising: a common node to which the analog input voltage is inputted; a capacitive DAC including capacitors each having a first end connected to the common node and a second end that is selectively connected to either a first or second voltage in accordance with a successive approximation control signal for a bit of the digital value; a comparator that compares a voltage of the common node with a comparison reference voltage to determine the bit; a successive approximation controller that determines a successive approximation control signal for a next bit in accordance with a result of comparison by the comparator; and an integrator that receives a residual voltage of the capacitive DAC via the common node after a the comparator has performed comparison of the most significant bit to the least significant bit, integrates the received residual voltage, and sets an integrated value as a next comparison reference voltage for conversion of a next analog input voltage, wherein: the common node is coupled to a first input of the comparator and an output of the integrator is coupled to a second input of the comparator, and the integrator includes: