Patent ID: 9660078
Date: 2017-05-23
CPC Classifications: H01L

Claim:
1. A device comprising: a gate electrode on a gate dielectric, wherein the gate dielectric is on a silicon substrate; a first spacer adjacent to a first side of the gate electrode; a second spacer adjacent to a second side of the gate electrode; a channel region in the silicon substrate below the gate dielectric; a first dislocation adjacent a portion of a source region of the substrate; a second dislocation adjacent a portion of a drain region of the substrate, wherein the source region and the drain region of the substrate are adjacent to the channel region; a raised source region adjacent the first spacer and on the source region; a raised drain region adjacent the second spacer and on the drain region, wherein at least a portion of one of the raised source region and the raised drain region provides a free surface located higher than at least a portion of the channel region and higher than at least a portion of the gate dielectric.