Patent ID: 9599575
Date: 2017-03-21
CPC Classifications: G01N

Claim:
1. A system capable of generating calibration information usable for wafer inspection, the system comprising: an inspection machine usable for inspecting a wafer for detecting potential defects and/or for review thereof, and capable to obtain a scanned image of an inspected wafer area; a memory configured to store data obtained by the inspection machine and informative of the scanned image, the scanned image comprising multiple scanned frames; a processor communicatively coupled to the memory, wherein the processor is configured to: an input interface configured to receive scanned image data of a second wafer area other than the inspected wafer area; a processor-based correlator, configured to: (a) define search windows for the second wafer area, each of which corresponds to one of the database targets, wherein the defining of each of the search windows is based on the determined frame-displacement of the respective scanned frame in which the corresponding target is selected, the frame-displacement determined for the inspected area; and (b) calculate for the second wafer area a run-time target-displacement for each out of multiple database targets, based on a correlation of the respective target image to at least a portion of a scanned image of the corresponding search window; and a processor-based defect detection module, configured to detect defects in the second wafer area based on at least one of the run-time target-displacements.