Patent ID: 9584175
Date: 2017-02-28
CPC Classifications: H04B,H04W

Claim:
1. An integrated circuit comprising: a receiver portion comprising: a transmitter portion to transmit an RF signal at a transmitter output of the transmitter portion and to receive a modulated PLL signal at a transmitter input of the transmitter portion; the phase locked loop (PLL) shared between the receiver portion and the transmitter portion, the PLL during normal operation being used by the transmitter portion during a transmit mode and being used by the receiver portion during a receive mode, and the PLL providing at an output the modulated PLL signal based on a transmitter modulation signal; and wherein, during a test mode, the transmitter output and the first receiver input are coupled together in a loopback configuration, and the modulated PLL signal is provided to both the first receiver input and to the second receiver input.