Patent ID: 9748189
Date: 2017-08-29
CPC Classifications: H01L

Claim:
1. A device comprising: a first semiconductor die embedded in a molding compound layer, wherein the first semiconductor die comprises a substrate portion and an interconnect portion over the substrate portion; a surface-mount device embedded in the molding compound layer, wherein the surface-mount device has a first contact formed along a first sidewall of the surface-mount device and a second contact formed along a second sidewall of the surface-mount device, and wherein a height of the surface-mount device is substantially equal to a height of the substrate portion of the first semiconductor die, and wherein a surface of the surface-mount device, a surface of the molding compound layer and a surface of the substrate portion of the first semiconductor die are substantially level to each other; a plurality of interconnect structures formed on the molding compound layer, wherein: a plurality of bumps formed on and electrically coupled to the interconnect structures.