Patent ID: 9666450
Date: 2017-05-30
CPC Classifications: H01L,H05K

Claim:
1. A method for making a microelectronic substrate, comprising the steps of: forming a solder resist layer on an in-process unit including a wiring layer having a plurality of conductive elements extending in first and second lateral directions and a plurality of conductive projections extending away from the elements above the wiring layer, the conductive projections having end portions remote from the conductive elements and neck portions supporting the end portions between the conductive elements and the end portions, the end portions having lower surfaces extending outwardly from the neck portion in at least one of the lateral directions, the solder resist layer formed on the neck portions and at least up to the lower surfaces; and removing portions of the solder resist layer to form recessed portions between the projections, wherein the neck portions of the projections are formed before forming the solder resist layer, and wherein the end portions of the projections are formed after forming the solder resist layer and before removing portions of the solder resist layer.