Patent ID: 9673124
Date: 2017-06-06
CPC Classifications: H01L

Claim:
1. A semiconductor package, the package comprising: a substrate comprising a first cavity and a second cavity separated by a first mesa, the first cavity having a length along the first mesa and a width orthogonal to the length; a first plurality of contacts located in the first cavity; a second plurality of contacts located in the second cavity; a first die mounted to the substrate using the first plurality of contacts, a first outer edge of the first die resting on an upper surface of the first mesa, the first outer edge being shorter than the length of the first cavity and a second outer edge of the first die orthogonal to the first outer edge of the first die being longer than the width; a second die mounted to the substrate using the second plurality of contacts; a first underfill material between the substrate and the first die; and a second underfill material between the substrate and the second die, the second underfill material being separated from the first underfill material by the first mesa.