Patent ID: 9697886
Date: 2017-07-04
CPC Classifications: G11C

Claim:
1. A semiconductor storage device comprising: a plurality of memory modules, each of the memory modules being configured to receive first and second control signals through respective first and second signal inputs, and being able to be set into a plurality of low power consumption modes based on the first and second control signals, wherein at least some of the memory modules of the plurality of memory modules have a propagation path through which an inputted first control signal is propagated to another memory module, wherein the second control signal is inputted into each of the plurality of memory modules in parallel, wherein setting each of the plurality of memory modules into a first low power consumption mode is performed based on a combination of the first control signal that is propagated through the propagation path and the second control signal, wherein setting each of the plurality of memory modules into a second low power consumption mode is sequentially performed according to the first control signal that is propagated through the propagation path, and wherein regions of the memory modules that are shut down in the second low power consumption mode are different from regions of the memory modules that are shut down in the first low power consumption mode.