Patent ID: 9634092
Date: 2017-04-25
CPC Classifications: H01L

Claim:
1. A finFET device comprising: an active region protruding from a substrate, wherein the active region comprises: a channel region disposed at a center of the active region; a drain region disposed on a first side of the channel region; a source region disposed on a second side of the channel region opposite the first side; a gate insulating layer formed on two opposing side surfaces of the channel region and having a U-shaped cross-section; gate spacers formed on outer surfaces of the gate insulating layer; drain spacers formed on two opposing side surfaces of the drain region; and source spacers formed on two opposing side surfaces of the source region, and wherein the two opposing side surfaces of the drain region are arranged so the drain region has a tapered region tapered in a direction extending away from the channel region, and wherein a boundary between the channel region and the drain region has a same size as a boundary between the channel region and the source region.