Patent ID: 9548212
Date: 2017-01-17
CPC Classifications: H01L

Claim:
1. A method for fabricating a semiconductor device, comprising: providing a substrate having a device region and a peripheral region; forming a plurality of device structures on a surface of the substrate in the device region so as to form trenches between adjacent device structures; forming a stop layer on the surface of the substrate and the device structures; forming a densified first dielectric layer with an increased hardness on the stop layer such that a portion of the densified first dielectric layer fills the trenches in the device region and a top surface of a portion of the densified first dielectric layer in the peripheral region is lower than a surface of the stop layer on the top surface of the device structures by a densify high aspect ratio process; forming a second dielectric layer on the densified first dielectric layer; and performing a plurality of polishing processes onto the second dielectric layer and the densified first dielectric layer until a top surface of the device structures is exposed.