Patent ID: 9583538
Date: 2017-02-28
CPC Classifications: H01L

Claim:
1. A semiconductor memory device, comprising: a plurality of first interconnects extending in a first direction; a plurality of second interconnects extending in a second direction orthogonal to the first direction above the first interconnects; a plurality of stacked films respectively provided between the first interconnects and the second interconnects in a third direction orthogonal to the first direction and the second direction, the plurality of stacked films including a variable resistance film, the stacked films stacked in the third direction; a plurality of first inter-layer insulating films provided between the stacked films adjacent to each other in the second direction, the first inter-layer insulating films and the stacked films alternately arranged along the second direction; and a second inter-layer insulating film provided on a periphery of the stacked films arranged in the second direction, the second inter-layer insulating film separated from a portion between the stacked films adjacent to each other, the second inter-layer insulating film including a plurality of protrusions extending in the third direction configured to support the plurality of second interconnects, a length of the protrusions in the third direction being less than a length of the stacked films between the first interconnects and the second interconnects in the third direction.