Patent ID: 9449884
Filing Date: 2016-09-20
CPC Classification: H01L

Claim Text:
1. A method for fabricating a semiconductor device, the method comprising: forming a semiconductor fin on a substrate; forming a first gate stack over a first channel region of the fin; depositing a first liner layer on the first gate stack; depositing a semiconductor material on the first liner layer; etching to remove a portion of the semiconductor material to form a first cavity adjacent to the first gate stack; depositing an insulator material in the first cavity; depositing a first cap layer over the insulator material, the semiconductor material, and the first gate stack; etching to remove exposed portions of the first cap layer, the semiconductor material adjacent to the first gate stack to form a second cavity that exposes portions of the fin; and growing a first source/drain region on exposed portions of the fin in the second cavity.