Patent ID: 9276109
Filing Date: 2016-03-01
CPC Classification: H01L

Claim Text:
1. A high-voltage transistor with high current load capacity, comprising: a substrate made from semiconductor material with a top side; doped wells arranged on the top side, wherein these wells comprise at least one first deep well provided for a drift region and one second deep well provided for a body area; a first contact area for a drain connection in the first deep well; a second contact area for a source connection in the second deep well; a gate dielectric arranged on the second deep well between the first contact area and the second contact area; an isolation area between the gate dielectric and the first contact area; a spacing between the isolation area and the first contact area; and a gate electrode arranged on the gate dielectric, wherein this gate electrode forms a field plate on the isolation area; wherein the first deep well has a local dopant concentration that increases from the isolation area to the first contact area; wherein the isolation area comprises a plurality of finger-like projections extending toward the first contact area; wherein the isolation area comprises one of a field oxide and a shallow trench isolation; wherein the first deep well is deeper than the isolation area, and wherein the drift region comprises a section of the first deep well extending under the isolation area, the dopant concentration of the first deep well being smaller throughout this section than in a region located in the spacing between the isolation area and the first contact area.