Patent ID: 9317350
Filing Date: 2016-04-19
CPC Classification: G06F

Claim Text:
1. A method for facilitating faulty memory utilization in a memory system, the method comprising: obtaining information regarding memory health status of at least one memory page in the memory system; determining an error tolerance of the at least one memory page when the information regarding memory health status indicates that a failure is predicted to occur in an area of the memory system affecting the at least one memory page; initiating a migration of data stored in the at least one memory page when it is determined that the data stored in the at least one memory page is non-error-tolerant; notifying at least one application regarding at least one of a predicted operating system failure and a predicted application failure when it is determined that data stored in the at least one memory page is non-error-tolerant and cannot be migrated; notifying at least one application regarding the memory failure predicted to occur when it is determined that data stored in the at least one memory page is error-tolerant, whereby the at least one memory page continues to be used.