Patent ID: 9412756
Filing Date: 2016-08-09
CPC Classification: H01L

Claim Text:
1. A nonvolatile semiconductor memory device comprising: a source; a plurality of electrode films which are respectively stacked separately above the source, a semiconductor member extending in a stacking direction, the semiconductor member being electrically connected to the source, the semiconductor member being surrounded by the plurality of the electrode films; an electrically conductive conductor member having a lower resistivity than that of the semiconductor member, the conductor member extending in the stacking direction, the conductor member being electrically connected to the source, the conductor member being surrounded by the plurality of the electrode films; a bit line provided above the plurality of the electrode films, the bit line being electrically connected to the semiconductor member; a first interconnect provided above the plurality of the electrode films, the first interconnect being electrically connected to the source through the conductor member to apply a potential of the first interconnect to the source via the conductor member; a charge storage layer provided between the semiconductor member and one of the electrode films; and a dielectric layer provided between the conductor member and the plurality of electrode films.