Patent ID: 9489298
Filing Date: 2016-11-08
CPC Classification: G06F,G11C

Claim Text:
1. A nonvolatile memory apparatus which writes data into a memory cell through a program and verify (PNV) operation, comprising: a circuit device that performs a first PNV operation for first data during a first time period and that performs a plurality of second PNV operations for second data simultaneously during the first time period, wherein the first PNV operation and the plurality of second PNV operations are performed in parallel, wherein the first data is programmed at low speed and the second data is programmed at high speed, and the first PNV operation is performed only once all through the first time period, and the plurality of second PNV operations is performed from the beginning of the first time period until the end of the first time period, wherein the first time period is the time during which a first PNV pulse for the first PNV operation is maintaining an enable state for writing the first data, and a second PNV pulse for the plurality of second PNV operations is enabled a plurality of times sequentially for writing the second data during the first time period.