Patent ID: 9318514
Filing Date: 2016-04-19
CPC Classification: G02F,G06F,H01L

Claim Text:
1. A display device comprising: a gate line and a data line intersecting the gate line to define a pixel area on a substrate; a thin film transistor (TFT) formed in the pixel area, and including a gate electrode, a semiconductor layer, a source electrode, and a drain electrode; a first protective layer formed on the TFT, the first protective layer structured such that a first hole exists through the first protective layer; a second protective layer formed on the first protective layer, and structured such that a second hole exists through the second protective layer, wherein a size of the second hole through the second protective layer at a plane where the first and second protective layers contact each other differs from a size of the first hole through the first protective layer at the plane where the first and second protective layers contact each other; a pixel electrode formed on the second protective layer and at least partially filling the first and second holes, the pixel electrode connected to the drain electrode through the first and second holes; a third protective layer formed on the pixel electrode; a sensing line formed on the third protective layer; a fourth protective layer formed on the sensing line; and a common electrode formed on the fourth protective layer, and connected to the sensing line.