Patent ID: 9294107
Filing Date: 2016-03-22
CPC Classification: H03L

Claim Text:
1. A phase locked loop circuit, comprising: a phase comparison section configured to compare a phase of a first clock signal and a phase of a second clock signal; a loop filter configured to generate a control voltage based on a comparison result by the phase comparison section; and a clock signal generation section configured to generate a clock signal having a frequency corresponding to the control voltage, and output the clock signal as the second clock signal, wherein the loop filter includes a first resistor inserted between a first node on a signal path and a second node, a first capacitor inserted between the second node and a first DC power supply, a first switch inserted between the second node and a third node on the signal path, the third node being arranged on the signal path between an output terminal of a charge pump and the first node, and a second capacitor inserted between the third node and a second DC power supply, wherein the loop filter further comprises a second resistor, wherein the first resistor has a first end connected to a first end of the second capacitor, a first end of the second resistor, a first end of the first switch, the output terminal of the charge pump, and an input terminal of an oscillation circuit, wherein the first resistor has a second end connected to a first end of the first capacitor and to a second end of the first switch, wherein the first capacitor has a first end connected to the second end of the first resistor and the second end of the first switch, and has a second end being grounded, wherein the second capacitor has the first end connected to the first ends of each of the first and second resistors, the first end of the switch first, the output terminal of the charge pump, and the input terminal of the oscillation circuit, wherein the second capacitor has a second end being grounded, wherein the second resistor has the first end connected to the first end of the first resistor, the first end of the second capacitor, the first end of the first switch, the output terminal of the charge pump, and the input terminal of the oscillation circuit, and wherein the second resistor has a second end connected to a pad of a chip on which the phase locked loot circuit is provided.