Patent ID: 9377824
Filing Date: 2016-06-28
CPC Classification: G06F,G11C,H01L,H05K,Y02P

Claim Text:
1. A microelectronic assembly, comprising: a circuit panel having a first surface, a second surface opposite the first surface, and panel contacts exposed at each of the first and second surfaces; and first and second microelectronic packages having terminals mounted to the panel contacts at the first and second surfaces, respectively, the circuit panel electrically interconnecting at least some terminals of the first microelectronic package with at least some corresponding terminals of the second microelectronic package, each of the first and second microelectronic packages including: a substrate having a first surface, a second surface opposite the first surface, a plurality of substrate contacts exposed at the first surface, and first and second opposed edges between the first and second opposed surfaces, the first and second edges extending in a first direction, the second surface having first and second peripheral regions adjacent to the first and second edges, and a central region separating the first and second peripheral regions; a microelectronic element having memory storage array function, the microelectronic element having a front face facing away from the first surface of the substrate, the microelectronic element having one or more columns of element contacts exposed at the front face; conductive structure electrically connecting the element contacts with the substrate contacts; and a plurality of parallel columns of terminals exposed at the second surface and electrically connected with the substrate contacts, the terminals including first terminals in the central region of the second surface of the substrate, the first terminals configured to carry address information, and second terminals at the second surface of the substrate in at least one of the peripheral regions, the second terminals configured to carry second information, the second information being other than the information carried by the first terminals, the second information including data signals.