Patent ID: 9509341
Filing Date: 2016-11-29
CPC Classification: H03M,H04L

Claim Text:
1. A system for encoding check-irregular non-systematic irregular repeat accumulate codes, the system comprising: at least one information bit repeater having an irregular degree N, wherein the at least one information bit repeater produces a different number of N identical replicas of information bits, the at least one information bit repeater producing a first set of coded bits; an interleaver coupled to the at least one information bit repeater and configured to interleave the first set of coded bits and produce a second set of coded bits; a set of check node combiners of different degrees coupled to the interleaver, wherein a check node combiner with a degree M greater than or equal to 2 performs modulo 2-addition on M information bits, and a check node combiner with a degree M equal to 1 bypasses the modulo 2-addition, wherein the set of check node combiners receives the second set of coded bits from the interleaver and produces a third set of coded bits; and a convolutional encoder coupled to the set of check node combiners and configured to generate a check-irregular non-systematic irregular repeat accumulate code by receiving and encoding the third set of coded bits, wherein the encoded third set of coded bits is the check-irregular non-systematic irregular repeat accumulate code.