Patent ID: 9287867
Filing Date: 2016-03-15
CPC Classification: H03K,H03M,H04L

Claim Text:
1. A pulse synthesizing circuit for synthesizing a first one-bit digital signal and a second one-bit digital signal to generate a ternary signal, the circuit comprising: a logic circuit for outputting a first electric potential in a first case of a combination of a logical value of the first one-bit digital signal and a logical value of the second one-bit digital signal, outputting a second electric potential smaller than the first electric potential in a second case where a combination of a logical value of the first one-bit digital signal and a logical value of the second one-bit digital signal is different from the combination in the first case, and outputting a third electric potential between the first electric potential and the second electric potential in a third case where a combination of a logical value of the first one-bit digital signal and a logical value of the second one-bit digital signal is different from the combinations in the first case and the second case, wherein the logic circuit outputs the first electric potential when the logical value of the first one-bit digital signal is 1 and the logical value of the second one-bit digital signal is 0, outputs the second electric potential smaller than the first electric potential when the logical value of the first one-bit digital signal is 0 and the logical value of the second one-bit digital signal is 1, and outputs the third electric potential between the first electric potential and the second electric potential when the logical value of the first one-bit digital signal is 1 and the logical value of the second one-bit digital signal 1 or when the logical value of the first one-bit digital signal is 0 and the logical value of the second one-bit digital signal is 0.