Patent ID: 9337842
Filing Date: 2016-05-10
CPC Classification: H03K

Claim Text:
1. An LVDS (Low Voltage Differential Signaling) driving circuit generating a differential signal at a first node and a second node according to a data signal, comprising: a first transistor, comprising a first terminal coupled to a supply voltage and a second terminal coupled to the first node, wherein the first transistor and a first driver form a first current mirror when the data signal is at a high logic level and do not form the first current mirror when the data signal is at a low logic level; a second transistor, comprising a first terminal coupled to the supply voltage and a second terminal coupled to the second node, wherein the second transistor and a second driver form a second current mirror when the data signal is at the low logic level and do not form the second current mirror when the data signal is at the high logic level; a third transistor, comprising a first terminal coupled to a ground voltage and a second terminal coupled to the first node, wherein the third transistor and a third driver form a third current mirror when the data signal is at the low logic level and do not form the third current mirror when the data signal is at the high logic level; and a fourth transistor, comprising a first terminal coupled to the ground voltage and a second terminal coupled to the second node, wherein the fourth transistor and a fourth driver form a fourth current mirror when the data signal is at the high logic level and do not form the fourth current mirror when the data signal is at the low logic level, wherein each of the first driver and the second driver comprises a first current sink drawing a current from a fourth node.