Patent ID: 9373620
Filing Date: 2016-06-21
CPC Classification: H01L

Claim Text:
1. A series-connected transistor structure, comprising: a first source over a substrate; a first channel-drain structure over the first source, the first channel-drain structure comprising a first channel and a first drain over the first channel; a second channel-drain structure over the first source and substantially parallel to the first channel-drain structure, the second channel-drain structure comprising a second channel and a second drain over the second channel; a gate dielectric layer surrounding the first channel and the second channel; a continuous gate surrounding the gate dielectric layer and between the first channel and the second channel; a first drain pad over and in contact with the first drain; a second drain pad over and in contact with the second drain, wherein the first drain pad and the second drain pad are separated from each other and the first drain pad is series connected to the second drain pad through the first channel-drain structure, the first source and the second channel-drain structure; and two conductive plugs separated from each other and respectively connected to the first drain pad and the second drain pad.