Patent ID: 9374903
Filing Date: 2016-06-21
CPC Classification: H05K

Claim Text:
1. A multilayer printed wiring board for mounting a semiconductor element, comprising: a core substrate; a first laminated structure laminated on a first surface of the core substrate and comprising a conductive circuit layer formed on the first surface of the core substrate, an interlayer resin insulating layer and an outermost conductive circuit layer; and a second laminated structure laminated on a second surface of the core substrate on an opposite side of the core substrate with respect to the first surface and comprising a conductive circuit layer formed on the second surface of the core substrate, an interlayer resin insulating layer and an outermost conductive circuit layer, wherein the outermost conductive circuit layer in the first laminated structure has a plurality of first solder pads positioned to mount a semiconductor element and a plurality of second solder pads positioned to mount a package substrate, the outermost conductive circuit layer in the second laminated structure has a plurality of solder pads positioned to mount a printed substrate, the outermost conductive circuit layer in the first laminated structure has a thickness which is formed greater than a thickness of the conductive circuit layer on the first surface of the core substrate, the outermost conductive circuit layer in the second laminated structure has a thicknesses which is formed greater than a thickness of the conductive circuit layer on the second surface of the core substrate, the thickness of the outermost conductive circuit layer in the first laminated structure is formed greater than the thickness of the outermost conductive circuit layer in the second laminated structure, and the first and second solder pads in the outermost conductive circuit layer in the first laminated structure are formed such that the first and second solder pads have contact portions configured to contact with solder bumps and non-contact portions configured not to contact with the solder bumps, respectively, and that the contact portions of the first and second solder pads and the non-contact portions of the first and second solder pads satisfy b/a>2.0 where a represents thicknesses of the contact portions and b represents thicknesses of the non-contact portions.