Patent ID: 9385524
Filing Date: 2016-07-05
CPC Classification: H02H

Claim Text:
1. An arc flash mitigation system comprising: three fuses respectively located in respective paths of current flow along a first, second, and third conductor, wherein the first, second, and third conductors respectively conduct three phases of alternating current power between a transformer and a generator excitation system; three current transformers respectively located around the first, second, and third conductors, each current transformer providing an output describing an amount of current flowing along its respective conductor; an overcurrent detection circuit configured to monitor the output of each current transformer and provide an overcurrent signal to a gate firing circuit when an overcurrent is detected; a first and second thyristor connected in anti-parallel between the first and second conductors; a third and fourth thyristor connected in anti-parallel between the first and third conductors; a fifth and sixth thyristor connected in anti-parallel between the second and third conductors; and the gate firing circuit configured to respectively provide a gate signal to each of the first, second, third, fourth, fifth, and sixth thyristors upon receiving the overcurrent signal.