Patent ID: 9466793
Filing Date: 2016-10-11
CPC Classification: H01L

Claim Text:
1. A memristor comprising: a first electrode wire; a second electrode wire, wherein the second electrode wire and the first electrode wire define an overlap area; an electrode extension in contact with the first electrode wire and disposed between the first and second electrode wires; and at least one junction, wherein each junction contacts a portion of the electrode extension and has a junction contact area with the second electrode wire such that the sum total junction contact area of the at least one junction is less than the overlap area between the first and second electrodes, wherein each junction further comprises a first interface with the second electrode wire and a second interface with the electrode extension such that the first interface is an Ohmic-like barrier and the second interface is switchable between an Ohmic-like barrier and a Schottky-like barrier with a switching voltage applied to at least one of the electrode wires.