Patent ID: 9390040
Filing Date: 2016-07-12
CPC Classification: G06F,Y02D

Claim Text:
1. An on-chip interconnect method for conveying traffic arranged in a plurality of classes of service between a set of initiators in a circuit-switching network and a set of targets, comprising: measuring, by component devices in said circuit-switching network, respective bandwidths of said traffic received from said initiators in said circuit-switching network; associating, by said component devices, to said traffic, starting from said set of initiators, respective priority values representative of said classes of service and each respective priority value comprising a same number of bits; propagating, by said component devices, said traffic in a first traffic network towards arbitration devices within said circuit-switching network; propagating said respective priority values in a first priority network towards said arbitration devices within said circuit-switching network, wherein said first priority network is separate from said first traffic network; performing arbitration at each arbitration device as a function of said priority values by at least obtaining, by said comparator device, a maximum priority value that is the greatest priority value between said highest priority value supplied by the look-ahead circuit and other priority values present on an input bus of said respective priority FIFO queue; outputting, by said comparator device, said maximum priority value toward a second priority network within a packet-switching network; and outputting, by said traffic FIFO queue, said traffic in said traffic FIFO queue toward a second traffic network within said packet-switching network, wherein said second traffic network is separate from said second priority network.