Patent ID: 9466571
Filing Date: 2016-10-11
CPC Classification: H01L

Claim Text:
1. A stacked semiconductor package comprising: an integrated circuit (“IC”) package substrate comprising a plurality of conductive contacts formed on a bottom surface of the IC package substrate, wherein the plurality of conductive contacts further comprise a plurality of data I/O contacts and a plurality of ground (“GND”) contacts; an arrow-shaped die stack coupled to a top surface of the IC package substrate opposite the bottom surface, the arrow-shaped die stack comprising: wherein a first subset of the plurality of conductive contacts is communicatively coupled to the exposed surfaces of the first subset of stacked semiconductor dies, and wherein a second subset of the plurality of conductive contacts is communicatively coupled to the exposed surfaces of the second subset of stacked semiconductor dies, wherein only two GND contacts of the plurality of GND contacts are surrounded by the data I/O contacts associated with respective ones of the first and second subsets of the plurality conductive contacts.