Patent ID: 9355991
Filing Date: 2016-05-31
CPC Classification: H01L

Claim Text:
1. A method for fabricating an electronic multi-output device comprising: providing a substrate having a pad and pins; providing a first chip having a first and a second transistor integrated so that the first terminals of the transistors are merged into a common terminal on one chip surface and the patterned second and third terminals are on the opposite chip surface; attaching the common first terminal to the substrate pad; attaching a driver and control chip to the substrate pad, adjacent to the first chip; connecting the second terminals of the first and second transistors by discrete first and second gang clips to respective substrate pins; providing a second chip having a third and a fourth transistor integrated so that the second terminals of the transistors are merged into a common terminal on one chip surface, and the patterned first and third terminals are on the opposite chip surface; flipping the second chip for attaching the first terminals vertically to the first and second gang clips, respectively, and concurrently attaching the third terminals by discrete gang clips to respective pins; and attaching a common clip to the common second terminal and connecting the common clip to a pin.