Patent ID: 9263567
Filing Date: 2016-02-16
CPC Classification: H01L

Claim Text:
1. A normally off nitride-based transistor, comprising: a source electrode and a drain electrode; a channel layer comprising a charge transfer path between the source electrode and the drain electrode; a gate electrode configured to control charge transfer of the channel layer; a channel-forming stack comprising a junction structure of a first conductivity-type nitride semiconductor layer and an intrinsic nitride semiconductor layer configured to generate a fixed turn-off blocking electric field in a channel; a switch semiconductor layer disposed in a first region on the channel forming stack; a gate dielectric layer and a gate electrode disposed in a second region on the switch semiconductor layer; a source electrode disposed in a third region on the switch semiconductor layer; and a drain electrode disposed in a fourth region on the channel forming stack, wherein: the channel layer comprises a junction structure of a first conductivity-type nitride semiconductor layer and an intrinsic nitride semiconductor layer such that a fixed turn-off blocking electric field is to be generated in the channel layer between the source electrode and the drain electrode in a turn-off state; the intrinsic nitride semiconductor layer comprises an intrinsic GaN semiconductor layer, and the first conductivity-type nitride semiconductor layer comprises a p-type GaN semiconductor layer disposed on the intrinsic GaN semiconductor layer; the switch semiconductor layer comprises: an inclined plane is disposed from the third semiconductor layer to the first semiconductor layer.