Patent ID: 9337150
Filing Date: 2016-05-10
CPC Classification: H01L

Claim Text:
1. An integrated circuit device, comprising: spaced apart conductive patterns on a substrate surface comprising first and second regions; a remaining pattern on the substrate surface between adjacent ones of the conductive patterns in the first region; a supporting pattern on the substrate surface between adjacent ones of the conductive patterns in the second region and separated therefrom by respective gap regions, wherein the adjacent ones of the conductive patterns in the second region extend away from the substrate surface beyond a top surface of the supporting pattern therebetween; and a capping layer on respective surfaces of the conductive patterns in the second region and on the top surface of the supporting pattern such that a surface of the capping layer thereon is non-planar, wherein the supporting pattern extends away from the substrate surface beyond a top surface of the remaining pattern.