Patent ID: 9299166
Filing Date: 2016-03-29
CPC Classification: G06T,H04N

Claim Text:
1. An image compression circuit for encoding an image comprising a plurality of pixels, the circuit comprising: a lossless compressor configured to generate a variable length bit stream of a first size from a tile of pixels from the image, wherein the lossless compressor is configured to save bits for even rows in a first direction, and for odd rows in a second direction that is reverse of the first direction; a quantization compressor configured to generate a fixed length bit stream of a second size from the tile of pixels, wherein the lossless compressor and the quantization compressor operate in parallel; an output memory block having a predetermined size; and a bandwidth compressor configured to store the variable length bit stream in the memory block if the first size is smaller than or equal to the predetermined size and is configured to store the fixed length bit stream in the memory block if the first size is greater than the predetermined size.