Patent ID: 9311235
Filing Date: 2016-04-12
CPC Classification: G06F,G11C

Claim Text:
1. A method ( 50 ) of erasing information stored in a nonvolatile rewritable memory ( 102 ) of an electronic computer ( 10 ), in which a master module (Mm) sends erasing requests to a slave module (Me) of said electronic computer ( 10 ), said nonvolatile rewritable memory ( 102 ) being organized into sectors (Sa, Sb) corresponding to the smallest memory unit capable of being made the subject of an erasing operation, at least two sectors comprising interleaved physical memory addresses, said method comprising the following preliminary steps: determining a virtual memory addressing space associated with the sectors of the nonvolatile rewritable memory ( establishing a first correspondence function that determines, for any given range of virtual memory addresses, one or more of said sectors that are associated with said given range of virtual memory addresses, wherein, following said preliminary steps the method ( for each erasing request received by the slave module (Me) indicating a range of virtual memory addresses to be erased, a step is carried out of determining, according to said first correspondence function and the indicated range of virtual memory addresses, one or more corresponding sectors of the non-volatile memory to be erased by the slave module (Me), wherein the nonvolatile rewritable memory comprises a plurality of segments (S wherein each erasing request sent by the master module (Mm) is sent indicating a range of virtual memory addresses corresponding only to a single segment (S wherein two consecutive erasing requests sent by the master module (Mm) respectively indicate ranges of virtual memory addresses corresponding to different segments of the nonvolatile rewritable memory (