Patent ID: 9496173
Filing Date: 2016-11-15
CPC Classification: H01L

Claim Text:
1. A semiconductor structure comprising: a frontend portion including a device layer on a substrate; a backend portion including a bottom metal layer, a top metal layer, and a plurality of metal layers between the bottom and top metal layers; wherein (a) the backend portion includes no metal layer between the bottom metal layer and a top of the frontend portion; (b) the backend portion includes no metal layer between the top metal layer and the top of the backend portion; (c) the top metal layer includes a top metal layer thickness extending from a bottom of the top metal layer to a top of the top metal layer; (d) the bottom metal layer includes a bottom metal layer thickness extending from a bottom of the bottom metal layer to a top of the bottom metal layer; (e) the plurality of metal layers includes a multilayer thickness extending from a bottom of the plurality of metal layers to a top of the plurality of metal layers; and (f) the top metal layer thickness is greater than or equal to a sum of the bottom metal layer thickness and the multilayer thickness; wherein the plurality of metal layers includes at least 7 metal layers; wherein (a) the backend portion includes an additional metal layer immediately below and adjacent the top metal layer, (b) the additional metal layer includes signal interconnects, isolated from each other by dielectric material, which have an interconnect material to conduct signals, (c) the interconnect material includes copper and has an additional metal layer resistivity and the top metal layer includes a top metal layer resistivity that is less than 10% of the additional metal layer resistivity.