Patent ID: 9502575
Filing Date: 2016-11-22
CPC Classification: G02F,H01L

Claim Text:
1. An oxide thin film transistor (TFT) array substrate including a base substrate and an oxide TFT, a gate line, a data line and a pixel electrode provided on the base substrate, a drain electrode of the oxide TFT being connected with the pixel electrode, wherein a connection structure is provided between a source electrode of the oxide TFT and the data line, the source electrode of the oxide TFT and the data line are electrically connected through the connection structure, and a resistivity of the connection structure is larger than that of the source electrode, the source electrode and the data line are disposed in a same layer, a passive layer is provided on the source electrode, the connection structure and the data line, both the source electrode and the data line interface the passive layer and are disposed on a same side of the passive layer, wherein the oxide TFT includes: a gate insulation layer provided on the gate line; an oxide active layer provided on the gate insulation layer and above the gate line; an etch barrier layer provided on the oxide active layer; and the source electrode and the drain electrode provided on the etch barrier layer and contacting with the oxide active layer, respectively, wherein at least one portion of the gate line below the oxide active layer is used as a gate electrode of the oxide TFT, wherein the etch barrier layer is provided with through holes exposing the oxide active layer, and the source electrode and the drain electrode are contacted with the oxide active layer via the through holes.