Patent ID: 9484936
Filing Date: 2016-11-01
CPC Classification: H03B,H03C,H03L,H03M

Claim Text:
1. An integrated circuit comprising: a dual port modulator having a first input for receiving a transmitter modulation signal, a first output for providing a fractional portion of a high port modulation signal, a second output for providing an integer portion of the high port modulation signal, and a third output for providing a low port signal, the fractional portion of the high port modulation signal generated using a signed single bit signal; a sigma delta modulator to generate a low port modulation signal, the sigma delta modulator having an input for receiving a signal comprising a mix of a target frequency signal with the low port signal, and an output for providing the low port modulation signal; a voltage controlled oscillator (VCO) coupled to the dual port modulator, the VCO having a first input for receiving the fractional portion of the high port modulation signal, a second input for receiving the integer portion of the high port modulation signal, a third input for receiving a tuning signal based on the low port modulation signal, and a first output for outputting an RF signal.