Patent ID: 9524882
Filing Date: 2016-12-20
CPC Classification: H01L

Claim Text:
1. A method comprising: obtaining a semiconductor structure including a semiconductor substrate and a plurality of columns extending from the semiconductor substrate, the columns being separated by a plurality of recesses, each of the columns including a III-V base and a III-V fin structure, the III-V fin structure being positioned on the III-V base; epitaxially growing a silicon-containing layer on the semiconductor substrate and within the recesses such that a portion of the silicon-containing layer adjoins the III-V fin structures, wherein epitaxially growing the silicon-containing layer includes epitaxially growing a first, p-type silicon layer on the semiconductor substrate and a second silicon layer on the first, p-type silicon layer; causing diffusion of silicon from the silicon-containing layer into the III-V fin structures to form n-type junctions, and forming n-type source/drain regions from the second silicon layer.