Patent ID: 9431572
Filing Date: 2016-08-30
CPC Classification: B82Y,H01L

Claim Text:
1. A method for providing and operating a device in a first mode as a light-emitting transistor and in a second mode as a high speed electrical transistor, comprising the steps of: providing a p-type semiconductor base region between n-type semiconductor emitter and collector regions; providing, in said base region, a quantum size region; providing, in said base region between said quantum size region and said collector region, a p-type carrier transition region, said base region being more heavily doped p-type adjacent said emitter region than it is doped p-type in said carrier transition region; applying a controllable bias voltage with respect to said base and collector regions to control depletion of carriers in at least said carrier transition region; and applying signals with respect to said emitter, base, and collector regions to operate said device as either a light-emitting transistor or a high speed electrical transistor, depending on said controllable bias voltage.