Patent ID: 9437166
Filing Date: 2016-09-06
CPC Classification: G09G

Claim Text:
1. A scan driver, comprising: a plurality of stages dependently connected to each other, wherein each of the plurality of stages outputs a gate signal, wherein a first scanning start signal is input to a first stage of the plurality of stages, wherein a second scanning start signal is input to a last stage of the plurality of stages, wherein each of the first scanning start signal and the second scanning start signal has a single pulse per frame, wherein the plurality of stages sequentially outputs gate-on voltages between a time when a pulse of the first scanning start signal for a frame is input to the first stage and a time when a pulse of the second scanning start signal for the frame is input to the last stage, wherein the plurality of stages outputs a first low voltage lower than the gate-on voltage after the pulse of the second scanning start signal for the frame is input to the last stage, and wherein each of the plurality of stages includes a low voltage terminal which directly receives the first scanning start signal or the second scanning start signal.