Patent ID: 9237657
Filing Date: 2016-01-12
CPC Classification: G02F,H01L,H05K

Claim Text:
1. A method for manufacturing a wiring substrate, comprising the steps of: forming a first conductive layer; forming an insulating layer over the first conductive layer; forming a porous film on the insulating layer; forming an opening in the insulating layer and the porous film; discharging a composition including a conductive material into the opening and over the porous film to form a second conductive layer to be on and in direct contact with the first conductive layer and the a part of porous film by an ink jet method after forming the opening; and etching an exposed portion of the porous film using the second conductive layer as a mask after discharging the composition, wherein an outermost side end portion of the second conductive layer is aligned with a side end portion of the etched porous film, wherein an entire top surface of the etched porous film is overlapped with the second conductive layer, wherein the step of discharging the composition is performed under reduced pressure, wherein the porous film is formed to have pores, and wherein at least one pore is filled with the composition including the conductive material.