Patent ID: 9317443
Filing Date: 2016-04-19
CPC Classification: G06F

Claim Text:
1. A system for managing translations, comprising: a processor, coupled with a memory, and configured to perform the actions of: for a current context in control of a processor requesting access to a particular address, specifying a virtual address with a logical partition identifier value indicating a privilege setting of the current context, a process identifier value indicating whether the address is within shared address space, and an effective address comprising at least a portion of the particular address; and in response to the virtual address not matching at least one entry within a translation lookaside buffer comprising at least one entry stored for at least one previous translation of at least one previous address, translating the virtual address into a real page number using at least one page table and adding a new entry to the translation lookaside buffer with the virtual address and the real page number, wherein each at least one entry within the translation lookaside buffer identifies a separate privilege setting from among a plurality of privilege settings and a separate indicator of whether the address is within the shared address space.