Patent ID: 9300469
Filing Date: 2016-03-29
CPC Classification: H04L

Claim Text:
1. A secure computing system that obtains a computation result f(m) of a logic circuit function f(x) for an input value m while concealing said input value m, comprising: a first secure computing apparatus that stores said logic circuit function f(x); and a second secure computing apparatus which is independent from said first secure computing apparatus, wherein said first secure computing apparatus includes: a first receiver that receives a segment B of said input value m, said input value m having been divided into a segment A and said segment B; and a generator that uses said logic circuit function f(x) and said segment B to generate data T in which said logic circuit function f(x) and said segment B are concealed by concealing the specific logic gates used to achieve the logic circuit function f(X*B) where * is an operator, with segment B as an input, when generating the data T, said input value m corresponding to said segment A and said segment B; and wherein said second secure computing apparatus includes: a second receiver that receives said segment A and said data T; and a calculator that obtains said computation result f(m) by using said segment A and said data T without using said segment B.