Patent ID: 9293329
Filing Date: 2016-03-22
CPC Classification: H01L

Claim Text:
1. A method of processing a silicon wafer for use in a substrate for an electronic circuit, comprising: impregnating the silicon wafer with impurities that form one or more deep energy levels within the band gap of silicon, wherein at least one of said deep energy levels is positioned at least 0.3 eV away from the conduction band if the level is a donor level or at least 0.3 eV away from the valence band if the level is an acceptor level; and pre-processing the silicon wafer, prior to or after said impregnation step, so that precipitation of oxide during, after, or during and after, said impregnating step is suppressed wherein said pre-processing comprises removing the oxide clusters/nuclei to a level that is insufficient to give rise to significant precipitation in subsequent processing steps; wherein said pre-processing comprises a heat treatment that dissolves all or a proportion of oxide clusters/nuclei present before said pre-processing; wherein said heat treatment is followed by a cooling that is sufficiently rapid to prevent significant creation of new oxide clusters/nuclei during the cooling process; and wherein said cooling comprises reducing the temperature of the silicon wafer to below 650 degrees C. in less than ten minutes.