Patent ID: 9257178
Filing Date: 2016-02-09
CPC Classification: G11C

Claim Text:
1. A device for writing to a memory cell of a memory, the device comprising: a voltage-generating circuit configured to generate a write voltage; a current mirror circuit configured to generate a mirror current that mirrors a write current flowing through the memory cell of the memory, and including a current source circuit coupled to the node and configured to generate a compliance current; and a switch circuit coupled to the node and between the voltage-generating circuit and the source terminals of the first and second transistors, and configured to detect a voltage at the node, to permit application of the write voltage to the memory cell of the memory when the voltage detected thereby is less or greater than a threshold value, and to inhibit the application of the write voltage to the memory cell of the memory when the voltage detected thereby increases or decreases to the threshold value.