Patent ID: 9412473
Filing Date: 2016-08-09
CPC Classification: G11C

Claim Text:
1. A One-Time Programmable (OTP) memory, comprising: at least one main OTP array having a plurality of OTP cells, a plurality of Inputs/Outputs (I/Os), and at least one auxiliary OTP cell associated with each of the I/Os, at least one of the OTP cells having at least one OTP element and a selector; at least one volatile cell per I/O to store data corresponding to the at least one auxiliary OTP cell; and a plurality of Boolean gates to invert the OTP cell data in each into or out of the main OTP array based on data stored in the at least one volatile cell for the corresponding I/O, wherein the OTP memory is configured to repair defects by inverting data into and out of the main array in each of the I/Os independently when no more than one defect per each of the I/Os is found, and wherein the inverting is achieved by automatically generating at least one cycle to read the at least one auxiliary OTP cell and correspondingly store the data read into the at least one volatile cell upon initialization.