Patent ID: 9450069
Filing Date: 2016-09-20
CPC Classification: H01L

Claim Text:
1. A method of forming a hetero-junction bipolar transistor comprising: providing a substrate; forming a semiconductor collector layer on a first surface of said substrate, said semiconductor collector layer including a top surface and a bottom surface, said bottom surface being in contact with said substrate; forming a heavily doped n-type collector pedestal within said semiconductor collector layer, said heavily doped n-type collector pedestal having an essentially uniform n-type dopant concentration of a first dopant from said bottom surface of said semiconductor collector layer to a depth below said top surface such that said essentially uniform n-type dopant concentration does not extend to said top surface; removing defects at said top surface of said semiconductor collector layer by performing a laser anneal; and forming a base layer on said top surface such that said base layer is doped with a p-type dopant, wherein the base layer is formed after forming the heavily doped n-type collector pedestal.