Patent ID: 9325620
Filing Date: 2016-04-26
CPC Classification: H04L

Claim Text:
1. A non-transitory computer readable medium having stored thereon computer executable instructions embodied in a computer memory and when executed by a processor performs the steps, comprising: identifying a number of modems in each bonding group of a plurality of bonding groups, resulting in a first data structure; determining a configuration for each bonding group of the plurality of bonding groups, resulting in a second data structure; determining a channel load for each channel of a plurality of channels according to the first data structure and the second data structure, resulting in a third data structure; evaluating the third data structure for each channel of the plurality of channels; and adjusting the third data structure for each channel of the plurality of channels by adjusting the first data structure for each channel of the plurality of channels, until a variance in the channel loads of the plurality of channels identified in the third data structure is less than a predetermined threshold variance, wherein the variance in the channel loads of the plurality of channels defines a load balance of the plurality of channels, and the adjusting the first data structure for each channel of the plurality of channels is according to a steepest descent process that includes adjusting the first data structure for each channel of the plurality of channels according to: wherein R is the third data structure represented as R=(r is a derivation of the variance in the channel loads of the plurality of channels.