Patent ID: 9327364
Filing Date: 2016-05-03
CPC Classification: B23K,B26F,H05K,Y02P,Y10T

Claim Text:
1. A method of manufacturing a chip solder comprising: forming a solder piece by a punching process, including forming the solder piece in a rectangular parallelepiped shape with a first planar surface, a second planar surface opposite the first surface, a third planar surface, and a fourth planar surface opposite the third surface, forming a fifth surface on which a shear droop portion is generated by punching on a sixth surface opposite the fifth surface, thereby driving the solder piece in a direction toward the fifth surface, and wherein the first through fourth surfaces are sheared surfaces and any one of only the first through fourth surfaces is a vacuum pickup surface, but neither fifth surface nor the sixth surface is a vacuum pickup surface, and wherein a distance between the fifth and sixth surfaces is greater than a distance between the first and second surfaces and is greater than a distance between the third and fourth surfaces, and wherein the sixth surface has an area that is smaller than an area of each of the first through fourth surfaces, providing a supply tape including an open cavity portion for receiving a solder piece, wherein the open cavity portion is rectangular and has a length sufficient to accommodate the distance between the fifth and sixth surfaces and has a width smaller than the distance between the fifth and sixth surfaces and yet sufficient to accommodate the distance between the third and fourth surfaces, whereby the solder piece can be received in the open cavity portion with the first surface exposed, and placing the solder piece in the open cavity portion of the supply tape with a planar surface selected from only the first through fourth surfaces exposed to be available for vacuum pickup.