Patent ID: 9312268
Filing Date: 2016-04-12
CPC Classification: H01L

Claim Text:
1. A method of producing an integrated circuit comprising: forming a first fin overlying a substrate, wherein the first fin extends in a first direction, and wherein the first fin comprises a first fin left end; forming a second fin overlying the substrate, wherein the second fin extends in a second direction different than the first direction, and wherein the second fin intersects the first fin at a fin intersection; forming a tunnel dielectric adjacent to the first fin; forming a floating gate adjacent to the first fin such that the tunnel dielectric is positioned between the floating gate and the first fin; forming an interpoly dielectric adjacent to the floating gate; forming a control gate adjacent to the interpoly dielectric such that the interpoly dielectric is positioned between the floating gate and the control gate; and removing the control gate, the interpoly dielectric, the floating gate, and the tunnel dielectric from over the first fin except for at a floating gate position, wherein the floating gate position is between the first fin left end and the fin intersection.