Patent ID: 9324861
Filing Date: 2016-04-26
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a semiconductor layer formed above one principal surface of a supporting substrate, with a buried insulating film interposed therebetween; a first body region of a first conductivity type formed in an upper portion of the semiconductor layer; a drift region of a second conductivity type formed in an upper portion of the semiconductor layer to be adjacent to the first body region or apart from the first body region; a buffer region of the second conductivity type formed in an upper portion of the drift region; a first emitter region of the second conductivity type and a second emitter region of the second conductivity type having a concentration lower than a concentration of the first emitter region, the first emitter region and the second emitter region being formed in upper portions of the first body region; a collector region of the first conductivity type formed in an upper portion of the buffer region; a body contact region of the first conductivity type formed in an upper portion of the semiconductor layer such that at least part of the body contact region contacts the first body region; a gate insulating film formed on the semiconductor layer, extending from the second emitter region toward the buffer region beyond the first body region, and covering part of the drift region, and a gate electrode formed on the gate insulating film; and an emitter electrode contacting the first emitter region and the body contact region, and a collector electrode contacting the collector region, the emitter electrode and the collector electrode being formed on the semiconductor layer, wherein the second emitter region contacts the first emitter region, and extends laterally to a portion under the gate electrode so as to be longer than a diffusion depth of the second emitter region and not beyond a lateral length of the first body region under the gate electrode, in an area from an end portion of the first emitter region closer to the gate electrode to a region under the gate electrode.