Patent ID: 9320185
Filing Date: 2016-04-19
CPC Classification: H01L,H05K

Claim Text:
1. A method of manufacturing a component-embedded substrate, comprising: preparing a thin electrically conductive layer which is to form a conductor pattern; forming a mask layer on the conductive layer except a plurality of actual connection spots and at least one dummy connection spot on the conductive layer; forming, with use of solder, actual solder pads and a dummy solder pad on the actual connection spots and the dummy connection spot, respectively, where the conductive layer is exposed; connecting connection terminals of an electric or electronic component to the actual solder pads; forming an electrically insulating base of resin which is laminated directly on or indirectly via the mask layer on the conductive layer and in which the component is embedded; and removing part of the conductive layer by using the dummy solder pad as a reference, to form the conductor pattern.