Patent ID: 9502345
Filing Date: 2016-11-22
CPC Classification: H01L

Claim Text:
1. A multichip package comprising: a substrate; a plurality of chips mounted to a first surface of the substrate, the plurality of chips comprising a first chip group of plural chips and a second chip group of plural chips; a ball grid array attached to a second surface of the substrate providing communication terminals of the package, the ball grid array comprising a first ball group and a second ball group; a first set of electrical connections to transmit at least one of signals and power, the first set of electrical connections connecting the first ball group to the first chip group; a second set of electrical connections to transmit at least one of signals and power, the second set of electrical connections connecting the second ball group to the second chip group, wherein at least one of the individual balls of the first ball group has an electrical connection of the first set of electrical connections to a signal terminal of one chip of the first chip group and to a signal terminal of a different chip of the first chip group, wherein at least one of the individual balls of the second ball group has an electrical connection of the second set of electrical connections to a signal terminal of one chip of the second chip group and to a signal terminal of a different chip of the second chip group, and wherein the first ball group is dedicated to the first chip group and the second ball group is dedicated to the second chip group.