Patent ID: 9504063
Filing Date: 2016-11-22
CPC Classification: H04L,H04W,Y02D

Claim Text:
1. An integrated circuit to control a process, the process comprising: transmitting, to a terminal configured with one or more downlink component carriers, downlink assignment information indicating resources for downlink data, wherein the resources are respectively assigned to the downlink component carriers; transmitting the downlink data to the terminal; receiving a response signal for the downlink data, the response signal being transmitted from the terminal; and receiving a scheduling request (SR) from the terminal, wherein: the response signal denotes an outcome of a decoding of the downlink data, or denotes a Discontinuous Transmission (DTX) representing that the outcome is not transmitted; when a plurality of downlink component carriers are configured, response signals for a plurality of downlink data in the downlink component carriers, respectively, are transmitted; when the response signals are transmitted, the response signals are transmitted using a phase point and one of uplink control channel resources for the response signals, which depend on an outcome of the decoding of the plurality of downlink data; and when both the response signals and the SR are transmitted in a same sub-frame, the response signals are transmitted using a phase point that depends on an outcome of the decoding of the plurality of downlink data and using an uplink control channel resource for the SR.