Patent ID: 9406669
Filing Date: 2016-08-02
CPC Classification: H01L

Claim Text:
1. A method of forming a transistor, the method comprising: forming a mesa on a semiconductor substrate, the mesa having a first type conductivity; forming a first dielectric layer on a sidewall of the mesa; forming a gate stack on the sidewall of the mesa and the first dielectric layer, wherein the gate stack includes a gate electrode; after forming the gate stack, forming a protection layer over the mesa; performing an implantation process to substrate while the mesa is protected by the protection layer; forming a second dielectric layer on the gate stack; and forming, on the mesa, a region having a second type conductivity opposite to the first type conductivity, wherein the forming, on the mesa, the region having a second type conductivity opposite to the first type conductivity includes recessing the mesa and epitaxy and growing a semiconductor material on the mesa.