Patent ID: 9324619
Filing Date: 2016-04-26
CPC Classification: H01L

Claim Text:
1. A method of fabricating a semiconductor device having a first region, a second region, and a third region between the first and second regions, the method comprising: providing a substrate spanning the first, second, and third regions; forming first preliminary active patterns and second preliminary active patterns on the substrate such that the first and second preliminary active patterns protrude from the substrate, the first preliminary active patterns extending from the first region into the third region so as to overlap the substrate in the third region, and the second preliminary active patterns extending from the second region into the third region so as to also overlap the substrate in the third region; forming mask patterns on the substrate in the first and second regions but not in the third region thereby leaving the substrate exposed in the third region; performing a first etching process comprising etching the first and second preliminary active patterns using the mask patterns as an etch mask to form first and second active patterns from the first and second preliminary active patterns, respectively; and forming gate structures on the substrate, the gate structures comprising a first gate structure crossing the first active patterns and a second gate structure crossing the second active patterns, wherein the first active patterns extend longitudinally in a first direction and are spaced apart from each other in a second direction crossing the first direction, the second active patterns extend in the first direction and are spaced apart from each other in the second direction, the first direction extends across the first, second and third regions, and distances, in the second direction, between adjacent ones of the first active patterns are different from those between adjacent ones of the second active patterns.