Patent ID: 9495289
Filing Date: 2016-11-15
CPC Classification: G06F

Claim Text:
1. A method of optimizing the performance of a solid state memory device by partitioning, the method comprising: creating a plurality of partitions of a storage array including a plurality of physical storage devices, wherein each of the plurality of partitions are configured to store pages evicted from a main memory, wherein two or more of the plurality of physical storage devices includes at least a portion of two or more of the plurality of partitions, and wherein one or more of the plurality of partitions is entirely stored on only one of the plurality of physical storage devices; configuring the plurality of partitions to allocate a first portion of the plurality of partitions for small random access files and a second portion of the plurality of partitions for large random access files; creating a plurality of mapping tables, each corresponding to one of the partitions, wherein a logical to physical lookup for data stored in each of the partitions is managed by only a single one of the plurality of mapping tables; receiving a read or write command to a logical address; and mapping the read or write command to one of the plurality of partitions and mapping tables, wherein each of the plurality of mapping tables is configured to support a different ratio of logical to physical addresses to enable different levels of overprovisioning for each partition, wherein the level overprovisioning for each of the plurality of partitions is based on and positively correlated with a write frequency of each of the plurality of partitions; and removing a partition of the plurality of partitions based upon a need for additional storage for a new partition.