Patent ID: 9406775
Filing Date: 2016-08-02
CPC Classification: H01L

Claim Text:
1. A method comprising: providing a silicon (Si) substrate with silicon fins and at least one metal gate, each metal gate having a nitride-cap perpendicular to and over the silicon fins, with source/drain (S/D) regions on the silicon fins on opposite sides of each gate and an oxide-cap on each S/D region; forming parallel dielectric lines separated from each other perpendicular to and over the at least one gate; forming a first photoresist over the parallel dielectric lines and forming an opening in the photoresist to expose at least one of the nitride-caps between two silicon fins; removing the exposed at least one nitride-cap to expose an underlying metal gate; removing the exposed underlying metal gate and a remainder of the first photoresist layer, after removing the exposed at least one nitride cap to expose the underlying gate; forming parallel low-k dielectric lines adjacent to and in between the parallel dielectric lines; removing sections of the parallel dielectric lines; forming perpendicular interconnects between the parallel low-k dielectric lines; removing a remainder of the parallel dielectric lines forming trenches; and forming a metal layer in the trenches.