Patent ID: 9324812
Filing Date: 2016-04-26
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: at least one nanowire that is disposed over a substrate, extends to be spaced apart from the substrate, and comprises a channel region; a gate that surrounds at least a part of the channel region; a gate dielectric film that is disposed between the channel region and the gate; a semiconductor layer that extends from the substrate to one end of the at least one nanowire, and comprises a source/drain region that contacts the one end of the at least one nanowire; insulating spacers that are disposed between the gate and the source/drain region and between the substrate and the at least one nanowire, and are formed of a material that is different from a material of the gate dielectric film; and a buffer layer that is disposed in a first region of the substrate and between the substrate and the gate, wherein the buffer layer is formed of a material that has a lattice constant that is higher than a lattice constant of the substrate.