Patent ID: 9509293
Filing Date: 2016-11-29
CPC Classification: G06F,H03K,Y02D

Claim Text:
1. A method for controlling chip performance, comprising: obtaining a working temperature of a chip; when the working temperature of the chip reaches one of multiple preset temperature thresholds, obtaining, according to a preset correspondence between a temperature threshold and a chip performance control policy, the chip performance control policy corresponds to the one of the multiple temperature thresholds; and controlling working of the chip according to the chip performance control policy, wherein the chip performance control policy comprises clock frequency decrease information that corresponds to each of the multiple temperature thresholds, the clock frequency decrease information comprises a clock frequency decrease value or a clock frequency decrease proportion, and the obtaining the chip performance control policy that corresponds to the one of the multiple temperature thresholds comprises: obtaining the clock frequency decrease value or the clock frequency decrease proportion, wherein the clock frequency decrease value or the clock frequency decrease proportion corresponds to the one of the multiple temperature thresholds; and the controlling the working of the chip according to the control policy comprises: decreasing a working frequency of the chip according to the clock frequency decrease value or the clock frequency decrease proportion, and decreasing, according to preset correspondence between a working frequency of an additional chip and a working voltage of the additional chip, a working voltage of the chip after the working frequency of the chip is decreased.