Patent ID: 9514992
Filing Date: 2016-12-06
CPC Classification: H01L

Claim Text:
1. A method for forming a semiconductor device, comprising: forming first and second gate stacks on an upper surface of a substrate, whereby the first and second gate stacks are formed in parallel and are separated by an intermediate region; depositing a dielectric layer on an upper surface of the first and second gate stacks, whereby the dielectric layer comprises a trench region above at least a portion of the intermediate region, wherein the trench region includes first and second parallel sidewalls, parallel to the first and second gate stacks, and third and fourth parallel sidewalls, perpendicular to the first and second gate stacks; depositing a silicide layer within a bottom portion of the trench region; and depositing, by an angular gas cluster ion beam device, a spacer layer within at least the first and second portions of the trench region above and in direct contact with portions of the silicide layer, wherein sidewalls of the first portion of the trench region comprise portions of the first, second, and third sidewalls of the trench region, and wherein sidewalls of the second portion of the trench region comprise portions of the first, second and fourth sidewalls of the trench region.