Patent ID: 9530858
Filing Date: 2016-12-27
CPC Classification: H01L

Claim Text:
1. A nitride semiconductor device comprising: a substrate; a first n-type nitride semiconductor layer formed over the substrate; a first p-type nitride semiconductor layer having a first p-type impurity concentration, the first p-type nitride semiconductor layer formed in a region of a base mesa pattern over the first n-type nitride semiconductor layer; a second p-type nitride semiconductor layer having a second p-type impurity concentration, the second p-type nitride semiconductor layer formed over an entire area of the first p-type nitride semiconductor layer; a third p-type nitride semiconductor layer having a third p-type impurity concentration, the third p-type nitride semiconductor layer formed in a partial region over the second p-type nitride semiconductor layer; a region including a second n-type nitride semiconductor formed inside a partial region of the second p-type nitride semiconductor layer by ion implantation of an n-type impurity; a first electrode put in ohmic connection to the first n-type nitride semiconductor layer; a second electrode put in ohmic connection to the third p-type nitride semiconductor layer; and a third electrode put in ohmic connection to the second n-type nitride semiconductor, wherein the first p-type impurity concentration concerning impurity addition to the first p-type nitride semiconductor layer is higher than the second p-type impurity concentration concerning impurity addition to the second p-type nitride semiconductor layer, and the third p-type impurity concentration concerning impurity addition to the third p-type nitride semiconductor layer is higher than the second p-type impurity concentration concerning impurity addition to the second p-type nitride semiconductor layer.