Patent ID: 9318577
Filing Date: 2016-04-19
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a semiconductor device, comprising the steps of: forming a semiconductor layer over an insulating surface; forming a gate insulating film over the semiconductor layer, the gate insulating film comprising a first gate insulating portion, a second gate insulating portion and a third gate insulating portion; forming a first conductive film over the gate insulating film; forming a second conductive film over the first conductive film; forming a first mask layer and a second mask layer over the second conductive film by using a light exposure mask configured to transmit light with a plurality of intensities; forming a first conductive layer overlapping a first region of the semiconductor layer and a second conductive layer over and in contact with the first conductive layer by etching the second conductive film and the first conductive film using the first mask layer, and a third conductive layer overlapping a second region of the semiconductor layer by etching the second conductive film and the first conductive film using the second mask layer; and adding an impurity element imparting one conductivity type to both the second region of the semiconductor layer and a third region of the semiconductor layer by using the first conductive layer, the second conductive layer, and the third conductive layer as a mask, wherein the first region of the semiconductor layer and the first gate insulating portion overlap each other, wherein the second region of the semiconductor layer and the second gate insulating portion overlap each other, wherein the third region of the semiconductor layer and the third gate insulating portion overlap each other, wherein the third gate insulating portion is positioned between the first gate insulating portion and the second gate insulating portion, and wherein the third gate insulating portion is exposed after forming the third conductive layer.