Patent ID: 9336345
Filing Date: 2016-05-10
CPC Classification: G06F,H01L

Claim Text:
1. A method for converting a planar integrated circuit design to a non-planar integrated circuit design comprising: identifying, using a computer processor of a computing system, a rectangular silicon active area in the planar integrated circuit design; superimposing, using the computer processor, a FinFET design grid comprising a plurality of equidistantly-spaced parallel grid lines over the rectangular silicon active area such that two sides of the rectangular silicon active area are parallel to the grid lines; generating, using the computer processor, a rectangular active silicon marker area encompassing the silicon active area; generating, using the computer processor, fin mandrels longitudinally along every other grid line of the plurality of grid lines and within the active silicon marker area and the silicon active area; and removing, using the computer processor, a portion of the fin mandrels from the design grid so as to generate the non-planar integrated circuit design, wherein removing the portion of the fin mandrels from the design grid comprises removing the fin mandrels from areas of the design grid outside of the active silicon marker area.