Patent ID: 9342645
Filing Date: 2016-05-17
CPC Classification: G06F

Claim Text:
1. A method for testing a circuit specification after changing a first version of the circuit specification into a second version of the circuit specification due to a revision of the circuit specification, the method comprising: receiving, at one or more computer systems, a first set of mutations associated with the first version of the circuit specification and a second set of mutations associated with the second version of the circuit specification; identifying, with the one or more processors associated with one or more computer systems, changed and unchanged mutations in the first set of mutations and in the second set of mutations based on a comparison between the second version of the circuit specification and the first version of the circuit specification, wherein mutations that can be inserted only in the first version of the circuit specification or only in the second version of the circuit specification are identified as changed mutations, and mutations that can be inserted in the first version of the circuit specification and the second version of the circuit specification are identified as unchanged mutations; and generating, with the one or more processor associated with the one or more computer systems, information configured to test the second version of the circuit specification using at least a portion of the identified mutations classified as the changed mutations.