Patent ID: 9455300
Filing Date: 2016-09-27
CPC Classification: H01L

Claim Text:
1. A device comprising: a first semiconductor layer grown over a growth substrate; a plurality of pixels grown on the first semiconductor layer, each pixel comprising an active layer disposed between an n-type region and a p-type region; trenches isolating individual pixels and forming at least one sidewall for each pixel; a first metal layer in direct contact with the p-type region on a top surface of each pixel; a second metal layer in direct contact with the n-type region on a bottom surface of a trench adjacent to each pixel; an insulating layer electrically isolating the first and second metal layers, wherein the insulating layer is disposed on the sidewall of each pixel and is substantially conformal to the sidewall; and a third metal layer electrically connected to the first metal layer, wherein the third metal layer extends over the sidewall of each pixel and over the second metal layer, and wherein a thickness of the insulating layer between the second metal layer and the third metal layer is at least 0.1 micron and no more than 1 micron.