Patent ID: 9390810
Filing Date: 2016-07-12
CPC Classification: G11C

Claim Text:
1. A semiconductor device, comprising: a plurality of nonvolatile memory cells where writings of data are each performed by destroying a gate insulating film; a drive circuit configured to drive a plurality of word lines to select nonvolatile memory cells of the plurality of nonvolatile memory cells; and a write/read circuit where a plurality of bit lines to input and output the data for the selected nonvolatile memory cells are connected, wherein each of the plurality of nonvolatile memory cells includes a first and a second nonvolatile memory cells and stores a one-bit of the data by the first and second nonvolatile memory cells, the first and second nonvolatile memory cells being connected to the same bit line and connected to the different word line from each other, and writings and readings of the data for the selected nonvolatile memory cells are performed by simultaneously selecting the first and second nonvolatile memory cells by the drive circuit, and verifications for the selected nonvolatile memory cells are performed by individually selecting one and the other of the first and second nonvolatile memory cells one by one by the drive circuit.