Patent ID: 9246713
Filing Date: 2016-01-26
CPC Classification: H04L

Claim Text:
1. A system including a receiver circuit, the receiver circuit comprising: N conductors configured to receive a set of values corresponding to a sub-code, wherein N is greater than 2; a sparse comparator circuit comprising strictly fewer than N*(N−1)/2 graph-connected two-input comparators wherein each two-input comparator compares one of the values of the set of values received on one of the N conductors to another one of the values of the set of values received on some other one of the N conductors, wherein the sub-code comprises a maximum independent set of elements selected from a large code based on a graph comprising nodes representing the conductors and edges representing pairs of conductors being compared through at least one graph-connected two-input comparator, and wherein graph-connected two-input comparators comprise the graph being connected such that there are one or more edges connecting any pair of nodes; and, a decoder circuit to determine a data word based on N*(N−1)/2 outputs of the circuit.