Patent ID: 9235413
Filing Date: 2016-01-12
CPC Classification: G05B,G06F,Y02P

Claim Text:
1. A method comprising: receiving electrical test result information about a structure produced on a semiconductor wafer by a semiconductor wafer manufacturing process at a manufacturing execution system, wherein the manufacturing execution system is configured to track a plurality of events in a fabrication tool facility with an identifier for the semiconductor wafer and a list of fabrication tools used to manufacture the structure on the semiconductor wafer; determining from the electrical test result information whether the structure is defective using the manufacturing execution system; and in response to a determination that the structure is defective, discontinuing the semiconductor wafer manufacturing process and determining at least one fabrication tool related to the defective structure by comparing a first plurality of fabrication tools associated with a correctly fabricated wafer lot and a second plurality of fabrication tools associated with a deficient wafer lot to determine a difference in fabrication tools, wherein the manufacturing execution system is configured to make at least one of the fabrication tools related to the defective structure to be unavailable to the semiconductor wafer manufacturing process.