Patent ID: 9367314
Filing Date: 2016-06-14
CPC Classification: G06F

Claim Text:
1. A processor to process conditional branches comprising: an instruction fetch logic to fetch a conditional short forward branch, the conditional short forward branch to include a conditional branch instruction and a set of one or more instructions that are to sequentially follow the conditional branch instruction in program order between the conditional branch instruction and a forward branch target instruction that is to be indicated by the conditional branch instruction; logic to determine to convert the conditional short forward branch based at least in part on a determination that a computationally equivalent set of one or more predicated instructions is available in an instruction set of the processor that also includes the conditional branch instruction; and instruction conversion logic coupled with the instruction fetch logic, the instruction conversion logic to convert the conditional short forward branch to control signals that correspond to the computationally equivalent set of the one or more predicated instructions that are each available in the instruction set of the processor that also includes the conditional branch instruction.