Patent ID: 9406757
Filing Date: 2016-08-02
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a semiconductor layer made of SiC; a source region formed in the semiconductor layer, the source region forming a surface of the semiconductor layer; a body region formed in the semiconductor layer, the body region being in contact with the source region from a side of a back surface of the semiconductor layer; a drain region formed in the semiconductor layer, the drain region being in contact with the body region from the side of the back surface of the semiconductor layer; a gate trench dug down in the semiconductor layer from the surface thereof, the gate trench passing through the source region and the body region and the deepest portion thereof reaching the drain region; a gate insulating film formed on an inner surface of the gate trench, the gate insulating film having a bottom portion located on the bottom surface thereof and a side portion located on the side surface thereof, the thickness of the bottom portion and the thickness of the side portion being different from each other; a gate electrode embedded in the gate trench on the gate insulating film; a source wiring formed on the semiconductor layer and in contact with the source region, the source wiring having a laminating structure a first source layer formed on the semiconductor layer and a second source layer formed on the first source layer, the first source layer and the second source layer made of conductive materials different from each other; and a source trench dug down in the semiconductor layer from the surface thereof, wherein the first source layer is conformal to a side surface and a bottom surface of the source trench, wherein the source wiring selectively forms a first junction with respect to the semiconductor layer, the first junction having a smaller junction barrier than the diffusion potential of a body diode intrinsic in the semiconductor device.