Patent ID: 9509363
Filing Date: 2016-11-29
CPC Classification: H01L,H03K,H04B

Claim Text:
1. An integrated circuit (IC) formed on a die, the IC comprising: a switch including a first field effect transistor (FET) having a first body node and a second FET having a second body node, the first and second FETs defining an RF signal path between an input port and an output port; and a voltage distribution circuit coupled to the switch and configured to reduce voltage distribution variation across the switch, the voltage distribution circuit including a connection path connected between the first body node and the second body node, the connection path including a first resistor in series with a first capacitor, the voltage distribution circuit further including a resistive network connected between the first body node and the second body node, the resistive network including a bias node connected between third and fourth resistors.