Patent ID: 9293335
Filing Date: 2016-03-22
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: conductive layers and insulating layers repeatedly and alternatingly stacked on a substrate; an active portion penetrating the conductive layers and the insulating layers to connect the substrate; and a blocking insulating layer, a charge storage layer, and a charge tunneling layer sequentially disposed from the conductive layers to the active portion; wherein the conductive layers are electron injecting layers that inject electrons from the active portion to the charge storage layer through the charge tunneling layer; wherein the charge tunneling layer includes a first tunnel insulating layer, a second tunnel insulating layer, and a third tunnel insulating layer sequentially disposed from the charge storage layer to the active portion, wherein the first, second, and third tunnel insulating layers are charge tunneling layers; wherein the second tunnel insulating layer includes a silicon-nitride-oxide layer; and wherein the second tunnel insulating layer has a higher dielectric constant than the first tunnel insulating layer and the third tunnel insulating layer.