Patent ID: 9431407
Filing Date: 2016-08-30
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor device, comprising: providing a substrate that includes silicon, a first insulation layer directly over the silicon, and a layer of silicon directly over the first insulation layer; performing an etch process to remove the layer of silicon and the insulation layer from a second area of the substrate, while maintaining the first insulation layer and the layer of silicon in a first area of the substrate; forming a second layer of insulation over the layer of silicon in the first area of the substrate and over the silicon in the second area of the substrate; forming a first plurality of trenches in the first area of the substrate that each extends through the second layer of insulation, the layer of silicon, and the first insulation layer, and extends into the silicon; forming a second plurality of trenches in the second area of the substrate that each extends through the second layer of insulation, and extends into the silicon; forming insulation material in the first plurality of trenches and the second plurality of trenches; forming logic devices in the first area of the substrate, wherein the forming of each of the logic devices includes: forming memory cells in the second area of the substrate, wherein the forming of each of the memory cells includes: