Patent ID: 9330001
Filing Date: 2016-05-03
CPC Classification: G06F,H03M

Claim Text:
1. A cache system for use with an electronic computer comprising one or a plurality of levels of a memory hierarchy wherein each level is configured to store data in one or a plurality of blocks, said cache system configured to, during system operation, (a) compressing data before storing and decompressing data when retrieving data: (b) monitoring, with regard to relative frequency of data values across all or a subset of locations in a cache, changes of data values as said data values are loaded into, modified, and evicted from the cache; (c) based on the monitoring in step (b) establishing the frequency of values as they occur in a cache; (d) forming codewords based on the frequency of values established in step (c); (e) using said codewords in the process of compressing values for storing in a cache; (f) based on a compression procedure of step (e) using said codewords in the process of decompressing values in a cache; (g) based on monitoring of the compressibility repeating step (a)-(f) when compressibility surpasses a pre-set threshold by re-establishing the relative frequency of data values in said cache in accordance with steps (b) and (c) and using said relative frequency in steps (d),(e), and (f) respectively.