Patent ID: 9385120
Filing Date: 2016-07-05
CPC Classification: H01L

Claim Text:
1. A method of fabricating a semiconductor device, the method comprising: forming a sacrificial gate, a hard mask, a spacer and a first interlayer insulating film on a substrate, wherein the hard mask is disposed on a top surface of the sacrificial gate, wherein the spacer is disposed on a side surface of the sacrificial gate and a side surface of the hard mask, and wherein the first interlayer insulating film is disposed on the spacer; removing the hard mask, a part of the spacer, and a part of the first interlayer insulating film to expose an upper portion of the sacrificial gate; forming a sacrificial insulating layer on the exposed upper portion of the sacrificial gate; forming a second interlayer insulating film on the sacrificial insulating layer, a remaining part of the spacer and a remaining part of the first interlayer insulating film; removing a part of the sacrificial insulating layer and a part of the second interlayer insulating film to expose a top surface of the sacrificial gate; and removing the sacrificial gate and the remaining sacrificial insulating layer to form a trench wherein a lower portion of the trench is defined by the remaining part of the spacer and an upper portion of the trench is defined by a remaining part of the second interlayer insulating film.