Patent ID: 9250678
Filing Date: 2016-02-02
CPC Classification: G06F,Y02D

Claim Text:
1. An information processing apparatus comprising a nonvolatile memory, a volatile memory, and a process control device including at least one processor, the nonvolatile memory having previously stored therein a startup program which is required when starting up the information processing apparatus, and the process control device configured to: receive a command to start up the information processing apparatus; determine whether or not the startup program is present in the volatile memory, when the startup command is received; read the startup program from the nonvolatile memory and write the read startup program into the volatile memory, only when the startup program is not present in the volatile memory; execute the startup program written in the volatile memory; receive a command to stop operation of the information processing apparatus; and cause the information processing apparatus to stop the operation, by stopping supply of power to other components of the information processing apparatus than the volatile memory while maintaining supply of power to the volatile memory, when the operation stop command is received, wherein the startup program from the nonvolatile memory is written into the volatile memory when the information processing apparatus is caused to stop operation, the process control device includes a first process control device configured to at least partially cause the information processing apparatus to stop the operation, and a second process control device configured to at least partially execute the startup program written in the volatile memory, the information processing apparatus further comprising: the first process control device further configured to output control signals to the power control IC for power supply control, and the first process control device further configured to, when a remaining power of the battery is determined to be lower than a predetermined level by the remaining battery power detection device, output, to the power control IC, a control signal for stopping power supply to the second process control device and the volatile memory while maintaining power supply to the first process control device.