Patent ID: 9245813
Filing Date: 2016-01-26
CPC Classification: H01L

Claim Text:
1. A method for enhancing the cooling of a chip stack of semiconductor chips, comprising: creating a first chip with circuitry on a first side; creating a second chip with circuitry on a first side that is electrically and mechanically coupled to the first chip by a grid of connectors; placing a thermal interface material pad between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip, wherein the first chip has etching gaps on a second side and the thermal interface material pad has etched channels and ridges that mate with the first chip, and wherein the nanofibers are aligned parallel to the etched gaps of the first chip; and creating a heat removal device thermally connected to the thermal interface material pad.