Patent ID: 9484943
Filing Date: 2016-11-01
CPC Classification: H03M

Claim Text:
1. An apparatus for performing digital-to-analog conversion of a digital input signal, comprising: a first digital signal input to which the digital input signal is applied; a first clock signal line for providing a first clock frequency signal; a digital memory coupled to the first digital signal input and to the first clock signal line, wherein the digital memory comprises a plurality of digital memory units operable to store samples of the digital input signal and arranged in series, wherein, at a trigger of the first clock frequency signal, a new sample of the digital input signal is stored in a first of the plurality of digital memory units and at a subsequent trigger of the first clock frequency signal, the sample is transferred to a consecutive one of the plurality of digital memory units; a digital multiplexer comprising: a digital-to-analog converter comprising a second digital signal input coupled to the digital multiplexer output, wherein the converter and the multiplexer are configured to operate at a second speed which is an integer multiple of the first clock frequency signal, wherein the digital memory and the digital multiplexer are configured for construing a second digital signal from the samples of the digital input signal stored in the digital memory, wherein the second digital signal comprises multiple identical occurrences of each of the samples of the digital input signal, and wherein the second digital signal is applied to the second digital signal input and is configured for being converted by the digital-to-analog converter.