Patent ID: 9508775
Filing Date: 2016-11-29
CPC Classification: H01L

Claim Text:
1. A manufacturing method of an apparatus comprising: bonding a first member and a second member, the first member having a first semiconductor substrate and a first wiring structure on the first semiconductor substrate, and the second member having a second semiconductor substrate and a second wiring structure on the second semiconductor substrate; and forming an opening in the first member by removing a portion of the first semiconductor substrate, wherein the first wiring structure includes a first wiring layer and a second wiring layer, the first wiring layer being arranged between the first semiconductor substrate and the second wiring layer before the forming of the opening, and the second wiring structure includes a third wiring layer, and the opening is formed above the first wiring layer after the first wiring layer is electrically connected to the third wiring layer via the second wiring layer.