Patent ID: 9257084
Filing Date: 2016-02-09
CPC Classification: G09G,G11C

Claim Text:
1. A shift register unit comprising an input module, a first output module, a pull-down driving module, a pull-down module and a first output discharging unit, wherein the input module is connected to an input signal terminal and a first clock signal input terminal of the shift register unit and configured to provide an input signal to a pull-up node in response to the input signal and a first clock signal, the pull-up node being the connection point of the input module and the first output module; the first output module is connected to a second clock signal input terminal and configured to provide a second clock signal to a first output terminal of the shift register unit in response to a voltage signal at the pull-up node; the pull-down driving module is connected to the first clock signal input terminal and the second clock signal input terminal, and configured to provide the first clock signal to a first pull-down node in response to the first clock signal, provide the second clock signal to a second pull-down node in response to the second clock signal, provide a first low voltage signal to the first pull-down node and the second pull-down node in response to the voltage signal at the pull-up node, provide the first low voltage signal to the second pull-down node in response to a voltage signal at the first pull-down node, and provide the first low voltage signal to the first pull-down node in response to a voltage signal at the second pull-down node, the first pull-down node and the second pull-down node being both connection points of the pull-down driving module and the pull-down module; the pull-down module is configured to provide the first low voltage signal to the pull-up node in response to the voltage signal at the first pull-down node and the voltage signal at the second pull-down node; the first output discharging unit is configured to provide a second low voltage signal to the first output terminal of the shift register unit in response to the voltage signal at the first pull-down node and the voltage signal at the second pull-down node; wherein the first low voltage signal is less than or equal to the second low voltage signal, and the shift register further comprises a second output module connected to the second clock signal input terminal and configured to provide the second clock signal to a second output terminal of the shift register unit in response to the voltage signal at the pull-up node to provide a reset signal for another shift register unit one-stage previous to the shift register unit.