Patent ID: 9356044
Filing Date: 2016-05-31
CPC Classification: G11C,H01L

Claim Text:
1. A semiconductor device, comprising: a selection line extending in a first direction; first and second vertically stacked memory cell strings arranged in a second direction crossing the first direction, the first and second vertically stacked memory cell strings commonly coupled to the same selection line; first and second bit lines extending in the second direction, the first bit line spaced apart from the second bit line in the first direction; a first sub-interconnection coupling the first vertically stacked memory cell string to the first bit line; and a second sub-interconnection coupling the second vertically stacked memory cell string to the second bit line, wherein the first sub-interconnection has a first protrusion protruding in the first direction, and wherein the second sub-interconnection has a second protrusion protruding in a direction opposite to the first direction.