Patent ID: 9325541
Filing Date: 2016-04-26
CPC Classification: H03B,H03K,H04L,H04W

Claim Text:
1. A system comprising: a first frequency divider configured to divide an input frequency of an input signal to generate a first signal having a first frequency and a first phase; a plurality of second frequency dividers each configured to divide the input frequency of the input signal to generate a second signal having the first frequency and a second phase; a first switch including a first end connected to a first node of the first frequency divider, and a second end connected to a second node of a first one of the plurality of second frequency dividers; and a plurality of second switches including first ends connected to the second end of the first switch, and second ends respectively connected to the second nodes of the plurality of second frequency dividers other than the first one of the plurality of second frequency dividers, wherein in response to the first switch being open, a capacitance at the first node of the first frequency divider is a capacitance associated with the first switch.