Patent ID: 9287178
Filing Date: 2016-03-15
CPC Classification: H01L

Claim Text:
1. A method of fabricating a multi-gate field effect transistor (FET) in a bulk substrate manufacturing process, the method comprising: forming a plurality of silicon fin structures on a bulk substrate; depositing an oxide layer on the bulk substrate; removing a portion of the oxide layer, such that a first sidewall portion of each silicon fin structure is exposed; depositing a nitride spacer along the first exposed sidewall portion of each silicon fin structure; removing a remaining portion of the oxide layer, such that a second sidewall portion of each silicon fin structure below the nitride spacer is exposed; performing a plurality of etches, such that a bottom portion of a body region of each silicon fin structure includes a tipped shape; and depositing an oxide between the body region of each silicon fin structure and the bulk substrate to isolate the body region of each silicon fin structure from the bulk substrate; wherein a portion of the bulk substrate between each silicon fin structure includes a tipped shape; wherein performing the plurality of etches comprises: