Patent ID: 9311260
Filing Date: 2016-04-12
CPC Classification: G06F

Claim Text:
1. A method for storing a speculative state of a thread that is being executed by a processor in accordance with a thread level speculative execution technique, the method comprising: during execution of a thread, executing a first instruction that indicates that the thread is entering into speculative execution, the first instruction including an address of a synchronization variable as an argument of the first function, the synchronization variable representing a first range of shared memory addresses that includes at least one memory address that the thread intends to access during speculative execution, executing the first instruction comprising, during speculative execution of the thread, maintaining, within the processor, a speculative state of the thread, the speculative state of the thread including a speculative write buffer that includes an entry for each memory address that the thread accesses during speculative execution, the speculative write buffer including a first buffer entry comprising the SVT handle, a particular memory address within the first range of shared memory addresses that was accessed by the first thread, and a value for the particular memory address; detecting that the thread will be preempted during speculative execution; and storing the speculative state to allow the speculative state to be recreated within the processor when execution of the thread is resumed.