Patent ID: 9443935
Filing Date: 2016-09-13
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a substrate including a first region and a second region; a plurality of fins protruding from a top surface of the substrate, the plurality of fins including a first fin, a second fin and a third fin that are disposed in the first region, and including a fourth fin, a fifth fin and a sixth fin that are disposed in the second region, the second fin being disposed between the first fin and the third fin, the fifth fin being disposed between the fourth fin and the sixth fin; a first isolation disposed between the first fin and the second fin; a second isolation disposed between the second fin and the third fin; a third isolation disposed between the fourth fin and the fifth fin; a fourth isolation disposed between the fifth fin and the sixth fin, wherein a width of an upper portion of the second fin is different from a width of an upper portion of the fourth fin based on different conductivity types of transistors defined thereby.