Patent ID: 9312351
Filing Date: 2016-04-12
CPC Classification: H01L

Claim Text:
1. A floating gate transistor comprising: a floating gate having a central portion disposed over a substrate surface, a first lateral edge extending into a first trench and below said substrate surface and an opposed second lateral edge extending into a second trench and below said substrate surface; a gate dielectric between said floating gate and said substrate surface and also between said first lateral edge and a sidewall of said first trench and between said second lateral edge and a sidewall of said second trench; a control gate at least partially over said floating gate; and a control gate dielectric between said floating gate and said control gate, wherein said first and second trenches are filled trenches that each include an oxide liner on said sidewalls thereof and a nitride layer over said oxide liner, said nitride layer having uppermost edges that terminate beneath said first and second lateral edges and beneath said substrate surface.