Patent ID: 9525037
Filing Date: 2016-12-20
CPC Classification: H01L

Claim Text:
1. A method for fabricating a trench gate metal oxide semiconductor field effect transistor, the method comprising steps of: providing a substrate having a source region; forming an oxide layer on the substrate; forming a hard mask layer on the oxide layer; performing an etching process to remove a part of the hard mask layer, a part of the oxide layer, a part of the substrate to form a trench in the substrate penetrating the source region; performing an etching back process to remove a part of the remaining hard mask layer to expose a part of the oxide layer; performing a thermal oxidation process to form a gate dielectric layer only on a sidewall of the trench; forming a conductive layer covering on the hard mask layer and the exposed part of the oxide layer, and filling the conductive layer into the trench; performing a chemical mechanical polishing process to remove a portion of the conductive layer on the hard mask layer by using the hard mask layer as a stop layer and leave behind a T-shaped portion of the conductive layer with an insertion portion embedded in the trench and a symmetrical protrusion portion on the substrate; and forming a contact plug on the surface of the substrate contacting the T-shaped portion of the conductive layer.