Patent ID: 9479188
Filing Date: 2016-10-25
CPC Classification: H03M

Claim Text:
1. A signal selector comprising: an analog multiplexer having 2 a controller comprising a digital memory arranged as a stack having a width W and a depth D, a configuration register and control circuitry including clocked logic which is bidirectionally coupled to said digital memory to support both read and write operations on said digital memory and unidirectionally coupled to said configuration register to write to said configuration register, said controller having a control output derived from said configuration register that is coupled to said n-bit bus digital control input of said analog multiplexer, said digital memory being configured as a plurality of D data words which are independently addressable by said clocked logic, wherein each of said plurality of D data words includes n data bits, where W is greater than n such that for each of said plurality of D data words, some bits are dedicated to program instructions executable by said control circuitry and some bits are dedicated to channel select data, and wherein said clocked logic includes a counter and control circuitry including at least one of discrete logic, a microcontroller and a state machine, whereby the program instructions provide for autonomous operation; an analog-to-digital converter (ADC) coupled to said control circuitry and having an ADC analog input coupled to said analog signal output of said analog multiplexer and an ADC digital output; a reference voltage circuit coupled to said ADC; a serial output circuit coupled to said control circuitry; and a buffer coupled to said control circuitry and connecting said ADC digital output to said serial output circuit.