Patent ID: 9384792
Filing Date: 2016-07-05
CPC Classification: G11C

Claim Text:
1. A sense amplifier comprising: a first differential amplifier including a first input, a second input, a first output and a first voltage offset; wherein said first input is coupled to a memory cell via a first capacitive element; wherein said second input is coupled to ground via a second capacitive element; wherein said first output of said differential amplifier is coupled to a comparator via a second differential amplifier including a third input, a fourth input, a second output and a second voltage offset; said memory cell including a read state, a write state and a data state; and read/write circuitry coupled to said memory cell and capable of reading or writing said data state of said memory cell; wherein said read/write circuitry further comprises: a sense data phase wherein said read/write circuitry reads said data state; a write reference phase wherein said read/write circuitry writes said data state to a first reference state and a second reference state; and a sense reference phase wherein said read/write circuitry reads said second reference state; wherein said first differential amplifier senses said data state by sensing a first difference between said first input and said second input, canceling said first voltage offset and amplifying said first difference; wherein said first differential amplifier senses a second difference between said data state and said second reference state to thereby determine a polarity of said data state; wherein said third input is coupled to said first output of said first differential amplifier, and said fourth input is coupled to said second output of said first differential amplifier; wherein said third input is coupled to said first output of said first differential amplifier via said second capacitive element; wherein said fourth input is coupled to said second output of said first differential amplifier via a third capacitive element; and wherein said second differential amplifier cancels said second offset voltage and further amplifies said second difference.