Patent ID: 9373368
Filing Date: 2016-06-21
CPC Classification: G11C

Claim Text:
1. A semiconductor device comprising: a first circuit comprising; a second circuit; a third circuit; and a fourth circuit, wherein one of a source and a drain of the first transistor is electrically connected to a first wiring, wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor and a first electrode of the capacitor, wherein one of a source and a drain of the second transistor is electrically connected to the first wiring, wherein the other of the source and the drain of the second transistor is electrically connected to a second wiring, wherein the third circuit is connected to the first circuit through the fourth circuit and one of the first wiring and the second wiring, wherein the third circuit is configured to supply the one of the first wiring and the second wiring with a gradually changing potential, wherein the second circuit is configured to compare first data to be written to the first circuit with second data obtained from a potential of the other of the first wiring and the second wiring, and determine whether the first data is consistent with the second data, wherein the fourth circuit is configured to control conduction between the third circuit and the first circuit, and wherein the fourth circuit is configured to disconnect the third circuit from the first circuit when the second circuit determines that the first data is consistent with the second data.