Patent ID: 9379127
Filing Date: 2016-06-28
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a semiconductor substrate; a first gate electrode formed over the semiconductor substrate; a second gate electrode formed over the semiconductor substrate so as to be adjacent to the first gate electrode; a first insulating film formed between the first gate electrode and the semiconductor substrate; a second insulating film formed between the second gate electrode and the semiconductor substrate, the second insulating film including therein a charge storing portion; and a third insulating film formed between the first gate electrode and the second gate electrode, wherein the second gate electrode includes a first silicon region, a second silicon region, and a third silicon region, wherein the first silicon region is positioned at a lower side of the second gate electrode, wherein the second silicon region is positioned at an upper side of the second gate electrode, wherein the third silicon region is positioned between the first gate electrode and the second silicon region, wherein an impurity concentration of the first silicon region is lower than an impurity concentration of the second silicon region, and wherein an impurity concentration of the third silicon region is lower than the impurity concentration of the second silicon region.