Patent ID: 9281211
Filing Date: 2016-03-08
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor structure, said method comprising: providing a dielectric material stack of, from bottom to top, a first dielectric material and a second dielectric material; forming at least one opening having a width from 5 nm to 800 nm within said second dielectric material, wherein said at least one opening exposes a topmost horizontal surface of said first dielectric material; providing a diffusion barrier portion on each sidewall surface of remaining portions of said second dielectric material within said at least one opening and on a portion of said topmost horizontal surface of said first dielectric material; forming a conductive metal portion from a sidewall surface of each diffusion barrier portion in said at least one opening, wherein each conductive metal portion in each opening is separated by a gap and said gap exposes a remaining portion of said topmost horizontal surface of said first dielectric material, wherein each conductive metal portion has a topmost surface that is coplanar with a topmost surface of each diffusion barrier portion and said second dielectric material, and a bottommost surface that is coplanar with a bottommost surface of each diffusion barrier and said second dielectric material; forming an undercut region in said first dielectric material and beneath each conductive metal portion; and providing a metal liner on exposed sidewall surfaces and a bottom surface of each conductive metal portion.