Patent ID: 9484418
Filing Date: 2016-11-01
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a substrate; a first GaN field effect transistor disposed on or above the substrate, wherein the first GaN field effect transistor is a depletion mode field effect transistor; a second GaN field effect transistor disposed on or above the substrate, wherein the second GaN field effect transistor is an enhancement mode field effect transistor; a GaN diode disposed on or above the substrate, wherein the first GaN field effect transistor, the second GaN field effect transistor, and the GaN diode are all disposed on or above a same side of the substrate and electrically connected to each other; and a power factor correction diode, wherein an anode of the power factor correction diode is electrically connected to a drain electrode of the first GaN field effect transistor.