Patent ID: 9368469
Filing Date: 2016-06-14
CPC Classification: H01L

Claim Text:
1. A method for manufacturing at least one electronic component package, the method comprising: (i) disposing a metal pattern layer on an adhesive carrier such that the metal pattern layer is attached to the adhesive carrier; (ii) disposing at least one electronic component on the adhesive carrier such that the electronic component is attached to the adhesive carrier, the at least one electronic component not being overlapped with the metal pattern layer on the adhesive carrier; (iii) forming a sealing resin layer, which covers the metal pattern layer and the electronic component, on the adhesive carrier to obtain a precursor including the metal pattern layer, the at least one electronic component, and the sealing resin layer; (iv) peeling the adhesive carrier off of the precursor, so that a surface of the metal pattern layer and a surface of an electrode of the electronic component are exposed from a surface of the sealing resin layer; (v) forming a first metal plating layer on the exposed surface of the metal pattern layer and the exposed surface of the electrode of the electronic component, the first metal plating layer having a thickness of 100 nm to 3,000 nm; and (vi) forming a second metal plating layer on the first metal plating layer, the second metal plating layer having a thickness of 18 μm to 500 μm, wherein an average crystal grain size of the second metal plating layer is larger than an average crystal grain size of the first metal plating layer.