Patent ID: 9411011
Filing Date: 2016-08-09
CPC Classification: G01R

Claim Text:
1. An integrated circuit comprising: A. a first power pad, a second power pad, and a ground pad; B. functional circuitry having functional input and output leads and having power and ground leads coupled to the power and ground pads; C. test circuitry having test leads connected to the functional circuitry and having a first device test lead and a second device test lead extending from the test circuitry, the first and second device test leads being free of the functional input and output leads; D. test messaging and control circuitry having a test input lead, a test output lead, and test circuitry leads connected to the first and second device test leads; E. demodulation circuitry having an input coupled to the first power pad and an output coupled to the test input lead of the test messaging and control circuitry; and F. modulation circuitry having an output coupled to the second power pad and an input coupled to the test output lead of the test messaging and control circuitry.