Patent ID: 9502372
Filing Date: 2016-11-22
CPC Classification: H01L

Claim Text:
1. A microelectronic package, comprising: a microelectronic die having a first surface, a second surface opposite the first surface, and a sidewall surface between the first and second surfaces; a plurality of wire bond wires with proximal ends thereof coupled to either the first surface or the second surface of the microelectronic die with distal ends of the plurality of wire bond wires extending away from either the first surface or the second surface, respectively, of the microelectronic die; a portion of the plurality of wire bond wires extending outside a perimeter of the microelectronic die into a fan-out (“FO”) region; and a molding material for covering the first surface, the sidewall surface, and portions of the plurality of the wire bond wires from the first surface of the microelectronic die to an outer surface of the molding material; wherein the plurality of wire bond wires include both first directed wire bond wires extending to the FO region and second directed wire bond wires extending to a fan-in (“FI”) region.