Patent ID: 9300422
Filing Date: 2016-03-29
CPC Classification: H04J

Claim Text:
1. A method for detecting and managing a synchronization failure of a transparent clock used in a packet network in order to determine and correct residence time of time-stamped packets within a traversed element of said network, the transparent clock being part of a synchronization path between a Master and a Slave, a plurality of network elements and associated transparent clocks being present along the synchronization path, the method comprising: transmitting time-stamped packets from the Master to the Slave through different synchronization paths in order to have the Slave receive multiple time-stamped packets transmitted through the different synchronization paths, determining a failure within a transparent clock of a failed or failing synchronization path if one of the multiple time-stamped packets provided by said failed or failing synchronization path differs from remaining ones of the multiple time-stamped packets provided by other ones of the different synchronization paths based on a time offset threshold, configuring the Slave to request the Master or a synchronization management server to set-up of a new synchronization path in addition to said different synchronization paths, and isolating the failure within the transparent clock of said failed or failing synchronization path based on said new synchronization path.