Patent ID: 9292456
Filing Date: 2016-03-22
CPC Classification: G06F

Claim Text:
1. A system for synchronizing and re-ordering data transmitted between first and second clock domains associated with first and second device interfaces, respectively, comprising: an arbiter connected to one or more data input ports that receives one or more read requests, and selects at least one read request from the one or more read requests based on a predetermined criteria, wherein the one or more data input ports are associated with the first device interface; a transaction manager, connected to the arbiter, that includes one or more entries organized as one or more linked lists, each linked list corresponding to at least one of the one or more data input ports, wherein the transaction manager allocates a first entry of the one of the entries to the selected read request, wherein the first entry is associated with a first linked list of the one or more linked lists corresponding to the selected read request, determines the first entry associated with a toggle signal, generates a read pointer when the first entry is an initial entry of the first linked list, invalidates the initial entry after generating the read pointer, and designates an entry subsequent to the initial entry as the initial entry; an asynchronous first-in-first-out (FIFO) module connected to the arbiter and the transaction manager for appending an entry identifier corresponding to the first entry; and a read data buffer connected to the asynchronous FIFO module and the transaction manager for receiving the selected read request, generating a tag corresponding to the first entry, appending the tag to the selected read request, transmitting the selected read request to the second device interface, receiving a response data from the second device interface, mapping the response data with the corresponding read request entry identifier using the tag associated with the response data and a mapping table that includes a mapping between the one or more entry identifiers and corresponding tags generated by the read data buffer, transmitting the toggle signal corresponding to the first entry, and transmitting the response data corresponding to the first entry to the first device interface.