Patent ID: 9293484
Filing Date: 2016-03-22
CPC Classification: H01L

Claim Text:
1. A method of manufacturing a thin film transistor display panel, the method comprising: providing a gate electrode on a substrate; providing a gate insulating layer on the substrate and the gate electrode; providing a semiconductor layer on the gate insulating layer and overlapping the gate electrode; providing a planarization layer on the gate insulating layer and at opposing sides of the gate electrode, after providing the semiconductor layer on the gate insulating layer and overlapping the gate electrode, wherein providing the planarization layer at the opposing sides of the gate electrode after providing the semiconductor layer on the gate insulating layer and overlapping the gate electrode, exposes an upper surface of the gate insulating layer on the gate electrode; and providing a source electrode and a drain electrode on the semiconductor layer and spaced apart from each other, after the providing a planarization layer.