Patent ID: 9472474
Filing Date: 2016-10-18
CPC Classification: G01R,H01L

Claim Text:
1. A method of characterizing shallow semiconductor PN junctions, the method comprising: providing a substrate comprising a shallow PN junction formed at a first main surface, the shallow PN junction comprising a p-type region and an n-type region and being formed substantially parallel to the first main surface; providing a dielectric layer contacting the first main surface thereby forming a dielectric/semiconductor interface with one of the p-type region or the n-type region, wherein the shallow PN junction has a depth less than 100 nm from the dielectric/semiconductor interface; iterating, at least twice, a combination of processes including: deriving at least one of an average hole/electron mobility or a dose of active dopants in the substrate corresponding to the predetermined area, based on the respective charges and the corresponding junction photovoltages.