Patent ID: 9384130
Filing Date: 2016-07-05
CPC Classification: G06F

Claim Text:
1. A computer-implemented method for linking object code comprising: recognizing a first symbol address initialization sequence in a module by determining that first symbol address initialization sequence corresponds with a pre-defined symbol address instruction sequence, wherein the first symbol address initialization sequence includes one or more instructions for loading an address in a first register of a processor, the one or more instructions including an instruction that depends on a value stored in a second register of the processor, the first register for storing an address of a table of contents (TOC) and the second register for storing a starting address of the module; determining whether to replace the first symbol address initialization sequence with a second symbol address initialization sequence by determining whether a first condition is satisfied, wherein the first condition is that the second symbol address initialization sequence has a second processor resource usage that is less than a first processor resource usage associated with the first symbol address initialization sequence; and replacing the first symbol address initialization sequence with the second symbol address instruction sequence when it is determined that the first condition is satisfied.