Patent ID: 9490246
Filing Date: 2016-11-08
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an epitaxial growth layer of the first conductivity type formed so as to cover said semiconductor substrate; a first buried region of a second conductivity type formed between said semiconductor substrate and said epitaxial growth layer; a second buried region of the first conductivity type formed between said first buried region and said epitaxial growth layer; a first impurity region of the second conductivity type formed so as to extend from a surface of said epitaxial growth layer to a first depth; a second impurity region of the first conductivity type formed at a distance from said first impurity region so as to extend from the surface of said epitaxial growth layer to a second depth; a third impurity region of the second conductivity type formed at a distance from said second impurity region so as to extend from the surface of said epitaxial growth layer to said first buried region; and an isolation region electrically isolating said second impurity region and said third impurity region, and formed in a portion of said epitaxial growth layer, said third impurity region being electrically connected to a ground potential through a resistance element, and said resistance element being formed on said isolation region.