Patent ID: 9349808
Filing Date: 2016-05-24
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor structure, said method comprising: providing a semiconductor substrate comprising a first semiconductor material of a first lattice constant and containing a plurality of sacrificial trench isolation structures therein; forming a plurality of first semiconductor-containing pillar structures comprising a second semiconductor material having a second lattice constant that is greater than said first lattice constant adjacent each sacrificial trench isolation structure and extending upwards from a first sub-surface of said semiconductor substrate; forming a dielectric cap portion on a topmost surface of each first semiconductor-containing pillar structure, wherein a topmost surface of each dielectric cap portion is coplanar with a topmost surface of each sacrificial trench isolation structure of said plurality of sacrificial trench isolation structures; removing each sacrificial trench isolation structure of said plurality of sacrificial trench isolation structures to expose a second sub-surface of said semiconductor substrate; forming a dielectric spacer along sidewall surfaces of each first semiconductor-containing pillar structure and on a portion of said second sub-surface of said semiconductor substrate; and forming a plurality of second semiconductor-containing pillar structures comprising a third semiconductor material having a third lattice constant that is greater than said first lattice constant adjacent said dielectric spacer and on another portion of said second sub-surface of said semiconductor substrate, wherein each of said second semiconductor-containing pillar structures has a width that is different from a width of each of said first semiconductor-containing pillar structures; wherein said forming said plurality of first semiconductor-containing pillar structures comprising: forming a plurality of second trenches in said semiconductor substrate which expose said first sub-surface of said semiconductor substrate; epitaxially growing said second semiconductor material from said first sub-surface and within each second trench of said plurality of second trenches; and planarizing said second semiconductor material such that a topmost surface of each of said first semiconductor-containing pillar structures is coplanar with a topmost of each of said sacrificial isolation trench structures; and wherein said epitaxially growing comprises a semiconductor regrowth process and wherein said second semiconductor material includes a lower portion haying a first defect density and an upper portion haying a second defect density that is less than the first defect density.