Patent ID: 9263369
Filing Date: 2016-02-16
CPC Classification: H01L

Claim Text:
1. A chip arrangement, comprising: a first chip comprising a semiconductor substrate and having a first chip side and a second chip side opposite the first chip side and at least one contact on its second chip side; a second chip comprising a semiconductor substrate and having a first chip side and a second chip side opposite the first chip side and at least one contact on its first chip side; wherein the second chip side of the first chip and the second chip side of the second chip are facing each other; a first electrically conductive structure extending from the at least one contact of the first chip from the second chip side of the first chip through the first chip to the first chip side of the first chip so that the first electrically conductive structure extends at least through the semiconductor substrate of the first chip; and a second electrically conductive structure extending from the at least one contact of the second chip from the first chip side of the second chip through the second chip and through the first chip to the first chip side of the first chip so that the first second conductive structure extends at least through the semiconductor substrates of the first and second chips.