Patent ID: 9288910
Filing Date: 2016-03-15
CPC Classification: H01L,H05K,Y10T

Claim Text:
1. A substrate with a built-in electronic component, comprising: a plurality of resin insulating layers comprising a first resin insulating layer, a second resin insulating layer laminated on the first resin insulating layer, a third resin insulating layer laminated on the second resin insulating layer, and a fourth resin insulating layer laminated on the third resin insulating layer; a plurality of conductor layers comprising a first conductor wiring layer formed on the first resin insulating layer and comprising a first conductor pad, a second conductor wiring layer formed on the second resin insulating layer and comprising a second conductor pad, and a third conductor wiring layer formed on the fourth resin insulating layer and comprising a third conductor pad and a fourth conductor pad; a plurality of via conductors including a first via conductor formed through the second resin insulating layer and connecting the first conductor pad and the second conductor pad, a second via conductor formed through the third and fourth resin insulating layers and connecting the second conductor pad and the third conductor pad, and a third via conductor formed through the fourth resin insulating layer and connected to the fourth conductor pad; and an electronic component having a terminal and positioned a cavity formed through the second resin insulating layer and the third resin insulating layer such that the third via conductor is connecting the terminal of the electronic component and the fourth conductor pad formed on the fourth resin insulating layer, wherein the second via conductor comprises filled plating filling an opening portion formed through the third and fourth resin insulating layers, and the third via conductor comprises filled plating filling an opening portion formed through the fourth resin insulating layer.