Patent ID: 9525282
Filing Date: 2016-12-20
CPC Classification: G01R,H02H

Claim Text:
1. A system, comprising: a self-test (ST) ground fault circuit interrupter (GFCI) monitor configured to generate a simulated ground fault, starting in a first half-cycle of a first cycle of AC power and extending into a second half-cycle of the first cycle of AC power; a GFCI controller configured to detect a ground fault and to provide an enable signal to a semiconductor switch to interrupt AC power to a load in response to the detected ground fault; and a diode configured to prevent interruption of AC power during the second half-cycle of the first cycle of AC power, wherein the ST GFCI monitor includes a comparator configured to compare an anode voltage of a silicon-controlled rectifier (SCR) to a threshold voltage during the first half-cycle of AC power, the SCR configured to control a solenoid, and wherein the ST GFCI monitor is configured to detect an open circuit or high impedance condition during the first half-cycle of AC power using the comparison of the anode voltage of the SCR to the threshold voltage.