Patent ID: 9343583
Filing Date: 2016-05-17
CPC Classification: H01L

Claim Text:
1. A thin film transistor, comprising: a light blocking layer; an oxide semiconductor disposed on the light blocking layer; a source region and a drain region positioned at two opposite sides with respect to the oxide semiconductor; an insulating layer which is positioned on and covers the oxide semiconductor; a gate electrode positioned on the insulating layer; a buffer layer having a first portion and a second portion positioned higher than the first portion, wherein the second portion is disposed between the light blocking layer and the oxide semiconductor; a passivation layer disposed on the gate electrode; and a data input electrode and a data output electrode disposed on the passivation layer, wherein the data input and the data output electrodes overlap the light blocking layer, wherein an edge of the gate electrode is substantially aligned with an edge of the insulating layer, and wherein the data input electrode is connected to the source region, and the data output electrode is connected to the drain region.