Patent ID: 9292026
Filing Date: 2016-03-22
CPC Classification: G05F,H02M,H03F

Claim Text:
1. A control loop circuit for balancing an active load current in an error amplifier of a low dropout voltage regulator resulting from removal of a transient fault conditions applied to an input terminal or output terminal of the low dropout voltage regulator, the control loop circuit comprising: a transient fault sense circuit configured to be in communication with a pass transistor of the low dropout voltage regulator for determining that the low dropout voltage regulator is responding to input or output transient faults and generating a transient fault indicator signal indicating that the low dropout voltage regulator is responding to input or output transient faults; and a local control loop connected to an output terminal of the transient fault sense circuit configured to receive the transient indicator signal communicating that the low dropout voltage regulator is responding to input or output transient faults; wherein the control loop circuit is configured such that when the transient fault indicator signal indicates that the low dropout voltage regulator is responding to input or output transient faults, the local control loop balances the active load current of the differential amplifier that clamps an output of a differential amplifier at a voltage level approaching an operating level, while a pass transistor of the low dropout voltage regulator is maintained in deep triode region of operation for insuring fast response in controlling the gate of the pass transistor to minimize overshoot when the input terminal or output terminal is returned to its normal operating voltage or current.