Patent ID: 9324725
Filing Date: 2016-04-26
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a semiconductor device, comprising the steps of: (a) providing a semiconductor substrate, (b) forming a first insulation film over a first main surface of the semiconductor substrate, (c) forming a first conductive film over the first insulation film, (d) forming a second insulation film over the first conductive film, (e) patterning the second insulation film and the first conductive film, forming a first gate electrode and a second gate electrode spaced along a first direction in the first main surface of the semiconductor substrate with the first conductive film, forming a first gate insulation film formed of the first insulation film between the first gate electrode and the semiconductor substrate, forming a second gate insulation film formed of the first insulation film between the second gate electrode and the semiconductor substrate, forming a first cap insulation film formed of the second insulation film over the first gate electrode, and forming a second cap insulation film formed of the second insulation film over the second gate electrode, (f) removing a portion of the first cap insulation film exposed at the side surface on the second gate electrode side, and setting the side surface of the first cap insulation film on the second gate electrode side back from the side surface of the first gate electrode on the second gate electrode side, (g) forming a third insulation film having a first charge accumulation part in the inside thereof at the first main surface of the semiconductor substrate, the surface of the first gate electrode, the surface of the second gate electrode, the surface of the first cap insulation film, and the surface of the second cap insulation film, (h) forming a second conductive film over the third insulation film, (i) etching back the second conductive film, and thereby leaving the second conductive film, and forming a third gate electrode at the side surface of the first gate electrode opposite to the second gate electrode side via the third insulation film, and leaving the second conductive film, and forming a fourth gate electrode at the side surface of the second gate electrode opposite to the first gate electrode side via the third insulation film, and (j) removing a portion of the third insulation film not covered with any of the third gate electrode and the fourth gate electrode, and forming a third gate insulation film formed of the third insulation between the third gate electrode and the semiconductor substrate, and the third insulation film between the first gate electrode and the third gate electrode, and forming a fourth gate insulation film formed of the third insulation film between the fourth gate electrode and the semiconductor substrate, and the third insulation film between the second gate electrode and the fourth gate electrode.