Patent ID: 9472252
Filing Date: 2016-10-18
CPC Classification: G11C

Claim Text:
1. An apparatus, comprising: a first digit line portion; a second digit line portion; a first selector configured to selectively couple the first digit line portion to the second digit line portion based, at least in part, on a first control signal, the first selector configured to couple the first digit line portion to the second digit line portion for a memory read operation including sensing data on the first digit line portion responsive to the first control signal and the first selector further configured to decouple the first digit line portion from the second digit line portion for a memory write operation responsive to the first control signal; and a second selector configured to selectively couple the second digit line portion to a voltage based, at least in part, on a second control signal, the second selector configured to couple the second digit line portion to the voltage during the memory write operation responsive to the second control signal.