Patent ID: 9410233
Filing Date: 2016-08-09
CPC Classification: C23C,H01L

Claim Text:
1. A method of manufacturing a semiconductor device, said method comprising: providing a substrate, on a first surface of which a gate oxide layer, a polysilicon layer and a mask layer are formed, and a buffer layer being included between said polysilicon layer and said mask layer; etching said polysilicon layer by use of a patterned mask so as to form a polysilicon gate with reentrants; wherein said method further comprises: depositing a tensile stress film on a second surface of said substrate before etching said polysilicon layer and before forming said mask layer on said first surface of said substrate; or depositing said tensile stress film on said second surface of said substrate, after patterning said mask layer and before etching said polysilicon layer with the patterned mask layer; and wherein said method further comprises: removing said tensile stress film after forming said polysilicon gate.