Patent ID: 9437737
Filing Date: 2016-09-06
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a silicon substrate; a gate insulating film formed on the silicon substrate; a gate electrode formed on the gate insulating film; a source/drain region formed in the silicon substrate; a SiGe layer formed in a hole in the source/drain region; a sidewall formed on the side of the gate electrode, an insulating film formed over the gate electrode and the SiGe layer; and a conductive plug formed in the insulating film and electrically connected to the SiGe layer, wherein a first side surface of the hole is located under the sidewall, the SiGe layer is located under the sidewall and is not located under the gate electrode; the first side surface includes two crystal planes, a cross-sectional shape of the first side surface is concave, each of the two crystal planes of the first side surface is defined by a (111) plane of the silicon substrate, and an upper surface of the SiGe layer is located higher than an interface between the silicon substrate and the gate insulating film.