Patent ID: 9318430
Filing Date: 2016-04-19
CPC Classification: G11C,H01L

Claim Text:
1. A method of forming an array of cross-point memory cells, comprising: forming a stack of horizontally extending and vertically overlapping dielectric features, the stack comprising a primary portion and an end portion, at least some of the dielectric features extending farther in the horizontal direction in the end portion moving deeper into the stack in the end portion; forming openings through the dielectric features in the primary portion and in the end portion; lining the openings with first material; lining the first material-lined openings with programmable material; filling remaining volume of the first and programmable material-lined openings with conductive material; forming horizontally elongated trenches through the dielectric features to form horizontally elongated and vertically overlapping dielectric lines from dielectric material of the dielectric features, the dielectric lines individually extending from the primary portion into the end portion and individually laterally about sides of both the openings in the primary and end portions; removing at least some of sacrificial material that is elevationally between the dielectric lines in the primary and end portions laterally between the trenches selectively relative to the dielectric lines and the first material lining in the openings; after removing at least a portion of the sacrificial material, removing at least a portion of the first material that is elevationally between the dielectric lines to expose laterally outer sidewalls of the programmable material that is elevationally between the dielectric lines; and replacing at least a portion of the sacrificial material with conductor material that is in electrical connection with the laterally outers sidewalls of the programmable material and to comprise vertically spaced horizontal conductive lines; individual ones of the cross-point memory cells comprising crossing ones of the horizontal conductive lines in the primary portion and conductive material in the openings in the primary portion having the programmable material there-between.