Patent ID: 9232500
Filing Date: 2016-01-05
CPC Classification: H04W

Claim Text:
1. An apparatus comprising: at least one processor; memory storing a program of instructions; wherein the memory storing the program of instructions is configured to, with the at least one processor, configure the apparatus to at least: allocate a first resource and a second resource that are at least partially synchronized in one or more of a time domain and a frequency domain in such a way that the first resource and the second resource share one or more of an overlapping frequency band and a same time slot; and transmit a first signal on the first resource; receive a second signal on the second resource; receive a third signal from a neighbor network device of the apparatus on one of the first resource and the second resource without the third signal being dedicated to the apparatus; determine a fixed position in both the first and second resources for transmitting the first signal and for receiving the second signal, wherein the fixed position is determined such that the neighbor network device uses the same fixed position in its resources for transmitting the third signal; and orthogonalize the first signal and the second signal with respect to the third signal; wherein the same signal structure is used for the first signal, the second signal, and the third signal.