Patent ID: 9362175
Filing Date: 2016-06-07
CPC Classification: H01L

Claim Text:
1. A method comprising: providing a semiconductor substrate with fins and gate structures; forming spacers on each of the gate structures; etching portions of the fins not covered by the gate structures to form recesses in the fins below exposed surfaces of isolation structures between the fins, wherein the recesses are below surfaces of isolation structures neighboring the fins; and forming doped source and drain regions for the gate structures by epitaxially growing at least one silicon-containing material from the recesses, wherein a cyclic deposition-deposition-etch (CDDE) process is used for the epitaxially growing, and wherein each cycle of the CDDE process forms a first doped epitaxial material during a first deposition step and a second doped epitaxial material during a second deposition step subsequent to the first deposition step, a first dopant concentration of the first doped epitaxial material being different from a second dopant concentration of the second doped epitaxial material, wherein a portion of the second doped epitaxial material is removed an etch process in each cycle of the CDDE process.