Patent ID: 9430735
Filing Date: 2016-08-30
CPC Classification: G06N,G11C

Claim Text:
1. A method of operating a memory device, the method comprising: applying a first potential to a control gate of a first memory cell of a string of series-connected memory cells connected to a data line while activating each remaining memory cell of the string of series-connected memory cells; generating a first output responsive to sensing the data line a first time while applying the first potential to the control gate of the first memory cell and while each remaining memory cell of the string of series-connected memory cells is activated; applying a second potential to a control gate of a second memory cell of the string of series-connected memory cells while activating each remaining memory cell of the string of series-connected memory cells, wherein the second potential is generated as a function of the first output; and sensing the data line a second time while applying the second potential to the control gate of the second memory cell and while each remaining memory cell of the string of series-connected memory cells is activated.