Patent ID: 9362926
Filing Date: 2016-06-07
CPC Classification: H03B,H03L

Claim Text:
1. A disciplined clock system comprising: a flywheel oscillator receiving a tuning voltage and outputting a flywheel oscillator frequency to a first counter responsively outputting a first counter time signal, wherein the flywheel oscillator frequency is controlled by the tuning voltage; a holdover oscillator outputting a holdover oscillator frequency to a second counter responsively outputting a second counter time signal; a time comparator module communicatively coupled to an external reference, the first counter, and the second counter, the time comparator module configured to perform the steps of: a clock control module coupled to the time comparator module and receiving the time error output and performance data from at least one of the holdover oscillator and at least one sensor, and responsively outputting a voltage control; and a digital-to-analog converter coupled to the clock control module and the flywheel oscillator, the digital-to-analog converter receiving the voltage control and responsively outputting the tuning voltage to the flywheel oscillator; wherein the time error output is used by the clock control module to determine the voltage control when the external reference time signal is reliable; and wherein the time error output and the performance data are used by the clock control module to determine the voltage control when the external reference time signal is unreliable.