Patent ID: 9503117
Filing Date: 2016-11-22
CPC Classification: H03M

Claim Text:
1. A semiconductor device, comprising: a reference capacitor that receives a reference voltage from a reference voltage generator; a first successive approximation register analog-to-digital converter (SAR ADC), for converting a first analog signal into a first digital signal, using a first sampling capacitor that has a first capacitance, connected to the reference capacitor through a first switching element, and a second sampling capacitor that has a second capacitance that is less than that of the first sampling capacitor, connected to the reference capacitor through a second switching element; a second SAR ADC, for converting a second analog signal into a second digital signal, using a third sampling capacitor that has a third capacitance, connected to the reference capacitor through a third switching element, and a fourth sampling capacitor that has a fourth capacitance that is less than that of the third sampling capacitor connected to the reference capacitor through a fourth switching element; and a controller configured to connect the first switching element and the third switching element to the reference capacitor at different times.