Patent ID: 9468108
Filing Date: 2016-10-11
CPC Classification: H05K,Y10T

Claim Text:
1. A structure including contact pads or circuits formed on a printed circuit board (PCB) over a filed or unfilled plated via, comprising: either an additional metallic or non-metallic coating that covering to a final surface of a finished plated circuit or pad that encapsulates side walls of a final surface plate, and also covers side walls of a metal layer plated onto a filled or unfilled via and on top of a wrap around plated metal plated in the via and onto the surface of a base metal to provide a slight undercut of panel plated metal and virtually no undercut of the base metal and of the pattern plated metal, preventing subsequent undermining through the etching process and for ensuring that the integrity and reliability of the vias electrical connection when an underlying base metal and the surface plated metal are formed when plating metal in the via and consequently on the surface wherein any excess of said coating around said pad has been removed or limited to prevent shorting of said pad's or circuitry to adjacent pads or circuitry after exposed wrapped plate and base metal layers have been etched.