Patent ID: 9502572
Filing Date: 2016-11-22
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a gate electrode layer; a gate insulating layer over the gate electrode layer; an oxide semiconductor layer over the gate insulating layer, the oxide semiconductor layer overlapping with the gate electrode layer; a source electrode layer over the oxide semiconductor layer, the source electrode layer being electrically connected to the oxide semiconductor layer; a drain electrode layer over the oxide semiconductor layer, the drain electrode layer being electrically connected to the oxide semiconductor layer; an insulating layer comprising silicon oxide over and in contact with the oxide semiconductor layer; and an aluminum oxide film over and in contact with the insulating layer, wherein the aluminum oxide film comprises magnesium or titanium, wherein the insulating layer comprises a region containing oxygen in excess of a stoichiometric composition, wherein the aluminum oxide film has a resistivity greater than or equal to 1×10 wherein a thickness of the aluminum oxide film is greater than or equal to 3 nm and less than or equal to 10 nm.