Patent ID: 9349673
Filing Date: 2016-05-24
CPC Classification: H01L,H05K

Claim Text:
1. A substrate comprising: a base board; three insulating layers stacked on the base board; a pad electrode provided on the insulating layer in a location farthest from the base board of the three insulating layers; and a hole formed to penetrate the base board and the three insulating layers and reaching the pad electrode, wherein a diameter of the hole in the insulating layer in a location closest to the base board of the three insulating layers is larger than a diameter of the hole in the insulating layer in the location farthest from the base board, the insulating layer in an intermediate location of the three insulating layers is formed using a metal oxide, and the insulating layer in the location closest to the base board is formed using a semiconductor oxide or a semiconductor nitride.