Patent ID: 9343579
Filing Date: 2016-05-17
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a first insulating layer including a groove; a gate electrode layer at least in a bottom of the groove; a gate insulating layer over and in contact with the gate electrode layer to cover the groove and at least part of a top of the first insulating layer; an oxide semiconductor layer overlapping with the gate electrode layer with the gate insulating layer interposed therebetween; a source electrode layer and a drain electrode layer over the first insulating layer with the gate insulating layer interposed therebetween, the source electrode layer and the drain electrode layer electrically connected to the oxide semiconductor layer; and a second insulating layer over the gate insulating layer to cover the source electrode layer and the drain electrode layer, wherein each of the gate insulating layer and the second insulating layer includes an aluminum oxide film containing excess oxygen.