Patent ID: 9519743
Filing Date: 2016-12-13
CPC Classification: G06F,H01L

Claim Text:
1. Circuitry, comprising: a substrate; a first circuit with an input node, an output node, and first and second stacked transistors, wherein the first stacked transistor is coupled between the output node and the second stacked transistor, and wherein the first circuit is formed in the substrate; a second circuit with an output node, wherein the output node of the second circuit is coupled to the input node of the first circuit, and wherein the second circuit is formed in the substrate; and a transistor in the second circuit having a pair of source-drain diffusions, wherein one of the source-drain diffusions of the transistor is coupled to the input node of the first circuit, wherein the transistor is placed at a first distance in the substrate from the second stacked transistor and at a second distance in the substrate from the output node of the first circuit, wherein the second distance is longer than the first distance, and wherein the first stacked transistor, the second stacked transistor, and the transistor of the second circuit are of a predetermined channel type.