Patent ID: 9230669
Filing Date: 2016-01-05
CPC Classification: G06F,G11C

Claim Text:
1. A method of operating a memory system including a non-volatile memory device and a memory controller controlling the non-volatile memory device, the method comprising: reading data from a memory cell array in a unit of a page which includes a plurality of sectors; performing error correction decoding on the read data in a unit of a sector of the page; selecting at least one target sector which includes at least one uncorrectable error in the read data thereof, and selecting at least one pass sector wherein all errors of the read data of the pass sector are correctable by the error correction decoding; inhibiting precharging of bit-lines connected to the at least one pass sector while precharging target bit lines connected to the at least one target sector; and performing a read retry operation for data stored in the at least one target sector.