Patent ID: 9269595
Filing Date: 2016-02-23
CPC Classification: H01L

Claim Text:
1. A method of manufacturing a semiconductor device, comprising: providing a semiconductor wafer including a plurality of first semiconductor die; mounting a second semiconductor die to the first semiconductor die; depositing an encapsulant over the first and second semiconductor die; removing a portion of a surface of the second semiconductor die; forming a via through the encapsulant over a footprint of the first semiconductor die and extending to the first semiconductor die after removing the portion of the surface of the second semiconductor die; forming a conductive material in the via to form a conductive pillar extending to through the encapsulant to the first semiconductor die; forming a build-up interconnect structure including an insulating layer and a redistribution layer each in direct contact with the encapsulant and second semiconductor die, the redistribution layer formed in direct contact with the conductive pillar; and removing a portion of a surface of the first semiconductor die after forming the build-up interconnect structure.