Patent ID: 9524261
Filing Date: 2016-12-20
CPC Classification: G06F,H04L

Claim Text:
1. A coherence point comprising an input request queue (IRQ), wherein the coherence point is configured to: receive transactions from a plurality of requestors via a switch fabric; maintain a first count that represents a number of credits received from a memory controller, wherein the number of credits indicate a number of transactions the memory controller is able to receive from the coherence point for servicing; maintain a second count that represents a number of credits needed to service outstanding transactions stored in the IRQ that will be sent to the memory controller; responsive to receiving a given transaction, increment the second count; responsive to determining an outstanding transaction stored in the IRQ is not to be sent to the memory controller, decrement the second count without removing the outstanding transaction from the IRQ; process outstanding transactions stored in the IRQ; compare the first count to the second count; and responsive to determining a difference between the first count and the second count is less than a predetermined threshold, prevent additional transactions from the plurality of requestors from being sent via the switch fabric to the coherence point while continuing to process transactions stored in the IRQ.