Patent ID: 9269615
Filing Date: 2016-02-23
CPC Classification: H01L

Claim Text:
1. A method, comprising: forming a recess in a dielectric layer of a substrate; forming a barrier layer stack to line the recess, wherein forming the barrier layer stack comprises performing a first deposition process to deposit a first barrier layer and performing a second deposition process to deposit a second barrier layer above the first barrier layer, wherein the first barrier layer comprises a first transition metal and the second barrier layer comprises an alloy of the first transition metal and a second transition metal not present in the first barrier layer; after depositing the first and second barrier layers, forming a first seed layer over the barrier layer stack to line the recess, the first seed layer comprising a first seed material; forming a doped seed layer over at least sidewall and bottom surface portions of the first seed layer, wherein the doped seed layer comprises an alloy of the first seed material and a dopant not present in the first seed layer; and after forming the doped seed layer, filling the recess with a fill layer.