Patent ID: 9253897
Filing Date: 2016-02-02
CPC Classification: H05K

Claim Text:
1. A wiring substrate, comprising: an insulating layer; a first pad that is embedded in the insulating layer, wherein a solder resist layer that is provided on the upper surface of the insulating layer and that is formed with an opening portion through which the recess portion is exposed, wherein an adjacent portion of the solder resist layer adjacent to a peripheral portion of the opening portion covers a peripheral portion of the upper surface of the first pad, the adjacent portion of the solder resist layer protrudes from the peripheral portion of the upper surface of the first pad toward the center portion of the first pad so as to cover above the recess portion, the upper surface of the insulating layer, surfaces of the first pad being in contact with the insulating layer, and the peripheral portion of the upper surface of the first pad are roughened, and the surfaces of the first pad being in contact with the insulating layer are smaller in roughness than the upper surface of the insulating layer and the peripheral portion of the upper surface of the first pad.