Patent ID: 9502531
Filing Date: 2016-11-22
CPC Classification: H01L

Claim Text:
1. A method of manufacturing a semiconductor device, the method comprising: providing a substrate having a first region and a second region; forming a plurality of first fin structures on the substrate, the plurality of first fin structures including a first buffer pattern and a first channel pattern; forming a device isolation pattern filling a plurality of gaps between the plurality of first fin structures; forming a plurality of trenches in the device isolation pattern formed in the second region by removing upper portions of the first fin structures, the plurality of trenches exposing the first buffer pattern formed in the second region; and forming a plurality of second fin structures on the first buffer pattern formed in the second region, the plurality of second fin structures including a second buffer pattern and a second channel pattern, wherein the first and second buffer patterns and the first and second channel patterns comprise a semiconductor material including germanium (Ge).