Patent ID: 9299453
Filing Date: 2016-03-29
CPC Classification: G09G,G11C

Claim Text:
1. A shift register, comprising: a voltage adjusting circuit, comprising: a first input terminal; a second input terminal; a transistor having a source electrode, a drain electrode, and a gate electrode, wherein the source electrode is coupled to ground and the gate electrode is coupled to the second input terminal; a first capacitor, having a first capacitance, coupled between the drain electrode of the transistor and the first input terminal; a second capacitor, having a second capacitance, one end of the second capacitor being coupled between the first capacitor and the drain electrode, and the other end of the second capacitor being coupled between the second input terminal and the gate electrode; and an output terminal, coupled between the first capacitor and the drain electrode of the transistor; a first transistor, coupled to the output terminal of the voltage adjusting circuit; a second transistor, coupled to the first transistor; a third transistor, coupled to the second transistor and ground; a fourth transistor, coupled to the first transistor, the third transistor, and ground; and a fifth transistor, coupled to the first transistor, the second transistor, the third transistor, and the fourth transistor; wherein the fourth transistor comprises a fourth gate electrode, a fourth drain electrode, and a fourth source electrode, the fourth gate electrode is coupled to a (n+2)th output stage, the fourth drain electrode is coupled to the first transistor, and the fourth source electrode is coupled to the third transistor and ground.