Patent ID: 9472679
Filing Date: 2016-10-18
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a first gate electrode layer over an insulating surface; a first insulating layer over the first gate electrode layer, the first insulating layer comprising silicon and oxygen; oxide semiconductor stacked layers comprising a first oxide semiconductor layer and a second oxide semiconductor layer and overlapping with the first gate electrode layer with the first insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers, wherein a bottom surface of the first oxide semiconductor layer is in direct contact with the first insulating layer; a source electrode layer and a drain electrode layer over and in direct contact with the second oxide semiconductor layer; a second insulating layer over and in direct contact with the source electrode layer, the drain electrode layer, and an upper surface of the second oxide semiconductor layer between the source electrode layer and the drain electrode layer, the second insulating layer comprising silicon and oxygen; and wherein the first oxide semiconductor layer and the second oxide semiconductor layer contain same constituent elements and have different compositions of the constituent elements, wherein the second oxide semiconductor layer includes: wherein a thickness of the first region is smaller than a thickness of the second region, wherein the first oxide semiconductor layer comprises indium and gallium, wherein the second oxide semiconductor layer comprises indium and gallium, and wherein an indium content is lower than or equal to a gallium content in the second oxide semiconductor layer.