Patent ID: 9362388
Filing Date: 2016-06-07
CPC Classification: G01R,H01L

Claim Text:
1. A method of characterizing during a production test an N-Channel, lateral double-diffused metal oxide semiconductor (LDMOS), silicon, power transistor having a gate and a channel between a source and a drain, with a threshold voltage greater than zero volts, comprising: applying a negative voltage to the gate of the transistor; applying a positive voltage across the channel of the transistor; measuring a leakage current through said channel of said transistor while applying the negative voltage to the gate of the transistor and applying the positive voltage across the channel of the transistor; and determining whether the transistor is deemed defective based upon the leakage current measurement; wherein the characterization is performed as part of a production test; and the transistor has a threshold voltage lower than a turn-on voltage of an intrinsic diode of the transistor.