Patent ID: 9502291
Filing Date: 2016-11-22
CPC Classification: H01L

Claim Text:
1. A semiconductor memory device, comprising: a first insulating layer covering a substrate; a first contact plug and a second contact plug, each penetrating the first insulating layer; a first data storage element disposed on the first contact plug and electrically connected to a portion of the substrate through the first contact plug; and a second data storage element disposed on and overlapping the second contact plug and electrically connected to a portion of the substrate through the second contact plug, wherein the first contact plug comprises: a vertically extending portion; and a horizontally extending portion arranged between the vertically extending portion and the first data storage element, wherein the second contact plug vertically extends from a top surface of the substrate, wherein the first data storage element is laterally spaced apart from the vertically extending portion, wherein the first data storage element is disposed on the horizontally extending portion, wherein a plurality of first contact plugs is provided and a plurality of second contact plugs is provided, wherein the plurality of first contact plugs and the plurality of second contact plug are alternately and repeatedly arranged, wherein each odd-numbered one of the contact plugs is one of the first contact plugs, and wherein each even-numbered one of the contact plugs is one of the second contact plugs.