Patent ID: 9262259
Filing Date: 2016-02-16
CPC Classification: G06F,H04L

Claim Text:
1. A method of protecting memory assets in an integrated circuit, the method comprising: sampling a value of each of a plurality of one-time programmable (OTP) memory arrays; comparing the sampled value of each OTP memory array of the plurality of OTP memory arrays with the sampled value of each other OTP memory array of the plurality of OTP memory arrays and with an unprogrammed OTP memory array value wherein the unprogrammed OTP memory array value corresponds to n bits all of a same logic value associated with an as-manufactured OTP memory array, n being a number of memory devices in each of the plurality of OTP memory arrays; determining if the sampled value of each OTP memory array is equal to the sampled value of each other OTP memory array; determining that an integrated circuit performance fault has occurred if the sampled value of each OTP memory array is equal to the sampled value of each other OTP memory array and the sampled value of each OTP memory array is equal to the unprogrammed OTP memory array value; and operating the integrated circuit with access to memory determined by the fault occurrence determination.