Patent ID: 9385139
Filing Date: 2016-07-05
CPC Classification: H01L

Claim Text:
1. A three-dimensional semiconductor device, comprising: a substrate; a stack structure including first and second insulating patterns stacked one on another on an upper surface of the substrate and an electrode interposed between the first and second insulating patterns; a semiconductor pattern extending vertically though the stack structure, the semiconductor pattern including a vertical portion extending in a vertical direction perpendicular to the upper surface of the substrate, and a protrusion portion projecting from a part of the vertical portion in a horizontal direction parallel to the upper surface of the substrate; a first insulating layer interposed between the stack structure and the semiconductor pattern, the first insulating layer extending in the vertical direction; and a second insulating layer extending from a region between the electrode and the vertical insulating layer to upper and lower surfaces of the electrode, the second insulating layer also extending in the horizontal direction adjacent the upper and lower surfaces of the electrode, wherein the electrode and each of the first and second insulating patterns has a first peripheral surface facing the semiconductor pattern and a second peripheral surface facing away from the semiconductor pattern such that each of the electrode and the first and second insulating patterns has a width, in the horizontal direction, from its first peripheral surface to its second peripheral surface, the width of each of the first and second insulating patterns is less than the width of the electrode, the second insulating pattern has a thickness, in the vertical direction, greater than each of those of the first insulating pattern and the electrode, and the first insulating pattern and the electrode are disposed horizontally across from the vertical portion of the semiconductor pattern and the second insulating pattern is disposed horizontally across from the protrusion portion of the semiconductor pattern.