Patent ID: 9252125
Filing Date: 2016-02-02
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a semiconductor chip including a plurality of electrodes thereon; a plurality of terminal formation pads provided over the semiconductor chip; a wiring layer provided between the semiconductor chip and the terminal formation pads, the wiring layer including a plurality of wirings that are electrically connecting the electrodes of the semiconductor chip to the terminal formation pads; a first insulating layer provided over the wiring layer to encapsulate the semiconductor chip; a linking connection pad formed on the first insulating layer, the linking connection pad including an upper surface that is kept uncovered by the first insulating layer and a lower surface that is in contact with the first insulating layer; a linking wiring extending from one of the wirings of the wiring layer, penetrating the first insulating layer and reaching the linking connection pad; and a plurality of solder balls mounted on the terminal formation pads, respectively.