Patent ID: 9455330
Filing Date: 2016-09-27
CPC Classification: H01L

Claim Text:
1. A method comprising: forming a first embedded etch stop layer in a gate dielectric layer and a work-function metal layer of a replacement metal gate (RMG) using ion implantation, wherein the first embedded etch stop layer comprises a layer of dopant atoms embedded at a depth below an upper portion of the gate dielectric layer and an upper portion of the work-function metal layer; removing the upper portion of the gate dielectric layer and the upper portion of the work-function metal layer; removing the first embedded etch stop layer to expose a lower portion of the gate dielectric layer and a lower portion of the work-function metal layer; forming a gate electrode on the lower portion of the gate dielectric layer and the lower portion of the work-function metal layer; and forming a gate cap on the gate electrode, the gate cap having an upper surface that is substantially flush with an upper surface of a spacer adjacent to the RMG and an upper surface of an interlevel dielectric (ILD) layer adjacent to the spacer.