Patent ID: 9406502
Filing Date: 2016-08-02
CPC Classification: C23C,H01L,Y10T

Claim Text:
1. A method of forming a semiconductor using atomic layer deposition, the method comprising: supplying a source gas through a first path to a reaction chamber; supplying a carrier gas through a second path to a bypass of the reaction chamber, wherein the second path includes a first portion of the first path and the carrier gas purges the source gas from the first portion of the first path; supplying a purge gas through a third path to the reaction chamber to purge the source gas from the reaction chamber, wherein the third path includes a second portion of the first path and the purge gas purges the source gas from the reaction chamber and the second portion of the first path; and supplying a reactive gas through a fourth path to the reaction chamber, wherein the second path and the third path meet at a junction of the first portion and the second portion of the first path.