Patent ID: 9337336
Filing Date: 2016-05-10
CPC Classification: H01L

Claim Text:
1. A method comprising: forming a PMOS transistor on a substrate, wherein the substrate further comprises an NMOS transistor disposed thereon, wherein the PMOS transistor comprises a first channel, a first gate structure disposed on the first channel, and first sidewall spacers adjacent the first gate structure; forming a compressive stressor adjacent to the first sidewall spacers; forming a tensile stressor over the compressive stressor, the first gate structure and the first sidewall spacers; removing a portion of the tensile stressor from over the first gate structure and leaving a portion of the tensile stressor on the first sidewall spacers and on the compressive stressor; forming a first trench in the first gate structure after removing the portion of the tensile stressor from the over the first gate structure; forming a first high-k gate dielectric in the first trench; forming a p-type work function material on the first high-k gate dielectric disposed in the first trench; and forming a first metal gate electrode over the p-type work function material.