Patent ID: 9239295
Filing Date: 2016-01-19
CPC Classification: G01N

Claim Text:
1. A system configured to detect defects on a wafer comprising: an illumination subsystem configured to illuminate the wafer with light having an illumination polarization; first and second side channels configured to detect light scattered from the wafer due to illumination of the wafer by the illumination subsystem and to generate output responsive to the detected light; a first polarizing component positioned in a path of the light from the wafer detected by the first side channel and a second polarizing component positioned in a path of the light from the wafer detected by the second side channel, wherein the first and second polarizing components are configured to have first and second detection polarizations, respectively, that are selected from two or more first and second polarization settings for the first and second polarizing components, respectively, wherein the two or more first polarization settings comprise at least one first detection polarization that is asymmetric to at least one second detection polarization included in the two or more second polarization settings, wherein the first detection polarization results in the output generated by the first side channel being sensitive to defects of interest and one or more nuisance defects, and wherein the second detection polarization results in the output generated by the second side channel being not sensitive to the one or more nuisance defects; and a computer subsystem configured to detect defects on the wafer based on the output generated by at least one of the first and second side channels, wherein the computer subsystem is further configured to detect the defects on the wafer by identifying the defects that are detected with the output of the first side channel and not the output of the second side channel as the one or more nuisance defects.