Patent ID: 9337209
Filing Date: 2016-05-10
CPC Classification: H01L

Claim Text:
1. A method of fabricating a semiconductor device, comprising: forming a plurality of fin structures on a substrate, wherein there is a trench between the fin structures; and performing at least two times of circulating processes, so as to form a first conductor layer, wherein each time of the circulating processes comprise: a deposition process, filling a first conductor material layer in the trench, wherein the first conductor material layer covers top parts and sidewalls of the fin structures; and an etching process, removing a part of the first conductor material layer, wherein a first thickness of the first conductor layer is adjusted to be less than a second thickness of the first conductor layer, the first thickness is a thickness of the first conductor layer at upper parts of the sidewalls of the fin structures, and the second thickness is a thickness of the first conductor layer at lower parts of the sidewalls of the fin structures.