Patent ID: 9287830
Filing Date: 2016-03-15
CPC Classification: H03F

Claim Text:
1. A RF amplifier circuit comprising: a plurality of stacked field effect transistor (FET) devices each including a drain terminal, a gate terminal and a source terminal, wherein a source terminal of at least one of the FET devices in the stack is electrically coupled to the drain terminal of another FET device in the stack, and wherein a bottom FET device in the stack of the FET devices is electrically coupled to ground; a voltage divider network including a plurality of resistors; a plurality of operational amplifiers where a separate one of the operational amplifiers is provided for each FET device in the stack, each operational amplifier including a positive input terminal, a negative input terminal and an output terminal, where the output terminal for a particular operational amplifier is electrically coupled to a gate terminal of a particular FET device, the negative input terminal of each operational amplifier is electrically coupled to the source terminal of the particular FET device and the positive input terminal of each operational amplifier is electrically coupled to a different location in the voltage divider network so that the source terminal provides a feedback voltage to the operational amplifier that controls a voltage applied to the gate terminal of the particular FET device; a source resistor electrically coupled to the source terminal of the bottom FET device and ground; and a voltage source electrically coupled across the voltage divider network and providing the voltage that is divided.