Patent ID: 9336005
Filing Date: 2016-05-10
CPC Classification: G06F

Claim Text:
1. A method, including: receiving, at a processor, a first indication that a first thread is to be preempted; in response to receiving the first indication, waiting for the first thread to reach a thread safe point, the thread safe point comprising a point in code at which a state of the first thread is such that an operation by another thread can be performed on the first thread; in the event that the first thread reaches the thread safe point, context switching the first thread out at the thread safe point and context switching a second thread in; and in the event that, while waiting for the first thread to reach the thread safe point, it is detected that a second indication has been received, in response to the detection that the second indication has been received, preemptively context switching the first thread out and context switching the second thread in.