Patent ID: 9494616
Filing Date: 2016-11-15
CPC Classification: G01R

Claim Text:
1. A socket device for testing a semiconductor device, comprising: a socket body provided with a plurality of first receiving holes for receiving a plurality of contacts therein, respectively, and provided with a hinge pin with which a latch is combined; a lower plate provided inside a lower part of the socket body wherein the lower plate is provided with a plurality of second receiving holes communicating with the first receiving holes so that lower contact portions of the contacts electrically contact leads of a printed circuit board (PCB); a floating plate supported by a plurality of elastic materials at a position above the socket body so that the floating plate can move vertically, wherein an upper surface of the floating plate serves as a surface to seat a semiconductor device, wherein the floating plate is provided with a plurality of through holes so that upper contact portions of the contacts go through the floating plate to be held in the plurality of through holes; a plurality of contacts inserted into the first receiving holes and the second receiving holes, wherein the lower contact portions of the contacts contact the leads of the PCB, and the upper contact portions of the contacts go through the through holes to contact leads of the semiconductor device; a guide plate provided on the floating plate, the guide plate having an inclined guide surface so that the semiconductor device can be seated on the floating plate; a socket cover supported by a plurality of cover springs, the socket cover combined together by a plurality of hooks with the socket body so as to move vertically above the socket body, and the socket cover having a plurality of latch driving pins and an opening so that the semiconductor device is led along the inclined guide surface to be loaded on the floating plate; and a latch elastically supported by a torsion spring and rotating on the hinge pin, the latch comprising a latch arm applying pressure to an upper surface of the semiconductor device, a roller capable of rotating freely at a front end of the latch arm, and a cam integral to the latch arm, the cam contacting the latch driving pins.