Patent ID: 9484485
Filing Date: 2016-11-01
CPC Classification: H01L,Y02E,Y02P

Claim Text:
1. A manufacturing method of a solar cell, the solar cell comprising: a photoelectric conversion section having a first principal surface and a second principal surface; and a collecting electrode formed on the first principal surface of the photoelectric conversion section, the photoelectric conversion section includes a semiconductor-stacked portion including a semiconductor junction, a first electrode layer formed on the first principal surface side of the semiconductor-stacked portion, and a second electrode layer formed on the second principal surface side of the semiconductor-stacked portion, the first electrode layer is a transparent electrode layer and the second electrode layer includes a transparent electrode layer, the collecting electrode includes a first electroconductive layer and a second electroconductive layer in this order from the first principal surface side of the photoelectric conversion section, wherein the method comprises: a photoelectric conversion section providing step of forming the first electrode layer and the second electrode layer, respectively, on the first principal surface and the second principal surface on the semiconductor-stacked portion; a first electroconductive layer forming step of forming the first electroconductive layer on the first electrode layer; an insulating layer forming step of forming an insulating layer on the first electrode layer; and a second electroconductive layer forming step of forming the second electroconductive layer on the first electroconductive layer by a plating method, wherein in the photoelectric conversion section providing step, a state in which the first electrode layer and the second electrode layer are short-circuited is created by forming the first electrode layer and the second electrode layer without using a mask, in the insulating layer forming step, the insulating layer is not formed on an outer peripheral portion of the first principal surface, and the first electrode layer is exposed to a surface in an insulating layer-non-formed region on the outer peripheral portion of the first principal surface; and after the insulating layer forming step, a short circuit eliminating step of removing the first electrode layer exposed to the surface of the insulating layer-non-formed region is performed by wet etching while the insulating layer is used as an etching mask, thereby the short circuit between the first electrode layer and the second electrode layer is eliminated.