Patent ID: 9419098
Filing Date: 2016-08-16
CPC Classification: H01L

Claim Text:
1. A method comprising: performing a first epitaxy to form a first silicon germanium layer over a substrate; performing a second epitaxy to form a second silicon germanium layer over the first silicon germanium layer; performing a third epitaxy to form a silicon layer substantially free from germanium over the second silicon germanium layer; etching the first silicon germanium layer and the second silicon germanium layer, wherein after the etching, the second silicon germanium layer has edges recessed from respective edges of the first silicon germanium layer after the etching, oxidizing the first silicon germanium layer to form a first silicon germanium oxide layer; forming a gate dielectric on a top surface and sidewalls of the silicon layer, wherein the gate dielectric extends on sidewalls of the first silicon germanium oxide layer; and forming a gate electrode over the gate dielectric.