Patent ID: 9330956
Filing Date: 2016-05-03
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a semiconductor device, comprising steps of: providing a substrate comprising a first region and a second region; forming a sacrificial oxide layer on said substrate with respect to said first region; forming a sacrificial nitride layer conformally on said sacrificial oxide layer and on said substrate with respect to said second region; coating a photoresist layer over said sacrificial nitride layer; providing a shallow trench isolation (STI) mask having at least one first STI pattern and at least one second STI pattern; transferring said at least one first STI pattern and said at least one second STI pattern to said substrate to form at least one first trench in said substrate with respect to said first region and at least one second trench in said substrate with respect to said second region; depositing a STI oxide layer to fill said at least one first trench and said at least one second trench; and performing a chemical-mechanical polishing (CMP) process until said sacrificial oxide layer is removed.