Patent ID: 9530457
Filing Date: 2016-12-27
CPC Classification: G11C,H01L,H05K,Y02P

Claim Text:
1. A semiconductor chip comprising: a semiconductor board including a surface comprised of a quadrangle in plan view, the surface including a first side, a second side facing the first side, a third side crossing the first and second sides, and a fourth side facing the third side and also crossing the first and second sides; a plurality of first pads coupling with a first memory interface circuit formed over the surface of the semiconductor board, the first pads being arranged along the first side of the surface of the semiconductor board in plan view, the first pads being arranged closer to the first side of the surface of the semiconductor board than the second side of the surface of the semiconductor board in plan view; and a plurality of second pads coupling with a second memory interface circuit formed over the surface of the semiconductor board, the second pads being arranged along the third side of the surface of the semiconductor board in plan view, the second pads being arranged closer to the third side of the surface of the semiconductor board than the fourth side of the surface of the semiconductor board in plan view, wherein the first memory interface circuit has a plurality of first data units coupled to the plurality of first pads, wherein the second memory interface circuit has a plurality of second data units coupled to the plurality of second pads, and wherein the plurality of second data units of the second memory interface circuit are the same as the plurality of first data units of the first memory interface circuit.