Patent ID: 9401728
Filing Date: 2016-07-26
CPC Classification: H03M

Claim Text:
1. A signal generator for generating an analog test signal, a first digital test signal and a second digital test signal to test a sigma-delta ADC comprising an analog portion for converting an analog input signal into a digital data stream and a digital portion comprising a digital decimation filter for processing the digital data stream into a digital output signal, the signal generator comprises: a digital waveform generator arranged for supplying the first digital test signal to a first output of the signal generator, the first digital test signal having a first particular number of bits and a first particular bit rate corresponding to digital signals occurring after the digital decimation filter of the sigma-delta ADC, the digital waveform generator comprises a digital sigma-delta modulator coupled for converting the first digital test signal into the second digital test signal and for supplying the second digital test signal to a second output of the signal generator, the second digital test signal having a second particular number of bits being lower than the first particular number of bits thereby corresponding to a digital signal occurring at an input of the digital decimation filter of the sigma-delta ADC, a first DAC being coupled to the digital sigma-delta modulator for converting the second digital test signal into an analog signal, and a first analog filter coupled to the first DAC for filtering the analog signal to obtain the analog test signal at a third output of the signal generator for testing the analog portion of the sigma-delta ADC.