Patent ID: 9349826
Filing Date: 2016-05-24
CPC Classification: H01L

Claim Text:
1. A method of manufacturing a semiconductor device, the method comprising the steps of: (a) forming a trench in a first semiconductor region of a first conductivity type such that an angle between a bottom surface of the trench and a corner portion of the trench is obtuse; (b) introducing an impurity of a second conductivity type selectively into a surface portion of the first semiconductor region for setting a concentration of an impurity of the first conductivity type in the surface portion of the first semiconductor region exposed to the corner portion of the trench to be low; (c) forming a first electrode in the trench with a first insulator film interposed between a side wall of the trench and the first electrode, step (c) being conducted after the step (b); (d) forming a control electrode in the trench with a second insulator film interposed between the side wall of the trench and the control electrode, the control electrode being formed above the first electrode; and (e) diffusing the impurity of the second conductivity type introduced into the surface portion of the first semiconductor region for forming a further semiconductor region of the first conductivity type, the further semiconductor region being doped more lightly than the first semiconductor region, the further semiconductor region covering the corner portion of the trench.