Patent ID: 9300306
Filing Date: 2016-03-29
CPC Classification: H03B,H03L,H04B

Claim Text:
1. A semiconductor device comprising: a low noise amplifier configured to amplify a radio frequency signal inputted from an antenna; a first reception mixer coupled with the low noise amplifier; a reception digital PLL circuit including a first digitally controlled oscillator circuit; and a reception divider coupled with the reception digital PLL circuit and the first reception mixer, wherein the first digitally controlled oscillator circuit includes: first and second oscillation output nodes from which complementary oscillation output signals are output; coil elements coupled between the first oscillation output node and the second oscillation output node; and a plurality of capacitor units coupled in parallel between the first oscillation output node and the second oscillation output node, and controlled through a plurality of control lines, wherein a first shield layer is disposed between the control lines and the first and second oscillation output nodes in such a manner as to effectively shield between the control lines and the first and second oscillation output nodes.