Patent ID: 9496188
Filing Date: 2016-11-15
CPC Classification: H01L

Claim Text:
1. A method comprising: heating a three-dimensional integrated circuit to a base temperature, wherein the base temperature is below a melting temperature of a solder, and wherein the three-dimensional integrated circuit includes a plurality of solder bumps disposed between vertically stacked dies; activating a first on-chip heat source to reflow a first portion of the plurality of solder bumps that is within a first local-hot-zone, wherein the first local-hot-zone has a temperature that is equal to or higher than the melting temperature of the solder; and activating a second on-chip heat source to reflow a second portion of the plurality of solder bumps that is within a second local-hot-zone, wherein the second local-hot-zone has a temperature that is equal to or higher than the melting temperature of the solder.