Patent ID: 9244763
Filing Date: 2016-01-26
CPC Classification: G06F,G11C

Claim Text:
1. A method for updating a reading threshold voltage applied to control gates of memory cells in a flash memory device while reading symbols from the flash memory device, the method comprising: in response to one or more first host read commands received from a host device, obtaining symbol transition information corresponding to symbol read errors identified while reading data from flash memory cells in the flash memory device in accordance with the one or more first host read commands and the current value of the reading threshold voltage; determining a reading threshold voltage offset, based at least in part on: generating an updated reading threshold voltage, to be applied to the control gates of memory cells in the flash memory device while reading symbols from the flash memory device, in accordance with the reading threshold voltage offset and the current value of the reading threshold voltage; and in response to one or more second host read commands, different from the one or more first host read commands received from the host device, reading data from the flash memory cells in accordance with the one or more second host read commands and the updated reading threshold voltage.