Patent ID: 9287372
Filing Date: 2016-03-15
CPC Classification: H01L

Claim Text:
1. A method of forming a trench on a fin field effect transistor (FinFET), comprising: forming a first inter-layer dielectric layer over a first gate and a second gate of the FinFET; forming a second inter-layer dielectric layer above the first inter-layer dielectric layer, the first gate of the FinFET, and the second gate of the FinFET; patterning a photoresist layer over the second inter-layer dielectric layer; etching part of the second inter-layer dielectric layer that is not below the photoresist layer to expose the first gate and the second gate; forming a first polysilicon layer over the first gate and the second gate and in the second inter-layer dielectric layer; and removing the first gate and the second gate and the first polysilicon layer to form a first trench and a second trench through the first inter-layer dielectric layer and the second inter-layer dielectric layer.