Patent ID: 9478556
Filing Date: 2016-10-25
CPC Classification: H01L

Claim Text:
1. A semiconductor memory device comprising: a first semiconductor pillar extending in a first direction; a second semiconductor pillar extending in the first direction, the first semiconductor pillar and the second semiconductor pillar being arranged in a second direction intersecting the first direction; two first electrode films extending in a third direction intersecting both of the first direction and the second direction, the two first electrode films being disposed on both outsides of a pair of the first semiconductor pillar and the second semiconductor pillar in the second direction; two second electrode films provided between the first semiconductor pillar and one of the first electrode films and between the second semiconductor pillar and another of the first electrode films; a first insulating film provided between the first semiconductor pillar and one of the second electrode films; a second insulating film provided between the one of the second electrode films and the one of the first electrode films; a first connection member being connected in common to an upper end of the first semiconductor pillar and an upper end of the second semiconductor pillar; a first contact, a lower end of the first contact being connected to the first connection member; and a first upper interconnect extending in the second direction and connected to an upper end of the first contact.