Patent ID: 9460936
Filing Date: 2016-10-04
CPC Classification: H01L

Claim Text:
1. A semiconductor device including a MISFET, comprising: a plurality of first grooves formed in a semiconductor substrate; a first epitaxial layer for a source of the MISFET and a second epitaxial layer for a drain of the MISFET embedded in the first grooves, respectively, a first insulating film formed over the first and second epitaxial layers; a second groove formed in the first insulating film; a gate insulating film of the MISFET formed over side surfaces and a bottom surface of the second groove; and a gate electrode of the MISFET embedded in the second groove through the gate insulating film, wherein each of the first and second epitaxial layers has a protruding portion such that an upper surface of the protruding portion is positioned higher than an upper surface of the semiconductor substrate, wherein each of protruding portions has a tilted side surface having a thickness which gradually increases, and wherein, in a gate length direction of the MISFET, both edges of the gate electrode are arranged over the first and second epitaxial layers, respectively.