Patent ID: 9281066
Filing Date: 2016-03-08
CPC Classification: G11C

Claim Text:
1. A memory device, comprising: a plurality of memory cells comprising a page of memory cells at each of first and second locations within the memory device, wherein each memory cell of each page is configured to store data comprising an upper page and a lower page; and control circuitry; wherein the control circuitry is configured to determine whether data is to be read from one of the upper page or the lower page at the first location upon generation of an internal command; and wherein the control circuitry is configured to determine whether data read from the one of the upper page or the lower page at the first location that is to be programmed into the lower page at the second location should be inverted using an inversion operation before programming the data read from the one of the upper page or the lower page at the first location into the lower page at the second location.