Patent ID: 9432049
Filing Date: 2016-08-30
CPC Classification: H03M

Claim Text:
1. An incremental delta-sigma A/D modulator comprising: an analog integrator configured to integrate input signals; a quantizer configured to quantize output signals of the analog integrator; a D/A converter configured to D/A convert based on an output of the quantizer; and a reset signal output device configured to output a reset signal for resetting the analog integrator, the incremental delta-sigma A/D modulator operating at a predetermined oversampling ratio, wherein the analog integrator includes a first plurality of switched capacitors, an operational amplifier connected to the first plurality of switched capacitors, and a feedback capacitor connecting an input and an output of the operational amplifier; respective identical signals are input to respective corresponding switched capacitors of the first plurality of switched capacitors, and the first plurality of switched capacitors are configured to sequentially transfer electric charges stored in the respective switched capacitors to the feedback capacitor at each oversampling of the incremental delta-sigma A/D modulator.