Patent ID: 9305663
Filing Date: 2016-04-05
CPC Classification: G06F,G11C

Claim Text:
1. A method comprising: receiving, by a storage server, error data for a plurality of blocks, each of the plurality of blocks comprising a plurality of memory pages associated with a plurality of non-volatile memory cells, wherein the error data indicates which of the plurality of memory pages comprise an uncorrectable bit error that cannot be corrected by an available error correction code (ECC); selecting, by the storage server, a block for read testing from the plurality of blocks, wherein the selection is based on selection criteria comprising the received error data; writing, by the storage server, a predetermined pattern on each of the plurality of memory pages in the selected block before a predetermined period of time has started; reading, by the storage server, after the predetermined period of time has expired, the predetermined pattern from each of the plurality of memory pages in the selected block; determining, by the storage server, for each of the plurality of memory pages in the selected block, when there is a match between the predetermined pattern that was read from each of the plurality of memory pages in the selected block after the predetermined period of time has expired and the predetermined pattern that was written on each of the plurality of memory pages in the selected block before the predetermined period of time had started; and taking, by the storage server, the block offline when a proportion of the plurality of memory pages in the selected block that comprise the predetermined pattern that do not match exceeds an error threshold proportion, wherein the proportion is based on a number of the plurality of memory pages in the selected block that do not match and a total number of the plurality of memory pages in the selected block.