Patent ID: 9411389
Filing Date: 2016-08-09
CPC Classification: G06F,H02J,Y02E

Claim Text:
1. A process to handle power imbalance in one or more distributed generation (DG) units in a microgrid (MG) to supply a main grid, comprising: electronically interfacing the DG units to a processor wherein active and reactive power outputs of the DG are controlled independently by the processor; detecting islanding at time t selecting Phasor Measurement Unit (PMU) measurements during a pre-defined time window [t checking the time window for an abrupt voltage change; if no sudden change of voltage is detected, determining an average value of a complex power flowing into the microgrid at time instant t measured by the PMU (s if a sudden change of voltage is detected at time instant t adjusting by the processor a real and reactive power reference of the DG units based on the best estimated system power imbalance and a percentage of a total system imbalance assigned to each DG.