Patent ID: 9343314
Filing Date: 2016-05-17
CPC Classification: H01L

Claim Text:
1. A method of making a semiconductor structure using a substrate, wherein the semiconductor structure comprises a split gate non-volatile memory (NVM) cell in an NVM region, the method comprising: forming a charge storage layer on the substrate; depositing a first conductive layer over the charge storage layer; depositing a capping layer over the first conductive layer; patterning the capping layer, the first conductive layer, and the charge storage layer to form a control gate stack; depositing a second conductive layer over the substrate including over the control gate stack; patterning the second conductive layer to leave a first portion of the second conductive layer over a portion of the control gate stack and adjacent to a first side of the control gate stack; planarizing the first portion of the second conductive layer and the control gate stack to leave a dummy select gate from the first portion of the second conductive layer, wherein replacing the dummy select gate with a select gate comprising metal, wherein the method further comprising replacing a portion of a first dielectric layer with a high-k dielectric prior to replacing the dummy select gate.