Patent ID: 9368772
Filing Date: 2016-06-14
CPC Classification: B05D,C23C,H01M,Y02E,Y02P,Y02T

Claim Text:
1. A method for fabricating a solid state battery device comprising layers of anode, cathode, separator, electrolyte, current collectors, substrate, and overlaying barrier material, with an inter-digitated layer structure configured with a post terminated lead structure, the method comprising: forming a plurality of battery device cell regions formed in a multi-stacked configuration, the plurality of battery device cell regions being numbered from 1 through N, where N is an integer greater than 1; wherein each of the battery device cell regions comprises a first current collector and a second current collector, the first current collector extending spatially outside of the battery device cell region and the second current collector extending spatially outside of the battery device cell region; forming, using at least a first deposition process, a thickness of a first lead material to cause formation of a first lead structure to interconnect each of the first current collectors associated with each of the plurality of battery device cell regions and to isolate each of the second current collectors extending spatially outside of the battery device cell region within a first isolated region; and forming, using a least a second deposition process, a thickness of a second lead material to cause formation of a second lead structure to interconnect each of the second current collectors associated with each of the plurality of battery cell regions and to isolate each of the first current collectors extending spatially outside of the battery device cell region within a second isolated region.