Patent ID: 9384370
Filing Date: 2016-07-05
CPC Classification: H03M

Claim Text:
1. A signal combination circuit comprising: a first decoding block configured to decode a first signal group of an input signal and generate a first decoding signal group according to a first random number signal; a second decoding block configured to decode a second signal group of the input signal and generate a second decoding signal group according to the first random number signal; a first network block configured to randomly mix the first decoding signal group and generate a first preliminary mixed signal group according to a second random number signal; a second network block configured to randomly mix the second decoding signal group and generate a second preliminary mixed signal group according to the second random number signal; and a selection block configured to selectively combine the first preliminary mixed signal group and the second preliminary mixed signal group and generate a mixed signal group according to the first random number signal.