Patent ID: 9502601
Filing Date: 2016-11-22
CPC Classification: H01L,Y02E

Claim Text:
1. A method of fabricating alternating N-type and P-type emitter regions of a solar cell, the method comprising: forming a first silicon layer of a first conductivity type on a first thin dielectric layer formed on a back surface of a substrate; forming an insulating layer on the first silicon layer; patterning the insulating layer and the first silicon layer to form first silicon regions of the first conductivity type having an insulating cap thereon, wherein the patterning includes exposing an outer portion and a lateral portion of the first silicon regions; forming a second thin dielectric layer on the back surface of the substrate; forming a third thin dielectric layer on the exposed outer portion and lateral portion of the first silicon regions; forming a second silicon layer of a second, different, conductivity type on the third thin dielectric layer, on the second thin dielectric layer, and on the insulating cap of the first silicon regions; patterning the second silicon layer and insulating cap to form contact openings in regions of the second silicon layer and to expose portions of the first silicon regions; forming a metal layer over the back surface of a substrate; and patterning the metal layer and second silicon layer to form isolated second silicon regions of the second conductivity type and to form conductive contacts for the first silicon regions and the isolated second silicon regions, wherein the patterning includes etching the metal layer and the second silicon layer using same etchant.