Patent ID: 9418751
Filing Date: 2016-08-16
CPC Classification: G11C

Claim Text:
1. A method for operating a memory device, comprising: receiving first instructions from a host device at a memory device, the first instructions comprise a program command, write data and a first address, the first address identifies memory cells in one plurality of NAND strings; in response to the first instructions, evaluating a threshold voltage distribution of select gate transistors of the one plurality of NAND strings to determine whether a number of the select gate transistors which have a threshold voltage outside a specified range is greater than a maximum allowable number comprising at least 1-5% of the select gate transistors; if the number of the select gate transistors which have a threshold voltage outside the specified range is not greater than the maximum allowable number, executing the program command by programming the memory cells corresponding to the first address with the write data; and if the number of the select gate transistors which have a threshold voltage outside the specified range is greater than the maximum allowable number, returning a program fail status to the host device without programming the memory cells corresponding to the first address with the write data.