Patent ID: 9252275
Filing Date: 2016-02-02
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a semiconductor substrate comprising a first material, the first material having a first lattice constant; a source region above the substrate, the source region comprising a second material, the second material having a second lattice constant different than the first lattice constant; a drain region above the substrate, the drain region comprising the second material; a first nanowire, the first nanowire being coupled to the source region and being coupled to the drain region, the first nanowire comprising a third material, the third material having a third lattice constant substantially the same as the second lattice constant; a second nanowire above the first nanowire and not in direct contact with the first nanowire, the second nanowire being coupled to the source region and being coupled to the drain region, the second nanowire comprising the third material; a gate dielectric layer around at least a portion of the first nanowire and around at least a portion of the second nanowire; and a gate electrode around at least a portion of the first nanowire and around at least a portion of the second nanowire, the gate electrode being separated from the first and second nanowires by at least the gate dielectric layer.