Patent ID: 9443754
Filing Date: 2016-09-13
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a substrate; a high-voltage N-well (HVNW) disposed in the substrate; a bulk P-well disposed in the substrate and adjacent to an edge of the HVNW; a high-voltage (HV) diode disposed in the HVNW, the HV diode including a HV diode P-well disposed in the HVNW and spaced apart from the edge of the HVNW; an N-well disposed in the HVNW and between the HV diode P-well and the bulk P-well; and a bulk P+-region disposed in the bulk P-well, wherein a doping concentration of the N-well is higher than a doping concentration of the HVNW, the N-well is in contact with the HV diode P-well and the bulk P-well, the HV diode further includes: the HV diode P-well is disposed between the HV diode N+-region and the edge of the HVNW.