Patent ID: 9520985
Filing Date: 2016-12-13
CPC Classification: H04L

Claim Text:
1. A circuit comprising: a transmitter that transmits a transmit signal; a plurality of signal paths, each signal path including a delay element and a variable attenuator; wherein each signal path receives a portion of the transmit signal; a control unit that sets one or more signal paths to a first attenuation level and a second attenuation level; a combiner that generates an output signal by combining outputs of the plurality of signal paths; and a receiver that receives a signal, wherein the circuit computes a matrix based on first and second output signals associated with the respective first and second attenuation levels, and wherein the control unit concurrently varies an attenuation level of each signal path so that a product of the matrix and the attenuation level of each signal path is substantially equal to the received signal; wherein the matrix is determined by applying sequentially a number of transmit signals having different frequencies to the signal paths; wherein the matrix is a complex M×N matrix, M and N being positive integers, where M is the number of the different frequencies, and N is the number of the signal paths; wherein the received signal is a complex M×1 column vector and the attenuation level of each signal path is an element of a real N×1 column vector.