Patent ID: 9391506
Filing Date: 2016-07-12
CPC Classification: H02M,Y02B

Claim Text:
1. A power factor correction circuit, comprising: a main switch adjusting a phase difference between a current and a voltage of input power; a main inductor storing or discharging the power according to switching of the main switch; a snubber circuit unit including a snubber switch forming a transfer path for surplus power present before the main switch is turned on and a snubber inductor adjusting an amount of a current applied to the snubber switch; and a reduction circuit unit reducing excessive power imposed on the snubber switch by varying inductance of the snubber inductor, wherein the reduction circuit unit includes; an auxiliary inductor inductively coupled to the snubber inductor; a direct current (DC) power source supplying the power to the auxiliary inductor; a variable resistor adjusting an amount of a current supplied to the auxiliary inductor by the DC power source; and an auxiliary switch supplying or blocking the power supplied from the DC power source.