Patent ID: 9471257
Filing Date: 2016-10-18
CPC Classification: G06F

Claim Text:
1. A semiconductor memory device, comprising: a memory array, consisting of non-volatile memory cells; a setting unit, setting a page address of the memory array which is initially read out at startup; a control unit, performing an internal sequence to read out the page address from the setting unit at startup and, according to the read-out page address, transmit page data corresponding to the read-out page address from the memory array to a page buffer; and a data register, provided to storing address information which comprises the page address; wherein the setting unit comprises a register accessed by the control unit at startup, and the register stores the page address in a predetermined area; wherein the setting unit sets the page address in response to a user command performed by a host device; wherein the control unit programs the page address of the address information stored in the data register into the register when a verification command is executed by the host device.