Patent ID: 9496886
Filing Date: 2016-11-15
CPC Classification: H03F,H03M,H04B,H04J

Claim Text:
1. A system for processing data streams, comprising: a processor configured to have a first output associated with a first linear combination of first, second and third inputs of said processor, a second output associated with a second linear combination of said first, second and third inputs of said processor and a third output associated with a third linear combination of said first, second and third inputs of said processor; a first analog-to-digital converter arranged downstream of said first output of said processor, wherein said first analog-to-digital converter is configured to perform first analog-to-digital conversion to convert its analog input associated with said first output of said processor into a first digital output; a second analog-to-digital converter arranged downstream of said second output of said processor, wherein said second analog-to-digital converter is configured to perform second analog-to-digital conversion to convert its analog input associated with said second output of said processor into a second digital output; and a third analog-to-digital converter arranged downstream of said third output of said processor, wherein said third analog-to-digital converter is configured to perform third analog-to-digital conversion to convert its analog input associated with said third output of said processor into a third digital output.