Patent ID: 9496170
Filing Date: 2016-11-15
CPC Classification: H01L

Claim Text:
1. A method comprising: depositing a first polymer layer over a first dielectric layer, wherein at least one gate electrode is embedded in the first dielectric layer; patterning the first polymer layer to form a first trench and a second trench in the first polymer layer; filling the first trench and the second trench with a conductive material to form a first metal line and a second metal line; applying a selective thermal curing process to the first polymer layer until portions of the first polymer layer surrounding the first metal line and the second metal line are cured; removing uncured portions of the first polymer layer through a cleaning process, wherein after the step of removing the uncured portions of the first polymer layer, the first metal line is wrapped by a first cured portion of the first polymer layer on three sides and the second metal line is wrapped by a second cured portion of the first polymer layer on three sides; and depositing a second dielectric layer over the first metal line and the second metal line to form an air gap between the first metal line and the second metal line.