Patent ID: 9229729
Filing Date: 2016-01-05
CPC Classification: G06F

Claim Text:
1. A data processing system comprising: at least one storage device having stored therein a system firmware; a multiprocessor system in communication with the storage device, the multiprocessor system having a plurality of processors each having one or more processor cores; and a microcontroller associated with at least a first processor of the plurality of processors and which: initializes the first processor utilizing a common initialization image for all processor cores within the first processor, wherein the common initialization image is usable to initialize all processor cores within the first processor, and wherein the microcontroller is separate from the plurality of processors; triggers the first processor to initialize all remaining processors utilizing the common initialization image; and retrieves the system firmware from the storage device and provides the system firmware to the first processor; wherein the first processor executes the system firmware, which operates to: detect a set of current system configuration parameters of the multiprocessor system, wherein detecting the set of current system configuration parameters further comprises probing, within the multiprocessor system, at least one of: one or more inter-processor input/output (I/O) busses between the plurality of processor cores, a system memory, one or more local memories, and one or more other processing components; for each of the processor cores in the multiprocessor system, generate a customized processor initialization image based on the set of current system configuration parameters; store the customized processor initialization images to a memory location within the storage device; and trigger all of the processor cores to enter a power save state in which all initialization settings of all of the processor cores is lost; and the microcontroller, in response to detecting that all of the processor cores have entered the power save state: loads a first customized initialization image generated for a first processor core of the first processor from the memory location in the storage device; and re-initializes the first processor core using the first customized initialization image.