Patent ID: 9298600
Filing Date: 2016-03-29
CPC Classification: G06F

Claim Text:
1. A method, comprising: allocating a memory address space for each of a plurality of physical memories in a microprocessor-based system, a size of at least one of the plurality of physical memories being unknown at a time the memory address space for the at least one of the plurality of physical memories is allocated and at least two of the allocated memory address spaces overlapping at least a portion of each other, in which the overlapping portion comprises a difference between an anticipated maximum size of one of the at least two overlapping allocated memory address spaces and an anticipated maximum size of another of the at least two overlapping allocated memory address spaces; fabricating the system after the allocating; and then setting a pointer value corresponding to an address boundary between at least two of the plurality of physical memories of the fabricated system, the size of the at least one of the plurality of physical memories being known at a time the pointer is set.