Patent ID: 9378977
Filing Date: 2016-06-28
CPC Classification: H01L

Claim Text:
1. A method of fabricating a non-volatile memory device comprising: providing a charge storage layer on a substrate; providing a control base gate layer on the charge storage layer; providing a control metal gate layer on the control base gate layer; providing a control gate mask pattern on the control metal gate layer; etching the control metal gate layer and the control base gate layer using the control gate mask pattern as an etch mask to form a first control metal gate pattern and a control base gate pattern; etching sidewalls of the first control metal gate pattern to form a second control metal gate pattern, so that a width of the second control metal gate pattern is less than a width of the control gate mask pattern; providing an oxidation-resistant spacer at sidewalls of the second control metal gate pattern positioned between the control gate mask pattern and the control base gate pattern; and performing a gate oxidation process on sidewalls of the control base gate pattern.