Patent ID: 9515150
Filing Date: 2016-12-06
CPC Classification: H01L

Claim Text:
1. A method of manufacturing a semiconductor device, the method comprising: providing a substrate including a first region and a second region that is different from the first region; forming first source/drain regions in the first region; forming second source/drain regions in the second region; forming sacrificial patterns on the first source/drain regions in the first region; performing an oxidation process to form first mask patterns on the first source/drain regions and second mask patterns on the second source/drain regions; wherein the second mask patterns have an etch selectivity with respect to the first mask patterns, wherein portions of the sacrificial patterns are oxidized to form the first mask patterns, and wherein top surfaces of the second source/drain are oxidized to form the second mask patterns during the oxidation process, the method further comprising: selectively removing the first mask patterns; forming the first patterns on the first source/drain regions in the first region; removing the second mask patterns after forming the first patterns; and forming second patterns on the second source/drain regions in the second region, wherein the first patterns include a first element and the second patterns include a second element that is different from the first element, wherein the first patterns are ohmic patterns that contact the first source/drain regions, wherein the second patterns are ohmic patterns that contact the second source/drain regions, wherein forming the first pattern comprises: removing residual portions of the sacrificial patterns that are not oxidized to expose the first source/drain regions; forming a first metal layer on the exposed first source/drain regions: reacting the first metal layer with the first source/drain regions; and removing an unreacted portion of the first metal layer that does not react with the first source/drain regions.