Patent ID: 9293389
Filing Date: 2016-03-22
CPC Classification: H01L,H05K

Claim Text:
1. A method of manufacturing a semiconductor package, the method comprising: providing a mother circuit board having a plurality of mounting areas, each mounting area including an inner circuit pattern and a plurality of contact pads that are connected to the inner circuit pattern; mounting integrated circuit (IC) devices on the mother circuit board in such a manner that respective ones of the IC devices make contact with respective ones of the contact pads at each mounting area of the mother circuit board; forming a mold on a whole surface of the mother circuit board to cover the IC devices; exposing a surface of the IC devices by planarizing the IC devices and the mold; forming a surface profile modifier on the exposed surfaces of the IC devices and on an upper surface of the mold; and cutting the mother circuit board to separate the mounting areas into units, wherein forming the surface profile modifier includes: forming a thermally conductive layer on a whole surface of the mother circuit board; forming a heat transfer pattern on the mother circuit board by patterning the thermally conductive layer, such that portions of the surface of the IC devices and the surface of the mold are not covered by the heat transfer pattern; and forming a plurality of recesses in the portions of the surface of the IC devices and the surface of the mold that are not covered by the heat transfer pattern, by a surface process using the heat transfer pattern as a process mask.