Patent ID: 9400866
Filing Date: 2016-07-26
CPC Classification: G06F

Claim Text:
1. A method comprising: providing a set of photomasks for fabricating an integrated circuit (IC) having an IC layout; selecting a subset of a plurality of first devices in the IC layout; and generating and storing in at least one non-transitory machine readable storage medium at least one layout mask, the layout mask accessible by a tool for forming at least one additional photomask, such that the set of photomasks and the at least one additional photomask are configured for fabricating an IC according to a revised IC layout, wherein: the set of photomasks include a gate insulation layer mask for forming a gate insulation layer of gate insulation material in gate regions of each of the plurality of first devices, and the additional photomask is configured to selectively expose the gate regions of the subset of the plurality of first devices to a gate insulation layer forming process, for forming additional gate insulation material on the gate insulation layer in the gate regions of each of the subset of the plurality of first devices.