Patent ID: 9276061
Filing Date: 2016-03-01
CPC Classification: H01L

Claim Text:
1. A diode, comprising: a p-type semiconductor substrate; an n-type semiconductor layer formed on the p-type semiconductor substrate; a p-type isolation region formed to surround a predetermined region of the n-type semiconductor layer on the p-type semiconductor substrate; an n-type buried layer formed across the p-type semiconductor substrate and the n-type semiconductor layer within the predetermined region, the n-type buried layer having an impurity concentration higher than an impurity concentration of the n-type semiconductor layer; an n-type collector wall formed in the n-type semiconductor layer, the n-type collector wall standing on the n-type buried layer toward a surface of the n-type semiconductor layer to surround the predetermined region of the n-type semiconductor layer, and having an impurity concentration higher than the impurity concentration of the n-type semiconductor layer; a p-type anode region and a plurality of n-type cathode regions formed in a diode formation region, which is defined within a region surrounded by the n-type collector wall in a surface layer of the n-type semiconductor layer; and a p-type guard ring formed to surround the diode formation region in a region between the diode formation region of the surface layer of the n-type semiconductor layer and the p-type isolation region, the p-type guard ring being electrically connected to the plurality of n-type cathode regions, wherein a transistor for reducing a leakage current is formed by the p-type anode region, the p-type guard ring, and an n-type semiconductor between the p-type anode region and the p-type guard ring.