Patent ID: 9411773
Filing Date: 2016-08-09
CPC Classification: G01R,G06F,H04B,H04J,H04L

Claim Text:
1. An integrated circuit comprising: A. a serial data input lead; B. a serial data output lead; C. a clock signal input lead; D. a mode select signal input lead; E. first data communication circuitry having a data input coupled to the serial data input lead, a data output coupled to the serial data output lead, a clock input coupled to the clock signal input lead, and a mode input coupled to the mode select signal input lead, the first data communication circuitry operating in a first set of states and changing states in response to clock signals and mode select signals on the respective clock signal input lead and the mode select signal input lead; and F. second data communication circuitry having a data input coupled to the serial data input lead, a data output coupled to the serial data output lead, a clock input coupled to the mode select signal input lead, and a mode input coupled to the clock signal input lead, the second data communication circuitry operating in a second set of states different from the first set of states and changing states in response to clock signals and mode select signals on the respective mode select signal input lead and the clock signal input lead.