Patent ID: 9508825
Filing Date: 2016-11-29
CPC Classification: H01L

Claim Text:
1. A method of making a semiconductor device, the method comprising: forming a gate on an active area of a substrate, a gate spacer positioned along a sidewall of the gate, and a gate cap disposed on a surface of the gate; forming a first source/drain contact and a second source/drain contact on opposing sides of the gate and in contact with the active area and gate spacer; disposing an interlayer dielectric (ILD) on the gate and first and second source/drain contacts; removing a portion of the ILD to form a gate contact opening over the gate; removing a portion of the first source/drain contact to form a first recess and a portion of the second source/drain contact to form a second recess; depositing a conformal layer of an insulating material along sidewalls of the gate contact opening and in the first recess and the second recess; removing the insulating material from a surface of the gate cap; removing the gate cap to expose the gate; and depositing a conductive material in the gate contact opening and on an exposed surface of the gate to form a gate contact.