Patent ID: 9384085
Filing Date: 2016-07-05
CPC Classification: G06F,H04L

Claim Text:
1. A method for displaying a state of a quickpath interconnect link in a multi-processor system through a graphical interface, comprising: receiving, by a monitor device, error code information from a board management controller (BMC) of the multi-processor system, wherein the multi-processor system includes a plurality of processors interconnected by quickpath interconnect links, wherein the error code information includes a code error number indicating code errors of a cyclic redundancy code check on a target quickpath interconnect link and a retransmission number indicating frequency of retransmitting data through the target quickpath interconnect link; comparing, by the monitor device, the retransmission number with a retransmission threshold to generate a result when the code error number does not exceed a code error threshold, wherein the result indicates the target quickpath interconnect link is abnormal when the retransmission number exceeds the retransmission threshold, and wherein the result indicates the target quickpath interconnect link is normal when the retransmission number does not exceed the retransmission threshold; obtaining by the monitor device, routing information of the processors, wherein the routing information indicates topology structure of the processors; and displaying, by the monitor device, the result on the topology structure through a graphical interface.