Patent ID: 9236841
Filing Date: 2016-01-12
CPC Classification: H03F,H03G

Claim Text:
1. An apparatus comprising an operational amplifier, the operational amplifier comprising: an input stage configured to receive a differential input current at an input port and to generate a first voltage signal, the differential current corresponding to a difference between a first input current at a non-inverting input node and a second input current at an inverting input node, the input stage comprising a first input transistor, a second input transistor, a third input transistor, and a fourth input transistor; and a gain-enhancement stage comprising a first gain-enhancement transistor, a second gain-enhancement transistor, a third gain-enhancement transistor, and a fourth gain-enhancement transistor; the first and third input transistors and the third and fourth gain-enhancement transistors comprising a first semiconductor type, and the second and fourth input transistors and the first and second gain-enhancement comprising a second semiconductor type complementary to the first semiconductor type; wherein a source or emitter of the first input transistor, a source or emitter of the second input transistor, a gate or base of the second gain-enhancement transistor, and a gate or base of the fourth gain-enhancement transistor are operatively coupled to the non-inverting input node, and wherein a source or emitter of the third input transistor, a source or emitter of the fourth input transistor, a gate or base of the first gain-enhancement transistor, and a gate or base of the third gain-enhancement transistor are operatively coupled to the inverting input node, such that the gates or bases of the gain-enhancement transistors are cross-coupled to the input port to provide a second voltage signal in phase with the first voltage signal.