Patent ID: 9437734
Filing Date: 2016-09-06
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a semiconductor substrate including a drain part and a source part, the drain part and the source part being formed by doping an impurity into the semiconductor substrate; a first dielectric layer formed in an area between the source part and the drain part, the first dielectric layer including a first portion and a second portion whose thickness is smaller than a thickness of the first portion; a gate electrode formed on the area and disposed on the semiconductor substrate and the first and second portions of the first dielectric layer; a second dielectric layer formed to cover the gate electrode and a surface of the semiconductor substrate; a metal layer formed on the second dielectric layer; a first pad being electrically connected to the source part; a second pad being electrically connected to the drain part; a first protective film including silicon nitride as a principal component and being formed on the second dielectric layer and formed to directly cover the metal layer; and a second protective film containing carbon and being formed to directly cover the first protective film, wherein the second protective film is formed by a CVD process using O3-TEOS.