Patent ID: 9343363
Filing Date: 2016-05-17
CPC Classification: H01L

Claim Text:
1. A method for making a through-silicon via feature in a silicon substrate, the method comprising the steps of: providing a silicon substrate having a support surface and a bottom surface separated from the support surface by a silicon substrate thickness; forming a noble metal structure on the silicon substrate support surface to generate silicon substrate contact regions that are in contact with or proximate to the noble metal structure, and silicon substrate non-contact regions that are not in contact with or are not proximate to the noble metal structure; exposing at least a portion of the silicon substrate support surface and noble metal structure to an etchant, wherein the etchant is an aqueous solution that comprises an oxidizing agent and an acid; preferentially etching with the etchant the silicon substrate contact regions compared to silicon substrate non-contact regions, wherein the preferentially etching provides an etch front having an etch front rate and etch front direction, the etch front direction substantially normal to the silicon substrate support surface; continuing the preferentially etching step until the etch front reaches the silicon substrate bottom surface; exposing the through-silicon via to an aqueous acid mixture to remove any remnant noble metals from the silicon substrate; forming an electrically insulating layer on at least a portion of a surface of the silicon substrate and a wall of the through-silicon via; providing a plating base on at least a portion of the surface of the silicon substrate having a through-silicon via; depositing metal on at least a portion of a surface of the plating base, wherein the depositing metal step comprises electrodeposition of the metal on the surface of the plating base to form plated metal structures; and electrically isolating separate electrical nodes on the surfaces the silicon substrate by removing the plating base from the deposited metal and the silicon substrate; thereby forming the through-silicon via by metal-catalyzed wet etching and a silicon interposer wafer-level package.