Patent ID: 9312261
Filing Date: 2016-04-12
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a semiconductor substrate including first and second well regions of a first conductivity type, and a third well region of a second conductivity type different from the first conductivity type, the third well region between the first and second well regions; a first active region in the first well region; a second active region in the second well region; a third active region in the third well region, the third active region closer to the second active region than to the first active region; a fourth active region in the third well region, the fourth active region closer to the first active region than to the second active region; a first conductive pattern across only the first and third active regions; a second conductive pattern across the second and fourth active regions; a third conductive pattern across the first active region; and a fourth conductive pattern across the second active region, wherein the second and third conductive patterns have end portions that face each other and the facing end portions of the second and third conductive patterns are between the first and third active regions, and wherein the first and fourth conductive patterns have end portions that face each other and the facing end portions of the first and fourth conductive patterns are between the second and fourth active regions.