Patent ID: 9437366
Filing Date: 2016-09-06
CPC Classification: H01G,H01L,Y10T

Claim Text:
1. A method of making a capacitor array configured for post production in-situ laser trimmable use, for adjustment of the resulting capacitance value thereof while such capacitor array is in operation in a circuit, such method comprising: providing a substrate; forming a first metallization layer on the substrate and having a first portion thereof providing a respective connection portion for a first terminal and providing a plurality of common electrode areas, and having a second portion thereof providing a respective connection portion for a second terminal; forming a dielectric layer on the first metallization layer and having respective first and second windows formed therein and aligned for respective association with such first and second terminal connection portions of the such first metallization layer; forming a second metallization layer on such dielectric layer and having respective first and second terminal connection portions thereof aligned with corresponding such portions of the first metallization layer, and having a plurality of second electrode layers for correspondence with selected portions of such common electrode areas of the first metallization layer, and having a respective plurality of fusible links which are respectively ablatable by laser irradiation and associated respectively with such second electrode layers for fusibly connecting such second electrode layers with a selected one of such first and second terminal connections portions of the second metallization layer; forming a laser radiation transparent passivation layer over the second metallization layer and having respective first and second windows formed therein and aligned for respective association with such first and second terminal connection portions of the second metallization layer; and providing termination plating received in such first and second windows of such passivation layer and interconnected with the first metallization layer via such respective windows of such dielectric layer and of such passivation layer, and via such respective first and second terminal connection portions of the second metallization layer; and adjusting the resulting capacitance value of such capacitor array with laser ablation through such passivation layer of selected fusible links while such capacitor array is operative in a circuit, for precise trimming of such capacitor array capacitance value.