Patent ID: 9379103
Filing Date: 2016-06-28
CPC Classification: H01L,H02M

Claim Text:
1. A charge pump circuit, comprising: a substrate; a first well region formed in the substrate; a first transistor including first and second conduction regions disposed in the first well region; a second well region formed in the substrate to include a third conduction region of the second well region coupled to a voltage input of the charge pump circuit, the second well region and third conduction region both doped to a first conductivity type; a third well region formed within the second well region, the third well region doped to a second conductivity type opposite the first conductivity type; a second transistor including a fourth conduction region and fifth conduction region disposed in the third well region; and a sixth conduction region disposed in the third well region and coupled to the voltage input of the charge pump circuit, wherein the second well region and third well region are shorted together by a common coupling to the voltage input of the charge pump circuit via the third conduction region and sixth conduction region, respectively.