Patent ID: 9299815
Filing Date: 2016-03-29
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a semiconductor device comprising the steps of: forming a semiconductor layer; forming a first conductive layer of a single layer over the semiconductor layer; forming a first resist mask with use of light with a wavelength less than or equal to 365 nm over the first conductive layer; etching the first conductive layer with use of the first resist mask to form a second conductive layer having a recessed portion; reducing the first resist mask in size to form a second resist mask so that a part of a surface of the second conductive layer other than the recessed portion is exposed; etching the second conductive layer with use of the second resist mask to form a source electrode and a drain electrode each having a projecting portion with a tapered shape at peripheries of the source electrode and the drain electrode after reducing the first resist mask; forming a gate insulating layer over the source electrode and the drain electrode and in contact with a part of the semiconductor layer; and forming a gate electrode in a portion which is over the gate insulating layer and overlaps with the semiconductor layer.