Patent ID: 9231121
Filing Date: 2016-01-05
CPC Classification: H01L

Claim Text:
1. A high voltage circuit layout structure, comprising: a P-type substrate; a first N-type tub, a second N-type tub, and a third N-type tub formed on the P-type substrate, wherein the first N-type tub's potential and the third N-type tub's potential follow relatively with the second N-type tub's potential; a first P-type tub having a first width formed on the P-type substrate and formed between the first N-type tub and the second N-type tub, the first width being dependent on the punch-through voltage requirement between the first N-type tub and the second N-type tub; a second P-type tub having a second width formed on the P-type substrate and formed between the second N-type tub and the third N-type tub, the second width being dependent on the punch-through voltage requirement between the second N-type tub and the third N-type tub; and a metal layer contacted with the first N-type tub and the second N-type tub to form a first Schottky diode and a second Schottky diode, and the said metal layer also contacted with the first P-type tub; wherein the first N-type tub and the second N-type tub respectively has P-plus regions in their surfaces.