Patent ID: 9286820
Filing Date: 2016-03-15
CPC Classification: G09G,H01L

Claim Text:
1. A thin film transistor array panel comprising: a display area including a plurality of pixels; a peripheral area formed around the display area and including a first peripheral area disposed at a side of the display area; a plurality of data lines configured to respectively apply a plurality of data voltages to the pixels, the data lines including a plurality of first data lines at least a portion of which is disposed in the display area; and a plurality of first dummy data lines substantially formed in the first peripheral area and extending along a first boundary edge between the display area and the first peripheral area, wherein a dot including a plurality of pixels representing different colors from one another has TFTs connected to the first data lines, the dot being adjacent to the first boundary edge, and wherein each of the first data lines makes a pair with and electrically connected to each one of at least a portion of the first dummy data lines.