Patent ID: 9424176
Filing Date: 2016-08-23
CPC Classification: G06F

Claim Text:
1. An emulated EEPROM system comprising: a volatile random access memory for storing and accessing data via one or more access requests; a non-volatile memory comprising a plurality of sectors for storing records of the data stored in the volatile random access memory, each sector of the plurality of sectors comprising a corresponding sector header for storing a plurality of sector status bits defining a plurality of status indicators arranged to sequentially specify a lifecycle sequence of sector configuration states for said sector, where each sector header further comprises a sector skip indicator location for one or more adjacent dead sectors in the non-volatile memory for storing a sector skip indicator which may be used to automatically bypass the one or more adjacent dead sectors during automated search or copydown operations; and a control module coupled to the non-volatile memory and the volatile memory, where the control module is operable to program the plurality of sector status bits in the sector header of each sector with first and second program operations to change a sector configuration state for the sector, where the control module comprises an address generation unit for generating a controlled address sequence based on a sector size adjustment signal derived from the sector skip indicator in the sector header.