Patent ID: 9515147
Filing Date: 2016-12-06
CPC Classification: H01L

Claim Text:
1. A method of manufacturing a semiconductor device, the method comprising: preparing a substrate; forming a first semiconductor layer and a second semiconductor layer sequentially disposed on the substrate, the second semiconductor layer including a material different from that of the first semiconductor layer; forming a third semiconductor layer in order to form source/drain regions by forming trenches disposed at both ends of the second semiconductor layer in a first region of the substrate; forming a gate dielectric layer and a gate surrounding a portion of the second semiconductor layer; forming first insulating spacers disposed between the gate and the source/drain regions; and forming second insulating spacers disposed between the second semiconductor layer and the substrate and between the gate and the source/drain regions, wherein the gate dielectric layer includes a material different from those of the first and second insulating spacers, and wherein the first insulating spacers surround a portion of the second semiconductor layer and portions of the second insulating spacers.