Patent ID: 9349733
Filing Date: 2016-05-24
CPC Classification: H01L

Claim Text:
1. A semiconductor structure, comprising: a first gate structure formed over a substrate; a first spacer formed on a sidewall of the first gate structure, wherein a top surface of the first spacer is parallel to a top surface of the substrate; a source and drain structure formed in the substrate adjacent to the first spacer; a first contact formed on the source and drain structure, wherein a portion of the first contact is in direct contact with the top surface of the first spacer; and a contact etch stop layer along an outer sidewall of the first spacer, wherein the outer sidewall of the first spacer is separate from the first contact by the contact etch stop layer, and another portion of the first contact is in direct contact with a top and an outer sidewall of the contact etch stop layer, wherein the top surface of the first spacer is level with a top surface of a gate electrode layer of the first gate structure.