Patent ID: 9471965
Filing Date: 2016-10-18
CPC Classification: G06K,G06T

Claim Text:
1. An image processor comprising: a denoising circuit configured to remove noise from an image; and an edge enhancement circuit connected in a stage subsequent to the denoising circuit and configured to enhance an edge in the image, the denoising circuit including a lowpass filter configured to remove noise from the image; a first edge detection circuit configured to detect an edge in the image; a first edge strength calculation circuit configured to calculate an edge strength of each pixel in the image based on a result of detection by the first edge detection circuit; and a first filter strength setting circuit configured to set a filter strength of the lowpass filter for each pixel, based on the edge strength calculated by the first edge strength calculation circuit, the edge enhancement circuit including an edge enhancement filter configured to enhance an edge in the image; a second edge detection circuit configured to detect the edge in the image; a second edge strength calculation circuit configured to calculate an edge strength of each pixel in the image, based on a result of detection by the second edge detection circuit; and an enhancement strength setting circuit configured to set an edge enhancement strength of the edge enhancement filter for each pixel, based on the edge strength calculated by the second edge strength calculation circuit.