Patent ID: 9378132
Filing Date: 2016-06-28
CPC Classification: G06F

Claim Text:
1. A method for providing memory device readiness the method comprising: initiating, by a processor of a memory controller, one or more memory commands to one or more selected memory units in a first group of memory units of a plurality of groups of memory units, the groups of memory units being operably connected to the processor by a plurality of respective channel controllers distinct from the processor and the plurality of groups of memory units; sending, from the processor, to a selected one of the plurality of respective channel controllers operably connected to and between the processor and the first group of memory units, a request for a status of the one or more selected memory units; determining, by the selected channel controller in response to the request from the processor, the status of the one or more selected memory units, the status being determined while the processor is permitted to execute one or more other commands related to one or more other memory units in a different group of memory units; and on determining that the one or more selected memory units are in a ready status, providing, by the selected channel controller, the ready status to the processor.