Patent ID: 9395738
Filing Date: 2016-07-19
CPC Classification: G05F,H02M,Y02B

Claim Text:
1. A method of regulating a voltage level at a load, comprising: configuring a current control mechanism to generate a current through a first inductor and a second inductor that are coupled in series, wherein the second inductor reduces losses due to a parasitic capacitance located between the first inductor and the second inductor; configuring a voltage control mechanism to provide a portion of the current to regulate the voltage level at the load, wherein a switching frequency of the current control mechanism is slower than a switching frequency of the voltage control mechanism; and adjusting the portion of the current provided to the load by increasing a duty cycle of the switching frequency of the voltage control mechanism in response to determining that the voltage level at the load is less than a minimum voltage level, or adjusting the portion of the current provided to the load by decreasing the duty cycle of the switching frequency of the voltage control mechanism in response to determining that the voltage level at the load is greater than a maximum voltage level.