Patent ID: 9490760
Filing Date: 2016-11-08
CPC Classification: G11C,H03F

Claim Text:
1. A self-timed differential amplifier, comprising: an amplifier unit, having a pair of read/write terminals, wherein data is read or written by a select line, the amplifier unit comprising a transistor structure having at least two pairs of transistors with one pair controlled by the select line and the other pair controlled by an inverted signal of the select line; a pair of precharge transistors, controlled by a control line, each side of the pair of precharge transistors including a first transistor, the first transistor being a bipolar transistor or a field-effect transistor, and the first transistor having a first terminal, a second terminal and a gate control terminal; and a pair of cross-coupled transistors, controlled by a column select line, each side of the pair of cross-coupled transistors including a cascode configuration of a second transistor and a third transistor, the second and third transistors being bipolar transistors or field-effect transistors, and each of the second and third transistors having a first terminal, a second terminal and a gate control terminal; wherein the pair of precharge transistors and the pair of cross-coupled transistors are connected to the pair of read/write terminals of the amplifier unit, and the gate control terminals of the third transistors in each side of the pair of cross-coupled transistors are connected to the column select line.