Patent ID: 9461045
Filing Date: 2016-10-04
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: two gate electrodes, the gate electrodes being of about a same gate width as one another; a first diffusion region between the two gate electrodes, and being a first source/drain region; second and third diffusion regions on opposing sides of the two gate electrodes from one another and which sandwich the two gate electrodes and the first source/drain region therebetween; the second and third diffusion regions being second and third source/drain regions, respectively; the first source/drain region being a first kind of region corresponding to either a source region or a drain region; the second and third source/drain regions being a second kind of region different from the first kind and either both being source regions or both being drain regions; each of the second and third diffusion regions being longer than the first diffusion region in a direction of the gate width; wherein multiple contacts extend to each of the first, second and third diffusion regions; wherein there are more contacts extending to the second and third diffusion regions than to the first diffusion region; and wherein said direction of the gate width is a length direction of the first, second and third diffusion regions; wherein each of the first, second and third diffusion regions has opposing edges on each side of its length, with the device having a first side defined by one set of edges of the first, second and third diffusion regions, and having a second side defined by another set of edges of the first, second and third diffusion regions; and wherein both of the first and second sides have edges of the first diffusion region inset relative to edges of the second and third diffusion regions.