Patent ID: 9384857
Filing Date: 2016-07-05
CPC Classification: G06F,G11C

Claim Text:
1. A computer implemented method for system reliability, the method comprising: receiving an input; repeating a computation operation on the input to generate multiple output values; storing the multiple output values in a table along with a number of hits for each distinct output value in the multiple output values, the number of hits indicating a number of times each distinct output value was generated by the repeating; checking, by a reliability circuit, whether the number of hits for any one distinct output value meets a confidence threshold; based on meeting the confidence threshold for the number of hits for the any one distinct output value, outputting the any one distinct output value; and based on the number of hits for the any one distinct output value not meeting the confidence threshold, continuing to repeat the computation operation on the input until the number of hits for the any one distinct output value meets the confidence threshold.