Patent ID: 9356584
Filing Date: 2016-05-31
CPC Classification: H03K

Claim Text:
1. A level shifter, for high-speed level shifting, comprising: a first P-channel transistor, comprising a gate, a drain and a source, the gate coupled to the drain, the source coupled to a system voltage; a second P-channel transistor, comprising a gate, a drain and a source, the gate coupled to the gate of the first P-channel transistor, the source coupled to the system voltage; a first N-channel transistor, comprising a gate, a drain and a source, the drain directly connected to the drain of the first P-channel transistor, the source coupled to a ground level; a second N-channel transistor, comprising a gate, a drain and a source, the drain directly connected to the drain of the second P-channel transistor, the source coupled to a ground level; and a first switch, coupled between the ground level and the sources of the first N-channel transistor and the second N-channel transistor; wherein the first N-channel transistor and the second N-channel transistor are low threshold voltage transistor or native transistors.