Patent ID: 9338004
Filing Date: 2016-05-10
CPC Classification: G06F,H04L

Claim Text:
1. A method for personalizing at least one chip, intended to be integrated into a smart card, comprising: sending by a tester a first secret code to a Field Programmable Gate Array (FPGA) device connected to the at least one chip, the at least one chip being part of a wafer comprising an arrangement of a plurality of chips, the tester being associated to the FPGA device, said first secret code being stored permanently in a memory of the tester; sending by the FPGA device a command to the at least one chip to initiate a sequence of a test mode activation; sending by the at least one chip a signal to a disposable hardware module arranged on the wafer and receiving from, said disposable hardware module a response indicating presence of the at least one chip on the wafer; generating and sending by the at least one chip a random number to the FPGA device; encrypting by the FPGA device a second secret code by using a secret encryption algorithm parameterized with the random number and the first secret code, to obtain a first cryptogram; sending by the FPGA device the first cryptogram, to the at least one chip; determining by the at least one chip a second cryptogram by carrying out a Boolean function over a result obtained by decrypting the first cryptogram using the inverse of the secret encryption algorithm parameterized with the random number and the first secret code; comparing by the at least one chip the second cryptogram with a result obtained by carrying the Boolean function over the second secret code temporarily stored on the at least one chip; if the second cryptogram corresponds to the result obtained by carrying out the Boolean function over the second secret code, enabling the test mode activation; sending by the at least one chip a response message to the FPGA device; and performing, by the FPGA device, personalization of the at least one chip if the response message includes a positive response, wherein personalization comprises storing unique secret data on the at least one chip.