Patent ID: 9306564
Filing Date: 2016-04-05
CPC Classification: G06F,G11C,H03K

Claim Text:
1. A non-volatile memory device comprising: an array of non-volatile storage elements; a plurality of input/output (I/O) nodes to receive data signals representative of data to be stored within the array of non-volatile storage elements and to output data signals representative of data read from the array of non-volatile storage elements; one or more control input nodes to receive control information indicating that data signals are to be received or output via the I/O nodes during a subsequent time interval; and on-die termination circuitry to switchably couple and decouple respective termination elements to and from the I/O nodes based at least in part on the control information, and also to switchably couple and decouple respective termination elements to and from the one or more control input nodes.