Patent ID: 9508642
Filing Date: 2016-11-29
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor structure, comprising: forming a plurality of Mx metal lines in a dielectric layer; depositing a capping layer over the plurality of Mx metal lines; forming a plurality of sacrificial Mx+1 lines on the dielectric layer; forming spacers adjacent to each of the plurality of sacrificial Mx+1 lines; depositing a first resist layer over the plurality of sacrificial Mx+1 lines; forming an opening in the first resist layer at a location corresponding to a line cut for at least one Mx metal line of the plurality of Mx metal lines; removing the capping layer at the location corresponding to the line cut; and performing a metal etch to cut the at least one Mx metal line of the plurality of Mx metal lines.