Patent ID: 9484428
Filing Date: 2016-11-01
CPC Classification: B82Y,H01L

Claim Text:
1. A method, comprising: forming a conductive structure above a base layer; forming a plurality of layers above said conductive structure, said plurality of layers comprising a first dielectric layer, a first ballistic conductor layer formed above said first dielectric layer, an intermediate layer formed above said first ballistic conductor layer, a second ballistic conductor layer formed above said intermediate layer, and a second dielectric layer formed above said second ballistic conductor layer; forming a conductive layer above said plurality of layers; and planarizing said conductive layer and said plurality of layers to expose a top surface of said conductive structure, to define a first sidewall stack from said plurality of layers on a first sidewall of said conductive structure, and to define a first gate electrode from said conductive layer adjacent said first sidewall stack, wherein said first gate electrode contacts said second dielectric layer in said first sidewall stack, and said conductive structure comprises a second gate electrode contacting said first dielectric layer in said first sidewall stack.