Patent ID: 9454637
Filing Date: 2016-09-27
CPC Classification: G06F

Claim Text:
1. A method comprising: providing a circuit solution for the circuit network, wherein the circuit network comprises nodes and branches, and the circuit solution is stored in a computer-readable format; identifying a plurality of loops in the circuit network; using at least one computer processor, for the circuit solution, summing voltages for each identified loop and storing loop sum results; using at least one computer processor, for the circuit solution, summing currents at each node of the circuit network and storing node sum results; using at least one computer processor, for the circuit solution, summing power consumption of each branch of the circuit network and storing a total branch power; and when at least one of the identified loops sums to a value other than zero, providing an indication on a computer display that an error occurred while attempting to validate the circuit solution.