Patent ID: 9431482
Filing Date: 2016-08-30
CPC Classification: B82Y,H01L

Claim Text:
1. A method for forming a semiconductor structure, at least comprising the following steps: providing a substrate, a first region and a second region being defined on the substrate, and at least one material layer being formed on the substrate; performing a height adjusting process, so as to make the height of the at least one material layer within the second region differ from the height of the at least one material layer within the first region; performing a patterning process, to remove parts of the at least one material layer, and so as to form at least one first channel structure within the first region and at least one second channel structure within the second region; performing an anneal process, to transform each first channel structure into a first nanowire structure, and to transform each second channel structure into a second nanowire structure, wherein the diameter of the first nanowire structure is different from the diameter of the second nanowire structure, in addition, a first oxide layer is formed and surrounding the first nanowire structure, and a second oxide layer is formed and surrounding the second nanowire structure during the anneal process; and performing an etching process, to remove the first oxide layer and the second oxide layer after the anneal process is performed.