Patent ID: 9312008
Filing Date: 2016-04-12
CPC Classification: G11C,H01L

Claim Text:
1. An operation method of a nonvolatile memory device, the operation method comprising: determining a location of a selected word line, the selected word line being one of a plurality of word lines connected to a plurality of memory cells in the nonvolatile memory device, the plurality of memory cells being stacked on a substrate in the nonvolatile memory device, the nonvolatile memory device including a plurality of cell strings, each one of the cell strings including a number of the memory cells stacked on top of each other in a direction perpendicular to the substrate and between a ground select transistor and a string select transistor, the ground select transistor between the substrate and the number of the memory cells, the string select transistor connected to a bit line and being between the bit line and the number of the memory cells; selecting one of a plurality of different read disturbance reducing modes according to the location of the selected word line; and performing a read or verification operation according to the selected one of the plurality of different read disturbance reducing modes.