Patent ID: 9291478
Filing Date: 2016-03-22
CPC Classification: G01D,G01R

Claim Text:
1. An electronic circuit, comprising: a power supply input node configured to receive a power supply voltage, wherein the power supply voltage has, at different times, a range of values comprising a steady state power supply voltage value, a maximum power supply voltage value above the steady state value, and a minimum power supply voltage value below the steady state value; a peak voltage suppression circuit having an input node and an output node, wherein the input node of the peak voltage suppression circuit is coupled to the power supply input node, wherein the peak voltage suppression circuit is configured to suppress the maximum value of the power supply voltage, wherein the peak voltage suppression circuit is configured to generate a suppressed voltage at the output node of the peak voltage suppression circuit, wherein the suppressed voltage has a maximum value below the maximum value of the power supply voltage; a voltage conversion circuit having an input node and an output node, wherein the input node of the voltage conversion circuit is coupled to the output node of the peak voltage suppression circuit, wherein a converted voltage is generated at the output node of the voltage conversion circuit, wherein, when the power supply voltage is at the minimum power supply voltage value, the converted voltage has a minimum converted voltage value higher than the minimum power supply voltage value; a sensing element coupled to receive a sensing element current or a sensing element voltage derived from the converted voltage, wherein a sensitivity of the sensing element is related to the value of the converted voltage.