Patent ID: 9269663
Filing Date: 2016-02-23
CPC Classification: H01L

Claim Text:
1. An integrated circuit, comprising: a first dielectric layer; a bottom plate of a high precision capacitor disposed over said dielectric layer; a second dielectric layer disposed over said bottom plate and said first dielectric layer, said second dielectric layer having a capacitor opening over said bottom plate, so that said bottom plate extends past said capacitor opening on all sides; a capacitor dielectric layer of said high precision capacitor disposed on said bottom plate in said capacitor opening and disposed on said second dielectric layer on sidewalls of said capacitor opening, extending to a top of said capacitor opening; a top plate of said high precision capacitor disposed on said capacitor dielectric layer, covering said capacitor dielectric layer on said sidewalls of said capacitor opening and covering said capacitor dielectric layer over said bottom plate in said capacitor opening; and a capacitor planarization layer disposed in said capacitor opening over said top plate, wherein a top surface of said capacitor planarization layer and a top edge of said top plate are substantially coplanar and said top plate does not extend laterally beyond said capacitor opening, and wherein the capacitor planarization layer comprises a dielectric material, wherein: said first dielectric layer is field oxide; and said bottom plate includes a layer of polysilicon and a layer of metal silicide on said layer of polysilicon.