Patent ID: 9461630
Filing Date: 2016-10-04
CPC Classification: H03K

Claim Text:
1. A circuit, comprising: a capacitor coupled between a charge node and a first reference node; a charging circuit operating to alternately charge and discharge the capacitor; a first inverter circuit having an input coupled to the capacitor and having an output, the first inverter circuit comprising a first transistor, second transistor, third transistor and fourth transistor having source-drain paths coupled in series between a first supply node and a second supply node, wherein the first and fourth transistors are diode-connected devices; a feedback loop coupling the output of the first inverter circuit to an input of the charging circuit; a first pull-up transistor operating responsive to a first logic state of a feedback signal in the feedback loop to selectively shunt across the first transistor of the first inverter circuit; and a first pull-down transistor operating responsive to a second logic state of the feedback signal to selectively shunt across the fourth transistor of the first inverter circuit.