Patent ID: 9276602
Filing Date: 2016-03-01
CPC Classification: H03M,H04L

Claim Text:
1. An apparatus for converting a discrete-time quantized signal into a continuous-time, continuously variable signal, comprising: an input line for accepting full-rate samples of an input signal that are discrete in time and in value, that are separated in time by a full-rate sampling period, and that represent a signal sampled at a full-rate sampling frequency corresponding to the full-rate sampling period; a parallel signal processor having an input coupled to said input line and having a plurality of sub-rate outputs, each sub-rate output providing a different subsampling phase of a complete signal that is output by said apparatus; a first multi-bit-to-variable-level signal converter which is coupled to a first sub-rate output of the parallel signal processor and which operates at a sampling rate that is less than or equal to the full-rate sampling frequency of said input signal; a second multi-bit-to-variable-level signal converter which is coupled to a second sub-rate output of the parallel signal processor and which operates at the sampling rate; and a signal combiner coupled to an output of each of said first and second multi-bit-to-variable-level signal converters, wherein the outputs of said first and second multi-bit-to-variable-level signal converters are combined by the signal combiner, as continuous-time signals at the sampling rate of said first and second sub-rate outputs, using at least one summing operation, wherein at least one delay operation has been applied to at least one of said first sub-rate output and said second sub-rate output prior to said at least one summing operation, and wherein said at least one delay operation and said at least one summing operation together produce a filter response with a lowpass cutoff frequency that is: less than or equal to the full-rate sampling frequency of the input signal, and greater than or equal to a maximum frequency component of said input signal.