Patent ID: 9379055
Filing Date: 2016-06-28
CPC Classification: A61F,H01L

Claim Text:
1. A method of manufacturing a semiconductor device comprising: forming a first interlayer insulating layer over a semiconductor substrate; making a plurality of wiring gutters in the first interlayer insulating layer and burying metal in the wiring gutters to form a plurality of wirings; etching back the first interlayer insulating layer using the wirings as a mask to form, between at least one pair of the wirings in the first interlayer insulating layer, a first trench having first side faces in contact with the wirings and a bottom face between the first side faces, wherein at least a portion of the first side faces is in direct contact with the wirings; anisotropically etching at least the bottom face of the first trench selectively to form a second trench in the first interlayer insulating layer; and forming a second interlayer insulating layer over the wirings and the first interlayer insulating layer and making an air gap between at least one pair of the wirings in the first interlayer insulating layer by infilling an upper portion of the second trench.