Patent ID: 9532467
Filing Date: 2016-12-27
CPC Classification: H05K,Y10T

Claim Text:
1. A circuit substrate, comprising: a base layer; a first patterned conductive layer disposed on the base layer and having a first pad; a dielectric layer disposed on the base layer and covering the first patterned conductive layer, wherein the dielectric layer has an opening exposing the first pad; a conductive block disposed in the opening and covering the first pad; a second patterned conductive layer disposed on a surface of the dielectric layer and having a second pad, wherein the second pad is connected to the conductive block in a form of one piece, the second patterned conductive layer further comprises a first wire and the second pad is connected to the first wire, and the second pad, the first wire and the conductive block are integrally formed; and an electroplating seed layer covering sidewalls of the conductive block and sidewalls of the second patterned conductive layer, wherein a maximum outer diameter of the second pad is substantially equal to a maximum outer diameter of the conductive block; wherein an outer diameter of the first pad is smaller than an outer diameter of the conductive block so that the first pad is covered by the conductive block.