Patent ID: 9466714
Filing Date: 2016-10-11
CPC Classification: H01L

Claim Text:
1. A tunneling field-effect transistor (TFET) device, comprising: a substrate; a protrusion structure disposed over the substrate; a gate stack disposed over the substrate, wherein the gate stack includes a planar portion and a gating surface, the planar portion is parallel to a top surface of the substrate, and the gating surface wraps around a middle portion of the protrusion structure; a source region disposed as a top portion of the protrusion structure; a drain region disposed over the substrate adjacent to the protrusion structure and extending to a bottom portion of the protrusion structure as a raised drain region; a source contact disposed on the source region; a plurality of gate contacts disposed on the planar portion of the gate stack, wherein the plurality of gate contacts includes at least four gate contacts; and a plurality of drain contacts disposed on the drain region, wherein the plurality of drain contacts includes at least four drain contacts, and wherein: the gate contacts are aligned on a first plurality of lines that intersect at a common point on the source region from a top view, and each of the first plurality of lines goes through at least two of the gate contacts; and the drain contacts are aligned on a second plurality of lines that intersect at the common point from the top view, and each of the second plurality of lines goes through at least two of the drain contacts.