Patent ID: 9483425
Filing Date: 2016-11-01
CPC Classification: G06F

Claim Text:
1. A memory comprising: a buffer that retains data; a bandwidth conversion unit which converts a bandwidth of an internal data bus that is used for data transfer between the bandwidth conversion unit and the buffer into a bandwidth wider than that of an external data bus that is used for data transfer between the bandwidth conversion unit and a memory controller; an access control unit that controls access to a memory cell using the buffer, during a wait time occurring in the internal data bus; a data conversion unit that mutually converts data that is serially transferred on the external data bus and data that is transferred in parallel on the internal data bus; wherein the memory controller serially transfers data to the data conversion unit; wherein the bandwidth conversion unit transfers data in parallel to buffer; and wherein the bandwidth of the internal data bus is different from the bandwidth of the external data bus.