Patent ID: 9515659
Filing Date: 2016-12-06
CPC Classification: G06F,G11C,H03K,Y02D

Claim Text:
1. An apparatus comprising: a processing system configured to generate first output signals directed to an external circuit, and further configured to receive first input signals; an input/output (I/O) pad communicatively coupled with the processing system and configured to establish, at least in part, a link with an external circuit; a programmable I/O circuit coupled between the I/O pad and the processing system, the programmable I/O circuit configured to generate a second output signal provided to the I/O pad, the programmable I/O circuit being further configured to provide the first input signal to the processing system; and a programmable reset circuit configured to generate a programmable reset signal provided to the I/O pad, the programmable reset signal being capable of resetting a component of the external circuit.