Patent ID: 9407636
Filing Date: 2016-08-02
CPC Classification: G06F,H04L

Claim Text:
1. A method comprising: reading a monotonic counter value in response to detecting a processor resume operation; generating a data structure including at least the monotonic counter value; generating a message authentication code (MAC) over the data structure using a first key; securely providing the data structure and the MAC to a module executed on the processor; the module verifying the MAC, comparing the monotonic counter value with a counter value stored during a previous suspend operation and, if the counter values match, then loading processor state required for the resume operation to complete; implementing a cryptographic protocol to establish a secure connection between the processor and an off-processor component, wherein the off-processor component comprises a chipset manageability engine (CSME); generating the first key by the processor; and transmitting the first key from the processor to the off-processor component over the secure connection.