Patent ID: 9262095
Filing Date: 2016-02-16
CPC Classification: G06F

Claim Text:
1. A storage system, comprising: a controller; and a plurality of storage devices associated with a logical unit; wherein the controller comprises: a plurality of host interfaces, one of said host interfaces being connected to a host computer; a plurality of disk interfaces, each connected to a respective one of the plurality of storage devices; a plurality of first processors, each associated with a respective one of the plurality of host interfaces and having an operating rate; a plurality of second processors, each connected to a respective one of the plurality of disk interfaces and having an operating rate; and a cache memory, wherein, upon receipt of a write request from the host computer at the one of the host interfaces, one of the first processors associated with the host interface is configured to perform either one of first or second write operations in accordance with the operating rate of the first processor, the first write operations comprising checking whether there is a cache hit or a cache miss, and if cache hit has occurred, writing data along with the write request to an allocated area in the cache memory, and if a cache miss has occurred, allocating an area in the cache memory and writing data into the allocated area, and sending a write completion notification to the host computer, the second write operations comprising requesting another one of the first processors to check whether there is a cache hit or a cache miss, and if cache hit has occurred, writing data along with the write request to an allocated area in the cache memory, and if cache miss has occurred, allocating an area in the cache memory and writing the data in the allocated area by the another one of the first processors, and if the another one of the first processors has completed the requested operations, sending a write completion notification to the host computer, wherein, if the operating rate of the first processor is less than or equal to a threshold, the one of the first processors associated the host interface is configured to perform the first write operations, and otherwise to perform the second write operations.