Patent ID: 9293304
Filing Date: 2016-03-22
CPC Classification: H01J,H01L

Claim Text:
1. A method of dicing a semiconductor wafer comprising a plurality of integrated circuits, the method comprising: introducing a substrate supported by a substrate carrier into a plasma etch chamber, the substrate having a patterned mask thereon covering integrated circuits and exposing streets of the substrate; clamping the substrate carrier below a shadow ring having a plasma thermal shield disposed thereon, wherein clamping the substrate carrier to the shadow ring comprises covering a tape frame and open tape region of the substrate carrier, and covering an outermost approximately 1-1.5 millimeters of the substrate supported by the substrate carrier; and plasma etching the substrate through the streets to singulate the integrated circuits, wherein the shadow ring and plasma thermal shield protect the substrate carrier from the plasma etching, and wherein the plasma thermal shield dissipates heat away from the shadow ring during the plasma etching, wherein dissipating heat away from the shadow ring during the plasma etching comprises providing a reduction of temperature approximately in a range of 100-120 degrees Celsius at the shadow ring relative to the plasma thermal shield.