Patent ID: 9450068
Filing Date: 2016-09-20
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a silicon carbide semiconductor device having a JFET, comprising: preparing a semiconductor substrate including a first conductivity type substrate that is made of silicon carbide, a drift layer of a first conductivity type that is formed on the first conductivity type substrate by epitaxial growth, a first gate region of a second conductivity type that is formed on the drift layer by epitaxial growth, a source region of the first conductivity type that is formed on the first gate region by epitaxial growth or ion implantation; forming a strip shaped trench having a longitudinal direction in one direction and penetrating through the source region and the first gate region to reach the drift layer; forming a channel layer of the first conductivity type on an inner wall of the trench by epitaxial growth; forming a second gate region of the second conductivity type on the channel layer; planarizing the channel layer and the second gate region to expose the source region; after the planarizing, conducting selective etching to remove at least the source region, the channel layer, and the second gate region on both leading ends of the trench, and forming a first recess deeper than a thickness of the source region on both the leading ends of the trench; after the forming the first recess, conducting an activation annealing process at a temperature of 1300° C. or higher in an inert gas atmosphere; removing a first conductivity type layer formed by the annealing process, the first conductivity type layer covering only a corner which is a boundary between a bottom and a side of the first recess; and wherein the first conductivity type layer is formed by silicon carbide growth due to nitrogen in the inert gas atmosphere.