Patent ID: 9368513
Filing Date: 2016-06-14
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a semiconductor material positioned above a substrate; a gate structure positioned above a surface of said semiconductor material, said gate structure covering a non-planar surface portion of said surface; a sidewall spacer positioned adjacent to said gate structure and comprising first dopants having one of an N-type and a P-type conductivity, wherein said sidewall spacer covers an entire sidewall surface of said gate structure and partially covers said surface of said semiconductor material; and source/drain extension regions comprising said first dopants and positioned within said non-planar surface portion and in alignment with said sidewall spacer, wherein a concentration of said first dopants within a portion of said sidewall spacer proximate said non-planar surface portion substantially corresponds to a concentration of said first dopants within said source/drain extension regions proximate said non-planar surface portion.