Patent ID: 9455675
Filing Date: 2016-09-27
CPC Classification: H03F,H03K

Claim Text:
1. An amplifier comprising: a biasing unit, configured to generate a bias current which is independent of the power supply, so as to increase power supply rejection ratio; an amplifying unit connected to the biasing unit and configured to receive an input voltage and generate an amplified voltage based on the biasing current; a Schmitt trigger connected to the amplifying unit and configured to generate and output a modified voltage; wherein the biasing unit comprises a first NMOS transistor, a second NMOS transistor, a third PMOS transistor, a current mirror, a first resistor; wherein a source of the first NMOS transistor is connected to a ground, a gate of the first NMOS transistor is connected to both the first resistor and a source of the second NMOS transistor, a drain of the first NMOS transistor is connected to both a gate of the second NMOS transistor and a first port of the current mirror; a drain of the second NMOS transistor is connected to a second port of the current mirror; a source of the third PMOS transistor is connected to a second voltage supply, and a drain of the third PMOS transistor is configured to output the biasing current.