Patent ID: 9368497
Filing Date: 2016-06-14
CPC Classification: H01L

Claim Text:
1. A method for fabricating fin-field effect transistors, comprising: providing a semiconductor substrate; forming a plurality of fins on a surface of the semiconductor substrate; forming dummy gates over side and top surfaces of the fins; forming a precursor material layer to cover the dummy gates and the semiconductor substrate; performing a thermal annealing process on the precursor material layer to convert the precursor material layer into a dielectric layer having a plurality of voids; planarizing the dielectric layer with the plurality of voids to expose top surfaces of the dummy gates; performing a post-treatment process using oxygen-contained de-ionized water onto the planarized dielectric layer to eliminate the plurality of voids formed in the dielectric layer; removing the dummy gates to form trenches in the dielectric layer without voids; and forming a high-K metal gate structure in each of the trenches.