Patent ID: 9490358
Filing Date: 2016-11-08
CPC Classification: H01L

Claim Text:
1. An electronic device comprising: a buried conductive region; a semiconductor layer having a primary surface and an opposing surface, wherein the buried conductive region is disposed closer to the opposing surface than to the primary surface; a horizontally-oriented doped region adjacent to the primary surface; a first vertical conductive region adjacent to the primary surface and extending through the semiconductor layer toward the buried conductive region, wherein the first vertical conductive region is electrically connected to the horizontally-oriented doped region and the buried conductive region; a first insulating layer overlying the horizontally oriented doped region; a conductive electrode overlying the first insulating layer and the horizontally-oriented doped region; and a gate electrode of a power transistor, wherein the gate electrode is spaced apart from and electrically isolated from the conductive electrode, wherein the first vertical conductive region does not underlie the conductive electrode.