Patent ID: 9231069
Filing Date: 2016-01-05
CPC Classification: H01L

Claim Text:
1. A method comprising: removing a dummy gate electrode layer to form a gate trench between a plurality of gate spacers over a substrate; forming a resistor trench over the substrate, wherein a bottom of the resistor trench is higher than a bottom of the gate trench; depositing a barrier layer on a bottom of the gate trench and a bottom of the resistor trench; depositing a first film on the bottom of the gate trench, the bottom of the resistor trench, sidewalls of the gate trench and sidewalls of the resistor trench; depositing a second film over the first film; depositing a gate electrode layer over the second film; and applying a chemical mechanical polish process to the gate electrode layer until the gate electrode layer is removed from the resistor trench.