Patent ID: 9514845
Filing Date: 2016-12-06
CPC Classification: G06F,G11C

Claim Text:
1. A system, comprising: a write processor configured to program a group of one or more solid state storage cells; a storage interface configured to, a predetermined amount of time after the group of solid state storage cells is programmed, read the group of solid state storage cells to obtain read data; an error correction decoder configured to perform error correction decoding on the read data; a check after write (CAW) tester configured to assess the group of solid state storage cells for wear related degradation based at least in part on the error correction decoding; and a background media scan (BGMS) tester configured to perform BGMS testing on the group of solid state storage cells, wherein in a first state: in a third state: the CAW tester is configured to test the group of solid state storage cells.