Patent ID: 9448743
Filing Date: 2016-09-20
CPC Classification: G06F,G11C

Claim Text:
1. An external memory coupled to a mass storage controller, the external memory comprising: a plurality of first tables, each first table containing first metadata relating to a first area of flash memory controlled by the mass storage controller; a plurality of second tables, each second table containing second metadata regarding a second area of flash memory controlled by the mass storage controller, each first area consisting of a subset of a second area, each second table further including a count for the number of portions of the second area which store invalid data and another count for the number of times a portion of the second area has been erased; a third table, distinct from the first tables and second tables, the third table containing physical flash memory addresses associated with logical host addresses, the physical flash memory addresses identifying one of a plurality of flash ports that are part of the mass storage controller, wherein each flash port is connected to a group of flash memory devices; and an interface to the mass storage controller, wherein the mass storage controller is configured to generate and store aggregated data in the external memory, the aggregated data including data stored in the plurality of first tables, the plurality of second tables, and the third table in the external memory.