Patent ID: 9318290
Filing Date: 2016-04-19
CPC Classification: H01H,H04L

Claim Text:
1. An apparatus comprising: a Vdd voltage rail; a Vdd0 voltage rail; a reference rail; and a plurality of MEM (Micro-Electro-Mechanical) switch pairs, each pair comprising a first MEM switch and a second MEM switch, each first and second MEM switches in each pair comprising a first source/drain, a second source/drain, a gate, and a body; wherein all first MEM switches in the plurality of pairs are logically connected; wherein for each pair, the first source/drain of the first MEM switch is connected to the first source/drain of the second MEM switch; wherein the second source/drain of each second MEM switch is connected to the reference rail; wherein for a first subset of the pairs, the body of each first MEM switch in the first subset is connected to the reference rail and the body of each second MEM switch in the first subset is connected to the Vdd0 voltage rail; wherein a first pair in the plurality of pairs has the second source/drain of its first MEM switch connected to the Vdd voltage rail; and a MEMS (Micro-Electro-Mechanical System) buffer having an input port connected to a source/drain of the second MEM switch in a last pair of the plurality of pairs.