Patent ID: 9466369
Filing Date: 2016-10-11
CPC Classification: G11C

Claim Text:
1. An apparatus, comprising: a set of word lines; a string comprising a set of data memory cells extending from a group of one or more source-side data memory cells at a source-side of the string to a drain-side data memory cell at a drain-side of the string, wherein the string is among a plurality of strings of memory cells; and a control circuit, the control circuit, to perform a program loop for a selected data memory cell in the set of data memory cells in the string, where the selected data memory cell is connected to a selected word line in the set of word lines, is configured to provide one increase and then another increase in a voltage of the selected word line, wherein at least one of a rate or a duration of the one increase is lower when the selected data memory cell is among the group of one or more source-side data memory cells in the string than when the selected data memory cell is not among the group of one or more source-side data memory cells in the string.