Patent ID: 9231880
Filing Date: 2016-01-05
CPC Classification: H04B,H04L,H04W

Claim Text:
1. A method of controlling a stall avoidance in a reordering buffer of a communication device using at least one timer comprising: (a) receiving a plurality of data blocks by the reordering buffer of a MAC-hs sub-layer of a medium access control (MAC) layer; (b) placing each data block in the reordering buffer at a place indicated by each transmission sequence number (TSN) of each data block; (c) starting the at least one timer when a new data block is correctly received and a TSN of the new data block is higher than a next expected TSN if the at least one timer is not active, (d) delivering to a higher entity all correctly received data blocks up to and including (the TSN of the new data block−1) and all correctly received data blocks up to a next not received data block when the at least one timer expires; and (e) starting the at least one timer for a data block having a highest TSN among those of data blocks that cannot be delivered to the higher entity.