Patent ID: 9515078
Filing Date: 2016-12-06
CPC Classification: H01L

Claim Text:
1. A method for forming a semiconductor structure, comprising: providing a semiconductor substrate; forming a first stop layer on the semiconductor substrate, a first sacrificial layer on the first stop layer, a second stop layer on the first sacrificial layer, and a second sacrificial layer on the second stop layer; forming a surface-covering layer on the second sacrificial layer, wherein the surface-covering layer is made of a material layer including silicon oxide, and has a thickness ranging from about 30 Å to about 100 Å; etching the second sacrificial layer, the second stop layer, the first sacrificial layer, the first stop layer, and the semiconductor substrate, to form a groove; filling an insulating dielectric material in the groove to form an isolation structure, a top surface of the isolation structure being leveled with a surface of the second sacrificial layer; removing the second sacrificial layer, to expose sidewalls and a top of an exposed portion of the isolation structure; removing the second stop layer and etching the exposed portion of the isolation structure, to reduce a width of the top of the exposed portion of the isolation structure; removing the first sacrificial layer; and forming a floating gate on the first stop layer.