Patent ID: 9338036
Filing Date: 2016-05-10
CPC Classification: H01L,H04L

Claim Text:
1. A transmitter circuit, comprising: a precharge with capacitor sub-circuit that includes a first capacitor configured to be precharged to a substantially constant Vdd supply voltage during a positive phase of a clock and a second capacitor configured to be precharged to the substantially constant Vdd supply voltage during a negative phase of the clock, wherein the first capacitor is configured as a first flying capacitor and the second capacitor is configured as a second flying capacitor; and a discharge and multiplexer sub-circuit that is configured to couple the first capacitor to a first signaling line of a differential signaling pair that includes the first signaling line and a second signaling line during the negative phase of the clock to drive the first signaling line and is configured to couple the second capacitor to the first signaling line of the differential signaling pair during the positive phase of the clock to drive the first signaling line, wherein the second signaling line is a negative signaling line and the discharge and multiplexor sub-circuit is further configured to transfer charge from the first flying capacitor and generate a current into the second signaling line to drive the second signaling line high when a data signal is low during the negative phase of the clock.