Patent ID: 9322858
Filing Date: 2016-04-26
CPC Classification: G01R,H03D,H03F,H04B

Claim Text:
1. A method of detecting a phase difference between a first signal and a second signal, the method comprising: latching, using a first gated latch circuit, a state of the first signal using the second signal as a clock to produce a first latched signal, wherein the first gated latch circuit is transparent when the second signal is asserted, and the first gated latch circuit stores a value of the first signal when the second signal is not asserted; latching, using a second gated latch circuit, a state of the second signal using the first signal as a clock to produce a second latched signal, wherein the second gated latch circuit is transparent when the first signal is asserted, and the second gated latch circuit stores a value of the second signal when the first signal is not asserted; and summing the first latched signal and the second latched signal to produce an indication of whether the first signal is leading or lagging the second signal.