Patent ID: 9520328
Filing Date: 2016-12-13
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor device comprising: forming a first semiconductor layer directly on a silicon substrate, the first semiconductor layer having a first region adjacent to an interface between the first semiconductor layer and the silicon substrate and a second region adjacent to the first region, the first region including a first concentration of defects and the second region including a second concentration of defects; forming a second semiconductor layer directly on the first semiconductor layer; forming an insulating trench in the second semiconductor layer defining a first portion of the second semiconductor layer electrically insulated from a second portion of the second semiconductor layer; removing the second portion of the second semiconductor layer; and forming a third semiconductor layer directly on the first semiconductor layer and adjacent to the insulating trench such that the first portion of second semiconductor layer is electrically insulated from the third semiconductor layer; wherein the first semiconductor layer and the third semiconductor layer are each a type III-V semiconductor and the second semiconductor layer is a type IV semiconductor, and wherein the second concentration of defects is less than the first concentration of defects.