Patent ID: 9324827
Filing Date: 2016-04-26
CPC Classification: H01L

Claim Text:
1. A method, comprising: providing a starting non-planar semiconductor structure, the structure comprising a bulk semiconductor substrate of a first type and a plurality of fins etched from the bulk semiconductor substrate with bottom portions thereof surrounded by isolation material over the substrate; creating at least one first well of a second type opposite the first type directly under one or more groups of at least two of the plurality of fins, creating the at least one first well also making the one or more groups of at least two fins the second type; removing a top portion of the isolation material, exposing a top portion of the plurality of fins; creating a conformal layer of silicide on the exposed portion of the plurality of fins; and creating one or more contacts common to each group of at least two fins over the conformal layer of silicide, wherein at least one group of at least two fins comprises a Schottky diode and at least one other group of at least two fins comprises a FinFET.