Patent ID: 9467120
Filing Date: 2016-10-11
CPC Classification: G06F,H03K,H03L,H04L,Y02D

Claim Text:
1. An integrated circuit comprising: a dynamic clock trunk tree associated with a transceiver module, wherein the dynamic clock trunk tree is controlled by a trunk driver, said trunk driver comprising a first clock tree gate, and wherein the first clock tree gate receives a first clock signal and outputs a second signal, wherein the second clock signal represents a gated or ungated form of the first clock signal; and a dynamic clock leaf tree associated with a PCI Express (PCIe) device coupled with the transceiver module, wherein the dynamic clock leaf tree is controlled by a leaf driver, said leaf driver comprising a second clock tree gate, wherein the second clock tree gate receives the second clock signal and outputs a third clock signal, wherein the third clock signal represents a gated or ungated form of the second clock signal, and wherein the leaf driver controls the dynamic clock leaf tree based at least in part on the second clock signal.