Patent ID: 9379028
Filing Date: 2016-06-28
CPC Classification: H01L

Claim Text:
1. A semiconductor structure comprising: a buried floating conductive material portion embedded in a substrate, wherein said buried floating conductive material portion has a constant thickness expanding an entire length thereof; a first buried insulator layer contacting a bottom surface of said buried floating conductive material portion; a second buried insulator layer contacting a top surface of said buried floating conductive material portion, wherein said second buried insulator layer has sidewall surfaces that are vertically coincident with sidewall surfaces of said buried floating conductive material portion, wherein said second buried insulator layer does not contact said first buried insulator layer, and wherein said buried floating conductive material portion is located between said first buried insulator layer and said second buried insulator layer; a top semiconductor layer contacting a top surface of said second buried insulator layer and including a source region and a drain region of a p-type injector field effect transistor and source and drain regions of at least one field effect transistor; and a switchable voltage supply system configured to provide a voltage differential across said drain region and said source region of said p-type injector field effect transistor, wherein said p-type injector field effect transistor is configured to generate hot electrons having sufficient energy to pass through said second buried insulator layer and to flow into said buried floating conductive material portion and to extract electrons from the said buried floating conductive material portion by tunneling the electrons through said second buried insulator layer into said p-type injector field effect transistor.