Patent ID: 9356144
Filing Date: 2016-05-31
CPC Classification: H01L

Claim Text:
1. A semiconductor die comprising: a plurality of field effect transistor (FET) elements, such that each of the plurality of FET elements has gate oxide, a gate connection node, which is electrically coupled to a first side of the gate oxide, and a first connection node, which is electrically coupled to a second side of the gate oxide opposite the first side through one of a source connection node or a drain connection node; a gate oxide protection circuit coupled between a first gate oxide protection node and a second gate oxide protection node, the gate oxide protection circuit comprising at least one diode element; a first plurality of resistive elements coupled between the gate connection node of each one of the plurality of FET elements and the first gate oxide protection node; a second plurality of resistive elements coupled between the first connection node of each one of the plurality of FET elements and the second gate oxide protection node; a first common resistive element coupled between the first gate oxide protection node and the first plurality of resistive elements; and a second common resistive element coupled between the second gate oxide protection node and the second plurality of resistive elements, wherein the gate oxide protection circuit is configured to protect the gate oxide of each of the plurality of FET elements by limiting a voltage between the gate connection node and the first connection node of each of the plurality of FET elements.