Patent ID: 9425216
Filing Date: 2016-08-23
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a thin film transistor substrate, the method comprising: a first mask process for forming a gate element with a gate metal material on a substrate; a second mask process for forming a source area, a drain area, a channel layer, a pixel electrode and a data element by sequentially depositing a gate insulating layer, an oxide semiconductor material, an etch stopper material and a data metal material on the gate element and patterning; a third mask process for exposing some portions of the source area and the data element by depositing a passivation layer on the substrate having the data element and patterning; and a fourth mask process for forming a source electrode connecting the source area to the data element and a common electrode overlapping with the pixel electrode having the passivation layer there-between by depositing a transparent conductive material on the passivation layer and patterning, wherein the second mask process further comprises: forming an etch stopper overlapping with a middle portion of a gate electrode, a data line crossing a gate line, and a semiconductor layer expanding from under the data line through under the etch stopper to the pixel region, by patterning the oxide semiconductor material, the etch stopper material, and the data metal material with a half-tone mask; and forming the source area, the drain area, and the pixel electrode by selective plasma treatment of the oxide semiconductor material extended from the channel layer using the data element and the etch stopper as a mask.