Patent ID: 9293482
Filing Date: 2016-03-22
CPC Classification: H01L

Claim Text:
1. A thin-film transistor (TFT) array substrate comprising: a first TFT comprising a first active layer, a first gate electrode, a first source electrode, and a first drain electrode; a first conductive layer disposed in a same layer as one of the first active layer, the first gate electrode, the first source electrode, and the first drain electrode; a second conductive layer disposed in a different layer from the first conductive layer; a node contact hole including a first contact hole part which exposes the first conductive layer, a second contact hole part which exposes the second conductive layer, and a connection hole part which connects the first contact hole part and the second contact hole part and has a width that is smaller than a width of the first contact hole part and a width of the second contact hole part; and a connection node formed in the node contact hole to electrically connect the first conductive layer and the second conductive layer.