Patent ID: 9467722
Filing Date: 2016-10-11
CPC Classification: H03L,H04J,H04N

Claim Text:
1. A slave station apparatus comprising: a phase-locked loop comprising a filter, a configurable oscillator; and a first stage frequency divider; a second stage frequency divider; a counter; and circuitry configured to: detect a master clock signal of frequency F produce, using the second stage frequency divider, a slave periodic signal, wherein said slave periodic signal is in phase with the master clock signal and the slave periodic signal is of frequency F generate a slave clock signal identical to the master clock signal; detect the slave clock signal produced by the second stage frequency divider; detect, using the phase-locked loop, the slave periodic signal; generate, using the configurable oscillator, a clock signal having a frequency F that is in phase with the slave periodic signal detect, using the first stage frequency divider, the clock signal having the frequency F that is in phase with the slave periodic signal; produce, using the first stage frequency divider, a local periodic signal of frequency F/q where q is an integer; detect, using the counter, the clock signal having the frequency F that is in phase with the slave periodic signal; send, via a decoder, a video synchronization signal; initialize, using the counter, the video synchronization signal based at least partially on a first stage initialization signal in phase with the slave periodic signal; compare the local periodic signal and the slave periodic signal using the phase locked loop so as to produce a comparison result; detect the comparison result with the filter; and generate, using the filter, a filtered result and send the filtered result to the configurable oscillator, the first stage initialization signal being the local periodic signal.