Patent ID: 9430596
Filing Date: 2016-08-30
CPC Classification: G06F

Claim Text:
1. A computer system for simulating a machine design, the machine design comprising a plurality of functional design elements represented by inputs and outputs and functions describing relationships between input and output states, the computer system comprising: a control-flow-type processor configured to execute verification instructions specifying test bench inputs of the machine design with which to simulate the machine design; a data-flow-type processor configured to execute a plurality of design element simulation instructions that specify functional relationships between input and output states of design elements of the machine design, wherein the data-flow processor comprises: an instruction memory coupled to the instruction cache memory of the data flow processor by a corresponding first memory controller through the prefetch unit for receiving the design element instructions; a first events data memory coupled to the first events cache memory by a second corresponding memory controller through the prefetch unit; a second events data memory coupled to the second events cache memory of the data flow processor by a third corresponding memory controller through the prefetch unit; and a run time events insertion and control unit coupled to the data-flow-type processor and the control-flow-type processor, the instruction memory, and the first and second events data memories; and a communications interface coupled to the control-flow-type processor and the data-flow-type processor and configured for coordinating parallel execution by the control-flow-type and data-flow-type processors of verification instructions and design element simulation instructions, respectively.