Patent ID: 9406777
Filing Date: 2016-08-02
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a transistor device comprising a channel layer, said method comprising: providing a substrate; epitaxially growing a strained layer on said substrate; epitaxially growing said channel layer on said epitaxially grown strained layer; providing a first gate structure on said channel layer; selectively etching into said channel layer and at least partially in said epitaxially grown strained layer, thereby using said first gate structure as a mask, and thereby creating a protrusion extending from said substrate, said protrusion comprising a portion of said channel layer and at least an upper portion of said epitaxially grown strained layer, allowing elastic relaxation in said portions; epitaxially growing source and drain structures directly adjacent to said protrusion and at opposed sides of the protrusion; and after epitaxially growing said source and drain structures directly adjacent to said protrusion, replacing said first gate structure by a second gate structure.