Patent ID: 9385228
Filing Date: 2016-07-05
CPC Classification: H01L

Claim Text:
1. A method of manufacturing a semiconductor device, the method comprising: forming a semiconductor mesa in a semiconductor layer between a first cell trench structure and a second cell trench structure extending from a first surface into the semiconductor layer, wherein the first cell trench structure includes a first buried electrode and a first insulator layer between the first buried electrode and the semiconductor layer; forming an opening in a capping layer formed on the first surface, wherein the opening exposes at least a portion of the semiconductor mesa and a first vertical section of the first insulator layer between the first buried electrode and the semiconductor mesa; introducing, through the opening, impurities of a first conductivity type into the exposed portion of the semiconductor mesa; and forming a recess defined by the opening, wherein the recess is formed by removing an exposed section of the first insulator layer between the semiconductor mesa and the first buried electrode, and by using the patterned capping layer as an etch mask.