Patent ID: 9257532
Filing Date: 2016-02-09
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a semiconductor device, comprising: providing a semiconductor substrate having a trench with a sidewall isolation; removing the sidewall isolation in a portion of the trench; forming a gate dielectric on the laid open sidewall in the portion of the trench; forming a gate electrode adjacent to the gate dielectric, an upper surface of the gate electrode being located at a depth dl below the surface of the semiconductor substrate such that the gate dielectric is exposed in an upper portion of the trench, wherein the gate electrode comprises doped polysilicon; performing an implantation after the formation of the gate electrode to provide the upper surface of the gate electrode with a higher doping concentration; removing, subsequent to forming the gate electrode and subsequent to performing the implantation, the gate dielectric above the gate electrode; and forming, subsequent to removing the gate dielectric, an isolation simultaneously on the gate electrode and the semiconductor substrate such that an absolute value of height difference d