Patent ID: 9324909
Filing Date: 2016-04-26
CPC Classification: H01L

Claim Text:
1. A method for fabricating a light emitting diode, comprising the steps of: providing a substrate comprising a first area and a second area; forming, by an epitaxial growth process, a cushion layer, a first-type semiconductor layer, a light emitting layer and a second-type semiconductor layer sequentially on the substrate; defining, by a photolithography and an etching processes, the first-type semiconductor layer, the light emitting layer and the second-type semiconductor layer for exposing the first-type semiconductor layer in the first area, and forming a platform having the first-type semiconductor layer, the light emitting layer and the second-type semiconductor layer in a position other than the first area; forming a plurality of nano-scale masks spaced regularly on the platform; forming a cross-sectional trapezoid hard mask on the platform to cover the nano-scale masks where a light emitting diode stacked structure to be formed; removing, by an anisotropic etching process, the platform without covered by the cross-sectional trapezoid hard mask and the nano-scale masks, and forming the light emitting diode stacked structure having a trapezoid sidewall and nano columns, wherein the trapezoid sidewall has an inclined surface, a portion of the nano columns extends from the inclined surface in regular arrangement, and the first-type semiconductor layer is as an etching endpoint; removing the cross-sectional trapezoid hard mask and the nano-scale masks; forming a transparent conductive layer on the second-type semiconductor layer of the light emitting diode stacked structure having a trapezoid sidewall; forming a first contact pad on the first portion of the first-type semiconductor layer in the first area; and forming a second contact pad on the transparent conductive layer.