Patent ID: 9450074
Filing Date: 2016-09-20
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a substrate comprising a bulk substrate of a second conductivity type and having a source region of a first conductivity type and a drain region of the first conductivity type formed proximate to a surface of the substrate, a gate, having a gate length ranging from 5 micrometers to 20 micrometers, positioned over the surface of the substrate and between the source region and the drain region; an epitaxial region of the first conductivity type having a doping profile ranging from 3e14/cm a well region of the second conductivity type disposed within the epitaxial region, wherein the source region is disposed within the well region; a local oxidation of silicon (LOCOS) region formed between the source region and the drain region; an extended drain region of the first conductivity type having the drain region formed therein, the extended drain region at least partially extending below the LOCOS region and has a doping profile ranging from 1e15/cm a field plate, having a field plate length in a range from 5 micrometers to 50 micrometers, at least partially positioned over and connected to the gate, wherein the gate and the field plate at least partially extend over the LOCOS region and the field plate is configured to shape the electrical field occurring under the LOCOS region and between the source region and the drain region, a plurality of source contacts electrically connected to the source region and comprising, in a plan view, a first row of source contacts positioned along and near one side of the gate and a second row of source contacts positioned along and near another side of the gate, a plurality of drain contacts electrically connected to the drain region, the plurality of drain contacts comprising, in a plan view, a first row of drain contacts and a second row of drain contacts, each drain contact of the first row of drain contacts having a corresponding drain contact of the second row of drain contacts immediately adjacent thereto; a plurality of gate contacts electrically connected to the gate and comprising, in a plan view, one row of gate contacts disposed near one side of the gate and another row of gate contacts disposed near another side of the gate, wherein the rows of the plurality of source contacts, the rows of the plurality of drain contacts, and the rows of the plurality of gate contacts are arranged parallel to each other in a plan view.