Patent ID: 9379144
Filing Date: 2016-06-28
CPC Classification: G09G,H01L

Claim Text:
1. A display apparatus comprising: a laminated structure formed on a substrate, the laminated structure including a silicon layer, a lower layer, an intermediate layer and an upper layer, wherein the intermediate layer is connected to a first conductive member via a first contact hole, a first portion of the silicon layer being the first conductive member; a second conductive member is connected to the intermediate layer via a second contact hole, the second contact hole at least partially overlapping the first contact hole in a plan view of a display panel, and a portion of the upper layer being the second conductive member; a second portion of the silicon layer corresponds to a first electrode of an accumulating capacitor, the accumulating being capacitor configured to store a voltage corresponding to an image signal; a third portion of the silicon layer corresponds to a first electrode of an additional capacitor, the additional capacitor being connected to the accumulating capacitor, a portion of the lower layer corresponds to a gate electrode of a sampling transistor, the sampling transistor being configured to sample the image signal, and wherein a second electrode of the additional capacitor is another portion of the lower layer, a different portion of the lower layer being a second electrode of the accumulating capacitor.