Patent ID: 9343547
Filing Date: 2016-05-17
CPC Classification: H01L

Claim Text:
1. A method for fabricating a recessed channel access transistor device, comprising: providing a semiconductor substrate having a trench extending from a main surface of the semiconductor substrate to a predetermined depth; forming a gate oxide layer on interior surfaces of the trench; forming a buried gate electrode at a lower portion of the trench; capping the buried gate electrode with a dielectric layer; forming a pad layer and a hard mask layer on the main surface of the semiconductor substrate; etching a recess through the pad layer and hard mask layer and into the semiconductor substrate on only one side of the trench, wherein a portion of the dielectric layer is revealed within the recess; removing the hard mask layer; and after removing the hard mask layer, performing an ion implantation process to implant dopants on both sides of the trench so as to form a source doping region and a drain doping region in the semiconductor substrate, wherein the source doping region has a junction depth that is deeper than that of the drain doping region.