Patent ID: 9345124
Filing Date: 2016-05-17
CPC Classification: H01L,H05K

Claim Text:
1. A chip structure, disposed on a printed circuit board provided with an element layer and a copper grounding layer, comprising: a chip body disposed on the element layer and having a plurality of power pins; a power line disposed on the element layer for supplying electric power to the chip body; a plurality of power input lines, each of which has a body disposed on the copper grounding layer, wherein two ends of the power input line are disposed on the element layer, and the body of the power input line is connected with the two ends thereof through corresponding through holes of the printed circuit board; a plurality of bypass capacitors, each of which has one end connected with the power pins of the chip body through the element layer and the other end connected with the power line through the power input line; and a heat dissipation unit disposed on a back surface of the chip body, wherein the heat dissipation unit is an exposed copper structure disposed on the back surface of the chip body, and a portion of the copper grounding layer is excavated from the back surface of the chip body for providing the exposed copper structure; wherein the body of the power input line is connected with one end of the power input line through a first through hole of the printed circuit board, and the body of the power input line is connect with the other end of the power input line through a second through hole of the printed circuit board; the end of the power input line is connected with the bypass capacitors, and the other end of the power input line is connected with the power line.