Patent ID: 9230865
Filing Date: 2016-01-05
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a semiconductor device, comprising the steps of: forming a cap insulating layer serving as a first gate insulating film and a second gate insulating film, over a first wiring layer having a first wiring formed therein as each of a first gate electrode and a second gate electrode in contact with the first gate electrode and the second gate electrode; forming a first laminated structure of a first oxide semiconductor layer of a first conductive type and a first hard mask layer, over the first gate electrode via the cap insulating layer; forming an insulating film to cover the first laminated structure and the cap insulating layer; forming a first sidewall film to cover a side of the first oxide semiconductor layer by etching back the insulating film; forming a second laminated structure of a second oxide semiconductor layer of a second conductive type other than the first conductive type and a second hard mask layer, over the second gate electrode via the cap insulating layer; forming an interlayer insulating layer to cover the first laminated structure and the second laminated structure; and forming source/drain electrodes coupled to the first oxide semiconductor layer and the second oxide semiconductor layer via the interlayer insulating layer, the first hard mask, and the second hard mask.