Patent ID: 9286714
Filing Date: 2016-03-15
CPC Classification: G06T

Claim Text:
1. An apparatus for processing graphics primitives for display, comprising: primitive setup circuitry configured to determine a plurality of functions for an input graphics primitive, including an edge function associated with each edge of the input graphics primitive and a depth function associated with the input graphics primitive; rasterization circuitry configured to perform a rasterization operation using the edge function associated with each edge of the input graphics primitive in order to calculate position data for a plurality of graphics fragments to be used to represent the input graphics primitive; depth bound clipping circuitry configured in a default mode of operation to perform a depth bound clipping operation by determining, for each graphics fragment in said plurality of graphics fragments, a depth value for said graphics fragment using the depth function, and determining whether said depth value resides within a valid depth range of a view frustum, the graphics fragment being discarded from further processing if its depth value does not reside within said valid depth range; and control circuitry configured to be responsive to detection of a predetermined condition to modify the operation of the primitive setup circuitry and the rasterization circuitry for one or more input graphics primitives in order to incorporate depth bound clipping within the rasterization operation performed by the rasterization circuitry for said one or more input graphics primitives, the control circuitry further being configured on detection of said predetermined condition to disable the default mode of operation in order to disable the depth bound clipping circuitry from performing said depth bound clipping operation; wherein: the control circuitry is configured to modify the operation of the primitive setup circuitry by causing the primitive setup circuitry to additionally determine at least one depth plane edge function for the input graphics primitive; and the control circuitry is configured to modify the operation of the rasterization circuitry by causing the rasterization circuitry to incorporate said at least one depth plane edge function in said rasterization operation.