Patent ID: 9337090
Filing Date: 2016-05-10
CPC Classification: B23D,H01L

Claim Text:
1. A method for making a semiconductor device, said method comprising: forming a first insulating layer above a semiconductor substrate; forming a first patterned metal layer at a surface of the first insulating layer, said first patterned metal layer comprising a first metal wiring pattern and first dummy metal patterns; forming a second insulating layer above the semiconductor substrate; and forming a second patterned metal layer at a surface of the second insulating layer, said second patterned metal layer comprising a second metal wiring pattern, wherein the first dummy metal patterns are electrically connected with neither the first metal wiring pattern nor the second metal wiring pattern, and wherein at least one of said first dummy metal patterns overlaps the second metal wiring pattern, and at least another one of said first dummy metal patterns is non-overlapping with the second metal wiring pattern.