Patent ID: 9501419
Filing Date: 2016-11-22
CPC Classification: G06F

Claim Text:
1. A method comprising: receiving, at a memory controller in a storage system coupled to a host device via an interface, a memory access request, wherein the memory access request comprises a memory block identifier that identifies a memory block; determining, at the memory controller, that data associated with the memory access request should be stored in one of memory blocks in the cache and that each of the memory blocks in the cache is already occupied with valid data; selecting, by the memory controller, one of the memory blocks; determining a first transaction count associated with the selected memory block, wherein the first transaction count is indicative of a time instance at which the selected memory block was accessed; and when the first transaction count satisfies a predetermined criterion, causing, by the memory controller, the selected memory block to store the data, and when the first transaction count does not satisfy the predetermined criterion, selecting, by the memory controller, another one of the memory blocks until the memory controller selects a memory block whose transaction count satisfies the predetermined criterion and maintaining a transaction count list having at least one entry, wherein the at least one entry is indicative of a number of memory blocks having a transaction count that is within a preconfigured range; and determining a transaction count threshold based on the number of memory blocks having a transaction count that is within the preconfigured range.