Patent ID: 9437439
Filing Date: 2016-09-06
CPC Classification: B24B,H01L

Claim Text:
1. A device wafer processing method for reducing the thickness of a device wafer to a predetermined thickness, said device wafer having a chamfered portion along the outer circumference thereof, said wafer processing method comprising: a stacked wafer forming step of attaching a support substrate to a front side of said device wafer to thereby form a stacked wafer followed by; a chamfered portion removing step of positioning a single cutting blade that is thinner in width than the device wafer, the single cutting blade having a rotation axis parallel to the stacking direction of said stacked wafer formed by said stacked wafer forming step so that the outer circumference of said single cutting blade faces said chamfered portion of said device wafer, and then making said single cutting blade cut into said device wafer without cutting into or damaging the support substrate from the outer circumference toward the center thereof to thereby remove said chamfered portion to at least said predetermined thickness from the front side of said device wafer; followed by thickness reducing step of grinding a back side of said device wafer constituting said stacked wafer after performing said chamfered portion removing step to thereby reduce the thickness of said device wafer to said predetermined thickness; followed by a separation step of removing said support substrate from said device wafer.