Patent ID: 9257419
Filing Date: 2016-02-09
CPC Classification: H01L,H05K,Y10T

Claim Text:
1. A method for fabricating a System-In-Package, comprising: providing a first package comprising a first leadframe embedded within a first molded package body, the first leadframe having a first leadframe lead exposed through a first sidewall of the first molded package body; bonding the first package to a second package in a stacked configuration, the second package comprising a second leadframe embedded within a second molded package body, the second leadframe having a second leadframe lead exposed through a second sidewall of the second molded package body; mounting a Surface Mount Device (SMD) to the first and second sidewalls such that a first terminal of the SMD is in ohmic contact with the first leadframe lead and a second terminal of the SMD is in ohmic contact with the second leadframe lead; wherein the SMD is selected from the group consisting of a discrete two terminal resistor providing a known resistance between the first and second leadframe leads, a discrete two terminal capacitor providing a known capacitance between the first and second leadframe leads, and a discrete two terminal inductor providing a known inductance between the first and second leadframe leads.