Patent ID: 9419096
Filing Date: 2016-08-16
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a semiconductor device, comprising, in this order: a first step of forming a dummy gate electrode over a silicon substrate and a sidewall that flanks the dummy gate electrode; a second step of forming a recess region by removing a portion of the silicon substrate by recess etching in which the dummy gate electrode and the side wall are used as a mask; a third step of epitaxially growing, on a surface of the recess region, a mixed crystal layer that is composed of silicon and an atom different from silicon in a lattice constant, such that the mixed crystal layer extends under the sidewall; a fourth step of forming a shallow-junction region between the mixed crystal layer and a channel region under the dummy gate electrode; a fifth step of forming an insulating film over the mixed crystal layer and the dummy gate electrode, and then removing a portion of the insulating film and exposing a surface of the dummy gate electrode; and a sixth step of replacing the dummy gate electrode with a gate electrode.