Patent ID: 9417959
Filing Date: 2016-08-16
CPC Classification: G06F

Claim Text:
1. A flash device, comprising: a flash memory, comprising a plurality of pages; and a controller coupled to the flash memory, comprising: an operating unit, receiving a plurality of bytes of the page which are from the flash memory and corresponding to a read command, and obtaining an operation result according to a logic level of each bit of each of the bytes; an error correction code decoder, decoding the bytes of the page according to an error correction code; and a processing unit coupled to the operating unit and the error correction code decoder, determining whether the page is valid data according to the decoded bytes, and determining whether the page is an empty page according to the operation result after determining that the page is not the valid data, wherein when the operation result indicates that the logic level of at least one bit of the bytes is a low logic level, the processing unit re-provides the read command to the flash memory.