Patent ID: 9479155
Filing Date: 2016-10-25
CPC Classification: H03F,H03K

Claim Text:
1. A buffer circuit, said buffer circuit comprising: a first supply node configured to connect to a power supply; a second supply node; a first switch connected between said first supply node and said second supply node; a transconductance stage comprising an input terminal, an output terminal and a reference terminal, a resistive load connected between said output terminal of said transconductance stage and said second supply node; a first switchable current source connected between said reference terminal of said transconductance stage and ground; a bipolar transistor comprising a base, an emitter, and a collector, said collector of said bipolar transistor being connected to said second supply node, said base of said bipolar transistor connected to said output terminal of said transconductance stage; a second switchable current source connected between said emitter of said bipolar transistor and ground; a second switch connected between said base of said bipolar transistor and said emitter of said bipolar transistor, said buffer circuit being arranged to so as to be switched from a switch-off mode to a switch-on mode and back, whereby in said switch-on mode said first and second switchable current sources are switched on, and said first switch is switched on and said second switch switched off, and whereby in said switch-off mode said first and second switchable current sources are switched off, and said first switch is switched off and said second switch switched on, so as to connect said base and said emitter of said bipolar transistor.