Patent ID: 9256537
Filing Date: 2016-02-09
CPC Classification: G06F

Claim Text:
1. A coherent attached processor proxy (CAPP), comprising: transport logic having a first interface configured to support communication with a system fabric of a primary coherent system and a second interface configured to support communication with an attached processor (AP) that is external to the primary coherent system and that includes a cache memory that holds copies of memory blocks belonging to a coherent address space of the primary coherent system; operation handling logic including: wherein the operation handling logic, responsive to receiving a memory access request from the attached processor (AP), performs a first determination of a coherence state for the target address with respect to the CAPP and allocates a master machine among the one or more master machines to service the memory access request in accordance with the first determination; and wherein during allocation of the master machine to service the memory access request, a snoop machine among the one or more snoop machines causes an update to the coherence state for the target address with respect to the CAPP, the operation handling logic performs a second determination of the coherence state for the target address with respect to the CAPP, and the master machine services the memory access request in accordance with the second determination.