Patent ID: 9264267
Filing Date: 2016-02-16
CPC Classification: B01D,C07C,C08G,H04L

Claim Text:
1. A station management entity comprising: a processor; and a memory having stored therein a plurality of instructions that, when executed by the processor, cause the processor to: read, over a management data input/output (MDIO) bus established between the station management entity and a plurality of communication devices, a pre-cursor local value from a pre-cursor local setting register bank of a first transmitter equalization register of a first communication lane interface of a first communication device; read, over the MDIO bus, a post-cursor local value from a post-cursor local setting register bank of the first transmitter equalization register of the first communication lane interface of the first communication device; write, over the MDIO bus, the pre-cursor local value to a pre-cursor remote setting register bank of a first transmitter equalization register of a first communication lane interface of a second communication device; write, over the MDIO bus, the post-cursor local value to a post-cursor remote setting register bank of the first transmitter equalization register of the first communication lane interface of the second communication device; read, over the MDIO bus, a pre-cursor requested value from a pre-cursor request setting register bank of the first transmitter equalization register of the first communication lane interface of the second communication device; read, and over the MDIO bus, a post-cursor requested value from a post-cursor request setting register bank of the first transmitter equalization register of the first communication lane interface of the second communication device; read, over the MDIO bus, a request flag from the first transmitter equalization register of the first communication lane interface of the second communication device; write, over the MDIO bus, the pre-cursor requested value to the pre-cursor local setting register bank of the first transmitter equalization register of the first communication lane interface of the first communication device in response to the request flag being true; and write, over the MDIO bus, the post-cursor requested value to the post-cursor local setting register bank of the first transmitter equalization register of the first communication lane interface of the first communication device in response to the request flag being true.