Patent ID: 9332256
Filing Date: 2016-05-03
CPC Classification: H03M,H04N

Claim Text:
1. A method of compressing a binary number originally stored in an n-bit storage system into an (n/2+1)-bit storage system, in a processor, the method comprising: comparing the binary number originally stored in the n-bit storage system to a threshold value equaling 2 when the binary number originally stored in the n-bit storage system is less than the threshold value, storing the binary number originally stored in the n-bit storage system into the (n/2+1)-bit storage system, setting a compression flag as uncompressed, and outputting the newly stored number and the compression flag as the compressed binary number; and when the binary number originally stored in the n-bit storage system is equal to or greater than the threshold value, shifting the binary number originally stored in the n-bit storage toward a least significant bit by (n/2) places to produce a shifted result, storing the shifted result into the (n/2+1)-bit storage system, setting the compression flag as compressed, and outputting the newly stored number and the compression flag as the compressed binary number.