Patent ID: 9331066
Filing Date: 2016-05-03
CPC Classification: G06F,H01L

Claim Text:
1. A method of detecting a parasitic transistor, the method comprising: using a computer to convert a layout of a selected area to an equivalent circuit having a plurality of diodes; tracing signals coupled to the diodes to determine at least one diode pair from the diodes; and filtering the at least one diode pair in accordance with a threshold distance to determine whether at least one parasitic transistor is obtained; wherein each diode pair comprises two diodes coupled, and has a common terminal and two I/O terminals, wherein the two I/O terminals are coupled to different I/O signals, and the at least one diode pair is filtered by comparing a minimum distance between the two I/O terminals of the diode pair and the threshold distance, and if the minimum distance is smaller than the threshold distance, the parasitic transistor comprising the diode pair is obtained.