Patent ID: 9324642
Filing Date: 2016-04-26
CPC Classification: H01L

Claim Text:
1. A method of processing a lead frame strip including a plurality of connected unit lead frames, each unit lead frame having a die paddle and a plurality of leads connected to a periphery of the unit lead frame, the method comprising: attaching a semiconductor die to each of the die paddles; covering the plurality of connected unit lead frames including the semiconductor dies with a molding compound; forming a mask on a side of the die paddles and the plurality of leads uncovered by the molding compound, the mask having openings exposing a region of the plurality of leads for each unit lead frame that is shared with leads of adjacent ones of the plurality of connected unit lead frames; etching the exposed region of the shared leads to separate the shared leads by a gap which extends at least mostly through the shared leads; electrolessly plating the side of the die paddles and the plurality of leads uncovered by the molding compound, and sidewalls of sections of the shared leads exposed by the etching; after the electroless plating, cutting partly through the molding compound around the periphery of each of the plurality of connected unit lead frames, including below the gap in the shared leads, to electrically isolate the plurality of leads of each unit lead frame from leads of adjacent ones of the plurality of connected unit lead frames; and processing the lead frame strip after cutting partly through the molding compound.