Patent ID: 9367386
Filing Date: 2016-06-14
CPC Classification: G01R,G06F,G06K,H01L,H03F,H03K,H04B,H04L

Claim Text:
1. A semiconductor integrated circuit comprising: a first transmission circuit generating and outputting a first transmission signal reflecting a first data signal supplied from outside; a first reception circuit reproducing the first data signal based on a first reception signal; a first isolation element isolating the first transmission circuit from the first reception circuit and transmitting the first transmission signal as the first reception signal; a second transmission circuit generating and outputting a second transmission signal reflecting a second data signal supplied from outside; a second reception circuit reproducing the second data signal based on a second reception signal; a second isolation element isolating the second transmission circuit from the second reception circuit and transmitting the second transmission signal as the second reception signal; a third transmission circuit generating and outputting a third transmission signal reflecting the second data signal; a third reception circuit reproducing the second data signal based on a third reception signal; a third isolation element isolating the third transmission circuit from the third reception circuit and transmitting the third transmission signal as the third reception signal; a control part which outputs a stop signal regardless of the first data signal supplied from outside to the first transmission circuit when the control part decides that both the first data signal reproduced by the first reception circuit and the second data signal reproduced by the third reception circuit are the same logical level signals; a first gate driver outputting a first gate control signal based on the first data signal reproduced by the first reception circuit; and a second gate driver outputting a second gate control signal based on the second data signal reproduced by the second reception circuit and the second gate control signal being used to control on/off operations of an output transistor for controlling a current flowing through a load.