Patent ID: 9448616
Filing Date: 2016-09-20
CPC Classification: G06F,Y02D

Claim Text:
1. An anti-leakage supply circuit comprising: an interface; a management chip configured to detect a working state of a computer; a motherboard power supply configured to supply power to the interface and the management chip; and a control circuit coupled between the motherboard power supply and the interface, wherein the management chip is configured to output a first signal to the control circuit; and the control circuit is configured to disconnect the motherboard power supply and the interface upon receiving the first signal when the computer is in a standby state wherein the control circuit comprises a logical circuit coupled to the management chip and a FET coupled to the logical circuit, the logical circuit outputs a disconnecting signal to the FET after receiving the first signal, and the FET disconnects after receiving the disconnecting signal, thus the motherboard power supply is disconnected from the interface; wherein the logical circuit comprises a first AND-circuit and a second AND-circuit, the management chip comprises a first terminal configured to output the first signal, a second terminal configured to output a second signal, and a third terminal configured to output a third signal, the management chip is coupled to input ends of the first AND-circuit and outputs the first signal and a second signal to the first AND-circuit, the management chip is coupled to a first input end of the second AND-circuit and outputs a third signal to the second AND-circuit, an output end of the first AND-circuit is coupled to a second input end of the second AND-circuit, an output end of the second AND-circuit is coupled to the FET, the first AND-circuit outputs a fourth signal to the second AND-circuit after receiving the first signal, the second AND-circuit outputs the disconnecting signal to the FET after receiving the third signal and the fourth signal.