Patent ID: 9231083
Filing Date: 2016-01-05
CPC Classification: H01L

Claim Text:
1. A multi-gate lateral-diffused-metal-oxide-semiconductor (LDMOS) device comprising: a semiconductor-on-insulator (SOI) support structure on or over which are located a substantially symmetrical internal LDMOS region and an asymmetric edge-proximate LDMOS region; a deep-trench isolation (DTI) wall extending into the support structure and terminating the edge-proximate LDMOS region; a first source region of a first conductivity type in the asymmetric edge-proximate LDMOS region; a first drain region of the first conductivity type in the asymmetric edge-proximate LDMOS region; and a doped semiconductor (SC) buried layer (BL) region proximate the DTI wall, underlying a portion of the asymmetric edge-proximate LDMOS region, and of opposite conductivity type than the first drain region of the asymmetric edge-proximate LDMOS region; wherein the substantially symmetrical internal LDMOS region and the asymmetric edge-proximate LDMOS region are separated by a vertical boundary extending into the multi-gate LDMOS device at a location laterally adjacent the first source region.