Patent ID: 9337834
Filing Date: 2016-05-10
CPC Classification: H03K

Claim Text:
1. A Complementary Metal Oxide Semiconductor (CMOS) input buffer circuit, comprising a CMOS input follower circuit, a linearity improvement circuit of follower transistor, a current source load, and a linearity improvement circuit of load impedance; wherein the CMOS input follower circuit, for following changes of input signals and outputting follower input signals; the linearity improvement circuit of follower transistor, for obtaining changes of input signals and giving feedback to CMOS input follower circuit; the current source load, for providing a bias current for CMOS input follower circuit; the linearity improvement circuit of load impedance, being placed between CMOS input follower circuit and current source load, for enhancing absolute load impedance of current source, restraining its fluctuation and improving load impedance linearity of CMOS input buffer.