Patent ID: 9437658
Filing Date: 2016-09-06
CPC Classification: H01L

Claim Text:
1. A monolithic, three-dimensional memory device, comprising: a substrate having a major surface; a plurality of electrically conductive word lines over the major surface of the substrate, wherein each word line is elongated in a first direction that is substantially parallel to the major surface of the substrate and the plurality of word lines are spaced apart from one another in a second direction that is substantially perpendicular to the major surface of the substrate, and an electrically insulating material is located between each of the spaced apart word lines; an electrically conductive bit line extending in a direction substantially perpendicular to the major surface of the substrate and adjacent to each of the plurality of word lines; a non-volatile memory element material located between the bit line and each of the plurality of word lines; and a plurality of middle electrodes comprising an electrically conductive material located between the bit line and each of the plurality of word lines, wherein the plurality of middle electrodes are discrete electrodes which are isolated from one another in at least the second direction.