Patent ID: 9275729
Filing Date: 2016-03-01
CPC Classification: G11C,H01L

Claim Text:
1. A semiconductor memory device, comprising: a plurality of first lines that are arranged in a first direction perpendicular to a surface of a substrate and that are extending in a second direction parallel to the surface of the substrate; a plurality of second lines that are arranged in the second direction, that are extending in the first direction, and that intersect the first lines; a plurality of memory cells disposed at intersections of the first lines and the second lines; a plurality of first select gate transistors each including a first channel line connected to a first end of the second line and a first gate line; a first global bit line connected to the first channel lines; a plurality of second select gate transistors each including a second channel line connected to a second end of the second line and a second gate line; a second global bit line connected to the second channel lines; and a control circuit that applies a voltage to the memory cells and that controls the first select gate transistors and the second select gate transistors, wherein the control circuit sets one of the first select gate transistor and the second select gate transistor connected to a certain second line to an ON state and the other to an OFF state, when the first select gate transistor connected to the certain second line is set to the ON state, the control circuit sets the first select gate transistor connected to the second line other than the certain second line to the OFF state, and sets the second select gate transistor connected to the second line other than the certain second line to the ON state, and when the second select gate transistor connected to the certain second line is set to the ON state, the control circuit sets the first select gate transistor connected to the second line other than the certain second line to the ON state, and sets the second select gate transistor connected to the second line other than the certain second line to the OFF state.