Patent ID: 9406742
Filing Date: 2016-08-02
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a substrate; an epitaxial layer on the substrate, wherein the epitaxial layer comprises first trenches and second trenches alternately arranged along a first direction, wherein the epitaxial layer between the adjacent first and second trenches comprises a first doping region and a second doping region, wherein the first doping region and the second doping region have different conductivity types, and an interface between the first doping region and the second doping region forms a super-junction structure, and wherein an edge of the first doping region is coplanar with a sidewall of the first trench, and an edge of the second doping region is coplanar with a sidewall of the second trench; and a gate structure on the epitaxial layer, wherein the epitaxial layer under the gate structure comprises a channel extending along a second direction from a source region toward a drain region, and the first direction is perpendicular to the second direction, and wherein the source region is in a well region in the epitaxial layer, and the well region is under a portion of the gate structure and separated from the first doping region and the second doping region wherein the gate structure covers one end of each first trench and that of each second trench; and the second direction is a lateral direction.