Patent ID: 9294115
Filing Date: 2016-03-22
CPC Classification: G11C,H03F,H03H,H03M

Claim Text:
1. A passive amplification circuit comprising: a first input terminal configured to input a positive signal of a differential signal; a second input terminal configured to input a negative signal of the differential signal; first to fourth capacitances charged with voltages of the differential signal in a sampling operation; a plurality of switches configured to switch a connection relation of the first to fourth capacitances between a first state of the sampling operation and a second state of an amplification operation; and a first output terminal configured to output a positive output signal of the differential signal amplified in the amplification operation, a second output terminal configured to output a negative output signal of the differential signal amplified in the amplification operation, wherein in the first state, the first capacitance and the second capacitance are connected in parallel and the third capacitance and the fourth capacitance are connected in parallel, wherein in the second state, the first capacitance and the second capacitance are connected in series and the third capacitance and the fourth capacitance are connected in series, wherein each of one end and the other end of each of the first to fourth capacitances is connected with any one of the plurality of switches, the first and the second output terminals, a power supply voltage and a ground voltage, wherein one end and the other end of each of the plurality of switches is connected with any one of the first to fourth capacitances, the first and the second input terminals, the first and the second output terminals, the power supply voltage and the ground voltage; wherein in the first state, the first to fourth capacitances are connected in parallel between the first input terminal and the second input terminal, wherein in the second state, the first capacitance is connected between the power supply voltage and the second output terminal, wherein in the second state, the second capacitance is connected between the second output terminal and the ground voltage, wherein in the second state, the third capacitance is connected between the power supply voltage and the first output terminal, wherein in the second state, the fourth capacitance is connected between the first output terminal and the ground voltage, and wherein the first capacitance and the third capacitance have an identical first capacitance value, and the second capacitance of the fourth capacitance have an identical second capacitance value.