Patent ID: 9306067
Filing Date: 2016-04-05
CPC Classification: H01L

Claim Text:
1. An integrated circuit device comprising: a substrate; a first fin structure and a second fin structure each disposed on the substrate and having an isolation feature trench defined therebetween, wherein each of the first fin structure and the second fin structure includes a lower portion disposed on the substrate and an upper portion disposed on the lower portion, and wherein the lower portion has a different semiconductor composition than the upper portion; a strain feature disposed on a horizontal surface of the substrate within the isolation feature trench and further disposed on a vertical surface of the lower portion of each of the first fin structure and the second fin structure without being disposed on a vertical surface of the upper portion of either of the first fin structure or the second fin structure; and a fill dielectric disposed on the strain feature and the upper portion and the lower portion of each of the first fin structure and the second fin structure within the isolation feature trench.