Patent ID: 9523709
Filing Date: 2016-12-20
CPC Classification: G01R,H05K

Claim Text:
1. A method of manufacturing a multilayer wiring board comprising: a stacking process in which a plurality of insulating layers, each of which includes a ceramic layer and a shrinkage suppression layer that is stacked on top of the ceramic layer and that suppresses shrinkage of the ceramic layer, are stacked on top of one another; a press-bonding process in which the plurality of insulating layers are fixed to one another by applying pressure, so that a multilayer body is formed; and a firing process in which the multilayer body is fired; wherein in at least one of the insulating layers, a wiring electrode is formed on a surface of the shrinkage suppression layer on an opposite side to a surface of the shrinkage suppression layer that faces the ceramic layer in the stacking process, and a thickness of at least a peripheral area of the shrinkage suppression layer that is located around a periphery of a contact area of the shrinkage suppression layer that is in contact with the wiring electrode is set to be larger than thicknesses of portions of the shrinkage suppression layer except for the peripheral area.