Patent ID: 9355936
Filing Date: 2016-05-31
CPC Classification: H01L

Claim Text:
1. A bonded substrate assembly comprising: a device substrate including a first surface, a second surface opposite to the first surface, a plurality of device structures on the first surface, and an interconnect structure for the device structures, the interconnect structure including a first wiring layer and a second wiring layer between the first wiring layer and the first surface of the device substrate, the second wiring layer of the interconnect structure including an interlayer dielectric layer with a top surface, and the first wiring layer including a first conductive feature projecting above the top surface of the interlayer dielectric layer and a second conductive feature projecting above the top surface of the interlayer dielectric layer, the first and second conductive features each having a height measured relative to the top surface of the interlayer dielectric layer of the second wiring layer; a final handle substrate bonded to the second surface of the device substrate; and at least one insulator layer on the top surface of the interlayer dielectric layer, the at least one insulator layer having a planar top surface and a thickness greater than the height of the first and second conductive features, wherein the first wiring layer of the interconnect structure is a top wiring layer, and the first conductive feature of the interconnect structure is a bond pad.