Patent ID: 9529952
Filing Date: 2016-12-27
CPC Classification: G06F

Claim Text:
1. A tangible, non-transitory, computer-readable medium, comprising instructions that, when executed by a processor, cause the processor to: receive a first circuit design; determine one or more variations of the first circuit design using register retiming with speculative circuit design changes to the first circuit design; determine one or more performance improvements of the one or more variations when fed one or more clock signals over the first circuit design; determine one or more tradeoffs of the one or more variations of the first circuit design in comparison to the first circuit design, wherein the tradeoffs comprise a number or a type of the speculative circuit design changes made in the one or more variations to achieve the respective performance improvements, or both; display a summary of the one or more variations of the first circuit design, the one or more performance improvements, and the one or more tradeoffs; provide a user-selectable user interface element to enable selection of the first circuit design, at least one of the one or more variations of the first circuit design, or a combination thereof; receive a user selection of a circuit design from the first circuit design or the one or more variations; and output the selected circuit design to facilitate programming an integrated circuit.