Patent ID: 9396765
Filing Date: 2016-07-19
CPC Classification: G11C,H01L

Claim Text:
1. A stacked semiconductor package comprising: a package substrate; an interposer having a first surface and a second surface, mounted on the package substrate, wherein the first surface of the interposer is faced to the package substrate; a plurality of semiconductor chips stacked on the second surface of the interposer; and a control unit embedded in the interposer, that stores in advance data to be written in the plurality of semiconductor chips, and outputs the data stored in advance according to a test mode signal, wherein the interposer includes a first connection unit formed at the first surface for electrically connecting the package substrate and an input/output unit formed at the second surface for electrically connecting the plurality of semiconductor chips, and the control unit is connected between the first connection unit and the input/output unit.