Patent ID: 9390672
Filing Date: 2016-07-12
CPC Classification: G09G

Claim Text:
1. A driving circuit of a pixel of a liquid crystal display panel, comprising: a driving capacitor for driving liquid crystals of the pixel according to a voltage difference between a first end and a second end of the driving capacitor; a reference voltage source for providing a reference voltage; a voltage stabilizing circuit electrically connected to the first end of the driving capacitor, the second end of the driving capacitor, and the reference voltage source; a first data line for providing a first driving voltage; a second data line for providing a second driving voltage; a first scan circuit electrically connected to the first data line, the second data line, and the driving capacitor; a first scan line electrically connected to the first scan circuit for controlling on and off states of the first scan circuit; a second scan circuit electrically connected to the first end and the second end of the driving capacitor for inputting a substantially identical voltage to the first end and the second end of the driving capacitor when the second scan circuit is turned on; and a second line electrically connected to the second scan circuit for controlling on and off states of the second scan circuit; wherein the second scan circuit comprises: a third transistor having a gate electrically connected to the second scan line, a first end electrically connected to the reference voltage source, and a second end directly connected to the first end of the driving capacitor, wherein one of the first end and the second end of the third transistor is a drain of the third transistor and the other one of the first end and the second end of the third transistor is a source of the third transistor; and a fourth transistor having a gate electrically connected to the second scan line, a first end electrically connected to the reference voltage source, and a second end directly connected to the second end of the driving capacitor, wherein one of the first end and the second end of the fourth transistor is a drain of the fourth transistor and the other one of the first end and the second end of the fourth transistor is a source of the fourth transistor; wherein there is no capacitor arranged on a path from the reference voltage source to the first end of the driving capacitor through the first end and the second end of the third transistor.