Patent ID: 9356514
Filing Date: 2016-05-31
CPC Classification: H02M,H03K

Claim Text:
1. A power supply conversion apparatus, wherein the apparatus comprises: a switch unit, a bootstrap unit, and a control unit, wherein the switch unit comprises a first N-type metal-oxide-semiconductor (NMOS) transistor and a second NMOS transistor, wherein a drain of the first NMOS transistor is connected to a power supply voltage PVDD of a power level, a source of the first NMOS transistor is connected to a drain of the second NMOS transistor and is an output of the power supply conversion apparatus, and a source of the second transistor is grounded; the bootstrap unit comprises a first P-type metal-oxide-semiconductor PMOS transistor, a second PMOS transistor, and a bootstrap capacitor, wherein a source of the first PMOS transistor is connected to a power supply voltage AVDD of an analog circuit, a drain of the first PMOS transistor is connected to a drain of the second PMOS transistor, a first end of the bootstrap capacitor is connected to a source of the second PMOS transistor for providing a gate turn-on voltage for the first NMOS transistor, and a second end of the bootstrap capacitor is connected to the drain of the first NMOS transistor and the source of the second NMOS transistor, so that a maximum gate to source voltage VGS of the first NMOS transistor is equal to a voltage at the two ends of the bootstrap capacitor; and in an initial state, the first NMOS transistor remains turned off, and the control unit generates a corresponding control signal according to a received low level pulse width modulation PWM signal, to control the second NMOS transistor, the first PMOS transistor, and the second PMOS transistor to be conductive, so that a voltage at the first end of the bootstrap capacitor is charged to the AVDD, and a voltage at the second end is ground potential; and when the PWM signal changes to a high level, the control unit generates a corresponding control signal according to a received high level PWM signal, to control the first PMOS transistor, the second PMOS transistor, and the second NMOS transistor to be turned off successively, and to control the first NMOS transistor to be conductive, making the voltage at the second end of the bootstrap capacitor rise from the ground potential to the PVDD voltage, so that the voltage at the first end of the bootstrap capacitor rises to a PVDD+AVDD voltage as the voltage at the second end rises, and the gate turn-on voltage of the first NMOS transistor reaches the PVDD+AVDD voltage, so as to make the first NMOS transistor completely conducted, which thereby makes an output voltage of the power supply conversion apparatus reach the PVDD voltage, and makes the maximum gate to source voltage of the first NMOS transistor not larger than the AVDD voltage all the time.