Patent ID: 9432196
Filing Date: 2016-08-30
CPC Classification: G06F,H04L,H04W,Y02D

Claim Text:
1. A secure demand paging system comprising: a secure internal memory; an external non-volatile memory having encrypted and integrity-protected code pages; an external volatile memory for swap pages; a processor coupled to said secure internal memory and to said external non-volatile memory and operable to decrypt and verify the integrity of the code pages thereby to transfer code pages to said secure internal memory directly from said external non-volatile memory bypassing said external volatile memory in respect of the code pages, and to swap out and swap in the swap pages between secure internal memory and said external volatile memory bypassing said external non-volatile memory in respect of the swap pages for said external volatile memory; and a memory management unit wherein said secure internal memory has physical addresses and said memory management unit is responsive to virtual addresses, and said processor is further operable to establish a table in secure internal memory relating at least some of the physical addresses to at least some of the virtual addresses.