Patent ID: 9471077
Filing Date: 2016-10-18
CPC Classification: G05F

Claim Text:
1. A voltage mode controlled buck converter enabled for smooth transition from sleep mode to active mode, comprising: a main output stage comprising a high side switch and a low side switch both connected in series, wherein a driver stage is driving the main output stage; a coil, wherein a first terminal of the coil is connected to a node between the high side switch and the low side switch and a second terminal of the coil is connected to an output port of the buck converter configured to providing an output voltage of the buck converter; a PWM control loop configured to control the buck converter during active mode, comprising an error amplifier configured to receiving an output voltage feedback of the buck converter and a reference voltage, a compensation capacitor connected between an output of the error amplifier and ground, a PWM comparator configured to compare the output of the error amplifier with an output of a ramp signal generator, and the driver stage driving the main output stage, wherein an output of the PWM comparator provides input to the driver stage; and a local PWM feedback loop, capable of, when enabled intermittently during sleep mode, to set an appropriate compensation capacitor voltage regardless of the length of the sleep period, comprises: