Patent ID: 9337110
Filing Date: 2016-05-10
CPC Classification: H01L

Claim Text:
1. A method of fabricating a semiconductor device, comprising: providing a substrate having a first region and a second region, wherein the first region includes a first opening and the second region includes a second opening; filling the second opening with a blocking material, wherein the blocking material comprises at least one of amorphous silicon, spin on glass, silicon dioxide, and silicon nitride (Si forming a first gate electrode in the first opening while the blocking material fills the second opening, wherein the forming the first gate electrode in the first opening, includes: removing the blocking material after forming the first gate electrode; and forming a second gate electrode in the second opening, wherein the second gate electrode includes a second work function layer and not the first work function layer, and the first gate electrode includes the first work function layer and not the second work function layer, and wherein the forming the second gate electrode in the second opening, includes: forming the second work function layer directly on the gate dielectric layer; and forming a second fill metal layer directly on the second work function layer.