Patent ID: 9293099
Filing Date: 2016-03-22
CPC Classification: G09G,G11C

Claim Text:
1. A display driving circuit for driving a display panel including (i) pixel electrodes included in pixels and (ii) common lines which constitute capacitors with the pixel electrodes, the display driving circuit comprising: a shift register which includes plural stages provided corresponding to plural scanning signal lines, wherein: one or more retention circuits for receiving retention target signals are provided corresponding to each of the plural stages of the shift register; when an output signal of any one of the plural stages of the shift register becomes active, the corresponding retention circuit supplies an output of the corresponding retention circuit to the corresponding common line while receiving and retaining a retention target signal; each of the retention circuits includes a first inverter and a second inverter for retaining the retention target signal, when the output signal of the shift register becomes active, the retention target signal is supplied to the second inverter, and the each of the retention circuits supplies, on the basis of an output from the first inverter or the second inverter, a high-level or low-level signal to the corresponding common line; and in the case where the output signal of the shift register is active, an input terminal of the first inverter and an output terminal of the second inverter are electrically connected to each other and an output terminal of the first inverter and an input terminal of the second inverter are electrically connected to each other, wherein, when the output signal of the shift register becomes active, a potential level of a signal retained at a first connection point is changed to be closer to a potential level of the retention target signal, the first connection point being a connection point between the output terminal of the first inverter and the input terminal of the second inverter.