Patent ID: 9524937
Filing Date: 2016-12-20
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a substrate including first and second regions; a plurality of first conductive patterns on the first region and a plurality of second conductive patterns on the second region; an insulating diffusion barrier layer on sidewalls of the plurality of first conductive patterns and the plurality of second conductive patterns; a permeable layer on the insulating diffusion barrier layer; a first gap between adjacent ones of the plurality of first conductive patterns; and a second gap between adjacent ones of the plurality of second conductive patterns, wherein the first gap is defined by portions of the insulating diffusion barrier layer that are on the sidewalls of the adjacent ones of the plurality of first conductive patterns, wherein the insulating diffusion barrier layer extends between the first gap and the permeable layer, and the permeable layer is spaced apart from the first gap, and wherein the second gap is defined by portions of the insulating diffusion barrier layer that are on the sidewalls of the adjacent ones of the plurality of second conductive patterns and the permeable layer.