Patent ID: 9513977
Filing Date: 2016-12-06
CPC Classification: G06F

Claim Text:
1. At least one non-transitory computer-readable storage medium comprising instructions to cause a target device with a target computer processor supporting a target instruction set architecture, in response to execution of the instructions, to provide an instruction set architecture bridging layer to the target device to facilitate a library service of a library of the target device, called by an application operating on the target device, to callback a callback function of the application; wherein the library service is implemented for the target instruction set architecture, and the application is implemented at least partially for a source instruction set architecture of a source computer processor; wherein the source and target instruction set architectures of the source and target computer processors are different computer processor instruction set architectures of different computer processor families; and wherein the instruction set architecture bridging layer includes a source instruction set architecture emulator and a library emulator that cooperates with each to enable the application to call the library service, and the library service to callback the callback function, across the source and target instruction set architectures; wherein the source instruction set architecture emulator is to maintain an execution context of the source instruction set architecture, and the library emulator is to maintain a library execution context; wherein the library emulator further includes a gate corresponding to the library service to redirect the call to a wrapper function corresponding to the library service; and the wrapper function corresponding to the library service is to process the call, and set up the call in the library execution context.