Patent ID: 9281397
Filing Date: 2016-03-08
CPC Classification: H01L

Claim Text:
1. A semiconductor device having an asymmetric feature, the device comprising: a first gate formed on a substrate; first and second diffusion regions formed in the substrate on a side of the first gate; first and second contacts which contact the first and second diffusion regions, respectively, the first contact being asymmetric with respect to the second contact; a first FET comprising the first and second diffusion regions, first gate and first and second contacts; a second FET formed on the substrate adjacent to the first FET and including a second gate formed on the substrate third and fourth diffusion regions formed in the substrate on a side of the second gate, and third and fourth contacts which contact the third and fourth diffusion regions, respectively; and a third FET formed on the substrate adjacent to the second FET, the third FET including a third ate formed on the substrate fifth and sixth diffusion regions formed in the substrate on a side of the third gate, and fifth and sixth contacts which contact the fifth and sixth diffusion regions, respectively, wherein a pitch between the first and second gates comprises a first pitch and a pitch between the second and third gates comprises a second pitch which is different from the first pitch.