Patent ID: 9480193
Filing Date: 2016-10-25
CPC Classification: G01R,H05B,H05K,Y10T

Claim Text:
1. A load detection circuit comprising: a driver circuit configured to form a drive signal to drive a control electrode of a drive transistor with a first control signal to form a voltage between a first current carrying electrode of the drive transistor and a second current carrying electrode of the drive transistor; a first switch coupled to selectively couple a first signal to the driver circuit responsively to a first state of a mode signal and to selective couple a second signal to the driver circuit responsively to a second state of the mode signal wherein the driver circuit is configured to form the voltage to have a first value responsively to receiving the first signal and to form the voltage to have a second value responsively to receiving the second signal; a diagnostic transistor configured to be coupled in parallel with the drive transistor, the diagnostic transistor having a control electrode configured to receive a second control signal, the second control signal having a third value responsively to the first state of the mode signal and having a fourth value responsively to the second state of the mode signal, wherein the third value substantially disables the diagnostic transistor; and a comparator configured to detect the control electrode of the drive transistor having a fifth value that is less than a threshold voltage of the drive transistor in response to the second state of the mode signal.