Patent ID: 9343538
Filing Date: 2016-05-17
CPC Classification: H01L

Claim Text:
1. A method for manufacturing high voltage device, comprising: providing a substrate having an upper surface; forming a first isolation structure in the substrate to define a device region, and forming a lower isolation region, wherein the first isolation structure and the lower isolation region are formed by the same process steps, wherein by forming the first isolation structure and the lower isolation region in the substrate, the upper surface of the substrate has recessed portions interfacing the first isolation structure and the lower isolation region, and a flat portion which does not interface the first isolation structure and the lower isolation region; forming an upper isolation region by depositing an isolation material on the flat portion of the upper surface of the substrate, such that the upper isolation region consists of the isolation material on the flat portion of the upper surface of the substrate; forming a gate on the substrate, the gate partially or totally covering the upper isolation region; and forming a first conductive type source and a first conductive type drain respectively at both sides of the gate; wherein the length of the lower isolation region in a direction along an imaginary line connecting the source and the drain does not exceed one-third length of the upper isolation region.