Patent ID: 9362288
Filing Date: 2016-06-07
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: an active region extending in a first direction; a first semiconductor pillar, a second semiconductor pillar and a third semiconductor pillar which are provided upright relative to a main surface of the active region and which are disposed side by side in succession in the first direction; between the first semiconductor pillar and the second semiconductor pillar, a first gate insulating film which is in contact with a side surface of the first semiconductor pillar; a first gate electrode which is in contact with the first gate insulating film; between the first semiconductor pillar and the second semiconductor pillar, a second gate insulating film which is in contact with a side surface of the second semiconductor pillar; a second gate electrode which is in contact with the second gate insulating film; a first embedded insulating film located between the first gate electrode and the second gate electrode; and between the second semiconductor pillar and the third semiconductor pillar, a second embedded insulating film which is in contact with the side surfaces of the second semiconductor pillar and the third semiconductor pillar, wherein a bottom of the second embedded insulating film and a bottom of the first gate electrode are at a substantially same level.