Patent ID: 9280464
Filing Date: 2016-03-08
CPC Classification: G06F

Claim Text:
1. A method of handling memory read requests in a digital memory system, said method comprising: receiving a first memory read request for a requested data item, said first memory read request identifying a first virtualized memory address in a virtualized memory address space; translating said first virtualized memory address into a first physical memory address; executing said first memory read request with a physical memory system using the first physical memory address, by reading a first data word from the first physical memory address; simultaneously receiving a first memory write request with a second data word along with the first memory read request, the first memory write request identifying a second virtual memory address in the virtual memory address space; translating the second virtualized memory address into a second physical memory address; and writing the second data word to the second physical memory address when a write to the second physical memory address currently associated with the second virtualized memory address does not cause a memory bank conflict with the reading of the first data word from the first physical memory address; writing the second data word to a third physical memory address when the second physical memory address currently associated with the second virtualized memory address causes a memory bank conflict with the reading of the first data word from the first physical memory address; and updating a translation table to associate the third physical memory address with the second virtualized memory address when the second physical memory address currently causes a memory bank conflict with the reading of the first data word from the first physical memory address.