Patent ID: 9420685
Filing Date: 2016-08-16
CPC Classification: H01L,H05K,Y10T

Claim Text:
1. An electronic device, comprising: a substrate board having a front face; at least one integrated-circuit chip mounted to the front face of said substrate board; wherein the substrate board further includes an electrical connection network mounted on said front face and configured to make electrical connections to said integrated-circuit chip and further having a metal region; at least one local reinforcing or balancing layer made of a non-metallic material mounted to a face of the substrate board in at least one local zone of the substrate board which is free of metal portions of said electrical connection network; and wherein said electrical connection network includes vias extending through the substrate board, and wherein said at least one local zone and said at least one local reinforcing or balancing layer are located between said vias and a peripheral edge of the substrate board, and said at least one local reinforcing or balancing layer does not extend over the vias.