Patent ID: 9397186
Filing Date: 2016-07-19
CPC Classification: H01L

Claim Text:
1. A method for fabricating an MPS diode, the method comprising: providing a III-nitride substrate of a first conductivity type having a first surface and a second surface opposing the first surface; forming a first III-nitride epitaxial layer of the first conductivity type coupled to the first surface of the III-nitride substrate, the first III-nitride epitaxial layer having a first surface adjacent the first surface of the III-nitride substrate and a second surface opposing the first surface; forming a mask pattern coupled to the second surface of the first III-nitride epitaxial layer to define etch areas; etching the etch areas to form a plurality of recessed regions extending to a predetermined depth into the first III-nitride epitaxial layer; regrowing a second III-nitride epitaxial layer that fills the recessed regions and extends to a predetermined height from the second surface of the first III-nitride epitaxial layer, wherein the second III-nitride epitaxial layer is lattice matched with the first III-nitride epitaxial layer; forming a second mask pattern coupled to the second III-nitride epitaxial layer to define second etch areas; etching the second etch areas to define a plurality of regrown regions extending in a direction normal to the second surface of the first III-nitride epitaxial layer and to expose a plurality of portions of the first III-nitride epitaxial layer; forming a first metallic structure electrically coupled to one or more of the plurality of regrown regions and one or more of the exposed portions of the first III-nitride epitaxial layer; and forming a second metallic structure electrically coupled to the second surface of the III-nitride substrate.