Patent ID: 9343956
Filing Date: 2016-05-17
CPC Classification: H02M,Y02B

Claim Text:
1. A passive power factor correction circuit, comprising: a DC (direct current) capacitor, coupled to a rectifying circuit, and charged by a DC voltage from the rectifying circuit; an input capacitor, coupled to the rectifying circuit, and charged by the DC voltage from the rectifying circuit; an output capacitor, coupled to a load; a first diode, coupled to the input capacitor and the output capacitor; a second diode, coupled to the input capacitor and the output capacitor; and an inductor, coupled to the load, the input capacitor and the output capacitor; wherein, electric energy stored in the DC capacitor is discharged within a half cycle of an input AC voltage, and wherein within every half cycle of the input AC voltage, the passive power factor correction circuit sequentially works in a parallel charging operating mode, a parallel charging and serial charging operating mode, a serial discharging operating mode and a parallel discharging operating mode.