Patent ID: 9479142
Filing Date: 2016-10-25
CPC Classification: H03B,H03D,H03H,H03K

Claim Text:
1. A phase error compensation circuit comprising: a first transconductance circuit having a differential input and a differential output; a second transconductance circuit having a differential input and a differential output; a first multiplier circuit comprising: a second multiplier circuit comprising: a first differential load comprising a first load and a second load, together having a differential input coupled to the differential output of the second multiplier circuit and sharing a common node; and a second differential load comprising a first load and a second load together having a differential input coupled to the differential output of the first multiplier circuit and sharing the common node, wherein the first multiplier circuit is configured to multiply the differential current signal provided by the first transconductance circuit times a first scaling constant provided at the differential control input of the first multiplier circuit.