Patent ID: 9349611
Filing Date: 2016-05-24
CPC Classification: H01L

Claim Text:
1. A manufacturing method, comprising: providing a carrier; disposing a semiconductor device over the carrier such that an active surface of the semiconductor device faces the carrier, wherein the semiconductor device includes a pad adjacent to the active surface; forming a package body over the carrier and the semiconductor device, wherein the package body includes a first package surface and a second package surface opposite to the first package surface, and the first package surface faces the carrier; forming a through-hole in the package body, wherein the through-hole extends between the first package surface and the second package surface; separating the carrier from the package body; forming a dielectric layer adjacent to the first package surface, wherein the dielectric layer exposes the pad and the through-hole; forming a conductive via in the through-hole, wherein the conductive via includes a first end, adjacent to the first package surface, and a second end, adjacent to the second package surface; forming a patterned conductive layer adjacent to the dielectric layer, wherein the patterned conductive layer is electrically connected to at least one of the pad and the first end of the conductive via; and forming a stud bump adjacent to the second end of the conductive via.