Patent ID: 9344064
Filing Date: 2016-05-17
CPC Classification: G01R,G11C,H03K,H03L

Claim Text:
1. An integrated circuit (IC), comprising: a multiplying injection-locked oscillator (MILO), wherein the MILO generates a second clock signal based on a first clock signal, wherein the first clock signal has a first clock frequency, and wherein the second clock signal has a second clock frequency that is an integral multiple of the first clock frequency; a sampler coupled to the MILO, wherein the sampler obtains samples by oversampling the first clock signal using the second clock signal; and a finite state machine (FSM) circuit coupled to the sampler, wherein state transitions in the FSM are triggered based on the samples, and wherein a change in the first clock frequency is detected when a corresponding state transition is triggered in the FSM circuit.