Patent ID: 9245995
Filing Date: 2016-01-26
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising a power metal-oxide-semiconductor (MOS) transistor, the MOS transistor including: a semiconductor substrate; an impurity region on the semiconductor substrate, the impurity region having a first conductivity; a drift region in the impurity region, the drift region having the first conductivity, at least one recess region being in a portion of an upper surface of the drift region; a body region in the impurity region adjacent to the drift region, the body region having a second conductivity different from the first conductivity; a drain extension insulating layer on the drift region, the drain extension insulating layer being a shallow trench insulator (STI) that fills the at least one recess region, an upper surface of the drain extension insulating layer not being higher than an upper surface of the impurity region; a gate insulating layer and a gate electrode sequentially stacked across a portion of the body region and a portion of the drift region; a drain extension electrode on the drain extension insulating layer; a drain region contacting a side of the drift region opposite to the body region, the drain region having the first conductivity; and a source region in the body region, the source region having the second conductivity.