Patent ID: 9472447
Filing Date: 2016-10-18
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a finFET device, the method comprising: forming a plurality of first semiconductor fins on a substrate, forming a plurality of second semiconductor fins on a substrate, forming one or more gate stacks, each gate stack comprising a gate, a first hard mask, and an oxide layer; depositing a low-k dielectric spacer layer on the finFET device; depositing a sacrificial fill material on the finFET device; planarizing the device with chemical mechanical planarization to the level of the oxide layer on top of the gate stacks; depositing a second hard mask on the finFET device; patterning a trench area in the second hard mask parallel to the first semiconductor fins and second semiconductor fins; anisotropically etching the sacrificial fill material to create a trench; forming a dielectric wall in the trench; removing the second hard mask from the finFET device; and selectively removing the sacrificial fill material.