Patent ID: 9257968
Filing Date: 2016-02-09
CPC Classification: H03K

Claim Text:
1. An operating method of a duty cycle correction circuit, the operating method comprising: determining whether an initial locking is completed; performing a first locking operation for correcting a duty ratio of a clock signal at a first target duty ratio in response to a duty control signal generated by using a first tracking type based on a result of the determining step; performing a second locking operation for correcting the duty ratio of the clock signal at a second target duty ratio in response to the duty control signal generated by using a second tracking type based on the result of the determining step; and selecting one of the first locking operation and the second locking operation corresponding to the result of the determining step, wherein the first tracking type comprises a successive approximation register (SAR) tracking type, and the second tracking type comprises a linear tracking type.