Patent ID: 9244715
Filing Date: 2016-01-26
CPC Classification: G06F

Claim Text:
1. A computing node, comprising: a hardware layer, a Host layer, and at least one virtual machine (VM) running on the Host layer, wherein the hardware layer comprises an input/output (I/O) device, wherein a plurality of corresponding virtual function (VF) devices are virtualized from the I/O device, wherein the Host has a plurality of VF software instances the plurality of VF software instances being in one-to-one correspondence with the plurality of VF devices wherein the Host layer further has a back-end instance (BE) of an I/O virtual device having a same type with the I/O device, wherein the VM has a front-end instance (FE) of the I/O virtual device, and wherein the BE in the Host layer is bound on a one-to-one basis with an idle VF software instance; wherein the VF software instance bound with the BE is configured to: acquire an address corresponding to a cache for direct memory access (DMA) through an exporting application programming interface (API) of the BE; and write the acquired address corresponding to the cache for DMA into a first storage unit in a VF device corresponding to the VF software instance; and wherein the VF software instance bound with the BE is further configured to: select the address corresponding to the cache for DMA from the first storage unit when there is data to be received; and initiate a DMA write request by using the selected address corresponding to the cache for DMA as a target address.