Patent ID: 9257445
Filing Date: 2016-02-09
CPC Classification: H01L

Claim Text:
1. A method of making a semiconductor structure using a substrate, wherein the semiconductor structure comprises a split gate non-volatile memory (NVM) cell in an NVM region of the substrate, the method comprising: forming a charge storage layer over the substrate; depositing a first conductive layer over the charge storage layer; depositing a capping layer over the first conductive layer; patterning the capping layer, the first conductive layer, and the charge storage layer to form a control gate stack in the NVM region; forming a high-k dielectric layer over the substrate including over the control gate stack; forming a metal layer over the high-k dielectric layer; depositing a second conductive layer over the metal layer; patterning the second conductive layer and the metal layer to form a remaining portion of the second conductive layer and a remaining portion of the metal layer over a portion of the control gate stack and adjacent to a first side of the control gate stack; removing the remaining portion of the second conductive layer to form a select gate stack, wherein the select gate stack comprises the remaining portion of the metal layer; and depositing a stressor layer over the substrate including over the control gate stack and over the select gate stack.