Patent ID: 9276525
Filing Date: 2016-03-01
CPC Classification: H03F,H03G

Claim Text:
1. A circuit comprising: a peak detector configured to receive a positive voltage input, a negative voltage input and a reference current source input and to output a peak signal data value; a fast attack current source control coupled to the peak detector and configured to generate a current source control signal as a function of the peak signal data value; a slow decay control coupled to the fast attack current source control and configured to reduce the current source control signal based on a predetermined or user-selected decay rate; a variable current source coupled to the fast attack current source control and configured to generate a variable current as a function of the current source control signal; and amplifier circuitry coupled to the variable current source, the amplifier circuitry configured to receive the variable current and to amplify the positive voltage input and the negative voltage input.