Patent ID: 9523995
Filing Date: 2016-12-20
CPC Classification: G05F

Claim Text:
1. A reference voltage circuit, comprising: a first constant voltage circuit and a second constant voltage circuit, wherein the first constant voltage circuit includes: a first depletion transistor including a gate and a source which are connected to each other, and a drain connected to a first power supply terminal; a first MOS transistor including a gate and a drain which are connected to the gate and the source of the first depletion transistor, and a source connected to a second power supply terminal; a second MOS transistor including a gate connected to the gate of the first MOS transistor, a source connected to the second power supply terminal, and a drain connected to an output terminal of the first constant voltage circuit; and a third depletion transistor including a gate connected to the second power supply terminal, a drain connected to the first power supply terminal, and a source connected to the drain of the second MOS transistor, wherein the second constant voltage circuit includes: a second depletion transistor having a threshold different from a threshold of the first depletion transistor, including a gate and a source which are connected to each other, and a drain connected to the first power supply terminal; a third MOS transistor including a gate and a drain which are connected to the gate and the source of the second depletion transistor, and a source connected to the second power supply terminal; a fourth MOS transistor including a gate connected to the gate of the third MOS transistor, a source connected to the second power supply terminal, and a drain connected to an output terminal of the second constant voltage circuit; and a fourth depletion transistor including a gate connected to the second power supply terminal, a drain connected to the first power supply terminal, and a source connected to the drain of the fourth MOS transistor, and wherein the reference voltage circuit generates a reference voltage based on a potential difference between an output voltage of the first constant voltage circuit and an output voltage of the second constant voltage circuit.