Patent ID: 9411633
Filing Date: 2016-08-09
CPC Classification: G06F

Claim Text:
1. A computing system comprising: a memory configured to store a pre-barrier spreading range that identifies a target computing system associated with a barrier command, wherein the memory is configured to store a post-barrier spreading range that includes an indication of at least one of the target computing system and other target computing systems that receive early-forwarded transactions, wherein the early-forwarded transactions comprise transactions that can only be executed after the barrier command is completed; an interface coupled to the memory and configured to send a pre-barrier computing probe to the target computing system identified in the pre-barrier spreading range and receive a barrier completion notification message from the target computing system, wherein the pre-barrier computing probe is configured to instruct the target computing system to monitor a status of a transaction that needs to be executed for the barrier command to be completed, wherein the face is configured to send a post-barrier start notice to at least one of the target computing system and the other target computing systems that receive the early-forwarded transactions when the barrier command is completed; and a processor coupled to the interface and configured to determine a status of the barrier command based on the received barrier completion notification message, wherein the processor is configured to determine that the barrier command is completed when all target computing systems that are sent transactions that need to be executed for the barrier command to be completed have indicated at least one of finished transaction execution and guarantee of finished transaction execution behavior.