Patent ID: 9405679
Filing Date: 2016-08-02
CPC Classification: G06F,G11C,Y02D

Claim Text:
1. A solid state device comprising: a controller; wherein the controller is configured to perform a first division operation that divides a received logical block address that indicates a physical memory block in a memory device of a plurality of memory devices in the solid state device by a number of logical block addresses per page of the physical memory block to obtain a result of the first division operation; wherein the controller is configured to perform a second division operation that divides the obtained result of the first division operation by a number of memory devices in the plurality of memory devices; and wherein the controller is configured to determine a location of the memory device of the plurality of memory devices within the solid state device from a location in a memory device table, wherein the location in the memory device table is identified by a remainder of the second division operation.