Patent ID: 9276020
Filing Date: 2016-03-01
CPC Classification: H01L

Claim Text:
1. A method of manufacturing a display device, comprising: providing a substrate having a transistor region, a pixel region and a capacitor region; forming an active layer on the substrate in the transistor region; forming a lower electrode on the substrate in the capacitor region; sequentially forming a gate insulating layer, an opaque first conductive layer and a second conductive layer on the substrate on which the active layer and the lower electrode are formed; forming a gate electrode and an upper electrode in the transistor region and the capacitor region, respectively, by patterning the first and second conductive layers; implanting a plurality of first impurity ions into the active region using the gate electrode as a mask; forming an interlayer insulating layer on an entire surface of the substrate to cover the gate electrode and the upper electrode; patterning the interlayer insulating layer and portions of the gate insulating layer to expose a portion of the second conductive layer of the upper electrode while simultaneously exposing portions of the active layer at opposite sides of the gate electrode by using a photolithographic technique; forming a third conductive layer on the patterned interlayer insulating layer; forming source and drain electrodes electrically connected to the exposed portions of the active layer while simultaneously exposing a portion the first conductive layer that corresponds to the exposed portion of the second conductive layer by etching, via a photolighography technique, portions of the third conductive layer and the exposed portion of the second conductive layer; and implanting second impurity ions into the lower electrode through the exposed portion of the first conductive layer.