Patent ID: 9482964
Filing Date: 2016-11-01
CPC Classification: G03F

Claim Text:
1. A method for selecting a recipe of measuring an overlap error, comprising: providing a wafer having a pattern layer disposed thereon, the pattern layer having at least one first overlap mark and a second overlap mark, wherein: the first overlap mark comprises at least two sets of X-directional linear patterns having a preset offset a the second overlap mark comprises at least two sets of X-directional linear patterns having a preset offset b using an i using the i in a coordinate system using a preset offset as a first coordinate axis and a measured offset as a second coordinate axis, making a plot by using the preset offset a drawing an ideal line by using two points where the measured offsets ai selecting a preferred line closest to the ideal line among the measurement lines; and using the recipe corresponding to the preferred line to measure a relative offset between layers of another wafer.