Patent ID: 9466616
Filing Date: 2016-10-11
CPC Classification: H01L

Claim Text:
1. A structure comprising: a semiconductor substrate; an isolation layer on the semiconductor substrate; a fin on the isolation layer, the fin comprising a first channel region and a second channel region; a first gate structure on the fin adjacent to the first channel region, the first gate structure comprising a first gate in contact with a side surface and a top surface of the fin and a first spacer surrounding the first gate; a second gate structure on the fin adjacent to the second channel region, the second gate structure comprising a second gate in contact with the side surface and the top surface of the fin and a second spacer surrounding the second gate; a recess in the fin, the recess being positioned laterally between the first channel region and the second channel region and having a bottom that is above and separated from the isolation layer; and, a doped epitaxial source-drain region within the recess, the doped epitaxial source-drain region having a dopant concentration that decreases from a bottom surface of the doped epitaxial source-drain region at the bottom of the recess toward an upper surface of the doped epitaxial source-drain region, the fin further having a first abrupt source-drain junction below the first gate and positioned laterally immediately adjacent to the first channel region and a second abrupt source-drain junction below the second gate and positioned laterally immediately adjacent to the second channel region, wherein portions of the fin between the doped epitaxial source-drain region and the first abrupt source-drain junction and between the doped epitaxial source-drain region and the second abrupt source-drain junction contain dopant atoms diffused from the doped epitaxial source-drain region; and further comprising a buffer layer in the recess located between the doped epitaxial source-drain region and a sidewall of the first gate, between the doped epitaxial source-drain region and a sidewall of the second gate, and between the doped epitaxial source-drain region and the bottom of the recess, the buffer layer having a first facet directly below the first spacer and a second facet directly below the second spacer.