Patent ID: 9384984
Filing Date: 2016-07-05
CPC Classification: H01L

Claim Text:
1. A semiconductor structure, comprising: a substrate; a dielectric layer, disposed on the substrate and having two gate trenches therein; two gate dielectric layers, at least disposed on a bottom of the two gate trenches; a low-resistivity metal layer, disposed in the two gate trenches; a work function metal layer, disposed between the low-resistivity metal layer and the gate dielectric layer, wherein the work function metal layer comprises a first work function metal layer and a second work function metal layer, and a material of the first work function metal layer and a material of the second work function metal layer are different; a silicon-containing top barrier layer, disposed between the low-resistivity metal layer and the work function metal layer, wherein the material of the silicon-containing top barrier layers in both trenches are same, and the silicon-containing top barrier layer comprises titanium silicon nitride (TiSiN); and at least one top barrier layer disposed between the work function metal layer and the silicon-containing top barrier layer, wherein each of the work function metal layer, the at least one top barrier layer and the silicon-containing top barrier layer has a substantially planar surface on the bottom surface of the gate trench.