Patent ID: 9362173
Filing Date: 2016-06-07
CPC Classification: H01L

Claim Text:
1. A method for chip package, comprising: providing a semi-packaged wafer, the semi-packaged wafer having a dicing street and a metal pad; selectively forming a metal electrode on the metal pad; forming a protective layer in area outside the metal electrode on the wafer, the protective layer covering the dicing street, where the protective layer is made of a cured thermosetting epoxy resin comprising a solidified filler which has a particle diameter less than one third of the thickness of the thermosetting epoxy resin before the thermosetting epoxy resin is cured, and wherein the solidified filler has a particle diameter greater than one third of the thickness of the thermosetting epoxy resin after the thermosetting epoxy resin is cured, and wherein the solidified filler is silica solid particles; forming a solder ball on the metal electrode; and dicing the wafer along the dicing street.