Patent ID: 9262982
Filing Date: 2016-02-16
CPC Classification: G06F,G09G

Claim Text:
1. A timing controller for a liquid crystal panel, connected to a level shift circuit connected with a plurality of gate lines, the timing controller comprising: a timing control unit, used for providing a plurality of trigger signals having asynchronous frame rates; a signal receive unit, used for generating a system state transition voltage (STV) signal according to an external input signal; a frame rate detect unit, connected to the signal receive unit and used for analyzing a frequency of the system STV signal, so as to generate a frame rate select information; a select unit, connected to the timing control unit and the frame rate detect unit, and used for selecting one target trigger signal from the trigger signals according to the frame rate select information and outputting the target trigger signal to the level shift circuit; and a signal-time control unit, used for controlling an output time of each trigger signal, so that a liquid crystal unit connected to each gate line has an equal charge time at each trigger signal when a different trigger signal is output.