Patent ID: 9236393
Filing Date: 2016-01-12
CPC Classification: G11C,H01L

Claim Text:
1. A 3D nonvolatile memory, comprising: a semiconductor substrate; a 3D array of memory cells arranged in a three-dimensional pattern on top of said semiconductor substrate; said 3D array of memory cells being organized into a 2D array of NAND strings aligned vertically relative to the substrate, each NAND string comprising a daisy-chain of vertically stacked memory cells; corresponding memory cells of said vertically stacked memory cells from said 2D array of NAND strings forming a 2D array of memory cells in each of a corresponding stack of memory planes; a plurality of word lines in each memory plane for accessing respective groups of memory cells in the memory plane, each word line having a socket component for each memory cell of the group; and said each memory cell of the group having a floating gate embedded into said socket component of said each word line.