Patent ID: 9455244
Filing Date: 2016-09-27
CPC Classification: H01L

Claim Text:
1. A semiconductor package, comprising: a package substrate; a first semiconductor chip on the package substrate, wherein the first semiconductor chip includes a first chip region and first chip pads formed on a top surface of the first chip region; and a second semiconductor chip on the package substrate, wherein the second semiconductor chip includes a second chip region and second chip pads formed on a top surface of the second chip region, wherein the first chip region and the second chip region are divided from each other by a boundary region having a groove; wherein the first chip region, the second chip region and the boundary region share a semiconductor substrate of a one-body type, and wherein an adhesive member is disposed on a bottom surface of the first and second chip regions and the boundary region, and wherein a bottom surface of the groove is disposed above a top surface of the adhesive member.