Patent ID: 9520557
Filing Date: 2016-12-13
CPC Classification: B82Y,G11C,H01L

Claim Text:
1. A semiconductor device comprising: a semiconductor substrate; a first array of electrodes disposed above the semiconductor substrate, wherein the first array of electrodes comprise a first metal-containing material, wherein the first metal is selected from a group consisting of: aluminum, nickel, platinum and tungsten; a second array of electrodes disposed above the first array of electrodes, wherein the second array of electrodes are oriented at an angle with respect to the first array of electrodes, wherein the first array of electrodes and the second array of electrodes overlap at a plurality of intersections, wherein the second array of electrodes comprises a second metal-containing material; and a plurality of resistive switching nanostructures disposed between the first array of electrodes and the second array of electrodes, wherein each resistive switching nanostructure provides a contact point between the first array of electrodes and the second array of electrodes at exactly one intersection from the plurality of intersections, wherein the plurality of resistive switching nanostructures comprises an undoped silicon-containing material having a number of defect sites; and wherein particles of the first metal derived from the first metal-containing material are diffused within defect sites of at least one resistive switching nanostructure from the plurality of resistive switching nanostructures, and wherein the particles of the first metal form a conductive filament within the one resistive switching nanostructure.