Patent ID: 9430148
Filing Date: 2016-08-30
CPC Classification: G06F,G11B,G11C

Claim Text:
1. A method to implement multiplexed communication between a controller and a preamplifier in a storage device, comprising: controlling a bidirectional serial data line of a digital bus to selectively transmit digital signals in either a first direction from the controller to the preamplifier or a second direction from the preamplifier to the controller, in response to a direction control signal, wherein the digital signals transmitted in the first direction include register data, and write mode and read mode control signals, and wherein the digital signals transmitted in the second direction include register read results, and fault polling results; and concurrently transmitting a synchronous clock signal over a clock signal line of the digital bus from the controller to the preamplifier to synchronize transfer and processing of the digital signals transmitted on the bidirectional serial data line of the digital bus, wherein the direction control signal is transmitted from the controller to the preamplifier on one of the bidirectional serial data line and the clock signal line of the digital bus.