Patent ID: 9373649
Filing Date: 2016-06-21
CPC Classification: G02F,H01L

Claim Text:
1. An array substrate, including a base substrate, and a thin film transistor and driving electrodes provided on the base substrate, the thin film transistor including a gate, a gate insulating layer, an active layer, a source and a drain, and the driving electrodes including a slit-shaped electrode and a plate-shaped electrode which are provided in different layers and at least partially overlap with each other in the orthographic projection direction, wherein the source, the drain and the active layer are formed so that part of their bottom surfaces are located in the same lane and a resin layer is provided between the thin film transistor and the plate-shaped electrode; wherein the gate is provided on the base substrate, the gate insulating layer is provided on the gate, the source and the drain are provided on the gate insulating layer with an interval therebetween, the source and the drain partially overlap with the gate in the orthographic projection direction, respectively, and the active layer is provided within a spacer region formed between the source and the drain, and extends to a top surface of the source and a top surface of a part of the drain so that bottom surfaces of the source, the drain and a art of the active layer are all located on a top surface of the gate insulating layer; wherein a first protection layer is provided on the active layer, and the first protection layer and the active layer completely overlap with each other in the orthographic projection direction.