Patent ID: 9281395
Filing Date: 2016-03-08
CPC Classification: H01L

Claim Text:
1. A method of fabricating a semiconductor device, comprising: forming a lateral double diffused metal oxide semiconductor field effect transistor (LDMOS) device in a first region of the semiconductor device; and forming a complementary MOS (CMOS) device in a second region of the semiconductor device, wherein the forming of the LDMOS device includes: forming a field relief oxide layer, an N type well region, and a P type well region; forming a gate insulating layer on the N type well region and the P type well region, the gate insulating layer on the P type well region having non-uniform thickness; forming an LDMOS gate electrode on the gate insulating layer; forming a source region in the P type well region; and forming a drain region in the N type well region, and wherein the P type well region of the LDMOS device and a P type well region of the CMOS device are formed in the same process step and have substantially the same depth, and the N type well region of the LDMOS device and an N type well region of the CMOS device are formed in the same process step and have substantially the same depth.