Patent ID: 9276573
Filing Date: 2016-03-01
CPC Classification: H03K

Claim Text:
1. A Field Programmable Gate Array (FPGA) of the island-type comprising a plurality of cluster-based Configurable Logic Blocks (CLBs), wherein each of the cluster-based CLBs is surrounded by a global routing structure formed by a plurality of multiplexers and pass/transmission-gates organized in Switch Boxes (SBs) and Connection Blocks (CBs), the switch boxes and the connection blocks comprising at least a first plurality of resistive memories inserted in a data path of a first routing architecture of the switch boxes and the connection blocks, wherein each CLB contains Basic Logic Elements (BLEs), as well as local routing resources, each switch box and connection block comprises at least a group of the plurality of multiplexers, arranged to realize at least an interconnection.