Patent ID: 9294224
Filing Date: 2016-03-22
CPC Classification: G06F,H03M,H04L

Claim Text:
1. A method comprising: receiving a constrained codeword from a non-volatile memory (NVM) via a channel, wherein the NVM is a multi-level cell memory in which cells that store different bit combinations are accessible with different voltage levels and wherein data content of the NVM is organized into pages of information where bits of a same bit combination map to a different page, the constrained codeword including an appended bit-stream; and decoding the received constrained codeword with the use of voltage level information for some but not all of the pages by reconstructing the appended bit-stream and invoking a synchronization procedure that applies a maximum-likelihood (ML) estimator to estimate locations of any insertion, deletion, or error in the reconstructed appended bit-stream.