Patent ID: 9530797
Filing Date: 2016-12-27
CPC Classification: H01L,H03K

Claim Text:
1. A semiconductor switch on an SOI substrate that includes a supporting substrate, an insulating layer on the supporting substrate, and a semiconductor layer provided on the insulating layer, the semiconductor switch comprising: a first through FET group and a second through FET group, each including a plurality of field effect transistors connected in series between a common node and, respectively, a first or a second node, wherein an area of the first through FET group is equal to or less than an area Sfet, wherein the area Sfet is a function of an on-state resistance Ron of the first through FET group in a conductive state, a sum Ctotal of off-capacitances of any through FET groups in the semiconductor switch in a non-conductive state, and resistivity ρs of the supporting substrate, and the area Sfet satisfies: where a unit of the resistivity ρs is in Ωcm, a unit of the on-state resistance Ron is in Ω, a unit of the sum Ctotal of the off-capacitances is in pF, a unit of the area Sfet in cm 2 , and a, b, c, d, e, and f are constants.