Patent ID: 9349862
Filing Date: 2016-05-24
CPC Classification: H01L

Claim Text:
1. A method of fabricating a semiconductor device comprising: forming a gate having a first material on a substrate; forming a layer of a second material overlaying the gate; forming sidewall spacers on opposite sides of the gate; changing a characteristic of a first portion of the substrate adjacent to the sidewall spacers using the layer of the second material and the sidewall spacers as a mask, wherein changing the characteristic of the first portion of the substrate includes performing an oxidation process on the first portion of the substrate so as to facilitate removal of the oxidized first portion of the substrate; performing an isotropic wet etching process to remove the oxidized first portion of the substrate to form a substantially rectangular recess in the substrate, the rectangular recess having an inner wall; and performing an orientation selective wet etching process on the rectangular recess to shape the inner wall of the rectangular recess so as to cause the inner wall of the rectangular recess to be of a sigma shape.