Patent ID: 9509437
Filing Date: 2016-11-29
CPC Classification: B41J,H03M,H04J,H04L

Claim Text:
1. A system comprising: a plurality of conductors configured to receive a set of input data bits; a pre-encoder configured to map the set of input data bits into symbols of a pre-code codeword of a pre-code, wherein the pre-code comprises a constrained set of vectors determined from a maximal set of vectors, and wherein the pre-code is associated with a constrained post-transformation alphabet comprising a portion of low magnitude symbol values selected from an unconstrained post-transformation alphabet associated with the maximal set of vectors, wherein each vector in the constrained set has values selected from a constellation of PAM-M values, wherein M is an integer greater than or equal to 3; an encoder configured to generate a constrained-alphabet codeword of a constrained-alphabet vector signaling code, the constrained-alphabet codeword representing a transformation of the pre-code codeword with a first non-simple orthogonal matrix, wherein the constrained-alphabet codeword comprises symbols of the constrained post-transformation alphabet; and, a driver configured to transmit the constrained-alphabet codeword on a multi-wire communication bus.