Patent ID: 9496362
Filing Date: 2016-11-15
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor device, the method comprising: forming a plurality of sacrificial gates on a channel region of a substrate; growing epitaxial layers on one or more source-drain areas between the sacrificial gates by an epitaxial growth process; depositing a contact liner; depositing a contact material; partially removing the liner and the contact material, such that the liner and the contact material are removed from above the sacrificial gates; blocking one or more contact areas with one or more masking materials to create exposed contact material and blocked contact material; etching a portion of the exposed contact material; removing the masking material; partially recessing the contact material such that the contact areas have contact material that is at a height that is lower than a target metal gate height; depositing a nitride liner; depositing an oxide layer on the nitride liner; removing the sacrificial gate, thereby leaving an opening in area channel region; forming a metal gate and an insulator on the channel region; recessing the metal gate to a height that is above a height of the oxide layer in between the gates; and partially recessing the insulator material and the metal gate material to the target metal gate height and forming a cap over the metal gate.