Patent ID: 9337119
Filing Date: 2016-05-10
CPC Classification: H01L

Claim Text:
1. A semiconductor die assembly, comprising: a package support substrate; a first semiconductor die electrically mounted to the package support substrate, the first die having a stacking site and a peripheral region extending laterally from the stacking site; a plurality of second semiconductor dies stacked on each other, wherein a bottom second semiconductor die is attached to the stacking site of the first die; a thermal transfer structure attached to the peripheral region of the first die, the thermal transfer structure having a cavity in which the second dies are positioned and an inlet; and an underfill material in the cavity, wherein the underfill material has a fillet between the second semiconductor dies and the thermal transfer structure caused by injecting the underfill material into the cavity through the inlet such that at least a portion of the fillet extends upward along the thermal transfer structure.