Patent ID: 9496383
Filing Date: 2016-11-15
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a semiconductor substrate having a first gate groove; a first fin structure underneath a top of the first gate groove; a second gate groove in the semiconductor substrate running generally parallel to said first gate groove; a second fin structure underneath a top of the second gate groove; a first gate insulating film that covers the first gate groove and a surface of the first fin structure; a second gate insulating film that covers the second gate groove and a surface of the second fin structure; a first gate electrode on the first gate insulating film in a lower portion of the first gate groove, the first gate electrode extending over the first fin structure; a second gate electrode on the second gate insulating film in a lower portion of the second gate groove, the second gate electrode extending over the second fin structure; a first diffusion region in the semiconductor substrate, the first diffusion region covering an upper portion of a first side of the first gate groove; a second diffusion region in the semiconductor substrate, the second diffusion region covering a second side of the first gate groove, the second diffusion region also covering a second side of the second gate groove; a third diffusion region in the semiconductor substrate covering an upper portion of a first side of the second gate groove, wherein a bottom of the second diffusion region is shallower than a bottom of the first fin structure, and wherein the bottom of the second diffusion region is deeper than a top of the first fin structure.