Patent ID: 9515053
Filing Date: 2016-12-06
CPC Classification: G11C,H01L

Claim Text:
1. A microelectronic package, comprising: a microelectronic element having a face and clement contacts exposed at the face, the microelectronic element having memory storage array function; a substrate having first and second opposed surfaces, the substrate having a set of substrate contacts exposed at the first surface facing the element contacts of the microelectronic element and joined to the element contacts; and terminals exposed at the second surface configured for connecting the microelectronic package with at least one component external to the package, the terminals electrically connected with the substrate contacts and including first terminals, the first terminals including a first set disposed on a first side of a theoretical axis and a second set disposed on a second side of the theoretical axis opposite from the first side, each of the first and second sets being configured to carry address information, the terminals including second terminals, the second terminals including a third set disposed on the first side of the theoretical axis and a fourth set disposed on the second side of the theoretical axis, each of the third and fourth sets being configured to carry second information, the second information being other than the information carried by the first terminals, the second information including data signals, wherein the first and second sets separate the third and fourth sets from one another, wherein the signal assignments of the first terminals in the first set are a mirror image of the signal assignments of the first terminals in the second set.