Patent ID: 9319097
Filing Date: 2016-04-19
CPC Classification: G01S,H04B

Claim Text:
1. A delay lock loop (DLL) for tracking a code phase delay value for a local code to be correlated with a received cosine or sine binary offset carrier (BOC)-modulated signal, in which N pulses successively occur in a single period T c of a spreading code chip, in a spread spectrum signal receiver system, the DLL comprising: a local signal generation unit configured to generate an early local signal pair and a late local signal pair each having a phase delay value τ and a delay value difference Δ based on a first and second local signal pair g 1 (τ;a) and g 2 (τ;a) defined by first and last pulses of a signal pulse train, received during a single period of a sub-carrier of the received signal, and a given main peak shape parameter a; early and late correlation units configured to generate an early sub-correlation function pair and a late sub-correlation function pair by performing correlation operations of the early and late mixing signal pairs with respect to a total time T(0≦t≦T); early and late combination units configured to generate an early main correlation function and a late main correlation function each having a main peak by performing elimination operations on the early sub-correlation function pair and the late sub-correlation function pair; and a numerical control oscillator (NCO) configured to determine a phase delay value τ of a first and second local signal pair for the received signal based on a filtered discrimination output, and to output the determined phase delay value τ to the local signal generation unit, wherein the elimination operation is an operation that satisfies |x|+|y|−|x−y|=0 for real numbers x and y, and wherein T