Patent ID: 9502577
Filing Date: 2016-11-22
CPC Classification: H01L

Claim Text:
1. A method for manufacturing an oxide thin film transistor array substrate, comprising a step of forming an oxide thin film transistor on a base substrate, wherein the oxide thin film transistor comprises a gate electrode, a gate insulating layer, an oxide active layer pattern, a source electrode and a drain electrode, wherein the step of forming the oxide thin film transistor on the base substrate comprises: forming the gate electrode on the base substrate; forming the gate insulating layer on the base substrate formed with the gate electrode; forming the source electrode and the drain electrode on the base substrate formed with the gate insulating layer; and forming the oxide active layer pattern on the base substrate formed with the source electrode and the drain electrode, wherein the step of forming the source electrode and the drain electrode on the base substrate formed with the gate insulating layer comprises: forming a first buffer layer, a source/drain metal layer and a second buffer layer in turn on the base substrate formed with the gate insulating layer; coating a photoresist on the second buffer layer; exposing and developing the photoresist, to form a photoresist-remained region and a photoresist-removed region, wherein the photoresist-remained region corresponds to a region where the source electrode and the drain electrode are located, and the photoresist-removed region corresponds to other regions; etching off the second buffer layer, the source/drain metal layer and the first buffer layer at the photoresist-removed region completely via an etching process; and peeling off the remaining photoresist to form a pattern comprising the source electrode and the drain electrode.