Patent ID: 9257940
Filing Date: 2016-02-09
CPC Classification: H03F

Claim Text:
1. A power amplifier system comprising: a first power amplifier configured to receive a power amplifier supply voltage, the first power amplifier having an enabled state and a disabled state; a supply control circuit configured to control a voltage level of the power amplifier supply voltage; a first switchable capacitor; a first field effect transistor (FET) electrically connected in series with the first switchable capacitor between the power amplifier supply voltage and a first voltage; and a power amplifier control circuit configured to control a voltage level of a gate of the first FET, the power amplifier control circuit configured to bias the first FET in a linear mode of operation when the first power amplifier is enabled to provide stability to the first power amplifier, the power amplifier control circuit further configured to turn off the first FET when the first power amplifier is disabled to reduce a capacitive loading of the supply control circuit.