Patent ID: 9489903
Filing Date: 2016-11-08
CPC Classification: G02F,G09G,G11C

Claim Text:
1. A display device comprising: a data-holding circuit having a capacitance; a display portion having a plurality of pixel electrodes; a first carrier substrate on which the data-holding circuit and the display portion are formed; a second carrier substrate that is disposed opposite to the first carrier substrate being placed above the display portion, an opposing substrate being absent above an area in which the data-holding circuit is disposed; and a transmission control portion, wherein the capacitance is provided with a sense amplifier circuit for amplifying and latching the magnitude of the electric potential between two bit lines; wherein the sense amplifier circuit comprises a low-amplitude preamp circuit connected between the bit lines, and a full-swing amplifier circuit that is connected between the bit lines and that amplifies the magnitude of electric potential that is amplified by the low-amplitude preamp circuit; the low-amplitude preamp circuit includes a plurality of MOS type transistors, the gate of a first MOS type transistor among the plurality of MOS type transistors connecting to a first bit line among the bit lines, and the gate of a second MOS type transistor among the plurality of MOS type transistors connecting to a second bit line among the bit lines; wherein the transmission control portion is configured to control a first connection that connects the gate of the first MOS type transistor with the first bit line and a second connection that connects the gate of the second MOS type transistor with the second bit line, disconnect the first connection and the second connection before the full-swing amplifier circuit operates, and disconnect signal transmission between the low-amplitude preamp circuit and the full-swing amplifier circuit.