Patent ID: 9514696
Filing Date: 2016-12-06
CPC Classification: G02F,G09G,G11C,H01L

Claim Text:
1. A driver circuit comprising: m shift register units; m demultiplexer circuits electrically connected to the m shift register units; and n signal lines, wherein m is a natural number of three or more, wherein n is a natural number of four or more, wherein a semiconductor element including silicon is comprised in at least one of the m shift register units and the m demultiplexer circuits, wherein each of the m shift register units is electrically connected to one to (n−1) signal lines, wherein each of the m demultiplexer circuits is electrically connected to one to (n−3) signal lines, wherein one of outputs of (m−2)th demultiplexer circuit is input to (m−1)th shift register unit, wherein one of outputs of m-th demultiplexer circuit is input to (m−1)th shift register unit, and wherein the silicon is polycrystalline silicon.