Patent ID: 9525132
Filing Date: 2016-12-20
CPC Classification: H01L

Claim Text:
1. A method for fabricating a phase change memory device, comprising: providing a baseplate containing at least one bottom electrode and exposing a top surface of said at least one bottom electrode; forming a second dielectric layer on said baseplate, wherein said second dielectric layer covers said at least one bottom electrode; forming a sacrifice layer on said second dielectric layer; forming a first mask on said sacrifice layer; patterning said first mask and said sacrifice layer to form a patterned first mask and a patterned sacrifice layer, wherein a projection of a bottom of said patterned sacrifice layer covers said top surface of said at least one bottom electrode; removing a portion of said patterned sacrifice layer to form a narrowed sacrifice layer, wherein a width of said narrowed sacrifice layer is smaller than a width of said patterned first mask; removing said patterned first mask; forming a second mask on said second dielectric layer to cover said narrowed sacrifice layer; thinning said second mask to expose said narrowed sacrifice layer; removing said narrowed sacrifice layer to pattern said second mask; forming at least one through-hole penetrating said second dielectric layer and exposing said at least one bottom electrode according to said patterned second mask; and filling an electric-conduction material into said at least one through-hole, wherein said electric-conduction material is electrically connected with said at least one bottom electrode.