Patent ID: 9356115
Filing Date: 2016-05-31
CPC Classification: H01L

Claim Text:
1. A method of manufacturing a semiconductor device, comprising: providing a semiconductor substrate having a first semiconductor element provided in a first region on one side of the semiconductor substrate, and a second semiconductor element provided in a second region on another side of the semiconductor substrate to be side-by-side with the first semiconductor element, the semiconductor substrate being a semiconductor substrate of a first conduction type that is provided with an insulated gate structure as a top surface element structure of the first semiconductor element, the insulated gate structure including a base region of a second conduction type, an emitter region of the first conduction type and a gate electrode, that is provided with an anode region of the second conduction type as a top surface element structure of the second semiconductor element, that is provided with a collector region of the second conduction type as a bottom surface element structure of the first semiconductor element, and that is provided with a cathode region of the first conduction type as a bottom surface element structure of the second semiconductor element; preparing a light ion source and a mask; shielding the first region by providing a mask on a top surface of the semiconductor substrate on said one side of the semiconductor substrate; irradiating the top surface of the semiconductor substrate with light ions by operating a light ion source to introduce lattice defects at a specified depth within the second region through the top surface of the semiconductor substrate; and irradiating a bottom surface of the semiconductor substrate with light ions by operating the light ion source to introduce lattice defects at a specified depth on the entire bottom surface within the semiconductor substrate; wherein the first semiconductor element has a minimum carrier lifetime value that is longer than that of the second semiconductor element; wherein the anode region of the second semiconductor element has a carrier lifetime that is made shorter during irradiating the top surface of the semiconductor substrate (a) than that of the emitter region of the first semiconductor element which is protected by the mask during irradiating, and (b) than that of the cathode region of the second semiconductor element; wherein the collector region has a carrier lifetime that is made shorter during irradiating the entire bottom surface of the semiconductor substrate than that of the cathode region, and wherein the first semiconductor element includes an IGBT region, the second semiconductor element includes an FWD region, and the semiconductor substrate has a drift region in which is defined a depth region formed at a predetermined depth, D, that includes at least a portion of the IGBT region and at least a portion of the FWD region, the depth region having a carrier lifetime that is shortened in both the IGBT region and the FWD region to provide respective short carrier lifetime regions, provided that the short carrier lifetime region of the IGBT region has a rear surface having a depth that is greater than that of the short carrier lifetime region of the FWD region.