Patent ID: 9436790
Filing Date: 2016-09-06
CPC Classification: G06F,H03K

Claim Text:
1. A method for generating and transforming an integrated circuit design layout, the method comprising: generating an initial layout including first circuit units configured to obtain power from a first power supply structure; generating second circuit units configured to obtain power from a second power supply structure, the second circuit units being included among the first circuit units; movingly grouping the second circuit units spatially together into a matrix configuration that comprises at least two horizontally-extending rows of the second circuit units and at least two horizontally-extending columns of the second circuit units, and wherein the second circuit units are located directly under and vertically below a horizontally-extending conductive layer of the second power supply structure; interconnecting the grouped second circuit units with a grid that includes connecting the grid to the second power supply structure with cross-layer connections, in which each of the cross-layer connections extends vertically upward from a respective one of the second circuit units to the conductive layer; wherein the generating of the second circuit units, the movingly grouping and the interconnecting are performed by one or more processors.