Patent ID: 9501997
Filing Date: 2016-11-22
CPC Classification: G09G,G11C,H03K

Claim Text:
1. A gate driver, comprising: a shift register, a level converter, a shutdown voltage detection circuit and a shutdown residual elimination functional circuit connected to the shutdown voltage detection circuit, wherein the shutdown voltage detection circuit is used for detecting a voltage state at present and outputting a control signal to the shutdown residual elimination functional circuit based on the voltage state, and the shutdown residual elimination functional circuit is used for outputting a shutdown residual elimination signal according to the control signal, the shutdown voltage detection circuit comprises a comparison unit and a conversion unit, the comparison unit is used to compare an inputted voltage and a reference voltage to obtain a comparison result, and comprises an input terminal, a grounded terminal and an output terminal; and the conversion unit is used to perform a signal conversion of the comparison result outputted from the comparison unit, and comprises a first input terminal, a second input terminal, a grounded terminal and an output terminal, wherein the first input terminal is connected to the output terminal of the comparison unit, the shutdown residual elimination functional circuit includes a plurality of identical logic circuits for controlling thin film transistors on respective gate lines to be turned on or off, wherein the logic circuit includes a first input terminal, a second input terminal and an output terminal, the first input terminal of the logic circuit is connected to the output terminal of the conversion unit, the second input terminal of the logic circuit is connected to the shift register, and the output terminal of the logic circuit is connected to the level converter.