Patent ID: 9362373
Filing Date: 2016-06-07
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a semiconductor substrate of a first conductivity type; a semiconductor region of second conductivity type formed on a surface of the semiconductor substrate; a plurality of trenches formed through the semiconductor region of second conductivity type into the semiconductor substrate, the trenches extending in parallel to each other in a planar pattern; a first electrode in the trench with a gate insulator film interposed therebetween; an interlayer insulator film on the semiconductor region of second conductivity type; a second electrode on the interlayer insulator film, the second electrode being connected to the second semiconductor region via a contact hole formed in the interlayer insulator film; the contact hole being in contact with the surface of the semiconductor substrate, and comprising a first opening which is adjacent the second electrode and a second opening which is adjacent the semiconductor region of second conductivity type, the first and second openings being connected; the first opening having, in a direction perpendicular to an extending direction of the trenches, a first opening width which is adjacent to the second electrode and a second opening width which is adjacent to the second opening, the first opening width being wider than the second opening width; the second opening, in a direction perpendicular to the extending direction of the trenches, having a width which is equal to the second opening width of the first opening; and a thickness of the interlayer insulator film is 0.28 times or less as large as the first opening width of the first opening, wherein the thickness of the interlayer insulator film is 0.6 times or more as large as the second opening width of the first opening and the first opening depth is from 50% to 60% of the interlayer insulator film thickness.