Patent ID: 9484429
Filing Date: 2016-11-01
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a semiconductor device, comprising: forming a first semiconductor layer; forming a second semiconductor layer on the first semiconductor layer, the second semiconductor layer having a band gap narrower than a band gap of the first semiconductor layer and including a region containing an acceptor in a part of the second semiconductor layer in contact with the first semiconductor layer; forming a third semiconductor layer on the second semiconductor layer, the third semiconductor layer having a band gap wider than or equal to the band gap of the second semiconductor layer; exposing the region containing the acceptor by removing a part of the third semiconductor layer and a part of the second semiconductor layer; activating the acceptor in the region; and forming a first electrode and a second electrode on the third semiconductor layer, forming a control electrode between the first electrode and the second electrode, and forming a third electrode on the region.