Patent ID: 9530345
Filing Date: 2016-12-27
CPC Classification: G09G,G11C

Claim Text:
1. A gate drive on array GOA unit, comprising a first node control unit, a second node control unit and an output unit; wherein the first node control unit is connected to a first input terminal, a second input terminal, a first level terminal, a second level terminal, a first node, a second node and a fourth level terminal, and is configured to pull a voltage at the first node to a voltage at the first level terminal under the control of a signal at the first input terminal, or pull the voltage at the first node to a voltage at the second level terminal under the control of a signal at the second input terminal; the second node control unit is connected to the first level terminal, the second level terminal, a third level terminal, the fourth level terminal, a second clock signal terminal, a third clock signal terminal, the first node and the second node, and is configured to pull a voltage at the second node to a voltage at the third level terminal under the control of the first level terminal, the second level terminal, the second clock signal terminal and the third clock signal terminal, or pull the voltage at the second node to a voltage at the fourth level terminal under the control of the first node; the output unit is connected to an output terminal, a first clock signal terminal, the first node, the second node and the fourth level terminal, and is configured to output a signal at the first clock signal terminal to the output terminal as a gate driving signal under the control of the first node, or pull the voltage at the output terminal to the voltage at the fourth level terminal under the control of the second node.