Patent ID: 9444471
Filing Date: 2016-09-13
CPC Classification: H03D,H03L

Claim Text:
1. A phase detector for generating a phase difference signal indicative of a phase difference between a first bi-level signal of frequency F1 and a second bi-level signal of frequency F2, comprising: a first detector input for receiving the first bi-level signal; a second detector input for receiving the second bi-level signal; a first flip-flop; a second flip-flop; a NAND gate; a first overphase detection unit; and a second overphase detection unit, wherein: the second detector input is connected to a clock input of the second flip-flop, a direct output of the first flip-flop is connected to a first input of the NAND gate, a direct output of the second flip-flop is connected to a second input of the NAND gate, an output of the NAND gate is connected to an inverse input of the first flip-flop and to an inverse input of the second flip-flop, an output of the first overphase detection unit is connected to a direct input of the second flip-flop and is arranged to output the level “1” in response to F1≦F2 and the level “0” in response to F1>F2, and an output of the second overphase detection unit is connected to a direct input of the first flip-flop and is arranged to output the level “1” in response to F2≦F1 and the level “0” in response to F2>F1.