Patent ID: 9385192
Filing Date: 2016-07-05
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a substrate comprising a set of trenches and a plurality of fins; a first liner layer disposed over the substrate in each of the set of trenches and up to a first height of each of the plurality of fins; a second liner layer disposed over the first liner layer in each of the set of trenches and up to a second height of each of the plurality of fins, wherein the second height is lower than the first height; a first fill material disposed over the second liner layer in each of the set of trenches and up to the second height of each of the plurality of fins; a silicon layer disposed over the first liner layer, the first fill material, and each of the plurality of fins; and a second fill material disposed over the silicon layer in each of the set of trenches.