Patent ID: 9265146
Filing Date: 2016-02-16
CPC Classification: H05K,Y10T

Claim Text:
1. A method for manufacturing a multi-layer circuit board, comprising: providing three copper dad laminates, each copper clad laminate including a first copper layer, a second copper layer and an insulating layer arranged between the first copper layer and the second copper layer; selectively removing portions of the first copper layer of each copper clad laminate to obtain a first trace layer, and selectively removing portions of second copper layer of each copper clad laminate to obtain a second trace layer, thereby obtaining three first circuit substrates; laminating a dielectric layer on each first trace layer of two of the first circuit substrates, thereby obtaining two second circuit substrates; forming a first metal bump on the first trace layer and a second metal bump on the second trace layer of the remaining one of the three first circuit substrate, thereby obtaining a third circuit substrate; stacking and laminating the third circuit substrate between the two second circuit substrates, the dielectric layers of the second circuit substrates adjacent to the third circuit substrate, the first metal bump and the second metal bump passing through the dielectric layers and electrically connected to the first trace layers of the second circuit substrates.