Patent ID: 9343527
Filing Date: 2016-05-17
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a semiconductor substrate including a base, an insulating layer on the base, and a semiconductor layer on the insulating layer; a semiconductor element formed on the semiconductor layer; and an isolation film, which is continuous between an upper surface of the isolation film and a bottom surface of the isolation film, buried in a groove formed in the semiconductor layer, the insulating layer, and the base in an isolation region, wherein an oxidation resistant film is interposed between the insulating layer and the isolation film, the oxidation resistant film is in direct contact with the insulating layer and the base in the isolation region, a portion of the semiconductor layer exposed to a first side surface of the groove is in direct contact with an upper portion of the isolation film, a portion of the base exposed to a bottom surface of the groove is in direct contact with a lower portion of the isolation film, and the insulating layer adjacent to the first side surface of the groove is not in direct contact with the isolation film.