Patent ID: 9304902
Filing Date: 2016-04-05
CPC Classification: G06F

Claim Text:
1. A system comprising: first I/O circuitry; a first server configured to provide a root complex; first reconfigurable circuitry; an array of flash storage devices; and a first hierarchical serial interconnect network that includes the root complex, the reconfigurable circuitry, a switch circuitry, and a plurality of serial data communication paths; wherein the first hierarchical serial interconnect network includes a network interface tier that includes first switch circuitry and a serial communication path that interconnects the first switch circuitry and the first I/O circuitry, which is coupled as an endpoint to the network; wherein the first hierarchical serial interconnect network includes the first reconfigurable circuitry; wherein the first hierarchical serial interconnect network includes a storage tier that includes second switch circuitry and a serial communication path that interconnects the second switch circuitry and a flash storage device of the array of the flash storage devices, which is coupled as an endpoint to the network; wherein the first hierarchical serial interconnect network includes a serial communication path that interconnects the first switch circuitry and the first server; wherein the first hierarchical serial interconnect network includes a serial communication path that interconnects the first switch circuitry and the reconfigurable circuitry layer; and wherein the first hierarchical serial interconnect network includes a serial communication path that interconnects the reconfigurable circuitry layer and the second switch circuitry; wherein the first server is configured to designate a first interconnect address space for use during transfer of data over the first hierarchical serial interconnect network between the endpoints, including the I/O circuitry and the flash storage devices; and wherein the first reconfigurable circuitry is configured to translate data addresses during transfers of data between the I/O circuitry and the array of flash storage devices.