Patent ID: 9454418
Filing Date: 2016-09-27
CPC Classification: G06F

Claim Text:
1. A method for testing processors, the method comprising: generating, from a set of input bits, a first set of machine data bits in a first processor and a second set of machine data bits in a second processor dissimilar to the first processor; comparing the first set of machine data bits with the second set of machine data bits to output a first comparison result; generating, from a third set of machine data bits, a first set of machine result bits in the first processor and a second set of machine result bits in the second processor; comparing the first set of machine result bits with the second set of machine result bits to output a second comparison result; generating, from a fourth set of machine data bits, a first set of output bits in the first processor and a second set of output bits in the second processor; comparing the first set of output bits with the second set of output bits to output a third comparison result; and determining whether the first processor and the second processor operate substantially similar to each other based on at least one of the first, second, and third comparison results, wherein each of the set of input bits, the first set of output bits, and the second set of output bits has fewer bits than each of the first set of machine data bits, the second set of machine data bits, the first set of machine result bits, and the second set of machine result bits.