Patent ID: 9466976
Filing Date: 2016-10-11
CPC Classification: H02H

Claim Text:
1. A circuit for suppressing transient voltage pulses, comprising: a power line adapted to connect a voltage source to a protected device; a grounded chassis line; an activation network having a first terminal connected to the power line, a second terminal connected to the chassis line, an input terminal, and an output terminal; a semiconductor switch having a first terminal connected to the power line, a second terminal connected to a short circuit monitor node, and a gate or base connected to the activation network output terminal; a fault indicator having a first terminal connected to the power line and a second terminal connected to the short circuit monitor node; and a circuit disconnection element having a first terminal connected to the short circuit monitor node and a second terminal connected to the chassis line; wherein a stimulus voltage source is connected to the activation network input terminal.