Patent ID: 9407282
Filing Date: 2016-08-02
CPC Classification: H03M,H04B,H04W

Claim Text:
1. A continuous-time delta-sigma (ΔΣ) analog-to-digital converter (ADC), comprising: a sampled quantizer arranged to generate samples y(n) of a digital output signal of the ΔΣ-ADC at sample instants nT, where n is an integer sequence index and T is a sampling period, based on an analog input signal to the quantizer; one or more digital-to-analog converters (DACs), each arranged to generate an analog feedback signal based on the samples of the digital output signal generated by the sampled quantizer; and a continuous-time analog network arranged to generate the analog input signal to the quantizer based on the feedback signal(s) from the one or more DACs and an analog input signal to the ΔΣ-ADC; wherein at least one DAC of the one or more DACs comprises two switched-capacitor DACs arranged to operate on the same input but with a mutual delay in time.