Patent ID: 9286157
Filing Date: 2016-03-15
CPC Classification: G06F,G11C

Claim Text:
1. An address detection circuit comprising: first to N-th address storage units suitable for storing an address; first to N-th calculation units each suitable for performing a counting operation when an address is stored in a corresponding address storage unit among the address storage units or the address stored in the corresponding address storage unit is inputted; a control unit suitable for sequentially storing an input address in the address storage units, and storing the input address in an address storage unit corresponding to a calculation unit having the smallest output value among the calculation units in case where all of the address storage units each store an address and an address different from the addresses stored in the address storage units is inputted; and a detection unit suitable for detecting an address, which is inputted a reference number of times or more, among the addresses stored in the address storage units, based on outputs of the calculation units.