Patent ID: 9323703
Filing Date: 2016-04-26
CPC Classification: G06F

Claim Text:
1. A computer-implemented method to provide request-grant-accept arbitration between at least an input arbiter and an output arbiter in a distributed switch, the input arbiter operatively connected to a group of input ports of the distributed switch, the output arbiter operatively connected to a group of output ports of the distributed switch, the computer-implemented method comprising: receiving, for each of at least one input port of the group of input ports, a respective request specifying for the respective input port to be allocated a clock cycle in which to send data to the group of output ports, wherein the respective request is received from the input arbiter and by the output arbiter; issuing a grant of the request of a primary input port at each of a first predefined count of consecutive clock cycles, the primary input port comprising a first input port of the at least one input port, wherein the grant is issued by the output arbiter and to the input arbiter; and upon determining, subsequent to the first predefined count of consecutive clock cycles elapsing, that the input arbiter has not yet accepted any grant of the request of the primary input port, issuing a grant at each of a second predefined count of consecutive clock cycles and by operation of one or more computer processors, comprising alternating between issuing a grant of the request of the primary input port and issuing a grant of the request of an alternate input port, respectively.