Patent ID: 9496237
Filing Date: 2016-11-15
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a semiconductor chip; and a plurality of electrical contact pads disposed on a main face of the semiconductor chip, wherein the electrical contact pads comprise a top layer stack, each top layer stack in the plurality comprising a plurality of layers arranged in the same order, and wherein the electrical contact pads are both solderable and wire bondable, wherein a first group of the electrical contact pads has first lateral dimensions and a second group of electrical contact pads has second lateral dimensions, wherein the first lateral dimensions are smaller than the second lateral dimensions, wherein the first group of the electrical contact pads is disposed at a center of the semiconductor chip, and wherein the second group of the electrical contact pads forms a ring disposed at a periphery of the semiconductor chip that encloses the first group of the electrical contact pads.