Patent ID: 9245905
Filing Date: 2016-01-26
CPC Classification: H01L

Claim Text:
1. A back plane, comprising a substrate; a first transistor and a second transistor disposed on the substrate, wherein the first transistor is a driving transistor comprising: a first gate electrode formed on the substrate; a first gate insulating layer formed on the substrate covering the first gate electrode; a first active layer formed on the first gate insulating layer, the first active layer corresponding to the first gate electrode; a first active insulation layer formed on the first gate insulating layer covering the first active layer, the first active insulation layer including a first hole and a second hole each exposing portions of the first active layer; and a first source electrode and a first drain electrode formed on the first active insulation layer respectively filling the first hole and the second hole and contacting the exposed portions of the first active layer, and wherein the second transistor is a switching transistor comprising: a second gate electrode formed on the substrate; a second gate insulating layer formed on the substrate covering the second gate electrode; a second active layer formed on the second gate insulating layer, the second active layer corresponding to the second gate electrode; a second active insulation layer disposed entirely on a central portion of the second active layer, wherein the second active insulation layer is narrower in length than the second active layer; and a second source electrode and a second drain electrode formed on the second gate insulating layer contacting portions of the second active layer, wherein the first transistor and the second transistor have different structures from each other, and an overall size of the second transistor is smaller than an overall size of the first transistor.