Patent ID: 9514563
Filing Date: 2016-12-06
CPC Classification: G06T

Claim Text:
1. A method of operating a tile-based graphics processing pipeline that comprises: a plurality of processing stages, including at least a rasteriser that rasterises input primitives to generate graphics fragments to be processed, each graphics fragment representing one or more sampling positions, and a renderer that processes fragments generated by the rasteriser to generate rendered fragment data; a tile buffer configured to store rendered fragment data locally to the graphics processing pipeline prior to that data being written out to an external memory; and a write out stage configured to write data stored in said tile buffer to an external memory; the method comprising: the graphics processing pipeline, when processing a set of tiles to generate an output, each tile comprising an array of plural sampling positions: performing a processing operation for plural sampling positions of a first tile of the set of tiles by: performing said processing operation for plural sampling positions of another tile of the set of tiles by: