Patent ID: 9431364
Filing Date: 2016-08-30
CPC Classification: H01L

Claim Text:
1. A multi-chip package, comprising: a first semiconductor die having a first metal contact; a second semiconductor die that overlaps the first semiconductor die, the second semiconductor die having a second metal contact; a plurality of lead fingers; a first bond wire electrically connecting a first one of the plurality of lead fingers to the first metal contact of the first semiconductor die; a second bond wire electrically connecting a second one of the plurality of lead fingers to the second metal contact of the second semiconductor die; a first die attach composed of an insulating material, disposed on a surface of the first semiconductor, and between the first metal contact and the first one of the plurality of lead fingers, the first die attach restricting relative motion of the first bond wire; and a second die attach having at least one of a different size and a different shape from the first die attach and disposed on a surface of the second semiconductor die.