Patent ID: 9448575
Filing Date: 2016-09-20
CPC Classification: G05F

Claim Text:
1. An adjustable shunt regulator circuit comprising: two current paths in parallel, the first path comprising a first MOS transistor coupled to a collector of a first bipolar transistor and a first resistor comprising a first end and second end wherein the first end is coupled to an emitter of the first bipolar transistor, and the second path comprising a second MOS transistor coupled to a collector of a second bipolar transistor, wherein a base of the first bipolar transistor and a base of the second bipolar transistor are connected in common; a third MOS transistor comprising a source, a drain, and a gate, the gate connected to the collector of the second bipolar transistor; a resistor divide circuit connected in parallel to the source and the drain of the third MOS transistor and providing an output of the regulator circuit; said resistor divide circuit having a second resistor comprising a first end and second end and a third resistor comprising a first end and a second end, wherein the first end of the second resistor is connected to the source of the third MOS transistor, the second end of the third resistor is connected to the drain of the third MOS transistor and the second end of the second resistor is connected to the first end of the third resistor to form a first node; a fourth resistor having a first end connected to the second end of the first resistor and to an emitter of the second bipolar transistor and a second end connected to the third resistor; and a feedback connection from the first node to the bases of the first bipolar transistor and second bipolar transistor.