Patent ID: 9515043
Filing Date: 2016-12-06
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a semiconductor chip having a laminating structure and a pad; a wiring that is included in the semiconductor chip, the wiring having a first wiring portion and a second wiring portion, a first width of the first wiring portion being different from a second width of the second wiring portion, the wiring has a junction between the first wiring portion and the second wiring portion; a conductive material that is formed in a position between the junction and the pad; and a contact part for making contact with a diffusion layer and the wiring; and a passivation film that covers a part of the pad, wherein, when the laminating structure is viewed with the semiconductor device oriented with the pad at the top portion, the pad is disposed above the junction, the diffusion layer is formed below the wiring, and the conductive material is arranged in overlapping relation with the pad, the junction, the contact part and the diffusion layer in a plan view from above the pad.