Patent ID: 9332652
Filing Date: 2016-05-03
CPC Classification: C23F,H01L,H05K

Claim Text:
1. A process for manufacture of a printed circuit board or an integrated circuit, comprising depositing tin or a tin alloy on a substrate to fill recessed structures and forming an excess layer of tin or tin alloy, and then etching away the excess layer of tin or tin alloy comprising the steps of a. providing the substrate having the recessed structures filled with tin or a tin alloy and the excess layer of tin or tin alloy, b. providing an aqueous etching solution consisting of a source of hydroxide ions and a nitro-substituted aromatic sulfonic acid and having a pH value greater than 7, c. contacting said substrate with said aqueous etching solution at a temperature of 30 to 70° C. for a time ranging from 60 seconds to 120 seconds for removing said excess tin or tin alloy layer on top of said recessed structures filled with tin or a tin alloy, wherein the contacting is sufficient to remove only the excess layer of tin or tin alloy but not to form dimples in the tin or tin alloy filling the recessed structures.