Patent ID: 9472758
Filing Date: 2016-10-18
CPC Classification: G11C,H01L

Claim Text:
1. A method for use with non-volatile storage, comprising: depositing one or more layers of reversible resistance-switching material for a non-volatile storage element; applying a forming voltage to the one or more layers of reversible resistance-switching material to form a first region that includes a resistor and a second region that can reversibly change resistance, the second region is in series with the first region, the resistor is formed in response to applying the forming voltage; and programming the non-volatile storage element; the applying the forming voltage includes applying a voltage signal that increases in voltage over time and has a final forming voltage; the non-volatile storage element is part of a monolithic three dimensional memory array of non-volatile storage elements that includes a plurality of global array lines, a plurality of vertically oriented local array lines connected to the monolithic three dimensional memory array of non-volatile storage elements, and a plurality of vertically oriented select devices that are above a substrate and are connected to the vertically oriented local array lines and the global array lines; the programming includes applying a gate voltage signal to the vertically oriented select devices that is limited to be less than a maximum gate voltage; the programming includes applying a programming voltage signal to the global array lines that is limited in magnitude to be less than the final forming voltage.