Patent ID: 9438105
Filing Date: 2016-09-06
CPC Classification: G05F,H02M

Claim Text:
1. A silicon-on-insulator (SOI) based positive/negative voltage generation circuit, comprising: an inverter comprising an NMOS transistor and a PMOS transistor, a first transfer capacitor coupled to the PMOS transistor, a first output capacitor, a second transfer capacitor coupled to the NMOS transistor, a second output capacitor, a first diode disposed between the first transfer capacitor and the first output capacitor, a second diode disposed between the second transfer capacitor and the second output capacitor, one end of the first output capacitor is coupled to the ground, one end of the second output capacitor is coupled to the ground; wherein an output voltage of the inverter is controlled by a single-phase clock to flip periodically, charge the first transfer capacitor through a parasitic diode of the PMOS transistor, and charge the second transfer capacitor through a parasitic diode of the NMOS transistor; in a sub-circuit that generates a positive voltage, a unidirectional current flows from the first transfer capacitor through the first diode to the first output capacitor, thereby generating a positive output voltage; in a sub-circuit that generates a negative voltage, a unidirectional current flows from the second output capacitor through the second diode to the second transfer capacitor, thereby generating a negative output voltage.