Patent ID: 9330735
Filing Date: 2016-05-03
CPC Classification: G11C

Claim Text:
1. A method of operation within a memory component, the method comprising: receiving, during a first command reception interval, a row command and a row address, the row address indicating a row of storage cells within the memory component; decoding the row address upon receiving the row command to select a row of storage cells within the memory component; receiving, during a second command reception interval and after decoding the row address has commenced, a first column command and a first column address, the first column address indicating a first column of data within a first subrow of storage cells included within the row of storage cells, and the first column command indicating a memory access operation to be carried out with respect to the first column of data; and transferring a first subrow of data, including the first column of data, from the first subrow of storage cells to a first set of sense amplifiers in response to the first column command.