Patent ID: 9324664
Filing Date: 2016-04-26
CPC Classification: H01L

Claim Text:
1. An embedded chip package structure, comprising: a core layer, wherein the core layer includes a first surface, a second surface opposite to the first surface and a chip container passing through the first surface and the second surface; a chip, disposed in the chip container, wherein the chip includes an active surface and a protrusion and a top surface of the protrusion is a portion of the active surface; a first circuit layer, disposed on the first surface and electrically connected to the core layer and the chip, wherein the first circuit layer has a through hole, and a width of the through hole is smaller than a width of the chip container, so that the first circuit layer covers the chip except the protrusion, wherein the protrusion of the chip extends into the through hole and is located within the through hole, and the top surface of the protrusion is exposed to receive an external signal, and a size of a projection of the through hole on the first surface is substantially equivalent to a size of a projection of the protrusion on the first surface; and a second circuit layer, disposed on the second surface and electrically connected to the core layer.