Patent ID: 9385733
Filing Date: 2016-07-05
CPC Classification: H03K,H03L

Claim Text:
1. A fractional frequency divider, comprising: a frequency divider, having an input terminal coupled to an output terminal of a multi-phase-frequency generating circuit for receiving an output clock signal; a plurality of samplers, having input terminals coupled to an output terminal of the frequency divider for receiving a frequency-divided clock signal, and trigger terminals of the samplers coupled to the multi-phase-frequency generating circuit for receiving a plurality of sampling clock signals, wherein the sampling clock signals have a same frequency and different phases; a selector, having a plurality of input terminals respectively coupled to output terminals of the samplers, and an output terminal coupled to a feedback terminal of the multi-phase-frequency generating circuit; and a control circuit, providing a fraction code to a control terminal of the selector, so as to control the selector to selectively couple the output terminal of one of the samplers to the feedback terminal of the multi-phase-frequency generating circuit.