Patent ID: 9437669
Filing Date: 2016-09-06
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a semiconductor substrate; a first insulating film of a silicon oxide film formed on the semiconductor substrate; a plurality of resistor elements of a polycrystalline silicon thin film formed on the first insulating film, the plurality of resistor elements being spaced from one another on the first insulating film and each of the plurality of resistor elements having a low concentration impurity region and a high concentration impurity region; a high stress insulating film formed on and covering the plurality of resistor elements and the first insulating film exposed between the resistor elements; a second insulating film covering a periphery of the high stress insulating film; and a plurality of metal wirings covering the low concentration impurity region of the plurality of resistor elements, one end of each of the plurality of metal wirings being electrically connected to one end of the plurality of resistor elements, wherein the high stress insulating film is formed in a region in which the plurality of resistor elements are arranged and which is larger than a region of the plurality of metal wirings, and the high stress insulating film has one of a compressive stress and a tensile stress that is higher than one of a compressive stress and a tensile stress of the each of the plurality of metal wirings.