Patent ID: 9337187
Filing Date: 2016-05-10
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a logic circuit, including a first active element formed in a semiconductor substrate, and wirings provided in each of wiring layers located above the semiconductor substrate; an active element circuit, including a second active element formed using a first semiconductor layer formed over a first insulating film formed above the wiring layer, the active element circuit being controlled by the logic circuit through wirings that configure the logic circuit; a second insulating film formed above the semiconductor substrate; a plurality of wirings embedded in trenches provided in the second insulating film; a first source electrode coupled to the first semiconductor layer; and a first drain electrode coupled to the first semiconductor layer, wherein the first insulating film is provided so as to cover the second insulating film and the wirings, wherein the wirings include a first gate electrode provided at a position opposite to the first semiconductor layer, and wherein the first semiconductor layer, the first source electrode, the first drain electrode and the first gate electrode function as the second active element that configures the active element circuit; wherein the semiconductor device further comprises an active element circuit in which a voltage exceeding an operating voltage of the logic circuit is applied to at least one of the first drain electrode, the first source electrode and the first gate electrode.