Patent ID: 9436655
Filing Date: 2016-09-06
CPC Classification: G06F

Claim Text:
1. A system for vector memory array transposition, the system comprising: a vector memory to store a vector memory array; a block transposition accelerator coupled to the vector memory, the block transposition accelerator configured to firstly read vectors of a block of data by shifting the vectors into the vector memory array along a first dimension such that each vector is shifted serially into the vector memory in the same direction as the first dimension and to secondly write a transposition of the vectors by shifting the transposition of the vectors out of the vector memory along a second dimension such that each transposed vector is shifted serially out of the vector memory in the same direction as the second dimension, wherein the second dimension is perpendicular to the first dimension in the vector memory array; an address controller coupled to the block transposition accelerator, the address controller configured to determine a vector access order, wherein the block transposition accelerator is configured to access the vector of the block of data within the vector memory array according to the vector access order; and wherein the vector memory is partitioned into a set of blocks comprising the block of data and the second block of data, and wherein each block of data of the set of blocks has a uniform block size.