Patent ID: 9368520
Filing Date: 2016-06-14
CPC Classification: G02F,H01L

Claim Text:
1. An array substrate, comprising: a base substrate, on which a plurality of gate lines and a plurality of data lines are provided; shielding electrodes, which are provided above and electrically insulated from the data lines, the shielding electrodes at least partially covering the data lines; first electrodes, which are provided in the same layer as the shielding electrodes and are electrically insulated from the shielding electrodes; and second electrodes, which are provided above and electrically insulated from the first electrodes, wherein, the shielding electrodes are applied with a shielding voltage signal, the second electrodes are applied with a stable voltage signal, and no electric field or weak electric filed is formed between the shielding electrodes and the second electrodes; and each data line comprises a plurality of data line bodies and a plurality of connection parts, each connection part is used for connecting two adjacent data line bodies, the array substrate further comprises a first insulation layer, which is provided above the gate lines, wherein, the data line bodies and the gate lines are provided in the same layer, and the connection parts connect every two adjacent data line bodies in the data lines through via holes penetrating through the first insulation layer.