Patent ID: 9336065
Filing Date: 2016-05-10
CPC Classification: G06F

Claim Text:
1. A memory protection method of a semiconductor device, which uses a memory device, the method comprising: managing information required to execute a first program as a first workset; creating a first relationship which holds information included in the first workset and an address of that information in the memory device; executing the first program with reference to the first relationship; calling a second program outside the first workset; managing information required to execute the second program as a second workset; creating a second relationship which holds information included in the second workset and an address of that information in the memory device, the first relationship and the second relationship each having a same basic configuration so that each workset refers to information in the memory by means of addresses used by said processor; and executing the second program with reference to the second relationship, wherein the first and second worksets including program code, data required for a programmed operation, and a memory space required to store a result of the programmed operation.