Patent ID: 9231706
Filing Date: 2016-01-05
CPC Classification: H03K,H04B

Claim Text:
1. A drive circuit for generating a pre-emphasized signal, comprising: a splitter that splits an input signal into a first signal and a second signal each of which has a first duty cycle; a calculator that subtracts one of the first signal and the second signal from the other signal, or adds the first signal to the second signal; a first duty cycle adjusting circuit that is arranged between the splitter and the calculator and changes the first duty cycle of the first signal such that the first signal has a second duty cycle that differs from the first duty cycle of the second signal and the first signal has a frequency same as a frequency of the input signal; and a first delay circuit that is arranged between the splitter and the calculator and causes the first signal and the second signal to have differing phases.