Patent ID: 9483321
Filing Date: 2016-11-01
CPC Classification: G06F

Claim Text:
1. A method for determining a to-be-migrated task based on cache awareness in a computing system having multiple processor cores, comprising; obtaining information about each of the multiple processor cores, wherein the information comprises load information of each processor core; determining a source processor core and a destination processor core according to the load information of each processor core; monitoring the number of cache misses of each task and the number of executed instructions of each task in the source processor core; obtaining a cache miss ratio of each task in the source processor core by dividing the number of cache misses of the each task by the number of executed instructions of the each task; calculating an average cache miss ratio of the source processor core according to cache miss ratios of all tasks in the source processor core; monitoring the number of cache misses of each task and the number of executed instructions of each task in the destination processor core; obtaining a cache miss ratio of each task in the destination processor core by dividing the number of cache misses of the each task by the number of executed instructions of the each task; calculating an average cache miss ratio of the destination processor core according to cache miss ratios of all tasks in the destination processor core; and migrating a task that is with a smallest cache miss ratio and is in the source processor core to the destination processor core when the average cache miss ratio of the source processor core is not less than the average cache miss ratio of the destination processor core; or migrating a task that is with a largest cache miss ratio and is in the source processor core to the destination processor core when the average cache miss ratio of the source processor core is less than the average cache miss ratio of the destination processor core.