Patent ID: 9318502
Filing Date: 2016-04-19
CPC Classification: H01L

Claim Text:
1. A nonvolatile memory device, comprising: a memory cell array including a plurality of cell strings, wherein each of the cell strings comprises memory cells stacked in a direction perpendicular to a substrate; and a peripheral circuit connected to the memory cell array through a plurality of conductive lines, wherein the peripheral circuit comprises a plurality of transistors, wherein each of the transistors is formed on the substrate, wherein each of the transistors includes first and second regions, wherein the first and second regions comprise a conductive material different from a material included in the substrate, and wherein a gate electrode is disposed between the first and second regions, wherein in at least one of the transistors, the first region is connected to at least one of the conductive lines through a plurality of first contact plugs extending in the direction perpendicular to the substrate, and a plurality of second contact plugs extending in the direction perpendicular to the substrate, wherein each of the second contact plugs is disposed on a respective first contact plug, and wherein a contact area of each of the first contact plugs is different from a contact area of each of the second contact plugs.