Patent ID: 9502516
Filing Date: 2016-11-22
CPC Classification: H01L

Claim Text:
1. A gate electrode, comprising: a gate dielectric material overlying a bottom portion and sidewalls of a trench within a semiconductor substrate; a first gate material in the trench and overlying the gate dielectric material over the bottom portion of the trench and overlying at least a portion of the gate dielectric material over the sidewalls of the trench, the first gate material having a first work function associated therewith, the first gate material comprising a P+ doped polysilicon material coupled to a first voltage supply; a second gate material at least partially within the trench and overlying at least another portion of the gate dielectric material on the sidewalls, the second gate material having a second work function different from the first work function, the second gate material comprising a N+ doped polysilicon material coupled to a second voltage supply, one of the first gate material and the second gate material configured to receive a first negative bias and the other of the first gate material and the second gate material configured to receive a second negative bias that is more negative than the first negative bias, the first gate material electrically isolated from the second gate material, the second gate material proximate a storage capacitor of a memory device and the first gate material proximate a bitline of the memory device, wherein the gate dielectric material has a substantially uniform thickness from below the first gate material to a top surface of the second gate material; and an insulator positioned between the first gate material and the second gate material, the insulator selected from the group consisting of silicon nitride and silicon dioxide and providing electrical isolation between the first gate material and the second gate material.