Patent ID: 9406877
Filing Date: 2016-08-02
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a semiconductor substrate; a multilevel wiring layer structure on the semiconductor substrate; and a variable resistance element in the multilevel wiring layer structure; wherein the variable resistance element comprises a variable resistance element film disposed between a top electrode and a bottom electrode; wherein the variable resistance element film comprises a film whose resistance changes based on actions of a metal of the bottom electrode; wherein the multilevel wiring layer structure comprises at least a wiring electrically connected to the bottom electrode and a plug electrically connected to the top electrode; wherein said wiring also serves as the bottom electrode; wherein an insulating barrier film is in contact with the bottom electrode and the variable resistance element film in a portion arranged between the bottom electrode and the variable resistance element film; wherein the insulating barrier film has an opening; wherein the variable resistance element film is in contact with the bottom electrode in the opening; wherein the variable resistance element film is an oxide including Ta or TaSi; and wherein the variable resistance element film has a laminate structure in which Ta