Patent ID: 9531399
Filing Date: 2016-12-27
CPC Classification: H03M

Claim Text:
1. A digital to analog converter circuit to convert a digital input signal to an analog output signal, wherein the digital input signal comprises a plurality of Least Significant Bits (LSBs) and a plurality of Most Significant bits (MSBs), the digital to analog converter circuit comprising: a line decoder configured to receive the plurality of LSBs of the digital input signal and configured to generate a line information based thereon; a column decoder configured to receive the plurality of MSBs of the digital input signal and configured to generate a column information based thereon; one or more source cells arranged in a plurality of rows and a plurality of columns, wherein the one or more source cells are configured to be selectively activated and consequently generate an individual output signal based on the line information and the column information respectively; a control circuit configured to supply a source signal to selectively energize one or more source cells of the plurality of columns based on the column information; and a compensation circuit comprising one or more cells configured to linearize the source signal.