Patent ID: 9312865
Filing Date: 2016-04-12
CPC Classification: G09G,H03L,H04L

Claim Text:
1. A system for generating a local clock, the system comprising: a controlled oscillator having an input and an output; a first link data input; a forwarded clock input; a first phase detector having a first input, a second input, and an output; and a first phase recovery block having a clock input, a data input connected to the first link data input, and an output switch-connected to the input of the controlled oscillator, the first input of the first phase detector being connected to the output of the controlled oscillator, the second input of the first phase detector being connected to the forwarded clock input, and the output of the first phase detector being switch-connected to the controlled oscillator, the system further comprising a control logic circuit to select between a first mode of operation and a tracking phase of a second mode of operation, wherein in the first mode of operation, the output of the first phase detector is connected, with an enabled connection, to the input of the controlled oscillator, and in the tracking phase of the second mode of operation, the output of the first phase recovery block is connected, with an enabled connection, to the input of the controlled oscillator, wherein the control logic circuit further is a circuit to select between the first mode of operation, the tracking phase of the second mode of operation, and a training phase of the second mode of operation, wherein, in the training phase of the second mode of operation, the output of the first phase detector is connected, with an enabled connection, to the input of the controlled oscillator, and the first link data input is connected, with an enabled connection, to the forwarded clock input.