Patent ID: 9461628
Filing Date: 2016-10-04
CPC Classification: G05F,G06G,H02M,H03F,H03H,H03K

Claim Text:
1. A current to voltage integrator circuit, comprising: an input node for selectively receiving a current input signal from an associated sensor; an input transistor having a control terminal and a second terminal for providing a current to a first internal node at least partially according to a voltage at the control terminal; a first bias circuit comprising a first transistor coupled between the first internal node and a first supply node; a second bias circuit comprising a second transistor coupled between a second supply node and a second internal node; an amplifier circuit comprising a third transistor coupled between an output node and the first internal node, and a fourth transistor coupled between the second internal node and the output node; a feedback capacitance selectively coupled between the output node and a third internal node; an input bias capacitance including a first terminal coupled with the third internal node and a second terminal coupled with the control terminal of the input transistor; and a switching circuit configured to operate in a first mode to couple the control terminal of the input transistor with the output node while coupling the third internal node to a constant voltage node to charge the input bias capacitance to a calibration voltage representing a control voltage which causes the input transistor to conduct a current equal to a difference between a first bias current flowing in the first transistor and a second bias current flowing in the second transistor, the switching circuit configured to operate in a second mode to disconnect the third internal node from the constant voltage node and couple the third internal node with the input node and a first terminal of the feedback capacitance to cause the calibration voltage across the input bias capacitance to maintain an input bias voltage at the input node, and to couple a second terminal of the feedback capacitance with the output node to control a single-ended output voltage at the output node at least partially according to the current input signal.