Patent ID: 9361821
Filing Date: 2016-06-07
CPC Classification: G09G

Claim Text:
1. A display device comprising: a display panel in which a plurality of data lines and a plurality of gate lines intersect in a matrix form and pixels are formed at intersecting points thereof; a data drive unit connected to the plurality of data lines, the data drive unit outputting a black data voltage corresponding to a gradation level of 0, the data drive unit expressing the black data voltage through the data lines, the black data voltage being greater than a minimum output voltage supplied to data lines by the data drive unit and less than a voltage obtained by linearly extending data voltages of two or more low gradation levels to the gradation level of 0, the two or more low gradation levels greater than the gradation level of 0 and including gradation levels 1, 2, 3, and 4; a gamma voltage supply unit outputting a gamma voltage for each gradation level to the data drive unit; and a timing controller generating a control signal to control driving of the display panel.