Patent ID: 9443889
Filing Date: 2016-09-13
CPC Classification: H01L

Claim Text:
1. A method for manufacturing an array substrate comprising a plurality of data line groups and a plurality of shorting bars each correspondingly connected with one of the plurality of data line groups, wherein the method for manufacturing the array substrate comprises: forming a pattern comprising a source-drain component, the plurality of data line groups and a first shorting bar, wherein each data line in the plurality of data line groups forms an integral structure with the first shorting bar; etching the source-drain component to form a source electrode and a drain electrode; disconnecting the data line groups which do not correspond to the first shorting bar from the first shorting bar; forming other shorting bars among the plurality of shorting bars other than the first shorting bar; and connecting the data line groups which do not correspond to the first shorting bar with the other shorting bars corresponding thereto respectively through connecting pieces, wherein the step of disconnecting the data line groups which do not correspond to the first shorting bar from the first shorting bar is not prior to the step of etching the source-drain component.