Patent ID: 9529960
Filing Date: 2016-12-27
CPC Classification: G03F,G06F,H01L

Claim Text:
1. A semiconductor device manufacturing apparatus comprising: a weak feature identification unit configured to identify weak features from among a plurality of features included in a photolithography pattern to be formed on a mask or a substrate, wherein each weak feature comprises a respective portion of the photolithography pattern that is determined to have a respective probability, of causing the photolithography pattern to fail, that is greater than a reference value; a region classification unit configured to classify each of the weak features to include respective first and second regions; a shot method determination unit configured to determine respective first and second dosages to be applied to the first and second regions, respectively; and an exposure unit configured to expose the first and second regions with the first and second dosages, wherein the weak feature identification unit is further configured to identify a feature as the weak feature when a distance between a vertex of the feature and another feature of the pattern is within a predetermined range or when a number of vertexes included in a unit area of the pattern is greater than a predetermined number.