Patent ID: 9520195
Filing Date: 2016-12-13
CPC Classification: G11C

Claim Text:
1. A sensing amplifier, for sensing data stored in a memory cell of a memory string of which one end is coupled to a third node and another end is coupled to a common source line, comprising: a clamp circuit coupled between a first node and a second node, wherein the clamp circuit comprises a first P-type transistor having a first terminal, a second terminal and a control terminal receiving a first bias signal, the first terminal and the second terminal of the first P-type transistor are coupled to the first node and the second node, respectively, and an isolating transistor, coupled between the third node and the first node; wherein the voltage level of the third node is set to be less than the voltage level of the common source line in a bias setup time period, and the first P-type transistor accordingly clamps the voltage level of the first node to be higher than the voltage level of the second node, such that a sensing current from the memory cell flows into the second node via the first node during a sensing time period subsequent to the bias setup time period.