Patent ID: 9401339
Filing Date: 2016-07-26
CPC Classification: B23K,H01L

Claim Text:
1. A method for producing a wafer level package, the method comprising: forming solder mask openings in a solder mask layer exposing regions of a patterned metal level underlying the solder mask layer, the patterned metal level comprising a first alloy; before or after forming solder mask openings in the solder mask layer, producing non-wettable solder collars in contact with and extending partially over the exposed regions of the patterned metal level, the non-wettable solder collars produced from a second alloy different than the first alloy; and depositing solder balls into the solder mask openings and onto the non-wettable solder collars and performing a solder ball reflow process such that, after solder ball reflow, circumferential clearances are provided around base portions of the solder balls and the sidewalls of the solder mask layer defining the solder mask openings, the circumferential clearances comprising annular gaps separating the portions of the solder balls contacting the non-wettable solder collars from the sidewalls of the solder mask layer defining the solder mask openings.