Patent ID: 9343362
Filing Date: 2016-05-17
CPC Classification: H01L

Claim Text:
1. A method for forming tungsten through-silicon vias, comprising: forming an opening having a sidewall extending through at least a portion of a semiconductor substrate on which semiconductor components have been formed, wherein the opening is formed by etching the opening completely through a first interlayer dielectric structure and through only a portion of the semiconductor substrate such that the opening has a closed end in the semiconductor substrate, and wherein a metallization structure is on an upper surface of the first interlayer dielectric structure; forming a second interlayer dielectric structure on the first interlayer dielectric structure and a dielectric liner along the sidewall of the opening in a single process using the same material, the second interlayer dielectric structure is formed by depositing a first portion of a dielectric material on the first interlayer dielectric structure and over the metallization structure, the dielectric liner is formed by depositing a second portion of the dielectric material into the opening such that it lines the sidewall of the opening, and the first portion of the dielectric material has a thickness greater than that of the metallization structure; forming a tungsten conductor along the dielectric liner, wherein the tungsten conductor partially fills the opening such that a cavity extends into the tungsten conductor; and depositing polysilicon into the cavity in the tungsten conductor.