Patent ID: 9323882
Filing Date: 2016-04-26
CPC Classification: G03F,G06F

Claim Text:
1. A structure comprising: a metrology pattern layout for a circuit structure comprising a plurality of quadrants facilitating arrangement of a plurality of metrology patterns, comprising: a first quadrant for a first wafer measurement pattern; a second quadrant for a second wafer measurement pattern; a third quadrant for a reticle registration pattern; a fourth quadrant comprising a reticle measurement pattern, the reticle measurement pattern comprising a plurality of structural elements, wherein at least one structural element is an at least one outermost structural element, the at least one outermost structural element being designed to protect the plurality of structural elements from modification in an optical proximity correction process; wherein an arrangement of the plurality of quadrants facilitates correlation of data obtained from the first and second wafer measurement patterns with data obtained from the reticle measurement pattern and the reticle registration pattern.