Patent ID: 9520391
Filing Date: 2016-12-13
CPC Classification: H01L

Claim Text:
1. A device comprising: a first transistor and a second transistor of opposite polarity; and an output connected to the first transistor and the second transistor, the first transistor comprising: a first channel region; a first back gate comprising a first back gate insulator adjacent to the first channel region and a first back gate conductor adjacent to the first back gate insulator opposite the first channel region; and a first delay element comprising a first resistor immediately adjacent to the first back gate insulator and further extending from immediately adjacent to the first back gate conductor to the output, and the second transistor comprising: a second channel region; a second back gate comprising a second back gate insulator adjacent to the second channel region and a second back gate conductor adjacent to the second back gate insulator opposite the second channel region; and a second delay element comprising a second resistor immediately adjacent to the second back gate insulator and further extending from immediately adjacent to the second back gate conductor to the output.