Patent ID: 9473723
Filing Date: 2016-10-18
CPC Classification: H03M,H04N

Claim Text:
1. A solid-state image sensing device comprising: a plurality of pixel circuits arrayed in a plurality of rows and columns; a row scanning circuit that sequentially selects the rows one by one for one cycle period and causes each pixel circuit in a selected row to output a dark signal and a bright signal; and an A/D converter that is disposed for each column to convert each of the dark and bright signals, which are output from the pixel circuits in the associated columns, to a digital signal; wherein the A/D converter includes a first sample-and-hold circuit that samples and holds a dark signal output from the pixel circuits in the associated column for each cycle period, and second to Mth sample-and-hold circuits (M is an integer of 3 or greater) that are sequentially selected one by one for one cycle period to sample and hold a bright signal output from the pixel circuits in the associated column for a selected cycle period, and wherein the A/D converter converts each of the signals held by the first to Mth sample-and-hold circuits to a digital signal.