Patent ID: 9418896
Filing Date: 2016-08-16
CPC Classification: G03F,H01L

Claim Text:
1. A method of fabricating a semiconductor device, comprising: forming first to fourth fins, each extending in a first direction, to be spaced apart in a second direction intersecting the first direction; forming first and second gate lines, each extending in the second direction, on the first to fourth fins to be spaced apart in the first direction; forming a first contact on the first gate line between the first and second fins; forming a second contact on the first gate line between the third and fourth fins; forming a third contact on the second gate line between the first and second fins; forming a fourth contact on the second gate line between the third and fourth fins; and forming a fifth contact on the first to fourth contacts to overlap the second contact and the third contact and not to overlap the first contact and the fourth contact, wherein the fifth contact is arranged to diagonally traverse a quadrangle defined by the first to fourth contacts.