Patent ID: 9331173
Filing Date: 2016-05-03
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor arrangement comprising: forming a first opening over a first active region, a shallow trench isolation (STI) region and a second active region, such that the first opening exposes a portion of the first active region and the second active region; forming a metal connect in the first opening, such that the metal connect is connected to the first active region and the second active region and the metal connect has an initial height; and recessing the initial height of the metal connect in the STI region to form a recessed portion of the metal connect having a second height, such that the second height is less than a first height of a first unrecessed portion of the metal connect over the first active region and a third height of a second unrecessed portion of the metal connect over the second active region, the first height substantially equal to the third height.