Patent ID: 9396949
Filing Date: 2016-07-19
CPC Classification: H01L

Claim Text:
1. A method of adjusting a threshold voltage of a multi-gate structure device, the channel of which includes a channel surface and a channel body spaced from the channel surface and having a higher carrier concentration than that of the channel surface under a full depletion, comprising: preparing the multi-gate structure device to form the channel surface and the channel body with a lower impurity doping concentration than that of the channel body, wherein, a process of preparing the multi-gate structure device comprises the steps of: 1) impurities doping to form an ultra-shallow impurity distribution of a 1 nm thickness; 2) depositing a passivation layer to reduce the loss of the doped impurity in a subsequent annealing process; 3) annealing to form an ultra-shallow junction of a 1˜2 nm thickness.