Patent ID: 9252122
Filing Date: 2016-02-02
CPC Classification: H01L,H05K,Y10T

Claim Text:
1. A structure comprising: a substrate having a first region and a second region, the substrate also having a first surface and a second surface remote from the first surface; electrically conductive elements exposed at the first surface of the substrate within the second region; wire bonds having bases bonded to respective ones of the conductive elements and free ends remote from the substrate and remote from the bases, at least one of the wire bonds having a shape such that the at least one wire bond defines an axis between the free end and the base thereof coincident with a side surface of the at least one wire bond and such that the at least one wire bond defines a plane, a bent portion of the at least one wire bond extending away from the axis within the plane, wherein the entire at least one wire bond is positioned on one side of the axis and a substantially straight portion of the at least one wire bond extends between the free end and the bent portion angled relative to the bent portion, wherein the ends of the wire bonds are defined on tips of the wire bonds, the wire bonds defining respective first diameters between the bases and the tips thereof, and the tips having at least one dimension that is smaller than the respective first diameters of the wire bonds, wherein the tip of at least one wire bond of the wire bonds is tapered relative to a cylindrical portion of the at least one wire bond and comprises first and second outer surfaces extending directly from an outer surface of the cylindrical portion, wherein the cylindrical portion is integral with the tip of the at least one wire bond and the tip of the at least one wire bond has a centroid which is offset in a radial direction from an axis of the cylindrical portion extending from the base of the at least one wire bond; and a dielectric encapsulation layer extending from at least one of the first or second surfaces and covering portions of the wire bonds such that covered portions of the wire bonds are separated from one another by the encapsulation layer, the encapsulation layer overlying at least the second region of the substrate, wherein unencapsulated portions of the wire bonds are defined by portions of the wire bonds that are uncovered by the encapsulation layer, the unencapsulated portions including the ends; wherein the conductive elements are configured to couple the wire bonds to one or more microelectronic elements.