Patent ID: 9514948
Filing Date: 2016-12-06
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor structure including a field effect transistor (FET), said method comprising: forming a first high dielectric constant (high-k) gate dielectric layer comprising a first high-k dielectric material and located directly on a topmost surface of an interface dielectric material that is present directly on a semiconductor fin, said interface dielectric is a dielectric material comprising a semiconductor material and at least one of oxygen and nitrogen; forming a band-gap-disrupting dielectric layer comprising a dielectric material having a different band gap than said first high-k gate dielectric on said first high-k gate dielectric layer; forming a second high-k gate dielectric layer comprising a second high-k dielectric material having a different band gap than said band-gap-disrupting dielectric of said band-gap-disrupting dielectric layer; forming an additional high-k gate dielectric layer directly on said second high-k gate dielectric layer, wherein said additional high-k gate dielectric layer comprises an additional high-k dielectric material different from said second high-k dielectric material; and patterning a stack of said first high-k gate dielectric layer, said band-gap-disrupting dielectric layer, said second high-k gate dielectric layer and said additional high-k gate dielectric layer to form a stratified gate dielectric stack of a first high-k gate dielectric, a band-gap-disrupting dielectric, a second high-k gate dielectric, and an additional high-k gate dielectric, wherein a first atomic interface between said band-gap-disrupting dielectric and said first high-k gate dielectric is spaced from a second atomic interface between said band-gap-disrupting dielectric and said second high-k gate dielectric by at least one continuous atomic layer of said dielectric material of said band-gap-disrupting dielectric within said stratified gate dielectric stack.