Patent ID: 9438108
Filing Date: 2016-09-06
CPC Classification: G05F,H02M

Claim Text:
1. A bias voltage generating circuit, comprising: a) a first control circuit configured to compare a drain-source voltage of a first switch against a bias voltage across a capacitor; b) a second control circuit configured to control said first switch, wherein said second control circuit is configured to be enabled when said bias voltage is at least as high as an expected bias voltage; c) wherein said first control circuit is configured to control said capacitor to charge when said drain-source voltage of said first switch is greater than said bias voltage, wherein said first control circuit comprises a first comparator configured to receive said bias voltage and an overvoltage protection voltage, and to output a first control signal, a second switch coupled to said first switch and being controllable by said first control signal, and a diode having an anode coupled to said second switch, and a cathode coupled to said capacitor; and d) wherein said bias voltage is less than said overvoltage protection voltage when said capacitor charges, and wherein said overvoltage protection voltage comprises a voltage that is a predetermined amount higher than said expected bias voltage.