Patent ID: 9385951
Filing Date: 2016-07-05
CPC Classification: H04L

Claim Text:
1. A switch device comprising: a plurality of receiving ports each configured to receive a packet; a plurality of transmitting ports each configured to transmit a packet; a memory configured to store transfer control information for transferring a packet to a node that is configured to transfer the received packet; and a processor configured: to register destination information in the transfer control information stored in the memory, to monitor packets received via the plurality of receiving ports, and to rewrite, upon receiving a first packet conforming to a predetermined communication protocol and containing a frame including the destination information registered in the transfer control information stored in the memory, a header of the first packet, based on the transfer control information stored in the memory and transmit the first packet whose header has been rewritten via corresponding one of the plurality of transmitting ports indicated by the transfer control information.