Patent ID: 9450083
Filing Date: 2016-09-20
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a semiconductor substrate of a first conductivity type; an epitaxial layer of the first conductivity type disposed on a top surface of the semiconductor substrate, wherein the epitaxial layer includes a surface shielded region positioned above a voltage blocking region, the surface shielded region is more heavily doped than the voltage blocking region; a body region of a second conductivity type that is opposite of the first conductivity type disposed near a top surface of the surface shielded region, a source region of the first conductivity type disposed near the top surface of the surface shielded region inside the body region, and a drain disposed at a bottom surface of the semiconductor substrate, a gate overlapping a portion of the source region and a portion of the body region having a gate insulation layer separating the gate from the source region and the body region; first and second trenches formed in the surface shielded region, wherein the first and second trenches are lined with a trench insulation material and filled with an electrically conductive trench filling material; a first buried doped region of the second conductivity type positioned below the first trench, a second buried doped region of the second conductivity type positioned below the second trench, and wherein the first and second buried doped regions extend to a depth substantially the same as a depth of a bottom surface of the surface shielded region.