Patent ID: 9245329
Filing Date: 2016-01-26
CPC Classification: G06T

Claim Text:
1. A circuit configured to render computer graphics for an electronic display, comprising: a frame buffer configured to store a primitive for each pixel of the electronic display, the primitive for each pixel being output to the electronic display device; and a processor configured to store the primitives in the frame buffer based on input primitives, the processor receiving an input primitive in the same coincident group as a corresponding stored primitive, the processor determining whether the input primitive is within a threshold distance from the stored primitive, the processor determining which of the input primitive and stored primitive is closer in depth to an observer of the electronic display when the input primitive and the stored primitive are not within the threshold distance and outputting the closer primitive to the frame buffer, the processor determining which of the input primitive and stored primitive has a higher priority when the input primitive and the stored primitive are within the threshold distance and outputting the primitive with the higher priority to the frame buffer.