Patent ID: 9515089
Filing Date: 2016-12-06
CPC Classification: H01L

Claim Text:
1. A method for fabricating a semiconductor device, comprising: providing a substrate, wherein the substrate is comprised of: forming a hard mask layer on top of the substrate; forming at least one mandrel on top of the hard mask layer; forming a spacer layer on top of exposed portions of the hard mask layer and the at least one mandrel; etching portions of the spacer layer, such that at least one surface of the at least one mandrel and at least one portion of the hard mask layer are exposed; removing the at least one mandrel; etching regions of the hard mask layer and the undoped silicon layer not protected by remaining portions of the spacer layer to form at least one fin, such that portions of the doped silicon layer are exposed; removing the remaining portions of the spacer layer; forming a set of spacers on exposed sidewalls of the at least one fin; etching regions of the doped silicon layer and the base layer not protected by either the set of spacers or hard mask caps; laterally etching regions of the doped silicon layer and the base layer located beneath the at least one fin; depositing a dielectric layer atop the base layer and adjacent to the at least one fin; performing a low temperature thermal oxidation process to convert the doped silicon layer to doped silicon oxide and exposed portions of the base layer to undoped silicon oxide; and removing a portion of the dielectric layer and the plurality of spacers.