Patent ID: 9337934
Filing Date: 2016-05-10
CPC Classification: H04B,H04L

Claim Text:
1. A coherent transmitter, comprising: an egress signal path comprising an egress line-side interface and an egress host-side interface, the egress signal path configured to receive a digital data signal at the egress host-side interface, to modulate the digital data signal, and to output a first analog signal vector corresponding to the digital data signal at the egress line-side interface; and clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified egress path clock signals to different components of the egress signal path, the plurality of modified egress path clock signals derived from the single reference clock signal and the plurality of modified egress path clock signals having different clock rates, wherein the egress signal path comprises a plurality of egress path clock domains, each of the plurality of egress path clock domains configured to receive a respective modified egress path clock signal and configured to process data at a sampling rate corresponding to a frequency of the respective modified egress path clock signal, the plurality of egress path clock domains comprising: