Patent ID: 9455240
Filing Date: 2016-09-27
CPC Classification: H01L

Claim Text:
1. A method of manufacturing a semiconductor device, comprising: (a) providing a wiring substrate including a chip mounting surface, a plurality of terminals formed on the chip mounting surface, and a plurality of first solder members respectively arranged on the plurality of terminals, wherein each of the plurality of terminals includes a first portion, a second portion and a third portion, wherein, in plan view, the first, second and third portions are arranged along a first direction, wherein, in plan view, the first portion is arranged between the second portion and the third portion, and wherein, in plan view, a width of each of the second and third portions is larger than a width of the first portion, said width of each of the first, second, and third portions being measured along a second direction perpendicular to the first direction; and (b) after the step (a), arranging a semiconductor chip over the wiring substrate such that a front surface of the semiconductor chip faces to the chip mounting surface of the wiring substrate, and electrically connecting a plurality of pads formed on the front surface with the plurality of terminals via a plurality of protruding electrodes respectively formed on the plurality of pads and the plurality of first solder members, respectively, wherein, in plan view, the plurality of terminals are arranged side-by-side with each other, and wherein, in the step (b), the semiconductor chip is arranged over the wiring substrate such that a center of each of the plurality of protruding electrodes is positioned between the second portion and the third portion of the respective terminal, and such that each of the plurality of protruding electrodes does not overlap with the second and third portions of the respective terminal in plan view.