Patent ID: 9395731
Filing Date: 2016-07-19
CPC Classification: G05F,H03F

Claim Text:
1. A driver circuit for low drop-out regulators allowing reducing a size of an output capacitor while maintaining stability of the low drop-out regulator (LDO) within a range of load current, comprising: a pass transistor connected between a supply voltage and an output node wherein a gate of the pass transistor is controlled by a voltage representing a difference between a reference voltage and an actual output voltage of the LDO, and wherein the gate of the pass transistor is connected in a current mirror configuration to a gate of a first current mirror transistor forming a current mirror; said first current mirror transistor having a smaller size than the pass transistor, wherein the first current mirror transistor is connected between the supply voltage and a first supplemental transistor, wherein a drain of the first current mirror transistor and a drain of the pass transistor are not connected to each other; said first supplemental transistor having a drain connected to the drain of the first current mirror transistor and a source connected to ground voltage; and a circuitry attached to the current mirror configured to nonlinear mirroring of the load current and capable of allowing reducing small signal impedance at the gate of the pass transistor as the load current increases, hence allowing reducing the size of an output capacitor without compromising stability of the system, wherein the circuitry attached comprises a first circuit branch comprising a second current mirror transistor, which is deployed between the supply voltage and a first terminal of a resistive means, wherein a gate of the second current mirror transistor is connected to a gate of the first current mirror transistor and the resistive means, wherein a second terminal of the resistive means is connected to a node between the first current mirror transistor and the supplemental transistor.