Patent ID: 9264707
Filing Date: 2016-02-16
CPC Classification: H03M,H04N

Claim Text:
1. A method comprising: performing, by a microprocessor of a computing device, a first coding to obtain a residual of a residual data block from an original data block; pre-defining, by the microprocessor, a default order of symbols in the residual data block; re-ordering, by the microprocessor, the symbols in the residual data block in an order other than the default order, such that a first set of most frequently used symbols are in a first location and a second set of least frequently used symbols are in a second location; assigning each symbol in the first set a variable length code; assigning each symbol in the second set a variable length code, wherein at least a first symbol in the first set has the same code as a second symbol in the second set; and encoding the residual data block with a multi-symbol run-length code, wherein the run length applies to a run of symbols in the first set and symbols in the second set lack a corresponding run-length code.