Patent ID: 9474145
Filing Date: 2016-10-18
CPC Classification: H01L,H05K

Claim Text:
1. A substrate for a semiconductor package, the substrate comprising: a surface; and a plurality of package unit regions arranged on the surface to form a plurality of rows in a row direction, package units regions of an n+1-th row being arranged offset in the row direction from package units of an n-th row, in which n denotes a natural number, wherein each package unit region comprises: wherein the first pad is separated apart from the edge region in a plan view, wherein a distance from the first side of the surface to the package unit regions of a first row of the plurality of rows is less than a distance from a second side of the surface to the package unit regions of a last row of the plurality of rows, wherein the first side is opposite to the second side, wherein the surface connects the first side and the second side, wherein the package unit regions are defined by saw lines, and wherein the saw lines are recessed from the surface.