Patent ID: 9472293
Filing Date: 2016-10-18
CPC Classification: G11C,H01L

Claim Text:
1. A semiconductor device comprising: a memory cell comprising: an A/D converter, wherein the first transistor comprises a channel formation region comprising an oxide semiconductor, wherein one of a source and a drain of the first transistor is electrically connected to a gate of the second transistor, wherein the other of the source and the drain of the first transistor is electrically connected to a bit line, wherein one of a source and a drain of the second transistor is electrically connected to the bit line, wherein the other of the source and the drain of the second transistor is electrically connected to a power supply line, wherein the gate of the second transistor is electrically connected to a first electrode of the capacitor, wherein a second electrode of the capacitor is electrically connected to a read word line, and wherein the bit line is electrically connected to the A/D converter.