Patent ID: 9311244
Filing Date: 2016-04-12
CPC Classification: G06F

Claim Text:
1. An interconnect for connecting devices in an integrated circuit, the interconnect comprising: transaction tracking circuitry capable of tracking data access transactions received by the interconnect from one or more master devices, and for at least one set of data access transactions, controlling issuing of the data access transactions within the same set of data access transactions to one or more slave devices in a selected order; and a snoop filter capable of identifying, in response to a data access transaction specifying a target address, which master devices have cached data for the target address; wherein the transaction tracking circuitry is capable of controlling issuing of at least one snoop transaction to at least one master device identified by the snoop filter as having cached data for the target address; and for a set of snoop transactions issued in response to data access transactions within the same set of data access transactions, the transaction tracking circuitry is capable of controlling issuing of the set of snoop transactions to the at least one master device in an order corresponding to the selected order of the corresponding set of data access transactions.