Patent ID: 9349615
Filing Date: 2016-05-24
CPC Classification: H01L

Claim Text:
1. A system-in-package (SiP) system-integration integrated circuit (IC) chip package, comprising: a substrate; a passive device; a first and a second IC chips provided on a first surface of the substrate; a mold cap covering the first surface of the substrate and enclosing all devices disposed on the first surface; and two pads disposed on a second surface opposing the first surface of the substrate, wherein an adhesive film is disposed between each of the IC chips and the substrate, the adhesive film is a die attach film; wherein multiple first bonding wires are soldered on the first IC chip, each of the multiple first bonding wires has one end fixed to the first IC chip and the other end soldered to pads provided on the first surface of the substrate at both sides of the first IC chip; wherein multiple second bonding wires are soldered on the second IC chip, each of the multiple second bonding wires has one end fixed to the second IC chip and the other end soldered to pads provided on the first surface of the substrate at both sides of the second IC chip; wherein an IC chip attachment area of the substrate is coated with copper, and a binder containing a metal component is used during the IC chip bond; and wherein the substrate adopts an SMT PAD window-opening manner, the substrate has the specification as follows: a 0201, indicating a non-solder mask defined pad structure, and 0402, indicating a solder mask defined pad structure.