Patent ID: 9522822
Filing Date: 2016-12-20
CPC Classification: B81B,B81C,H01L

Claim Text:
1. An integrated circuit (IC) comprising: a semiconductor die comprising a first top surface and a first bottom surface; a MEMS (micro-electromechanical system) die comprising a second top surface and a second bottom surface, wherein the MEMS die is disposed over the semiconductor die, and the first top surface is coupled to the second top surface; a cap bonded to the second bottom surface defining a cavity between the MEMS die and the cap; and an outgas barrier layer disposed within the MEMS die configured to prevent outgassing from the semiconductor die to the cavity; wherein the MEMS die comprises: a MEMS substrate and a MEMS interconnect; patterned conductors disposed within an oxide layer of the MEMS interconnect, and wherein the outgas barrier layer is disposed between the MEMS substrate and the oxide layer; and an electrode layer formed between the outgas barrier layer and the MEMS substrate.