Patent ID: 9417967
Filing Date: 2016-08-16
CPC Classification: G06F

Claim Text:
1. A computing device, comprising: a serial peripheral interface (SPI) ROM configured to store a first basic input-output system (BIOS) booting block and a main BIOS; a super I/O controller configured to store a second BIOS booting block; and a storage device configured to store a computer-readable program comprising instructions that, when executed by at least one processor, cause the at least one processor to: check an integrity of the main BIOS when the computing device is powered on; determine whether the main BIOS is partially or fully damaged according to the checking result; power on the computing device using the first BIOS booting block when the main BIOS is partially damaged; power on the computing device using the second BIOS booting block when the main BIOS is fully damaged; and read a backup BIOS stored in the storage device, and write the backup BIOS into the SPI ROM to update data of the main BIOS by transmitting a copy of the backup BIOS from the storage device to the SPI ROM.