Patent ID: 9484458
Filing Date: 2016-11-01
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a substrate having a first region and a second region defined therein; a plurality of first gates spaced apart from each other at a first pitch in the first region; a plurality of second gates spaced apart from each other at a second pitch different from the first pitch in the second region; active patterns protruded from the substrate, each of the active patterns extending in a first direction; a space between adjacent active patterns; at least one of the plurality of first gates and at least one of the plurality of second gates extending on at least two active patterns in a second direction, the second direction being perpendicular to the first direction; a first trench in the first region between the plurality of first gates; a second trench in the second region between the plurality of second gates; a first epitaxial layer in at least a portion of the first trench; and a second epitaxial layer in at least a portion of the second trench, wherein the first trench and the second trench have substantially equal depths, and wherein the first trench and the second trench have substantially hexagonal profiles or sigma shapes.