Patent ID: 9324364
Filing Date: 2016-04-26
CPC Classification: G11B

Claim Text:
1. A system for processing data, the system comprising a processor and logic integrated with and/or executable by the processor, the logic being configured to: individually set, for each of one or more range-constrained finite impulse response (FIR) filter taps configured for use in a FIR filter, a predetermined range of values suitable for controlling an equalizer response; individually determine, for each of one or more fixed FIR filter taps configured for use in the FIR filter, a static value which does not change, wherein the static value is determined to optimally control the equalizer response based on results obtained from an initial equalizer; set each of the one or more fixed FIR filter taps configured for use in the FIR filter to its static value; and pass data through the equalizer comprising the FIR filter to obtain equalized data, wherein each of the one or more range-constrained FIR filter taps are individually adaptive within its predetermined range of values.