Patent ID: 9349731
Filing Date: 2016-05-24
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a semiconductor device, comprising: forming an insulation film including a trench on a substrate; depositing a first metal gate film conformally along a top surface of the insulation film and on a side surface and a bottom surface of the trench; depositing a second metal gate film on the first metal gate film; forming a first metal gate film pattern and a second metal gate film pattern by performing a first planarization process for removing portions of the first and second metal gate films, together, so as to expose a top surface of the insulation film; performing a metal gate pull back process to etch upper portions of the first and second metal gate film patterns to a predetermined depth; depositing a third metal gate film on remaining portions of the first and second metal gate film patterns and the insulation film such that the third metal gate film directly contacts the second metal gate film pattern, the third metal gate film comprising a same material as the second metal gate film pattern; forming a third metal gate film pattern on the remaining portions of the first and second metal gate film patterns by performing a second planarization process for removing a portion of the third metal gate film so as to expose the top surface of the insulation film; and forming a blocking layer pattern covering an exposed surface of the third metal gate film pattern.