Patent ID: 9402187
Filing Date: 2016-07-26
CPC Classification: H04B,H04W

Claim Text:
1. An apparatus comprising: at least one processor; and at least one memory including computer program code; the at least one memory and the computer program code configured to, with the at least one processor, cause the apparatus at least to perform: receive a beacon signal from at least one transmitter; measure total received interference power; determine strength of the received at least one beacon signal; determine at least one offset value by using the information the at least one beacon signal comprises; generate the estimates of received interference power values transmitter-wise by using the determined at least one offset value; generate estimates of received interference power values transmitter-wise by using the determined strength of the received at least one beacon signal, wherein the estimates of received interference power values correspond to interference received at the apparatus; combine the transmitter-wise estimated received interference power values for obtaining an estimated total received interference power; and subtract the estimated total received interference power from the measured total received interference power for obtaining a residual interference power, the residual interference power originating from uncooperative devices.