Patent ID: 9442836
Filing Date: 2016-09-13
CPC Classification: G06F

Claim Text:
1. An arithmetic processing device comprising: an allocation unit configured to reserve a memory allocation area in a memory and register address range information indicating an address range of the memory allocation area and management area identification information identifying a memory area allocation function in an address range table, in response to an execution of the memory area allocation function requesting memory area allocation; a determination unit configured to refer to the address range table and perform determination processing as to whether or not an access destination address of a memory access instruction is within an address range indicated by the address range information that is registered in the address range table and that corresponds to the management area identification information of the memory access instruction, in response to an execution of the memory access instruction; the allocation unit configured to register any management area identification information amongst a first management area identification information group, together with the address range information, in the address range table, in response to the execution of the memory area allocation function that requires an address range check, and configured to register second management area identification information that is distinguished from the first management area identification information group, together with the address range information, in the address range table, in response to the execution of the memory area allocation function that does not require the address range check; and the determination unit does not determine that the access destination address is outside the address range, regardless of the determination as to whether or not the access destination address is within the address range indicating the address range information registered in the address range table, when the management area identification information held by the memory access instruction is the second management area identification information, in response to the execution of the memory access instruction.