Patent ID: 9397720
Filing Date: 2016-07-19
CPC Classification: H04B

Claim Text:
1. A transceiver comprising: an integrated circuit that includes a transmit path, a first switch coupled in series with an output of the transmit path, a receive path, and a second switch coupled as a shunt with an input of the receive path; and a plurality of external matching networks coupled to the transmit and receive paths of the integrated circuit to reduce loading from one path to other, wherein the first switch is located between the plurality of external matching networks and a power amplifier of the transmit path and the second switch is located between the plurality of external matching networks and a low noise amplifier of the receive path, wherein the plurality of external matching networks are external to the integrated circuit of the transceiver and are all directly coupled to a shared balun via a single port to convert differential signals from the plurality of external matching networks into single-ended signals that interface with an antenna coupled to the shared balun, wherein the plurality of external matching networks further comprises a first network as a series inductance network for providing a large inductance when the integrated circuit is in a transmit mode and providing an impedance match to the LNA input when the integrated circuit is in a receive mode; a second network as a series capacitance network for providing minimal loading when in the receive mode; and a third network as a shunt inductance network for providing impedance matching for the receive and the transmit paths.