Patent ID: 9508606
Filing Date: 2016-11-29
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a transistor device, the method comprising: forming an InSb layer on a substrate; forming a GaSb layer on the substrate; forming a first gate member that partially overlaps the InSb layer, such that a first portion of the InSb layer and a second portion of the InSb layer are not covered by the first gate member; forming a second gate member that partially overlaps the GaSb layer, such that a first portion of the GaSb layer and a second portion of the GaSb layer are not covered by the second gate member; doping a first first-type dopant set in the first portion of the InSb layer; doping a first second-type dopant set in the second portion of the InSb layer; doping a second first-type dopant set in the second portion of the GaSb layer; and doping a second second-type dopant set in the first portion of the GaSb layer.