Patent ID: 9354266
Filing Date: 2016-05-31
CPC Classification: G01R

Claim Text:
1. A jitter meter device, comprising: a switch serially coupled to a current source; a capacitive element configured to be selectively charged through the switch by the current source when the switch is closed, wherein both a selection of when the capacitive element is charged and a selection of when the switch is closed is made by a received signal from which an accumulated jitter value is to be determined and which is applied to the switch as a control signal, and wherein the selections are based on a particular magnitude value of the received signal, wherein the switch is closed and charging only occurs at times when the received signal is high; an analog-to-digital converter coupled to the capacitive element to determine a voltage across the capacitive element after a number of cycles of the received signal; a jitter computation device, having a processor and memory, coupled to the analog-to-digital converter to output the accumulated jitter value of the received signal using the voltage, wherein the accumulated jitter value is accumulated over the number of cycles; and a counter coupled to the jitter computation device to determine the number of cycles of the received signal.