Patent ID: 9355363
Filing Date: 2016-05-31
CPC Classification: B82Y,G06F,G06N

Claim Text:
1. A method implemented on a computer with a processor executing instructions from a memory to compute, in parallel, weights of binary outputs of an algorithmically computable function given weights of binary inputs for a set of N bits, the method comprising: storing a plurality of input matrices that encode the weights of the binary inputs for the set of N bits, each weight defined by a product of the input matrices, with each input matrix associated with a binary state for a bit in the set of N bits, the input matrices describing a set of possible inputs for the algorithmically computable function; storing the algorithmically computable function as interconnected gates that each represents a matrix operation, at least one of the gates performing a matrix operation on at least one matrix that is input to the respective gate; applying the interconnected gates to the plurality of input matrices to obtain a plurality of output matrices that encode the weights of the binary outputs; and calculating a weight of a given output based at least in part on the plurality of output matrices, the weight of the given output indicating a probability that the given output is generated by the algorithmically computable function using the set of possible inputs.