Patent ID: 9349600
Filing Date: 2016-05-24
CPC Classification: H01L

Claim Text:
1. A semiconductor device manufacturing method comprising: forming an element isolation insulating film in a semiconductor substrate; forming a first film on a surface of the semiconductor substrate; forming a second film on the element isolation insulating film and on the first film; forming a first resist pattern that includes a first open above the element isolation insulating film in a first region; removing the second film on the element isolation insulating film in the first region to separate the second film in the first region into a plurality of parts by performing first etching using the first resist pattern as a mask; forming a third film on the second film in the first region after removing the first resist pattern; forming a first gate electrode on the third film in the first region; and forming a first insulating film that includes the first film, the second film, and the third film under the first gate electrode by patterning the first film, the second film, and the third film using the first gate electrode as a mask.