Patent ID: 9319059
Filing Date: 2016-04-19
CPC Classification: H03M

Claim Text:
1. A SAR ADC comprising: a DAC having a capacitor array, the capacitor array having a plurality of segments, and a number of attenuation capacitors that are connected to the plurality of segments such that an attenuation capacitor is connected to and between each adjacent pair of segments, the plurality of segments including: a comparator connected to the DAC; and a controller connected to the DAC and the comparator; wherein the main DAC segment further has a number of main switches that are connected to the binary-weighted main conversion capacitors; wherein each of the main conversion capacitors has a first plate that is connected to a main node, and a second plate that is connected to a main switch, each main switch to be connected to receive an input voltage, a reference voltage, or ground, and a sequence of control words that each selects the input voltage, the reference voltage, or ground that is to be placed on the second plates of the main conversion capacitors.