Patent ID: 9470978
Filing Date: 2016-10-18
CPC Classification: C08G,C08L,G02F,G03F,H01L

Claim Text:
1. A method manufacturing a thin film transistor array panel, comprising: forming a thin film transistor including a gate line, a semiconductor layer, a source electrode, and a data line on a substrate; coating a solution including an organic siloxane resin represented by Chemical Formula 1: wherein in Chemical Formula 1, each of the R groups is independently selected from the group consisting of a saturated hydrocarbon and an unsaturated hydrocarbon having from 1 to about 25 carbon atoms, and wherein x and y are each independently an integer from 1 to about 200, wherein each wavy line indicates a bond to an H atom or to an x siloxane unit or a y siloxane unit, or a bond to an x siloxane unit or a y siloxane unit of another siloxane chain comprising x siloxane units or y siloxane units or a combination thereof; covering the thin film transistor on the substrate to form a preliminary passivation layer; irradiating the preliminary passivation layer with light through a mask; and developing the preliminary passivation layer to form a passivation layer having a contact hole.