Patent ID: 9251045
Filing Date: 2016-02-02
CPC Classification: G06F

Claim Text:
1. A method for helping to localize an error produced when a first testcase is executed on a hardware set, causing the hardware set to write to a set of data storage locations, the method comprising: performing a first run of the first testcase on the hardware set along a first execution path to yield first testcase-run results in the form of a first set of values respectively stored in the set of data storage locations; performing a second run of the first testcase on a software model version of the hardware set along a second execution path to yield second testcase-run results in the form of a second set of values respectively stored in the set of data storage locations; determining a set of miscompare data storage location(s), including at least a first miscompare data storage location, by comparing the first set of values and the second set of values; generating a first modified version of the first testcase that, when executed on the software model version of the hardware set, will produce a third execution path different from the second execution path, the modified version of the first testcase based on: (i) the set of miscompare data storage location(s), and/or (ii) control flow information recorded during the second run of the first testcase; performing a first run of the first modified version of the first testcase on the software model version of the hardware set along the third execution path to yield third testcase-run results in the form of a third set of values respectively stored in the set of data storage locations; comparing the first set of values and the third set of values; and based on the similarity between the first set of values and the third set of values, providing an indication of similarity between the first execution path and the third execution path.