Patent ID: 9401105
Filing Date: 2016-07-26
CPC Classification: G09G

Claim Text:
1. A display device comprising: a display panel including a plurality of pixels connected with a plurality of gate lines and a plurality of data lines; a gate driving unit configured to drive the plurality of gate lines; a data driver configured to drive the plurality of data lines; and a timing controller configured to generate a plurality of control signals for controlling the gate driving unit and the data driver in response to externally provided clock signal and data signals, wherein the timing controller converts the data signals into an image data signal, a horizontal synchronization signal, a vertical synchronization signal, and a data enable signal, a pulse width of each of the horizontal synchronization signal and the vertical synchronization signal corresponding to an aspect ratio of the data signals or a size of a black image display area, wherein the timing controller generates the plurality of control signals according to the image data signal, the data enable signal, and pulse widths of the horizontal synchronization signal and the vertical synchronization signal, and wherein, when the aspect ratio of the data signals is different from an aspect ratio of the display device, the timing controller sets the pulse width of at least one of the vertical synchronization signal and the horizontal synchronization signal to be longer than a pulse width at a normal mode.