Patent ID: 9431532
Filing Date: 2016-08-30
CPC Classification: H01L

Claim Text:
1. A high voltage power MOSFET, comprising: a semiconductor substrate doped by a first conducting type; a source doped by a second conducting type and over the semiconductor substrate; a drain region doped by the second conducting type and on the semiconductor substrate; one or more drain layers doped by the second conducting type and on the semiconductor substrate, wherein the one or more drain layers span between the body region and the drain region, wherein doping levels in the source and in the drain region are at least an order of magnitude higher than doping levels in the body region and the one or more drain layers; a body region doped by the first conducting type and configured to separate the source from the one or more drain layers and the drain region; an insulating layer formed on at least a portion of the body region and over the one or more drain layers; a voltage regulating layer on the insulating layer and configured to produce voltage distributions in the one or more drain layers to deplete charge carriers to increase blockage voltage in an off state, and to accumulate charge carriers in an on state to reduce on-state resistance, wherein the voltage regulating layer includes a layer of serially connected P-N junctions which includes multiple pairs of P-N junctions connected back-to-back, wherein the layer of serially connected P-N junctions includes a first end electrically connected with the source and a second end electrically connected with the drain region; and a gate on the insulating layer and at least in part over the source.