Patent ID: 9349823
Filing Date: 2016-05-24
CPC Classification: H01L

Claim Text:
1. A method of forming an integrated circuit, the method comprising: providing a semiconductor substrate including an N-type field effect transistor well and a P-type field effect transistor well; forming an interfacial oxide layer within the N-type field effect transistor well and the P-type field effect transistor well; nitriding the interfacial oxide layer; forming a high-k dielectric layer over the interfacial oxide layer after nitriding the interfacial oxide layer; forming an oxygen reservoir over at least the P-type field effect transistor well; annealing the semiconductor substrate including the oxygen reservoir disposed thereon to diffuse oxygen through the high-k dielectric layer and the interfacial oxide layer from the oxygen reservoir, thereby extending the interfacial oxide layer into the P-type field effect transistor well to form an regrown interfacial region; and forming a gate electrode structure over the N-type field effect transistor well and the P-type field effect transistor well including over the regrown interfacial region.