Patent ID: 9281316
Filing Date: 2016-03-08
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a first direction in a cross-section view and a second direction in a plan view, wherein the second direction is perpendicular to the first direction; first stacked groups each including first interlayer insulating patterns and first conductive patterns alternately stacked over a substrate in the first direction; second stacked groups each including second interlayer insulating patterns and second conductive patterns alternately stacked over the first stacked groups in the first direction; a plurality of channel layers passing through the first stacked group, a support body, and the second stacked group in the first direction; first slits located between the first stacked groups to completely separate the first stacked groups from each other in the second direction; second slits located between the second stacked groups to completely separate the second stacked groups from each other in the second direction; and the support body including holes arranged at a predetermined interval and overlapping the first and second slits, wherein the support body is formed between the first stacked groups and the second stacked groups in the first direction.