Patent ID: 9263153
Filing Date: 2016-02-16
CPC Classification: G11C

Claim Text:
1. A semiconductor storage device comprising: a nonvolatile semiconductor memory, a power supply unit; a controller; and a nonvolatile semiconductor memory comprising a memory cell array including blocks each including memory cells, wherein the memory cell array comprises: the power supply unit configured to receive a power supply from outside the semiconductor storage device and to supply a specific voltage to the nonvolatile semiconductor memory and the controller, the controller: the first process includes writing data to a block in the user area using a first cell applied voltage higher than a voltage used in the normal mode, the first process includes erasing data from the block in the user area using a second cell applied voltage before the writing data to the block in the user area using the first cell applied voltage, the second process includes repeating performing erasing data, writing data, and first reading data in that order in each block in the user area, a third cell applied voltage, which is used in the normal mode, is lower than the first cell applied voltage and is used in the writing of the second process, and a fourth cell applied voltage, which is used in the erasing data of the second process, is lower than the second cell applied voltage.