Patent ID: 9343001
Filing Date: 2016-05-17
CPC Classification: G03B,G06F,G09F,G09G

Claim Text:
1. A display device, comprising: a plurality of display panels arranged in a horizontal scan line direction; a pixel information generation part configured to generate pixel data of a pixel contained in a virtual display area including individual display areas corresponding to the plurality of display panels and a gap area for displaying no image sandwiched between two adjacent ones of the individual display areas by decoding image data; a virtual panel control part configured to generate a virtual horizontal synchronizing signal and a virtual pixel clock used to control a single panel having a size of the virtual display area and synchronize pixel data of pixels contained in a virtual horizontal line which is one horizontal scan line of the virtual display area to the virtual horizontal synchronizing signal and the virtual pixel clock; a plurality of line buffers each provided for the corresponding one of the display panels; a correspondence information storage part configured to store correspondence information indicating a correspondence between the virtual display area and each of the individual display areas, the correspondence information indicating that pixel data of a pixel in the gap area is not displayed; a display panel specification part configured to acquire, from the virtual panel control part, the pixel data of the pixels contained in the virtual horizontal scan line synchronized to the virtual horizontal synchronizing signal and the virtual pixel clock together with the virtual horizontal synchronizing signal and the virtual pixel clock, specify, on the basis of the correspondence information and the acquired virtual horizontal synchronizing signal and the acquired virtual pixel clock, one of the plurality of display panels to which pixel data of one pixel contained in the virtual horizontal scan line in the virtual display area is to be outputted, and store the pixel data of the one pixel in the line buffer corresponding to the specified one of the display panels; and an output control part configured to output control information including a horizontal synchronizing signal and a pixel clock to the corresponding one of the display panels and a read enable signal to the line buffer so that the line buffer outputs the pixel data stored therein to every one of the display panels in synchronization with the output of the control information as pixel data of pixels in one horizontal scan line of this display panel each time the specification of pixel data of all pixels contained in the virtual horizontal scan line in the virtual display area is completed.