Patent ID: 9501074
Filing Date: 2016-11-22
CPC Classification: G05F

Claim Text:
1. A circuit comprising: a comparator to monitor a transient with respect to a predetermined threshold at the output of a voltage regulator and to generate a compensation signal if the transient exceeds the predetermined threshold; and a dynamic current pull-down block that is triggered from the compensation signal of the comparator and operative with an output stage of the voltage regulator to mitigate the transient at the output of the voltage regulator by concurrently activating a plurality of current pull-down switches during the transient and sequentially deactivating each current pull-down switch of the plurality of current pull-down switches after its predetermined deactivation delay for each current pull-down switch; further comprising an error amplifier to generate an error output voltage with respect to an input reference voltage of the voltage regulator and an output stage to receive the error output voltage of the error amplifier and to generate a control signal for the voltage regulator.