Patent ID: 9252217
Filing Date: 2016-02-02
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor arrangement, comprising: forming a first opening in a first dielectric layer, the first dielectric layer over a substrate; forming a first portion of a semiconductor column in the first opening, the first portion comprising a first material; forming a second dielectric layer around the first portion, such that a top surface of the second dielectric layer is at least one of even with or above a top surface of the first portion; forming a second portion of the semiconductor column over the first portion, the second portion comprising a second material, where a bottom surface of the second portion comprises less than one percent of the first material and the top surface of the first portion comprises less than one percent of the second material; forming a third dielectric layer around the second portion, such that a top surface of the third dielectric layer is at least one of even with or above a top surface of the second portion; and forming a third portion of the semiconductor column over the second portion, the third portion comprising a third material, where a bottom surface of the third portion comprises less than one percent of the second material and the top surface of the second portion comprises less than one percent of the third material.