Patent ID: 9256274
Filing Date: 2016-02-09
CPC Classification: G06F

Claim Text:
1. A computing device, comprising: a processor that is arranged to enter an idle state that is selected from a group of characterized idle states, wherein the selected idle state is an optimal idle state that is selected from the group of the characterized idle states in response to an estimated idle period in which the processor is estimated to remain in the selected idle state; a detector that is arranged to provide processor power indications that are used to determine an amount of power consumed by the processor while the processor is in any of the idle states of the group of characterized idle states; and a calibration unit that is arranged to characterize each idle state of the group of characterized idle states in response to the provided processor power indications, wherein each idle state is characterized by determining an aggregate amount of power consumed by the processor during each iteration of the processor operating in the idle state for a different idle period.