Patent ID: 9325305
Filing Date: 2016-04-26
CPC Classification: H03K

Claim Text:
1. A method of biasing a differential driver with a first transistor and a second transistor, the method comprising: providing a differential drive signal to a gate of the first transistor and to a gate of the second transistor, where each portion of the differential drive signal is switched between a first voltage level and a second voltage level higher than the first voltage level in a complementary manner such that the transistor receiving the first voltage level is deactivated and the transistor receiving the second voltage level is activated; electronically adjusting at least the second voltage level such that the activated transistor is operating in the saturation region; regulating a drain voltage of an activated replica transistor such that the activated replica transistor is operating in the saturation region; and using an adjustment signal for the activated replica transistor as a reference voltage for the second voltage level of the differential drive.