Patent ID: 9240247
Filing Date: 2016-01-19
CPC Classification: G11C,H03K

Claim Text:
1. A ring oscillator comprising: a plurality of delay circuits, which are ring-connected, wherein at least one of the plurality of delay circuits includes an SRAM cell having a first node to which an input signal inputs and a second node from which an output signal outputs, and a path circuit connected in parallel to the SRAM cell, the SRAM cell outputs the output signal from the second node to a delay circuit in the next stage within the plurality of delay circuits in response to one transition of rise transition and fall transition of the input signal to be input to the first node from a delay circuit in the previous stage within the plurality of delay circuits, the path circuit outputs an output signal to the delay circuit in the next stage in response to the other transition than the one transition of the rise transition and the fall transition, the SRAM cell has a first and a second transmission transistor, a first transistor and a second transistor connected in series, whose gate terminals are connected to a source terminal of the first transmission transistor and whose drain terminals are connected to a source terminal of the second transmission transistor, and a third transistor and a fourth transistor connected in series, whose gate terminals are connected to the source terminal of the second transmission transistor and whose drain terminals are connected to the source terminal of the first transmission transistor, and at least one of the first node and the second node is directly connected to the drain terminal of the first transistor and the drain terminal of the second transistor or the drain terminal of the third transistor and the drain terminal of the fourth transistor.