Patent ID: 9496358
Filing Date: 2016-11-15
CPC Classification: H01L

Claim Text:
1. A fabrication method of a semiconductor electronic device structure having trench gate, comprising steps of: providing a substrate having a trench disposed therein; forming a gate dielectric layer on the surface in the trench; partially filling the trench with electrode material for forming a gate electrode in the bottom of the trench, wherein the substrate and the gate electrode are electrically insulated from each other by the gate dielectric layer; carrying out a first angled implantation to dope impurities into the substrate through the side walls in the partially filled trench with the gate electrode disposed therein to form a first portion; partially filling the trench with insulating material for forming an insulating cover layer disposed in the trench to cover the gate electrode; carrying out a second angled implantation to dope impurities into the substrate through the side walls in the partially filled trench with both the gate electrode and the insulating cover layer disposed therein to form a second portion, wherein the dose of the second angled implantation is higher than the dose of the first angled implantation.