Patent ID: 9337151
Filing Date: 2016-05-10
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a semiconductor substrate having a contact region; an interlayer insulating layer disposed on the semiconductor substrate; a buffer insulating layer disposed on the interlayer insulating layer; a lower contact plug passing through the interlayer insulating layer and electrically connected to the contact region; an interconnection structure disposed on the interlayer insulating layer; and an adjacent interconnection disposed on the interlayer insulating layer and spaced apart from the interconnection structure, wherein a bottom surface of the interconnection structure includes a first part and a second part that are level with each other, the first part of the bottom surface overlapping a part of an upper surface of the lower contact plug, and the second part of the bottom surface overlapping the interlayer insulating layer, wherein the interconnection structure includes a buffer plug part passing through the buffer insulating layer and electrically connected to the lower contact plug, and an interconnection part disposed on the buffer insulating layer and electrically connected to the buffer plug part, and wherein a bottom surface of the buffer plug part overlaps the part of the upper surface of the lower contact plug.