Patent ID: 9453870
Filing Date: 2016-09-27
CPC Classification: G01R

Claim Text:
1. An apparatus, comprising: an integrated circuit die having a regulated power supply, a power supply grid, and a test circuit; wherein the regulated power supply is biased between a source supply node and a source ground node; wherein the source supply node and the source ground node are externally accessible nodes of the integrated circuit die; wherein an internal supply node of the power supply grid is coupled to an output side of the regulated power supply, the internal supply node being inaccessible to direct probe pin contact; wherein the test circuit is coupled to the internal supply node of the power supply grid; wherein the test circuit is configured to test for at least one short in the power supply grid, the at least one short including at an end thereof an inaccessible node to direct probe pin contact; wherein the test circuit is configured to limit power through the power supply grid to less than that of a probe tip tolerance; and wherein the test circuit is configured to test for the at least one short with background current leakage of the power supply grid being present.