Patent ID: 9230853
Filing Date: 2016-01-05
CPC Classification: H01L

Claim Text:
1. A method of manufacturing a semiconductor device, the method comprising: defining an active region in a semiconductor substrate; forming line-shaped first insulation patterns on the semiconductor substrate to intersect the active region and to extend in a first direction; forming a second insulation layer on the first insulation patterns to fill spaces between the first insulation patterns; patterning the second insulation layer and the first insulation patterns to form a contact hole exposing a portion of the active region, the contact hole being formed to include a pair of first opposite sidewalls exposing the first insulation patterns and the second insulation layer and a pair of second opposite sidewalls exposing only the second insulation layer; isotropically etching the second insulation layer to enlarge the contact hole in a second direction substantially perpendicular to the first direction; and forming a conductive contact plug that fills the enlarged contact hole, wherein the first opposite sidewalls of the contact hole are substantially parallel with the second direction and the second opposite sidewalls of the contact hole are substantially parallel with the first direction.