Patent ID: 9230629
Filing Date: 2016-01-05
CPC Classification: G11C

Claim Text:
1. A semiconductor storage device comprising: a first bit line; a second bit line; a nonvolatile memory element and a first cell transistor connected in series between the first bit line and the second bit line; a sense transistor having a gate connected to a sense node which is provided between the first bit line and the memory element; a read bit line connected to a source or a drain of the sense transistor, the read bit line being configured to transmit data of the memory element; a sense amplifier configured to detect the logic of the data transmitted from the read bit line; a second cell transistor connected in parallel to the first cell transistor between the sense node and the first bit line; a first word line connected to a gate of the first cell transistor; and a second word line connected to a gate of the second cell transistor.