Patent ID: 9366922
Filing Date: 2016-06-14
CPC Classification: G02F

Claim Text:
1. A method for manufacturing a thin film transistor (TFT) array substrate, comprising the following steps: providing a substrate; sputtering a transparent and electrically conductive layer and a first metal layer on the substrate in sequence and utilizing a first multi tone mask to pattern the transparent and electrically conductive layer and the first metal layer, so as to form gate electrodes and common electrodes, wherein the gate electrodes are formed by patterning the transparent and electrically conductive layer and the first metal layer, and the common electrodes are formed by patterning the transparent and electrically conductive layer; and depositing a gate insulating layer, a semiconductor layer and a second metal layer on the substrate in sequence, and utilizing a second multi tone mask to pattern the semiconductor layer and the second metal layer, so as to form pixel electrodes by patterning the semiconductor layer and the second metal layer on the gate insulating layer corresponding to the common electrodes, and to keep portions of the semiconductor layer above the gate electrodes, and to form source electrodes and drain electrodes on the patterned semiconductor layer by patterning the second metal layer; wherein the gate electrode and the common electrode are formed by the first multi tone mask, the pixel electrodes, source electrodes, drain electrodes are formed by the second multi tone mask.