Patent ID: 9472473
Filing Date: 2016-10-18
CPC Classification: G09G,H01L

Claim Text:
1. A method for testing a thin film transistor (TFT) provided on an array substrate comprising: determining a period of a gate electrode test voltage signal and a period of a source-drain-electrode test voltage signal corresponding to TFT characteristics to be tested and signal amplitudes in each period, wherein both the gate electrode test voltage signal and the source-drain-electrode test voltage signal are alternating voltage signals; according to the period and the signal amplitude of the gate electrode test voltage signal and those of the source-drain-electrode test voltage signal, applying the gate electrode test voltage signal to a gate electrode of the TFT, and applying the source-drain-electrode test voltage signal across the source and drain electrodes of the TFT; and obtaining TFT output signals related to the TFT characteristics to be tested, wherein the period of the gate electrode test voltage signal and the period of the source-drain-electrode test voltage signal are constant successive periods, wherein the gate electrode test voltage signal has different signal amplitudes in different periods.