Patent ID: 9478263
Filing Date: 2016-10-25
CPC Classification: G06F,G11C

Claim Text:
1. A method for monitoring and controlling repetitive accesses to a volatile memory, the volatile memory comprising at least one bank including a plurality of rows of cells, the method comprising: mapping each row to one of a plurality of logical blocks; managing a counter for each of the logical blocks, wherein each counter increases when any row mapped to a particular logical block is accessed within a monitoring window, wherein the monitoring window comprises a time period that is less than a refresh interval of the volatile memory; selectively throttling access to rows mapped to a first one of the logical blocks when the counter associated with the first logical block exceeds a threshold to prevent row hammering, wherein the threshold is derived based on the following equation: wherein T is the threshold, A is a maximum number of activates, tREF is the refresh interval, and W is the monitoring window.