Patent ID: 9337351
Filing Date: 2016-05-10
CPC Classification: H01L

Claim Text:
1. A monolithic three dimensional NAND string, comprising: a semiconductor channel; a plurality of control gate electrodes, wherein the plurality of control gate electrodes comprises a first control gate electrode located in a first device level and a second control gate electrode located in a second device level located over a major surface of a substrate and below the first device level; a blocking dielectric, the blocking dielectric comprising a plurality of blocking dielectric segments, wherein each of the plurality of blocking dielectric segments is located in contact with a respective one of the plurality of control gate electrodes, and wherein each of the plurality of blocking dielectric segments comprises a clam shape comprising an opening that faces a direction that is parallel to the major surface of the substrate; and a plurality of discrete charge storage segments, wherein each of the plurality of discrete charge storage segments is located at least partially in a respective blocking dielectric segment having the clam shape, and wherein the plurality of discrete charge storage segments comprises a first discrete charge storage segment located in the first device level and a second discrete charge storage segment located in the second device level.