Patent ID: 9530690
Filing Date: 2016-12-27
CPC Classification: H01L

Claim Text:
1. A method of forming interconnect structures over a through substrate via (TSV) on a substrate, comprising steps of: providing the substrate with the TSV; forming a dielectric layer over the TSV; forming openings in the dielectric layer, wherein the openings are connected and expose portions of the TSV, wherein there are dielectric structures of the dielectric layer amongst the openings; depositing a diffusion barrier layer to line the openings; depositing a conductive layer to gap-fill the openings; and planarizing the conductive layer and the diffusion barrier layer to remove the conductive layer and the diffusion barrier layer outside the openings to form a slotted metal pad, wherein the step of planarizing does not cause significant dishing effect near a center of the slotted metal pad.