Patent ID: 9390970
Filing Date: 2016-07-12
CPC Classification: C23C,H01L

Claim Text:
1. A method for depositing a diffusion barrier and a metal conductive layer for metal interconnects on a wafer substrate, the method comprising: (a) depositing a first portion of the diffusion barrier over the surface of the wafer substrate; (b) etching the first portion of the diffusion barrier at the bottom of a plurality of vias without fully etching through such that an amount of barrier material remains at the bottom of the plurality of vias, while depositing a second portion of the diffusion barrier elsewhere on the wafer substrate; (c) depositing the metal conductive layer over the surface of the wafer substrate such that the metal conductive layer contacts the barrier material remaining at the bottom of the plurality of vias; and (d) precleaning the wafer substrate prior to (a), wherein at least part of (a) and all of (b) are performed in the same processing chamber.