Patent ID: 9250991
Filing Date: 2016-02-02
CPC Classification: G06F,G11C

Claim Text:
1. A method of reducing read-disturb errors in a memory system comprising a nonvolatile memory space organized into a plurality of blocks, each block comprising a plurality of pages, and each page defining an individually addressable physical memory location, the method comprising the steps of: accumulating a Block READ Count corresponding to the number of times any of the pages in a first block have been read; determining whether the Block READ Count for the first block has reached a predetermined number; maintaining a list of pages to be moved, the list including a plurality of entries representing pages to be moved; and after the Block READ Count for the first block has reached a predetermined number: determining whether the list of pages to be moved is full; if the list of pages to be moved is not full, responding to a first READ request directed to a first target page within the first block by moving data stored within the first target page to a second block that is different from the first block and designating data that remains stored within the first target page as invalid data while retaining within the first block valid data stored within pages in the first block other than the first target page; and if the list of pages to be moved is not full, responding to a second READ request directed to a second target page within the first block by moving the data stored within the second target page to a block that is different from the first block and designating data that remains stored within the second target page as invalid data while retaining within the first block valid data stored within pages in the first block other than the second target page, the second READ request being received after the first READ request.