Patent ID: 9483346
Filing Date: 2016-11-01
CPC Classification: G06F,G11C,H03M

Claim Text:
1. A method for accessing data in a plurality of storage nodes having nonvolatile solid-state memory, comprising: distributing user data throughout the plurality of storage nodes through erasure coding such that in event of a determination by the plurality of storage nodes that two of the plurality of storage nodes are unreachable the user data is accessible via the erasure coding from a remainder of the plurality of storage nodes, wherein the plurality of storage nodes are coupled as a storage cluster; receiving a request that directs a read of the non-volatile solid-state memory, wherein the read of the non-volatile solid-state memory is based at least in part on reading a first bit in the non-volatile solid-state memory via a first path, and wherein a plurality of operations queues is coupled to the first path; determining, based on contents of the plurality of operations queues, whether a read time for the reading for the reading the first bit via the first path is within a targeted read latency; and determining a second path to achieve the read of the non-volatile solid-state memory, responsive to determining that the read time for the reading of the first bit via the first path is not within the targeted read latency, wherein a processor performs at least one method operation.