Patent ID: 9465538
Filing Date: 2016-10-11
CPC Classification: G06F,G11C

Claim Text:
1. A flash memory control chip, operating a flash memory in accordance with commands issued from a host, comprising: multiple non-volatile storage areas external to the flash memory; and a microcontroller, storing a root table and a logical-to-physical address mapping relationship between the host and the flash memory in the flash memory and storing a root table pointer in the multiple non-volatile storage areas by turns with respect to updates of the root table to maintain multiple versions of the root table, the logical-to-physical address mapping relationship and the root table pointer, wherein the root table pointer is configured to indicate where the corresponding version of the root table is stored in the flash memory; wherein a mapping relationship pointer is set forth in the root table to indicate where the corresponding version of the logical-to-physical address mapping relationship is stored in the flash memory; wherein in response to a power restoration request issued from the host, the microcontroller retrieves the logical-to-physical address mapping relationship from the flash memory in accordance with an adopted root table pointer which is the latest version of the root table pointer correctly obtained from the multiple non-volatile storage areas.