Patent ID: 9276067
Filing Date: 2016-03-01
CPC Classification: H01L

Claim Text:
1. An SiC semiconductor device comprising: a p-type 4H—SiC region formed on a first part of a surface portion of an SiC substrate, a defect reduction layer formed in a surface portion of the p-type 4H—SiC region, the defect reduction layer having C defect density that is defined by Cdef={[Si density]+[p-type dopant density]−[C density]} and is set to Cdef<10 a gate insulating film formed on the defect reduction layer, and a gate electrode formed on the gate insulating film, wherein the defect reduction layer and a second part of the surface portion of the SiC substrate are both in direct physical contact with the gate insulating film, the second part of the surface portion of the SiC substrate being different from the first part of the surface portion of the SiC substrate, and wherein the defect reduction layer comprises a channel of an n-type metal oxide semiconductor field effect transistor (MOSFET) which includes the gate insulating film and the gate electrode.