Patent ID: 9269793
Filing Date: 2016-02-23
CPC Classification: H01L

Claim Text:
1. A method for fabricating a vertical metal-semiconductor field-effect transistor (MESFET), the method comprising: providing a gallium nitride (GaN) substrate; forming a first n-type GaN epitaxial layer coupled to the GaN substrate, a second n-type GaN epitaxial layer coupled to the first n-type GaN epitaxial layer, and a third n-type GaN epitaxial layer coupled to the second n-type GaN epitaxial layer; forming a metallic contact electrically coupled to the third n-type GaN epitaxial layer; removing at least a portion of the third n-type GaN epitaxial layer to form a source region; forming a plurality of sacrificial layers coupled to the second n-type GaN epitaxial layer; patterning the plurality of sacrificial layers to provide an etch mask coupled to the second n-type GaN epitaxial layer; forming a self-aligned channel region; and forming one or more Schottky metal structures coupled to the self-aligned channel region.