Patent ID: 9396984
Filing Date: 2016-07-19
CPC Classification: H01L

Claim Text:
1. A method of producing a microelectronic device in a substrate including a first semiconductor layer disposed on a dielectric layer, the dielectric layer being disposed on a second semiconductor layer comprising at least a monocrystalline semiconductor, the method comprising: etching a trench through the first semiconductor layer and the dielectric layer such that a bottom wall of the trench is formed by a part of a top face of the second semiconductor layer which is in contact with the dielectric layer, and such that the trench delimits, in the first semiconductor layer, at least one active region of the microelectronic device; chemical vapor etching the second semiconductor layer, at a level of the bottom wall of the trench, according to at least two crystalline planes of the second semiconductor layer, one of the two crystalline planes corresponding to a crystalline orientation of the second semiconductor layer, such that an etched part of the second semiconductor layer extends under a part of the active region; filling the trench and the etched part of the second semiconductor layer with a dielectric material, forming an isolation trench surrounding the active region and including, at a level of the etched part of the second semiconductor layer, at least one portion of the dielectric material extending under a part of the active region.