Patent ID: 9406355
Filing Date: 2016-08-02
CPC Classification: G11C

Claim Text:
1. A sense amplifier, comprising: a first inverting circuit, having a first input end and a first output end, and the first input end receiving a first bit line signal from a memory cell; a second inverting circuit, having a second input end and a second output end, wherein the second input is coupled to the first output end, and the second output end is coupled to the first input end, and the second input end receives a second bit line signal from the memory cell; a capacitor, receiving a boost signal and generating a boosted voltage according to the boost signal during a write-back timing period; a write-back path circuit, coupled to the capacitor and transporting the boosted voltage to one of the first and second input ends during the write-back timing period according to the first and second bit line signals, wherein the write-back path circuit comprises: