Patent ID: 9391197
Filing Date: 2016-07-12
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a substrate, having a first surface; a deep well region, disposed in the substrate; an element region, disposed in the substrate and in the deep well region; a drain region, disposed in the substrate, in the deep well region, and surrounding the element region; a gate structure, disposed on the first surface of the substrate, adjacent to the deep well region, and surrounding the drain region; a well region, disposed in the substrate, in the deep well region, and surrounding the gate structure; a source region, disposed in the substrate, in the well region, and surrounding the gate structure; a body contact region, disposed separately from the source region in the well region and surrounding the source region; and an annular doped region, disposed separately from the deep well region in the substrate and surrounding the deep well region.