Patent ID: 9355781
Filing Date: 2016-05-31
CPC Classification: H01G

Claim Text:
1. A laminated ceramic capacitor comprising a laminate having a plurality of stacked ceramic layers and a plurality of internal electrodes disposed at interfaces between ceramic layers; and a plurality of external electrodes disposed on an outer surface of the laminate and electrically connected to internal electrodes, wherein the ceramic layers interposed between adjacent internal electrodes have ceramic grains in contact with both of the adjacent internal electrodes, the internal electrodes are 0.42 μm or greater and 0.60 μm or less in thickness, the ceramic layers are 0.5 μm or greater and 0.8 μm or less in thickness, of 100 lines drawn perpendicular to the internal electrodes at an interval of the average grain size of the ceramic grains in a cross section of the ceramic layer, the percentage of the number of lines on which ceramic grains are present in contact with both of the adjacent internal electrodes is 5 to 20%, and the ceramic layers contain, as their main constituent, a perovskite-type compound containing Ba and Ti, in which some of Ba is optionally substituted with at least one of Ca and Sr, and some of Ti is optionally substituted with Zr.