Patent ID: 9460258
Filing Date: 2016-10-04
CPC Classification: G06F,Y02E,Y04S

Claim Text:
1. A method for performing shaping on a circuit design, the method comprising: receiving a set of power grid (PG) strategies that specifies a structure of a PG that is to be used in the circuit design; creating a set of placement constraints based on the set of PG strategies, wherein the set of placement constraints comprises a placement constraint that requires a physical partition to be aligned with the structure of the PG, and wherein at least one PG wire passes through the physical partition; performing, by computer, shaping on the circuit design using the set of placement constraints; and after performing said shaping on the circuit design, creating the PG in the circuit design based on the set of PG strategies, wherein said creating the PG in the circuit design comprises pushing the at least one PG wire into the physical partition.