Patent ID: 9417943
Filing Date: 2016-08-16
CPC Classification: G05B,G06F

Claim Text:
1. A safety computing device comprising: a processor that executes a program process on input data; and a memory that stores the input data input to the processor and output data that is a result of the program process, wherein the memory is capable of storing the input data and the output data in each of a first memory area and a second memory area having an address different from an address of the first memory area, and the processor includes an execution control unit that performs a first process, which includes a redundancy check and the program process performed on the input data written in the first memory area and addition of a redundancy code to the output data that is a result of the program process and is written in the first memory area, and a second process, which includes a redundancy check and the program process performed on the input data written in the second memory area and addition of a redundancy code to the output data that is a result of the program process and is written in the second memory area, a result collating unit that collates the output data to which the redundancy code is added in the first process and the output data to which the redundancy code is added in the second process, a computation diagnosis unit that diagnoses, by computation, presence or absence of a failure in the processor and the memory, and an abnormality processing unit that, when an abnormality is detected by at least the redundancy check being performed on the input data by the execution control unit, stops outputting the output data.