Patent ID: 9496307
Filing Date: 2016-11-15
CPC Classification: H01L

Claim Text:
1. A solid-state imaging device comprising: a first semiconductor substrate including a pixel array and a first multilayer wiring layer having a first connecting interconnect, and a second semiconductor substrate including a logic circuit and a second multilayer wiring layer having a second connecting interconnect, wherein the first semiconductor substrate and the second semiconductor substrate are configured such that the first multilayer wiring layer and the second multilayer wiring layer are opposed to one another and are electrically connected to one another; and a light blocking layer including a first electrically-conductive film of the same layer as one of the first connecting interconnect and the second connecting interconnect formed uniformly across a whole surface between the first semiconductor substrate and the second semiconductor substrate corresponding to the logic circuit, wherein the solid-state imaging device is configured as a back-illuminated solid-state imaging device.