Patent ID: 9293486
Filing Date: 2016-03-22
CPC Classification: H01L,H04N

Claim Text:
1. An image capturing device comprising: a pixel circuit region in which a plurality of pixel circuits are arranged in a matrix; a peripheral circuit region that is located on a periphery of the pixel circuit region and in which a peripheral circuit is arranged; and an intermediate region that is located between the pixel circuit region and the peripheral circuit region and that forms a boundary with the pixel circuit region and the peripheral circuit region, wherein the pixel circuit region, the peripheral circuit region, and the intermediate region are provided with a semiconductor layer, a first wiring layer located on the semiconductor layer, and a second wiring layer located away from the semiconductor layer relative to the first wiring layer, and the pixel circuits and the peripheral circuit are connected via one of at least the first wiring layer and the second wiring layer in the intermediate region, and wherein an area occupancy of the one wiring layer in the intermediate region relative to a total area of the intermediate region is between 0.5 times and 1.5 times an area occupancy of the one wiring layer in the pixel circuit region relative to a total area of the pixel circuit region.