Patent ID: 9508551
Filing Date: 2016-11-29
CPC Classification: H01L

Claim Text:
1. A method of fabricating a semiconductor device, the method comprising: stacking an etch target layer, a first mask layer, and a second mask layer on a first surface of a substrate; forming a plurality of first spacer lines parallel to each other and a first spacer pad line on the second mask layer, wherein the first spacer pad line is laterally bent from an end portion of one or more of the first spacer lines, and wherein the first spacer pad line is spaced apart from the first spacer lines; forming a third mask pad, wherein the third mask pad is in contact with the first spacer pad line; etching the second mask layer and the first mask layer using the third mask pad, the first spacer lines, and the first spacer pad line as an etch mask to form one or more first mask lines, a first mask preliminary pad connected to one of the first mask lines, and second mask patterns respectively covering top surfaces of the first mask lines and the first mask preliminary pad; forming a second spacer layer conformally covering sidewalls of the first mask lines, a sidewall of the first mask preliminary pad, sidewalls of the second mask patterns, top surfaces of the second mask patterns, and a top surface of the etch target layer; anisotropically etching the second spacer layer to form second spacer lines respectively covering sidewalls of the first mask preliminary pad and the first mask lines; removing a first portion of the first mask preliminary pad to form first mask pads separated from each other; removing the second mask patterns and the first mask lines; and etching the etch target layer using the second spacer lines and the first mask pads as an etch mask to form conductive lines and conductive pads connected to the conductive lines.