Patent ID: 9263388
Filing Date: 2016-02-16
CPC Classification: H01L

Claim Text:
1. A structure including an array of conductive pathways comprising: a substrate comprising a dielectric material layer an array of lines having a length that extends along a horizontal direction of the substrate, wherein at least one of the lines has a dimple region or a pinch region on its sidewall at a lower surface of said at least one of the lines, wherein said at least one line that has said dimple region or said pinch region has a bottommost surface comprising a first portion and a second portion, and wherein said first portion of said bottommost surface comprises said dimple region or said pinch region and is vertically offset from said second bottommost portion of a bottommost surface of said at least one line having a dimple region or a pinch region; and an array of vias, wherein each via of the array of vias has a vertical dimension that is perpendicular to the length of the array of lines, wherein at least one via in the array of vias is in contact with at least one line of the array of lines.