Patent ID: 9412834
Filing Date: 2016-08-09
CPC Classification: H01L

Claim Text:
1. A method of manufacturing a transistor device, comprising: forming a compound semiconductor material on a semiconductor carrier; forming a source region and a drain region spaced apart from each other in the compound semiconductor material with a channel region interposed between the source and drain regions; forming a Schottky diode integrated with the semiconductor carrier and connected in parallel between the source and drain regions; forming a layer of metallization on a side of the semiconductor carrier facing away from the compound semiconductor material; and forming contacts extending from the source and drain regions through the compound semiconductor material, a first one of the contacts directly contacting the layer of metallization and a second one of the contacts terminating prior to reaching the layer of metallization so that the layer of metallization is spaced apart from the second contact by a portion of the semiconductor carrier, the second contact being in ohmic contact with the semiconductor carrier.