Patent ID: 9263471
Filing Date: 2016-02-16
CPC Classification: G11C,H01L

Claim Text:
1. A semiconductor device comprising a memory circuit, the memory circuit comprising: a first transistor; a second transistor; and a rectifier element comprising a pair of current terminals with a first region having a first conductivity type semiconductor and a second region having a second, different conductivity type semiconductor interposed therebetween, wherein the first region and the second region are in contact with each other, wherein one of a source and a drain of the first transistor is configured to receive a data signal, wherein a gate of the second transistor is electrically connected to the other of the source and the drain of the first transistor, wherein one of the current terminals is electrically connected to a source or a drain of the second transistor, wherein the first transistor comprises an oxide semiconductor layer, wherein a first channel formation region is formed within the oxide semiconductor layer, and wherein the first transistor is formed over the second transistor and the rectifier.