Patent ID: 9466552
Filing Date: 2016-10-11
CPC Classification: H01L

Claim Text:
1. A vertical semiconductor device, comprising: a silicon carbide substrate or a sapphire substrate having a first surface and a second surface facing opposite directions; a conductive array formed by a plurality of conductive plugs which extend from the first surface completely through the substrate to the second surface; a semiconductor layer formed on and in contact with the first surface, the semiconductor layer having a third surface and a fourth surface facing opposite directions, wherein the fourth surface faces the first surface; a first electrode formed on and in contact with the third surface; and a second electrode formed on and in contact with the second surface, for electrically connecting to the conductive array, wherein the semiconductor layer includes: a GaN layer doped with first conductive type impurities; a base region doped with second conductive type impurities, the base region being formed in the GaN layer and electrically connected to the first electrode; and an emitter region doped with first conductive type impurities, the emitter region being formed in the base region and electrically connected to a third electrode which is formed on the third surface; wherein the first electrode, the semiconductor layer, the third electrode, the conductive array, and the second electrode form a vertical bipolar junction transistor (BJT).