Patent ID: 9368417
Filing Date: 2016-06-14
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a first conductive contact on a substrate; a second conductive contact on the substrate, the second conductive contact being located a first distance from the first conductive contact; and a first test pad located a second distance from the first conductive contact, the first distance being less than the second distance, the first test pad being smaller than the first conductive contact; a second test pad on the substrate, the second test pad being smaller than the first conductive contact, wherein the first conductive contact, the first test pad, and the second test pad form an angle, the angle being at least 90° and comprising a vertex located over the first conductive contact; and an interconnect within the substrate, the interconnect electrically connecting the first test pad to the first conductive contact and to the second test pad.