Patent ID: 9362253
Filing Date: 2016-06-07
CPC Classification: H01L

Claim Text:
1. A microelectronic package comprising: a first microelectronic device having an active surface with a plurality of active surface contact lands thereon, an opposing back surface, and at least one side, wherein the first microelectronic device includes at least one through-silicon via extending into the first microelectronic device from the first microelectronic device back surface but not through to the plurality of active surface contact lands of the first microelectronic device active surface, the at least one through-silicon via in electrical communication with integrated circuitry of the active surface of the first microelectronic device; a second microelectronic device having an active surface, an opposing back surface, and at least one side; at least one interconnect electrically connecting the second microelectronic device active surface and the at least one first microelectronic device through-silicon via proximate the first microelectronic device back surface wherein the active surface of the first microelectronic device and the active surface of the second microelectronic device face in the same direction; an underfill material layer disposed between the first microelectronic device and the second microelectronic device, the underfill material layer in direct contact with the at least one side of the second microelectronic die; an encapsulation material surrounding at least a portion of the first microelectronic device and the second microelectronic device, the encapsulation material in contact with and surrounding at least a portion of the underfill material layer on the side of the second microelectronic die; and a build-up layer electrically connected to the plurality of active surface contact lands of the first microelectronic device active surface.