Patent ID: 9443764
Filing Date: 2016-09-13
CPC Classification: H01L,H05K

Claim Text:
1. A method, comprising: obtaining a wafer having a front side, a back side and a plurality of partially etched and metalized through silicon vias (TSVs), wherein each partially etched and metalized TSV of the plurality of partially etched and metalized TSVs extends from a portion of the front side through a portion of the back side of the wafer and terminates before reaching an end surface of the back side of the wafer; patterning and etching a region of the back side of the wafer to expose and reveal a portion of each partially etched and metalized TSV of the plurality of partially etched and metalized TSVs, depositing a metal layer on the back side of the wafer to form a back side metallization, the metal layer covering all of the back side of the wafer including the etched region of the back side of the wafer and the exposed portions of each partially etched and metalized TSV of the plurality of partially etched and metalized TSVs.