Patent ID: 9370854
Filing Date: 2016-06-21
CPC Classification: B24B,H01L

Claim Text:
1. A method fabricating a semiconductor device, the method comprising: providing a semiconductor substrate; depositing a dielectric layer over the semiconductor substrate; forming at least one trench in the dielectric layer; forming a metallization layer in the trench and over the dielectric layer; forming a protection layer, wherein forming the protection layer includes; performing a chemical mechanical polishing, process to planarize the metallization layer and the dielectric layer; and dispersing a surface treating solution containing, trimethylsilyl group on the planarized dielectric layer and the metallization layer to form the protection layer on the dielectric layer, wherein a top surface of the metallization layer is exposed; cleaning the planarized metallization layer and the treated planarized dielectric layer to remove residue from the chemical mechanical polishing process by a base solution; and drying the cleaned planarized metallization layer and dielectric layer in an inert gas environment.