Patent ID: 9437589
Filing Date: 2016-09-06
CPC Classification: H01L

Claim Text:
1. A semiconductor package comprising: a die paddle; a P/N diode disposed over the die paddle, wherein the P/N diode comprises a first doped region having a first doping type disposed in a substrate having a second doping type opposite to the first doping type, wherein the first doped region is disposed at a first side facing the die paddle; a metal pad disposed over the first doped region, the metal pad being coplanar with a major surface of the substrate and covering the first doped region but not all of the major surface of the substrate; a solder layer at the metal pad joining the P/N diode with the die paddle; and a blanket metallic layer disposed over a second side of the P/N diode and covering all of a major surface of the substrate and a portion of sidewalls of the substrate.