Patent ID: 9423979
Filing Date: 2016-08-23
CPC Classification: G06F

Claim Text:
1. A memory system configured to be connected with a host device, the host device including a memory in which a command, a pointer, and data are stored, the pointer pointing to a location of the data, the memory system comprising: a non-volatile memory including a plurality of blocks, the block being a unit of data erasure; a data buffer; a first controller configured to acquire the command from the memory of the host device, and to perform first data transfer between the memory of the host device and the data buffer; and a second controller configured to perform second data transfer between the non-volatile memory and the data buffer according to the command, wherein the first controller includes a first buffer, a second buffer, and a control unit, and wherein the control unit is configured to: buffer, in the first buffer, the command acquired from the memory, determine whether one or a plurality of pointers corresponding to the buffered command is able to be stored in the second buffer, when the pointer is capable of being stored in the second buffer, store the pointer in the second buffer, cause the second controller to execute the command and to perform the second data transfer, and execute the first data transfer corresponding to the command using the pointer stored in the second buffer, and, when the pointer is not capable of being stored in the second buffer, wait for execution of the command until the pointer becomes capable of being stored in the second buffer.