Patent ID: 9525099
Filing Date: 2016-12-20
CPC Classification: C23C,H01L,Y02E

Claim Text:
1. An arrangement for processing wafers in a vacuum processing system using masks, comprising: a wafer carrier, configured for simultaneously supporting a plurality of wafers during processing inside the vacuum processing system, and comprising a carrier frame and two transport rails each provided on a corresponding edge of the carrier frame, the transport rails configured to transport the wafer carrier throughout the vacuum processing system; a plurality of susceptors attached to the carrier frame, each susceptor configured to support a single wafer; a plurality of inner masks, each configured for placing on top of one of the wafers supported by one of the susceptors, each inner mask having an opening-pattern to mask parts of the wafer and expose remaining parts of the wafer; a plurality of outer masks, each configured for placing on top of a corresponding inner mask, each outer mask having an opening configured to partially cover the corresponding inner mask; a mask frame configured to support and lift the plurality of inner masks and the plurality of outer masks off of the wafer carrier, and to secure the plurality of inner and outer masks to the respective susceptor.