Patent ID: 9484910
Filing Date: 2016-11-01
CPC Classification: G06F,H03K

Claim Text:
1. A power-on reset (POR) circuit, comprising: an RC circuit; a Schmitt trigger, the Schmitt trigger having a first threshold and a second threshold; an inverter; and a first positive channel metal oxide semiconductor (PMOS) tube; wherein when a power supply voltage is powered, the power supply voltage charges a capacitor through the RC circuit; when a voltage of the capacitor reaches the first threshold, the Schmitt trigger reverses, and a reset signal of a first level is output, so as to reset a system in which the circuit is; meanwhile, the reset signal of the first level turns on the first PMOS tube through the inverting amplifier, so as to short-circuit the capacitor to the power supply voltage; the POR circuit further comprises a discharge circuit used to detect a glitch of the power supply voltage, and to output a first signal to an input end of the Schmitt trigger when the glitch is detected; the first signal allows the Schmitt trigger to reverse again to output a second level, so as to turn off the first PMOS tube through the inverting amplifier; when the power supply voltage rises along an oblique line again, the Schmitt trigger reverses, and the first level is output, so as to reset the system in which the circuit is.