Patent ID: 9306579
Filing Date: 2016-04-05
CPC Classification: H03K,H03L

Claim Text:
1. A method, comprising: receiving, using a first controller of a first driver circuit in a memory device, a first data segment from a first sub-pre-pre-driver of the first driver circuit; receiving, using the first controller, a second data segment from a first sub-pre-driver of the first driver circuit, wherein the first sub-pre-pre-driver and the first sub-pre-driver sequentially amplify a first sequence of data before transmission by the first driver circuit; receiving, using the first controller, a third data segment from a second sub-pre-pre-driver of a second driver circuit of the memory device; receiving, using the first controller, a fourth data segment from a second sub-pre-driver of the second driver circuit, wherein the second sub-pre-pre-driver and the second sub-pre-driver sequentially amplify a second sequence of data before transmission by the second driver circuit; predicting, using the first controller, a degree to which data dependent noise is expected to delay transmission of the first sequence of data, the second sequence of data, or both in a plurality of transmission lines based at least in part on the first data segment, the second data segment, the third data segment, and the fourth data segment; and adjusting, using the first controller, a first operational parameter of the first driver circuit used to transmit the first sequence of data based on the degree.