Patent ID: 9385071
Filing Date: 2016-07-05
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a die pad, which includes an upper surface and a lower surface opposite to the upper surface, the upper surface forming a rectangular shape in plan view; a plurality of support pins that support the die pad; a plurality of inner leads arranged around the die pad; a plurality of outer leads connected to each of the inner leads; a semiconductor chip which includes a main surface and a back surface opposite to the main surface and in which a plurality of electrode pads is formed in the main surface, the semiconductor chip being mounted over the die pad so that the back surface faces the upper surface of the die pad; a plurality of wires which electrically couple the electrode pads of the semiconductor chip to the inner leads respectively; and a sealing body that seals the support pins, the inner leads, the semiconductor chip, and the wires,