Patent ID: 9269766
Filing Date: 2016-02-23
CPC Classification: H01L

Claim Text:
1. A method for forming a device comprising: providing a substrate having an array region in which memory cells are to be formed; forming storage gates of the memory cells in the array region, wherein each of the storage gates comprises a floating gate and a control gate formed over the floating gate; forming a guard ring surrounding the array region; forming a gate electrode layer on the substrate, wherein the gate electrode layer fills gaps between the storage gates having the floating and control gates and guard ring as well as covering at least the control gates of the storage gates; and planarizing the gate electrode layer to produce a planar surface between the gate electrode layer, storage gates and guard ring, wherein the guard ring maintains thickness of the gate electrode layer in the array region such that thickness of the storage gates across center and edge regions of the array region is uniform.