Patent ID: 9478305
Filing Date: 2016-10-25
CPC Classification: G11C

Claim Text:
1. A method to program a multi-level cell (MLC) memory, the method comprising: during a program verify process: selectively precharging first bitlines of first MLC memory cells of a wordline without precharging second bitlines of second MLC memory cells of the wordline; obtaining first strobe state outputs of the first MLC memory cells, the first strobe state outputs based on first sensed threshold voltage levels of the first MLC memory cells sensed at a first time; and obtaining second strobe state outputs of the first MLC memory cells, the second strobe state outputs based on second sensed threshold voltage levels of the first MLC memory cells sensed at a second time; and based on the first and second strobe state outputs, programming a first MLC memory cell of the first MLC memory cells using a first programming pulse, and programming a second MLC memory cell of the first MLC memory cells using a second programming pulse having a relatively higher voltage than the first programming pulse.