Patent ID: 9373538
Filing Date: 2016-06-21
CPC Classification: H01L

Claim Text:
1. A method of forming a metal interconnect structure, said method comprising: forming an underlying conductive line structure embedded in a dielectric material layer, wherein a top surface of said underlying conductive line structure is coplanar with a top surface of said dielectric material layer; forming another dielectric material layer over said dielectric material layer and said underlying conductive line structure; and forming a patterned hard mask layer over said another dielectric material layer, said patterned hard mask layer comprising a first pattern region in which a portion of a top surface of said patterned hard mask layer is recessed relative to a topmost surface of said patterned hard mask layer by a first recess depth, a second pattern region in which another portion of said top surface of said patterned hard mask layer is recessed relative to said topmost surface of said patterned hard mask layer by a second recess depth, and a third pattern region adjoining said first pattern region and said second pattern region that is recessed relative to said topmost surface of said patterned hard mask layer by a third recess depth that is greater than said first recess depth and is greater than said second recess depth, wherein an entirety of an area of said third pattern region is within an area of said underlying conductive line structure in a see-through top-down view along a direction perpendicular to said topmost surface of said patterned hard mask layer.