Patent ID: 9431352
Filing Date: 2016-08-30
CPC Classification: H01L

Claim Text:
1. A semiconductor structure comprising: a recess within a silicon substrate of an integrated circuit (IC) chip, wherein the recess is directly above and vertically aligned with a circuit of the IC chip embedded within the silicon substrate; and a metal layer positioned only along a bottom surface of the recess above and in direct contact with an oxidized portion of the silicon substrate, the oxidized portion of the silicon substrate extends from a bottom surface of the metal layer to the circuit, wherein the oxidized portion of the silicon substrate is in direct contact with the circuit, such direct contact damages the circuit and renders the IC chip inoperable, wherein a thickness of the oxidized portion of the silicon substrate is directly proportional to a shelf life of the IC chip, the shelf life is equal to the distance between a bottom surface of the metal layer and a top surface of the circuit divided by an oxidation rate of the oxidized portion of the substrate.