Patent ID: 9423855
Filing Date: 2016-08-23
CPC Classification: G06F

Claim Text:
1. An electronic apparatus with a standby mode and a power-on mode, comprising: a chip, functioning under the power-on mode; a memory, coupled to the chip and storing firmware, wherein the chip operates according to the firmware, the memory has a write-protection control terminal, the write-protection control terminal connects with the chip through a write-protection control path, and when receiving an electric potential signal through the write-protection control terminal under the standby mode, the memory turns off a write-protection function to update the firmware; and a switch unit, located on the write-protection control path and configured to be controlled by a power-on signal related to the power-on mode, wherein the switch unit is a transistor, a source and a drain of the transistor are respectively coupled to the chip and the memory, and a gate of the transistor is used for receiving the power-on signal, wherein when the electronic apparatus operates under the standby mode, the switch unit is off and the delivery of the electric potential signal to the chip through the write-protection control path is disabled; when the electronic apparatus operates under the power-on mode, the power-on signal enables the switch unit to be on, the write-protection control path is conducted, the input of the electric potential signal is invalid, and the chip controls the write-protection function of the memory.