Patent ID: 9423846
Filing Date: 2016-08-23
CPC Classification: G06F

Claim Text:
1. An integrated circuit device, comprising: a power circuit configured to maintain asserted values on an input output pin of the device when a functional block of the device is placed in a sleep mode, wherein the power circuit is disposed along a periphery of an integrated circuit device and the power circuit is configured to maintain power when the integrated circuit device is placed in a low-power mode, wherein the power circuit comprises a plurality of segments along the periphery of the integrated circuit device, and wherein a first set of the plurality of segments are powered segments and a second set of the plurality of segments are unpowered segments, and wherein the unpowered segments do not receive power when the integrated circuit device is in the low-power mode; input output blocks for receiving external inputs for the integrated circuit device and for providing outputs from the integrated circuit device, wherein the power circuit is coupled to provide power to at least one of the input output blocks to maintain state when the integrated circuit device is in the low-power mode; and a signal routing path disposed along the periphery of the integrated circuit device, the signal routing path is configured to: route signals from the input output blocks; and receive power from the power circuit to enable the reception of a wake-up signal from an external source when the integrated circuit device is in the lower-power mode.