Patent ID: 9419972
Filing Date: 2016-08-16
CPC Classification: G06F,H04L

Claim Text:
1. A system comprising: a memory device including a plurality of memory buffers and a direct memory access (DMA) descriptor structure, the DMA descriptor structure comprising a transfer command and associated data transfer information and encryption/decryption information that is configured in a two dimensional, tree-linked structure, wherein, according to the two dimensional, tree-linked structure, the transfer command includes a pointer to link the DMA descriptor structure to an additional transfer command in a first dimension and a pointer to link the DMA descriptor structure to target descriptor information or source descriptor information in a second dimension; and a DMA controller communicatively coupled to the memory device, the DMA controller configured to transfer data to/from the memory buffers and encrypt/decrypt the data based on the transfer command and data transfer information and encryption/decryption information provided by the DMA descriptor structure, and then advance to the additional transfer command to process information thereof, wherein the DMA descriptor structure is to enable processing of DMA transactions including one or more data transfer operations and one or more encryption/decryption operations.