Patent ID: 9425052
Filing Date: 2016-08-23
CPC Classification: H01L

Claim Text:
1. A method, comprising: performing a first common ion implantation process to implant a carbon species into first and second unmasked active regions of a semiconductor material for a first and a second transistor, respectively; after performing said first common ion implantation process, forming a masking layer that covers said second active region while leaving said first active region unmasked; recessing said first active region after performing said first common ion implantation process so as to thereby define a recess in said first active region; depositing a layer of threshold adjusting semiconductor material in said recess; with said masking layer in position above said second active region, introducing additional carbon species into said first active region after depositing said layer of threshold adjusting semiconductor material; forming a first gate electrode structure above said first active region and a second gate electrode structure above said second active region after introducing said additional carbon species, wherein each of said first and second gate electrode structures comprises a gate insulation layer comprising a high-k dielectric material, a portion of said carbon species, said additional carbon species, and said threshold adjusting semiconductor material in said first active region is positioned directly below said high-k dielectric material of said first gate electrode structure, and a portion of said carbon species in said second active region is positioned directly below said high-k dielectric material of said second gate electrode structure; and forming first drain and source regions of said first transistor in said first active region and second drain and source regions of said second transistor in said second active region.