Patent ID: 9489007
Filing Date: 2016-11-08
CPC Classification: G06F,G11C

Claim Text:
1. A device, comprising: an integrated circuit having input terminals; internal circuitry; a clock circuit on the integrated circuit to provide an internal clock signal to the internal circuitry, the clock circuit having clock inputs electrically connected to a plurality of the input terminals; the clock circuit configurable to produce the internal clock signal using different sets of the plurality of the input terminals in response to a configuration parameter; and a clock configuration store which provides the configuration parameter, wherein the clock circuit includes a first sub-circuit configured to produce a first clock signal using a single one of the plurality of input terminals, and a second sub-circuit configured to produce a second clock signal using the single one and another one of the plurality of input terminals, the first sub-circuit and the second sub-circuit commonly including an amplifier directly connected to the single one of the plurality of input terminals.