Patent ID: 9431512
Filing Date: 2016-08-30
CPC Classification: B82Y,H01L

Claim Text:
1. A method of forming a nanowire device, comprising: forming a plurality of semiconductor material layers above a semiconductor substrate; forming a gate structure above said plurality of semiconductor material layers; forming a first sidewall spacer adjacent to said gate structure; forming a second sidewall spacer adjacent to said first sidewall spacer; patterning said plurality of semiconductor material layers such that each layer has first and second exposed end surfaces, wherein said gate structure, said first sidewall spacer and said second sidewall spacer are used in combination as an etch mask during said patterning process; removing at least said second sidewall spacer, thereby exposing at least a portion of said patterned semiconductor material layers; and after removing at least said second sidewall spacer, forming doped extension regions in exposed portions of each of said patterned semiconductor material layers.