Patent ID: 9520628
Filing Date: 2016-12-13
CPC Classification: H01P,H03H,H03K

Claim Text:
1. A single pole double throw (SPDT) field-effect transistor (FET) switch comprising: a first FET comprising a first gate terminal, a first drain terminal, and a first source terminal; a second FET comprising a second gate terminal, a second drain terminal, and a second source terminal; an RF input node to communicate an RF input signal to the first and second drain terminals; a first RF output node connected to the first source terminal; a second RF output node connected to the second source terminal; a first reference voltage node to bias the first source terminal and the first drain terminal based on a first reference signal, wherein a first bias circuit element is connected between the first source terminal and the first drain terminal, wherein the first reference voltage node is connected to the first source terminal, and wherein the first reference voltage node is connected to the first drain terminal via the first bias circuit element; a control voltage node to provide a single control signal to the first gate terminal, and to bias the second source terminal and the second drain terminal based on the single control signal, wherein a second bias circuit element is connected between the second source terminal and the second drain terminal, wherein the control voltage node is connected to the second source terminal, and wherein the control voltage node is connected to the second drain terminal via the second bias circuit element; and a second reference voltage node to provide a second reference signal to bias the second gate terminal.