Patent ID: 9287311
Filing Date: 2016-03-15
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a first semiconductor wafer that includes a first line; a second semiconductor wafer that includes a second line, a top surface of the second semiconductor wafer attached to a bottom surface of the first semiconductor wafer; a first electrode that extends to the first line of the first semiconductor wafer; a second electrode that penetrates through the first semiconductor wafer and extends to the second line of the second semiconductor wafer; and a barrier film that is positioned between the first and second electrodes and the first semiconductor wafer so that the first and second electrodes do not contact the first semiconductor wafer, wherein the first line of the first semiconductor wafer is electrically connected with the second line of the second semiconductor wafer through the first and second electrodes, an end of the second electrode contacts the second line at a second contact area, the second contact area is an alloy that includes a material of the second electrode and a material of the second line, which is different from a first contact area at which an end of the first electrode contacts the first line, and the second contact area has a range covering an alloyed portion diffused into the inside of the second electrode and a reaction portion diffused into the inside of the second line from a top surface of the second line.