Patent ID: 9318326
Filing Date: 2016-04-19
CPC Classification: H01L

Claim Text:
1. A structure comprising: a patterned crystalline semiconductor substrate with elevated regions bounded by trenches, wherein the depth of the trenches h is larger than their width d; and epitaxial semiconductor material deposited on said elevated substrate regions in the form of isolated, semiconductor patches on top of said elevated regions; wherein the patterned semiconductor substrate is made of a homogeneous first crystalline semiconductor material; wherein the epitaxial semiconductor material comprises at least one second crystalline semiconductor material having a lattice mismatch to said substrate; wherein said patches have a lower portion, in a proximal position with respect to said elevated regions, and upper portion, in a distal position with respect to said elevated regions; wherein the width of the lower portion of said patches progressively increases moving away from said elevated regions; wherein the upper portion of said patches has sidewalls vertical with respect to said substrate; wherein the vertical sidewalls of adjacent patches are spaced; wherein the spacing between the vertical sidewalls of adjacent patches is smaller than the width of said trenches.