Patent ID: 9245861
Filing Date: 2016-01-26
CPC Classification: H01L

Claim Text:
1. A wafer process for molded chip scale package (MCSP) for packaging semiconductor chips formed at a front surface of a semiconductor wafer, each semiconductor chip comprising a plurality of metal bonding pads formed on a front surface of each semiconductor chip, comprising the steps of: forming a metal bump on each of the metal bonding pads; forming a first packaging layer at the front surface of the wafer to cover the metal bump, wherein a radius of the first packaging layer is smaller than a radius of the wafer forming an un-covered ring at an edge of the wafer, wherein two ends of each scribe line are located between two adjacent semiconductor chips and extend on a front surface of the un-covered ring; thinning the first packaging layer to expose the metal bump from the first packaging layer; forming a cutting groove on a front surface of the thinned first packaging layer along each scribe line by cutting on the first packaging layer along a straight line extended by the two ends of each scribe line exposed on the front surface of the un-covered ring; grinding at a back surface of the wafer to form a recessed space at the back surface of the wafer and a support ring at the edge of the wafer; depositing a metal seed layer at a bottom surface of the wafer in the recessed space; depositing a metal layer covering the metal seed layer; cutting off an edge portion of the wafer; and separating the individual semiconductor chips from the wafer by cutting through the first packaging layer, the wafer, the metal seed layer and the metal layer along the cutting groove, wherein the first packaging layer is cut into a plurality of top packaging layers each of which covers the front surface of each semiconductor chip with the metal bump exposed from the first packaging layer, and wherein the metal layer is cut into a plurality of bottom metal layers each of which covers a back surface of each semiconductor chip.