Patent ID: 9281182
Filing Date: 2016-03-08
CPC Classification: H01L

Claim Text:
1. A method for producing a thinned semiconductor wafer with applied underfill, said method consisting of: (a) providing a semiconductor wafer with a plurality of metallic bumps on its top side and, optionally, through-silica-vias vertically through the silicon wafer; (b) laminating a back grinding tape to the top of the wafer covering the metallic bumps and the through silicon vias, if present, wherein the backgrinding tape is disposed in contact with the metallic bumps; (c) thinning the back side of the wafer to form a thinned wafer; (d) mounting a dicing tape to the back side of the thinned wafer and mounting the silicon wafer and dicing tape to a dicing frame; (e) removing the back grinding tape; (f) providing an underfill material precut into the shape of the thinned wafer; (g) aligning the underfill with the thinned wafer and laminating the underfill to the thinned wafer; wherein prior to (g), no underfill is disposed in between the metallic bumps.