Patent ID: 9389252
Filing Date: 2016-07-12
CPC Classification: G01R,H03K,H03M

Claim Text:
1. A sampling circuitry for a plurality of electrodes, comprising: a plurality of charge amplifiers and a plurality of modulators, wherein each charge amplifier and each modulator, comprised in said plurality of charge amplifiers and said plurality of modulators, respectively, corresponds to an electrode of said plurality of electrodes, wherein each modulator is capable of generating a residue signal and a rough code corresponding to each sampled electrode of said plurality of electrodes, a multiplexer capable of receiving a plurality of residue signals generated by the plurality of modulators, a residue analog to digital converter capable of receiving a multiplexed residue signal from said multiplexer and outputting a digitized multiplexed residue signal, and a digital summation circuitry capable of receiving said digitized multiplexed residue signal and a plurality of rough codes, comprising each rough code corresponding to each sample electrode, and outputting a plurality of output codes.