Patent ID: 9478636
Filing Date: 2016-10-25
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor device, the method comprising: providing a substrate with a gate stack formed thereon, the substrate having a source region, a drain region, and a channel region between the source and drain regions, the gate stack being disposed above the channel region, a top surface and sidewalls of the gate stack being covered by a spacer; forming a first contact feature over the substrate, the first contact feature electrically connecting to at least one of the source region and the drain region, a top surface of the first contact feature being lower than a top surface of the spacer; forming a first dielectric layer over the first contact feature; forming a recess in the spacer thereby exposing the top surface of the gate stack; and forming a gate open conductor in the recess, wherein the gate open conductor does not physically contact the first dielectric layer.