Patent ID: 9391204
Filing Date: 2016-07-12
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor structure comprising: forming a first-side trench on a first side of a gate structure and a second-side trench on a second side of the gate structure opposite the first side by recessing portions of a semiconductor portion located on a substrate; forming a first-side epitaxial semiconductor region in the first-side trench and a sacrificial second-side epitaxial semiconductor region in the second-side trench, wherein the first-side epitaxial semiconductor region and the sacrificial second-side epitaxial semiconductor region have a first composition; forming at least one dielectric layer over the first-side epitaxial semiconductor region, the sacrificial second-side epitaxial semiconductor region and the gate structure; forming a second-side contact opening through the at least one dielectric layer to expose an entirety of the sacrificial second-side epitaxial semiconductor region while the first-side epitaxial semiconductor region remains covered by the at least one dielectric layer; removing the sacrificial second-side epitaxial semiconductor region to expose the second-side trench; and forming a second-side epitaxial semiconductor region in the second-side trench, wherein the second-side epitaxial semiconductor region has a second composition different from the first composition.