Patent ID: 9412743
Filing Date: 2016-08-09
CPC Classification: H01L

Claim Text:
1. A complementary metal oxide semiconductor (CMOS) device, comprising: a PMOS with a P type metal gate, which comprises a bottom barrier layer, a P work function metal (PWFM) layer, an N work function tuning (NWFT) layer, an N work function metal (NWFM) layer and a metal layer; and an NMOS with an N type metal gate, which comprises the NWFT layer, the NWFM layer and the metal layer, wherein the P type metal gate and the N type metal gate further comprise a top barrier layer disposed between the NWFM layer and the metal layer, and the NWFM layer is disposed between the NWFT layer and the top barrier layer and has a different material from materials of the NWFT layer and the top barrier layer.