Patent ID: 9362410
Filing Date: 2016-06-07
CPC Classification: G02F,H01L

Claim Text:
1. A semiconductor device comprising: a substrate; a light-shielding layer; a first insulating layer over the light-shielding layer; a semiconductor layer over the first insulating layer, the semiconductor layer comprising a first channel forming region and a second channel forming region; a gate insulating layer over the semiconductor layer; a gate electrode over the gate insulating layer; a second insulating layer over the gate electrode; a source electrode and a drain electrode over the second insulating layer; a third insulating layer over the source electrode and the drain electrode; a fourth insulating layer over the third insulating layer; and a pixel electrode over the fourth insulating layer, wherein the light-shielding layer, the first channel forming region, the gate electrode, and one of the source electrode and the drain electrode each overlap a first region of the substrate, wherein the light-shielding layer, the second channel forming region, and the gate electrode each overlap a second region of the substrate, wherein the semiconductor layer comprises a first region located between the first and the second channel forming regions, wherein the light-shielding layer, the first region of the semiconductor layer, and the one of the source electrode and the drain electrode, each overlap a third region of the substrate, wherein the semiconductor layer comprises a region not overlapping the light-shielding layer, wherein the source electrode and the drain electrode are each in electrical contact with the semiconductor layer, and wherein the pixel electrode is in electrical contact with the semiconductor layer.