Patent ID: 9373639
Filing Date: 2016-06-21
CPC Classification: H01L

Claim Text:
1. A field effect transistor (FET) device, comprising: a semiconductor substrate comprising a bulk semiconductor layer, an epitaxial n+ layer formed on and in direct contact with the bulk semiconductor layer, a buried insulator (BOX) layer formed on the epitaxial n+ layer, and an active semiconductor or silicon-on-insulator (SOI) layer formed on the BOX layer; an epitaxial silicon germanium (SiGe) transition layer arranged in direct contact with the BOX layer and in direct contact with the epitaxial n+ layer in a PFET region of the semiconductor substrate, the SiGe transition layer having a lower dopant concentration than the epitaxial n+ layer; and embedded source/drain (S/D) regions epitaxially grown on the SiGe transition layer and adjacent the SOI layer in the PFET region, the embedded S/D regions comprising p-type doped SiGe.