Patent ID: 9236296
Filing Date: 2016-01-12
CPC Classification: H01L

Claim Text:
1. A method for forming an MIM capacitor, comprising: forming a dielectric layer over a substrate containing a conductive layer; forming a groove through the dielectric layer to expose the conductive layer in the substrate; forming a first metal layer on a sidewall surface and a bottom surface of the groove and on a top surface of the dielectric layer; forming a sacrificial layer in the groove to expose a portion of the first metal layer that is on the top surface of the dielectric layer and on a top portion of the sidewall surface of the groove; removing the exposed portion of the first metal layer to leave a remaining portion thereof in the groove as a first electrode plate of the MIM capacitor; removing the sacrificial layer from the groove to leave the first electrode plate remaining in the groove; forming a dielectric material layer on the first electrode plate, on the top portion of the sidewall surface of the groove, and on the top surface of the dielectric layer; forming a second metal layer on the dielectric material layer; forming a third metal layer on the second metal layer to fill the groove in the dielectric layer; and polishing the third metal layer, the second metal layer, and the dielectric material layer, using the top surface of the dielectric layer as a stop layer to expose a tip surface area of the dielectric material layer and to expose a tip surface area of the second metal layer; and forming a diffusion barrier layer on the third metal layer in the groove, wherein: the diffusion barrier layer is made of a material including one or more selected from the group consisting of CoWP, CuSiAl, CuAl, CuAlN, and CuMn, and the diffusion barrier layer is patterned so as to cover the tip surface area of the second metal layer and to expose a main portion of the tip surface area of the dielectric material layer.