Patent ID: 9312002
Filing Date: 2016-04-12
CPC Classification: G11C

Claim Text:
1. A method for programming in a memory device, comprising: for each memory cell of a set of memory cells in the memory device, determining whether the memory cell is in a high resistance state or a low resistance state, wherein each memory cell of the set of memory cells is connected to a common conductive path, each memory cell of the set of memory cells is a resistance change memory cell which is able to change its resistance to store information as a function of its resistance, the set of memory cells is arranged in array and each memory cell is subject to a programming voltage on the common conductive path; identifying from the set of memory cells, a first subset of memory cells, the first subset of memory cells comprises memory cells which are in the low resistance state and which are to be programmed to the high resistance state based on a unit of data; identifying from the set of memory cells, a second subset of memory cells, the second subset of memory cells comprises memory cells which are in the high resistance state and which are to be programmed to the low resistance state based on the unit of data; and responsive to the identifying of the first subset of memory cells and the identifying of the second subset of memory cells: programming the first subset of memory cells before the second subset of memory cells.