Patent ID: 9501354
Filing Date: 2016-11-22
CPC Classification: G06F,G11C

Claim Text:
1. A semiconductor memory device, comprising: a memory array; a data-maintaining component, utilized to maintain data which is read from the memory array, or to maintain data which is written to the memory array; an external input/output terminal; an error-checking correction (ECC) component, coupled to the data-maintaining component, utilized to execute error detection or correction for data which is input to the data-maintaining component or for output data from the data-maintaining component; and a compression component, coupled between the external input/output terminal and the ECC component, utilized to execute compression or extension for data, wherein the compression component compresses data which is provided by the external input/output terminal, provides the compressed data to the ECC component, extends data which is provided from the ECC component, and provides the extended data to the external input/output terminal, and the compression component compresses input data to become data which comprises a data type and a consistency number of the data type.