Patent ID: 9311093
Filing Date: 2016-04-12
CPC Classification: G06F

Claim Text:
1. A computer system for executing instructions, the system comprising: a processor configured to communicate with a main storage, the processor comprising an instruction fetcher, an instruction optimizer and one or more execution units for executing optimized instructions, the processor configured to perform a method comprising: obtaining a first instruction and a second instruction for execution, the first instruction preceding the second instruction in program order; determining, by the processor, that the first instruction is a prefix instruction, the prefix instruction specifying a first value to be used as a result operand in executing the first instruction and a location for storing the result operand, the second instruction specifying a value to be used as a source operand in executing the second instruction and a location for fetching the source operand, wherein the result operand of the first instruction is the source operand of the second instruction; executing the first instruction without storing the result operand at the location specified by the first instruction; and executing the second instruction using the first value without fetching the source operand from the location specified by the second instruction.