Patent ID: 9256552
Filing Date: 2016-02-09
CPC Classification: G06F

Claim Text:
1. A computer-implemented method comprising: in a computer executing a supervisor program: the supervisor program establishing a plurality of different memory access permissions comprising any combination of read, write, and execute permissions for one or more different regions of memory of a first domain; setting the memory access permissions of a first set of the regions of memory to execute only; and in response to a request from a process to read or write a particular region of memory in the first set: throwing a read fault for the particular region of memory; performing one or more responsive actions that prevent the process from reading or modifying one or more instructions or one or more embedded immediate values of the particular region of memory; after performing the one or more responsive actions, setting the memory access permissions of the particular region of memory to readable-writeable or read-only and removing the execute-only permission; permitting the process to read or write the particular region of memory.