Patent ID: 9456506
Filing Date: 2016-09-27
CPC Classification: G06F,H01L,H05K,Y10T

Claim Text:
1. A multiple socket, one-hop symmetric multiprocessor package, comprising: a first multiple-socket planar; a second multiple-socket planar; a redistribution card; a first plurality of processor modules connected to the first multiple-socket planar via a respective one of a first plurality of land grid array (LGA) connectors, wherein the first multiple-socket planar is connected to a first side of the redistribution card via a second plurality of LGA connectors; and a second plurality of processor modules connected to the second multiple-socket planar via a respective one of a third plurality of LGA connectors, wherein the second multiple-socket planar is connected to a second side of the redistribution card via a fourth plurality of LGA connectors.