Patent ID: 9287238
Filing Date: 2016-03-15
CPC Classification: H01L

Claim Text:
1. A method of manufacturing molded semiconductor packages, the method comprising: providing a lead frame comprising a plurality of thicker bond pads interconnected by thinner tie bars at a first side of the bond pads; covering the first side of the bond pads with a material resistant to etching of the tie bars; attaching semiconductor dies and electrical conductors to a second side of the bond pads opposite the first side; encasing the semiconductor dies and the electrical conductors in a molding compound at the second side of the bonds pads; etching at least partly through the tie bars between the bond pads at the covered first side of the bond pads; plating exposed sidewalls of the bonds pads uncovered by the molding compound; and cutting through the molding compound in different regions where the tie bars were previously etched, to form separate packages, wherein some of the bond pads are die paddles and other ones of the bond pads are leads, wherein the molding compound extends to the material covering the first side of the bond pads between adjacent ones of the die paddles and leads so that the molding compound completely covers facing sidewalls of adjacent ones of the die paddle and lead bond pads and prevents the plating of the facing sidewalls.