Patent ID: 9362387
Filing Date: 2016-06-07
CPC Classification: H01L

Claim Text:
1. A method for producing a multi-gate in field-effect transistor (FinFET), comprising: forming a channel layer and a gate medium layer on a substrate; forming an amorphous silicon layer on the substrate; etching the amorphous silicon layer by using an etching process to form at least one fin; forming, by using an epitaxial growth process, a first protective layer from both sides to the middle of the substrate along a length direction of the at least one fin until a groove is formed in a middle location along the length direction of the at least one fin; forming a gate electrode layer on the substrate; performing planarization processing on the gate electrode layer to expose the first protective layer; etching away the first protective layer by using the etching process to form a gate electrode centrally aligned with the at least one fin along the length direction of the at least one fin; and forming a source electrode and a drain electrode on the substrate, wherein centrally aligning the gate electrode with the at least one fin balances a series resistance between the source electrode and the drain electrode.