Patent ID: 9390995
Filing Date: 2016-07-12
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a metallic base plate on which a fin arranged in a standing condition and a convex wall arranged in a standing condition are formed on a first main face by integral processing; an insulating layer formed on a second main face of said base plate, the second main face being opposite to the first main face of said base plate; a circuit pattern fixed to said insulating layer; a semiconductor element joined to said circuit pattern; and a sealing resin which seals said insulating layer, said circuit pattern, and said semiconductor element, wherein said fin is formed with a slit that passes through in a thickness direction of said fin, a margin of width is provided on said first main face of said base plate to surround said fin, a side of said base plate is covered with said sealing resin all around but said margin of width of said base plate is laid open to said sealing resin, said convex wall is lower than said fin in height, and a linkage fin is swaged to be fixed between said convex wall and said fin, and further wherein an indentation is produced on a base of said slit that passes through in said thickness direction of said fin.