Patent ID: 9252785
Filing Date: 2016-02-02
CPC Classification: H03L,H04L

Claim Text:
1. A method of clock recovery for a data receiving unit, comprising: obtaining an early/late signal from an incoming data stream, wherein the early/late signal indicates if a set of one or more data samples of the incoming data stream tends to be earlier or later than an edge of a phase-rotated clock signal provided depending on a phase offset value; updating a phase rotation counter value in response to the early/late signal; and determining the phase offset value depending on a rounded phase rotation counter value; wherein the phase offset value is further determined by selecting one of a set of options including maintaining, increasing, and decreasing the rounded phase rotation counter value, wherein the selecting is performed depending on the early/late signal and depending on the phase rotation counter value, and wherein the rounded phase rotation counter value corresponds to a value of a number of most significant bits of the phase rotation counter value, wherein the phase offset value corresponds to the value of the number of the most significant bits of the phase rotation counter value which is maintained, incremented or decremented depending on the early/late signal and depending on a value of a number of least significant bits of the phase rotation counter value.