Patent ID: 9312202
Filing Date: 2016-04-12
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor substrate including a cooling channel, the method comprising: forming a trench in a surface of a first semiconductor wafer, the trench having a trench width; forming a first slot through a second semiconductor wafer, the first slot having a first slot width, the first slot width less than at least a portion of the trench width; forming a second slot through a third semiconductor wafer, the second slot having a second slot width, the second slot width greater than the first slot width; aligning the second semiconductor wafer to the first semiconductor wafer such that the first slot aligns with the trench; aligning the third semiconductor wafer to the second semiconductor wafer such that the second slot aligns with the first slot; and bonding the first semiconductor wafer, the second semiconductor wafer, and the third semiconductor wafer together to form the semiconductor substrate; wherein the trench, the first slot, and the second slot form walls of the cooling channel and edges of the first slot project into the cooling channel.