Patent ID: 9355491
Filing Date: 2016-05-31
CPC Classification: G06T

Claim Text:
1. An image processing apparatus, comprising: a processor; a splitting unit, executing on the processor, to split a first space within an input three-dimensional (3D) model into a plurality of subspaces in order to generate an acceleration structure of the input 3D model; a decision unit, executing on the processor, to set a subspace determined as having a relatively high probability of including a ray progress path among the plurality of subspaces, as a child node having a relatively high traversal priority in the acceleration structure among a plurality of child nodes; and a flag setting unit, executing on the processor, to add, to the child node having the relatively high traversal priority, a flag bit used to identify whether a subspace relatively close to an origin in a world coordinate system among the plurality of subspaces is matched with the subspace determined to have the relatively high probability of including the ray progress path, wherein the child node having the relatively high traversal priority is arranged in a same caching block to a parent node of the child node having the relatively high traversal priority based on a depth-first layout (DFL).