Patent ID: 9406511
Filing Date: 2016-08-02
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor device, the method comprising: forming a first mask and a second mask over an underlying layer, the second mask being interposed between the first mask and the underlying layer; forming first openings in the first mask, the first openings having a first pattern, the first openings exposing a first portion of the second mask; forming spacers along sidewalls of the first openings; forming second openings in the first mask, the second openings having a second pattern, the second openings exposing a second portion of the second mask, a first one of the second openings exposing one of the spacers; masking a portion of the first openings and a portion of the second openings to form a patterning mask for the second mask; patterning the second mask by using the patterning mask as a mask, thereby forming third openings in the second mask, the third openings having a third pattern; and transferring the third pattern to the underlying layer, thereby forming fourth openings in the underlying layer.