Patent ID: 9299703
Filing Date: 2016-03-29
CPC Classification: H01L

Claim Text:
1. A semiconductor structure comprising: a first fin field effect transistor and a second fin field effect transistor located on a substrate; a first dielectric liner comprising a first dielectric material and laterally contacting a source region and a drain region of said first fin field effect transistor; another first dielectric liner comprising said first dielectric material and laterally contacting a source region and a drain region of said second fin field effect transistor; a second dielectric liner comprising a second dielectric material and contacting top surfaces of said source region and said drain region of said first fin field effect transistor; another second dielectric liner comprising said second dielectric material and including a portion that has an L-shaped vertical cross-sectional shape and laterally surrounds said another first dielectric; and a dielectric material layer in contact with said source region and said drain region of said second fin field effect transistor and spaced from said source region and said drain region of said first fin field effect transistor by said second dielectric liner.