Patent ID: 9315424
Filing Date: 2016-04-19
CPC Classification: B23K,B32B,C04B,F16B,H01L,H05B,Y10T

Claim Text:
1. A multi-layer ceramic plate assembly for use in semiconductor processing, said multi-layer ceramic plate assembly comprising: an upper plate layer, said upper plate layer comprising a ceramic disc; a lower plate layer, said lower plate layer comprising ceramic; said upper plate layer and said lower plate layer joined together to form an interior space between said upper plate layer and said lower plate layer within an annulus of an annular joining layer, and an annular joining layer disposed between said upper plate layer and said lower plate layer, wherein said annular joining layer joins an outer periphery of said upper plate layer to an outer periphery of said lower plate layer, wherein said joining layer comprises metallic aluminum, and wherein said joining layer hermetically seals said interior space between said upper plate layer and said lower plate layer from the exterior of said ceramic plate assemble through said joining layer, wherein said joining layer hermetically seals with a joint with a vacuum leak rate of less than 1×10E−9 sccm He/sec.