Patent ID: 9391150
Filing Date: 2016-07-12
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a p-type semiconductor layer; an n-type semiconductor layer connected with the p-type semiconductor layer; a first electrode layer formed on the n-type semiconductor layer; a second electrode layer formed on the p-type semiconductor layer and connected to ground; and a control electrode layer formed above the p-type semiconductor layer, wherein the first electrode layer and the second electrode layer are electrically connected such as to each operate at an identical potential, the first electrode layer is formed on or over the second electrode layer, the second electrode layer is situated on a connection line which is a part of a peripheral line of an interface between the p-type semiconductor layer and the n-type semiconductor layer, and is formed on the n-type semiconductor layer and is extended towards the control electrode layer, and the second electrode layer includes an end portion contacting an upper surface of the n-type semiconductor layer, and the first electrode layer includes an end portion formed on the end portion of the second electrode layer and contacting the upper surface of the n-type semiconductor layer.