Patent ID: 9329868
Filing Date: 2016-05-03
CPC Classification: G06F

Claim Text:
1. A computer program product for reducing a number of read ports for register pairs, the computer program product comprising: a non-transitory storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising: executing, by a computer processor, an instruction, the instruction identifying a pair of registers as containing a wide operand, the wide operand spanning the pair of registers, the executing comprising: determining whether a value stored in a wide register corresponds to a value stored across the pair of registers; based on determining that the value stored in the wide register corresponds to the value stored across the pair of registers, reading the wide operand from the wide register; based on determining that the value stored in the wide register does not correspond to the value stored across the pair of registers, reading the wide operand from the pair of registers; and performing an operation using the wide operand; wherein only a single register read port and a single operation is required to read the wide operand when it is read from the wide register, and multiple register read ports or multiple operations are required to read the wide operand when it is read from the pair of registers.