Patent ID: 9379709
Filing Date: 2016-06-28
CPC Classification: H03K

Claim Text:
1. A circuit, comprising: an output terminal; an input terminal configured to receive an input signal with a first voltage swing; a first transistor including a first gate terminal, a first source terminal, and a first drain terminal; a second transistor including a second gate terminal, a second source terminal, and a second drain terminal, the second drain terminal coupled to the output terminal and the second source terminal coupled to a first voltage; a third transistor including a third gate terminal, a third source terminal, and a third drain terminal, the third drain terminal coupled to the output terminal, the third source terminal coupled to a second voltage, and the third gate terminal coupled to the first drain terminal; and a control circuit coupled to the input terminal, the first gate terminal, and the second gate terminal, the control circuit configured to adjust voltages provided to the first gate terminal and the second gate terminal based on the input signal such that the second transistor conducts in response to the input signal being at a first logical level and the third transistor conducts in response to the input signal being at a second logical level to generate an output signal output on the output terminal, wherein a second voltage swing of the output signal is different from the first voltage swing of the input signal, the output signal is a first signal of a complementary metal-oxide semiconductor differential signal, and the input signal is a first signal of a current-mode-logic differential signal.