Patent ID: 9317425
Filing Date: 2016-04-19
CPC Classification: G06F

Claim Text:
1. A memory management method in an embedded system, comprising: first iteration of sequentially allocating and deleting, by a processor, memory and recognizing an area when the first to last sections of the memory were located as a hollow space list; second iteration of sequentially allocating, by the processor, the memory in an area of the hollow space list by starting memory allocation from an end point of the hollow space list, when the hollow space list is insufficient during the memory allocation, allocating a memory section outside the area of the hollow space list, re-recognizing the hollow space list by expanding to the area when the last section of the memory was located, when the hollow space list is sufficient during the memory allocation, maintaining the hollow space list, and sequentially deleting the allocated memory; and when the hollow space list is re-recognized, initializing, by the processor, the hollow space list.