Patent ID: 9474161
Filing Date: 2016-10-18
CPC Classification: B23K,C23C,C25D,C25F,H05K,Y10T

Claim Text:
1. A method for making a circuit substrate having a circuit pattern, the method comprising: (a) providing an insulative substrate having a top surface; (b) forming a pattern of a recess in the insulative substrate such that the recess is indented from the top surface, the recess being defined by a recess-defining wall having a bottom wall surface and a surrounding wall surface extending upwardly from the bottom wall surface; (c) forming a metallic layer structure on the recess-defining wall of the recess and the top surface of the insulative substrate, the metallic layer structure including at least one active metal layer containing an active metal capable of initiating electroless plating; (d) removing a portion of the metallic layer structure that is disposed along a peripheral edge of the bottom wall surface of the recess-defining wall so as to form the metallic layer structure into a first region which is disposed on the bottom wall surface, and a second region which is physically separated from the first region; and (e) plating a primary metal layer on the first region of the metallic layer structure.