Patent ID: 9471495
Filing Date: 2016-10-18
CPC Classification: G06F

Claim Text:
1. A method for constructing a memory access model, the method comprising: dividing a memory of a node into multiple memory segments, and obtaining a number of access times and an access frequency that a remote node accesses a memory segment, wherein the remote node is another node other than the node in a computer systems; when a memory segment with the number of access times that the remote node accesses the memory segment exceeding a first threshold and an access frequency that the remote node accesses the memory segment exceeding a second threshold exists, dividing the memory segment into multiple memory blocks; and obtaining the number of access times and an access frequency that the remote node accesses the memory block, and when a memory block with the number of access times that the remote node accesses the memory block exceeding a third threshold and an access frequency that the remote node accesses the memory block exceeding a fourth threshold exists, obtaining a page table corresponding to a process referencing the memory block, and clearing a Present bit comprised in each page table entry stored in the page table, wherein the page table is used to store a page table entry of a page to be accessed by the process referencing the memory block; monitoring the process referencing the memory block in real time and starting timing; when the process referencing the memory block generates a missing page interrupt event when accessing a page in the memory block, increasing the number of access times of the page to be accessed, wherein the missing page interrupt event is generated when the process referencing the memory block determines that a Present bit comprised in a page table entry of the page to be accessed is cleared, and the page table entry of the page to be accessed is obtained by the process referencing the memory block from the page table corresponding to the process; and constructing a memory access model of the memory block according to the number of access times of each page in the memory block and time for implementing the access times, wherein the memory accessed model at least comprises the number of access times and an access frequency of each page in the memory block.