Patent ID: 9269441
Filing Date: 2016-02-23
CPC Classification: G11C

Claim Text:
1. A method for operating a non-volatile memory device, comprising: performing an erase operation onto a memory block including a plurality of memory cells which are coupled to first to Nth word lines where N is a natural number of 4 or more, wherein the first to Nth word lines are arranged between a source selection line and a drain selection line so that the first word line is closest to the source selection line and the Nth word line is farthest to the source selection line; and grouping the first to Nth word lines into at least two word line groups, and performing a second soft program operation onto memory cells coupled with the word lines of each word line group, wherein the first word line and the Nth word line belong to a first word line group of the word line groups, and a kth word line and a (N-k+l)th word line belong to a second word line group of the word line groups where k is a natural number of 2 or more and N-1 or less, and the first word line group and the second word line group are different from each other.