Patent ID: 9508609
Filing Date: 2016-11-29
CPC Classification: H01L

Claim Text:
1. A method for forming a FinFET, comprising: providing a semiconductor substrate having a plurality of sacrificial layers formed thereon, each sacrificial layer having two sides; forming a plurality of first sidewall spacers on the semiconductor substrate and having one first sidewall spacer on each side of each sacrificial layer of the plurality of sacrificial layers; forming a plurality of second sidewall spacers on the semiconductor substrate and having one second sidewall spacer on each first sidewall spacer formed on each sacrificial layer, wherein the plurality of second sidewall spacers is made of a material different from the plurality of first sidewall spacers; removing the plurality of sacrificial layers; measuring a first width as a distance between two adjacent first sidewall spacers of the plurality of first sidewall spacers, and a second width as a distance between two adjacent second sidewall spacers of the plurality of second sidewall spacers; when the first width is not substantially equal to the second width, correspondingly etching the plurality of first sidewall spacers or the plurality of second sidewall spacers such that the first width is substantially equal to the second width; and etching the semiconductor substrate, using the plurality of first sidewall spacers and the plurality of second sidewall spacers as an etch mask, to form a plurality of fins, such that a top of each fin of the plurality of fins has a substantially symmetrical morphology.