Patent ID: 9257349
Filing Date: 2016-02-09
CPC Classification: H01L

Claim Text:
1. A method of forming a gate structure, comprising: forming an interfacial layer on a semiconductor substrate; forming a high-k dielectric layer on the interfacial layer; forming a first metal layer over the high-k dielectric layer, wherein the first metal layer includes a first material wherein forming the first metal layer includes depositing the first material selected from the group consisting of titanium-rich TiN and tantalum-rich TaN; scavenging oxygen impurities from the interfacial layer using the first material; forming a second metal layer over the first metal layer, wherein the second metal layer includes a second material; and adsorbing oxygen impurities from at least one layer of a nitrogen-rich material or a carbon-rich material overlying the second metal using the second material; and forming a work function layer over the at least one layer.