Patent ID: 9412822
Filing Date: 2016-08-09
CPC Classification: H01L

Claim Text:
1. A method of forming a FinFET device comprised of source and drain regions, the method comprising: forming an initial fin structure from a semiconductor substrate material, said initial fin structure having first and second sidewalls extending along a gate length direction of said FinFET device between said source and drain regions; covering a top surface and a portion of the first and second sidewalls of said initial fin structure with etch stop material; after forming said etch stop material, forming a sacrificial gate structure above and around said initial fin structure; forming a sidewall spacer adjacent said sacrificial gate structure; performing at least one process operation to remove said sacrificial gate structure and thereby define a replacement gate cavity, wherein said etch stop material on said initial fin structure remains positioned on said initial fin structure while said sacrificial gate structure is removed; performing at least one etching process through said replacement gate cavity to remove a portion of said semiconductor substrate material of said initial fin structure positioned under said replacement gate cavity that is not covered by said etch stop material so as to thereby define a final fin structure and a channel cavity positioned below said final fin structure, said channel cavity extending completely through an entire thickness of said initial fin structure between said first and second sidewalls and exposing a bottom surface of said final fin structure; and substantially filling said channel cavity with a stressed material.