Patent ID: 9395861
Filing Date: 2016-07-19
CPC Classification: G06F

Claim Text:
1. A touch panel comprising: an upper electrode substrate including an upper conductive layer formed on the upper electrode substrate; a lower electrode substrate including a lower conductive layer formed on the lower electrode substrate; a first electrode and a second electrode respectively provided at both ends of the upper conductive layer in a first direction for causing an electric potential distribution in the first direction; a third electrode and a fourth electrode respectively provided at both ends of the lower conductive layer in a second direction perpendicular to the first direction for causing an electric potential distribution in the second direction; a flexible substrate provided to be connected to the lower electrode substrate or the upper electrode substrate; a first resistor portion electrically connected to one of the first electrode and the second electrode and formed on the upper electrode substrate separately from the upper conductive layer; and a second resistor portion electrically connected to one of the third electrode and the fourth electrode and formed on the lower electrode substrate separately from the lower conductive layer, wherein the touch panel is configured to measure wherein the first resistor portion is formed to function as a reference resistor for detecting multi-touches in the first direction based on the voltage value at the first point, wherein the second resistor portion is formed to function as a reference resistor for detecting multi-touches in the second direction based on the voltage value at the second point, wherein the first resistor portion is formed on the upper electrode substrate to stack on the upper conductive layer while a first insulating layer that is formed on the upper conductive layer is interposed between the first resistor portion and the upper conductive layer, and wherein the second resistor portion is formed on the lower electrode substrate to stack on the lower conductive layer while a second insulating layer that is formed on the lower conductive layer is interposed between the second resistor portion and the lower conductive layer.