Patent ID: 9324745
Filing Date: 2016-04-26
CPC Classification: H01L,H04N

Claim Text:
1. A readout circuit unit cell comprising a first and a second input stage amplifiers coupled to a light detector input node, the first input stage amplifier for lower level light input levels compared to the second input stage amplifier for higher level light input levels, said readout circuit unit cell further comprising a unit cell level automatic input stage selection mechanism to select between two input stages amplifiers depending on light input levels by way of determining light intensity by integration and selecting one of said first or second input stage amplifiers as the input stage amplifier to be used in the manner that only one of said first or second input stage amplifiers is selected according to data obtained from a first integration, the selected one of said first or second input stage amplifiers being activated to effectuate a second integration, the two-level integration being effected in a non-equal manner such that the first integration duration is shorter with resect to the second integration duration.