Patent ID: 9265953
Filing Date: 2016-02-23
CPC Classification: A61N,G06F

Claim Text:
1. A circuit for transferring data between a first circuit clocked by a first clock signal having a first frequency and a second circuit clocked by a second clock signal having a second frequency, comprising: means for establishing a sampling window for a plurality of samples of data communicated from the second circuit to the first circuit, wherein the sampling window has a duration that is less than a single clock cycle of the second clock signal; means for establishing a sampling period between each of the plurality of samples, wherein the sampling period is greater than a transition window and less than the sampling window; means for obtaining the plurality of samples of the data from the second circuit, wherein the plurality of samples are obtained within the sampling window and each of the plurality of samples is obtained a sample period apart; means for comparing each of the plurality of data samples; and means for declaring the valid data value based on the comparison.