Patent ID: 9257412
Filing Date: 2016-02-09
CPC Classification: H01L

Claim Text:
1. A structure comprising: a plurality of connectors formed on a top surface of a first semiconductor die; a second semiconductor die formed on the first semiconductor die and coupled to the first semiconductor die through the plurality of connectors; a first dummy conductive plane formed between a first edge of the first semiconductor die and the plurality of connectors, wherein the first dummy conductive plane is rectangular in shape and has a long side and a short side, wherein an outer edge of the long side of the first dummy conductive plane is vertically aligned with a first outer edge of the first semiconductor die; and a second dummy conductive plane formed between a second edge of the first semiconductor die and the plurality of connectors, wherein the second dummy conductive plane is rectangular in shape and has a long side and a short side, wherein an outer edge of the long side of the second dummy conductive plane is vertically aligned with a second outer edge of the first semiconductor die, and wherein the first dummy conductive plane and the second dummy conductive plane form a triangular corner region between the first dummy conductive plane and the second dummy conductive plane, and wherein at least one of the plurality of connectors is located in the triangular corner region.