Patent ID: 9525345
Filing Date: 2016-12-20
CPC Classification: H02M,Y02B

Claim Text:
1. An arrangement for improving transient deviation compensation of an output voltage V out , comprising a DC-to-DC converter with a control unit controlling the converter for generating the output voltage V out at an output of the DC-to-DC converter, wherein the DC-to-DC converter includes gate drivers, logic gates connected between the control unit and respective gate drivers, and high-side switches connected to outputs of the respective gate drivers, wherein the output of the DC-to-DC converter is connected to a load, wherein a comparator is arranged between the output of the DC-to-DC converter and a control input of the control unit, with a first input of the comparator being connected to the output of the DC-to-DC converter, a second input of the comparator being connected to a reference voltage (V restore ), and the output of the comparator being connected to the control input of the control unit of the DC-to-DC converter and to an input of the logic gates, for controlling the output voltage V out , wherein when the comparator determines that a value of the output voltage V out falls below a value of the reference voltage (V restore ) corresponding to a panic threshold, a control signal RESTORE is applied at the output of the comparator by the comparator causing the logic gates and gate drivers to turn on all of the high-side switches, and when the output voltage V out reaches a PWM-limit threshold, the control signal RESTORE is disconnected at the output of the comparator on account of programmable hysteresis of the comparator.