Patent ID: 9268347
Filing Date: 2016-02-23
CPC Classification: G05F,H02M

Claim Text:
1. An apparatus for implementing dynamic regulator output current limiting comprising: a regulator includes a regulator input receiving an input voltage and input power and said regulator including a redundant regulator system; a controller coupled to said regulator; said controller receiving a measured input power of said regulator input and said controller receiving an operational mode from said regulator of operational modes of N+2, N+1, phase or phases running; said controller relating the measured input power to a regulator output current and a regulator over current trip point, and said controller dynamically providing regulator output current limiting; said controller decreasing a load frequency only in operational node N when the measured input power is greater than a regulator over current threshold and enabling running at full frequency in operational modes N+2, N+1.