Patent ID: 9425953
Filing Date: 2016-08-23
CPC Classification: G06F,H04L

Claim Text:
1. An apparatus, comprising: a single instruction multiple data (SIMD) hash module configured to apportion at least a first portion of a message of length L to a number (S) of segments, the message comprising a plurality of sequences of data elements, each sequence comprising S data elements, a respective data element in each sequence apportioned to a respective segment, each segment comprising a number N of blocks of data elements and to hash the S segments in parallel, resulting in S segment digests, the S segment digests based, at least in part, on an initial value; the SIMD hash module is further configured to store the S segment digests; a padding module configured to pad a remainder, the remainder corresponding to a second portion of the message, the second portion related to the length L of the message, the number of segments and a block size; and a non-SIMD hash module configured to hash the padded remainder, resulting in an additional hash digest and to store the additional hash digest.