Patent ID: 9239785
Filing Date: 2016-01-19
CPC Classification: G06F,G11C

Claim Text:
1. A method for super block allocation of a plurality of super blocks of a non-volatile memory (“NVM”), said NVM including multiple integrated circuits each having multiple blocks, for wear leveling, the method comprising: selecting, at a first time period, a set of super blocks, each super block comprising a plurality of blocks from corresponding integrated circuits, from the plurality of super blocks that satisfy a pre-determined threshold of a total distribution of the number of cycles of the plurality of super blocks; allocating, at a second time period, a super block of the set of super blocks for wear leveling, wherein the super block is stochastically selected from the set of super blocks, wherein the stochastic selection of the super block is a non-deterministic selection, and wherein the second time period occurs after the first time period; and performing wear leveling on the NVM using the allocated super block.