Patent ID: 9385224
Filing Date: 2016-07-05
CPC Classification: H01L

Claim Text:
1. A method of forming an integrated multichannel device and single channel device structure, the method comprising: depositing a single shared heterostructure over a substrate structure; depositing a barrier layer over the single shared heterorstructure; forming a superlattice structure comprising a plurality of heterostructures over the barrier layer; etching away a portion of superlattice structure over a single channel area to the barrier layer; etching away a portion of the barrier layer over the single channel area to expose a top surface of the single shared heterostructure over the single channel area; forming an isolation region on the single shared heterostructure to isolate the single channel area from a multichannel area to provide a single channel device electrically isolated from a multichannel device; and performing a gate contact fill process to form a first gate contact for the single channel device and a second gate contact for the multichannel device.