Patent ID: 9324864
Filing Date: 2016-04-26
CPC Classification: H01L

Claim Text:
1. A semiconductor device structure, comprising: a semiconductor substrate; an isolation structure positioned in the semiconductor substrate and adjacent to a first active region of the semiconductor substrate; a gate stack disposed over the first active region; a first contact structure disposed over the first active region and positioned between the gate stack and the isolation structure; and a dummy gate stack disposed over the isolation structure and adjacent to the gate stack, wherein the dummy gate stack is not positioned over a portion of the isolation structure next to the first contact structure such that only one of the dummy gate stack and the first contact structure is present in a cross-sectional view of the semiconductor device structure, and wherein the cross-sectional view of the semiconductor device structure is taken along an imaginary plane that is parallel to a normal direction of a top surface of the semiconductor substrate and perpendicular to a longitudinal direction of the gate stack.