Patent ID: 9412811
Filing Date: 2016-08-09
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor device structure comprising: providing a semiconductor substrate having a major surface; forming a first region comprising pillars of first and second conductivity type doped material extending in a generally vertical orientation with respect to the major surface, wherein the first conductivity type is opposite to the second conductivity type, and wherein the first pillar is configured as a vertical current path; providing a second region of the first conductivity type spaced apart from the major surface, wherein the second region adjoins a lower portion of the first region; forming a third region of the second conductivity type, wherein the third region adjoins the first region between the major surface and the second region; forming a body region overlying a portion of the third region; forming a source region adjoining the body region; and forming a control electrode adjacent the body region and the source region, wherein the control electrode is configured to control a channel region within the body region but not within the third region.