Patent ID: 9391619
Filing Date: 2016-07-12
CPC Classification: H03K

Claim Text:
1. A level-shift circuit, receiving a supply voltage and an input signal to generate a first inverse output signal, a first output signal, a second inverse output signal and a second output signal, the level-shift circuit comprises: a pre-stage voltage conversion circuit, comprising: a first voltage protection module, coupled to the supply voltage and converting the supply voltage into an inner conversion voltage; and a first voltage conversion module, coupled to the first voltage protection module, receiving the input signal, and converting the input signal into a pre-stage output signal according to the inner conversion voltage, wherein a high logic level of the pre-stage output signal is equal to the inner conversion voltage; and a post-stage voltage conversion circuit, coupled to the pre-stage voltage conversion circuit, wherein the post-stage voltage conversion circuit receives the pre-stage output signal to generate the first inverse output signal, the first output signal, the second inverse output signal and the second output signal, the post-stage voltage conversion circuit comprising: a second voltage protection module, generating the first inverse output signal, the first output signal, the second inverse output signal, and the second output signal; an N-type input pair, comprising a plurality of first N-type transistors, wherein source terminals of the first N-type transistors are coupled to a ground, one of gate terminals of the first N-type transistors receives the pre-stage output signal and the other gate terminal of the first N-type transistors receives an inverse of the pre-stage output signal, and one of drain terminals of the first N-type transistors receives the first inverse output signal and the other drain terminal of the first N-type transistors receives the first output signal; and a P-type cross-coupled pair, comprising a plurality of first P-type transistors, wherein source terminals of the first P-type transistors are coupled to the supply voltage, one of drain terminals of the first P-type transistors receives the second inverse output signal and the other drain terminal of the first P-type transistors receives the second output signal, wherein the pre-stage voltage conversion circuit and the post-stage voltage conversion circuit comprise a plurality of transistors with a punch-through voltage, wherein the level-shift circuit makes stress of the transistors less than the punch-through voltage when the supply voltage is greater than the punch-through voltage, and the level-shift circuit outputs the first inverse output signal, the first output signal, the second inverse output signal, and the second output signal with a voltage swing equal to the supply voltage when the supply voltage is less than the punch-through voltage.