Patent ID: 9431414
Filing Date: 2016-08-30
CPC Classification: H01L

Claim Text:
1. A nonvolatile memory device, comprising: at least four cylindrical-shaped channel regions extending vertically from portions of a substrate located at respective vertices of at least one rhomboid when viewed in a vertical direction relative to a surface of the substrate; a charge storage layer on an outer sidewall of each of said at least four cylindrical-shaped channel regions; a plurality of vertically-stacked gate electrodes extending adjacent each of said at least four cylindrical-shaped channel regions; and a plurality of bit lines extending over said at least four cylindrical-shaped channel regions, said plurality of bit lines including at least first, second and third bit lines electrically coupled to respective ones of said at least four cylindrical-shaped channel regions; and wherein the first, second and third bit lines extend parallel to each other and in a direction oblique relative to all sides of the at least one rhomboid when viewed in the vertical direction.