Patent ID: 9437599
Filing Date: 2016-09-06
CPC Classification: H01L

Claim Text:
1. A nonvolatile semiconductor memory device, comprising: a semiconductor layer provided on a substrate and extending in a first direction; a first gate insulating film formed on the semiconductor layer; a plurality of floating gate electrodes formed on the first gate insulating film along the semiconductor layer; a second gate insulating film formed on an upper surface of the floating gate electrode; a plurality of control gate electrodes respectively facing the upper surfaces of the plurality of floating gate electrodes via the second gate insulating film, and extending in a second direction intersecting the first direction; and an upper insulating film formed on an upper portion of the plurality of control gate electrodes, a height of an upper surface of the upper insulating film being a first height at a first position in the second direction and being a second height lower than the first height at a second position different from the first position in the second direction; the upper insulating film comprising: a plurality of first insulating layers formed in the second direction, each extending in the first direction; and a second insulating layer positioned on the upper surface of the plurality of the first insulating layers and between the plurality of first insulating layers, the first insulating layer being positioned at the first position in the second direction and a height of the upper surface of the second insulating layer being the first height at the first position, and a portion between the first insulating layers being positioned at the second position in the second direction and a height of the upper surface of the second insulating layer being the second height at the second position.