Patent ID: 9418212
Filing Date: 2016-08-16
CPC Classification: G06F

Claim Text:
1. An apparatus comprising a processor and a memory including computer program code, the memory and the computer program code configured to, with the processor, cause the apparatus to at least: receive a request by the computer program code to call at least one of a first function defined by first code stored in a first memory section of the memory, and a second function defined by second code stored in a second memory section of the memory; determine a configuration of a security element associated with the second memory section, wherein the security element is a permanently non rewritable memory element having a first configuration or a second configuration and wherein the code stored in the second memory section is not visible when the security element has the first configuration and is visible when the security element has the second configuration; in an instance the security element has the first configuration, read the first code stored in the first memory section in response to the request to call the first function defined by the first code stored in the first memory section of the memory; in an instance the security element has the first configuration, refrain from reading and changing the second code stored in the second memory section in response to the request to call the second function defined by the second code stored in the second memory section of the memory; in an instance the security element has the second configuration, read the first code stored in the first memory section in response to the request to call the first function defined by the first code stored in the first memory section of the memory; and in an instance the security element has the second configuration, read the second code stored in the second memory section in response to the request to call the second function defined by the second code stored in the second memory section of the memory.