Patent ID: 9426900
Filing Date: 2016-08-23
CPC Classification: H05K,Y02P,Y10T

Claim Text:
1. A method comprising: fabricating a printed circuit board, wherein the fabricating comprises, forming at least one conductive layer on top a first dielectric layer; forming a second dielectric layer on top of the at least one conductive layer; forming a thermal pad on top of the second dielectric layer, wherein an electronic package is to be soldered on top of the thermal pad; forming a first through hole through the thermal pad, the second dielectric layer, the at least one conductive layer, and the first dielectric layer; filling the first through hole with a conductive material to form a plated through hole for electrically coupling the thermal pad to the at least one conductive layer; and topdrilling the plated through hole to remove a top portion of the conductive material from a top of the plated through hole, wherein a bottom portion of the conductive material remains in the plated through hole after removal of the top portion.