Patent ID: 9525065
Filing Date: 2016-12-20
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a substrate; gate electrodes stacked vertically on the substrate; channel holes penetrating through the gate electrodes to extend in a direction perpendicular to the substrate, the channel holes having respective channel regions therein; channel pads connected to the channel regions in respective upper portions of the channel holes, the channel pads having respective convex upper surfaces of protruding portions of the channel pads that protrude from the channel holes; and first and second insulating layers that have an interface with each other adjacent the convex upper surfaces of the channel pads, wherein the first insulating layer is between the second insulating layer and the substrate, wherein the channel regions protrude from the first insulating layer, and wherein the channel pads protrude from the first insulating layer toward the second insulating layer.