Patent ID: 9442878
Filing Date: 2016-09-13
CPC Classification: G06F

Claim Text:
1. Interconnect circuitry for communicating access transactions between one or more transaction sources and one or more transaction destinations, said interconnect circuitry comprising: buffer circuitry configured to buffer a plurality of access transactions received from said one or more transaction sources before said plurality of access transactions are sent to respective ones of said one or more transaction destinations; hazard checking circuitry coupled to said buffer circuitry and configured to perform one or more hazard checks upon said plurality of access transactions buffered within said buffer circuitry such that at least some of said plurality of access transactions are constrained to issue from said buffer circuitry in accordance with a predetermined order within said at least some of said plurality of access transactions; and snoop circuitry configured to perform snoop operations to manage coherence between data values stored within a plurality of cache memories coupled to said interconnect circuitry, said snoop circuitry being configured to issue at least some snoop requests in a given order and operate such that corresponding snoop responses are returned from said snoop circuitry in said given order; wherein said snoop circuitry includes snoop reordering circuitry configured to permit reordering of snoop responses received from one or more of said cache memories to match said given order; said snoop circuitry is configured to issue a snoop request for a given access transaction in parallel with said hazard checking circuitry at least performing said one or more hazard checks for said given access transaction; and if said hazard checking circuitry determines that said given access transaction is not ready to be issued from said buffer circuitry in accordance with said predetermined order, then said snoop circuitry is configured to stall within said snoop circuitry said corresponding snoop response to be returned from said snoop circuitry for said given access transaction.