Patent ID: 9342089
Filing Date: 2016-05-17
CPC Classification: G01R,G05F

Claim Text:
1. A bandgap reference (BGR) startup verification circuit, comprising: a current mirror for receiving an output current from a bandgap reference (BGR) circuit and generating first, second and third output currents therefrom; a first verification sub-circuit coupled to receive said first output current and generate a detection voltage (Vdet), said first verification sub-circuit comprising a voltage comparator coupled to receive said Vdet and a voltage output of said BGR circuit (VBG) and provide a first verification output; a second verification sub-circuit comprising a voltage comparator coupled to receive said second output current and a second reference current and provide a second verification output; a third verification sub-circuit comprising a current comparator coupled to receive said third output current and a third reference current and provide a third verification output, and a digital logic state machine (digital state machine) having respective inputs coupled for receiving said first verification output, receiving said second verification output, and receiving said third verification output, and circuitry for processing said first verification output, said second verification output and said third verification output to determine whether said BGR circuit has properly started.