Patent ID: 9385072
Filing Date: 2016-07-05
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a die pad; a plurality of suspension leads coupled to the die pad; a plurality of leads arranged around the die pad in a plan view; a first semiconductor chip having a first main surface, first pads formed over the first main surface and along each side of the first main surface, and a first back surface opposite to the first main surface and mounted over a first chip mounting region in a chip mounting surface of the die pad; a second semiconductor chip having a second main surface, the second pads formed over the second main surface and along each side of the second main surface, and a second back surface opposite to the second main surface and mounted over a second chip mounting region in the chip mounting surface of the die pad; a plurality of first wires coupled to lead connection pads of the first pads of the first semiconductor chip and to a first lead group of the leads; a plurality of second wires coupled to lead connection pads of the second pads of the second semiconductor chip and to a second lead group of the leads; a plurality of third wires electrically coupled to chip-to-chip connection pads of the first pads of the first semiconductor chip and to chip-to-chip connection pads of the second pads of the second semiconductor chip; and a sealing body for sealing the die pad, the first semiconductor chip, the second semiconductor chip, the first wires, the second wires, and the third wires such that part of a surface opposite to the chip mounting surface of the die pad and part of the leads are exposed, respectively, wherein the first and second semiconductor chips are mounted over the die pad such that a first side of the first main surface and a first side of the second main surface are next to each other, wherein a distance between the first side of the first semiconductor chip and the chip-to-chip connection pads of the first semiconductor chip formed along the first side of the first semiconductor chip is greater than a distance between the first side of the second semiconductor chip and the chip-to-chip connection pads of the second semiconductor chip formed along the first side of the second semiconductor chip, and wherein the first and the second main surfaces of the first and the second semiconductor chips are located between the respective leads and the die pad in a thickness direction of the sealing body.