Patent ID: 9459812
Filing Date: 2016-10-04
CPC Classification: G06F,G11C

Claim Text:
1. A method for writing Discrete Fourier transform (DFT) samples into a memory by a logic circuit in a reorder stage of a DFT operation, the memory being arranged as an array, wherein each column of the array is a memory bank, and wherein each memory bank has a dedicated address generator, the method comprising: dividing the DFT samples into segments, based on R(reorder), where R(reorder) is a radix value of a reorder stage of the DFT operation; mapping the segments to the memory, wherein each segment is mapped with a segment offset with reference to first memory bank, to decrease bank contentions, wherein the segment offset is based on a number of butterfly computations per cycle of the reorder stage of the DFT operation; and writing the DFT samples into the memory based on the mapping.