Patent ID: 9384837
Filing Date: 2016-07-05
CPC Classification: G11C

Claim Text:
1. A method of operating a memory system including a plurality of memory cells, the method comprising: operating the memory cells according to a first operational mode in which the memory cells are programmed according to a first program operation and erased by a first erase operation; changing the operation of the memory cells to a second operational mode by performing the first erase operation on the memory cells and, prior to performing the first program operation or a second program operation on the memory cells, subsequently performing a second erase operation on the memory cells; and operating the memory cells according to the second operational mode in which the memory cells are programmed according to the second program operation and erased by the second erase operation, wherein the first and second operational modes differ, the first and second program operations differ, and the first and second erase operations differ.