Patent ID: 9252274
Filing Date: 2016-02-02
CPC Classification: H01L

Claim Text:
1. A Field Effect Transistor (FET) structure, comprising: a fin on a substrate comprising a first lattice constant; and at least two different lattice constant layers on respective different axially oriented surfaces of the fin, wherein the at least two different lattice constant layers each comprise lattice constants that are different than the first lattice constant and each other; wherein the fin extends from the substrate to protrude from a device isolation layer on the substrate to provide upper side walls of the fin to provide a first axially oriented surface and a top surface of the fin to provide a second axially oriented surface and a channel region, the structure further comprising: a gate structure crossing over the fin opposite the channel region; a first epi layer on the top surface of the fin comprising a second lattice constant different than the first lattice constant; and a second epi layer, on the upper side walls of the fin, comprising a third lattice constant different than the first and second lattice constants, wherein the first epi layer covers the second epi layer on the upper side walls and the second epi layer is absent from the top surface of the fin, wherein the fin includes source/drain interfaces at opposing ends of the channel region, the structure further comprising: source/drain regions, comprising a third epi layer including a fourth lattice constant different than the first, second, and third lattice constants, extending from the source/drain interfaces outward from the gate structure to cover the top surface of the fin exposed by the gate structure.