Patent ID: 9424146
Filing Date: 2016-08-23
CPC Classification: G06F,G11C

Claim Text:
1. A computer, comprising: a processor; a basic input/output system; a main memory configured to load an instruction of the basic input/output system and an instruction of an operating system in the computer, wherein the main memory comprises a first memory card and a second memory card; a first memory controller corresponding to the first memory card and no other memory card; and a second memory controller corresponding to the second memory card and no other memory card, wherein the processor is configured to: wherein the processor performs operations according to the second memory data migration instruction of the basic input/output system, the operations comprising: wherein the memory controller of the source memory card is configured to: wherein the memory controller of the source memory card is the first memory controller when the source memory card is the first memory card, wherein the memory controller of the source memory card is the second memory controller when the source memory card is the second memory card, wherein the processor is further configured to: send a data write instruction to the memory controller of the source memory card, wherein the data write instruction is used to instruct the memory controller of the source memory card to write the read data back into the source memory card, wherein the memory controller of the source memory card is further configured to: wherein the memory controller of the backup memory card is configured to write the received memory data of the source memory card into the backup memory card, wherein the memory controller of the backup memory card is the first memory controller when the backup memory card is the first memory card, and wherein the memory controller of the backup memory card is the second memory controller when the backup memory card is the second memory card.