Patent ID: 9385747
Filing Date: 2016-07-05
CPC Classification: G01D,G01N,G01R,H03M

Claim Text:
1. A capacitance-to-digital converter circuit comprising: a capacitor bridge circuit to sense a difference in capacitance between one or more sense capacitors and other capacitors in the bridge circuit; auxiliary capacitor digital to analog converters (DACs) coupled to the capacitor bridge circuit to reduce a magnitude of an error signal corresponding to the sensed difference; an analog to digital converter (ADC) coupled to the capacitor bridge circuit and the auxiliary capacitor DACs to convert the error signal whose magnitude is reduced by the auxiliary capacitor DACs to a digital signal; a digital accumulator coupled to the ADC to accumulate the digital signal from the ADC; and wherein the auxiliary capacitor DACs are controlled to offset the difference in capacitance between the one or more sense capacitors and the other capacitors in the bridge circuit based on the accumulated digital signal.