Patent ID: 9305629
Filing Date: 2016-04-05
CPC Classification: G11C

Claim Text:
1. An apparatus comprising: a supply voltage plane that includes an array of supply voltage lines; a ground plane that includes an array of ground lines; an array of capacitors formed from the arrays of supply voltage lines and ground lines; a first capacitor, formed at a first intersection between a first supply voltage line, included in the array of supply voltage lines, and a first ground line, included in the array of ground lines; wherein the capacitor comprises a first plate that includes a portion of the first supply voltage line, a second plate that includes a portion of the first ground line, and a first dielectric formed between the first and second plates; a device, to electrically couple to the capacitor, comprising at least one of a tunnel field-effect transistor, spin transfer torque (STT) memory, and a spin logic device; and a switching element coupled to the capacitor and included within a switching mode power supply; wherein (a) the array of capacitors, which includes the first capacitor, the device, and the switching element are all formed on a single monolithic substrate; and (b) the switching element discharges the capacitor to drive current between the first and second plates and then to the device.