Patent ID: 9323605
Filing Date: 2016-04-26
CPC Classification: G06F,G08C,H03K,H04L

Claim Text:
1. A measured value transmitting device for serial data transmission from at least one slave (SL) which provides the data bits (DB) of a measured value ( 14 ) detected by at least one sensor ( 12 ) for the purpose of serial bit-by-bit transmission to a master (MA) on at least one data line ( 28 ), and in which the master (MA) requests a measured value ( 14 ) from the slave (SL) by means of a clock burst ( 20 , 20 +, 20 −) which is provided on at least one clock line ( 26 , 60 , 62 ) and which comprises several clock cycles (ZCLK, ZCLK+, ZCLK−), the number of which (n+1) matches the number (n) of the data bits (DB) to be transmitted, wherein the clock cycles (ZCLK, ZCLK+, ZCLK−) of the clock burst ( 20 , 20 +, 20 −) have a specified duty cycle (TLow/TCLK, TLow+/TCLK+, TLow−/TCLK−) which corresponds to the ratio of pulse duration (TLow, TLow+, TLow−) to the period duration (TCLK, TCLK+, TCLK−) of one clock cycle (ZCLK, ZCLK+, ZCLK−), and the master (MA) contains a comparator ( 32 , 70 ), and said master MA) reads back the clock bursts ( 20 , 20 +, 20 −) outputted on the at least one clock line ( 26 , 60 , 62 ) and checks the duty cycle (TLow/TCLK, TLow+/TCLK+, TLow−/TCLK−) in the comparator ( 32 , 70 ) to determine whether said cycle exceeds an upper threshold ( 34 ) and/or falls below a lower threshold ( 36 ).