Patent ID: 9432181
Filing Date: 2016-08-30
CPC Classification: H04L

Claim Text:
1. A computer-implemented apparatus that encrypts an input plain text and outputs a cipher text in a same data format as the plain text, comprising: a processor; and a memory storing instructions to be executed by the processor by causing the processor to execute: an unit block tweakable encryption unit configured to encrypt a specific digit of the plain text by using numerical values of remaining respective digits excluding the specific digit of the plain text and an external tweak that is input concurrently with the plain text; a block permutation unit configured to permutate respective digits including the encrypted specific digit of the plain text per digit based on a predetermined rule; and an encryption counter update unit configured to cause processing by the unit block tweakable encryption unit and the block permutation unit to repeat for a predetermined number of times; wherein the unit block tweakable encryption unit includes: an AES encryptor that encrypts a numerical value that concatenates remaining respective digits excluding the specific digit of the plain text and the external tweak using a prestored encryption key and outputs an output value of a specific number of bits; a temporary encryption key generator that generates a temporary encryption key using an output value of the AES encryptor; and a block encryptor that encrypts the specific digit of the plain text utilizing the temporary encryption key.