Patent ID: 9318529
Filing Date: 2016-04-19
CPC Classification: H01L

Claim Text:
1. A light emitting diode array, comprising: a substrate; light emitting diodes positioned over the substrate, each light emitting diode including a first semiconductor layer, an active layer, and a second semiconductor layer, wherein each light emitting diode is disposed to form a first via hole structure exposing a portion of the corresponding first semiconductor layer; lower electrodes disposed over the second semiconductor layer of corresponding light emitting diodes; a first interlayer insulating layer disposed over the lower electrodes and configured to expose the portion of the first semiconductor layer of corresponding light emitting diodes; and upper electrodes formed over the first interlayer insulating layer and electrically connected to the first semiconductor layer of corresponding light emitting diodes through the first via hole structures; wherein the first via hole structure of each light emitting diode is disposed in parallel with one side of the corresponding second semiconductor layer, and wherein the first interlayer insulating layer is disposed to form second via hole structures exposing a portion of the lower electrodes of corresponding light emitting diodes, wherein the first via hole structure of a given light emitting diode includes a pair of via holes disposed near edges of the given light emitting diode and a connection part connecting the pair of via holes, and one of the pair of via holes is spaced apart by a predetermined distance from at least one of the second via holes.