Patent ID: 9299629
Filing Date: 2016-03-29
CPC Classification: H01L

Claim Text:
1. A semiconductor chip having a scribe region and an IC region and being obtained by dicing a semiconductor wafer along a dicing line, the semiconductor wafer comprising: a semiconductor substrate; a first insulating film disposed on the semiconductor substrate across the scribe region and the IC region of the semiconductor chip; a separation groove provided in the first insulating film in the scribe region and spaced apart from the dicing line, the separation groove having a bottom portion exposing a surface of the semiconductor substrate; a plug metal film formed on lateral walls of the separation groove so that the plug metal film on the lateral walls does not extend out of the separation groove and does not exist on an upper surface of the first insulating film; and a second insulating film covering the IC region and extending contiguously therefrom toward the scribe region and into the separation groove so as to cover the plug metal film formed on the lateral walls of the separation groove.