Patent ID: 9507942
Filing Date: 2016-11-29
CPC Classification: G06F

Claim Text:
1. An apparatus for protecting a basic input/output system (BIOS) in a computing system, the apparatus comprising: a BIOS read only memory (ROM), comprising: an encrypted message digest, wherein said encrypted message digest comprises an encrypted version of a first message digest that corresponds to said BIOS contents; a tamper detector, operatively coupled to said BIOS ROM, configured to generate a BIOS check interrupt at a combination of prescribed intervals and event occurrences, and configured to access said BIOS contents and said encrypted message digest upon assertion of said BIOS check interrupt, and configured to direct a microprocessor to generate a second message digest corresponding to said BIOS contents and a decrypted message digest corresponding to said encrypted message digest, and configured to compare said second message digest with said decrypted message digest, and configured to preclude said operation of said microprocessor if said second message digest and said decrypted message digest are not equal; and a random number generator disposed within said microprocessor, wherein said random number generator generates a random number at completion of a current BIOS check, which is employed to set a following prescribed interval, whereby said prescribed intervals are randomly varied.