Patent ID: 9373648
Filing Date: 2016-06-21
CPC Classification: G02F,H01L

Claim Text:
1. A semiconductor device comprising: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; an oxide layer which is formed on the gate insulating layer and which includes a semiconductor region and a conductor region that contacts with the semiconductor region, wherein the semiconductor region overlaps at least partially with the gate electrode with the gate insulating layer interposed between them; a source electrode and a drain electrode which are electrically connected to the semiconductor region; an insulating layer formed on the source and drain electrodes; a transparent electrode arranged to overlap at least partially with the conductor region with the insulating layer interposed between them; a source line formed out of the same conductive film as the source electrode; and a gate extended line formed out of the same conductive film as the gate electrode, wherein the source line is electrically connected to the gate extended line via a transparent connecting layer which is formed out of the same conductive film as the transparent electrode.