Patent ID: 9384046
Filing Date: 2016-07-05
CPC Classification: G06F

Claim Text:
1. An information processing apparatus comprising a computer configured to: set for N threads to be executed in a given order in a given process, N storage locations for N values of a common variable of the N threads, respectively, where N is a positive integer; execute the N threads in an order different from the given order; store the N values of the common variable that are obtained by executing the N threads to the N storage locations set for the N threads, respectively; and read out in the given order and upon completion of execution of all of the N threads, the N values of the common variable from the N storage locations and write the N values into a specific storage location in the given order such that an i-th value for an i-th thread is overwritten by an (i+1)-th value for an (i+1)-th thread, where i is a positive integer from 1 to (N−1), wherein the computer, when a size of a j-th value of the common variable is greater than a size of a j-th storage location set for a j-th thread, stores the j-th value to the specific storage location if execution of all of (j−1) threads to be executed in the given order before the j-th thread has been completed, where j is a positive integer from 1 to N.