Patent ID: 9252203
Filing Date: 2016-02-02
CPC Classification: H01L

Claim Text:
1. A semiconductor structure comprising: a first metallization layer; an interlevel dielectric layer disposed on the first metallization layer; a metal sublayer disposed within the interlevel dielectric layer; a second metallization layer disposed on the interlevel dielectric layer; a metal-insulator-metal (MIM) capacitor disposed on the metal sublayer, the MIM capacitor having a first plate, a capacitor dielectric layer, and a second plate, wherein the capacitor dielectric layer is disposed between the first plate and the second plate, and wherein a portion of the metal sublayer extends beyond the MIM capacitor, and wherein the second plate is in contact with the metal sublayer; a via from the first plate to the second metallization layer; and a via from the metal sublayer to the second metallization layer.