Patent ID: 9362105
Filing Date: 2016-06-07
CPC Classification: H01L

Claim Text:
1. A method for preparing for dicing a thinned semiconductor wafer with applied underfill, said method comprising: (a) providing a thinned semiconductor wafer having an active face and a back side, a plurality of metallic bumps on its active face and, optionally, through-vias vertically through the semiconductor wafer; (b) providing an article comprising an underfill material on a dicing support tape, in which the underfill material is precut to the shape of the semiconductor wafer; and (c) aligning the article with the thinned semiconductor wafer and laminating the underfill material to the active face to form an assembly, and (d) mounting the assembly to a dicing frame and exposing the back side of the thinned wafer for subsequent dicing, wherein the article supplies both of the underfill material and dicing support tape to the thinned semiconductor wafer in one fabrication step.