Patent ID: 9455027
Filing Date: 2016-09-27
CPC Classification: G11C

Claim Text:
1. An integrated circuit (IC) device, comprising: a memory array section comprising a plurality of memory arrays that each include memory cells for storing data values; a data path section having switching circuits configured to enable data paths between the memory arrays and a plurality of input/outputs (I/Os) of the IC device; a power fill control circuit configured to activate power-fill circuits in the IC device to perform non-mission mode operations that consume current, the amount of non-mission mode operations varying in response to mission mode circuit activity in the IC device; and at least one power-fill configuration register; wherein the amount of non-mission mode operations is configurable according to a data value stored in the power-fill configuration register; and wherein mission mode circuit activity includes circuit activity resulting from a user input to the IC device.