Patent ID: 9257194
Filing Date: 2016-02-09
CPC Classification: G11C

Claim Text:
1. A drain regulator for a NOR flash memory, comprising: a pump source, configured to pump a supply voltage to a high voltage at an HV node; a pass transistor, coupled between the HV node and a bit line, wherein the pass transistor is controlled by a control signal to generate a bit-line voltage at the bit line; a voltage divider, dividing the bit-line voltage by a factor to generate a feedback voltage at a feedback node; a Y-path gate, coupled between the bit line and a selected cell of the NOR flash memory and biasing the selected cell with a drain voltage; an amplifier, supplied with the HV voltage and comparing the feedback voltage with a reference voltage to generate the control signal; and a current detector, sensing a current flowing through the Y-path gate to generate a sense signal to the feedback node for keeping the drain voltage constant.