Patent ID: 9431498
Filing Date: 2016-08-30
CPC Classification: G11C,H01L

Claim Text:
1. A semiconductor device including a first MISFET and a second MISFET, comprising: an element separation portion formed in a semiconductor substrate, thereby first and second regions of the semiconductor substrate are defined; a first gate insulating film formed over the first region and the element separation portion; a second gate insulating film formed over the second region and the element separation portion; an interlayer insulating film formed over the first and second regions; a first trench formed in the interlayer insulating film and located over the first and second gate insulating films in planar view; and a first gate electrode embedded in the first trench, wherein the first MISFET includes the first gate insulating film and the first gate electrode, wherein the second MISFET includes the second gate insulating film and the first gate electrode, wherein the first gate insulating film is a different film from the second gate insulating film, and wherein, on the element separation portion interposed between the first region and the second region, a length of the first gate insulating film is shorter than a length of the second gate insulating film.