Patent ID: 9502566
Filing Date: 2016-11-22
CPC Classification: H01L

Claim Text:
1. A method for producing a field effect transistor, comprising producing a gate of the transistor after having produced source and drain electrodes of the transistor, comprising: from a substrate having a stack of layers comprising at least two surface layers with a first layer of a first semiconductor material, said first layer being configured to produce a conduction channel of the transistor, and a second layer, of a second semiconductor material different from the first semiconductor material, situated on the first layer, said second layer being configured to produce at least partly the source and drain electrodes of the transistor, forming a mask with an opening in said mask; forming a cavity creating a gate pattern in the second layer, through an isotropic etching of the second semiconductor material so that the cavity reaches a top surface of the first layer, the cavity comprising a middle part situated in line with the opening and lateral recesses at a periphery of the middle part in the second layer and under the mask; and forming gate spacers by depositing a dielectric material at least in the lateral recesses of the cavity, the gate being disposed in at least one portion of the middle part of the cavity in contact with the first layer.