Patent ID: 9436252
Filing Date: 2016-09-06
CPC Classification: G06F

Claim Text:
1. A semiconductor integrated circuit provided with a processing unit that repeats a processing state and a standby state, comprising: an obtaining unit configured to obtain a period of the standby state as a standby period; a control unit configured to hold a plurality of candidate voltages in association with pieces of recovery information corresponding to recovery times required for the processing unit to return to a normal operation voltage from the candidate voltages in the standby state, and to control a standby voltage of the processing unit in the standby state in accordance with the candidate voltage associated with the piece of recovery information corresponding to a recovery time that is shorter than the standby period among the plurality of candidate voltages; and a power information estimation unit configured to estimate leakage power of the plurality of candidate voltages and power following an activation from the plurality of candidate voltages, based on the plurality of candidate voltages and the standby period, wherein said control unit further controls the standby voltage to save total power of both leakage power of the plurality of candidate voltages and power following an activation from the plurality of candidate voltages estimated by said power information estimation unit.