Patent ID: 9293385
Filing Date: 2016-03-22
CPC Classification: H01L

Claim Text:
1. A method of manufacture of an integrated circuit package system comprising: providing a substrate; providing an internal device on and above the substrate; encapsulating the internal device with an encapsulation having an outer surface; forming a redistribution line, directly on the outer surface, the redistribution line having: forming an inner array and outer array of connection points, the inner array etched on the central portion and bordered on at least two opposing sides by the outer array, the outer array etched on the peripheral portion and elevated a standoff height higher than the inner array to form two levels of the connection points, the inner array and the outer array exposed from the encapsulation, the connection points connected by the redistribution line for conducting electrical signals between the connection points, the connection points and the redistribution line formed of the same material; mounting a first external device above the inner array on the central portion of the redistribution line, the first external device above the substrate, above portions of the encapsulation, and above the internal device, wherein an upper surface of the first external device is at a higher vertical elevation than the peripheral portions, the interior portions, and the exterior portions of the redistribution line; and connecting the first external device to the redistribution line with an interconnect below the first external device, the interconnect in direct contact with the central portion of the redistribution line, the interconnect being above the substrate, above portions of the encapsulation, and above the internal device, the interconnect and the interior portions being at substantially similar horizontal axis.