Patent ID: 9497853
Filing Date: 2016-11-15
CPC Classification: H05K

Claim Text:
1. A printed circuit board comprising: a first insulating layer; a second insulating layer under the first insulating layer; a metal substrate buried in the first insulating layer and the second insulating layer and including a first region and a second region; and an outer circuit layer on a top surface of the first insulating layer or a bottom surface of the second insulating layer; wherein the metal substrate comprises: at least one via formed through the first and second insulating layers and disposed in the first region of the metal substrate; an inner circuit layer buried in the first and second insulating layers and disposed in the second region of the metal substrate; and an adhesive layer formed on the top surface of the first insulating layer or the bottom surface of the second insulating layer to expose the via; wherein the via includes a center part having a first width and a contact part having a second width, the contact part makes contact with a surface of the first and second insulating layers, and the first width is larger than the second width; wherein the inner circuit layer comprises: a first circuit part buried in the first insulating layer; and a second circuit part buried in the second insulating layer; wherein a top surface of the via is exposed through the top surface of the first insulating layer, and a bottom surface of the via is exposed through the bottom surface of the second insulating layer; and wherein a sectional shape of the via is different from a sectional shape of the inner circuit layer.