Patent ID: 9343299
Filing Date: 2016-05-17
CPC Classification: B81C,F16L,H01L,Y02E,Y02P

Claim Text:
1. A method for fabrication of a semiconductor substrate, the method comprising: forming a porous semiconductor layer on a semiconductor template, said porous semiconductor layer conformal to said semiconductor template; forming a semiconductor substrate on said porous semiconductor layer, said semiconductor substrate conformal to said porous semiconductor layer and having an exposed surface opposite said porous semiconductor layer; forming an inner trench in said exposed surface of semiconductor substrate having a depth less than a thickness of said semiconductor substrate; forming an outer trench through said exposed surface of semiconductor substrate providing access to said porous semiconductor layer and positioned between said inner trench and an edge of said semiconductor substrate; releasing said semiconductor substrate from said semiconductor template; and forming the edge of said released semiconductor substrate along said inner trench.