Patent ID: 9355902
Filing Date: 2016-05-31
CPC Classification: H01L

Claim Text:
1. A method of fabricating a semiconductor apparatus, comprising the steps of: forming a first semiconductor chip including a first through-silicon via, the first though-silicon via being protruded beyond heights of the first semiconductor chip; forming a first insulating layer having a first bump on the first semiconductor chip, wherein the first bump includes a first portion with a first line width and a second portion with a second line width being wider than the first line width, and the first through-silicon via is electrically contacted with the first portion of the bump; forming a second semiconductor chip including a second through-silicon via, the second though-silicon via being protruded beyond heights of the second semiconductor chip; and stacking the first semiconductor chip and the second semiconductor chip using a conductive connection member such that an upper surface of the conductive connection member is contacted to the second portion of the first bump and a bottom surface of the conductive connection member is contacted to a protruding portion of the second through-silicon via, wherein a diameter of the protruding portion is smaller than that of the conductive connection member.