Patent ID: 9344048
Filing Date: 2016-05-17
CPC Classification: H03F

Claim Text:
1. An operational amplifier comprising: an input pair, an aiding unit, an even number of amplification stages, a feeding unit, a first current source, a second current source; wherein both the input pair and the aiding unit are connected to the first current source, the input pair is also configured to receive differential input voltage, and both the input pair and the aiding unit are further connected to a first stage of the even number of amplification stages; the even number of amplification stages are connected in series, and a last stage of the amplification stages is configured to output differential output voltages; the feeding unit is configured to receive a common mode voltage of the differential output voltages from the last stage, and is configured to feed a voltage on a first node of the feeding unit back to the aiding unit so as to provide bias voltage to the aiding unit, wherein the aiding unit is configured to avoid dead lock of the input pair.