Patent ID: 9257074
Filing Date: 2016-02-09
CPC Classification: G09G

Claim Text:
1. A pixel compensation circuit, comprising: a first transistor, configured to have a gate terminal thereof for receiving one of a plurality of respective switch signals and a first terminal thereof for receiving a high voltage; a second transistor, configured to have a first terminal thereof electrically connected to a second terminal of the first transistor; a third transistor, configured to have a gate terminal thereof for receiving one of the plurality of respective switch signals, a first terminal thereof for receiving a data signal, and a second terminal thereof electrically connected to a second terminal of the second transistor; a fourth transistor, configured to have a gate terminal thereof for receiving one of the plurality of respective switch signals, a first terminal thereof electrically connected to a second terminal of the first transistor, and the first terminal of the second transistor, and a second terminal thereof electrically connected to the gate terminal of the second transistor and a first terminal of a capacitor; a fifth transistor, configured to have a gate terminal thereof for receiving one of the plurality of respective switch signals, a first terminal thereof electrically connected to a second terminal of the capacitor, and a second terminal thereof for receiving a reference voltage; a switch unit, configured to receive one of the plurality of respective switch signals and electrically connected to the second terminal of the third transistor, the first terminal of the fifth transistor, and the second terminal of the capacitor; and a light emitting diode, configured to have a first terminal thereof electrically connected to the switch unit and a second terminal thereof for receiving the low voltage.