Patent ID: 9443464
Filing Date: 2016-09-13
CPC Classification: G09G

Claim Text:
1. A stage circuit comprising: a control unit controlling voltage at first node and a second node in response to a first clock signal input to a first input terminal, an input control signal input to a third input terminal, and a scan signal of a previous stage or a start signal input to a fourth input terminal; a first output unit supplying a light emitting control signal to a second output terminal in direct response to the voltages at the first node and the second node; and a second output unit having a second input terminal, the second output unit supplying a scan signal having different polarity than that of the light emitting control signal to a first output terminal corresponding to a second clock signal input to the second input terminal and in direct response to the voltages at the first node and the second node, wherein the first output unit includes: