Patent ID: 9323920
Filing Date: 2016-04-26
CPC Classification: G06F

Claim Text:
1. A data processing circuit comprising: a processor configured to carry out a computer program including a plurality of program instructions; a signature determination circuit configured to determine a signature of the plurality of program instructions carried out by the processor; a memory storing a reference signature predetermined for the computer program; wherein the processor is configured to, when it carries out a program instruction of the plurality of program instructions which indicates a next program instruction of the plurality of program instructions to be carried out, provide information about the indication to the signature determination circuit; wherein the information about the indication is a memory address of the next program instruction of the plurality of program instructions to be carried out and the signature determination circuit is configured to take into account the information about the indication such that taking into account the information about the indication negates an effect of a memory address of the program instruction of the plurality of program instructions on an update of the signature for the at least one program instruction of the plurality of program instructions if the memory address of the next program instruction of the plurality of program instructions to be carried out is equal to the memory address of the at least one program instruction of the plurality of program instructions; wherein the signature determination circuit is configured to take into account the information about the indication in the determination of the signature; and a detection circuit configured to check, when the computer program is completely carried out, whether the determined signature is equal to the reference signature.