Patent ID: 9418875
Filing Date: 2016-08-16
CPC Classification: H01L

Claim Text:
1. A method for manufacturing a semiconductor package, comprising: preparing a substrate that includes a substrate body which has a first surface and a second surface facing away from the first surface and is formed with at least one bump land on the first surface, and a dam which is formed on the first surface of the substrate body and is projected on an edge of the first surface of the substrate body, and has an underfill member discharge unit, wherein the at least one bump land is in direct contact with the first surface of the substrate body and the at least one bump land is located within the first surface of the substrate body, and wherein the underfill member discharge unit is configured to prevent an underfill member from overflowing over the dam; introducing the underfill member over an inside space that is surrounded by the dam of the first surface of the substrate body; disposing a semiconductor chip which has a third surface with bumps and a fourth surface facing away from the third surface, in a flip-chip type manner over the substrate over which the underfill member is introduced; and connecting the bumps of the semiconductor chip with the bump lands, wherein, in connecting the bumps of the semiconductor chip with the bump lands, the underfill member is discharged through the underfill member discharge unit.