Patent ID: 9483045
Filing Date: 2016-11-01
CPC Classification: G05B

Claim Text:
1. A numerical controller comprising: a central processing unit (CPU); a memory; a memory control circuit that controls the memory; an axis control circuit that controls axes; a display control circuit that controls display; a system bus; a bus control circuit that controls the system bus; and a determination section in which alarm mask information is preset, the system bus connecting the memory control circuit, the axis control circuit, the display control circuit, and the bus control circuit together, wherein the determination section is configured to execute a process of comparing the alarm mask information with alarm factor information output from any of the memory control circuit, the axis control circuit, the display control circuit, and the bus control circuit as a result of detection of an abnormality in data or a bus cycle, to provide masking so as to omit delivery of an alarm to the central processing unit depending on a comparison result.