Patent ID: 9472557
Filing Date: 2016-10-18
CPC Classification: H01L

Claim Text:
1. A device comprising: a first transistor having a first pillar-shaped semiconductor portion, a first vertical channel portion, a first horizontal channel portion and a first diffusion region, the first vertical channel portion and the first horizontal channel portion being arranged in a first direction and connected to each other to form an L-shaped channel, the first horizontal channel portion and the first diffusion region being arranged in the first direction and connected to each other, a first lower boundary of the first diffusion region being at a lower level than an first upper boundary of the first horizontal channel portion; a first gate electrode covering a side portion of the first vertical channel portion and a top surface of first horizontal channel portion of the first transistor, the first gate electrode extending in a second direction that is substantially perpendicular to the first direction, the first gate electrode having a first top surface which is at a lower level than a top of the first pillar-shaped semiconductor portion; and a contact plug being electrically connected to the first diffusion region, a lowest portion of the contact plug being at a lower level than the top surface of the first gate electrode, an upper portion of the contact plug being connected to a wiring layer, the wiring layer being at a level higher than a top surface of the first pillar-shaped semiconductor portion.