Patent ID: 9286650
Filing Date: 2016-03-15
CPC Classification: G06T,H04N

Claim Text:
1. A video processing apparatus comprising: a memory; a video input section that acquires a video signal formed of a plurality of frames; a frame separator that separates the video signal acquired by the video input section on a frame basis and distributes the separated video signals; a plurality of parallel processors including a first parallel processor and a second parallel processor that perform video processing in parallel on the separated video signals corresponding to the frames separated and distributed by the frame separator; and a frame combiner that stores the separated video signals on which the plurality of parallel processors have performed the video processing in the memory, sequentially reads the video signals out from the memory, and then combines the video signals, the frame separator generates a first sync signal by subtracting a second sync signal from a sync signal of the video signal and outputs the first sync signal to the first parallel processor, the first sync signal corresponding to the frames that undergo the video processing of the first parallel processor and the second sync signal corresponding to the frames that undergo the video processing of the second parallel processor, and the frame separator generates the second sync signal by subtracting the first sync signal from the sync signal and outputs the second sync signal to the second parallel processor.