Patent ID: 9443868
Filing Date: 2016-09-13
CPC Classification: H01L

Claim Text:
1. A semiconductor memory device, comprising: a memory string comprising a plurality of memory cells connected in series therein; and a contact electrically connected to one end of the memory string, the memory string comprising: a plurality of control gate electrodes stacked above a first semiconductor layer; a second semiconductor layer having one end connected to the first semiconductor layer and having as its longitudinal direction a direction perpendicular to the first semiconductor layer, the second semiconductor layer facing the plurality of control gate electrodes; and a charge accumulation layer positioned between the control gate electrode and the second semiconductor layer, the contact having a plate-like shape whose longitudinal direction is a first direction, the contact having its lower surface connected to the first semiconductor layer, and the contact having a height of at least part of its upper surface lower than a height of an upper surface of the second semiconductor layer.