Patent ID: 9478509
Filing Date: 2016-10-25
CPC Classification: H01L

Claim Text:
1. A method comprising: forming a via structure that extends from a front side of a semiconductor substrate to an interior region of the semiconductor substrate; recessing a back side of the substrate to expose a bottom surface of the, thereby yielding a through substrate via (TSV) from the via structure, wherein the recessing further includes: thinning the semiconductor substrate, and forming a hard mask layer on the back side of the semiconductor substrate; forming an anchor trench in the back side of the semiconductor substrate adjacent to the TSV, wherein the forming of the anchor trench includes forming an opening in the hard mask layer; removing a portion of the hard mask layer to expose the TSV at the back side of the semiconductor structure; forming a diffusion barrier on the back side of the semiconductor substrate and within the anchor trench, such that the bottom surface of the TSV is substantially coplanar with a portion of the diffusion barrier, and such that a remainder of the hard mask layer is positioned outside a portion of the diffusion barrier surrounding the anchor trench; and depositing a conductive material on the diffusion barrier and within the anchor trench to form a bonding pad comprising an anchor region, such that the conductive material is in direct electrical contact with the bottom surface of the TSV.