Patent ID: 9324786
Filing Date: 2016-04-26
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a semiconductor layer having a first conductivity type; a plurality of first doped regions separately and in parallel disposed in the semiconductor layer along a first direction, wherein the first doped regions have a second conductivity type opposite to the first conductivity type and a rectangular top view; a gate structure disposed over the semiconductor layer along a second direction, wherein the gate structure covers a portion of the first doped regions; a second doped region, disposed in the semiconductor layer along the second direction and being adjacent to a first side of the gate structure, wherein the second doped region has the second conductivity type; and a third doped region, formed in the semiconductor layer along the second direction and being adjacent to a second side of the gate structure opposing the first side, wherein the third doped region has the second conductivity type, and the third doped region overlaps a top surface of the plurality of first doped regions, wherein a portion of the semiconductor layer contacts the first doped region along the first direction, and the third doped region overlaps the portion of the semiconductor layer.