Patent ID: 9323646
Filing Date: 2016-04-26
CPC Classification: G06F

Claim Text:
1. A hardware security module, comprising: a microprocessor, and a compiled program stored in a memory device and executable by said microprocessor in order to carry out an operation, the compiled program comprising at least one debugging instruction which does not change a result or functionality of said operation regardless of whether said at least one debugging instruction is executed, and the hardware security module being configured to read a state flag from a memory having the state flag stored therein to inhibit or activate the debugging instruction during the execution of the compiled program, wherein the state flag inhibiting or activating the debugging instruction can take three values as follows: a first value corresponding to an inhibition state inhibiting the debugging instruction, a second value corresponding to a first activation state in which the at least one debugging instruction causes items of debugging information resulting from the execution of the debugging instruction to be stored locally in the memory device without directly transmitting the debugging information to an external entity, said items of debugging information to be transmitted later to the external entity at the request of the external entity, and a third value corresponding to a second activation state in which the at least one debugging instruction causes said items of debugging information to be directly transmitted over a communication channel initiated by the hardware security module to the external entity.