Patent ID: 9355020
Filing Date: 2016-05-31
CPC Classification: G06F

Claim Text:
1. A computer-implemented method for resolving nondeterminism in a behavior model of a computing system under test (SUT), the method being executed using one or more processors and comprising: receiving, by the one or more processors, a behavior model relating to a SUT, the behavior model comprising two or more nondeterministic transitions; obtaining, by the one or more processors, trace data associated with execution of the SUT across the two or more nondeterministic transitions; determining, by the one or more processors, based on the trace data, two or more transition guards that resolve nondeterminism of the two or more nondeterministic transitions, wherein determining the two or more transition guards comprises: associating, by the one or more processors, the two or more transition guards with the two or more nondeterministic transitions to provide an extended behavior model.