Patent ID: 9286977
Filing Date: 2016-03-15
CPC Classification: G11C,H01L

Claim Text:
1. A semiconductor device, comprising: a resistive memory element; a data line electrically coupled to the resistive memory element; a control line; a power supply line; and a control circuit comprising a first constant current element, a first transistor, and a second transistor, wherein, in the control circuit, the first transistor has a gate coupled to the data line, one of a source and a drain coupled to the first constant current element, and the other one of the source and the drain coupled to the power supply line, and wherein, in the control circuit, the second transistor has a gate coupled to one of the source and the drain of the first transistor, one of a source and a drain coupled to the data line, and the other one of the source and the drain coupled to the control line.