Patent ID: 9443958
Filing Date: 2016-09-13
CPC Classification: H01L

Claim Text:
1. A high voltage metal-oxide-semiconductor (HVMOS) transistor device comprising: a substrate comprising a first insulating structure disposed therein; a gate structure disposed on the substrate, the gate structure comprising a first portion covering a portion of the first insulating structure; a drain region and a source region disposed in the substrate at two respective sides of the gate structure, the drain region and the source region comprising a first conductivity type; a base region encompassing the source region, the base region comprising a second conductivity type complementary to the first conductivity type; and a gate dielectric layer between the gate structure and the source region, the base region and the substrate, wherein the gate structure further comprises a second portion penetrating into the base region, and a channel is defined between the source region and the drain region along a first direction, and the second portion of the gate structure has a battlement structure along a second direction substantially perpendicular to the first direction.