Patent ID: 9350928
Filing Date: 2016-05-24
CPC Classification: H01L,H04N

Claim Text:
1. A method for operating a stacked-chip image sensor having a planar array of image pixels, storage and processing circuitry that is vertically displaced from the planar array of image pixels in a direction that is perpendicular to the planar array of image pixels, control circuitry comprising analog-to-digital converter circuitry interposed between the planar array of image pixels and the storage and processing circuitry, and a plurality of conductive vias coupled between the planar array of image pixels and the storage and processing circuitry, wherein the planar array of image pixels includes a plurality of image pixel sub-arrays, the method comprising: with a first image pixel sub-array in the plurality of image pixel sub-arrays, capturing a first set of image data, wherein the first image pixel sub-array comprises a first plurality of image pixels coupled to a first shared conductive path; with a second image pixel sub-array in the plurality of image pixel sub-arrays, capturing a second set of image data; with the first image pixel subarray, transferring the first set of image data to the control circuitry through a first set of conductive vias in the plurality of conductive vias; with the analog-to-digital converter circuitry, converting the first set of image data to a first set of digital image data and transferring the first set of digital image data from the control circuitry to the storage and processing circuitry through the first set of conductive vias; with the storage and processing circuitry, compressing the first set of digital image data to generate a first set of compressed image data; with the second image pixel subarray, transferring the second set of image data to the control circuitry through a second set of conductive vias in the plurality of conductive vias; with the analog-to-digital converter circuitry, converting the second set of image data to a second set of digital image data and transferring the second set of digital image data from the control circuitry to the storage and processing circuitry through the second set of conductive vias; with the storage and processing circuitry, compressing the second set of digital image data to generate a second set of compressed image data; and with the storage and processing circuitry, outputting the first and second sets of compressed image data from the stacked-chip image sensor.