Patent ID: 9240350
Filing Date: 2016-01-19
CPC Classification: H01L

Claim Text:
1. A method for forming FinFET structure, the method comprising: providing a substrate comprising at least two vertically extending fins that are spaced apart from one another to define a trench; depositing an insulating material in the trench between the at least two vertically extending fins; providing a buried etch stop layer within the insulating material, the buried etch stop layer having a first side and a second opposite side, wherein the buried etch stop layer extends horizontally and vertically proximate to the at least two vertically extending fins; removing the insulating material near the first side of the buried etch stop layer, wherein the providing the buried etch stop layer comprises implanting etch stop layer forming particles at one or more non-zero angles with respect to a horizontal surface of the buried etch stop layer into the insulating material including at least one of Si, Ge, N, C, H, He, Ne, Ar, Kr, or Xe, and wherein an upper insulating layer is defined between the first side of the buried etch stop layer and a surface of the insulating material, wherein a lower insulating layer is defined below the buried etch stop layer, wherein a thickness of the buried etch stop layer is adjusted by controlling at least one of a dosage and energy of the etch stop layer forming particles, and by controlling a duration the etch stop layer forming particles are exposed to an elevated temperature; and selectively etching to remove the buried etch stop layer, wherein minimal removal of the lower insulating layer takes place, and wherein the lower insulating layer has a uniform thickness across the substrate.