Patent ID: 9529667
Filing Date: 2016-12-27
CPC Classification: G06F

Claim Text:
1. A method in a memory device implementing error correction during operation of the memory device, the memory device comprising a double data rate dynamic random access memory (DDR DRAM) device, the memory device including a first memory array configured to store memory data, a second memory array configured to store error correction check bits corresponding to the stored memory data, and a control circuit configured to control the operation of the memory device, the method comprising: providing a set of mode registers in the control circuit, the set of mode registers having one or more mode register cells configured to control operational functions of the DRAM device, the set of mode registers including one or more unused or reserved mode register cells; designating one of the unused or reserved mode register cells in the set of mode registers of the DRAM device as an error correction event register; setting the error correction event register to a first value; receiving a command and a memory address to read out stored memory data from a memory location associated with the memory address in the first memory array during the operation of the memory device; accessing the memory location in the first memory array in response to the command and the memory address; retrieving stored memory data from the accessed memory location in the first memory array and retrieving error correction check bits corresponding to the accessed memory location from the second memory array; checking the retrieved memory data for bit errors using the retrieved check bits; in response to a bit error being detected in the retrieved memory data, generating corrected memory data using the retrieved check bits and asserting an error correction event signal; providing the corrected memory data as the read out memory data; and in response to the error correction event signal being asserted, setting the error correction event register to a second value to indicate an error correction event has occurred in the read out data from the memory location associated with the memory address in the first memory array.