Patent ID: 9299715
Filing Date: 2016-03-29
CPC Classification: H01L

Claim Text:
1. A manufacturing method of a semiconductor device including a memory cell region and a peripheral circuit region on a semiconductor substrate, comprising the steps of: (a) forming a first insulating film over the semiconductor substrate of the memory cell region and the peripheral circuit region; (b) forming a first conductive film over the first insulating film of the memory cell region and the peripheral circuit region; (c) selectively patterning the first conductive film of the memory cell region while leaving the first conductive film of the peripheral circuit region, thereby forming a first gate electrode in the memory cell region; (d) forming a second insulating film including a charge storing region over the memory cell region and the peripheral circuit region after the step (c); (e) forming a second conductive film over the second insulating film of the memory cell region and the peripheral circuit region; (f) etching back the second conductive film, thereby removing the second conductive film in the peripheral circuit region and forming a second gate electrode via the second insulating film on a sidewall of the first gate electrode in the memory cell region; and (g) patterning the first conductive film of the peripheral circuit region, thereby forming a third gate electrode in the peripheral circuit region after the step (f).