Patent ID: 9244855
Filing Date: 2016-01-26
CPC Classification: G06F

Claim Text:
1. A method to support a plurality of page sizes of a virtual demand-paged memory system without significantly increasing miss-handling penalties, the method comprising: initializing a fixed plurality of page table entries for a fixed plurality of pages contiguous in a memory, each page having a first page size, wherein a linear address for each page in each page table entry corresponds to a physical address and the fixed plurality of pages is aligned; setting a first bit in each of the fixed plurality of page table entries, for access by an operation during a highest level of a page table walk on a multiple level page table hierarchy, to a value indicating whether or not the fixed plurality of pages is to be treated as one combined page having a second page size larger than the first page size; and when a miss occurs for at least one of the fixed plurality of pages, performing said page table walk.