Patent ID: 9262575
Filing Date: 2016-02-16
CPC Classification: G06F,G11C

Claim Text:
1. A computer-implemented method for predicting a condition in a circuit under design, the method comprising: obtaining a first set comprising a first static noise margin curve for the circuit and a second static noise margin curve for the circuit, wherein each of the first static noise margin curve and the second static noise margin curve plots a voltage of an input node of the circuit against a corresponding voltage of an output node of the circuit, wherein the second static noise margin curve is complementary to the first static noise margin curve; adjusting a parameter of a cell using a two-dimensional device simulation tool until the first set resembles a second set comprising a third static noise margin curve corresponding to the cell and a fourth static noise margin curve corresponding to the cell, wherein each of the third static noise margin curve and the fourth static noise margin curve plots a voltage of an input node of the cell against a corresponding voltage of an output node of the cell, wherein the fourth static noise margin curve is complementary to the third static noise margin curve; and predicting the condition in accordance with hardware characterization data corresponding to the cell.