Patent ID: 9419140
Filing Date: 2016-08-16
CPC Classification: H01L

Claim Text:
1. A fin-based transistor device, comprising: a silicon germanium layer provided on a silicon bulk substrate; and a fin formed in the substrate and silicon germanium layer, such that the fin includes a silicon bulk substrate portion and a silicon germanium layer portion, the silicon germanium layer portion having a concentration of germanium of 75% or higher, a concentration of silicon of 25% or lower, a lateral thickness of 20 nm or less across the silicon germanium layer portion at one or more locations, the silicon germanium layer portion having a lateral thickness less than that of a lateral thickness of the silicon bulk substrate portion where the silicon bulk substrate portion contacts the silicon germanium layer portion and having an uppermost lateral thickness less than the lateral thickness of the silicon germanium layer portion where the silicon bulk substrate portion contacts the silicon germanium layer portion, and the silicon germanium layer portion having a vertical thickness greater than a vertical thickness of the silicon bulk substrate portion of the fin.