Patent ID: 9489315
Filing Date: 2016-11-08
CPC Classification: G06F

Claim Text:
1. A method of executing, by a microprocessor, polymorphic binary code of a predetermined function, said method comprising providing a microprocessor, wherein said microprocessor comprises one or more arithmetic and logic units, wherein said microprocessor comprises a memory configured to store instructions to be executed by said one or more arithmetic and logic units in a particular order, acquiring polymorphic binary code of a predetermined function, wherein said polymorphic binary code comprises a first block of instructions, wherein said polymorphic binary code comprises a second block of instructions, wherein said first block of instructions comprises instructions that, when executed by said microprocessor, result in acquisition of a random number, wherein said second block of instructions comprises instructions that, when executed by said microprocessor, define a specific generator, wherein said specific generator, when executed by said microprocessor, generates a set of target instructions, wherein said set of target instructions, when executed by said microprocessor, carries out said predetermined function, wherein said polymorphic binary code further comprises control instructions, wherein said control instructions are configured for placing said set of target instructions, which are generated by said specific generator, into memory, wherein placement of said set of target instructions generated by said specific generator into memory occurs in response to execution of said control instructions by said microprocessor, wherein said specific generator incorporates a plurality of coding variants of said predetermined function and selection instructions, wherein each coding variant of said plurality of coding variants generates, when executed by said microprocessor, a specific set of instructions that perform said predetermined function, wherein each instruction of said specific set of instructions comprises an opcode and one or more operands, wherein said opcode codes a nature of an operation to be executed, wherein said one or more operands define one or more values of parameters of said operation to be executed, wherein said specific sets of instructions are distinguished from one another by difference in at least one instruction opcode, one operand, a literal value, and a number of instructions, wherein, during execution of said specific generator by said microprocessor, said selection instructions make it possible to choose, from said plurality of available coding variants, a coding variant to be executed to generate said set of target instructions, wherein said choice is a function of a random number, wherein said method further comprises acquiring a random number through execution by said microprocessor of said first block of instructions, choosing a coding variant to be executed through execution by said microprocessor of said selection instructions, wherein a choice of coding variant is made as a function of said acquired random number, generating, through execution by said microprocessor, of said specific generator, of said set of target instructions by executing said coding variant chosen as a function of said acquired random number, shifting in said memory of said microprocessor, through execution by said microprocessor of said control instructions, said set of target instructions generated for said microprocessor to execute said target instructions, and executing said set of target instructions by said microprocessor, and wherein said choice of said coding variant to be executed is systematically made only between different coding variants of said predetermined function.