Patent ID: 9411722
Filing Date: 2016-08-09
CPC Classification: G06F,G11C

Claim Text:
1. A non-volatile storage device, comprising: a memory array; a data interface; a read enable interface configured to receive a read enable signal, wherein the read enable signal defines how data to be read from the memory array should be clocked out of the non-volatile storage device on the data interface; an asynchronous first-in first-out (FIFO) buffer coupled to the data interface, the read enable interface, and the memory array, wherein the asynchronous FIFO buffer comprises a read clock input and a write clock input, wherein the read clock input is configured to receive the read enable signal, wherein the write clock input is configured to receive a write clock, wherein the write clock is a delayed version of the read enable signal that is asynchronous to the read enable signal provided to the read clock input, wherein the asynchronous FIFO buffer is configured to input data from the memory array in accordance with the write clock, wherein the asynchronous FIFO buffer is configured to output data in accordance with the read enable signal; and control logic configured to provide the data output from the asynchronous FIFO buffer onto the data interface.