Patent ID: 9312387
Filing Date: 2016-04-12
CPC Classification: H01L

Claim Text:
1. A method of forming a FinFET device in and above a substrate comprised of silicon, comprising: forming a doped fin for said device, said doped fin comprising a doped region that extends at least throughout a vertical height and a lateral width of said doped fin and at least into a portion of said substrate positioned vertically under said doped fin; forming a layer of germanium, silicon/germanium (Si forming a gate structure around at least a portion of said layer of germanium, silicon/germanium or III-V semiconductor material above said portion of said doped fin to define a channel region of said FinFET device in said portion of said layer of germanium, silicon/germanium or III-V semiconductor material, wherein said gate structure includes a gate insulation layer formed above said layer of germanium, silicon/germanium or III-V semiconductor material and a gate electrode formed above said gate insulation layer.