Patent ID: 9322848
Filing Date: 2016-04-26
CPC Classification: G01R

Claim Text:
1. A semiconductor die comprising: a substrate; and a plurality of input/output (I/O) pads arranged in an array defining a plurality of parallel rows and a plurality of parallel columns; wherein: the plurality of I/O pads includes: a first plurality of cluster pads forming a first test cluster, a first set of ground pads, and a first set of power pads; the first plurality of cluster pads of the first test cluster are all adjacent to at least one other pad in the first test cluster; the first plurality of cluster pads of the first test cluster all have the same data signal, at least during testing operations; and each cluster pad of the first plurality of cluster pads is in a consecutive position with respect to at least one of a ground pad or a power pad, the consecutive position relative to either a row of I/O pads or a column of I/O pads.