Patent ID: 9418245
Filing Date: 2016-08-16
CPC Classification: G06F,G09C,H04L

Claim Text:
1. An encryption processing method comprising: in an encryption processing device with a small circuit scale: dividing and inputting configuration bits of data to be processed into a plurality of lines, and repeatedly executing data conversion processing of data for each line of the plurality of lines; executing F function processing of data input from a line of the plurality of lines to an F function and generating converted data using the F function; executing an XOR calculation with data from another line of the plurality of lines and the converted data; storing, in a register of the encryption processing device, the data input from the line of the plurality of lines to the F function; deleting from the register the data input from the line of the plurality of lines to the F function and storing intermediate data during the process of generating the converted data using the F function; and upon generating the converted data using the F function, restoring in the register, the deleted data input based on the intermediate data generated during the process of generating the converted data and stored in the register.