Patent ID: 9274799
Filing Date: 2016-03-01
CPC Classification: G06F

Claim Text:
1. A processor, comprising: a front end, including: a first logic to determine whether to apply an acyclical thread assignment scheme to code received at the processor; a second logic to determine whether to apply a cyclical thread assignment scheme to code received at the processor; a third logic to, based upon a determined thread assignment scheme, assign first code to a static logical thread; and a fourth logic to, based upon the determined thread assignment scheme, assign second code to a rotating logical thread; and a scheduler, including: a fifth logic to assign the static logical thread to a first physical thread; a sixth logic to assign the static logical thread to the first physical thread upon each subsequent control flow instruction of the static logical thread; a seventh logic to assign the rotating logical thread to a second physical thread; and an eighth logic to assign the rotating logical thread to a third physical thread upon a subsequent execution of the rotating logical thread.