Patent ID: 9385112
Filing Date: 2016-07-05
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: a substrate comprising laterally-adjacent first and second substrate regions; a first isolation region that is at least in the first substrate region; an active region that is at least in the second substrate region, the active region being laterally adjacent to the first isolation region; a conductive line extending from the first substrate region into the second substrate region, the conductive line being elevationally over the first isolation region and elevationally over the active region, a top surface of the conductive line elevationally over the first isolation region in the first substrate region being lower in the substrate than an elevationally outer surface of active material of the active region in the second substrate region, a top surface of the conductive line elevationally over the active region in the second substrate region being higher in the substrate than the elevationally outer surface of the active material of the active region in the second substrate region; and a conductive via extending elevationally inward at least to elevation of the higher top surface of the conductive line elevationally over the active region in the second substrate region.