Patent ID: 9524779
Filing Date: 2016-12-20
CPC Classification: G11C,H01L

Claim Text:
1. A monolithic three dimensional NAND string, comprising: a stack of alternating first material layers and second material layers different from the first material layers over a major surface of a substrate, wherein: a semiconductor channel comprising at least one portion extending through the stack in a second direction substantially perpendicular to the major surface of the substrate; a plurality of vertically spaced apart clam shaped blocking dielectrics, wherein each of the clam shaped blocking dielectrics is in contact with a respective control gate electrode among the plurality of control gate electrodes and is a conformal structure having a uniform thickness throughout; a plurality of vertically spaced apart floating gates, wherein the plurality of vertically spaced apart floating gates comprise at least a first spaced apart floating gate located in the first device level and a second spaced apart floating gate located in the second device level; and a tunnel dielectric located between each one of the plurality of the vertically spaced apart floating gates and the semiconductor channel;