Patent ID: 9362308
Filing Date: 2016-06-07
CPC Classification: H01L

Claim Text:
1. A method of making a semiconductor device, comprising: providing a silicon-on-insulator substrate having a first insulating layer disposed between a first silicon layer and an underlying silicon substrate; depositing a layer of SiGe on the first silicon layer; selectively etching the SiGe and first silicon layers to form first fins having a stacked SiGe/Si structure comprising SiGe portions on top of Si portions, each stacked SiGe/Si structure separated from each other by a gap; forming a second insulating layer that covers exposed regions of said first insulating layer and fills the gaps between each of said first fins and surrounding said first fins; etching and planarizing the second insulating layer so that top surfaces of the SiGe portions of said first fins are exposed; for only selected first ones of said first fins, removing the SiGe portions so that upper surfaces of corresponding Si portions directly beneath the removed SiGe portions of the selected first ones of said first fins are exposed; and forming a second silicon layer over the exposed upper surfaces of the Si portions of the selected first ones of said first fins so as to form second fins having an Si structure.