Patent ID: 9425338
Filing Date: 2016-08-23
CPC Classification: H01L,H02J,H02S,Y02E

Claim Text:
1. A solar power generation system for providing operating power for a desired application, the desired application having a predetermined operating power level requirement and predetermined operating voltage level requirement, the system comprising one or more solar-array modules, wherein each of said one or more solar-array modules includes: a. a multiplicity of solar cells, wherein a preconfigured number of said solar cells are electrically connected in series to form a serial unit, and wherein a preconfigured number of said serial units are electrically connected in series to form a string of serial-units, said string of serial-units is facilitated to produce a first output voltage level; wherein a preconfigured number of said strings of serial-units are electrically connected in parallel to form an array of said solar cells, said array of said solar cells is facilitated to produce a first output power level; wherein in each of said strings of serial-units, at least one serial-unit is also electrically connected in parallel to its neighboring serial-units, to form a crisscross matrix array of serial units; and wherein said crisscross matrix array of serial units allows currents to bypass malfunctioning serial units; wherein the electrical connections within said crisscross matrix do not comprise switches; and b. a DC to DC power converter electrically connected to said crisscross matrix array of serial units, said power converter configured to boost said first output voltage level to a second output voltage level higher than said first output voltage level, wherein said power converter is configured in a push-pull configuration and comprises a plurality of transistors for alternately connecting the opposite sides in a primary of a transformer to a DC source, and wherein said converter is configured such that the operational duty cycle of said transistors is constant and a dead time between the switching time On to Off or Off to On of said transistors is less than 8% of the On or Off time periods.