Patent ID: 9472580
Filing Date: 2016-10-18
CPC Classification: G02F,H01L

Claim Text:
1. A pixel array, comprising a plurality of pixel units, each of the plurality of pixel units comprising: a first scan line, a second scan line and a data line; a first thin-film transistor, electrically connected to the first scan line and the data line; a first pixel electrode, electrically connected to the first thin-film transistor; a second thin-film transistor, electrically connected to the second scan line and the data line, wherein the first thin-film transistor and the second thin-film transistor are located between the first scan line and the second scan line; a second pixel electrode, electrically connected to the second thin-film transistor, wherein an orthogonal projection pattern of the first thin-film transistor on a XY plane and that of the second thin-film transistor on the XY plane are together substantially the same as observed in a same viewing direction of the orthogonal projection pattern upon the XY plane, wherein the first thin-film transistor and the second thin-film transistor are located at two opposite sides of the data line with respect to a direction which the data line extends, respectively; a first capacitance electrode line; a second capacitance electrode line; a first capacitance electrode electrically connected to the first thin-film transistor, wherein the first capacitance electrode is located on the first capacitance electrode line so as to form a first capacitor; and a second capacitance electrode electrically connected to the second thin-film transistor, wherein the second capacitance electrode is located on the second capacitance electrode line so as to form a second capacitor, wherein the first capacitance electrode line and the second capacitance electrode line are electrically connected to each other through a connecting line, and the connecting line is overlapped with the data line and located between the first scan line and the second scan line.