Patent ID: 9401699
Filing Date: 2016-07-26
CPC Classification: G05F,H03K,H03L

Claim Text:
1. A device comprising: a ring oscillator configured to output an oscillator signal; a first capacitor having a first terminal coupled to an output of the ring oscillator and a second terminal coupled to a variable control voltage, a capacitance between the first terminal and the second terminal of the first capacitor varying based on the variable control voltage, the first capacitor being configured to fine-frequency tune a frequency of the oscillator signal output from the ring oscillator; a first transistor configured to supply a drive current to the ring oscillator; a second transistor coupled to the first transistor in a current mirror configuration; a bias current generator configured to pass a bias current through the second transistor, a gate terminal of the second transistor being electrically connected to a node between a drain terminal and the bias current generator; a first switch coupled between the node and the drain terminal of the second transistor; a second switch coupled between the node and the bias current generator; a frequency divider configured to receive an oscillator signal output from the ring oscillator and to output a divided oscillator signal; a phase detector configured to receive the divided oscillator signal and an input oscillator signal and to output a phase difference signal indicative of a phase difference between the divided oscillator signal and the input oscillator signal; and a loop filter coupled between the phase detector and the ring oscillator, the loop filter being configured to filter the phase difference signal output from the phase detector and to output the variable control voltage to the second terminal of the first capacitor.