Patent ID: 9311246
Filing Date: 2016-04-12
CPC Classification: G06F

Claim Text:
1. A cache memory system for caching data, comprising: a cache memory configured to store a copy of a portion of data stored in a system memory; a cache load circuit configured to retrieve the portion of data from the system memory, select a region from a plurality of regions of the cache memory in which to store the retrieved portion of data, and store a copy of the retrieved portion of data in the selected region of the cache memory; a tag memory configured to store address information identifying a region of the system memory from which the portion of data stored in the cache memory was retrieved; and a status memory configured to identify whether a region of the cache memory contains data that has been accessed from the cache memory by a device external to the cache memory system, wherein the plurality of regions of the cache memory from which the cache load circuit is configured to select comprises (i) a vacant region, (ii) a region identified as containing data that has been accessed by the device external to the cache memory system, and (iii) a region identified as containing data that has not been accessed by the device external to the cache memory system, and wherein the region of the system memory from which the data was retrieved is outside one or more defined address ranges of system memory.