Patent ID: 9466651
Filing Date: 2016-10-11
CPC Classification: H01L

Claim Text:
1. An active matrix structure comprising: a crystalline semiconductor layer adjoining a buried insulator layer; a backplane layer on a top side of the buried insulator layer, the backplane layer including an array of electrically isolated, active semiconductor devices, the crystalline semiconductor layer being incorporated within the active semiconductor devices, a dielectric layer encapsulating the active semiconductor devices, and electrical conductors extending within the dielectric layer and electrically connected to the active semiconductor devices; a frontplane formed on a bottom side of the buried insulator layer and including a plurality of passive devices, a plurality of first highly doped contact regions adjoining the bottom side of the buried insulator layer and electrically connected to the active semiconductor devices, a plurality of second highly doped contact regions adjoining the bottom side of the buried insulator layer and electrically connected to the electrical conductors within the dielectric layer, a plurality of first electrodes electrically coupled to the first highly doped contact regions and to the passive devices, a plurality of second electrodes electrically coupled to the second highly doped contact regions and to the passive devices, and an encapsulation layer encapsulating the passive devices, the first and second highly doped contact regions, and the first and second electrodes.