Patent ID: 9373787
Filing Date: 2016-06-21
CPC Classification: H01L

Claim Text:
1. A nonvolatile memory device comprising: a second electrode line intersecting a first electrode line, the first electrode line having an upper portion; an inserted electrode line disposed between the first and second electrode lines and extending in parallel with the second electrode line, the inserted electrode line being coupled to the second electrode line and having a bottom portion; a first intermediate pattern disposed between the inserted electrode line and the first electrode line and extending in parallel with the inserted electrode line, the first intermediate pattern being coupled to the inserted electrode line; and a second intermediate pattern disposed between the inserted electrode line and the second electrode line and extending in parallel with the inserted electrode line, the second intermediate pattern being coupled to the inserted electrode line, wherein the bottom portion of the inserted electrode line protrudes downwardly and is partially embedded in the upper portion of the first electrode line, and wherein one of the first and second intermediate patterns is a variable resistor and the other of the first and second intermediate patterns is a selector.