Patent ID: 9530795
Filing Date: 2016-12-27
CPC Classification: G06F,H01L

Claim Text:
1. A semiconductor device, comprising: a first cell including circuitry for performing one or more logic functions, the circuitry of the first cell including a plurality of conductive features defined in one or more levels of the first cell, the first cell having an outer cell boundary defined to circumscribe the first cell, the first cell including a conductive structure formed to extend to within at least one-half of a design rule spacing distance from the outer cell boundary of the first cell at a first location; and a second cell including circuitry for performing one or more logic functions, the circuitry of the second cell including a plurality of conductive features defined in one or more levels of the second cell, the second cell having an outer cell boundary defined to circumscribe the second cell, a portion of the outer cell boundary of the second cell aligned with a portion of the outer cell boundary of the first cell that includes the first location, the second cell formed to provide a spacing allowance region for the conductive structure of the first cell at the first location.