Patent ID: 9490328
Filing Date: 2016-11-08
CPC Classification: H01L

Claim Text:
1. A silicon carbide semiconductor device comprising: a substrate of a first conductivity type which includes a first main surface and a second main surface which is an opposite surface of the first main surface and is made of silicon carbide; an epitaxial layer which is formed on the first main surface of the substrate and made of silicon carbide; a body layer of a second conductivity type different from the first conductivity type, which has a first depth from a surface of the epitaxial layer and is formed in the epitaxial layer; a body layer potential fixing region of the second conductivity type, which has a second depth from the surface of the epitaxial layer and is formed in the epitaxial layer; a first source region of the first conductivity type, which has a third depth from the surface of the epitaxial layer and is formed in the body layer so as to be separated from an end portion of the body layer and to be adjacent to the body layer potential fixing region, and to which a first impurity is introduced; a second source region of the first conductivity type, which has a fourth depth from the surface of the epitaxial layer and is formed inside the first source region on a side of the end portion of the body layer and is further formed inside the first source region so as to be separated from the body layer potential fixing region on a side of the body layer potential fixing region, and to which a second impurity which has a solid-solubility limit higher than that of the first impurity and is easily diffused is introduced; a third source region of the first conductivity type, which has a fifth depth from the surface of the epitaxial layer and is formed of the first source region and the second source region overlapped with each other; a source diffusion layer region including the first source region, the second source region and the third source region; a channel region formed in the body layer between the end portion of the body layer and the first source region; a gate insulating film formed to be in contact with the channel region; a gate electrode formed to be in contact with the gate insulating film; and a drain region of the first conductivity type, which has a sixth depth from the second main surface of the substrate and is formed in the substrate.