Patent ID: 9516147
Filing Date: 2016-12-06
CPC Classification: H04L,H04N

Claim Text:
1. A method performed on a computing device that includes at least one processor and memory, the method comprising: sequentially reading, by the computing device, one data unit at a time from at least one source buffer into a code field that is separate from the at least one source buffer and a destination buffer, where each one data unit is read only one time during the sequentially reading; finding, in the code field during the sequentially reading, a first code in the at least one source buffer and a second code in the at least one source buffer, where the first code and the second code are each more than one data unit in size; and sequentially copying data units from the at least one source buffer into the destination buffer, where the copying begins at a data unit corresponding to the first code in the at least one source buffer and ends with a data unit corresponding to the second code in the at least one source buffer, where, upon completion of the sequentially copying, the destination buffer contains one complete network abstraction layer unit (“NALU”), and where, upon completion of the sequentially copying, each copied data unit was copied only one time from the at least one source buffer to the destination buffer.