Patent ID: 9495491
Filing Date: 2016-11-15
CPC Classification: G06F,H01L

Claim Text:
1. A method of implementing a cooling system configured to cool an integrated circuit, the method comprising: determining, at a processor of a computing device, for each of a plurality of regions of the integrated circuit, a failure rate for that region based on a projected temperature and a projected supply voltage of that region; determining, at the processor, a heat dissipation factor of the cooling system based on the failure rates of the regions, where implementation of the heat dissipation factor would, for each region, reduce its projected temperature to a reduced temperature, so that an overall failure rate of the integrated circuit is not exceeded during operation of the integrated circuit; analyzing, at the processor, the reduced temperatures and projected supply voltages of the regions to identify a selected region having a projected supply voltage less than a maximum supply voltage of the regions and for which a temperature increase from the reduced temperature can be permitted without exceeding the overall failure rate; and implementing the cooling system with a reduced heat dissipation factor reduced relative to the heat dissipation factor determined based on the failure rates of the regions by configuring the cooling system to allow the temperature increase from the reduced temperature in the selected region without exceeding the overall failure rate.