Patent ID: 9311007
Filing Date: 2016-04-12
CPC Classification: G06F,G11C,Y02D

Claim Text:
1. An integrated circuit including a power domain capable of operating in a plurality of modes, the integrated circuit comprising: registers for holding data, the integrated circuit being capable of placing the registers in a low power condition in which their state is lost, wherein the power domain is capable of reading the registers and a current operating mode of the power domain is dependent on the state of the registers; a memory; and a configuration controller having access to a set of mappings, each mapping indicating for the state of a first set of bits represented in the memory the state of a corresponding second set of bits storable in the registers, the first set having fewer bits than the second set, the configuration controller operable to perform a register configuration operation by reading the state of a first set of bits from the memory and populating the registers with the state of the second set of bits that corresponds to the state of that first set of bits, wherein the state of the second set of bits represents the state of all combinations of the registers, while the state of the first set of bits represents the state of a predetermined number of common combinations of the registers.