Patent ID: 9287182
Filing Date: 2016-03-15
CPC Classification: H01L

Claim Text:
1. A method for forming a semiconductor device, comprising: providing a semiconductor substrate including a silicon-on-insulator (SOI) substrate including a top silicon layer; forming a first fin and a second fin on the semiconductor substrate by: forming a first gate dielectric layer across the first fin, a first gate on the first gate dielectric layer, a second gate dielectric layer across the second fin, and a second gate on the second gate dielectric layer; forming an interlayer dielectric layer to cover the first gate, the second gate, and the semiconductor substrate; and removing a first portion of the interlayer dielectric layer, a portion of the first gate, and a portion of the first gate dielectric layer, over the top surface of the first fin, and a second portion of the interlayer dielectric layer over the second fin to expose the second gate over the second fin, wherein the second gate remains intact while removing, according to a height difference between the first fin and the second fin.