Patent ID: 9514088
Filing Date: 2016-12-06
CPC Classification: G06F,G11B,H03M,H04L

Claim Text:
1. A method for command processing in a memory controller, comprising: receiving, by the memory controller, a serial input signal including a series of binary digits; capturing, by the memory controller, the binary digits at ones of odd locations or even locations of the serial input signal to form a first sub-series; checking, by the memory controller, the first sub-series against a plurality of preset commands; capturing, by the memory controller after checking the first sub-series against the preset commands and if the first sub-series corresponds to one of the preset commands, the binary digits at other ones of the odd locations or the even locations of the serial input signal to form a second sub-series; comparing, by the memory controller, the first and second sub-series; and performing, by the memory controller, the one of the preset commands represented by the first sub-series, if the first and second sub-series are complementary to each other.