Patent ID: 9419117
Filing Date: 2016-08-16
CPC Classification: H01L,H02P

Claim Text:
1. A semiconductor device comprising: a semiconductor chip formed with an SiC-IGBT (Insulated Gate Bipolar Semiconductor) including: an SiC semiconductor layer having a first surface and a second surface, a first conductive-type collector region formed such that the collector region is exposed on the second surface of the SiC semiconductor layer, a second conductive-type base region formed closer to the first surface of the SiC semiconductor layer with respect to the collector region such that the base region is in contact with the collector region, a first conductive-type channel region formed closer to the first surface of the SiC semiconductor layer with respect to the base region such that the channel region is in contact with the base region, a second conductive-type emitter region formed closer to the first surface of the SiC semiconductor layer with respect to the channel region such that the emitter region is in contact with the channel region, the emitter region defining a portion of the first surface of the SiC semiconductor layer, a collector electrode formed such that the collector electrode is in contact with the second surface of the SiC semiconductor layer, the collector electrode connected to the collector region, and an emitter electrode formed such that the emitter electrode is in contact with the first surface of the SiC semiconductor layer, the emitter electrode connected to the emitter region; and a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) connected in parallel to the SiC-IGBT, the MOSFET including: a second conductive-type source region electrically connected to the emitter electrode; and a second conductive-type drain region electrically connected to the collector electrode, wherein the MOSFET includes an SiC-MOSFET provided in the semiconductor chip, the source region is formed utilizing the emitter region of the SiC-IGBT, the drain region is formed adjacent to the collector region of the SiC-IGBT such that the drain region is selectively exposed on the second surface of the SiC semiconductor layer, the collector electrode is collectively connected to the drain region and the collector region, the SiC semiconductor layer includes: a second conductive-type SiC substrate defining the second surface of the SiC semiconductor layer and selectively formed with a trench from the second surface toward the first surface, and a second conductive-type SiC base layer formed on the SiC substrate to serve as the base region defining the first surface of the SiC semiconductor layer, wherein the drain region is formed utilizing the SiC substrate, and the collector region is formed at the bottom surface of the trench.