Patent ID: 9318507
Filing Date: 2016-04-19
CPC Classification: H01L

Claim Text:
1. A thin film transistor, comprising: a gate electrode, an oxide semiconductor layer comprising at least a first and a second oxide semiconductor layer, an etch stopper layer, a source-drain electrode, and a gate insulator film, wherein the oxide semiconductor layer is configured to be a channel layer; the etch stopper layer is configured to protect a surface of the oxide semiconductor layer; the gate insulator film is interposed between the gate electrode and the channel layer; the first oxide semiconductor layer is in direct contact to the gate insulator film and satisfies the following expressions: where [In], [Zn], and [Sn] represent a content of each element in atomic % relative to a total content of all metal elements in the first oxide semiconductor layer; a hydrogen concentration in the gate insulator film in direct contact to the first oxide semiconductor layer is 4 atomic % or lower; and the second oxide semiconductor layer is in direct contact to the source-drain electrode and satisfies the following expressions: 10≦[In]≦20, 30≦[Zn]≦40, 5≦[Sn]≦15, and 35≦[Ga]≦50 where [In], [Zn], [Sn], and [Ga] represent a content of each element in atomic % relative to a total content of all metal elements in the second oxide semiconductor layer.