Patent ID: 9281779
Filing Date: 2016-03-08
CPC Classification: G06F,H03B,H03L

Claim Text:
1. A circuit, comprising: a first resistor coupled to a supply voltage; a second resistor coupled to the first resistor via a first node; a first field-effect transistor gate-coupled to the first node via a second node, wherein the first field-effect transistor is source-coupled to the supply voltage, and wherein the first field-effect transistor is drain-coupled to a third resistor via a third node; a second field-effect transistor gate-coupled to the third node via a fourth node, wherein the second field-effect transistor is source-coupled to the supply voltage, and wherein the second field-effect transistor is drain-coupled to a fourth resistor via a fifth node; and a third field-effect transistor gate-coupled to the fifth node via a sixth node, wherein the third field-effect transistor is source-coupled to the supply voltage, and wherein the third field-effect transistor is drain-coupled to a fifth resistor via a seventh node.