Patent ID: 9280627
Filing Date: 2016-03-08
CPC Classification: G06F

Claim Text:
1. A computer-implemented method of verifying a hardware design, the method comprising: generating, with a processor, an object representing a component of the hardware design, wherein the object is an instance of an abstract definition of the component, the abstract definition based on a protocol implemented in the hardware design; storing the object in a memory; testing, using the processor, the object to determine whether the component complies with the protocol implemented in the hardware design, wherein the testing effects a status change in the object; updating, with the processor, a history associated with the object to reflect the status change in the object; displaying run-time actions and results of the test, including updates to the object, according to instructions provided in a display definition associated with the definition of the object; performing, with the processor, the run-time actions on the object; and verifying, with the processor, that the component complies with the protocol implemented in the hardware design based on the performed run-time actions.