Patent ID: 9258904
Filing Date: 2016-02-09
CPC Classification: H01L,H05K

Claim Text:
1. A method of making a semiconductor device, comprising: providing a semiconductor die; providing a substrate; forming a plurality of conductive traces over the substrate, at least one of the conductive traces including a plurality of interconnect sites; forming a masking layer over the substrate, the masking layer including a plurality of elongated openings extending over at least two of the conductive traces; forming an elongated interconnect structure between the semiconductor die and a first interconnect site of the interconnect sites, wherein a length of the elongated interconnect structure along the first interconnect site is greater than a width of the elongated interconnect structure across the first interconnect site, and the width of the elongated interconnect structure is tapered along the length of the elongated interconnect structure to be wider proximate to the semiconductor die and narrower proximate to the first interconnect site; and depositing an encapsulant between the semiconductor die and substrate.