Patent ID: 9473204
Filing Date: 2016-10-18
CPC Classification: H04B,H04L

Claim Text:
1. A full-duplex transceiver circuit comprising: a line driver configured to output a first current to a first node and a second current to a second node; a first resistor configured to shunt the first node to ground; a second resistor configured to shunt the second node to ground; a first capacitor configured to couple the first node to a third node; a second capacitor configured to couple the second node to the third node; an operational amplifier configured to receive a first input from a reference node and a second input from the third node and output an output voltage at a fourth node; a feedback network comprising a parallel connection of a third resistor and a third capacitor configured to provide a feedback from the fourth node to the third node; and a transmission line of a characteristic impedance configured to couple the first node to a remote transceiver.