Patent ID: 9520324
Filing Date: 2016-12-13
CPC Classification: H01L,H03K

Claim Text:
1. A method of manufacture of an integrated circuit system comprising: connecting a package interconnect of an integrated circuit package to an external resistor that is external to the integrated circuit package, wherein the integrated circuit package includes a master integrated circuit die, a first slave integrated circuit die, and a second slave integrated circuit die, and wherein no resistors external to the integrated circuit package are directly connected to the first and second slave integrated circuit dies; electrically connecting the master integrated circuit die in the integrated circuit package to the external resistor through the package interconnect; and electrically connecting the master integrated circuit die to the first slave integrated circuit die and to the second slave integrated circuit die, wherein the master integrated circuit includes a master constant current and a slave constant current, the master constant current flows through the package interconnect, and the slave constant current is generated by the master integrated circuit die based on the master constant current.