Patent ID: 9287401
Filing Date: 2016-03-15
CPC Classification: H01L

Claim Text:
1. A field effect transistor, comprising: a fin structure, having a sidewall, protruding from a substrate; and a device isolation structure on the substrate, the device isolation structure defining the sidewall of the fin structure, wherein the fin structure includes a buffer semiconductor pattern disposed on the substrate and a channel pattern disposed directly on the buffer semiconductor pattern, wherein the buffer semiconductor pattern has a lattice constant different from that of the channel pattern, wherein the device isolation structure includes a gap-fill insulating layer, and includes an oxidation blocking layer pattern disposed between the buffer semiconductor pattern and the gap-fill insulating layer, and wherein an uppermost surface of the oxidation blocking layer pattern has a level higher than that of an uppermost surface of the buffer semiconductor pattern, but lower than that of an uppermost surface of the fin structure.