Patent ID: 9502422
Filing Date: 2016-11-22
CPC Classification: G11C,H01L

Claim Text:
1. A method for manufacturing a semiconductor device, the method comprising: forming an insulating layer on a semiconductor substrate; forming a TiAl layer on the insulating layer; forming a sacrificial layer on the TiAl layer; performing a first etching process to remove a portion of the sacrificial layer and a portion of the TiAl layer to form a bit line comprising a remaining portion of the TiAl layer and a remaining portion of the sacrificial layer; forming a dielectric layer on sidewalls of the bit line and a top surface of the remaining portion of the sacrificial layer; performing a second etching process on the dielectric layer to form dielectric sidewalls on opposite sides of the bit line; forming a TiN layer on the top surface of the remaining portion of the sacrificial layer and on a surface of the dielectric sidewalls; performing a third etching process on the TiN layer to form a word line intersecting the bit line; removing the remaining portion of the sacrificial layer.