Patent ID: 9306041
Filing Date: 2016-04-05
CPC Classification: H01L

Claim Text:
1. A vertical type semiconductor device, comprising: a plurality of pillar structures extending in a first direction, the pillar structures including channel patterns and being arranged in a second direction and a third direction crossing the second direction; a first word line structure surrounding the pillar structures, the first word line structure extending in the second direction and including first word lines, the first word lines being spaced apart from each other and stacked in the first direction; a second word line structure surrounding the pillar structures, the second word line structure extending in the second direction and including second word lines, the second word lines being spaced apart from each other and stacked in the first direction, the second word line structure being disposed adjacent to the first word line structure in the third direction; a plurality of connecting patterns to connect side walls of adjacent first and second word lines, the connecting patterns being electrically coupled with the first and second word lines positioned at a same level; and a plurality of string select lines coupled to string select transistors on the first and second word line structures, each of the string select lines surrounding at least one pillar structure in the third direction and extending in the second direction, the string select lines separated from the first and second word line structures.