Patent ID: 9496370
Filing Date: 2016-11-15
CPC Classification: H01L

Claim Text:
1. A manufacturing method of a semiconductor apparatus, comprising: forming a control electrode through a first insulating film in a surface layer on a top side of a first semiconductor region of a first conductivity, the first semiconductor region being provided in a substrate, and forming a shielding film such that a region between the shielding film and the control electrode is a region to accommodate a third semiconductor region of the first conductivity; forming a second semiconductor region of a second conductivity in a surface layer of the first semiconductor region using the shielding film and the control electrode as a mask and selectively forming a third semiconductor region in a surface layer of the second semiconductor region using again the shielding film and the control electrode as the mask; forming a second insulating film to cover the control electrode and removing the shielding film; forming a high concentration region of the second conductivity by implanting impurity ions of the second conductivity using an accelerating voltage that permits the impurity ions to penetrate the third semiconductor region, from the surface layer of the second semiconductor region using the second insulating film as a mask, after forming the second insulating film and removing the shielding film; forming a first electrode to contact the third semiconductor region and to be insulated from the control electrode by the second insulating film; and forming a second electrode on a back side of the first substrate, wherein the control electrode is disposed over a part of the second semiconductor region that is sandwiched between the first semiconductor region and the third semiconductor region, and wherein at the forming the second insulating film and removing the shielding film, a portion of the shielding film is left on the second insulating film.