Patent ID: 9240368
Filing Date: 2016-01-19
CPC Classification: H01L

Claim Text:
1. A semiconductor device, comprising: a die pad including an upper surface and a lower surface opposite to the upper surface; a semiconductor chip including a main surface and a back surface opposite to the main surface so that a plurality of electrode pads are formed on the main surface and being mounted on the die pad so that the back surface is opposite to the upper surface of the die pad; a plurality of leads arranged to be aligned on a side of the die pad; a first wire electrically connecting between a first electrode pad among the plurality of electrode pads of the semiconductor chip and a first lead among the plurality of leads; and a second wire having a diameter thicker than a diameter of the first wire, and electrically connecting between a second electrode pad among the plurality of electrode pads of the semiconductor chip and a second lead among the plurality of leads, wherein each of the plurality of leads includes a wire joint part at a distal end on the die pad side, wherein the wire joint part of each of the plurality of leads includes a second region which is arranged on the die pad side and to which the second wire is connected, and a first region which is arranged at a position distant from the die pad farther than the second region and to which the first wire is connected, and wherein the second region of the wire joint part of the second lead includes an extending part extending in a direction of being closer to the die pad than the second region of the wire joint part of the first lead.