Patent ID: 9509991
Filing Date: 2016-11-29
CPC Classification: H04N

Claim Text:
1. A processor configured to: receive input data, divide an individual frame included in the input data into blocks, compare the blocks of the individual frame with corresponding blocks of a first prediction frame for detecting differences in the compared blocks, identify as changed blocks the blocks of the individual frame for which differences have been detected, identify as unchanged blocks the blocks of the individual frame for which no differences have been detected, and generate intermediate data, wherein for at least one processed individual frame the processor is configured to: include in the intermediate data the blocks identified as changed blocks and a header indicating frame size associated with the generated intermediate data, and generate a change indicator indicating in the order that the individual frame is processed for each block with one single bit whether the block is a changed block or an unchanged block for at least one processed individual frame drop the blocks identified as unchanged blocks by not including them into the generated intermediate data, forward the intermediate data including the header to an encoder requiring information about the frame size, directly or after storage in a memory, and forward the change indicator to a reproducer directly or after storage in a memory.