Patent ID: 9343487
Filing Date: 2016-05-17
CPC Classification: H01L

Claim Text:
1. A manufacturing method of a thin film transistor substrate comprising the steps of: (a) forming a gate electrode and an auxiliary capacitance electrode on a substrate by using a first conductive film; (b) forming a first insulating film to cover said gate electrode and said auxiliary capacitance electrode; (c) forming a lower source electrode, a lower drain electrode, and a pixel electrode connected to said lower drain electrode on said first insulating film by using a second conductive film; (d) forming a semiconductor film, which is electrically connected to said lower source electrode and said lower drain electrode, on said lower source electrode and said lower drain electrode; (e) forming a second insulating film on said lower source electrode, said lower drain electrode, and said semiconductor film; and (f) forming an upper source electrode electrically connected to said semiconductor film and said lower source electrode through a contact hole, an upper drain electrode electrically connected to said semiconductor film and said lower drain electrode through a contact hole, and a common electrode electrically connected to said auxiliary capacitance electrode through a contact hole, the upper source electrode, the upper drain electrode, and the common electrode being formed on said second insulating film by using a third conductive film.