Patent ID: 9385649
Filing Date: 2016-07-05
CPC Classification: H03B,H03K,H04B

Claim Text:
1. A method for cancelling a delay in a comparator of an RC oscillator configured to generate a clock pulse, the method comprising: selectively coupling a plurality of current sources to a first capacitor, a second capacitor, and a resistor, wherein the plurality of current sources charge and discharge the first capacitor and the second capacitor, and charge the resistor; charging the first capacitor at a higher rate during a first phase of the clock pulse than a second phase of the clock pulse, and charging the second capacitor at a higher rate during a third phase of the clock pulse than a fourth phase of the clock pulse; and generating the clock pulse by enabling the comparator to compare a voltage on the first or second capacitor with a voltage on the resistor.