Patent ID: 9423466
Filing Date: 2016-08-23
CPC Classification: G01R,H01M,H03K,Y02E,Y02T

Claim Text:
1. A semiconductor circuit connected to a lower stage semiconductor chip and a higher stage semiconductor chip, comprising: a first terminal directly connected to a power source line connected in series to a plurality of power source supply portions; a first communication circuit for performing signal communication with the lower stage semiconductor chip according to a first reference voltage supplied from the first terminal and a first power source voltage; a second communication circuit for performing signal communication with the higher stage semiconductor chip according to a second reference voltage greater than the first reference voltage and a second power source voltage greater than the first power source voltage and the second reference voltage; a level shift circuit for level shifting a first signal to a level corresponding to the second reference voltage of the second communication circuit and the second power source voltage when the first signal is input to the first communication circuit from the lower stage semiconductor chip, said level shift circuit being arranged to level shift a second signal to a level corresponding to the first reference voltage of the first communication circuit and the first power source voltage when the second signal is input to the second communication circuit from the higher stage semiconductor chip; a voltage adjustment circuit for supplying the first power source voltage to the first communication circuit and outputting the first power source voltage externally; a second terminal connected to the power source line through a first filter for supplying a third power source voltage to the voltage adjustment circuit; a third terminal directly connected to the power source line without disposing any grounded circuitry element in parallel to the third terminal and the power source line for supplying the second reference voltage to the second communication circuit; and a fourth terminal connected to the higher stage semiconductor chip for supplying the first power source voltage of the higher stage semiconductor chip output from the higher stage semiconductor chip as the second power source voltage to the second communication circuit.