Patent ID: 9331085
Filing Date: 2016-05-03
CPC Classification: G11C,H01L

Claim Text:
1. A semiconductor device comprising: a substrate; at least one first fin active pattern and at least one second fin active pattern, the first fin active pattern and the second fin active pattern extended in a first direction on the substrate and including a first impurity region and a second impurity region; a first gate electrode and a second gate electrode on the first fin active pattern and the second fin active pattern; a first contact portion electrically connected to the first impurity region of each of the first fin active pattern and the second fin active pattern; and a second contact portion electrically connecting the second impurity region of the first fin active pattern to the second impurity region of the second fin active pattern; wherein the second fin active pattern includes a first gate-separating region including a trench and an embedded insulator filling at least a portion of the trench, and the second gate electrode is extended in a second direction different from the first direction to cross the first gate-separating region.