Patent ID: 9268577
Filing Date: 2016-02-23
CPC Classification: G06F

Claim Text:
1. An information processing apparatus comprising: a first processor configured to executes an instruction stored in a fixed address area in a storage part; a second processor that, at a time of a startup, executes an instruction stored in an address area designated by the first processor in the storage part; the storage part, the storage part storing a first startup program and a second startup program, contents of the second startup program being different at least partially from those of the first startup program; and an address conversion part configured such that, when the first processor performs a first startup different from an ordinary startup that is performed at a time of starting power supply to the information processing apparatus, the address conversion part wherein the first startup program includes an instruction for performing startup control of the second processor, and the second startup program does not include an instruction for performing startup control of the second processor.