Patent ID: 9390929
Filing Date: 2016-07-12
CPC Classification: H01L,H04N

Claim Text:
1. An apparatus comprising: a drive transistor including a gate; a photodiode configured to generate a charge; a transfer transistor including a gate, wherein the transfer transistor is configured to transfer the charge generated by the photodiode to the gate of the drive transistor in response to receiving a transfer signal at the gate of the transfer transistor; a reset transistor including a gate, wherein the reset transistor is configured to reset a voltage at the gate of the drive transistor to a predetermined level in response to receiving a reset signal at the gate of the reset transistor; and a select transistor including a gate, wherein the select transistor is configured to receive a voltage from a source of the drive transistor and to selectively provide the voltage to an output terminal in response to receiving a select signal at the gate of the select transistor; wherein at least one of the transfer transistor, the reset transistor, or the select transistor include a first stacked structure comprising: