Patent ID: 9450095
Filing Date: 2016-09-20
CPC Classification: H01L

Claim Text:
1. A method of forming a semiconductor device comprising: forming a high-k dielectric fin liner on at least one of a first plurality of fin structures in a first device region and a second plurality of fin structures in a second device region; forming a gate structure including a low-k dielectric gate sidewall spacer on a channel region of said at least one of the first and second plurality of fin structures; forming a first epitaxial semiconductor material on one for said first and second plurality of fin structures from which the high-k dielectric fin liner is removed, wherein a remaining portion of the high-k dielectric fin liner remains on a second of said first and second plurality of fin structures; oxidizing the first epitaxial semiconductor material; removing a remaining portion of the high-k dielectric fin liner; and forming a second epitaxial semiconductor material on said second of said first and second plurality of fin structures.