Patent ID: 9287220
Filing Date: 2016-03-15
CPC Classification: H01L

Claim Text:
1. A semiconductor package, comprising: a first substrate having an first electronic device mounted on one surface of the first substrate and a second electronic device mounted on another surface of the first substrate facing the one surface; a first molding part sealing the second electronic device; a first shielding film formed on an external surface of the first molding part; and a second substrate bonded to the one surface of the first substrate and including an insertion part in which the first electronic device mounted on the one surface of the first substrate is inserted, wherein the second substrate includes a ground via, a first shielding wall which is formed along an inner wall of the second substrate, and a ground pattern connecting the ground via with the first shielding wall, wherein the first substrate includes a ground layer formed therein and connected to the first shielding film and the ground via, wherein the first electronic device includes at least one of a passive device and an active device, and wherein the second electronic device includes at least one of a passive device and an active device.