Patent ID: 9401723
Filing Date: 2016-07-26
CPC Classification: H03L

Claim Text:
1. An XOR phase detector for a phase-locked loop PLL, comprising: an XOR gate which has a first input for receiving a periodic reference signal and a second input connected or connectable to an output of a frequency divider of the PLL, and a level shifter which has a level shifter input connected to an output of the XOR gate and a level shifter output connected or connectable to a voltage-controlled oscillator VCO of the PLL, wherein the level shifter is connected or connectable between a low voltage provider and a high voltage provider and has associated with it a high level and a low level and is arranged to deliver at its output the high level or the low level depending on whether the voltage at the output of the XOR phase detector is low or high, wherein the level shifter further has a setpoint input for setting the high level to a setpoint level.