Patent ID: 9530891
Filing Date: 2016-12-27
CPC Classification: H01L

Claim Text:
1. A semiconductor device comprising: an insulating film including: a first region; second and third regions arranged at a distance from each other, the first region being interposed between the second and third regions; and fourth and fifth regions each having a concave shape, the fourth region being located between the first region and the second region, and the fifth region being located between the first region and the third region; a source region and a drain region disposed on upper faces of the second and third regions, respectively; a semiconductor layer extending from the source region to the drain region in a first direction and connected to the source and drain regions, the semiconductor layer disposed on the first region, the fourth region and the fifth region, the semiconductor layer having a smaller width than a width of each of the source region and the drain region in a second direction intersecting the first direction and along the upper faces, the semiconductor layer having a first portion, a second portion, and a third portion, the first portion being located on the first region, the second portion being located on the fourth region, the third portion being located on the fifth region; a gate electrode disposed opposite to at least a side face of the first portion; a gate insulating film disposed between the gate electrode and at least the side face of the first portion; and gate sidewalls disposed on side faces of the gate electrode, the side faces facing the source region and the drain region, the gate sidewalls being made of an insulating material, a film thickness of the first region below the first portion being thicker than that of each of the fourth and fifth regions below the second and third portions, and each of the second portion and the third portion having a greater film thickness than a film thickness of the first portion, wherein the gate insulating film is disposed on an upper face of the first portion, the gate electrode is disposed on the gate insulating film on the upper face of the first portion, a part of the second portion is disposed immediately below one of the gate sidewalls facing the source region, a part of the third portion is disposed immediately below another of the gate sidewalls facing the drain region, a film thickness of the part of the second portion is greater than the film thickness of the first portion and not greater than a film thickness of the second portion except the part of the second portion, and a film thickness of the part of the third portion is greater than the film thickness of the first portion and not greater than a film thickness of the third portion except the part of the third portion.