Patent ID: 11936351
Assignee: ON-BRIGHT ELECTRONICS (SHANGHAI) CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A system for error amplification and processing, the system comprising:
a signal processing unit configured to receive a reference signal and a feedback signal and generate a digital pulse signal, a frequency of the digital pulse signal being associated with a difference between the reference signal and the feedback signal;
a counter configured to receive the digital pulse signal and generate a counter output signal based on at least information associated with the digital pulse signal; and
a digital-to-analog converter configured to receive the counter output signal and generate an output signal based on at least information associated with the counter output signal;
wherein the signal processing unit comprises:
an error amplifier configured to receive the reference signal and the feedback signal and generate an amplification signal based on at least information associated with the reference signal and the feedback signal; and
a pulse generator configured to receive the amplification signal and generate the digital pulse signal based on at least information associated with the amplification signal;

wherein:
the pulse generator includes a current direction switch configured to determine a direction of the amplification signal; and
the current direction switch is configured to receive the amplification signal and generate a current switch output signal based on information associated with the amplification signal;

wherein:
the current direction switch comprises an inverter, a first transistor, and a second transistor;
the inverter is configured to receive the amplification signal from the error amplifier; and
the first transistor is turned on or off based at least in part on the direction of the amplification signal;

wherein:
the second transistor is turned on or off based at least in part on the direction of the amplification signal;
the pulse generator further includes an addition pulse generator;
the addition pulse generator is configured to receive the current switch output signal and generate an addition pulse signal based at least in part on the current switch output signal; and
the addition pulse signal is a part of the digital pulse signal;

wherein:
the addition pulse generator includes a third transistor, a fourth transistor, a first capacitor, a first switch, a first comparator, and a first delay element;
the third transistor and the fourth transistor are configured to receive the current switch output signal and generate a first voltage signal based at least in part on the current switch output signal;
the first capacitor is configured to receive the first voltage signal;
the first comparator is configured to receive the first voltage signal and a first threshold signal and generate the addition pulse signal based at least in part on the first voltage signal and the first threshold signal;
the first delay element is configured to receive the addition pulse signal and generate a first switch signal based on at least information associated with the additional pulse signal; and
the first switch is configured to receive the first switch signal.