Patent ID: 11948633
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 10:
11. A method for operating a resistive memory device, the method comprising:
selecting a memory cell in a program operation of the resistive memory device, which includes word lines stacked on a substrate to be spaced apart from each other, a gate insulating layer vertically penetrating the word lines, and a charge trap layer, a channel layer, and a variable resistance layer that are sequentially formed on an inner wall of the gate insulating layer,
trapping electrons in the charge trap layer of the selected memory cell connected to a selected word line;
applying a turn-off voltage to the selected word line;
applying a turn-on voltage to unselected word lines; and
storing data in the variable resistance layer of the selected memory cell by applying a set voltage to one side of the portion of the channel layer corresponding to the selected word line and applying a ground voltage to the other side of the portion of the channel layer corresponding to the selected word line,
wherein the one side and the other side of the portion of the channel layer corresponding to the selected word line are spaced apart in a vertical direction.