Patent ID: 11893425
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 0:
1. An apparatus comprising:
a processor executing a trusted execution environment (TEE) comprising a field-programmable gate array (FPGA) driver to interface with an FPGA device that is remote to the apparatus; and a remote memory-mapped input/output (MMIO) driver to expose the FPGA device as a legacy device to the FPGA driver, wherein the processor to utilize the remote MMIO driver to:
enumerate the FPGA device using FPGA enumeration data provided by a remote management controller of the FPGA device, the FPGA enumeration data comprising a configuration space and device details;
load function drivers for the FPGA device in the TEE;
create corresponding device files in the TEE based on the FPGA enumeration data; and
handle remote MMIO reads and writes to the FPGA device via a network transport protocol.