Patent ID: 11901279
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A semiconductor package, comprising:
a semiconductor die;
an encapsulant laterally encapsulating the semiconductor die; and
a first redistribution structure stacked on the encapsulant along a stacking direction and electrically connected with the semiconductor die, wherein the first redistribution structure comprises a first conductive via, a second conductive via, a first conductive wire, a second conductive wire, a third conductive wire and a fourth conductive wire, the second conductive via is disposed over the first conductive via along the stacking direction, a lateral dimension of the first conductive via decreases along a first direction, a lateral dimensions of the second conductive via decreases along a second direction, the first direction is opposite to the second direction, the first direction and the second direction are parallel to the stacking direction, the encapsulant is not on sidewalls of the first redistribution structure, the first conductive via is located between and in direct contact with the first conductive wire and the second conductive wire, the second conductive via is located between and in direct contact with the third conductive wire and the fourth conductive wire, the first conductive wire, the first conductive via, the second conductive wire, the third conductive wire, the second conductive via and the fourth conductive wire are sequentially disposed along the stacking direction, and the first conductive via, the second conductive wire, the third conductive wire, the second conductive via and the fourth conductive wire are overlapped with the semiconductor die along the stacking direction.