Patent ID: 11934657
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A system comprising:
a memory sub-system comprising:
a memory device; and
a local media controller, operatively coupled with the memory device; and

a controller, operatively coupled to the memory sub-system, to perform operations comprising:
partitioning a storage region in the memory device into a plurality of channels, each channel comprising a plurality of planesets, and each planeset comprising a plurality of blocksets;
evenly distributing between the plurality of channels a plurality of active zones ready for a write operation, wherein each active zone comprises one or more open blocks; and
sending an open block message to a controller in the memory sub-system, wherein the open block message comprises channel identifying information, planeset identifying information, and blockset identifying information,
wherein the channel identifying information, the planeset identifying information, and the blockset identifying information collectively identify one or more open blocks ready for a write operation in the memory device.