Patent ID: 11923309
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A semiconductor package, comprising:
a redistribution substrate including a plurality of redistribution patterns in a dielectric layer; and
a semiconductor chip on the redistribution substrate, the semiconductor chip including a plurality of chip pads electrically connected to the redistribution patterns,
wherein each of the redistribution patterns includes:
a line part in the dielectric layer; and
a via part that penetrates the dielectric layer and is connected to the line part,

wherein the line parts of each of the redistribution patterns extend parallel to each other in a first direction,
wherein at least some of the line parts of the plurality of redistribution patterns have a first width in a second direction perpendicular to the first direction,
wherein the line part of each of the redistribution patterns includes a central portion and edge portions on opposite sides of the central portion, and the line part of each of the redistribution patterns includes a bottom surface that is upwardly convex at the central portion, and
wherein the bottom surface is in direct contact with the dielectric layer.