Patent ID: 11916120
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G  B | IPC G  H

Claim 9:
10. A semiconductor device comprising:
a first active pattern and a second active pattern each extending in a first direction on a substrate, each of the first active pattern and the second active pattern including a plurality of wire patterns sequentially stacked on the substrate and spaced apart from each other;
a first gate electrode extending in a second direction, the second direction intersecting the first direction, the first gate electrode intersecting the first active pattern and the second active pattern;
a first source/drain contact extending in the second direction and connected to a first source/drain region of the first active pattern and a second source/drain region of the second active pattern, on one side of the first gate electrode;
a second gate electrode extending in the second direction, the second gate electrode intersecting the first active pattern and the second active pattern;
a first cell separation film extending in the second direction between the first gate electrode and the second gate electrode, the first cell separation film crossing the first active pattern and the second active pattern; and
a connection wiring extending in the first direction, the connection wiring connecting the first source/drain contact and the second gate electrode.