Patent ID: 11968089
Assignee: MELLANOX TECHNOLOGIES, LTD.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. The ND according to claim 1, wherein the optimization circuitry is configured to improve the performance measure of the ND by, using the genetic algorithm, continuously iteratively modifying a group of a predetermined number of candidate vectors, each candidate vector specifying values of the operation parameters for the configuration registers, wherein the genetic algorithm comprises: i) a parents selection step, in which pairs of candidate vectors are selected, ii) a cross-over step, in which child vectors are generated by mixing values of pairs of candidate vectors, iii) a mutation step, in which mutated child vectors are generated by modifying the child vectors and, iv) a fittest-selection step, in which candidate vectors for an iteration are selected responsively to the performance measure of the mutated child vectors of a previous iteration.