Patent ID: 11928356
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A system, comprising:
a memory sub-system comprising a plurality of memory components comprising a plurality superblocks of memory cells; and
a processing device coupled to the plurality of memory components, the processing device to perform operations comprising:
selecting a source block in a first plane of one of the memory components for a memory management operation;
selecting a destination block in a second plane of the one of the memory components;
determining the destination block is included in an incomplete superblock;
responsive to determining the destination block is included in the incomplete superblock, determining a threshold distance from a block in the incomplete superblock;
selecting a metadata block in a third plane of the one of the memory components that is the threshold distance away from the block;
storing metadata indicative of an address of the source block in the metadata block; and
performing the memory management operation to transfer data from the source block to the destination block.