Patent ID: 11888975
Assignee: TZERO IP, LLC
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A system comprising:
at least one processor;
at least one memory communicatively coupled to the at least one processor; and
wherein, when at least one encryption key needs to be generated to encrypt a key, the at least one processor is configured to:
generate the at least one encryption key;
encrypt the key using the at least one encryption key to generate an encrypted key;
combine the encrypted key and the at least one encryption key together into a combined key;
split the combined key into at least one set of key components, wherein at least a subset of key components of the at least one set of key components can be used to reconstruct the encrypted key and the at least one encryption key; and
erase the key from the at least one memory.