Patent ID: 11968126
Assignee: MELLANOX TECHNOLOGIES, LTD.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. An apparatus, comprising:
a memory, to store a library of hardware-agnostic packet-processing functions; and
a processor, to:
provide the library to a user;
receive, from the user, a functional hardware-agnostic specification of a packet-processing pipeline for use in a network device, the specification defined in terms of one or more of the packet-processing functions drawn from the library;
derive, from the functional hardware-agnostic specification, a hardware-specific design of the packet-processing pipeline, the hardware-specific design comprising one or more netlists and/or Hardware Definition Language (HDL) circuit descriptions that are suited to manufacture a hardware device implementing the packet-processing pipeline, wherein, to derive the hardware-specific design, the processor is to (i) convert the functional hardware-agnostic specification into a hardware-agnostic intermediate representation, and (ii) generate the hardware-specific design from the intermediate representation; and
add a new function or flow-pipe to the hardware-specific design, by:
converting a functional hardware-agnostic specification of the new function or flow-pipe into the intermediate representation; and
generating an updated hardware-specific design, which includes the new function or flow-pipe, from (i) the intermediate representation of the functional hardware-agnostic specification of the packet-processing pipeline and (ii) the intermediate representation of the new function or flow-pipe.