Patent ID: 11908949
Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method for manufacturing a semiconductor device, comprising:
forming a first oxide and a second oxide over the first oxide;
forming a first insulating film covering the first oxide and the second oxide;
forming a first dummy gate over the first insulating film to overlap with the second oxide;
adding a first dopant to the second oxide using the first dummy gate as a mask;
forming a second dummy gate by removing part of the first dummy gate;
exposing part of the second oxide from the second dummy gate;
adding a second dopant to the second oxide using the second dummy gate as a mask;
forming a second insulating film covering the first insulating film and the second dummy gate;
forming a third insulating film over the second insulating film;
removing part of the second insulating film and part of the third insulating film until a top portion of the second dummy gate is exposed;
forming an opening by removing the second dummy gate, part of the second insulating film, and part of the first insulating film;
forming a third oxide, a fourth insulating film, and a conductive film in this order to be embedded in the opening; and
removing part of the third oxide, part of the fourth insulating film, and part of the conductive film until a top portion of the third insulating film is exposed.