Patent ID: 11955204
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. An apparatus comprising:
a plurality of memory planes, each memory plane of the plurality of memory planes including a plurality of memory cells;
a plurality of power circuits, each power circuit of the plurality of power circuits associated with a respective one of the plurality of memory planes, each power circuit of the plurality of power circuits configured to provide voltages to a respective memory plane of the plurality of memory planes; and
a controller coupled to the plurality of power circuits, the controller configured to configure the plurality of power circuits for concurrent memory access operations, the controller further configured to concurrently access a first memory plane of the plurality of memory planes to perform a first memory access operation having a first memory access operation type and a second memory plane of the plurality of memory planes to perform a second memory access operation having a second memory access operation type.