Patent ID: 11888767
Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A terminal comprising:
a processor; and
a memory, wherein
the processor, in operation, performs:
generating a modulated symbol sequence from an encoded bit sequence according to first control information, the first control information indicating a modulation scheme;
precoding two modulated symbols included in the modulated symbol sequence to generate precoded symbols according to second control information, the second control information indicating a precoding matrix selected from among precoding matrices, the precoding matrices including a first matrix and a second matrix; and
transmitting the precoded symbols through antennas, wherein

when the first matrix is selected:
a first precoded symbol, a second precoded symbol, a third precoded symbol, and a fourth precoded symbol are generated by the precoding,
the second precoded symbol is equal to a result of applying a phase change to the first precoded symbol, and
the fourth precoded symbol is equal to a result of applying a phase change to the third precoded symbol, and

when the second matrix is selected:
a fifth precoded symbol, a sixth precoded symbol, a seventh precoded symbol, and an eighth precoded symbol are generated by the precoding,
the fifth precoded symbol and the sixth precoded symbol are equal to the first precoded symbol and the second precoded symbol, respectively,
the seventh precoded symbol is equal to a result of applying a phase change to the third precoded symbol, and
the eighth precoded symbol is equal to a result of applying a phase change to the seventh precoded symbol.