Patent ID: 11907720
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. The data processing apparatus according to claim 1, wherein when the mode bit storage circuitry indicates a particular register of the plurality of registers is in the metadata mode, the data of the particular register comprises a pointer and the metadata of the particular register comprises bounds information to constrain a range of addresses the pointer can be used to access, and access information to constrain operations performed in dependence on the pointer, the access information comprising at least one of:
read permission information indicative of whether the pointer can be used to read a memory address;
write permission information indicative of whether the pointer can be used to write to a memory address;
branch permission information indicative of whether the pointer can be used to perform a branch operation to a memory address; and,
execution permission information indicative of whether instructions within the range of addresses can be executed.