Patent ID: 11929758
Assignee: SEMISOLUTION CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. A successive approximation register analog-to-digital converter for a wide sampling rate, the analog-to-digital converter comprising:
a capacitor digital-to-analog converter comprising a capacitor array corresponding to output bits and an analog switch circuit;
a comparator configured to output a high signal or a low signal by comparing output voltages of the capacitor digital-to-analog converter; and
a digital controller configured to control the analog switch circuit at the capacitor digital-to-analog converter on the basis of the high signal or the low signal received from the comparator,
wherein the analog switch circuit comprises:
a first PMOS switch having one end connected to a reference voltage source and an opposite end connected to a first control node and controlled by a control voltage;
a second PMOS switch having one end connected to the first control node and an opposite end connected to a capacitor and controlled by a voltage of a second control node;
a first control switch unit configured to control a voltage of the first control node and the voltage of the second control node;
a first NMOS switch having one end connected to a ground and an opposite end connected to a third control node and controlled by the control voltage;
a second NMOS switch having one end connected to the third control node and an opposite end connected to the capacitor and controlled by a voltage of a fourth control node; and
a second control switch unit configured to control a voltage of the third control node and the voltage of the fourth control node.