Patent ID: 11876013
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A semiconductor device comprising:
a first gate stack that wraps a first semiconductor fin and a second gate stack that wraps a second semiconductor fin, wherein the first semiconductor fin and the second semiconductor fin extend lengthwise along a first direction, the first gate stack and the second gate stack extend lengthwise along a second direction that is different than the first direction, the first gate stack includes a first gate dielectric and a first gate electrode, and the second gate stack includes a second gate dielectric and a second gate electrode; and
a gate isolation structure extending from the first gate stack to the second gate stack along the second direction, wherein the gate isolation structure includes:
a first dielectric layer and a second dielectric layer of a first dielectric material, a third dielectric layer and a fourth dielectric layer of a second dielectric material, and a fifth dielectric layer of a third dielectric material,
wherein the first dielectric layer and the third dielectric layer form a first sidewall structure having a first configuration and the second dielectric layer and the fourth dielectric layer form a second sidewall structure having a second configuration that is different than the first configuration, and
wherein the third dielectric layer is between the first dielectric layer and the fifth dielectric layer and the fourth dielectric layer is between the second dielectric layer and the fifth dielectric layer.