Patent ID: 11954120
Assignee: nan
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. The method of claim 4, further comprising:
merging all polygons in said group of matching input geometric objects and all polygons in said group of matching output geometric objects respectively to form a group of merged input polygons and a group of merged output polygons; and
under the circumstance that said group of merged input polygons and said group of merged output polygons consist of same polygons, said group of matching input geometric objects and said group of matching output geometric objects are geometrically integral;
when quantities, orders, and contents of lists of directional borders of two loops are identical, or after at least one application of Op.1 and Op.2, the quantities, orders, and contents of the lists of directional borders of the two loops are identical, the two loops are equivalent:
Op.1: circularly rotating a list of directional borders of one of the two loops; and
Op.2: replacing a directional border in one of the two loops with sub-borders;
two polygons are the same if loops in said two polygons correspond one-to-one by equivalence.