Patent ID: 11861226
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A semiconductor memory device comprising:
a first pad configured to receive a first signal;
a second pad configured to receive a second signal;
a third pad configured to receive a third signal;
a first memory cell array comprising a plurality of first memory strings, the plurality of first memory strings each comprising a plurality of first memory cell transistors;
a first sense amplifier connected to the first memory cell array;
a first data register connected to the first sense amplifier and configured to store data read from the first memory cell array; and
a control circuit configured to execute an operation targeting the first memory cell array, wherein
the first pad is provided in plurality,
in a first mode, a command set instructing the operation is inputted via the first pads, and
in a second mode, the command set is inputted via the second pad and the third pad.