Patent ID: 11968906
Assignee: WINBOND ELECTRONICS CORP.
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A semiconductor device, comprising:
a first inter-metal dielectric (IMD) layer on a substrate;
a bottom electrode in the first IMD layer and protruding above a top surface of the first IMD layer;
a liner directly contacting sidewalls and a bottom surface of the bottom electrode, wherein a bottom surface width in a cross section view of the liner is less than a top surface width in a cross section view of the bottom electrode, the liner comprises a U-shape having a first vertical portion, a second vertical portion, and a horizontal portion connecting the first vertical portion and the second vertical portion, and the first vertical portion and the second vertical portion are not extended to directly contact a top surface of the first IMD layer;
a magnetic tunneling junction (MTJ) on the bottom electrode, wherein a bottom surface width in the cross section view of the bottom electrode is less than a bottom surface width in a cross section view of the MTJ, sidewalls of the MTJ are aligned with sidewalls of the first vertical portion and the second vertical portion, and the MTJ comprises:
a pinned layer on and directly contacting the bottom electrode;
a barrier layer on the pinned layer;
a free layer on the barrier layer; and

a top electrode on the MTJ.