Patent ID: 11948883
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A semiconductor device, comprising:
a transistor on a substrate;
an interlayer insulating layer on the transistor;
a first metal-containing layer on the interlayer insulating layer, the first metal-containing layer including a lower interconnection line; and
a second metal-containing layer on the first metal-containing layer,
wherein:
the second metal-containing layer includes a resistor metal layer and an upper interconnection line on the resistor metal layer,
the resistor metal layer is between the upper interconnection line and the lower interconnection line,
the upper interconnection line includes:
a first portion vertically overlapped with the resistor metal layer, and
a second portion horizontally offset from the resistor metal layer,

a bottom surface of the first portion of the upper interconnection line is located at a level higher than a bottom surface of the second portion of the upper interconnection line, and
the resistor metal layer includes a curved concave recessed side surface such that a center portion of the side surface of the resistor metal layer extends along a curve and further inwardly in the resistor metal layer than a top portion of the side surface of the resistor metal layer and extends along a curve and further inwardly in the resistor metal layer than a bottom portion of the side surface of the resistor metal layer.