Patent ID: 11935941
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A semiconductor structure, comprising:
a substrate having a first surface;
a conductive region in the substrate;
a first insulation layer over the first surface;
a second insulation layer over the first insulation layer;
a gate structure over the first surface of the substrate and surrounded by the first insulation layer;
a low-k spacer between a sidewall of the gate structure and the first insulation layer, wherein a dielectric constant of the low-k spacer is between about 2 and about 3;
a gate contact extending through the second insulation layer and landing on a top surface of the gate structure and a top surface of the low-k spacer, wherein the gate contact includes a sidewall extending from a first end region to a second end region and a recap layer disposed on a middle region of the sidewall between the first end region and the second end region wherein the first and second end regions are free of the recap layer; and
a conductive region contact over the conductive region and surrounded by the first insulation layer and the second insulation layer.