Patent ID: 11894038
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. A memory device comprising:
a memory cell array including a first region and a second region, the second region configured to store a value of a write voltage, the write voltage based on a value of a reference resistor for determining whether a programmed memory cell is in a parallel state or anti-parallel state;
a voltage generator configured to generate a code value based on the value of the write voltage; and
a write driver configured to drive a write current based on the code value, the write current being a current for storing data in the first region, wherein the write driver includes,
at least one first type of transistor, each of the at least one first type of transistor including a first end connected with a first power supply voltage and a second end connected with an output node,
at least one second type of transistor, each of the at least one second type of transistor including a first end connected with a second power supply voltage and a second end connected with the output node,
the code value includes a first code value and a second code value,
the at least one first type of transistors are configured to receive bits of the first code value from the voltage generator, respectively, and
the at least one second type of transistors are configured to receive bits of the second code value from the voltage generator, respectively.