Patent ID: 11943806
Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An integrated circuit for controlling a communication apparatus, the integrated circuit comprising:
receiving circuitry, which, in operation,
receives configuration information to configure a logical channel, which is one of a plurality of logical channels and which is associated with at least one of a plurality of different numerology schemes defined to partition time-frequency radio resources into resource scheduling units, and
receives an uplink scheduling assignment from a radio base station, the uplink scheduling assignment indicating uplink radio resources usable by the communication apparatus; and

control circuitry, which is coupled to the receiving circuitry and which, in operation,
determines, based on the uplink scheduling assignment, a numerology scheme, out of the plurality of different numerology schemes, associated with the uplink scheduling assignment, and
performs a logical channel prioritization procedure by selecting the logical channel that is configured to be associated with the numerology scheme for which the received uplink scheduling assignment is intended, and by allocating the uplink radio resources to the logical channel,
wherein the plurality of logical channels include a first logical channel and a second logical channel different from the first logical channel, and the numerology scheme associated with the first logical channel is different from the numerology scheme associated with the second logical channel.