Patent ID: 11874738
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory system comprising:
a non-volatile memory; and
a controller configured to:
manage a shift table that includes a plurality of entries, each of the plurality of entries storing at least one value of a read voltage;
execute one or more first read operations on the non-volatile memory to obtain read data respectively, each of the one or more first read operations using a first read voltage that is determined from one of the plurality of entries of the shift table, and perform error correction on the read data of the one or more first read operations until the error correction is successful, and when the error correction on the read data of the one of more first read operations is successful, record an index corresponding to the entry of the shift table from which a first read voltage that was used in obtaining the successfully error-corrected read data, was determined; and
execute a second read operation on the non-volatile memory to obtain read data using a second read voltage that is determined from the entry of the shift table corresponding to the recorded index.