Patent ID: 11961557
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory device comprising:
a first interconnect;
a second interconnect;
a memory cell coupled between the first interconnect and the second interconnect and including a variable resistance element and a switching element, the variable resistance element including a first ferromagnetic layer, a second ferromagnetic layer, and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer;
a first circuit configured to apply a first voltage to the first interconnect;
a second circuit configured to apply a second voltage to the second interconnect;
a third circuit configured to apply a third voltage to the second interconnect;
a fourth circuit configured to apply a fourth voltage to the first interconnect; and
a sense amplifier circuit coupled to the first interconnect and the second interconnect.