Patent ID: 11960338
Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 14:
15. An integrated circuit (IC) comprising an activity smoothener circuit comprising:
a plurality of cluster smoothening circuits each corresponding to a cluster and each configured to:
receive a plurality of first indications of desired activity for each of a plurality of circuit blocks (tiles) that each comprise an execution circuit, wherein a first indication is generated in each of the tiles indicting a request for one of inactivity and activity in the execution circuit;
generate a second indication of desired activity for the cluster comprising a multi-bit signal indicating a requested level of activity in the cluster based on the plurality of first indications of desired activity;
receive a second indication of actual activity for the cluster as a multi-bit signal representing an allowed level of activity; and
generate a first indication of actual activity for each of the plurality of tiles based on the plurality of first indications of desired activity in the plurality of tiles, the second indication of actual activity in the cluster, and a first limit of a rate of change of current in each of the plurality of tiles; and

a node smoothening circuit configured to:
receive from each of the plurality of cluster smoothening circuits, the second indication of desired activity;
generate a third indication of desired activity for the IC based on the second indications of desired activity from the plurality of cluster smoothening circuits, the third indication of desired activity comprising a multi-bit signal;
receive a third indication of actual activity for the IC comprising a multi-bit signal indicating a level of activity in the IC; and
for each of the plurality of cluster smoothening circuits, generate the second indication of actual activity based on the second indications of desired activity, the third indication of actual activity in the IC, and a second limit of a rate of change of current into the IC.