Patent ID: 11901187
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A semiconductor device comprising:
a wafer including a non-edge portion and an edge portion around the non-edge portion;
a capacitor structure on the non-edge portion of the wafer; and
a supporting structure on the edge portion of the wafer,
wherein the supporting structure includes an etch stop layer, a lower mold layer, an intermediate supporter layer, an upper mold layer, an upper supporter layer, and a hard mask structure that are each sequentially stacked on the edge portion of the wafer,
the supporting structure shares the etch stop layer, the intermediate supporter layer, and the upper supporter layer with the capacitor structure,
the hard mask structure comprises a first hard mask layer and a second hard mask layer sequentially stacked on the upper supporter layer,
one of the first hard mask layer and the second hard mask layer comprises a spin on hard mask (SOH) layer containing carbon (C), hydrogen (H), oxygen (O), and nitrogen (N), and
the other one of the first hard mask layer and the second hard mask layer comprises an SOH layer containing C, H, and O.