Patent ID: 11903189
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 16:
17. A three-dimensional memory, comprising:
a plurality of memory cells arranged in a plurality of levels stacked in a first direction, and divided into a plurality of groups, wherein each of the groups of the memory cells is formed in respective level of the levels;
a plurality of bit lines, wherein each of the bit lines comprises a plurality of sub-bit lines, and each of the sub-bit lines is formed in respective level of the levels;
a plurality of source lines, wherein each of the source lines comprises a plurality of sub-source lines, and each of the sub-source lines is formed in respective level of the levels; and
a plurality of word lines extending along a second direction and formed in the same layer different from the levels, wherein top surfaces of the word lines are lower than the memory cells, the sub-bit lines, and the sub-source lines, wherein the second direction is perpendicular to the first direction,
wherein in each of the levels, the memory cells of the corresponding group are arranged in a plurality of columns, and the sub-bit lines and the sub-source lines are alternately arranged and separated from each other by the memory cells of the columns.