Patent ID: 11863188
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A flip-flop circuit comprising:
an input circuit configured to invert an input signal received from an external device and transmit a first inverted signal of the input signal to a first node;
a master latch circuit configured to transmit a second inverted signal of the first inverted signal at the first node to a second node and transmit a third inverted signal of the second inverted signal at the second node to a third node, based on a first control signal having a first logic level or a second control signal having a second logic level;
a slave latch circuit configured to transmit a fourth inverted signal of the third inverted signal at the third node to a fourth node and transmit a fifth inverted signal of the fourth inverted signal at the fourth node to a fifth node, based on the first control signal having the second logic level or the second control signal having the first logic level;
an output inverter configured to generate an output signal by inverting the fifth inverted signal of the fifth node; and
a control signal generation circuit configured to generate the first control signal and the second control signal based on a clock signal, the first inverted signal of the first node, the second inverted signal of the second node, and the fourth inverted signal of the fourth node.