Patent ID: 11936319
Assignee: ALPS ALPINE CO., LTD.
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H | IPC H

Claim 4:
5. A current control circuit for controlling a drive current supplied to an inductive load, the current control circuit being configured to perform
a first mode of controlling a duty of the drive current so as to be 100% until a current value of the drive current reaches a first target current value after a supply of the drive current is started, and
a second mode of controlling the duty of the drive current so as to be a predetermined duty below 100% until the current value of the drive current reaches a second target current value that is greater than the first target current value after the current value of the drive current reaches the first target current value, wherein the current control circuit comprising:
an on-signal output unit that outputs an on-signal at a predetermined interval,
a switch that is configured to switch on and off the supply of the drive current to the inductive load, and
a holding circuit that holds the switch in an on-state once the switch is switched on;
wherein the current control circuit being configured to further perform:
a third mode of conducting a constant current control of the drive current so that the current value of the drive current maintains the second target current value after the current value of the drive current reaches the second target current value,
wherein the current control circuit further comprising:
a second comparison unit of comparing the current value of the drive current with the second target current value, and outputting a second comparison output signal of releasing the on-state of the holding circuit from holding when the current value of the drive current exceeds the second target current value,
wherein the holding circuit performs the constant current control to cause the current value of the drive current to maintain the second target current value, in the third mode, by releasing the on-state of the switch from holding at a timing when the second comparison output signal is output from the second comparison unit and holding the on-state of the switch at a timing when the on-signal is output from the on-signal output unit.