Patent ID: 11910600
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A three-dimensional nonvolatile memory device, comprising:
a first substrate including a cell area and an extension area arranged at a side of the cell area in a first direction, wherein the extension area has a staircase structure;
a vertical structure extending in a vertical direction from an upper surface of the first substrate;
a stacking structure having electrode layers and interlayer insulating layers alternately stacked on the first substrate along a side wall of the vertical structure;
a separation insulating layer extending on the first substrate in the first direction and separating the electrode layers in a second direction that intersects the first direction; and
a through-via wiring area adjacent to the cell area or the extension area and having through-vias passing through the first substrate,
wherein the cell area comprises a main cell area in which normal cells are arranged and an edge cell area at a peripheral part of the cell area,
the separation insulating layer comprises a main separation insulating layer in the main cell area and an edge separation insulating layer in the edge cell area, and
a lower surface of the main separation insulating layer is higher than the upper surface of the first substrate and has a different depth from that of a lower surface of the edge separation insulating layer.