Patent ID: 11955170
Assignee: UNTETHER AI CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 3:
4. The static random-access memory of claim 3, wherein the word line signal is provided in two steps including: a first step where the amplitude is at a first power supply voltage Vdd1 when reading and writing to said memory cell; and a second step, following the first step, where the amplitude is at the power supply voltage Vdd when reading said memory cell or is at a boosted voltage Vdd_boost when writing to said memory cell,
and wherein the second step is provided when the difference between the first bitline and second bitline voltages is sufficient to compensate for SNM(Static Noise Margin) of the second step,
and wherein the slower rise time of the word line signal is applied to the first step word line where Vdd is applied during both read and write and the start of the second step whose amplitude is boosted during write, is determined by an output of the monitoring circuit, and
wherein the rise time of the second step is slower than the rise time of the first step.