Patent ID: 11869603
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 20:
21. The integrated circuit device of claim 20, wherein the pFET is a first pFET and the nFET is a first nFET, and wherein the integrated circuit device further comprises:
a first capacitor comprising a first electrode connected to the input of the voltage regulator, and a second electrode connected to the control gate of the first nFET;
a second pFET comprising a control gate, a first source/drain connected to the input of the voltage regulator, and a second source/drain connected to the control gate of the first nFET;
a second nFET comprising a control gate, a first source/drain connected to the control gate of the first nFET, and a second source/drain connected to a voltage node;
a third pFET comprising a control gate connected to the second source/drain of the second pFET, a first source/drain connected to the input of the voltage regulator, and a second source/drain connected to the control gate of the second pFET;
a third nFET comprising a control gate, a first source/drain connected to the second source/drain of the third pFET, and a second source/drain connected to the voltage node;
a first inverter comprising an input connected to the second input of the voltage tracker, and an output connected to the control gate of the third nFET;
a second inverter comprising an input connected to the output of the first inverter, and an output connected to the control gate of the second nFET; and
a second capacitor comprising a first electrode connected to the input of the voltage regulator, and a second electrode connected to the output of the first inverter.