Patent ID: 11971773
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 8:
9. A circuit device comprising:
a memory subsystem that includes a first memory circuit and a second memory circuit;
a register configured to provide a first set of power state control signals associated with the first memory circuit and a second set of power state control signals associated with the second memory circuit;
a power controller configured to provide a third set of power state control signals associated with the first memory circuit and the second memory circuit; and
a decode logic circuit coupled to the memory subsystem, the register, and the power controller, wherein the decode logic circuit is configured to:
provide a fourth set of power control signals to the first memory circuit that are based on the first set of power control signals and the third set of power control signals; and
provide a fifth set of power control signals to the second memory circuit that are based on the second set of power control signals and the third set of power control signals.