Patent ID: 11908821
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A system comprising:
an integrated circuit (IC) package comprising:
an embedded multichip interconnect bridge (EMIB);
a plurality of levels of package metallization structures adjacent to the EMIB, and embedded within a first package dielectric material;
a second package dielectric material over the first package dielectric material and the levels of package metallization structures, and over the EMIB;
a plurality of first bond pad structures, wherein each of the first bond pad structures extends over a portion of the second package dielectric material, and comprises an integral via that is adjacent to a sidewall of the second package dielectric material, and wherein a first of the first bond pad structures is in contact with a top level of the package metallization structures, and wherein a second of the first bond pad structures is in contact with a metallization structure of the EMIB;
an IC die comprising a plurality of second bond pad structures; and
a plurality of interconnect structures that couple the first bond pad structures to the second bond pad structures.