Patent ID: 11923414
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A method comprising:
forming a first channel region and a second channel region; and
forming a gate structure around the first channel region and the second channel region, wherein forming the gate structure comprises:
depositing a gate dielectric on the first channel region and the second channel region;
depositing a first p-type work function metal on the gate dielectric, wherein a first portion of the first p-type work function metal surrounds the first channel region, wherein a second portion of the first p-type work function metal surrounds the second channel region;
exposing the first p-type work function metal to oxygen for a period of time sufficient to increase an oxygen concentration at an interface between the first p-type work function metal and the gate dielectric;
depositing a second p-type work function metal on the first p-type work function metal;
exposing the second p-type work function metal to oxygen for a period of time sufficient to increase an oxygen concentration at an interface between the second p-type work function metal and the first p-type work function metal; and
depositing a fill layer on the second p-type work function metal.