Patent ID: 11916043
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A method, comprising:
forming a first wafer comprising a plurality of electronic integrated circuits (EICs) and a plurality of contact features;
forming a second wafer comprising a plurality of photonic integrated circuits (PICs);
bonding the first wafer to the second wafer to form a first stacked wafer; and
after the bonding of the first wafer to the second wafer, thinning the first wafer in the first stacked wafer to expose the plurality of contact features,
wherein the bonding of the first wafer to the second wafer comprises vertically aligning each of the plurality of the EICs with one of the plurality of the PICs,
wherein each of the plurality of PICs comprises photodiodes, waveguides, and modulators.