Patent ID: 11910433
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An apparatus of a user equipment (UE) comprising:
memory circuitry to store configuration information that is to schedule multiple consecutive physical uplink shared channel (PUSCH) transmissions based on multiple uplink (UL) grants, wherein the multiple consecutive PUSCH transmissions include a first PUSCH transmission and a second PUSCH transmission scheduled subsequent to the first PUSCH transmission and with a same channel access priority class (CAPC) or a lower CAPC as the first PUSCH transmission; and
processor circuitry coupled with the memory circuitry, wherein the processor circuitry is to:
perform a CAT-4 listen-before-talk (LBT) operation before a start of the first PUSCH transmission;
determine the LBT operation is not successful;
continue the CAT-4 LBT subsequent to failure of the CAT-4 LBT failing before the first PUSCH transmission; and
in response to determining the LBT operation is not successful, skip transmission of the PUSCH transmission.