Patent ID: 11935943
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device comprising:
a substrate having a first region and a second region;
first and second active fins respectively disposed in the first and second regions of the substrate, and extending in a first direction;
a first gate structure disposed in the first region of the substrate, and extending in a second direction to intersect the first active fin;
a second gate structure disposed in a second region of the substrate, and extending in the second direction to intersect the second active fin;
a first spacer disposed on sidewalls of the first gate structure, and including a first undercut formed in an edge of a lower portion of the first spacer;
a second spacer disposed on both sidewalls of the second gate structure, and including a second undercut formed in an edge of a lower portion of the second spacer;
a first source and a first drain disposed in regions of the first active fin on opposite sides of the first gate structure;
a second source and a second drain disposed in regions of the second active fin on opposite sides of the second gate structure; and
a second etch stop layer directly disposed on the second spacer that is directly disposed on the second gate structure.