Patent ID: 11935957
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A method for semiconductor processing, the method comprising:
forming a first fin and a second fin protruding above a first isolation region, wherein the first fin protrudes above the first isolation region a first distance, wherein the second fin protrudes above the first isolation region a second distance, wherein the first distance is greater than the second distance, wherein a height of the first fin is different than a height of the second fin, wherein forming the first fin and the second fin comprises:
etching trenches in a substrate to define the first fin and the second fin;
depositing one or more dielectric layers in the trenches, wherein an upper surface of the first fin and an upper surface of the second fin are exposed;
forming a mask over the first fin;
recessing the second fin below an upper surface of the one or more dielectric layers; and
recessing the one or more dielectric layers to form the first isolation region;

forming a first gate structure over the first fin; and
forming a second gate structure over the second fin, wherein an upper surface of the first gate structure is level with an upper surface of the second gate structure.