Patent ID: 11968831
Assignee: MACRONIX INTERNATIONAL CO., LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 0:
1. A manufacturing method of a memory device, comprising:
forming a pillar structure on a substrate, wherein the pillar structure comprises a pair of channel layers extending in parallel along a first direction;
forming a first trench and a second trench through the pillar structure, such that a pair of channel structures is formed, a first side of each of the channel structures is exposed from the first trench, and a second side of each of the channel structures is exposed from the second trench; and
epitaxially growing a source structure on the first side of each of the channel structures and a drain structure on the second side of each of the channel structures, such that the drain structure is substantially aligned with the source structure in the first direction.