Patent ID: 11875043
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A method, comprising:
writing each of a plurality of non-volatile memory cells connected along a selected word line to a corresponding one of a plurality of target data states, each of the non-volatile memory cells belonging to a corresponding NAND string to which the selected word line is connected, by performing a plurality of programming loops each comprising:
applying a programming pulse to the selected word line;
selecting one or more of a plurality of verify voltage levels;
based on a number of the one or more of the verify voltage levels selected, selecting a corresponding one of a plurality of delay times; and
subsequent to applying the programming pulse to the selected word line and selecting the corresponding one of the plurality of delay times, sequentially biasing the selected word line to the selected one or more verify voltage levels after waiting the corresponding selected delay time.