Patent ID: 11869573
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 17:
18. A semiconductor memory comprising:
a memory chip comprising at least a storage array; and
a voltage regulation unit comprising at least an operational amplifier, wherein the voltage regulation unit is configured to convert an external input first voltage into a second voltage to be provided to a word line driver circuit associated with the memory chip, wherein the external input first voltage is greater than the second voltage, wherein the voltage regulation unit comprises a first resistor, a second resistor, and a p-channel metal oxide semiconductor (PMOS) transistor, wherein:
one end of the first resistor is coupled to one end of the second resistor and the other end of the first resistor 1s coupled to a drain of the PMOS transistor;
the other end of the second resistor is coupled to a ground;
a positive input end of the operational amplifier is coupled to an electrical connection point formed between the first resistor and the second resistor;
a negative input end of the operational amplifier is coupled to a reference voltage;
an output end of the operational amplifier is coupled to a gate of the PMOS transistor;
a supply end of the operational amplifier is coupled to the external input first voltage;
a source of the PMOS transistor is coupled to the external input first voltage; and
an electrical connection point formed between the drain of the PMOS transistor and the first resistor outputs the second voltage.