Patent ID: 11870437
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 9:
10. The output driving circuit according to claim 8, wherein the pull-up output unit comprises one first transistor or a plurality of first transistors arranged in parallel, the first transistor comprising a first terminal, a second terminal and a control terminal; the pull-up compensation unit comprises one second transistor or a plurality of second transistors arranged in parallel, the second transistor comprising a first terminal, a second terminal and a control terminal; the first terminals of the first transistor and the second transistor are connected to a power supply voltage, the second terminals of the first transistor and the second transistor are connected to the signal output terminal, the control terminal of the first transistor is connected to the signal input terminal, and the control terminal of the second transistor is connected to a pull-up pulse signal generation circuit.