Patent ID: 11862569
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a dielectric material having a backside formed on a front side of a semiconductor substrate material and a front side opposite the backside;
a conducting material on at least a portion of the front side of the dielectric material, the conducting material having a line portion and an interconnect structure electrically coupled to the line portion, and the interconnect structure having a backside defining an active contact surface and a front side opposite the backside;
a semiconductor memory array proximate the front side of the dielectric material and electrically connected to the line portion of the conducting material;
an insulating material encasing at least a portion of the semiconductor memory array; and
an opening through which the active contact surface at the backside of the interconnect structure is exposed for electrical connection,
wherein the conducting material has a first horizontal portion and a second horizontal portion arranged nearer the front side of the substrate material than the first horizontal portion,
wherein the first and second horizontal portions of the conducting material are continuous and coupled with a sloped portion of the conducting material; and
wherein the interconnect structure portion is positioned on the second horizontal portion of the conducting material.