Patent ID: 11861219
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An apparatus comprising:
a memory and
a controller to receive a write request, wherein:
based on the write request being associated with content that does not encompass an entire retrievable region:
retrieve content of the entire retrievable region from storage,
store the retrieved content of the entire retrievable region to a buffer in the memory,
in the buffer, overwrite the content of the entire retrievable region with the associated content,
update a table to identify that the entire retrievable region is stored in the buffer;

based on the write request being associated with content that encompasses the entire retrievable region and the retrievable region is not stored in the buffer, provide content associated with the write request to a storage media for storage and not to the buffer; and
based on the write request being associated with second content that encompasses a second entire retrievable region and less than a third entire retrievable region:
provide a portion of the second content that encompasses the second entire retrievable region to the storage media for storage and not to the buffer,
retrieve content of the third entire retrievable region from the storage,
store the retrieved content of the third entire retrievable region to the buffer in the memory, and
in the buffer, overwrite the content of the third entire retrievable region with the portion of the associated second content that encompasses less than a third entire retrievable region.