Patent ID: 11955382
Assignee: APPLIED MATERIALS, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A method comprising:
exposing a first dielectric material to a blocking compound, the first dielectric material comprising a plurality of features formed therein and a first metal material within the plurality of features, wherein exposing the first dielectric material to the blocking compound forms a passivated surface of the first metal material;
selectively depositing an etch stop layer on the first dielectric material over the passivated surface of the first metal material;
removing the blocking compound from the passivated surface of first metal material;
depositing a second metal material on the first metal material and the etch stop layer after removing the blocking compound from the passivated surface of first metal material;
etching the second metal material by photolithography to expose a portion of the etch stop layer and form a conductive path between the first metal material within the plurality of features; and
removing the portion of the etch stop layer exposed by etching the second metal material to expose a top surface of the first dielectric material,
wherein a top surface of the second metal material is higher than the exposed top surface of the first dielectric material.