Patent ID: 11971821
Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The computing system as claimed in claim 1, wherein:
the first processor further includes a first snoop filter;
corresponding to each matched cache line in the first last-level cache, the first last-level cache provides one snoop request to be passed to the first in-core cache module through the first snoop filter;
each snoop request carries a tag to represent the corresponding matched cache line, and the tag further tags associated cached contents in the other levels of the hierarchical cache structure;
in response to each snoop request, the first in-core cache module searches itself to determine which cache lines within the first in-core cache module match the tag carried on the snoop request, wherein: if a matched cache line has been modified, the first in-core cache module writes back the matched cache line to the system memory; and, whether modified or not, all matched cache lines within the first in-core cache module are invalidated.