Patent ID: 11887963
Assignee: KIOXIA CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A semiconductor device, comprising:
a support including a first electrode layer, a second electrode layer, and a dielectric layer between the first and second electrode layers in a first direction, the support including a plurality of openings therein exposing the second electrode layer on a first side;
a stacked body on the first side of the support and including a plurality of semiconductor chips stacked on each other in an offset manner such that electrode terminals on one edge portion of each semiconductor chip are left exposed, the stacked body having a lower surface facing the support and an upper surface facing away from the support;
a plurality of first wires bonded at one end to electrode terminals of the semiconductor chips and extending upward from the semiconductor chip such that the other end of each first wire is at a height at least equal to the height of the upper surface of the stacked body;
a plurality of second wires bonded at one end to one of the first or second electrode layers of the support and extending upward from the support such that the other end of each second wire is at a height at least equal to the height of the upper surface of the stacked body;
a plurality of third wires bonded on one end to an electrode terminal of one semiconductor chip in the stacked body and bonded on another end to an electrode terminal of another semiconductor chip in the stack; and
a sealing resin on the support covering the stacked body, the first wires, the second wires, and the third wires, upper ends of the first wires and the second wires being exposed at an uppermost surface of the sealing resin.