Patent ID: 11935791
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC B  H

Claim 0:
1. A semiconductor device, comprising:
an isolation structure formed in a substrate and surrounding an active region;
a first gate structure and a second gate structure disposed over the active region and a dummy gate structure disposed over the isolation structure, the first, second and dummy gate structures extending in a first direction and being arranged in a second direction crossing the first direction; and
a first source/drain epitaxial layer disposed between the dummy gate structure and the first gate structure and a second source/drain epitaxial layer disposed between the first gate structure and the second gate structure,
wherein a depth of the first source/drain epitaxial layer is smaller than a depth of the second source/drain epitaxial layer.