Patent ID: 11936385
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 13:
14. A system on a chip (SoC) comprising:
an oscillator configured to produce an oscillator signal at a first frequency;
a first clock divider configured to:
produce, based on the oscillator signal:
a first clock signal at the first frequency; and
a second clock signal at a second frequency being a division of the first frequency by an integer greater than 1;

selectively provide the first clock signal as a first output clock signal when a scaling configuration signal has a first value;
selectively provide the second clock signal as the first output clock signal when the scaling configuration signal has a second value; and
produce a frequency indication signal indicating, in combination with the first output clock signal, a start of a new clock period of the second clock signal;

a second clock divider configured to:
produce a second output clock signal at a third frequency, the second output clock signal being based on the first output clock signal and the frequency indication signal, the third frequency being a division of the second frequency by an integer greater than or equal to 1; and

a third clock divider configured to:
produce, based on the second output clock signal, a third output clock signal at a fourth frequency being a division of the third frequency by an integer greater than 1.