Patent ID: 11902912
Assignee: CISCO TECHNOLOGY, INC.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A system comprising:
a memory storage; and
a processing unit coupled to the memory storage, wherein the processing unit is operative to:
establish synchronous downlink multi-link operations with a first link that operates in a sub-band and a second link that operates in the sub-band;
determine a first power level for both the first link and second link;
determine a second power level for the first link and a third power level for the second link, wherein the second power level is greater than the third power level;
provide the second power level for the first link and the third power level for the second link;
determine a first free space path loss for the first link;
determine a second free space path loss for the second link; and
determine the second power level and the third power level to make the first free space path loss equal the second free space path loss;
determine that a first client, in communication over the first link, is more distant from the AP than a second client, in communication over the second link; and
based on the determination that the first client is more distant, determine that the second power level is greater the third power level.