Patent ID: 11972109
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 2:
3. The memory system of claim 1, wherein:
the processing circuitry configured to cause the memory system to determine whether to add the data to the first buffer, the second buffer, or the combination thereof is configured to cause the memory system to:
identify one or more portions of the data based at least in part on the data transfer size being greater than or equal to the threshold size, each portion of the one or more portions having the threshold size; and
determine to add the one or more portions of the data to the first buffer based at least in part on each portion of the one or more portions having the threshold size; and

the processing circuitry configured to cause the memory system to add the data to the first buffer, the second buffer, or the combination thereof is configured to cause the memory system to:
add the one or more portions of the data to the first buffer based at least in part on the determining to add the one or more portions of the data to the first buffer.