Patent ID: 11881480
Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 4:
5. The semiconductor structure according to claim 1, further comprising:
a first isolation layer on the first region, wherein the first isolation layer is on a portion of a sidewall of the first nanostructure and a portion of a sidewall of the second nanostructure, and a top surface of the first isolation layer is lower than a top surface of the first nanostructure and a top surface of the second nanostructure; and
a second isolation layer on the second region, wherein the second isolation layer is on a portion of a sidewall of the third nanostructure and a portion of a sidewall of the fourth nanostructure, and a top surface of the second isolation layer is lower than a top surface of the third nanostructure and a top surface of the fourth nanostructure.