Patent ID: 11947813
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory device, comprising:
a memory die that comprises an input/output (I/O) pad operable to couple with a host device;
an input buffer included in the memory die, the input buffer coupled with the I/O pad;
a capacitive component having an adjustable capacitance and included in the memory die, the capacitive component coupled with the I/O pad;
one or more mode registers; and
circuitry operable to cause the memory device to:
receive an indication from the host device to store configuration information associated with the adjustable capacitance of the capacitive component to the one or more mode registers;
store the configuration information to the one or more mode registers;
configure the adjustable capacitance of the capacitive component based at least in part on the configuration information stored in the one or more mode registers; and
receive signaling from the host device via the I/O pad based at least in part on configuring the capacitive component.