Patent ID: 11901890
Assignee: MARVELL ASIA PTE LTD
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 31:
32. A system comprising:
at least two transistors in a circuit; and
a signal generation circuit configured to generate a plurality of gate signals based on a plurality of control signals that specify a target resistance and a target voltage in the circuit, the plurality of control signals including a first control signal and second control signal,
wherein the signal generation circuit is further configured to generate the plurality of gate signals based on the first control signal and the second control signal;
wherein at least one transistor of the at least two transistors is configured to receive, respectively, one of the plurality of gate signals, the circuit providing, as an output, a signal with the target voltage and target resistance;
wherein at least two transistors of the at least two transistors are in parallel branches.