Patent ID: 11894840
Assignee: PSEMI CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. An output buffer for a swappable single conductor interface having a first pin and a second pin, wherein either of the first pin or second pins is couplable to an input/output line or to an external capacitor line, the output buffer including:
(a) a first transistor having a conduction channel coupled between the first pin and a reference potential, and configured to be selectively operable in response to a pin-connection flag signal having a first state and non-operable in response to the pin-connection flag signal having a second state;
(b) a second transistor having a conduction channel coupled between the second pin and the reference potential, and configured to be selectively operable in response to the pin-connection flag signal having the second state and non-operable in response to the pin-connection flag signal having the first state; and
(c) a third transistor having a conduction channel coupled between the first and second pins, and configured to be selectively operable;
wherein the operable third transistor and the operable one of the first and second transistors have complementary ON or OFF conductive states in response to applied command and data signals;
wherein the coupled input/output line is connected to the coupled external capacitor line through the operable third transistor when the operable third transistor is set to the ON conductive state; and
wherein the first state of the pin-connection flag signal indicates that the second pin is coupled to a storage capacitor, and the second state of the pin-connection flag signal indicates that the first pin is coupled to the storage capacitor.