Patent ID: 11914757
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A computer system for facilitating cryptographic-related processing within a computing environment, the computer system comprising:
a memory; and
a processing circuit in communication with the memory, wherein the computer system is configured to perform a method, the method comprising:
obtaining, by an n-bit accelerator, multiple input operands packed together as a packed integer, the packed integer being an n-bit integer comprising multiple slots, where input operands of the multiple input operands are packed into every other slot of the multiple slots, with a gap slot being between adjacent input operands of the multiple input operands to avoid corruption between the adjacent input operands, and each slot of the multiple slots has a bitwidth k; and
performing, by the n-bit accelerator, one or more predefined operations using the packed integer, to transform the packed integer into result data which facilitates cryptographic-related processing, wherein the performing comprises:
performing, by the n-bit accelerator, an arithmetic operation of the one or more predefined operations, the performing using the input operands packed in the packed integer to obtain an intermediate result integer comprising multiple low-part and high-part result components in different slots of the intermediate result integer; and
repacking the multiple low-part and high-part result components of the intermediate result integer into a low-part packed integer and a separate high-part packed integer to facilitate obtaining the result data.