Patent ID: 11960772
Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. An apparatus comprising:
an output bus;
a match table configured to store a plurality of entries, each entry of the plurality of entries including a state value and a key value, wherein the match table specifies a matching entry in response to being queried by query data received from the output bus;
one or more storage devices configured to store operation information for each of the plurality of entries stored in the match table, wherein the operation information specifies one or more instructions associated with each respective entry in the plurality of entries stored in the match table; and
logic connected to the output bus, the match table, and the one or more storage devices, wherein the logic is configured to:
receive one or more operands from the output bus;
identify one or more instructions in the one or more storage devices, the one or more instructions comprising one or more of an instruction in a matching entry of an action instruction memory or an instruction in a matching entry of an array of function arguments, wherein the identified one or more instructions are associated with an entry in the plurality of entries matching a first query;
generate, based on the one or more instructions and the one or more operands, processed data; and
output a second query based on the entry in the plurality of entries matching the first query.