Patent ID: 11887645
Assignee: HEFEI RELIANCE MEMORY LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An apparatus comprising:
a dual-precision analog memory cell comprising:
a non-volatile memory element having an input terminal, a first output terminal, and a second output terminal,
a volatile memory element comprising:
a first transistor having a drain electrically coupled to the input terminal of the non-volatile memory element, and
a second transistor having a source electrically coupled to the input terminal of the non-volatile memory element; and
a controller configured to read a weight stored in the dual precision analog memory cell by:
biasing a source of the first transistor to a read voltage,
biasing a drain of the second transistor to a low supply voltage,
biasing a gate of the first transistor at a low voltage,
biasing a gate of the second transistor at the low voltage, and
biasing the first output terminal of the non-volatile memory element at the read voltage and the second output terminal of the non-volatile memory element at the low voltage, wherein the read voltage is higher than the low voltage.