Patent ID: 11869893
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A semiconductor device comprising:
a nanosheet stack over a substrate, the nanosheet stack comprising a top portion and a bottom portion separated by a dielectric spacer;
a plurality of vertically stacked first source or drain (S/D) regions, each of the first S/D regions on a sidewall of a different nanosheet in the bottom portion of the nanosheet stack, each of the first S/D regions confined to the respective sidewall of one nanosheet such that none of the plurality of first S/D regions merge and each sidewall of the different nanosheets in the bottom portion is covered by a separate first S/D region;
a plurality of vertically stacked second S/D regions, each of the second S/D regions on a sidewall of a different nanosheet in the top portion of the nanosheet stack, each of the second S/D regions confined to the respective sidewall of one nanosheet such that none of the plurality of second S/D regions merge and each sidewall of the different nanosheets in the top portion is covered by a separate second S/D region;
a first wrap-around contact formed over the first plurality of S/D regions; and
a second wrap-around contact formed over the second plurality of S/D regions.