Patent ID: 11916123
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 14:
15. A semiconductor device, comprising:
an active pattern which includes a lower pattern, and a plurality of sheet patterns spaced apart from the lower pattern in a first direction;
a gate structure which is placed on the lower pattern, and includes a gate insulating film surrounding the plurality of sheet patterns, and a gate electrode on the gate insulating film; and
a source/drain pattern placed on both sides of the gate structure,
wherein the source/drain pattern includes a silicon-germanium liner being in contact with each of the sheet patterns and the gate insulating film, a filling semiconductor pattern on the silicon-germanium liner, and an insertion liner pattern between the silicon-germanium liner and the filling semiconductor pattern,
the silicon-germanium liner includes doped carbon,
the insertion liner pattern includes silicone doped with carbon, and
the filling semiconductor pattern includes silicon doped with an n-type first impurity.