Patent ID: 11917052
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Digital communication (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 4:
5. The hash algorithm circuit according to claim 4, wherein the second hash circuit unit comprises:
a third exclusive OR circuit, electrically coupled to the first right shift circuit and the first exclusive OR circuit respectively, and configured to perform an exclusive OR operation on the first intermediate sequence and the second intermediate sequence, so as to form a first temporary sequence;
a second summation circuit, electrically coupled to the second exclusive OR circuit and the first left shift circuit, and configured to perform a summation operation on the third intermediate sequence and the fourth intermediate sequence, so as to form a second temporary sequence;
a second right shift circuit, electrically coupled to the second summation circuit, and configured to shift the second temporal sequence to the right by a first predetermined number of bits, so as to form a third temporary sequence;
a second left shift circuit, electrically coupled to the first summation circuit, and configured to shift the fifth intermediate sequence to the left by a second predetermined number of bits, so as to form a fourth temporary sequence;
a fourth exclusive OR circuit, electrically coupled to the third exclusive OR circuit and the second left shift circuit respectively, and configured to perform an exclusive OR operation on the first temporary sequence and the fourth temporary sequence, so as to form a fifth temporary sequence; and
a fifth exclusive OR circuit, electrically coupled to the fourth exclusive OR circuit and the second right shift circuit respectively, and configured to perform an exclusive OR operation on the third temporary sequence and the fifth temporary sequence, so as to form the target data.