Patent ID: 11923427
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a semiconductor substrate having a drain region, a source region and a channel region between the drain region and the source region;
a control gate over the channel region of the semiconductor substrate;
a select gate over the channel region of the semiconductor substrate and separated from the control gate;
a charge trapping structure between the control gate and the semiconductor substrate;
a dielectric structure between the select gate and the semiconductor substrate, wherein the dielectric structure has a first part and a second part, the first part is between the charge trapping structure and the second part, and the second part is thicker than the first part, wherein the second part of the dielectric structure comprises a first dielectric layer and a second dielectric layer over the first dielectric layer; and
a spacer, wherein the select gate and the dielectric structure are between the spacer and the control gate, and the second part of the dielectric structure and the select gate are in contact with a same surface of the spacer.