Patent ID: 11901023
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A method of operating a memory device comprising a memory cell string that includes memory cells (MCs) that are connected in series, and word line layers coupled respectively with the MCs, the word line layers including a selected word line layer coupled to one of the MCs that is selected for a verify or read operation, and an unselected word line layer coupled to one of the MCs that is not selected for the verify or read operation, the method comprising:
applying, in a pre-pulse stage, a first verify/read bias voltage on the selected word line layer;
applying, in the pre-pulse stage, a first bias voltage on the unselected word line layer;
applying, in a verify/read stage, a second verify/read voltage on the selected word line layer; and
applying, in the verify/read stage, a second bias voltage on the unselected word line layer, wherein the second bias voltage is smaller than the first bias voltage.