Patent ID: 11875846
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. An apparatus, comprising:
a processing device; and
a memory device enclosed within an integrated circuit package and connected to the processing device, the memory device having:
memory cells;
a read circuit configured to apply a respective read voltage on the memory cells and determine states of the memory cells when the memory cells are subjected to the respective read voltage;
a logic circuit configured to, in response to a read command from the processing device:
generate, using the read circuit, data representative of signal and noise characteristics of the memory cells;
determine, based on the signal and noise characteristics, a first read voltage;
generate, using the read circuit, first data of reading the memory cells using the first read voltage; and
determine, based on the signal and noise characteristics, a voltage window between a second read voltage and a third read voltage.