Patent ID: 11881274
Assignee: EMEMORY TECHNOLOGY INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The program control circuit as claimed in claim 1, wherein the current sampling circuit comprises:
a third transistor, wherein a drain terminal of the third transistor is connected to the first node, and a source terminal of the third transistor is connected to the ground terminal;
a first capacitor, wherein a first terminal of the first capacitor is connected to a gate terminal of the third transistor, and a second terminal of the first capacitor is connected to the ground terminal; and
a third switch, wherein a first terminal of third switch is connected to the first node, and a second terminal of third switch is connected to the gate terminal of third transistor, wherein the third switch is in a closed state in the calibration phase, and the third switch is in an opened state in the at least one program phase.