Patent ID: 11875737
Assignee: MACROBLOCK, INC.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A scan-type display apparatus comprising:
a light emitting diode (LED) array having a common cathode configuration, and including
a plurality of scan lines,
a plurality of data lines, and
a plurality of LEDs arranged in a matrix that has a plurality of rows respectively corresponding to said scan lines and a plurality of columns respectively corresponding to said data lines,
with respect to each of said rows, cathodes of said LEDs in said row being connected to said scan line that corresponds to said row,
with respect to each of said columns, anodes of said LEDs in said column being connected to said data line that corresponds to said column; and

a data driver including a plurality of data driving circuits that respectively correspond to said data lines, each of said data driving circuits including
a current driver having an output terminal that is connected to said data line corresponding to said data driving circuit, receiving a pulse width control signal, and outputting one of a drive current and a first clamp voltage at said output terminal of said current driver based on the pulse width control signal, and
a detector connected to said current driver to receive a feed-in voltage related to a voltage at said output terminal of said current driver, further receiving a detection timing signal, and generating a detection signal that indicates whether any one of said LEDs connected to said data line corresponding to said data driving circuit is short circuited based on the feed-in voltage and the detection timing signal;

wherein, with respect to each of said data driving circuits, said detector is connected to said output terminal of said current driver, and receives the voltage at said output terminal of said current driver to serve as the feed-in voltage, and said current driver includes
a voltage regulator generating the first clamp voltage,
an inverter receiving the pulse width control signal, and generating an inverted control signal that is a logical complement of the pulse width control signal in logic value,
a constant current generator receiving an input voltage, and generating the drive current from a power supply that is a source of the input voltage,
a first switch having a first terminal that is connected to said output terminal of said current driver, a second terminal that is connected to said constant current generator, and a control terminal that receives the pulse width control signal, said first switch, when conducting based on the pulse width control signal, permitting flow of the drive current therethrough, and
a second switch having a first terminal that is connected to said voltage regulator, a second terminal that is connected to said output terminal of said current driver, and a control terminal that is connected to said inverter to receive the inverted control signal, said second switch, when conducting based on the inverted control signal, permitting transmission of the first clamp voltage therethrough.