Patent ID: 11921813
Assignee: VORTICITY INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. The system of claim 10, wherein the dispatch circuit is further configured to:
responsive to determining that the problem queue does not contain a problem having a priority level of at least the threshold level or that the solver unit does not fit the first problem package, determine estimated finish times for solver units of the plurality of solver units that are within a predetermined time period;
based upon the estimated finish times, determine one or more scenarios, each corresponding to a permutation of problem packages within the problem queue assigned to solver units of the plurality of solver units;
determine, for each scenario, a utilization metric based at least in part on a level of utilization of DEAs of the plurality of solver units under the scenario;
select a scenario of the one or more scenarios, based upon the determined utilization metric for each scenario; and
assign problem packages from the problem queue to solver units of the plurality of solver units in accordance with the selected scenario.