Patent ID: 11894450
Assignee: GLOBALFOUNDRIES U.S. INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A method comprising:
forming a base region; and
forming an emitter region and a collector region,
wherein the base region is positioned laterally between the emitter region and the collector region,
wherein the emitter region comprises: an emitter portion of a semiconductor layer on an insulator layer; and an emitter semiconductor layer within an emitter cavity in the insulator layer and immediately adjacent to the emitter portion, the emitter semiconductor layer comprising an upper portion over a top surface of the emitter portion of the semiconductor layer,
wherein the collector region comprising: a collector portion of the semiconductor layer; and a collector semiconductor layer within a collector cavity in the insulator layer and immediately adjacent to the collector portion, the collector semiconductor layer comprising an upper portion over a top surface of the collector portion of the semiconductor layer, and
wherein the emitter cavity and the collector cavity each extend laterally partially below the base region.