Patent ID: 11935833
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 8:
9. The method of forming an IC structure of claim 8, wherein:
the forming fourth and fifth sets of long pillars further results in the following:
the fourth set of long pillars being offset in the second direction by a first distance relative to a first set of long pillars; and
the fifth set of long pillars being offset in the second direction by the first distance relative to a second set; and

the forming a sixth set of short pillars further results in the following:
the sixth set of short pillars being offset in the first direction by a second distance relative to the third set of short pillars; and
each short pillar in each group of the sixth set of short pillars overlaps a corresponding member of the fourth set of long pillars and a corresponding member of the fifth set of long pillars;
each long pillar in each of the fourth and fifth sets of long pillars being overlapped by the second quantity of corresponding short pillars in the sixth set of short pillars; and

the method further comprises:
forming second vias which electrically connect the sixth set of short pillars with corresponding members of the fourth and fifth sets long pillars.