Patent ID: 11935951
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A device comprising:
a substrate;
a passivation material layer that includes a first portion and a second portion disposed within the substrate and formed of a first semiconductor material that includes a first dopant of a first type; and
a first source/drain feature disposed within the substrate, the first source/drain feature having a first bottom surface interfacing with the first portion of the passivation material layer, the first source/drain feature formed of a second semiconductor material that includes a second dopant of the first type; and
a second source/drain feature disposed within the substrate, the second source/drain feature having a second bottom surface and interfacing with the second portion of the passivation material layer, the second source/drain feature formed of a third semiconductor material that includes a third dopant of a second type, the third semiconductor material interfacing with the second portion of the passivation material layer, and the second type being opposite the first type.