Patent ID: 11902900
Assignee: QUALCOMM INCORPORATED
Field: Digital communication (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 27:
28. The UE of claim 22, wherein to receive the plurality of packets, the processor is configured to cause the UE to:
receive, via the transceiver, a first subset of packets of the plurality of packets corresponding to at least a first portion of the video frame of the initial state;
determine the first subset of packets comprises less than a threshold level of video data;
continue to monitor for an indication of transmission of a second subset of packets of the plurality of packets; and
receive, via the transceiver, the second subset of packets of the plurality of packets corresponding to at least a second portion of the video frame of the initial state, and
wherein to output the video frame in the reproduced state, the processor and the memory are configured to:
decode the plurality of packets, including the first subset of packets and the second subset of packets, to output the video frame in the reproduced state while operating in the second power state.