Patent ID: 11894845
Assignee: GLOBALFOUNDRIES U.S. INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. A structure comprising:
a combinational logic circuit for implementing a plurality of operations, wherein the combinational logic circuit defines a data path between an input port and an output port;
a launch pulse latch coupled to the input port of the combinational logic circuit;
a capture pulse latch coupled to the output port of the combinational logic circuit;
a lockup latch between the launch pulse latch and one of the combinational logic circuit and the capture pulse latch;
a clock generator for generating a clock signal;
a first pulse generator for transmitting a pulse signal corresponding to the clock signal to the launch pulse latch and for transmitting an inverse of the clock signal to the lockup latch; and
a second pulse generator for transmitting the pulse signal corresponding to the clock signal to the capture pulse latch.