Patent ID: 11935591
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory device comprising:
a first wiring line extending along a first direction;
a second wiring line extending along a second direction intersecting the first direction;
a memory cell connected between the first wiring line and the second wiring line, including a resistance change memory element having a first resistance state and a second resistance state having a resistance higher than that of the first resistance state, and a two-terminal switching element connected in series to the resistance change memory element, and storing data based on a resistance state set to the resistance change memory element;
a voltage application circuit which applies a write voltage signal having a first polarity and setting a desired resistance state to the resistance change memory element by setting the two-terminal switching element to an on-state, to the memory cell, and applies, after the write voltage signal is applied to the memory cell, a second polarity voltage signal having a second polarity opposite to the first polarity and having a magnitude that prevents the two-terminal switching element from being set to the on-state, to the memory cell; and
a selection circuit which selects whether to carry out a first voltage application operation in which the second polarity voltage signal is applied to the memory cell after the write voltage signal is applied by the voltage application circuit, or to carry out a second voltage application operation in which the second polarity voltage signal is not applied to the memory cell after the write voltage signal is applied by the voltage application circuit.