Patent ID: 11973019
Assignee: QUALCOMM INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An integrated circuit (IC) die, comprising:
a semiconductor layer on a substrate;
a plurality of circuits in the semiconductor layer;
an inter-layer medium (ILM);
a plurality of metal layers disposed between the semiconductor layer and the ILM, the plurality of metal layers comprising horizontal metal traces interconnecting circuits of the plurality of circuits;
a plurality of interconnects extending through the ILM and coupled to the horizontal metal traces; and
at least one deep trench capacitor (DTC) disposed in the ILM, each of the at least one DTC comprising a first terminal coupled to a first vertical interconnect among the plurality of interconnects and a second terminal coupled to a second vertical interconnect among the plurality of interconnects.