Patent ID: 11901285
Assignee: FRAUNHOFER GESELLSCHAFT ZUR FÖRDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 20:
21. Method according to claim 1,
wherein the film substrate comprises two terminal elements connected to at least two terminals of the semiconductor chip via at least two conductor paths formed in or on the film substrate,
wherein the chip-film module comprises two embedding layers located above one another or in a stacked manner, embedding the semiconductor chip and/or the film substrate,
wherein the chip-film module comprises at least two coupling elements arranged in or on different embedding layers of the at least two embedding layers,
wherein the at least two coupling elements are connected to the at least two terminal elements of the film substrate via vertical electric connections,
wherein the at least two coupling elements are electric terminals,
wherein conductor paths of the printed circuit board are connected to the at least two terminals of the chip-film module via at least two through vias as counter coupling elements,
wherein, starting from a first plane of the printed circuit board, a first through via of the at least two through vias extends vertically to a first terminal of the at least two terminals of the chip-film module,
wherein, starting from a second plane of the printed circuit board, a second through via of the at least two through vias extends vertically to a second of the at least two terminals of the film substrate.