Patent ID: 11960888
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory system comprising:
a memory device storing firmware comprising multiple binary codes; and
a memory controller configured to control the memory device,
wherein the memory controller stores a function group comprising functions included in one of the multiple binary codes and loads a binary code comprising a first function called at a first timepoint into a first memory area at a second timepoint preceding the first timepoint based on call path information indicating a relationship among the functions included in the function group and call probability information of the functions included in the function group,
wherein the call probability information indicates a probability that inferior functions are called when a superior function is called,
wherein call frequency of each of the functions has not been measured, and prior to a static analysis of the function group, the call probability information of the functions included in the function group is initialized so that each of the functions included in the function group has a uniform call frequency percentage, thereafter the memory controller generates the call path information of the functions included in the function group on a basis of a result of the static analysis of the function group, and
wherein
the static analysis is conducted while the functions included in the function group are not called,
the static analysis is conducted outside the memory system by analysis of the call path information, the call path information setting forth conditions for calling one function after another function in the function group, and
the result of the static analysis is stored inside the memory system.