Patent ID: 11923250
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A method, comprising:
forming a p-doped region in a substrate;
forming an n-doped region in the substrate;
epitaxially growing a first semiconductor layer on the p-doped and n-doped regions;
etching a portion of the first semiconductor layer to expose a top surface of the n-doped region;
epitaxially growing a second semiconductor layer on the n-doped region;
epitaxially growing a third semiconductor layer on the first and second semiconductor layers;
etching a first portion of the third semiconductor layer on the p-doped region, the first semiconductor layer, and the p-doped region to form a first fin structure on the substrate;
etching a second portion of the third semiconductor layer on the n-doped region, the second semiconductor layer, and the n-doped region to form a second fin structure on the substrate; and
forming a gate structure on the first and second fin structures.