Patent ID: 11868813
Assignee: HT RESEARCH INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 30:
31. The computer system of claim 24, wherein the fourth fail-over pylon comprises:
a fourth top control fail-over block coupled to the fourth top control block through the fourth workgroup fail-over link;
a fourth mid-memory fail-over block coupled to the fourth mid-memory block through the fourth workgroup fail-over link; and
a fourth base fail-over block coupled to the fourth base attribute block through the fourth workgroup fail-over link,
wherein the fourth top control fail-over block comprises a first plurality of third fail-over pylons, wherein the first plurality of the third fail-over pylons are coupled to the first plurality of the third execution pylons through the fourth workgroup fail-over link,
wherein the fourth base fail-over block comprises a second plurality of the third fail-over pylons, wherein the second plurality of the third fail-over pylons are coupled to the second plurality of the third execution pylons through the fourth workgroup fail-over link,
wherein each of the third fail-over pylons comprises:
a third top control fail-over block coupled to the third top control block through the fourth workgroup fail-over link;
a third mid-memory fail-over block coupled to the third mid-memory block through the fourth workgroup fail-over link; and
a third base fail-over block coupled to the third base attribute block through the fourth workgroup fail-over link.