Patent ID: 11972799
Assignee: WINBOND ELECTRONICS CORP.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A filament forming method of a resistive memory unit, comprising:
performing a first stage forming process to apply a first bias voltage including a gate voltage and a drain voltage to the resistive memory unit for plural times until a read current of the resistive memory unit reaches a first saturating state, latching the read current in the first saturating state as a saturating read current, and determining whether or not a rate of increase of the saturating read current is less than a first threshold value, wherein when oxygen vacancy and oxygen ions are further generated in a dielectric layer of the resistive memory unit and the resistive memory unit does not reach a stable state, the saturating read current is further increased;
when the rate of increase of the saturating read current is determined to be not less than the first threshold value, performing a second stage forming process to apply a second bias voltage to the resistive memory unit for a number of times until the read current of the resistive memory unit reaches a second saturating state, latching the read current in the second saturating state as the saturating read current and determining whether or not the rate of increase of the saturating read current is less than the first threshold value, wherein the second bias voltage is obtained by increasing the gate voltage and decreasing the drain voltage; and
when the rate of increase of the saturating read current is less than the first threshold value and the saturating read current reaches a target current value, finishing the filament forming method.