Patent ID: 11921626
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A processing-in-memory (PIM) device for a comprising device, comprising:
a memory;
a register configured to store offset information; and
an internal processor configured to:
read the offset information from the register;
receive a PIM instruction and a reference physical address of the memory from a memory controller, of the computing device, that is exterior of the PIM device, or receive the instruction from the memory controller and the reference physical address from a memory management unit (MMU), of the copmuting device, that is exterior of the PIM device;
determine an offset physical address of the memory based on the read offset information;
determine a target physical address of the memory based on the reference physical address and the offset physical address; and
perform the instruction by accessing the target physical address and performing a PIM operation, including one or more calculations involving information obtained by the accessing of the target physical address, according to the instruction.