Patent ID: 11954074
Assignee: MICRO FOCUS LLC
Field: Digital communication (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A system comprising:
a microprocessor; and
a computer readable medium, coupled with the microprocessor and comprising microprocessor readable and executable instructions that, when executed by the microprocessor, cause the microprocessor to:
create a first synchronization structure that indicates changes to files that are to be synchronized, wherein the first synchronization structure is stored as a series of synchronization blocks, wherein each synchronization block stores a specified number of records or is a predetermined size, wherein each synchronization block includes a block hash field that includes a hash of a block number of each synchronization block and provides immutability, wherein an empty block hash field identifies an uncompleted synchronization block, and wherein a respective synchronization block is incomplete if the respective synchronization block does not contain the specified number of records or is not the predetermined size;
receive a first synchronization message from a communication device, wherein the first synchronization message includes a next block number;
send a second synchronization message to the communication device, wherein the second synchronization message comprises one or more synchronization blocks that are identified based on the next block number;
receive a third synchronization message from the communication device, wherein the third synchronization message requests a number of files to be synchronized; and
send the number of files to be synchronized to the communication device.