Patent ID: 11961940
Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. Method of manufacturing an optoelectronic device according to claim 1, comprising the successive steps of:
a) providing the stack comprising the first doped semiconductor layer, the second doped semiconductor layer, and the third conductive layer;
b) forming the peripheral trench crossing the third conductive layer and stopping on the second doped semiconductor layer, said peripheral trench laterally delimiting said portion of the third conductive layer;
c) forming in said peripheral trench the conductive spacer in contact with the sides of said portion of the third conductive layer;
d) continuing said peripheral trench through the second doped semiconductor layer, said continued peripheral trench laterally delimiting said portion of the second doped semiconductor layer; and
e) forming in said peripheral trench the insulated conductive gate.