Patent ID: 11961778
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A method of forming a semiconductor device package comprising:
providing a substrate having a top planar surface and one or more components coupled to the substrate, the one or more components comprising:
a first semiconductor die connected to the top planar surface of the substrate, wherein the substrate and the first semiconductor die defines at least a portion of a tunnel; and
a second semiconductor die mounted on the top planar surface of the substrate and positioned within the tunnel, the second semiconductor die electrically connected to the substrate by one or more bond wires;

forming a mold, the mold including:
a first molding compound; and
a second molding compound, wherein the second molding compound is separate and distinct from the first molding compound,
wherein the first molding compound, when in a flowable state, has a viscosity that is less than a viscosity of the second molding compound, when in a flowable state; and

compressing the mold on the substrate causing the first molding compound to liquify and encapsulate the semiconductor die and substantially fill the tunnel,
wherein the first molding compound at least partially encapsulates the first semiconductor die and the second semiconductor die, and
wherein the second molding compound is separated from the first semiconductor die by a portion of the first molding compound.