Patent ID: 11937426
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method for forming a semiconductor structure, comprising:
forming a first layer over a substrate, wherein the first layer comprises a first material;
forming a sacrificial layer over the first layer, wherein the sacrificial layer comprises a second material different from the first material;
forming a second layer over the sacrificial layer;
forming a first recess to expose a sidewall of the sacrificial layer;
laterally removing a portion of the sacrificial layer from the sidewall;
forming a semiconductor channel layer extending along a bottom surface of the second layer; and
forming a gate material in the first recess, wherein the gate material underlies the second layer and overlies the first layer, and wherein the gate material is separated from the bottom surface of the second layer by the semiconductor channel layer.