Patent ID: 11861760
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The method of claim 4, wherein the one or more earlier processing stages are operable to cause the one or more later processing stages to omit performing one or more processing steps in respect of a primitive by sending a signal to the one or more later processing stages that indicates that the one or more processing steps in respect of the primitive need not be performed; and the one or more later processing stages are operable to omit performing one or more processing steps in respect of a primitive in response to receiving a signal from the one or more earlier processing stages that indicates that the one or more processing steps in respect of the primitive need not be performed; the method comprising:
the one or more earlier processing stages causing the one or more later processing stages to omit performing the one or more processing steps in respect of the at least one primitive by sending a signal to the one or more later processing stages that indicates that the one or more processing steps in respect of the at least one primitive need not be performed.