Patent ID: 11862562
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. The circuit structure of claim 1, further comprising:
a second transistor stack over the substrate and under the first metal layer, the second transistor stack abutting the first transistor stack, the second transistor stack comprising:
a third transistor, over the substrate, wherein the third transistor is one of the first conductivity type and the second conductivity type; and
a fourth transistor, above the third transistor, wherein the fourth transistor is the other of the first conductivity type and the second conductivity type,

wherein the plurality of first conductive lines comprises, over the second transistor stack:
a power conductive line configured to route power to the second transistor stack;
one or more signal conductive lines configured to route signals to the second transistor stack; and
the shielding conductive line of the first transistor stack that extends partially over the second transistor stack and is configured to shield the routed signals on both the one or more signal conductive lines of the first transistor stack and the one or more signal conductive lines of the second transistor stack, wherein the one or more signal conductive lines of the second transistor stack are between the power conductive line of the second transistor stack and the shielding conductive line.