Patent ID: 11942391
Assignee: QORVO US, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. The apparatus of claim 4 wherein:
the plurality of first dielectric layers includes at least a top first dielectric layer and a bottom first dielectric layer underneath the top first dielectric layer;
the plurality of first heatsink metal plates includes at least a top first heatsink metal plate and a bottom first heatsink metal plate, and the plurality of first heatsink metal bars includes at least a top first heatsink metal bar underneath the top first heatsink metal plate and a bottom first heatsink metal bar underneath the top first heatsink metal bar; and
the at least one of the plurality of first interconnects is connected to the at least one first heatsink stanchion by directly contacting the top first heatsink metal plate.