Patent ID: 11907547
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H  Y | IPC G  H

Claim 6:
7. The memory device of claim 6, wherein each priority token of the plurality of priority tokens corresponds to a respective priority level of a plurality of priority levels, wherein the respective current budget reserve for a priority token of the plurality of priority tokens corresponding to a highest priority level of the plurality of priority levels is less than the respective current budget reserve for each priority token of the plurality of priority tokens corresponding to a priority level of the plurality of priority levels lower than the highest priority level of the plurality of priority levels, and wherein the respective current budget reserve for a priority token of the plurality of priority tokens corresponding to a lowest priority level of the plurality of priority levels is greater than the respective current budget reserve for each priority token of the plurality of priority tokens corresponding to a priority level of the plurality of priority levels higher than the lowest priority level of the plurality of priority levels.