Patent ID: 11940864
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC G  H  Y | IPC G  H

Claim 17:
18. A power system, comprising:
a processing core;
a controller; and
a plurality of phases controlled by the controller to supply power to the processing core according to a load condition of the processing core, the plurality of phases configured to transmit a temperature monitor signal and a current monitor signal to the controller and receive a pulse width modulation (PWM) signal and an enable signal from the controller, wherein each phase enabled by the enable signal is configured to:
generate an output current according to the PWM signal;
sense the output current;
detect a presence or absence of a ZCD point in the output current during each PWM cycle of the PWM signal;
time a timeout period after a ZCD point when the ZCD point is detected in a PWM cycle;
estimate a first load condition, a second load condition, or third load condition based on a state machine that relates the load condition to the presence or absence of the ZCD point and the timeout period; and
operate in an ON mode in the first load condition, in a low-power mode in the second load condition, or in an idle mode in the third load condition.