Patent ID: 11901185
Assignee: KABUSHIKI KAISHA TOSHIBA
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An etching method comprising:
forming a first layer on a substrate, the substrate containing a semiconductor material and having a main surface, the main surface including a first region and a second region adjacent to each other, the first layer covering the first region and the second region, a portion of the first layer covering the first region being provided with a plurality of openings or one or more openings defining a plurality of island-shaped portions, and a portion of the first layer covering the second region being a continuous layer;
forming a catalyst layer containing a noble metal on a portion(s) of the main surface exposed in the plurality of openings or the one or more openings by a plating method;
forming a second layer to cover a portion of the catalyst layer adjacent to a boundary between the first region and the second region and expose a portion of the catalyst layer spaced apart from the boundary; and
etching the substrate with an etching agent containing an oxidizer and hydrogen fluoride in a presence of the catalyst layer and the second layer.