Patent ID: 11888620
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An apparatus for a first station (STA) affiliated with a first multi-link device (MLD), the apparatus comprising memory; and processing circuitry coupled to the memory, the processing circuitry configured to:
determine a sequence number based on a transmitter sequence number space, the transmitter sequence number space being indexed by a media access control (MAC) address of a second MLD with which a second STA is affiliated;
encode a media access control (MAC) management protocol data unit (MMPDU) in a physical layer (PHY) protocol data unit (PPDU), the MMDPU comprising the sequence number, a frame body, and an address 1 field, the address 1 field indicating an address of the second STA; and
configure the first STA to transmit the PPDU to the second STA.