Patent ID: 11863186
Assignee: INFINEON TECHNOLOGIES AG
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. The system of claim 12, wherein the driver circuit comprises a first driver circuit, the PM control signals comprise high side PM control signals, and the power switch comprises a high side power switch, the system further comprising:
a low side power switch, wherein the low side power switch and the high side power switch form a half-bridge circuit; and
a second driver circuit configured to control the low side power switch, the second driver circuit comprising:
a low side input pin configured to receive low side PM control signals from the processor;
a low side output pin galvanically isolated from the low side input pin, wherein the second driver circuit is configured to deliver low side PM drive signals from the low side output pin to the low side power switch to control ON/OFF switching of the low side power switch;
a first low side register configured to store counts of the low side PM drive signals, wherein first the low side register is readable by the processor, wherein the counts of the low side PM drive signals count a number of rising and/or falling edges of the low side PM drive signals; and
a second low side register configured to store counts of the low side PM control signals, wherein the counts of the low side PM control signals count a number of rising and/or falling edges of the low side PM control signals,
wherein PM signaling in the second driver circuit is OK when there is no mismatch between the stored counts in the first low side register relative to the stored counts in second low side register, and
wherein a PM signaling problem exists in the second driver circuit when there is mismatch between the stored counts in the first low side register relative to the stored counts in second low side register.