Patent ID: 11885845
Assignee: STMICROELECTRONICS S.R.L.
Field: Measurement (Instruments)
Classification: CPC G  H | IPC G  H

Claim 0:
1. An integrated circuit, comprising:
a driver channel configured to be selectively operated in a high-side driver mode or a low-side driver mode and including:
a power transistor;
a drain output terminal coupled to a drain of the power transistor; and
a source output terminal coupled to a source of the power transistor;

wherein in the high-side driver mode, an external load is coupled between the source and ground, and the drain is coupled to an external high voltage source;
wherein in the low-side driver mode, the external load is coupled between the external high voltage source and the drain, the source is coupled to ground;
an on-state test circuit coupled to the drain output terminal and the source output terminal and including a plurality of switches; and
a control circuit coupled to the on-state test circuit and configured to control the plurality of switches to place the on-state test circuit in a high-side overcurrent testing mode or a low-side overcurrent testing mode.