Patent ID: 11894076
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. The non-volatile memory device of claim 6, wherein each of the plurality of page buffers is suitable for:
applying a power source voltage to the sensing node by activating the first control signal and electrically connecting the sensing node to the power source voltage terminal through the first connection control unit, during each of the first verification operation and the second verification operation,
applying the first sensing voltage to the bit line by activating the second control signal at a first potential level and electrically connecting the sensing node to the bit line through the second connection control unit, during the first verification operation, and
applying the second sensing voltage to the bit line by activating the second control signal at a second potential level higher than the first potential level and electrically connecting the sensing node to the bit line through the second connection control unit, during the second verification operation.