Patent ID: 11864371
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. The method for manufacturing the semiconductor structure according to claim 5, wherein the forming a conductive structure in the release holes comprises:
forming a second initial dielectric layer in the release holes, the second initial dielectric layer extending to the outside of the release holes and covering the first dielectric layer;
removing the second initial dielectric layer on the first dielectric layer and the second initial dielectric layer on the bottoms of the release holes, a remaining of the second initial dielectric layer forming a second dielectric layer, and the second dielectric layer enclosing intermediate holes in the release holes; and
forming the conductive structure in the intermediate holes, the conductive structure extending to outside of the intermediate holes and covering the first dielectric layer.