Patent ID: 11934263
Assignee: AMPERE COMPUTING LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A method of codeword processing in a memory access operation, the method comprising:
receiving a codeword comprising:
a first block comprising:
a first portion of data bits;
metadata bits comprising codeword information; and
parity bits;

a second block comprising:
a second portion of data bits;
a first ECC symbol; and
a second ECC symbol,

wherein the first block and the second block comprise a same number of bits,

determining whether the second block comprises one or more bit error(s) based on the first ECC symbol and the second ECC symbol;
in response to determining the second block comprises the one or more bit error, correcting the one or more bit error;
determining whether the first block comprises one or more parity error(s) based on the parity bits; and
in response to determining the first block comprises the one or more parity errors, generating a request for a corrective action.