Patent ID: 11907579
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 0:
1. A memory system comprising:
a non-volatile memory; and
a memory controller, wherein
the non-volatile memory includes a memory cell array having first and second pages each including a plurality of storage elements, and
the memory system is configured to execute one of at least a first operation method for storing n-bit (n is a natural number) data per storage element and a second operation method for storing m-bit (m is a natural number satisfying m>n) data per storage element, and includes a control information storage unit in which a first value is set for the first page having a pre-determined write operation speed that is slower than a first speed, and a second value is set for the second page having a pre-determined write operation speed that is equal to or higher than the first speed, and
the memory system is configured to, at the time of a write operation, select one of the at least first and second operation methods for writing to a page in accordance with a value set in the control information storage unit for the page and perform the write operation using the selected operation method, wherein the first operation method is selected for the first page having the first value set in the control information storage unit and the write operation is performed on the first page using the first operation method, and the second operation method is selected for the second page having the second value set in the control information storage unit and the write operation is performed on the second page using the second operation method,
wherein the pre-determined write operation speed for each of the first and second pages is determined during a test of measuring a performance index of the memory system executed near the time of a shipment of the memory system or at the time of designing the memory system, and
a difference between a write operation speed during execution of the write operation in the first page using the first operation method and a write operation speed during execution of the write operation in the second page using the second operation method is smaller than a difference between the pre-determined write operation speed of the first page and the pre-determined write operation speed of the second page.