Patent ID: 11960410
Assignee: ATI TECHNOLOGIES ULC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A system comprising:
a memory device;
a first processing device comprising circuitry configured to map a first region of a first virtual address space to a region in the memory device; and
a second processing device comprising circuitry configured to:
map a first region of a second virtual address space to the region in the memory device such that the region in the memory device is shared by the first processing device and the second processing device, wherein to map the first region of the second virtual address space to the region in the memory device, the second processing device is further configured to map the first region of the second virtual address space to a first region in a device memory space, and map the first region in the device memory space to the region in the memory device; and
create a unified kernel address space, based at least in part on an enabled common shared region with the first processing device.