Patent ID: 11881274
Assignee: EMEMORY TECHNOLOGY INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. The program control circuit as claimed in claim 1, wherein the current sampling circuit comprises:
a fifth transistor, wherein a drain terminal of the fifth transistor is connected to the first node, and a gate terminal of the fifth transistor receives a second bias voltage;
a sixth transistor, wherein a drain terminal of the sixth transistor is connected to a source terminal of the fifth transistor, and a source terminal of the sixth transistor is connected to the ground terminal;
a first capacitor, wherein a first terminal of the first capacitor is connected to a gate terminal of the sixth transistor, and a second terminal of the first capacitor is connected to the ground terminal;
a third switch, wherein a first terminal of the third switch is connected to the gate terminal of the sixth transistor, and a second terminal of the third switch is connected to the ground terminal; and
a fourth switch, wherein a first terminal of fourth switch is connected to the first node, and a second terminal of fourth switch is connected to the gate terminal of sixth transistor.