Patent ID: 11966341
Assignee: QUALCOMM INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A method performed by a host controller of a computing device for synchronizing logical-to-physical (L2P) tables, comprising:
determining whether a first L2P table stored in a dynamic random-access memory (DRAM) communicatively connected to the host controller is out of synchronization with a second L2P table stored in a static random-access memory (SRAM) of a universal flash storage (UFS) device communicatively connected to the host controller via a link;
determining whether the UFS device is configured to enter a hibernate mode in response to determining that the first L2P table is out of synchronization with the second L2P table;
retrieving at least one modified L2P map entry from the UFS device in response to the UFS device being configured to enter the hibernate mode, wherein the at least one modified L2P map entry is stored within the second L2P table;
updating the first L2P table with the at least one modified L2P map entry; and
configuring the link and the UFS device to be in the hibernate mode.