Patent ID: 11943730
Assignee: QUALCOMM INCORPORATED
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 20:
21. The method of claim 18, further comprising at least one of:
in response to receiving the at least one minimum first delay configured for the at least one first search space, determining at least one first downlink control channel detection limit for the first downlink control channel to be over multiple slots, wherein the detection for the first downlink control channel is performed at the at least one first search space further based on the first downlink control channel detection limit over a first plurality of slots; or
in response to receiving the at least one minimum second delay configured for the at least one second search space, determining at least one second downlink control channel detection limit for the second downlink control channel to be over multiple slots, wherein the detection for the second downlink control channel is performed at the at least one second search space further based on the second downlink control channel detection limit over a second plurality of slots.