Patent ID: 11881768
Assignee: STMICROELECTRONICS S.R.L.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A direct current (DC) to DC (DC-DC) converter comprising:
a comparator configured to set a pulse width of a signal pulse, the pulse width corresponding to a voltage level of an output voltage of the DC-DC converter;
a digital delay line (DDL) operatively coupled to the comparator, the DDL configured to linearly introduce delays to the signal pulse, thereby increasing the pulse width of the signal pulse;
a multiplexer operatively coupled to the DDL, the multiplexer configured to selectively output a delayed version of the signal pulse;
one or more processors; and
a non-transitory memory storage comprising instructions that, when executed by the one or more processors, cause the DC-DC converter to:
determine a setpoint of the DC-DC converter;
determine a first duty cycle of the DC-DC converter; and
determine that the first duty cycle is greater than the setpoint, and based thereon,
generate a first signal pulse having a first pulse width in accordance with an input voltage and the output voltage of the DC-DC converter, the first signal pulse corresponding to the voltage level of the output voltage of the DC-DC converter;
power down the DDL used to introduce delays to the first pulse width of the first signal pulse corresponding to the voltage level of the output voltage of the DC-DC converter; and
output the first signal pulse.