Patent ID: 11922025
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:
receive a memory access command from a host and determine that a criteria involving a memory device is met, wherein the criteria includes a number of program-erase cycles (PECs) for at least one memory die of a number of memory dice of the memory device is above a threshold quantity;
determine that the memory device has been in operation for a first threshold period of time;
write test data to each memory die of the number of memory dice in response to the determination that the memory device has been in operation for the first threshold period of time;
read, after a second threshold period of time has elapsed, the test data from each memory die of the number of memory dice; and
compare the test data read from respective memory dice of the number of memory dice to the test data written to respective memory dice of the number of memory dice to determine whether at least one memory die of the number of memory dice has experienced a defect or degradation, or both; and
responsive to a determination that the at least one memory die has experienced degradation, refraining from fulfilling the memory access command to read data written to the at least one memory die that has experienced the degradation, performing a recovery operation for user data on the at least one memory die requested by the memory access command, and transfer the recovered user data to a host to fulfill the memory access command.