Patent ID: 11935962
Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 1:
2. A transistor comprising:
a first insulating layer;
a second insulating layer;
an oxide semiconductor layer over the first insulating layer and the second insulating layer, the oxide semiconductor layer comprising a channel formation region and a second region which is not the channel formation region; and
a gate electrode over the channel formation region of the oxide semiconductor layer with a gate insulating layer therebetween,
wherein the oxide semiconductor layer comprises indium, gallium and zinc,
wherein the first insulating layer contacts the channel formation region of the oxide semiconductor layer,
wherein the second insulating layer contacts the second region of the oxide semiconductor layer,
wherein the first insulating layer comprises an oxide insulating material,
wherein the second insulating layer is less likely to diffuse oxygen than the first insulating layer, and
wherein an upper portion of the second region of the oxide semiconductor layer has a lower resistance than the channel formation region of the oxide semiconductor layer.