Patent ID: 11967934
Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 4:
5. A power amplifier circuit which is a Doherty type power amplifier circuit including a main amplifier and a peak amplifier to which a first input signal and a second input signal branched off from one input signal are respectively input, and configured to synthesize and output a first output signal from the main amplifier and a second output signal from the peak amplifier,
wherein the peak amplifier includes:
a first transistor including a first source terminal, a first drain terminal and a first control terminal, the first source terminal being connected to a first constant potential line, the first drain terminal being connected to a first node connected to the first constant potential line via a third alternating current coupling circuit, the first control terminal being connected to a first bias voltage application circuit configured to apply a first bias voltage to the first control terminal, and the second input signal being input to the first control terminal via a first alternating current coupling circuit; and
a second transistor including a second source terminal, a second drain terminal and a second control terminal, the second source terminal being connected to the first node, the second drain terminal being connected to a second constant potential line having a higher potential than the first constant potential line, the second control terminal being connected to a second bias voltage application circuit configured to apply a second bias voltage to the second control terminal, and the second control terminal being connected to the first node via a second alternating current coupling circuit, and
a second node between the second drain terminal and the second constant potential line is connected to a fourth alternating current coupling circuit and outputs the second output signal via the fourth alternating current coupling circuit,

wherein the peak amplifier further includes a third transistor having a third source terminal, a third drain terminal, and a third control terminal,
the third source terminal is connected to the first constant potential line,
the third drain terminal is connected to the first node,
the third control terminal is connected to a third bias voltage application circuit configured to apply a third bias voltage to the third control terminal,
the second input signal is input to the third control terminal via a fifth alternating current coupling circuit,
the first control terminal is connected to the third drain terminal via the first alternating current coupling circuit, and
the second input signal is amplified by the third transistor and is then input to the first control terminal via the first alternating current coupling circuit.