Patent ID: 11888041
Assignee: KIOXIA CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A nonvolatile semiconductor memory device comprising:
an underlying insulating layer provided above a substrate;
a source layer provided above the underlying insulating layer;
a stacked body provided above the source layer, the stacked body including a plurality of first electrodes separately stacked from each other in a first direction;
a plurality of second electrodes provided above the stacked body, the second electrodes being arranged in a second direction perpendicular to the first direction;
a third electrode provided between the source layer and the stacked body in the first direction;
a first columnar part piercing through the first electrodes, one second electrode of the second electrodes and the third electrode in the first direction, a lower end portion of the first columnar part being electrically connected to the source layer, the first columnar part including a semiconductor layer with a tubular configuration extending in the first direction and a core layer provided inside the semiconductor layer with the tubular configuration;
a second columnar part piercing through the first electrodes, the one second electrode and the third electrode in the first direction, a lower end portion of the second columnar part being electrically connected to the source layer, the first and second columnar parts being arranged in the second direction; and
a third columnar part piercing through the first electrodes, the one second electrode and the third electrode in the first direction, a lower end portion of the third columnar part being electrically connected to the source layer, the first and third columnar parts being arranged in a third direction and the third columnar part being disposed between the first and second columnar parts in the second direction, the third direction being perpendicular to the first direction and oblique to the second direction,
each of the first, second, and third columnar parts forming a memory cell at a crossing portion with at least one of the first electrodes, forming a drain-side select transistor at a crossing portion with the one second electrode and forming a source-side select transistor at a crossing portion with the third electrode,
the core layer of the first columnar part including a first core insulator continuously extending in the first direction through the one second electrode and at least three first electrodes of the first electrodes, the at least three first electrodes being proximal to the one second electrode among the first electrodes, and
the first columnar part having a first diameter in the second direction inside the third electrode and a second diameter in the second direction inside a lowermost first electrode of the first electrodes, the first diameter being larger than the second diameter.