Patent ID: 11879936
Assignee: AMPERE COMPUTING LLC
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 13:
14. A method of measuring jitter of a clock under test having a frequency, the method comprising:
for a duration of a sampling time window:
providing, as an input to a delay line comprising a plurality of fixed-delay elements connected in series, the clock under test with the frequency divided by two;
providing, as a latching signal to each of a first plurality of clocked latches that use the latching signal to substantially simultaneously latch outputs of each of at least a subset of the plurality of fixed-delay elements, the clock under test, delayed according to a programmed delay;
detecting locations in a time domain of transitions of the clock under test, based on the outputs of the first plurality of clocked latches, each location in the time domain detected comprising one of a plurality of locations in the time domain represented by the outputs of the first plurality of clocked latches;
storing a list of each location in the time domain that a transition of the clock under test occurs; and
counting how many times the transition of the clock under test occurs in each location in the time domain; and

after the duration of the sampling time window:
determining a jitter of the clock under test based on at least one of the list of each location in the time domain that a transition of the clock under test occurred, or how many times the transition of the clock under test occurred in each location in the time domain.