Patent ID: 11902061
Assignee: KIOXIA CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 4:
5. The reception device according to claim 4, wherein
the amplification circuit comprises:
a first FET in which the voltage of the data signal is applied to a gate;
a second FET in which the first voltage is applied to a gate;
a first switch configured to connect a source of the first FET and a source of the second FET to a power potential in the comparison period, and to disconnect the source of the first FET and the source of the second FET from the power potential in the reset period;
a second switch configured to connect a drain of the first FET to a ground potential in the reset period, and to disconnect the drain of the first FET from the ground potential in the comparison period;
a third switch configured to connect a drain of the second FET to the ground potential in the reset period, and to disconnect the drain of the second FET from the ground potential in the comparison period;
a positive-side tap coefficient circuit that is connected in parallel with the drain and the source of the second FET; and
a negative-side tap coefficient circuit that is connected in parallel with the drain and the source of the first FET, wherein
the positive-side tap coefficient circuit is configured to connect the drain and the source of the second FET with a resistance value according to the tap coefficient when the past output value is 1, and to disconnect between the drain and the source of the second FET when the past output value is 0, and
the negative-side tap coefficient circuit is configured to connect the drain and the source of the first FET with a resistance value according to the tap coefficient when the past output value is 0, and to disconnect between the drain and the source of the first FET when the past output value is 1.