Patent ID: 11942458
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor package comprising:
a first substrate;
a first semiconductor chip and a passive device which are laterally spaced apart from each other on the first substrate and are disposed face-up on the first substrate;
a first molding part surrounding the first semiconductor chip and the passive device on the first substrate;
a second semiconductor chip disposed on the first molding part and electrically connected to the first semiconductor chip and the passive device;
a second molding part surrounding the second semiconductor chip on the first molding part;
first through-electrodes vertically penetrating the first molding part, at least some of first through-electrodes electrically connecting the first substrate to the second semiconductor chip;
external terminals provided under the first substrate,
wherein the first semiconductor chip comprises:
a base layer;
a circuit layer provided on a top surface of the base layer, the top surface of the base layer facing the second semiconductor chip; and
a via penetrating the base layer to be electrically connected to the circuit layer,
a solder bump connecting the via to the first substrate; and
an adhesive film adhering an inactive surface of the passive device to the first substrate.