Patent ID: 11935596
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 19:
20. A system, comprising:
a memory device configured to store data, and comprising:
a first semiconductor structure comprising an array of memory cells, a first peripheral circuit of the array of memory cells, and a polysilicon layer between the array of memory cells and the first peripheral circuit, the first peripheral circuit comprising a first transistor, and the array of memory cells comprising a slit structure having no source contact; and
a second semiconductor structure comprising a second peripheral circuit of the array of memory cells, the second peripheral circuit comprising a second transistor,
wherein:
the first semiconductor structure is connected with the second semiconductor structure;
the polysilicon layer is in contact with the array of memory cells at one side of the polysilicon layer and in direct contact with an interconnect layer corresponding to the first peripheral circuit at another side of the polysilicon layer; and
a conductive material extending through the polysilicon layer to couple the array of memory cells with the first peripheral circuit through the interconnect layer; and

a memory controller coupled to the memory device and configured to control the array of memory cells through the first peripheral circuit and the second peripheral circuit.