Patent ID: 11922960
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A quantization apparatus comprising:
an inter-frame predictor configured to generate a first prediction vector of a current frame from a quantized input vector of a previous frame;
an intra-frame predictor configured to generate a second prediction vector of a current stage from a prediction matrix and a quantized first error vector of a previous stage, wherein the quantized first error vector of the previous stage is obtained based on a second prediction vector of the previous stage and a quantized second error vector of the previous stage; and
a trellis-structured vector quantizer configured to quantize a second error vector of the current stage which corresponds to a difference between a first error vector of the current frame and the second prediction vector of the current stage to generate a quantized second error vector of the current stage, wherein the first error vector of the current frame corresponds to a difference between the first prediction vector of the current frame and an input vector of the current frame.