Patent ID: 11923973
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. An apparatus comprising:
a processor;
a non-transitory computer readable storage medium storing instructions that, when executed by the processor, cause the apparatus to performing operations including:
encoding information bits and three parity check bits generated based on a subset of the information bits, using a polar code to obtain encoded bits, and the three parity check bits generated based on a length-5 cyclic shift register, wherein the polar code is asso ciated with a plurality of sub-channels, and the encoding comprises:
placing each of the information bits and the three parity check bits in a respective sub-channel of the plurality of sub-channels, wherein the placing comprises:
shifting the length-5 cyclic shift register for each sub-channel of the plurality of sub-channels, and:
for placing each of the information bits. performing an XOR op eration with a respective information bit value of the information bits and a bit value of the length-5 cyclic shift register, or
for placing each of the three parity check bits, retrieving a respective parity checkbit value of the three parity check bits from the length-5 cyclic shift register; and
output the encoded bits.