Patent ID: 11963400
Assignee: WUHAN TIANMA MICROELECTRONICS CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A display panel, comprising an array substrate, wherein the array substrate comprises:
a plurality of pixel circuits, wherein the plurality of pixel circuits are arranged in an array in a row direction and a column direction, each of the plurality of pixel circuits comprises a pixel driving semiconductor portion, the pixel driving semiconductor portion comprises two fixed potential connecting nodes, and the row direction intersects the column direction;
a plurality of reference signal lines, wherein the two fixed potential connecting nodes are electrically connected to at least one of the plurality of reference signal lines; and
a plurality of pixel connecting semiconductor portions, wherein two fixed potential connecting nodes adjacent in a first direction are electrically connected by one of the plurality of pixel connecting semiconductor portions, and the first direction is parallel to a plane where the array substrate is located;, wherein the plurality of reference signal lines comprise a first reference signal line and a second reference signal line that extend in the row direction; the two fixed potential connecting nodes comprise a first node and a second node; and in a same pixel driving semiconductor portion, the first node is electrically connected to the first reference signal line, and the second node is electrically connected to the second reference signal line;, wherein two pixel driving semiconductor portions adjacent in the row direction comprise a first pixel driving semiconductor portion and a second pixel driving semiconductor portion; and the first node in the first pixel driving semiconductor portion is electrically connected to the first node in the second pixel driving semiconductor portion by one of the plurality of pixel connecting semiconductor portions, or the second node in the first pixel driving semiconductor portion is electrically connected to the second node in the second pixel driving semiconductor portion by one of the plurality of pixel connecting semiconductor portions;, wherein a plurality of pixel driving semiconductor portions comprise an i-th pixel driving semiconductor portion, an (i+1)-th pixel driving semiconductor portion, and an (i+2)-th pixel driving semiconductor portion arranged sequentially in the row direction, wherein i is a positive integer;, wherein the plurality of pixel connecting semiconductor portions comprise a first pixel connecting semiconductor portion and a second pixel connecting semiconductor portion; and, wherein the second node in the i-th pixel driving semiconductor portion and the second node in the (i+1)-th pixel driving semiconductor portion are electrically connected by the second pixel connecting semiconductor portion, and the first node in the (i+1)-th pixel driving semiconductor portion and the first node in the (i+2)-th pixel driving semiconductor portion are electrically connected by the first pixel connecting semiconductor portion.