Patent ID: 11961738
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of forming a pattern, comprising:
forming a first pattern over an underlying layer, the first pattern including a main pattern and a lateral protrusion having a thickness of less than 25% of a thickness of the main pattern;
forming a hard mask layer over the first pattern,
wherein the hard mask layer includes a seam or void extending along a first direction between adjacent pattern features of the first pattern and a recess located at an end of the seam or void along the first direction,
wherein the recess is located at a greater distance from the underlying layer along the first direction than an uppermost surface of the first pattern;

performing a planarization operation to expose the first pattern without exposing the lateral protrusion;
forming a hard mask pattern by removing the first pattern while the lateral protrusion is covered by the hard mask layer; and
patterning the underlying layer using the hard mask pattern as an etching mask,
wherein the hard mask layer is made of a dielectric material selected from the group consisting of silicon nitride, SiON, SiOC, SiOCN, SiCN, aluminum oxide, aluminum nitride, aluminum oxynitride, hafnium oxide and zirconium oxide.