Patent ID: 11948656
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. The method of claim 8, wherein generating the first flag comprises:
activating the first row of memory cells a first time;
outputting, to the first input line of the first multiplexer, a first bit of the first subset based at least in part on activating the first row of memory cells the first time, wherein the first bit represents a least significant bit associated with the first subset;
activating the first row of memory cells a second time; and
outputting, from the first multiplexer to a first input line of the second multiplexer, the first bit of the first subset based at least in part on activating the first row of memory cells the second time, wherein the first bit represents a next significant bit associated with the first subset.