Patent ID: 11862290
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 12:
13. The memory system according to claim 12, wherein the adjustment unit comprises:
N first resistors connected in series between the negative input terminal and the output terminal of the operational amplifier, wherein N is an integer greater than 1, and at least one second resistor, wherein the at least one second resistor is connected between the negative input terminal and the ground terminal; and
M first switches, wherein each of the first switches connects the output terminal of the adjustment unit to a terminal of a respective first resistor, and each of the first switches is selectively turned on based on the control signal, to adjust the value of the equivalent resistance between the output terminal of the adjustment unit and the output terminal of the operational amplifier, wherein M is a positive integer less than or equal to N, wherein
the controller is connected to the M first switches.