Patent ID: 11887685
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The method of claim 1, wherein prior to executing the second FB position determination step to determine the bit position of the second FB in each target repair region, the method further comprises:
acquiring the FB feature map of the target repair region, and determining a target FB count, available RBL count, and present remaining RWL count of the target repair region;
if the target repair region satisfies an initial determination condition, ending a repair processing operation for the chip to be repaired, the initial determination condition comprising that the target FB count is equal to 0, or the available RBL count is equal to 0, or the present remaining RWL count is less than 0;
if the target repair region does not satisfy the initial determination condition, performing segmentation processing on the FB feature map according to an association relationship to generate a segmenting feature map group, the segmenting feature map group comprising segmenting feature maps; and
if a bank feature map state of the target repair region is a second initial state and a new FB feature map is generated in the segmenting feature map group, adjusting the second initial state to a first initial state.