Patent ID: 11973036
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor package structure, comprising:
a redistribution structure including:
a first dielectric layer having a first surface and a second surface opposite to the first surface, and defining a recess recessed from the first surface;
a patterned first conductive layer extending in the first dielectric layer and exposed from the recess of the first dielectric layer; and
a patterned second conductive layer stacked on the patterned first conductive layer and extending in the first dielectric layer, wherein the patterned second conductive layer includes a width gradually reduced toward the first surface of the first dielectric layer;

an electric conductor disposed in the recess of the first dielectric layer;
a semiconductor device disposed over the second surface of the first dielectric layer; and
at least one pillar including a first portion located in the first dielectric layer and a second portion protruding from the second surface of the first dielectric layer, wherein the at least one pillar includes a plurality of pillars, and top surfaces of the plurality of pillars are substantially aligned with each other.