Patent ID: 11862222
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 7:
8. The refresh circuit according to claim 1, wherein the refresh signal generation unit comprises:
a first NOR gate configured to receive the refresh command and the single-row refresh end signal;
a refresh window generation unit configured to receive the refresh command, the single-row refresh end signal and the reset signal and output a refresh window signal; output the refresh window signal when receiving the refresh command; detect the reset signal when receiving the single-row refresh end signal, output the refresh window signal when not receiving the reset signal, and suspend outputting the refresh window signal when receiving the reset signal; and
a second NOR gate configured to receive an output signal of the first NOR gate and the refresh window signal and output the row address refresh signal.