Patent ID: 11893388
Assignee: FLEX LOGIX TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An integrated circuit comprising:
a plurality of processing components to process image data of a plurality of image frames, wherein each image frame includes a plurality of stages, wherein each processing component includes:
a plurality of multiplier-accumulator execution pipelines, wherein each multiplier-accumulator execution pipeline includes a plurality of multiplier-accumulator circuits configurable to, in operation, perform multiply and accumulate operations using image data and filter weights; wherein:
a first processing component of the plurality of processing components is configured to process all of the data associated with a first plurality of stages of each image frame via the plurality of multiplier-accumulator execution pipelines of the first processing component, and
a second processing component of the plurality of processing components is configured to process all of the data associated with a second plurality of stages of each image frame via the plurality of multiplier-accumulator execution pipelines of the second processing component, wherein:
each stage of the first plurality of stages is different from each stage of the second plurality of stages, and
the first processing component processes data associated with the first plurality of stages of a first image frame concurrently with respect to the second processing component processing data associated with the second plurality of stages of the first image frame; and

wherein the first processing component is separate from the second processing component and the first and second processing components are electrically connected via a bus.