Patent ID: 11881262
Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 1:
2. The resistive random access memory device according to claim 1, wherein from said switch elements figures at least one first reset transistor belonging to a reset stage of said sense amplifier, and controlled by way of a first control signal, said control circuit being configured to:
during said reset phase, maintain conducting the first reset transistor, so as to interconnect the first read node and the second read node, or connect the first read node to the second supply line or connect a first terminal and a second terminal of the first inverter to the second supply line, and
during the comparison phase place the first control signal in a second state, different from said first state, so that said first reset transistor is non-conducting.