Patent ID: 11961892
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a semiconductor substrate;
an isolation structure over the semiconductor substrate;
a first fin and a second fin extending through the isolation structure;
a first epitaxial feature disposed on the first fin and comprising a first downwardly-facing surface;
a second epitaxial feature disposed on the second fin an comprising a second downwardly-facing surface;
a dielectric layer disposed over the first epitaxial feature, the second epitaxial feature, and the isolation structure; and
a multi-layer contact structure extending through the dielectric layer to contact the first epitaxial feature and the second epitaxial feature,
wherein a gap is disposed within a space defined by the first downwardly-facing surface and the second downwardly-facing surface,
wherein the first epitaxial feature and the second epitaxial feature merge over the gap,
wherein the multi-layer contact structure comprises:
a first contact layer in direct contact with the first epitaxial feature, the second epitaxial feature, and the dielectric layer, and
a second contact layer in direct contact with the first contact layer and spaced apart from the first epitaxial feature, the second epitaxial feature, and the dielectric layer by the first contact layer.