Patent ID: 11935760
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A package structure, comprising:
a thermal dissipation structure, comprising:
a semiconductor substrate;
conductive vias embedded in the semiconductor substrate;
a thermal transmission structure disposed on the semiconductor substrate and the conductive vias, wherein the thermal transmission structure comprises a conductive plane;
bonding pads and bonding vias embedded in the thermal transmission structure, wherein the bonding vias are located between the conductive vias and the bonding pads, and the conductive plane is in physical contact with sidewalls of at least one of the bonding pads; and
capacitors embedded in the thermal transmission structure and located aside of the bonding vias;

a first semiconductor die having a first bonding layer on a first side and a second bonding layer on a second side opposite to the first side, wherein the first bonding layer is hybrid bonded to the bonding pads of the thermal dissipation structure; and
a second semiconductor die having a third bonding layer, wherein the third bonding layer of the second semiconductor die is hybrid bonded to the second bonding layer of the first semiconductor die.