Patent ID: 11948974
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A semiconductor structure, comprising:
a gate structure including a gate pad and a gate contact on the gate pad;
a first source region disposed below the gate pad, wherein the first source region comprises a first source pad;
a first drain region disposed on the gate pad, wherein the first drain region comprises a first drain pad, and wherein the first source region, the first drain region and the gate structure form a first transistor;
a second source region disposed below the gate pad, wherein the second source region comprises a second source pad;
a second drain region disposed on the gate pad, wherein the second drain region comprises a second drain pad, and wherein the second source region, the second drain region and the gate structure form a second transistor; and
at least one metal line that is below the first source region and the second source region, and is electrically connected to at least one power supply;
a plurality of first vias formed through the gate pad and connecting the first drain pad with the first source pad; and
a plurality of second vias formed through the gate pad and connecting the second drain pad with the second source pad.