Patent ID: 11956953
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a first stacked layer;
an insulating layer disposed over the first stacked layer;
a second stacked layer disposed over the insulating layer; and
a channel structure penetrating the second stacked layer, the insulating layer and the first stacked layer;
wherein a diameter of a portion of the channel structure located in the insulating layer is larger than a diameter of a portion of the channel structure located in the first stacked layer, wherein the channel structure is continuous, and wherein a bottom portion of the channel structure comprises:
a bottom surface lower than a bottom surface of the first stacked layer; and
a top surface higher than the bottom surface of the first stacked layer and lower than a top surface of the first stacked layer.