Patent ID: 11942455
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A semiconductor die assembly, comprising:
a package substrate including a front side and a back side opposite to the front side, wherein the package substrate includes a first opening and a second opening;
a first semiconductor die attached to the front side of the package substrate, wherein the first semiconductor die includes a first side facing toward the front side of the package substrate, the first side of the first semiconductor die including a first bond pad aligned with the first opening and a second bond pad aligned with the second opening;
a first bonding wire coupled to the first bond pad of the first semiconductor die and passing through the first opening to couple with a first substrate bond pad on the back side of the substrate;
a second bonding wire coupled to the second bond pad of the first semiconductor die and passing through the second opening to couple with a second substrate bond pad on the back side of the substrate;
a second semiconductor die attached to the first semiconductor die, wherein the second semiconductor die includes an active side facing away from the first semiconductor die, the active side of the second semiconductor die including a third bond pad; and
a third bonding wire coupling the third bond pad of the second semiconductor die with a third substrate bond pad on the first side of the package substrate, the third substrate bond pad being directly coupled to the second bond pad by a conductive structure extending through the substrate.