Patent ID: 11888044
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 13:
14. A semiconductor device, comprising:
a lower channel pattern and an upper channel pattern stacked on a substrate in a first direction perpendicular to a top surface of the substrate;
a gate electrode on the upper channel pattern to cover the upper channel pattern and the lower channel pattern;
a lower source/drain pattern at a first side of the gate electrode and connected to the lower channel pattern;
an upper source/drain pattern at the first side of the gate electrode and connected to the upper channel pattern;
a first barrier pattern between the lower source/drain pattern and the upper source/drain pattern; and
a second barrier pattern between the first barrier pattern and the upper source/drain pattern,
wherein the first barrier pattern includes a first material and second barrier pattern includes a second material,
wherein the first material and the second material are either i) different semiconductor materials having different conductivity types, or ii) different insulating materials with the second material being doped with a semiconductor element.