Patent ID: 11948961
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A light detecting device, comprising:
a first substrate that includes:
a first semiconductor substrate; and
a first multi-layered wiring layer on the first semiconductor substrate;

a second substrate that includes:
a second semiconductor substrate; and
a second multi-layered wiring layer on the second semiconductor substrate;

a third substrate that includes:
a third semiconductor substrate; and
a third multi-layered wiring layer on the third semiconductor substrate,

wherein
the first substrate, the second substrate, and the third substrate are stacked in this order,
the second substrate is bonded to the third substrate, and
the second multi-layered wiring layer is opposite to the third multi-layered wiring layer;

a first coupling structure configured to electrically couple a first wiring line in the second multi-layered wiring layer and a second wiring line in the third multi-layered wiring layer, wherein the first coupling structure includes a via that penetrates one of the second substrate or the third substrate;
a second coupling structure on a bonding surface of each of the second substrate and the third substrate, wherein the second coupling structure includes an electrode junction structure in which electrodes on the bonding surface of the second substrate are joined in direct contact with electrodes on the bonding surface of the third substrate;
a pad configured to function as an I/O unit is on a back surface of the first substrate; and
a third coupling structure that includes:
a first opening from a back surface side of the first substrate, wherein the first opening is configured to expose a third wiring line in the first multi-layered wiring layer;
a second opening that penetrates the first substrate from the back surface side of the first substrate, wherein the second opening is configured to expose a fourth wiring line in the second multi-layered wiring layer; and
a film including a first electrically-conductive material is on an inner wall of each of the first opening and the second opening, wherein
each of the third wiring line in the first multi-layered wiring layer exposed by the first opening and the fourth wiring line in the second multi-layered wiring layer exposed by the second opening is electrically coupled to the pad by the first electrically-conductive material.