Patent ID: 11960398
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A memory system, comprising:
one or more control components configured to be coupled with one or more memory devices, wherein the one or more control components are operable to cause the memory system to:
transmit, to a memory device, a read command to retrieve a first set of data stored in the memory device using one or more memory cells that are each configured to store a first quantity of two or more bits;
receive, from the memory device, the first set of data based at least in part on transmitting the read command;
extract a second set of data from the first set of data, the second set of data comprising a second quantity of bits associated with each memory cell that is less than the first quantity of two or more bits included in the first set of data; and
validate, using the second set of data, a first portion of the first set of data that remains after the second set of data was extracted.