Patent ID: 11900979
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 20:
21. The method of claim 16, wherein the time-varying resistance device comprises random number generator (RNG) circuitry comprising a set of digital p-bits, p-bit interface circuitry connected to the set of digital p-bits, and a resistance bank connected to the set of digital p-bits and connected to one or more p-bits of the plurality of p-bits, and wherein the method further comprises:
operating the p-bit interface circuitry to apply respective bias values to each digital p-bit of the set of digital p-bits;
operating each digital p-bit in the set of p-bits to generate respective digital bits based on the respective bias values; and
operating the resistance bank to determine, based on the respective digital bits, the probabilistic resistance value of the one or more p-bits to which the resistance bank is connected.