Patent ID: 11962318
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 6:
7. The ADC of claim 6 further comprising a second stage in the backend ADC, the second stage is coupled to the first stage, and configured to receive an output of the first stage, wherein in the delay-calibration mode;
the calibration circuit is configured to modify a delay value of a second delay block in the second stage;
the calibration circuit is configured to generate the plurality of input codes;
the VD block is configured to generate a plurality of delay signals in response to the plurality of input codes the second stage is configured to generate a digital code in response to the plurality of delay signals; and
the accumulator is configured to determine the error count of the second stage, in which the error count is the absolute difference in a number of ones and zeroes in the digital code.