Patent ID: 11916114
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 8:
9. A transistor comprising:
a first nanostructure over a semiconductor substrate;
a second nanostructure over the first nanostructure;
a gate dielectric surrounding the first nanostructure and the second nanostructure; and
a gate electrode over the gate dielectric, wherein the gate electrode comprises:
a first p-type work function metal;
a second p-type work function metal over the first p-type work function metal;
a metal residue at an interface between the first p-type work function metal and the second p-type work function metal; and
a fill metal over the second p-type work function metal, wherein the fill metal does not extend between the first nanostructure and the second nanostructure.