Patent ID: 11881272
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 12:
13. The nonvolatile memory device of claim 12, wherein the control circuit is configured to control the voltage generator and the address decoder to:
apply a first pass voltage to word-lines of an erased stack among the plurality of stacks while the plurality of intermediate transistors are turned on, the erased stack corresponding to a stack in which all memory cells are in an erased state; and
after the first pass voltage is applied to the word-lines of the erased stack, apply a second pass voltage to word-lines of a selected stack among the plurality of stacks while the plurality of intermediate transistors are turned off, the selected stack corresponding to a stack that includes memory cells to be programmed.