Patent ID: 11934876
Assignee: AMAZON TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A computer-program product tangibly embodied in a non-transitory machine-readable storage medium, the computer-program product including instructions configured to cause a processor to perform operations for executing a compiler, the operations comprising:
receiving computer code to be converted into machine instructions for execution on an integrated circuit device, the integrated circuit device including a static random-access memory (SRAM) and a dynamic random-access memory (DRAM), the SRAM including a set of memory locations;
determining, based on the computer code, a set of values that are to be stored on the integrated circuit device during the execution of the machine instructions on the integrated circuit device, wherein each of the set of values is to be stored in either the SRAM or the DRAM during the execution of the machine instructions;
constructing an interference graph that includes the set of values and a set of interferences that indicate which of the set of values are concurrently stored during the execution of the machine instructions;
computing a number of possible placements in the SRAM for each of the set of values;
computing a number of blocked placements in the SRAM for each of the set of values using the interference graph;
computing a number of remaining placements in the SRAM based on the number of possible placements and the number of blocked placements for each of the set of values;
assigning at least a portion of the set of values to the set of memory locations of the SRAM based on the number of remaining placements for each of the set of values, resulting in a set of memory location assignments; and
generating the machine instructions based on the computer code while incorporating the set of memory location assignments such that the machine instructions use the set of memory location assignments.