Patent ID: 11923458
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A device for computing, the device comprising:
one or more gate stacks are disposed on a fin semiconductor device;
a first gate stack of the one or more gate stacks comprises of a first ferroelectric layer and first interfacial layer, respectively;
a second gate stack of the one or more gate stacks comprises of a second ferroelectric layer and second interfacial layer, respectively and wherein the second ferroelectric layer contains a higher concentration of defects than the first ferroelectric layer which contributes to a leakage current, wherein the leakage current flows from the first gate stack towards the second gate stack;
the first gate stack of the one or more gate stacks contains a first gate and the second gate stack of the one or more gate stacks contains a second gate;
a fin is disposed between the second interfacial layer and the first interfacial layer, wherein the fin consists of a junction-less channel and the fin consists of one or more depletion layers; and
a source terminal and a drain terminal formed on either ends of the fin, wherein a drain current flows from the source terminal towards the drain terminal.