Patent ID: 11894815
Assignee: SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. A communication system comprising a power amplifier, comprising:
a power amplification circuit and a linearity compensation circuit;
wherein the linearity compensation circuit is connected between a transistor amplification circuit and a biasing circuit of the power amplification circuit, to linearly compensate a nonlinear distortion of the power amplification circuit based on an input power of the power amplification circuit;
wherein the transistor amplification circuit comprises multiple cascaded elements including a first cascaded element having an end grounded; and, wherein the linearity compensation circuit is connected to an end of the first cascaded element;
wherein the linearity compensation circuit disposed between the biasing circuit of the power amplification circuit and the transistor amplification circuit is configured to increase power gain and linear power of the power amplifier without changing a load impedance, thereby improving nonlinearity and efficiency of the power amplifier;
wherein the transistor amplification circuit comprises: a field-effect-transistor amplification circuit or a triode amplification circuit;
wherein when the transistor amplification circuit is a field-effect-transistor amplification circuit, the linearity compensation circuit comprises: a first field-effect transistor, a first resistor, a second resistor, a first capacitor, a second capacitor, and a third capacitor; and
wherein a gate electrode of the first field-effect transistor is connected to a first end of the second resistor, a second end of the second resistor is connected to the biasing circuit, a source electrode of the first field-effect transistor is connected to a first end of the first resistor, a second end of the first resistor is grounded, the first capacitor is connected in parallel with the first resistor, a drain electrode of the first field-effect transistor is connected to a first end of the third capacitor, a second end of the third capacitor is connected to the field-effect-transistor amplification circuit, a first end of the second capacitor is connected to the gate electrode of the first field-effect transistor, and a second end of the second capacitor is grounded.