Patent ID: 11894843
Assignee: SOCIONEXT INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A level shift circuit, comprising:
an input node receiving an input signal transitioning between a first power supply and a second power supply lower in potential than the first power supply;
an inverted input node receiving an inverted input signal inverted from the input signal;
a first n-type transistor having a source connected to the inverted input node and a gate connected to the first power supply;
a first p-type transistor having a drain connected to an inverted output node, a source connected to a third power supply higher in potential than the first power supply, and a gate connected to an output node;
a second n-type transistor having a source connected to the input node and a gate connected to the first power supply;
a second p-type transistor having a drain connected to the output node, a source connected to the third power supply, and a gate connected to the inverted output node;
a third n-type transistor having a source connected to the inverted input node and a drain connected to the inverted output node;
a first inverter having an input connected to the inverted output node and an output connected to a gate of the third n-type transistor;
a fourth n-type transistor having a source connected to the input node and a drain connected to the output node;
a second inverter having an input connected to the output node and an output connected to a gate of the fourth n-type transistor;
a fifth n-type transistor having a gate connected to the third power supply, a source connected to a drain of the first n-type transistor, and a drain connected to the inverted output node; and
a sixth n-type transistor having a gate connected to the third power supply, a source connected to a drain of the second n-type transistor, and a drain connected to the output node.