Patent ID: 11910733
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 16:
17. A method comprising:
forming a plurality of bottom electrodes;
forming a dielectric layer over and contacting the plurality of bottom electrodes;
forming a Phase-Change Random Access Memory (PCRAM) layer over the dielectric layer;
patterning the PCRAM layer to form a plurality of PCRAM elements; and
forming a plurality of top electrodes over the plurality of PCRAM elements, wherein the plurality of PCRAM elements are electrically and physically separated from either the plurality of bottom electrodes or the plurality of top electrodes, and wherein at a time after the plurality of top electrodes have been formed, the dielectric layer is a homogeneous layer formed of a homogeneous dielectric material.