Patent ID: 11966247
Assignee: PSEMI CORPORATION
Field: Control (Instruments)
Classification: CPC G | IPC G

Claim 16:
17. The cascode current mirror circuit according to claim 1, wherein:
the output leg further comprises a self-biased stack of a plurality of series-connected intrinsic transistors, the self-biased stack in series connection with the second common-gate intrinsic transistor,
wherein for each transistor of the plurality of series-connected intrinsic transistors of the self-biased stack:
a source node of the each transistor is connected to a drain node of an adjacent intrinsic transistor, the adjacent intrinsic transistor being a transistor of the plurality of series-connected intrinsic transistors of the self-biased stack or the second common-gate intrinsic transistor, and
a gate node of the each transistor is connected to a source node of the adjacent intrinsic transistor.