Patent ID: 11924008
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Digital communication (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A compensation circuit comprising:
a data analyzer configured to:
receive a first bit stream including first to N-th bits,
count a number of times of coincidence of each of first to 2M-th patterns from the first bit stream, a size of each pattern of the first to 2M-th patterns being M bits, and
generate a first pattern stream including first to 2M-th count values, each count value of the first to 2M-th count values corresponding to a number of times of coincidence of a corresponding pattern of the first to 2M-th patterns; and

a compensation calculator configured to determine first to 2M-th compensation values based on the first pattern stream such that results of multiplying the first to 2M-th count values by the first to 2M-th compensation values, respectively, are even,
wherein “N” is a natural number, and “M” is a natural number smaller than “N”.