Patent ID: 11947379
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A host interface in a host for communicating data with an external device, the host interface comprising:
a phase shift detector;
a phase shifter; and
control logic configured to control operation of the phase shift detector and the phase shifter,
wherein the host interface is configured to send a command and a main clock signal to the external device, receive a response from the external device, communicate data to the external device synchronously with the main clock signal, and sample data received from the external device synchronously with a modulated clock signal,
wherein the phase shift detector is configured to provide a shift value based on the response from the external device, and
the phase shifter is configured to modulate a phase of the main clock signal based on the shift value to generate the modulated clock signal,
wherein the control logic is further configured to generate an internal clock signal, and the phase shift detector includes:
a negative edge detector that is configured to detect a transition of the response from high to low based on a negative edge of the internal clock signal and to generate a negative edge detection signal; and
a negative edge counter that is configured to provide a negative edge count value based on the negative edge detection signal.