Patent ID: 11916122
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 16:
17. An integrated circuit, comprising:
a gate all around transistor, the gate all around transistor including:
a source region;
a drain region;
a plurality of semiconductor nanosheets corresponding to channel regions of the transistor and each extending between the source region and the drain region;
a cladding inner spacer extending vertically and in contact with the source region and each semiconductor nanosheet;
a plurality of sheet inner spacers each positioned between a respective pair of the semiconductor nanosheets and in contact with the cladding inner spacer and the source region, wherein the cladding inner spacer and the sheet inner spacers are different dielectric materials;
a gate dielectric positioned on the semiconductor nanosheets; and
a gate metal positioned on the gate dielectric and between the semiconductor nanosheets.