Patent ID: 11908950
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 19:
20. A semiconductor device, comprising:
a stack of two-dimensional (2D) semiconductor sheets, wherein individual ones of the 2D semiconductor sheets have a first end and a second end opposite from the first end;
a first spacer over the first end of the 2D semiconductor sheets;
a second spacer over the second end of the 2D semiconductor sheets, wherein the first end of the 2D semiconductor sheet is substantially coplanar with a surface of the first spacer, and wherein the second end of the 2D semiconductor sheet is substantially coplanar with a surface of the second spacer;
a gate electrode between the first spacer and the second spacer;
a source contact adjacent to the first end of the 2D semiconductor sheets; and
a drain contact adjacent to the second end of the 2D semiconductor sheets.