Patent ID: 11929366
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 14:
15. A semiconductor device, comprising:
a substrate including a first active region;
a first active pattern on the first active region;
a gate electrode across the first active pattern;
an interlayer dielectric layer covering the gate electrode;
a first connection line that fills a first trench of the interlayer dielectric layer, the first trench having a first width; and
a second connection line that fills a second trench of the interlayer dielectric layer, the second trench having a second width greater than the first width, and the second connection line including:
a first metal layer on an inner sidewall of the second trench of the interlayer dielectric layer,
a barrier layer on a bottom surface of the second trench of the interlayer dielectric layer, and
a second metal layer on the first metal layer and the barrier layer,
wherein the first metal layer contacts only a part of the bottom surface of the second trench,
wherein the first connection line and the first metal layer include a first metal, and the second metal layer includes a second metal different from the first metal, and
wherein the first metal layer is in contact with the second metal layer.