Patent ID: 11934703
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. A memory system, comprising:
a memory array of a memory device, the memory array comprising a plurality of memory cells, each memory cell comprising a storage element and a cell selection component;
a signal development component of the memory device;
an amplifier component of the memory device;
a switching component for selectively bypassing the signal development component or coupling the memory array with the signal development component; and
a controller operable to cause the memory system to:
identify a pattern of logic states stored in the memory array, wherein the memory array is coupled with a plurality of access lines;
selectively bypass, via the switching component, the signal development component, wherein the signal development component is operable to store a pattern of signal states associated with the pattern of logic states; and

couple the amplifier component with the memory array based at least in part on the switching component selectively bypassing the signal development component.