Patent ID: 11894331
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A method for forming a chip structure, comprising:
providing a substrate, an interconnect layer, and a conductive pad, wherein the interconnect layer is over the substrate, and the conductive pad is over the interconnect layer;
forming a conductive structure over the conductive pad, wherein the conductive structure comprises a first conductive layer, a second conductive layer, and a third conductive layer, the first conductive layer is between the conductive pad and the second conductive layer, the second conductive layer is between the first conductive layer and the third conductive layer, a first composition of the second conductive layer is different from a second composition of the first conductive layer and a third composition of the third conductive layer, and the second conductive layer is thicker than the first conductive layer and the third conductive layer; and
partially removing the second conductive layer, wherein the second conductive layer has a concave sidewall after partially removing the second conductive layer.