Patent ID: 11862594
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A package structure, comprising:
a semiconductor die;
conductive pillars, arranged aside of the semiconductor die;
an insulating encapsulation, encapsulating the semiconductor die and the conductive pillars, the insulating encapsulation having a first surface and a second surface opposite to the first surface, and wherein the conductive pillars penetrate through the insulating encapsulation;
a redistribution circuit structure, located on the first surface of the insulating encapsulation;
a solder resist layer, located on the second surface of the insulating encapsulation, wherein the solder resist layer is photosensitive, and a material of the solder resist layer comprises a filler;
first conductive elements, disposed on an outermost surface of the solder resist layer and electrically coupled to the conductive pillars;
second conductive elements, disposed on and electrically coupled to the redistribution circuit structure; and
at least one semiconductor device, disposed on and electrically coupled to the redistribution circuit structure, wherein the second conductive elements and the at least one semiconductor device are disposed on a side of the redistribution circuit structure.