Patent ID: 11956963
Assignee: SOGANG UNIVERSITY RESEARCH FOUNDATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 3:
4. A method of driving a 3-dimensional NAND flash memory device comprising a semiconductor channel layer vertically extending over a substrate; an information storage film vertically extending along a sidewall of the semiconductor channel layer; control gates surrounding at least a portion of the semiconductor channel layer with the information storage film that is disposed between the control gates and the semiconductor channel layer; and an interlayer insulating film separating the control gates from each other in a vertical direction perpendicular to a top surface of the substrate, the method comprising:
forming a fixed charge region in a portion of the information storage film under the control gates and a portion of the information storage film between the control gates by forming a first electric field between the control gates and the semiconductor channel layer; and
eliminating the fixed charge region formed in the portion of the information storage film under the control gates by forming a second electric field having a polarity opposite to that of the first electric field and having a strength smaller than that of the first electric field between the control gates and the semiconductor channel layer,
wherein, by the eliminating the fixed charge region formed in the portion of the information storage film under the control gates by forming the second electric field, fixed charges of the fixed charge region remain in the portion of the information storage film between the control gates, and the fixed charges remain in a charge trapping layer of the information storage film.