Patent ID: 11971836
Assignee: SHANGHAI CAMBRICON INFORMATION TECHNOLOGY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. The method of claim 6, wherein the primary processing circuit includes a dependency processing unit, wherein
the dependency processing unit determines whether there is an association between a first operation instruction and a zeroth operation instruction before the first operation instruction; if there is an association between the first operation instruction and the zeroth operation instruction, the dependency processing unit caches the first operation instruction in the instruction storage unit, and after the zeroth operation instruction is executed, the dependency processing unit fetches the first operation instruction from the instruction storage unit and sends the first operation instruction to the operation unit;
the determining whether there is an association between a first operation instruction and a zeroth operation instruction before the first operation instruction includes:
fetching a first storage address interval of data required in the first operation instruction according to the first operation instruction, fetching a zeroth storage address interval of data required in the zeroth operation instruction according to the zeroth operation instruction; if the first storage address interval and the zeroth storage address interval have an overlapping area, determining that there is an association between the first operation instruction and the zeroth operation instruction; and if the first storage address interval and the zeroth storage address interval do not have an overlapping area, determining that there is no association between the first operation instruction and the zeroth operation instruction.