Patent ID: 11861174
Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A non-transitory machine readable machine-readable medium comprising instructions that when executed cause a Non-Volatile Memory Express (NVME) controller to:
determine a utilization time of a host port in the NVME controller, wherein the host port is associated with a host and is to communicate with NVME storage devices, and the host port is to receive input/output (IO) requests from the host;
in response to determining that the utilization time of the host port is lower than a host port utilization threshold, create a candidate list of NVME storage devices based on utilizations, throughputs, busy time periods, and IO request completions of the NVME storage devices;
assign priority ranks to the NVME storage devices in the candidate list, wherein the assigning comprises, for each respective NVME storage device in the candidate list:
determine a number of read requests in a read IO queue associated with the respective NVME storage device and the NVME controller; and
assign a priority rank to the read IO queue based on the number of read requests; and

based on a first NVME storage device in the candidate list being assigned a highest priority rank of the priority ranks, prioritizing a processing of read requests in a read IO queue associated with the first NVME storage device over read requests in a read IO queue associated with another NVME storage device that is assigned a lower priority rank.