Patent ID: 11908747
Assignee: TOKYO ELECTRON LIMITED
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A method of processing a substrate, the method comprising:
forming a first layer stack on a substrate, the first layer stack including conductive layers and dielectric layers that alternate in the first layer stack and a capping layer formed over the first layer stack;
forming an opening in the first layer stack, the opening extending through each of the conductive layers in the first layer stack such that sidewalls of each of the conductive layers are exposed within the opening, and such that a semiconductor surface of the substrate is exposed;
forming a second stack of layers within the opening, the second stack of layers including channel layers of semiconductor material positioned in the second stack of layers such that each channel layer contacts exposed sidewalls of a respective conductive layer of the first layer stack, the second stack of layers formed by epitaxially growing sacrificial layers of semiconductor material that alternate with the channel layers of semiconductor material in the second stack, and forming a second capping layer over the second stack of layers;
depositing a second mask layer over the second capping layer of the second stack of layers, such that a second mask layer extends over the second capping layer to overlap a portion of the capping layer, wherein a width of the second mask layer is equal to a second predetermined distance; and
forming transistor channels from the channel layers of the second stack such that each transistor channel extends between exposed sidewalls of a respective conductive layer within the opening.