Patent ID: 11899975
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. An apparatus, comprising:
a non-volatile memory;
a volatile memory configured to operate as a cache for the non-volatile memory; and
an interface controller coupled with the non-volatile memory and the volatile memory, the interface controller comprising:
a machine learning engine configured to:
group, according to one or more shared characteristics, commands received from a host device during a training mode; and
detect one or more patterns associated with the commands based at least in part on grouping the commands;

circuitry configured to store and manage commands for the non-volatile memory and the volatile memory; and
a command decoder configured to receive a first command from the host device and communicate the first command to the circuitry and to the machine learning engine, wherein the machine learning engine is further configured to:
generate a second command based at least in part on information that is determined by the machine learning engine, during the training mode, based at least in part on the one or more patterns; and communicate the second command to the circuitry.