Patent ID: 11864375
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A memory, comprising,
a substrate, wherein the substrate comprises an isolation structure and an active area between the isolation structure and an adjacent second isolation structure;
a first gate structure, wherein the first gate structure is located in a first groove of the isolation structure and comprises a first gate filled in the first groove, the first gate comprises a first conductive layer filled at a bottom of the first groove and a second conductive layer located above the first conductive layer, and a work function of a material of the first conductive layer is greater than a work function of a material of the second conductive layer;
a second gate structure, wherein the second gate structure is located in a second groove of the active area and comprises a second gate filled in the second groove, a material of the second gate is same as the material of the second conductive layer, and the second conductive layer filled in the second groove is the second gate; and
a third groove, the third groove having an opening width less than an opening width of the first groove in a direction parallel to a surface of the substrate and being filled with a third gate structure,
wherein a material of the first gate structure is different from a material of the second gate structure, and a material of the third gate structure is same as the material of the second gate structure.