Patent ID: 11900986
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 6:
7. The semiconductor memory device according to claim 2, comprising
a first circuit connected to any of the plurality of second gate electrodes and any of the plurality of third gate electrodes, wherein
the first circuit includes:
a first input terminal to which first data is input; and
a second input terminal to which second data is input,

a first voltage is applied to the second gate electrode and a second voltage different from the first voltage is applied to the third gate electrode when the first data is in a first state and the second data is in the first state,
the second voltage is applied to the second gate electrode and the first voltage is applied to the third gate electrode when the first data is in the first state and the second data is in a second state different from the first state,
the second voltage is applied to the second gate electrode and the first voltage is applied to the third gate electrode when the first data is in the second state and the second data is in the first state, and
the first voltage is applied to the second gate electrode and the second voltage is applied to the third gate electrode when the first data is in the second state and the second data is in the second state.