Patent ID: 11972126
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A system, comprising:
processor circuitry communicatively coupled to a memory, wherein the processor circuitry is to:
receive a memory access request corresponding to an application for access to first data associated with an address range in a memory allocation allocated for the application, the address range including a first portion of the first data to be accessed and at least a portion of a metadata region of the memory allocation;
locate the metadata region within the memory allocation; and
based on the address range including at least a portion of the metadata region:
obtain first metadata stored in the metadata region;
use the first metadata to determine an alternate memory address in a relocation region; and
read, at the alternate memory address, displaced data having an original address in the portion of the metadata region included in the address range in the memory allocation.