Patent ID: 11915758
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. The memory device of claim 13, wherein the controller is further configured to:
with the first data bit equal to a first value and the second data bit equal to the first value, apply the first voltage level to the first node, turn on the first transistor, and turn off the second transistor to apply the first voltage level to the data line;
with the first data bit equal to a second value and the second data bit equal to the first value, turn off the first transistor and turn on the second transistor to apply the second voltage level to the data line;
with the first data bit equal to the first value and the second data bit equal to the second value, apply the third voltage level to the first node, turn on the first transistor, and turn off the second transistor to apply the third voltage level to the data line; and
with the first data bit equal to the second value and the second data bit equal to the second value, turn off the first transistor and turn off the second transistor to apply a fourth voltage level to the data line, the fourth voltage level between the first voltage level and the third voltage level.