Patent ID: 11935790
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A method of manufacturing a field effect transistor, the method comprising:
alternately stacking sacrificial layers and insulating layers on a substrate to provide a stack structure;
patterning the stack structure using a mask to provide a patterned stack structure;
forming a source electrode and a drain electrode on both sides of the patterned stack structure;
removing the sacrificial layers, the removing the sacrificial layers leaving the insulating layers suspended between the source electrode and the drain electrode and separated from each other in a direction perpendicular to the substrate;
forming channels by depositing a channel material on the insulating layers;
depositing a gate insulating layer on the channels;
and depositing a gate electrode on the gate insulating layer.