Patent ID: 11862467
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method of manufacturing a semiconductor structure, comprising:
providing a substrate;
forming a plurality of fin structures over the substrate;
forming an insulation material in a plurality of gaps between the fin structures;
forming a sacrificial layer on the fin structures and the insulation material;
applying a plurality of ion implantation cycles to the fin structures in-situ with stepwise increased or decreased energy and in a stepwise increased or decreased temperature; and
removing at least a portion of the insulation material to expose at least a top portion of each fin structure,, wherein applying the plurality of ion implantation cycles comprises:
performing a first ion implantation with a first implantation energy to form a first implanted region of the fin structures;
performing a second ion implantation with a second implantation energy to form a second implanted region of the fin structures; and
performing a third ion implantation with a third implantation energy to form a third implanted region of the fin structures.