Patent ID: 11900153
Assignee: SAP SE
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 32:
33. One or more computer-readable storage media comprising:
computer-executable instructions that, when executed by a computing system comprising at least one hardware processor and at least one memory coupled to the at least one hardware processor, cause the computing system to determine an amount of processing resources in the computing system, the processing resources comprising a plurality of threads associated with a plurality of respective processing cores of one or more respective processing sockets; and
computer-executable instructions that, when executed by the computing system, cause the computing system to define one or more virtual domains for the computing system, virtual domains of the one or more virtual domains comprising a defined portion of the processing resources and one or more data structure instances, wherein the defined portion of the processing resources for at least one virtual domain of the one or more virtual domains is defined with respect to one or more processing sockets of the computing system, wherein a given processing socket of the one or more processing sockets comprises a plurality of processing cores, and wherein the defined portion of the processing resources for the at least one virtual domain is specified as:
(1) one or more particular processing cores, or one or more particular threads of the one or more particular processing cores, of a given processing socket of the one or more processing sockets, the one or more particular processing cores being less than all of the plurality of processing cores available for the given processing socket; or
(2) a portion of one or more particular processing cores, or one or more particular threads of the one or more particular processing cores, of the plurality of the processing cores of a plurality of processing sockets of the computing system, wherein less than all of the plurality of processing cores for at least one processing socket of the plurality of processing sockets are comprised within the portion; and
wherein particular processing cores, or particular threads of particular processing cores, assigned to a virtual domain are dynamically reconfigurable.