Patent ID: 11901236
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 11:
12. The IC of claim 11, wherein the first transistor is in a first area of the IC, further comprising:
a second transistor on the substrate in a second area of the IC, wherein the first area is different from the second area,
wherein the second transistor includes:
two second source/drain features,
a second fin base portion on the substrate,
a stack of third semiconductor layers above the second fin base portion and electrically connecting the two second source/drain features,
a second gate dielectric layer wrapping around each of the third semiconductor layers,
a second gate electrode over the second gate dielectric layer, and
second dielectric spacers disposed laterally between the second gate dielectric layer and each of the two second source/drain features.