Patent ID: 11876024
Assignee: NANYA TECHNOLOGY CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of operating a benchmark device embedded on a semiconductor wafer, the method comprising:
forming a diode on the substrate, wherein the diode has a first doped region, a second doped region, and a first diode conductive contact disposed on the first doped region, and a second diode conductive contact disposed on the second doped region, wherein the first doped region includes a N-type dopant and the second doped region includes a P-type dopant;
forming a transistor on substrate, wherein the transistor has a gate conductor;
electrically connecting a first component to the gate conductor through a first conductive contact;
electrically connecting a second component to the first doped region through the first diode conductive contact, wherein the first diode conductive contact serves as a cathode of the diode;
electrically connecting a third component to the second doped region through the second diode conductive contact;
electrically connecting a disconnecting switch between the first component and the second component;
applying a first voltage to a first electrode, wherein the first electrode is disposed on the third component and serves as an anode of the diode;
applying a second voltage to a second electrode, wherein the second electrode is disposed on the first component and serves as a gate electrode of the transistor, wherein the first voltage and the second voltage are configured to produce a current through the disconnecting switch from the first electrode to the second electrode along the third component, the second component and the first component; and
electrically isolating the first component from the second component through the disconnecting switch when the current exceeds a breaking capacity of the disconnecting switch.