Patent ID: 11936388
Assignee: M31 TECHNOLOGY CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. A method for locking an output clock of an oscillator, comprising:
accumulating a portion of a first digital code to generate a second digital code, wherein a rate of change of a code value of the second digital code being slower than a rate of change of a code value of the first digital code;
generating a first control current according to the first digital code and the second digital code;
generating a second control current according to the second digital code;
generating a third control current according to the second digital code and a third digital code, wherein each of the first control current and the third control current tracks the second control current;
adjusting a frequency of the output clock according to the first control current and the second control current; and
adjusting a phase of the output clock according to the third control current.