Patent ID: 11960167
Assignee: BOE MLED TECHNOLOGY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 15:
16. A method for manufacturing a backplane, comprising:
providing a substrate, the substrate including a circuit structure layer;
forming a first reflective layer and a plurality of light-emitting diode chips on the substrate, the first reflective layer including a plurality of through holes spaced apart, a light-emitting diode chip in the plurality of light-emitting diode chips being located in one of the plurality of through holes, the plurality of light-emitting diode chips being electrically connected to the circuit structure layer, and the circuit structure layer being configured to drive the plurality, of light-emitting diode chips to emit light; and
forming a plurality of optical structures on the substrate on which the plurality of light-emitting diode chips have been formed through a dispensing process, an optical structure in the plurality of optical structures covering the light-emitting diode chip in the plurality of light-emitting diode chips, a light incident surface of the optical structure being in contact with a light exit surface of light-emitting diode chip, and a light exit surface of the optical structure being a curved surface,
wherein the method further comprises:
forming a second reflective layer on the circuit structure layer, wherein the first reflective layer, the second reflective layer and the circuit structure layer are disposed in respective different lavers, and the second reflective layer and the circuit structure layer are located on a same side of the first reflective layer,
wherein the second reflective layer is located on a side of the circuit structure layer proximate to the first reflective layer; the second reflective layer includes a plurality of hollow-out portions; the circuit structure layer includes a plurality of pads; a hollow-out portion in the plurality of hollow-out portions exposes at least one of the plurality of pads; and a single light-emitting diode chip is electrically connected to two of the plurality of pads; or
wherein the second reflective layer is located on a side of the circuit structure layer away from the first reflective layer; the circuit structure layer has a plurality of metal wiring regions and a plurality of light-transmitting regions, a light-transmitting region being located between two adjacent metal wiring regions; the circuit structure layer includes a plurality of pads; a metal wiring region is provided with pads therein; a single light-emitting diode chip is electrically connected to two of the pads in the metal wiring region; and the light-transmitting region is configured to transmit a portion of light emitted by the light-emitting diode chip and reflected by the second reflective laver.