Patent ID: 11966471
Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G  H

Claim 5:
6. A non-transitory computer-readable data storage medium storing program code executable by secure circuitry to:
track a latency between when an interrupt occurred and when the interrupt was processed;
track an interval between consecutive occurrences of the interrupt; and
in response to either or both of the latency exceeding a latency limit and the interval exceeding an interval limit, performing, by the secure circuitry, an action, wherein:
the latency limit corresponds to a maximum length of time in which a processor different than and securely isolated from the secure circuitry and responsible for handling the interrupt is expected to handle the interrupt; and
the latency exceeding the latency limit indicates that the processor is impermissibly not handling the interrupt in a timely manner.