Patent ID: 11923363
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 15:
16. A method for fabricating a semiconductor structure, comprising:
etching a channel between a pair of gate structures down into a semiconductor substrate of the semiconductor structure;
growing a first sacrificial epitaxial layer in the channel;
growing a bottom source/drain region in the channel on the first sacrificial epitaxial layer;
growing a second sacrificial epitaxial layer in the channel on the bottom source/drain region;
growing a top source/drain region in the channel on the second sacrificial epitaxial layer;
removing the first and second sacrificial epitaxial layers, the removal exposing surfaces of the semiconductor substrate, bottom source/drain region and top source/drain region; and
forming a dielectric layer on the exposed surfaces of the semiconductor substrate, bottom source/drain region and top source/drain region.