Patent ID: 11886291
Assignee: DELL PRODUCTS L.P.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A method, comprising:
coupling, by a memory bus, a memory module of an information handling system to a memory controller of a processor of the information handling system, wherein the processor is configured to utilize data with a cache line size, wherein the memory module is configured to store and retrieve data with a memory line size, and wherein the cache line size is an integer multiple (A) of the memory line size;
calculating, by the memory controller, error correction code (ECC) data for an integer number (B) of memory lines of user data; and
generating, by the memory controller, metadata related to the user data for chunks of data that are equal to an integer number (C) of cache lines, where B<A*C and C is greater than one.