Patent ID: 11874724
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A system comprising:
a first device;
a second device connected to the first device by a point-to-point link; and
an extension device positioned between the first device and second device in the link to extend physical distance of the link, wherein the extension device comprises:
error detection circuitry to detect a set of errors at the extension device;
an event register, wherein the extension device is to write data to the event register to describe detection of an error by the error detection circuitry; and
a transmitter to transmit a notification signal to indicate the detection of the error and presence of the data in the event register associated with the error to a controller associated with at least one of the first device and the second device, wherein the notification signal comprises a signal to be sent on a dedicated interrupt pin.