Patent ID: 11886377
Assignee: CORNAMI, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H  Y | IPC G  H

Claim 16:
17. A plurality of reconfigurable arithmetic circuits arranged in an array, each reconfigurable arithmetic circuit, of the plurality of reconfigurable arithmetic circuits, comprising:
a plurality of input reordering queues configured to store a plurality of inputs, the plurality of input reordering queues comprising input reordering logic circuitry configured to reorder a sequence of the plurality of inputs of a reconfigurable arithmetic circuit and an adjacent reconfigurable arithmetic circuit of the plurality of reconfigurable arithmetic circuits;
a multiplier shifter and combiner network coupled to the plurality of input reordering queues;
an accumulator circuit;
at least one control logic circuit coupled to the multiplier shifter and combiner network and to the accumulator circuit;
a plurality of output reorder queues configured to reorder outputs from the reconfigurable arithmetic circuit and the adjacent reconfigurable arithmetic circuit of the plurality of reconfigurable arithmetic circuits; and
a configurable interconnection network coupled to the multiplier shifter and combiner network, the configurable interconnection network configurable to interconnect at least two reconfigurable arithmetic circuits, of the plurality of reconfigurable arithmetic circuits, to perform double precision multiply-adds, single precision single cycle complex multiply, Fast Fourier Transform (“FFT”) butterfly, exponent resolution, multiply-accumulate, and one or more logic operations.