Patent ID: 11966619
Assignee: NEXT SILICON LTD
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An apparatus for executing a software program, comprising at least one hardware processor configured for:
controlling what is executed while execution of at least one remote memory access instruction has not completed, by selecting when compiling the software program an identified task of a software program other than a first task of the software program, where the first task comprises the at least one remote memory access instruction and where the identified task is a functional task of the software program; and
after selecting the identified task:
identifying in a plurality of computer instructions, executed by the software program to perform the first task, the at least one remote memory access instruction and a following instruction following the at least one remote memory access instruction;
executing after the at least one remote memory access instruction a sequence of other instructions for performing the identified task, where the sequence of other instructions comprises a return instruction to execute the following instruction; and
executing the following instruction;

wherein executing the sequence of other instructions comprises executing an updated plurality of computer instructions produced by at least one of:
inserting into the plurality of computer instructions the sequence of other instructions or at least one flow-control instruction to execute the sequence of other instructions; and
replacing the at least one remote memory access instruction with at least one non-blocking memory access instruction.