Patent ID: 11861791
Assignee: SPREADTRUM COMMUNICATIONS (SHANGHAI) CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 4:
5. A device for tetrahedral interpolation calculation, comprising:
a first subtractor, a second subtractor, a third subtractor, a first multiplier, a second multiplier, a third multiplier, a first adder, a second adder, and a third adder;
wherein for the first subtractor, a positive input terminal is applied with a mapping value of a fourth vertex of a tetrahedron, a negative input terminal is applied with a mapping value of a third vertex of the tetrahedron, and an output terminal is applied with a first input terminal of the first multiplier;
for the second subtractor, a positive input terminal is applied with the mapping value of the third vertex of the tetrahedron, a negative input terminal is applied with a mapping value of a first vertex of the tetrahedron, and an output terminal is applied with a first input terminal of the second multiplier;
for the third subtractor, a positive input terminal is applied with a mapping value of a second vertex of the tetrahedron, a negative input terminal is applied with the mapping value of the first vertex of the tetrahedron, and an output terminal is applied with a first input terminal of the third multiplier;
for the first multiplier, a second input terminal is applied with an X-axis coordinate data of an interpolation point in a sampling space, and an output terminal is applied with a first input terminal of the first adder;
for the second multiplier, a second input terminal is applied with a Y-axis coordinate data of the interpolation point in the sampling space, and an output terminal is applied with a first input terminal of the second adder;
for the third multiplier, a second input terminal is applied with a Z-axis coordinate data of the interpolation point in the sampling space, and an output terminal is applied with a second input terminal of the second adder;
for the first adder, a second input terminal is applied with the mapping value of a first vertex of the tetrahedron, and an output terminal is applied with a first input terminal of the third adder;
for the second adder, an output terminal is applied with a second input terminal of the third adder; and
for the third adder, an output terminal outputs an interpolation value of the interpolation point.