Patent ID: 11962640
Assignee: EMC IP HOLDING COMPANY LLC
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC G  H

Claim 0:
1. A system, comprising:
a processor; and
a memory that stores executable instructions that, when executed by the processor, facilitate performance of operations, comprising:
receiving a file in parts, the parts comprising a first part, a second part, and a third part;
in response to receiving the first part, the first part having a first part number and a first value of a first length, writing the first part to a first temporary file that corresponds to the first value at a first location of the first temporary file based on the first part number;
in response to receiving the second part, the second part having a second part number and a second value of a second length, and in response to the second value equaling the first value, writing the second part to the first temporary file at a second location of the first temporary file based on the second part number;
in response to receiving the third part, the third part having a third part number and a third value of a third length of the third part, and in response to the third value differing from the first value, writing the third part to a second temporary file at a third location of the second temporary file based on the third part number;
after receiving the first part, the second part, and the third part, writing data of the second temporary file to an end of the first temporary file; and
changing a first name of the first temporary file to a second name of the file.