Patent ID: 11908695
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A device, comprising:
a first source/drain region and a second source/drain region formed in a substrate;
a gate structure over the substrate between the first source/drain region and the second source/drain region, wherein the gate structure comprises a gate dielectric layer and one or more conductive layers over the gate dielectric layer;
a first spacer on a sidewall of the gate structure, a first sidewall of the first spacer facing the gate structure and a second sidewall of the first spacer facing away from the gate structure, the first sidewall of the first spacer having a first slope; and
a second spacer on the second sidewall of the first spacer opposite the gate structure, wherein a sidewall of the second spacer facing the first spacer having a second slope different than the first slope.