Patent ID: 11942142
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. An apparatus, comprising:
a first main word line;
a second main word line;
a third main word line;
a first subword driver coupled to a first common transistor and the first main word line;
a second subword driver coupled to the first common transistor and the second main word line;
a third subword driver coupled to a second common transistor and the first main word line; and
a fourth subword driver coupled to the second common transistor and the third main word line, wherein
the apparatus further comprises a gate that is disposed between the first and the third main word lines on a diffusion sub region, and
a width of the diffusion sub region includes a portion where the gate intersects that is narrower than other portions of the diffusion sub region.