Patent ID: 11875838
Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 4:
5. The memory device according to claim 1,
wherein the first memory cell comprises an eleventh transistor, a twelfth transistor, a thirteenth transistor, and a first capacitor,
wherein the second memory cell comprises a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, and a second capacitor,
wherein a gate of the eleventh transistor is electrically connected to a first terminal of the twelfth transistor and a first terminal of the first capacitor,
wherein a first terminal of the eleventh transistor is electrically connected to a first terminal of the thirteenth transistor,
wherein a second terminal of the thirteenth transistor is electrically connected to the first wiring,
wherein a gate of the fourteenth transistor is electrically connected to a first terminal of the fifteenth transistor and a first terminal of the second capacitor,
wherein a first terminal of the fourteenth transistor is electrically connected to a first terminal of the sixteenth transistor, and
wherein a second terminal of the sixteenth transistor is electrically connected to the second wiring.