Patent ID: 11876102
Assignee: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
Field: Optics (Instruments)
Classification: CPC H  G | IPC G  H

Claim 16:
17. The display substrate according to claim 1, wherein,
an interlayer insulation layer is arranged between the plurality of gate lines and the plurality of data lines;
the interlayer insulation layer extends between the pixel electrode and the corresponding common electrode;
the conductive connection portion further comprises a first connection portion that is disposed in a via in the interlayer insulation layer disposed on the common electrode and is in contact with the common electrode, and a second connection portion that is disposed in a via in the interlayer insulation layer disposed on the common electrode line and is in contact with the common electrode line; and
at least one of the first connection portion and the second connection portion comprises a hole, which comprises a first portion and a second portion, a depth of the first portion being greater than that of the second portion.