Patent ID: 11925026
Assignee: BESANG, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 15:
16. A 3D NVM module, comprising:
a logic layer formed on a substrate and comprising a memory control circuit; and
blocks of memory array formed on said logic layer, with each of said blocks of memory array comprising:
conductive lines formed over said logic layer and parallel to one another;
semiconductor pillars formed on said conductive lines, arranged in an array, and forming bodies of vertical transistors;
a composite gate dielectric disposed on each of said semiconductor pillars;
a control gate disposed on said composite gate dielectric and surrounding a middle portion of each of said semiconductor pillars;
a first set of 3D vias formed on said logic layer outside or between said blocks of memory array;
a first set of metal lines disposed over said semiconductor pillars and on said first set of 3D vias;
and wherein:
said array has a bit-line direction and a word-line direction, perpendicular to each other;
said conductive lines and said first set of metal lines stretch in said bit-line direction;
said first set of 3D vias are coupled to said memory control circuit; and
each of said first set of metal lines couples respective one or more of said first set of 3D vias to a respective group of said semiconductor pillars that are along a respective line stretching in said bit-line direction.