Patent ID: 11972503
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A method of operating a graphics processor that is operable to execute a graphics processing pipeline that comprises plural processing stages including an early culling tester followed by a renderer;
wherein the graphics processor comprises one or more culling test data buffers, wherein each of the one or more culling test data buffers is operable to store a respective set of data values for use by the early culling tester;
the method comprising maintaining information, wherein:
the information indicates whether or not a processing stage of the graphics processing pipeline after the early culling tester is expected to read from the one or more culling test data buffers; and
the information separately indicates whether or not a processing stage of the graphics processing pipeline after the early culling tester is expected to write to the one or more culling test data buffers;

the method further comprising: using the information to control the early culling tester.