Patent ID: 11971451
Assignee: THE 13TH RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 1:
2. The method according to claim 1, wherein calculating the admittance of the on-wafer calibration piece according to the S parameter comprises:
calculating the admittance of the on-wafer calibration piece according to following formula:, {
  
    
      
        
          
            
              S
              11
            
            =
            
              
                
                  Z
                  open
                
                -
                
                  Z
                  0
                
              
              
                
                  Z
                  open
                
                +
                
                  Z
                  0
                
              
            
          
        
      
      
        
          
            
              Y
              =
              
                1
                
                  Z
                  open
                
              
            
            ⁢
            
              
            
          
        
      
    
    ,, wherein S11 denotes the S parameter of the on-wafer calibration piece, Y denotes the admittance of the on-wafer calibration piece, Zopen denotes an impedance of the first open circuit calibration piece, and Z0 denotes a system feature impedance.