Patent ID: 11953927
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Control (Instruments)
Classification: CPC G | IPC G

Claim 18:
19. A method for manufacturing a bias voltage generating circuit comprising:
forming the bias voltage generating circuit, comprising:
a reference bias section comprising a first diode-connected transistor pair and a second diode-connected transistor pair, the first diode-connected transistor pair includes a diode-connected p-type transistor and a diode-connected n-type transistor; and
a driving section connected to the reference bias section, the driving section comprising a first transistor pair, wherein a drain and a gate of the diode-connected p-type transistor of the first diode-connected transistor pair and a drain and a gate of the diode-connected n-type transistor of the first diode-connected transistor pair are connected to a gate of a n-type transistor of the first transistor pair;

supplying a first voltage to the first diode-connected transistor pair;
supplying a second voltage to the second diode-connected transistor pair;
generating a third voltage in response to the first voltage and the second voltage.