Patent ID: 11886228
Assignee: PSEMI CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A circuit that enables common control of one or more agent devices by two or more buses using mutually exclusive arbitration, the circuit including:
(a) at least two decoders, each including:
(1) at least one common register;
(2) a bus decoder coupled to the at least one common register and configured to be coupled to a respective bus, the bus decoder configured to assert a write-complete signal when a write operation to a corresponding one of the at least one common register is completed;

(b) a multiplexer having at least two selectable input bus ports each coupled to one of the at least one common register within respective ones of the at least two decoders, and an output port configured to be coupled to at least one of the one or more agent devices; and
(c) a selection circuit, coupled to two or more of the bus decoders and to the multiplexer, the selection circuit configured to select an input bus port of the multiplexer in response to the assertion of a last write-complete signal from the coupled bus decoders.