Patent ID: 11862591
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor die, comprising:
a semiconductor substrate;
a dielectric layer over the semiconductor substrate;
a bond pad in the dielectric layer, the bond pad including a top surface that is recessed with respect to a surface of the dielectric layer opposite to the semiconductor substrate;
a conductive buffer layer on the bond pad, wherein the conductive buffer layer includes aggregates of conductive particles, and is flexible to deform in response to pressure applied to the conductive buffer layer; and
a sacrificial layer between the top surface of the bond pad and the conductive buffer layer, wherein the conductive buffer layer adheres to the sacrificial layer, wherein the sacrificial layer is configured to decompose at a temperature greater than 100° C.