Patent ID: 11930646
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 15:
16. A resistive memory device comprising:
a plurality of memory cells in a first area and a second area on a substrate;
a plurality of encapsulation insulating layers in contact with sidewalls of each of the plurality of memory cells in the first area and the second area; and
a plurality of gap fill insulating layers configured to fill a space between each of the plurality of memory cells at locations apart from each of the plurality of memory cells in a horizontal direction in the first area and the second area, the plurality of gap fill insulating layers having a thermal expansion coefficient greater than that of a constituent material of the plurality of encapsulation insulating layers, the horizontal direction being parallel to the substrate,
wherein the plurality of memory cells comprise a plurality of active memory cells in the first area and comprising a first resistive memory pattern having a first width in the horizontal direction, and a plurality of dummy memory cells in the second area and comprising a second resistive memory pattern having a second width in the horizontal direction, and the first width is less than the second width.