Patent ID: 11910392
Assignee: QUALCOMM INCORPORATED
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 26:
27. A user equipment (UE), comprising:
a memory;
at least one transceiver; and
at least one processor communicatively coupled to the memory and the at least one transceiver, the at least one processor configured to:
determine a configuration of a no-downlink-scheduling gap for one or more bandwidth parts (BWPs) of the UE, the no-downlink-scheduling gap comprising at least time-domain parameters related to scheduling the no-downlink-scheduling gap; and
receive, via the at least one transceiver, from a neighboring base station, in the one or more BWPs, a downlink positioning reference signal (DL-PRS) during the no-downlink-scheduling gap, wherein:
the UE does not receive any downlink transmissions from a serving base station during the no-downlink-scheduling gap inside the one or more BWPs, or
the UE ignores any downlink transmissions from the serving base station during the no-downlink-scheduling gap in the one or more BWPs, or
the UE prioritizes DL-PRS processing over any other downlink transmissions from the serving base station during the no-downlink-scheduling gap in the one or more BWPs, and

transmit, via the at least one transceiver, in the one or more BWPs, an uplink positioning reference signal during the no-downlink-scheduling gap.