Patent ID: 11869610
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. The storage device according to claim 12, wherein the writing circuit unit comprises:
an equalizing circuit, electrically connected to each of the first positive data wire, the first negative data wire, and the equalizing signal;
a first control unit, electrically connected to each of the first positive data wire, the equalizing circuit, the writing enable signal, and the second data wire, and configured to control the first positive data wire to be connected to a high level or a low level according to the writing enable signal; and
a second control unit, electrically connected to each of the first negative data wire, the equalizing circuit, the writing enable signal, and the second data wire, and configured to control the first negative data wire to be connected to a high level or a low level according to the writing enable signal.