Patent ID: 11907105
Assignee: SONY INTERACTIVE ENTERTAINMENT LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. A non-transitory computer readable medium having computer readable executable instructions embodied therein, the instructions being configured to cause a device having a Graphics Processing Unit (GPU) to implement a method upon execution of the instructions, the method comprising:
running the device in a timing testing mode with a Central Processing Unit (CPU) core, wherein in the timing testing mode the device is configured to disrupt timing of processing that takes place on the GPU while running an application with the GPU; and
testing the application for errors in device hardware component synchronization and/or software component synchronization while the device is running in the timing testing mode, wherein disrupting the timing of processing that takes place on the GPU while running an application with the GPU includes an operating system (OS) replacing firmware of the GPU.