Patent ID: 11947804
Assignee: NVIDIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A method comprising:
identify a configuration stored within a control register of a device, wherein the configuration indicates an external memory device of one or more external memory devices coupled to the device;
detect, at a hardware component of the device coupled with an interface to the external memory device, an input/output (IO) request associated with the external memory device;
responsive to detecting the IO request, store a first timestamp in a data register;
detect, at the hardware component, an indication from the external memory device of a completion of the IO request associated with the external memory device;
responsive to detecting the indication, store a second timestamp in the hardware register; and
determine, by an averaging unit of the device, a latency associated with the IO request using the first timestamp and the second time stamp.