Patent ID: 11893454
Assignee: RIGETTI & CO, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The method of claim 1, comprising, prior to selecting the two-dimensional target boundary face of the three-dimensional color code to perform dimensional reduction:
performing a gauge fixing procedure on qubit devices in the three-dimensional device lattice;
partitioning the data qubits into a first set and a second set, each data qubit in the first set is only communicably coupled to a data qubit in the second set;
applying k-repetition of a first rotation gate on each data qubit in the first set and applying k-repetition of a second rotation gate on each data qubit in the second set, wherein k is a solution to k(|Q|−|QC|≡1) mod 2n, and the second rotation gate is an inverse of the first rotation gate; and
applying the three-dimensional color code in the three-dimensional device lattice to detect errors in the data qubits residing in the multiple layers.