Patent ID: 11862278
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory test system, comprising:
a plurality of test devices, each of which is provided with a test interface used for connecting a memory to be tested;
a host computer, respectively connected to the plurality of test devices and configured to control the plurality of test devices to test the memory to be tested; and
driving modules, connected to the plurality of test devices and configured to output, to the plurality of test devices, driving signals used for driving the plurality of test devices to perform data interaction with the host computer; wherein
the driving modules comprise:
first driving units, configured to transmit, to the plurality of test devices, first driving signals used for driving the plurality of test devices to perform data interaction with the host computer; and
test units, configured to store test programs; and

the host computer comprises:
a second driving unit, by which the host computer is connected to the plurality of test devices, the second driving unit being configured to transmit, in response to the first driving signals, a second driving signal to the plurality of test devices to realize the data interaction between the plurality of test devices and the host computer.