Patent ID: 11870452
Assignee: NXP USA, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 18:
19. The apparatus of claim 15, further comprising an odd conversion module configured to:
detect the first absolute value signal for a degree of oddness of the first absolute value by determining an existence of leading bits “1” in the first absolute value, and
detect the second absolute value signal for a degree of oddness of the second absolute value by determining an existence of leading bits “1” in the second absolute value; and
divide the first absolute value by 2 until the divided value therefrom become an odd first odd value, and provide a first odd value signal indicative of the first odd value and a first exponent value signal indicative of a first exponent value which is number of times the first absolute value is divided; and
divide the second absolute value by 2 until the divided value therefrom become an odd second odd value, and provide a second odd value signal indicative of the second odd value and a second exponent value signal indicative of a second exponent value which is number of times the second absolute value is divided;
wherein the first conversion module is configured to use the first odd value signal to provide the first logarithmic signal indicative of a logarithmic value of the first odd value; and the second conversion module is configured to use the second odd value signal to provide the second logarithmic signal indicative of a logarithmic value of the second odd value; and wherein
the subtractor module is configured to provide the subtract value signal by subtracting the logarithmic value of the first odd value from the logarithmic value of the second odd value and then adding a logarithmic offset value into a difference value of the subtracting; wherein the logarithmic offset value is a difference value of subtracting the first exponent value from the second exponent value then multiplied by log(2).