Patent ID: 11960416
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. The memory controller of claim 14, wherein the set of memory channel queues includes a set of real-time memory channel queues corresponding to the memory channels and a set of non-real-time memory channel queues corresponding to the memory channels, wherein the first memory request is a non-real-time memory request, and wherein the memory controller is further configured to:
receive a second memory request from the peripheral, wherein the second memory request is a real-time memory request;
place one or more portions of the second memory request in the real-time memory channel queues;
select a second memory channel queue, wherein the second memory channel queue is included in the set of real-time memory channel queues, and wherein the set of real-time memory channel queues are prioritized before the set of non-real-time memory channel queues;
present one or more portions of the second memory request to the second arbitration module; and
output the presented one or more portions of the second memory request when the presented one or more portions of the second memory request are selected by the second arbitration module.