Patent ID: 11914885
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory controller controlling a memory device with memory cells that are included in a plurality of strings, respectively, the memory controller comprising:
a state detector detecting whether the memory device is in an idle state;
a program controller selecting neighboring strings that are adjacent to a string that comprises a memory cell, among the memory cells, on which a program operation or a read operation was performed, based on detection information that indicates a state of the memory device, selecting monitoring memory cells that are coupled to at least one word line, the monitoring memory cells being a part of the neighboring strings, and controlling the memory device to perform a plurality of loops to program the monitoring memory cells; and
a bad block selector selecting a memory block with the monitoring memory cells as a bad block based on a rate of increase in threshold voltage of a threshold voltage distribution of the monitoring memory cells.