Patent ID: 11948997
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. An integrated circuit structure, comprising:
a nanowire comprising a semiconductor material, the nanowire having a channel region;
a gate electrode completely surrounding the channel region of the nanowire, the gate electrode having a first side and a second side opposite the first side;
first and second semiconductor source or drain regions adjacent the first and second sides of the gate electrode, respectively;
a trench contact structure over one of the first or second semiconductor source or drain regions, the trench contact structure comprising a U-shaped metal layer and a T-shaped metal layer on and over the entirety of the U-shaped metal layer; and
a dielectric material between the gate electrode and the trench contact structure, wherein the dielectric material has a top surface above a top surface of the T-shaped metal layer of the trench contact structure.