Patent ID: 11941253
Assignee: EMC IP HOLDING COMPANY LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. The computing system of claim 13, wherein the processor is further configured to:
identify the secondary node as an initiator node, wherein the initiator node receives a commit request via the secondary node, wherein the commit request includes a request to commit data within the vaulted memory to the persistent media;
transfer, via a secondary node, a dirty bitmap and a page descriptor to the primary node; process, in response to transferring the dirty bitmap and page descriptor via the primary node, the dirty bitmap and page descriptor, wherein processing the dirty bitmap and page descriptor includes removing the page descriptor, allocating a new page descriptor, logging the new page descriptor with a data offset, wherein the data offset is an index of a remote node, and updating a cache of the cache memory system;
send an update, in response to processing the dirty bitmap and page descriptor, to the secondary node via the primary node, wherein the update includes the new page descriptor; and
log the update with the new page descriptor in the secondary node.