Patent ID: 11972837
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 9:
10. The data transmitter circuit of claim 8, wherein each of the plurality of sampling circuits comprises:
an input unit configured to sink current from an output bar node to a common source node in response to input data corresponding to each of the plurality of sampling circuits among the multibit data;
an input bar unit configured to sink current from an output node to the common source node in response to data obtained by inverting the input data corresponding to each of the plurality of sampling circuits among the multibit data;
a first pull-up driving unit configured to pull up the output node in response to a voltage level of the output bar node;
a second pull-up driving unit configured to pull up the output bar node in response to a voltage level of the output node;
a first sinking unit configured to sink current from the common source node to a ground terminal; and
a second sinking unit activated when a corresponding speed control signal of the speed control signals is deactivated, and configured to sink current from the common source node to the ground terminal.