Patent ID: 11894310
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A fan-out semiconductor package, comprising:
a first redistribution layer including a first line wiring and a first via connected to the first line wiring;
a first semiconductor chip on the first redistribution layer;
an interconnector on the first redistribution layer and spaced apart from the first semiconductor chip;
a molded layer covering the interconnector and covering side surfaces of the first semiconductor chip;
a second redistribution layer on the molded layer, the second redistribution layer including a second line wiring and a second via connected to the second line wiring; and
a semiconductor package that includes a second semiconductor chip on the second redistribution layer and connected to the second line wiring,
wherein:
the interconnector includes a metal ball that has a full spherical shape,
the first via is in contact with the interconnector,
the second via is in contact with the interconnector,
a part of the second via is inside the molded layer,
the first semiconductor chip is electrically connected to the second semiconductor chip through the first line wiring, the first via, the interconnector, the second via, and the second line wiring,
an interface between the first via and the interconnector is a curved surface such that the first via has a rounded concavity that is complementary to the full spherical shape of the interconnector, and
an interface between the second via and the interconnector is a curved surface such that the second via has a rounded concavity that is complementary to the full spherical shape of the interconnector.