Patent ID: 11909413
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 16:
17. The semiconductor integrated circuit according to claim 15, wherein
the reference signal generator includes:
a plurality of reference memory cells arranged in the first direction and each storing the first data;
a reference wiring pair provided to correspond to the plurality of reference memory cells arranged in the first direction, and that includes one reference wiring which is discharged when multiplication data of the first data, stored in each of the plurality of reference memory cells, and the second data, supplied by the first wiring corresponding to the reference memory cell, is the first logic; and another reference wiring which is discharged when the multiplication data is the second logic;
a first reference digital signal generator that generates a reference binary signal whose logic transitions at a timing according to a discharge amount of the one reference wiring; and
a second reference digital signal generator that generates a reference binary signal whose logic transitions at a timing according to a discharge amount of the other reference wiring, and
the plurality of first wirings are provided to correspond to each of the plurality of reference memory cells arranged in the first direction, and supply the second data to be multiplied by the first data.