Patent ID: 11922404
Assignee: LINE PLUS CORPORATION
Field: IT methods for management (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. A computer apparatus comprising:
at least one processor configured to execute computer-readable instructions;
a security area; and
a hardware security module (HSM), wherein the at least one processor is configured to cause the computer apparatus to,
receive a first certificate from a terminal of an end user through short-distance communication;
transmit a second certificate stored in the security area to the terminal through short-distance communication, wherein the second certificate comprises a unique device identifier of the computing apparatus, a public key of the HSM included in the computing apparatus, issuing authority information, and an expiration date;
authenticate the terminal by verifying the first certificate;
in response to successful authentication of the terminal, receive a nonce value from the terminal through short-distance communication in an offline situation;
sign a remittance transaction including first last transaction information stored in the security area, the received nonce value, and a hash value of a security value using a private key of the HSM, and transmit the signed remittance transaction to the terminal;
cause the terminal to verify the remittance transaction using the public key in the second certificate;
cause the terminal to verify whether the nonce value included in the remittance transaction is identical to the nonce value received by the at least one processor;
transmit an original text of the security value of the signed remittance transaction to the terminal, in response to receiving a verification success message from the terminal; and
store second last transaction information according to the remittance transaction and latest balance of an electronic wallet (E-wallet) in the security area.