Patent ID: 11868300
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. An apparatus comprising:
a first device configured as a serial peripheral interface (SPI) primary device and coupled to multiple other devices using an SPI interface, wherein the first device is configured to:
send a first message via an SPI bus using the SPI interface, the first message comprising a first command field and a payload, wherein the first message indicates a particular action by a second device of the multiple other devices, the second device configured as an SPI secondary device and configured to receive the first message via the SPI bus, and wherein the first command field comprises one or more bits that indicates an initial request for the particular action by the second device;
receive a response message from the second device in response to the first message and via the SPI bus, wherein the response message comprises a secondary device status field indicating a response deferral; and
in response to receiving the response message, send a second message via the SPI bus using the SPI interface, the second message comprising a second command field that comprises one or more bits that indicates a subsequent request for the particular action by the second device, wherein the one or more bits in the first command field is different than the one or more bits in the second command field.