Patent ID: 11892774
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 17:
18. A method, comprising:
forming a negative photoresist over a dielectric layer;
exposing an overlap region of the negative photoresist to a first light-exposure through a first mask, wherein a portion of the overlap region is unexposed by a first opaque region of the first mask during the first light-exposure, wherein the first opaque region of the first mask has a shape of a circle;
after exposing the negative photoresist to the first light-exposure, exposing the overlap region of the negative photoresist to a second light-exposure through a second mask, wherein the portion of the overlap region remains unexposed;
developing the negative photoresist to remove the portion of the overlap region, to form an opening in the overlap region; and
patterning the dielectric layer to form a via hole.