Patent ID: 11953936
Assignee: SILICON LABORATORIES INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 17:
18. An integrated circuit comprising:
a switch;
an oscillator to output a clock signal;
a first resistor coupled between the switch and a pad of the integrated circuit, the pad to couple to a first pin external to a die of the integrated circuit;
a second resistor coupled between the pad and a supply voltage pad of the integrated circuit, the supply voltage pad to couple to a second pin external to the die of the integrated circuit; and
a core circuit configured to control the switch, wherein the core circuit is cause the switch to open during a reset mode in which a reset flow of the integrated circuit occurs and thereafter cause the switch to close in a non-reset mode to cause the clock signal to be superimposed on a reset signal at the pad.