Patent ID: 11914527
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A system for increasing computing efficiency in a computing environment, comprising:
one or more computers with executable instructions that when executed cause the system to:
identify a first type memory and a second type memory in a computing system, wherein the second type memory is slower than the first type memory while having a greater storage capacity compared to the first type memory;
identify a plurality of application processes executing in the computing system;
provide, by the processor, private regions of the first type memory as a cache of the second type memory for each of the plurality of application processes;
dynamically enable or disable, by the processor, one of the private regions in the first type memory for a respective one of the plurality of application processes upon the respective one of the plurality of application processes becoming active or inactive, wherein, responsive to a respective one of the plurality of application processes previously being active and becoming inactive, cache region addresses in the first type of memory associated with the respective one of the plurality of application processes are erased from a cache controller while preserving cache region addresses in the second type memory associated with the respective one of the plurality of application processes, and wherein, upon the respective one of the plurality of application processes active again after becoming inactive, the cache region addresses in the first type of memory are reloaded and stored in the cache controller; and
dynamically change a size of the one of the private regions in the first type memory for the respective one of the plurality of application processes depending on one or more performance requirements for the respective one of the plurality of application processes.