Patent ID: 11862566
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A semiconductor device in which a cell array region and an extension region are arranged along a first direction, and in which contact regions and through regions are alternately arranged along the first direction in the extension region, the semiconductor device comprising:
a mold structure including a plurality of gate electrodes, which are stacked on a substrate to be spaced apart from one another;
a channel structure that penetrates the mold structure in the cell array region to intersect the plurality of gate electrodes;
an extension gate cutting region that extends in the first direction to cut the plurality of gate electrodes in the mold structure in the contact regions; and
a plurality of insulating patterns, stacked on same levels as the plurality of gate electrodes, in the mold structure in the through regions, each of the insulating patterns including a first side that extends along the first direction and a second side that forms arcs that are centered around ends of the extension gate cutting region.