Patent ID: 11900040
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. A system, comprising a processor and one or more programs including instructions which, when executed by the processor, cause the system to:
receive a design layout comprising a feature in a peripheral region of the design layout;
determine compensation values associated with a pellicle assembly and the peripheral region according to an exposure distribution in an exposure field of a workpiece;
dissecting an edge of the feature into edge segments;
partitioning the peripheral region into compensation zones;
assigning the compensation values to the respective compensation zones; and
reducing line widths of the feature on a basis of the edge segments according to the compensation values associated with the respective compensation zones; and
perform a lithography operation that transfers a pattern of the feature to the workpiece.