Patent ID: 11863300
Assignee: GENERAL ELECTRIC COMPANY
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A system comprising:
one or more processors configured to determine a clock drift and a clock variance of each node in plural nodes of a time-sensitive network, the one or more processors also configured to determine an accumulated clock offset along a time-sensitive network path in the time-sensitive network based on the clock drifts and the clock variances that are determined, the one or more processors also configured to determine a guard band having a dynamic size based on the accumulated clock offset and an eigenvalue centrality metric, the one or more processors configured to communicate the guard band with the dynamic size to the nodes, the one or more processors configured to allocate the guard band to at least one of the nodes, the guard band restricting when Ethernet frames are communicated through the at least one of the nodes.