Patent ID: 11950455
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A transistor substrate comprising:
a substrate including a first region and a second region;
a first buffer layer on top of and contacting the substrate in the first region and including silicon nitride;
a second buffer layer on top of and contacting the first buffer layer in the first region and on top of and contacting the substrate in the second region, the second buffer layer including silicon oxide;
a first transistor in the first region on the second buffer layer and including a first oxide semiconductor layer and a first gate electrode overlapping the first oxide semiconductor layer; and
a second transistor in the second region on the second buffer layer and including a second oxide semiconductor layer and a second gate electrode overlapping the second oxide semiconductor layer.