Patent ID: 11961892
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. A semiconductor structure, comprising:
a first fin;
a second fin spaced apart from the first fin by an isolation structure;
a first epitaxial feature disposed on the first fin;
a second epitaxial feature disposed on the second fin and merging with the first epitaxial feature at a merged portion;
a dielectric layer disposed over the first epitaxial feature, the second epitaxial feature, and the isolation structure;
a semiconductor alloy layer extending from a top surface of the dielectric layer, through the dielectric layer to contact the first epitaxial feature, the second epitaxial feature and the merged portion; and
a metal layer disposed over and in direct contact with the semiconductor alloy layer,
wherein a space between the first epitaxial feature and the second epitaxial feature as well as below the merged portion comprises a gap,
wherein a portion of the isolation structure is exposed in the gap.