Patent ID: 11869847
Assignee: ICOMETRUE COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A multichip package comprising:
a non-volatile memory (NVM) integrated-circuit (IC) chip comprising a plurality of first metal contacts at a top thereof;
a polymer layer at a same horizontal level as the non-volatile memory (NVM) integrated-circuit (IC) chip;
a field-programmable-gate-array (FPGA) integrated-circuit (IC) chip over the non-volatile memory (NVM) integrated-circuit (IC) chip and polymer layer and coupling to the non-volatile memory (NVM) integrated-circuit (IC) chip, wherein the field-programmable-gate-array (FPGA) integrated-circuit (IC) chip comprises a plurality of second metal contacts at a bottom thereof, wherein each of the plurality of first metal contacts couples to one of the plurality of second metal contacts, wherein the field-programmable-gate-array (FPGA) integrated-circuit (IC) chip is to be configured in accordance with configuration data stored in the non-volatile memory (NVM) integrated-circuit (IC) chip; and
a plurality of metal bumps at a bottom of the multichip package.