Patent ID: 11948622
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method, comprising:
activating a first circuit to couple a node with a first voltage supply for supplying voltage to a set of word lines in a memory array, the node coupled with a set of digit lines in the memory array;
applying a first voltage to the set of digit lines based at least in part on activating the first circuit, the first voltage based at least in part on a voltage output by the first voltage supply;
activating a second circuit to couple the node with a second voltage supply for supplying voltage to peripheral circuitry; and
applying a second voltage to the set of digit lines based at least in part on activating the first circuit, the second voltage based at least in part on a voltage output by the second voltage supply.