Patent ID: 11934295
Assignee: THE BOEING COMPANY
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A non-transitory computer readable storage device including instructions that when executed by a processor perform an operation comprising:
monitoring a plurality of debug trace data streams for a redundantly operating system including a corresponding plurality of cores performing a task in parallel, wherein a consensus of output values between the plurality of cores controls the redundantly operating system, and wherein the plurality of cores are in lockstep when the output values are unanimous;
in response to detecting a state difference on one debug trace data stream of the plurality of debug trace data streams relative to other debug trace data stream of the plurality of debug trace data streams:
marking a core associated with the one debug trace data stream as an affected core, wherein the affected core is ignored by the redundantly operating system until a restart of the affected core; and
restarting the affected core, wherein the restarted core is returned to lockstep with the plurality of cores.