Patent ID: 11940942
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A Peripheral Component Interconnect Express (PCIe) interface device, comprising:
a transaction layer generating a transaction packet for transmission of a transaction;
a data link layer generating a link packet including a protection code and a sequence number for the transaction packet, based on the transaction packet;
a physical layer generating a physical packet based on the link packet and sequentially outputting the physical packet;
a link training module for performing a negotiation for a link coupled through the physical layer, the link training module determining whether a link down, which occurs when a negotiation of a link does not occur, is a link down requested by a host or a link down not requested by the host; maintaining a data information when the link down is not requested by the host; and initializing the data information when the link down is requested by the host; and
a PCIe register storing information about the transaction layer, the data link layer, the physical layer, and the link training module.