Patent ID: 11864369
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A device comprising:
a first horizontal-gate-all-around (HGAA) transistor and a second HGAA transistor adjacent to each other;
a first vertical-gate-all-around (VGAA) transistor comprising:
a first bottom source/drain epitaxial structure connected to the first HGAA transistor;
a first nanowire over the first bottom source/drain epitaxial structure; and
a first top source/drain epitaxial structure over the first nanowire; and

a second VGAA transistor comprising:
a second bottom source/drain epitaxial structure connected to the second HGAA transistor and electrically isolated from the first VGAA transistor, wherein a portion of the second bottom source/drain epitaxial structure is suspended over the first HGAA transistor;
a second nanowire over the second bottom source/drain epitaxial structure; and
a second top source/drain epitaxial structure over the second nanowire.