Patent ID: 11868245
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method performed by a memory device, the method comprising:
receiving a first memory access command from a host, the first memory access command to access a memory array of the memory device;
determining that the first memory access command is a sequential read command;
determining whether an LBA-to-physical address (L2P) region of an L2P cache includes a first LBA received with the first memory access command;
in response to determining the first LBA of the first memory access command is not within the L2P cache and that the first memory access command is a sequential read command, performing one load of multiple L2P regions of an L2P table from the memory array to the L2P cache;
determining a first physical address of the memory array based on the first LBA and at least a first L2P region of the multiple L2P regions within the L2P cache; and
executing the first memory access command based on the first physical address.