Patent ID: 11940495
Assignee: PSEUDOLITHIC, INC.
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 0:
1. A method of forming an electronic assembly having built-in self-test of chiplets, the method comprising:
bonding a host wafer having a first circuit including a plurality of wafer transistors and a plurality of wafer passive, non-transistor devices to an encapsulation layer;
bonding a plurality of chiplets having a second circuit including at least one radio frequency (RF) chiplet transistor to the encapsulation layer;
forming electrical interconnects between the chiplets and wafer, wherein the electrical interconnects electrically connect the first circuit to the second circuit; and
forming a plurality of oscillators each having some of the plurality of wafer transistors, the at least one RF chiplet transistor of a chiplet and some of the electrical interconnects, wherein each oscillator of the plurality of oscillators produces a signal for the built-in self-test circuit for testing an assembly design of the electronic assembly and a speed of the at least one RF chiplet transistor of the chiplet.