Patent ID: 11972126
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 23:
24. An apparatus, comprising:
processor circuitry to be communicatively coupled to a memory, wherein the processor circuitry is to:
receive a memory access request corresponding to an application to store first data in an address range in a memory allocation allocated for the application, the address range to include a first portion of the first data to be accessed and to overlap, at least partially, a metadata region in the memory allocation;
locate the metadata region within the memory allocation; and
based on the address range at least partially overlapping the metadata region:
obtain first metadata stored in the metadata region;
use the first metadata to determine an alternate memory address in a relocation region; and
store a second portion of the first data in the relocation region based on the alternate memory address.