Patent ID: 11916523
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A modulation apparatus comprising:
a subtraction circuit to which an input voltage is applied;
an amplification circuit, connected to the subtraction circuit, comprising:
an amplifier having an inverting terminal and a non-inverting terminal, the non-inverting terminal connected to a reset voltage node;
a first capacitor connected to the inverting terminal, the input voltage being applied to the first capacitor;
a second capacitor connected to the inverting terminal and an output terminal of the amplifier; and
a duty-cycled resistor, connected in parallel to the second capacitor, comprising a first resistor;
an integration circuit connected to the amplification circuit; and
a quantization circuit connected to the integration circuit and configured to output an output signal through an output terminal,
wherein the duty-cycled resistor is configured to connect the first resistor and the inverting terminal and to disconnect the first resistor and the reset voltage node during a first time interval included in a period to complete an on-and-off cycle of the duty-cycled resistor, and to disconnect the first resistor and the inverting terminal and to connect the first resistor and the reset voltage node during a second time interval included in the period, and
wherein the subtraction circuit comprises the first capacitor, and a feedback capacitive digital-to-analog converter (FB CDAC) configured to connect the output terminal to the inverting terminal.