Patent ID: 11908535
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A method of operating a storage device comprising a memory device and a memory controller, the memory device comprising a plurality of normal word lines and at least one spare word line, the method comprising: detecting at least one of the normal word lines as a weak word line; setting an operation mode of memory cells connected to the weak word line to a first operation mode and setting an operation mode of memory cells connected to the at least one spare word line to a second operation mode; receiving a write request from a host; and writing data to at least one of the memory cells connected to the weak word line and the memory cells connected to the at least one spare word line, based on the set operation mode, wherein memory cells connected to the plurality of normal word lines are set to a third operation mode configured to write (n+m)-bit data, and wherein the first operation mode is configured to write n-bit data to the memory cells connected to the weak word line, the second operation mode is configured to write m-bit data to the memory cells connected to the at least one spare word line, and each of n and m is a natural number greater than or equal to 1 and m is greater than n.