Patent ID: 11925017
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A semiconductor device, comprising:
a substrate, comprising an isolation structure and an active area defined by the isolation structure;
a stacked gate structure on the substrate;
a wall structure on the substrate and laterally aside the stacked gate structure, wherein the wall structure comprises a plurality of stacks arranged along a first direction and then turned into a second direction perpendicular to the first direction, wherein the stacks are extended continuously along the first direction and segmented in the second direction; and
a first conductive layer, wherein the first conductive layer is disposed between segmented portions of the stacks of the wall structure along the second direction, each stack comprises a first dielectric layer and a second conductive layer stacked on the first dielectric layer, and the stacked gate structure extends along the first direction, and top surfaces of the segmented portions of the stacks of the wall structure are higher than a top surface of the first conductive layer.