Patent ID: 11879933
Assignee: TSMC NANJING COMPANY, LIMITED
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 0:
1. A method of testing an integrated circuit on a test circuit board, the integrated circuit including a set of circuit blocks and a first set of heaters, the method comprising:
performing, by a processor, a simulation of a first heat distribution throughout an integrated circuit design, the integrated circuit design being configured to operate at simulated design power levels, and to generate the first heat distribution, and corresponding to the integrated circuit;
manufacturing the integrated circuit according to the integrated circuit design; and
simultaneously performing a burn-in test of the integrated circuit and an automated test of the integrated circuit, the integrated circuit being configured to operate according to the simulated design power levels and being coupled to the test circuit board, wherein the burn-in test has a minimum burn-in temperature of the integrated circuit and a burn-in heat distribution across the integrated circuit.