Patent ID: 11863569
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. At least one non-transitory machine-readable medium including instructions for bus-off attack detection and prevention, the instructions when executed by bus-off prevention circuitry coupled to a protected node on a bus, wherein the bus-off prevention circuitry is disposed between the protected node and the bus, and is to serve as a dedicated proxy for the protected node, cause the bus-off prevention circuitry to perform operations comprising:
detecting a transmitted message from the protected node to the bus;
detecting a bit mismatch of the transmitted message on the bus;
suspending further transmissions from the protected node while the bus is analyzed by using a bypass channel to transmit the transmitted message back to the protected node;
determining whether the bit mismatch represents a bus fault or an active attack against the protected node; and
signaling the protected node indicating whether a fault has occurred, wherein suspending further transmission from the protected node comprises using the bypass channel to transmit an altered message back to the protected node, the altered message including a bit flipped from the transmitted message such that the further transmission from the protected node is suspended.