Patent ID: 11934695
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A storage device, comprising:
a plurality of memory dies; and
one or more processors coupled to the plurality of memory dies, the one or more processors, individually or in combination, configured to:
adjust parameters of unaligned host write commands to identify with aligned write commands, wherein to adjust includes that, for each respective one of the unaligned host write commands, the parameters including a start offset and a command length of the respective one of the unaligned host write commands are adjusted to generate a respective aligned write command including a same amount of corresponding host data as the respective one of the unaligned host write commands, the unaligned host write commands being adjusted prior to fetching of pre-pad data or post-pad data to generate aligned data for the aligned write commands;
generate unaligned information associated with the unaligned host write commands, the unaligned information indicating offset information for the each of the unaligned host write commands;
accumulate a threshold size of aligned write command transfer sizes in an aggregation command queue;
fetch one or more of the pre-pad data or the post-pad data for each of the unaligned host write commands in parallel based on the aggregation command queue having accumulated the threshold size of the aligned write command transfer sizes;
transfer host data for each of the unaligned host write commands to a data buffer at a corresponding offset within the data buffer based on the unaligned information;
generate the aligned data using the one or more of the pre-pad data or the post-pad data combined with the host data; and
perform a write operation that programs the aligned data into at least one of the plurality of memory dies.