Patent ID: 11921623
Assignee: SECURED-IC SAS
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The device of claim 1, wherein the statistical tests comprise the AIS runs Test which provides a sum value T3(N,k) for each run of length k, the lower threshold L3,k and the higher threshold H3,k for each run of length k being equal to:, L
      
       3
       ,
       k
      
     
     =
     
      
       μ
       
        N
        ,
        k
       
      
      -
      
       
        
         2
         ×
         
          μ
          
           N
           ,
           k
          
         
        
       
       ×
       
        
         erfc
         
          -
          1
         
        
        (
        α
        )
       
      
     
    
   
  
  
   
    
     
      
       H
       
        3
        ,
        k
       
      
      =
      
       
        μ
        
         N
         ,
         k
        
       
       +
       
        
         
          2
          ×
          
           μ
           
            N
            ,
            k
           
          
         
        
        ×
        
         
          erfc
          
           -
           1
          
         
         (
         α
         )
        
       
      
     
     ,
    
   
  
 

with α representing the target error probability and, μ
   
    N
    ,
    k
   
  
  =
  
   
    N
    
     2
     
      k
      +
      2
     
    
   
   .