Patent ID: 11880933
Assignee: IMAGINATION TECHNOLOGIES LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. The graphics processing system of claim 12, wherein the front depth test logic circuitry is further configured to:
maintain a record of each pixel sample in the tile for which a best depth value is available;
in response to making a determination that a primitive or a primitive fragment has better depth than the primitives previously processed for the tile:
determine whether the record indicates that the best depth value is available for each pixel sample in the tile associated with that primitive or that primitive fragment;
in response to making a determination that the record indicates that the best depth value is not available for any of the pixel samples in the tile associated with that primitive or that primitive fragment, identify the primitive or primitive fragment as not requiring a full resolution depth test; and
update the record to indicate that the best depth value is available for each pixel sample in the tile associated with that primitive or that primitive fragment; and

in response to not identifying a primitive or primitive fragment as not requiring a read of the depth buffer to perform full resolution depth testing, update the record to indicate that the best depth value is available for each pixel sample of the tile.