Patent ID: 11908508
Assignee: nan
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A method, comprising:
writing first data to a memory array of a memory device in accordance with a programming sequence,
wherein the programming sequence defines an order of memory locations in the memory device to which the first data is to be written,
wherein writing the first data includes writing the first data to volatile memory cells of a first memory region of the memory array before volatile memory cells of a second memory region of the memory array,
wherein the programming sequence is defined prior to writing the first data to the volatile memory cells of the first memory region,
wherein the first memory region is positioned before the second memory region in the order of the memory locations; and

updating the programming sequence after writing the first data, such that the memory device is configured to write second data to volatile memory cells of the second memory region before writing the second data to volatile memory cells of the first memory region.