Patent ID: 11907547
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H  Y | IPC G  H

Claim 1:
2. The memory device of claim 1, wherein the controller is further configured to cause the memory device to:
determine whether the priority token of the memory device has a particular value of a plurality of values; and
in response to determining that the priority token of the memory device has the particular value:
in response to determining that there is sufficient available current budget to initiate the next phase of the access operation in the selected operating mode, change the priority token of the memory device to a different value of the plurality of values, and output the expected peak current magnitude for the next phase of the access operation in the selected operating mode and the priority token of the memory device having the different value to the node and store the expected peak current magnitude for the next phase of the access operation in the selected operating mode and the priority token of the memory device having the different value to the one register of the plurality of registers; and
in response to determining that there is insufficient available current budget to initiate the next phase of the access operation in the selected operating mode, output an expected peak current magnitude for a normal operating mode and the priority token of the memory device having the particular value to the node.