Patent ID: 11948924
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A combined semiconductor device package comprising:
a first semiconductor device package comprising:
a first semiconductor chip housed within a first enclosure;
a first substrate coupled to the first enclosure on a first side of the first substrate, the first substrate including a first plurality of solder balls and a second plurality of solder balls, the first plurality of solder balls and the second plurality of solder balls each in electrical communication with the first semiconductor chip; and
a plurality of conductive pads directly coupled to the first substrate on a second side of the first substrate, the second side opposite the first side of the first substrate, the plurality of conductive pads in electrical communication with the first plurality of solder balls and the second plurality of solder balls;

a second semiconductor device package comprising:
a second semiconductor chip housed within a second enclosure; and
a third plurality of solder balls in electrical communication with the second semiconductor chip, the third plurality of solder balls coupled to the plurality of conductive pads of the first semiconductor device package; and

a second substrate including an opening,
wherein the first and second semiconductor device packages are configured to couple to the second substrate, the second enclosure being sized to extend through the opening in the second substrate.