Patent ID: 11972836
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. A storage device comprising:
a first nonvolatile memory including a plurality of first memory blocks;
a second nonvolatile memory including a plurality of second memory blocks; and
a controller electrically coupled with the first nonvolatile memory and the second nonvolatile memory,
wherein the controller is configured to input first data bits to the first nonvolatile memory, and input second data bits to the second nonvolatile memory,
the controller is configured to adjust a delay of a first data strobe signal if edges of the first data bits are not detected, until the edges of the first data bits are detected,
the controller is configured to align centers of the first data bits to an edge of the first data strobe signal,
the first nonvolatile memory is configured to output a second data strobe signal to the controller, and
the controller is configured to control the first nonvolatile memory to sweep the second data strobe signal to detect delays between the first data bits.