Patent ID: 11875752
Assignee: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 17:
18. The display panel according to claim 1, wherein the functional film layers comprise a gate line pattern and a light-emission control signal line pattern in each of the plurality of subpixel zones; in the same subpixel zone, the gate line pattern, the light-emission control signal line pattern, the reset signal line pattern and the initialization signal line pattern are sequentially arranged along the second direction;
the functional film layers further comprise a power signal line pattern and a data line pattern in each of the plurality of subpixel zones, and the power signal line pattern and the data line pattern both comprise a portion extending along the second direction;
the display panel further comprises:
light-emitting elements in a one-to-one correspondence with the plurality of subpixel zones; and
subpixel driving circuits in a one-to-one correspondence with the plurality of subpixel zones, wherein each subpixel driving circuit comprises a driving transistor, a first transistor, a second transistor, a fourth transistor, a fifth transistor, a sixth transistor and a seventh transistor;
in the same subpixel zone, a gate electrode of the driving transistor is coupled to a second electrode of the first transistor, a first electrode of the driving transistor is coupled to a second electrode of the fifth transistor, and a second electrode of the driving transistor is coupled to a first electrode of the first transistor;
a gate electrode of the first transistor is coupled to the gate line pattern;
a gate electrode of the second transistor is coupled to the reset signal line pattern in the previous subpixel zone adjacent along the second direction, a first electrode of the second transistor acts as the target coupling part in the previous subpixel zone and a second electrode of the second transistor is coupled to the gate electrode of the driving transistor;
a gate electrode of the fourth transistor is coupled to the gate line pattern, a first electrode of the fourth transistor is coupled to the data line pattern, and a second electrode of the fourth transistor is coupled to the first electrode of the driving transistor;
a gate electrode of the fifth transistor is coupled to the light-emission control signal line pattern, and a first electrode of the fifth transistor is coupled to the power signal line pattern;
a gate electrode of the sixth transistor is coupled to the light-emission control signal line pattern, a first electrode of the sixth transistor is coupled to the second electrode of the driving transistor, and a second electrode of the sixth transistor is coupled to the corresponding light-emitting element; and
a second electrode of the seventh transistor is coupled to the light-emitting element, a gate electrode of the seventh transistor is coupled to the reset signal line pattern, and a first electrode of the seventh transistor is coupled to the second initialization signal line pattern.