Patent ID: 11887685
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A Fail Bit (FB) repair method, comprising:
determining a bank to be repaired of a chip to be repaired, the bank to be repaired comprising multiple target repair regions;
performing first repair processing on a first FB in each target repair region by using a redundant circuit;
after first repair processing is performed, executing a second FB position determination step to determine a bit position of a second FB in each target repair region, and performing second repair processing on the second FB according to the bit position of the second FB; and
determining unrepaired FBs in each target repair region, and recursively executing the second FB position determination step to obtain a test repair position of each unrepaired FB to perform third repair processing on the unrepaired FB according to the test repair position;
wherein said determining the unrepaired FBs in each target repair region and recursively executing the second FB position determination step to obtain the test repair position of each unrepaired FB to perform third repair processing on the unrepaired FB according to the test repair position comprises:
if the bank feature map state is the second initial state, determining whether the bank feature map state is consistent with a sixth determination state in the second state set, the sixth determination state comprising that the available RBL count is greater than the second preset numerical value and the maximum WL FB count is greater than the second preset numerical value; and
if the bank feature map state is consistent with the sixth determination state, executing a repair processing step in the sixth determination state,
wherein the repair processing step in the sixth determination state comprises:
determining FBL serial numbers corresponding to the FB feature map, traversing positions corresponding to the FBL serial numbers one by one, and triggering executing of the first initial repair processing step;
recursively executing the second FB position determination step, and determining acquired positions to be repaired as test repair positions;
calculating test repair costs corresponding to the test repair positions, and determining a minimum test repair cost and a target repair position corresponding to the minimum test repair cost; and
performing repair processing on the target repair position by using the redundant circuit.