Patent ID: 11881502
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A semiconductor device comprising:
a substrate;
a plurality of lower electrodes disposed over the substrate, the plurality of lower electrodes including a plurality of first lower electrodes and a plurality of second lower electrodes that are respectively arranged in a first direction and alternately arranged in a second direction that is perpendicular to the first direction, each of the plurality of lower electrodes is pillar-shaped;
a supporter structure contacting the plurality of lower electrodes;
a plurality of supporter holes disposed in the supporter structure and arranged in the first direction and in the second direction;
a dielectric layer disposed on a side surface and on a top surface of each of the plurality of lower electrodes; and
an upper electrode disposed on the dielectric layer,
wherein each of the plurality of second lower electrodes is offset from each of the plurality of first lower electrodes with respect to the second direction,

one of the plurality of supporter holes exposes two of the plurality of first lower electrodes and exposes two of the plurality of second lower electrodes among the plurality of lower electrodes,
a width of the one of the plurality of supporter holes in the first direction is less than a width of the one of the plurality of supporter holes in the second direction,
the plurality of supporter holes are offset from one another with respect to the first direction and with respect to the second direction, and
an area of a side surface of at least one of the two of the plurality of first lower electrodes that are exposed by the one of the plurality of supporter holes is greater than an area of a side surface of at least one of the two of the plurality of second lower electrodes that are exposed by the one of the plurality of supporter holes.