Patent ID: 11923849
Assignee: QUALCOMM INCORPORATED
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. The frequency divider of claim 9, wherein the second plurality of N 3-input NOR gates is arranged from an (N+1)th 3-input NOR gate to an 2Nth 3-input NOR gate and the second plurality of N non-overlapping clock signal is arranged from an (N+1)th non-overlapping clock signal to a 2Nth non-overlapping clock signal, and wherein the (N+1)th 3-input NOR gate is configured to output the (N+1)th non-overlapping clock signal, an (N+2)th 3-input NOR gate is configured to output an (N+2)th non-overlapping clock signal, and so on such that the 2Nth 3-input NOR gate is configured to output the 2Nth non-overlapping clock signal.