Patent ID: 11916026
Assignee: QUALCOMM INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 34:
35. An apparatus for circuit protection, comprising:
first and second transistors coupled in series between a power bus and a ground;
means for biasing a gate of the first transistor and a gate of the second transistor based on a supply voltage on the power bus; and
means for turning on the first and second transistors in response to a voltage transient on the power bus exceeding a trigger threshold voltage including a means for capacitive voltage dividing coupled between the power bus and the ground, the means for capacitive voltage dividing comprising a first capacitor coupled between the gate of the first transistor and the gate of the second transistor, and a second capacitor coupled between the gate of the second transistor and the ground,
wherein the apparatus is coupled between the power bus and the ground, in parallel with a circuit that is supplied with power by the power bus.