Patent ID: 11895825
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A dynamic random access memory (DRAM) device comprising:
an insulating base including a trench;
a first memory cell comprising:
a first transistor formed within the trench; and
a first capacitor comprising:
a first trench capacitor portion including a first lower conductive layer formed within the trench;
a first stacked capacitor portion including a first plurality of stacked conductive layers formed outside the trench;

a second memory cell comprising:
a second transistor formed within the trench; and
a second capacitor comprising:
a second trench capacitor portion including a second lower conductive layer formed within the trench; and
a second stacked capacitor portion including a second plurality of stacked conductive layers formed outside the trench; and

an isolation layer formed within the trench and isolating the first memory cell from the second memory cell.