Patent ID: 11894856
Assignee: REALTEK SEMICONDUCTOR CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A digital-to-analog conversion method having signal calibration mechanism, comprising:
receiving an input digital signal having an input digital codeword from a signal source by a DAC circuit to perform digital-to-analog conversion to generate an output analog signal;
processing the output analog signal by an echo transmission circuit to generate an echo signal;
receiving the input digital signal and performing mapping from a codeword offset mapping table according to the input digital codeword by a calibration circuit to generate an offset signal, wherein the codeword offset mapping table comprises a plurality of correspondence relations each corresponds to a codeword and a codeword offset;
processing the offset according to a group of echo-canceling coefficients by an echo-canceling circuit to generate an echo-canceling signal;
performing subtraction between the echo signal and the echo-canceling signal by an error calculating circuit to generate an error signal;
performing one-dimensional inversion on the echo-canceling coefficients and further performing calculation on the inverted echo-canceling coefficients and the error signal by an inverted error calculating circuit to generate an inverted error value; and
updating the codeword offset of one of the correspondence relation in the codeword offset mapping table according to the inverted error value based on a path delay of the echo-canceling circuit and the inverted error calculating circuit by an offset updating circuit.