Patent ID: 11954492
Assignee: APPLE INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. A non-transitory computer readable storage medium having stored thereon design information that specifies a design of at least a portion of a hardware integrated circuit in a format recognized by a semiconductor fabrication system that is configured to use the design information to produce the circuit according to the design, wherein the design information specifies that the circuit includes:
a plurality of channel pipelines for a plurality of channels, wherein the channel pipeline for a given channel includes a decode stage;
a plurality of execution pipelines shared by the channel pipelines and configured to perform different types of operations provided by the channel pipelines;
first scheduler circuitry configured to assign threads to channels;
second scheduler circuitry configured to assign an operation from a given channel to a given execution pipeline based on decode of an operation for that channel; and
dependency circuitry configured to, for a first operation that depends on a prior operation that uses one of the execution pipelines, determine, based on status information for the prior operation from the one of the execution pipelines, whether to stall the first operation or to deactivate a thread that includes the first operation from its assigned channel.