Patent ID: 11877454
Assignee: SK HYNIX INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 3:
4. The method of claim 1, wherein replacing the sacrificial layers in the cell array region with a plurality of gate electrodes and replacing the sacrificial layers, the air gaps, and the multi-layer sacrificial structures in the contact region with a plurality of multi-layered pad portions comprises:
forming a slit by etching the capping layer, the plurality of sacrificial layers, and the plurality of dielectric layers;
forming a plurality of horizontal recesses by removing the plurality of sacrificial layers in the cell array region through the slit;
forming a plurality of stack-type recesses with the air gaps embedded therein by removing the plurality of sacrificial layers and the sacrificial material in the contact region through the plurality of horizontal recesses; and
filling the plurality of horizontal recesses and the plurality of stack-type recesses with a conductive material to form the plurality of gate electrodes and the plurality of multi-layered pad portions.