Patent ID: 11923310
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A package structure, comprising:
a first through via structure formed in a substrate;
a semiconductor die formed below the first through via structure;
a conductive structure formed in a passivation layer over the substrate, wherein the conductive structure comprises a first via portion and a second via portion, the first via portion is directly over the first through via structure, and no conductive material is directly below and in direct contact with the second via portion;
an under bump metallization (UBM) layer directly over the second via portion; and
a connector formed over the UBM layer, wherein the connector comprises a protruding portion in the passivation layer, and the second via portion is directly below the protruding portion of the connector.