Patent ID: 11967293
Assignee: JAPAN DISPLAY INC.
Field: Optics (Instruments)
Classification: CPC G | IPC G

Claim 9:
10. A display device comprising:
a plurality of scanning lines extending along a first direction and aligned along a second direction intersecting the first direction;
a plurality of signal lines extending along the second direction and aligned the first direction;
a plurality of pixels disposed in a display area and provided at intersections of the plurality of scanning lines and the plurality of signal lines; and
an inspection circuit disposed in a non-display area different from the display area and including a switch element and a voltage drop element connected to the switch element, connected to each of the plurality of scanning lines, wherein
the switch element and the voltage-drop element are oxide semiconductor transistors each including an oxide semiconductor layer,
the switching element includes a first transistor,
a gate of the first transistor is connected to a first wiring line,
the voltage drop element includes at least one transistor pair connected in series to the switch element,
the at least one transistor pair includes a second transistor and a third transistor which are bi-directionally connected to each other and each of which is diode-connected,
one of a source and a drain of the first transistor is connected to one of a source and a drain of the second transistor and one of a source and a drain and a gate of the third transistor,
the other of the source and the drain of the first transistor is connected to a first scanning line of the plurality of scanning lines, and
a gate of the second transistor is connected to the other of the source and the drain of the second transistor, the other of the source and the drain of the third transistor and a second wiring line.