Patent ID: 11923373
Assignee: WINBOND ELECTRONICS CORP.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A semiconductor structure, comprising:
a semiconductor on insulator (SOI) substrate comprising:
a base substrate;
a buried insulation layer disposed on the base substrate;
a semiconductor layer disposed on the buried insulation layer; and
a trap rich layer disposed between the buried insulation layer and the base substrate;

a first electrically conductive structure, wherein at least a part of the first electrically conductive structure is disposed in the trap rich layer; and
a second electrically conductive structure, wherein at least a part of the second electrically conductive structure is disposed in the trap rich layer, a part of the trap rich layer is disposed between the first electrically conductive structure and the second electrically conductive structure, and the first electrically conductive structure, the second electrically conductive structure, and the trap rich layer disposed between the first electrically conductive structure and the second electrically conductive structure are at least a portion of an anti-fuse structure,
wherein the first electrically conductive structure and the second electrically conductive structure penetrate through the trap rich layer in a vertical direction, respectively.