Patent ID: 11928018
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 24:
25. The apparatus of claim 22, wherein the controller is further configured to cause the apparatus to:
determine that the first error management procedure identified the set of data as error-free based at least in part on the indication;
determine that the second error management procedure detected an error in the set of data based at least in part on a result of the second error management procedure, wherein generating the plurality of bits is based at least in part on determining that the first error management procedure identified the set of data as error-free and the second error management procedure detected the error in the set of data; and
discard, when a mode associated with detecting errors is activated, the set of data based at least in part on the plurality of bits indicating that the second error management procedure detected the error in the set of data.