Patent ID: 11923014
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory controller that controls a memory device, the memory controller comprising:
a model manager configured to obtain log information on use of the memory device for a predetermined period, and generate a regression model that predicts a lifespan of the memory device based on the log information; and
a performance manager configured to determine a deterioration section, in which performance of the memory device is deteriorated, based on the regression model and adjust a parameter value related to an operation of the memory device in the deterioration section,
wherein the log information includes a use time amount indicating an accumulated time amount for which power is applied to the memory device and an average erase number of memory blocks included in the memory device during the use time amount, and
wherein the model manager:
obtains the log information for the predetermined period until the use time amount reaches a predetermined reference amount,
calculates increments of the average erase number for the use time amount of each of obtained plural pieces of log information, and
generates the regression model based on an average value of the increments.