Patent ID: 11928470
Assignee: VERISILICON HOLDINGS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. A system for executing a program comprising:
an external memory storing a plurality of instruction groups including a requested instruction group;
a cache including a plurality of cache lines, wherein the requested instruction group is loaded into a current cache line of the cache lines from the external memory, and
a processing unit that performs operations including:
determining whether the requested instruction group in the current cache line has an End-of-Group (EOG) marker; and
when the requested instruction group does not have the EOG marker, advancing a program counter directly to a start of a subsequent cache line that follows the current cache line based on a straddling group indicator in the current cache line, wherein the subsequent cache line is subsequent to one of the cache lines that immediately follows the current cache line when the straddling group indicator indicates that the requested instruction group is a straddling instruction group.