Patent ID: 11869809
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A stacked semiconductor component comprising:
a plurality of semiconductor components in a stacked array, each semiconductor component comprising:
a semiconductor substrate having a circuit side and a back side opposite the circuit side;
a polymer layer having a first polymer surface and a second polymer surface opposite the first polymer surface, wherein the first polymer surface is in contact with the back side of the semiconductor substrate;
a plurality of conductive vias extending from the circuit side to the second polymer surface, each conductive via comprising
a substrate via embedded in the semiconductor substrate; and
a terminal portion integrally connected to the substrate via and embedded in the polymer layer, the terminal portion having a planarized contact surface generally parallel and in plane with the second polymer surface,
wherein the conductive vias are circumferentially lined with an insulator that extends from the circuit side to the second polymer surface, and wherein the conductive vias are filled with a conductive metal; and

a plurality of back side redistribution conductors on the second polymer surface, each of the plurality of back side redistribution conductors electrically coupled to the terminal portion of an individual one of the plurality of conductive vias,

wherein the semiconductor components are configured to be stacked back side to circuit side with terminal portions of conductive vias of a first semiconductor component bonded to conductive vias at a circuit side of an adjacent second semiconductor component.