Patent ID: 11907114
Assignee: SMART IOPS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A non-transitory machine-readable storage medium storing machine-executable instructions that, when executed, cause a system to perform a method for dynamically remapping memory addresses, the method comprising:
mapping, by one or more controllers configured to couple to non-volatile memory, a first logical block to a mapped block so that a plurality of logical address locations for the first logical block are mapped to a first plurality of physical address locations in the mapped block;
receiving and executing, by the one or more controllers, instructions to initiate and perform a remapping process of the first logical block from the mapped block to a remapped block, the remapping process remapping the plurality of logical address locations to a second plurality of physical address locations in the remapped block,
wherein the non-volatile memory comprises the mapped block and the remapped block,
wherein the remapping process is complete when the plurality of logical address locations are remapped to the second plurality of physical address locations, and
wherein, for each logical address location in the plurality of logical address locations, the instructions, which when executed by the one or more controllers, cause the one or more controllers to:
when a write command for the corresponding logical address location is received during the remapping process and is a first occurring write command for the corresponding logical address location during the remapping process, perform a corresponding initial write in the remapped block and indicate the corresponding logical address location as remapped;
when a read command for the corresponding logical address location is received during the remapping process and before the corresponding logical address location is indicated as remapped, perform a corresponding read in the mapped block; and
when a read command for the corresponding logical address location is received during the remapping process and after the corresponding logical address location is indicated as remapped, perform a corresponding read in the remapped block;

receiving a first read command during the remapping process;
determining that the first read command is for reading from a first logical address location of the first logical block;
determining that the first logical address location is mapped to a first physical address location of the plurality of physical address locations;
reading first data from the first physical address location of the mapped block;
receiving a first write command during the remapping process;
determining that the first write command is for an initial write of second data to the first logical address location of the first logical block; and
writing the second data to a first one of the second plurality of physical address locations of the remapped block;
wherein the receiving of the first read command occurs at a time:
after the initiating of the remapping process of the first logical block; and
before the writing of the second data to the first physical address location of the remapped block.