Patent ID: 11923282
Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A wiring substrate comprising:
an insulation layer;
a first wiring layer embedded in the insulation layer with an upper surface of the first wiring layer exposed from the insulation layer;
a second wiring layer including:
a terminal portion located at a lower position than a lower surface of the insulation layer, and
an embedded portion embedded in the insulation layer; and

a connection via connecting the first wiring layer and the embedded portion of the second wiring layer,
wherein the insulation layer includes an extension between the embedded portion of the second wiring layer and a lower surface of the first wiring layer,
wherein the extension of the insulation layer includes a through hole extending through the extension in a thickness-wise direction,
wherein the first wiring layer includes a through hole extending through the first wiring layer in the thickness-wise direction at the same position as the through hole of the extension in a plan view,
wherein the connection via is integrally arranged in the through hole of the first wiring layer and the through hole of the insulation layer,
the connection via including:
a through portion located in the through hole of the first wiring layer; and
a connection portion located in the through hole of the insulation layer, and

wherein the through hole of the insulation layer has a diameter that is larger than a diameter of the through hole of the first wiring layer.