Patent ID: 11916058
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. An integrated circuit, comprising:
a multi-bit cell having a plurality of bit cells disposed in a plurality of cell rows, wherein the plurality of bit cells include M bit cells, M being positive integers,
wherein a first bit cell of the plurality of bit cells and a M-th bit cell of the plurality of bit cells are arranged diagonally in different cell rows in the multi-bit cell,
wherein the multi-bit cell includes first to fourth cell boundaries, wherein the first and second boundaries extend in a first direction and the third and fourth boundaries extend in a second direction different from the first direction,
wherein the first bit cell and a second bit cell of the plurality of bit cells abut the third cell boundary, and the first bit cell and a (M/2+1)-th bit cell of the plurality of bit cells abut the first cell boundary.