Patent ID: 11963371
Assignee: KIOXIA CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A nonvolatile semiconductor memory device comprising:
a plurality of first wiring layers extended in a first direction and arranged in a second direction crossing the first direction;
a plurality of second wiring layers provided above the plurality of first wiring layer of a third direction crossing the first direction and the second direction, the plurality of second wiring layers arranged in the first direction and extended in the second direction;
a plurality of first stacked structures each comprising a first memory cell disposed between the second wiring layer and the first wiring layer at a crossing portion between each of the plurality of second wiring layers and each of the plurality of first wiring layers;
a plurality of first conductive layers provided in the same layer as the plurality of first wiring layers in the third direction, the plurality of first conductive layers arranged to be adjacent to the first wiring layer in the second direction, the plurality of first conductive layers not connected to other than the second wiring layer;
a plurality of second stacked structures disposed respectively at crossing portions between the second wiring layers and the plurality of first conductive layers; and
an insulation layer provided between the plurality of first stacked structures and between the plurality of second stacked structures, wherein
the second stacked structure has a Young's modulus larger than a Young's modulus of the insulation layer.