Patent ID: 11972264
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. An apparatus comprising:
processing circuitry to perform processing operations in response to micro-operations;
front end circuitry to supply the micro-operations to be processed by the processing circuitry; and
prediction circuitry to generate a prediction of a number of loop iterations for which one or more micro-operations per loop iteration are to be supplied by the front end circuitry, where an actual number of the loop iterations to be processed by the processing circuitry is resolvable by the processing circuitry based on at least one operand corresponding to a first loop iteration to be processed by the processing circuitry; in which:
the front end circuitry is configured to vary, based on a level of confidence in the prediction of the number of the loop iterations, a supply rate with which the one or more micro-operations for at least a subset of the loop iterations are supplied to the processing circuitry; and
in response to a determination that, after the front end circuitry has determined to supply the one or more micro-operations for the subset of the loop iterations at a lower supply rate, the processing circuitry has resolved the actual number of the loop iterations and there is still at least one remaining iteration for which the one or more micro-operations are not yet obtained or generated for supply to the processing circuitry, the front end circuitry is configured to supply the one or more micro-operations for the at least one remaining iteration at a higher supply rate than the lower supply rate.