Patent ID: 11929031
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A display apparatus, comprising a display substrate, wherein the display substrate has a display area and a frame area; the frame area is provided with a gate drive circuit; the gate drive circuit comprises a plurality of shift registers cascaded on a base substrate and compensation sub-circuits in one-to-one correspondence to the shift registers; and each of the compensation sub-circuits comprises: a detection input circuit, a first capacitor and an output control circuit; wherein:
the detection input circuit is electrically connected to a first control terminal, a first input terminal, and first and second poles of the first capacitor respectively; the detection input circuit is configured to charge the first capacitor under control of the first control terminal and the first input terminal; a first input terminal of a compensation sub-circuit corresponding to a nth-stage shift register is electrically connected to a cascade output terminal of a (n-y)th-stage shift register, wherein y is an integer greater than or equal to 1;
the second pole of the first capacitor is electrically connected to a first power voltage terminal; and
the output control circuit is electrically connected to a second control terminal, the first pole of the first capacitor, the first power voltage terminal, and a pull-up node of a corresponding-stage shift register respectively, and the output control circuit is configured to provide a signal of the first power voltage terminal to the pull-up node of the corresponding-stage shift register under control of the second control terminal and the first capacitor;
the display apparatus further comprises: a timing controller configured to:
a charging phase: load a corresponding signal to a shift register in each stage, and control a cascade output terminal of the shift register in each stage to output a high-potential signal and a drive output terminal of the shift register in each stage to output a low-potential signal; load the low-potential signal to the second control terminal to enable the output control circuit to disconnect a signal transmission with a pull-up node of a corresponding-stage shift register, and load the low-potential signal to the first control terminal to enable the detection input circuit to charge the first capacitor; and load the low-potential signal to the first control terminal after the charging phase ends;
a reset phase: load a corresponding signal to the shift register in each stage, and control the cascade output terminal of the shift register in each stage to output a low-potential signal and the drive output terminal of the shift register in each stage to output a low-potential signal;
a discharging phase: load a high-potential signal to the second control terminal to turn on the output control circuit with the pull-up node of the corresponding-stage shift register, and discharge only the first capacitor to the pull-up node; and
a detection phase: load a corresponding signal to the shift register in each stage, control the drive output terminal of the shift register in each stage to output a high-potential signal, and provide a data voltage to at least one data signal line in the display area, to detect a voltage of a pixel electrode corresponding to the data signal line and determine whether each of the compensation sub-circuits is abnormal.