Patent ID: 11907542
Assignee: MIPS TECH, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A method comprising:
hosting, by a computing device executing a hypervisor, one or more guest Operating Systems (OS) by presenting a respective virtualized machine interface to each hosted guest OS, wherein each of the one or more guest OS are associated with a device table stored by an I/O Memory Management Unit (IOMMU) coupled to the one or more processors, and wherein each device table contains entries mapping respective guest identifiers to respective Input/Output (I/O) devices;
creating, by the hypervisor, a direct mapping between a guest address for a hosted guest OS and an address in a physical memory;
managing, by the hypervisor, the contents of a Translation Lookaside Buffer (TLB) maintained within the IOMMU;
creating, by the hypervisor, a mapping in a device remap table between the guest identifier for at least one of the guest OS and an identifier for one or more I/O devices, wherein the device remap table is stored in the IOMMU; and
when, in response to an I/O device request, a mapping between an I/O device identifier and a guest identifier is not found by the IOMMU in the device table and is not found by the IOMMU in the device remap table, then:
accessing, by the hypervisor, a request from the IOMMU to determine whether to fulfill in the device remap table; and
providing, from the hypervisor and to the IOMMU, a response to the I/O device request.