Patent ID: 11908915
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 8:
9. A semiconductor device, comprising:
a first field effect transistor (FET) including a first gate structure disposed over a first channel region; and
a second FET including a second gate structure disposed over a second channel region, wherein:
the first FET is an n-type FET, and second FET is a p-type FET,
the first gate structure includes:
a first gate dielectric layer;
a first work function adjustment material layer over the first gate dielectric layer;
a second work function adjustment material layer over the first work function adjustment material layer; and
a first metal gate electrode layer over the second work function adjustment material layer,

the second gate structure includes:
a second gate dielectric layer;
a third work function adjustment material layer over the second gate dielectric layer;
a fourth work function adjustment material layer over the third work function adjustment material layer; and
a second metal gate electrode layer over the fourth work function adjustment material layer,

the second and fourth work function adjustment material layers include TiAl or TiAlC, and include a diffusion barrier layer containing Al and Ti at a bottom portion of the second and fourth work function adjustment material layers, respectively,
the diffusion barrier layer is a Ti-rich layer having a higher Ti concentration than a center portion of the second and fourth work function adjustment material layers, and
a Ti concentration in the diffusion barrier layer increases from a side on the center portion to a surface of the second and fourth work function adjustment material layers.