Patent ID: 11909404
Assignee: ADVANCED MICRO DEVICES, INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. A clocking circuit for a communication link comprising:
a master delay-locked loop (DLL) circuit comprising a plurality of delay elements and a phase detector circuit for detecting a phase offset and providing a master DLL code for adjusting the delay elements of the master DLL;
a slave DLL circuit for providing an oscillator signal to a receiver of the communication link, the slave DLL circuit comprising a plurality of delay elements and a replica phase detector circuit for detecting a phase offset and providing a slave DLL code for adjusting the delay elements of the slave DLL circuit; and
an arbiter circuit operable to temporarily enable the replica phase detector circuit of the slave DLL circuit during an idle period of the communication link to update a configuration value based on the master DLL code and the slave DLL code.