Patent ID: 11942961
Assignee: STMICROELECTRONICS S.R.L.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 0:
1. An electronic circuit, comprising:
a first channel including a first digital to analog converter having an output coupled to a first input of a first sign comparator, the first channel configured to receive a first analog signal;
a second channel including a second digital to analog converter, the second channel configured to receive a second analog signal;
a switch network configured to selectively couple, upon reception of a self-test mode signal signaling a test phase, an output of the second digital to analog converter to a second input of the first sign comparator, the first input of the first sign comparator being maintained coupled to the output of the first digital to analog converter;
a ramp generation circuit configured to supply to the first digital to analog converter and the second digital to analog converter two identical ramps of digital codes, which are shifted by a programmable offset with respect to one another; and
a checking circuit coupled to an output of the first sign comparator, the checking circuit configured to issue a test status signal based on the output of the first sign comparator.