Patent ID: 11929213
Assignee: WINBOND ELECTRONICS CORP.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A parallel-connected capacitor structure, comprising:
a substrate;
a first dielectric layer contacting a top surface of the substrate, and wherein the first dielectric layer is only on the top surface of the substrate;
a trench embedded in the substrate, wherein an entirety of a sidewall of the trench is perpendicular to the top surface of the substrate;
a dielectric layer contacting a bottom and the sidewall of the trench;
a plurality of electrode layers respectively conformally filling in and covering the trench, wherein the plurality of electrode layers are formed of a plurality of nth electrode layers, n is a positive integer from 1 to M, M is not less than 3, the nth electrode layer with smaller n is closer to the sidewall of the trench, when n equals to M, an Mth electrode layer fills in a center of the trench, a top surface of each of the plurality of electrode layers is aligned with the top surface of the first dielectric layer, and the plurality of electrode layers are independently formed by material selected from a group consisting of copper, tungsten, tantalum and Cu—Al alloy;
a capacitor dielectric layer disposed between the plurality of electrode layers adjacent to each other, wherein a sidewall of the capacitor dielectric layer contacts one of the plurality of electrode layers;
a first conductive plug contacting the nth electrode layer of the plurality of nth electrode layers with odd-numbered n; and
a second conductive plug contacting the nth electrode layer of the plurality of nth electrode layers with even-numbered n, wherein the first conductive plug and the second conductive plug are electrically connected to different conductive terminals.