Patent ID: 11882702
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method of forming a semiconductor structure, comprising:
forming an alternating stack of insulating layers and sacrificial material layers over a substrate;
forming memory elements through the alternating stack;
forming backside trenches that laterally extend along a first horizontal direction through the alternating stack, wherein the alternating stack is divided into finger regions that are laterally spaced apart from each other along a second horizontal direction which is perpendicular to the first horizontal direction by the backside trenches, and by a staircase region adjoined to end portions of the finger regions;
replacing the sacrificial material layers with first electrically conductive layers that are located within a memory array region, second electrically conductive layers that are located within the staircase region, and active semiconductor regions that are located in an access transistor region located between the staircase region and the memory array region;
forming vertically extending gate via cavities through the active semiconductor regions; and
forming a gate dielectric and a vertical gate electrode in each of the gate via cavities.