Patent ID: 11892947
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A memory controller, comprising:
a processing unit;
a cache corresponding to the processing unit;
an acceleration determining circuit configured to:
based on an obtained logical to physical mapping table, determine whether address values of a plurality of target physical addresses in the obtained logical to physical mapping table corresponding to a plurality of target logical addresses are continuous;
wherein the processing unit is configured to:
obtain, from the acceleration determining circuit, a first instruction indicating that the address values of the plurality of target physical addresses are determined to be continuous;
based on the first instruction, select one of the plurality of target physical addresses as a base physical address, and set a base physical address offset based on address values of remaining target physical addresses; and
store the base physical address and the base physical address offset into the cache, as a mapping relationship of the plurality of target logical addresses corresponding to the plurality of target physical addresses.