Patent ID: 11934305
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 19:
20. The method according to claim 15, wherein
the memory system further includes a first circuit configured to cause the plurality of engines to execute addition of location information indicating the specified storage locations to the respective first sub-commands in a distributed manner,
each of the plurality of engines is connected to the first circuit via a plurality of queues,
the management information is divided into a plurality of management information segments to which third serial numbers are respectively assigned,
the second memory includes a cache memory configured to cache the management information in units of management information segments, and
the method further comprises:
receiving by the first circuit the plurality of first sub-commands in the order of issuance;
transmitting by the first circuit, when a first management information segment that is a management information segment required to identify a location of data of the first data unit related to one first sub-command among the plurality of received first sub-commands is cached in the cache memory, the one first sub-command to one of the plurality of engines via a queue corresponding to the third serial number given to the first management information segment among the plurality of queues; and
executing refill of the first management information segment when the first management information segment is not cached in the cache memory, and then transmitting, by the first circuit, the one first sub-command to the one of the plurality of engines via the queue corresponding to the third serial number given to the first management information segment of the plurality of queues.