Patent ID: 11922037
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. An operation method of a storage device including a plurality of nonvolatile memories each including multi-level cell memory blocks including a plurality of pages, the operation method comprising:
receiving a write command, a start logical address, a current data chunk, and chunk size information from a host;
determining a size of continuous data based on the start logical address and the chunk size information;
determining a striping number indicating a number of nonvolatile memory which is for distributing and storing the data chunks in sub-page units provided in each of the plurality of pages according to memory cell level, based on the size of continuous data;
providing the data chunk to one or more nonvolatile memories selected from among the plurality of nonvolatile memories based on the determined striping number; and
performing, with the one or more selected nonvolatile memories, a high-speed programming (HSP) operation to program sub-pages including one of the plurality of pages in one-time operation on the provided data chunks in parallel.