Patent ID: 11963348
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A method of manufacturing an integrated circuit structure, comprising:
forming a first drain contact;
forming a drain conductive line electrically connected to the first drain contact;
forming a first transistor comprising:
forming a first gate electrode,
forming a first gate electrode contact,
forming a first source,
forming a first source conductive line electrically connected to the first source,
forming a first source contact electrically connected to the first source conductive line,
forming a first drain electrically connected to the drain conductive line, and
forming a power rail electrically connected to the first source contact and a first gate electrode tie-off contact, wherein the first gate electrode tie-off contact electrically connects the power rail to the first gate electrode; and

forming a second transistor comprising:
forming a second gate electrode,
forming a second gate electrode contact connected to the second gate electrode,
forming a second source,
forming a second source conductive line connected to the second source,
forming a second source contact connected to the second source conductive line and the power rail;
forming a second drain electrically connected to the drain conductive line; and
forming a second gate electrode tie-off contact in electrical connection with both the second gate electrode and the power rail.