Patent ID: 11901404
Assignee: INTEL CORPORATION
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H | IPC H

Claim 3:
4. A method of fabricating a semiconductor device, the method comprising:
forming a three dimensional capacitor including:
forming a pole;
and forming one or more capacitor units stacked around the pole,
wherein a capacitor unit of the one or more capacitor units includes:
a first electrode surrounding and coupled to the pole,
a dielectric layer surrounding the first electrode, and
a second electrode surrounding the dielectric layer, wherein the capacitor unit is a first capacitor unit, and the capacitor further includes a second capacitor unit, and wherein a dielectric layer of the first capacitor unit and a dielectric layer of the second capacitor unit form a continuous dielectric layer conformally surrounding the pole and the first electrodes of the first capacitor unit and the second capacitor unit, and the second electrode of the first capacitor and the second electrode of the second capacitor form a continuous electrode.