Patent ID: 11901339
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor package, comprising:
a base substrate including a first semiconductor substrate and a first protective layer at least partially covering a top surface of the first semiconductor substrate;
a first semiconductor chip disposed on the first protective layer;
a first fillet layer at least partially filling a space between the first protective layer and the first semiconductor chip; and
a molding contacting the base substrate and enclosing the first semiconductor chip and the first fillet layer, wherein the first semiconductor chip and the first fillet layer are disposed between the molding and the base substrate in a direction perpendicular to an upper surface of the first semiconductor substrate,
wherein the first protective layer includes a first trench extending partially through a thickness of the first protective layer and totally overlapping the first semiconductor chip such that a bottom surface of the first protective layer and the top surface of the first semiconductor substrate are planar, and
wherein a part of the first fillet layer directly contacts the first protective layer and at least partially fills the first trench.