Patent ID: 11899976
Assignee: SOLID STATE STORAGE TECHNOLOGY CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A solid state storage device connected with a host, the solid state storage device comprising:
a control circuit connected with the host;
a volatile memory connected with the control circuit; and
a non-volatile memory connected with the control circuit, wherein the non-volatile memory is divided into a first area and a second area,
wherein after the host issues a write command and a write data, the control circuit monitors a data amount of the write data continuously stored into the non-volatile memory,
wherein before the data amount of the write data continuously stored into the non-volatile memory reaches a predetermined amount, the write data is stored into plural buffering blocks of the first area in a first write mode, wherein after the data amount of the write data continuously stored into the non-volatile memory reaches the predetermined amount, the write data is stored into plural storing blocks of the second area in a second write mode,
wherein a write speed in the first write mode is faster than a write speed in the second write mode,
wherein when a total storage amount of the first area reaches a threshold amount, the control circuit performs a garbage collection on the first area, wherein the predetermined amount is smaller than the threshold amount.