Patent ID: 11882024
Assignee: CISCO TECHNOLOGY, INC.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. One or more non-transitory computer-readable media storing computer-executable instructions that, when executed by one or more processors, cause the one or more processors to:
monitor one or more link error conditions on a link, wherein the one or more link error conditions are associated with a respective traffic stream of a plurality of traffic streams originating from one or more source applications transmitting on the link, and wherein the one or more link error conditions at least include a bit error rate observed on the link and the bit error rate is tracked using a counter;
identify a link failure based on the one or more link error conditions associated with the one or more source applications transmitting on the link, the link failure corresponding to one or more positions of the one or more link error conditions with respect to a predetermined threshold;
identify at least one respective source application of the one or more source applications associated with the link failure based on the one or more link error conditions and in response to identifying the link failure;
identifying one or more corresponding amounts of contribution to the link failure by the at least one respective source application; and
direct one or more corrective actions to the at least one respective source application associated with the link failure based on an extent of the one or more corresponding amounts of contribution to the link failure by the at least one respective source application, wherein the one or more corrective actions are selected based on the one or more link error conditions.