Patent ID: 11894075
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. The memory device of claim 7, wherein the peripheral circuit is further configured to recover the discarded 1st (n−2)th, and nth logic pages of the current programming data by separating the 2n logic states into pair-groups using read reference voltages VR2, VR4, . . . , and VR(2n−2), wherein:
the read reference voltage VRL is higher than a threshold voltage of state P(L−1), but lower than a threshold voltage of state P(L), wherein L=2, 4, . . . , and 2n−2; and
each pair-group comprises two distinct logic states based on a remaining (n−1)th logic page of the current programming data and the mapping scheme.