Patent ID: 11948936
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A method of manufacturing a semiconductor device, comprising:
providing a structure having a substrate and a stack of first and second type epitaxial layers having different material compositions alternatively stacked above the substrate;
patterning the stack, thereby forming a fin above the substrate;
implanting a first dopant into a first region of the fin, the first dopant having a first conductivity type;
implanting a second dopant into a second region of the fin, the second dopant having a second conductivity type opposite the first conductivity type, wherein the second region is laterally distant from the first region; and
forming first and second metal gate structures disposed on a top surface of the fin,
wherein the first and second regions are between the first and second metal gate structures, and wherein in a top view of the semiconductor device the first and second metal gate structures are within a boundary of the top surface of the fin.