Patent ID: 11899251
Assignee: AYAR LABS, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A vertical integrated photonics chiplet assembly, comprising:
a package substrate, wherein the package substrate is a monolithic structure having a substantially uniform material composition;
an external device connected to a top surface of the package substrate;
a photonics chip disposed within the package substrate such that the photonics chip is encapsulated by the package substrate, the photonics chip including optical coupling devices positioned at a top surface of the photonics chip;
a plurality of conductive via structures disposed within the package substrate in electrical connection with electrical circuits within the photonics chip, the plurality of conductive via structures electrically connected through the package substrate to the external device;
an opening formed through the top surface of the package substrate, the opening exposing a portion of the top surface of the photonics chip at which the optical coupling devices are positioned; and
an optical fiber array disposed and secured within the opening such that a plurality of optical fibers of the optical fiber array optically couple to the optical coupling devices.