Patent ID: 11942136
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 12:
13. A method comprising:
applying a first voltage to an access line of a memory device during an operation in a first memory cell of the memory device, the first memory cell including a first transistor coupled to the access line and a second transistor coupled to the access line, the first and second transistors having different threshold voltages;
the memory device including a first data line coupled to the first transistor, a second data line coupled to the first transistor, and a third data line coupled to the second transistor;
the memory device including a second memory cell sharing the access line with the first memory cell, the second memory cell including a first additional transistor coupled to the access line and a second additional transistor coupled to the access line;
the memory device including a first additional data line coupled to the first additional transistor, a second additional data line coupled to the first additional transistor, and a third additional data line coupled to the second additional transistor; and
placing the first additional data line in a float condition during the operation.