Patent ID: 11929348
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. A semiconductor package, comprising:
a base substrate structure comprising a substrate characterized by a lattice crystalline plane, wherein the lattice crystalline plane, when projected on a top surface of the base substrate structure, extends in a third direction;
a first die group including a plurality of first dies stacked parallel to each other and parallel to a front surface of the first die group, wherein the first die group is disposed on the top surface of the base substrate structure, and the front surface of the first die group and the top surface of the base substrate structure intersect at a first edge, and the first edge extends in a first direction in the top surface of the base substrate structure; and
a second die group including a plurality of second dies stacked parallel to each other and parallel to a front surface of the second die group, wherein the second die group is disposed on the top surface of the base substrate structure, and the front surface of the second die group and the top surface of the base substrate structure intersect at a second edge, the second edge extends in a second direction in the top surface of the base substrate structure; and
wherein the first direction and the third direction define a first angle, the second direction and the third direction define a second angle, and at least one of the first angle and the second angle is not zero.