Patent ID: 11961801
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. Integrated circuitry comprising:
two three-dimensional (3D) array regions individually comprising tiers of electronic components;
a stair-step region between the two 3D-array regions;
first stair-step structures that alternate with second stair-step structures along a first direction within the stair-step region;
the first stair-step structures individually comprising two opposing first flights of stairs in a first vertical cross-section along the first direction, the stairs in the first flights each having multiple different-depth treads in a second vertical cross-section that is along a second direction that is orthogonal to the first direction; and
the second stair-step structures individually comprising two opposing second flights of stairs in the first vertical cross-section, the stairs in the second flights each having only a single one tread along the second direction.