Patent ID: 11937416
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 16:
17. A method comprising:
forming a first transistor having a first channel stack having first channel layers over a substrate and extending along a first lateral direction between first epitaxial source/drain features, wherein the first channel stack has a first number of the first channel layers, the first channel layers have a first channel dimension along a second lateral direction that is different than the first lateral direction, the first epitaxial source/drain features have a first source/drain dimension along the second lateral direction, and the first epitaxial source/drain features have a first volume;
forming a second transistor having a second channel stack having second channel layers over the substrate and extending along the first lateral direction between second epitaxial source/drain features, wherein the second channel stack has a second number of the second channel layers, the second channel layers have a second channel dimension along the second lateral direction, the second epitaxial source/drain features have a second source/drain dimension along the second lateral direction, and the second epitaxial source/drain features have a second volume; and
wherein the first number is greater than the second number, the first channel dimension is about equal to the second channel dimension, the first source/drain dimension is greater than the second source/drain dimension, and the first volume is greater than the second volume.