Patent ID: 11894067
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 2:
3. The memory apparatus as set forth in claim 2, wherein the control means further includes a read timer configured to determine a read time span of each of the plurality of read operations of each of the plurality of blocks of the memory cells, the read frequency metric is a calculated read frequency based on the read time span and the block read quantity, the control means further configured to:
determine and record a current time stamp,
initialize the block read quantity associated with the one of the plurality of blocks as zero following recording of the current time stamp,
determine and record a new time stamp in response to the block read quantity being greater than the block read quantity threshold,
calculate the calculated read frequency equal to the block read quantify divided by the read time span, the read time span being equal to the new time stamp minus the current time stamp,
determine whether the calculated read frequency is greater than a read frequency threshold,
conclude the memory apparatus is ready for the next read and return to receive the read request associated with one of the plurality of read operations in response to the calculated read frequency not being greater than the read frequency threshold, and
relocate the data of the one of the plurality of blocks in response to the calculated read frequency being greater than the read frequency threshold.