Patent ID: 11937366
Assignee: UNIMICRON TECHNOLOGY CORP.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H | IPC H

Claim 2:
3. The circuit signal enhancement structure of a circuit board as claimed in claim 2, wherein the third substrate body comprises:
a first upper signal connection layer, one part of the first upper signal connection layer disposed on the first dielectric layer surface and the other part of the first upper signal connection layer disposed on the first circuit layer;
a first upper dielectric layer, disposed on the first dielectric layer and encapsulating the first upper signal connection layer, the first circuit layer and the first signal enhancement circuit layer;
a second upper circuit layer, disposed on the first upper dielectric layer and in at least one first upper blind hole of the first upper dielectric layer;
a second upper dielectric layer, disposed on the first upper dielectric layer and encapsulating the second upper circuit layer;
a third upper circuit layer, disposed on the second upper dielectric layer and in at least one second upper blind hole of the second upper dielectric layer; and
a first solder mask, disposed on the second upper dielectric layer to partially expose the third upper circuit layer;
wherein the fourth substrate body comprises:
a first bottom signal connection layer, one part of the first bottom signal connection layer disposed on the second dielectric layer and the other part of the first bottom signal connection layer disposed on the second circuit layer;
a first bottom dielectric layer, disposed on the second dielectric layer and encapsulating the first bottom signal connection layer, the second circuit layer and the second signal enhancement circuit layer;
a second bottom circuit layer, disposed on the first bottom dielectric layer and in the at least one first bottom blind hole of the first bottom dielectric layer;
a second bottom dielectric layer, disposed on the first bottom dielectric layer and encapsulating the second bottom circuit layer;
a third bottom circuit layer, disposed on the second bottom dielectric layer and in the at least one second bottom blind hole of the second bottom dielectric layer; and
a second solder mask, disposed on the second bottom dielectric layer to partially expose the third bottom circuit layer;
wherein the third signal transmission circuit layer is formed by the third upper circuit layer and the second upper circuit layer;
wherein the fourth signal transmission circuit layer is formed by the third bottom circuit layer and the second bottom circuit layer.