Patent ID: 11908825
Assignee: SK HYNIX INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A semiconductor package comprising a semiconductor die stack, the semiconductor die stack including:
a lower semiconductor die and an upper semiconductor die which are stacked in a staircase form in a first direction; and
metal pillars,
wherein the lower semiconductor die includes a plurality of lower pads arranged in a second direction, the second direction being perpendicular to the first direction, and
wherein the upper semiconductor die includes a plurality of upper pads arranged in the second direction;
wherein bent wires electrically connect at least one of the lower pads of the lower semiconductor die to at least one of the upper pads of the upper semiconductor die in the first direction; and
wherein vertical wires disposed on one of the lower pads for at least every other pair of pads which are electrically connected by the bent wires in the first direction,
wherein the metal pillars are disposed on the lower pad for at least every other pair of pads which are electrically connected by the bent wire,
wherein the metal pillars and the vertical wires are alternately disposed on pairs of pads in the second direction.