Patent ID: 11881284
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A method comprising:
performing a first read operation on a first set of memory cells of respective sets of memory cells addressable by a first wordline (WL) of a first plurality of WLs, wherein the respective sets of memory cells are comprised by an open TU of memory cells on a memory device;
identifying respective threshold voltage offset bins associated with each WL of the first plurality of WLs;
determining, based on the respective threshold voltage offset bin associated with each WL of the first plurality of WLs, respective threshold voltage offset bins for each WL of a second plurality of WLs coupled to respective sets of memory cells comprised by the open TU; and
updating, based on the respective threshold voltage offset bins for each WL of the second plurality of WLs, respective default threshold voltages for each WL of the first plurality of WLs and the second plurality of WLs.