Patent ID: 11889444
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A terminal device, comprising:
a memory having instruction stored thereon; and
a processor configured to execute the instructions in the memory to facilitate the following being performed by the terminal device:
generating a synchronization signal block, wherein the synchronization signal block comprises M primary synchronization signals and N secondary synchronization signals, each of the M primary synchronization signals corresponds to a particular symbol interval set in M symbol interval sets, each symbol interval set in the M symbol interval sets comprises N symbol intervals between a particular primary synchronization signal in the M primary synchronization signals and the N secondary synchronization signals, any two of the M symbol interval sets do not comprise a same symbol interval, and M and N are positive integers greater than or equal to 2, wherein each symbol interval corresponds to a unique symbol interval set in the M symbol interval sets, and wherein each symbol interval set in the M symbol interval sets corresponds to a unique primary synchronization signal in the M primary synchronization signals; and
sending the synchronization signal block to a second terminal device, wherein the M primary synchronization signals include only one sidelink primary synchronization signal (S-PSS) and the N secondary synchronization signals include only one sidelink secondary synchronization signal (S-SSS).