Patent ID: 11908501
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. A storage device comprising:
a plurality of bit lines including a first bit line and a second bit line;
a plurality of word lines including a first word line and a second word line;
a plurality of memory cells between the bit lines and the word lines, each of the memory cells including a variable resistance element and a switching element that are connected in series between a first end connected to one of the bit lines and a second end connected to one of the word lines;
a control circuit; and
a detection circuit, wherein
during a read operation to read data stored in a target memory cell, which is one of the memory cells between the first bit line and the first word line,
while the first bit line is at a first voltage and the first word line is at a second voltage, the control circuit sets the first bit line and the first word line into floating states,
after setting the first bit line and the first word line into floating states, the control circuit discharges the first bit line and supplies a current to the switching element of the target memory cell to turn on the switching element of the target memory cell, and
after a voltage difference between the first word line and the first bit line decreases from a threshold voltage at which the switching element transitions into the on-state to a hold voltage that is less than the threshold voltage and greater than zero voltage and a hold current constantly passes through the target memory cell with the switching element in the on-state, the detection circuit detects a current that passes through the target memory cell and determines data stored in the target memory cell on the basis of the detected current.