Patent ID: 11922049
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. A system comprising:
a memory device comprising a plurality of planes; and
a processing device coupled to the memory device, the processing device to perform operations comprising:
receiving a request to perform a calibration process to determine trim values associated with one or more first planes of the plurality of planes and additional trim values associated with one or more second planes of the plurality of planes;
responsive to the request:
loading a first set of trim values to a first set of trim registers allocated to the one or more first planes of the plurality of planes, wherein the first set of trim values corresponds to an initial voltage shift for first data programmed to the one or more first planes during a first time period; and
loading a second set of trim values to a second set of trim registers allocated to the one or more second planes of the plurality of planes, wherein the second set of trim values corresponds to an initial voltage shift for second data programmed to the one or more second planes during a second time period;

determining a current voltage shift for the first data based on a first voltage distribution measured at the one or more first planes during the first time period and a current voltage distribution observed at the one or more first planes during a current time period; and
responsive to determining that the current voltage shift for the first data satisfies a voltage shift criterion, updating the first set of trim values at the first set of trim registers to correspond to the current voltage shift for the first data.