Patent ID: 11908905
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A method for forming a semiconductor structure, comprising:
forming a stack of group III-V layers over a substrate;
performing an etch process on the stack of group III-V layers to define a plurality of elongated vertical segments defined by sidewalls of the stack of group III-V layers and sidewalls of the substrate; and
forming a bottom electrode on the substrate and the stack of group III-V layers, wherein the bottom electrode comprises a plurality of conductive segments disposed between adjacent elongated vertical segments and a conductive body disposed on the elongated vertical segments between adjacent conductive segments, wherein a width of the conductive body between the adjacent conductive segments is less than a height of the plurality of conductive segments.