Patent ID: 11875153
Assignee: NEXT SILICON LTD
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. The system of claim 1, wherein the plurality of concurrent threads is a subset of a set of concurrent threads, each of the set of concurrent threads implementing the dataflow graph;
wherein the system further comprises a buffer storage, for storing another plurality of thread contexts, each for at least one of the set of concurrent threads; and
wherein the at least one hardware processor is further configured for further configuring the at least one reconfigurable processing grid for:
storing in the buffer storage one or more additional runtime context values of one or more waiting threads, where the one or more waiting threads are not members of the plurality of concurrent threads; and
in each of a plurality of iterations:
identifying that execution of at least one additional thread of the plurality of concurrent threads has completed;
for at least one of the one or more waiting threads, retrieving from the buffer storage at least one additional runtime context value thereof; and
adding the at least one waiting thread to the plurality of concurrent threads for execution by the plurality of logical elements.