Patent ID: 11922863
Assignee: AUO CORPORATION
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. The pixel circuit according to claim 1, wherein the pulse width signal generator comprises:
a first transistor comprising a first end for receiving an operation voltage, wherein a control end of the first transistor receives the pulse width modulation enable signal;
a second transistor comprising a first end for receiving write-in display data, wherein a control end of the second transistor receives the data write-in signal, and a second end of the second transistor is coupled to a second end of the first transistor;
a third transistor connected in series between the first transistor and the output switch;
a fourth transistor, coupled between a second end of the third transistor and a control end of the third transistor, wherein a control end of the fourth transistor receives the data write-in signal;
a fifth transistor comprising a first end coupled to the control end of the third transistor, wherein a control end and a second end of the fifth transistor jointly receive a reset signal;
a sixth transistor comprising a first end receiving a sweeping signal, wherein a control end of the sixth transistor is coupled to the control end of the fourth transistor, and a second end of the sixth transistor receives a reference voltage; and
a capacitor, coupled between a first end of the sixth transistor and the control end of the third transistor.