Patent ID: 11948910
Assignee: CANON KABUSHIKI KAISHA
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor apparatus comprising:
a first member including a first substrate comprising a compound semiconductor and comprising a plurality of semiconductor elements formed thereon;
a second member bonded to the first member, the second member including a second substrate comprising Si and comprising a part of a circuit electrically connected to the plurality of semiconductor elements, wherein the first member and the second member are stacked with each other and the circuit is at least one of a readout circuit configured to read out a signal of the plurality of semiconductor elements and a control circuit configured to control a potential to the plurality of semiconductor elements;
a first bonding electrode and a first insulation film formed on the first member;
a second bonding electrode; and
a second insulation film formed on the second member,
wherein the first bonding electrode and the second bonding electrode are bonded, and the first insulation film and the second insulation film are bonded, and
wherein an element isolation groove is disposed between adjacent semiconductor elements included in the plurality of semiconductor elements.