Patent ID: 11877482
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 18:
19. A method for manufacturing a display substrate, comprising:
forming a plurality of gate lines, a plurality of data lines and a plurality of sub-pixels on a base substrate; wherein the plurality of gate lines and the plurality of data lines are arranged to cross each other;
wherein the plurality of sub-pixels include a plurality of sub-pixel columns that are corresponding to the plurality of data lines in a one-to-one manner, each of the plurality of sub-pixel columns includes a plurality of the sub-pixels arranged along an extension direction of the plurality of data lines;
the plurality of sub-pixels include a plurality of sub-pixel rows that are corresponding to the plurality of gate lines in a one-to-one manner, each of the plurality of sub-pixel rows includes a plurality of the sub-pixels arranged along an extension direction of the plurality of gate lines;
each of the plurality of sub-pixels includes a sub-pixel driving circuit; the sub-pixel driving circuit includes a driving transistor, a data writing transistor and a sensing transistor; the driving transistor and the data writing transistor are located at a first side of an aperture area of the each of the plurality of sub-pixels; the sensing transistor is located at a second side of the aperture area of the each of the plurality of sub-pixels; the first side and the second side are opposite sides of the aperture area along the extension direction of the plurality of data lines;
a second electrode of the data writing transistor is coupled to a corresponding data line of the plurality of data lines; a gate electrode of the sensing transistor, and gate electrodes of data writing transistors in a next sub-pixel row of the plurality of sub-pixel rows adjacent the sensing transistor, are all coupled to a gate line of the plurality of gate lines corresponding to the next sub-pixel row adjacent the sensing transistor;
the sub-pixel driving circuit further includes a storage capacitor coupled between a gate electrode of the driving transistor and a first electrode of the driving transistor; the storage capacitor includes a first electrode plate and a second electrode plate which are disposed oppositely; there is a first overlapping area between an orthographic projection of the first electrode plate to the base substrate and an orthographic projection of the second electrode plate to the base substrate; an orthographic projection of the first overlapping area to the base substrate at least partially overlaps an orthographic projection of the corresponding aperture area of the each of the plurality of sub-pixels.