Patent ID: 11909413
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 11:
12. The semiconductor integrated circuit according to claim 1, further comprising:
a plurality of the memory cells arranged in a first direction and each storing the first data;
a plurality of the first wirings provided to correspond to the plurality of memory cells arranged in the first direction and supplying the second data to be multiplied by the first data; and
a second wiring pair provided to correspond to the plurality of memory cells arranged in the first direction and that includes one second wiring which is discharged when multiplication data of the first data, stored in each of the plurality of memory cells, and the second data, supplied by the first wiring corresponding to the memory cell, is the first logic; and another second wiring which is discharged when the multiplication data is a second logic.