Patent ID: 11907635
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A modeling circuit comprising:
a first field effect transistor on a semiconductor substrate, the first field effect transistor including a first electrode and a second electrode;
a first bipolar transistor having a first collector electrode connected to a first node corresponding to the first electrode of the first field effect transistor, a first emitter electrode connected to a second node corresponding to the second electrode of the first field effect transistor, and a first base electrode;
a second bipolar transistor having a second collector electrode connected to the second node, a second emitter electrode connected to the first node, and a second base electrode connected to the first base electrode of the first bipolar transistor; and
a substrate resistor connected between the first and second base electrodes and a first surface of the semiconductor substrate.