Patent ID: 11937235
Assignee: QUALCOMM INCORPORATED
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An apparatus for wireless communication at a network element, comprising:
one or more memories; and
one or more processors coupled to the one or more memories, wherein the one or more processors are configured to:
select a slot format of a slot comprising a carrier bandwidth, the slot format including one of a half-duplex slot comprising at least a bandwidth part (BWP) of the carrier bandwidth configured for uplink transmission or downlink transmission, a sub-band full-duplex slot comprising at least the BWP configured for simultaneous uplink transmission and downlink transmission, or a flexible slot comprising at least one flexible symbol configurable as a half-duplex symbol or a sub-band full-duplex symbol; and
provide a slot format indicator indicating the slot format of the slot for a plurality of user equipment (UEs) at a transmit power above a threshold transmit power and within downlink control information or a medium access control (MAC) control element (MAC-CE).