Patent ID: 11929756
Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A device, comprising:
a sample and digital to analog conversion (DAC) circuit to sample an input voltage to obtain a first sampled voltage;
a first comparator coupled to the sample and DAC circuit;
a first set of storage circuits coupled to the first comparator and the sample and DAC circuit, the first set of storage circuits being configured to store a first subset of a plurality of bits corresponding to the input voltage;
a second comparator coupled to the sample and DAC circuit;
a second set of storage circuits coupled to the second comparator and the sample and DAC circuit, the second set of storage circuits being configured to store a second subset of the plurality of bits corresponding to the input voltage; and
a calibration circuit configured to receive a first bit from a first storage unit of the first set of storage circuits and a number of bits from the first set of storage circuits and the second set of storage circuits, wherein the calibration circuit is configured to provide a first offset signal to control a first offset associated with the first comparator and a second offset signal to control a second offset associated with the second comparator.