Patent ID: 11973148
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a substrate;
a first well region disposed within the substrate, wherein the first well region comprises a first type of dopants;
a second well region disposed adjacent to the first well region and within the substrate, wherein the second well region comprises a second type of dopants that is different from the first type of dopants;
an array of well regions disposed within the first well region, wherein the array of well regions comprise the second type of dopants;
a metal silicide layer disposed on the array of well regions and within the substrate;
a metal silicide nitride layer disposed on the metal silicide layer and within the substrate, wherein an interface between the metal silicide layer and the metal silicide nitride layer is at a plane same as or lower than a top surface of the substrate; and
a contact structure disposed on the metal silicide nitride layer.