Patent ID: 11954062
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 14:
15. A method comprising:
on a general-purpose graphics processor including a cache memory having multiple memory banks and a cache controller coupled with the cache memory:
selecting, via the cache controller, a first set of one or more memory banks of the cache memory to access in response to a first memory access request to a first memory address, wherein the first set of one or more memory banks is selected based on an address associated with the first memory access request and a hash of the first memory address, the hash generated via a first hash function;
monitoring an access pattern to the multiple memory banks of the cache memory;
in response to detection of a bank access disparity, requesting the cache controller to change from the first hash function to a second hash function;
selecting, via the cache controller, a second set of one or more memory banks of the cache memory to access in response to a second memory access request to the first memory address;
monitoring a thermal state of the multiple memory banks; and
in response to detecting that a temperature of one or more of the multiple memory banks exceeds a threshold, requesting the cache controller to change to a third hash function that is different from the second hash function.