Patent ID: 11886702
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. An apparatus, comprising:
a circuit configured to cause the apparatus to:
read, by the apparatus, a value of a register comprising serial presence detect (SPD) data of a first memory module, the SPD data indicative of a timing constraint for operating the first memory module at a corresponding first clock rate, the timing constraint and the first clock rate associated with a first speed;
select, for communication with the first memory module, a second speed bin associated with a second clock rate at the apparatus and the timing constraint, wherein the apparatus supports operations according to a set of timing constraints that comprises a plurality of values, and wherein the timing constraint is selected from a subset of the set of timing constraints, the subset exclusive of at least one of the plurality of values; and
communicate with the first memory module according to the second speed bin.