Patent ID: 11914831
Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. The method of claim 15, further comprising:
pulling a ramp-reference voltage node to a first ramp-reference voltage during a first clock phase that includes the first time period; and
outputting a ramping bias voltage during a second clock phase that includes the second time period by:
transitioning the ramp-reference voltage node from the first ramp-reference voltage level to a second ramp-reference voltage level over the second clock phase to produce the ramping transition profile; and
generating the ramping bias voltage to track the ramping transition profile based on the transitioning,

wherein the ramp-controlled current source is coupled with and biased by the ramping bias voltage.