Patent ID: 11869563
Assignee: GLOBALFOUNDRIES DRESDEN MODULE ONE LIMITED LIABILITY COMPANY & KG
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 1:
2. The memory structure of claim 1,
wherein the memory structure further comprises a sense circuit connected to the bit-line and configured to sense a parameter on the bit-line and to output the data output signal based on the parameter,
wherein the specific voltage output by the voltage driver comprises the programming inhibit voltage when the data verification signal has a first value indicating that the currently stored data value in the bitcell and represented by the data output signal is equivalent to the data value to be stored in the bitcell and represented by the data input signal, and
wherein the specific voltage output by the voltage driver comprises a programming assist voltage that is lower than the programming inhibit voltage when the data verification signal has a second value.