Patent ID: 11868626
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 12:
13. A device comprising:
a reconfigurable logic chip including a retimer and an operation circuit; and
a storage device including a nonvolatile memory, a first port, a second port that is different from the first port, and a controller coupled to the nonvolatile memory,
wherein the controller is configured to communicate with the retimer via the first port, and to communicate with the operation circuit via the second port,
the retimer is configured to receive first data from an external device, to generate second data based on the first data, and to send the second data to the controller via the first port,
the controller is configured to generate third data based on the second data, and to send the third data to the operation circuit via the second port, and
the operation circuit is configured to perform an operation on the third data to generate fourth data, and send the fourth data to the controller via the second port.