Patent ID: 11901023
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. The memory device of claim 1, wherein the processing circuitry is further configured to:
in the pre-pulse stage,
apply a first gate voltage on an unselected TSG transistor,
apply a first pass voltage on a first word line layer of the word line layers adjacent to the selected word line layer, and
apply a second pass voltage on a second word line layer of the word line layers adjacent to the selected word line layer; and

in the verify/read stage,
apply a second gate voltage on the unselected TSG transistor,
apply a third pass voltage on the first word line layer of the word line layers adjacent to the selected word line layer, and
apply a fourth pass voltage on the second word line layer of the word line layers adjacent to the selected word line layer, wherein

at least one of the third pass voltage and the fourth pass voltage is larger than the second gate voltage.