Patent ID: 11929361
Assignee: TSMC CHINA COMPANY, LIMITED
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. An integrated circuit, comprising:
a first transistor having a first active region and a first gate structure wrapping around the first active region on four sides of the first active region, wherein the first active region has a source region and a drain region on opposite sides of the first gate structure;
a second transistor below the first transistor, and having a second active region and a second gate structure wrapping around the second active region on four sides of the second active region, wherein the second active region has a source region and a drain region on opposite sides of the second gate structure;
a first power line above the first transistor, wherein the first power line is electrically connected to the source region of first active region of the first transistor; and
a second power line below the second transistor, wherein the second power line is electrically connected to the source region of second active region of the second transistor.