Patent ID: 11881816
Assignee: SEIKO EPSON CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A device comprising:
a clock signal generation circuit configured to generate a clock signal;
a clock output terminal;
an output circuit configured to output the clock signal to an external processing device via the clock output terminal;
a first terminal; and
an interface circuit configured to execute communication with the processing device by a data signal, wherein
in the communication,
the output circuit outputs the clock signal to the processing device that is a master for the communication, and
the interface circuit that is a slave for the communication receives, via the first terminal, the data signal that is transmitted from the processing device and synchronized with the clock signal, or transmits, via the first terminal, the data signal to the processing device in synchronization with the clock signal.