Patent ID: 11928018
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. The apparatus of claim 18, wherein the controller is further configured to:
discard, based at least in part on the first mode being configured, the set of data when the plurality of bits comprises a first value indicating that the first error management procedure detected a first error in the set of data and the second error management procedure identified the set of data as error free; and
discard, based at least in part on the first mode and a third mode associated with correcting errors in the set of data being configured, the set of data when the plurality of bits comprises a second value indicating that the first error management procedure identified the set of data as error-free and the second error management procedure detected a second error in the set of data.