Patent ID: 11934763
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method, comprising:
selecting a first wire occupying a first position in a layout of a plurality of parallel wires arranged over a subset of a plurality of evenly spaced positions to provide at least a minimum separation distance between adjacent ones of the plurality of parallel wires,
wherein a second position adjacent to the first position is an empty position,
wherein the first wire has an original wire width;
widening the first wire in the direction of the empty position to form a widened first wire having a first width;
calculating a performance result of the widened first wire, with regard to a first parameter;
comparing the performance result of the widened first wire to a first predetermined threshold; and
determining whether the performance result exceeds a specification threshold.