Patent ID: 11862270
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 9:
10. A system, comprising:
a memory device configured to store data, the memory device comprising:
an array of memory cells comprising a plurality of banks, the plurality of banks comprising a plurality of main banks and a redundant bank;
an input/output (I/O) circuit coupled to each pair of adjacent banks of the plurality of banks and configured to direct a piece of data to or from either bank of each pair of adjacent banks; and
control logic coupled to the I/O circuit and configured to:
select one bank of each pair of adjacent banks based on bank fail information indicative of a failed main bank of the plurality of main banks; and
control the I/O circuit to direct the piece of data to or from the selected bank of each pair of adjacent banks,

wherein the I/O circuit comprises a plurality of write multiplexers, each of the plurality of banks being coupled to one write multiplexer of the plurality of write multiplexers on a one-to-one connection; and

a memory controller coupled to the memory device and configured to control the memory device.