Patent ID: 11869942
Assignee: SILTRONIC AG
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A heteroepitaxial wafer comprising, in the following order a), b), c), d), e), f), optionally g), optionally h), and i):
a) a silicon substrate having a diameter and a thickness;
b) an AlN nucleation layer;
c) a first strain building layer which is an AlzGa1-zN layer having a first average Al content z, wherein 0<z;
d) a first strain preserving block comprising not less than 5 and not more than 50 units of a first sequence of layers the first sequence of layers of each unit comprising
d1) an AlN layer and
d2) at least two AlGaN layers differing with regard to their Al content, one AlGaN layer of the first sequence of layers being a continuously graded composition AlGaN layer, wherein the layers of the first sequence of layers have an Al content which decreases within the units with increasing distance of the layers from the silicon substrate and wherein the first strain preserving block having a second average Al content y, wherein y>z;
e) a second strain building layer which is an AlxGa1-xN layer having a third average Al content x, wherein 0<x<y;
f) a second strain preserving block comprising not less than 5 and not more than 50 units of a second sequence of layers, the second sequence of layers of each unit comprising
f1) an AlN layer and
f2) at least one AlGaN layer, the second strain preserving block having a fourth average Al content w, wherein x<w<y, and
g) optionally, a third strain building layer which is an AlvGa1-vN layer having a fifth average Al content v, wherein 0<v<w,
h) optionally, a superlattice block containing AlN and AlGaN layers, the superlattice block having a sixth average Al content u, wherein u>v and u<w,
i) a GaN layer, wherein the layers between the AlN nucleation layer according to b) and the GaN layer form a buffer layer.