Patent ID: 11861760
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 3:
4. The method of claim 2, wherein the one or more subsequent processing stages pipeline comprise one or more earlier processing stages and one or more later processing stages; wherein the one or more earlier processing stages are operable to determine whether one or more processing steps to be performed by the one or more later processing stages in respect of a primitive need not be performed, and to, when it is determined that one or more processing steps to be performed by the one or more later processing stages in respect of a primitive need not be performed, cause the one or more later processing stages to omit performing the one or more processing steps in respect of the primitive; the method comprising:
when there are no more primitives of the set of primitives left for the primitive providing stage to provide for processing to the one or more subsequent processing stages of the graphics processing pipeline for the rendering tile, causing the one or more earlier processing stages to determine that one or more processing steps to be performed by the one or more later processing stages in respect of the at least one primitive need not be performed, and to therefore cause the one or more later processing stages to omit performing the one or more processing steps in respect of the at least one primitive.