Patent ID: 11900284
Assignee: INTUIT INC.
Field: IT methods for management (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A scheduling system, comprising:
an interface through which resources access the scheduling system;
one or more processors; and
a memory storing instructions that, when executed by the one or more processors, causes the scheduling system to perform operations including:
determining a number of tasks to be completed;
generating a schedule that includes one or more first timeslots, each of the one or more first timeslots representing a respective period of time allocated for resources to complete a first subset of the tasks;
determining an amount of time required by each of a plurality of resources associated with the scheduling system to complete a respective one of the tasks;
assigning a proficiency score to each of the plurality of resources based at least in part on the amount of time required by the resource to complete the respective task;
controlling the interface to selectively provide electronic access to the schedule through the interface to resources based on assigned proficiency scores, wherein controlling the interface comprises enabling a first set of resources that are assigned higher proficiency scores to view the schedule and to reserve one or more timeslots through the interface and preventing resources assigned lower proficiency scores from viewing the schedule or reserving the one or more timeslots through the interface; and
dynamically updating the proficiency score assigned to each of the plurality of resources, wherein controlling the interface to selective provide electronic access to the schedule through the interface to resources is further based on updated proficiency scores.