Patent ID: 11861369
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method of controlling a processing-in-memory (PIM) device, which comprises a multiplication-accumulative addition (MAC) operator coupled to at least a first memory bank, a second memory bank, and a third memory bank, the MAC operator comprising devices, which perform multiplication-accumulative addition, the method comprising:
writing data, corresponding to a plurality of elements of a first matrix, to the first memory bank, and writing data, corresponding to a plurality of elements of the second matrix, to the second memory bank;
reading data, corresponding to elements with the same order among the pluralities of elements of the first and second matrices, from the first and second memory banks;
generating arithmetic data by performing a calculation on data that is read from the first and second memory banks through the multiplication-accumulative addition operator; and
writing the arithmetic data to the third memory bank,
wherein the plurality of elements of the first matrix are written into a plurality of columns that are coupled to one row of the first memory bank,
wherein the plurality of elements of the second matrix are written into a plurality of columns that are coupled to one row of the second memory bank, which has the same order as the one row of the first memory bank, and
wherein elements with the same order among the pluralities of elements of the first and second matrices are written into columns, respectively, with the same order of the first and second memory banks.