Patent ID: 11862621
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 10:
11. An integrated circuit (IC) device, comprising:
a first active region of a first semiconductor type, wherein
the first active region extends discontinuously along a first axis, and
the first active region comprises first and second portions spaced from each other along the first axis;

a second active region of a second semiconductor type different from the first semiconductor type, wherein
the second active region extends continuously along the first axis, and
the second active region overlaps, along a second axis transverse to the first axis, the first and second portions of the first active region and a spacing between the first and second portions of the first active region; and

a plurality of gate electrodes extending along the second axis and across the first and second active regions,
wherein
the plurality of gate electrodes and the first and second portions of the first active region are configured as a plurality of transistors of a first type,
the plurality of gate electrodes and the second active region are configured as a plurality of transistors of a second type different from the first type, and
the plurality of transistors of the first type and the plurality of transistors of the second type are electrically coupled into at least one delay circuit configured to delay an input signal at an input to generate a delayed signal at an output.