Patent ID: 11880328
Assignee: SHANGHAI CAMBRICON INFORMATION TECHNOLOGY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A network-on-chip (NoC) processing system, comprising a plurality of interconnected NoC processing modules arranged on a same chip, wherein each of the NoC processing modules includes at least one storage device and a plurality of computation devices, and in each of the NoC processing modules, at least one computation device is connected to at least one storage device of the NoC processing module, and at least two of the plurality of computation devices are connected to each other,
wherein the computation device is configured to perform a machine learning computation, and the computation device includes an operation unit and a controller unit, wherein the operation unit includes a primary processing circuit and a plurality of secondary processing circuits, wherein
the controller unit is configured to obtain input data and a computation instruction;
the controller unit is further configured to parse the computation instruction to obtain a plurality of operation instructions, and send the plurality of operation instructions and the input data to the primary processing circuit;
the primary processing circuit is configured to perform preorder processing on the input data, and send the data and the operation instructions among the primary processing circuit and the plurality of secondary processing circuits;
the plurality of secondary processing circuits are configured to perform intermediate computations in parallel according to the data and the operation instructions sent by the primary processing circuit to obtain a plurality of intermediate results, and send the plurality of intermediate results to the primary processing circuit; and
the primary processing circuit is further configured to perform postorder processing on the plurality of intermediate results to obtain a computation result of the computation instruction.