Patent ID: 11929745
Assignee: HIMAX TECHNOLOGIES LIMITED
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. The clock generator of claim 5, wherein the current mirror comprises:
a first stage composed of a first P-type metal-oxide-semiconductor (PMOS) transistor and a first N-type MOS (NMOS) transistor interconnected at a first common node, with the first PMOS transistor connected between the supply voltage and the first common node and with the first NMOS transistor connected between the first common node and the ground, the first PMOS transistor having drain and gate connected;
a second stage composed of a second PMOS transistor and a second NMOS transistor interconnected at a second common node, with the second PMOS transistor connected between the supply voltage and the second common node and with the second NMOS transistor connected between the second common node and the ground, the second NMOS transistor having drain and gate connected; and
a third stage composed of a third PMOS transistor through which the PTAT current flows, the third PMOS transistor being connected between the supply voltage and the interconnected node of the voltage divider;
wherein gates of the first PMOS transistor, the second PMOS transistor and the third PMOS transistor are coupled together, and gates of the first NMOS transistor and the second NMOS transistor are coupled together.