Patent ID: 11954586
Assignee: DEEPX CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 16:
17. A method of operating a neural processing unit (NPU), comprising:
generating a plurality of clock signals including a first clock signal and a second clock signal;
operating a first group of processing elements (PEs) based on the first clock signal;
operating a second group of PEs based on the second clock signal,
wherein the PEs of the first and second groups include an adder, a multiplier, and an accumulator, and are configured to process operations of an artificial neural network model,
wherein the first group of PEs outputs one or more first feature maps according to the first clock signal, and
wherein the second group of PEs outputs one or more second feature maps according to the second clock signal,
the method further comprising
processing the one or more first feature maps and the one or more second feature maps in a first input first output (FIFO) manner.