Patent ID: 11909856
Assignee: MELLANOX TECHNOLOGIES, LTD.
Field: Digital communication (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 1:
2. The apparatus according to claim 1, further comprising a host interface configured to be connected to a host computer having a processing unit configured to manage fulfilment of the data transfer request, wherein the packet processing circuitry is configured to cryptographically process the received data blocks using the block cipher so as to write the corresponding cryptographically processed data blocks to the host computer via the host interface, while holding segments of respective ones of the received data blocks in the memory, such that the packet processing circuitry stores the first segment of the respective received data block of the first packet in the memory until the second packet is received via the network interface, and then cryptographically processes the first and second segments together so as to write the corresponding cryptographically processed data block to the host computer via the host interface.