Patent ID: 11887841
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. The semiconductor package of claim 7, wherein:
the first main connection pad structures are arranged in a first main pad region, the first main connection pad structures have a first main pad density when viewed from the top of the first semiconductor chip, the second main connection pad structures are arranged in a second main pad region, the second main connection pad structures have a second main pad density when viewed from the top of the first semiconductor chip, the first dummy connection pad structures are arranged in a first dummy pad region, and the first dummy connection pad structures have a first dummy pad density when viewed from the top of the first semiconductor chip,
a difference between the first main pad density and the second main pad density is less than a reference pad density, and
the first dummy pad density is determined by Equations 3 to 5,

D_DP1=k1*D_MP1+k2*D_MP2:  Equation 3,

k1=A_MP1/(A_MP1+A_MP2+A_DP1):  Equation 4,

k2=A_MP2/(A_MP1+A_MP2+A_DP1):  Equation 5,

wherein D_DP1 is the first dummy pad density, D_MP1 is the first main pad density, D_MP2 is the second main pad density, A_DP1 is an area of the first dummy pad region, A_MP1 is an area of the first main pad region, and A_MP2 is an area of the second main pad region.