Patent ID: 11880333
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A circuit, comprising:
a first function circuit including:
a first plurality of registers, each of which is configured to store an address associated with a memory region of a second circuit; and
a first input address translation unit including a plurality of translation registers, each of which is configured to associate one of the first plurality of registers with a local address that is associated with the second circuit,

wherein the first function circuit is configured to:
receive a first transaction directed to the second circuit, wherein the first transaction is associated with a first address;
determine a first register from the first plurality of registers based on the first address;
determine a first translation register from the plurality of translation registers based on the first register;
determine a first local address associated with the second circuit based on the first translation register of the first input address translation unit; and
transmit the first transaction based on the first local address to the second circuit.