Patent ID: 11929756
Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A method comprising:
sampling, by a sample and digital to analog conversion (DAC) circuit, an input voltage to obtain a first sampled voltage;
determining, by a first comparator coupled to a first set of storage circuits, a state of a first bit of a plurality of bits corresponding to the input voltage, according to the first sampled voltage;
sampling, by the sample and DAC circuit, the input voltage to obtain a second sampled voltage;
determining, by a second comparator coupled to a second set of storage circuits different from the first set of storage circuits, a state of a second bit of the plurality of bits, according to the second sampled voltage;
averaging a first number of the plurality of bits from the first set of storage circuits and a second number of bits from the first set of storage circuits and the second set of storage circuits; and
providing a first offset signal in response to an average of the first number of the bits to control a first offset associated with the first comparator and a second offset signal in response to the second number of the bits to control a second offset associated with the second comparator to reduce an offset difference.