Patent ID: 11929304
Assignee: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A method of manufacturing a semiconductor apparatus, comprising:
providing a device stack on a carrier substrate;
forming, in a region adjacent to the device stack on the carrier substrate, an interconnection structure laterally adjacent to the device stack, wherein the interconnection structure comprises an electrical isolation layer and a conductive structure in the electrical isolation layer, and a height of the conductive structure in the interconnection structure is controlled in forming the interconnection structure, so that at least a part of components require to be electrically connected in the device stack is in contact with and therefore electrically connected to the conductive structure in a lateral direction, and the conductive structure is located at a corresponding height in the interconnection structure; and
forming a heat dissipation conduit in the electrical isolation layer.