Patent ID: 11960409
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. The method of claim 10, further comprising:
receiving a second request to store a second data referenced by a second LBA associated with a second zone of the logical address space of the memory device;
obtaining a version identifier of the second zone, wherein the version identifier of the second zone characterizes a number of times the second zone has been invalidated, wherein invalidating the second zone comprises invalidating multiple LBAs of the second zone;
selecting, in view of the version identifier of the second zone, a second PMB of the plurality of PMBs;
mapping the second LBA associated with the second zone to the second PMB, wherein the version identifier of the second zone is smaller than the version identifier of the first zone, wherein an erase value for the second PMB is larger than the erase value for the first PMB, and wherein the erase value for the second PMB represents a number of completed erase operations for the second PMB; and
storing the second data in the second PMB.