Patent ID: 11886335
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The memory system according to claim 1, wherein
the controller is configured to:
record a first time that is a remaining time until a time point at which a first rewrite operation, on a first block included in the plurality of blocks, is to be performed;
perform, before the first time elapses, the first rewrite operation on the first block; and
after the first rewrite operation is performed, in a calculation of a new rewrite speed, exclude the first block from a first number of blocks included in a block set, the first block is excluded during a period from when the valid data is stored again into the first block until the first time elapses, and calculate the new rewrite speed based on the first number of blocks other than the first block.