Patent ID: 11928015
Assignee: NATIONAL TECHNOLOGY & ENGINEERING SOLUTIONS OF SANDIA, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. A method, comprising:
responsive to receiving a first signal by way of a transceiver that is configured to receive and transmit messages by way of a MIL-STD-1553 or MIL-STD-1760 communications bus, the first signal indicative of a first bit, outputting the first bit to an FPGA that is communicatively coupled to the transceiver such that the FPGA can transmit and receive messages on the communications bus by way of the transceiver; and
responsive to determining, by way of the FPGA, that the first bit matches a rule, performing an action specified by the rule, wherein the action comprises one of:
causing the transceiver to transmit a second signal that is indicative of the first bit;
causing the transceiver to transmit a third signal that is indicative of a second bit that is different from the first bit; or
causing the transceiver to fail to transmit a signal responsive to the transceiver receiving the first signal.