Patent ID: 11880926
Assignee: ATI TECHNOLOGIES ULC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A computer system comprising:
a memory;
one or more processing units; and
a bus coupled to the memory and the one or more processing units;
wherein the one or more processing units are configured to:
generate a primitive batch including a sequential sequence of a plurality of primitives;
compute bin intercepts for each of the plurality of primitives in the primitive batch; and
shade the primitive batch by iteratively processing each of the respective bin intercepts computed until all of the respective bin intercepts are processed,
wherein iteratively processing each of the respective bin intercepts comprises:
identifying a particular bin intercept from each of the respective bin intercepts computed,
rasterizing a first primitive and all other primitives that have the particular bin intercept, and
selecting a new particular bin intercept from a remaining subset of the respective bin intercepts computed, wherein the first primitive has the new particular bin intercept.