Patent ID: 11901442
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A semiconductor device comprising:
a first semiconductor fin and a second semiconductor fin disposed over a semiconductor substrate and extending in a first direction;
an isolation insulating layer disposed between the first semiconductor fin and the second semiconductor fin;
a wall fin extending in the first direction, wherein a lower portion of the wall fin is embedded in the isolation insulating layer and an upper portion of the wall fin protrudes from the isolation insulating layer; and
a gate structure disposed over a channel region of the first semiconductor fin and a channel region of the second semiconductor fin and extending in a second direction crossing the first direction, wherein:
each of the first semiconductor fin and the second semiconductor fin includes the channel region and a bottom region embedded in the isolation insulating layer and a liner dielectric layer disposed between the isolation insulating layer and the bottom region,
the channel region is made of SiGe and further includes a Si cap layer disposed over the SiGe channel region, and
a top of the liner dielectric layer is only partially covered by the Si cap layer.