Patent ID: 11862720
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A method for forming a semiconductor device, the method comprising:
depositing a rough buffer layer overlying and directly contacting a semiconductor substrate, wherein the rough buffer layer has a top profile and a bottom profile that each alternates between peaks and valleys from a first sidewall of the semiconductor substrate to a second sidewall of the semiconductor substrate opposite the first sidewall;
depositing a group III-V buffer layer overlying and directly contacting the rough buffer layer at a top surface of the rough buffer layer;
forming a heterojunction structure overlying the group III-V buffer layer, wherein the heterojunction structure comprises a group III-V channel layer and a group III-V barrier layer directly contacting at a heterojunction;
forming a source electrode and a drain electrode overlying the heterojunction structure; and
forming a gate electrode overlying the heterojunction structure, laterally between the source electrode and the drain electrode;
wherein the rough buffer layer comprises a semiconductor material, wherein the depositing of the rough buffer layer concurrently dopes the semiconductor material with a buffer element, the buffer element being magnesium, zinc, or an n-type dopant, and wherein a band gap of the rough buffer layer is less than 1.3 electron volts (eV).