Patent ID: 11903272
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. The display substrate according to claim 9, further comprising:
a plurality of initialization signal lines disposed on the base and located in the display area; the plurality of initialization signal lines all extending in a second direction, and the second direction intersecting with the first direction; the plurality of initialization signal lines and the second storage electrode being disposed in a same layer; and each initialization signal line being connected to one of a plurality of rows of pixel driving circuits; wherein
the pixel driving circuit further includes:
at least one sixth transistor, each sixth transistor including:
a sixth active pattern having a sixth channel region, and an eleventh doped region and a twelfth doped region that are located on two opposite sides of the sixth channel region; and
a sixth gate, an orthographic projection of the sixth gate on the base overlapping with an orthographic projection of the sixth channel region on the base;
wherein a portion of the sixth active pattern in the at least one sixth transistor located in the twelfth doped region and the portion of the fifth active pattern in the at least one fifth transistor located in the tenth doped region are connected as a whole; and

a third auxiliary pattern disposed in a same layer as the first auxiliary pattern; the third auxiliary pattern being electrically connected to an initialization signal line corresponding to the pixel driving circuit through a seventh via penetrating the third insulating sub-layer, and being electrically connected to a portion of the sixth active pattern in the at least one sixth transistor located in the eleventh doped region through an eighth via penetrating the insulating layer.