Patent ID: 11874770
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. The method of claim 18, wherein the memory includes a list of flash blocks dedicated for L2PTT storage, wherein the data storage controller memory further includes a mapping unit page location index, and wherein the parallel initialization operation includes
determining, using the mapping unit page directory, a set of mapping unit pages staged in the mapping unit staging page,
processing the mapping unit page directory, and
for each mapping unit page index included in the mapping unit page directory,
determine whether a record in the mapping unit page location index has been initialized,
when the record in the mapping unit page location index has been initialized, compare i) a first flash block location of a mapping unit page being processed with ii) a second flash block location saved in an auxiliary data structure storing latest flash block locations of each mapping unit page, to determine whether the mapping unit page has been initialized,
when the mapping unit page has not been initialized,
initialize the record, in the mapping unit page location index, with a relative index of a corresponding flash block in the list of flash blocks dedicated for L2PTT storage, and
save, in the auxiliary data structure, the first flash block location of the mapping unit page being processed, and
copy content of the mapping unit page from a location of the mapping unit page, in the mapping unit staging page, to a corresponding location in the indexless L2PTT.