Patent ID: 11861760
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A tile-based graphics processor that is operable to execute a graphics processing pipeline, the graphics processing pipeline including one or more processing stages that are operable to perform processing steps in respect of primitives provided for processing; the tile-based graphics processor comprising:
a primitive providing circuit configured to provide a set of primitives to be processed for a rendering tile to the one or more processing stages of the graphics processing pipeline for processing; and
a determining circuit configured to, when there are no more primitives of a set of primitives left for the primitive providing circuit to provide for processing to the one or more processing stages of the graphics processing pipeline for a rendering tile, determine whether one or more processing steps to be performed by the one or more processing stages of the graphics processing pipeline in respect of at least one primitive of the set of primitives previously provided for processing by the primitive providing circuit for the rendering tile need not be performed; and to:
when it is determined that one or more processing steps to be performed by the one or more processing stages of the graphics processing pipeline in respect of at least one primitive of the set of primitives previously provided for processing by the primitive providing circuit for the rendering tile need not be performed, cause the one or more processing stages of the graphics processing pipeline to omit performing the one or more processing steps in respect of the at least one primitive.