Patent ID: 11955448
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 22:
23. An electronic system, comprising:
a board;
an electronic package attached to the board, wherein the electronic package comprises:
a package substrate, wherein first pads are over the package substrate, and wherein the first pads have a first pitch;
a bridge substrate embedded in the package substrate, wherein second pads are over the bridge substrate, wherein the second pads have a second pitch that is smaller than the first pitch, and wherein a barrier layer is over the second pads;
a first die over to the package substrate, wherein the first die is attached to the first pads by first interconnects, and wherein the first die is attached to the second pads by second interconnects; and
a second die over to the package substrate, wherein the second die is attached to the first pads by the first interconnects, and wherein the second die is attached to the second pads by the second interconnects, and wherein the first interconnects and the second interconnects comprises a reflown solder, the reflown solder having a bottommost surface over the first pads that is below a bottommost surface of the reflown solder over the second pads.