Patent ID: 11915972
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 14:
15. A method comprising:
providing a first transistor on a first substrate;
thinning a backside of the first substrate;
removing a first epitaxial material to form a first recess on the backside of the first substrate;
forming a first backside via in the first recess;
forming a first dielectric layer on the first backside via;
forming a first conductive line on the first backside via in the first dielectric layer;
thinning the first dielectric layer;
forming a first spacer on the first dielectric layer adjacent the first conductive line;
removing the first dielectric layer; and
sealing an air spacer adjacent the first spacer and the first conductive line.