Patent ID: 11886376
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. The memory device of claim 9, wherein:
the control circuit is configured to operate the coupling mechanism to couple the reference port of the input buffer to the second connector instead of the variable reference generator; and
the first output source, the first output buffer, the first reference generator, the first input buffer, the first coupling mechanism, and the first control circuit comprise a first reconfigurable interface circuit for the first connector;
further comprising:
a second reconfigurable interface circuit including a second output source, a second output buffer, a second reference generator, a second input buffer, a second coupling mechanism, and a second control circuit, the second reconfigurable interface circuit configured to selectively configuring a communication setting for signals exchanged through the second connector, wherein the second control circuit is configured to operate the second coupling mechanism connect the second connector to the first input buffer instead of the second input buffer for the complementary communication configuration.