Patent ID: 11937434
Assignee: MICROCHIP TECHNOLOGY INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A method of forming an integrated circuit structure including a ferroelectric random access memory capacitor, the method comprising:
forming a tub opening in a dielectric region;
forming a cup-shaped bottom electrode in the tub opening;
forming a cup-shaped ferroelectric element in an interior opening defined by the cup-shaped bottom electrode;
forming a cup-shaped top electrode in an interior opening defined by the cup-shaped ferroelectric layer; and
forming a conductive top electrode contact at least partially formed in an interior opening defined by the cup-shaped top electrode; and
forming an upper metal layer over the dielectric region, the upper metal layer including a capacitor contact connected to the conductive top electrode contact, thereby defining a conductive contact between the capacitor contact and the top electrode through the conductive top electrode contact;
wherein the cup-shaped bottom electrode, cup-shaped ferroelectric element, and top electrode define the ferroelectric random access memory capacitor.