Patent ID: 11894083
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The signal width repair circuit of claim 1, wherein the signal selection circuit comprises a second multiplexer and a signal width detection circuit, and wherein
input ends of the signal width detection circuit respectively receive the input signal and the delayed signal, and an output end of the signal width detection circuit is connected to a control end of the second multiplexer;
input ends of the second multiplexer respectively receive the input signal and the repaired signal, and an output end of the second multiplexer is configured to output the target signal; and
the signal selection circuit is configured to select the input signal for output in response to an output signal of the signal width detection circuit being signal 0, and select the repaired signal for output in response to the output signal of the signal width detection circuit being signal 1.