Patent ID: 11960770
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A system, comprising:
a group of memory devices; and
a controller configured to manage the group of memory devices, the controller configured to:
receive access requests including a first access request and a second access request to access one or more memory devices of the group;
simultaneously issue a first set of sub-commands corresponding to the first access request to cause the first set of sub-commands to be executed on a respective one of the group of memory devices;
simultaneously issue a second set of sub-commands corresponding to the second access request to cause the second set of sub-commands to be executed on a respective one of the group of memory devices, while an error recovery operation is being performed; and
transmit a respective response corresponding to the first or the second access requests based at least in part on respective statuses of one or more sub-commands corresponding to the first or the second access request.