Patent ID: 11972288
Assignee: AMPERE COMPUTING LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A non-transitory computer-readable medium having stored thereon computer executable instructions which, when executed by a processor, cause the processor to:
write a first plurality of scheduling entries into a first scheduling group in order;
write a second plurality of scheduling entries into a second scheduling group in order;
perform a first selection by choosing a first ready entry in order in each scheduling group;
perform a second selection by choosing the ready entry from the oldest group as the entry to be scheduled;
receive new instructions; and
write one or more new instructions in order into a group of scheduling entries which has been indicated as available by causing the processor to:
write a first new instruction in-order into a first group of scheduling entries which has been indicated as available; and
write a second new instruction in-order into a second group of scheduling entries which has been indicated as available when the first group of scheduling entries which was indicated as available has been filled.