Patent ID: 11895844
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 3:
4. The device of claim 1, further comprising:
a plurality of bit lines each having a portion provided to extend in the second direction, each of the plurality of bit lines being coupled to at least one of the plurality of pillars in each of the plurality of block areas; and
a shunt line having a portion provided to extend in the second direction, the plurality of members including contacts respectively and the shunt line being coupled to at least one of the contacts included in the plurality of members,
wherein the substrate includes a memory area that includes the plurality of pillars, the memory area includes a shunt area that includes the shunt line and does not include the plurality of bit lines, and the shunt area includes the third portion of the one member.