Patent ID: 11935609
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A data storage device, comprising:
a memory including a plurality of wordlines;
a data storage controller including data storage controller memory with a linked XOR flash data protection scheme, the data storage controller coupled to the memory; and
a bus for transferring data between the data storage controller and a host device in communication with the data storage controller,
wherein, when executing the linked XOR flash data protection scheme, the data storage controller is configured to:
generate a first full XOR parity buffer based on first flash data associated with a first one or more XOR parity bin groups and across a first one or more of the plurality of wordlines, and
generate a first reduced XOR parity buffer based on the first full XOR parity buffer and second flash data associated with a second one or more XOR parity bin groups and across a second one or more of the plurality of wordlines,
wherein the first reduced XOR parity buffer is smaller in size than the first full XOR parity buffer.