Patent ID: 11864246
Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A terminal device, comprising:
one or more processors; and
one or more memories comprising computer program codes,
the one or more memories and the computer program codes configured to, with the one or more processors, cause the terminal device at least to:
determine an interlace configuration for uplink shared channel transmission to a network node in a two-step contention-free random access procedure; and
perform the uplink shared channel transmission to the network node in the two-step contention-free random access procedure, according to the determined interlace configuration; wherein the determination of the interlace configuration is based at least in part on dedicated signaling for the two-step contention-free random access procedure from the network node; wherein the dedicated signaling includes one or more of:
a start interlace index for an interlace or a set of interlaces allocated for the uplink shared channel transmission;
a number of consecutive interlaces allocated for the uplink shared channel transmission; and
a dedicated flag indicating whether to enable interlaced resource allocation for the uplink shared channel transmission in the two-step contention-free random access procedure.