Patent ID: 11915968
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. The method according to claim 10, wherein the second dielectric layer comprises a silicon oxynitride layer formed on the substrate;
forming the mask layer on the second dielectric layer comprises:
forming the first spin-coated hard mask layer on the second dielectric layer; and
forming the first silicon oxide layer on a surface of the first spin-coated hard mask layer;

after performing the patterning process on the mask layer based on the second patterned mask layer to form a third patterned mask layer, the method further comprising:
removing the second patterned mask layer; and

after performing the patterning process on the second dielectric layer based on the third patterned mask layer to form the first trench, the method further comprising:
removing the third patterned mask layer.