Patent ID: 11961832
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. An integrated circuit device comprising:
a substrate having a plurality of intellectual property (IP) core, each of the plurality of IP core surrounded by a separation region, having at least two first edges extending in a first horizontal direction and at least two second edges extending in a second horizontal direction that intersects the first horizontal direction, and comprising a cell region and an edge dummy region that is arranged to extend along the at least two second edges;
a plurality of dummy fin-type active regions in the edge dummy region;
a plurality of fin-type active regions in the cell region, extending in the first horizontal direction;
a plurality of nanosheet stack structures disposed on top surfaces of the plurality of fin-type active regions and spaced apart from the top surfaces of the plurality of fin-type active regions, each of the plurality of nanosheet stack structures comprising a plurality of nanosheets;
a first device isolation film, which defines the plurality of fin-type active regions and the plurality of dummy fin-type active regions, and fills a lower portion of a first trench disposed between two fin-type active regions, adjacent to each other, of the plurality of fin-type active regions, and between two dummy fin-type active regions, adjacent to each other, of the plurality of dummy fin-type active regions, the first trench having a bottom surface at a first vertical level;
a second device isolation film filling a second trench, the second trench extending through the first device isolation film and having a bottom surface at a second vertical level that is lower than the first vertical level;
a plurality of gate lines in the cell region, extending in the second horizontal direction, which intersects the first horizontal direction; and
a plurality of dummy gate lines in the edge dummy region, wherein the edge dummy region is disposed between the separation region and the cell region,
wherein a length, in the second horizontal direction, of the edge dummy region is the same as a length, in the second horizontal direction, of the cell region, and
wherein a portion of the second device isolation film between two adjacent IP cores among the plurality of IP core is formed in one body.