Patent ID: 11961588
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method, comprising:
receiving an access request for a memory cell in a memory bank of a memory array that includes a plurality of memory sections, each memory section having a plurality of physical rows of memory cells;
identifying a memory section of the plurality of memory sections of the memory bank in which the memory cell is located;
identifying, in the memory section, a physical row of the plurality of physical rows of memory cells that comprises the memory cell;
identifying, in the physical row, a memory page that comprises the memory cell, wherein the physical row comprises a first quantity of memory cells selectively coupled with a second quantity of sense components, wherein each sense component is selectively coupled with a respective plurality of memory cells of the physical row, and the memory page comprises a third quantity of memory cells equal to the second quantity of sense components, the first quantity greater than the second quantity; and
generating a logic row address to open the memory page.