Patent ID: 11961839
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. A semiconductor device, comprising:
a substrate;
a first active pattern on the substrate and extending in a first direction, the first active pattern including a first channel pattern;
first source/drain patterns in recesses in an upper portion of the first channel pattern;
a gate electrode on the first active pattern and extending in a second direction crossing the first direction,
an active contact connected to the first source/drain pattern; and
an interface layer between the active contact and the first source/drain pattern,
wherein:
each of the first source/drain patterns includes a first semiconductor layer, and a second semiconductor layer, which are sequentially provided on the recesses,
each of the first channel pattern, the first semiconductor layer, and the second semiconductor layer includes silicon-germanium (SiGe),
a germanium concentration of the first semiconductor layer is higher than a germanium concentration of the second semiconductor layer,
the first channel pattern includes a pair of first surfaces, which face the first source/drain patterns, and a pair of second surfaces, which connect the pair of first surfaces to each other and are overlapped with the gate electrode, and
the first semiconductor layer includes first portions on the first surfaces and second portions on the second surfaces,
the first channel pattern includes a plurality of first layers vertically stacked on the substrate,
the plurality of first layers are connected to the first semiconductor layer.