Patent ID: 11900982
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A semiconductor device comprising:
a first receiver configured to receive a chip select signal from a receiving node to which a termination resistor is coupled and configured to generate a first internal chip select signal;
a command pulse generation circuit configured to generate a command pulse for entering into a self-refresh operation based on an internal command address and the first internal chip select signal; and
an operation control circuit configured to, when the semiconductor device enters the self-refresh operation based on the command pulse, generate a resistor value change signal that adjusts a value of the termination resistor,
wherein, when the level of the chip select signal transitions from a preset level to a first target level, such that the semiconductor device enters the self-refresh operation, the first receiver is configured to set a logic level of the first internal chip select signal to a preset logic level.