Patent ID: 11875050
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A memory device comprising:
memory cells programmed into various states according to a combination of N-bit data;
a peripheral circuit configured to receive original data to perform a program operation of the memory cells, and to convert the original data into variable data with a plurality of combinations that are divided into first to (N+1)-th groups according to a number of first level bits; and
a control logic circuit configured to control the peripheral circuit to convert the original data into the variable data so that the number of the first level bits of data combinations included in each of the first to (N+1)-th groups among the plurality of data combinations is the same, and configured to control the peripheral circuit to program the memory cells by using the variable data.