Patent ID: 11949385
Assignee: PSEMI CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A circuit arrangement comprising:
a first stack of a plurality of series connected transistors for operation as an RF amplifier;
a second stack of a plurality of series connected transistors, gate nodes of the second stack coupled to respective gate nodes of the first stack via respective resistors; and
a biasing circuit configured to provide a biasing voltage to at least one gate node of a transistor of the first stack different from an input transistor of the first stack and a gate node of a respective transistor of the second stack,
wherein the biasing circuit comprises a feedback loop that senses a voltage at a source node of the respective transistor of the second stack and controls the biasing voltage to the at least one gate node based on a difference between a sensed voltage at said source node and a reference voltage, and
wherein the respective resistors are configured to substantially isolate the second stack from an RF signal that flows through the first stack.