Patent ID: 11901012
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A non-volatile memory device comprising:
a memory cell array including memory cells respectively connected to bit lines; and
a control logic unit configured to control a program operation with respect to the memory cells, wherein the control logic unit is further configured to:
perform a normal program verify operation with respect to the memory cells by using a normal program verify condition, during the program operation, and
based on a suspend command that is received during the program operation, perform an initial program verify operation with respect to the memory cells by using an initial program verify condition that is different from the normal program verify condition,
wherein the normal program verify condition comprises a normal program verify voltage, and
the initial program verify condition comprises an initial program verify voltage that is different from the normal program verify voltage,
wherein the initial program verify voltage includes a first initial program verify voltage level for a first word line and a second initial program verify voltage level for a second word line, and the first initial program verify voltage level differs from the second initial program verify voltage level according to a position of the first word line relative to the second word line.