Patent ID: 11899746
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. A system comprising:
a first integrated circuit device comprising:
input circuitry configurable to receive a first vector of a first matrix, a second vector of the first matrix, and a third vector of a second matrix;
a register communicatively coupled to the input circuitry, wherein the register is configurable to store at least a portion of the second vector;
multiplier circuitry comprising:
a first multiplier configurable to:
receive the first vector directly from the input circuitry and receive the second vector from the register; and
determine a first partial inner-product based at least in part on the first vector and the second vector; and

a second multiplier configurable to determine a second partial inner-product based at least in part on the second vector and the third vector; and

adder circuitry configurable to determine a first inner-product of a dot-product based at least in part on the first partial inner-product; and

a second integrated circuit device communicatively coupled to the first integrated circuit device.