Patent ID: 11966594
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 7:
8. The memory system of claim 1, wherein:
each of the at least one memory device further comprises a control logic coupled to the array of memory cells;
the memory controller and the control logic of the at least one memory device are powered by the second power source; and
the memory controller is further configured to:
maintain the second queue with memory operations that cause power consumption from a second one of the first and second power sources if executed;
determine whether execution of a second subsequent memory operation in the second queue would cause the second one of the first and second power sources to be overloaded;
in response to determining that the second subsequent memory operation in the second queue would not cause the second one of the first and second power sources to be overloaded if executed, execute the second subsequent memory operation; and
in response to determining that the second subsequent memory operation in the second queue would cause the second one of the first and second power sources to be overloaded if executed, delay execution of the second subsequent memory operation.