Patent ID: 11862247
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 1:
2. The semiconductor memory device of claim 1, wherein:
the first select element includes a third select transistor and a fourth select transistor in series,
the third select element includes a fifth select transistor and a sixth select transistor in series,
a threshold voltage of the third select transistor is larger than a threshold voltage of the fifth select transistor,
a threshold voltage of the fourth select transistor is smaller than a threshold voltage of the sixth select transistor, and
when reading the data of the first memory cell, the control circuit is configured to apply a first voltage to a gate of the third select transistor and a gate of the fifth select transistor, and to apply a second voltage larger than the first voltage to a gate of the fourth select transistor and a gate of the sixth select transistor.