Patent ID: 11937417
Assignee: NANYA TECHNOLOGY CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method for forming a semiconductor device, comprising:
forming a conductive contact over a semiconductor substrate;
forming a first dielectric layer covering the conductive contact;
partially removing the first dielectric layer to form an opening exposing a top surface of the conductive contact;
forming a bottom electrode covering sidewalls of the opening and the top surface of the conductive contact;
depositing a second dielectric layer over the bottom electrode using a first process, wherein the first process has a first step coverage;
depositing dielectric portions over the second dielectric layer and at top corners of the opening using a second process, wherein the second process has a second step coverage smaller than the first step coverage; and
forming a top electrode covering the second dielectric layer and the dielectric portions;
wherein the first process includes a conformal deposition process, and the second process includes a conformal deposition process;
wherein the second process includes a non-conformal liner atomic layer deposition (NOLA) process.