Patent ID: 11928414
Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 5:
6. The pin line-out design method for the chip according to claim 5, wherein performing the anti-pad design on each layer of the circuit board according to the via hole impedance requirement of the chip comprises:
disposing a first track-type anti-pad on the ground layer located on an upper layer of the third line-out layer corresponding to the RX pin;
disposing the first track-type anti-pad on the third line-out layer corresponding to the RX pin;
disposing a second track-type anti-pad on the ground layer located on a lower layer of the third line-out layer corresponding to the RX pin; wherein a diameter of the first track-type anti-pad is greater than a diameter of the second track-type anti-pad;
disposing a third track-type anti-pad on the first line-out layer corresponding to the power supply pins to prevent the power supply pin from being short-circuited; wherein a diameter of the third track-type anti-pad is equal to the diameter of the second track-type anti-pad; and
disposing a circular anti-pad respectively on the ground layers located on the upper layer and the lower layer of the third line-out layer corresponding to the TX pin.