Patent ID: 11961764
Assignee: STATS CHIPPAC PTE. LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A semiconductor device, comprising:
a semiconductor die;
an encapsulant deposited over the semiconductor die, wherein a side surface of the semiconductor die is exposed from the encapsulant; and
a fan-in interconnect structure formed over the semiconductor die, wherein the fan-in interconnect structure includes,
a first insulating layer formed over the semiconductor die,
a second insulating layer formed over the first insulating layer,
a conductive layer formed over the first insulating layer and second insulating layer, and
a third insulating layer formed over the conductive layer;

wherein a side surface of the first insulating layer, a side surface of the second insulating layer, a side surface of the third insulating layer, a side surface of the semiconductor die, and a side surface of the encapsulant are all coplanar to each other.