Patent ID: 11927622
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 10:
11. A testing method for a semiconductor device, including:
a connection member that is electrically connected on joint surfaces of a first semiconductor substrate and a second semiconductor substrate to form a plurality of connection lines that extend over the first semiconductor substrate and the second semiconductor substrate,
a power supply terminal connected to one end of each of the plurality of connection lines,
a selector configured to select one of other ends of the plurality of connection lines, and
an observation terminal connected to an output of the selector, the testing method comprising:
supplying power to the power supply terminal;
sequentially selecting the plurality of connection lines by the selector;
observing current-carrying states of the plurality of connection lines via the observation terminal; and
detecting a connection line indicating a resistance state higher than a threshold as a failure location.