Patent ID: 11888490
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 0:
1. A delay estimation device, comprising:
a digitally controlled delay line (DCDL), receiving a first clock signal and generates a plurality of first phase signals based on the first clock signal;
a time-to-digital converter (TDC), coupled with the DCDL and generating a first timing code based on the first phase signals and a second clock signal; and
a control circuit, coupled with the TDC, estimating a specific delay between the first clock signal and the second clock signal based on the first timing code;
a pulse generator for receiving a reference clock signal and outputting the first clock signal and the second clock signal in response to the reference clock signal, wherein the pulse generator comprises:
a first D flip-flop (DFF), having a data input terminal, a clock input terminal, and an output terminal, wherein the clock input terminal of the first DFF receives the first clock signal, the data input terminal of the first DFF receives a predetermined data signal, wherein the first DFF outputs the first clock signal via the output terminal of the first DFF in response to a first rising edge of the reference clock signal and the predetermined data signal; and
a second DFF, having a data input terminal, a clock input terminal, and an output terminal, wherein the clock input terminal of the second DFF receives the reference clock signal, the data input terminal of the second DFF is coupled with the output terminal of the first DFF and receives the first clock signal, wherein the second DFF outputs the second clock signal via the output terminal of the second DFF in response to a second rising edge of the reference clock signal; and

a mode selecting circuit coupled between the DCDL and the pulse generator and selectively outputting the reference clock signal or the first clock signal to the DCDL in response to a first mode selection signal.