Patent ID: 11960360
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A memory system, comprising:
one or more memories; and
one or more controllers coupled with the one or more memories and configured to cause the memory system to:
read, from the one or more memories, a first codeword comprising a first set of data bits representative of a set of data and a second codeword comprising a second set of data bits representative of the set of data;
generate, based at least in part on reading the first codeword from the one or more memories, an error detection bit that indicates whether an error has been detected in the first codeword;
generate, based at least in part on reading the first codeword and the second codeword from the one or more memories, a match bit that indicates whether a portion of the first codeword matches a corresponding portion of the second codeword; and
determine an error status of the first codeword based at least in part on the match bit and the error detection bit.