Patent ID: 11922984
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 1:
2. A method of manufacturing a memory device, the method comprising:
forming isolation layers in a first region and a second region of a substrate to define first and second active regions in the first and second regions, respectively;
removing at least a portion of the first active regions and at least a portion of the second active regions to form trenches;
forming first gate insulating layers in the trenches of the first active regions;
forming second gate insulating layers in the trenches of the second active regions, a material of the second gate insulating layers being different from a material of the first gate insulating layers;
forming gate structures in the trenches of the first and second active regions, such that a first memory cell array with first memory cells having volatility is formed in the first active region and a second memory cell array with second memory cells having non-volatility is formed in the second active region, each of the second memory cells having a height smaller than a height of each of the first memory cells in a direction perpendicular to a top surface of the substrate;
forming transfer switches between the first memory cells and the second memory cells; and
forming a controller configured to turn on the transfer switches, read data of at least one of the first memory cells, and store the data in at least one of the second memory cells.