Patent ID: 11861758
Assignee: NVIDIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. The computer-implemented method of claim 1, wherein the memory is a second memory, and the computer-implemented method further comprises:
creating a set of first memory buffers in a first memory associated with the first processor, the set of first memory buffers comprising a corresponding first memory buffer for each of the set of packets;
storing a first portion of each of the set of packets in the corresponding first memory buffer;
creating a set of second memory buffers in the second memory associated with the second processor, the set of second memory buffers comprising a corresponding second memory buffer for each of the set of packets; and
storing a second portion of each of the set of packets in the corresponding second memory buffer, wherein the second processor obtains the packet data from the set of second memory buffers and processes the packet data to obtain the processed packet data.