Patent ID: 11942513
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 8:
9. A semiconductor structure, comprising:
a substrate having a front surface;
a first semiconductor layer in proximal to the front surface;
a second semiconductor layer over the first semiconductor layer, wherein:
a first vertical dimension is an entire distance between a first part of a lower surface of the second semiconductor layer and a first part of a top surface of the first semiconductor layer;
a second vertical dimension is an entire distance between a second part of the lower surface of the second semiconductor layer and a second part of the top surface of the first semiconductor layer, the second vertical dimension is greater than the first vertical dimension; and
a first part and a second part of the lower surface of the second semiconductor layer together defines a step configuration, and a first part and a second part of the top surface of the first semiconductor layer together defines a step configuration;

a gate having a portion between the first semiconductor layer and the second semiconductor layer; and
a spacer, wherein the spacer comprises:
a first portion in direct contact with the first part of the lower surface of the second semiconductor layer and the first part of the top surface of the first semiconductor layer; and
a second portion in direct contact with the second part of the lower surface of the second semiconductor layer and the second part of the top surface of the first semiconductor layer.