Patent ID: 11955486
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. The method of claim 16, wherein:
the second standard cell further includes a first interconnect structure disposed over the second FinFET device, the first interconnect structure including:
a first contact landing on a source/drain region of the single fin structure of the second FinFET device;
a first metal line extending lengthwise in the first direction; and
a first via interposed between the first contact and the first metal line;

the third standard cell further includes a second interconnect structure disposed over the third FinFET device, the second interconnect structure including:
a second contact landing on a source/drain region of the single fin structure of the third FinFET device;
a second metal line extending lengthwise in the second direction; and
a second via interposed between the second contact and the second metal line, wherein a width of the first metal line measured in the second direction is greater than a width of the second metal line measured in the second direction.