Patent ID: 11868653
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 0:
1. A memory system connectable to a host, the host including a data buffer, the memory system comprising:
a nonvolatile memory including a plurality of word lines, the plurality of word lines including at least a first word line and a second word line, each of the plurality of word lines connecting a plurality of memory cells;
a write buffer; and
a controller electrically connected to the nonvolatile memory and configured to execute a multi-step write operation for writing data to the nonvolatile memory, the multi-step write operation including at least a first-step write operation and a second-step write operation, wherein
the controller is further configured to:
transfer first data from the data buffer of the host to the write buffer;
transfer the first data from the write buffer to the nonvolatile memory;
execute the first-step write operation for the first data on the plurality of memory cells connected to the first word line;
transfer second data from the data buffer of the host to the write buffer;
transfer the second data from the write buffer to the nonvolatile memory;
execute the first-step write operation for the second data on the plurality of memory cells connected to the second word line; and
in executing the second-step write operation for the first data,
determine that the first data is not stored in the write buffer;
in response to determining that the first data is not stored in the write buffer, transfer the first data from the data buffer of the host to the write buffer again;
transfer the first data from the write buffer to the nonvolatile memory again; and
execute the second-step write operation for the first data on the plurality of memory cells connected to the first word line.