Patent ID: 11967364
Assignee: RAMBUS INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A data-buffer component comprising:
a primary data port to couple to a memory-controller component;
first and second secondary data ports to couple to respective first and second memory components; and
data-buffer component supporting a first access mode and a second access mode, wherein:
in the first access mode, the data-buffer component communicates, to the primary data port, first data bursts from the first secondary data port separate from second data bursts from the second secondary data port; and
in the second access mode, the data-buffer component simultaneously receives ones of the first data bursts from the first secondary data port and ones of the second data bursts from the second secondary data port and communicates, to the primary data port, the ones of the first data bursts from the first secondary data port interleaved with the ones of the second data bursts from the second secondary data port.