Patent ID: 11887673
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory device comprising:
a plurality of memory cells connected to a word line;
an operation controller configured to apply a first read voltage or a second read voltage to the word line and configured to obtain data that is stored in the plurality of memory cells through bit lines that are respectively connected to the plurality of memory cells, wherein the second read voltage is higher than the first read voltage; and
a read voltage controller configured to control the operation controller to read the data that is stored in the plurality of memory cells by using the second read voltage and control the operation controller to read the data that is stored in the plurality of memory cells by using the first read voltage according to the number of off cells that are counted based on the data that is read by using the second read voltage, in response to a read command that provides instruction to read the data that is stored in the plurality of memory cells that are input from an external controller.