Patent ID: 11972817
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The memory apparatus as set forth in claim 4, wherein the control means is further configured to:
start the program-verify operation for a selected one of the plurality of data states;
initialize the first status bit of the first data latch as zero and the second status bit of the second data latch as zero for the memory cells targeted for the selected one of the plurality of data states;
apply one of the plurality of program pulses of the program-verify operation while applying one of the plurality of bit line voltages to each of the plurality of bit lines coupled to the memory cells being programmed in the program-verify operation depending on which of the plurality of latch states corresponds to the first status bit and the second status bit to adjust the programming speed of the memory cells being programmed;
determine whether the one of the plurality of verify loops associated with the earlier one of the plurality of data states has been triggered;
determine whether another of the plurality of verify loops associated with the selected one of the plurality of data states using the verify low reference voltage and the verify high reference voltage for the selected one of the plurality of data states has been triggered in response to determining the one of the plurality of verify loops associated with the earlier one of the plurality of data states has not been triggered;
determine whether a selected state look ahead quick pass write flag equals one in response to determining the one of the plurality of verify loops associated with the earlier one of the plurality of data states has been triggered;
perform the one of the plurality of verify loops associated with the earlier one of the plurality of data states using the verify low reference voltage for the earlier one of the plurality of data states and sense the memory cells targeted for the selected one of the plurality of data states in response to determining the selected state look ahead quick pass write flag does not equal one;
determine whether the another of the plurality of verify loops associated with the selected one of the plurality of data states using the verify low reference voltage and the verify high reference voltage for the selected one of the plurality of data states has been triggered in response to determining the selected state look ahead quick pass write flag equals one;
identify the memory cells targeted for the selected one of the plurality of data states as having the threshold voltage above the verify low reference voltage for the earlier one of the plurality of data states and set the first status bit of the first data latch as one and the second status bit of the second data latch as zero for the memory cells targeted for the selected one of the plurality of data states identified as having the threshold voltage above the verify low reference voltage for the earlier one of the plurality of data states;
count a selected state look ahead quick pass write quantity of the memory cells targeted for the selected one of the plurality of data states identified as having the threshold voltage above the verify low reference voltage for the earlier one of the plurality of data states;
determine whether the selected state look ahead quick pass write quantity is greater than a predetermined minimum selected state look ahead quick pass write off quantity;
determine whether the another of the plurality of verify loops associated with the selected one of the plurality of data states using the verify low reference voltage and the verify high reference voltage for the selected one of the plurality of data states has been triggered in response to determining the selected state look ahead quick pass write quantity is not greater than the predetermined minimum selected state look ahead quick pass write off quantity;
set the selected state look ahead quick pass write flag to be one in response to determining the selected state look ahead quick pass write quantity is greater than the predetermined minimum selected state look ahead quick pass write off quantity;
determine whether the another of the plurality of verify loops associated with the selected one of the plurality of data states using the verify low reference voltage and the verify high reference voltage for the selected one of the plurality of data states has been triggered;
return to apply one of the plurality of program pulses of the program-verify operation while applying one of the plurality of bit line voltages to each of the plurality of bit lines coupled to the memory cells being programmed in the program-verify operation according to the first status bit and the second status bit to adjust the programming speed of the memory cells being programmed in response to determining the another of the plurality of verify loops associated with the selected one of the plurality of data states has not been triggered;
perform another of the plurality of verify loops associated with the selected one of the plurality of data states using the verify low reference voltage and the verify high reference voltage for the selected one of the plurality of data states and sense the memory cells targeted for the selected one of the plurality of data states in response to determining the another of the plurality of verify loops associated with the selected one of the plurality of data states has been triggered;
identify the memory cells targeted for the selected one of the plurality of data states as having the threshold voltage above the verify high reference voltage for the selected one of the plurality of data states and set the first status bit of the first data latch as one and the second status bit of the second data latch as one for the memory cells targeted for the selected one of the plurality of data states having the threshold voltage above the verify high reference voltage for the selected one of the plurality of data states;
identify the memory cells targeted for the selected one of the plurality of data states as having the threshold voltage above the verify low reference voltage for the selected one of the plurality of data states and set the first status bit of the first data latch as one and the second status bit of the second data latch as zero in response to the first status bit being one and the second status bit being zero and set the first status bit of the first data latch as zero and the second status bit of the second data latch as one in response to the first status bit being one and the second status bit being zero for the memory cells targeted for the selected one of the plurality of data states having the threshold voltage above the verify low reference voltage for the selected one of the plurality of data states while not exceeding the verify high reference voltage for the selected one of the plurality of data states;
count a selected state verify high quantity of the memory cells targeted for the selected one of the plurality of data states identified as having the threshold voltage above the verify high reference voltage for the selected one of the plurality of data states;
determine whether the selected state verify high quantity is less than a predetermined minimum selected state verify high on quantity;
return to apply the one of the plurality of program pulses of the program-verify operation while applying the one of the plurality of bit line voltages to each of the plurality of bit lines coupled to the memory cells being programmed in the program-verify operation depending on which of the plurality of latch states corresponds to the first status bit and the second status bit to adjust the programming speed of the memory cells being programmed in response to the selected state verify high quantity not being less than the predetermined minimum selected state verify high on quantity; and
end the program operation in response to the selected state verify high quantity being less than the predetermined minimum selected state verify high on quantity.