Patent ID: 11916012
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A manufacturing method for a semiconductor structure, wherein the manufacturing method comprises:
forming a thinned semiconductor wafer, wherein the thinned semiconductor wafer comprises a semiconductor substrate, an interconnect structure formed on the semiconductor substrate, a bonding structure formed on the interconnect structure, and a through semiconductor via penetrating through the semiconductor substrate and connected to the interconnect structure;
singulating the thinned semiconductor wafer to form a plurality of semiconductor dies;
bonding a first one of the semiconductor dies to a carrier die, wherein a bonding conductor of the bonding structure of the first one of the semiconductor dies is bonded to a through carrier via of the carrier die, and a bonding surface area of the bonding conductor is less than a bonding surface area of the through carrier via; and
bonding a second one of the semiconductor dies to the first one of the semiconductor dies.