Patent ID: 11881278
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The method of claim 4, wherein acquiring the target position data of the fail bits in the target subdomain and the related subdomain based on the first test data and the second test data comprises:
searching for one or more related fail bits of the one or more fail bits beyond the repair range of the assigned local redundant circuits and the assigned global redundant circuits and a related subdomain where the related fail bits are located according to the first redundant circuit assigning accumulated result and the second test data, wherein each of the related fail bits is a fail bit that is located in a same segment and in a same word line as a respective one of the fail bits beyond the repair range: and
acquiring the target position data of the fail bits in the target subdomain and the related subdomain according to the first accumulated fail bit position data and the second test data.