Patent ID: 11928409
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A system comprising:
a memory; and
one or more processing units coupled with the memory, the one or more processing units are configured to perform a method to support a design cycle of a chip, wherein performing the method comprises:
receiving a physical design block and a physical hierarchy of a chip design of the chip;
extracting one or more features of a macro to be added to the chip design based on a logic synthesis of the chip design;
receiving, by the processor, additional constraints as parameters for the macro, the additional constraints including a highest level of metal that can be used by the macro, an optimization option for the macro, a desired aspect ratio of the macro, and an uplift factor of the macro;
predicting specifications of the macro to be added to the chip design based on the physical design block and the additional constraints, the predicting performed using a pre-trained machine learning model;
using the specifications of the macro to perform a physical synthesis of the chip design to determine a physical layout of the chip.