Patent ID: 11888068
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A method of forming an integrated assembly, comprising:
forming an arrangement to comprise semiconductor pillars extending upwardly from digit lines; the digits lines extending along a first direction;
patterning slits to extend partially into the pillars; each of the pillars having an associated one of the slits patterned therein and being configured to have a base region, and to have a pair of segments extending upwardly from the base region, with the segments of said pair being spaced from one another by an intervening gap corresponding to said associated one of the slits;
forming first insulative material along sidewalls of the slits;
forming conductive wordlines within the slits, adjacent the first insulative material, and extending along a second direction which crosses the first direction;
forming first source/drain regions within the base regions of the pillars;
forming second source/drain regions within the segments of the pillars, and vertically spaced from the first source/drain regions by channel regions;
forming second insulative material within the slits and over the wordlines; and
forming conductive interconnects within the slits and over the second insulative material.