Patent ID: 11868272
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 0:
1. A device comprising:
a cache that includes:
a cache controller configured to receive a read operation directed to a memory address;
a first cache storage coupled to the cache controller, wherein the first cache storage includes a first cache line associated with the memory address; and
a second cache storage coupled to the cache controller in parallel with the first cache storage, wherein the second cache storage includes a second cache line;

wherein the cache controller is configured to:
determine whether the read operation is associated with a read-miss in the first cache storage and whether the read operation is associated with a read-miss in the second cache storage in parallel;
determine whether the first cache line includes a set of data; and
based on the read operation being associated with a read-miss in the first cache storage, evict the set of data from the first cache line of the first cache storage to the second cache line of the second cache storage.