Patent ID: 11940855
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 0:
1. An apparatus, comprising:
a processor controlled by an operating system; and
an interface communicatively coupled to the processor, wherein the interface is to connect with a device external to the processor, and wherein the operating system is to:
in response to the device being connected to the interface, set a peak power of the processor based on a maximum power budget of the interface;
if a fixed time interval passes after the device is connected to the interface and before the setting of the peak power of the processor based on the maximum power budget of the interface, assert a throttling signal to throttle power of the processor to a lowest power state, and once a platform manager is informed that the operating system has throttled power of the processor and power budget to a port is available, de-assert the throttling signal; and
after the setting of the peak power of the processor based on the maximum power budget of the interface, determine a power required by the device, and change the peak power of the processor according to the power required by the device.