Patent ID: 11908793
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An integrated-circuit device package, comprising:
an interconnect bridge in a dielectric layer, the interconnect bridge comprising traces, and the interconnect bridge having a top side and a bottom side opposite the top side, a first side between the top side and the bottom side, and a second side between the top side and the bottom side;
a first via and a second via in the dielectric layer, the first via and the second via laterally adjacent to the first side of the interconnect bridge;
a third via and a fourth via in the dielectric layer, the third via and the fourth via laterally adjacent to the second side of the interconnect bridge;
a first integrated circuit chip coupled to the top side of the interconnect bridge, the first integrated circuit chip electrically coupled to the first via and the second via;
a second integrated circuit chip having a top side and a bottom side, the bottom side of the second integrated circuit chip coupled to the top side of the interconnect bridge, the second integrated circuit chip electrically coupled to the third via and the fourth via;
a third integrated circuit chip coupled to the top side of the second integrated circuit chip; and
a plurality of bumps beneath interconnect bridge, the plurality of bumps within a footprint of the first side and the second side of the interconnect bridge.