Patent ID: 11922064
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 10:
11. The storage device of claim 10, wherein the second data input/output component includes:
a third shift register controller configured to control a plurality of third shift registers, each of which outputs a third shift signal in response to rising edges of the read enable signal and the second data strobe signal;
a fourth shift register controller configured to control a plurality of fourth shift registers, each of which outputs a fourth shift signal in response to falling edges of the read enable signal and the second data strobe signal;
a plurality of third storage registers each configured to store the training data output from the first data input/output component and configured to shift and output the training data, which is stored therein, in response to the rising edge of the second data strobe signal; and
a plurality of fourth storage registers each configured to store the training data output from the first data input/output component and configured to shift and output the training data, which is stored therein, in response to the falling edge of the second data strobe signal.