Patent ID: 11921695
Assignee: DELL PRODUCTS L.P.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 3:
4. The computer-implemented method of claim 3, wherein the first non-optimized or non-preferred path is between a first initiator of the host and a first target port of the second node, wherein the first I/O operation is a write I/O operation that writes first data to a target logical address on the first logical device, and wherein the method further comprises:
receiving, by the second node, the write I/O operation at the first target port;
determining, in accordance with one or more criteria, that the second node is a preferred node for the first logical device;
performing second processing to service the write I/O operation, said second processing including:
determining a second metadata change to a second metadata page, wherein the second metadata page is used in connection with accessing the target logical address of the first logical device;
persistently storing, by the second node, the second metadata change to the second metadata page in a second persisted entry of the persisted metadata log; and
recording, in the in-memory metadata log of the second node, a third entry for the second metadata change to the second metadata page, wherein the third entry includes the second metadata change to the second metadata page.