Patent ID: 11875715
Assignee: HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A shift register, comprising: an input sub-circuit and a first output sub-circuit;
the input sub-circuit is configured to pre-charge, in response to an input signal, a pull-up node by a first power voltage; the pull-up node is a coupling node at which the input sub-circuit and the first output sub-circuit are coupled;
the first output sub-circuit is configured to output a clock signal through a first signal output terminal in response to a potential of the pull-up node; wherein,
the shift register further comprises a first noise reduction sub-circuit and/or a second noise reduction sub-circuit;
the first noise reduction sub-circuit is configured to perform, in response to a first noise reduction control signal, noise reduction on the pull-up node through a non-operation level signal in a blank period;
the second noise reduction sub-circuit is configured to perform, in response to a second noise reduction control signal, noise reduction on the first signal output terminal by a non-operation level signal during the blank period,
the shift register further comprising: a plurality of second output sub-circuits; each of the plurality of second output sub-circuits is configured to output a signal output from the first signal output terminal through a second signal output terminal corresponding thereto in response to a switch control signal corresponding thereto;
the shift register further comprising: a pull-down control sub-circuit, a pull-down sub-circuit, a third noise reduction sub-circuit, a fourth noise reduction sub-circuit;
the pull-down control sub-circuit is configured to transmit, in response to an operation level signal, the operation level signal to a pull-down node; the pull-down node is a coupling node at which the pull-down control sub-circuit and the pull-down sub-circuit are coupled;
the pull-down sub-circuit is configured to pull down a potential of the pull-down node by the non-operation level signal in response to the potential of the pull-up node;
the third noise reduction sub-circuit is configured to perform noise reduction on the pull-up node by the non-operation level signal in response to the potential of the pull-down node;
the fourth noise reduction sub-circuit is configured to perform noise reduction on the first signal output terminal by the non-operation level signal in response to the potential of the pull-down node; and wherein
the shift register further comprising a plurality of fifth noise reduction sub-circuits provided in one-to-one correspondence with the plurality of second signal output terminals;
each of the plurality of fifth noise reduction sub-circuits is configured to perform, in response to the potential of the pull-down node, noise reduction on the second output terminal corresponding thereto by the non-operation level signal in the blank period.