Patent ID: 11960756
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. An apparatus, comprising:
a solid state drive, having:
a host interface configured to receive commands from a host system;
memory cells formed on at least one integrated circuit die; and
a processing device configured to control executions of the commands;

wherein the solid state drive has firmware configured to:
allocate, in response to a first command from the host system, first storage resources of the memory cells to a host allocated storage space during execution of the first command;
identify free storage resources available in the memory cells;
allocate, from the free storage resources, second storage resources of the memory cells to store one or more proof of space plots;
receive, from the host system via the host interface, a second command unrelated to proof of space activities; and
allocate at least a portion of the second storage resources for execution of the second command.