Patent ID: 11868202
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A system comprising:
a memory component to, upon completion of second pass programming in response to a multi-pass programming command, write a plurality of flag bits within a group of memory cells programmed by the multi-pass programming command; and
a processing device, operatively coupled to the memory component, the processing device to perform operations comprising:
detecting an error in attempting to read a top page of the group of memory cells;
determining a number of first values within the plurality of flag bits; and
in response to the number of first values not satisfying a threshold criterion, reporting, to a host computing device, an uncorrectable data error due to the top page of the group of memory cells being incompletely programmed.