Patent ID: 11934964
Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. A method, comprising:
receiving a regular expression operation to be performed on a stream of data units;
expressing the regular expression operation as a finite automata (FA) graph, the FA graph having a plurality of nodes connected by directional arcs, wherein:
each arc representing transitions between nodes of the FA graph based on criteria specified for the respective arc,
the plurality of nodes including nodes, including a skip node and a root node, representing states in the regular expression operation, and
the directional arcs include an arc from the skip node to the root node; and

performing the regular expression operation on the stream of data units based on the FA graph, wherein performing includes configuring a regular expression engine of a hardware-based regular expression accelerator to:
beginning at the root node in the plurality of nodes of the FA graph, step the regular expression engine through one or more nodes of the FA graph until the regular expression engine arrives at the skip node; and
consume, at the skip node, a predefined number of data units from the stream of data units before traversing the arc from the skip node to the root node, wherein the predefined number of data units is provided by a counter used to detect an end of a payload.