Patent ID: 11940887
Assignee: INNOGRIT TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. A non-transitory machine-readable medium having computer instructions, wherein the computer instructions, when executed by a hardware processor of a storage controller, cause the hardware processor to:
issue a first cache program operation to a non-volatile storage device to write data to a first regular block of the non-volatile storage device, wherein storage cells in the first regular block are multi-bit cells, wherein the non-volatile storage device is configured to receive the data into a cache buffer of the non-volatile storage device, to transfer the data from the cache buffer to a data buffer of the non-volatile storage device, to acknowledge the storage controller upon completion of transferring the data from the cache buffer into the data buffer, to write the data from the data buffer to the first regular block, and to write the data from the data buffer to a backup block of the non-volatile storage device, as a copy of the data, wherein storage cells in the backup block are single-bit cells;
receive a program error from the non-volatile storage device;
retrieve a mapping between the first regular block and the backup block from a mapping table;
issue a read operation to the non-volatile storage device to read the copy of the data from the backup block;
issue a second cache program operation to the non-volatile storage device to write the data to a second regular block of the non-volatile storage device, wherein storage cells in the second regular block are multi-bit cells; and
mark the first regular block as defective;
wherein the mapping table contains four (4) backup blocks repeatedly mapped to regular blocks in a plane in a round robin manner.