Patent ID: 11972113
Assignee: SILICON MOTION, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A memory device, comprising:
a non-volatile (NV) memory, arranged to store information, wherein the NV memory comprises at least one NV memory element; and
a memory controller, coupled to the NV memory, arranged to control operations of the memory device, wherein the memory controller comprises:
a processing circuit, arranged to control the memory controller according to a plurality of host commands from a host device, to allow the host device to access the NV memory through the memory controller; and
a transmission interface circuit, arranged to perform communications with the host device, wherein the transmission interface circuit comprises:
a physical layer (PHY) circuit, arranged to perform transmitting and receiving operations for the transmission interface circuit; and
at least one upper layer controller, arranged to control operations of the PHY circuit according to a predetermined specification;, wherein:
the memory controller utilizes the at least one upper layer controller to turn on the PHY circuit, for starting establishing a link between the host device and the memory device;
before entering a first handshaking phase of a handshaking procedure of the memory device, the handshaking procedure for establishing the link between the host device and the memory device, the memory controller utilizes the PHY circuit to receive any first incoming data sent from the host device to determine whether the any first incoming data indicates that the host device is in a corresponding first handshaking phase, and prevent sending any outgoing data that is equal to first predetermined data of the first handshaking phase to the host device before detecting that the host device is in the corresponding first handshaking phase, wherein the first handshaking phase is not earliest among multiple handshaking phases of the handshaking procedure; and
in response to the any first incoming data indicating that the host device is in the corresponding first handshaking phase, the memory controller utilizes the PHY circuit to send first outgoing data that is equal to the first predetermined data to the host device.