Patent ID: 11899829
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A method comprising:
generating, at a memory controller comprising authentication logic, a plurality of access codes, each access code of the plurality of access codes for a respective memory region of a plurality of memory regions of a memory device of a plurality of memory devices based partly on a provisioned key;
writing the plurality of access codes to a cache coupled to the memory controller; and
writing, via a memory bus, each respective access code of the plurality of access codes to a cache of the memory device;
obtaining, from a host computing device, a memory access request associated with the memory device of the plurality of memory devices, the memory access request comprising a memory address of the memory device and an access code;
responsive to the memory access request:
comparing, at the authentication logic, the access code with the stored plurality of access codes in the cache of the memory controller by:
matching the access code to one of the stored plurality of access codes; and
authenticating a memory command based on the matched access code, the memory command including a physical memory address in the corresponding memory region associated with the matched access code; and

responsive to matching the access code, performing a memory access operation associated with the memory access request.