Patent ID: 11881262
Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 2:
3. The resistive random access memory device according to claim 2, wherein said at least one first coupling transistor is or comprises a first isolation transistor arranged between said sense amplifier and said first bit line, said first isolation transistor being controlled by way of at least one second control signal, the control circuit being further configured to:
during the waiting phase, place said second control signal in a given state so as to render OFF the first isolation transistor and thus isolate the first bit line from said sense amplifier and place said first control signal in a state so as to maintain conducting the first reset transistor, said control circuit being further configured to during partial discharge and comparison phases: place said second control signal in another state, different from said given state, so as to render conducting the first isolation transistor and thus connect the first bit line to said sense amplifier.