Patent ID: 11887969
Assignee: nan
Field: Semiconductors (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 0:
1. An apparatus comprising:
a base;
a first device, and a second device arranged in a stack with the first device and the base, the first device including at least one conductive path at least partly through the first device, wherein the first device comprises a memory device;
an interposer located between and coupled to the first device and the second device;
a first structure portion located on a first side of the first device;
a second structure portion located on a second side of the first device, wherein the first structure portion, the second structure portion, and the memory device have a same height; and
conductive paths including a first portion of conductive paths going through vias of the first structure portion, and a second portion of conductive paths going through vias of the second structure portion.