Patent ID: 11917811
Assignee: WINBOND ELECTRONICS CORP.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 0:
1. A dynamic random access memory, comprising:
a plurality of bit line contact structures on a substrate;
a plurality of bit line structures on the bit line contact structures and extending along a first direction;
a plurality of first insulating structures on the substrate and extending along a second direction crossing the first direction;
a capacitor contact structure on the substrate and between adjacent ones of the bit line structures and adjacent ones of the first insulating structures;
a first connecting pad on the capacitor contact structure;
a second insulating structure surrounding the first connecting pad and a top width of the second insulating structure being greater than a bottom width of the second insulating structure; and
a capacitor structure on the first connecting pad and electrically connecting the first connecting pad, wherein a top surface of the second insulating structure is level with a top surface of the first connecting pad.