Patent ID: 11894059
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 19:
20. A method for operating a memory device, comprising:
applying a first program pulse through a word line to program multi-bit data to plural non-volatile memory cells;
verifying program states of the plural non-volatile memory cells, which correspond to the first program pulse;
determining a program mode, which causes a change of threshold voltages of the plural non-volatile memory cells, for a second program pulse to be applied to the word line; and
increasing a level of a pass voltage, which is applied to other non-volatile memory cells coupled to the plural non-volatile memory cells, from a first level to a second level, which is higher than the first level, before controlling a potential of a bit line according to the program mode while the second program pulse is applied to the word line, or adjusting a setup time for changing a potential of a bit line coupled to the at least one non-volatile memory cell, according to the program mode.