Patent ID: 11928053
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. The flash memory array of claim 13, wherein the first solid-state disk is configured to:
read, from a first physical block in which the valid data is located, the valid data and reverse mapping information of the valid data; and
send the reverse mapping information to the system controller,
wherein the system controller is further configured to:
query for the second logical address corresponding to the reverse mapping information based on the reverse mapping information; and
send the second logical address to the first solid-state disk, and

wherein the first solid-state disk is further configured to:
allocate a third logical address to the valid data;
copy the valid data to a second actual address of a second physical block;
delete the second correspondence;
create a third correspondence between the third logical address and the second actual address; and
erase data in the first physical block when the first physical block does not comprise other valid data.