Patent ID: 11937416
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 9:
10. A method comprising:
forming a semiconductor layer stack over a semiconductor substrate, wherein the semiconductor layer stack includes first semiconductor layers and second semiconductor layers, a first portion of the semiconductor layer stack is in a first transistor region, a second portion of the semiconductor layer stack is in a second transistor region, and the first portion of the semiconductor layer stack and the second portion of the semiconductor layer stack have a first number of the first semiconductor layers;
forming a patterned mask layer over the semiconductor layer stack, wherein the patterned mask layer covers the first portion of the semiconductor layer stack and exposes the second portion of the semiconductor layer stack;
etching the exposed second portion of the semiconductor layer stack to recess the second portion of the semiconductor layer stack, wherein the recessed second portion of the semiconductor layer stack has a second number of the first semiconductor layers that is less than the first number of the first semiconductor layers;
forming a third semiconductor layer over the recessed second portion of the semiconductor layer stack; and
processing the semiconductor layer stack to form a first transistor having the first number of the first semiconductor layers in the first transistor region and a second transistor having the second number of the first semiconductor layers in the second transistor region, wherein the processing includes removing the second semiconductor layers and removing the third semiconductor layer.