Patent ID: 11863435
Assignee: CISCO TECHNOLOGY, INC.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. An apparatus, comprising:
one or more hardware interfaces sending and receiving packets with a network; and
a fast path packet processing unit performing hardware-based packet processing; and
a slow path packet processing unit performing processor-based packet processing based on programmed instructions,
wherein the apparatus performs packet processing operations including segment routing-capable (SR-capable) packet processing operations, with the packet processing operations including:
receiving a segment routing packet;
responsive to a router data plane ascertaining during fast path processing by the fast path processing unit based on an Operations, Administration, and Maintenance (OAM) segment identifier (SID) of the segment routing packet that the segment routing packet is to be OAM processed by the slow path packet processing unit in the router, communicating the segment routing packet to the slow path packet processing unit, with fast path processing being hardware-based packet processing by the fast path processing unit; and
OAM processing of the segment routing packet by the slow path packet processing unit;
wherein the segment routing packet is an Internet Protocol version 6 (IPv6) packet including an IPv6 header and a segment routing header, with the IPv6 header including an IPv6 Destination Address; and wherein the IP Destination Address includes the OAM SID; and
wherein responsive to the OAM SID identifying timestamp behavior, the fast path processing unit communicating a timestamp of a current time along with the segment routing packet to the slow path packet processing unit.