Patent ID: 11863181
Assignee: NXP USA, INC.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A level-shifter circuit, comprising:
a pre-driver stage configured to receive differential signal inputs and generate differential pre-driver signal outputs corresponding to the differential signal inputs, wherein the pre-driver stage includes two resistor loads coupled to a diode connected MOS device that is connected to a ground reference voltage, two transistors coupled to the two resistor loads and configured to receive the differential signal inputs, and a PMOS transistor coupled to the two resistor loads via the two transistors and connected to a supply voltage;
a first output stage configured to directly receive both of the differential pre-driver outputs and generate a single-ended first stage output;
a second output stage configured to directly receive both of the differential pre-driver outputs and generate a single-ended second stage output; and
wherein the first and second stage outputs together form a differential signal output;
further comprising a controller configured to place the level-shifter into an off-mode, an idle-mode, or an active-mode.