Patent ID: 11901452
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A device comprising:
a fin structure disposed over a substrate;
a gate structure disposed over the fin structure;
an isolation structure disposed on the substrate; and
a source/drain feature disposed over the fin structure, the source/drain feature including:
first and second lower portions that are separated from each other by the isolation structure;
a single upper semiconductor portion disposed over the first and second lower portions, wherein the single upper semiconductor portion is merged from the first and second lower portions; and
a semiconductor layer disposed directly on the single upper semiconductor portion, wherein the semiconductor layer has a top surface facing away from a top surface of the substrate, wherein the top surface of the semiconductor layer includes a first multi-facet surface, wherein the semiconductor layer is formed of a different material than the single upper semiconductor portion.