Patent ID: 11966594
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 0:
1. A memory system, comprising:
at least one memory device, each of which comprises an array of memory cells powered by a first power source; and
a memory controller coupled to the at least one memory device and powered by a second power source, wherein at least a first queue and a second queue are configured to separate memory operations based on whether the memory operations cause power consumption from the first power source or the second power source, respectively, if executed, and the memory controller is configured to:
maintain the first queue with memory operations that cause power consumption from a first one of the first and second power sources if executed;
determine a current power consumption value of the first one of the first and second power sources indicating total concurrent power consumption of executing a plurality of memory operations in parallel;
determine an add-on power consumption value indicating additional power consumption of executing a first subsequent memory operation in the first queue;
determine whether a summation of the current and the add-on power consumption values exceeds a first predetermined power consumption threshold associated with the first one of the first and second power sources; and
responsive to determining that the summation of the current and the add-on power consumption values does not exceed the first predetermined power consumption threshold, release the first subsequent memory operation from the first queue to execute the first subsequent memory operation in parallel with the plurality of memory operations.