Patent ID: 11923306
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method for manufacturing a semiconductor structure, comprising:
forming a plurality of dummy structures spaced apart from each other;
forming a plurality of dielectric spacers laterally covering the dummy structures to form a plurality of trenches defined by the dielectric spacers;
filling a conductive material into the trenches to form electrically conductive features;
selectively depositing a capping material on the electrically conductive features to form a capping layer;
removing the dummy structures to form a plurality of recesses defined by the dielectric spacers;
filling a sacrificial material into the recesses so as to form sacrificial features;
depositing a sustaining layer on the sacrificial features; and
removing the sacrificial features to form air gaps confined by the sustaining layer and the dielectric spacers.