Patent ID: 11971451
Assignee: THE 13TH RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 5:
6. The method according to claim 1, wherein the target parameter comprises a target capacitance and a target resistance, and calculating, according to the admittance and the admittance formula, the target parameter in the on-wafer calibration piece model comprises:
substituting the admittance into the admittance formula for calculation to obtain an intermediate impedance, the intermediate impedance being a series impedance or a parallel impedance, wherein the series impedance is an impedance corresponding to a series admittance of the target capacitance and the target resistance, and the parallel impedance is an impedance corresponding to a parallel admittance of the target capacitance and the target resistance; and wherein a real part of the intermediate impedance is the target resistance, and an imaginary part of the intermediate impedance is the target capacitance.