Patent ID: 11879940
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A circuit, comprising:
a memory having multiple cells; and
a plurality of sequence generators, each sequence generator of the plurality of sequence generators drives one cell of the multiple cells via an automatic test pattern generator (ATPG) mode signal for each cell,
the ATPG mode signal for each cell is configured via an input that controls a number of pulses and a pulse width for the pulses to test each cell,
each cell of the memory includes:
a memory array to store a first data for the cell;
an input multiplexer to select between a first interface and a second interface in response to a mode signal that varies between a first mode and a second mode, the first interface provides a second data for the cell via an output of the input multiplexer if the mode signal is in the first mode and the second interface provides the first data to the memory array via the output of an input multiplexor if the mode signal is in the second mode;
a clocked logic array that is driven from the output of the input multiplexor, the clocked logic array receives the second data for the cell in the first mode; and
an output multiplexer to select between the clocked logic array and the memory array in response to the ATPG mode signal, the ATPG mode signal causes the output multiplexer to provide clocked logic array output from the cell in the first mode and to provide memory array output from the cell in the second mode.