Patent ID: 11929339
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC H  G  Y | IPC G  H

Claim 0:
1. An integrated circuit device comprising:
an interposer comprising a first electrical trace and a second electrical trace;
a first die, coupled to the interposer, comprising a first plurality of package bumps; and
a second die, coupled to the interposer, comprising a second plurality of package bumps, wherein the first plurality of package bumps has a first closest pitch between package bumps of the first plurality of package bumps and the second plurality of package bumps has a second closest pitch between package bumps of the second plurality of package bumps, the first closest pitch is shorter than the second closest pitch, the first electrical trace couples a first package bump of the first plurality of package bumps with a second package bump of the second plurality of package bumps, and the second electrical trace couples a third package bump of the first plurality of package bumps with a fourth package bump of the second plurality of package bumps.