Patent ID: 11917697
Assignee: QUALCOMM INCORPORATED
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. An apparatus configured for wireless communication, the apparatus comprising:
at least one processor; and
a memory coupled to the at least one processor;
wherein the at least one processor is configured to:
receive a Physical Random Access Channel (PRACH) configuration from a base station, the PRACH configuration indicating a first cyclic prefix (CP) length for a PRACH channel that corresponds to the PRACH configuration;
transmit one or more uplink channels interlaced in a frequency domain with the PRACH channel, the PRACH channel allocated to multiple spaced resource blocks of a block interlace structure in the frequency domain;
receive a second PRACH configuration from the base station, the second PRACH configuration indicating a second CP length for the PRACH channel; and
transmit the one or more uplink channels with an adjusted CP length interlaced in the frequency domain with the PRACH channel, wherein a CP length of the one or more uplink channels is adjusted from an initial CP length to the adjusted CP length that matches the second CP length of the second PRACH configuration, and wherein the PRACH channel and the one or more uplink channels are aligned; and

wherein adjusting the CP length of the one or more uplink channels comprises adjusting CP lengths of multiple uplink channels to match the second CP length of the second PRACH configuration.