Patent ID: 11869603
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A memory, comprising:
a voltage regulator comprising an input and an output;
a selectively activated first current path connected between the input of the voltage regulator and the output of the voltage regulator;
a selectively activated second current path connected between the input of the voltage regulator and the output of the voltage regulator;
an array of memory cells connected to the output of the voltage regulator; and
a controller connected to the output of the voltage regulator, wherein the controller is configured to cause the memory to:
connect the output of the voltage regulator to the input of the voltage regulator through the first current path in response to a voltage level of the input of the voltage regulator having a first voltage level;
connect the output of the voltage regulator to the input of the voltage regulator through the second current path in response to the voltage level of the input of the voltage regulator having a second voltage level higher than the first voltage level;
maintain the connection of the output of the voltage regulator to the input of the voltage regulator through the first current path until the voltage level of the input of the voltage regulator has a third voltage level higher than the second voltage level;
maintain the connection of the output of the voltage regulator to the input of the voltage regulator through the second current path until the voltage level of the input of the voltage regulator has the third voltage level;
isolate the output of the voltage regulator from the input of the voltage regulator through the first current path and through the second current path after the voltage level of the input of the voltage regulator has the third voltage level; and
regulate a voltage level of the output of the voltage regulator while the output of the voltage regulator is isolated from the input of the voltage regulator through the first current path and through the second current path.