Patent ID: 11880599
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory system, comprising:
a memory device configured to store data; and
a memory controller configured to communicate with the memory device and control the memory device,
wherein the memory controller is configured to:
transmit a data read command to the memory device in order to read data stored in the memory device;
input N read enable toggle signals (N is a natural number greater than or equal to 2) to the memory device in order for the memory device to output the data requested by the data read command; and
input an additional read enable toggle signal to the memory device, after the N read enable toggle signals are inputted to the memory device and the data requested by the data read command is outputted from the memory device to the memory controller, and
wherein the memory device is configured to output status information of the memory device to the memory controller in response to the additional read enable toggle signal input from the memory controller.