Patent ID: 11862960
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An electrostatic discharge (ESD) protection circuit, comprising:
a first diode in a semiconductor wafer, and being coupled between an input output (10) pad and a first node;
a second diode in the semiconductor wafer, and being coupled to the first diode and, being coupled between the IO pad and a second node;
an ESD clamp circuit in the semiconductor wafer, and being coupled between the first node and the second node, and being further coupled to the first diode and the second diode, the ESD clamp circuit including a first signal tap region in the semiconductor wafer, the first signal tap region being coupled to a first voltage supply, the first diode being coupled to and configured to share the first signal tap region with the ESD clamp circuit; and
a first conductive structure on a backside of the semiconductor wafer, and being coupled to at least the first voltage supply.