Patent ID: 11923414
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 7:
8. A method comprising:
forming a channel region;
forming an interfacial layer on the channel region;
depositing a high-k gate dielectric layer on the interfacial layer;
forming a first work function structure on the high-k gate dielectric layer, wherein forming the first work function structure comprises:
depositing a first work function layer on the high-k gate dielectric layer; and
performing an oxygen treatment on the first work function layer by exposing the first work function layer to an ozone-containing environment for a duration sufficient to increase a concentration of oxygen at an interface first work function layer and the high-k gate dielectric layer;

depositing an adhesion layer on the first work function structure; and
depositing a fill layer on the adhesion layer.