Patent ID: 11870554
Assignee: ANALOG DEVICES, INC.
Field: Telecommunications (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. A network node device of an area network, the network node device comprising:
medium access control layer (MAC) circuitry;
a reduced gigabit media independent interface (RGMII) operatively coupled to the MAC circuitry, wherein the RGMII includes a delay locked loop (DLL) circuit and receives a receive clock signal having a first frequency from a physical layer (PHY); and
timestamp circuitry configured to:
produce a delayed receive clock signal using the DLL circuit of the RGMII and produce a slowed receive clock signal having a lower frequency than the first frequency;
sample the receive clock signal, the delayed receive clock signal, and the slowed receive clock signal, to produce multiple sample signals;
produce a timestamp offset using the multiple sample signals, wherein the timestamp offset is representative of an offset between a local clock signal of the network node and a local clock signal of a neighbor node of the network node; and
wherein the MAC circuitry is configured to include the timestamp offset in a timestamp of a timing frame for transmission by the network node device.