Patent ID: 11876523
Assignee: XILINX, INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 10:
11. An integrated circuit, comprising:
a digital-to-time converter (DTC) configured to receive a reference clock and delay the reference clock based on a received first digital code;
a time-to-digital converter (TDC) configured to output a second digital code indicating a time difference between the delayed reference clock output by the DTC and a clock generated by a digital controlled oscillator (DCO) via a feedback path;
combination circuitry configured to normalize the second digital code to a resolution of the TDC to generate a phase difference output; and
correction circuitry configured to correct for quantization errors in the first digital code based on receiving a fractional portion of the first digital code, the correction circuitry including a multiplier configured to scale the fractional portion of the first digital code by a ratio of a resolution of the DTC,
wherein the clock generated by the DCO is based on the phase difference output.