Patent ID: 11973128
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 8:
9. A method, comprising:
receiving a workpiece including:
a substrate, and
a stack over the substrate, the stack comprising a plurality of channel layers interleaved by a plurality of sacrificial layers, a ratio of a thickness T2 of each of the plurality of channel layers to a thickness T1 of each of the plurality of sacrificial layers is between about 1.5 and about 3;

patterning the stack and the substrate to form a fin-shaped structure;
forming a dummy gate stack over a channel region of the fin-shaped structure while source/drain regions of the fin-shaped structure are exposed;
recessing source/drain regions to form source/drain trenches that expose sidewalls of the plurality of channel layers and the plurality of sacrificial layers;
selectively and partially etching the plurality of sacrificial layers to form inner spacer recesses;
forming inner spacer features in the inner spacer recesses, wherein each inner spacer feature directly contacts a corresponding channel layer and a corresponding sacrificial layer;
removing the dummy gate stack;
selectively removing the plurality of sacrificial layers to form a first plurality of openings in the channel region;
after the selective removing, performing an etching process to trim the plurality of channel layers exposed in the first plurality of openings to form a plurality of channel members interleaved by a second plurality of openings, wherein each of the plurality of channel members comprises two end portions and a connecting portion that extend between the two end portions, wherein a thickness of each of the two end portions is greater than a thickness of the connecting portion; and
forming a gate structure over the workpiece, wherein the gate structure includes an inner portion disposed in the second plurality of openings and an outer portion disposed over the inner portion, and wherein the inner portion comprises a seam enclosed in a work function layer.