Patent ID: 11939625
Assignee: CHANGSHA UNIVERSITY OF SCIENCE AND TECHNOLOGY
Field: Measurement (Instruments)
Classification: CPC C  G | IPC C  G

Claim 7:
8. The sensor according to claim 7, wherein the FET comprises a Si substrate layer and a polysilicon gate electrode, and the polysilicon gate electrode is arranged on the Si substrate layer; a p-well is implanted in an N-type substrate and the N-type substrate is arranged on the Si substrate layer; a source electrode and a drain electrode are arranged at the p-well to obtain a processed Si substrate layer, wherein the processed Si substrate layer is provided with the p-well in the N-type substrate, the source electrode and the source electrode, a SiO2 layer is arranged on the processed Si substrate layer; an Al—Cu alloy layer, a Cr—Pd alloy layer and an Au membrane layer are sequentially plated on a substrate layer of the polysilicon gate electrode; and a silicon nitride layer is arranged on the substrate layer of the polysilicon gate electrode and the SiO2 layer.