Patent ID: 11868296
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A processor comprising:
a core; and
a router comprising:
a first port set comprising:
an input port to receive first circuit-switched data from the core; and
an output port to provide second circuit-switched data to the core;

a first set of signal lines dedicated to communicate circuit-switched data between a second port set of the router and the output port of the first port set;
a second set of signal lines dedicated to communicate circuit-switched data between a third port set of the router and the output port of the first port set;
a third set of signal lines dedicated to communicate circuit-switched data between the second port set and the input port of the first port set; and
a fourth set of signal lines dedicated to communicate circuit-switched data between the third port set and the input port of the first port set;
wherein the first circuit-switched data comprises first data communicated to the second port set and second data communicated to the third port set, wherein the first data is different from the second data and is communicated simultaneously with the second data.