Patent ID: 11916102
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 0:
1. A method for forming a double-sided capacitor structure, comprising:
providing a base, the base comprising a substrate, a plurality of capacitor contacts located in the substrate, a stack structure located on a surface of the substrate and a plurality of capacitor holes running through the stack structure and exposing the capacitor contacts, the stack structure comprising sacrificial layers and support layers, the sacrificial layers and the support layers stacked alternately in a direction perpendicular to the substrate;
successively forming, on inner walls of the capacitor holes, a first electrode layer, a first dielectric layer and a second electrode layer stacked along a radial direction of the capacitor holes;
filling a first conductive material in the capacitor holes to form a first conductive filling layer;
forming an auxiliary layer for sealing the capacitor holes;
removing a part of the auxiliary layer and several of the support layers and the sacrificial layers to expose the first electrode layer, a remaining of the auxiliary layer being divided into a plurality of sub-auxiliary layers, each of the sub-auxiliary layers being at least overlapped with two capacitor holes; and
forming a second dielectric layer covering a surface of the first electrode layer and surfaces of the sub-auxiliary layers and a third electrode layer covering a surface of the second dielectric layer to form a double-sided capacitor structure.