Patent ID: 11881883
Assignee: CADENCE DESIGN SYSTEMS, INC.
Field: Telecommunications (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. An integrated circuit, comprising:
adaptation sampler to sample a signal and produce an adaptation sample set;
a data receiver to receive the signal and produce a first set of sequential data samples, the data receiver to receive a first indicator of a parameter that affects at least one sampled value in the first set of sequential data samples;
a sequence generator to receive the first set of sequential data samples and the adaptation sample set and produce an adaptation sequence;
a first pattern detector to signal occurrences of a first pattern in the adaptation sequence;
a first counter to count occurrences of the first pattern in the adaptation sequence;
a second pattern detector to signal occurrences of a second pattern in the adaptation sequence;
a second counter to count occurrences of the second pattern in the adaptation sequence; and
feedback loop control to, based on a measured occurrence ratio between a first count of occurrences of the first pattern in the adaptation sequence and a second count of occurrences of the second pattern in the adaptation sequence, iteratively adjust the parameter.