Patent ID: 11942181
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. The semiconductor device of claim 6, wherein the first reception circuit comprises:
a first current sourcing circuit configured to:
regulate, during an activation period of the first clock signal, an amount of current provided to a third current path according to the second signal inputted through the third transmission path, and
regulate, during the activation period of the first clock signal, an amount of current provided to a fourth current path according to a reference voltage having a voltage level corresponding to half of the second voltage level; and
a first sensing output circuit configured to determine, during the activation period of the first clock signal, a logic level of the first intermediate signal by sensing and amplifying a difference between amounts of current flowing through the third and fourth current paths.