Patent ID: 11869594
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A nonvolatile memory device comprising:
a memory cell array comprising a plurality of memory cells, a plurality of word lines and a bit line connected to the memory cells, wherein each memory cell is connected to one of the word lines;
a voltage generator configured to supply a plurality of supply voltages to the memory cell array; and
a control logic circuit configured to program a selected one of the memory cells connected to a selected word line of the plurality of word lines into a first program state by controlling the voltage generator and to control a verify operation on the memory cell array by controlling the voltage generator;
wherein the control logic circuit controls a first word line voltage applied to an adjacent word line adjacent to the selected word line among at least one unselected word line not to be programmed among the plurality of word lines in the verify operation to be different from a read voltage level of a read voltage applied in a read operation of the nonvolatile memory and controls a bit line voltage applied to the bit line in the read operation, and
wherein the control logic circuit controls the voltage generator to apply a plurality of different and decreasing verify voltages to the selected word line in the verify operation.