Patent ID: 11903220
Assignee: SK HYNIX INC.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 15:
16. An electronic device comprising a semiconductor memory, the semiconductor memory comprising:
a substrate including a cell region, a first peripheral circuit region disposed at a first side of the cell region in a first direction, and a second peripheral circuit region disposed at a second side of the cell region in a second direction crossing the first direction;
a plurality of first lines disposed over the substrate and extending in the first direction across the cell region and the first peripheral circuit region;
a plurality of second lines disposed over the first lines and extending in the second direction across the cell region and the second peripheral circuit region;
a plurality of third lines disposed over the second lines and respectively overlapping the second lines, the third lines partially contacting the second lines in the second peripheral circuit region;
a plurality of fourth lines disposed over the third lines and respectively overlapping the first lines;
a plurality of first memory cells disposed in the cell region and located at intersections of the first lines and the second lines between the first lines and the second lines; and
a plurality of second memory cells disposed in the cell region and located at intersections of the third lines and the fourth lines between the third lines and the fourth lines,
wherein each of upper and lower surfaces of the second lines includes a protruding portion and a recessed portion in the second peripheral circuit region, and the third lines contact the protruding portion of the upper surface of the second lines.