Patent ID: 11955330
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. An electronic device, comprising:
an input device;
an output device;
a processor device operably coupled to the input device and the output device; and
a memory device operably coupled to the processor device, the memory device comprising:
an interdeck region between a first deck structure and a second deck structure, each of the first deck structure and the second deck structure comprising alternating levels of a conductive material and an insulative material; and
pillars individually extending through the second deck structure, the interdeck region, and the first deck structure, the pillars respectively comprising:
a portion within the interdeck region having diameters that progressively decrease from a relatively larger diameter proximate a lower boundary of the second deck structure to a relatively smaller diameter proximate an upper boundary of the first deck structure;
a channel material continuously extending through the second deck structure, the interdeck region, and the first deck structure, a section of the channel material within the interdeck region comprising:
horizontally extending surfaces physically contacting dielectric material surrounding each of horizontal boundaries and vertical boundaries of a level of the conductive material most proximate the lower boundary of the second deck structure; and
tapered sidewalls continuous with the horizontally extending surfaces and oriented at an angle with respect to vertical sidewalls of an additional section of the channel material within the first deck structure.