Patent ID: 11894273
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A method of forming a semiconductor device, comprising:
providing a semiconductor substrate;
forming a first isolation structure and a second isolation structure for defining a first region and a second region in the semiconductor substrate;
performing a recessing process to remove a portion of the semiconductor substrate and a portion of the second isolation structure;
forming a first gate structure on the substrate in the first region, and a second gate structure on the substrate in the second region;
forming a first source/drain (S/D) region in the substrate within the first region and beside the first gate structure, and a second S/D region in the substrate within the second region and beside the second gate structure, wherein the first S/D region has a first silicide layer formed thereon, and the second S/D region has a second silicide layer formed thereon, wherein the first isolation structure is disposed laterally aside and in contact with the first S/D region within the first region, and the second isolation structure is disposed laterally aside and in contact with the second S/D region within the second region, wherein a top surface of the second isolation structure in the second region is lower than a top surface of the first isolation structure in the first region; and
forming a first S/D contact connected to the first S/D region and landing on the first silicide layer and a second S/D contact connected to the second S/D region and landing on the second silicide layer, wherein the first S/D contact and the second S/D contact are formed separately,
wherein a contact area between the second silicide layer of the second S/D region and the second S/D contact is larger than a contact area between the first silicide layer of the first S/D region and the first S/D contact.