Patent ID: 11947995
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 12:
13. A system, comprising:
a host controller to write data in host write units as a smallest writeable unit for the host controller; and
a nonvolatile memory (NVM) device, including
a nonvolatile memory (NVM) media having a media write unit as a smallest writeable unit of the NVM media, where the media write unit is different in size than a host write unit of the host controller; and
a media controller to receive write data in a transaction layer message of a protocol for a write transaction from the host controller when coupled, and send an acknowledgement transaction layer message of the protocol to the host controller to indicate specific media write units of the write data for the write transaction successfully committed to the NVM media.