Patent ID: 11956950
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 5:
6. A memory array comprising strings of memory cells, comprising:
laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers, channel-material strings of memory cells extending through the insulative tiers and the conductive tiers, the conductive tiers comprising metal;
metal silicide directly against and longitudinally-along the metal of individual of the conductive tiers longitudinally-along opposing sides of individual of the memory blocks;
intervening material laterally-between and longitudinally-along immediately-laterally-adjacent of the memory blocks;
a conductor tier comprising conductor material under the memory blocks;
conducting material of a lowest of the conductive tiers being directly against the conductor material of the conductor tier and being directly against the channel material of individual of the channel-material strings; and
the insulative tier immediately-above the lowest conductive tier comprising an upper first insulative material and a lower second insulative material under the upper first insulative material, the lower second insulative material being of different composition from that of the upper first insulative material.