Patent ID: 11972789
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A counter circuit, comprising:
a counting circuit, configured to output a count value when the count value exceeds a predetermined threshold;
a decoding circuit, coupled to the counting circuit, and configured to decode the count value to obtain decoding information corresponding to the count value, wherein the decoding information represents a numerical interval in which the count value is located; and
a comparison circuit, coupled to the decoding circuit, and configured to compare the decoding information with historical maximum decoding information and latch current maximum decoding information and output the current maximum decoding information;
wherein the decoding information is a multi-bit binary number, different bits of the decoding information correspond to different numerical intervals, and a numerical interval corresponding to a high bit is greater than a numerical interval corresponding to a low bit; and
wherein there is only one bit whose value is 1 in the decoding information, which indicates that the count value corresponding to the decoding information is within a numerical interval corresponding to the bit.