Patent ID: 11887944
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. An integrated circuit assembly, comprising:
an electronic substrate having a first surface and an opposing second surface, wherein the electronic substrate includes at least one dielectric material layer, at least one ground trace on the dielectric material layer, and at least one signal trace on the dielectric material layer;
a cable connector comprising an alignment housing additively fused to the ground trace, wherein the alignment housing includes a cable mating opening and wherein the signal trace is within the cable mating opening;
a cable within the cable mating opening of the cable connector and electrically connected to the electronic substrate; and
an integrated circuit device electrically attached to a first surface of the electronic substrate, wherein the cable is electrically connected to the integrated circuit device through the electronic substrate.