Patent ID: 11961850
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. The display substrate according to claim 8, wherein the active layer, the gate insulating layer, the gate, the interlayer dielectric layer and the source/drain pattern are disposed in a direction away from the base substrate;
the source/drain pattern comprises a source and a drain;
an orthographic projection of the gate insulating layer on the base substrate is coincident with an orthographic projection of the gate on the base substrate;
the interlayer dielectric layer comprises a source via hole and a drain via hole, the source is in contact with the active layer by the source via hole, and the drain is in contact with the active layer by the drain via hole; and
the pixel electrode is electrically connected to the drain by the pixel via hole.