Patent ID: 11909856
Assignee: MELLANOX TECHNOLOGIES, LTD.
Field: Digital communication (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 12:
13. The apparatus according to claim 12, wherein the packet processing circuitry is configured to:
find the stored second segment in the memory;
request a second data chunk from the memory, responsively to the found second segment;
find that the second data chunk includes a second partial block;
request an additional second data chunk from the memory, responsively to finding that the second data chunk includes the second partial block;
cryptographically process the second data chunk without the second partial block using the block cipher yielding at least one second cryptographically processed data block;
cryptographically process the second partial block and the additional second data chunk together as a whole block using the block cipher yielding an additional second cryptographically processed data block;
divide the additional second cryptographically processed data block into third and fourth segments;
add the second segment, the at least one second cryptographically processed data block, and the third segment to the second packet; and
store the fourth segment in the memory until a third packet is processed by the packet processing circuitry.