Patent ID: 11881258
Assignee: GLOBALFOUNDRIES U.S. INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 12:
13. A method comprising:
detecting a first voltage from a bit cell in a sensing circuit, the first voltage indicating a memory state of a bit cell at a first instance;
detecting a second voltage from the bit cell in the sensing circuit in a latch coupled to the bit cell to store the memory state of the bit cell at the first instance, the second voltage indicating a memory state of the bit cell at a second instance, wherein the latch comprises one of a plurality of latches configured to store a plurality of second voltages at a plurality of second instances; and
transmitting one of a first signal and a second signal from logic coupled to the sensing circuit, the first signal being in response to the first voltage not being equal to at least one of the plurality of second voltages, and the second signal being in response to the first voltage being equal to each of the plurality of second voltages, wherein the first signal indicates the bit cell as being unstable, and the second signal indicates the bit cell as being stable.