Patent ID: 11874325
Assignee: INFINEON TECHNOLOGIES AG
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 19:
20. The integrated circuit of claim 16, further comprising:
a second multiplexer comprising a third multiplexer input, a fourth multiplexer input, a second multiplexer output, and a second multiplexer control terminal;
a third scan flip-flop having a third scan flip-flop input and a third scan flip-flop output, the third scan flip-flop output coupled to the third multiplexer input;
a fourth scan flip-flop having a fourth scan flip-flop input coupled to the second multiplexer output; and
a second logic path extending between the second multiplexer output and the fourth scan flip-flop input, the second logic path including a second plurality of logic gates connected in succession and including a second leading logic gate and a second last logic gate, the second leading logic gate having a second leading logic gate input coupled to the second multiplexer output, and the second last logic gate having a second last logic gate output coupled to the fourth multiplexer input via a second feedback line;
wherein the first and second scan flip-flops are assigned to a first scan flip-flop group and the third and fourth scan flip-flops are assigned to a second scan flip-flop group that differs from the first scan flip-flop group.