Patent ID: 11954355
Assignee: ATLAS POWER TECHNOLOGIES INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 45:
46. The apparatus of claim 43 comprising another circuit, for controlling reading out of the information from said tristate bidirectional memory cells by receiving an address; decoding said address; and activating one of the first word lines by another word line driver based upon said decoded address, and activating two of the first bit lines by another bit line driver based upon a decoded address that includes voltage state assignment for each first bit line's specific voltage state, and where the information is suitable to be read and decoded from one or more of the tristate bidirectional memory cell; if the information is written in a forward bias the information is referred to as positive, or the information is written with no charge the information is referred to as zero, or the information is written in a reverse bias the information is referred to as negative.