Patent ID: 11961899
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 18:
19. A method for fabricating semiconductor devices, comprising:
forming a channel structure protruding from a substrate, wherein the channel structure comprises a plurality of nanostructures separated from one another along a vertical direction and extending along a first lateral direction;
forming a gate structure extending along a second lateral direction and straddling a first portion of the channel structure;
forming a first gate spacer next to the gate structure, wherein the first gate spacer has a first vertical portion extending along a sidewall of the gate structure and a first lateral portion extending away from the sidewall;
forming a second gate spacer over the first gate spacer, wherein the second gate spacer has a second vertical portion extending along the first vertical portion and a second lateral portion overlaying the first lateral portion;
forming a third gate spacer over the second gate spacer, wherein the third gate spacer has a third vertical portion extending along the second vertical portion and a third lateral portion overlaying the second lateral portion;
removing a second portion of the channel structure overlaid at least by the third lateral portion;
growing an epitaxial structure at least from a remaining portion of the channel structure, wherein the epitaxial structure is disposed next to the second lateral portion along the first lateral direction; and
removing the second gate spacer to form an air gap, wherein the air gap is formed entirely above the epitaxial structure and vertically separated from the epitaxial structure by the first lateral portion of the first gate spacer.