Patent ID: 11862691
Assignee: RAYTHEON COMPANY
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method, comprising:, forming a field effect transistor, the forming comprising:
providing a semiconductor structure having a source electrode, a drain electrode, and a gate electrode in contact with corresponding portions of a surface of the semiconductor structure, wherein the gate electrode has a top surface;
forming a field plate, wherein the field plate is metal free, forming the field plate comprising:
providing a dielectric layer disposed on the surface of the semiconductor structure in regions between the source electrode and the drain electrode, the dielectric layer extending over the top surface of the gate electrode;
providing a mask on the dielectric layer, the mask covering areas of the dielectric layer and exposing portions of the dielectric layer, wherein the mask has apertures including a stipple of dots;
implanting electric ions in the portions of the dielectric layer exposed by the mask from a source external of the semiconductor structure, the electric ions extending over a region between the top surface of the gate electrode and the drain electrode, the electric ions implanted in the portion of the dielectric layer extending from the top surface of the gate electrode toward the drain electrode so that the electric ions are at least over the top surface of the gate electrode,

wherein no electric ions are implanted in a portion of the dielectric layer extending from the drain electrode toward the gate electrode covered by the mask,
wherein providing the dielectric layer comprises providing the dielectric layer directly on a top surface of the drain electrode and directly on a top surface of a source electrode, and
wherein the electric ions are implanted into the dielectric layer in a nonuniform distribution along a direction parallel to a surface of the dielectric layer.