Patent ID: 11935954
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 7:
8. A method for forming a semiconductor device structure, comprising:
forming a fin structure with alternating first semiconductor layers and second semiconductor layers stacked over a substrate;
forming a dummy gate structure across the fin structure;
forming spacer layers over opposite sides of the dummy gate structure;
forming source/drain openings in the fin structure beside the dummy gate structure;
laterally etching the first semiconductor layers from the source/drain openings;
depositing a first inner spacer over the sidewall of the first semiconductor layers;
depositing a second inner spacer over the sidewall of the first inner spacer;
growing source/drain epitaxial structures in the source/drain openings;
removing the dummy gate structure and the first semiconductor layers to form a gate opening between the second semiconductor layers; and
forming a gate structure in the gate opening surrounding the second semiconductor layers,
wherein the second inner spacer laterally extends and protrudes from a sidewall of the second semiconductor layers, and
a cross-sectional area of the second inner spacer is greater than a cross-sectional area of the first inner spacer in a same cross-sectional view.