Patent ID: 11949019
Assignee: ZINITE CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. A thin film transistor comprising:
a substrate;
an insulating layer formed on the substrate;
a source;
a drain formed on the insulating layer and vertically spaced from the source;
an n-type semiconductor material formed on the insulating layer and extending between the source and the drain;
a source-channel interfacial member electrically connecting at least the source to the n-type semiconductor material;
a gate dielectric layer formed over the n-type semiconductor material;
a gate formed over the dielectric layer; and
a second insulating layer, wherein one of the source and the drain are formed on the insulating layer, the second insulating layer is formed on the one of said source and drain, the second insulating layer forming a vertical hollow having an inner surface extending upward from the one of the source and the drain, the source-channel interfacial member forming a layer on the inner surface of the hollow and the portion of the drain within the hollow, the n-type semiconductor material forming a layer on the layer of the source-channel interfacial member, the gate dielectric layer forming a layer on the n-type semiconductor, the gate being formed on the gate dielectric layer and the other of the source and drain being formed on top of the second insulating layer in electrical contact with the source-channel interfacial member and wherein, when the transistor is in an on state current can flow from the source to the drain through the source-channel interfacial member and through a channel formed in the n-type semiconductor material.