Patent ID: 11888028
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
an active pattern on a substrate;
a pair of source/drain patterns on the active pattern;
a channel pattern interposed between the pair of source/drain patterns, the channel pattern including semiconductor patterns, which are stacked to be spaced apart from each other;
a gate electrode crossing the channel pattern, the gate electrode including a first portion in a space between adjacent ones of the semiconductor patterns; and
a liner layer provided in the space and interposed between the first portion and the adjacent ones of the semiconductor patterns,
wherein the liner layer comprises a same semiconductor material as the semiconductor patterns, and
wherein the liner layer is interposed between the first portion and one of the pair of source/drain patterns to contact a side surface of the one of the pair of source/drain patterns.