Patent ID: 11860229
Assignee: ADVANTEST CORPORATION
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 7:
8. An automated test equipment (ATE) apparatus comprising:
a tester processor operable to generate commands and data for coordinating testing of a plurality of devices under test (DUTs);
a field programmable gate array (FPGA) communicatively coupled to the tester processor, wherein the FPGA comprises routing logic operable to route signals associated with the commands and data in the FPGA based on a physical communication interface type of the DUTs; and
connection hardware operable to physically connect to different physical communication interface types implemented for the DUTs, wherein the connection hardware comprises a connector module communicatively coupled to the FPGA, wherein the connector module comprises a socket operable to receive and to connect to a device under test (DUT) of the DUTs and comprises circuitry for routing the signals via the socket to a set of pins on the DUT, wherein the set of pins is associated with a first physical communication interface type of DUT, wherein the connector module further comprises circuitry for re-routing the signals via the socket to a different set of pins on the DUT, wherein the different set of pins is associated with a second physical communication interface type of DUT.