Patent ID: 11929262
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A semiconductor stack package, comprising:
a first package substrate on which a first semiconductor device is mounted;
a second package substrate provided on the first semiconductor device with a gap between a first surface of the second package substrate and the first semiconductor device;
a connection terminal connecting the first semiconductor device and the first package substrate;
a connector connecting a terminal on the first package substrate and a terminal on the second package substrate corresponding thereto; and
molding resin encircling the connector while filling a portion between the first package substrate and the second package substrate,
wherein a portion of the molding resin encircles the connection terminal while, without using an underfill, filling a portion between the first semiconductor device and the first package substrate and completely filling a space between an upper surface of the first semiconductor device and a lower surface of the second package substrate,
wherein the connector having a largest horizontal cross-sectional area at a center portion and the farther the horizontal cross-sectional area is from the center portion, the horizontal cross-sectional area decreases gradually, and
wherein the second package substrate is an interposer.