Patent ID: 11862468
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method comprising:
depositing a gate dielectric layer on a first fin and a second fin, the first fin and the second fin extending away from a substrate in a first direction, a distance between the first fin and the second fin decreasing along the first direction;
depositing a sacrificial layer on the gate dielectric layer by exposing the gate dielectric layer to a self-limiting source precursor and a self-reacting source precursor, the self-limiting source precursor reacting to form an initial layer of a material of the sacrificial layer, the self-reacting source precursor reacting to form a main layer of the material of the sacrificial layer, wherein the self-reacting source precursor reacts with itself, wherein the self-limiting source precursor does not react with itself;
annealing the gate dielectric layer while the sacrificial layer covers the gate dielectric layer;
after annealing the gate dielectric layer, removing the sacrificial layer; and
after removing the sacrificial layer, forming a gate electrode layer on the gate dielectric layer.