Patent ID: 11963384
Assignee: SHARP KABUSHIKI KAISHA
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 17:
18. A method for manufacturing a display device, the method comprising:
a thin film transistor layer forming step of forming a thin film transistor layer including a first inorganic insulating film on a resin substrate;
a light-emitting element layer forming step of forming a light-emitting element layer on the thin film transistor layer, the lig,ht-emitting, element layer including a plurality of light-emitting elements arranged corresponding to a plurality of subpixels constituting a display region; and
a sealing film forming step of forming a sealing film including a second inorganic insulating film on the light-emitting element layer to cover the light-emitting elements,
a frame region being provided around the display region,
a non-display region being provided in an island shape inside the display region,
a first electrode, a functional layer, and a second electrode being sequentially layered in the light-emitting elements, and
the functional layer including a common functional layer provided in common to the plurality of subpixels,
wherein the thin film transistor layer forming step includes
a semiconductor layer forming step of forming an oxide semiconductor layer in an island shape in the non-display region, and
a first opening forming step of forming a first opening to expose the oxide semiconductor layer to the first inorganic insulating film in the non-display region,
the light-emitting element layer forming step includes
a functional layer forming step of forming the common functional layer to cover the oxide semiconductor layer exposed from the first opening and extend from the display region to the non-display region, and
a functional layer removal step of removing the common functional layer of a portion covering the oxide semiconductor layer by irradiating the oxide semiconductor layer with laser light, and forming a second opening in the common functional layer to expose the oxide semiconductor layer, a peripheral end of the second opening being surrounded by a peripheral end of the first opening in a plan view, and
in the sealing film forming step, the second inorganic insulating film is formed to cover the oxide semiconductor layer exposed from the second opening.