Patent ID: 11870682
Assignee: MELLANOX TECHNOLOGIES, LTD.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. The system according to claim 7, wherein the management processor is configured to partition the links in each subnetwork to define a third group of the links,
wherein the detour routes are configured through the first and second groups of the links for the data packets that are destined for network end-nodes that are connected to the given subnetwork, and
wherein the management processor is configured to define at least one dive-through route over which a data packet enters the subnetwork via the first virtual lane through a first trunk link to one of the upper-tier switches in the subnetwork, passes through one of the links in the third group to one of the lower-tier switches in the subnetwork and through another one of the links via the second virtual lane to another one of the upper-tier switches in the subnetwork, from which the data packet exits the subnetwork through a second trunk link.