Patent ID: 11862558
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method for fabricating a semiconductor device, comprising:
forming an initial stack of sacrificial word line layers and insulating layers that are arranged alternately over a substrate of the semiconductor device;
forming a first staircase in a first staircase region of a connection region of the initial stack, the first staircase having non-quadrilateral treads; and
forming a second staircase in a second staircase region of the connection region of the initial stack, the second staircase having non-quadrilateral treads, wherein
the connection region of the initial stack includes a separation region between the first staircase and the second staircase, and
the connection region is positioned between two array regions at opposing sides of the initial stack.