Patent ID: 11947422
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 0:
1. A nonvolatile semiconductor memory device connectable to a controller, comprising:
a plurality of blocks, each of the plurality of blocks being a unit for a data erase operation, each of the plurality of blocks including a plurality of pages;
a control circuit configured to execute program operations for a plurality of pages included in a write destination block of the plurality of blocks in a certain program order, the write destination block being selected by the controller from the plurality of blocks; and
an error correction code encoder, wherein
the write destination block includes a plurality of memory cells connected to each of a plurality of word lines,
one or more pages of the plurality of pages included in the write destination block are assigned to the plurality of memory cells connected to each of the plurality of word lines, and
the control circuit is configured to:
notify the controller of a page address indicating a page on which a next program operation for the write destination block is to be executed; and
in a case where validation of the error correction code encoder is instructed by the controller, perform, by using the error correction code encoder, an error correction encoding process to add an error correction code to data to be written to the write destination block.