Patent ID: 11916029
Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 4:
5. A semiconductor device comprising:
a semiconductor substrate having a first main surface;
a first aluminum electrode having a first surface facing the first main surface and a second surface opposite to the first surface, the first aluminum electrode being disposed on the semiconductor substrate;
a passivation film that covers a peripheral edge of the second surface and that is provided with an opening from which a portion of the second surface is exposed;
a copper film;
a second aluminum electrode disposed on the semiconductor substrate;
a plurality of first bonding wires connected to the copper film;
a second bonding wire connected to the second aluminum electrode;
a gate; and
a gate insulating film, wherein
the second surface exposed from the opening is provided with a recess that is depressed toward the first surface,
the copper film is disposed in the recess,
the passivation film is a polyimide film,
each of the first bonding wires is composed of copper or a copper alloy,
the second bonding wire is composed of aluminum or an aluminum alloy,
the semiconductor substrate has a second main surface opposite to the first main surface, a source region disposed in the first main surface, a drain region that constitutes the second main surface, a drift region disposed on the first main surface side of the drain region, and a body region that separates the drift region and the source region from each other,
the gate faces a portion of the body region between the drift region and the source region with the gate insulating film being interposed between the gate and the portion of the body region,
the second aluminum electrode is electrically connected to the gate, and
the first aluminum electrode is electrically connected to the source region.