Patent ID: 11942556
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 5:
6. A method comprising:
forming an epitaxial stack over a substrate, wherein the epitaxial stack comprises a first sacrificial layer, a first channel layer, a second sacrificial layer, and a second channel layer sequentially over the substrate;
patterning the epitaxial stack into a fin structure extending along a first direction;
forming a dummy gate structure extending across the fin structure along a second direction substantially perpendicular to the first direction;
forming gate spacers respectively on opposite sides of the dummy gate structure;
removing the dummy gate structure to form a gate trench between the gate spacers;
selectively removing the first and second sacrificial layers from the gate trench while leaving the first and second channel layers suspended in the gate trench;
after selectively removing the first and second sacrificial layers, forming recesses respectively in the first and second channel layers, wherein a depth of the recess in the second channel layer is greater than a depth of the recess in the first channel layer; and
after forming the recesses respectively in the first and second channel layers, forming a gate structure in the gate trench and the recesses.