Patent ID: 11948616
Assignee: BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 9:
10. A manufacturing method of a semiconductor structure, comprising:
providing a substrate;
forming a transistor, wherein the transistor comprises a first terminal and a second terminal that are located in the substrate, and a control terminal located between the first terminal and the second terminal;
forming a first magnetic memory structure, a second magnetic memory structure, a first bit line, and a second bit line, wherein a bottom electrode of the first magnetic memory structure is electrically connected to the first terminal of the transistor, a top electrode of the second magnetic memory structure is electrically connected to the first terminal of the transistor, the first bit line is electrically connected to a top electrode of the first magnetic memory structure, the second bit line is electrically connected to a bottom electrode of the second magnetic memory structure, and the bottom electrode of the first magnetic memory structure is located in a same layer with the bottom electrode of the second magnetic memory structure; and
forming a selection line electrically connected to the second terminal of the transistor.