Patent ID: 11935967
Assignee: JAPAN DISPLAY INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A semiconductor device having a thin film transistor comprising an oxide semiconductor layer, a drain electrode, a source electrode, a gate insulating film, a gate electrode, and a channel, which is formed in the oxide semiconductor layer between the drain electrode and the source electrode,
wherein the oxide semiconductor layer is formed rectangular shape in a plan view,
the gate insulating film is arranged to cover the oxide semiconductor,
the gate electrode is formed on the gate insulating film,
a channel length direction is defined by a direction the drain electrode and the source electrode oppose to each other,
a channel width direction is defined by an orthogonal direction to the channel length direction,
a width of the oxide semiconductor layer in the channel width direction is wider than a width of the gate electrode in the channel width direction,
two corners of the oxide semiconductor layer of the rectangular shape overlap with the source electrode, other two corners of the oxide semiconductor of the rectangular shape overlap with the drain electrode, in a plan view.