Patent ID: 11908906
Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A semiconductor structure, comprising:
a first dielectric layer and a plurality of gate structures disposed over a substrate, source-drain doped regions disposed in the substrate on both sides of a gate structure of the plurality of gate structures, and a source-drain plug disposed on a top surface of a source-drain doped region of the source-drain doped regions, wherein the first dielectric layer covers surfaces of the gate structure, the source-drain doped region and the source-drain plug;
a first plug disposed in the first dielectric layer, wherein the first plug is in contact with one of a top surface of the source-drain plug and a top surface of the gate structure;
a second dielectric layer disposed on the first dielectric layer, wherein the second dielectric layer covers a surface of the first plug; and
a second plug material film disposed in the first dielectric layer and the second dielectric layer, wherein the second plug material film is in contact with one of the top surface of the source-drain plug and the top surface of the gate structure.