Patent ID: 11903221
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device comprising:
a first transistor disposed over a substrate;
a conductive line disposed over the first transistor;
a memory cell disposed over the conductive line, the memory cell including:
a second transistor, wherein the second transistor comprises:
a channel layer;
a gate dielectric layer surrounding a sidewall of the channel layer; and
a gate electrode surrounding a sidewall of the gate dielectric layer; and

a memory element disposed over the second transistor, wherein the second transistor is vertically interjacent the conductive line and the memory element, and wherein the memory element is vertically interjacent the second transistor and a bit line of the memory cell.