Patent ID: 11956964
Assignee: KIOXIA CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor memory device comprising:
a semiconductor substrate;
a structure including a plurality of insulating films and a plurality of conductive films alternately stacked on the semiconductor substrate; and
a pillar penetrating the structure,
wherein;
the plurality of conductive films include a plurality of first conductive films and a second conductive film arranged closer to the semiconductor substrate than the plurality of first conductive films,
the pillar has a first epitaxial growth layer doped with boron and carbon in a part in contact with the semiconductor substrate, and configured to function as a part of a source side select gate transistor together with the second conductive film,
the plurality of first conductive films are configured to function as a part of a plurality of non-volatile memory cells,
the pillar has a second epitaxial growth layer between the plurality of non-volatile memory cells and the first epitaxial growth layer,
a carbon density of the second epitaxial growth layer is lower than a carbon density of the first epitaxial growth layer, and
a boron density of the second epitaxial growth layer is lower than a boron density of the first epitaxial growth layer.