Patent ID: 11960761
Assignee: PHISON ELECTRONICS CORP.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory control method for a memory storage device, wherein the memory storage device comprises a buffer memory and a rewritable non-volatile memory module, and the memory control method comprises:
temporarily storing first type data into a first storage space in the buffer memory, and determining, based on a first logical unit of the first type data, that the first type data should be stored into the rewritable non-volatile memory module by a first programming mode;
in a first state that the first type data is stored in the buffer memory, temporarily storing second type data into a second storage space in the buffer memory, and determining, based on a second logical unit of the second type data, that the second type data should be stored into the rewritable non-volatile memory module by a second programming mode, and the first programming mode is different from the second programming mode;
determining whether a data volume of the first type data in the buffer memory reaches a first threshold, and determining whether a data volume of the second type data in the buffer memory reaches a second threshold, wherein the first threshold is less than the second threshold; and
in a second state that the data volume of the first type data in the buffer memory does not reach the first threshold and the data volume of the second type data in the buffer memory reaches the second threshold, storing the first type data in the buffer memory into the rewritable non-volatile memory module.