Patent ID: 11972149
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A storage system comprising:
a memory; and
a controller coupled with the memory and configured to:
receive, from a host, a command to perform host-activated defragmentation on the memory, wherein the command specifies a maximum block valid count threshold that is selected by the host after assessing a tradeoff between increased performance and reduction of memory lifetime associated with the maximum block valid count threshold;
perform defragmentation only to those blocks in the memory whose amount of valid data is not greater than the maximum block valid count threshold; and
receive, from the host, at least one subsequent command to perform host-activated defragmentation on the memory, wherein each subsequent command specifies a different maximum block valid count threshold;
wherein the host dynamically decreases the maximum block valid count threshold in each subsequent command as the host progressively prioritizes memory lifetime over performance.