Patent ID: 11948914
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A package structure, comprising:
a package substrate;
a semiconductor chip bonded to an upper surface of the package substrate through a plurality of first conductive structures, wherein the first conductive structures are in direct contact with first contact pads formed on the upper surface of the package substrate and second contact pads formed on a lower surface of the semiconductor chip; and
an integrated device bonded to the lower surface of the semiconductor chip through a plurality of second conductive structures, wherein the second conductive structures are in direct contact with third contact pads formed on the lower surface of the semiconductor chip, and wherein the integrated device is separated from the upper surface of the package substrate by a gap,
wherein the package substrate has a cavity formed on the upper surface of the package substrate, wherein the cavity is configured to accommodate the integrated device.