Patent ID: 11908789
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An integrated circuit structure comprising:
a first metal line over a semiconductor substrate, the first metal line being ring-shaped in a top-down view, the first metal line comprising a first inner sidewall and a second inner sidewall opposite the first inner sidewall, wherein the first inner sidewall has a constant slope from a top portion of the first inner sidewall to a bottom portion of the first inner sidewall, wherein the second inner sidewall has a constant slope from a top portion of the second inner sidewall to a bottom portion of the second inner sidewall, and wherein a distance between the top portion of the first inner sidewall and the top portion of the second inner sidewall is less than a distance between the bottom portion of the first inner sidewall and the bottom portion of the second inner sidewall;
a dielectric layer surrounding the first metal line, wherein the first metal line encircles a portion of the dielectric layer, wherein a top surface of the dielectric layer is disposed above a top surface of the first metal line; and
a conductive via extending through the dielectric layer and connected to the first metal line.