Patent ID: 11972139
Assignee: PHISON ELECTRONICS CORP.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A read voltage level correction method for a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical units, comprising:
using a first read voltage level as an initial read voltage level to perform a first data read operation on a first physical unit among the physical units to obtain a second read voltage level used to successfully read the first physical unit;
recording association information between the first read voltage level and the second read voltage level in a transient look-up table;
performing a second data read operation according to a read level tracking table and the association information recorded in the transient look-up table, wherein
the read level tracking table records a plurality of optimal read voltage levels of the physical units, wherein the plurality of optimal read voltage levels are the read voltage levels which are used to read the data of the physical unit and decode successfully, and
wherein the step of recording the association information between the first read voltage level and the second read voltage level in the transient look-up table comprises: counting a number of times that the first read voltage level and the second read voltage level are associated to generate a count value; and recording the count value in the transient look-up table.