Patent ID: 11935609
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 2:
3. The data storage device of claim 2, wherein, when executing the linked XOR flash data protection scheme, the data storage controller is further configured to:
control the memory to store the first full XOR parity buffer in one of the first one or more of the plurality of wordlines,
control the memory to store the first reduced XOR parity buffer in one of the second one or more of the plurality of wordlines,
control the memory to store the plurality of reduced XOR parity buffers in one of the third one or more of the plurality of wordlines, and
control the memory to store the second full XOR parity buffer in one of the fourth one or more of the plurality of wordlines.