Patent ID: 11923369
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. An integrated circuit comprising:
a set of power rails on a back-side of a substrate, and extending in a first direction, each power rail being separated from an adjacent power rail in a second direction different from the first direction;
a first flip-flop comprising:
a first set of conductive structures extending in the first direction, and being located on a first metal layer; and
a first inverter having a first output pin;

a second flip-flop abutting the first flip-flop at a first boundary, the second flip-flop comprising:
a second set of conductive structures extending in the first direction, being located on the first metal layer, the second set of conductive structures being separated from the first set of conductive structures in the second direction; and
a second inverter having a second output pin; and

a third flip-flop abutting the second flip-flop at a second boundary, the third flip-flop comprising:
a third set of conductive structures extending in the first direction, being located on the first metal layer and being separated from the first set of conductive structures and the second set of conductive structures in the second direction; and
a third inverter having a third output pin; and

a first conductive structure on a second metal layer above the first metal layer, extending in the second direction, overlapping the first boundary and the second boundary, and electrically coupling the first output pin, the second output pin and the third output pin together, each of the first inverter, the second inverter and the third inverter being configured to output a clock signal on the first conductive structure;
wherein the first flip-flop, the second flip-flop and the third flip-flop are on a front-side of the substrate opposite from the back-side; and
wherein the second set of conductive structures are offset from the first boundary and the second boundary in the second direction.