Patent ID: 11937488
Assignee: JAPAN DISPLAY INC.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 0:
1. A manufacturing method of a display device, comprising:
preparing a processing substrate by
forming a first lower electrode and a second lower electrode above a substrate,
forming a rib on the first lower electrode and the second lower electrode, the rib being formed of a first inorganic insulating material and including a first aperture overlapping the first lower electrode and a second aperture overlapping the second lower electrode, and
forming a partition on the rib, the partition including
a lower portion on the rib and between the first aperture and the second aperture, and
an upper portion on the lower portion and extending beyond a side surface of the lower portion;

forming a first organic layer on the rib and the partition, the first organic layer including a first light-emitting layer and being in contact with the first lower electrode at the first aperture;
forming a first upper electrode on the first organic layer;
forming a first transparent layer on the first upper electrode, the first transparent layer being formed of a first organic material;
forming a second transparent layer on the first transparent layer, the second transparent layer being formed of a second organic material different from the first organic material;
forming a first sealing layer on the second transparent layer, the first sealing layer being formed of a second inorganic insulating material;
forming a first patterned resist on the first sealing layer, the first patterned resist covering a first portion of the first sealing layer above the first lower electrode and a second portion of the first sealing layer above a first part of the upper portion of the partition, and the first patterned resist exposing a third portion of the first sealing layer above the second lower electrode and a fourth portion of the first sealing layer above a second part of the upper portion of the partition;
removing the third portion of the first sealing layer to expose a partition portion of the second transparent layer and a pixel portion of the second transparent layer by a first dry etching, the partition portion of the second transparent layer overlapping the upper portion of the partition in a plan view and the pixel portion of the second transparent layer overlapping the second lower electrode in the plan view;
removing the partition portion of the second transparent layer and the pixel portion of the second transparent layer to expose a partition portion of the first transparent layer and a pixel portion of the first transparent layer by a second dry etching using an oxygen plasma, the partition portion of the first transparent layer overlapping the upper portion of the partition in the plan view and the pixel portion of the first transparent layer overlapping the second lower electrode in the plan view;
removing the partition portion of the first transparent layer and the pixel portion of the first transparent layer to expose a partition portion of the first upper electrode and a pixel portion of the first upper electrode by the second dry etching, the partition portion of the first upper electrode overlapping the upper portion of the partition in the plan view, and the pixel portion of the first upper electrode overlapping the second lower electrode in the plan view, wherein the partition portion of the first transparent layer and the pixel portion of the first transparent layer are removed after the removing the partition portion of the second transparent layer and removing the pixel portion of the second transparent layer in a continuous removal operation by the same second dry etching;
removing the partition portion of the first upper electrode and the pixel portion of the first upper electrode to expose a portion of the first organic layer by a first wet etching;
removing the portion of the first organic layer by a third dry etching using the oxygen plasma, and
removing the first patterned resist.