Patent ID: 11949009
Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A method of manufacturing a semiconductor die including a transistor device formed in an active area of a semiconductor body and having a channel region, a gate region, and a field electrode region, the gate region arranged laterally aside the channel region and having a gate electrode for controlling a current flow in the channel region; and an additional device formed in an additional device area of the semiconductor body, the method comprising:
etching a gate trench into the semiconductor body in the active area;
during etching of the gate trench, simultaneously etching a plurality of vertical trench recesses into the semiconductor body in the additional device area;
forming the gate region with the gate electrode in the gate trench;
etching a recess into the semiconductor body in the additional device area; and
depositing a semiconductor material into the recess above the plurality of vertical trench recesses.