Patent ID: 11935613
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A method, comprising:
determining largest and smallest successful values of a receive clock delay;
determining largest and smallest successful values of a transmit clock delay;
setting a first set of parameters for a Serial Peripheral Interface (SPI) coupled to a Double Data Rate (DDR) flash memory, the first set of parameters comprising the largest successful value of the transmit clock delay, the largest successful value of the receive clock delay, and a first value of a reference clock delay (RD) cycle;
setting a second set of parameters for the SPI, the second set of parameters comprising the smallest successful value of the transmit clock delay, the smallest successful value of the receive clock delay, and a second value of the RD cycle;
selecting one of the first and second sets of parameters based on determining whether the first set of parameters results in successfully reading from the DDR flash memory over a larger range of operating temperatures of a device performing the method than the second set of parameters;
programming the SPI using the selected one of the first and second sets of parameter;
in response to determining that the first value of the RD cycle is equal to the second value of the RD cycle:
selecting a selected value of the transmit clock delay between the smallest successful value of the transmit clock delay and the largest successful value of the transmit clock delay and a selected value of the receive clock delay between the smallest successful value of the receive clock delay and the largest successful value of the receive clock delay, the selection based on an expected operating temperature of the device performing the method; and
programming the SPI to the first value of the RD cycle, the selected value of the transmit clock delay, and the selected value of the receive clock delay.