Patent ID: 11886376
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. The memory device of claim 2, wherein:
the connector comprises a first connector configured to communicate first signals with the external circuit;
the input buffer includes a signal port and a reference port, the input buffer configured to receive the input signals based on comparing voltages at the signal port and the reference port;
further comprising:
a second connector communicate second signals with the external circuit; and
a coupling mechanism connected between (1) the first connector and the signal port of the input buffer and (2) the variable reference generator and the reference port of the input buffer, the coupling mechanism selectively operable to couple the input buffer to the second connector for implementing the complementary communication configuration, wherein the first and second signals are complementary signals that correspond to a single stream of information.