Patent ID: 11874943
Assignee: SPIDEROAK, INC.
Field: Digital communication (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A cryptographic computer-implemented method for verifying a block to be added to a distributed linear sequence, the method comprising:
receiving, by a computer device, a request from a computer server to add the block to the distributed linear sequence,
wherein a server administrator requested the computer server to distribute the block to a plurality of computer devices for verifying the block, and
wherein the distributed linear sequence comprises a plurality of blocks, each block of the plurality of blocks comprising one or more events;

determining that the block is attempting to modify a policy recorded in the distributed linear sequence;
determining, based on processing at least a part of the policy recorded in the distributed linear sequence, that only an administrator of the distributed linear sequence is allowed to modify the policy;
checking the one or more events against the policy to determine absence of an event indicating that the server administrator is an administrator of the distributed linear sequence;
responsive to determining the absence of an event indicating that the server administrator is an administrator:
determining that the computer server is compromised; and

responsive to determining that the computer server is compromised:
sending a message to each other computer device of the plurality of computer devices that the computer server is compromised,
rejecting addition of the block to the distributed linear sequence, and
shutting down the computer device to prevent corruption of the distributed linear sequence.