Patent ID: 11923199
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A method, comprising:
forming a hard mask over a substrate;
forming a structure on the hard mask;
forming a spacer layer on the structure;
forming a mask layer over the spacer layer, the mask layer comprising a bottom layer, a middle layer over the bottom layer, and a top layer over the middle layer;
patterning the top layer of the mask layer;
etching the middle layer and the bottom layer of the mask layer to form an opening;
removing the middle layer; and
forming a backfill material in the opening and on a top surface of the bottom layer; and
removing a portion of the backfill material, such that a top surface of the backfill material is lower than a top surface of the spacer layer.