Patent ID: 11894039
Assignee: NIF/T, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 8:
9. A dynamic random-access memory (DRAM) device integratable with a silicon integrated circuit (IC), the DRAM device comprising:
an epitaxial source having a doping of a second dopant type, the epitaxial source being over a first portion of a surface of a substrate, the substrate having a doping of a first dopant type, creating a junction at an interface between the epitaxial source and the substrate, the epitaxial source being connected structurally to a first terminal of a capacitor, the capacitor having a first conductive layer structurally connected to the epitaxial source forming the first terminal of the capacitor, a second terminal of the capacitor being formed by a second conductive layer separated from the first conductive layer by a capacitor dielectric layer, the second conductive layer being connected to a ground or a fixed voltage source via a metal interconnect;
an epitaxial drain having a doping of the second dopant type, the epitaxial drain being over a second portion of the surface of the substrate, the substrate having a doping of the first dopant type, creating a junction at an interface between the epitaxial drain and the substrate, the epitaxial drain being connected to a bit line; and
a pass gate being over the surface of the substrate between the epitaxial source and the epitaxial drain, the pass gate being configured to form a channel in the substrate connecting the epitaxial source and the epitaxial drain when a gate voltage in excess of a threshold voltage of a pass transistor of the DRAM device is applied to a gate electrode, the gate electrode connecting to a word line enabled to turn the pass transistor on or off by the application of the gate voltage.