Patent ID: 11914536
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. A device that provides an interface between a plurality of master devices and a slave device, the device comprising:
a plurality of timers respectively corresponding to the plurality of master devices; and
a controller configured to allocate a semaphore to the plurality of master devices,
wherein each of the plurality of timers is configured to begin timing when an access request is received from a master device corresponding to each of the plurality of timers via a bus, and to be reset when the semaphore is allocated to the master device, and
wherein the controller is configured to provide a first message via the bus to a master device that corresponds to a timer with an expiration interval that has been measured, based on a plurality of expiration intervals respectively corresponding to the plurality of master devices.