Patent ID: 11909396
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. An integrated circuit, comprising:
a flip flop circuit configured to operate in response to a plurality of data signals transmitted through a plurality of first conductive lines disposed on a front side of the integrated circuit and a first clock signal and a second clock signal that are received from a plurality of second conductive lines disposed on a back side, opposite of the front side, of the integrated circuit, and comprising:
a first inverter configured to generate the first clock signal in response to a third clock signal received from a third conductive line on the front side; and
a second inverter configured to generate the second clock signal in response to the first clock signal transmitted by a first line in the plurality of second conductive lines.