Patent ID: 11868696
Assignee: SYNOPSYS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A non-transitory computer-readable medium storing computer instructions that, when executed, cause a processor to perform an operation for designing a circuit, the operation comprising:
adding, to a circuit design, a power switch lacking an input supply port and an output supply port, wherein the power switch is configured to produce an output over an acknowledgement port based on one or more signals provided over only a control port;
adding, to the circuit design, an isolation circuit comprising a driver configured to clamp an output of the isolation circuit, wherein a select pin of the isolation circuit controls whether the isolation circuit outputs the clamped output or an input value;
adding, to the circuit design, a retention circuit comprising:
a clock gating enabled register;
a first AND gate, wherein an output of the first AND gate is input to a clear pin of the clock gating enabled register; and
a second AND gate, wherein an output of the second AND gate is input to a chip enable pin of the clock gating enabled register; and

compiling the circuit design.