Patent ID: 11868094
Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
Field: Basic communication processes (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 11:
12. The TDC circuitry of claim 9, wherein—in an intermediate operation mode of the TDC circuitry, wherein each of a plurality of collections of constituent TDCs comprises serially arranged constituent TDCs:
the TDC circuitry is configured to provide the input clock signal as the respective constituent clock signal to first constituent TDCs of each collection, and to successively—within each collection—provide respectively delayed versions of the input clock signal as respective constituent clock signal to the constituent TDCs of the collection, and
the digital signal combiner is configured to provide the digitally represented output signal based on concatenations of the digitally represented constituent output signals of constituent TDCs in each collection.