Patent ID: 11868913
Assignee: nan
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. The apparatus of claim 1, wherein the first information indicates directed edges in the argument graph, said directed edges indicating which third node of the nodes provides an argument for another different node of the nodes, which fourth node of the nodes provides an assumption for another different second node of the nodes and which fifth node of the nodes provides a challenge to another different third node of the nodes, wherein the second information indicates text or data associated with the nodes, and wherein the processing device is configured to determine a belief as a numerical value indicating status of verifying validity of an inference for each respective node of the argument graph, based on estimating (i) a likelihood that each incoming assumption edge thereof is from a true node, (ii) when the node has at least one argument edge, at least one of the at least one argument edge is from a true node, and (iii) no incoming challenge edge thereof is from a true node.