Patent ID: 11893238
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. A method of controlling a nonvolatile semiconductor memory comprising a plurality of blocks, each of the blocks comprising a plurality of memory cells, each of the memory cells configured to store i-bits data, i being equal to or larger than 2, the method comprising:
writing a plurality of pieces of first data to first blocks of the blocks in a first mode in response to one or more first requests from a host device;
performing a first operation for releasing the first blocks as free blocks, the first operation including reading the plurality of pieces of first data from the first blocks and writing the plurality of pieces of read first data to a second block of the blocks in a second mode, each of the plurality of pieces of read first data being written to a second block in the second mode only with one or more other pieces of read first data;
writing a plurality of pieces of second data to third blocks of the blocks in the second mode; and
performing a second operation for releasing the third blocks as free blocks, the second operation including reading the plurality of pieces of second data from the plurality of third blocks and writing the plurality of pieces of read second data to a single fourth block of the blocks in the second mode, wherein
only j-bits data is written into each of memory cells in the first mode, and
k-bits data is written into each of memory cells in the second mode, k being larger than j and equal to or smaller than i.