Patent ID: 11921158
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 6:
7. The fan-out buffer of claim 1, wherein the first pulse is one of “k” pulses included in the first start pulse signal,
wherein the second pulse is one of “k” pulses included in the second start pulse signal,
wherein the first stop pulse is one of “k” stop pulses included in the stop pulse signal, and
wherein the first delay control signal generator includes:
a time-to-digital converter configured to generate “k” calculation values by calculating phase differences between the “k” pulses of the first start pulse signal and the “k” stop pulses of the stop pulse signal, respectively;
a first accumulator circuit configured to generate and store a first value by accumulating the “k” calculation values;
a second accumulator circuit configured to accumulate second to k-th calculation values of the “k” calculation values and to generate and store a second value corresponding to half the accumulated value;
a subtractor configured to generate a third value by subtracting the second value from the first value; and
a selection circuit configured to output one of the first value and the second value as the first delay control signal depending on a control signal.