Patent ID: 11972142
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. Data processing circuitry comprising:
configuration provision circuitry to provide configuration data to sending circuitry, the configuration data identifying a set of two or more candidate storage devices available for the sending circuitry and corresponding persistence characteristics of the two or more candidate storage devices;
packet reception circuitry configured to receive a data communication packet from the sending circuitry, the data communication packet including at least payload data and a target address for storage of the payload data, the target address belonging to a particular address space;
wherein the data communication packet includes a predetermined data field specifying a data placement attribute and the packet reception circuitry is configured to detect a storage classification in the received data communication packet based on the predetermined data field specifying the data placement attribute, the storage classification indicative of one or more storage devices selected from the set of two or more candidate storage devices identified in the configuration data; and
storage control circuitry to control writing of the payload data of the data communication packet by the one or more storage devices selected from the set of two or more candidate storage devices sharing the particular address space such that each of the two or more candidate storage devices are addressable by the target address, the storage control circuitry being responsive to the storage classification detected by the packet reception circuitry and to respective persistence properties associated with the set of two or more candidate storage devices.