Patent ID: 11876509
Assignee: INFINEON TECHNOLOGIES AG
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 23:
24. A gate driver system, comprising:
a half bridge circuit comprising a first transistor and a second transistor, wherein the first transistor is configured to be turned on and the second transistor is configured to be turned off during each of a plurality of switching events;
a gate-controlled freewheeling diode coupled antiparallel to the second transistor, wherein the gate-controlled freewheeling diode is configured to be turned on during each of the plurality of switching events;
a gate driver circuit coupled to a first gate terminal of the second transistor and to a second gate terminal of the gate-controlled freewheeling diode,
wherein the gate driver circuit is configured to control a first gate voltage at the first gate terminal in order to drive the second transistor between the switching states, wherein the gate driver circuit is configured to trigger a first transition of the first gate voltage from a first voltage level to a second voltage level during each of the plurality of switching events at a first trigger time, wherein the second voltage level is less than the first voltage level,
wherein the gate driver circuit is configured to control a second gate voltage at the second gate terminal in order to drive the gate-controlled freewheeling diode between conduction states, wherein the gate driver circuit is configured to trigger a second transition of the second gate voltage from a third voltage level to a fourth voltage level during each of the plurality of switching events at a second trigger time, wherein the fourth voltage level is greater than the third voltage level, and wherein the second trigger time is offset prior to the first trigger time by a desaturation time;
a measurement circuit configured to measure a transistor parameter indicative of a voltage slew rate of the first transistor for a first switching event during which the first transistor is transitioned from an off state to an on state; and
a control circuit configured to receive the measured transistor parameter and regulate a duration of the desaturation time based on the measured transistor parameter.