Patent ID: 11869863
Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a substrate;
an adhesive layer formed on a lower surface of the substrate;
a semiconductor element adhered to a lower surface of the adhesive layer;
a through hole that extends through the substrate and the adhesive layer and exposes a first electrode arranged on an upper surface of the semiconductor element;
a via wiring formed in the through hole;
a wiring layer formed on an upper surface of the substrate and electrically connected to the first electrode through the via wiring; and
a protective insulation layer formed on the lower surface of the adhesive layer, wherein the protective insulation layer covers an entirety of all side surfaces of the semiconductor element and a peripheral part of a lower surface of the semiconductor element and exposes a central part of the lower surface of the semiconductor element,
wherein the protective insulation layer includes an opening that exposes a second electrode arranged on the lower surface of the semiconductor element, and
wherein the protective insulation layer covers a peripheral part of a lower surface of the second electrode as well as the peripheral part of the lower surface of the semiconductor element and the entirety of all the side surfaces of the semiconductor element and exposes a central part of the lower surface of the second electrode through the opening.