Patent ID: 11935781
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 7:
8. A method of forming a semiconductor device, the method comprising:
forming a plurality of first channel layers over a substrate;
forming a first recess in the substrate adjacent the plurality of first channel layers;
forming a plug in the first recess;
forming an epitaxial structure over the plug, the epitaxial structure extending along sidewalls of the plurality of first channel layers;
forming a first gate structure surrounding one or more of the plurality of first channel layers;
forming a front-side interconnection structure on a front-side of the substrate;
removing at least a portion of the substrate along sidewalls of the plug;
forming a dielectric layer along sidewalls of the plug;
removing at least a portion of the plug to form a second recess in the dielectric layer; and
forming a first backside via in the second recess, wherein the first backside via is electrically connected to the epitaxial structure.