Patent ID: 11960885
Assignee: TENSTORRENT INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A system for executing a directed graph, comprising:
a heterogeneous set of computational nodes;
a set of links in a network, wherein the set of links link the computational nodes in the heterogeneous set of computational nodes;
a compiler configured to compile, using a table of bandwidth values for the set of links in the network, a set of instructions for routing data for an execution of the directed graph; and
a set of programmable controllers on the heterogeneous set of computational nodes configured with the set of instructions;
wherein executing the set of instructions route data through the network to facilitate the execution of the directed graph by the heterogeneous set of computational nodes; and
wherein: (i) the heterogeneous set of computational nodes includes a set of processing cores in at least two multicore processors; (ii) the network includes a network hierarchy with at least a core level and a chip level; (iii) each computational node in the heterogeneous set of computational nodes includes a router from a set of routers; (iv) the routing of the data through the network includes the set of routers transitioning the data through the core level and the chip level; (v) the network hierarchy includes a server level and a rack level; (vi) at least one of the links is an ethernet link; (vii) the routing of the data through the network includes the set of routers transiting the data through the server level and the rack level; and (viii) the ethernet link does not use an ethernet switch.