Patent ID: 11863190
Assignee: nan
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. A method for generating data outputs for a plurality of flip-flops based on sampled data inputs, the method comprising:
when a clock signal is at a first level and in response to a first change in an input signal that is an opposite logic polarity compared to an output of a latch:
activating a sequence detector, wherein the sequence detector activates a differential sub-circuit of a latch; and
activating a keeper sub-circuit of the latch;
when the clock signal is at a second level:
activating, for a duration, the latch, and deactivate the latch when the output of latch becomes a same level as the input signal, wherein the duration starts when the clock signal goes to the second level and the duration ends when the output of latch becomes the same level as the input signal;
in response to a second change in the input signal that is the opposite logic polarity compared to the output of the latch, activating a keeper sub-circuit.