Patent ID: 11875248
Assignee: IMAGINATION TECHNOLOGIES LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The method of claim 1, wherein the one or more second memory devices comprise:
a local memory for the first core that is accessible only to the first core;
a local memory for the second core that is accessible only to the second core; and
a shared memory that is accessible to the first core and the second core,, the method further comprising, if the size is greater than the threshold:
identifying a disposable portion of the first output tile of the first layer group, which is needed only for evaluating the second layer group based on the first tile; and
identifying an overlap portion of the first output tile of the first layer group, which is needed for evaluating the second layer group based on the first tile and is also needed for evaluating the second layer group based on the second tile,
the method comprising, when storing the first output tile of the first layer group in the one or more second memory devices:
writing the disposable portion of the first output tile to the local memory of the first core; and
writing the overlap portion of the first output tile to the shared memory.