Patent ID: 11894336
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. An integrated fan-out (InFO) package, comprising:
a die;
a plurality of conductive structures aside the die;
an encapsulant laterally encapsulating the die and the plurality of conductive structures; and
a redistribution structure disposed on the encapsulant, wherein the redistribution structure comprises:
a first dielectric layer;
a second dielectric layer stacked on the first dielectric layer;
a first alignment mark embedded in the first dielectric layer, wherein the first alignment mark comprises a first seed layer and a plurality of first conductive patterns, the plurality of first conductive patterns are stacked on the first seed layer, and the first alignment mark is electrically insulated from the die and the plurality of conductive structures; and
a second alignment mark embedded in the second dielectric layer, wherein the second alignment mark comprises a second seed layer, a second conductive pattern, and a plurality of third conductive patterns, the second conductive pattern is sandwiched between the second seed layer and the plurality of third conductive patterns, and the second alignment mark is electrically insulated from the die and the plurality of conductive structures.