Patent ID: 11895827
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 9:
10. A vertical type nonvolatile memory device comprising:
a main chip area comprising a cell area and an extension area extending from the cell area in a first direction and arranged to have a stepped structure, wherein the cell area and the extension area are formed in a multi-stack structure; and
an outer chip area, which surrounds the main chip area and in which a step key is arranged, wherein
the main chip area comprises a first layer arranged on a substrate and a second layer on the first layer, a lower vertical channel layer connected to the substrate is arranged in the first layer, and
the step key comprises an alignment vertical channel layer corresponding to the lower vertical channel layer, and a top surface of the alignment vertical channel layer is lower than the top surface of the lower vertical channel layer;
wherein the outer chip area resides in a portion of the substrate devoid of active devices;
wherein the step key further comprises a recessed portion that is a portion other than the alignment vertical channel layer, and
the top surface of the alignment vertical channel layer is higher than a bottom surface of the recessed portion by a first step.