Patent ID: 11903217
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A method for forming an integrated chip, the method comprising:
depositing a semiconductor layer over a substrate;
forming a pair of source/drains along the semiconductor layer;
depositing a first metal layer comprising a first metal over the substrate;
depositing a second metal layer comprising the first metal on the first metal of the first metal layer;
depositing a ferroelectric layer on the first metal of the second metal layer;
depositing a third metal layer comprising the first metal on the ferroelectric layer; and
depositing a fourth metal layer comprising the first metal on the first metal of the third metal layer,
wherein the first metal layer and the third metal layer have a first crystal orientation and the second metal layer has a second crystal orientation, different from the first crystal orientation.