Patent ID: 11935832
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of manufacturing a semiconductor device, the method comprising:
preparing a semiconductor substrate comprising a plurality of device regions and a scribe lane region separating the plurality of device regions from each other;
forming a wiring structure on a semiconductor substrate, the wiring structure comprising a plurality of chip wiring regions respectively on the plurality of device regions and a dummy wiring region on the scribe lane region;
forming an isolation trench in the dummy wiring region to separate the plurality of chip wiring regions from each other, the isolation trench penetrating through the wiring structure and extending to an upper portion of the semiconductor substrate;
forming an isolation structure by including an insulating material in the isolation trench, the isolation structure having a side surface, which is a substantially flat interface with each of the chip wiring regions and the upper portion of the semiconductor substrate; and,
cutting the isolation structure and the semiconductor substrate to obtain a plurality of semiconductor devices,
wherein each of the plurality of semiconductor devices comprises an insulating material layer on a side surface of each of the chip wiring regions, the insulating material layer comprising the isolation structure remaining after the cutting the semiconductor substrate,
wherein the insulating material layer has a first side surface in contact with each of the chip wiring regions, and a second side surface opposite to the first side surface,
wherein the second side surface of the insulating material layer has a first wave-shaped pattern which is repeated in a direction that is substantially perpendicular to an upper surface of the semiconductor substrate, and
wherein the side surface of the semiconductor substrate has a second wave-shaped pattern which is repeated in the direction that is substantially perpendicular to the upper surface of the semiconductor substrate.