Patent ID: 11962314
Assignee: SOCIONEXT INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 11:
12. The phase locked loop circuit as claimed in claim 11,
wherein the digital-to-time convertor includes:
a slope generating circuit configured to generate a slope voltage, the slope generating circuit including a capacitor and a current source;
a precharge circuit configured to apply an analog voltage, determined based on a control code, to the capacitor;
a comparing circuit configured to compare the slope voltage with a threshold value and generate the first reference clock based on a comparison result; and
a control circuit configured to control the slope generating circuit and the precharge circuit based on the input reference clock and the first reference clock, and

wherein the control circuit repeats the following operations:
turning on the precharge circuit during a precharge period;
transitioning to a slope period in response to transition of the input reference clock, turning off the precharge circuit during the slope period, and turning on the slope generating circuit; and
turning off the slope generating circuit in response to transition of the first reference clock.