Patent ID: 11967370
Assignee: VERVAIN, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. A method for storing data comprising:
providing an MLC non-volatile memory space including at least one MLC non-volatile memory element;
providing an SLC non-volatile memory space including at least one SLC non-volatile memory element; and
maintaining, using a controller coupled to the at least one MLC non-volatile memory element and the at least one SLC non-volatile memory element, an address map of the MLC and SLC non-volatile memory spaces, the address map comprising a list of logical address ranges accessible by a computer system, the list of logical address ranges having a minimum quanta of addresses, wherein each entry in the list of logical address ranges maps to a similar range of physical addresses within either the at least one SLC non-volatile memory element or within the at least one MLC non-volatile memory element;
determining, using the controller, if a range of addresses listed by an entry and mapped to a similar range of physical addresses within the at least one MLC non-volatile memory element, fails a data integrity test performed at the controller based upon received data retained at the controller and which received data is stored in the at least one MLC non-volatile memory element as stored data;
in an event of such a failure,
remapping, using the controller, the entry to a next available equivalent range of physical addresses within the at least one SLC non-volatile memory element; and
transferring the stored data from the at least one MLC non-volatile memory element to the at least one SLC non-volatile memory element using the controller.