Patent ID: 11934704
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A device, including:
a processor;
a memory array comprising a plurality of memory devices, wherein the plurality of memory devices include a plurality of control table sets stored in a plurality of regions; and
a control table set determination logic configured to:
receive a command from a host device, wherein the received command is associated with logical to physical address mapping updates, wherein the received command is at least one of a write command and a relocation command;
determine a control table set of the plurality of control table sets associated with the received command;
determine a region of the plurality of regions associated with the determined control table set;
determine a position in the control table set in the determined region associated with the received command;
upon a first determination that the position is not vacant, generate a predefined number of additional control table sets in the region; and
store the received command in the generated additional control table sets.