Patent ID: 11908841
Assignee: ELUX, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 38:
39. A method for fabricating a back emission backplane, the method comprising:
providing a transparent substrate with a top surface;
for each sub-pixel, forming a control circuit overlying the transparent substrate top surface, having a first electrical interface and a second electrical interface;
depositing a first dielectric layer having a bottom surface overlying the substrate top surface;
forming a power interface layer from the first dielectric layer, including a first plurality of first electrical contacts, a first plurality of second electrical contacts, and a first plurality of apertures formed between the top surface and the bottom surface;
depositing a second dielectric layer having a bottom surface overlying the power interface layer top surface;
forming an emission layer from the second dielectric layer including a first plurality of sub-pixel regions, forming each sub-pixel as follows:
patterning the emission layer to form a well overlying a corresponding aperture, a first via overlying a corresponding first electrical contact, and a second via overlying a corresponding second electrical contact;
depositing an electrically conductive metal in the emission layer first and second vias;

positioning back emission micro-light emitting diodes (microLEDs) with an emissive bottom surface interfacing a corresponding aperture;
wherein forming the power interface layer includes:
etching a third via overlying the electrical control circuit first electrical interface and a fourth via overlying the electrical control circuit second electrical interface; and,
filling the third via with an electrically conductive metal and forming the second electrical contact overlying the third via, and filling the fourth via with the electrically conductive metal and forming a power signal line overlying the fourth via.