Patent ID: 11923460
Assignee: MEDIATEK INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A semiconductor structure, comprising:
semiconductor stacks over a substrate, wherein each of the semiconductor stacks extends in a first direction, and adjacent semiconductor stacks are spaced apart from each other in a second direction, which is different from the first direction, wherein each of the semiconductor stacks comprises:
channel layers above the substrate and spaced apart from each other in a third direction, wherein the third direction is vertical to the first direction and the second direction; and
a gate structure, comprising:
gate dielectric layers around respective channel layers; and a gate electrode along sidewalls of the gate dielectric layers and a top surface of an uppermost gate dielectric layer of the gate dielectric layers,
wherein a space in the third direction between two lowermost channel layers of the channel layers is greater than a space in the third direction between two uppermost channel layers of the channel layers,
wherein individual channel layers have an extent in the third direction less than their extent in the first and second directions,
wherein the space in the third direction between the two lowermost channel layers is defined as a first space, the space in the third direction between the two uppermost channel layers is defined as a second space, and a difference between the first space and the second space is within a range of 5 nm to 30 nm.