Patent ID: 11869981
Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 2:
3. A semiconductor device comprising:
a substrate;
a first conductive layer over the substrate;
a first insulating layer over the first conductive layer;
an oxide semiconductor layer over the first insulating layer;
a second conductive layer over the oxide semiconductor layer;
a third conductive layer over the oxide semiconductor layer; and
a second insulating layer over the second conductive layer and the third conductive layer,
wherein the oxide semiconductor layer comprises a first region and a second region, the first region having lower crystallinity than the second region,
wherein the oxide semiconductor layer is a composite oxide semiconductor,
wherein the composite oxide semiconductor comprises:
a third region comprising InaMbZncOd; and
a plurality of fourth regions comprising InxZnyOz,

wherein the a, b, c, d, x, y, and z each represent a given number,
wherein the M represents Al, Ga, Y, or Sn,
wherein a composition of the third region is different from compositions of the plurality of fourth regions, and
wherein the plurality of fourth regions is unevenly distributed in the third region.