Patent ID: 11954537
Assignee: EMC IP HOLDING COMPANY LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A system, comprising:
a processor; and
a memory that stores executable instructions that, when executed by the processor perform operations comprising:
receiving a value indicating a predicted level of burden on computing resources of the system corresponding to a reader application instance reading information embodied in event data of an ordered event stream (OES) to be written to a storage device of the system, wherein the value is based on predicted performance data of a simulation of the reader application instance exceeding a threshold;
updating a topology of a key space of the OES, wherein the updating reduces the predicted level of burden on the computing resources, and wherein the updating is permitted based on a condition being satisfied;
scaling the OES based on the updated topology; and
writing the scaled OES to the storage device, wherein the information embodied in the event data of the OES is read by the reader application instance.