Patent ID: 11887689
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. An apparatus, comprising:
a memory array comprising a memory cell configured to store a logic state; and
a controller coupled with the memory array and operable to cause the apparatus to:
activate a word line that is coupled with the memory cell storing the logic state;
discharge, from a capacitor coupled with a digit line associated with the memory cell, a voltage representative of the logic state during a period of time that the word line is activated; and
transfer, via a switching component coupled with the digit line and after discharging the voltage representative of the logic state from the capacitor, a charge to the digit line from the capacitor to discharge the capacitor to a reference voltage during the period of time that the word line is activated.