Patent ID: 11908851
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method for forming a transistor structure, comprising:
forming a fin structure protruding from a substrate;
disposing a first conductive line, a second conductive line, a third conductive line and a fourth conductive line along a direction perpendicular to the fin structure to wrap a first predetermined region, a first source region, a gate region and a first drain region of the fin structure, respectively; and
disposing a first conductive rail in a same layer as the first conductive line and one of the second conductive line and the fourth conductive line, wherein the first conductive rail extends in a direction parallel to the fin structure to be laterally contacted by the first conductive line and the one of the second conductive line and the fourth conductive line.