Patent ID: 11869897
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 12:
13. A method of fabricating an array substrate, comprising forming a display area having a plurality of subpixels;
wherein forming the display area comprises forming a regular display sub-area and forming a display-bonding sub-area;
forming the plurality of subpixels comprises forming a plurality of first subpixels in the display-bonding sub-area and forming a plurality of second subpixels in the regular display sub-area;
wherein the method comprises forming a base substrate extending throughout the regular display sub-area and the display-bonding sub-area; and
forming a plurality of thin film transistors on a first side of the base substrate and respectively in the plurality of subpixels;
wherein forming a respective one of the plurality of first subpixels comprises:
forming a bonding pad on a second side of the base substrate, wherein the second side is opposite to the first side;
forming a lead line electrically connecting a respective one of the plurality of thin film transistors to the bonding pad, wherein the lead line is unexposed in the array substrate; and
forming a via extending through the base substrate;
wherein the lead line is formed to extend from the first side to the second side of the base substrate through the via, to connect to the bonding pad.