Patent ID: 11972340
Assignee: KWANGWOON UNIV INDUSTRY-ACADEMIC COLLABORATION FDN
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 12:
13. A weight memory system comprising:
a first electrode arranged in a first direction, and configured to connect a common output terminal of memory cells which are arranged in the first direction from among a plurality of memory cells;
a second electrode arranged in a second direction different from the first direction, and configured to connect input terminals of memory cells which are arranged in the second direction from among the plurality of memory cells;
a first memory cell disposed to correspond to a location at which the first electrode and the second electrode intersect each other, specified by intersection of the first electrode and the second electrode, and configured such that the first electrode is connected to a first common output terminal thereof and the second electrode is connected to a first input terminal thereof;
a first interface circuit configured to:
drive and control a voltage of the first electrode; or
sense a change in a voltage or amount of charge of the first electrode and generate an output transfer signal; and

a first driving circuit configured to drive and control a voltage of the second electrode;
wherein the first memory cell comprises charge storage disposed between the first input terminal and the first common output terminal and configured to store charge; and
wherein a first capacitance between the first input terminal and the first common output terminal is determined based on an amount of charge stored in the charge storage, and is quantified based on first data given to the first memory cell to be stored in the first memory cell.