Patent ID: 11942458
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A semiconductor package comprising:
a lower package; and
an upper package mounted on the lower package,
wherein the lower package comprises:
a first substrate;
a first semiconductor chip on the first substrate, the first semiconductor chip having first chip pads facing the first substrate;
a second semiconductor chip and a passive device which are provided on the first substrate, are provided on a bottom surface of the first semiconductor chip and are electrically connected to the first chip pads;
a first molding part surrounding the second semiconductor chip and the passive device on the first substrate;
a first through-electrode vertically penetrating the first molding part to electrically connect the first semiconductor chip to the first substrate;
a second through-electrode vertically penetrating the first molding part at a side of the second semiconductor chip to be electrically connected to the first substrate, wherein the second semiconductor chip is connected to the first substrate through solder bumps at a bottom surface of the second semiconductor chip; and
a second molding part surrounding the first semiconductor chip on the first molding part,

wherein the upper package comprises:
an upper package substrate;
an upper semiconductor chip mounted on the upper package substrate;
an upper molding part covering the upper semiconductor chip on the upper package substrate; and
a package connection terminal provided under the upper package substrate and electrically connecting the upper package to the lower package.