Patent ID: 11942434
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A method for manufacturing a semiconductor package, comprising:
preparing a printed circuit board (PCB) comprising a core layer, a back-side via plug, a back-side wiring layer, and a back-side pad;
disposing connectors on the back-side pad on a first surface of the PCB;
disposing a lower semiconductor chip between the connectors on the first surface of the PCB, wherein the lower semiconductor chip comprises a chip bump at an upper surface thereof;
providing an encapsulator on the first surface of the PCB, wherein the encapsulator is on side and upper surfaces of the connectors and the lower semiconductor chip;
grinding an upper portion of the encapsulator to expose the connectors and the chip bump of the lower semiconductor chip; and
forming a front-side redistribution layer on the encapsulator, the connectors that were exposed, and the chip bump,
wherein a coefficient of thermal expansion of the front-side redistribution layer is higher than a coefficient of thermal expansion of the PCB, and
wherein a modulus of elasticity of the PCB is higher than a modulus of elasticity of the front-side redistribution layer.