Patent ID: 11892966
Assignee: XILINX, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A method comprising:
configuring each chiplet integrated circuit (IC) die of a plurality of chiplet IC dies to provide a corresponding function when coupled to an anchor IC die via a plurality of corresponding chip-to-chip (C2C) interfaces;
configuring each chiplet IC of the plurality of chiplet IC dies to have one or more requirements for corresponding C2C interface of the plurality of C2C interfaces via which the chiplet IC die couples to the anchor IC die;
configuring each chiplet IC die of the plurality of chiplet IC dies to have one or more performance requirements for the anchor IC die;
configuring each C2C interface of the plurality of C2C interfaces to:
receive one chiplet IC die of the plurality of chiplet IC dies regardless of a functionality of the one chiplet IC die; and
individually couple the one chiplet IC die to the anchor IC die to form a multi-die IC device; and

configuring the anchor IC die to provide one or more programmable options to interface in different combinations and arrangements with the plurality of chiplet IC dies to configure features and functions of a device comprising the anchor IC die and the chiplet IC dies.