Patent ID: 11916017
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. An integrated circuit comprising:
a first power rail and a second power rail extending in a first direction;
a circuit cell between the first power rail and the second power rail, the circuit cell having two vertical boundaries extending in a second direction perpendicular to the first direction, wherein each of the vertical boundaries passes at least one cell boundary isolation region;
a first horizontal conducting line, a second horizontal conducting line, and a third horizontal conducting line in a first connection layer, each of the first horizontal conducting line, the second horizontal conducting line, and the third horizontal conducting line extends in the first direction between the first power rail and a second power rail;
a gate-conductor below the first connection layer and extending in the second direction between the two vertical boundaries;
a terminal-conductor below the first connection layer and extending in the second direction between the two vertical boundaries;
a via-connector directly connecting one of the horizontal conducting lines with the gate-conductor or with the terminal-conductor;
a first vertical conducting line and a second vertical conducting line in a second connection layer which above the first connection layer, wherein each of a first vertical conducting line and a second vertical conducting line extends in the second direction;
a first pin-connector is directly connected between the first horizontal conducting line and the first vertical conducting line atop one of the gate-conductors; and
a second pin-connector is directly connected between the second horizontal conducting line and the second vertical conducting line atop a first one of the vertical boundaries.