Patent ID: 11929383
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. A manufacturing method, comprising:
fabricating an electronic chip having an array of photosensitive pixels along a light-receiving surface thereof, wherein a pixel of the array comprises:
one or more first photodiodes and one or more second photodiodes; and
first and second transistors; and

forming an interconnect structure vertically below the first and second photodiodes and the first and second transistors, the interconnect structure including first electrical conductors interconnecting the one or more first photodiodes and the first transistors to form a first electrical circuit and further including second electrical conductors interconnecting the one or more second photodiodes and the second transistors to form a second electrical circuit, the first and second electrical circuits being functionally different and independent from each other, wherein the forming comprises:
arranging the first electrical conductors substantially in a portion of the interconnect structure vertically below a first area of the light-receiving surface in the pixel; and
arranging the second electrical conductors substantially in a portion of the interconnect structure vertically below a second area of the light-receiving surface in the pixel, the second area non-overlapping with the first area.