Patent ID: 11894457
Assignee: JOULWATT TECHNOLOGY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A manufacturing method of a semiconductor device, comprising the semiconductor device according to claim 1, wherein the manufacturing method comprises:
forming the well region on the substrate;
forming the gate structure in the well region and forming a channel region at a position from the well region to the drift region, wherein a channel direction of the channel region is the first direction of the drift region, the channel region is located between the source-end doped region and the drain-end doped region, and is in contact with the source-end doped region;
forming the drain-end doped region on a side of the substrate, wherein the side of the substrate is away from the well region; and
forming the source-end doped region in the well region, wherein the source-end doped region comprises at least one first doped region and at least one second doped region, a side surface of each of said at least one first doped region is in contact with the trench gate structure,
wherein, the step of forming the well region comprise: forming a well-region trench on the substrate by etching; and forming the well region in the well-region trench by performing epitaxy with well-region material;
wherein, the source-end doped region comprises at least one first doped region and at least one second doped region of opposite doping types, a doping type of the drift region is same with a doping type of the drain-end doped region, a doping type of said at least one first doped region is same with the doping type of the drain-end doped region, said at least one first doped region and said at least one second doped region are linearly distributed in a second direction and alternately connected, wherein the second direction is perpendicular to the first direction on the upper surface of the drift region, and each one of said at least one first doped region is located corresponding to the channel region,
wherein the gate structure comprises at least one trench gate, each of which consists of a first portion and a second portion, the second portion has a sidewall surface in direct contact with the source-end doped region, an entire bottom surface of the first portion is in direct contact with the drift region, an entire bottom surface of the second portion is in direct contact with the well region, and the first portion and the second portion have upper surfaces flush with each other and have a same height,
a bottom surface of the drain-end doped region and a contact surface, facing the drain-end doped region, of each said at least one trench gate, are in direct contact with the drift region.