Patent ID: 11916121
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A semiconductor device comprising:
a metal oxide semiconductor channel layer having a thickness between a first major surface and a second major surface and extending between a first end surface and a second end surface that are spaced apart along a first direction and connect respective edges of the first major surface and the second major surface;
a first gate dielectric layer contacting a first portion of the second major surface of the metal oxide semiconductor channel layer;
a first gate electrode overlying the first gate dielectric layer and contacting a second portion of the second major surface of the metal oxide semiconductor channel layer;
a drain region and a backside gate dielectric layer contacting the first major surface of the metal oxide semiconductor channel layer;
a backside gate electrode contacting the backside gate dielectric layer;
a second gate dielectric layer contacting the second end surface of the metal oxide semiconductor channel layer;
a second gate electrode contacting a surface of the second gate dielectric layer; and
a source region contacting the first end surface of the metal oxide semiconductor channel layer.