Patent ID: 11936382
Assignee: ATI TECHNOLOGIES ULC
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method comprising:
generating a first delayed signal based on a regulated supply voltage and an output clock at a first delay line of an oscillator circuit;
generating a second delayed signal based on a droopy supply voltage and the output clock at a second delay line of the oscillator circuit, wherein the second delay line has a same number and type of components as the first delay line;
controlling a propagation delay of at least one of the first delayed signal and the second delayed signal based on a comparison between a number of reference clock cycles counted within a specified period and a number of clock cycles of the output clock counted within the specified period; and
sending the first delayed signal and the second delayed signal to an edge detector of the oscillator circuit, wherein the edge detector generates the output clock, and wherein a resulting oscillation frequency of the output clock is based on a relationship between the regulated supply voltage and the droopy supply voltage.