Patent ID: 11947032
Assignee: KABUSHIKI KAISHA TOSHIBA
Field: Measurement (Instruments)
Classification: CPC G  Y | IPC G

Claim 0:
1. A full duplex radio apparatus comprising:
a transmit path configured to transmit a transmit signal including a first pulse having a pulse width less than a predetermined time and a second pulse having a pulse period more than the predetermined time, the transmit path being coupled to an antenna;
a receive path configured to receive a received signal, the receive path being coupled to the antenna;
a first receive path for observing the first pulse from the received signal, the first receive path branching from the receive path;
a second receive path for observing the second pulse from the received signal, the second receive path comprising a radio frequency limiter, the second receive path branching from the receive path, and the receive path being divided into the first receive path and the second receive path;
a variable impedance component;
a first directional coupler comprising a first port, a second port, a third port, and a fourth port;
a second directional coupler comprising a fifth port, a sixth port, and a seventh port; and
a self-interference cancellation circuit configured to input a signal from the receive path via the first directional coupler and a signal from the transmit path via the second directional coupler, cancel at least a portion of a self-interference in the received signal, and output the canceled signal to the first receive path, wherein:
the first port is coupled to the second port;
the third port is coupled to the fourth port;
the first port is coupled to the receive path;
the second port is coupled to the radio frequency limiter of the second receive path;
the third port is coupled to the self-interference cancellation circuit;
the fourth port is coupled to the variable impedance component;
the fifth port is coupled to the sixth port;
the fifth port is coupled to the transmit path;
the sixth port is coupled to the antenna; and
the seventh port is coupled to the self-interference cancellation circuit.