Patent ID: 11972125
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A system, comprising:
a plurality of memory components arranged to form a stackable cross-gridded array of memory cells; and
a processing device coupled to the plurality of memory components, the processing device to perform operations comprising:
receiving a request for allocation of memory resources based on a QoS used to perform particular memory operations;
providing the requested memory resources by allocating a plurality of physical functions to allocate a QoS pool to provide the QoS;
receiving an updated request for allocation of additional memory resources, wherein the additional memory resources are fewer than the initially requested memory resources;
removing a physical function from the QoS pool comprising the plurality of physical functions, wherein the removal of the physical function decreases performance of the QoS.