Patent ID: 11942442
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 4:
5. The package structure of claim 4, further comprising:
a plurality of second through vias, encapsulated in the insulating encapsulation and electrically connected to the semiconductor die, wherein positioning locations of the plurality of second through vias are aside of positioning locations of the plurality of first through vias and a positioning location of the semiconductor die on a vertical projection on the first redistribution circuit structure,
wherein the conductive adhesive is distant from the plurality of second through vias and in contact with a metal feature of the first redistribution circuit structure exposed by a recess formed in an outermost dielectric layer of the first redistribution circuit structure, and
wherein the conductive adhesive is further in contact with the outermost dielectric layer of the first redistribution circuit structure and covers a bottom and a sidewall of the recess.