Patent ID: 11901375
Assignee: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 15:
16. The method for manufacturing the array substrate according to claim 15, wherein before forming the plurality of conductive electrodes, the method for manufacturing the array substrate further comprises:
forming a planarization film on a side of the plurality of touch signal lines, the plurality of first transistors, and the plurality of conductive pins away from the base; and
patterning the planarization film to form first via holes, exposing the plurality of touch signal lines, in the planarization film, and remove a portion of the planarization film located in the bonding area, so as to obtain a planarization layer; an orthogonal projection of the planarization layer on the base not overlapping with orthogonal projections of the plurality of conductive pins on the base.