Patent ID: 11941436
Assignee: ASTERA LABS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An integrated circuit component comprising:
first and second high-bandwidth interfaces;
a third interface to receive information-logging commands and output logged information;
a first logging buffer; and
control circuitry to:
forward symbols received via the first high-bandwidth interface to the second high-bandwidth interface for output from the IC component;
receive a first information-logging command via the third interface;
store, in the first logging buffer in response to the first information-logging command, information corresponding to events detected within at least one of the first and second high-bandwidth interfaces in connection with forwarding the symbols; and
output contents of the first logging buffer, including the information corresponding to events detected within at least one of the first and second high-bandwidth interfaces, via the third interface.