Patent ID: 11923435
Assignee: WINBOND ELECTRONICS CORP.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A high voltage semiconductor device, comprising:
a semiconductor substrate;
a first drift region disposed in the semiconductor substrate;
a gate structure disposed on the semiconductor substrate;
a spacer structure disposed on a sidewall of the gate structure;
a first source/drain doped region disposed in the first drift region, wherein the first source/drain doped region is separated from the spacer structure;
a first silicide layer disposed on the first source/drain doped region, wherein the first silicide layer is separated from the spacer structure, and a portion of the first drift region is located between the spacer structure and the first source/drain doped region;
a first insulation structure disposed on the first drift region, wherein the first insulation structure is directly connected with the portion of the first drift region located between the spacer structure and the first source/drain doped region;
a second drift region disposed in the semiconductor substrate, wherein a part of the first drift region and a part of the second drift region are located at two opposite sides of the gate structure in a horizontal direction, respectively;
a second source/drain doped region disposed in the second drift region, wherein the second source/drain doped region is separated from the spacer structure;
a second silicide layer disposed on the second source/drain doped region, wherein the second silicide layer is separated from the spacer structure, and a portion of the second drift region is located between the spacer structure and the second source/drain doped region; and
a second insulation structure disposed on the second drift region, wherein the second insulation structure is directly connected with the portion of the second drift region located between the spacer structure and the second source/drain doped region.