Patent ID: 11887985
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A method comprising:
etching a substrate to form a semiconductor fin;
forming a gate stack on a top surface and sidewalls of the semiconductor fin; and
forming a first recess in the semiconductor fin on a side of the gate stack, wherein forming the first recess comprises;
performing a first etching process to form a first portion of the first recess;
depositing a first dielectric layer on sidewalls of the gate stack and the first portion of the first recess;
performing a second etching process to form a second portion of the first recess using the first dielectric layer as a mask, wherein the second portion of the first recess extends under the gate stack;
performing a third etching process to remove the first dielectric layer; and
after performing the third etching process, performing a fourth etching process to form a third portion of the first recess.