Patent ID: 11895588
Assignee: ANALOG DEVICES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G  Y | IPC H

Claim 0:
1. A clock circuit comprising:
a clock to generate a first clock signal having a first frequency;
a clock divider to divide the first clock signal to generate a second clock signal output at a second frequency, wherein the first frequency is higher than the second frequency;
a multiplexor to receive the first and second clock signals as inputs;
a controller coupled to the multiplexor to control the multiplexor to output the first clock signal during a first mode and to output the second clock signal during a second mode, wherein switching directly between the first clock signal and second clock signal by the multiplexor is performed based on a select edge of the second clock signal; and
a system time counter coupled to the multiplexor to maintain a system time count, wherein the system counter configured to increment the system time count based on the first clock signal during the first mode and to increment the system time count based on the second clock signal during the second mode.