Patent ID: 11887858
Assignee: KABUSHIKI KAISHA TOSHIBA
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of manufacturing a semiconductor device, the device comprising a semiconductor part, a first electrode provided on the semiconductor part, and a second electrode, the semiconductor part being provided between the first and second electrodes, the method comprising:
forming the first electrode covering a back surface of a wafer, the wafer including a region to be the semiconductor part, the first electrode being formed after the second electrode is formed on a front surface opposite to the back surface of the wafer;
forming a first groove at the back surface side of the wafer by selectively removing the first electrode and the wafer, the first groove being provided along a periphery of the region to be the semiconductor part, the first groove including a portion provided in the wafer so that the first electrode does not remain in the portion of the groove; and
dividing the wafer by forming a second groove from the front surface side, the second groove extending into the wafer and being connected to the first groove, the second groove being provided along the periphery of the region to be the semiconductor part,
the second groove having a second width in a direction along the front surface of the wafer, the second width of the second groove being narrower than a first width of the first groove in a same direction,
the first groove having a first depth from the back surface of the wafer to a bottom of the portion of the first groove in a direction perpendicular to the back surface of the wafer, and a half of the first width being larger than the first depth.