Patent ID: 11903324
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 4:
5. The method of claim 1, further comprising:
forming a second electrode layer on the MTJ stack; and
patterning the second electrode layer to expose a top surface of the MTJ stack prior to converting the portions of the pinned layer, the tunnel barrier layer and the free layer to the non-conductive portion of the pinned layer, the non-conductive portion of the tunnel barrier layer and the non-conductive portion of the free layer, respectively, and
wherein converting the portions of the pinned layer, the tunnel barrier layer and the free layer to the non-conductive portion of the pinned layer, the non-conductive portion of the tunnel barrier layer and the non-conductive portion of the free layer, respectively, further includes converting a portion of the patterned second electrode layer to a non-conductive portion of the patterned second electrode layer.