Patent ID: 11935932
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A device comprising:
a first source/drain region in a substrate;
a second source/drain region in the substrate;
a first inter-layer dielectric over the first source/drain region and the second source/drain region;
a first source/drain contact extending through the first inter-layer dielectric, the first source/drain contact connected to the first source/drain region, the first source/drain contact having a first width;
a first spacer around the first source/drain contact;
a first void between the first spacer and first sidewalls of the first inter-layer dielectric, the first sidewalls of the first inter-layer dielectric separated by a first distance;
a second source/drain contact extending through the first inter-layer dielectric, the second source/drain contact connected to the second source/drain region, the second source/drain contact having a second width, the second width less than the first width;
a second spacer around the second source/drain contact, the second spacer having a same width as the first spacer; and
a second void between the second spacer and second sidewalls of the first inter-layer dielectric, the second sidewalls of the first inter-layer dielectric separated by a second distance,
wherein a first difference between the first distance and the first width is greater than a second difference between the second distance and the second width.