Patent ID: 11955409
Assignee: QUALCOMM INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. An apparatus comprising:
a core layer;
means for skew matching located at least partially in the core layer, the means for skew matching comprising:
a first means for skew matching extending vertically and horizontally in the core layer; and
a second means for skew matching extending vertically in the means for skew matching, wherein the first means for skew matching and second means for skew matching are configured to provide time signal matching for a first signal and a second signal; and
at least one structure dielectric layer that is located at least laterally to the core layer;

at least one first dielectric layer coupled to a first surface of the core layer; and
at least one second dielectric layer coupled to a second surface of the core layer.