Patent ID: 11947420
Assignee: GOOGLE LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 2:
3. The system of claim 1, wherein the input receives the information from a hardware memory error detection system comprising:
instantiate a plurality of virtual machines on the host machine, the plurality of virtual machines being associated with a memory address space used to run one or more processes,
instantiate a memory injection utility, the memory injection utility injecting one or more hardware memory errors into the memory address space,
tune one of a frequency of injection of the one or more hardware memory errors or an error density level of the one or more hardware memory errors injected into the memory address space,
detect one or more memory access errors associated with the plurality of virtual machines based on the one or more hardware memory errors injected into the memory address space, the one or more memory access errors providing indication of a possible failure in executing the one or more processes, and
correlate the one or more memory access errors detected with one or more memory locations associated with the memory address space; and
an analysis utility that aggregates the correlated memory access errors to identify memory locations at which the one or more hardware memory errors are detected; and
an output that provides the identified memory locations as the information for input to the hardware memory error tolerant software system.