Patent ID: 11874693
Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 0:
1. A multifrequency clock divider circuit for generating, from a given frequency input clock signal, a programmable frequency output clock signal, the clock divider circuit comprising:
a first counter;
a second counter, alternating between an active state and an inactive state together with opposite states of the first counter to control delivery of the programmable frequency clock signal; and
wherein when the first counter is programmed to be transitioned from the inactive state to the active state, the second counter continues to maintain the active state and a previous frequency value of the output clock signal for a predetermined number of clock cycles before transitioning to the inactive state and handing control of the output clock signal to the first counter which assumes the active state.