Patent ID: 11869971
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 3:
4. The FeFET of claim 3, wherein:
the first polarization of the first end of the ferroelectric layer represents the first bit of the 2-bit storage device;
the second polarization of the second end of the ferroelectric layer represents the second bit of the 2-bit storage device;
when the first polarization of the first end of the ferroelectric layer and the second polarization of the second end of the ferroelectric layer correspondingly are in the first and second stable orientation states, the FeFET further represents the 2-bit storage device as storing:
for the first bit, a logical high value or a logical low value; and
for the second bit, the logical low value or the logical high value; and

when the first polarization of the first end of the ferroelectric layer and the second polarization of the second end of the ferroelectric layer correspondingly are in the second and first stable orientation states, the FeFET further represents the 2-bit storage device as storing:
for the first bit, the logical low value or the logical high value; and
for the second bit, the logical high value or the logical low value.