Patent ID: 11908731
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method comprising:
forming a dielectric layer over a substrate;
forming a first hard mask over the dielectric layer;
forming a second hard mask over the first hard mask;
etching the second hard mask to form a first opening in the second hard mask, wherein the first opening has a first width;
forming a third hard mask over the second hard mask and filling the first opening;
etching the third hard mask and the first hard mask to form a trench in the third hard mask and a second opening in the first hard mask, wherein the trench comprises a portion directly above the first opening, wherein the first opening is directly above the second opening, and wherein the trench has a second width that is less than the first width of the first opening, and the second opening has a third width that is smaller than or equal to the second width of the trench;
performing a first etching process on the dielectric layer to extend the trench and the second opening into the dielectric layer; and
forming a metal line and a via in the trench and the second opening, respectively.