Patent ID: 11901352
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 4:
5. The device structure of claim 1,
wherein the third active region comprises a first source/drain region, a second source/drain region, a third source/drain region, a first channel region disposed between the first source/drain region and the second source/drain region, a second channel region disposed between the second source/drain region and the third source/drain region,
wherein the fourth active region comprises a first source/drain region, a second source/drain region, a third source/drain region, a first channel region disposed between the first source/drain region and the second source/drain region, a second channel region disposed between the second source/drain region and the third source/drain region,
wherein the first active region comprises a channel region disposed between a first source/drain region and a second source/drain region.