Patent ID: 11972822
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A memory system comprising:
a cross-point memory array comprising a plurality of first conductive lines, a plurality of second conductive lines, and a plurality of non-volatile memory cells, each respective memory cell connected between one of the first conductive lines and one of the second conductive lines, wherein each memory cell comprises a magnetoresistive random access memory (MRAM) element and a threshold switching selector connected in series with the MRAM element;
a programmable error correction code (ECC) engine configured to decode a codeword while correcting up to a selectable number of bits in the codeword; and
a control circuit that:
reads a codeword from a group of the memory cells using a referenced read;
configures the programmable ECC engine to decode the codeword read with the referenced read while correcting up to “n” bits in the codeword;
returns decoded data in response to decoding the codeword read from the group using the referenced read passing;
reads the codeword from the group of the memory cells using a self-referenced read in response to the ECC engine failing to decode the codeword read from the group using the referenced read;
re-configures the programmable ECC engine to decode the codeword read with the self-referenced read while correcting up to “m” bits in the codeword, wherein m is greater than n; and
returns decoded data in response to decoding the codeword read from the group using the self-referenced read passing.