Patent ID: 11954056
Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 4:
5. A computer device, comprising:
at least one processor, and
a memory, wherein the memory stores a computer program capable of running on the processor; and following operations are implemented when the processor executes the program:
acquiring a partition mode of the server;
sending a corresponding first control signal and a corresponding second control signal to each computing node of the server according to the partition mode;
controlling a channel selection of a first switch on the corresponding computing node by the corresponding first control signal and controlling a channel selection of a second switch on the corresponding computing node by the corresponding second control signal;
transmitting PECI signals of the corresponding computing node through channels connected by the first switch and channels connected by the second switch,
determining the corresponding computing node that receivers the second control signal having a low level as a master node; and
determining the corresponding computing node that receives the second control signal having a high level as a slave node,
wherein controlling the channel selection of the second switch on the corresponding computing node by the corresponding second control signal further comprises;
controlling by the corresponding second control signal, the second switch on the master node to disconnect a first channel of the second switch on the master node from a second channel of the second switch on the master node and connect the first channel of the second switch on the master node with a third channel of the second switch of the master node;
controlling, by the corresponding second control signal, the second switch on the slave node to connect a first channel of the second switch on the slave node with a second channel of the second switch on the slave node and disconnect the first channel of the second switch on the slave node from a third channel of the second switch on the slave node.