Patent ID: 11923259
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A package structure, comprising:
a package substrate;
a plurality of semiconductor packages, disposed on the package substrate and laterally spaced apart from each other, at least one of the plurality of semiconductor packages comprises:
a die electrically bonded to an interposer that is disposed between the die and the package substrate; and
an encapsulant, disposed on the interposer to encapsulate the die;

a gap filling structure, disposed to fill a gap between the plurality of semiconductor packages;
an underfill material, disposed to fill spaces between the semiconductor packages and the package substrate and a space between the gap filling structure and the package substrate;
a thermal conductive laver, disposed on top surfaces of the semiconductor packages; and
a heat dissipation structure, disposed on the package substrate and attached to the semiconductor packages through the thermal conductive layer, wherein the heat dissipation structure comprises:
a support component disposed on the package substrate and laterally surrounds the semiconductor packages, wherein a part of the support component is disposed in the gap serving as the gap filling structure, and the part of the support component is attached to the package substrate through a portion of the underfill material therebetween; and
a lid, disposed on the support component and the thermal conductive laver.