Patent ID: 11870811
Assignee: VIRSEC SYSTEMS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC H

Claim 16:
17. A computer system comprising a processor and a memory with computer code instructions stored thereon, the memory operatively coupled to said processor such that the computer code instructions configure the processor to implement:
a detection engine configured to:
using one or more probes instrumented into a computer application, monitor a compute endpoint at runtime of the computer application for create, read, write, update, and delete (CRUD) operations being performed on the compute endpoint;
based on content of the CRUD operations, generate an event to analyze a given CRUD operation; and
responsive to the generated event, maintain one or more compute components affected by the given CRUD operation in a quarantine state; and

a callback processing engine configured to:
perform one or more actions to attempt to establish trust of the one or more affected compute components;

and
remove the one or more affected compute components from the quarantine state, if trust of the one or more affected compute components is established by the performing the one or more actions, or
execute at least one callback routine to mitigate results of the given CRUD operation, if trust of the one or more affected compute components is not established by the performing the one or more actions.