Patent ID: 11923206
Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A display device comprising:
a semiconductor layer comprising a channel formation region of a first transistor;
a first conductive layer;
a second conductive layer;
a first insulating layer between the first conductive layer and the semiconductor layer;
a second insulating layer between the second conductive layer and the semiconductor layer;
a third conductive layer provided in the same layer as the first conductive layer;
an oxide semiconductor layer comprising a channel formation region of a second transistor, the oxide semiconductor layer overlapping with the third conductive layer;
a fourth conductive layer configured to serve as one of a source electrode and a drain electrode of the second transistor;
a third insulating layer over the oxide semiconductor layer; and
a capacitor comprising a fifth conductive layer,
wherein the semiconductor layer, the first conductive layer, and the second conductive layer overlap with one another,
wherein the third insulating layer is not provided between the semiconductor layer and the second conductive layer,
wherein the third insulating layer comprises a region in contact with the oxide semiconductor layer in a region where the fourth conductive layer and the oxide semiconductor layer overlap each other, and
wherein the fifth conductive layer is in contact with the third insulating layer.