Patent ID: 11901425
Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A non-volatile memory device, comprising:
a substrate having an active region;
a device well in the active region;
a coupling well in the active region and adjacent to the device well;
a source region in the device well;
a drain region in the device well and the coupling well, and the drain region and the source region defined a channel region in the device well, wherein the drain region comprises a first drain diffusion region and a first drain lightly-doped diffusion region having a first width adjacent to the first drain diffusion region in the device well, and a second drain diffusion region and a second drain lightly-doped diffusion region adjacent to the second drain diffusion region having a second width in the coupling well, and the second width is wider than the first width; and
a floating gate over the source region and the drain region, the floating gate comprises:
a device section over the channel region;
a plurality of coupling sections entirely over the drain region in the coupling well; and
a connecting section over the device well and between the device section and the plurality of coupling sections.