Patent ID: 11893192
Assignee: SENSEL, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A method comprising: dividing, by a system comprising a processor, a first column electrode of a set of multiple column electrodes into a plurality of first column sub-electrodes and at least a second column electrode of the set of multiple column electrodes into a plurality of second column sub-electrodes; interleaving, by the system, first column sub-electrodes of the plurality of first column sub-electrodes with second column sub-electrodes of the plurality of second column sub-electrodes in a first direction, resulting in a first layer; interleaving, by the system, multiple row electrodes of a set of multiple row electrodes in a second direction, resulting in a second layer; overlapping, by the system, the first layer and the second layer orthogonally; facilitating, by the system, a bi-linear fall-off in sensitivity via a structure of the set of multiple column electrodes and the set of multiple row electrodes; dividing, by the system, a first row electrode of a group of multiple row electrodes into a plurality of first row sub-electrodes and at least a second row electrode of the group of multiple row electrodes into a plurality of second row sub-electrodes; and interleaving, by the system, first row sub-electrodes of the plurality of first row sub-electrodes with second row sub-electrodes of the plurality of second row sub-electrodes in the second direction.