Patent ID: 11914517
Assignee: ADVANCED MICRO DEVICES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 3:
4. A data processing system, comprising:
a host processor;
a memory coupled to the host processor;
a plurality of remote memory devices; and
a scalable data fabric coupled to the host processor and to the plurality of remote memory devices, wherein the scalable data fabric comprises:
hardware control logic operative to:
track a number of cache line accesses to a page of memory associated with one or more of the plurality of remote memory devices by updating a page probe filter entry field with data representing the tracked number of cache line accesses;
compare the data representing the tracked number of cache line accesses with a threshold indicating a number of cache line access counts signifying a spike in cache line accesses to a given page within a period of time; and
produce spike indication data that signifies the spike in cache line accesses to a given page of memory based on the data representing the tracked number of cache line accesses.