Patent ID: 11971829
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 5:
6. The non-volatile memory device of claim 1, wherein to read a page of hard bit data and corresponding soft bit data from the first plane, the control circuit is configured to:
perform a hard bit read operation at a read level configured to determine a hard bit value for each of one or more selected non-volatile memory cells of the page, the hard bit value indicating whether the memory cell is either reliably in a first data state or unreliability in a second data state; and
perform a soft bit read operation configured to generate a corresponding soft bit value indicating a reliability value for each of the selected memory cells determined to be in the second data state, but not for memory cells determined to be in the first data state.