Patent ID: 11869853
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. A semiconductor device, comprising:
a first substrate including a first chip area having a first pixel region;
a second substrate bonded to the first substrate at a bonding interface and including circuitry that processes signals from the first pixel region;
a plurality of guard structures disposed in the first and second substrates that protect the first chip area from at least one of chipping and cracking when the first chip area is separated from a second chip area, each of the plurality of guard structures including:
a first guard element disposed in a first surface of the first substrate that is opposite the bonding interface;
a second guard element disposed in a first surface of the second substrate that is opposite the bonding interface, and
a third guard element including a first bonding portion disposed in the first substrate at the bonding interface and spaced apart from the first guard element by a portion of the first substrate, and a second bonding portion disposed in the second substrate at the bonding interface and spaced apart from the second guard element by a portion of the second substrate; and

a slit between a scribe line and at least one of the plurality of guard structures, wherein the slit penetrates through the first surface of the first substrate and the first surface of the second substrate.