Patent ID: 11901183
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A method of forming a semiconductor device, the method comprising:
forming a gate structure over a fin;
forming source/drain regions over the fin on opposing sides of the gate structure;
forming a dielectric layer over the fin around the gate structure;
forming openings in the dielectric layer to expose the source/drain regions;
performing a plasma-enhanced chemical vapor deposition (PECVD) process, wherein an RF source of the PECVD process is turned on and off alternately to tune an average energy of plasmas of the PECVD process to be within a pre-determined range, wherein the PECVD process selectively forms silicide regions at bottoms of the openings on the source/drain regions;
forming a self-aligned barrier layer over the silicide regions by converting an upper layer of the silicide regions into a nitride or an oxide of the silicide regions; and
after the converting, filling the openings with an electrically conductive material.