Patent ID: 11871686
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 16:
17. An integrated circuit (IC) comprising a memory cell, wherein the memory cell comprises:
a first electrode;
a second electrode overlying the first electrode; and
a data storage layer having a first region with a threshold amount of crystalline damage and further having a second region without the threshold amount of crystalline damage;
wherein the first electrode, the second electrode, and the data storage layer are vertically stacked with the data storage layer between the first and second electrodes, wherein the first and second electrodes are configured to generate an electric field across the data storage layer with comparatively low and high electric field strengths respectively at the first and second regions, wherein a width of the second electrode is greater than a width of the first electrode, and wherein a width of the data storage layer is greater than the width of the first electrode and the width of the second electrode.