Patent ID: 11942166
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A nonvolatile memory device comprising:
a memory cell region including memory cells and first metal pads; and
a peripheral region comprising:
second metal pads;
a row decoder connected with the memory cells through word lines, and configured to apply a program voltage to a word line selected from the word lines in a program interval of each of program loops of a program operation and to apply verification voltages to the selected word line in a verify interval of each of the program loops;
a page buffer connected with the memory cells through bit lines, and configured to apply voltages to the bit lines in a bit line setup interval of each of the program loops of the program operation; and
control logic configured to control the row decoder and the page buffer in response to a program command such that the program operation is initiated,

wherein, in the program interval of each of the program loops, the row decoder increases a level of the program voltage applied to the selected word line as much as a first voltage,
wherein the control logic controls the row decoder and the page buffer to suspend the program operation in response to receiving a suspend command and to resume the suspended program operation in response to receiving a resume command from an external device,
wherein, in response to the resume command, the control logic is configured to set the level of the program voltage of the resumed program operation such that a difference between a level of the program voltage finally applied to the selected word line before the program operation is suspended and a level of the program voltage applied first to the selected word line after the suspended program operation is resumed corresponds to a second voltage different from the first voltage and the difference is based on a duration of the suspension,
wherein the peripheral region is vertically connected to the memory cell region by the first metal pads and the second metal pads.