Patent ID: 11901026
Assignee: NEUROBLADE LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A method for refreshing memory banks on a memory chip, the method comprising:
updating a state of at least one bit register by a sense amplifier configured to access one or more segments of a plurality of the memory banks on the memory chip,
the at least one bit register associated with one or more of the segments,
wherein a state of the at least one bit register is configured to be changed in response to the one or more segments being accessed;
accessing a data storage including the at least one bit register containing information indicative of access operations for one or more segments of a plurality of memory banks included on the memory chip; and
performing a refresh operation, with a refresh controller, of the one or more segments based, at least in part, on the stored information indicative of access operations;
wherein the refresh controller is configured to skip a refresh of the one or more segments based on the state of the at least one bit register.