Patent ID: 11925033
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A method comprising:
forming a transistor on a first substrate, comprising:
forming a columnar structure, which comprises a plurality of semiconductor layers and a plurality of spacer layers alternatingly stacked; and
replacing a bottommost spacer layer amongst the plurality of spacer layers with a protection layer;

forming a first interconnect structure electrically coupled to the transistor on a frontside of the transistor;
bonding the first substrate to a second substrate, such that the transistor and the first interconnect structure are between the first and second substrates;
performing an etch into the first substrate to remove the first substrate, wherein the etch stops on the protection layer;
depositing a dielectric layer on a backside of the transistor opposite the frontside of the transistor, such that the transistor and the first interconnect structure are between the second substrate and the dielectric layer;
patterning the dielectric layer to form an opening exposing a source or drain of the transistor;
forming a contact plug filling the opening;
forming a semiconductor device on the contact plug; and
forming a second interconnect structure electrically coupled to the semiconductor device on the backside of the transistor.