Patent ID: 11902410
Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method performed in a Phase Locked Loop, PLL, circuit for generating multiphase output signals comprising:
generating the multiphase output signals in a digitally controlled oscillator;
sampling the multiphase output signals from the digital controlled oscillator at a sampling frequency in a sample circuit;
converting the sampled multiphase output signals to digital samples in an analog to digital converter;
estimating a phase of the multiphase output signals from the digital samples in a phase estimator;
calculating a phase difference between a current phase and a previous phase in a differentiator;
accumulating the phase differences generated by the differentiator in an accumulator;
generating a control signal to the digitally controlled oscillator in a loop filter receiving an output from the accumulator; and
adjusting frequency of the digitally controlled oscillator generating the multiphase output signals.