Patent ID: 11949780
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A gateway node comprising:
network communicator circuitry to:
send a first secret key portion of a multi-part secret key to a first secret holder node; and
send first and second secret shares to corresponding ones of second and third secret holder nodes;

memory;
instructions; and
processor circuitry to execute the instructions to:
generate the first secret share based on a second secret key portion of the multi-part secret key and based on existence of the second secret holder node;
generate the second secret share based on the second secret key portion of the multi-part secret key and based on existence of the third secret holder node, the first secret share different from the second secret share;
receive a plurality of partly decrypted authentication messages generated by fourth secret holder nodes; and
combine the partly decrypted authentication messages and responses from the first secret holder node and at least one of the second secret holder node or the third secret holder node to generate a combined authentication message, the network communicator circuitry to send the combined authentication message to a terminal node for authentication.