Patent ID: 11862273
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. The nonvolatile memory device of claim 4, wherein the control circuit is configured to:
program data including bit values of all 0 in the information block;
determine memory cells outputting the bit value of 1 as having the 1-error by applying a first test read voltage to a first word-line of the information block among the word-lines, the first test read voltage having a level smaller than threshold voltages of programmed memory cells in the information block; and
determine memory cells outputting the bit value of 0 as having the 0-error by applying a second test read voltage to the first word-line of the information block, the second test read voltage having a level greater than the threshold voltages of the programmed memory cells in the information block.