Patent ID: 11940491
Assignee: APPLE INC.
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 8:
9. A system comprising:
a first integrated circuit included in a particular chip package, and having a first test circuit, a first set of transmit pins, a first set of receive pins, and a particular set of switch circuits; and
a second integrated circuit included in the particular chip package, and having a second test circuit, a second set of transmit pins that are coupled to respective ones of the first set of receive pins, and a second set of receive pins that are coupled to respective ones of the first set of transmit pins;
wherein the second integrated circuit is configured to send, to the first integrated circuit via the second set of transmit pins, an indication to enter a particular test mode;
wherein the first integrated circuit is configured to:
in response to the indication, enable a first subset of the particular set of switch circuits, wherein the first subset of switch circuits couples a first subset of the first set of receive pins to a first subset of the first set of transmit pins, and wherein the first subset of switch circuits is selected based on the particular test mode; and
receive, via the first subset of receive pins, a particular test packet from the second integrated circuit; and
route the particular test packet to the first subset of transmit pins, bypassing the first test circuit; and

wherein the second integrated circuit is further configured to receive, via a second subset of the second set of receive pins, a routed version of the particular test packet.