Patent ID: 11860703
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method comprising:
determining one or more vulnerable instructions in workload code;
determining one or more additional instructions to be inserted in the workload code based at least in part on a power model of a system bus of a processor;
when a power model of a processor is dependent on an order of instructions of workload code, inserting the one or more additional instructions with dependency to the workload code which, when executed by the processor, produces complementary power consumption of the system bus to power consumption of the system bus from executing the one or more vulnerable instructions; and
when the power model is not dependent on the order of instructions of workload code, inserting the one or more additional instructions without dependency to the workload code which, when executed by the processor, produces complementary power consumption of the system bus to power consumption of the system bus from executing the one or more vulnerable instructions.