Patent ID: 11972951
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A method, comprising:
forming a source/drain (S/D) region on a substrate; forming a gate structure on the substrate;
forming a first metal layer with a first portion on the S/D region and a second portion on the gate structure using a first hydrogen gas flow rate;
performing a silicidation process on the first portion to form a silicide layer;
forming a second metal layer on the silicide layer using a second hydrogen gas flow rate that is lower than the first hydrogen gas flow rate; and
performing a nitridation process on the second portion of the first metal layer and the second metal layer to form a nitride layer, wherein sidewalls of the S/D region. the silicide layer, and the nitride layer are aligned with respect to each other.