Patent ID: 11894437
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A structure, comprising:
a substrate with gate structures and source/drain (S/D) structures disposed thereon;
first conductive structures extending through a first dielectric layer and disposed on the S/D structures;
second conductive structures extending through a first dielectric layer and a second dielectric layer and on the gate structures; and
a third conductive structure on a first conductive structure of the first conductive structures, wherein each of the first conductive structures, the second conductive structures, and the third conductive structure comprises:
a ruthenium liner in contact with one or more of the first dielectric layer and the second dielectric layer; and
a cobalt metal in contact with the ruthenium liner.