Patent ID: 11900240
Assignee: STMICROELECTRONICS S.R.L.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 15:
16. A system, comprising:
neural network accelerator circuitry; and
closed-loop clock-rate control circuitry coupled to the neural network accelerator circuitry, and which, in operation, generates a clock signal of the neural network accelerator circuitry, the closed-loop clock-rate control circuitry including:
control-word generation circuitry, which, in operation, generates a clock frequency control word based on information indicative of a current frame execution rate of a processing task of the neural network accelerator circuitry and a reference clock signal; and
a clock generator coupled to the control word generation circuitry and which, in operation, generates the clock signal of neural network accelerator circuitry based on the clock frequency control word.