Patent ID: 11960163
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Optics (Instruments)
Classification: CPC G | IPC G

Claim 8:
9. The display module according to claim 7, wherein the plurality of dimming units and the plurality of redundant dimming units are arranged side by side in a second direction to form a plurality of first dimming unit groups, the dimming units and the redundant dimming units in each of the plurality of first dimming unit groups are arranged in a first direction; the plurality of dimming units and the plurality of redundant dimming units are arranged side by side in a first direction to form a plurality of second dimming unit groups, and the dimming units and the redundant dimming units in each of the plurality of second dimming unit groups are arranged in the second direction; gates of the first thin film transistors of the dimming units and the redundant dimming units in a same first dimming unit group are connected to a same first gate line; the dimming units and the redundant dimming units in a same second dimming unit group are provided with data voltages through two first data lines, and sources of two adjacent first thin film transistors are connected to the two first data lines, respectively;
the first substrate further comprises:
a first transparent conductive layer on a side of the first base substrate close to the first liquid crystal layer, wherein the first transparent conductive layer comprises the dimming electrode; the dimming electrode comprises a plurality of first openings arranged side by side in the second direction, and each of the plurality of first openings extends in the first direction;
a first metal conductive layer on a side of the first base substrate close to the first liquid crystal layer, wherein the first metal conductive layer comprises a plurality of first gate lines arranged side by side in the second direction, the gates of the first thin film transistors and the first common electrode line, each of the plurality of first gate lines extends in the first direction, and each of an orthographic projection of each of the plurality of first gate lines on the first base substrate and an orthographic projection of the gate of the first thin film transistor on the first base substrate is within an orthographic projection of one of the plurality of first openings on the first base substrate;
a first gate insulating layer on a side of the first metal conductive layer away from the first base substrate;
an active semiconductor layer on a side of the first gate insulating layer away from the first metal conductive layer, wherein the active semiconductor layer comprises an active layer of the respective first thin film transistor;
a second metal conductive layer on a side of the active semiconductor layer away from the first gate insulating layer, wherein the second metal conductive layer comprises a plurality of first data lines arranged side by side in the first direction, and a source and a drain of the respective first thin film transistor, and the source and the drain of the respective first thin film transistor are connected to the active layer; and each of the plurality of first data lines extends in the second direction;
a first interlayer insulating layer on a side of the second metal conductive layer away from the first interlayer insulating layer, wherein the first substrate further comprises a first connecting via, a second connecting via and a third connecting via, wherein the first connecting via and the second connecting via each penetrate the first interlayer insulating layer and the first gate insulating layer, and the third connecting via penetrates the first interlayer insulating layer; and
a second transparent conductive layer on a side of the first interlayer insulating layer away from the second metal conductive layer, wherein the second transparent conductive layer comprises the first common electrodes of a respective dimming unit and a respective redundant dimming unit, and a first connecting electrode; the first connecting electrode electrically connects the drain of the first thin film transistor and the dimming electrode together through the first connecting via and the third connecting via; and the first common electrode is electrically connected to the first common electrode line through the second connecting via.