Patent ID: 11868660
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method comprising:
identifying, by a processing device, a set of submission queues associated with a host system, wherein each submission queue of the set of submission queues stores one or more memory access command directed to a memory device;
generating, based on the set of submission queues, a first set of internal queues and a second set of internal queues;
responsive to fetching a first memory access command pending in a submission queue of the set of submission queues, populating a first internal queue of the first set of internal queues;
responsive to processing the first memory access command from the first internal queue, populating a second internal queue of the second set of internal queues; and
responsive to processing the first memory access command from the second internal queue, returning to the host system an indication of completion of the first memory access command.