Patent ID: 11934334
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The method according to claim 5, further comprising:
at the selected first CCI port:
receiving the first PCIe transaction;
sending the first PCIe transaction to a respective first CCI port of the CHI of the second chip;

at the selected second CCI port:
receiving the second PCIe transaction;
sending the second PCIe transaction to a respective second CCI port of the CHI of the second chip;

at the respective first CCI port of the CHI of the second chip:
receiving the first PCIe transaction;
sending the first PCIe transaction to a first home node of the CHI of the second chip;

at the respective second CCI port of the CHI of the second chip:
receiving the second PCIe transaction; and
sending the second PCIe transaction to the first home node or a second home node of the CHI of the second chip.