Patent ID: 11903330
Assignee: NEW YORK UNIVERSITY
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 6:
7. A device, comprising:
a substrate;
a two-dimensional electron gas layer comprising a two-dimensional electron gas, the two-dimensional electron gas layer disposed on the substrate;
a first superconducting electrode and a second superconducting electrode disposed on the two-dimensional electron gas layer and separated by the two-dimensional electron gas;
a first confinement gate disposed on the first superconducting electrode and the two-dimensional electron gas layer;
a second confinement gate disposed on the second superconducting electrode and the two-dimensional electron gas layer;
a first set of tuning gates disposed on a weak link region between the first superconducting electrode and the second superconducting electrode; and
a second set of tuning gates disposed on the weak link region and the second set of tuning gates.