Patent ID: 11914887
Assignee: MACRONIX INTERNATIONAL CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. The storage device according to claim 7, wherein each cell of the plurality of multi-level cells is configured to store four bits of data, the four bits of data are (1 1 1 1)2, (1 1 1 0)2, (1 1 0 0)2, (1 0 0 0)2, (1 0 1 0)2, (1 0 1 1)2, (1 0 0 1)2, (1 1 0 1)2, (0 1 0 1)2, (0 0 0 1)2, (0 0 0 0)2, (0 0 1 0)2, (0 0 1 1)2, (0 1 1 1)2, (0 1 1 0)2 or (0 1 0 0)2 respectively corresponding to a plurality of threshold voltage distributions Vt(1,1,1,1), Vt(1,1,1,0), Vt(1,1,0,0), Vt(1,0,0,0), Vt(1,0,1,0), Vt(1,0,1,1), Vt(1,0,0,1), Vt(1,1,0,1), Vt(0,1,0,1), Vt(0,0,0,1), Vt(0,0,0,0), Vt(0,0,1,0), Vt(0,0,1,1), Vt(0,1,1,1), Vt(0,1,1,0) and Vt(0,1,0,0), and the threshold voltage distributions Vt(1,1,1,1), Vt(1,1,1,0), Vt(1,1,0,0), Vt(1,0,0,0), Vt(1,0,1,0), Vt(1,0,1,1), Vt(1,0,0,1), Vt(1,1,0,1), Vt(0,1,0,1), Vt(0,0,0,1), Vt(0,0,0,0), Vt(0,0,1,0), Vt(0,0,1,1), Vt(0,1,1,1), Vt(0,1,1,0) and Vt(0,1,0,0) are arranged in an order from low voltage to high voltage.