Patent ID: 11973113
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A semiconductor device, comprising:
a first transistor comprising:
a first substrate having a first lower portion and a first upper portion on the first lower portion;
a first isolation region disposed on the first lower portion of the first substrate and surrounding the first upper portion of the first substrate in a closed path;
a first gate structure disposed on and across the first upper portion of the first substrate;
first source and/or drain (S/D) regions disposed in the first upper portion of the first substrate at opposite sides of the first gate structure; and
a first channel region disposed below the first gate structure and abutting between the first S/D regions;

a second transistor comprising:
a second substrate having a second lower portion and a second upper portion on the second lower portion;
a second isolation region disposed on the second lower portion of the second substrate and surrounding the second upper portion of the second substrate in a closed path;
a second gate structure disposed on and across the second upper portion of the second substrate;
second source and/or drain (S/D) regions disposed in the second upper portion of the second substrate at opposite sides of the second gate structure; and
a second channel region disposed below the second gate structure and abutting between the second S/D regions,

wherein a first width of the first upper portion of the first substrate is less than a second width of the second upper portion of the second substrate.