Patent ID: 11935888
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 14:
15. An integrated circuit, comprising
a substrate;
an N-well in the substrate;
a first cell in the N-well having a first cell active area with a first gate electrode extending along a first longitudinal axis, a first source region, and a first drain region;
a second cell in the substrate having a second cell active area with a second gate electrode extending along a second longitudinal axis, a second source region, and a second drain region, wherein the first cell abuts the second cell along an abutment region, the abutment region extending along a third longitudinal axis parallel to the first and second longitudinal axes, and the N-well abuts the substrate at the abutment region; and
a first gate poly structure having a fourth longitudinal axis extending over the abutment region and portions of the first source region and the second source region, wherein the fourth longitudinal axis is parallel to the first and second longitudinal axes.