Patent ID: 11922048
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory controller for controlling a memory device which stores logical-to-physical (L2P) segments, the memory controller comprising:
a map data storage configured to store a plurality of physical-to-logical (P2L) segments, each including mapping information between a physical address of the memory device in which write data is to be stored and a logical address received from a host, in response to a request received from the host; and
a map manager configured to set each of the plurality of P2L segments as a data segment or an unmap segment according to a corresponding request, and update the L2P segments stored in the memory device, based on target P2L segments that are P2L segments set as the data segment among the plurality of P2L segments,
wherein each of the L2P segments includes mapping information between a logical address and a physical address of data stored in the memory device,
wherein the map data storage includes a first map storage configured to include a plurality of entry areas having a circular structure, and sequentially store the plurality of P2L segments according to indices of the plurality of entry areas in an input order, and
wherein the map manager deletes the target P2L segments and unmap P2L segments corresponding to the target P2L segments from the first map storage and rearranges indices of target entry areas in which remaining P2L segments are stored by increasing a ranking of the indices of the target entry areas.