Patent ID: 11971823
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 24:
25. A computing device, the device comprising:
a loader;
a plurality of senders;
a buffer controller; and
a plurality of reuse buffers,
wherein the plurality of reuse buffers comprises a first reuse buffer and a second reuse buffer,
the loader is configured to load input data of an input feature map stored in a memory in loading units according to a loading order,
the buffer controller is configured to allocate an address of the first reuse buffer or the second reuse buffer rotationally to the loaded input data according to the loading order, and store the loaded input data in the allocated address,
each of the plurality of senders is configured to transmit, to an executer, respective input data corresponding to output data of respective convolution operations among input data stored in the first reuse buffer or the second reuse buffer, and
portions of the transmitted respective input data overlap, and
wherein the loader is configured to load remaining input data, other than input data overlapping input data loaded in a previous clock, among input data corresponding to output data on which a convolution operation is to be performed.