Patent ID: 11971823
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 28:
29. A computing device, the device comprising:
a memory;
a fetcher;
a buffer controller;
an executer; and
a storage,
wherein the fetcher comprises:
a loader;
a plurality of senders; and
a reuse buffer, the loader is configured to load input data of an input feature map stored in the memory in loading units according to a loading order,
the buffer controller is configured to allocate an address of the reuse buffer to the loaded input data rotationally according to the loading order and store the loaded input data in the allocated address,
each of the plurality of senders is configured to transmit, to the executer, respective input data corresponding to each output data of respective convolution operations among the input data stored in the reuse buffer, and
portions of transmitted respective input data overlap,
wherein the loader is configured to load remaining input data, other than input data overlapping input data loaded in a previous clock, among input data corresponding to output data on which a convolution operation is to be performed.