Patent ID: 11882687
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A semiconductor device comprising:
an active pattern on a substrate;
a gate structure in an upper portion of the active pattern;
a bit line structure on the active pattern, the bit line structure including a doped polysilicon pattern, a metal pattern, and a capping pattern, the doped polysilicon pattern, the metal pattern, and the capping pattern sequentially stacked;
a spacer structure including a first spacer containing a nitride, an air spacer containing air, and a third spacer containing a nitride, the first spacer, the air spacer, and the third spacer sequentially stacked from a sidewall of the bit line structure in a horizontal direction parallel to an upper surface of the substrate;
a contact plug structure on the active pattern, the contact plug structure contacting the spacer structure;
an insulating interlayer structure partially penetrating through upper portions of the contact plug structure, the spacer structure and the bit line structure; and
a capacitor on the contact plug structure,
wherein,
the insulating interlayer structure includes,
a first insulating interlayer including a first insulation material,
a second insulating interlayer on the first insulating interlayer, the second insulating interlayer including a second insulation material different from materials included in the first insulation material, and
a third insulating interlayer on the second insulating interlayer, the third insulating interlayer including a third insulation material,

a lower surface of the second insulating interlayer covers a top of the air spacer, and
a lowermost surface of the first insulating interlayer is higher than a lowermost surface of the second insulating interlayer.