Patent ID: 11888494
Assignee: NUVOTON TECHNOLOGY CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 1:
2. A semiconductor circuit including a data converter that outputs a digital output signal corresponding to a measured signal, the semiconductor circuit comprising:
an analog circuit that quantizes the measured signal inputted; and
a digital circuit that outputs the digital output signal,
wherein the analog circuit includes:
a correction element group including one or more correction elements each for correcting nonlinearity that occurs during a process of converting the measured signal into the digital output signal in the analog circuit; and
a test element group including one or more test elements for testing the one or more correction elements,

the digital circuit tests the correction element group using the test element group,
the digital circuit includes:
a self-diagnostic code generation circuit that generates a self-diagnostic code for (i) enabling or disabling each of the one or more correction elements included in the correction element group and (ii) enabling or disabling each of the one or more test elements included in the test element group;
an error detection circuit that detects, as an error signal, a difference between a quantizer output signal of the analog circuit and a predetermined threshold value, the quantizer output signal being outputted in response to the self-diagnostic code; and
a self-diagnostic circuit that generates a self-diagnostic signal indicating a diagnostic result of the correction element group, based on the error signal,

the self-diagnostic code includes a first fixed code, a second fixed code, and an optimum code,
the one or more correction elements are three or more correction elements,
the first fixed code is for (i) enabling a single correction element selected as a test target from the correction element group and (ii) disabling other correction elements included in the correction element group and the one or more test elements,
the optimum code is for minimizing the error signal relative to the first fixed code and is generated by binary search,
the measured signal is a differential signal including a first polarity signal and a second polarity signal,
the correction element group includes a first element group connected to a transmission path for the first polarity signal, and a second element group connected to a transmission path for the second polarity signal,
the first fixed code corresponds to the first element group and is for disabling the second element group,
the second fixed code is for (i) disabling a single correction element selected as a test target from the first element group, (ii) enabling, among other correction elements included in the first element group, a correction element having a weight smaller than a weight of the single correction element selected, and (iii) enabling the one or more test elements,
the optimum code corresponds to the second element group and is for disabling the first element group, and
the self-diagnostic circuit:
calculates a first integrated value by integrating the error signal corresponding to a combination of the first fixed code and the optimum code;
calculates a second integrated value by integrating the error signal corresponding to a combination of the second fixed code and the optimum code; and
determines a magnitude relationship between the first integrated value and the second integrated value, and determines the single correction element selected as the test target as being faulty when the magnitude relationship fails to satisfy a predetermined condition.