Patent ID: 11868661
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method, comprising:
counting, for sub-addresses in a plurality of row address segments using counters corresponding to the sub-addresses respectively, activation commands applied to row addresses containing the sub-addresses in accessing rows of memory cells in a memory device;
increasing, in response to an activation command applied to a row address having first sub-addresses in the plurality of row address segments respectively, counts stored in a portion of the counters corresponding to the first sub-addresses;
determining, for each respective segment in the plurality of row address segments, whether at least one first sub-address in the respective segment have been applied a count of activation commands that is more than a threshold according to a counter corresponding to the first sub-address among the counters;
determining whether each of the plurality of row address segments has at least one sub-address having been applied more activation commands than the threshold; and
generating an alert in response to a determination that each of the plurality of row address segments has at least one sub-address having been applied more activation commands than the threshold.