Patent ID: 11922064
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 12:
13. The storage device of claim 11, wherein the second data input/output component further includes:
a first demultiplexer configured to provide the training data, which is output from the first data input/output component, under a control of the third shift register controller;
a third multiplexer configured to provide the training data, which is provided from the first demultiplexer, to a selected third storage register among the plurality of third storage registers under the control of the third shift register controller;
a second demultiplexer configured to provide the training data, which is output from the first data input/output component, under a control of the fourth shift register controller; and
a fourth multiplexer configured to provide the training data, which is provided from the second demultiplexer, to a selected fourth storage register among the plurality of fourth storage registers under the control of the fourth shift register controller.