Patent ID: 11935621
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 13:
14. The calibration method of claim 13, wherein the controlling, with the logical unit, the differential input circuit according to the output result of the comparison unit comprises:
the logical unit comprising a counter, a first register group and a second register group;
when the flipping identification signal is at a low level, the counter counting from U to V, when the value of the counter is U, the duty cycle corresponding to the first internal signal being X%, when the value of the counter is V, the duty cycle corresponding to the first internal signal being Y%, and when the output result of the comparison unit is changed from the low level to the high level, the counter value corresponding to the counter at this time being stored in the first register group;
when the flipping identification signal is at a high level, the counter counting from U to V, when the value of the counter is U, the duty cycle corresponding to the second internal signal being Y%, when the value of the counter is V, the duty cycle corresponding to the second oscillation signal being X%, when the output result of the comparison unit is changed from the high level to the low level, the counter value corresponding to the counter at this time being stored in the second register group;
wherein both the U and V are integers, the U is less than V, both the X and Y are positive integers, the X is less than 50, and the Y is greater than 50.