Patent ID: 11901891
Assignee: KEPLER COMPUTING INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 13:
14. The apparatus of claim 11, wherein the gate comprises:
a first capacitor having a first terminal coupled to the first input, and a second terminal coupled to a summing node;
a second capacitor having a third terminal coupled to the second input, and a fourth terminal coupled to the summing node;
a third capacitor having a fifth terminal coupled to the third input, and a sixth terminal coupled to the summing node;
a fourth capacitor having a seventh terminal coupled to the fourth input and the fifth input, and an eighth terminal coupled to the summing node;
a fifth capacitor having a ninth terminal coupled to the fourth input and the fifth input, and a tenth terminal coupled to the summing node, wherein the first capacitor, the second capacitor, the third capacitor, the fourth capacitor, and the fifth capacitor are part of the plurality of capacitors;
a pull-up device coupled to the summing node and a supply rail, wherein the pull-up device is controllable by a first control; and
a pull-down device coupled to the summing node and a ground rail, wherein the pull-down device is controllable by a second control.