Patent ID: 11967907
Assignee: ZHEJIANG UNIVERSITY
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A space vector pulse width modulation (SVPWM) method for an any level cascaded H-bridge inverter, the method comprising:
1) Voltage vectors generated by the cascaded H-bridge inverter used to synthesize a multilevel space vector diagram in a Cartesian coordinates, in which multiple triangles are formed by connecting the adjacent voltage vectors, and a reference vector is located in the multilevel space vector diagram; wherein: the method also includes the following steps:
2) The multilevel space vector diagram in the Cartesian coordinates is divided into two types of rectangles, and determines in which type of the rectangles that the reference vector is located in:
4n+1 horizontal dashed lines are added at equal intervals along the direction of a horizontal axis, wherein the horizontal dashed lines are parallel to the direction of a α-axis and the middle horizontal dashed line coincides with a horizontal axis, and a distance between the horizontal dashed lines, which are adjacent to each other, is √{square root over (3)}/2 times of a unit length; and 8n−1 vertical dashed lines are added at equal intervals along the direction of the vertical axis, wherein the vertical dashed lines are parallel to the direction of a β-axis and the middle vertical dashed line coincides with the vertical axis, and a distance between the vertical dashed lines, which are adjacent to each other, is 0.5 times of the unit length; where, n is a number of H-bridge cells in each phase; and the unit length is a distance from an origin to a coordinates (1,0) or a coordinates (0,1) in the Cartesian coordinates; and
the multilevel space vector diagram is divided into the several rectangles by the horizontal dashed lines and the vertical dashed lines, wherein there are two of the voltage vectors at a vertex of each of the rectangles and the line between these two of the voltage vectors forms a diagonal of the rectangle, and the rectangles are divided into the two types of the rectangles according to the different diagonals of the rectangles: the rectangle is regarded as a type A rectangle when the angle between the diagonal and the α-axis is 60 degrees; the rectangle is regarded as a type B rectangle when the angle between the diagonal and the α-axis is 120 degrees; and then, judges the reference vector is located in the type A rectangle or the type B rectangle according to a boundary of the rectangles;
3) The rectangles are further divided according to the diagonals, an area above a diagonal of the rectangle is regarded as a type I area, and an area below a diagonal of the rectangle is regarded as a type II area, then, judges whether the reference vector is located in the type I area or the type II area, and according to the types of the rectangles and the types of the areas, the position of the reference vector is divided into four types of areas: AI, AIL BI and BII;
4) The coordinates of the nearest three vectors (NTVs) in the Cartesian coordinates are obtained according to the position of the reference vector, and switching states of the cascaded H-bridge inverter are obtained by selecting a zero-sequence component and conducting a coordinate transformation;
5) The reference vector is decomposed into an active vector and an additional vector, and duty cycles of the NTVs are obtained according to the additional vector;
6) the desired reference vector is synthesized by the switching states of the cascaded H-bridge inverter and the duty cycles of the NTVs, and the multilevel SVPWM is realized by using the synthesized reference vector.