Patent ID: 11921906
Assignee: SECTURION SYSTEMS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A system comprising:
a plurality of cryptographic modules each configured to process packets and provide a flag when ready to process new packets, wherein the packet processing includes encrypting a packet based on a security key associated with the packet, and wherein each of the plurality of cryptographic modules comprises:
a first systolic-matrix array;
a memory for storing data generated during the packet processing; and
a second systolic-matrix array coupled between the first systolic-matrix array and the memory; and

a first interface coupled to the plurality of cryptographic modules and configured to receive an incoming packet, associate a first security key with the incoming packet, select a flagged one of the plurality of cryptographic modules, and route the incoming packet to the selected cryptographic module.