Patent ID: 11901352
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A device structure, comprising:
a substrate comprising an n-well disposed between a first p-well and a second p-well along a first direction;
a first active region and a second active region disposed over the n-well and extending along a second direction perpendicular to the first direction;
a third active region and a fourth active region disposed over the first p-well and extending along the second direction;
a fifth active region and a sixth active region disposed over the second p-well and extending along the second direction;
a first gate structure extending along the first direction to wrap over the third active region, the fourth active region, and the first active region; and
a second gate structure extending along the first direction to wrap over the second active region, the fifth active region, and the sixth active region.