Patent ID: 11928412
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 1:
2. The design method of claim 1, wherein establishing the parasitic resistance equivalent test structure of the group of preset capacitor units in the same arrangement direction comprises:
establishing conductive wires coupled to lower electrodes of the preset capacitor units;
establishing a conductive layer, the preset capacitor units being disposed in the conductive layer and the conductive layer coupling upper electrodes of the group of preset capacitor units in the same arrangement direction in series to each other; and
obtaining, based on the conductive wires and the conductive layer, the parasitic resistance equivalent test structure by using the conductive wires of the preset capacitor units in the group of preset capacitor units as end points respectively.