Patent ID: 11940939
Assignee: QUALCOMM INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 20:
21. A system for data communication over a data bus having a plurality of data bit groups, each data bit group having a plurality of data bit lanes, the system comprising:
comparing logic configured to receive a first data word having selected data values over the data bit lanes, to receive the code separately from the data bit lanes over code bit lanes, to compare the code with each data value in each data bit group, to determine each data bit group having a data value matching the code, and to determine each data bit group having a data value not matching the code;
processing logic configured to generate a byte enable vector from the code and first data word comprising indications of selected data bit groups based on determinations of data bit groups having data values matching the code and indications of non-selected data bit groups based on determinations of data bit groups having data values not matching the code; and
processing logic configured to reconstruct a second data word based on the byte enable vector.