Patent ID: 11966786
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 0:
1. A computer system for managing energy consumption of one or more processor cores in a multicore processing device comprising:
a power state general purpose engine (PGPE) operably coupled to the one or more processor cores, the PGPE is configured to:
establish a temporal interval; and
establish a plurality of temporal periods within the temporal interval;

a hardware-based control loop operably coupled to the one or more processor cores and the PGPE, the hardware-based control loop is configured to:
determine, for the temporal interval, an interval energy target for the at least one processor core of the one or more processor cores;
determine, for a first temporal period of the plurality of temporal periods, a period energy target for the at least one processor core of the one or more processor cores;
determine, for the first temporal period of the plurality of temporal periods, a processor core throttling state for the at least one processor core of the one or more processor cores;
adjust, at a beginning of each successive temporal period of the plurality of temporal periods, the respective period energy target and the respective processor core throttling state; and
converge, subject to the adjustment, as each respective temporal period of the plurality of temporal periods is concluded, a total period energy consumption of the at least one processor core of the one or more processor cores with the interval energy target.