Patent ID: 11948844
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 19:
20. A semiconductor device, comprising:
a device isolation layer between a first active region and a second active region of a substrate, the first active region spaced apart from the second active region in a first direction;
a first active fin on the first active region and a second active fin on the second active region, the first active fin and the second active fin protruding in a vertical direction from a top surface of the substrate;
a plurality of first active patterns on a top surface of the first active fin and spaced apart from each other in a direction perpendicular to the substrate;
a plurality of second active patterns on a top surface of the second active fin and spaced apart from each other in the direction perpendicular to the substrate;
a first electrode pattern between ones of the plurality of first active patterns and between a lowest one of the first active patterns and the first active fin; and
a second electrode pattern between ones of the plurality of second active patterns and between a lowest one of the second active patterns and the second active fin,
wherein the first electrode pattern extends in the first direction,
wherein the second electrode pattern extends on the device isolation layer and has an end adjacent to the first active region of the substrate,
wherein a sidewall of the end of the second electrode pattern has an angle relative to a top surface of the substrate,
wherein the angle relative to the top surface of the substrate ranges from 91° to 100° and a top surface of the second electrode pattern extends further in a direction away from the second active fin than a bottom surface of the second electrode pattern, and the end of the second electrode pattern adjacent to the first active region of the substrate has a continuous slope,
wherein a distance between a top of the first electrode pattern from a bottom of the first electrode pattern on an uppermost one of the first active patterns is a first distance,
wherein a distance between the top of the first electrode pattern from the bottom of the first electrode pattern on an uppermost one of the second active patterns is a second distance,
wherein the first distance is greater than the second distance; and
wherein a distance between the top of the first electrode pattern and the bottom of the first electrode pattern in a region between the first and second active patterns is greater than a distance between the uppermost one of the second active patterns and the device isolation layer.