Patent ID: 11934537
Assignee: INTEGRITY SECURITY SERVICES LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. The non-transitory computer-readable medium of claim 18, wherein when the second processing device executes the second instructions, the second instructions cause the second processing device to perform second operations comprising:
receiving, from the first processing device, the validation request;
generating, in response to the receiving of the validation request, a second set of random numbers using the random number seed according to the algorithm corresponding to the first algorithm identifier, a quantity of the random numbers in the generated second set of random numbers being equal to the number of random numbers to generate;
mapping, based on the mapping model, the generated second set of random numbers to a set of memory blocks of the second processing device, the set of mapped memory blocks of the second processing device each including a second computer instruction or second data indicating a running state of the second processing device;
concatenating contents of the set of mapped memory blocks of the second processing device to the nonce;
calculating the second hash of the contents of the set of mapped memory blocks of the second processing device concatenated to the nonce; and
sending, to the first processing device, the second hash.