Patent ID: 11914973
Assignee: APPLE INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 4:
5. A method, comprising:
generating, by first and second multiplier circuits of a plurality of multiplier circuits, first and second voltage levels, respectively, on first and second global bit lines, wherein generating the first and second voltage levels comprises:
retrieving, from a memory array, a corresponding plurality of weights indicative of a corresponding first operand;
pre-charging, by a corresponding one of the plurality of multiplier circuits, a corresponding one of the first and second global bit lines, wherein a given multiplier circuit of the plurality of multiplier circuits includes a plurality of capacitors coupled to the corresponding one of the first and second global bit lines, and a corresponding plurality of devices coupled between corresponding capacitors of the plurality of capacitors and an activation signal of a plurality of activation signals indicative of a corresponding second operand;
coupling, by the corresponding plurality of devices, a corresponding subset of the plurality of capacitors to the activation signal based on corresponding bits included in a particular weight of the plurality of weights; and
modifying, by the corresponding subset of the plurality of capacitors in response to a transition of the activation signal, an amount of charge stored on the corresponding global bit line to change a voltage level of the corresponding global bit line; and
converting, by a corresponding analog-to-digital converter circuit, the voltage level of the global bit line to a corresponding plurality of bits whose value is indicative of a product of the corresponding first operand and the corresponding second operand;

generating a composite voltage value based on the first voltage level on the first global bit line and the second voltage level on the second global bit line to an input of the analog-to-digital converter circuit; and
generating a sum based on the composite voltage value.