Patent ID: 11973144
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A method of manufacturing a semiconductor device, the method comprising:
forming a first fin structure and a second fin structure over a substrate, each of the first and second fin structures including a bottom fin layer, one or more body layers and epitaxial growth enhancement layers made of different material than the one or more body layers, one of the epitaxial growth enhancement layers being a top layer of the fin structure;
forming an isolation insulating layer over the substrate so that upper portions of the first and second fin structure protrudes from the isolation insulating layer;
forming a sacrificial gate structure over channel regions of the first and second fin structures;
forming gate sidewall spacers on opposing side faces of the sacrificial gate structure;
forming a first source/drain space by recessing a source/drain region of the first fin structure below an upper surface of the isolation insulating layer and a second source/drain space by recessing a source/drain region of the second fin structure below the upper surface of the isolation insulating layer such that at least one of the epitaxial growth enhancement layers of the first and second fin structures is exposed in the first and second source/drain spaces below the upper surface of the isolation insulating layer, respectively;
forming a first source/drain epitaxial layer in the first source/drain space and a second source/drain epitaxial layer in the second source/drain space;
forming a dielectric layer over the first and second source/drain epitaxial layers;
forming a gate space by removing the sacrificial gate structure in which the upper portions of the first and second fin structures are exposed; and
forming a gate dielectric layer and a gate electrode layer in the gate space,
wherein:
each of the epitaxial growth enhancement layers of the first fin structure is made of SiP, and
an amount of P in each of the epitaxial growth enhancement layers is in a range from 3 atomic % to 30 atomic %.