Patent ID: 11861485
Assignee: BAIDU USA LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. A method of operating an artificial intelligence (AI) engine including a data format converter and a systolic array of M by N MAC (multiply and accumulate) PEs (processing elements) having N MAC PEs on an input side of the systolic array, and, comprising: arranging, based on a hardware design of the systolic array, data of an input image having a pixel height and a pixel width in a first number of channels corresponding to a number of colors per pixel to a second number of channels, wherein the second number of channels is greater than the first number of channels and is not greater than N, each having data of a lesser pixel height, a lesser pixel width, and one of the number of colors per pixel, wherein the second number of channels is obtained by arranging each of a plurality of pixel groups of the input image in each of the first number of channels, wherein
when the first number of channels is three associated with red, green and blue channels respectively;
the second number of channels can be twelve; and
the arranging data of the input image comprises arranging each of a plurality of four pixel by four pixel groups in each of red, green and blue channels into four two pixel by two pixel groups for each of red, green and blue, and presenting each of the four two pixel by two pixel groups in each color in a corresponding channel for a total of twelve channels; and
inputting data of the second number of channels to the systolic array, such that more MAC PEs are utilized in a first and second convolution layer inference in the systolic array compared to inputting data of the first number of channels to the systolic array.