Patent ID: 11901364
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 16:
17. A semiconductor device structure, comprising:
a first source/drain epitaxial feature having a bottom surface, wherein the first source/drain epitaxial feature has a first height;
a first dielectric material disposed over the first source/drain epitaxial feature, wherein the first dielectric material has a second height;
a second source/drain epitaxial feature disposed over the first dielectric material;
a third source/drain epitaxial feature having a bottom surface located at a same level as the bottom surface of the first source/drain epitaxial feature, wherein the third source/drain epitaxial feature has a third height different from the first height;
a second dielectric material disposed over the third source/drain epitaxial feature, wherein the second dielectric material has a fourth height; and
a fourth source/drain epitaxial feature disposed over the second dielectric material.