Patent ID: 11887649
Assignee: nan
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A method, comprising:
receiving, at a first memory device and a second memory device of a number of memory devices, a refresh command;
refreshing, at the first memory device and in response to the refresh command, a first number of memory cells based on a first count value of a first refresh address counter of the first memory device; and
refreshing, at the second memory device and in response to the refresh command, a second number of memory cells of the second memory device based on a second count value of a second refresh address counter of the second memory device, wherein the second count value is different from the first count value, wherein a difference between the first count value and the second count value is at least partially based on a value of the number of memory devices, wherein the first number of memory cells and the second number of memory cells are refreshed substantially simultaneously.