Patent ID: 11860898
Assignee: NETAPP, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 16:
17. A first node comprising:
a memory storing instructions; and
a processor coupled to the memory, the processor configured to execute the instructions to cause the first node to:
in response to receiving a write request from a first client device when a first consistency group hosted by a first node and a second consistency group hosted by a second node are out of sync:
execute the write request upon the first consistency group; and
mark, within a dirty region log, a region modified by the write request as a dirty region;

perform a non-disruptive resynchronization to synchronize the second consistency group and the first consistency group; and
provide the first client device with non-disruptive access to data during the non-disruptive resynchronization,

wherein the non-disruptive resynchronization includes:
committing incoming write requests corresponding to the dirty regions to the first consistency group and not the second consistency group and committing incoming write requests corresponding to non-dirty regions to the first consistency group and the second consistency group to place the first consistency group and second consistency group into a synchronous replication state, and
wherein the incoming write requests are committed as part of providing the first client device with non-disruptive access to data during the non-disruptive resynchronization.