Patent ID: 11923430
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 1:
2. The semiconductor structure of claim 1, further comprising:
a third transistor disposed over a third region of the substrate, the third transistor comprising:
a third fin;
a third gate structure comprising:
the interfacial layer over a channel region of the third fin,
a third high-k dielectric layer disposed on the interfacial layer,
the second high-k dielectric layer disposed on the third high-k dielectric layer,
the first high-k dielectric layer disposed on the second high-k dielectric layer, and
the capping layer disposed on the first high-k dielectric layer,

wherein the third high-k dielectric layer comprises hafnium oxide,
wherein the third high-k dielectric layer is doped with aluminum.