Patent ID: 11908431
Assignee: JAPAN DISPLAY INC.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A display device comprising:
a plurality of pixels arranged in a display region;
a first region, which is a non-display region, located inside of the display region;
a first conductive layer including a plurality of scan signal lines in the display region and a plurality of first bypass wiring portions in a frame region between the first region and the display region; and
a second conductive layer including a plurality of touch detection wirings in the display region and a second bypass wiring portion in the frame region,
wherein
the first bypass wiring portions are formed along the first region between the first region and the display region, and
in a transparent plan view, the second bypass wiring portion extends along the first bypass wiring portions and is located between two adjacent first bypass wiring portions.