Patent ID: 11864475
Assignee: MICRON TECHNOLOGY, INC.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 0:
1. A method, comprising:
forming a material stack comprising a conductive layer positioned between a first dielectric layer and a second dielectric layer, wherein the first dielectric layer, the second dielectric layer, and the conductive layer form a channel in a sidewall of the material stack;
filling the channel with at least one material and a conductive material associated with a first electrode, wherein a first side of the first electrode is covered and a first side of the at least one material is exposed based at least in part on filling the channel with the at least one material;
forming, through the at least one material, an opening that exposes the conductive material and a second side of the at least one material; and
replacing, via the opening, the at least one material with a chalcogenide material based at least in part on exposing the second side of the at least one material.