Patent ID: 11895823
Assignee: WINBOND ELECTRONICS CORP.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A manufacturing method of a semiconductor device, comprising:
forming capacitor contacts over a substrate, wherein the capacitor contacts are arranged as an array having rows and columns;
forming bit lines over the substrate, wherein each of the bit lines extends between adjacent columns of the capacitor contacts, and the bit lines are formed to a height lower than a height to which the capacitor contacts are formed;
forming conductive rings each laterally enclosing a top portion of one of the capacitor contacts, wherein the bit lines are overlapped with the conductive rings and vertically separated from the conductive rings; and
forming storage capacitors over the substrate, wherein the storage capacitors are landed on the capacitor contacts and the conductive rings,
wherein the capacitor contacts are formed in an isolation structure, and the bit lines are separated from the capacitor contacts by portions of the isolation structure surrounding bottom portions of the capacitor contacts.