Patent ID: 11901482
Assignee: ALEDIA
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC B  H

Claim 16:
17. The manufacturing method according to claim 16, wherein at the end of the step of formation of the light confinement walls, the upper borders of the light-emitting diodes of the array of light-emitting diodes are not covered by the second material so that the light radiation originating from the light-emitting diodes of the array of light-emitting diodes is emitted out of the optoelectronic device by an emission surface of the optoelectronic device located, with respect to the light-emitting diodes of the array of light-emitting diodes, on a side of the upper borders of the light-emitting diodes of the array of light-emitting diodes according to the transverse direction.