Patent ID: 11973090
Assignee: DEPUY SYNTHES PRODUCTS, INC.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H  A | IPC A  H

Claim 0:
1. An imaging sensor comprising:
a pixel array comprising a plurality of pixels formed into a plurality of pixel columns, wherein the plurality of pixel columns are divided into a plurality of pixel sub-columns;
a plurality of pixel sub-column buses that correspond with the plurality of pixel sub-columns, such that at least one of the plurality of pixel sub-column buses is associated with one of the plurality of pixel sub-columns such that each of the plurality of pixel sub-columns are configured to be read independently;
a plurality of supporting circuits configured to process data received from the plurality of pixels, wherein the plurality of supporting circuits are formed into a plurality of supporting circuit columns, and wherein the plurality of supporting circuit columns are divided into a plurality of supporting circuit sub-columns;
a plurality of supporting circuit sub-column buses that correspond with the plurality of supporting circuit sub-columns, such that at least one of the plurality of supporting circuit sub-column buses is associated with one of the plurality of supporting circuit sub-columns;
wherein at least a portion of the plurality of supporting circuit sub-column buses and at least a portion of the plurality of pixel sub-columns buses are superimposed; and
a plurality of interconnects, wherein at least one interconnect electrically connects each of the plurality of pixel sub-column buses to each of the plurality of supporting circuit sub-column buses such that each of the plurality of supporting circuit sub-columns receives pixel data from a corresponding pixel sub-column;
wherein the plurality of interconnects are positioned anywhere along an intercept of the plurality of pixel sub-column buses and the plurality of circuit sub-column buses, wherein the intercept is defined by the superimposition of the at least a portion of the plurality of pixel sub-column buses directly with the at least a portion of the plurality of the circuit sub-column buses.