Patent ID: 11972127
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A method for operating a memory system, comprising:
determining a first super memory block among a plurality of super memory blocks, wherein each of the plurality of super memory blocks includes one or more of a plurality of memory blocks including a plurality of pages,
setting a lock to prevent a background operation from being executed for the first super memory block, and
transmitting data stored in the first super memory block to an external device,
wherein the background operation for the first super memory block is not executed until the lock is released, and
wherein the determining of the first super memory block determines the first super memory block among the plurality of super memory blocks to satisfy predetermined conditions that include i) a ratio of pages in which valid data is stored is equal to or greater than a preset threshold ratio and ii) an erase count is equal to or less than a preset threshold count.