Patent ID: 11922130
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. A computer program product for executing arithmetic operations via an arithmetic logic unit, comprising:
one or more computer readable storage media, and program instructions collectively stored on the one or more computer readable storage media, the program instructions comprising:
program instructions to convert arithmetic operators in an arithmetic expression into adders, such that all arithmetic operators in the arithmetic expression are adders;
program instructions to identify a topological order of the adders in the arithmetic expression, wherein the topological order of the adders includes a first adder followed by a second adder, and further wherein bit indexes between the first adder and the second adder are misaligned;
program instructions to merge the first adder and the second adder into a multi-operand adder based, at least in part, on:
shifting input and output operands of the first adder by a same value of the misalignment between the bit indexes between the first adder and the second adder during the merging; and
normalizing all bit indexes of the multi-operand adder such that the bit indexes of the multi-operand adder are non-negative;

program instructions to convert the multi-operand adder to a compressor tree and a two-operand adder; and
program instructions to perform the arithmetic expression based on the converted multi-operand adder.