Patent ID: 11876048
Assignee: WINBOND ELECTRONICS CORP.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. A method of manufacturing a memory device, comprising:
providing a substrate;
forming a target layer and a hard mask layer on the substrate;
patterning the hard mask layer to form a patterned hard mask layer, the patterned hard mask layer comprising: a plurality of first patterns, a second pattern, and a plurality of third patterns, wherein the first patterns extend in a first direction and are arranged in a second direction, the second pattern is comb-shaped and disposed between the first patterns and the third patterns, and the third patterns extend in the second direction and are arranged in the first direction; and
transferring the first patterns, the second pattern, and the third patterns to the target layer by using the patterned hard mask layer, so as to form a plurality of word lines, a comb-shaped dummy structure, and a plurality of landing pads.