Patent ID: 11888481
Assignee: RENESAS ELECTRONICS AMERICA INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An apparatus comprising:
a duty cycle controller comprising a tuning circuit, the tuning circuit comprising:
a first field-effect transistor, the first field-effect transistor implementing a capacitor, the tuning circuit being configured to discharge the first field-effect transistor to delay a portion of an output clock signal of the duty cycle controller;
a second field-effect transistor, the tuning circuit being configured to activate the second field-effect transistor to connect a source and a drain of the first field-effect transistor to a voltage source; and
a third field-effect transistor, the tuning circuit being configured to activate the third field-effect transistor to connect the source and the drain of the first field-effect transistor to a ground.