Patent ID: 11910613
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. The semiconductor memory device of claim 12, further comprising:
a second channel structure extending in the vertical direction to penetrate the mold structure, the second channel structure being spaced apart from the string separation structure with the first channel structure interposed therebetween;
a second bitline contact connecting the second channel structure and the bitline;
a third channel structure extending in the vertical direction to penetrate the mold structure, the third channel structure being spaced apart from the first channel structure with the string separation structure interposed therebetween; and
a third bitline contact connecting the third channel structure and the bitline,
wherein a distance between the first bitline contact and second bitline contact is smaller than a distance between the first bitline contact and third bitline contact.