Patent ID: 11864385
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 10:
11. A three-dimensional semiconductor memory device, comprising:
a peripheral logic structure, the peripheral logic structure including a first substrate, a peripheral transistor on the first substrate, and a peripheral connection line electrically connected to the peripheral transistor; and
a cell array structure on the peripheral logic structure and electrically connected to the peripheral logic structure,
wherein the cell array structure comprises:
a second substrate on the peripheral logic structure;, a stack on the second substrate, the stack including a plurality of intergate dielectric layers and a plurality of electrode layers that are alternately stacked on the second substrate;
a vertical semiconductor pattern that penetrates the stack and extends into the second substrate; and
a vertical insulating pattern between the stack and the vertical semiconductor pattern,
wherein the plurality of intergate dielectric layers includes a first intergate dielectric layer and a second intergate dielectric layer that are vertically adjacent to each other,
wherein the plurality of electrode layers include a first electrode layer interposed between the first and second intergate dielectric layers,
wherein the vertical insulating pattern includes a blocking dielectric pattern, a first charge storage pattern, a second charge storage pattern, and a tunnel dielectric layer that are sequentially interposed between the first electrode layer and the vertical semiconductor pattern,
wherein the tunnel dielectric layer extends from a first sidewall of the first intergate dielectric layer through the second charge storage pattern to a second sidewall of the second intergate dielectric layer,
wherein the second charge storage pattern in contact with a top surface and a bottom surface of the first charge storage pattern, and
wherein the second charge storage pattern includes a material different from a material of the first charge storage pattern.