Patent ID: 11935756
Assignee: nan
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A method, comprising:
forming a sacrificial patterning material over a material to be etched, wherein the sacrificial patterning material comprises a plurality of segmented portions having at least first and second cross sectional sidewalls;
forming a plurality of sacrificial first spacers, with one spacer formed on each sidewall of each segmented portion of the sacrificial patterning material;
removing the sacrificial patterning material;
forming a conformal silicon dioxide second spacer material over the plurality of sacrificial first spacers;
removing a portion of the conformal silicon dioxide second spacer material to form a plurality of second silicon dioxide spacers on the sacrificial first spacers, wherein the second silicon dioxide spacers have different elevational thicknesses;
subsequent to forming the second silicon dioxide spacers, removing the sacrificial first spacers; and
etching the material to be etched using the silicon dioxide second spacers as a pattern.