Patent ID: 11921630
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. A controller comprising:
a first memory storing logical-to-physical (L2P) mapping entries of map data; and
a processor configured to control a first external including a plurality of memory blocks to store data segments of user data, corresponding to a plurality of commands received from a second external,
update the L2P mapping entries of the map data corresponding to storage of the data segments in the memory blocks and stores the updated L2P mapping entries in the first memory,
assist the second external to store the updated L2P mapping entries to a second memory in the second external, and
wherein the processor controls the first external to store the L2P mapping entries, stored in the first memory, in the memory blocks,
wherein the controller updates a second L2P mapping entry group of the L2P mapping entries by referencing some part of a first L2P mapping entry group of the L2P mapping entries that has already been updated.