Patent ID: 11895834
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 24:
25. A method used in forming a memory array comprising strings of memory cells, comprising:
forming memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers, channel-material strings extending through the insulative tiers and the conductive tiers;
horizontally-elongated trenches between immediately-laterally-adjacent of the memory blocks, conductor material in and extending elevationally along sidewalls of the trenches laterally-over the conductive tiers and the insulative tiers and that directly electrically couples together conducting material of individual of the conductive tiers;
exposing the conductor material to oxidizing conditions to form an insulative oxide laterally-through the conductor material laterally-over individual of the insulative tiers to separate the conducting material of the individual conductive tiers from being directly electrically coupled together by the conductor material;
after forming the insulative oxide, removing all of it; and
after the removing, sequentially forming silicon nitride, silicon dioxide, and polysilicon into the trenches.