Patent ID: 11947483
Assignee: XCONN TECHNOLOGIES HOLDINGS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. A method, comprising:
receiving a transaction in a port of a plurality of ports of a switch, the switch also including a plurality of port logic modules and a core portion, the core portion including a switch fabric and a memory, the plurality of port logic modules being coupled with the plurality of ports, a port logic module of the plurality of port logic modules being coupled with the port, the core portion of the switch having a system clock domain; and
controlling, using the port logic module, routing of the transaction through the core portion, the port logic module having core clock domain logic for a core clock domain specific to the port and different from the system clock domain, wherein the controlling further includes:
combining, using the port logic module, a first number of port streams from the port to a second number of system streams; and
separating the second number of system streams into the first number of port streams, wherein the second number of system streams includes a with data stream and a no data stream, the with data stream corresponding to transactions including a data payload, the no data stream corresponding to transactions free of a data payload, wherein the port streams include cache streams and memory streams, the cache streams including a request stream, a plurality of response streams, and a data stream, and wherein the combining further includes:
merging the data stream with a first memory stream having the data payload into the with data stream; and
merging the plurality of response streams, the request stream and a second memory stream not having the data payload into the no data stream.