Patent ID: 11862721
Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A semiconductor die, comprising:
a semiconductor substrate having a central area and a peripheral area enclosing the central area and defining a boundary of a semiconductor die;
a GaN-based high electron mobility transistor (HEMT) disposed over the semiconductor substrate and within the central area, the GaN-based HEMT comprising a heterojunction that is formed between first and second nitride-based semiconductor layers with a two-dimensional electron gas (2DEG) region adjacent to the heteroj unction;
a passivation structure disposed within the central area and covering the GaN-based HEMT, wherein edges of the first and second nitride-based semiconductor layers and the passivation structure collectively form a stepped structure; and
a protection layer disposed over the passivation structure and extending from the central area to the peripheral area, wherein the protection layer covers the stepped structure and is conformal with the edges of the first and second nitride-based semiconductor layers and the passivation structure such that the protection layer has at least a first laterally extending portion and at least one riser portion.