Patent ID: 11868699
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 17:
18. A method of forming an integrated circuit (IC), the method comprising:
generating, by a processor, a layout of the integrated circuit, wherein the generating of the layout comprises:
placing a set of active region patterns on a first level, the set of active region patterns extending in a first direction, each active region pattern of the set of active region patterns being separated from one another in a second direction different from the first direction, the set of active regions patterns corresponding to fabricating a set of active regions in a substrate;
placing a first set of contact patterns on a second level different from the first level, the first set of contact patterns extending in the second direction, overlapping the set of active region patterns, each contact pattern of the first set of contact patterns being separated from an adjacent contact pattern of the first set of contact patterns in the first direction, the first set of contact patterns corresponding to fabricating a first set of contacts, the first set of contacts being electrically coupled to the set of active regions;
placing a second set of contact patterns on a third level different from the first level and the second level, the second set of contact patterns extending in the first direction and the second direction, overlapping the first set of contact patterns, the second set of contact patterns corresponding to fabricating a second set of contacts, at least one contact of the second set of contacts being electrically coupled to at least one contact of the first set of contacts; and
placing a set of power rail patterns on a fourth level different from the first level, the second level and the third level, the set of power rail patterns extending in the first direction, overlapping the first set of contact patterns, and the set of power rail patterns corresponding to fabricating a set of power rails; and

manufacturing the integrated circuit based on the layout.