Patent ID: 11886288
Assignee: PURE STORAGE, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 2:
3. The storage system of claim 1, wherein the memory of the plurality of storage nodes comprises solid-state memory and wherein the memory includes triple level cell (TLC) flash memory, and wherein each storage node of the plurality of storage nodes is configurable to identify access rates associated with a first portion of the TLC flash memory and a second portion of the TLC flash memory, the first portion of the TLC flash memory having a faster access rate than the second portion of the TLC flash memory, wherein the portions of the solid-state memory having the first access rate include the first portion of the TLC flash memory and the portions of the solid-state memory having the second access rate include the second portion of the TLC flash memory.