Patent ID: 11862706
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a first transistor comprising:
a first active region,
a first gate dielectric layer over the first active region, the first gate dielectric layer comprising a first concentration of a dipole inducing material, and
a first metal gate stack disposed over and in contact with the first gate dielectric layer;

a second transistor comprising:
a second active region,
a second gate dielectric layer over the second active region, the second gate dielectric layer comprising a second concentration of the dipole inducing material, and
a second metal gate stack disposed over and in contact with the second gate dielectric layer;

a third transistor comprising:
a third active region,
a third gate dielectric layer over the third active region, the third gate dielectric layer comprising a third concentration of the dipole inducing material, and
a third metal gate stack disposed over and in contact with the third gate dielectric layer; and

a fourth transistor comprising:
a fourth active region,
a fourth gate dielectric layer over the fourth active region, the fourth gate dielectric layer being free of the dipole inducing material, and
a fourth metal gate stack disposed over and in contact with the fourth gate dielectric layer,

wherein the dipole inducing material comprises lanthanum, aluminum, or yttrium oxide,
wherein the first concentration is greater than the second concentration and the second concentration is greater than the third concentration,
wherein the first gate electrode, the second gate electrode, the third gate electrode and the fourth gate electrode share the same composition.