Patent ID: 11937196
Assignee: QUALCOMM INCORPORATED
Field: Telecommunications (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An apparatus, comprising:
one or more memories storing processor-executable code; and
one or more processors coupled with the one or more memories and individually or collectively operable to execute the code to cause the apparatus to:
establish, with one or more user equipments (UEs) of a wireless communication network, a packet data unit (PDU) session for communication of messages for one or more protocols including precision time protocol (PTP) messages associated with one or more timing domains;
receive an upstream PTP message that includes one or more indicators of the one or more timing domains supported by the one or more UEs, wherein the one or more indicators of the one or more timing domains supported by the one or more UEs comprise a domain number included in a header associated with the upstream PTP message;
receive, at the apparatus from a time sensitive network node, a downstream PTP message associated with a timing domain of the one or more timing domains;
adjust, by the apparatus, a field of the downstream PTP message based at least in part on a link delay between the time sensitive network node and the apparatus; and
send, from the apparatus, the downstream PTP message to the one or more UEs that includes an indication of the one or more timing domains associated with the established PDU session.