Patent ID: 11901435
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A method for forming a semiconductor structure, the method comprising:
forming an isolation structure in a substrate, wherein the substrate comprises a device layer, a high resistivity layer under the device layer, and an insulator layer between the device layer and the high resistivity layer;
forming a gate dielectric layer on the device layer;
forming a gate electrode on the gate dielectric layer;
depositing a sidewall spacer layer on the device layer and along sidewalls of the gate electrode, wherein the sidewall spacer layer has a dielectric constant greater than that of the insulator layer and less than that of the gate dielectric layer, wherein the sidewall spacer layer is deposited at a first ambient temperature within a first temperature range; and
etching the sidewall spacer layer to define a sidewall spacer on the sidewalls of the gate electrode, wherein the sidewall spacer layer is etched at a second ambient temperature within a second temperature range, wherein the first temperature range includes the second temperature range.