Patent ID: 11935784
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. The method of claim 15, further comprising:
forming a memory film surrounding each of the vertical semiconductor channels;
forming a patterned photoresist layer over the at least one via-level dielectric layer, wherein the patterned photoresist layer comprises an opening therein; and
anisotropically etching a region of the at least one via-level dielectric layer and a region of the one of the capping dielectric strips that are located underneath the opening in the patterned photoresist layer by performing an anisotropic etch process, wherein the anisotropic etch process has an etch chemistry that etches each material within the at least one via-level dielectric layer and a material within the capping dielectric strips selective to a material of the etch stop dielectric layer.