Patent ID: 11894342
Assignee: BROADPAK CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 0:
1. A system comprising:
a non-chip substrate, wherein
said non-chip substrate is not a die,
said non-chip substrate is not an interposer chip,
said non-chip substrate comprises only redistribution layer(s) and via(s);

one or more interposer chip(s);
a die stack, wherein
said die stack includes at least:
a first die,
a second die,
a third die,

the second die is stacked vertically on top of the first die, and
the third die is stacked horizontally in relation to the first die and/or the second die, and
said one or more interposer chip(s) is/are stacked on top of said second die and/or said third die, with no said non-chip substrate and/or said interposer chip in between said die stack,

one or more Redistribution Layer(s);
one or more Through Via(s);
one or more Serializer/Deserializer(s);
one or more contact pad(s), wherein
said one or more contact pad(s) is/are located along at least one edge of the first die;

one or more passive component(s); and
said first die and/or said second die and/or said third die includes said one or more Through Via(s) and said one or more Serializer/Deserializer(s),
said one or more Serializer/Deserializer(s) is/are configured to communicate through said one or more Through Via(s) and/or through said one or more Redistribution Layer(s),
said one or more Through Via(s) is/are configured to route and connect to said one or more contact pad(s) on said die stack which is coupled to said substrate, and
said one or more passive component(s) is/are coupled to said substrate.