Patent ID: 11914500
Assignee: APPLE INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. An electronic device, comprising:
a system memory storing input data; and
an accelerator circuit coupled to the system memory, the accelerator circuit including:
a data memory configured to receive and store the input data from the system memory,
an instruction memory storing a program that includes a plurality of instruction packets,
a vector circuit coupled to the instruction memory and the data memory, the vector circuit configured to:
read at least a subset of the plurality of instruction packets from the instruction memory,
receive at least a portion of the input data from the data memory corresponding to the subset of plurality of instruction packets, and
execute a set of vector operations in accordance with two or more of the plurality of instruction packets from the subset using data from the received portion of the input data identified in the two or more of the plurality of instruction packets to generate output data, and

a program counter control circuit coupled to the instruction memory, the program counter control circuit configured to trigger a breakpoint in the program causing the accelerator circuit to stop executing remaining instruction packets in the program following the two or more of the plurality of instruction packets responsive to a number of instruction packets executed in the program from a time instant of an event reaching a predetermined number.