Patent ID: 11880186
Assignee: KABUSHIKI KAISHA TOSHIBA
Field: Digital communication (Electrical engineering)
Classification: CPC G  H  B | IPC G  H

Claim 15:
16. A system capable of communicating with a terminal, comprising:
a processor configured to generate a first control signal including a first instruction to operate at least part of the terminal within a first validity period and generate a second control signal including a second instruction to operate at least part of the terminal within a second validity period after an operation of the at least part of the terminal in accordance with the first instruction; and
a transmitter configured to transmit the first control signal to the terminal at a first timing and transmit the second control signal to the terminal at a second timing after the first timing,
wherein:
an end of the first validity period is after the second timing, and
the transmitter is configured to retransmit the second control signal by the end of the first validity period when the terminal does not receive the second control signal transmitted at the second timing.