Patent ID: 11914536
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A device that provides an interface between a plurality of master devices and a slave device, the device comprising:
a first timer configured to begin timing when a first access request is received from a first master device via a bus, and to be reset when a semaphore is allocated to the first master device;
a second timer configured to begin timing when a second access request is received from a second master device via the bus, and to be reset when the semaphore is allocated to the second master device; and
a controller configured to provide a first message to the first master device via the bus when a first expiration interval is measured by the first timer, and to provide the first message to the second master via the bus when a second expiration interval is measured by the second timer.