Patent ID: 11907587
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A device, comprising:
a processor;
a memory comprising a Persistent Memory Region (PMR) configured to operate under multiple protocols through a single interface wherein a first protocol is a Non-Volatile Memory Express (NVMe) protocol;
a Non-Volatile Memory (NVM) array organized into logical blocks; and
a persistent memory device (PMD) organized into logical blocks:
wherein PMR data is loaded into the PMD from the NVM array under the NVMe protocol;

wherein the PMD comprises extended logical blocks to the NVM array under a second protocol; and
a protocol-switching logic configured to direct the processor to:
determine a protocol for use within the device;
wherein if the determined protocol is an NVMe protocol:
PMR usage is determined;
data associated with the PMR is loaded; and
the device is operated under the determined NVMe protocol;

wherein if the determined protocol is a second protocol, the device is operated under the determined second protocol; and
wherein the protocol-switching logic is further configured to initialize the device after determining a protocol.