Patent ID: 11915119
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 31:
32. The method of claim 31, further comprising:
separating the input into a high-order bits input corresponding to the high-order bits of the input and a low-order bits input corresponding to the low-order bits of the input; and
separating the kernel into a high-order bits kernel corresponding to the high-order bits of the kernel and a low-order bits kernel corresponding to the low-order bits of the kernel,
wherein the performing of the high-speed convolution operation comprises performing a first convolution operation between the high-order bits input and the high-order bits kernel, and
the performing of the precision convolution operation comprises performing the precision convolution based on at least the low-order bits input and the low-order bits kernel.