Patent ID: 11893475
Assignee: EDGECORTIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The integrated circuit according to claim 5, further comprising
a line buffer in communication with the input data memory and the plurality of convolution modules, the line buffer including a plurality of indices; and
a plurality of convolution input interconnects connecting the plurality of indices, the plurality of convolution modules, and the input data memory, such that each convolution module has a direct connection to each index and the input data memory; and
a convolution input interconnect control module configured to open and close convolution input interconnects according to a convolution input connection scheme whereby each convolution module has no more than one open direct connection through the plurality of convolution input interconnects to the input data memory or one of the plurality of indices.