Patent ID: 11881253
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. An apparatus, comprising:
an array of memory cells; and
circuitry coupled to the array and configured to, during a sense operation:
apply a sense voltage to a group of the memory cells of the array whose data states are being sensed during the sense operation, wherein each respective memory cell of the group is coupled to a same access line and a different respective sense line;
obtain a voltage signal from each respective memory cell of the group of the memory cells via the sense line coupled to that respective memory cell;
average a magnitude of each of the respective voltage signals to determine an average reference voltage; and
apply the average reference voltage to a plurality of sense components via a common node driver coupled to the to the array, wherein the plurality of sense components are coupled to the group of memory cells via the different respective sense lines.