Patent ID: 11893276
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An apparatus comprising:
a plurality of memory blocks;
first and second data buses coupled to the plurality of memory blocks;
a non-volatile storage device external to the plurality of memory blocks, the non-volatile storage device coupled to the second data bus and configured to receive data from the plurality of memory blocks on the second data bus, and the non-volatile storage device further coupled to the first data bus and configured to provide data to and receive data from the first data bus; and
a non-volatile storage (NVS) data transfer circuit coupled to the plurality of memory blocks and configured to transfer data in a first memory block of the plurality of memory blocks to the non-volatile storage device via the second data bus responsive to a data transfer command, when a second memory block of the plurality of memory blocks different from the first memory block is accessed via the first data bus concurrently.