Patent ID: 11880706
Assignee: NANJING QINHENG MICROELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 14:
15. The interrupt control system based on RISC-V according to claim 9, wherein the hardware memory area comprises a first-type memory area and a second-type memory area, the first-type memory area is used for storing a content of the control and status register set, and the second-type memory area is used for storing the content in the Caller-save type general-purpose register; and the first-type memory area comprises at least a level 2 sub-memory area, the level 2 sub-memory area of the first-type memory area is used for storing the content of the control and status register set before an interrupt preemption, the second-type memory area comprises at least a level 1 sub-memory area and a level 2 sub-memory area, the level 1 sub-memory area of the second-type memory area is used for storing the content of the Caller-save type general-purpose register before entering a first interrupt, and the level 2 sub-memory area of the second-type memory area is used for storing the content in the Caller-save type general-purpose register before the interrupt preemption.