Patent ID: 11881185
Assignee: FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. A display device, comprising a power supply component and a display module, wherein the display module comprises:
a main display panel, an auxiliary display panel and a backlight module which are laminated sequentially;
at least one temperature sensing circuit in the auxiliary display panel, wherein the temperature sensing circuit is configured to generate, based on temperature of the auxiliary display panel, a temperature signal related to the temperature, the temperature sensing circuit is further coupled to a gate line in the auxiliary display panel, and the temperature sensing circuit is configured to generate the temperature signal when the gate line provides a turn-on signal; and
a control circuit coupled to the at least one temperature sensing circuit, wherein the control circuit is configured to adjust a display parameter of the main display panel based on the temperature signal;
the control circuit comprises:
a signal amplifying circuit, coupled to the temperature sensing circuit and configured to acquire an amplified signal by amplifying the temperature signal generated by the temperature sensing circuit;
a signal processing circuit, coupled to the signal amplifying circuit and configured to determine a compensation display parameter of the main display panel based on the amplified signal;
an adjusting circuit, coupled to the signal processing circuit and configured to adjust the display parameter of the main display panel with the compensation display parameter;
a clock circuit configured to output a sampling clock signal, wherein a sampling period of the sampling clock signal is an integral multiple of a scanning period, and a duration of the scanning period is a duration required to scan gate lines in the auxiliary display panel; and
a sample and hold circuit coupled to the clock circuit, wherein the sample and hold circuit is configured to acquire a sampled signal by sampling the amplified signal when the sampling clock signal is at a first level, and stop sampling and keep outputting the sampled signal to the signal processing circuit when the sampling clock signal is at a second level.