Patent ID: 11888492
Assignee: CIRRUS LOGIC INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. The system of claim 1, wherein the decision latch of the analog comparator comprises:
a pair of cross-coupled latch stages for receiving a clock signal and capturing an output state of the decision latch in response to the clock signal;
at least one tail device having an input for receiving the clock signal;
a first pair of input ladder stages coupled between corresponding ones of the pair of cross-coupled latch stages and the at least one tail device for receiving the output of the preamplifier stage, whereby the cross-coupled latch stages capture a state determined by conduction of the first pair of input stages in response to the clock signal; and
a second pair of input ladder stages coupled between corresponding ones of the pair of cross-coupled latch stages and the at least one tail device for receiving the output of the offset correction circuit, whereby the output of the offset correction circuit adjusts a threshold of the conduction of the first pair of input stages that determines the state captured by the cross-coupled latch stages.