Patent ID: 11955554
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A multi-gate semiconductor device, comprising:
a first layer having a first composition, the first layer extending from a source/drain region of the first layer to a channel region of the first layer;
a second layer having the first composition, the second layer extending from a source/drain region of the second layer to a channel region of the second layer and spaced above the first layer;
a gate structure interposed between the channel region of the first layer and the channel region of the second layer;
a silicon germanium oxide layer interposed between the source/drain region of the first layer and the source/drain region of the second layer; and
an epitaxial layer formed on the source/drain region of the first layer and the second layer and the silicon germanium oxide layer.