Patent ID: 11941249
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A host device comprising:
at least one host memory including a plurality of HPB (high performance boosting) entry storage regions; and
at least one host controller configured to transmit a HPB entry and a read command to at least one memory device, the HPB entry to be stored in one of the plurality of HPB entry storage regions, wherein
the plurality of HPB entry storage regions includes at least a first HPB entry type storage region corresponding to a first HPB entry type and a second HPB entry type storage region corresponding to a second HPB entry type,
the first HPB entry type storage region is configured to store mapping information between a logical address associated with the read command and a physical address associated with the read command, and indexing information indicating a location of the second HPB type entry storage region associated with the read command,
the second HPB type entry storage region is configured to store additional information associated with a read operation performed by the memory device in response to the read command, and
the read command including HPB entry type information indicating a HPB entry type of the transmitted HPB entry, and the read command further including at least one of the mapping information associated with the read command and the indexing information associated with the read command from the first HPB type entry storage region, and the additional information associated with the read command from the second HPB type entry storage region.