Patent ID: 11925037
Assignee: nan
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A method of forming a microelectronic device, the method comprising:
forming a stack structure comprising, in a vertical direction, insulative structures interleaved with nonconductive structures, the insulative structures and the nonconductive structures arranged in tiers;
forming pillar structures extending, in the vertical direction, through the stack structure, the pillar structures comprising at least one channel material;
in an area horizontally between a pair of the pillar structures, forming an isolation trench extending through an upper portion of the stack structure, the isolation trench being spaced from an upper pillar portion of each of the pair of the pillar structures, the isolation trench overlapping in the vertical direction a portion of the at least one channel material of the pair of the pillar structures; and
after forming the isolation trench, converting the nonconductive structures of the upper portion of the stack structure to conductive structures to form the stack structure to comprise, in the vertical direction, the insulative structures interleaved with the conductive structures, the insulative structures and the conductive structures arranged in tiers.