Patent ID: 11862519
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A method for manufacturing an integrated circuit device, the method comprising:
forming first, second, and third semiconductor fins over a semiconductor substrate, wherein the second semiconductor fin is between the first and third semiconductor fins;
forming a first fin sidewall spacer, two second fin sidewall spacers, and a third fin sidewall spacer respectively on a sidewall of a first portion of the first semiconductor fin, opposite sidewalls of a first portion of the second semiconductor fin, and a sidewall of a first portion of the third semiconductor fin, wherein the first fin sidewall spacer and a first one of the second fin sidewall spacers are between the first and second semiconductor fins, and the third fin sidewall spacer and a second one of the second fin sidewall spacers are between the second and third semiconductor fins;
recessing the first portions of the first, second, and third semiconductor fins;
removing the third fin sidewall spacer, wherein the first fin sidewall spacer and the first and second ones of the second fin sidewall spacers remain after removing the third fin sidewall spacer; and
after removing the third fin sidewall spacer, forming first to third epitaxial features respectively on the recessed first portions of the first to third semiconductor fins, wherein the second epitaxial feature is spaced apart from the first epitaxial feature and merged with the third epitaxial feature.