Patent ID: 11868625
Assignee: PURE STORAGE, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. An apparatus comprising a computer processor, a computer memory operatively coupled to the computer processor, the computer memory having disposed within it computer program instructions that, when executed by the computer processor, cause the apparatus to carry out the steps of:
receiving, by a storage controller, an alert condition for a particular memory block in a particular storage device within a storage array, wherein the alert condition indicates that the particular memory block of the particular storage device is in a failure state;
in response to receiving the alert condition, querying, by the storage controller, the particular storage device for a location storing control information for the particular storage device, wherein the control information includes a state of the particular memory block in the particular storage device; and
updating, by the storage controller using a received location storing the control information, the control information for the particular storage device to indicate the failure state.