Patent ID: 11924787
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Telecommunications (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An electronic device comprising:
a memory;
an antenna array including a plurality of conductive plates; and
a processor operatively connected to the memory and the antenna array,
wherein the processor is configured to:
receive a plurality of synchronization signal blocks corresponding to a plurality of transmit beams from a base station by using at least one first receive beam formed using one of the plurality of conductive plates;
identify at least one of the plurality of synchronization signal blocks received by using the first receive beam based at least in part on reception strengths of the plurality of synchronization signal blocks;
receive the at least one identified synchronization signal block by using each of a plurality of second receive beams formed using the plurality of conductive plates; and
determine one synchronization signal block among the at least one identified synchronization signal block based at least in part on a reception strength of at least one synchronization signal block received by using each of the plurality of second receive beams.