Patent ID: 11942542
Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A method of fabricating a semiconductor device, comprising: providing a substrate; forming a gate dielectric layer on the substrate, wherein the gate dielectric layer includes a first portion having a first thickness, a second portion having a second thickness, and a third portion having a third thickness, and the first thickness, the second thickness and the third thickness are different from each other, and the first thickness is smaller than the second thickness and the third thickness; forming a gate electrode on the first portion of the gate dielectric layer; forming a field plate on and being in contact with top surfaces of both the second portion and the third portion of the gate dielectric layer, wherein the field plate is separated from and electrically coupled to the gate electrode; forming a source electrode on one side of the gate electrode; and forming a drain electrode on one side of the field plate.