Patent ID: 11899952
Assignee: SEAGATE TECHNOLOGY LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. An apparatus comprising:
a non-volatile memory (NVM) comprising a plurality of memory cells arranged into a plurality of namespaces; and
a controller circuit configured to transfer data blocks between the NVM and a host, the controller circuit operative to monitor a workload from the host for each namespace, generate metadata for a set of data blocks to be stored to a selected namespace with the metadata providing a map structure that identifies a physical location at which the set of data blocks are to be stored in the selected namespace, select a compression level for the metadata responsive to the workload associated with the selected namespace, compress the metadata using the selected compression level to generate compressed metadata, and store the compressed metadata and the set of data blocks to the selected namespace, the selected compression level balancing the workload and memory storage capacity required to store the set of data blocks and the rate at which the set of data blocks can be accessed.