Patent ID: 11887916
Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A semiconductor device, comprising:
a substrate comprising:
a first side;
a second side opposite to the first side;
a conductive structure; and
a substrate encapsulant;
wherein:
the conductive structure comprises:
a lead comprising a lead via comprising via lateral sides, a lead protrusion comprising a protrusion lateral side, and a lead trace comprising a trace lateral side;
a first terminal layer coupled to the lead via adjacent to the first side of the substrate; and
a second terminal layer coupled to the lead protrusion and the lead trace adjacent to the second side of the substrate;

the lead protrusion comprises a protrusion bottom side adjacent to the second side of the substrate;
the lead trace comprises a lead trace bottom side adjacent to the second side of the substrate;
the protrusion bottom side and the lead trace bottom side are substantially coplanar;
the via lateral sides comprise first concave shapes;
the protrusion lateral side is defined by a second concave shape, the protrusion lateral side comprising a first height defined by where the protrusion lateral side terminates and adjoins the substrate encapsulant;
the trace lateral side is defined by a third concave shape, the trace lateral side comprising a second height defined by where the trace lateral side terminates adjoining the substrate encapsulant, wherein the second height is less than the first height;
the substrate encapsulant covers the via lateral sides at the first side of the substrate but not the protrusion lateral side or the trace lateral side so that the lead protrusion and the lead trace protrude from the substrate encapsulant at the second side of the substrate;
the second terminal layer comprises a plated conformal layer that contacts the protrusion lateral side, the trace lateral side, the lead trace bottom side, and the protrusion bottom side without an intervening layer;
the first terminal layer and the lead via define an internal terminal; and
the second terminal layer, the lead protrusion, and the lead trace define an external terminal;

a semiconductor component adjacent to the first side of the substrate, electrically coupled to the internal terminal, and comprising:
a first component side distal to the first side of the substrate;
a second component side proximate to the first side of the substrate; and
lateral component sides extending between the first component side and the second component side to define a footprint of the semiconductor component; and

a body encapsulant encapsulating the first component side and the lateral component sides of the semiconductor component;
wherein:
the body encapsulant comprises a body encapsulant top side and a body encapsulant bottom side;
the substrate encapsulant comprises a substrate encapsulant top side proximate to the first side of the substrate;
the body encapsulant bottom side contacts the substrate encapsulant top side; and
the lead trace is configured to laterally route an electrical signal at the second side of the substrate in either:
a fan-in electrical signal path where the lead trace is connected to the lead protrusion at a first location outside of the footprint and laterally extends to a second location within the footprint; or
a fan-out electrical signal path where the lead trace is connected to the lead protrusion at a third location inside of the footprint and laterally extends to a fourth location outside of the footprint.