Patent ID: 11947452
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory sub-system comprising:
a memory device comprising a set of blocks; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
identifying a subset of blocks from the set of blocks based on a valid data count constraint;
selecting, using a first garbage collection source block selection scheme, a first block from the subset of blocks based on a valid data count of the first block, the valid data count of the first block comprising a number of pages in the block that store valid data;
selecting, using a second garbage collection source block selection scheme, a second block from the subset of blocks based on a data temperature of the second block, the data temperature of the second block corresponding to a frequency with which data stored by the second block is updated;
performing a comparison of the first block and the second block in accordance with one or more comparison criterion;
selecting the first block or the second block as a first garbage collection source block based on the comparison;
performing garbage collection at the first garbage collection source blocky
tracking multiple garbage collection source block selections;
generating historical log data based on the tracking, the historical log data indicating which block was selected at each garbage collection source block selection; and
selecting a second garbage collection source block based on the historical log data, the second garbage collection source block being different than the first garbage collection source block.