Patent ID: 11870612
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. The method of claim 1, wherein the communication link is a bi-directional link comprising a downlink channel and an uplink channel coupled between a host input-output (IO) interface and a device IO interface, the host IO interface including a host transmitter connected to a host-side of the downlink channel and a host receiver connected to a host-side of the uplink channel, the host transmitter including an adjustable host transmitter termination resister (Rtx_h) and the host receiver including an adjustable host receiver termination resister (Rrx_h), the device IO interface including a device receiver connected to a device-side of the downlink channel and a device transmitter connected to a device-side of the uplink channel, the device receiver including an adjustable device receiver termination resister (Rrx_d) and the device transmitter including an adjustable device transmitter termination resister (Rtx_d), the method further comprising:
using first and second calibration processes to calibrate an Rtx and Rrx pair in a downlink channel or uplink channel resulting in either calibration of the Rtx_h and Rrx_d or calibration of the Rtx_d and Rrx_h; and
employing at least a third calibration process to calibrate one of the Rrx_h and Rrx_d that wasn't calibrated in the first and second calibration processes.