Patent ID: 11901967
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Telecommunications (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. An analog front-end receiver comprising:
a terminating resistor provided between a first node, to which a first data line is electrically connected, and a second node, to which a second data line is electrically connected, the terminating resistor being configured to receive a first differential signal from the first data line via the first node, and configured to receive a second differential signal from the second data line via the second node, the second differential signal being differential from the first differential signal;
a first equalizer configured to, in a first operation mode, block the first differential signal provided through the first node, and configured to, in a second operation mode, output a first equalization differential signal corresponding to the first differential signal to a third node without blocking the first differential signal, the second operation mode being different from the first operation mode;
a second equalizer configured to, in the first operation mode, block the second differential signal provided through the second node, and configured to, in the second operation mode, output a second equalization differential signal corresponding to the second differential signal to a fourth node without blocking the second differential signal; and
a common mode voltage generator including a first current source electrically connected to the third node and a second current source electrically connected to the fourth node,
wherein the first current source is configured to provide a current to the first equalizer to provide a first common mode voltage to the third node, and the second current source is configured to provide a current to the second equalizer to provide a second common mode voltage to the fourth node.