Patent ID: 11934308
Assignee: nan
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 22:
23. A computer system for data manipulation comprising:
a memory which stores instructions;
one or more processors coupled to the memory wherein the one or more processors, when executing the instructions which are stored, are configured to:
access one or more processor clusters capable of executing software-initiated work requests;
flatten a tensor having a plurality of dimensions into a single dimension;
parse a work request address field, wherein the address field contains unique address space descriptors for each of the plurality of dimensions of the tensor along with a common address space descriptor;
generate addresses, based on the unique address space descriptors and the common address space descriptor;
access memory, using two or more of the addresses that were generated, at the respective locations in memory specified by the two or more addresses; and
provide, to the one or more processor clusters, data at the accessed respective locations in memory specified by the two or more addresses.