Patent ID: 11955155
Assignee: UIF (UNIVERSITY INDUSTRY FOUNDATION), YONSEI UNIVERSITY
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 24:
25. A nonvolatile memory device comprising:
a first inverter; and
a second inverter cross-coupled to the first inverter,
wherein the second inverter includes a pull-up transistor, a pull-down transistor, and a ferroelectric field effect transistor having gate nodes connected to each other, and a restore transistor having one electrode connected to the ferroelectric field effect transistor, and the second inverter stores data in a nonvolatile manner, and
wherein when the ferroelectric field effect transistor is programmed to a low resistance state, a turning-on resistance of a pull-down path including the restore transistor and the ferroelectric field effect transistor is smaller than a turning-on resistance of a pull-up path including the pull-up transistor.