Patent ID: 11934941
Assignee: APPLE INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A neural processor circuit comprising:
one or more neural engine circuits configured to perform convolution operations on neural input data to generate neural output data;
one or more planar engine circuits configured to perform non-convolution operations on planar input data in parallel with performing of the convolution operations by the one or more neural engine circuits to generate planar output data; and
a data processor circuit configured to address data dependency between the neural input data and the planar input data by selectively enabling a buffer circuit to:
grant access to the planar output data in the buffer circuit by the one or more neural engine circuits to read the planar output data as the neural input data, or
grant access to the neural output data in the buffer circuit by the one or more planar engine circuits to read the neural output data as the planar input data.