Patent ID: 11876064
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor structure, comprising:
a semiconductor substrate;
a metal pad disposed on the semiconductor substrate;
a bump disposed on the metal pad;
a metal barrier layer disposed on a side of the bump away from the metal pad, wherein the metal barrier layer comprises a storage cavity and at least one opening, wherein the at least one opening is placed on a side wall of the metal barrier layer, and wherein the at least one opening is connected to the storage cavity;
a solder layer disposed in the storage cavity, wherein one side of the solder layer away from the bump protrudes from the storage cavity;
side wall segments, wherein the side wall segments are arranged in pairs, wherein pairs of the side wall segments are arranged to be apart from each other on the bump, and wherein two openings are formed between two oppositely placed side wall segments; and
a connecting section, wherein both ends of the connecting section are respectively connected to the two oppositely placed side wall sections.