Patent ID: 11871584
Assignee: KEPLER COMPUTING INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 10:
11. The device of claim 1, wherein the electrode structure is a first electrode structure, wherein the memory device is a first memory device, wherein the via electrode is a first via electrode, and wherein the device further comprises:
a fourth conductive interconnect on a first plane behind the first conductive interconnect on a second plane;
a second memory device above the fourth conductive interconnect;
a second electrode structure coupled between the second memory device and the fourth conductive interconnect, the second electrode structure comprising the first conductive hydrogen barrier layer; and
a second via electrode comprising the second conductive hydrogen barrier layer and the second conductive fill material, and wherein the contact electrode structure is further on and electrically coupled with the second via electrode.