Patent ID: 11908817
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A package comprising:
a plurality of device dies forming a die stack, wherein each of the plurality of device dies comprises:
a semiconductor substrate;
a circuit at a surface of the semiconductor substrate;
a through-via penetrating through the semiconductor substrate;
a top surface dielectric layer;
a dummy bond pad in the top surface dielectric layer;
a bottom surface dielectric layer; and
a dangling bond pad in the bottom surface dielectric layer, wherein each of the dangling bond pad in an upper one of the plurality of device dies is bonded to the dummy bond pad in an underlying one of the plurality of device dies, and the dummy bond pad is a terminal node of an electrical path comprising the dummy bond pad, the dangling bond pad, and the circuit.