Patent ID: 11915967
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A semiconductor device, comprising:
a semiconductor substrate, comprising:
a shallow trench; and
active areas, isolated from the shallow trench; wherein,
an oxygen-containing layer is formed at a bottom of the shallow trench and surfaces of the active areas;
an etch stop layer is formed at a set height of the shallow trench, the etch stop layer and the shallow trench forming an air gap, the set height being lower than heights of the active areas;
a shallow trench isolation structure containing the air gap is formed on the etch stop layer in the shallow trench, and the shallow trench isolation structure is formed by filling an isolation layer;
wordline trenches are formed in the shallow trench isolation structure and the active areas, wherein bottoms of the wordline trenches in the shallow trench isolation structure are higher than the set height; and
an edge region of the semiconductor substrate comprises etching holes penetrating through the etch stop layer, the etching holes filled by the isolation layer.