Patent ID: 11880537
Assignee: nan
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A device, comprising:
a memory;
a processor, connected to the memory, to:
receive electronic information;
analyze the electronic information
display, based on analyzing the electronic information, the electronic information on a graphical user interface,
where:
the displayed electronic information is shown as a first electronic formation, where the first electronic formation is located on a first electronic layer that is displayed and is visible on the graphical user interface, and where additional electronic information is within a second electronic formation, where:
the second electronic formation is on a second electronic layer, where:
 the second electronic formation is not visible on the graphical user interface, and
 the first electronic formation is electronically related to the second electronic formation in a hierarchical relationship;

receive an electronic communication, based on selection of the first electronic formation;
change the display on the graphical user interface, where:
the changed display is visibly displaying the second electronic formation, where:
the first electronic layer and the second electronic layer both electronically move on a z-axis within an x-y-z electronic three-dimensional space,
no borders or separation are displayed between the first electronic layer and the second electronic layer the graphical user display
the second electronic layer is electronically located at a particular distance on the z-axis of the x-y-z electronic three-dimensional space,
the second electronic layer visibly displays the second electronic formation and the first electronic formation is not visible on the second electronic layer, where:
the change in the display of the second electronic formation and the non-display of the first electronic formation occurs simultaneously, and
the z-axis of the x-y-z electronic three-dimensional space is not visible on the graphical user interface such that the x-y-z electronic three-dimensional space is displayed as an electronic x-y two-dimensional space, and
the first electronic layer and the second electronic layer results in displaying greater amounts of electronic information and reducing computer processing time and resources.