Patent ID: 11860671
Assignee: WINBOND ELECTRONICS CORP.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 3:
4. The memory-control logic as claimed in claim 2, wherein when the available memory-size ratio is 50%, the array-control circuit sequentially searches for the damaged region in a first half region of the memory-cell array,
wherein when the array-control circuit has found the damaged region in the first half region, the array-control circuit sequentially searches for a good region in a second half region of the memory-cell array,
wherein when the array-control circuit has found the good region but has not found the nearest good region, the array-control circuit programs the redirecting mapping table that corresponds to the damaged region to a region index corresponding to the good region, and sets the region-failure flag corresponding to the good region to 1,
wherein the array-control circuit further programs the redirecting mapping table corresponding to each region in the second half region to the region index in the corresponding location in the first half region.