Patent ID: 11908831
Assignee: STMICROELECTRONICS PTE LTD
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A process, comprising:
opening trenches from a top surface of a production wafer that extend down through scribe areas to a depth that is only partially through a semiconductor substrate, said trenches delimiting integrated circuit locations;
prior to performing a bumping process, attaching a first handle to the top surface of the production wafer;
thinning at a back surface of the semiconductor substrate to reach the trenches and form a wafer level chip scale package at each integrated circuit location;
attaching a second handle to a bottom surface of the thinned semiconductor substrate for the wafer level chip scale packages;
removing said first handle to expose underbump metallization pads at the top surface; and
performing said bumping process to form a solder ball at each of the exposed underbump metallization pads.