Patent ID: 11894077
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. The controller as set forth in claim 9, wherein the controller is further configured to:
instruct the memory apparatus to determine the smart verify programming voltage in the smart verify operation by performing at least one program-verify iteration of at least some of the memory cells connected to the one of the plurality of word lines and associated with the first one of the plurality of strings using a voltage value which starts as a predetermined first initial voltage and is sequentially increased in each of the plurality of smart verify loops by a voltage step amount following each failure to successfully program until programming of the memory cells connected to the one of the plurality of word lines and associated with the first one of the plurality of strings is completed, the smart verify programming voltage being the voltage value when the programming of the memory cells connected to the one of the plurality of word lines and associated with the first one of the plurality of strings is completed; and
instruct the memory apparatus to program at least some of the memory cells connected to at least another one of the plurality of word lines using the smart verify programming voltage acquired in the smart verify operation as a starting program voltage for programming.