Patent ID: 11923225
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A device, comprising:
a memory comprising processor executable instructions; and
one or more processors operatively coupled to the memory that upon executing the processor executable instructions cause performance of operations comprising:
detecting, from a load port adjacent to an interface module, docking of a front opening unified pod (FOUP) onto the load port;
controlling a gas supply to initiate a gas flow, wherein the gas flow creates a laminar air curtain across an opening defined in the interface module;
controlling an interface door of the interface module adjacent to the FOUP to reveal the opening after control of the gas supply to initiate the gas flow;
controlling an operating machine to transfer a semiconductor wafer through the opening between the FOUP and the interface module;
controlling the interface door to cover the opening; and
controlling the gas supply to halt the gas flow after control of the interface door to cover the opening.