Patent ID: 11954093
Assignee: ALIBABA GROUP HOLDING LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A method for heapifying a hardware binary tree that comprises K nodes distributed across N node levels, each of the K nodes being a hardware node comprising interface circuitry and storage circuitry, wherein K and N are integers greater than three, the method comprising:
assigning and storing K initial data elements received by the interface circuitry of the K nodes from a host system to the storage circuitry of the K nodes, the N node levels comprising a first node level, a second node level that is a child level of the first node level, a third node level that is a child level of the second node level, and a fourth node level that is a child level of the third node level; and
heapifying the hardware binary tree by heapifying the first and third node levels and the second node level in an interleaving manner in machine cycles of the host system, by generating one or more indication signals, wherein heapifying the hardware binary tree comprises:
heapifying data elements stored in nodes of the first node level and the third node level in a first cycle of the machine cycles; and
heapifying data elements stored in nodes of the second node level in a second cycle of the machine cycles,

wherein heapifying the data elements stored in the nodes comprises receiving the data elements from a corresponding multiplexer, sequentially performing comparison on two of the received data elements, and updating the node according to a result of the comparison.