Patent ID: 11869133
Assignee: IMAGINATION TECHNOLOGIES LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A computer-implemented method of performing intersection testing between one or more rays and elements identified by nodes of a hierarchical acceleration structure, wherein:
a ray is defined by ray information;
a node identifies one or more elements for intersection testing, wherein at least some of the elements identified by the overall hierarchical acceleration structure are represented by a further node of the hierarchical acceleration structure;
wherein the computer-implemented method comprises iteratively performing a serial-mode ray intersection process of:
obtaining one or more ray requests, each ray request identifying a ray and a node of the hierarchical structure identifying elements for which the ray of the ray request will undergo intersection testing;
processing the one or more ray requests and the hierarchical acceleration structure to identify, for each ray request, any actual intersections between the ray of the ray request and the elements identified by the node of the ray request; and
for each ray request:
determining if the ray actually intersects with more than a first predetermined number of elements represented by further nodes of the hierarchical acceleration structure; and
in response to the ray actually intersecting with more than the first predetermined number of elements represented by further nodes, generating up to the first predetermined number of new ray requests, each new ray request identifying the ray of the ray request and a further node that represents an element identified as intersecting the ray of the ray request.