Patent ID: 11877885
Assignee: UNIVERSITY OF PITTSBURGH—OF THE COMMONWEALTH SYSTEM OF HIGHER EDUCATION
Field: Medical technology (Instruments)
Classification: CPC A | IPC A

Claim 0:
1. An implantable system for monitoring patency of a free flap connected to a blood supply including a blood vessel, comprising:
a transmit transducer structured to be coupled to the blood vessel,
a receive transducer structured to be coupled to the blood vessel; and
a plurality of circuitry modules coupled to the transmit transducer and the receive transducer, wherein the plurality of hardware-only circuitry modules are implemented as part of a monolithic microchip and are structured to:
insonify a blood flow volume within the blood vessel through the transmit transducer and receive a scattered signal from the receive transducer, the scattered signal being generated in response to the blood flow volume being insonified,
extract a baseband Doppler blood flow signal, VBASEBAND, from the scattered signal,
extract a plurality of features from VBASEBAND, and
classify the plurality of features and generate a binary signal based on the classification of the plurality of features, wherein the binary signal will have a first state responsive to the classification of the plurality of features indicating that a flow rate within the blood vessel is less than a predetermined level and a second state responsive to the classification of the plurality of features indicating the flow rate within the blood vessel is greater than or equal to the predetermined level,

wherein the plurality of hardware-only circuitry modules include:
analog front end circuitry coupled to the transmit transducer and the receive transducer, wherein the analog front end circuitry is structured to insonify the blood flow volume within the blood vessel through the transmit transducer and receive the scattered signal from the receive transducer, and wherein the analog front end circuitry is structured to extract VBASEBAND;
zero crossing feature extractor circuitry coupled to the analog front end circuitry, wherein the zero crossing feature extractor circuitry is structured to receive VBASEBAND from the analog front end circuitry and generate, for a predetermined window period, a first voltage signal, VZCR, based on VBASEBAND that is a measure of a zero crossing rate of VBASEBAND and that comprises a first one of the plurality of features;
energy feature extractor circuitry coupled to the analog front end circuitry, wherein the energy feature extractor circuitry is structured to receive VBASEBAND from the analog front end circuitry and generate, for the predetermined window period, a second voltage signal, VENERGY, based on VBASEBAND that is a measure of a energy of VBASEBAND and that comprises a second one of the plurality of features;
signal sampling circuitry coupled to the zero crossing feature extractor circuitry and the energy feature extractor circuitry, wherein the signal sampling circuitry is structured to receive VZCR and generate a first sampled signal VZCR,SH, from VZCR and to receive VENERGY and generate a second sampled signal, VENERGY,SH from VENERGY; and
feature classification circuitry coupled to the signal sampling circuitry, wherein the feature classification circuitry is structured to classify the plurality of features and generate the binary signal based on at least VZCR,SH and VENERGY,SH, and

wherein the plurality of hardware-only circuitry modules are structured to implement a voting protocol to generate the binary signal based on VZCR,SH and VENERGY,SH and a number of additional sampled signals generated from VBASEBAND during a predetermined time period.