Patent ID: 11907044
Assignee: INFINEON TECHNOLOGIES AG
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. A memory device comprising:
a memory cell;
a plurality of evaluation elements, wherein each evaluation element of the plurality of evaluation elements is connectable with the memory cell of the memory device and is configured to evaluate a physical parameter, of the memory cell, comprising at least one of a voltage at the memory cell, a potential at the memory cell, a current through the memory cell or an electrical resistance of the memory cell;
an interconnection unit configured for:
at a first time, connecting the memory cell to a first evaluation element but not a second evaluation element in a first state; and
at a second time, connecting the memory cell to the second evaluation element but not the first evaluation element in a second state; and

an evaluation unit configured for:
obtaining a first evaluation result of the memory cell in the first state based on one or more first evaluations of one or more physical parameters of the memory cell;
obtaining a second evaluation result of the memory cell in the second state based on one or more second evaluations of one or more physical parameters of the memory cell;
determining a deviation between the first evaluation result and the second evaluation result; and
storing a deviation information, that is based on the deviation, in a memory of the memory device.