Patent ID: 11906581
Assignee: NAGRAVISION SàRL
Field: Telecommunications (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 11:
12. A hardware component comprising:
at least one set of digital elements defining a plurality of operational datapaths;
a control element acting on a working condition of the hardware component;
a logic test circuit for processing data operations along a reference datapath of the plurality of operational datapaths, the reference datapath having a minimum duration corresponding to at least a longest of the plurality of operational datapaths in the hardware component,
wherein the hardware component is configured to:
(a) obtaining a random or pseudo-random value and using the random or pseudo-random value to adjust, by the control element, a working condition of the hardware component to generate an adjusted working condition;
(b) measure, by the logic test circuit, a reaction of the hardware component to the adjusted working condition through processing data operations along the reference datapath;
(c) detect, by the logic test circuit, whether an error has taken place along the reference datapath based on the reaction measured at step (b);
(d) in response to a detection, at step (c), that the error has occurred, modify, by the control element, the adjusted working condition, to generate a modified working condition.