Patent ID: 11973107
Assignee: SUZHOU ORIENTAL SEMICONDUCTOR CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A manufacturing method of a semiconductor super-junction device, comprising:
forming a first insulating layer on an n-type substrate and etching the first insulating layer to form an opening;
forming an insulating sidewall in the opening;
etching the n-type substrate using the first insulating layer and the insulating sidewall as a mask to form a first groove in the n-type substrate;
forming a p-type column in the first groove such that the p-type column and the n-type substrate form a pn junction structure;
forming a second insulating layer on a surface of the p-type column; and
etching off the insulating sidewall; and etching the n-type substrate using the first insulating layer and the second insulating layer as a mask to form a second groove in the n-type substrate.