Patent ID: 11915743
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 15:
16. The circuit of claim 15, wherein:
the first inverter comprises:
a first PMOS transistor coupled between a first voltage terminal and the second pass gate transistor, the first PMOS transistor having a gate coupled to the first data terminal;
a first NMOS transistor coupled between a second voltage terminal and the second pass gate transistor, the first NMOS transistor having a gate coupled to the first data terminal; and

the second inverter comprises:
a second PMOS transistor coupled between the first voltage terminal and the first pass gate transistor, the second PMOS transistor having a gate coupled to the second data terminal;
a second NMOS transistor coupled between the second voltage terminal and the first pass gate transistor, the second NMOS transistor having a gate coupled to the second data terminal.