Patent ID: 11893949
Assignee: SHARP DISPLAY TECHNOLOGY CORPORATION
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. The display device according to claim 1,
wherein the first power source line is a high voltage side power source line,
the second power source line is a low voltage side power source line, and
the pixel memory circuit includes
a first P-channel transistor including a source terminal connected to the first power source line, a drain terminal connected to the second node, and a gate terminal connected to the first node,
a first N-channel transistor including a source terminal connected to the second power source line, a drain terminal connected to the second node, and a gate terminal connected to the first node,
a second P-channel transistor including a source terminal connected to the first power source line, a drain terminal connected to the first node, and a gate terminal connected to the second node, and
a second N-channel transistor including a source terminal connected to the second power source line, a drain terminal connected to the first node, and a gate terminal connected to the second node.