Patent ID: 11935612
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The memory of claim 5, wherein the first reference circuit comprises:
a sixth transistor configured to enable a source to be electrically connected to a third voltage node, a drain to be electrically connected to the second voltage node, and a gate to be electrically connected to a reference voltage;
a seventh transistor configured to enable a source to be electrically connected to the second voltage, a drain to be electrically connected to the third voltage node, and a gate to be electrically connected to each of the gate of the sixth transistor and the reference voltage; and
an eighth transistor configured to enable a source to be electrically connected to the second voltage, a drain to be electrically connected to the third voltage node, and a gate to be electrically connected to the reference voltage signal.