Patent ID: 11968835
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A vertical type semiconductor device, comprising:
a stacked structure disposed on a semiconductor substrate that includes a plurality of insulation layers and a plurality of first conducive patterns that are alternately and repeatedly stacked;
a plurality of channel holes passing through the stacked structure, and extending into an upper inner portion of the substrate;
a blocking layer, a charge storage layer, a tunnel insulation layer and a channel layer sequentially stacked on a surface of each of the channel holes, and
wherein the blocking layer, the charge storage layer and the tunnel insulation layer include a cutting region disposed between a bottom of the stacked structure and an upper surface the substrate; and
a semiconductor layer interposed between the substrate and the stacked structure, wherein the semiconductor layer contacts the channel layers in the cutting region, the stacked structure is disposed on the semiconductor layer, and the semiconductor layer connects the channel layers to each other,
wherein a sidewall of each of the channel holes includes an inflection point where an inclination changes.