Patent ID: 11881266
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 12:
13. The controller as set forth in claim 12, wherein the controller is further configured to:
instruct the memory apparatus to continue floating the plurality of semi-circle bit lines at the bit line pre-charge voltage during the erase operation; and
instruct the memory apparatus to drive the plurality of full circle bit lines from zero volts to an erase voltage during the erase operation and cause the semi-circle erase voltage on each of the plurality of semi-circle bit lines to increase due to the capacitive coupling between each of the plurality of semi-circle bit lines and at least one neighboring one of the plurality of full circle bit lines adjacent to each of the plurality of semi-circle bit lines, the semi-circle erase voltage being equal to the bit line pre-charge voltage plus the erase voltage.