Patent ID: 11967469
Assignee: TDK CORPORATION
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method of manufacturing an electronic component, the method comprising:
covering a surface of a substrate with a planarizing layer;
forming, on the planarizing layer, a first conductive layer including a lower electrode and a loop shaped conductive pattern;
covering the planarizing layer and first conductive layer with a dielectric film made of a material different from that of the planarizing layer;
laminating an upper electrode on the lower electrode through the dielectric film; and
removing a part of the dielectric film formed on an outer periphery of the planarizing layer without removing another part of the dielectric film formed between the lower electrode and the loop shaped conductive pattern; and
forming a first insulating layer covering the first conductive layer, dielectric film, and upper electrode after the removing.