Patent ID: 11881272
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A nonvolatile memory device comprising:
at least one memory block including a plurality of cell strings, each of the plurality of cell strings including a string selection transistor, a plurality of memory cells, and a ground selection transistor, the string selection transistor, the plurality of memory cells, and the ground selection transistors between a source line and a bit-line and connected in series in a vertical direction; and
a control circuit configured to control a program operation by,
applying a second voltage to a selected word-line of the plurality of cell strings to precharge channels of the plurality of cell strings to a first voltage during a bit-line set-up period of each of a plurality of program loops;
applying the second voltage to unselected word-lines of the plurality of cell strings during a bit-line set-up period of a first program loop from among the plurality of program loops;
applying a negative voltage, which decreases in a step-wise manner as a number of the program loops increases, to the unselected word-lines of the plurality of cell strings during a bit-line set-up period of each of the plurality of program loops except the first program loop; and
applying a program voltage, which increases in a step-wise manner as the number of the program loops increases, to the selected word-line of the plurality of cell strings while applying a program pass voltage having a fixed levels to the unselected word-lines of the plurality of cell strings during a program execution period of each of the plurality of program loops.