Patent ID: 11901033
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. The operating method of claim 3, further comprising:
outputting as a decoder output signal, first data received from page buffers connected to the first bit line group through a first wired OR line, second data received from page buffers connected to the second bit line group through a second wired OR line, third data received from page buffers connected to the third bit line group through a third wired OR line, and fourth data received from page buffers connected to the fourth bit line group through a fourth wired OR line, the outputting according to column repair information;
calculating a fail bit count of the first through fourth data based on the decoder output signal, the first through fourth data being programmed in a program operation; and
determining a program pass or a program fail, the determining according to the fail bit count.