Patent ID: 11953973
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A memory device, comprising:
one or more components configured to:
detect a first read failure associated with a page type or a memory section of the memory device;
perform a set of read recovery operations to recover from the first read failure,
wherein the set of read recovery operations are performed according to a first sequence of read recovery operations stored by the memory device;

identify a read recovery operation, of the set of read recovery operations, that results in successful recovery from the first read failure;
increment a success counter, stored by the memory device, based on the read recovery operation resulting in successful recovery from the first read failure;
generate a second sequence of read recovery operations that prioritizes the read recovery operation as compared to the first sequence,
wherein a position of the read recovery operation within the second sequence is based on a value of the success counter or is based on a flag that is set based on the value of the success counter;

maintain a default initial read recovery operation in an ordinal first position of an active sequence of read recovery operations until the value of the success counter satisfies a threshold or until the flag is set to an enabled state;
detect a second read failure associated with the page type or the memory section; and
perform one or more read recovery operations, to recover from the second read failure, according to the second sequence.