Patent ID: 11864375
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A method for manufacturing a memory, comprising,
providing a substrate, the substrate comprising an isolation structure and an active area, the isolation structure comprising a first isolation structure and a second isolation structure that are adjacent;
performing an etching process to form a first groove of the second isolation structure, a third groove of the first isolation structure, and a second groove of the active area, the third groove having an opening width less than an opening width of the first groove in a direction parallel to a surface of the substrate and being filled with a third gate structure;
performing a first deposition process to form a first conductive layer filled at a bottom of the first groove; and
performing a second deposition process to form a second conductive layer filled above the first conductive layer and in the third groove and the second groove, the first conductive layer having a work function greater than a work function of the second conductive layer, the first conductive layer and the second conductive layer filled in the first groove constituting a first gate structure, and the second conductive layer filled in the second groove constituting a second gate structure,
wherein a material of the first gate structure is different from a material of the second gate structure, and a material of the third gate structure is same as the material of the second gate structure.