Patent ID: 11882578
Assignee: QUALCOMM INCORPORATED
Field: Digital communication (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 25:
26. The apparatus of claim 23, wherein the one or more processors are further configured to cause the UE to:
receive a downlink data transmission on a downlink shared channel, wherein the uplink control information comprises acknowledgement feedback corresponding to the data transmission on the downlink shared channel;
determine that a first time between receiving the downlink data transmission and transmitting the acknowledgement feedback and the uplink data transmission satisfies a first threshold time;
determine that a second time between receiving the downlink control message and transmitting the acknowledgement feedback and the uplink data transmission satisfies a second threshold time; and
multiplex the acknowledgement feedback and the uplink data transmission based at least in part on the first time satisfying the first threshold time and the second time satisfying the second threshold time.