Patent ID: 11915656
Assignee: LG DISPLAY CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. A gate driver comprising a plurality of stages, each being configured to output first and second scan signals and comprising:
a first transistor having a gate electrode connected to a Q node, and a source electrode and a drain electrode connected between a second gate-low line and a first output terminal from which the first scan signal is output;
a second transistor having a gate electrode connected to a QB node, and a source electrode and a drain electrode connected between a gate-high line and the first output terminal;
a third transistor having a gate electrode connected to a low-clock signal line and a source electrode and a drain electrode connected between the Q node and a first output terminal of a previous stage among the plurality of stages;
a fourth transistor having a gate electrode connected to the Q node, and a source electrode and a drain electrode connected between the second gate-low line and the QB node;
a fifth transistor having a source electrode and a drain electrode connected between the gate-high line and the QB node;
a sixth transistor having a gate electrode connected to the first output terminal, and a source electrode and a drain electrode connected between a first gate-low line and a second output terminal from which the second scan signal is output; and
a seventh transistor having a gate electrode connected to a QN node, and a source electrode and a drain electrode connected between a high-clock signal line and the second output terminal,
wherein the QN node is electrically connected to the QB node,
wherein the first transistor, the second transistor, the third transistor, the fifth transistor, the six transistor and the second transistor are p-type transistors, and the fourth transistor is an n-type transistor.