Patent ID: 11935784
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. The method of claim 15, wherein forming the bit lines comprises:
depositing a continuous metallic liner comprising ruthenium, cobalt, nickel, titanium, tantalum, a metallic nitride material or a metallic carbide material on physically exposed sidewalls of the bit-line-level dielectric layer and the etch stop dielectric layer;
depositing a metallic fill material layer over the continuous metallic liner; and
removing upper portions of the metallic fill material layer and the continuous metallic liner such that remaining portions of the metallic fill material layer and the continuous metallic liner comprise combinations of a respective metallic liner and a respective metallic fill material portion having top surfaces below a horizontal plane including a top surface of the etch stop dielectric layer.