Patent ID: 11869614
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. A data storage device, comprising:
a controller means; and
a non-volatile memory (NVM) means coupled to the controller means, comprising:
a plurality of wordline means, each comprising a plurality of cells;
a hard decode voltage configured to read each cell of the plurality of cells; and
a cell statistics generator (CSG) coupled to the NVM means and the controller, comprising:
a left read sense means configured to read voltage values of each cell to the left of the hard decode voltage at a left read sense voltage;
a right read sense means configured to read voltage values of each cell to the right of the hard decode voltage at a right read sense voltage;
a first adder means for accumulating a plurality of read values of cells to the left of the hard decode voltage;
a second adder means for accumulating a plurality of read values of cells to the right of the hard decode voltage;
a first combiner means operating in additive mode to add the plurality of read values of cells to the left of the hard decode voltage and the plurality of values of cells to the right of the hard decode voltage with an expectation constant to calculate a deviation output, wherein based on a value of the deviation output, an optimizing and tuning unit is configured to shift the left read sense voltage and the right read sense voltage as a pair; and
a second combiner means operating in a subtractive mode to add the plurality of read values of cells to the left of the hard decode voltage and the plurality of read values of cells to the right of the hard decode voltage and subtract the expectation constant to calculate a dispersion output, wherein the expectation constant is an expected accumulation value of the plurality of values of cells to the left of the hard decode voltage and the plurality of values of cells to the right of the hard decode voltage.