Patent ID: 11900503
Assignee: IMAGINATION TECHNOLOGIES LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method of distributing a set of geometry processing tasks in a graphics processing unit comprising a plurality of cores, the method comprising:
receiving, by a master unit in one of the plurality of cores, the set of geometry processing tasks, wherein the set of geometry processing tasks comprises:
an indication of a set of elements in an element buffer, and
topology information, wherein the topology information defines the semantics of the element buffer;

grouping, by the master unit and based on the topology information, the elements into primitives;
splitting, by the master unit, the set of geometry processing tasks into at least a first trigger and a second trigger, wherein the first trigger comprises an indication of a first starting primitive in the element buffer and an instruction to render a first number of primitives starting from the first starting primitive, and the second trigger comprises an indication of a second starting primitive in the element buffer and an instruction to render a second number of primitives starting from the second starting primitive;
assigning, by the master unit, the first trigger to a first core of the plurality of cores;
assigning, by the master unit, the second trigger to a second core of the plurality of cores;
sending, by the master unit, the first trigger to the first core; and
sending, by the master unit, the second trigger to the second core.