Patent ID: 11923411
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. An integrated chip, comprising:
an isolation structure disposed within a trench in a substrate and defining an active region comprising a first doped region, a second doped region, and a middle region arranged between the first doped region and the second doped region along a first direction; and
a gate structure disposed over the active region and comprising a first gate electrode region and a second gate electrode region, the second gate electrode region including discrete segments disposed within openings of the first gate electrode region on opposite sides of the first doped region or the second doped region along a second direction perpendicular to the first direction, the first gate electrode region having a first composition and the second gate electrode region having a second composition different than the first composition;
a first divot and a second divot of the isolation structure disposed on opposite sides of the middle region of the active region along the second direction, the first divot and the second divot recessed below an uppermost surface of the isolation structure;
wherein the second gate electrode region comprises segments filling the first divot and the second divot.