Patent ID: 11899049
Assignee: REALTEK SEMICONDUCTOR CORPORATION
Field: Measurement (Instruments)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A comparison circuit having adaptive comparison mechanism, comprising:
a comparator configured to be enabled by an enabling signal at an enabling state in a comparison stage so as to compare a first voltage and a second voltage to generate a comparison result;
a comparison determining circuit configured to set a stage indication signal to be a comparison stage unfinished state in the comparison stage before the comparison result is generated, and set the stage indication signal to be a comparison stage finished state in the comparison stage after the comparison result is generated;
a time accumulating circuit configured to begin accumulating an accumulated time when the enabling signal is at the enabling state and stop accumulating the accumulated time when the stage indication signal is at the comparison stage finished state to generate a comparison time; and
a determining circuit configured to perform statistics on the comparison time in the comparison stage to generate a predetermined threshold time, and further set a predetermined comparison result to be the comparison result under the condition that the comparison result is not generated and the accumulated time exceeds the predetermined threshold time in the comparison stage.