Patent ID: 11935992
Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A process for fabricating an electronic device, comprising:
providing a first electronic component including a first electronic chip mounted to a first carrier substrate and encapsulated within a first overmolded block;
providing a second electronic component including a second electronic chip mounted to a second carrier substrate and encapsulated within a second overmolded block;
mounting the first and second electronic components to a side of a provisional carrier substrate, wherein the first electronic component is separated from the second electronic component by a distance;
placing the provisional carrier substrate with the mounted first and second electronic components in a cavity of a mold, with the provisional carrier substrate adjacent to a first face of the mold and with front sides of the first and second electronic components at least partially adjacent to a second face of the mold;
injecting an encapsulating material into the cavity so as to form an encapsulating and holding grid containing spaces in which the first and second electronic components are located; and
demolding a structure formed by the encapsulating and holding grid with the first and second electronic components from the mold.