Patent ID: 11922040
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. An operating method of a memory system including a memory device including a plurality of memory dies, each memory die including a plurality of memory blocks, the operating method comprising:
grouping the plurality of memory dies into a plurality of memory die groups;
setting a first super memory block which is a super memory block including at least one of memory blocks included in memory dies included in a first memory die group among the plurality of memory die groups, and a second super memory block which is a super memory block including at least one of memory blocks included in memory dies included in a second memory die group among the plurality of memory die groups; and
determining whether to set an extended super memory block in which all or part of the memory blocks included in the first super memory block and all or part of the memory blocks included in the second super memory block are included.