Patent ID: 11955983
Assignee: NORDIC SEMICONDUCTOR ASA
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. Analog to digital conversion circuitry, comprising:
an input sampling buffer, comprising an input sampling capacitor, for sampling an analog signal; and
a successive-approximation-register analog to digital converter (SAR-ADC) arranged to convert the analog signal, sampled by input sampling buffer, to a digital signal,, wherein the input sampling buffer further comprises an amplifier and a gain-control capacitor; and, wherein the input sampling buffer has an amplification configuration and an error-feedback configuration, wherein, when the input sampling buffer is in the amplification configuration, the input sampling capacitor is coupled to the amplifier and gain-control capacitor, with the gain-control capacitor connected in feedback with the amplifier, for applying gain to the analog signal sampled by the input sampling capacitor, and, when the input sampling buffer is in the error-feedback configuration, the gain-control capacitor is decoupled from the input sampling capacitor and is arranged to receive a residue voltage from the SAR-ADC, such that the level of the analog signal determined in the amplification configuration varies, at least in part, in dependence on the residue voltage received onto the gain-control capacitor in the error-feedback configuration.