Patent ID: 11929362
Assignee: SK HYNIX INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method of manufacturing a semiconductor integrated circuit device, the method comprising:
forming body contact region with a first depth in a semiconductor substrate by implanting first impurities;
forming isolation layers with a second depth for defining active regions in the semiconductor substrate, the second depth being shallower than the first depth;
forming a first and second wells in the semiconductor substrate by implanting second impurities with a conductivity type opposite to a conductivity of the first impurities, the first well formed to include the active regions and some of the isolation layers, the second well formed to contact a sidewall of the body contact region, and the second well including a third depth shallower than the first depth; and
forming junction electrodes in the semiconductor substrate,
wherein the first well includes the third depth, and the third depth is greater than the second depth being shallower than the first depth.