Patent ID: 11966718
Assignee: RENESAS ELECTRONICS CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A virtual developmental environment apparatus that performs vHILS (Virtual Hardware In the Loop Simulation) by simulating a MILS (Model In the Loop Simulation) model and jointly simulating a virtual ECU (Electronic Control Unit), the apparatus comprising:
a processing execution unit including a central processing unit and a first memory; and
a second memory for storing:
the MILS model including a controller block including an input port and an output port and a plant block to be controlled by the controller block;
a first setting information for identifying a controller block in the MILS model;
a program for realizing a function of the controller block to be used when executing a simulation of the virtual ECU; and
a second setting information for storing a list of I/O (Input/Output) ports available in the virtual ECU,

wherein the processing execution unit is configured to:
specify a controller block in the MILS model based on the first setting information;
arrange a bridge for connecting the input port and the output port and the I/O port of the virtual ECU to the input port and the output port of the identified controller block; and connect the bridge and the I/O port of the virtual ECU based on the second setting information.