Patent ID: 11967571
Assignee: FUJIAN JINHUA INTEGRATED CIRCUIT CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A semiconductor structure, comprising:
a substrate on which at least one semiconductor device and an interlayer dielectric layer are formed, the interlayer dielectric layer covering each semiconductor device;
an interconnect structure comprising a contact plug and a first contact pad, the contact plug extending through the interlayer dielectric layer to the semiconductor device, the first contact pad covering a top of the contact plug and extending laterally over part of a top surface of a shielding layer of the interlayer dielectric layer;
a second contact pad formed on the top surface of the interlayer dielectric layer and spaced apart from a side edge of the first contact pad; and
a trench between the first and second contact pads, the trench extending downward into the interlayer dielectric layer,
wherein the semiconductor device comprises a gate conductive layer formed on a top surface of the substrate, wherein the shielding layer covers a top surface of the gate conductive layer, wherein the contact plug is formed on a side edge of the gate conductive layer, and wherein the first contact pad extends laterally from the side edge of the gate conductive layer over the shielding layer,
wherein the second contact pad is formed and fully overlays on the shielding layer and an isolation plug is spaced apart from the first contact pad.