Patent ID: 11972815
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. An apparatus, comprising:
a plurality of memory cells arranged in a plurality of word lines;
a programming means in electrical communication with the plurality of memory cells for programming the memory cells, the programming means being configured to:
program the memory cells of a selected word line in a plurality of program-verify iterations while counting a number of program-verify iterations to complete programming,
compare the number of programming loops to complete programming to a predetermined criteria to determine if a plane containing the selected word line is at an elevated risk for read failure, and
in response to a determination that the plane containing the selected word line is at an elevated risk for read failure, conduct a post write read operation on at least one word line of the plurality of word lines.