Patent ID: 11941402
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A processor, comprising:
an arithmetic logic unit;
a vector load-store unit configured to generate effective addresses of load and store operations of the processor;
an operand vector register configured to store at least a plurality of elements; and
a vector index register configured to store a plurality of indices identifying respectively the plurality of elements stored in the operand vector register;
wherein during a vector operation, the processor is configured to generate an output vector using an input vector and the arithmetic logic unit, the input vector having the plurality of elements identified by the plurality of indices stored in the vector index register; and
wherein the vector load-store unit is further configured to, for each respective index stored in the vector index register, add the respective index to an effective address for accessing a corresponding position in the operand vector register.