Patent ID: 11935919
Assignee: MITSUBISHI ELECTRIC CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method for manufacturing a semiconductor device, comprising:
preparing a buffer layer having a first conductivity type;
forming, on the buffer layer, a drift layer in which an active region, an interface region that surrounds the active region, and a termination region that surrounds the interface region are defined, the drift layer having the first conductivity type;
forming a first impurity layer in a surface of the drift layer in the interface region, the first impurity layer having a second conductivity type;
forming, in a surface of the first impurity layer, a second impurity layer that has a side and a bottom covered with the first impurity layer and has a higher impurity concentration than the first impurity layer, the second impurity layer having the second conductivity type;
forming, on the first impurity layer and the second impurity layer on a termination region side, an insulating layer from which the first impurity layer and the second impurity layer on an active region side are exposed;
forming a first metal film and a second metal film in this order on the insulating layer and the drift layer; and
performing dry etching on the first metal film and the second metal film all together so that a position of a first end of a metallized layer, which is a remaining part of the first metal film, in the interface region on the termination region side and a position of a second end of an electrode, which is a remaining part of the second metal film, in the interface region on the terminal region side are the same in plan view, wherein
the first end and the second end are closer to the active region than an end of the second impurity layer on the termination region side in plan view.