Patent ID: 11868858
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. At least one non-transitory machine-readable medium including instructions that, when executed by processing circuitry, cause the processing circuitry to perform operations comprising:
creating a first pending interest table (PIT) entry for an interest packet that includes a name for a distributed machine learning (DML) round;
receiving a first data packet in response to the interest packet from a first node, the first data packet indicating that the first node will participate in the DML round;
creating a second PIT entry for the first data packet received that was sent by the first node in response to the interest packet;
transmitting the first data packet in accordance with the first PIT entry;
receiving a second data packet in response to the first data packet by a second node, the second data packet identifying a DML model; and
transmitting the second data packet in accordance with the second PIT entry to reach the first node.