Patent ID: 11871687
Assignee: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 14:
15. The memory device of claim 12, wherein when the positive bias is applied to the active electrode such that a first electric field is generated between the active electrode and the two-dimensional electron gas, a conductive filament electrically connecting the active electrode and the two-dimensional electron gas to each other is formed in a portion of the second oxide layer between a top face of the support structure and the active electrode so that the second oxide layer is brought into a low resistance state (LRS),
wherein when a negative bias is applied to the active electrode such that a second electric field having a direction opposite to a direction of the first electric field is generated between the active electrode and the two-dimensional electron gas, a portion of the conductive filament adjacent to the two-dimensional electron gas is destroyed such that the second oxide layer is brought into a high resistance state (HRS).