Patent ID: 11917834
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 19:
20. A method of forming an integrated assembly, comprising:
forming a construction having an array of pillars comprising semiconductor material; the array comprising rows and columns, with the rows extending along a row direction and with the columns extending along a column direction; the pillars having upper source/drain regions, lower source/drain regions, and channel regions between the upper and lower source/drain regions; the construction including gating structures extending along the row direction and being proximate to the channel regions, and including conductive structures extending along the column direction and being coupled with the lower source/drain regions; the construction including a first insulative material between the upper source/drain regions of the pillars; an upper surface of the construction extending across the first insulative material and across upper surfaces of the upper source/drain regions;
forming linear structures over the upper surface and extending along the column direction; each of the linear structures having a first lateral side and an opposing second lateral side; the linear structures comprising sacrificial material and another material along lateral sidewalls of the sacrificial material; sidewalls of the linear structures being along said other material;
forming bottom-electrode-material along the linear structures and along regions of the upper surface between the linear structures;
patterning the bottom-electrode-material into bottom-electrode-structures;
forming capacitor-insulative-material adjacent the bottom-electrode-structures and along the regions between the bottom-electrode-structures;
removing the sacrificial material to expose segments of the capacitor-insulative-material along the regions between the bottom-electrode-structures;
removing at least portions of the exposed segments of capacitor-insulative-material; and
forming top-electrode-material adjacent the capacitor-insulative-material.