Patent ID: 11942422
Assignee: nan
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A method of forming a microelectronic device, comprising:
forming a preliminary stack structure comprising a vertically alternating sequence of insulative structures and additional insulative structures arranged in tiers, each of the tiers comprising one of the insulative structures and one of the additional insulative structures;
forming a trench vertically extending into the preliminary stack structure;
forming a horizontally alternating sequence of dielectric spacer structures and dielectric liner structures within horizontal boundaries of the trench, at least some of the dielectric liner structures physically contacting different insulative structures of the preliminary stack structure than one another; and
at least partially replacing dielectric material of the dielectric liner structures and the insulative structures of the preliminary stack structure with electrically conductive material.