Patent ID: 11955971
Assignee: RAMBUS INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 14:
15. A memory module comprising:
one or more memory devices; and
a data buffer coupled to the one or more memory devices, the data buffer comprising:
a replica signal transmitter;
a sampling circuit coupled to the replica signal transmitter, wherein the sampling circuit is to determine a series of output voltage levels of a selected output of the replica signal transmitter, wherein the output voltage levels of the selected output are captured at different respective times; and
a measurement circuit coupled to the sampling circuit, wherein the measurement circuit is to compare the series of output voltage levels of the selected output of the replica signal transmitter to corresponding reference voltages to identify a first time when a first output voltage level of the selected output of the signal transmitter equals a first reference voltage and a second time when a second output voltage level of the selected output of the signal transmitter equals a second reference voltage, and wherein a time difference between the first time and the second time is used to configure a slew rate adjustment control of the replica signal transmitter.