Patent ID: 11921577
Assignee: LAPIS SEMICONDUCTOR CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 5:
6. A system-on-chip, comprising:
a semiconductor memory part that is formed by the semiconductor memory element according to claim 1;
a functional part that is configured to transmits and receives the data signal to and from the semiconductor memory part when executing a predetermined function using the data stored in the semiconductor memory element; and
a control part that is configured to control the semiconductor memory element and the functional part and to receive the uncorrectable error signal,
wherein when an uncorrectable error is detected in the data read from the semiconductor memory part, the semiconductor memory part is configured to transmit the uncorrectable error signal to the control part, and the control part is configured to transmit a control signal to at least one of the semiconductor memory part and the functional part and to execute a predetermined process on at least one of the semiconductor memory element and the functional part.