Patent ID: 11875153
Assignee: NEXT SILICON LTD
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. The system of claim 16, wherein the buffer storage comprises a plurality of buffer entries, each for storing a thread context of at least one of the one or more waiting threads;
wherein the registrar circuitry comprises a plurality of registrar entries, each for the purpose of tracking at least one of the one or more waiting threads;, wherein the additional dispatching circuitry is further configured for:
for at least one group of waiting threads of the one or more waiting threads, generating in the buffer storage a common thread context associated with each of the at least one group of waiting threads;
generating in the registrar circuitry a common registrar entry associated with each of the at least one group of waiting threads; and
when selecting from the registrar circuitry a new thread of the at least one group of waiting threads as the at least one waiting thread, computing at least one private context value of the new thread.