Patent ID: 11899057
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 1:
2. The method of claim 1, wherein
finding the first N-type heavily doped region located in the P-type substrate and the second N-type heavily doped region located in the N-well, both of which being adjacent to the first P-type heavily doped region comprises:
identifying, by taking the first P-type heavily doped region as a center and a preset distance as a radius, the first N-type heavily doped region and the second N-type heavily doped region, the distances of which to the first P-type heavily doped region being less than the preset distance; and
finding the first P-type heavily doped region located in the P-well and the second P-type heavily doped region located in the P-type substrate, both of which being adjacent to the first N-type heavily doped region comprises:
identifying, by taking the first N-type heavily doped region as a center and a preset distance as a radius, the first P-type heavily doped region and the second P-type heavily doped region, the distances of which to the first N-type heavily doped region being less than the preset distance.