Patent ID: 11861192
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. A storage controller, comprising:
a status checker configured to generate a status information set corresponding to a plurality of flash memory regions including a first flash memory region and a second flash memory region, to determine that the first flash memory region does not satisfy available memory conditions based on the status information set, and to determine that the second flash memory region satisfies the available memory conditions based on the status information set, wherein the determining that the first flash memory region does not satisfy available memory conditions based on the status information set is conducted by determining the first flash memory region as unavailable when a value obtained by subtracting a minimum value of a plurality of average erase counts of the plurality of flash memory regions from an average erase count of the first flash memory region is not smaller than a first threshold value; and
an interface circuit configured to output, to a host, first information indicating that the first flash memory region does not satisfy the available memory conditions and second information indicating that the second flash memory region satisfies the available memory conditions.