Patent ID: 11942416
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A semiconductor device, comprising:
a first channel, wherein the first channel comprises a semiconductor;
a second channel positioned directly above the first channel, wherein the second channel comprises a semiconductor;
a source/drain (S/D) region, wherein the S/D region electrically couples the first channel to the second channel;
a first isolation region, wherein the first isolation region is parallel to a length direction of the first channel and the second channel, and wherein the first isolation region has a bottommost surface;
a second isolation region, wherein the second isolation region is substantially parallel to the first isolation region, wherein the first channel and the second channel are between the first isolation region and the second isolation region, and wherein the second isolation region has a bottommost surface at a same level as the bottommost surface of the first isolation region; and
a contact, wherein the contact is directly on a top surface of the S/D region and directly on a first outer sidewall surface of the S/D region, wherein the contact is directly on a top surface of the first isolation region.