Patent ID: 11908545
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A memory device for computing in memory (CIM), comprising:
a plurality of memory banks, each of the plurality of memory banks comprising:
a first memory array, comprising least one bit line;
a plurality of latch circuits, coupled to the least one bit line, configured to latch data on the least one bit line; and
a local multiply accumulate (MAC) circuit, coupled to the plurality of latch circuits, configured to perform a first stage CIM operation on latched data latched in the plurality of latch circuits to provide a first stage CIM result; and

a global MAC circuit, coupled to the plurality of memory banks, configured to perform a second stage CIM operation on a plurality of first stage CIM results from the plurality of memory banks.