Patent ID: 11901236
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 10:
11. An integrated circuit (IC), comprising:
a substrate; and
a first transistor on the substrate, wherein the first transistor includes:
two first source/drain features,
a first fin base portion on the substrate,
a stack of first semiconductor layers and second semiconductor layers alternately stacked one over another, wherein the stack of the first and the second semiconductor layers are disposed vertically above the first fin base portion and laterally between the two first source/drain features, wherein the first and the second semiconductor layers include different materials,
a dielectric interfacial layer in direct contact with top and sidewalls of the stack of the first and the second semiconductor layers,
a first gate dielectric layer disposed over the dielectric interfacial layer,
a first gate electrode layer disposed over the first gate dielectric layer, and
first dielectric spacers disposed laterally between each of the second semiconductor layers and each of the two first source/drain features,

wherein the first semiconductor layers electrically connect the two first source/drain features.