Patent ID: 11894042
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 13:
14. The circuit for refreshing a row hammer of claim 13, wherein the word line state signal comprises a refresh state valid signal and a word line start pulse signal, and the state counting circuit comprises a second clock circuit, a second refresh state determination circuit and a reset circuit,
wherein the second clock circuit is configured to determine a second clock signal and a second inverted clock signal according to the preset row hammer refresh signal, the refresh state valid signal and the word line start pulse signal,
wherein the reset circuit is configured to determine a reset signal according to the refresh state valid signal, the word line start pulse signal and the first target state signal,
wherein the second refresh state determination circuit is configured to determine the first target state signal and the second target state signal according to the second clock signal, the second inverted clock signal and the reset signal,
wherein the refresh state valid signal indicates whether a memory array is in a refresh period at current time, and the word line start pulse signal indicates starting of any word line.