Patent ID: 11889777
Assignee: KIOXIA CORPORATION
Field: nan (nan)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor memory device comprising:
a substrate;
a first wiring disposed above the substrate and extending in a first direction;
a second wiring disposed between the substrate and the first wiring and extending in a second direction crossing the first direction;
a third wiring disposed between the substrate and the second wiring and extending in the first direction;
a fourth wiring being adjacent to the third wiring in a third direction crossing the first and second directions, the fourth wiring being electrically connected to the third wiring and extending in the first direction;
a fifth wiring disposed between the substrate and the fourth wiring and extending in the second direction;
a sixth wiring disposed between the substrate and the fifth wiring and extending in the first direction;
a first memory cell disposed between the first wiring and the second wiring;
a second memory cell disposed between the second wiring and the third wiring;
a third memory cell disposed between the fourth wiring and the fifth wiring;
a fourth memory cell disposed between the fifth wiring and the sixth wiring;
a first contact disposed between the first wiring and the sixth wiring, the first contact extending in the third direction and being electrically connected to the first wiring and the sixth wiring;
a second contact disposed between the first contact and the sixth wiring, the second contact extending in the third direction and being electrically connected to the first wiring and the sixth wiring; and
a third contact disposed between the second contact and the sixth wiring, the third contact extending in the third direction and being electrically connected to the first wiring and the sixth wiring.