Patent ID: 11869789
Assignee: TOKYO ELECTRON LIMITED
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 14:
15. The substrate processing apparatus of claim 1, wherein the first lower processing block includes a plurality of layers, which are stacked one above another, and the first main transfer mechanism shared by each of the plurality of layers of the first lower processing block to transfer the substrate,
wherein the first upper processing block includes a plurality of layers, which are stacked one above another, and a third main transfer mechanism shared by each of the plurality of layers of the first upper processing block to transfer the substrate,
wherein the second lower processing block includes a plurality of layers, which are stacked one above another, and the second main transfer mechanism shared by each of the plurality of layers of the second lower processing block to transfer the substrate,
wherein the second upper processing block includes a plurality of layers, which are stacked one above another, and a fourth main transfer mechanism shared by each of the plurality of layers of the second upper processing block to transfer the substrate,
wherein the third main transfer mechanism is different from the first main transfer mechanism, the second main transfer mechanism, the first shuttle, and the second shuttle, and
wherein the fourth main transfer device is different from the first main transfer mechanism, the second main transfer mechanism, the third main transfer mechanism, the first shuttle, and the second shuttle.