Patent ID: 11901277
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A semiconductor package, comprising:
a semiconductor die;
an encapsulant laterally encapsulating the semiconductor die; and
a first redistribution structure stacked on the encapsulant along a stacking direction and electrically connected with the semiconductor die, wherein the first redistribution structure comprises a first conductive via and a second conductive via disposed over the first conductive via along the stacking direction, a cross-sectional shape of the first conductive via along the stacking direction is trapezoid, a cross-sectional shape of the second conductive via along the stacking direction is inverted trapezoid, and wherein the encapsulant is not on sidewalls of the first redistribution structure, wherein the first redistribution structure further comprises first conductive wires, second conductive wires, third conductive wires and fourth conductive wires, the first conductive via is located between and in direct contact with the first conductive wires and the second conductive wires, the second conductive via is located between and in direct contact with the third conductive wires and the fourth conductive wires, and the first conductive wires, the first conductive via, the second conductive wires, the third conductive wires, the second conductive via and the fourth conductive wires are sequentially disposed along the stacking direction, a first contact area between the first conductive via and the first conductive wires is greater than a second contact area between the first conductive via and the second conductive wires, and a third contact area between the second conductive via and the third conductive wires is smaller than a fourth contact area between the second conductive via and the fourth conductive wires.