Patent ID: 11894047
Assignee: ANHUI UNIVERSITY
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A method for controlling a sense amplifier, wherein the sense amplifier comprises an amplification module and an offset voltage storage unit;
wherein the amplification module comprises:
a first p-channel metal-oxide semiconductor (PMOS) transistor;
a second PMOS transistor, a source of the second PMOS transistor being connected to a source of the first PMOS transistor;
a first n-channel metal-oxide semiconductor (NMOS) transistor, a drain of the first NMOS transistor being connected to a drain of the first PMOS transistor and a first terminal of the offset voltage storage unit, and a gate of the first NMOS transistor being connected to a gate of the first PMOS transistor; and
a second NMOS transistor, a drain of the second NMOS transistor being connected to a drain of the second PMOS transistor, a source of the second NMOS transistor being connected to a source of the first NMOS transistor, and a gate of the second NMOS transistor being connected to a second terminal of the offset voltage storage unit;

wherein the method comprises:
in an offset cancellation stage of the sense amplifier, configuring the first PMOS transistor and the second PMOS transistor as a current mirror, and configuring both the first NMOS transistor and the second NMOS transistor by using a diode connection mode, to store an offset voltage of the amplification module in the offset voltage storage unit, to realize offset compensation.