Patent ID: 11934266
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A system comprising:
a memory device; and
a processing device, operatively coupled to the memory device, to perform operations comprising:
selecting a source set of memory cells of the memory device, wherein the source set of memory cells are configured to store a first number of bits per memory cell;
performing a data integrity check on the source set of memory cells to obtain a data integrity metric value;
determining whether the data integrity metric value satisfies a threshold criterion; and
responsive to determining that the data integrity metric value fails to satisfy the threshold criterion, causing the memory device to copy data from the source set of memory cells to a destination set of memory cells of the memory device, wherein the destination set of memory cells are configured to store a second number of bits per memory cell, wherein the second number of bits per memory cells is greater than the first number of bits per memory cell.