Patent ID: 11972503
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A non-transitory computer readable storage medium storing software code which when executing on a processor performs a method of operating a graphics processor that is operable to execute a graphics processing pipeline that comprises plural processing stages including an early culling tester followed by a renderer;
wherein the graphics processor comprises plural culling test data buffers including at least a first culling test data buffer and a second culling test data buffer, wherein each of the plural culling test data buffers is operable to store a respective set of data values for use by the early culling tester;
the method comprising:
maintaining information that indicates which, if any, of the plural culling test data buffers are expected to be accessed by a processing stage of the graphics processing pipeline after the early culling tester, wherein:
the information indicates whether or not a processing stage of the graphics processing pipeline after the early culling tester is expected to access the first culling test data buffer; and
the information separately indicates whether or not a processing stage of the graphics processing pipeline after the early culling tester is expected to access the second culling test data buffer;

the method further comprising: using the information to control the early culling tester.