Patent ID: 11876032
Assignee: MURATA MANUFACTURING CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device comprising:
a substrate including a surface layer portion configured of a semiconductor material;
a bond layer disposed on the surface layer portion of the substrate and including at least one metal region in a plan view;
at least one semiconductor element disposed on the bond layer, the at least one semiconductor element including at least one first transistor disposed on a first metal region that is a metal region serving as the at least one metal region of the bond layer, and the first transistor including a collector layer electrically coupled to the first metal region, a base layer disposed on the collector layer, and an emitter layer disposed on the base layer,
a first emitter electrode disposed on the emitter layer of the first transistor and electrically coupled to the emitter layer; and
a first conductor protrusion disposed above the first emitter electrode, electrically coupled to the first emitter electrode, and protruding in a direction of going away from the substrate,
thermal conductivity of the semiconductor material of the surface layer portion of the substrate being higher than thermal conductivity of each of the collector layer, the base layer, and the emitter layer of the first transistor.