Patent ID: 11929327
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method, comprising:
forming a first conductive structure on a substrate, the first conductive structure comprising a first non-alloy metal;
forming a second conductive structure on the first conductive structure, the second conductive structure comprising a second non-alloy metal different from the first non-alloy metal;
wherein forming the second conductive structure comprises:
depositing an etch stop layer on the first conductive structure;
depositing a dielectric layer on the etch stop layer;
performing a first etch to form a via opening in the dielectric layer and the etch stop layer that exposes the first non-alloy metal;
performing a second etch through the via opening to form a recess in the first conductive structure;
depositing the second non-alloy metal to substantially fill both the recess and the via opening, wherein the second non-alloy metal is deposited in physical contact with the first non-alloy metal, the etch stop layer, and the dielectric layer; and
annealing the second non-alloy metal to convert a portion of the second non-alloy metal into a conductive non-alloy metal oxide along interfaces between the second non-alloy metal and the dielectric layer and to limit cobalt concentration diffused from the first non-alloy metal to less than about 6 atomic percent along grain boundaries in the second non-alloy metal.