Patent ID: 11887554
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 1:
2. A gate drive circuit driven by the method according to claim 1, the gate drive circuit including at least two cascaded shift registers, each shift register, comprising the pull-up node, the first pull-down node, the input sub-circuit, the first noise reduction sub-circuit, the first pull-down sub-circuit, the reset sub-circuit, the initialization sub-circuit, the first pull-down control sub-circuit, the first output sub-circuit, the second noise reduction sub-circuit, the second output sub-circuit and the fifth noise reduction sub-circuit,
wherein the first noise reduction sub-circuit is coupled to the pull-up node, the first pull-down node and the first voltage signal terminal;
the first noise reduction sub-circuit is configured to transmit the first voltage signal received at the first voltage signal terminal to the pull-up node under the control of the voltage of the first pull-down node;
the input sub-circuit is coupled to the pull-up node and the signal input terminal; the input sub-circuit is configured to transmit the input signal to the pull-up node in response to the input signal received at the signal input terminal;
the first pull-down sub-circuit is coupled to the signal input terminal, the first pull-down node and the first voltage signal terminal; the first pull-down sub-circuit is configured to transmit the first voltage signal received at the first voltage signal terminal to the first pull-down node in response to the input signal received at the signal input terminal, so that the first noise reduction sub-circuit is turned off under the control of the voltage of the first voltage signal transmitted to the first pull-down node to stop transmitting the first voltage signal to the pull-up node;
the reset sub-circuit is coupled to the pull-up node, the first voltage signal terminal and the reset signal terminal; the reset sub-circuit is configured to transmit the first voltage signal received at the first voltage signal terminal to the pull-up node in response to the reset signal received at the reset signal terminal;
the initialization sub-circuit is coupled to the pull-up node, the initialization signal terminal and the first voltage signal terminal; the initialization sub-circuit is configured to transmit the first voltage signal received at the first voltage signal terminal to the pull-up node in response to the initialization signal received at the initialization signal terminal;
the first pull-down control sub-circuit is coupled to the first voltage signal terminal, the second voltage signal terminal, the pull-up node and the first pull-down node; and
the first pull-down control sub-circuit is configured to: transmit the second voltage signal received at the second voltage signal terminal to the first pull-down node in response to the second voltage signal received at the second voltage signal terminal and the voltage of the first voltage signal transmitted to the pull-up node; and
transmit the first voltage signal received at the first voltage signal terminal to the first pull-down node in response to the second voltage signal received at the second voltage signal terminal and a voltage of the input signal transmitted to the pull-up node;
the first output sub-circuit is coupled to the clock signal terminal, the pull-up node and the first signal output terminal; and
the first output sub-circuit is configured to transmit the clock signal received at the clock signal terminal to the first signal output terminal under control of the voltage of the input signal transmitted to the pull-up node;
the second noise reduction sub-circuit is coupled to the first pull-down node, the third voltage signal terminal and the first signal output terminal; and
the second noise reduction sub-circuit is configured to transmit the third voltage signal received at the third voltage signal terminal to the first signal output terminal under the control of the voltage of the first pull-down node;
the second output sub-circuit is coupled to the pull-up node, the clock signal terminal and the second signal output terminal; and
the second output sub-circuit is configured to transmit the clock signal received at the clock signal terminal to the second signal output terminal under the control of the voltage of the input signal transmitted to the pull-up node; and
the fifth noise reduction sub-circuit is coupled to the first pull-down node, the first voltage signal terminal and the second signal output terminal; and
the fifth noise reduction sub-circuit is configured to transmit the first voltage signal received at the first voltage signal terminal to the second signal output terminal under the control of the voltage of the first pull-down node.