Patent ID: 11908061
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A graphics processing unit (GPU) comprising:
a general purpose register (GPR);
a processing cluster comprising a plurality of processing cores configured for parallel operation, wherein each processing core of the plurality of processing cores is configured to utilize a respective dedicated portion of the GPR when processing instructions;
a shared memory for the plurality of processing cores; and
a memory read/write hub coupled to the GPR and the shared memory, the memory read/write hub comprising a crossbar switch,
wherein the GPU is configured to execute instructions of an instruction set architecture, wherein the instructions of the instruction set architecture comprise a move data instruction that comprises operands that reference a source portion of the GPR and a destination portion of the GPR; and
in response to execution of the move data instruction:
a processing core of the plurality of processing cores is configured to retrieve data from the source portion of the GPR; and
the memory read/write hub is configured to write, via the crossbar switch, the retrieved data to the destination portion of the GPR, the writing of the retrieved data occurring without first writing the retrieved data to the shared memory.