Patent ID: 11956342
Assignee: NVIDIA CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 19:
20. The system of claim 18, wherein:
the first device is further to:
power down the transmitter in response to initiating a second power-down sequence; and

the second device is further to:
receive a signal via the one or more lanes associated with transmitting the clock signal in response to the first device initiating the second power-down sequence;
determine a second number of pulses associated with the signal over the period;
determine the second number of pulses associated with the signal fail to satisfy the predetermined condition relating to the specified number of pulses for the period; and
initiate the power-down sequence in response to determining the second number of pulses fails to satisfy the predetermined condition relating to the specified number of pulses for the period.