Patent ID: 11875302
Assignee: VISION ENGINEERING, INC.
Field: IT methods for management (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 0:
1. A method for packaging and verifying a lot of kitted devices on a verification system comprising a processing unit and verification hardware, the method including providing an operator; the operator logging into the processing unit of the system; the operator scanning an order document; the system retrieving information from a database of the processing unit regarding one or more components to be verified and packaged for each kitted device; the system configuring hardware for the one or more components that require verification; the system configuring the screen or display devices with status indicators for the one or more components; the operator beginning to package the one or more components according to standard work, verifying the one or more components as the one or more components are handled; the system prompting the operator to scan/verify the one or more components; and the operator scanning/verifying the one or more components, wherein the verification system enforces packaging order of each component by requiring the component to be verified as it is handled for packaging.