Patent ID: 11899567
Assignee: CIRRUS LOGIC INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 19:
20. A method, comprising:
in a system comprising:
a memory programmed with multiple firmware images, wherein each firmware image of the multiple firmware images has an associated entry point that is distinct from the entry point of the other firmware images;
a processor;
a hardware register writable with an address; and
a controller that is external to the processor;

initially seeding the hardware register with an address that is an initial entry point of an initial firmware image among the multiple firmware images;
by the external controller: holding the processor in an initial reset, reading, the initial entry point from the hardware register, writing the initial entry point to the processor, and causing the processor to fetch its first instruction out of the initial reset from the memory at the initial entry point read from the hardware register;
after the external controller reads the initial entry point, writing the hardware register with a second entry point of a second firmware image among the multiple firmware images other than the initial firmware image;
to facilitate a transition from running the initial firmware image to the second firmware image, by the external controller:
holding the processor in a second reset subsequent to the initial reset, reading the second entry point from the hardware register, writing the second entry point to the processor, and releasing the processor from the second reset to cause the processor to fetch its first instruction out of the second reset from the memory at the second entry point read from the hardware register.