Patent ID: 11895838
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A vertical memory device comprising:
gate electrode structures on a substrate, each of the gate electrode structures including gate electrodes spaced apart from each other in a first direction substantially perpendicular to an upper surface of the substrate and sequentially stacked in a staircase shape, each of the gate electrodes extending in a second direction substantially parallel to the upper surface of the substrate, and the gate electrode structures being spaced apart from each other in a third direction substantially parallel to the upper surface of the substrate and crossing the second direction;
a channel extending on the substrate in the first direction through each of the gate electrode structures; and
a division pattern structure on the substrate, the division pattern structure being electrically insulated from the channel and including:
vertical insulating portions spaced apart from each other in the second direction and arranged in a zigzag pattern, each of the vertical insulating portions extending in the first direction and completely filling an opening through an entire thickness of a corresponding one of the gate electrode structures, and
a horizontal portion extending from a sidewall of each of the vertical insulating portions in a horizontal direction substantially parallel to the upper surface of the substrate, upper surfaces of the horizontal portion and vertical insulating portions being integral and coplanar with each other,
wherein the vertical insulating portions of the division pattern structure are connected with each other via the horizontal portion, such that the division pattern structure extends in the second direction to divide the gate electrode structures in the third direction.