Patent ID: 11864373
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 2:
3. The method for manufacturing a semiconductor structure of claim 1, wherein the removing a part of the dielectric layer and a part of the first conductive layer on the first barrier layer, to reserve a part of the dielectric layer and a part of the first conductive layer on the first barrier layer closer to the peripheral region comprises:
forming a second photoresist layer on the first conductive layer, wherein an orthographic projection of the second photoresist layer on the substrate partially overlaps an orthographic projection of a part of the first barrier layer on the substrate;
etching the first conductive layer and the dielectric layer by taking the second photoresist layer as a mask, so as to expose the first barrier layer; and
removing the second photoresist layer.