Patent ID: 11886361
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. An operating method of a memory controller, the operating method comprising:
transferring plural map entries read from a memory device to both a buffer memory and a map data controller included in the memory controller, each map entry representing a mapping relationship between a logical address and a physical address;
concurrently with transferring the plural map entries to the buffer memory, detecting, by the map data controller, in order outputted during the transferring, a map entry having a requested logical address provided from the host among the plural map entries;
outputting, by the map data controller, an interrupt signal to a processor included in the memory controller when the map entry having the requested logical address is detected; and, controlling the memory device to perform an operation according to the map entry having the requested logical address in response to a read request provided along with the requested logical address from the host.