Patent ID: 11955095
Assignee: LAPIS TECHNOLOGY CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 3:
4. The output circuit according to claim 1,
wherein the third voltage control circuit includes
a first load element comprising a first PMOS transistor and a second PMOS transistor and connected between the source or the drain of the first PMOS transistor switch and the back gate of the first PMOS transistor switch,
a first current source that sets a value of a current that flows through the first load element, and
a first back gate control switch that applies the reference power supply voltage to the back gate of the first PMOS transistor switch when the first back gate control switch is turned on, and stops application of the reference power supply voltage to the back gate of the first PMOS transistor switch when the first back gate control switch is turned off,
wherein, when the first PMOS transistor switch is controlled such that the first PMOS transistor switch is brought into in an on state, the first load element receives the voltage of the source or the drain of the first PMOS transistor switch as the first voltage, outputs a voltage obtained by shifting the level of the first voltage by a voltage difference based on the value of the current that flows through the first load element as the second voltage and supplies the second voltage to the back gate of the first PMOS transistor switch, and
wherein, when the first PMOS transistor switch is controlled such that the first PMOS transistor switch is brought into an off state, the first back gate control switch is turned on and supplies the reference power supply voltage to the back gate of the first PMOS transistor switch.