Patent ID: 11914972
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 19:
20. The data processing apparatus as claimed in claim 18, wherein incrementing the head pointer is an atomic sequence number compare-and-swap-max operation, wherein success of the atomic sequence number compare-and-swap-max operation is contingent on a write-attempt value of the head pointer being greater than a current value of the head pointer wherein a wrap-around enumeration of the multiple slots of the ring buffer wraps around from a numerically largest sequence number to a numerically smallest sequence number, and wherein the atomic sequence number compare-and-swap-max operation is arranged to determine that the write-attempt value is greater than the current value when the write-attempt value is ahead of the current value in the wrap-around enumeration by less than half of the numerically largest sequence number.