Patent ID: 11888963
Assignee: CYPRESS SEMICONDUCTOR CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. A system comprising:
a first wireless device adapted to gain access to a secured enclosure by transmitting data comprising a frame delimiter; and
a second wireless device located within the secured enclosure, the second wireless device comprising:
a receiver to wirelessly receive a packet over a channel at a first frequency and generate a sampled stream of data from the packet at a first sample rate corresponding to the first frequency;
a data resampler circuit coupled to the receiver, the data resampler circuit comprising:
a re-timer engine to determine, using a fractional rate between the first sample rate and a crystal oscillator (XO)-integer-divided sample rate, a plurality of re-timer values comprising differences between pulses of a pseudo clock corresponding to the XO-integer-divided sample rate and closest corresponding pulses of a clock corresponding to the first sample rate; and
a time shifting circuit to re-sample data values of the sampled stream of data associated with locations of the plurality of re-timer values; and

a correlation circuit coupled to the data resampler circuit, the correlation circuit to use the re-sampled data values, the pseudo clock, and the plurality of re-timer values to match an expected data pattern to a corresponding data pattern detected in a frame delimiter of the packet.