Patent ID: 11914473
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. The non-transitory computer-readable medium of claim 16, wherein the instructions to determine the error are further executable by the processor to:
generate a plurality of second sets of parity bits associated with the plurality of protocol units, wherein each protocol unit has a respective set of second parity bits;
compare respective parity bits from a plurality of first sets of parity bits with respective parity bits from the plurality of second sets of parity bits; and
determine that one or more parity bits from the plurality of first sets of parity bits do not match corresponding parity bits from the plurality of second sets of parity bits, wherein determining the error associated with the one or more protocol units of the plurality of protocol units is based at least in part on determining that the one or more parity bits from the plurality of first sets of parity bits do not match the corresponding parity bits from the plurality of second sets of parity bits.