Patent ID: 11908835
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of manufacturing a semiconductor structure, comprising:
providing a substrate;
disposing a first conductive pillar, a second conductive pillar and a third conductive pillar over the substrate, the first conductive pillar comprising a first height, the second conductive pillar comprising a second height, and the third conductive pillar comprising a third height different from the first height and the second height;
disposing a first die over the first conductive pillar, the first die comprising a first surface distal to the substrate;
disposing a second die over the second conductive pillar, the second die comprising a second surface distal to the substrate, wherein the first surface of the first die and the second surface of the second die are at substantially same level; and
disposing an underfill material over the substrate, wherein the underfill material encapsulates the first conductive pillar, the second conductive pillar and the third conductive pillar.