Patent ID: 11967587
Assignee: MARVELL ISRAEL (M.I.S.L) LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. The method of claim 13, wherein:
the memory module comprises a plurality of separate memory sub-modules and the second PCB comprises a plurality of separate second PCBs respectively corresponding to the plurality of separate memory sub-modules, each separate second PCB having one or more memory IC chips disposed on the separate second PCB, and each separate second PCB having a subset of the second contact structures disposed on a bottom surface of the separate second PCB;
stacking and aligning the memory module on the IC package comprises stacking and aligning each separate memory sub-module on the IC package; and
electrically coupling the second contact structures of the memory module to the third contact structures of the package substrate comprises electrically coupling each subset of the second contact structures of each memory sub module to a respective subset of the third contact structures of the package substrate.