Patent ID: 11901362
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A device comprising:
first nanostructures;
a gate dielectric on the first nanostructures; and
a first gate electrode comprising:
a first layer on the gate dielectric, the first layer comprising an n-type work function metal, the first layer being disposed in an area between the first nanostructures;
a second layer on the first layer, the second layer comprising a barrier material, the barrier material being different from the n-type work function metal, the area between the first nanostructures being free of the second layer; and
a third layer on the second layer, the third layer comprising a p-type work function metal, the p-type work function metal being different from the n-type work function metal, the p-type work function metal being different from the barrier material.