Patent ID: 11950410
Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A semiconductor device comprising:
a stack including:
a first conductor;
a first insulator over the first conductor;
a second conductor, a first oxide, a third conductor over the first insulator;
a second insulator over the second conductor, the first oxide, and the third conductor; and
a fourth conductor over the second insulator;

a cylindrical third insulator arranged to penetrate the stack;
a second oxide in the cylindrical third insulator;
a first transistor comprising the first oxide;
a second transistor comprising the second oxide;
a first wiring electrically connected to one of source and drain of the second transistor; and
a second wiring electrically connected to the other of source and drain of the second transistor,
wherein the second conductor is electrically connected to one of source and drain of the first transistor,
wherein the third conductor is electrically connected to a gate of the second transistor and the other of source and drain of the first transistor, and
wherein the first conductor, the second conductor, the first oxide, the third conductor, and the fourth conductor are arranged in a ring-like shape which surrounds the cylindrical third insulator.