Patent ID: 11942433
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A structure comprising:
a first integrated circuit die comprising post passivation interconnects (PPIs);
a dielectric layer on the PPIs;
first conductive vias extending through the dielectric layer, the first conductive vias connected to the PPIs;
a second integrated circuit die comprising a semiconductor substrate and die connectors, the semiconductor substrate bonded to the dielectric layer with an adhesive;
a first encapsulant surrounding the second integrated circuit die and the first conductive vias, the first encapsulant and the first integrated circuit die being laterally coterminous;
second conductive vias adjacent the first integrated circuit die;
a second encapsulant surrounding the second conductive vias, the first encapsulant, and the first integrated circuit die; and
a first redistribution structure comprising first redistribution lines, the first redistribution lines connected to the first conductive vias, the die connectors, and the second conductive vias.