Patent ID: 11881262
Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The resistive random access memory device according to claim 4, able to carry out memory operations, in particular at least one logic operation, said control circuit being further provided with: a control logic block configured to produce drive signals of the respective gates of said isolation transistors according to at least one digital operating mode selection signal emitted over one or more inputs of said control logic block and of a volatile logic data as input of said control logic block, to select between a first operating mode of the read circuit corresponding to a read operation and at least one other operating mode of the read circuit corresponding to the implementation of at least one logic operation between at least one non-volatile data stored in the given cell of the given row of cells and the volatile logic data as input of said control logic block, said control logic block being configured to:
when the digital selection signal has a first value corresponding to a selection of a read operation: apply drive signals of the gate of the first isolation transistor and to the gate of the second isolation transistor corresponding to the second control signal,
when the digital selection signal has a value different from the first value and corresponding to a selection of a logic operation: transmit a first drive signal to the gate of the first isolation transistor and a second drive signal to the gate of the second isolation transistor, so as to block one of said first and second isolation transistors while rendering conducting the other of said first and second isolation transistors.