Patent ID: 11960429
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. An apparatus comprising:
a Peripheral Component Interconnect Express (PCIe) switch, including,
a plurality of PCIe upstream interfaces;
a plurality of PCIe downstream interfaces; and
switching circuitry, configurable to selectively couple each PCIe upstream interface to one or more PCIe downstream interfaces and to selectively couple each PCIe downstream interface to one or more PCIe upstream interfaces;

wherein the apparatus is configured to be installed in a system including a plurality of host nodes having memory, the memory for a host node including one or more application address spaces, the system further including a plurality of PCIe Input/Output (I/O) devices,
wherein during operation of the system PCIe upstream interfaces are operatively coupled to host nodes via PCIe links, each PCIe I/O device is operatively coupled to a respective PCIe downstream interface via a respective PCIe link between the PCIe I/O device and the PCIe downstream interface, and the PCIe switch is configured to,
receive packets from the plurality of PCIe I/O devices at the PCIe downstream interfaces to which the PCIe I/O devices are operatively coupled, the packets relating to PCIe transactions initiated by the PCIe I/O devices;
for at least a portion of the packets that are received,
inspect the packet to determine its destination memory address, the destination memory address comprising a memory address in an application address space for one of the plurality of host nodes; and
forward the packet internally within the PCIe switch from the PCIe downstream interface at which the packet is received to a PCIe upstream interface operatively coupled to a host node having an application address space including the destination memory address.