Patent ID: 11966309
Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. A computer system, comprising:
a processor; and
a memory coupled to the processor and storing instructions which, when executed by the processor, cause the processor to perform a method, the method comprising:
detecting a testing card with a plurality of test ports which are coupled to a plurality of input/output (I/O) slots of a computing device;
communicating with the plurality of test ports via the plurality of I/O slots;
generating, by the computing device, a script for each test port, wherein the script comprises a data pattern including read operations and write operations to be executed by the testing card on a memory device associated with the computing device;
allowing the plurality of test ports to execute the script and perform the corresponding read operations and write operations included in the data pattern,
thereby facilitating testing of the plurality of I/O slots of the computing device in parallel by the plurality of test ports of the testing card; and
modifying the script, wherein modifying the script comprises modifying, by a user via a display screen of the computing device or another computing entity, the script by adjusting parameters including at least one of a maximum payload size, a maximum read request size, and memory addresses associated with the read and write operations.