Patent ID: 11966348
Assignee: NVIDIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 1:
2. A method of operating a serial data bus at a plurality of different voltage levels, the method comprising:
dividing a series of data bits for communication on the serial data bus into a plurality of sequences of five bits each;
encoding and communicating a first two bits of each of the sequences of five bits on the serial data bus as a four-level symbol tone of four discrete voltage levels);
encoding and communicating a next three bits of each of the sequences of five bits on the serial data bus as two three-level symbols two voltage signals each being one of three discrete voltage levels); and
wherein the encoding of the next three bits is a selective encoding of the next three bits of each of the sequences of five bits on the serial data bus on condition that the first two bits of each of the sequences of five bits encodes as a four-level symbol at a highest symbol voltage level or a lowest symbol voltage level utilized by the serial data bus.