Patent ID: 11861492
Assignee: CADENCE DESIGN SYSTEMS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 19:
20. A non-transitory computer-readable medium comprising instructions that, when executed by a hardware processor of a device, cause the device to perform operations comprising:
converting a trained neural network that processes data in a floating-point domain to a quantized neural network that processes data in a fixed-point domain, the trained neural network comprising a set of floating-point layers, the quantized neural network comprising a set of fixed-point layers that corresponds to the set of floating-point layers;
determining a set of quantized multiple fan-in layers in the quantized neural network;
for a given quantized multiple fan-in layer in the set of quantized multiple fan-in layers:
analyzing a set of preceding layers of the given quantized multiple fan-in layer, the set of preceding layers connecting as input to the given quantized multiple fan-in layer;
determining, based on the analyzing of the set of preceding layers, whether a condition is satisfied for updating at least one preceding layer in the set of preceding layers to remove normalization; and
updating, based on the determining whether the condition is satisfied, the at least one preceding layer to remove normalization, the condition relating to a number of fan-out of one or more preceding layer in the set of preceding layers; and

generating, based on the quantized neural network as updated, executable code for operating a trained neural network model on a target hardware processor, the trained neural network model implementing the quantized neural network.