Patent ID: 11886534
Assignee: INSPUR ELECTRONIC INFORMATION INDUSTRY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 2:
3. The filtering method according to claim 1, wherein, the input values of all the first valid positions fvp comprise: the input value of the first valid position fvp of the first fragment is the value of the first valid position fvp obtained after filtering the N-way parallel computing results of the previous clock cycle; S types of input values of the first valid position fvp of the second fragment are available, which are respectively fvp=S, fvp=S+1, fvp=S+2 fvp=S+S−1, fvp≥S+S; . . . and S types of input values of the first valid position fvp of the S-th fragment are available, which are respectively fvp=SS−S, fvp=SS−S+1 fvp=SS−1, fvp=SS.