Patent ID: 11871558
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A method for manufacturing a semiconductor memory device, the method comprising:
forming a stack structure including a plurality of semiconductor layers vertically stacked on a substrate;
forming a first hole and a second hole, the first hole and the second hole penetrating the stack structure;
partially etching the plurality of semiconductor layers exposed by the first and second holes to divide each of the plurality of semiconductor layers into a pair of semiconductor patterns;
forming a vertical insulator filling the first and second holes;
forming a gate electrode on the pair of semiconductor patterns;
forming a bit line on a side of the stack structure, the bit line extending vertically;
replacing a portion of each of the semiconductor patterns with a first electrode, the first electrode extending horizontally;
forming a second electrode on the first electrode; and
forming a dielectric layer between the first electrode and the second electrode.