Patent ID: 11864473
Assignee: WINBOND ELECTRONICS CORP.
Field: nan (nan)
Classification: CPC H | IPC G  H

Claim 13:
14. A method of fabricating a resistive random-access memory device, comprising:
forming a dielectric layer on a substrate;
forming a first electrode material layer on the dielectric layer;
patterning the first electrode material layer to form a first electrode;
forming a variable resistance material layer on sidewalls and a top surface of the first electrode and the dielectric layer;
forming a second electrode material layer on the variable resistance material layer; and
patterning the second electrode material layer and the variable resistance material layer to form a second electrode and a variable resistance layer, wherein
the second electrode covers the sidewalls and the top surface of the first electrode;
the variable resistance layer is sandwiched between the top surface of the first electrode and the second electrode and between the sidewall of the first electrode and the second electrode, and is located between the second electrode and the dielectric layer;
forming a barrier pad on the dielectric layer, wherein a top surface of the barrier layer is in contact with a bottom surface of the first electrode and a bottom surface of the variable resistance layer.