Patent ID: 11967275
Assignee: HKC CORPORATION LIMITED
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 9:
10. A display panel, comprising:
a light-emitting drive circuit, comprising:
cascaded N light-emitting drive sub-circuits, and an n-th light-emitting drive sub-circuit comprising: a first pull-up control sub-circuit, a pull-up sub-circuit, a first pull-down control sub-circuit, a second pull-down control sub-circuit, and a pull-down sub-circuit, wherein, n∈[1, N];
wherein an input of the first pull-up control sub-circuit is configured to be connected to a first power supply, a control end of the first pull-up control sub-circuit is configured to receive a first clock signal and a (n+1)-th stage light-emitting drive signal, an output of the first pull-up control sub-circuit is in electrical connection with a first node, and the first pull-up control sub-circuit is configured to pull up a potential of the first node to a first potential in a trigger phase;
wherein an input of the first pull-down control sub-circuit is configured to receive a (n−1)-th stage light-emitting drive signal, a control end of the first pull-down control sub-circuit is configured to receive a second clock signal, an output of the first pull-down control sub-circuit is in electrical connection with the first node, and the first pull-down control sub-circuit is configured to pull down the potential of the first node to a second potential in an output phase and to pull up the potential of the first node to a third potential in a reset phase;
wherein an input of the pull-up sub-circuit is configured to be connected to the first power supply, a control end of the pull-up sub-circuit is in electrical connection with a first node, an output of the pull-up sub-circuit is in electrical connection with a light-emitting drive-signal output, and the pull-up sub-circuit is configured to pull up a n-th stage light-emitting drive-signal output from the light-emitting drive-signal output to a high potential in a case that a potential of the first node is the first potential or the third potential;
wherein an input of the second pull-down control sub-circuit is configured to receive the first clock signal and to be connected to the first power supply respectively, a control end of the second pull-down control sub-circuit is configured to be connected to the first node and to receive the second clock signal respectively, an output of the second pull-down control sub-circuit is in electrical connection with a second node, and the second pull-down control sub-circuit is configured to pull up a potential of the second node to a fourth potential in the output phase; and
wherein an input of the pull-down sub-circuit is configured to be connected to a second power supply, a control end of the pull-down sub-circuit is in electrical connection with the second node, an output of the pull-down sub-circuit is in electrical connection with the light-emitting drive-signal output, and the pull-down sub-circuit is configured to pull down the n-th stage light-emitting drive-signal output from the light-emitting drive-signal output to a low potential in a case that the potential of the second node is the fourth potential; and

a plurality of pixel drive circuits, connected to the light-emitting drive circuit, wherein the light-emitting drive circuit is configured to output corresponding light-emitting drive signals to the plurality of pixel drive circuits.