Patent ID: 11875152
Assignee: EMC IP HOLDING COMPANY LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. A node, comprising:
user space file system;
an application;
memory;
a plurality of cores; and
a processor, wherein the processor is configured to perform a method for generating thread queues, comprising:
obtaining, by the user space file system, central processing unit (CPU) socket data, the CPU socket data comprising:
identities of processors, identities of a plurality of cores of the processors, and in which sockets the processors reside; and

for each core in the plurality of cores:
generating at least one thread handle to associate with the core;
maintaining, to associate with the core, a thread queue comprising a plurality of thread handles, the plurality of thread handles comprising the at least one thread handle generated for each core in the plurality of cores; and
ordering, within the thread queue, the plurality of thread handles based on a latency and a cache locality between the core associated with the thread queue and other cores in the plurality of cores;

saving the thread queues to a region of the memory,
wherein the region of the memory is shared by the application and the user space file system;

receiving, by a process coordinator, a file request specifying a core identifier corresponding to the core;
identifying the thread queue associated with the core identifier;
selecting a first thread handle of the plurality of thread handles ordered within the thread queue; and
directing the file request to be executed on a thread associated with the first thread handle,
wherein the file request is subsequently executed on the thread associated with the first thread handle.