Patent ID: 11862281
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 7:
8. The method of claim 7, wherein;
said forming a contact hole layer on the word lines and the substrate comprises:
forming a dielectric layer on the substrate and the word lines,
etching the dielectric layer to form a second groove extending along the Y-axis direction, the second groove penetrating through the dielectric layer and exposing the word lines and the substrate, and
forming the contact hole layer in the first grooves and the second groove;

said etching the metal layer and the contact hole layer comprises:
forming 2*N masks on the metal layer, each of the masks spanning the second groove along the X-axis direction and covering one of the word lines along the Y-axis direction, and
sequentially etching the metal layer and the contact hole layer, reserving the metal layer below each of the masks to form the 2*N metal lines, and reserving the contact hole layer below each of the metal lines to form the 2*N contact holes.