Patent ID: 11907119
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A non-transitory computer-readable medium storing code comprising instructions which, when executed by a processor of a first device, cause the first device to:
issue to a second device a first sequence of write commands for writing a set of data stored at a set of memory addresses by the second device, the first sequence of write commands indicating different memory addresses, of the set of memory addresses, in an order;
issue, to the second device after issuing the first sequence of write commands, a second sequence of read commands for reading the set of data by the second device to the first device, the second sequence of read commands indicating the different memory addresses in the same order as the first sequence of write commands; and
receive, from the second device, the set of data based at least in part on issuing the second sequence of read commands.