Patent ID: 11871582
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region, the method comprising:
in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region; the multiple time-spaced microwave annealing steps reducing average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps, the reduced average concentration of elemental-form H being 0.005 to less than 1 atomic percent.