Patent ID: 11954048
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. A non-transitory, computer-readable storage medium storing a computer program comprising instructions which, when executed on a host data processing apparatus, control the host data processing apparatus to provide an instruction execution environment for execution of target code; the computer program comprising:
memory management program logic to control access to simulated memory based on access control information defined in table entries of a table structure comprising a plurality of levels of access control table; and
table accessing program logic to access the table structure to obtain the access control information corresponding to a target simulated address; in which:
for a given access control table at a given level of the table structure other than a starting level:
the table accessing program logic is configured to select a selected table entry of the given access control table corresponding to the target simulated address, based on an offset portion of the target simulated address, the selected table entry providing either a pointer to an access control table at a next lowest level of the table structure or the access control information corresponding to the target simulated address; and
the table accessing program logic is configured to determine a size of the offset portion of the target simulated address based on a variable nesting control parameter specified in a table entry of a higher-level access control table at a higher level of the table structure than the given access control table.