Patent ID: 11876096
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A method of forming a semiconductor device, comprising:
forming a shallow trench isolation structure in an upper region of a semiconductor substrate that has a doping of a first conductivity type, wherein the shallow trench isolation structure laterally surrounds a plurality of semiconductor active regions that are patterned portions of the semiconductor substrate, have lengthwise edges that are parallel to a first horizontal direction, and are laterally spaced apart along a second horizontal direction that is perpendicular to the first horizontal direction;
forming a gate strip over the plurality of semiconductor active regions, wherein the gate strip comprises a plurality of gate dielectrics and a gate electrode strip;
forming a dielectric gate spacer around the gate strip;
forming deep source/drain regions by implanting dopants of a second conductivity type that is an opposite of the first conductivity type into portions of the plurality of semiconductor active regions that are not masked by the gate strip and the dielectric gate spacer; and
dividing the gate electrode strip into a plurality of gate electrodes that are laterally spaced apart along the second horizontal direction and overlie a respective one of the plurality of semiconductor active regions after forming the deep source/drain regions.