Patent ID: 11908751
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A method comprising:
etching a first trench and a second trench in a substrate, the first trench having a first width, the second trench having a second width, the second width greater than the first width;
depositing a liner material in the first trench and the second trench with an atomic layer deposition process;
depositing a flowable material on the liner material and in the first trench and the second trench with a contouring flowable chemical vapor deposition process;
converting the liner material and the flowable material to a solid insulation material, the solid insulation material filling the first trench, the solid insulation material lining the second trench, a portion of the second trench remaining unfilled by the solid insulation material;
forming a hybrid fin in the portion of the second trench unfilled by the solid insulation material; and
recessing the solid insulation material to form a first isolation region in the first trench and to form a second isolation region in the second trench, the hybrid fin protruding above the second isolation region.