Patent ID: 11887685
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. The method of claim 6, wherein said executing the second FB position determination step to determine the bit position of the second FB in each target repair region and performing second repair processing on the second FB according to the bit position of the second FB comprises:
if the bank feature map state is the first initial state, determining whether the bank feature map state is consistent with a first determination state in a first state set, the first determination state comprising that the available RBL count is greater than a first preset numerical value and a maximum of FB counts on respective WLs is equal to the first preset numerical value; and
if the bank feature map state is consistent with the first determination state, executing a second repair processing step in the first determination state,
wherein the second repair processing step in the first determination state comprises:
a repair step in the first determination state: acquiring a first maximum bit position corresponding to a first BL maximum FB in the segmenting feature map, and
triggering executing of the first initial repair processing step to repair the FB at the first maximum bit position; and
a determination step in the first determination state: determining whether the segmenting feature map subjected to the repair step in the first determination state satisfies a first determination condition, the first determination condition comprising that the target FB count is greater than 0, the available RBL count is greater than 0, and a next remaining RWL count is greater than or equal to 0, and
if the segmenting feature map subjected to the repair step in the first determination state satisfies the first determination condition, executing the repair step in the first determination state.