Patent ID: 11954587
Assignee: DEEPX CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A system comprising:
a substrate;
a first semiconductor chip, mounted on the substrate, provided for a first neural processing unit (NPU) configured to perform operations of an artificial neural network (ANN) model;
a second semiconductor chip, mounted on the substrate, provided for a second NPU configured to perform operations of an ANN model; and
a third semiconductor chip, mounted on the substrate, configured to generate a control signal to selectively output one or more clock signals,
wherein the control signal to selectively output the one or more clock signals is generated based on a power measured by a power management integrated circuit,
wherein each of the first NPU and the second NPU includes a plurality of processing elements (PEs), and the plurality of PEs include an adder, a multiplier, and an accumulator,
wherein the one or more clock signals include an original clock signal and one or more phase-delayed clock signals based on a phase of the original clock signal,
wherein a first clock signal among the one or more clock signals is applied to the first NPU according to the control signal, and
wherein a second clock signal among the one or more clock signals is applied to the second NPU according to the control signal.