Patent ID: 11940470
Assignee: ALLEGRO MICROSYSTEMS, LLC
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 6:
7. A substrate, comprising:
one or more first conductive layers;
one or more second conductive layers that are electrically coupled to the first conductive layers, the first conductive layers and the second conductive layers being arranged to form a conductor, the first conductive layers being arranged to define a first rift in the conductor; and
a dielectric material that is arranged to encapsulate, at least in part, the first conductive layers and the second conductive layers,
wherein the one or more first conductive layers include at least two first conductive layers, and at least one of the second conductive layers is disposed between the first conductive layers, dividing the first rift into two portions.