Patent ID: 11881448
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 1:
2. A semiconductor package structure, comprising:
a first package, comprising:
a first substrate having a first surface and a second surface opposite to the first surface;
an electronic component embedded in the first substrate;
a trace layer having an uppermost conductive layer embedded in the first substrate and exposed from the first surface of the first substrate, wherein the trace layer comprises a first portion within a vertical projection area of the electronic component and a second portion outside of the vertical projection area of the electronic component; and
a first conductive structure embedded in the first substrate and connecting the second portion of the trace layer to the second surface of the first substrate,
wherein the first conductive structure comprises a pillar connected to the second portion of the trace layer, and a central axis of the pillar is misaligned with a central axis of the second portion of the trace layer in a vertical direction.