Patent ID: 11894391
Assignee: nan
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A contact resistance monitoring device, which is applied to monitor a contact resistance between a source and drain metal layer and a pixel electrode layer in a display panel, and is disposed in a non-display area of the display panel, wherein the contact resistance monitoring device comprises:
a substrate;
a gate metal layer disposed on the substrate;
an interlayer dielectric layer disposed on the substrate, wherein the interlayer dielectric layer is provided with a recessed hole, and the recessed hole exposes the gate metal layer;
the source and drain metal layer disposed in the recessed hole and electrically connected to the gate metal layer; and
the pixel electrode layer disposed on the interlayer dielectric layer and the source and drain metal layer, and electrically connected to the source and drain metal layer;

wherein a width of the recessed hole is greater than a width of the gate metal layer, such that at least a part of a bottom of the recessed hole is a structure of the interlayer dielectric layer.