Patent ID: 11892865
Assignee: EXCELIO TECHNOLOGY (SHENZHEN) CO., LTD.
Field: Control (Instruments)
Classification: CPC G  H | IPC G  H

Claim 5:
6. The mixed signal control circuit for eliminating the degenerate metastable state of the bandgap reference circuit according to claim 5, wherein: when the delay generation circuit is an analog circuit, the delay generation circuit includes a second resistor R2 and a first capacitor C1, wherein the second resistor R2 and the first capacitor C1 form a low-pass filter, and an output terminal of the low-pass filter is connected to a first control gate of the transmission gate circuit formed by a fifth P-type MOS transistor PM5 and a second N-type MOS transistor NM2, and the output terminal of the low-pass filter is further connected to a second control gate of the transmission gate circuit through a first inverter INV, an input terminal of the transmission gate circuit is connected to an output terminal of the digital-to-analog conversion module, and an output terminal of the transmission gate circuit is connected to the voltage-clamped node in the bandgap reference circuit.