Patent ID: 11868174
Assignee: XILINX, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 11:
12. The multi-chip device of claim 11, wherein each programmable routing bridge of the programmable routing bridges includes, disposed in a respective chip of the chips, a first multiplexer, a first selective transmitting circuit, a second multiplexer, and a second selective transmitting circuit, wherein:
a first in-chip routing segment of the programmable clock routing network is disposed in the respective chip, the first in-chip routing segment being electrically connected to a first input node of the first multiplexer and to an output node of the second selective transmitting circuit;
a second in-chip routing segment of the programmable clock routing network is disposed in the respective chip, the second in-chip routing segment being electrically connected to a first input node of the second multiplexer and to an output node of the first selective transmitting circuit;
a third in-chip routing segment of the programmable clock routing network is disposed in another chip overlying or underlying the respective chip, the third in-chip routing segment being electrically connected to a second input node of the first multiplexer;
a fourth in-chip routing segment of the programmable clock routing network is disposed in the other chip, the fourth in-chip routing segment being electrically connected to a second input node of the second multiplexer;
an output node of the first multiplexer is electrically connected to an input node of the first selective transmitting circuit; and
an output node of the second multiplexer is electrically connected to an input node of the second selective transmitting circuit.