Patent ID: 11861758
Assignee: NVIDIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 28:
29. The non-transitory machine-readable medium of claim 27, wherein the packet data comprises a first portion of each of the set of packets, and the set of instructions, when performed by the one or more processors, cause the one or more processors to at least:
create a set of PPU memory buffers in the PPU memory, the set of PPU memory buffers comprising a corresponding PPU memory buffer for each of the set of packets, wherein causing the network interface to store the packet data in the PPU memory comprises storing the first portion of each of the set of packets in the corresponding PPU memory buffer;
creating a set of host memory buffers in a system memory, the set of host memory buffers comprising a corresponding host memory buffer for each of the set of packets; and
storing a second portion of each of the set of packets in the corresponding host memory buffer.