Patent ID: 11914484
Assignee: XI'AN UNIIC SEMICONDUCTORS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A Non-Volatile Dual In-line Memory Module (NVDIMM) controller, wherein the NVDIMM controller comprises a Double Data Rate (DDR) controller and a Not AND (NAND) flash memory controller, and is used to control an NVDIMM, the NVDIMM comprising a Dynamic Random Access Memory (DRAM) and a NAND flash memory, wherein the DDR controller uses and enables Data Bus Inversion (DBI), wherein the NVDIMM controller further comprises:
a data backup module for encoding N-bit Data Queue (DQ) and 1-bit DBI read by the DDR controller from the DRAM into N-bit Encoded Data Queue (EDQ), and sending the N-bit EDQ to the NAND flash memory controller; and
a data recovery module for decoding the N-bit EDQ read by the NAND flash memory controller from the NAND flash memory into N-bit DQ and 1-bit DBI, and sending the N-bit DQ and 1-bit DBI to the DDR controller, wherein the data backup module is used for under a condition that the N-bit DQ contains N/2 “1”s, causing the N-bit EDQ to be identical with the N-bit DQ, and the data backup module is used for under a condition that number of “1”s in the N-bit DQ is not N/2, index mapping the N-bit DQ into N−1 bits in the N-bit EDQ, in which N-bit EDQ number of “1”s is not N/2, and writing 1-bit DBI into remaining one bit in the N-bit EDQ.