Patent ID: 11935826
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A method comprising:
forming a first etch stop layer over and contacting a conductive feature;
forming a first passivation layer over the first etch stop layer, wherein the first passivation layer has a first porosity value;
forming a capacitor over the first passivation layer;
forming a second etch stop layer over the capacitor;
forming a second passivation layer over the second etch stop layer, wherein the second passivation layer has a second porosity value lower than the first porosity value;
forming a first redistribution line penetrating through the second passivation layer and the second etch stop layer to electrically connect to the capacitor; and
forming a second redistribution line penetrating through the second passivation layer, the first passivation layer, and the first etch stop layer to electrically connect to the conductive feature.