Patent ID: 11910596
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. An integrated assembly, comprising:
a memory region and another region adjacent the memory region;
channel-material-pillars arranged within the memory region, and conductive posts arranged within said other region;
a source structure coupled to lower regions of the channel-material-pillars;
a panel extending across the memory region and said other region, and separating a first memory-block-region from a second memory-block-region;
doped-semiconductor-material directly adjacent to the panel within the memory region and the other region; the doped-semiconductor-material being at least part of the source structure within the memory region; and
rings laterally surrounding only lower regions of the conductive posts; the rings being between the conductive posts and the doped-semiconductor-material; the rings comprising laminates of two or more materials, with at least one of the materials being configured as a tub and with another of the materials extending into said tub; and wherein one or more of said materials is insulative.