Patent ID: 11948892
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A method for forming a package structure, comprising:
forming first conductive structures and a first semiconductor die on a first side of a redistribution structure, wherein the first conductive structures are higher than the first semiconductor die;
forming second conductive structures on the first semiconductor die;
forming an interposer substrate in contact with the first conductive structures, wherein the interposer substrate has a greater width than the first semiconductor die;
forming a second semiconductor die on a second side of the redistribution structure;
forming a first passive device element on the first side of the redistribution structure, wherein the first passive device element and the first semiconductor die have different heights;
forming a protective layer in contact with the first conductive structures and the second conductive structures;
forming third conductive structures on the first semiconductor die and separated from the protective layer; and
forming a first underfill material between the first semiconductor die and the redistribution structure and surrounding the third conductive structures, wherein the protective layer and the third conductive structures are separated by the first underfill material.