Patent ID: 11893248
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A data storage device, comprising:
a memory device; and
a controller coupled to the memory device, wherein the controller is configured to:
receive a read command from a host device to read data from the memory device;
fetch the read data from the memory device;
check metadata associated with the read data;
determine if the metadata corresponds to the read command; and
provide modified read data to the host device when the metadata does not correspond to the read command, wherein the controller is further configured to fetch the metadata prior to fetching the read data, wherein the controller is further configured to store the metadata that is fetched in a comparison unit, wherein the controller is further configured to:
calculate cyclic redundancy code (CRC) for the read data; and
provide the calculated CRC to the comparison unit, wherein the metadata that is fetched includes an expected CRC, an expected namespace (NS), and an expected logical block address (LBA), and wherein the read command includes an actual CRC, an actual NS, and an actual LBA, wherein the controller is configured to:
compare the expected CRC, the actual CRC, and the calculated CRC; and
modify the read data when the expected CRC, the actual CRC, and the calculated CRC do not match.