Patent ID: 11915768
Assignee: SUNRISE MEMORY CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A memory array comprising a plurality of bit lines, a plurality of word lines, one or more source lines, a plurality of memory strings and a plurality of sense amplifiers, wherein (i) each memory string comprises a plurality of memory cells sharing an associated one of the bit lines, an associated one of the source lines, and an associated group of word lines, and (ii) each memory cell of each memory string, when selected during a read operation, provides a data signal representing content that is stored in the memory cell on the associated bit line of the memory cell, after biasing the associated bit line, the associate source line and the associated word line according to a predetermined manner; and wherein (i) the memory cells of the memory array are further grouped into one of more data groups of memory cells and one or more reference groups of memory cells; (ii) each memory cell in each data group is associated with a corresponding one of the memory cells in a corresponding one of the reference groups; and (iii) each memory cell in each data group and its corresponding memory cell in the corresponding reference group together are associated with a designated one of the plurality of sense amplifiers, such that, when that memory cell of that data group is selected during the read operation, the data signal of that memory cell and the data signal of its corresponding memory cell in the corresponding reference group are provided on their respective associated bit lines to the designated sense amplifier, which provides an output value representative of the content of that selected memory cell.