Patent ID: 11971816
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A host system comprising:
a memory device storing a local copy of a select portion of address mapping data; and
a processing device, operatively coupled to the memory device, the processing device configured to perform operations comprising:
generating a data request comprising a select logical memory address and a select physical memory address, the data request being generated based on a host-side address mapping entry from the local copy of the select portion, and the host-side address mapping entry describing a first mapping between the select logical memory address and the select physical memory address;
causing the data request to be sent from the host system to a memory sub-system;
determining whether a notification is received from the memory sub-system, the notification indicating whether the first mapping matches a second mapping described by a related address mapping entry in a remote copy of the select portion being stored on the memory sub-system, and the related address mapping entry being associated with the select logical memory address; and
in response to determining that the notification is received from the memory sub-system, updating the local copy of the select portion based on the remote copy of the select portion.