Patent ID: 11915779
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 3:
4. The apparatus of claim 1, wherein:
the first plurality of transistors comprises:
a first transistor having a first drain operable to couple with a second voltage source, a first source coupled with the third portion, and a first gate operable to couple the first drain with the first source; and
a second transistor having a second drain operable to couple with the second voltage source, a second source coupled with the third portion, and a second gate operable to couple the second drain with the second source; and

the second plurality of transistors comprises:
a third transistor having a third drain coupled with the third portion, a third source operable to couple with a third voltage source, and a third gate operable to couple the third drain with the third source; and
a fourth transistor having a fourth drain coupled with the third portion, a fourth source operable to couple with the third voltage source, and a fourth gate operable to couple the fourth drain with the fourth source.