Patent ID: 11915055
Assignee: THROUGHPUTER, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 3:
4. The multi-user multi-stage manycore processing system of claim 3, further comprising a non-transitory memory remote to each of the plurality of hardware processor stages, the non-transitory memory storing configuration bitfiles corresponding to each of the plurality of users and each of a plurality of application tasks, the system being configured to:
access the non-transitory memory to select, on behalf of the respective user for a given hardware processor stage and a given reconfigurable logic region, a configuration bitfile corresponding to an application task requested by the respective user; and
supply the selected configuration bitfile to the reconfiguration hardware logic on the given hardware processor stage as data for a configuration bitstream targeting the given reconfigurable logic region.