Patent ID: 11875863
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 0:
1. A memory device, comprising:
a plurality of memory cells coupled to a plurality of word lines;
a peripheral circuit configured to perform a memory operation on memory cells that are selected from among the plurality of memory cells; and
a control logic configured to control the peripheral circuit, during the memory operation, to apply:
an operating voltage to a selected word line, among the plurality of word lines, coupled to the selected memory cells,
a first pass voltage to target word lines adjacent to the selected word line among unselected word lines, based on whether the operating voltage is lower than or equal to a reference voltage, and
a second pass voltage, having a lower level than the first pass voltage, to remaining unselected word lines, other than the target word lines among the unselected word lines,
wherein the control logic controls the peripheral circuit to apply the second pass voltage to all of the unselected word lines during the memory operation when the operating voltage is higher than the reference voltage.