Patent ID: 11961793
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A semiconductor package, comprising:
a package substrate;
a first re-distribution layer disposed on the package substrate;
a second re-distribution layer disposed between the package substrate and the first re-distribution layer;
a connection substrate interposed between the first re-distribution layer and the second re-distribution layer, wherein a connection hole penetrates the connection substrate;
a first semiconductor chip mounted on a first surface of the first re-distribution layer;
a second semiconductor chip mounted on the first surface of the first re-distribution layer and spaced apart from the first semiconductor chip;
a first connection chip mounted on a second surface, opposite to first surface, of the first re-distribution layer and disposed in the connection hole;
a second connection chip mounted on a first surface of the second re-distribution layer and disposed in the connection hole;
a substrate under-fill layer interposed between the package substrate and the second re-distribution layer;
a first lower semiconductor chip mounted on a second surface, opposite to the first surface, of the second re-distribution layer and disposed in the substrate under-fill layer; and
a second lower semiconductor chip mounted on the second surface of the second re-distribution layer and spaced apart from the first lower semiconductor chip.