Patent ID: 11908754
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A method for controlling a profile of a critical dimension of a substrate, comprising:
forming a plurality of first features having a pre-process critical dimension on the substrate;
analyzing a profile of the pre-process critical dimension for the substrate; and
performing an etching process on the substrate to form a plurality of second features on the substrate, wherein the second features correspond to the first features and have a post-process critical dimension that is related to the pre-process critical dimension;
wherein the substrate is tilted during the etching process when analysis of the profile of the pre-process critical dimension reveals a first condition that the pre-process critical dimension measured at a specific portion of the substrate that corresponds to a specific angular range of the substrate is greater than that measured at the remaining portions of the substrate on average.