Patent ID: 11869828
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A semiconductor package, comprising:
a first die comprising a semiconductor substrate, wherein the semiconductor substrate has a first surface, a second surface opposite to the first surface, and a through hole between the first surface and the second surface and having an inner wall, the inner wall has a first lever arm, and a length of the first lever arm is less than a thickness of the semiconductor substrate;
a first dielectric layer disposed within the through hole and defining a substantially straight sidewall extending from the first surface to the second surface of the semiconductor substrate; and
a second dielectric layer disposed within the through hole, wherein the second dielectric layer extends from a level of the second surface of the semiconductor substrate into the first lever arm of the inner wall.