Patent ID: 11887963
Assignee: KIOXIA CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A semiconductor device, comprising:
a support including a first electrode layer, a second electrode layer, and a dielectric layer between the first and second electrode layers in a first direction, the support including a plurality of openings therein exposing the second electrode layer;
a stacked body on the support and including a plurality of semiconductor chips stacked on each other, the stacked body having a lower surface facing the support and an upper surface facing away from the support;
a plurality of first wires connected to one of the semiconductor chips and extending upward from the semiconductor chip to at least the height of the upper surface of the stacked body;
a plurality of second wires connected to the support and extending upward from the support to at least the height of the upper surface of the stacked body;
a plurality of third wires connected from one semiconductor chip in the stacked body to another semiconductor chip in the stack; and
a sealing resin on the support covering the stacked body, the first wires, the second wires, and the third wires, upper ends of the first wires and the second wires being exposed at an uppermost surface of the sealing resin.