Patent ID: 11942136
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 5:
6. A method comprising:
applying a first voltage to an access line of a memory device during an operation of reading information from a memory element of a memory cell of the memory device, the memory cell including a first transistor and a second transistor coupled to the access line, the memory element coupled to a channel region of the second transistor, the first and second transistors having different threshold voltages, the memory device including a first data line coupled to the first transistor, a second data line coupled to the first transistor, and a third data line coupled to the second transistor;
applying a second voltage to the first data line during the operation;
applying a third voltage to the second data line during the operation; and
applying a fourth voltage to the third data line during the operation.