Patent ID: 11972799
Assignee: WINBOND ELECTRONICS CORP.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A filament forming method for a resistive memory unit, comprising:
applying a first bias voltage to the resistive memory unit for a number of times until a read current of the resistive memory unit reaches a first saturating state, wherein the first bias for each time includes a gate voltage and a drain voltage;
latching the read current in the first saturation state as a saturating read current;
determining whether or not a rate of increase of the saturating read current is less than a first threshold value, wherein when oxygen vacancy and oxygen ions are further generated in a dielectric layer of the resistive memory unit and the resistive memory unit does not reach a stable state, the saturating read current is further increased;
when the rate of increase of the saturating read current is determined to be not less than the first threshold value, increasing the gate voltage and decreasing the drain voltage of the first bias voltage to serve as a second bias voltage;
applying the second bias to the resistive memory unit until the read current of the resistive memory unit reaches a second saturation state, latching the read current in the second saturation state as a saturating read current; and determining whether or not the rate of increase of the saturating read current is less than the first threshold value; and
when determining the rate of increase of the saturating read current is less than the first threshold value, determining whether or not the saturating read current reaches a target current value, and finishing the filament forming method when the target current value is reached.