Patent ID: 11870437
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 16:
17. An output driving circuit, comprising:
a signal input terminal inputting a positive input signal and a negative input signal complementary to each other;
a pull-up output unit connected to the signal input terminal, the positive input signal acting as an input signal of the pull-up output unit;
a pull-down output unit connected to the signal input terminal, the negative input signal acting as an input signal of the pull-down output unit;
at least one compensation unit connected in parallel with the pull-up output unit or the pull-down output unit;
at least one pulse signal generation circuit having an input terminal connected to the signal input terminal, and generating a pulse signal based on the positive input signal or the negative input signal, the pulse signal acting as a control signal of the compensation unit; and
a signal output terminal connected to an output terminal of the pull-up output unit, an output terminal of the pull-down output unit and an output terminal of the compensation unit, and outputting an output signal;
wherein the output driving circuit comprises a plurality of parallel driving modules, each of the plurality of driving modules comprising at least the signal input terminal, the pull-up output unit, the pull-down output unit, the compensation unit and the signal input terminal, and the plurality of driving modules share the same pulse signal generation circuit.