Patent ID: 11868650
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A method of operating a memory system, the method comprising:
receiving a memory operation command for a memory device, wherein the memory device includes:
a first memory chip having a first set of performance measures that include at least a first type and a second type;
a second memory chip having a second set of performance measures that include at least the first and second types, wherein
the second memory chip has the second type of performance measure exceeding that of the first memory chip, and
the first memory chip has the first type of performance measure exceeding that of the second memory chip;

a shared interface connecting the first and second memory chips, wherein the shared interface provides a common input, a common output, or both for the first and second memory chips; and

receiving a Quality of Service (QoS) indicator associated with the memory operation command; and
selecting either the first memory chip or the second memory chip for performing a commanded memory operation, wherein the first memory chip or the second memory chip is selected based on a type of exceeding performance measure that matches the QoS indicator.