Patent ID: 11862701
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A method, comprising:
receiving a workpiece including a substrate portion and a stack portion over the substrate portion, the stack portion including a first stack of first channel layers interleaved by first sacrificial layers and a second stack of second channel layers interleaved by second sacrificial layers, the second stack being above the first stack;
forming a fin-shaped structure from the stack portion and the substrate portion, the fin-shaped structure including a source region and a drain region;
forming a first source feature in the source region and a first drain feature in the drain region;
depositing an isolation layer over the first source feature and the first drain feature, the isolation layer adjoining at least a bottommost one of the second channel layers; and
forming a second source feature in the source region and over the isolation layer and a second drain feature in the drain region and over the isolation layer, wherein the isolation layer separates each of the second source feature and the second drain feature from the bottommost one of the second channel layers.