Patent ID: 11907408
Assignee: GRAPHCORE LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 10:
11. A device comprising:
a processing unit comprising a plurality of sets of processors, wherein each of the processors is operable to issue write requests to write data to storage external to the processing unit; and
an encryption unit comprising a memory operable to store a plurality of sets of state information, wherein each of the sets of state information is associated with at least one of the sets of processors, wherein the encryption unit comprises processing circuitry configured to:
receive a first write request issued by a processor of a first one of the sets of processors, wherein the first write request comprises a plaintext;
process the first write request, including performing encryption operations for generating a ciphertext from the plaintext;
store as state information associated with the first one of the sets of processors, data generated from the processing of the first write request;
receive a subsequent write request issued by the processor of the first one of the sets of processors, wherein the subsequent write request comprises a further plaintext; and
using the state information associated with the first one of the sets of processors, process the subsequent write request, including performing at least one of encryption or authentication operations using the further plaintext.