Patent ID: 11947475
Assignee: WAGO VERWALTUNGSGESELLSCHAFT MBH
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 0:
1. A data bus subscriber for processing data, the data bus subscriber being connectable to a local bus, in particular a ring bus, the data bus subscriber comprising:
an input interface connectable to the local bus for receiving first local bus data;
an output interface connectable to the local bus for transmitting second local bus data;
a processing component for clock-controlled processing of the first local bus data and for outputting at least one control signal; and
a logic unit adapted to change a quantity of the received first local bus data based on the control signal for generating the second local bus data to be transmitted,
wherein the logic unit is further adapted for clock-controlled delaying of transmission of the second local bus data via the output interface,
wherein a working clock cycle of the processing component corresponds to a clock rate of a bus clock of the local bus or is a multiple of the clock rate of the bus clock of the local bus, and
wherein the clock-controlled delay is a constant delay in which the logic unit delays the transmission of the second local bus data by a certain number of working cycles of the processing component.