Patent ID: 11908833
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A semiconductor assembly, comprising:
a substrate;
a first stack of semiconductor dies disposed directly over a first location on the substrate;
a first die attach film disposed between each semiconductor die in the first stack and having a first die attach film thickness;
a second stack of semiconductor dies disposed directly over a second location on the substrate,
wherein the first stack includes an uppermost semiconductor die of the first stack,
wherein the second stack includes a nearest semiconductor die having a smallest lateral distance to the first location among each semiconductor die of the second stack, and
wherein at least a portion of the uppermost semiconductor die of the first stack is superimposed above at least a portion of the nearest semiconductor die of the second stack such that the uppermost semiconductor die of the first stack is not physically supported by the second stack; and

a second die attach film disposed between each semiconductor die in the second stack and having a second die attach film thickness different than the first die attach film thickness.