Patent ID: 11960438
Assignee: RAMBUS INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An integrated circuit (IC) device comprising:
a memory die having memory to store data, including a first operand; and
a processor die bonded to the memory die and having:
a temporally continuous connection to the memory die, the temporally continuous connection to convey the first operand from the memory die;
a first processing element having:
a first processing-element input port to receive the first operand and a second operand;
first processing-element storage connected to the memory die via the temporally continuous connection, the first processing-element storage to store the first operand received uninterrupted from the memory die; and
a first processor coupled to the first processing-element storage, the first processor to produce a first processing-element output that is a function of the first operand and the second operand; and

a second processing element having:
second processing-element storage connected to the memory die via the first processing element and the temporally continuous connection, the second processing-element storage to store a third operand received from the memory die, wherein the third operand received from the memory die is interrupted by the first processing element.