Patent ID: 11874774
Assignee: ADVANCED MICRO DEVICES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A memory-side cache device, comprising:
a memory interface configured to, in response to each read request of a plurality of read requests received at the memory-side cache device:
detect an indication that cached data requested by the read request differs from backing data in a memory device coupled with the memory-side cache device when the read request causes a cache hit in the memory-side cache device;
in response to detecting the indication, perform a read rinse transaction by updating the backing data to match the cached data; and
record an indication that the cached data in the memory-side cache device matches the backing data in the memory device; and

cache read/write logic configured to, for each write request of a plurality of write requests received at the memory-side cache device, write payload data specified by the write request by storing the payload data in an entry of the memory-side cache device.