Patent ID: 11973010
Assignee: RICHTEK TECHNOLOGY CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 1:
2. The chip packaging method according to claim 1, wherein the steps of cutting the wafer into multiple chip units, wherein multiple vertical heat conduction elements are formed on the wafer or the chip units, and disposing the chip units on a base material, are performed according to one of the following orders:
(1) first cutting the wafer into the multiple chip units; next forming the multiple vertical heat conduction elements on each of the chip units; and next flipping the chip units and disposing the chip units on the base material;
(2) first forming the multiple vertical heat conduction elements on the wafer; next cutting the wafer into the multiple chip units, wherein each of the chip units includes plural vertical heat conduction elements; and next flipping the chip units and disposing the chip units on the base material; or
(3) cutting the wafer into the multiple chip units; next disposing the chip units on the base material; and next flipping the chip units and provide the multiple vertical heat conduction elements to pass through the multiple through-holes in the base material.