Patent ID: 11876043
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A semiconductor device comprising:
a substrate including:
a chip region; and
a scribe lane region surrounding the chip region, the scribe lane region having first edges opposite to each other and second edges opposite to each other, each of the first edges extending in a first direction and each of the second edges extending in a second direction crossing the first direction;

first and second insulating interlayers on the scribe lane region of the substrate;
contact plugs extending through the first and second insulating interlayers on the scribe lane region of the substrate;
conductive structures on the contact plugs, respectively, on a portion of the scribe lane region of the substrate adjacent to one of the first edges, the conductive structures including first wirings and first vias alternately and repeatedly stacked in a vertical direction substantially perpendicular to an upper surface of the substrate; and
a second wiring commonly contacting upper surfaces of the conductive structures,
wherein each of the first wirings and each of the first vias extend in the first direction,
wherein an uppermost one of the first vias of each of the conductive structures is contained in a third insulating interlayer and a portion of a first insulating interlayer structure, and other ones of the first vias and the first wirings of each of the conductive structures are contained in the first insulating interlayer structure, the uppermost one of the first vias of each of the conductive structures directly contacting the portion of the first insulating interlayer structure, and
wherein the first wirings on the respective first vias at a same level do not contact each other.