Patent ID: 11876090
Assignee: CYPRESS SEMICONDUCTOR CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A sensor circuit comprising:
an electrostatic discharged (ESD) protection circuit; and
a control circuit operatively coupled to the ESD protection circuit, the control circuit for sending instructions to the ESD protection circuit, the instructions for:
coupling a plurality of p-channel field-effect transistors (PFETs) of a PFET clamp in parallel between a pin to be protected and a VHigher-Driver node in the circuit, each of the plurality of PFETs is coupled to the pin through one of a plurality of ballast resistors;
coupling an n-channel field-effect transistor (NFET) clamp between ground and the VHigher-Driver node, the NFET clamp including a pair of NFETs coupled in series;
biasing through the VHigher-Driver node a first DN-well in which the plurality of PFETs are formed to a higher of a voltage (Vpin) applied to a pin or to ground potential; and
when Vpin is a positive voltage less than a positive trigger voltage, coupling an external signal from the pin through the plurality of PFETs to an internal signal node in the circuit coupled to the a VHigher-Driver node.