Patent ID: 11967635
Assignee: GLOBALFOUNDRIES U.S. INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A structure comprising:
an extrinsic base region comprising a P+ region within a p-well in a semiconductor substrate material;
a shallow trench isolation structure extending into the semiconductor substrate material and bounding the extrinsic base region;
an emitter region adjacent to the shallow trench isolation structure and on a side of the extrinsic base region, the emitter region comprising an N+ region isolated and separated from the P+ region of the extrinsic base region by the shallow trench isolation structure;
a collector region adjacent to the shallow trench isolation structure and on an opposing side of the extrinsic base region;
an isolation region within the semiconductor substrate material, the isolation region comprising an n-well region surrounding the extrinsic base region comprising the P+ region, the p-well, the emitter region comprising the N+ region, and the collector region;
a deep n-well extending underneath the isolation region, the extrinsic base region, the emitter region and the collector region, the deep n-well directly contacting the isolation region that extends to a surface of the semiconductor substrate material, and the deep n-well is on sides and surrounds the extrinsic base region, the emitter region and the collector region; and
a contact directly connecting to n-wells which are contacting the deep n-well,
wherein the collector region comprises an N+ implant region, an N+ well region deeper than the N+ implant region and an N-well, each of which directly contact the shallow trench isolation structure, the N-well and the N+ well region extend underneath the shallow trench isolation structure and the N-well extends to and directly contacts a sidewall of the p-well of the extrinsic base.