Patent ID: 11887932
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An apparatus comprising:
a substrate, the substrate comprising crystalline material;
a first set of one or more contacts on a first substrate surface;
a second set of one or more contacts on a second substrate surface, the second substrate surface opposite the first substrate surface;
a first via through the substrate coupled with a first one of the first set of contacts and with a first one of the second set of contacts;
a second via through the substrate coupled with a second one of the first set of contacts and with a second one of the second set of contacts;
a trench in the substrate from the first substrate surface toward the second substrate surface, wherein the trench is spaced within the substrate apart from, and between, the first via and the second via; and
dielectric material filling the trench.