Patent ID: 11869847
Assignee: ICOMETRUE COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 3:
4. The multichip package of claim 1, wherein the non-volatile memory (NVM) integrated-circuit (IC) chip comprises a first silicon-oxide containing layer, and the field-programmable-gate-array (FPGA) integrated-circuit (IC) chip comprises a second silicon-oxide containing layer having a bottom surface bonded to and in contact with a top surface of the first silicon-oxide containing layer, wherein each of the plurality of first metal contacts comprises a first copper pad in the first silicon-oxide containing layer, and each of the plurality of second metal contacts comprises a second copper pad in the second silicon-oxide containing layer and having a bottom surface bonded to and in contact with a top surface of the first copper pad.