Patent ID: 11948837
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A method for making a semiconductor structure, comprising:
providing a substrate with a contact feature thereon;
forming a dielectric layer on the substrate;
etching the dielectric layer to form an interconnect opening exposing the contact feature;
forming a metal layer on the dielectric layer; and
forming a graphene conductive structure on the metal layer, the graphene conductive structure filling the interconnect opening, being electrically connected to the contact feature, and having at least one graphene layer that extends in a direction substantially perpendicular to the substrate,
the metal layer serving as a catalyst layer for growth of the graphene conductive structure and including a silane group such that the metal layer is selectively formed on the dielectric layer to expose the contact feature through the interconnect opening surrounded by the metal layer.