Patent ID: 11869828
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor package, comprising:
a first die comprising a semiconductor substrate, wherein the semiconductor substrate has a first surface, a second surface opposite to the first surface, and a through hole between the first surface and the second surface and having an inner wall, the inner wall has a first lever arm, and a length of the first lever arm is less than a thickness of the semiconductor substrate; and
a first dielectric layer disposed within the through hole and defining a substantially straight sidewall extending from the first surface to the second surface of the semiconductor substrate,
wherein the first surface of the semiconductor substrate is not covered by the first dielectric layer, and a top surface of the first dielectric layer is substantially level with the first surface of the semiconductor substrate.