Patent ID: 11922993
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 17:
18. The device of claim 14, wherein the first read command is stored within a queue consecutive to a second read command, and wherein the operations further comprise:
receiving the second read command to read second data from a second page of the subset of the array;
after a voltage applied to the first word line is moved to the target value, causing the page buffer to sense the second data from a second bit line coupled to the second page;
receiving a second cache release command associated with at least a second latch of the plurality of latches before receiving the first cache release command; and
causing, in response to the second cache release command and before the recovery period of the first word line, the second data to be stored in the second latch of the page buffer.