Patent ID: 11869610
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. The storage device according to claim 13, wherein the equalizing circuit comprises:
an eighth transistor, configured with a source to be electrically connected to the first positive data wire, and a drain to be electrically connected to the first negative data wire;
a first inverter, configured with an output end to be electrically connected to a gate of the eighth transistor, and an input end to be electrically connected to both the first control unit and the second control unit; and
a second inverter, configured with an output end to be electrically connected to each of the input end of the first inverter, the first control unit, and the second control unit, and an input end to be electrically connected to the equalizing signal.