Patent ID: 11876698
Assignee: VIAVI SOLUTIONS INC.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A non-transitory computer readable medium storing machine readable instructions, the machine readable instructions, when executed by at least one hardware processor in an apparatus, cause the at least one hardware processor to:
receive, from a speed test control application installed on the apparatus, speed test control instructions and data connection instructions for the apparatus to perform a high-speed test associated with network traffic of a network;
forward the speed test control instructions and the data connection instructions to a speed test control server;
cause a hardware-based traffic analyzer to, based on the speed test control instructions and the data connection instructions forwarded to the speed test control server, establish a connection between a data port of the hardware-based traffic analyzer and the speed test control served;
cause the hardware-based traffic analyzer to perform the high-speed test associated with the network traffic of the network by transmitting and receiving, via the data port of the hardware-based traffic analyzer, relatively high bit-rate data to and from the speed test control server;
receive results of the high-speed test associated with the network traffic from the speed test control server;
transmit the results of the high-speed test to the speed test control application; and
cause the hardware-based traffic analyzer to transmit, via a control port of the hardware-based traffic analyzer, relatively slow-speed control traffic to the speed test control application.