Patent ID: 11914938
Assignee: MURATA MANUFACTURING CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. A simulation method of a multilayer capacitor for three- dimensional electromagnetic simulation, the method comprising:
providing a simulation model of a multilayer inductor between a first input/output port and a second input/output port, and providing a simulation model of the multilayer capacitor between a third input/output port and a fourth input/output port; and
simulating a characteristic relating to crosstalk between the first input/output port and the fourth input/output port or between the third input/output port and the second input/output port by inputting a frequency sweep signal to the first input/output port or the third input/output port; wherein
the simulation model of the multilayer capacitor includes a plate-shaped first internal electrode model between the third input/output port and the fourth input/output port;
a capacitance, an equivalent series resistance, and an equivalent series inductance obtained from an actually measured value of an impedance characteristic of the multilayer capacitor are set for the first internal electrode model;
the first internal electrode model faces two side surfaces opposed in a width direction of the multilayer capacitor, or face two main surfaces opposed in a height direction intersecting the width direction of the multilayer capacitor; and
the providing further includes providing the simulation model of the multilayer capacitor adjacent to the simulation model of the multilayer inductor, and the first internal electrode model intersects a magnetic field from the simulation model of the multilayer inductor.