Patent ID: 11886877
Assignee: APPLE INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. A method comprising:
executing a load operation in a processor that includes a plurality of data memories configured to store data operands for the processor, wherein a given one of the plurality of data memories includes a respective range of multiple addressable memory locations, and wherein the load operation specifies a memory operand stored in a particular one of the plurality of data memories by specifying a virtual memory select value for selecting the particular one of the plurality of data memories and an address within the particular one of the plurality of data memories;
mapping the virtual memory select value to a physical memory select value corresponding to the particular one of the plurality of data memories using a mapping stored in a memory select register, of respective virtual memory select values to respective physical memory select values for the plurality of data memories; and
accessing the particular one of the plurality of data memories with the address to obtain the memory operand.