Patent ID: 11901278
Assignee: STMICROELECTRONICS (CROLLES 2) SAS
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method for manufacturing an electronic integrated circuit (IC) device, comprising:
fabricating a circuit structure comprising, in succession, between an outer face and a front face, a substrate layer including light-sensitive optical circuit components, a first dielectric layer, an intermediate electrically-conductive layer, a second dielectric layer, and a local substrate layer;
producing through-openings which extend through the local substrate layer;
producing a third dielectric layer above the local substrate layer, wherein the third dielectric layer fills said through-openings;
producing holes extending through the first, second and third dielectric layers and which pass through said through-openings in the local substrate layer at a distance from edges of the through-openings, and also pass through the intermediate electrically-conductive layer, said holes extending to reach electrical contacts of the light-sensitive optical circuit components;
transforming portions of the intermediate electrically-conductive layer, located adjacent to the holes, to produce electrical insulation rings surrounding the holes; and
filling said holes with an electrically-conductive material so as to form electrical connections linked to the electrical contacts of the light-sensitive optical circuit components.