Patent ID: 11862293
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A semiconductor memory device comprising:
a plurality of first word lines;
a plurality of memory cell arrays electrically connected to the plurality of first word lines;
a first wiring electrically connected to the plurality of first word lines corresponding to the plurality of memory cell arrays;
a driver circuit electrically connected to the first wiring;
a plurality of second wirings electrically connected to the first wiring via the driver circuit;
a voltage generation circuit including a plurality of output terminals disposed corresponding to the plurality of second wirings; and
a plurality of first circuits disposed corresponding to the plurality of memory cell arrays, wherein
the voltage generation circuit is:
electrically connected to the plurality of first word lines via a first current path including the plurality of second wirings, the driver circuit, and the first wiring; and
electrically connected to the plurality of first word lines via a second current path including the plurality of second wirings and the plurality of first circuits and without including the driver circuit.