Patent ID: 11961832
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An integrated circuit device comprising:
a substrate having an intellectual property (IP) core, which is surrounded by a separation region and has at least two first edges extending in a first horizontal direction and at least two second edges extending in a second horizontal direction that intersects the first horizontal direction, the IP core comprising a cell region and an edge dummy region that is arranged to extend along the at least two second edges;
a plurality of fin-type active regions in the cell region, extending in the first horizontal direction;
a plurality of dummy fin-type active regions in the edge dummy region;
a plurality of nanosheet stack structures spaced apart from top surfaces of the plurality of fin-type active regions and the plurality of dummy fin-type active regions, and each of the plurality of nanosheet stack structures comprising a plurality of nanosheets, and disposed on each of the top surfaces of the plurality of fin-type active regions and the plurality of dummy fin-type active regions, a plurality of gate lines in the cell region, extending in the second horizontal direction, which intersects the first horizontal direction; and
a plurality of dummy gate lines in the edge dummy region,
wherein the edge dummy region is disposed between the separation region and the cell region, and
wherein a length, in the second horizontal direction, of the edge dummy region is the same as a length, in the second horizontal direction, of the cell region.