Patent ID: 11935603
Assignee: INFINEON TECHNOLOGIES AG
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A non-volatile memory, comprising:
an array of non-volatile memory cells arranged in rows to be selected by word lines and columns to be selected, for writing and reading;
a plurality of reference word lines comprising first reference word lines and second reference word lines, each to select corresponding supplemental non-volatile memory cells from the first reference word line and reference non-volatile cells from the second reference word line;
a plurality of sense amplifiers arranged to:
read, using a comparison of the supplemental non-volatile memory cells of the first reference word lines to the reference non-volatile memory cells of the second reference word lines, system data that has been written to the supplemental non-volatile memory cells of the first reference word lines after an erase operation; and

a processing element to determine a status of the erase operation of the non-volatile memory, based on reading the system data that has been written to the supplemental non-volatile memory cells of the first reference word lines.