Patent ID: 11922178
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 5:
6. At least one non-transitory machine-readable medium comprising instructions that, when executed, cause at least one processor to:
load compressed machine learning parameter data into a cache accessible by a processor engine, the loaded data including first operable data;
identify that second operable data is present in the loaded data in the cache;
decompress, with the processor engine, the first operable data into first decompressed data;
execute, with the processor engine, a first machine learning operation using the first decompressed data;
decompress, with the processor engine, the second operable data into second decompressed data, the identification of the second operable data based on a comparison of bits in a sparsity bitmap to bits in the first decompressed data and the second decompressed data; and
execute, with the processor engine, a second machine learning operation using the second decompressed data.