Patent ID: 11927860
Assignee: SHARP DISPLAY TECHNOLOGY CORPORATION
Field: Optics (Instruments)
Classification: CPC G | IPC G

Claim 23:
24. An active matrix substrate including a display region including a plurality of pixel areas and a non-display region located around the display region, the active matrix substrate comprising:
a substrate;
a plurality of thin film transistors supported on the substrate, each of the plurality of thin film transistors including an oxide semiconductor layer as an active layer;
an interlayer insulating layer covering the plurality of thin film transistors;
a plurality of pixel electrodes arranged above the interlayer insulating layer;
a common electrode arranged between the plurality of pixel electrodes and the interlayer insulating layer;
a first dielectric layer arranged between the interlayer insulating layer and the common electrode, and formed of a first dielectric film; and
a second dielectric layer arranged between the common electrode and the plurality of pixel electrodes,
wherein each of the plurality of thin film transistors and each of the plurality of pixel electrodes are arranged in the display region in association with one of the plurality of pixel areas,
the non-display region includes at least one groove region, each of the at least one groove region including a first groove extending in a first direction when viewed from a normal direction of the substrate,
the first groove includes
a first insulating layer,
the interlayer insulating layer extending on the first insulating layer and including a groove that exposes part of the first insulating layer, the groove extending in the first direction when viewed from the normal direction of the substrate,
a second insulating layer formed of the first dielectric film and being in direct contact with the first insulating layer in the groove, and extending in the first direction when viewed from the normal direction of the substrate, and
the first dielectric layer covering an upper face of the interlayer insulating layer and at least part of a side surface of the groove, and
the second insulating layer includes two edge portions facing each other and extending in the first direction when viewed from the normal direction of the substrate, the two edge portions being each located between the interlayer insulating layer and the first insulating layer, and
the first groove further includes at least one oxide semiconductor portion extending in the first direction in contact with a side surface of the second insulating layer between the interlayer insulating layer and the first insulating layer.