Patent ID: 11894062
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. The method as set forth in claim 17, further including, during a neutralization period of time, the steps of:
applying an inhibiting voltage to unselected ones of the plurality of bit lines associated with the ones of the memory cells connected to the at least one dummy word line having the threshold voltage not being below the predetermined detection voltage threshold following the erase operation to inhibit programming;
grounding selected ones of the plurality of bit lines associated with the ones of the memory cells connected to the at least one dummy word line having the threshold voltage being below the predetermined detection voltage threshold following the erase operation to encourage programming; and
applying the at least one programming pulse of the maintenance program voltage to the at least one dummy word line to program the ones of the memory cells connected to the at least one dummy word line having the threshold voltage being below the predetermined detection voltage threshold.