Patent ID: 11914440
Assignee: GOOGLE LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G  H  Y | IPC G  H

Claim 8:
9. A System on a Chip (SoC), comprising:
an interconnect for handling transactional traffic between a plurality of shared resources on the SoC, the plurality of shared resources directly connected to the interconnect at one or more ports; and
a link connecting a shared resource of the plurality of shared resources to the interconnect, the shared resource configured to initiate a subsystem wake-up sequence when in an inoperable state in response to a wake-up trigger event, the subsystem wake-up sequence arranged to enable the shared resource to resume normal operation and involves:
the shared resource sending a wake-up request signal over the link to the interconnect in response to the wake-up trigger event, while the shared resource is in the inoperable state and the link is in a quiescent state, the wake-up trigger comprising an event related to the shared resource;
the interconnect, in response to detecting the wake-up request signal from the shared resource, notifying a system controller, the system controller in an awake state, that the wake-up request signal was detected; and
the system controller, in response to the notifying, sending a command over the interconnect to the shared resource, the command directing the shared resource to initiate the subsystem wake-up sequence to exit the inoperable state.