Patent ID: 11972269
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. At least one non-transitory computer readable medium comprising instructions to cause one or more processors to at least:
associate a first stock keeping unit with a semiconductor device including a plurality of processor cores, respective ones of the processor cores configurable to be active or dormant, the first stock keeping unit associated with a first number of processor cores of the semiconductor device configured to be active, remaining ones of the processor cores to be dormant processor cores;
command the semiconductor device to activate one or more of the dormant processor cores to cause the semiconductor device to provide a second number of processor cores configured to be active; and
generate a second stock keeping unit for the semiconductor device, the second stock keeping unit associated with the semiconductor device having the second number of processor cores configured to be active.