Patent ID: 11967533
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A method of making a semiconductor device, comprising:
forming a first semiconductor fin and a second semiconductor fin over a first area of a substrate;
forming a third semiconductor fin and a fourth semiconductor fin over a second area of the substrate, wherein a first density of transistors formed in the first area is greater than a second density of transistors formed in the second area;
forming a first dielectric fin disposed between the first and second semiconductor fins;
forming a second dielectric fin disposed between the third and fourth semiconductor fins;
forming a first dummy gate structure that straddles the first and second semiconductor fins and the first dielectric fin;
forming a second dummy gate structure that straddles the third and fourth semiconductor fins and the second dielectric fin;
concurrently removing a portion of the first dummy gate structure over the first dielectric fin to form a first trench and removing a portion of the second dummy gate structure over the second dielectric fin to form a second trench by performing an etching process that includes a plurality of stages, wherein each of the plurality of stages includes a combination of anisotropic etching and isotropic etching such that a first variation of a first distance between respective inner sidewalls of the first trench and a second variation of a second distance between respective inner sidewalls of the second trench are each within a threshold; and
filling the first and second trenches with a dielectric material to respectively form a first gate isolation structure and a second gate isolation structure.