Patent ID: 11907635
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 16:
17. A method of designing an integrated circuit, the method comprising:
obtaining a circuit structure of the integrated circuit, the circuit structure including at least one field effect transistor; and
analyzing the circuit structure and verifying the circuit structure, the analyzing and verifying using a modeling circuit of a field effect transistor,
wherein the modeling circuit includes,
a first field effect transistor on a semiconductor substrate,
a first bipolar transistor having a first collector electrode connected to a first node corresponding to a first electrode of the first field effect transistor, a first emitter electrode connected to a second node corresponding to a second electrode of the first field effect transistor, and a first base electrode,
a second bipolar transistor having a second collector electrode connected to the second node, a second emitter electrode connected to the first node, and a second base electrode connected to the first base electrode of the first bipolar transistor, and
a substrate resistor connected between the first and second base electrodes and a first surface of the semiconductor substrate.