Patent ID: 11966743
Assignee: RED HAT, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A system comprising:
a memory including a ring buffer having a plurality of slots;
a processor in communication with the memory; and
a hypervisor configured to:
retrieve a plurality of memory entries in the ring buffer from an original slot to an end slot, each of the original slot to the end slot having a descriptor,
test a respective descriptor of each successive slot from the original slot through the end slot,
responsive to determining the respective descriptor of the end slot is a valid descriptor, execute a request associated with a memory entry or the respective descriptor of the end slot,
walk the ring buffer backwards from the end slot to the original slot, and
clear each valid descriptor in each slot between the end slot and the original slot.