Patent ID: 11868288
Assignee: SUZHOU CENTEC COMMUNICATIONS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G  H

Claim 11:
12. A verification method for an Ethernet interface chip, wherein the method verifies the Ethernet interface chip by using the verification system according to claim 1, and the method comprises:
determining, by the flow control unit, that an amount of data in the buffer of the PMA layer is insufficient, and sending, by the flow control unit, a request to the RS;
after receiving the request from the flow control unit, sending, by the RS, data received from an exterior of the verification system to the PCS;
sending, by the PCS, the received data to the PMA layer; and
storing, by the PMA layer, the received data in the buffer, and sending, by the PMA layer under control of the PMA clock, the data in the buffer to the Ethernet interface chip to be tested.