Patent ID: 11914512
Assignee: RED HAT, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A system comprising:
a memory;
a processor in communication with the memory; and
a supervisor, wherein the supervisor is configured to:
allocate a memory space in the memory to a workload executing on the processor;
store, as dirty memory in the memory space allocated to the workload, data written by the workload at least until the data is written back into a data storage;
based on a type of the workload being a first type, trigger write back of at least a portion of the dirty memory into the data storage in response to the dirty memory exceeding a first threshold level; and
based on the type of the workload being a second type,
delay write back of the dirty memory into the data storage in response to the dirty memory exceeding the first threshold level, and
continue execution of at least one thread of the workload on the processor in response to the dirty memory exceeding a second threshold level greater than the first threshold level,

wherein the workload of the first type is more sensitive to data loss and data consistency risks than the workload of the second type.