Patent ID: 11935866
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC B  H

Claim 16:
17. A semiconductor device comprising:
a first substrate;
a second substrate;
a first plurality of conductive pillars extending between the first substrate and the second substrate, wherein the first plurality of conductive pillars comprises:
a first conductive pillar having a first width measured in a first direction parallel to a surface of the first substrate, wherein the first width is substantially uniform along an entire first height of the first conductive pillar,
a second conductive pillar having a second width measure in the first direction, wherein the second width is substantially uniform along an entire second height of the second conductive pillar, the first width is different from the second width, and the entire first height is equal to the entire second height, and
a third conductive pillar having a third width measured in the first direction, wherein the third width is substantially uniform along an entire third height of the third conductive pillar, and the third conductive pillar is between the first conductive pillar and the second conductive pillar in the first direction;

a plurality of conductive traces on the second substrate, wherein the plurality of conductive traces comprises:
a first conductive trace electrically connected to the first conductive pillar;
a second conductive trace electrically connected to the second conductive pillar; and
a third conductive trace electrically connected to the third conductive pillar; and

a plurality of solder layers, wherein the plurality of solder layers comprises:
a first solder layer between the first conductive pillar and the first conductive trace;
a second solder layer between the second conductive pillar and the second conductive trace; and
a third solder layer between the third conductive pillar and the third conductive trace.