Patent ID: 11928284
Assignee: CYPRESS SEMICONDUCTOR CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A system comprising:
a plurality of first electrodes;
a plurality of second electrodes, wherein the plurality of first electrodes and the plurality of second electrodes are orthogonal to each other, wherein intersections between the plurality of first electrodes and the plurality of second electrodes form a plurality of sense locations; and
a processing device configured to:
receive measurements obtained from the plurality of first electrodes and the plurality of second electrodes using a designated integration window;
determine a plurality of variance values based on the plurality of measurements and based on a distance computation associated with adjacent sense locations, the plurality of variance values identifying variance in measurements between the adjacent sense locations defined by the plurality of first electrodes and the plurality of second electrodes;
determine if a defect is present based, at least in part, on a comparison of the plurality of variance values with the plurality of threshold values; and
generate a notification identifying the defect in response to determining the defect is present.