Patent ID: 11947960
Assignee: QUALCOMM INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 23:
24. A processing system comprising:
at least one memory comprising computer-executable instructions; and
one or more processors configured to execute the computer-executable instructions in order to cause the processing system to:
receive a binary-space input for processing;
convert the binary-space input into a modulo-space input based on a set of coprimes defined for executing operations in a modulo space;
generate a modulo-space result through one or more modulo-space multiply-and-accumulate (MAC) units based on the modulo-space input;
convert the modulo-space result into a binary-space result; and
output the binary-space result;
wherein in order to convert the binary-space input into the modulo-space input, the one or more processors are configured to cause the processing system to convert the binary-space input into a set of modulus values based on a number of branches defined for the set of coprimes.