Patent ID: 11889682
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 10:
11. A semiconductor memory device, comprising:
a substrate comprising a memory cell region, a peripheral region and a dummy cell region between the memory cell region and the peripheral region, the memory cell region including a plurality of memory cells, the dummy cell region including a plurality of dummy memory cells;
a plurality of active regions in the memory cell region, each of the plurality of active regions extending in a long axis direction, the long axis direction being a diagonal direction with respect to a first horizontal direction and a second horizontal direction orthogonal to the first horizontal direction, each of the plurality of active regions having a first width in a short axis direction, and the plurality of active regions repeat with a first pitch in the short axis direction, the short axis direction orthogonal to the long axis direction;
at least one logic active region in the peripheral region; and
a plurality of dummy active regions in the dummy cell region, each of the plurality of dummy active regions extending in the long axis direction, each of the plurality of dummy active regions having a second width greater than the first width, and the plurality of dummy active regions repeat with a second pitch twice the first pitch, the second width and the second pitch in the short axis direction, wherein
at least one of the plurality of dummy active regions defines a plurality of sidewall recesses on sidewalls of the at least one of the plurality of dummy active regions.