Patent ID: 11948989
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A method comprising:
forming a stack of semiconductor layers over a substrate, the stack of semiconductor layers including a first semiconductor layer and a second semiconductor layer;
forming a protective dielectric layer directly on the second semiconductor layer, wherein the forming of the protective dielectric layer directly on the second semiconductor layer includes:
forming a hard mask on the protective dielectric layer;
patterning the protective dielectric layer and the stack of semiconductor layers while using the hard mask as a mask; and
removing the hard mask;

forming a first gate dielectric layer directly on the protective dielectric layer;
removing the first gate dielectric layer to expose the protective dielectric layer;
removing a first portion of the second semiconductor layer;
forming a second gate dielectric layer directly on the protective dielectric layer and the first semiconductor layer; and
forming a gate electrode around the second gate dielectric layer.