Patent ID: 11916010
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. An integrated circuit (IC) package, comprising:
an IC die having a first conductive line extending along a first direction parallel to the IC die, a via over the first conductive line, and a second conductive line over the via and extending along a second direction parallel to the IC die; and
a further IC component, coupled to the IC die,

wherein:
the via has a first portion and a second portion, the first portion is between the first conductive line and the second portion, the second portion is between the first portion and the second conductive line, and a width of the second portion along the first direction is smaller than a width of the first portion along the first direction,
a first sidewall of the second conductive line is aligned with a first sidewall of the second portion, and
a second sidewall of the second conductive line is aligned with a second sidewall of the second portion.