Patent ID: 11943908
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A device comprising:
a first pull-up transistor comprising a first source/drain region in a semiconductor substrate, a second source/drain region in the semiconductor substrate, and a first gate structure over the semiconductor substrate;
a second pull-up transistor comprising a second gate structure, the second gate structure having a first top surface and a second top surface, the first top surface being disposed further from the semiconductor substrate than the second top surface;
a first contact over the first source/drain region, the first contact physically contacting the first source/drain region, the first contact physically contacting a portion of the semiconductor substrate between the first source/drain region and the second gate structure, the first contact extending into a side of the second gate structure, the first contact physically contacting the second top surface of the second gate structure;
a second contact over the second source/drain region, the second contact physically contacting the second source/drain region, the second contact separated from a side of the first gate structure;
a first dielectric layer over the first gate structure, the second gate structure, the first contact, and the second contact; and
a via extending through the first dielectric layer to contact the second contact, the via separated from the first contact.