Patent ID: 11973036
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A semiconductor package structure, comprising:
a redistribution structure including:
a first dielectric layer having a first surface and a second surface opposite to the first surface, and defining a recess recessed from the first surface; and
a patterned first conductive layer extending in the first dielectric layer and exposed from the recess of the first dielectric layer;

a first solder disposed over the first surface of the first dielectric layer and extending in the recess;
an electronic component disposed over the second surface of the first dielectric layer;
an encapsulating layer encapsulating the electronic component;
at least one pillar including a first portion located in the first dielectric layer and a second portion protruding from the second surface of the first dielectric layer, wherein a surface of the second portion is substantially aligned with a top surface of the encapsulating layer; and
a second solder disposed over the first surface, wherein the at least one pillar includes a plurality of pillars, and a distance between the first solder and the second solder is greater than a pitch between the plurality of pillars.