Patent ID: 11961878
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A semiconductor device comprising:
a substrate, the substrate having a doped region;
a deep trench capacitor (DTC) partially within the substrate;
an interconnect structure over the DTC and the substrate, the interconnect structure comprising:
a seal ring structure in electrical contact with the substrate, the doped region being in physical contact with the seal ring structure;
a first conductive via in physical contact with the DTC, the first conductive via being in electrical contact with the seal ring structure; and
a first conductive line over the first conductive via, the first conductive via electrically coupling the first conductive line to the DTC, the seal ring structure electrically coupling the first conductive line to the substrate; and

a contact pad over the interconnect structure, the contact pad being electrically coupled to the substrate through the seal ring structure, wherein the contact pad is in physical contact with the first conductive line.