Patent ID: 11927630
Assignee: MARVELL ASIA PTE LTD
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 16:
17. A system, comprising:
a) a means for collecting information of an IC to be tested including number of a plurality of physical blocks and number of a plurality of input pins and output pins on the IC;
b) a means for dividing the plurality of input pins and output pins into a plurality of slots, wherein each slot of the plurality of slots includes a certain number of input pins and a certain number of scan output pins on the IC;
c) a means for assigning each slot of the plurality of slots having one or more scan inputs and one or more scan outputs to a subset of physical blocks of the plurality of physical blocks on the IC for testing until every slot of the plurality of slots has been assigned;
d) a means for defining the subset of physical blocks that have been assigned the plurality of slots as a schedule; and
e) a means for repeating steps c) and d) for physical blocks of the plurality of physical blocks that are not assigned to the plurality of slots to define additional subset of physical blocks assigned to the plurality of slots as additional schedules until each physical block of the plurality of physical blocks on the IC has been assigned, and wherein step (e) forms a set of schedules for the subset of physical blocks of the plurality of physical blocks.