Patent ID: 11908942
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A semiconductor device, comprising:
a first transistor comprising:
a first nanostructure over and spaced apart from a first base portion, and
a first gate structure wrapping around the first nanostructure; and

a second transistor comprising:
a second nanostructure over and spaced apart from a second base portion, and
a second gate structure disposed over the second nanostructure

wherein the first nanostructure has a first width and a first height smaller than the first width,
wherein the second nanostructure has a second width and a second height greater than the second width,
wherein the first nanostructure extends lengthwise between a first source/drain feature and a second source/drain feature along a direction,
wherein the first nanostructure includes a channel portion directly under the first gate structure and a connection portion between the channel portion and the first source/drain feature along the direction, and
wherein a height of the connection portion is greater than a height of the channel portion.