Patent ID: 11921578
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 20:
21. The semiconductor system of claim 19, wherein the semiconductor device includes:
an error correction circuit configured to detect an error included in internal data loaded on an input/output line, to generate the failure detection signal by the command signal during the read operation, and to correct the error included in the internal data loaded on the input/output line by the command signal during the refresh operation;
a refresh control circuit configured to generate an internal read signal and an internal write signal that are sequentially generated for performing a read modify write operation during the refresh operation; and
a core circuit configured to output the internal data stored in the core circuit through the word line activated by the address signal to the input/output line when a read signal generated by the command signal is input to the core circuit, output the internal data stored in the core circuit through the word line activated by the failure address signal when the internal read signal is input to the core circuit, and store the error-corrected internal data when the internal write signal is input to the core circuit.