Patent ID: 11929127
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A non-transitory computer-readable medium storing instructions, which when executed by a processing device that is operatively coupled with a memory device, performing a plurality of operations comprising:
determining to perform a rewrite operation on at least a portion of memory cells;
causing a read operation to be performed at the memory cells to determine a first subset of memory cells storing a first logic state and a second subset of memory cells storing a second logic state;
incrementing a counter of number of rewrite operations performed at the second subset of memory cells by a first value in response to determining to perform a rewrite operation on at least a portion of memory cells;
determining that the number of rewrite operations performed at the second subset of memory cells fail to satisfy a threshold criterion based on comparing the number of rewrite operations performed to the threshold criterion;
refraining from rewriting data store at the first subset of memory cells in response to determining that the number of rewrite operations performed at the second subset of memory cells fail to satisfy a threshold criterion;
rewriting data stored at the second subset of memory cells; and
decrementing the counter of the number of rewrite operations performed at the second subset of memory cells by a second value based at least in part on rewriting the data stored at the second subset of memory cells.