Patent ID: 11923446
Assignee: GLOBALFOUNDRIES U.S. INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device comprising:
an active region above a substrate, the active region comprising a channel layer and a barrier layer disposed on the channel layer;
source and drain electrodes in contact with the active region;
a gate above the active region, the gate is laterally between the source and drain electrodes, the gate has an upper surface;
a polysilicon layer above the substrate, the polysilicon layer has a lower surface, wherein the polysilicon layer is positioned laterally adjacent to the gate and the lower surface of the polysilicon layer is at a lower elevation than the upper surface of the gate;
a silicide layer on the polysilicon layer; and
an isolation layer above the substrate, the isolation layer being adjacent to the channel layer, wherein the polysilicon layer is positioned above the isolation layer.