Patent ID: 11876083
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A semiconductor package, comprising:
a lower package including a lower substrate, at least one lower semiconductor chip, a lower molding layer, and a plurality of lower connection structures;
an interposer substrate on the lower package, the interposer substrate including a plurality of holes that penetrate the interposer substrate, the plurality of holes overlapping the lower semiconductor chip in a plan view;
an upper package on the interposer substrate, the upper package including an upper substrate and at least one upper semiconductor chip;
a plurality of upper connection structures between and coupled to the upper substrate and the interposer substrate;
a thermal radiation structure including a supporter on a top surface of the interposer substrate and protrusions in the plurality of holes; and
a thermal conductive layer between the thermal radiation structure and the lower semiconductor chip, the thermal conductive layer including a material different from a material of the thermal radiation structure,
wherein the upper connection structures are laterally spaced apart from the supporter of the thermal radiation structure.