Patent ID: 11875248
Assignee: IMAGINATION TECHNOLOGIES LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. The hardware implementation of claim 13, wherein the one or more second memory devices comprise:
a local memory for the first core that is accessible only to the first core;
a local memory for the second core that is accessible only to the second core; and
a shared memory that is accessible to the first core and the second core,, wherein the splitter is configured to, if the size in the first dimension is greater than the threshold:
identify a disposable portion of the first output tile of the first layer group, which is needed only for evaluating the second layer group based on the first tile; and
identify an overlap portion of the first output tile of the first layer group, which is needed for evaluating the second layer group based on the first tile and also needed for evaluating the second layer group based on the second tile,
and the first core is configured, when storing the first output tile of the first layer group in the one or more second memory devices to:
write the disposable portion to its local memory; and
write the overlap portion to the shared memory.