Patent ID: 11923812
Assignee: QORVO US, INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. The PMIC of claim 10 wherein the voltage processing circuit is further configured to determine the linear term based on an equation expressed as:

KMODLINEAR(t)=KOFFSET(dT)+[dVTGT(t)/dt]*dT/[VTGTMAX−VTGT(t)];

wherein:
KMODLINEAR(t) represents the linear term;
dT represents the delay budget;
KOFFSET(dT) represents the voltage offset corresponding to the delay budget;
VTGT(t) represents the target voltage generated by the analog LUT circuit; and
VTGTMAX represents an estimated maximum value of the target voltage VTGT(t).