Patent ID: 11968838
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A device comprising:
a semiconductor substrate;
a first memory cell over the semiconductor substrate, the first memory cell comprising a first transistor, wherein the first transistor comprises:
a gate electrode comprising a portion of a first word line;
a first portion of a ferroelectric material, wherein the first portion of the ferroelectric material is on a sidewall of the first word line; and
a first channel region on a sidewall of the first portion of the ferroelectric material;

a source line, wherein a first portion of the source line provides a first source/drain electrode for the first transistor;
a bit line, wherein a first portion of the bit line provides a second source/drain electrode for the first transistor;
a first dielectric material separating the source line and the bit line;
a first air gap separating the source line and the first dielectric material;
a second air gap separating the bit line and the first dielectric material; and
a second memory cell over the first memory cell.