Patent ID: 11935601
Assignee: SUPERMEM, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. The method of claim 1, wherein:
the word line and the first bit line are at a first address of the memory array, and the method further comprises:
receiving a memory address;
determining whether the memory address is a second address, different from the first address;
in accordance with a determination that the memory address is the second address, updating an order of bit line access; and
in accordance with a determination that the memory address is not the second address, forgoing updating the order of bit line access,
wherein:
the second bit line corresponding to the sense amplifier is accessed in response to the updating of the order of bit line access, and
the second address is at the word line and the second bit line of the memory array.