Patent ID: 11972822
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. The memory system of claim 14, wherein:
the programmable ECC engine has a first error mis-correction rate when configured to decode the codeword while correcting up to “n” bits in the codeword for a given raw bit error rate in the codeword; and
the programmable ECC engine has a second error mis-correction rate when configured to decode the codeword while correcting up to “m” bits in the codeword for the given raw bit error rate in the codeword, wherein second error mis-correction rate is greater than the first error mis-correction rate, wherein data read using the self-referenced a higher bit error rate than data read using the self-referenced read, wherein the error mis-correction rate while correcting up to “m” bits in the codeword will drop in response to a lower raw bit error rate in the codeword.