Patent ID: 11875261
Assignee: FORD GLOBAL TECHNOLOGIES, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A system comprising:
one or more processors; and
one or more memories storing computer-executable instructions that, when executed by the one or more processors, configure the one or more processors to:
identify a directed acyclic graph (“DAG”) overlaying a plurality of nodes, the DAG comprising a plurality of vertices linked in pairwise relationships via a plurality of edges, wherein one of the plurality of vertices of the DAG comprises an entry vertex, and wherein each of the plurality of nodes comprises a computing device;
identify the nodes underlying the DAG;
identify an edge linking separate nodes;
insert a data exchange vertex between the separate nodes, wherein the data exchange vertex comprises a recursive DAG structure comprising a send vertex and a receive vertex;
generate a subordinate DAG in the entry vertex, the subordinate DAG comprising a plurality of subordinate vertices, each of the plurality of subordinate vertices corresponds to a one of the nodes underlying the DAG;
receive data and metadata at the entry vertex;
deliver the data to a next vertex in the DAG; and
communicate the metadata to nodes underlying the DAG via the subordinate DAG.