Patent ID: 11915996
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An integrated circuit structure comprising:
a first integrated circuit package including a first plurality of dies;
a second integrated circuit package stacked above the first integrated circuit package and including a second plurality of dies, wherein the second integrated circuit package is inverted such that the second plurality of dies is facing the first plurality of dies;
a cooling arrangement thermally coupled to each of the first and second plurality of dies; and
a plurality of electrically conductive structures extending between the first integrated circuit package and the second integrated circuit package, the plurality of electrically conductive structures laterally adjacent to both the first plurality of dies and the second plurality of dies, and the plurality of electrically conductive structures electrically coupling the first integrated circuit package to the second integrated circuit package.