Patent ID: 11869577
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 1:
2. The apparatus of claim 1, further comprising:
a pillar tile comprising:
a plurality of pillars comprising the first pillar and the second pillar;
a first pillar decoder extending in a first direction and coupled with columns of the plurality of pillars; and
a second pillar decoder extending in a second direction and coupled with rows of the plurality of pillars,
wherein the first pillar decoder and the second pillar decoder are operable to selectively activate the first pillar and the second pillar based at least in part on activating, using the first pillar decoder, a first pillar column line coupled with the first pillar and a second pillar column coupled with the second pillar and activating, using the second pillar decoder, a first pillar row line coupled with the first pillar and a second pillar row line coupled with the second pillar.