Patent ID: 11888710
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H  G  Y | IPC G  H

Claim 9:
10. The one or more non-transitory machine-readable storage media of claim 9, wherein to transmit the generated interrupt to the kernel causes the kernel to:
read, subsequent to having received the generated interrupt, a state of the at least one register to retrieve the identified amount of LLC cache ways for each workload type;
determine, based on the read state of the at least one register, a recommended allocation set of LLC cache ways, wherein the recommended allocation set of LLC cache ways includes an amount of hardware I/O LLC cache ways that are to be allocated to each of the plurality of VMs and an amount of isolated LLC cache ways that are to be allocated to each of the plurality of VMs; and
transmit the recommended allocation set of LLC cache ways to a resource management daemon that is capable of managing resources of the compute node, wherein the resource management daemon allocates LLC cache ways of the processor for each workload based on the recommended allocation set of LLC cache ways.