Patent ID: 11948838
Assignee: QORVO US, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An apparatus comprising:
a first semiconductor chip having a first substrate, a first metal layer, and a plurality of first component portions, wherein:
the first substrate includes a first substrate base and a plurality of first protrusions at a backside of the first substrate, wherein each of the plurality of first protrusions with a same height protrudes from a bottom surface of the first substrate base, and at least one first via hole extends vertically through one of the plurality of first protrusions and the first substrate base;
the first metal layer selectively covers exposed surfaces at the backside of the first substrate and fully covers inner surfaces of the at least one first via hole; and
the plurality of first component portions is over a top surface of the first substrate base and a certain one of the plurality of first component portions is electrically coupled to a portion of the first metal layer at a top of the at least one first via hole; and

a second semiconductor chip, which is stacked underneath the first semiconductor chip, having a second substrate and a plurality of second component portions over a top surface of the second substrate, wherein each of the plurality of first protrusions protrudes toward a corresponding second component portion, such that the certain one of the plurality of first component portions is electrically coupled to a certain one of the plurality of second component portions by the first metal layer.