Patent ID: 11922223
Assignee: XILINX, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 19:
20. An integrated circuit comprising:
a base partition implementing a base partition design in programmable circuitry of the integrated circuit, wherein the base partition design is associated with a first universally unique identifier (UUID);
a memory, having a predetermined address, configured to store the first UUID, wherein the first UUID is a cryptographic hash of a post-routed version of the base partition design as implemented in the base partition;
wherein the memory and first UUID are readable by a host data processing system communicatively linked to the integrated circuit through the base partition;
an isolation interface implemented in the programmable circuitry and coupled to the base partition, wherein the isolation interface is associated with a second UUID;
a reconfigurable partition of the programmable circuitry coupled to the isolation interface, wherein the reconfigurable partition implements a partition design that is compatible with the second UUID of the isolation interface; and
wherein the host data processing system selects the partition design from a plurality of partition designs based on matching a UUID of an interface of the partition design with the second UUID of the isolation interface.