Patent ID: 11967963
Assignee: MELLANOX TECHNOLOGIES, LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An Integrated Circuit (IC), comprising feedback control-loop (FCL) circuitry to generate a delay-compensated output signal responsively to a non-compensated output signal, the FCL circuitry comprising:
a controlled oscillator, to generate the non-compensated output signal;
a main feedback path, comprising a phase detector and a loop filter, to generate a main feedback signal responsively to the delay-compensated output signal, and to control the controlled oscillator using the main feedback signal;
a delay-compensation feedback path, to generate a delay-compensation feedback signal that is indicative of a sum of (i) a first delay from an output of the controlled oscillator to an input of the phase detector and (ii) a second delay from an output of the loop filter to an input of the controlled oscillator; and
a phase interpolator, which is controlled by the delay-compensation feedback signal and is to generate the delay-compensated output signal with a phase that is set to compensate for the sum of the first delay and the second delay.