Patent ID: 11935593
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A method of operating a non-volatile memory array that includes NAND strings, each NAND string including a plurality of data memory cells coupled to a plurality of data word lines in series with a plurality of dummy memory cells connected to a plurality of dummy word lines, the method comprising:
applying a first dummy word line voltage to one or more dummy word lines of the plurality of dummy word lines in verify steps of a plurality of program operations to program the data memory cells; and
subsequently, applying a plurality of dummy word line voltages including at least a second dummy word line voltage to the one or more dummy word lines of the plurality of dummy word lines in a plurality of read operations to read the data memory cells, including applying higher dummy word line voltages to the one or more dummy word lines for read operations directed to later programmed data word lines and applying lower dummy word line voltages to the one or more dummy word lines for read operations directed to earlier programmed data word lines.