Patent ID: 11955177
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 6:
7. The memory device of claim 5, wherein the first memory block includes:
a first channel layer extending in the first direction;
a plurality of first electrode layers on a sidewall of the first channel layer, the plurality of first electrode layers being spaced apart from each other in the first direction; and
a first charge storage layer between each of the plurality of first electrode layers and the first channel layer,
wherein the second memory block includes:
a second channel layer extending in the first direction;
a plurality of second electrode layers on a sidewall of the second channel layer, the plurality of second electrode layers being spaced apart from each other in the first direction; and
a second charge storage layer between each of the plurality of second electrode layers and the second channel layer.