Patent ID: 11956254
Assignee: ARCEO LABS INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A system, comprising:
a processor configured to:
obtain signals associated with a cybersecurity risk, wherein the obtained signals include technographic signals and query derived signals obtained from queries;
generate pseudo signals based at least in part on a priori factors relating to the cybersecurity risk; and
combine the pseudo signals and the obtained signals into a Bayesian model indicating the cybersecurity risk, wherein to combine the pseudo signals and the obtained signals into the Bayesian model indicating the cybersecurity risk comprises to:
use the pseudo signals and the obtained signals as leaf nodes in the Bayesian model;
identify a set of related signals from the pseudo signals and the obtained signals; and
combine the set of related signals into an assessment node of the Bayesian model; and

a memory coupled to the processor and configured to provide the processor with instructions.