Patent ID: 11947479
Assignee: GOOGLE LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 9:
10. A system for performing bus communications, comprising:
a bus;
a master device connected with a line of the bus, wherein the line of the bus is used for time-multiplexed clock and data communication;
a first slave device connected with the line of the bus, the first slave device comprising a circuit for performing delay correction, the circuit comprising:
an input connected with the line of the bus;
a time-gate that filters data traffic on the line of the bus from synchronization pulses;
a plurality of delay cells;
a bus synchronization circuit that controls the plurality of delay cells;
a multiplexer that is used to control output timing using the plurality of delay cells; and
an output connected with the line of the bus, wherein the output timing controlled by the multiplexer controls timing of data output via the output.