Patent ID: 11894311
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A microelectronic device, comprising:
an embedded die in a dielectric body, the embedded die having a first side and a second side opposite the first side;
a first vertical contact and a second vertical contact extending through the dielectric body, the first vertical contact and the second vertical contact laterally adjacent to the first side of the embedded die;
a third vertical contact and a fourth vertical contact extending through the dielectric body, the third vertical contact and the fourth vertical contact laterally adjacent to the second side of the embedded die;
a first die electrically coupled to the embedded die, and the first die electrically coupled to and vertically overlapping the first vertical contact and the second vertical contact;
a second die electrically coupled to the embedded die, the second die electrically coupled to and vertically overlapping the third vertical contact and the fourth vertical contact, wherein there is no intervening die between the second die and the first die;
an insulative layer comprising interconnects, the insulative layer over the embedded die, over the first vertical contact, over the second vertical contact, over the third vertical contact, and over the fourth vertical contact;
first contact pads above a top surface of the insulative layer, the first contact pads coupled to the first die; and
second contact pads above the top surface of the insulative layer, the second contact pads coupled to the second die.