Patent ID: 11966600
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A memory system, comprising:
one or more memory devices comprising one or more memory cells that are each configured to store multiple bits; and
one or more controllers coupled with the one or more memory devices and configured to cause the memory system to:
receive an access command to retrieve a set of bits stored in the one or more memory devices;
determine, based at least in part on receiving the access command, whether to operate in a first mode of operation for storing multiple bits per memory cell corresponding to redundant data and associated with a reliability above a first threshold or a second mode of operation for storing multiple bits per memory cell and associated with a storage capacity above a second threshold;
retrieve the set of bits from the one or more memory cells of the one or more memory devices based at least in part on determining to operate in the second mode of operation, wherein each memory cell of the one or more memory cells store multiple bits of the set of bits; and

transmit the set of bits based at least in part on the retrieving.