Patent ID: 11937428
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A memory array comprising strings of memory cells, comprising:
laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers, operative channel-material strings of memory cells extending through the insulative tiers and the conductive tiers;
intervening material laterally-between and longitudinally-along immediately-laterally-adjacent of the memory blocks, the intervening material comprising at least one pillar extending through at least a majority of the insulative tiers and the conductive tiers through which the channel-material strings extend, the at least one pillar being wider at its bottom than at its top in a direction of horizontal and longitudinal orientation of the memory blocks; and
comprising multiple of said pillars that are longitudinally-spaced from one another along the immediately-laterally-adjacent memory blocks, said multiple of said pillars comprises groups of a plurality of said pillars, the groups being longitudinally-spaced from one another along the immediately-laterally-adjacent memory blocks, the groups individually comprising said plurality of said pillars that are side-by-side orthogonal said direction.