Patent ID: 11914253
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 13:
14. The manufacturing method according to claim 10, wherein the forming a pixel electrode, a gate line and a gate electrode by means of one patterning process comprises:
depositing a first transparent conductive film and a first metal film on the base sequentially;
coating a layer of photoresist on the first metal film, gradient exposing and developing the photoresist using a halftone mask or a gray tone mask, forming an unexposed region at a location where the gate line and the gate electrode to be formed are located, the unexposed region being with a photoresist having a first thickness, forming a partially exposed region at a location where the pixel electrode to be formed is located, the partially exposed region being with a photoresist having a second thickness, forming a fully exposed region at other locations without a photoresist, and the first thickness is greater than the second thickness;
etching away the first metal film and the first transparent conductive film in the fully exposed region by means of a first etching process;
removing the photoresist in the partially exposed region by means of an ashing process, exposing the first metal film; and
etching away the first metal film in the partially exposed region by means of a second etching process, removing a remaining portion of the photoresist and forming the pixel electrode, the gate line and the gate electrode on the base.