Patent ID: 11921786
Assignee: SAP SE
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. The method of claim 16, wherein the crossbar comprises a bank shuffle level configured to receive route, from one graph core to another graph core, a neighbors array comprising a sequence of numbers serving as addresses to vertex labels in a vertex labels array of a corresponding partition, wherein the routing is performed based on a last log2 e quantity of bits comprising the neighbors array, wherein e corresponds to a quantity of banks comprising an on-chip memory of each graph core, wherein the crossbar further comprises a core shuffle level configured to shuffle neighbor indices annotated with originating line and lane to a graph core containing a corresponding vertex label, wherein the shuffling of the neighbor indices are performed based on a first log2 p quantity of bits of the neighbor array, and wherein p corresponds to a quantity of the plurality of graph cores.