Patent ID: 11973027
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A semiconductor device, comprising:
a substrate comprising source/drain (S/D) regions;
a gate structure on the substrate and between the S/D regions;
a contact structure laterally aside the gate structure and connected to the S/D region;
a first dielectric layer laterally aside the gate structure and a lower portion of the contact structure, wherein the first dielectric layer is spaced apart from the lower portion of the contact structure by an air gap therebetween, and the S/D regions are exposed at a bottom of the air gap; and
a second dielectric layer disposed over the air gap, the first dielectric layer and the gate structure, the second dielectric layer is in contact with an upper portion of the contact structure.