Patent ID: 11922058
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method of operating a three-dimensional (3D) memory device that comprises an array of 3D NAND memory cells, an array of static random-access memory (SRAM) cells, and a peripheral circuit, wherein the array of SRAM cells and the peripheral circuit arranged at one side of a bonding interface are bonded with the array of 3D NAND memory cells at another side of the bonding interface to form a chip, the method comprising:
buffering data in the array of SRAM cells, the data being received from a host through the peripheral circuit;
transmitting the data from the array of SRAM cells to the array of 3D NAND memory cells; and
programming the data into the array of 3D NAND memory cells.