Patent ID: 11871560
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 11:
12. The method of claim 11, wherein said etching part of the initial first mask layer, part of the initial first dielectric layer, part of the initial conductive layer and part of the base by taking the second dielectric layer as a mask, so as to form bit line structures comprises:
etching part of the initial first mask layer by taking the corrected second polycrystalline silicon layer as a mask, so as to form a first mask layer with a trapezoidal structure;
etching part of the initial first dielectric layer by taking the first mask layer with the trapezoidal structure as a mask, so as to form a first dielectric layer with a trapezoidal structure;
removing the first carbon layer;
correcting the first mask layer with the trapezoidal structure and the first dielectric layer with the trapezoidal structure, so as to form the first mask layer with a rectangular structure and the first dielectric layer with a rectangular structure; and
etching part of the initial conductive layer and part of the base by taking the first dielectric layer with the rectangular structure as a mask, so as to form the bit line structures.