Patent ID: 11880598
Assignee: EMC IP HOLDING COMPANY LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. The system of claim 15 wherein the processing circuitry is further configured to run the executable code out of the memory to:
receive, at the storage node from the storage client, a second capacity manager plugin for the request manager framework, the second capacity manager plugin defining rules for managing a capacity of the storage node for a specified second operation type, the request manager component being further agnostic to the defined rules for managing the capacity of the storage node for the specified second operation type; and
receive a second sequencing request for a second operation of the specified second operation type at the request manager component of the request manager framework;
receive, at the storage node from the storage client, a second sequencing request persister plugin for the request manager framework, the second sequencing request persister plugin defining capabilities and/or priorities for managing persistence of sequencing requests for the specified second operation type, the request manager framework being further agnostic to the defined capabilities and/or priorities for managing the persistence of sequencing requests for the specified second operation type, the first transaction further comprising:
initiate, by the request manager component, writing a first persistent record of the first sequencing request to a first repository for the specified first operation type by the first sequencing request persister plugin; and

initiate a second transaction involving at least the request manager component and the second sequencing request persister plugin, the second transaction comprising:
initiate, by the request manager component, writing a second persistent record of the second sequencing request to a second repository for the specified second operation type by the second sequencing request persister plugin.