Patent ID: 11955988
Assignee: VIVEK SATHYANARAYANA NITTOOR
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 0:
1. A system comprising hardware processor and memory stored with a plurality of instructions that are run on the hardware processor for generating a catalog of LDPC codes through one or more applications or algorithms, for creating error correction codes in communication systems, the system comprising:
a user interface configured to receive a plurality of details of a graph system, and wherein the user interface is configured to receive the plurality of graph parameters through a computing device;
a hardware processor coupled to the user interface for generating graphs based on user inputs using one or more applications or algorithms;
a graph creation module loaded with instructions that are run on the hardware processor and configured to generate (3, g) Hamiltonian Bipartite graphs of specified even girth, and graphs with larger number of orders and larger girths through one or more applications or algorithms;
a table creation module loaded with instructions that are run on the hardware processor and configured to create a table of (3, g) Hamiltonian Bipartite graphs for a symmetry factor b, for different orders through an application or algorithm;
a catalog creation module loaded with instructions that are run on the hardware processor and configured to generate a catalog of (3, g) Hamiltonian Bipartite graphs including a plurality of tables for various orders through an application or algorithm;
a LDPC generation module loaded with instructions that are run on the hardware processor and configured to generates a catalog of LDPC codes from a catalog of (3, g) Hamiltonian Bipartite graphs through an application or algorithm; and
a database coupled to at least one of the graph creation module, the table creation module, the catalog creation module, and the LDPC generation module, and configured for storing a plurality of details of the graph system and the catalog of generated graphs, and the catalog of the LDPC codes;
wherein the graph creation module is further configured to generate smallest known (3, g) graph for even a specified girth through an application or algorithm, and wherein the graph creation module is configured to generate a list (3, g) graphs for even a girth g to provide graphs that are not-vertex transitive for many orders through an application or algorithm, and wherein the hardware processor is configured for creation of the error-correction codes through an application or algorithm using the catalogue of (3, g) graph for even girth g as a source, for correcting errors introduced during data transmission from a source to receiver in a communication channel to enable delivery of digital data over unreliable communication channels and to enable reconstruction of original data sent and wherein the error correction codes are implemented in communication systems to remove errors introduced during a transmission from a source to receiver due to channel noise.