Patent ID: 11929130
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method for testing a self refresh (SR) cycle used for a memory, the method comprising:
executing a preset number of data-retention-capacity acquisition steps, the data-retention-capacity acquisition steps including determining a preset refresh time;
sending an SR entry command to control the memory to enter an SR operation;
sending an SR exit command to control the memory to exit the SR operation after the memory executes SR for the preset refresh time;
detecting a current data retention capacity of the memory;
obtaining a cycle of a function of a data retention capacity with respect to a corresponding preset refresh time; and
determining the SR cycle of the memory with the cycle of the function;
wherein the step of detecting the current data retention capacity of the memory comprises:
performing a data reading step, the data reading step comprising determining a preset waiting time;
waiting for the preset waiting time after the memory executes the SR for the preset refresh time;
reading data of the memory after waiting for the preset waiting time;
when the data is successfully read, incrementing the preset waiting time and proceeding to the data reading step; and
when the data is not successfully read, determining a previous preset waiting time as the data retention capacity, wherein the previous preset waiting time is a previous longest preset waiting time in which the data may be read successfully.