Patent ID: 11917834
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 11:
12. An integrated assembly, comprising:
pillars arranged in an array; the array comprising a row direction and a column direction; the pillars having upper source/drain regions, lower source/drain regions, and channel regions between the upper and lower source/drain regions;
gating structures proximate the channel regions and extending along the row direction;
conductive structures beneath the pillars and coupled with the lower source/drain regions; the conductive structures extending along the column direction;
insulative structures above the pillars and extending along the column direction; each of the insulative structures having a first lateral side and an opposing second lateral side, and being associated with a pair of the columns of the pillars along said first and second lateral sides;
bottom electrodes coupled with the upper source/drain regions; the bottom electrodes being configured as angle plates; the angle plates having horizontal segments adjacent the upper source/drain regions and having vertical segments extending upwardly from the horizontal segments;
the vertical segments being adjacent the lateral sides of the insulative structures;
the bottom electrodes including a first set adjacent the first lateral sides and a second set adjacent the second lateral sides;
capacitor-insulative-material adjacent the bottom electrodes, the capacitor-insulative-material being substantially absent from regions directly between the bottom electrodes of the first set and from regions directly between the bottom electrodes of the second set; and
top-electrode-material adjacent the capacitor-insulative-material.