Patent ID: 11960319
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory device comprising:
an internal clock generator configured to generate an internal clock signal based on an external clock signal received from a host and responsive to a chip enable signal;
an internal enable signal generator configured to operate based on the internal clock signal, and configured to generate an internal enable signal based on an external enable signal received from the host; and
a monitoring signal generator configured to generate a monitoring signal that indicates whether the memory device is operating under control of the host based on at least one of the internal clock signal or the internal enable signal, and configured to output the monitoring signal from the memory device,
wherein a comparison of the monitoring signal with the external enable signal indicates, in real time, whether the internal enable signal was generated in accordance with an order in which the external enable signal was received from the host.