Patent ID: 11930679
Assignee: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 15:
16. The array substrate according to claim 15, wherein the active layer in the thin film transistor is located between the gate and the substrate;
the dielectric layers further comprise: an interlayer dielectric layer located between the source-drain electrode and the gate, and the drain electrode is electrically connected to the active layer through a third through hole penetrating through the interlayer dielectric layer;
orthographic projections of the third through hole and the first through hole on the substrate do not overlap; and
a thickness of the interlayer dielectric layer between the thin film transistor and the substrate is greater than a thickness of the interlayer dielectric layer between the color resist and the substrate.