Patent ID: 11901252
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device package, comprising:
a first substrate;
a first electronic component disposed over the first substrate, the first electronic component having a first surface facing the first substrate and a second surface opposite to the first surface;
a first redistribution layer (RDL) disposed on the second surface of the first electronic component;
a conductive via disposed within the first electronic component;
a second RDL disposed on the first surface of the first electronic component and electrically connected to the first RDL through the conductive via;
an encapsulating layer encapsulating and contacting a lateral surface of the first RDL and a lateral surface of the second RDL;
a first electrical contact adjacent to the first electronic component, wherein the encapsulating layer encapsulates the first electrical contact, and a width of the first electrical contact is greater than a width of the conductive via; and
a second electrical contact disposed on the first RDL, wherein the width of the first electrical contact is greater than a width of the second electrical contact, and a bottom surface of the first electrical contact aligns to a bottom surface of the second RDL.