Patent ID: 11940862
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 16:
17. A storage controller configured to communicate with an external host device including a submission queue and a completion queue, the storage controller comprises:
a physical layer configured to communicate with an external host device based on a nonvolatile memory express (NVMe) interface;
a command fetching block configured to fetch a command from the submission queue of the external host device through the physical layer based on a first clock;
a control block configured to execute the command based on a second clock; and
a completion block configured to write completion information in the completion queue of the external host device through the physical layer based on a third clock; and
a clock managing block configured to:
generate the first to third clocks based on a reference clock, and
perform a clock control operation to control the first to third clocks based on statuses of the command fetching block, the control block, and completion block, respectively.