Patent ID: 11935992
Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A process for fabricating an electronic device, comprising:
providing a first electronic component including a carrier substrate having a back side and a front side, an electronic chip having a back side mounted on the front side of the carrier substrate, an integrated optical element at a front side of the electronic chip, and an overmolded transparent block encapsulating the electronic chip above the front side of the carrier substrate;
providing a second electronic component including a carrier substrate having a back side and a front side, an electronic chip having a back side mounted on the front side of the carrier substrate, an integrated optical element at a front side of the electronic chip, and an overmolded transparent block encapsulating the electronic chip above the front side of the carrier substrate;
mounting the first and second electronic components, spaced apart by a distance from each other, above a side of a provisional carrier substrate, in positions where the back sides, or conversely the front sides, of the first and second electronic components are adjacent to the said side of the provisional carrier substrate;
placing the provisional carrier substrate with the first and second electronic components in a cavity of a mold, in positions where the provisional carrier substrate is adjacent to a first face of the mold and where the front sides of the first and second electronic components are at least partially adjacent to a second face of the mold, at least in zones aligned with the optical elements;
injecting an opaque encapsulating material into the cavity so as to obtain an encapsulating and holding grid containing spaces in which the first and second electronic components are located; and
demolding a structure formed by the encapsulating and holding grid with the first and second electronic components from the mold.