Patent ID: 11914487
Assignee: NEUROBLADE LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A non-transitory computer-readable medium that stores instructions that, when executed by at least one processor, cause the at least one processor to:
determine a number of words that are required simultaneously to perform a task, the task requiring at least one computation;
write words that need to be accessed simultaneously in a plurality of memory banks disposed on a substrate of a chip when a number of words that can be accessed simultaneously from one of the plurality of memory banks is lower than the number of words that are required simultaneously;
transmit an indication to perform the task to a configuration manager disposed on the substrate of the chip; and
transmit instructions to configure a memory controller disposed on the substrate of the chip to,
within a first line access cycle:
access at least one first word from a first memory bank from the plurality of memory banks using a first memory line,
send the at least one first word to at least one processing unit disposed on the substrate of the chip and connected to the memory controller, and
open a first memory line in the second memory bank to access a second address from the second memory bank from the plurality of memory banks, and

within a second line access cycle:
access at least one second word from the second memory bank using the first memory line,
send the at least one second word to at least one processing unit disposed on the substrate of the chip and connected to the memory controller, and
access a third address from the first memory bank using a second memory line in the first memory bank.