Patent ID: 11914499
Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A system to provide filtered trace data, the system comprising:
a processor;
a Static Random Access Memory (SRAM) controller;
a first data-preparation circuit coupled with the processor to receive first traced memory-write data from the processor, the first data-preparation circuit configured to filter first unselected traced memory-write data from first selected traced memory-write data;
a second data-preparation circuit coupled with the SRAM controller to receive second traced memory-write data from the SRAM controller, the second data-preparation circuit configured to filter second unselected traced memory-write data from second selected traced memory-write data;
a data-collection network configured to receive the first selected traced memory-write data and the second selected traced memory-write data; and
an output interface coupled with the data-collection network to output the first selected traced memory-write data and the second selected traced memory-write data.