Patent ID: 11899741
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 32:
33. A computing apparatus comprising:
one or more processors, embedded inside a memory, configured to:
in response to a read command of at least a portion of data among input data and filter data stored in the memory comprising a function-in-memory (FIM), transform at least a first portion of the input data using a first transforming matrix and transform at least a second portion of the filter data using a second transforming matrix, respectively during a clock cycle corresponding to the read command, the first transforming matrix and the second transforming matrix being respectively based on a parameter of the convolution operation, and output a corresponding transformation result as transformed data, using a third transforming matrix; and
reduce information loss associated with the outputting by adjusting relationship between the second transforming matrix and the third transforming matrix.