Patent ID: 11940871
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory system comprising:
a nonvolatile memory including a plurality of memory cells; and
a memory controller configured to:
read first data through application of a first read voltage to each of the memory cells;
perform a first decoding process with respect to the first data;
when the first decoding process fails, perform a tracking process by:
reading second data indicating a threshold voltage level of each of the memory cells through application of a plurality of second read voltages to each of the memory cells, the second read voltages being shifted by a predetermined amount; and
obtaining, with respect to each of the memory cells, likelihood information indicating a likelihood that the memory cell in the threshold voltage level represents a bit value of 0 or 1 using the second data; and

perform a second decoding process with respect to the second data using the likelihood information.