Patent ID: 11966327
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A memory system comprising:
a nonvolatile memory that includes a plurality of memory areas including at least a first memory area and a second memory area different from the first memory area, each of the plurality of memory areas including a memory cell array and a data register; and
a memory controller configured to control the nonvolatile memory,
wherein
a read operation includes a first operation of reading data from the memory cell array and a second operation of transmitting at least a part of the read data from the nonvolatile memory to the memory controller, the first operation being an operation in which data read from the memory cell array is stored in the data register, the second operation being an operation in which data read from the data register is transmitted to the memory controller, and
the memory controller is configured to, when executing the read operation in the first memory area and the read operation in the second memory area in parallel:
determine priorities of the second operation in the first memory area and the second operation in the second memory area, based on a result of comparison between (A) a first total time period required for the first operation and the second operation in the first memory area and (B) a second total time period required for the first operation and the second operation in the second memory area;
in a case where data to be read to the memory controller is stored in the data register of the first memory area and the data register of the second memory area, and when determining that the priority of the second operation in the first memory area is higher than the priority of the second operation in the second memory area, cause the second memory area to stand by until execution of the second operation in the first memory area is completed; and
execute the second operation in the second memory area after the execution of the second operation in the first memory area is completed.