Patent ID: 11887935
Assignee: RENESAS ELECTRONICS CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device manufacturing method comprising:
forming a plurality of semiconductor devices from a semiconductor wafer; and
identifying a position of one of the semiconductor devices within the semiconductor wafer,
wherein the forming the plurality of semiconductor devices comprises:
forming a first repeating pattern including i (i is an integer greater than or equal to 2) semiconductor devices each having a unique pattern;
forming a second repeating pattern including j (j is an integer greater than or equal to 2) semiconductor devices each having a unique pattern;
defining a plurality of semiconductor devices on the semiconductor wafer such that each of k>i, j) semiconductor devices has a unique pattern based on the first and second repeating patterns; and
grinding a backside of the semiconductor wafer,

wherein each unique pattern of the k semiconductor devices is composed of a combination of the unique patterns of the first and second repeating patterns, and
wherein the position of the one of the semiconductor devices is identified based on the unique patterns of the first and second repeating patterns and an angle of a grinding mark of the semiconductor device.