Patent ID: 11926892
Assignee: GLOBALWAFERS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC C  H  B | IPC B  C  H

Claim 0:
1. A method for conditioning a processing reactor to reduce edge roll-off of a single semiconductor structure during etching of the semiconductor structure, the reactor comprising a susceptor for supporting the semiconductor structure and a one-piece preheat ring that surrounds the susceptor, the one-piece preheat ring and susceptor being separated by a gap, the semiconductor structure being supported within a recess of the susceptor, the method comprising:
introducing a stripping etchant into the processing reactor without a semiconductor structure being disposed on the susceptor to strip a polycrystalline silicon surface layer from the susceptor and the one-piece preheat ring; and
depositing a polycrystalline silicon surface layer on the susceptor and one-piece preheat ring without a semiconductor structure being disposed on the susceptor to reduce edge roll-off of the semiconductor structure during etching of the semiconductor structure, the polycrystalline silicon surface layer being deposited by contacting the susceptor with trichlorosilane at a temperature of 900° C. to 1050° C.