Patent ID: 11916110
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 13:
14. A method for forming a semiconductor device structure, comprising:
forming a fin structure having a stack of semiconductor layers comprising first semiconductor layers and second semiconductor layers alternatingly arranged;
forming a sacrificial gate structure over a portion of the fin structure;
removing the first and second semiconductor layers not covered by the sacrificial gate structure;
forming an epitaxial source/drain feature in the source/drain region;
removing portions of the sacrificial gate structure to expose the first and second semiconductor layers; and
selectively removing portions of the second semiconductor layers so that at least one second semiconductor layer remains between two adjacent first semiconductor layers, and the at least one second semiconductor layer has a height and a width that is less than the height.