Patent ID: 11955976
Assignee: REALTEK SEMICONDUCTOR CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 4:
5. The quadrant alternate switching phase interpolator of claim 1, wherein the controller circuitry comprises:
a plurality of logic gate circuits configured to generate an update signal according to a first state signal, a first phase control bit and a last phase control bit in the plurality of phase control bits, a first phase adjustment signal, and a second phase adjustment signal;
an interval adjustment circuit configured to generate a shift trigger signal according to a clock signal and the update signal;
a state prediction circuit configured to update the first state signal according to the shift trigger signal;
a first shift register circuit configured to store the quadrant control code, and perform the bit-shift operation on the quadrant control code according to the shift trigger signal and at least one of the first phase adjustment signal and the second phase adjustment signal; and
a second shift register circuit configured to store the plurality of phase control bits and perform the bit-shift operation on the plurality of phase control bits according to the first state signal, the clock signal, and at least one of the first phase adjustment signal and the second phase adjustment signal.