Patent ID: 11868642
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
receiving a first request, from a host system, to perform a memory access operation on a group of memory cells, wherein the group of memory cells comprises one or more management units (MUs);
responsive to determining that a data structure associated with the group of memory cells references a second request to perform a trim operation, blocking the memory access operation, wherein the second request references a first range of logical block addresses (LBAs);
responsive to determining that the range of LBAs referenced by the second request does not include each LBA of a second range of LBAs corresponding to the one or more MUs of the group of memory cells, performing the trim operation on the group of memory cells; and
responsive to determining that the data structure indicates a completion of the trim operation, performing the memory access operation.