Patent ID: 11935960
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. Integrated memory, comprising:
a first series of first conductive structures; the first conductive structures extending along a first horizontal direction;
pillars of semiconductor material extending upwardly from the first conductive structures, the pillars having opposing sidewall surfaces extending a height of the pillar and having a uniform width along an entirety of the height; each of the pillars including a lower source/drain region, an upper source/drain region, and a channel region between the lower and upper source/drain regions; the lower source/drain regions being coupled with the first conductive structures;
insulative material adjacent an entirety of the sidewall surfaces of the pillars, the insulative material comprising ZrO where the chemical formula indicates primary constituents rather than a specific stoichiometry;
a second series of second conductive structures; the second conductive structures extending along a second horizontal direction which crosses the first direction; the second conductive structures comprising gating regions operatively proximate the channel regions and spaced from the channel regions by at least the insulative material; and
storage elements coupled with the upper source/drain regions.