Patent ID: 11881432
Assignee: nan
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. A method of fabricating an integrated circuit structure, the method comprising:
forming a dielectric material, the dielectric material comprising silicon, oxygen and carbon;
forming a trench in the dielectric material, the trench having a bottom and sidewalls;
forming a core material within the trench, the core material comprising copper, and the core material having a bottom surface, sidewall surfaces and a top surface;
forming a jacket on the bottom surface, along the sidewall surfaces and on the top surface of the core material in a cross-section perspective, the jacket comprising cobalt, wherein at least a portion of the jacket on the top surface of the core material is within the trench in the dielectric material; and
forming a barrier layer between the bottom of the trench and the jacket, the barrier layer between the sidewalls of the trench and the jacket, and the barrier layer comprising tantalum.