Patent ID: 11886366
Assignee: QUALCOMM INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 10:
11. A data communication apparatus, comprising:
a line driver configured to couple the data communication apparatus to a single-wire serial bus; and
a protocol controller configured to:
determine that a first sequence start condition (SSC) has been initiated when the single-wire serial bus has transitioned from a first signaling state to a second signaling state;
cause the line driver to drive the single-wire serial bus from the second signaling state to the first signaling state after a first duration, thereby completing the first SSC;
provide an arbitration window that comprises a plurality of timeslots by causing the line driver to present a high impedance to the single-wire serial bus after the first SSC is completed;
cause the line driver to drive the single-wire serial bus to the first signaling state in each timeslot in the plurality of timeslots in which the single-wire serial bus is driven to the second signaling state;
transmit a second SSC after the arbitration window is expired; and
transmit a command addressed to at least one slave device after transmitting the second SSC, the command being encoded using Manchester encoding.