Patent ID: 11864390
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 10:
11. The semiconductor memory device according to claim 1, further comprising:
a plurality of first conductive layers stacked on the substrate in the first direction;
a plurality of second conductive layers stacked on the substrate in the first direction, the plurality of second conductive layer being provided apart from the first conductive layers in a third direction which intersects the first direction and the second direction;
a first pillar passing through the first conductive layers in the first direction and including a semiconductor layer;
a second pillar passing through the second conductive layers in the first direction and including a semiconductor layer; and
a switch circuit provided between the first conductive layers and the second conductive layers, the switch circuit electrically coupling the first conductive layers and the second conductive layers to the first peripheral circuit,
wherein intersections of the first pillar and the first conductive layers and intersections of the second pillar and the second conductive layers function as the memory cells.