Patent ID: 11971829
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 10:
11. A method, comprising:
reading a page of hard bit data and corresponding soft bit data from a first plane of non-volatile memory cells;
storing the read page of hard bit data and the corresponding soft bit data in a first cache buffer;
transferring the page of hard bit data and the corresponding soft bit data over an internal data bus in a parallel format from the first cache buffer to an input-output interface, the hard bit data being transferred along a first data path and the corresponding soft bit data being transferred along a second data path, the second data path including compressing the corresponding soft bit data in a compression circuit;
converting, by the input-output interface, of the page of hard bit data and the compressed corresponding soft bit data from the parallel format to a serial format; and
providing the page of hard bit data and the compressed corresponding soft bit data to an external data bus in the serial format.