Patent ID: 11929115
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 15:
16. A memory device, comprising:
a static random access memory (SRAM) cell, formed on a semiconductor substrate, and having a first storage node and a second storage node; and
a non-volatile memory cell, disposed over the SRAM cell, and comprising:
a first semiconductor region and a second semiconductor region laterally spaced apart from the first semiconductor region, wherein the first semiconductor region is connected to the first storage node through a bottom via, and the second semiconductor region is connected to the second storage node through a second bottom via;
a first ferroelectric tunneling junction (FTJ) and a second FTJ, electrically connected to the first and second semiconductor regions, respectively;
a first word line, capacitively coupled to the first and second semiconductor regions in between the first FTJ and the first bottom via, and in between the second FTJ and the second bottom via; and
a first bit line, electrically connected to the first and second FTJs, wherein the first FTJ is located between the first semiconductor region and the first bit line, and the second FTJ is located between the second semiconductor region and the first bit line.