Patent ID: 11923253
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A device, comprising:
a first transistor over a semiconductor fin, the semiconductor fin extending upwards from a substrate;
a second transistor over the semiconductor fin; and
an isolation structure isolating the first transistor from the second transistor, the isolation structure having:
a lower dielectric portion in the semiconductor fin and lower than tops of source/drain regions of the first and second transistors; and
an upper dielectric portion above the semiconductor fin and higher than the tops of the source/drain regions of the first and second transistors, wherein a sidewall of the lower dielectric portion in the semiconductor fin has more slope change than a sidewall of the upper dielectric portion above the semiconductor fin, and the upper dielectric portion has a width greater than a minimal width of the lower dielectric portion.