Patent ID: 11955423
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A method of forming a semiconductor device, the method comprising:
forming a first conductive line and a second conductive line over a semiconductor substrate;
forming a first passivation layer over and along sidewalls of the first conductive line and the second conductive line;
forming a second passivation layer over the first passivation layer;
forming a protection layer over the second passivation layer;
after forming the first passivation layer, the second passivation layer, and the protection layer, forming a first under-bump metallurgy (UBM) structure over the first conductive line, the first UBM structure extending through the protection layer, the first passivation layer, and the second passivation layer and being electrically coupled to the first conductive line; and
after forming the first passivation layer, the second passivation layer, and the protection layer, forming a second UBM structure over the second conductive line, the second UBM structure extending through the protection layer, the second UBM structure being electrically isolated from the second conductive line by at least a portion of the first passivation layer.