Patent ID: 11894464
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A semiconductor device comprising:
a fin protruding above a substrate;
isolation regions on opposing sides of the fin;
a composite liner comprising:
an interior layer contacting and extending continuously along sidewalls of the fin from the substrate to an upper surface of the fin distal from the substrate, wherein the upper surface of the fin is interposed between the interior layer and the substrate; and
an exterior layer over the interior layer and below an upper surface of the isolation regions distal from the substrate, wherein the exterior layer is disposed between the interior layer and the isolation regions, wherein the interior layer is a first semiconductor material, and the exterior layer is a first dielectric material, wherein the fin comprises a second semiconductor material different from the first semiconductor material;

a gate dielectric layer over the upper surface of the isolation regions, wherein the gate dielectric layer contacts and extends along the interior layer of the composite liner; and
a gate electrode over the gate dielectric layer.