Patent ID: 11875864
Assignee: PETAIO INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A storage system comprising:
a NAND storage device comprising a plurality of blocks of storage; and
a controller coupled to the NAND storage device and programmed to:
evaluate frequency of writing and write amplification of the NAND storage device;
determining an expected retention time based on the frequency of writing and the write amplification of the NAND storage device; and
if the expected retention time is greater than a maximum allowed retention time:
track retention time of each block of the plurality of blocks of storage; and
write dummy data to each block of the plurality of blocks having a retention time exceeding the maximum allowed retention time and that is determined to be partially written;

wherein the controller is further programmed to determine whether each block of the plurality of blocks is partially written by determining that data written to each block is below a threshold percentage of a storage capacity of each block;
wherein the threshold percentage is a function of a number of program and erase cycles of each block and is selected such that failed bit counts remain correctable according to error correction implemented by the NAND storage device.