Patent ID: 11925025
Assignee: RENESAS ELECTRONICS CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 1:
2. The semiconductor device according to claim 1,
wherein the first transistor includes:
a second word gate formed on a third gate insulating film; and
a second coupling gate formed on a fourth gate insulating film having a thickness thicker than the third gate insulating film,
wherein the first transistor includes a first source electrode electrically connected to a second source electrode of the second transistor,
wherein in the first transistor, when a current flows through the memory cell, a third voltage is supplied from the outside of the memory cell, so that a third region of the semiconductor substrate under the second word gate becomes conductive state,
wherein in the first transistor, when a current flows through the memory cell, a fourth voltage is supplied from the outside of the memory cell, so that a fourth region of the semiconductor substrate under the second coupling gate becomes conductive state,
wherein the fourth voltage is higher than the third voltage, and
wherein the second voltage is lower than the fourth voltage.