Patent ID: 11914989
Assignee: COHERENT LOGIX, INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A method for configuring a multiprocessor array (MPA), wherein the MPA comprises hardware resources including a plurality of processors and a plurality of memories, the method comprising:
accessing software code, wherein the software code a set of program instructions that:
specify one or more cell definitions that include:
program instructions executable to perform a function; and
one or more language constructs; and

instantiate first, second, and third cell instances, each of which is an instantiation of one of the one or more cell definitions, wherein the instantiation includes configuration of the one or more language constructs such that:

the first and second cell instances communicate via respective communication ports;
the first and second cell instances are included in the third cell instance;
a communication port of the first cell instance is coupled to a first communication port of the third cell instance; and
a communication port of the second cell instance is coupled to a second communication port of the third cell instance different from the first communication port of the third cell instance; and

deploying the first, second, and third cell instances on the MPA.