Patent ID: 11948622
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 27:
28. An apparatus, comprising:
a memory array comprising a set of word lines and a set of digit lines; and
a controller configured to cause the apparatus to:
activate a first circuit to couple a node with a first voltage supply that is configured to supply voltage for the set of word lines, the node coupled with the set of digit lines;
apply a first voltage to the set of digit lines based at least in part on activating the first circuit, the first voltage based at least in part on a voltage output by the first voltage supply;
activate a second circuit to couple the node with a second voltage supply that is configured to supply voltage to peripheral circuitry; and
apply a second voltage to the set of digit lines based at least in part on activating the first circuit, the second voltage based at least in part on a voltage output by the second voltage supply.