Patent ID: 11935866
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC B  H

Claim 8:
9. A semiconductor device comprising:
a first substrate;
a plurality of conductive pillars extending from the first substrate, wherein the plurality of conductive pillars comprises:
a first conductive pillar having a first width measured in a first direction parallel to a surface of the first substrate, wherein the first width is substantially uniform along an entire first height of the first conductive pillar,
a second conductive pillar having a second width measure in the first direction, wherein the second width is substantially uniform along an entire second height of the second conductive pillar, the first width is different from the second width, and the entire first height is equal to the entire second height, and
a third conductive pillar having a third width measured in the first direction, wherein the third width is different from the first width, the third width is substantially uniform along an entire third height of the third conductive pillar, and the third conductive pillar is between the first conductive pillar and the second conductive pillar in the first direction; and

a plurality of under bump metallurgy (UBM) layers, wherein each UBM layer of the plurality of UBM layer is between the first substrate and a corresponding conductive pillar of the plurality of conductive pillars.