Patent ID: 11948914
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method for forming a package structure, comprising:
bonding an integrated device to a lower surface of a semiconductor chip, wherein the semiconductor chip is a functional integrated circuit (IC) chip and the integrated device is a different type of semiconductor device from the semiconductor chip;
placing the semiconductor chip with the integrated device over a package substrate so that the integrated device is between the lower surface of the semiconductor chip and an upper surface of the package substrate; forming a cavity on the upper surface of the package substrate to accommodate the integrated device, before placing the semiconductor chip with the integrated device over the package substrate; and
bonding the semiconductor chip to the package substrate through conductive structures formed between the lower surface of the semiconductor chip and the upper surface of the package substrate, wherein the integrated device is laterally surrounded by the conductive structures, and the integrated device and the conductive structures are located within boundaries of the semiconductor chip when viewed in a direction perpendicular to the lower surface of the semiconductor chip.