Patent ID: 11861227
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A storage device comprising:
a non-volatile memory including a plurality of non-volatile memory cells;
a host interface configured to receive a first memory command for requesting the non-volatile memory to perform a predetermined memory operation from a host;
a multi-core processor including a plurality of cores;
a task scheduler configured to generate a first task and a second task based on the first memory command, check an execution time of the first task, select a first core among the plurality of cores having a shortest execution time based on execution times of the plurality of cores, increase the execution time of the first core by the execution time of the first task to update the execution times, issue the first task to the first core, select a second core from among the plurality of cores having a shortest execution time based on the updated execution times, and issue the second task to the first core when the second task is dependent on the first task and otherwise issue the second task to the second core.