Patent ID: 11972818
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. The method as set forth in claim 15, wherein the threshold voltage possible for each of the memory cells spans a threshold window, the plurality of data states includes an erased state at a first end of the threshold window and a plurality of programmed data states each corresponding to the threshold voltage being higher than the threshold voltage associated with the erased state, the plurality of programmed data states including a highest data state at a second end of the threshold window opposite the first end and associated with the threshold voltage being higher than the threshold voltage associated with the erased state and at least one other of the plurality of programmed data states, and in the verify level trimming process, the method further includes the steps of:
determining a recommended change amount for each one of the plurality of programmed data states, the recommended change amount for each one of the plurality of programmed data states being increased by a predetermined higher program verify voltage delta in response to the measured failure bit count percentage associated with one of the plurality of crossovers preceding the one of the plurality of programmed data states in the threshold window being larger than one of plurality of predetermined optimum failure bit count percentages associated with the one of the plurality of crossovers and the recommended change amount for each one of the plurality of programmed data states being decreased by a predetermined lower program verify voltage delta in response to the measured failure bit count percentage associated with the one of the plurality of crossovers preceding the one of the plurality of programmed data states being smaller than the one of plurality of predetermined optimum failure bit count percentages associated with the one of the plurality of crossovers and the recommended change amount being unchanged in response to the measured failure bit count percentage associated with the one of the plurality of crossovers preceding the one of the plurality of programmed data states being approximately equal to the one of plurality of predetermined optimum failure bit count percentages associated with the one of the plurality of crossovers; and
successively adjusting each of the program verify voltages for each one of the plurality of programmed data states by a total change amount equal to a sum of a recommended change amount for the one of the plurality of programmed data states and the recommended change amount for any one of the plurality of programmed data states immediately preceding the one of the plurality of programmed data states in the threshold window beginning with the one of the plurality of programmed data states adjacent the erased state and progressing to the highest data state.