Patent ID: 11954355
Assignee: ATLAS POWER TECHNOLOGIES INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 1:
2. The apparatus of claim 1 wherein the first device is such that the specific interchangeable voltage differential between the two first bit lines is ineffective to change the information, which is represented by a charge state on each electrostatic storage device or capacitor, in an absence of said specific positive or negative first signal applied to said first word line, which is required to render each first transistor conductive; and
wherein the first device further comprises:
a further circuit for reading information stored on each bidirectional tristate memory cell by applying a fourth signal to said first word line, discharging the electrostatic storage device or capacitor by said first transistor(s) to said two first bit lines; and
another circuit for interpreting charge state and polarity of the plurality of tristate bidirectional memory cells utilizing one or both of said first bit lines, through at least one of a third voltage comparison, a third polarity comparison, and third logic circuit(s).