Patent ID: 11954466
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. A method to perform machine learning-guided compiler optimizations for register-based hardware architectures comprising:
selecting a register-based compiler transformation of register-based compiler transformations to apply to source code at a current position in a search tree; determining whether the search tree is in need of pruning based on an output of a query to a machine learning (ML) model;
in response to determining the search tree is in need of pruning, pruning the search tree at the current position;
in response to applying the selected register-based compiler transformation to the source code, generating a code variant;
calculating a score associated with source code and the generated code variant at the current position; and
updating parameters of the machine learning (ML) model to include the calculated score.