Patent ID: 11948645
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. A memory device, comprising:
a plurality of memory cells;
a peripheral circuit including a plurality of page buffers coupled to the plurality of memory cells through bit lines and configured to perform a read operation on selected memory cells among the plurality of memory cells; and
a control logic configured to control the peripheral circuit to sense data stored in the selected memory cells during the read operation,
wherein each of the plurality of page buffers comprises:
a first switch coupled between a bit line coupled to a memory cell and a first sensing node;
a second switch coupled between the first sensing node and a second sensing node;
a precharging circuit coupled to the first sensing node and the second sensing node, and configured to precharge the bit line to a precharge voltage during a bit line precharge operation of the read operation and configured to precharge the second sensing node to a first voltage during an evaluation operation of the read operation;
a discharging circuit coupled to the second sensing node and configured to discharge a potential of the second sensing node from the first voltage to a second voltage during the evaluation operation;
a latch circuit coupled to the discharging circuit and the second sensing node and configured to store therein the data of the selected memory cells based on a result of comparing the potential of the second sensing node with a reference voltage after the potential of the second sensing node is discharged to the second voltage and a predetermined period elapses,
wherein the precharge circuit precharges the first sensing node in the bit line precharge operation,
wherein the first switch is turned on after the first sensing node is precharged, and couples the bit line to the first sensing node, and
wherein the second switch is turned on after the second sensing node is discharged to the second voltage and couples the first sensing node to the second sensing node.