Patent ID: 11886292
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 5:
6. The memory system of claim 5, wherein the second encoding operation comprises a not exclusive OR (XNOR) operation or an exclusive OR (XOR) operation; the second encoding circuit comprises:
a first-stage operation circuit, configured to perform the XOR or XNOR operation on all data of selected two of the bytes, and store a plurality of first operation results, each being an XOR or XNOR operation result of the selected two of the bytes; and
a second-stage operation circuit, configured to perform the XOR or XNOR operation on at least two of the plurality of first operation results, to generate the second check code, and generate the Y second check codes based on different encoding requirements.