Patent ID: 11961566
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. A method comprising:
causing a plurality of wordlines to be discharged after a program pulse programs one or more memory cells coupled with a selected wordline of the plurality of wordlines;
causing a ground voltage to be applied to a first data line to inhibit soft erase via a first pillar that is coupled with the first data line and the plurality of wordlines;
causing a supply voltage to be applied to a second data line to cause a voltage of a second pillar to float, the second pillar coupled with the plurality of wordlines and the first data line;
causing unselected wordlines, of the plurality of wordlines, to be charged to boost channel voltages in memory cells coupled with the second pillar; and
causing one of the ground voltage or a negative voltage to be applied to the selected wordline to increase a soft erase voltage between a channel of a memory cell coupled with the second pillar and the selected wordline, causing a threshold voltage stored in the memory cell to be partially erased.