Patent ID: 11877443
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 9:
10. A semiconductor device comprising:
a substrate;
a first element separation film and a second element separation film which are in the substrate and are adjacent to each other;
an insulating pattern on the substrate;
a bit line structure on the substrate;
a trench which includes a first portion in the first element separation film and a second portion in the substrate between the first element separation film and the second element separation film, a bottom face of the first portion above a bottom face of the second portion, connecting side walls for connecting the bottom face of the first portion with the bottom face of the second portion defined by the first element separation film; and
a storage contact including a first contact portion filling the first portion of the trench and a second contact portion filing the second portion of the trench without a void,
wherein the bit line structure includes a first bit line structure on an active region and across the storage contact, and a second bit line structure on the insulating pattern,
wherein a top face of the second contact portion is in contact with a bottom face of the insulating pattern,
wherein
the substrate and the storage contact include single crystal silicon,
wherein the bit line structure includes at least one of conductive film, and
wherein the storage contact entirely fills a part of the trench, the part of the trench overlapping the at least one of conductive film of the bit line structure in a direction parallel to an upper face of the substrate.