Patent ID: 11907834
Assignee: DEEPMENTOR INC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. The computer system of claim 17, wherein:
said processor (2) is programmed to, in step A), generate a number (Z) of 2-combinations of dithering algorithms from the set of the number (X) of dithering algorithms;
said processor (2) is programmed to, in step B), for each of the number (Z) of 2-combinations of dithering algorithms,
perform a dithering operation on the to-be-processed data group using one of the dithering algorithms in the 2-combination, so as to obtain a first part of the size-reduced data group being represented in (m) number of bit(s),
perform a dithering operation on the to-be-processed data group using another one of the dithering algorithms in the 2-combination, so as to obtain a second part of the size-reduced data group being represented in (n) number of bit(s), where m+n=b, and
combine the first part and the second part to obtain the size-reduced data group.