Patent ID: 11861359
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. A method of operating a memory controller including a core and a buffer memory, the method comprising:
loading a boot loader image stored in the buffer memory into a first address of a memory of the core;
receiving a first firmware image from a host in response to the boot loader image executed in the core;
updating a previous firmware image stored in the memory of the core with the first firmware image;
loading the boot loader image stored in the buffer memory into a second address of the memory of the core after the updating the previous firmware is finished;
receiving a second firmware image from the host in response to the boot loader image executed in the core; and
updating the first firmware image stored in the memory of the core with the second firmware image,
wherein the first address is different from the second address.