Patent ID: 11862249
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 18:
19. A non-volatile storage apparatus, comprising:
a plurality of NAND strings that each include a plurality of non-volatile memory cells;
control lines connected to the NAND strings comprising a selected word line, unselected word lines, a first dummy word line next to the selected word line, a second dummy word line next to the first dummy word line, a first source side select line next to the second dummy word line, and a second source side select line next to the first source side select line;
bit lines connected to the NAND strings;
a source line connected to the NAND strings; and
a control circuit connected to the control lines, the bit lines and the source line;
the control circuit is configured to:
apply a first voltage to the selected word line,
apply a pre-charge voltage to the source line,
apply one or more activation voltages to first dummy word line, second dummy word line, first source side select line and second source side select line to raise channel voltages for the NAND strings to a pre-charge voltage,
lower the voltage on selected word line and first dummy word line during a first time period,
lower the voltage on the second dummy word line during a second time period that is after the first time period,
lower the voltage on the first source side select line during a third time period that is after the second time period, and
lower the voltage on the second source side select line during a fourth time period that is after the third time period,
boost the channels of the NAND strings after the fourth time period, and
apply a program pulse to the selected word line after the fourth time period.