Patent ID: 11899251
Assignee: AYAR LABS, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 13:
14. A method for manufacturing a vertical integrated photonics chiplet assembly, comprising:
having a first portion of a package substrate;
placing a photonics chip on the first portion of the package substrate, the photonics chip including optical coupling devices at a top surface of the photonics chip;
forming a second portion of the package substrate over the first portion of the package substrate and over the photonics chip so that the photonics chip is encapsulated by the second portion of the package substrate;
forming a first set of electrically conductive via structures through the second portion of the package substrate to electrically connect with exposed electrical contacts on the photonics chip;
forming a first set of electrically conductive contact pads on the second portion of the substrate package, the first set of electrically conductive contact pads formed in electrical connection with respective ones of the first set of electrically conductive via structures;
forming a third portion of the package substrate over the second portion of the package substrate and over the first set of electrically conductive contact pads;
forming a second set of electrically conductive via structures through the third portion of the package substrate to electrically connect with some of the first set of electrically conductive contact pads;
forming a second set of electrically conductive contact pads on the third portion of the substrate package, the second set of electrically conductive contact pads formed in electrical connection with respective ones of the second set of electrically conductive via structures;
forming an opening through the third portion of the package substrate and the second portion of the package substrate to expose the optical coupling devices at the top surface of the photonics chip;
flip-chip connecting an external device to the second set of electrically conductive contact pads; and
securing an optical fiber array within the opening, such that optical fibers within the optical fiber array are optically coupled with respective ones of the optical coupling devices at the top surface of the photonics chip,
wherein the first, second, and third portions of the package substrate are integrally combined to form the package substrate as a monolithic structure having a substantially uniform material composition.