Patent ID: 11949015
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A method comprising:
forming gate structures over a substrate;
forming a recess in the substrate; and
forming a source/drain epitaxial structure in the recess in the substrate, wherein the source/drain epitaxial structure comprises a first doped source/drain region and a second doped source/drain region formed around the first doped source/drain region, wherein from a cross-sectional view, the first doped source/drain region has a rectangular profile with a bottom side interfacing the substrate, and the second doped source/drain region has an octagonal profile without a bottom side, wherein the first doped source/drain region is different from the second doped source/drain region at least in a phosphorous concentration.