Patent ID: 11862559
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor structure comprising:
a semiconductor substrate;
a metallization feature over the semiconductor substrate, wherein the metallization feature includes at least a first bottom corner and a second bottom corner opposite to the first bottom corner;
a first dielectric feature adjacent to the first bottom corner of the metallization feature, wherein an included angle of the first bottom corner defined by a sidewall of the first dielectric feature and a bottom surface of the metallization feature is less than 90°;
a second dielectric feature adjacent to the second bottom corner of the metallization feature, such that the metallization feature is interposed between the first dielectric feature and the second dielectric feature, and wherein the first dielectric feature and the second dielectric feature have different compositions; and
a via contact configured to connect the metallization feature to the semiconductor substrate.