Patent ID: 11960411
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. A data processing system comprising:
a host suitable for generating, changing or updating a logical block address corresponding to data; and
a memory system including a nonvolatile memory device for storing the data,
wherein the memory system:
generates L2P mapping table,
selects some regions of the L2P mapping table as L2P mapping entries,
outputs the L2P mapping entries to the host in response for a first host command,
selects some regions of the L2P mapping entries as L2P discard mapping entries, and
outputs the L2P discard mapping entries to the host in response for a second host command after performing an operation corresponding to the second host command,
wherein the host:
stores the L2P mapping entries received from the memory system in a host memory after outputting the first host command to the memory system, and
discards the L2P discard mapping entries received from the memory system among the L2P mapping entries stored in the host memory after outputting the second host command to the memory system.