Patent ID: 11927869
Assignee: JAPAN DISPLAY INC.
Field: Optics (Instruments)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A semiconductor substrate, comprising:
a plurality of scanning lines each of which extends in a first direction;
a plurality of signal lines each of which intersects each of the scanning lines, and extends in a second direction;
a plurality of pixels each of which is portioned by two of the scanning lines and two of the signal lines;
a first semiconductor layer and a second semiconductor layer that overlap each of the scanning lines; and
an insulating layer that covers the first semiconductor layer and the second semiconductor layer on which the plurality of signal lines are provided;
wherein
one pixel of the plurality of pixels comprises the first semiconductor layer and the second semiconductor layer,
the first semiconductor layer and the second semiconductor layer in the one pixel are connected to one of the signal lines corresponding to the one pixel, and overlap to one of the scanning lines corresponding to the one pixel,
the insulating layer includes a first opening including a pair of long sides and a pair of short sides,
the long sides of the first opening are parallel to the second direction, and the short sides of the first opening are parallel to the first direction, and
the one of the signal lines is connected to the first semiconductor layer and the second semiconductor layer via the first opening in the one pixel.