Patent ID: 11916072
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 8:
9. A semiconductor structure, comprising:
a first base fin and a second base fin separated by an isolation feature along a direction;
a first gate structure disposed over the first base fin;
a second gate structure disposed over the second base fin;
a first metal layer disposed over the first gate structure;
a second metal layer disposed over the second gate structure;
a first dielectric layer disposed over the first metal layer;
a second dielectric layer disposed over the second metal layer; and
a gate isolation structure disposed between the first gate structure and the second gate structure, between the first metal layer and the second metal layer, and between the first dielectric layer and the second dielectric layer,
wherein the gate isolation structure partially extends into the isolation feature.