Patent ID: 11894822
Assignee: MITSUBISHI ELECTRIC CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A Finite Impulse Response (FIR) filter device comprising:
a plurality of delayers connected in series to delay an input signal in response to reception of the input signal and to output a delayed signal;
a plurality of multipliers to multiply the delayed signal by a filter coefficient generated based on a predetermined value and a multiplying factor adjustment value;
a first divider which, when a multiplication result obtained by multiplying the predetermined value by the multiplying factor adjustment value exceeds a maximum value of a representation range of the filter coefficient, is prompted by logical circuitry in the FIR filter device to divide the multiplication result exceeding the maximum value by the maximum value, and output a quotient of the division as a coefficient adjustment value;
a plurality of adders interconnected to output a signal obtained by adding after-filter-coefficient-multiplication signals outputted by the plurality of multipliers and an adjusted signal obtained by adjusting a corresponding delayed signal using the coefficient adjustment value; and
a second divider to generate an output signal by dividing the signal outputted by the plurality of adders by the multiplying factor adjustment value, the output signal being a digitally filtered representation of the input signal.