Patent ID: 11889413
Assignee: NEW YORK UNIVERSITY
Field: Telecommunications (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 6:
7. An apparatus according to claim 1, wherein the processor is further configured to store one or more predetermined subframe characteristics and perform a determining and storing, prior to performing the switched architecture reception process, of the first duration and of the second duration, by operations including:
(i) enabling the first QRA receive CS to output first QR samples of prior instances of the first signals, or (ii) prior enabling the second QRA receive CS to output second QR samples of prior instances of the second signals, or both (i) and (ii);
determining one or more subframe related characteristics based on results of (i), or based on results of (ii), or based on results of (i) and results of (ii); and
determining the first duration and the second duration based at least in part on the determined one or more subframe related characteristics, in combination with at least one of the stored one or more subframe characteristics.