Patent ID: 11887685
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. The method of claim 3, wherein the redundant circuit comprises a Redundant Word-Line (RWL) and a Redundant Bit-Line (RBL), and performing first repair processing on the FB in each target repair region by using the redundant circuit according to the FB feature map comprises:
a determining step of determining whether the FB feature map satisfies a preset condition, the preset condition comprising a first preset condition and a second preset condition;
a first initial repair processing step of performing repair processing on the FB by using the RWL if the FB feature map satisfies the first preset condition, the first preset condition comprising that an FB count of a first numbered WL in the basic repair bank is larger than a present remaining RBL count of the basic repair bank; and
a second initial repair processing step of performing repair processing on the FB using the RBL if the FB feature map satisfies the second preset condition, the second preset condition comprising that an FB count of a first numbered BL in the basic repair bank is larger than a present remaining RWL count of the basic repair bank.