Patent ID: 11954349
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 9:
10. An operating method of a memory system, the operating method comprising:
monitoring a program operation on a first super memory block among a plurality of super memory blocks each including at least one of a plurality of memory blocks each including a plurality of pages;
determining whether the program operation for the first super memory block is executed for a preset time period from a preset reference time point; and
executing a target operation on the first super memory block based on the state of the first super memory block when it is determined that the program operation on the first super memory block has not been executed for the preset time period from the preset reference time point,
wherein the reference time point is a time point at which the memory system enters an idle state or a low power mode.