Patent ID: 11934703
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory system, comprising:
a signal development component comprising a plurality of locations;
a memory array comprising a plurality of memory cells, each memory cell comprising a storage element and a cell selection component, wherein the memory array is operable to store a pattern of logic states;
a plurality of access lines coupled with the memory array;
a switching component for selectively bypassing the signal development component or coupling the memory array with the signal development component; and
an amplifier component couplable with the memory array based at least in part on the switching component selectively bypassing the signal development component comprising the plurality of locations, wherein the signal development component is operable to store a pattern of signal states associated with the pattern of logic states.