Patent ID: 11955556
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 7:
8. A method of manufacturing a semiconductor device, the method comprising:
forming a structure including sacrificial patterns and semiconductor patterns that are alternately and repeatedly stacked in a vertical direction that is perpendicular to an upper surface of a substrate;
forming a source/drain layer at each of a first side and a second side of the structure, the first side opposite the second side;
removing the sacrificial patterns to form a first opening exposing a portion of a sidewall of the source/drain layer;
oxidizing the exposed portion of the sidewall of the source/drain layer to form an oxide layer;
removing the oxide layer to form a second opening having an enlarged width greater than a width of the first opening, the width of the first opening and the second opening in a horizontal direction that is parallel to the upper surface of the substrate; and
forming a gate structure in the second opening.