Patent ID: 11955989
Assignee: NANYA TECHNOLOGY CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC H

Claim 13:
14. The test method according to claim 10, wherein in a test scheme for testing the parity/syndrome generator of the ECC circuit, comprising:
entering the third test mode during a first time period, and generating the parity information according to the normal data and writing the parity information into the parity array by the parity/syndrome generator;
entering the first test mode during a second time period after the second time period, updating the normal data with 1 bit error to obtain updated data; writing the updated data to the data array and keeping the parity information unchanged by the parity/syndrome generator; and
entering the second test mode, generating the syndrome value by the parity/syndrome generator and generating a test result by checking the syndrome value.