Patent ID: 11862228
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. The power supply circuit of claim 4, wherein the SR latch comprises a first NOR gate and a second NOR gate, a first input terminal of the first NOR gate being configured to receive the external signal, a second input terminal of the first NOR gate being connected to an output terminal of the second NOR gate, an output terminal of the first NOR gate being connected to a first input terminal of the second NOR gate, a second input terminal of the second NOR gate being configured to receive the flag signal, the output terminal of the second NOR gate serving as an output terminal of the second enable unit, and the output terminal of the second NOR gate being configured to output the second enable signal.