Patent ID: 11930098
Assignee: SECURED-IC SAS
Field: Digital communication (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 8:
9. The device of claim 8, wherein said receiver manager is configured to:
receive and store said updated random signal values during each rising edge of said system clock and to initialize a counter at each rising edge of said system clock;
increment said counter at each rising edge of the internal clock;
compare, at each clock cycle of said internal clock, the counter to said first threshold and said second threshold;
read, at each rising edge of said internal clock, random signal values transmitted through the signal transmission lines;
compare, at each rising edge of said internal clock, random signal values transmitted through signal transmission lines to stored updated random signal values; and
compare, at each rising edge of said internal clock, random signal values transmitted through said signal transmission lines during a current system clock cycle to random signal values transmitted through the signal transmission lines during the precedent system clock cycle.