Patent ID: 11864384
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 9:
10. A method for fabricating a nonvolatile memory device, the method comprising:
forming a first sacrificial pattern and an insulating pattern alternately stacked on a substrate;
forming a second sacrificial pattern on the first sacrificial pattern and the insulating pattern;
forming a first cutting line which cuts the second sacrificial pattern;
forming a third sacrificial pattern on the second sacrificial pattern and the first cutting line;
forming a second cutting line which cuts the third sacrificial pattern;
forming a channel structure which penetrates the first to third sacrificial patterns and the insulating pattern and is connected to the substrate, between the first cutting line and the second cutting line;
forming first and second word line cutting regions which penetrate the first to third sacrificial patterns and the insulating pattern, and are spaced apart from each other with the second sacrificial pattern and the third sacrificial pattern interposed therebetween; and
replacing the first to third sacrificial patterns with a plurality of conductive patterns, using the first and second word line cutting regions.