Patent ID: 11887892
Assignee: MAGNACHIP SEMICONDUCTOR, LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A method of forming a semiconductor device, the method comprising:
forming an interlayer dielectric layer on a substrate having a semiconductor die region and a scribe line region;
forming a metal pad in the semiconductor die region and a test pad in the scribe line region, respectively, on the interlayer dielectric layer;
forming a passivation dielectric layer on the interlayer dielectric layer, the metal pad, and the test pad; and
performing a first etching process on the passivation dielectric layer and the interlayer dielectric layer formed on both sides of the test pad to a predetermined depth using a plasma etching process;
performing a second etching process on the passivation dielectric layer formed on the metal pad and the test pad to expose the metal pad and the test pad;
forming a bump on the metal pad; and
dicing the substrate to remove the scribe line region by mechanical sawing.