Patent ID: 11934304
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A method comprising:
controlling memory access by mapping virtual memory addresses in a virtual memory address space to physical memory addresses in a physical memory address space, the controlling step providing a sparse mapping in which a mapped subset of the virtual memory address space is mapped to physical memory while an unmapped subset of the virtual memory space is unmapped, the controlling step comprising discarding write operations to virtual memory addresses in the unmapped subset of the virtual memory address space;
executing program code defining a processing operation to generate processed data and to store the processed data in a memory region of the virtual memory address space applicable to that processing operation;
detecting whether the memory region is entirely within the unmapped subset of the virtual memory address space; and
inhibiting completion of the processing operation in response to a detection by the detector circuitry that the memory region applicable to that processing operation is entirely within the unmapped subset of the virtual memory address space.