Patent ID: 11947798
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. A memory system, comprising:
a first semiconductor memory device configured to carry multiple first stacked memory dies for storing data, the first semiconductor memory device having a first identifier associated therewith;
a second semiconductor memory device configured to carry multiple second stacked memory dies for storing data, the second semiconductor memory device having a second identifier associated therewith, the second semiconductor memory device electrically connected to the first semiconductor memory device for communication via one or more first memory links; and
a third semiconductor memory device configured to carry multiple third stacked memory dies for storing data, the third semiconductor memory device having a third identifier associated therewith, the third semiconductor memory device electrically connected to the second semiconductor memory device for communication via one or more second memory links;
the second semiconductor memory device including a switch and configured to:
route, via the switch, received packets indicating the first identifier to the first semiconductor memory device over one of the one or more first memory links; and
route, via the switch received packets indicating the third identifier to the third semiconductor memory device over one of the one or more second memory links.