Patent ID: 11972260
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A computer-implemented method comprising:
obtaining, by a processor, a particular instruction to be executed, the particular instruction having associated therewith a register to be examined, a specific location within the register having a specific condition, and a result location to be used for the particular instruction for the register, the register comprising a plurality of elements; and
executing, by the processor, the particular instruction, the executing the particular instruction comprising:
generating a count by counting a number of contiguous elements of the plurality of elements of the register having a particular value in a selected location within the contiguous elements, wherein the specific location identifies the selected location, wherein the selected location does not comprise all locations within the contiguous elements, wherein all other locations within the contiguous elements, other than the selected location of each element within the contiguous elements, are ignored for the counting, wherein a size of an element of the plurality of elements is indicated by a field of the particular instruction, the size to be used in identifying the selected location; and
determining if the count is less than a number of elements in the register;
based on determining that the count is not less than the number of elements in the register, setting the result location to a first value to indicate no miscompare in the register; and
based on determining that the count is less than the number of elements in the register, storing the count for the register in the result location as an index in the register for the miscompare.