Patent ID: 11861093
Assignee: SILEAD INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G  H

Claim 15:
16. The ADC of claim 14, wherein each of the currents Idc provided by the charge output block in the respective time intervals is adjustable within a maximum range represented by k bits, and
wherein if the amount of charge Qdc is desired to be adjustable within a range represented by M bits, where M is greater than k+1 and is divisible by k, the number n of the time intervals of the period t is equal to M/k, and an amount of charge Qdc provided in each of the n time intervals is adjustable within a range represented by k bits; or
if the amount of charge Qdc is desired to be adjustable within a range represented by M bits, where M is greater than k+1 and is indivisible by k, the number n of the time intervals of the period t is equal to int(M/k)+1, an amount of charge Qdc provided in each of the first n-1 time intervals is adjustable within a range represented by k bits, and an amount of charge Qdc provided in the last time interval is adjustable within a range represented by M-(n-1)*k bits.