Patent ID: 11908511
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 6:
7. A semiconductor memory device comprising:
a memory string that includes a plurality of memory transistors connected in series;
a plurality of first wirings connected to gate electrodes of the plurality of memory transistors; and
a plurality of second wirings electrically connected to the plurality of first wirings, wherein
a first read operation is executed in response to an input of a first command set,
a second read operation is executed in response to an input of a second command set,
a first voltage is applied to the plurality of second wirings at a first timing at which the first read operation ends,
a second voltage is applied to the plurality of second wirings at a second timing at which the second read operation ends, and
the first voltage is larger than the second voltage.