Patent ID: 11908950
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 10:
11. A method of forming a semiconductor device, comprising:
forming a stack of first layers and second layers in an alternating pattern over a substrate;
forming a recesses into a first end and a second end of the stack to expose the substrate;
laterally recessing the second layers at the first end and the second to form lateral recesses;
filling the lateral recesses to form a first spacer at the first end and a second spacer at the second end;
removing the first layers;
forming two-dimensional (2D) semiconductor sheets between the second layers, the first spacer, and the second spacer;
filling a space between pairs of the 2D semiconductor sheets with a gate electrode;
forming a source contact adjacent to a first end of the 2D semiconductor sheets; and
forming a drain contact adjacent to a second end of the 2D semiconductor sheets.