Patent ID: 11929429
Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A method for manufacturing a semiconductor device, comprising:
forming a first nitride-based semiconductor layer disposed over a substrate;
forming a second nitride-based semiconductor layer on the first nitride-based semiconductor layer;
forming a source electrode and a drain electrode over the second nitride-based semiconductor layer;
forming a gate electrode over the second nitride-based semiconductor layer and between the source and drain electrodes;
forming a first dielectric layer above the second nitride-based semiconductor layer and covering the gate electrode, the source electrode, and the drain electrode;
forming recesses in the first dielectric layer with different depths; and
forming a single field plate on the dielectric layer and in the recesses.