Patent ID: 11971837
Assignee: PHYTIUM TECHNOLOGY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 6:
7. The interface circuit according to claim 1, wherein:
a number of the plurality of sub-interface circuits and a number of the multiple sub-address spaces all are N wherein N is a positive integer;
the register includes N groups of data. bits corresponding to N sub-interface circuits, respectively, each of the N groups of data bits includes an m-bit binary number in the register, and the N groups of data bits are configured to store N m-bit binary numbers, respectively, wherein in is a positive integer; and
the controller is further configured to: based on the in-bit binary number stored in kth-group data bits of the N groups of data bits, set the sub-address space occupied by a peripheral device coupled with the kth sub-interface circuit of the N sub-interface circuits, wherein k is a positive integer, that is smaller than or equal to N.