Patent ID: 11908745
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 7:
8. A semiconductor device, comprising:
a first semiconductor layer over a base semiconductor structure;
a second semiconductor layer over the first semiconductor layer;
a third semiconductor layer over the second semiconductor layer;
first, second, and third interfacial layers surrounding the first, the second, and the third semiconductor layers respectively;
first, second, and third gate dielectric layers surrounding the first, the second, and the third interfacial layers, respectively; and
a common gate electrode surrounding the first, the second, and the third gate dielectric layers, wherein each of the first, the second, and the third gate dielectric layers has asymmetric thicknesses below and above the respective first, second, and third interfacial layers.