Patent ID: 11864466
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 11:
12. A semiconductor device including a magnetic random access memory (MRAM) cell, comprising:
a first interlayer dielectric (ILD) layer disposed over a substrate;
a first lower contact and a second lower contact both embedded in the first ILD layer;
a first magnetic random access memory (MRAM) cell structure disposed over the first lower contact and a second MRAM cell structure disposed over the second lower contact, each of the first and second MRAM cell structures including a bottom electrode, a magnetic tunnel junction (MTJ) stack and a top electrode;
one or more sidewall insulating layers disposed over sidewalls of the first and second MRAM cell structures; and
a second ILD layer disposed over the one or more sidewall insulating layers and filling a space between the first MRAM cell structure and the second MRAM cell structure, wherein:
the first ILD layer includes a bottom layer and an upper layer having a greater thickness at the recess than the bottom layer, and
an uppermost surface of the second ILD layer is higher than an uppermost portion of the one or more sidewall insulating layers.