Patent ID: 11972262
Assignee: C-SKY MICROSYSTEMS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A data computing system comprising:
a memory configured to store data to be computed;
a processor communicatively coupled to the memory and configured to write the data to the memory; and
an accelerator, separate from the processor and memory and communicatively coupled to the memory and the processor, and configured to:
receive control information from the processor, wherein the control information comprises a start address for the data to be computed, a number of operands, a computing type, a write-back address for a computed result, and a computing enable flag;

the accelerator comprising:
a control register module communicatively coupled to the processor and configured to store the control information that includes an instruction; and
a computing module communicatively coupled to the memory and configured to, after detecting that the computing enable flag is enabled:
read the data from the memory according to the start address and the number of operands;
implement a computing process according to the computing type that produces a computed result, wherein the computing process is implemented by the computing module independently from the processor;
write the computed result back to the memory according to the write-back address; and
reset the computing enable flag after the computing process is completed;

wherein the computing module comprises:
a multiply-accumulate unit configured to perform multiply-accumulate operations to generate a result;
a rectifier computing unit configured to perform rectifier functions for an input data or the result from the multiply-accumulate unit; and
a first multiplexer configured to select the result from the multiply-accumulate unit or the input data as the data input to the rectifier computing unit.