Patent ID: 11915925
Assignee: DAICEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC C  H | IPC H

Claim 1:
2. The method of manufacturing a semiconductor device according to claim 1, wherein the wafer laminate is prepared by the following steps:
forming a reinforced wafer having a laminated structure comprising the second wafer including a main surface and a back surface opposite from the main surface, a supporting substrate, and a temporary adhesive layer located between the main surface side of the second wafer and the supporting substrate;
thinning the second wafer by grinding the second wafer in the reinforced wafer from the back surface side of the second wafer, so that the second wafer has the thickness from 1 to 20 μm;
bonding, via an adhesive for forming the adhesive layer, the element forming surface side of the first wafer to the back surface side of the second wafer in the reinforced wafer that has undergone the thinning step; and
removing the supporting substrate, which is temporally attached to the second wafer via the temporary adhesive layer, from the second wafer in the reinforced wafer that has undergone the bonding step, so that the wafer laminate is obtained.