Patent ID: 11959938
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 7:
8. The package substrate of claim 7, wherein
power supply pads belonging to the VDD1 power supply type in the plurality of pad arrays are divided into a VDD1 power supply test pad and a VDD1 power supply pad set, wherein all power supply pads in the VDD1 power supply pad set are electrically connected to form a VDD1 power supply network, the VDD1 power supply test pad is independent of the VDD1 power supply network, and the VDD1 power supply test pad is configured to perform noise testing of a VDD1 power supply in the chip to be tested;
power supply pads belonging to the VDD2 power supply type in the plurality of pad arrays are divided into a VDD2 power supply test pad and a VDD2 power supply pad set, wherein all power supply pads in the VDD2 power supply pad set are electrically connected to form a VDD2 power supply network, the VDD2 power supply test pad is independent of the VDD2 power supply network, and the VDD2 power supply test pad is configured to perform noise testing of a VDD2 power supply in the chip to be tested; and
power supply pads belonging to the VDDQ power supply type in the plurality of pad arrays are divided into a VDDQ power supply test pad and a VDDQ power supply pad set, wherein all power supply pads in the VDDQ power supply pad set are electrically connected to form a VDDQ power supply network, the VDDQ power supply test pad is independent of the VDDQ power supply network, and the VDDQ power supply test pad is configured to perform noise testing of a VDDQ power supply in the chip to be tested.