Patent ID: 11929290
Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method for producing a plurality of transistors on a substrate comprising at least two adjacent active areas separated by at least one electrically-isolating area, each transistor of the plurality of transistors comprising a gate having a silicided portion, and first spacers on either side of the gate, the first spacers being located on sides of the gate, the method comprising:
forming the gates of the transistors,
forming the first spacers,
forming second spacers on sides of the first spacers,
siliciding the gates so as to form the silicided portions of the gates, and
removing the second spacers,
wherein the removal of the second spacers takes place during the silicidation of the gates and before the silicided portions are fully formed.