Patent ID: 11973122
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 14:
15. A device comprising:
a first nanostructure;
a second nanostructure over the first nanostructure;
a boundary insulating region disposed at a first side of the first nanostructure and the second nanostructure, the boundary insulating region extending along sidewalls of the first nanostructure and the second nanostructure;
a source/drain region adjacent a second side of the first nanostructure;
a gate structure surrounding the first nanostructure and the second nanostructure;
a first inner spacer interposed between the first nanostructure and the second nanostructure, the first inner spacer interposed between the gate structure and the source/drain region, the first inner spacer having a first material composition, the first material composition having a first coefficient of thermal expansion (CTE); and
a second inner spacer interposed between the first nanostructure and the second nanostructure, the second inner spacer interposed between the gate structure and the source/drain region, the second inner spacer adjacent the first inner spacer, the second inner spacer having a second material composition, the second material composition having a second coefficient of thermal expansion (CTE), the second CTE being different than the first CTE.