Patent ID: 11921578
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 18:
19. A semiconductor system comprising:
a controller configured to input and output (input/output) a command signal, an address signal, and data, to store the address signal as a failure address signal when a failure detection signal is input to the controller, and to output the stored failure address signal during a refresh operation; and
a semiconductor device configured to detect an error of internal data generated by the address signal to generate the failure detection signal based on the command signal during a read operation, correct the error included in the internal data to output the error-corrected internal data as the data, and correct the error of the internal data stored in the semiconductor device through a word line activated by the failure address signal to store the error-corrected internal data during the refresh operation.