Patent ID: 11966277
Assignee: DELL PRODUCTS L.P.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A method for identifying and reducing storage errors, comprising:
receiving, by a storage device, first data;
writing, by the storage device, the first data to a plurality of first storage locations in a block included in a storage subsystem in the storage device while writing storage error identification data to at least one second storage location in the block that is located adjacent at least one of the plurality of first storage locations, wherein the storage error identification data includes predetermined values that are written to predetermined locations included in the at least one second storage location in the block;
reading, by the storage device, the storage error identification data from the at least one second storage location;
identifying, by the storage device based on the predetermined values and predetermined locations of the storage error identification data, errors resulting from the reading of the storage error identification data;
determining, by the storage device based on the errors, at least one error reduction operation that is configured to reduce errors associated with reading the first data; and
performing, by the storage device, the at least one error reduction operation.