Patent ID: 11876017
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method of forming an integrated circuit device, the method comprising:
forming a first insulating layer and a via contact on a substrate, wherein the substrate comprises an upper surface facing the via contact, and the via contact is in the first insulating layer and comprises a lower surface facing the substrate and an upper surface opposite to the lower surface; and
forming a second insulating layer and a metallic wire on the via contact, wherein the metallic wire is in the second insulating layer and comprises a lower surface that faces the substrate and contacts the upper surface of the via contact,
wherein both the lower surface of the metallic wire and an interface between the metallic wire and the via contact have a first width in a horizontal direction that is parallel to the upper surface of the substrate,
wherein the via contact comprises first opposing sides that are spaced apart from each other in the horizontal direction, the metallic wire comprises second opposing sides that are spaced apart from each other in the horizontal direction, and the second opposing sides are between the first opposing sides in a plan view, and
wherein the lower surface of the metallic wire is closer than an upper surface of the first insulating layer to the substrate, and a portion of the second insulating layer separates one of the second opposing sides of the metallic wire from the first insulating layer.