Patent ID: 11894853
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 8:
9. The differential signal skew calibration circuit of claim 5, wherein the second controllable storage circuit comprises:
a second frequency division sub-circuit, a first end of the second frequency division sub-circuit being connected with the first end of the phase calibration circuit, wherein the second frequency division sub-circuit is configured to generate the second storage control signal according to the period of the first signal; and
a second storage sub-circuit, a first end of the second storage sub-circuit being connected with the third end of the third logical circuit, a second end of the second storage sub-circuit being connected with a second end of the second frequency division sub-circuit, and a third end of the second storage sub-circuit being connected with the first end of the second detection circuit, wherein the second storage sub-circuit is configured to receive the second storage control signal, and perform at least one of storage or release of the second phase difference pulse signal according to the second storage control signal.