Patent ID: 11923837
Assignee: NUVOLTA TECHNOLOGIES (HEIFEI) CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An apparatus comprising:
a first drain/source region and a second drain/source region over a substrate;
a first gate adjacent to the first drain/source region and a second gate adjacent to the second drain/source region, wherein the first gate and the second gate are separated from each other, and bottommost surfaces of the first gate and the second gate are over a top surface of the substrate, and wherein the first drain/source region, the second drain/source region, the first gate and the second gate form two back-to-back connected transistors;
a high voltage oxide region, wherein from a top view, a first edge of the high voltage oxide region is aligned with a middle line of the first gate, and a second edge of the high voltage oxide region is aligned with a middle line of the second gate; and
an active region formed between the first drain/source region and the second drain/source region, wherein from the top view, the active region is orthogonal to the high voltage oxide region.