Patent ID: 11886624
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 16:
17. The computing device of claim 16, wherein the crypto device includes
a write attribute analyzer circuit configured to receive the write request,
output a first address and a first control signal for the write data, and
output a read-modify-write (RMW) activation signal by analyzing a write attribute of the write request;

an address generator circuit configured to
receive the first address and the first control signal, and
output a second address and a second control signal for the version count;

an address-data scheduler circuit configured to
receive the first address and the first control signal from the write attribute analyzer circuit,
receive the second address and the second control signal from the address generator circuit, and
output a read request or a write request corresponding to a partial write operation or a full write operation according to an RMW activation signal, to the memory controller;

a random number generator circuit configured to generate the random number based on the RMW activation signal indicates an inactive state;
an encryption module configured to receive the write data from the write attribute analyzer,
generate a key stream corresponding to the version count,
encrypt the write data by performing a first logical operation on the key stream and the write data, and
output the encrypted data and the version count to the address-data scheduler circuit;

a decryption module configured to
receive encrypted read data and a previous version count from the address-data scheduler circuit,
generate a previous key stream corresponding to the previous version count, and
decrypt the encrypted read data by performing a second logical operation on the previous key stream and the encrypted read data; and

a main controller configured to control the write attribute analyzer circuit, the address generator circuit, the address-data scheduler circuit, and the random number generator circuit.