Patent ID: 11942375
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. A transistor comprising:
p-type epitaxial source/drain structures of a p-type single-fin transistor;
n-type epitaxial source/drain structures of an n-type single-fin transistor;
a gate stack shared by the p-type single-fin transistor and the n-type single-fin transistor, wherein that gate stack extends along a first lengthwise direction, the gate stack is disposed between the p-type epitaxial source/drain structures, the gate stack is disposed between the n-type epitaxial source/drain structures, the gate stack wraps an n-type silicon germanium fin of the p-type single-fin transistor, and the gate stack wraps a p-type silicon fin of the n-type single-fin transistor;
wherein the n-type silicon germanium fin of the p-type single-fin transistor is arranged between the p-type epitaxial source/drain structures of the p-type single-fin transistor along a second lengthwise direction that is different than the first lengthwise direction and the p-type silicon fin of the n-type single-fin transistor is arranged between the n-type epitaxial source/drain structures of the n-type single-fin transistor along the second lengthwise direction;
wherein the p-type silicon fin of the n-type single-fin transistor has a first etched width, the n-type silicon germanium fin of the p-type single-fin transistor has a second etched width, and the first etched width and the second etched width are along the first lengthwise direction; and
wherein the first etched width of the p-type silicon fin is 0.5 nm to 3 nm greater than the second etched width of the n-type silicon germanium fin and a ratio of the first etched width of the p-type silicon fin to the second etched width of the n-type silicon germanium fin is 1.1 to 1.3.