Patent ID: 11955486
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A method to form an IC structure with mandrel and spacer patterning, comprising:
forming a mandrel layer that includes a first, second and third mandrel line segments on a semiconductor substrate, wherein
the first mandrel line segment is disposed in a first circuit region and is longitudinally oriented in a first direction;
the second mandrel line segment is disposed in a second circuit region and is longitudinally oriented in the first direction, the second mandrel line segment being shifted from the first mandrel line segment along a second direction being orthogonal to the first direction; and
the third mandrel line segment is disposed in a gap region between the first and second mandrel line segments, is connected to the first and second mandrel line segments, and is oriented in a titled direction different from the first and second directions;

forming spacers on sidewalls of the mandrel layer;
removing the mandrel layer;
removing selective portions of the spacers disposed over the second circuit region to form a patterned spacer layer; and
etching the substrate using the patterned spacer layer as an etch mask to form a plurality of fin lines in the first circuit region of the substrate and a single fin line in the second circuit region of the substrate, wherein a projection of a longitudinal axis of the single fin line along the first direction lies in a space separating adjacent ones of the plurality of fin lines.