Patent ID: 11908835
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A method of manufacturing a semiconductor structure, comprising:
providing a substrate including a redistribution layer (RDL) disposed over the substrate;
disposing a first conductive pillar, a second conductive pillar and a third conductive pillar over the substrate;
disposing a first die over the first conductive pillar;
disposing a second die over the second conductive pillar; and
disposing a third die over the third conductive pillar,, wherein a third height of the third conductive pillar is different from a first height of the first conductive pillar and a second height of the second conductive pillar, and a first surface of the first die, a second surface of the second die and a third surface of the third die are at substantially same level,, wherein the first die comprises a first thickness, the second die comprises a second thickness, and the third die comprises a third thickness different from the first thickness and the second thickness.