Patent ID: 11929751
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A method, comprising:
receiving an interface clock at a first frequency;
receiving a first value into a storage element;
determining a first divide ratio for the interface clock at the first frequency based on the first value;
dividing the interface clock's first frequency by the first divide ratio to produce a reference clock for a phase-locked loop (PLL);
receiving a second value into the storage element;
determining a second divide ratio for the interface clock at the second frequency based on the second value;
receiving the interface clock at a second frequency; and
dividing the interface clock's second frequency by the second divide ratio to produce the reference clock for the phase-locked loop (PLL), such that a frequency of the reference clock remains the same despite the change in the frequency of the interface clock.