Patent ID: 11887954
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a first semiconductor structure comprising:
a first bonding layer comprising a plurality of first bonding contacts positioned within the first bonding layer and extending from one side of the first bonding layer to another side of the first bonding layer, and
a first via structure extending vertically through the first bonding layer, a first interconnect layer, and a device layer and into the first semiconductor structure;

a second semiconductor structure comprising:
a second bonding layer comprising a plurality of second bonding contacts, and
a second via structure extending vertically through the second bonding layer and into the second semiconductor structure; and

a bonding interface between the first bonding layer and the second bonding layer,
wherein:
the first bonding contacts are in contact with the second bonding contacts at the bonding interface, and at an opposite side of the bonding interface, the first bonding contacts are in direct contact with an interconnect of the first interconnect layer, the interconnect being connected with the device layer;
the first via structure is in contact with the second via structure;
a lateral dimension of each of the first and second bonding contacts is smaller than that of each of the first via structure and the second via structure, at the bonding interface; and
sidewalls of the first via structure and the second via structures have a staggered profile at the bonding interface and at the bonding interface, are discontinuous in a vertical axis along which the first via structure extends.