Patent ID: 11961513
Assignee: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. In an automatic speech recognition (ASR) system having an external memory, a method of automatic speech recognition comprising:
evaluating parameters of an acoustic model deep neural network (DNN) across multiple frames in parallel during a single transfer of the DNN parameters;
training the DNN with layers having a comparable number of nodes;
compressing a weight matrix for each DNN layer with a scalar quantizer; and
using on-chip caching to reduce external memory accesses for weighted finite-state transducer (WFST) parameters by:
storing the WFST parameters in an off-chip memory;
populating an on-chip state list by fetching at least some of the WFST parameters from the off-chip memory;
constructing an on-chip state lattice which represents word hypotheses having one or more word arcs by performing a Viterbi search on the on-chip state list; and
generating an on-chip word lattice from the on-chip state lattice, the on-chip word lattice having at least one word arc representing a chain of one or more of the word arcs in the on-chip state lattice;
wherein the on-chip state lattice and the on-chip word lattice act as an on-chip cache to reduce reading and writing to the off-chip memory.