Patent ID: 11902079
Assignee: INFINERA CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. An apparatus, comprising:
a buffer operable to receive first bits at a first rate and output k second bits at a second rate different than the first rate;
a distribution matching (DM) encoder operable receive the k second bits at the second rate, such that, based on the k second bits, the DM encoder outputs n symbols, the n symbols being indicative of a transmission probability distribution, whereby first modulation symbols are transmitted more frequently than second modulation symbols, k being a first integer and n being a second integer;
a control circuit operable to supply a control signal; and
a switch operable to allocate the first and second bits to the first buffer and the third bits to the second buffer based on the control signal.