Patent ID: 11967639
Assignee: INFINEON TECHNOLOGIES AG
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. The ESD protection circuit of claim 9, wherein;
the at least one SCR device comprises a first SCR device and a second SCR device;
the anode node of the first SCR device is coupled to a first power supply node, the cathode node of the first SCR device is coupled to a signal node, and the p-doped tap region of the first SCR device is coupled to a second power supply node;
the anode node of the second SCR device is coupled to the signal node, the cathode node of the second SCR device is coupled to the second power supply node, and the n-doped tap regions of the second SCR device is coupled to the first power supply node; and
the trigger device is coupled between the first power supply node and the second power supply node.