Patent ID: 11902455
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 16:
17. A physical unclonable function (PUF) generator comprising:
a PUF cell array that comprises a plurality of bit cells;
a PUF control circuit coupled to the PUF cell array, wherein the PUF control circuit is configured to access the plurality of bit cells to determine first logical states of each of the plurality of bit cells, and based on the first logical states of the plurality of bit cells, to generate a first PUF output;
a noise injector coupled to the PUF control circuit and the PUF cell array, wherein the noise injector is configured to introduce noise into the plurality of bit cells to cause the plurality of bit cells to have respective second logical states, wherein the PUF control circuit generates a second PUF output based on the second logical states, and wherein the noise injector comprises a delay circuit for introducing noise into the plurality of bit cells to create stressed operation conditions under which the PUF control circuit generates the second PUF output;
a compare circuit for comparing the second PUF output with the first PUF output; and
a mask array for storing at least one location of at least one unstable bit cell, respectively, the at least one unstable bit cell having different states between the first and second PUF outputs;
a filter configured to exclude at least one logical state of the at least one unstable bit cell to generate the PUF signature; and
a copy array configured to store the first PUF output, wherein the PUF control circuit is coupled to at least one power supply voltage and at least one corresponding zero voltage reference.