Patent ID: 11954501
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. An apparatus, comprising:
a power management controller to detect a wake event;
an embedded controller comprising a secure memory to store a password; and
an endpoint device coupled to the embedded controller by a bus, wherein:
in response to detecting the wake event, the power management controller is configured to bring up power of the embedded controller from a sleep state to an operational state and to bring up power of the endpoint device from a powered-off state, in which the endpoint device is physically connected to the bus but a presence of the endpoint device on the bus cannot be detected, to a fully powered state; and
when the embedded controller is in the operational state, the embedded controller is configured to fetch the password from the secure memory and to transmit the password to the endpoint device via the bus to unlock the endpoint device.