Patent ID: 11864374
Assignee: SK HYNIX INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A semiconductor memory device, comprising:
a substrate;
active layers stacked in a direction perpendicular to a surface of the substrate and including channels;
a bit line coupled to first ends of the active layers and oriented in a direction perpendicular to the surface of the substrate;
capacitors coupled to second ends of the active layers and including storage nodes that are stacked in the direction perpendicular to the surface of the substrate;
double word lines having a first word line and a second word line that are oriented in a direction parallel to the surface of the substrate with each of the active layers interposed therebetween; and
gate dielectric layers formed between the active layers and the double word lines, respectively,
wherein each of the first word line and the second word line includes:
a high work function electrode which is adjacent to the bit line; and
a low work function electrode which is adjacent to the storage nodes and having a lower work function than the high work function electrode,

wherein the high work function electrode is in direct contact with the low work function electrode.