Patent ID: 11940872
Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G  H

Claim 17:
18. A computing system comprising:
a host device;
a system bus; and
a memory device including:
a bus interface;
a memory array including memory cells to store memory data received from the host device via the bus;
error detection circuitry configured to generate error detection data and use the error detection data to detect errors in the memory data; and
a memory error detection circuitry checker configured to:
translate a memory address of a memory operation to a memory address mapped portion of the memory array as part of an error detection circuitry checking operation;
retrieve check error detection data from the memory address mapped portion of the memory array according to the translated memory address, wherein the check error detection data is used to detect errors in the error detection circuitry;
substitute the error detection data with check error detection data from the memory address mapped portion of the memory array to check the functioning of the error detection circuitry;
compare an output of the error detection circuitry to an expected output when the substituted check error detection data is applied to the error detection circuitry; and
generate an alert when the comparing indicates an error in the functioning of the error detection circuitry.