Patent ID: 11935958
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A semiconductor device structure, comprising:
first nanostructures formed over a substrate;
second nanostructures formed over the substrate;
a first gate structure formed over the first nanostructures, wherein the first gate structure comprises a first portion of a filling layer;
a second gate structure formed over the second nanostructures, wherein the second gate structure comprises a second portion of the filling layer; and
a first isolation layer between the first gate structure and the second gate structure, wherein the first isolation layer has a first sidewall surface and a second sidewall surface, and a first portion of the first sidewall surface is in direct contact with the first portion of the filling layer, a second portion of the second sidewall surface is in direct contact with the second portion of the filling layer, and a first height of the first portion is greater than a second height of the second portion.