Patent ID: 11972826
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory system comprising:
a memory cell; and
a memory controller coupled to the memory cell, the memory controller to:
apply a first voltage to the memory cell to write input data to the memory cell, and
apply a second voltage larger than the first voltage to the memory cell to extend a lifetime of the memory cell,

wherein the memory controller includes:
a memory tester coupled to the memory cell, the memory tester to detect a failure of the memory cell, and
an amplitude controller to:
select the first voltage to write the input data to the memory cell, in response to the memory tester determining that the memory cell has not failed,
select the second voltage to repair the memory cell, in response to the memory tester determining that the memory cell has failed, and
select a third voltage larger than the second voltage to write additional input data to the memory cell after repairing the memory cell.