Patent ID: 11887660
Assignee: MEDIATEK INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. A control method of a pseudo dual-port memory, wherein the pseudo dual-port memory comprises:
a single-port memory;
a multiplexer, configured to receive a first address and a second address, and output one of the first address and the second address to the single-port memory; and
an output circuit comprising a first sense amplifier and a second amplifier;
wherein the control method comprises the steps of:
in a first half of a clock cycle of the pseudo dual-port memory:
controlling the multiplexer to input the first address to the single-port memory;
enabling the first sense amplifier to receive output data of the single-port memory to generate first data serving as a first reading result corresponding to the first address;
not enabling the second sense amplifier so that the second sense amplifier does not output any valid data; and

in a second half of the clock cycle of the pseudo dual-port memory:
controlling the multiplexer to input the second address to the single-port memory;
enabling the second sense amplifier to receive the output data of the single-port memory to generate second data serving as a second reading result corresponding to the first address.