Patent ID: 11935947
Assignee: WINBOND ELECTRONICS CORP.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An enhancement mode high electron mobility transistor, comprising:
a group III-V body;
a group III-V barrier layer, disposed on the group III-V body;
a gate structure, disposed on the group III-V barrier layer, wherein the gate structure is a stacked structure comprising a gate dielectric layer and a group III-V gate layer being disposed above the gate dielectric layer, the gate dielectric layer is disposed between the group III-V barrier layer and the group III-V gate layer, a bottom surface of the gate dielectric layer is in direct contact with the group III-V barrier layer, and a top surface of the gate dielectric layer is in direct contact with a bottom surface of the group III-V gate layer;
a passivation layer, covering and in contact with a top surface of the group III-V barrier layer, a sidewall of the group III-V barrier layer and a sidewall of the group III-V body, wherein a bottom surface of the passivation layer is located in the group III-V body; and
at least two source/drain electrodes, disposed on the group III-V barrier layer,
wherein the composition of the gate dielectric layer comprises single crystal aluminum nitride, a total thickness of the gate dielectric layer is greater than 15 nm and less than 25 nm, and the gate dielectric layer is laterally separated from the at least two source/drain electrodes.