Patent ID: 11940927
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. One or more non-transitory computer-readable storage media comprising a plurality of instructions stored thereon that, when executed by a processor, causes the processor to:
receive, by a processor core of the processor, a read or write memory operation comprising a virtual memory address, wherein the virtual memory address comprises a plurality of memory tag bits;
access, by memory management unit (MMU) of the processor, a page table entry based on the virtual memory address, wherein the page table entry comprises a plurality of page tag bits;
determine whether to abort the read or write memory operation based on a comparison between the plurality of page tag bits to the plurality of memory tag bits;
select, by the MMU, one or more of the plurality of memory tag bits based on the plurality of page tag bits; and
send, by the MMU, the read or write memory operation to a memory connected to the processor with the one or more selected bits of the plurality of memory tag bits.