Patent ID: 11894445
Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method, comprising:
forming a plurality of semiconductor arrangements one above the other, wherein forming each of the plurality of semiconductor arrangements comprises:
forming a semiconductor layer;
forming a plurality of trenches in a first surface of the semiconductor layer; and
implanting dopant atoms of at least one of a first type and a second type into at least one of a first sidewall and a second sidewall of each of the plurality of trenches, and wherein forming of at least one of the plurality of semiconductor arrangements further comprises:
forming a protective layer covering mesa regions between the plurality of trenches of the respective semiconductor layer, and covering a bottom, the first sidewall and the second sidewall of each of the plurality of trenches that are formed in the respective semiconductor layer,
wherein the plurality of semiconductor arrangements comprises at least four semiconductor arrangements, and wherein forming of at least one but not all of the semiconductor arrangements comprises forming the protective layer.