Patent ID: 11962306
Assignee: NVIDIA CORPORATION
Field: Measurement (Instruments)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A method, comprising:
a) sensing a clock signal that exhibits cycles during normal operation, each cycle including two opposite state phase instances having respective first and second expected durations, and each phase instance having a beginning and an end;
b) responsive to sensing the beginning of a first phase instance, starting a first timer having a first timer duration at least as long as the first expected duration, wherein starting the first timer comprises generating a first pulse having a duration corresponding to the first timer duration;
c) comparing the first pulse with at least one version of the clock signal to determine if the first timer expires before the end of the first phase instance; and
d) if the first timer expires before the end of the first phase instance, asserting a first clock stop detection signal, else if the first timer does not expire before sensing the end of the first phase instance, resuming at step b.