Patent ID: 11881511
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A transistor, comprising:
a substrate;
a superlattice structure on the substrate that includes a plurality of heterojunction channels;
a gate that extends to one of the plurality of heterojunction channels and not entirely through the superlattice structure, wherein the gate produces a drive current step size that is inversely proportional to a number of channels below the gate;
a first source or drain structure immediately adjacent a first side of the gate, the first source or drain structure extending through the superlattice structure; and
a second source or drain structure immediately adjacent a second side of the gate, the second source or drain structure extending through the superlattice structure, and the second source or drain structure having a bottommost surface at a same level as a bottommost surface of the first source or drain structure.