Patent ID: 11901016
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 19:
20. The non-volatile memory system according to claim 19, wherein the alternating word line scheme comprises one of:
applying a relatively high erase verify voltage to all word lines of the memory block having an even-numbered position in a programming word line order of the memory block, and applying a relatively low erase verify voltage to all word lines of the memory block having an odd-numbered position in the programming word line order of the memory block; or
applying a relatively high erase verify voltage to all word lines of the memory block having the odd-numbered position in a programming word line order of the memory block, and applying a relatively low erase verify voltage to all word lines of the memory block having the even-numbered position in the programming word line order of the memory block.