Patent ID: 11960765
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory controller which controls a memory device including a plurality of memory blocks, the memory controller comprising:
a lifetime information controller configured to receive a lifetime reference setting command from a host and set a lifetime determination reference determining lifetime levels of the plurality of memory blocks in response to the lifetime reference setting command; and
an operation controller configured to receive a write request from the host and control the memory device to perform a write operation on a selected memory block among the plurality of memory blocks in response to the write request,
wherein the lifetime information controller generates lifetime information including a lifetime level of the selected memory block based on the lifetime determination reference, an erase and write count of the selected memory block, and
wherein the operation controller provides, to the host, the lifetime information together with a response to the write request.