Patent ID: 11869566
Assignee: MELLANOX TECHNOLOGIES, LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 14:
15. A method, comprising:
in a memory cell, comprising: (a) an array of one or more molecule chains, at least one of the molecule chains comprising: (i) first and second binding sites positioned at first and second ends of the molecule chain, respectively, and (ii) a chain of one or more fullerene derivatives, chemically connecting between the first and second binding sites, (b) a source electrode and a drain electrode, which are electrically connected to the first and second binding sites, respectively, for applying to the array a source-drain voltage (VSD) along a first axis, and (c) a gate electrode for applying to the array a gate voltage (VG) along a second axis, different from the first axis, applying to the gate electrode a signal for producing the VG; and
performing a data storage operation in the memory cell by applying the VSD between the source and drain electrodes.