Patent ID: 11874325
Assignee: INFINEON TECHNOLOGIES AG
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 0:
1. An integrated circuit, comprising:
a multiplicity of scan flip-flops;
a multiplicity of ring oscillator circuits, wherein each ring oscillator circuit comprises:
a chain of logic gates comprising a plurality of logic gates connected in succession;
an input multiplexer for the chain; and
a feedback line from an output connection of a last logic gate of the chain to a data input connection of the input multiplexer;

wherein each ring oscillator circuit is assigned a scan flip-flop group that contains at least one of the multiplicity of scan flip-flops, wherein the input multiplexer of the ring oscillator circuit is controlled depending on a control bit stored by the at least one of the multiplicity of scan flip-flops of the scan flip-flop group assigned to the ring oscillator circuit in such a way that the input multiplexer outputs an output bit fed back via the feedback line to a first logic gate of the chain when the control bit is in a first state and that the input multiplexer outputs an input bit that is to be processed by the first logic gate of the chain when the control bit is in a second state; and
wherein the ring oscillator circuits are assigned different scan flip-flop groups.