Patent ID: 11881385
Assignee: APPLIED MATERIALS, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. An apparatus for processing semiconductor structures, comprising:
a preclean chamber having a chamber body with a processing volume;
a process kit that surrounds at least a portion of the processing volume;
a frame inserted into the process kit; and
a foil liner composed of a metallic material that is spot welded to the frame at specific points and having an amount of flexibility per GPa of approximately 2.5 to approximately 4.5, wherein the amount of flexibility is determined by f=L/(t×E), where f is the amount of flexibility, L is a distance of separation of the specific points, t is a thickness of the foil liner, and E is the modulus of elasticity of the metallic material.