Patent ID: 11966783
Assignee: SYNC COMPUTING CORP.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. A computing system architecture comprising:
a processing resource pool including a plurality of servers;
an interface for receiving an application to be executed; and
a special purpose optimization coprocessor that receives information about the application and the processing resource pool and outputs an allocation scheme for allocating tasks of the application to the processing resource pool;
wherein the application is analyzed to determine an expected run time use of the processing resource pool by the application, wherein the expected run time use of the processing resource pool is mapped to an optimization problem; and wherein the at least the portion of the processing resources is assigned using a dedicated optimization coprocessor that receives the mapping of the expected run time use of the processing resource pool and outputs a solution to the optimization problem, the solution corresponding to an assignment of the at least the portion of the processing resource pool;
wherein analyzing the processing resource pool further includes: determining a plurality of latencies within each of the plurality of servers and between the plurality of servers; determining resource contention costs for each of the plurality of servers; and wherein assigning the at least the portion of the processing resources is based on the plurality of latencies and the resource contention costs.