Patent ID: 11908512
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  B  H | IPC B  G  H

Claim 19:
20. An electronic system, comprising:
an input device;
an output device;
a processor device operably connected to the input device and the output device; and
a 3D NAND Flash memory device operably connected to the processor device and comprising:
a stack structure comprising tiers each comprising conductive material and insulative material vertically neighboring the conductive material;
strings of memory cells vertically extending through stack structure;
local digit lines vertically overlying the stack structure, each of the local digit lines coupled to a respective group of the strings of memory cells;
source lines vertically overlying the local digit lines;
vertical sense transistors vertically overlying and coupled to the source lines, gate electrodes for the vertical sense transistors coupled to and horizontally extending in parallel with the local digit lines;
vertical read transistors vertically overlying and coupled to the vertical sense transistors, additional gate electrodes for the vertical read transistors horizontally extending orthogonal to the local digit lines;
vertical write transistors at a vertical elevation of the vertical read transistors and coupled to the local digit lines, further gate electrodes for the vertical write transistors horizontally extending orthogonal to the local digit lines; and
global digit lines overlying and coupled to the vertical read transistors and the vertical write transistors, the global digit lines horizontally extending in parallel with the local digit lines.