Patent ID: 11929134
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory device, comprising:
one or more components configured to:
read one or more bits, associated with a memory built-in self-test, that are stored in a mode register of the memory device;
identify, based on the one or more bits, that the memory built-in self-test is enabled;
set a data mask inversion (DMI) bit of the memory device to a first value and perform the memory built-in self-test based on identifying that the memory built-in self-test is enabled,
wherein the DMI bit of the memory device indicates a status of the memory built-in self-test while the memory built-in self-test is enabled, and indicates a status of a data masking function or a data inversion function of the memory device while the memory built-in self-test is disabled; and

set the DMI bit of the memory device to a second value based on a completion of the memory built-in self-test.