Patent ID: 11880327
Assignee: AMAZON TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A computer-implemented method comprising:
receiving a first transaction from a first I/O device on a first system-on-a-chip (SoC);
determining that the first transaction is directed to a second SoC that is coupled to the first SoC via a coherent connection and a non-coherent connection;
upon determining that the first transaction is directed to the second SoC, determining that the first transaction is an I/O transaction from the first I/O device that does not require coherency; and
upon determining that the first transaction is the I/O transaction from the first I/O device that does not require coherency, sending the first transaction to the second SoC via the non-coherent connection,
wherein the first transaction is targeted for a system memory of the second SoC, and
wherein the second SoC receives the first transaction on a non-coherent interconnect and transmits the first transaction from the non-coherent interconnect to the system memory via a coherent interconnect in the second SoC.