Patent ID: 11967354
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. An operating method of a memory device including plural rows each comprising memory cells, the operating method comprising:
updating, whenever accessing a selected row among the plural rows, first data representing an accumulated number of accesses to the selected row, the first data being stored in the selected row, the first data representing a number of accesses to the selected row;
updating second data when the accumulated number reaches a threshold, the second data being stored in the selected row, the second data denoting whether to refresh second rows of the plural rows;
refreshing first rows physically closest to a target row, which is identified on the basis of the first data stored in a row indicated by an active address among the plural rows;
refreshing, depending on the second data stored in the target row at a time of the refreshing of the first rows, the second rows physically adjacent to the target row than remaining rows other than the first rows among the plural rows; and
initializing the first data and the second data stored in the target row after the refreshing of the second rows.