Patent ID: 11936400
Assignee: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. The apparatus of claim 10,
wherein the at least one processor is further configured to:
based on the state-indicator information, determine sets of consecutive non-zero elements for each PC-chain in the index set as subblocks, and
in a case in which it is identified that the number of weak-bits determined according to the state-indicator information is greater than the number of bits to be used as the parity bits, when a weak-bit is included in a rearmost subblock for each PC-chain from among the determined subblocks, identify a bit positioned last in the rearmost subblock including the weak-bit, and

wherein the identified bit is updated to the parity bit.