Patent ID: 11973074
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 9:
10. A method comprising:
forming a plurality of vias on a first carrier;
placing a plurality of interconnect devices on the first carrier, wherein each interconnect device is free of active devices, and wherein each interconnect device comprises a first interconnect structure on a substrate and through-substrate vias (TSVs) extending through the substrate;
encapsulating the plurality of vias and the plurality of interconnect devices with an encapsulant;
forming a second interconnect structure over a first side of the plurality of vias, the plurality of interconnect devices, and the encapsulant, wherein the second interconnect structure is electrically connected to the plurality of vias and to respective first interconnect structures of the plurality of interconnect devices;
forming a plurality of conductive connectors on the second interconnect structure, wherein the conductive connectors are connected to the second interconnect structure;
bonding a first semiconductor die to first conductive connectors of the plurality of conductive connectors, wherein the first semiconductor die is electrically connected to a first interconnect device of the plurality of interconnect devices; and
bonding a photonic package to second conductive connectors of the plurality of conductive connectors, wherein the photonic package is electrically connected to the first interconnect device of the plurality of interconnect devices, and wherein the photonic package comprises a waveguide, a photodetector optically coupled to the waveguide, and a second semiconductor die electrically connected to the photodetector.