Patent ID: 11940909
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A system-on-chip comprising:
one or more compute cores;
a first memory configured to store copies of content from a second memory;
an accelerator block configured to:
track an access frequency for each of a plurality of memory blocks on a second memory with higher latency than the first memory, wherein the access frequency for each of the plurality of memory blocks is weighted more heavily for access requests of the memory block within a subset of a time in which access requests for the memory block have been made;
determine that the access frequency for a first memory block of the plurality of memory blocks satisfies an access threshold; and
responsive to determining that the access frequency for the first memory block satisfies the access threshold, initiate copying of the first memory block from the second memory to the first memory; and

a transaction tracker configured to:
maintain a location mapping referencing at least the second memory for each of a plurality of memory blocks, wherein the location mapping for the first memory block references the first memory and the second memory.