Patent ID: 11895819
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A structure comprising:
a semiconductor substrate; and
a first transistor comprising:
a first gate stack over the semiconductor substrate;
a first gate spacer aside of the first gate stack;
a first epitaxy region on a side of the first gate stack, wherein the first epitaxy region comprises:
a first lower portion having a conductive type, wherein the first lower portion has a first doping concentration of the conductivity type; and
a first upper portion having a second doping concentration of the conductivity type, wherein the second doping concentration is higher than the first doping concentrate, and wherein a first inner edge of the first upper portion is spaced apart from a first nearest outer edge of the first gate spacer; and

a first source/drain silicide region over and contacting the first epitaxy region, wherein the first source/drain silicide region has a second inner edge vertically aligned to the first inner edge of the first upper portion.