Patent ID: 11923283
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A semiconductor package comprising:
a package substrate;
a semiconductor chip on a top surface of the package substrate; and
an interposer on a top surface of the semiconductor chip, the interposer being spaced apart from the semiconductor chip and electrically connected to the package substrate,
wherein the interposer includes,
an interposer trench recessed from a bottom surface of the interposer and configured to overlap the semiconductor chip in plan view, the bottom surface of the interposer facing both the top surface of the semiconductor chip and the top surface of the package substrate, and
an interposer hole extending from the interposer trench to penetrate the interposer, the interposer hole having a width smaller than that of the interposer trench,

wherein a bottommost surface of the interposer is directly above the top surface of the semiconductor chip, based on the top surface of the package substrate, and
wherein a maximum width of the interposer trench is smaller than a maximum width of the semiconductor chip.