Patent ID: 11954487
Assignee: NVIDIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A processor comprising:
a memory device; and
one or more circuits, communicatively coupled to the memory device, to:
store a first number in the memory device, wherein the first number represents an input into a modular computational operation;
store a second number in the memory device;
select a conditional operation (CO) from a plurality of COs, wherein each of the plurality of COs updates or maintains the second number, wherein a first CO of the plurality of COs is selected contingent upon:
a subset of bits of the second number and the subset of bits of the first number having a first value, or
the subset of bits of the second number having a second value and the subset of bits of a third number having the first value, wherein the third number is triple the first number;

perform the selected CO to update the second number; and
generate an output of the modular computational operation using the updated second number.