Patent ID: 11942942
Assignee: HONG KONG APPLIED SCIENCE AND TECHNOLOGY RESEARCH INSTITUTE CO., LTD
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 3:
4. The level shifter of claim 3 wherein the upper buffer further comprises:
a first p-channel mirror transistor, having a gate receiving the third node and a source connected to the boosted node, with a drain driving a first mirror node;
a second p-channel mirror transistor, having a gate receiving the fourth node and a source connected to the boosted node, with a drain driving a second mirror node;
a first n-channel mirror transistor, having a gate and a drain driving the first mirror node, and a source connected to the floating ground node;
a second n-channel mirror transistor, having a gate and a drain driving the second mirror node, and a source connected to the floating ground node;
a first n-channel cross-coupled transistor, having a gate receiving the second mirror node, and a drain driving the inverted output, and a source connected to the floating ground node; and
a second n-channel cross-coupled transistor, having a gate receiving the first mirror node, and a drain driving the output, and a source connected to the floating ground node.