Patent ID: 11914716
Assignee: LATTICE SEMICONDUCTOR CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 7:
8. The secure PLD asset management system of claim 1, wherein the secure PLD asset comprises a device keys sector of the NVM of the secure PLD, and wherein the performing the secure PLD asset update process comprises:
determining a lock status associated with a configuration image sector of the NVM comprises a write enable and/or an erase enable lock status;
storing the configuration image in the configuration image sector of the NVM;
booting the configuration image by the PLD fabric;
updating a lock status corresponding to the device keys sector to include a write enable and/or an erase enable lock status;
receiving at least one device key over the configuration I/O or a programmable I/O of the secure PLD;
storing the at least one device key in the device keys sector of the NVM; and
updating the lock status corresponding to the device keys sector to include a write disable and/or an erase disable lock status.