Patent ID: 11968467
Assignee: CHENGDU IMAGE DESIGN TECHNOLOGY CO. LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A read circuit for an image sensor, comprising:
a first analog-to-digital conversion unit, wherein the first analog-to-digital conversion unit performs successive approximation high-bit analog-to-digital conversion on collected pixel data to obtain high-bit conversion data and residual pixel data; and
a second analog-to-digital conversion unit, wherein the second analog-to-digital conversion unit is electrically connected to the first analog-to-digital conversion unit, and the second analog-to-digital conversion unit performs single-slope low-bit analog-to-digital conversion on the residual pixel data to obtain low-bit conversion data,
wherein a sum of a first conversion accuracy of the first analog-to-digital conversion unit and a second conversion accuracy of the second analog-to-digital conversion unit is equal to a preset conversion accuracy for the collected pixel data,
wherein the successive approximation high-bit analog-to-digital conversion is firstly performed by the first analog-to-digital conversion unit, and the single-slope low-bit analog-to-digital conversion is then performed by the second analog-to-digital conversion unit,
wherein, during the performance of the single-slope low-bit analog-to-digital conversion, a ramp signal of the second analog-to-digital conversion unit is firstly falls to a first predetermined voltage, and then gradually rises in a step mode to change from the first predetermined voltage to a second limited voltage, the second limited voltage having a value greater than that of the first predetermined voltage, and
wherein, to complete one conversion by the read circuit, the read circuit is configured to:
obtain the high-bit conversion data requires only K number of clock cycles, K represents a positive integer, and K is a number of changeover switches in a switched capacitor array of the first analog-to-digital conversion unit, and
obtain the low-bit conversion data requires 2J-1 number of clock cycles, J represents a positive integer, and J is a number of bits in the residual pixel data.