Patent ID: 11901375
Assignee: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 13:
14. A method for manufacturing an array substrate, comprising:
providing a base; the base having a display area and a bonding area located on a side of the display area;
forming a plurality of first transistors and a plurality of conductive pins on a side of the base; the plurality of first transistors being located in the display area, and a first transistor including a first gate, a first source and a first drain; and the plurality of conductive pins being located in the bonding area and disposed in a same layer as the first gate; and
forming a plurality of conductive electrodes each on a respective one of surfaces of the plurality of conductive pins away from the base.