Patent ID: 11915102
Assignee: RIVERLANE LTD
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An apparatus for a quantum computer, the apparatus comprising:
a memory device and a converter block, the memory device comprising:
a local command module; and
a double-buffer-memory module comprising a plurality of pairs of memory modules, each memory module:
coupled to the local command module; and
configured to store a respective operation for controlling a qubit of the quantum computer;

wherein the local command module is configured to:
receive an instruction to provide the operation for the qubit;
read the operation from a respective one of the plurality of pairs of memory modules indicated by the instruction; and
provide the operation to the converter block; and

wherein the converter block is configured to receive the operation from the memory device and provide digital output pulses, representative of the operation, to an output interface, the output interface configured to provide the digital output pulses to a digital-to-analogue converter for controlling the qubit to perform the operation.