Patent ID: 11894354
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 15:
16. An optoelectronic device package, comprising:
a first redistribution layer (RDL);
a processing die; and
an input/output (I/O) die,
wherein the processing die and the I/O die are electrically connected to each other through the first RDL, the processing die comprises an active surface and an opposing surface opposite to the active surface, the I/O die includes an active surface and an opposing surface opposite to the active surface, the active surface of the processing die and the active surface of the I/O die are closer to the first RDL than the opposing surface of the processing die and the opposing surface of the I/O die; and
an electronic integrated circuit (EIC) die arranged on the first RDL, wherein the EIC die includes an active surface and an opposing surface, and the active surface of the EIC die is farther from the first RDL than the opposing surface of the EIC die, and wherein the opposing surface of the EIC die, the active surface of the processing die and the active surface of the I/O die are misaligned with each other.