Patent ID: 11935899
Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device comprising:
a first input terminal and a second input terminal;
a first output terminal and a second output terminal;
a first wiring and a second wiring; and
first to fourth transistors,
wherein one of a source and a drain of the first transistor is electrically connected to the first wiring, one of a gate and a back gate is electrically connected to the first input terminal, and the other of the source and the drain and the other of the gate and the back gate are electrically connected to the second output terminal,
wherein one of a source and a drain of the second transistor is electrically connected to the first wiring, one of a gate and a back gate is electrically connected to the second input terminal, and the other of the source and the drain and the other of the gate and the back gate are electrically connected to the first output terminal,
wherein a gate and a back gate of the third transistor are electrically connected to the first input terminal, one of a source and a drain is electrically connected to the first output terminal, and the other of the source and the drain is electrically connected to the second wiring, and
wherein a gate and a back gate of the fourth transistor are electrically connected to the second input terminal, one of a source and a drain is electrically connected to the second output terminal, and the other of the source and the drain is electrically connected to the second wiring.