Patent ID: 11954355
Assignee: ATLAS POWER TECHNOLOGIES INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 30:
31. The apparatus of claim 29 comprising a further circuit, for controlling reading and writing of the information to and from said tristate bidirectional memory cells by receiving an address; decoding said address; and activating a track line by a track line decoder based upon said decoded address, said decoded address being of a specific one or more of the tristate bidirectional memory cells, and activating another track line by a track line encoder based upon a specific decoded address which includes a specific polarity assignment for each of the one or more tristate bidirectional memory cell's specific information-representing state, and where the information is suitable to be read and decoded from said one or more tristate bidirectional memory cells; if the information is written in a forward bias the information is referred to as positive polarity, or if the information is written with no charge the information is referred to as zero, or if the information is written in a reverse bias the information is referred to as negative polarity.