Patent ID: 11861209
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A method of operating a memory system, the method comprising:
reading data of a selected page of a memory device and outputting read data as a plurality of chunks;
performing an error correction operation on each of the plurality of chunks;
determining that an error correction operation on a first chunk of the plurality of chunks has failed in response to detecting that a number of error bits included in the first chunk is greater than an allowed number of error bits;
identifying whether meta data of the first chunk includes a logical address mapped to a physical address of the first chunk;
determining whether to proceed with a recovery operation on the meta data of the first chunk based on a result of the identifying; and
in response to determining to proceed with the recovery operation:
detecting the logical address mapped to the physical address of the first chunk from an address map table; and
outputting, based on the logical address, data corresponding to a second chunk of the plurality of chunks, wherein an error correction operation on the second chunk has passed before outputting the data corresponding to the second chunk.