Patent ID: 11950417
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device comprising:
a lower structure including a substrate, and circuit elements on the substrate;
a pattern structure disposed on the lower structure and including a lower pattern layer, an intermediate pattern layer on the lower pattern layer, and an upper pattern layer on the intermediate pattern layer;
a stack structure including gate layers and interlayer insulating layers alternately stacked on the pattern structure in a vertical direction; and
a vertical memory structure penetrating through the stack structure in the vertical direction and in contact with the pattern structure,
wherein the vertical memory structure includes,
a core region;
a channel layer on a side surface and a bottom surface of the core region;
a data storage structure on an outer side surface and a bottom surface of the channel layer; and
a pad pattern contacting the channel layer, on the core region,
the data storage structure includes a first dielectric layer, a second dielectric layer and a data storage layer between the first dielectric layer and the second dielectric layer,
the first dielectric layer is adjacent to the gate layers and the second dielectric layer is in contact with the channel layer,
an upper end of the data storage layer and an upper end of the second dielectric layer overlap an uppermost gate layer among the gate layers in a first direction perpendicular to the vertical direction, and
the upper end of the data storage layer, the upper end of the second dielectric layer, and a bottom surface of the pad pattern are at a lower level than an upper surface of the uppermost gate layer,

wherein the core region extends into the lower pattern layer while penetrating through the upper pattern layer and the intermediate pattern layer,
the intermediate pattern layer includes a horizontal portion and upper and lower vertical portions connected to the horizontal portion and extending in the vertical direction,
the horizontal portion and the upper and lower vertical portions contact the side surface of the core region, and
an upper end of the upper vertical portion overlaps a lowermost gate layer among the gate layers in the first direction.