Patent ID: 11955441
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An interconnect structure comprising:
a first dielectric layer over a substrate;
a first metal layer over the first dielectric layer, the first metal layer comprising a first portion and a second portion spaced apart from the first portion;
a second dielectric layer over the first metal layer;
a metal via having an upper portion in the second dielectric layer, a middle portion between the first and second portions of the first metal layer, and a lower portion in the first dielectric layer, wherein the middle portion of the metal via has opposite sidewalls respectively set back from opposite sidewalls of the upper portion of the metal via; and
a second metal layer over the metal via, wherein from a top view the second metal layer comprises a metal line having longitudinal sides respectively set back from opposite sides of the first portion of the first metal layer.