Patent ID: 11966633
Assignee: CADENCE DESIGN SYSTEMS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 2:
3. The medium of claim 2, wherein:
the read algorithm assigns values to the set of ports in the NVM module to assert the read condition of the strobe port of the NVM module prior to a read command of the read algorithm in an order from a longest set up time to a shortest set up time;
the read algorithm includes a wait command prior to execution of the read command to ensure that a sufficient interval of time has passed between assigning a value to a given port in the set of ports and execution of the read command, the interval of time being based on the set up time for the given port, and
the read command includes executing a number of non-operations, wherein the number of non-operations is based on a period of a fuse clock and a set-up and hold time of an address bus against the strobe port.