Patent ID: 11934257
Assignee: IMAGINATION TECHNOLOGIES LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A processing system configured to process an input task, the processing system embodied in hardware on an integrated circuit comprising: a task duplication unit configured to duplicate the input task so as to form a first task and a second task; a memory; a memory allocation unit configured to allocate blocks of memory in the memory, including: a first block of memory in the memory configured to store read-write data to be accessed during the processing of the first task, a second block of memory in the memory configured to store a copy of the read-write data to be accessed during the processing of the second task, and a third block of memory in the memory configured to store read-only data to be accessed during the processing of both the first task and the second task; and processing logic configured to process the first task so as to generate a first output, and to process the second task so as to generate a second output.