Patent ID: 11961893
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A semiconductor device comprising:
a first interlayer dielectric (ILD) layer over a transistor structure;
a first contact extending through the first ILD layer, the first contact being electrically coupled with a first source/drain region of the transistor structure, wherein a top surface of the first contact is convex, and wherein the top surface of the first contact is disposed below a top surface of the first ILD layer;
a second ILD layer over the first ILD layer and the first contact;
a second contact extending through the second ILD layer, the second contact being electrically coupled with the first contact; and
a third contact extending through the second ILD layer, the third contact being electrically coupled with a gate electrode of the transistor structure, wherein a top surface of the third contact is convex.