Patent ID: 11935882
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 8:
9. The semiconductor device of claim 1, further comprising a metal layer including a plurality of patterns disposed on a same level and made of a same material,
wherein:
a first group of patterns of the plurality of patterns of the metal layer are disposed in one of the bit cells and a second group of patterns of the plurality of patterns of the metal layer are disposed in one of the abutting dummy cells, and
one or more of the first group of patterns are electrically connected to one of the gate electrode layers of the one bit cell, and any of the second group of patterns are electrically isolated from any of the dummy gate electrode layers of the one of the abutting dummy cells.