Patent ID: 11861189
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A method for operating a memory system, comprising:
allocating a plurality of memory blocks, each memory block including memory cells capable of storing multi-bit data, for plural zoned namespaces input from an external device;
accessing a memory block allocated for one of the plural zoned namespaces in response to a data input/output request input from the external device; and
adjusting a number of bits of data stored in a memory cell included in a memory block, which is allocated for at least one zoned namespace among the plural zoned namespaces in response to a first request input from the external device,
wherein the adjusting of the number of bits of data comprises when the memory block allocated for the at least one zoned namespace includes memory cells storing n-bit data before the first request is input:
adjusting the memory block to store 1-bit data in each of the memory cells included therein; and
deactivating (n−1) zoned namespaces among the plural zoned namespaces, wherein the n is an integer greater than 1 to maintain a storage capacity of the at least one zoned namespace.