Patent ID: 11907004
Assignee: ETOPUS TECHNOLOGY INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A transmitter device comprising:
a clock circuit configured to generate a clock signal associated with a data rate of the transmitter device;
a configurable timer circuit including a plurality of retimers configured to receive input data and adjust a timing of the input data to generate retimed input data according to the clock signal, each of the plurality of retimers including a plurality of registers arranged in a plurality of rows of registers where each register is configured to receive a different portion of the input data and output a corresponding portion of the retimed input data according to the clock signal; and
a transmitter circuit coupled to a communications channel, the transmitter circuit configured to transmit serialized data based on the retimed input data to a receiver device over the communications channel at the data rate,
wherein responsive to the transmitter device being configured to operate at the data rate that is a portion of a maximum data rate of the transmitter device, a portion of the plurality of rows of registers of at least one of the plurality of retimers is enabled to adjust the timing of the input data and a remaining portion of the plurality of rows of registers of the at least one of the plurality of retimers is disabled.