Patent ID: 11924866
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A non-transitory computer-readable storage medium that stores instructions for execution by processing circuitry of an extremely high throughput (EHT) access point (AP) (EHT AP), the processing circuitry configured to:
encode an EHT multi-user (MU) physical layer protocol data unit (PPDU) (EHT MU PPDU) for transmission to multiple EHT stations (STAs), wherein a preamble portion of the EHT MU PPDU is encoded to include a universal SIGNAL field (U-SIG) followed by an EHT-SIG field, the EHT MU PPDU comprising one of:
a 240 MHz EHT PPDU when the EHT MU PPDU is to occupy a channel bandwidth of 240 MHz;
a 160 MHz EHT PPDU when the EHT MU PPDU is to occupy a channel bandwidth of 160 MHz; and
a 320 MHz EHT PPDU when the EHT MU PPDU is to occupy a channel bandwidth of 320 MHz,
wherein the EHT MU PPDU comprises a plurality of two or more 80 MHz portions including one primary 80 MHz portion and one or more secondary 80 MHz portions, wherein the preamble portion is separately encoded for each 80 MHz portion, wherein the EHT-SIG is encoded to indicate a receiver address (RA) and resource unit allocation, and
wherein the U-SIG for the primary 80 MHz portion is encoded to indicate whether any one or more of the EHT STAs will need to decode the EHT-SIG transmitted on one of the secondary 80 MHz portions to obtain receive address (RA) information.