Patent ID: 11860783
Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A method comprising:
provisioning a compute node with both near memory and far memory;
granting to a host operating system (OS), configured to support a first set of tenants associated with the compute node, access to: (1) a first swappable range of memory addresses associated with the near memory and (2) a second swappable range of memory addresses associated with the far memory to allow for swapping of cache lines between the near memory and the far memory; and
allocating memory in a granular fashion to any of the first set of tenants such that each allocation of memory to a tenant includes memory addresses corresponding to a conflict set having a conflict set size, and wherein the conflict set comprises:
a first conflicting region associated with the first swappable range of memory addresses associated with the near memory and a second conflicting region associated with the second swappable range of memory addresses associated with the far memory, and wherein each of the first conflicting region and the second conflicting region having a same size that is selected to be equal to or less than half of the conflict set size.