Patent ID: 11935610
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 1:
2. The memory device of claim 1, wherein the controller designates the deactivated data memory cell as the restored data memory cell includes:
the memory is configured to store a repair table configured to record errors associated with one or more deactivated data memory cells, the repair table including a plurality of repair table entries, each repair table entry corresponding to one deactivated data memory cell and having an address and a failure count; and
the controller is configured, in response to determining that an error table entry has a higher failure count than a repair table entry, to:
designate the deactivated data memory cell associated with the repair table entry as the restored data memory cell belonging to the data memory cells actively used for storing data;
designate the second data memory cell associated with the error table entry as a second deactivated data memory cell belonging to the backup memory cells not actively used for storing data; and
update the repair table by replacing the repair table entry with the error table entry.