Patent ID: 11972787
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An apparatus comprising:
one or more control circuits configured to communicate with one or more cross-point arrays, each array comprising a plurality of first conductive lines, a plurality of second conductive lines, and programmable resistance memory cells, each programmable resistance memory cell comprising a programmable resistance memory element in series with a two terminal threshold switching selector having a threshold voltage, each memory cell connected between one of the first conductive lines and one of the second conductive lines, wherein the one or more control circuits are configured to:
read a selected programmable resistance memory cell by turning on the threshold switching selector in the selected programmable resistance memory cell and keeping the threshold switching selector on for a first period of time to read a state of the programmable resistance memory element in the selected programmable resistance memory cell; and
refresh the threshold switching selector in the selected programmable resistance memory cell by turning on the threshold switching selector in the selected programmable resistance memory cell and keeping on the threshold switching selector for a second period of time that is less than the first period of time to reset the threshold voltage of the threshold switching selector.