Patent ID: 11861174
Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A Non-Volatile Memory System (NVME) controller comprising:
a host port;
at least one processor; and
a non-transitory machine-readable storage medium comprising instructions that, when executed, cause the at least one processor to:
receive, at the host port of the NVME controller, input/output (IO) requests from a host, wherein the NVME controller is to support communications between the host and NVME storage devices;
determine a utilization time of the host port;
based on determining that the utilization time of the host port is lower than a host port utilization threshold, create a candidate list of NVME storage devices based on utilizations, throughputs, busy time periods, and IO request completions of the NVME storage devices;
assign priority ranks to the NVME storage devices in the candidate list, wherein the assigning comprises, for each respective NVME storage device in the candidate list:
determining a number of read requests in a read IO queue of the respective NVME storage device; and
assign a priority rank to the read IO queue of the respective NVME storage device based on the number of read requests; and

based on a first NVME storage device in the candidate list being assigned a highest priority rank of the priority ranks, prioritizing a processing of read requests in a read IO queue of the first NVME storage device over read requests in a read IO queue of another NVME storage device in the candidate list.