Patent ID: 11895817
Assignee: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
Field: Computer technology (Electrical engineering)
Classification: CPC H  G  Y | IPC G  H

Claim 4:
5. The SRAM device of claim 1, further comprising:
a fourth transistor including a fourth gate on the PMOS area, second source/drain areas formed on the PMOS area on both sides of the fourth gate, and a fourth channel connecting the second source/drain areas to each other;
a fifth transistor including a fifth gate in the first NMOS area and a fifth channel vertically overlapping the fifth gate; and
a sixth transistor including a sixth gate in the second NMOS area, and a sixth channel vertically overlapping the sixth gate,
wherein the fourth channel comprises silicon,
wherein the fifth channel and the sixth channel comprise an oxide semiconductor.