Patent ID: 11929125
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A method of operating a memory system that includes a plurality of sense circuits, each sense circuit connected to a respective memory cell of a set of memory cells and each sense circuit including a set of internal user data latches connected to a respective external data transfer latch of each sense circuit, the method comprising:
loading user data into the respective external data transfer latch and the set of internal user data latches of each sense circuit to assign a data state of a set of data states to the respective memory cell in a program operation, each respective external data transfer latch comprising a first bit value for a subset of the set of data states and a second bit value for data states of the set of data states which are above the subset, the first bit value indicating a data state not prohibited from having a verify test and the second bit value indicating a data state prohibited from having a verify test; and
at specified program loops of the program operation, shifting the subset to encompass higher data states of the set of data states, and flipping the second bit value to the first bit value for respective external data transfer latches for data states of the set of data states which become encompassed by the subset.