Patent ID: 11882697
Assignee: RENESAS ELECTRONICS CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of manufacturing a semiconductor device including a non-volatile semiconductor memory, a first transistor having a first gate oxide film with a first film thickness, a second transistor having a second gate oxide film with a second film thickness smaller than the first film thickness, and a third transistor having a third gate oxide film with a third film thickness larger than the first film thickness, the method comprising the steps of:
(a) forming a first oxide film on a surface of a semiconductor substrate in formation regions of the first, second, and third transistors;
(b) removing the first oxide film in the formation regions of the second and third transistors;
(c) forming a first etched film on the first oxide film in the formation region of the first transistor and on the surface of the semiconductor substrate in the formation regions of the second and third transistors;
(d) after the step (c), in the formation region of the first transistor, removing the first etched film and a part of an upper layer of the first oxide film, thereby forming the first gate oxide film with the first film thickness;
(e) removing the first etched film in the formation region of the second transistor; and
(f) after the step (e), in the formation region of the second transistor, forming a second oxide film on the surface of the semiconductor substrate, thereby forming the second gate oxide film with the second film thickness,
wherein in the formation region of the third transistor, the first etched film forms the third gate oxide film with the third film thickness.