Patent ID: 11935880
Assignee: ADATA TECHNOLOGY CO., LTD.
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H  G | IPC F  H

Claim 3:
4. The DRAM device of claim 1, wherein the circuit substrate includes a first surface and a second surface, the at least one DRAM chip being disposed on either the first surface or the second surface, and the light emitting element being disposed on either the first surface or the second surface; wherein a first projection region is defined by a vertical projection of the at least one DRAM chip onto the second surface, a second projection region being defined by a vertical projection of the light emitting element onto the second surface, a third projection region being defined by a vertical projection of the second light blocking element onto the second surface, and the third projection region covering the first projection region and the second projection region.