Patent ID: 11922535
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 6:
7. A method to facilitate processing of data at a graphics processing unit (GPU) including one or more multiprocessors, the method comprising:
receiving, at a first set of processing cores of a first type, a first set of operands from first registers of a register file, wherein the first set of processing cores of the first type includes circuitry to execute instructions to perform matrix operations on the first set of operands in the first set of registers of the register file;
receiving, at a second set of processing cores of a second type, a second set of operands from second registers of the register file, the second set of processing cores being different from the first set of processing cores;
performing multi-dimensional matrix math operations on the first set of operands at the first set of processing cores of the first type, wherein the first set of processing cores of the first type are associated with a first memory channel of a memory device coupled with at least one of the one or more multiprocessors; and
performing general-purpose graphics processing unit (GPGPU) operations on the second set of operands at the second set of processing cores, wherein the second set of processing cores of the second type are associated with a second memory channel of the memory device coupled with the at least one of the one or more multiprocessors, the second memory channel is distinct from the first memory channel, and the memory device is external to the at least one of the one or more multiprocessors.