Patent ID: 11869929
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 3:
4. The method for manufacturing a laminated capacitor of claim 3, wherein forming the second isolation insulation spacer between the bottom electrode connection spacers, in which the second isolation insulation spacer has the openings respectively exposing the top electrodes comprises:
forming a second isolation insulation spacer layer on a top and a sidewall of each of the bottom electrode connection spacers, and between the bottom electrode connection spacers; and
removing the second isolation insulation spacer layer on the top of each of the bottom electrode connection spacers and between the bottom electrode connection spacers by dry etching to form the openings respectively exposing the top electrodes,
wherein the second isolation insulation spacer layer reserved on the sidewall of each of the bottom electrode connection spacers form the second isolation insulation spacer.