Patent ID: 11861369
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. The PIM device according to claim 9,
wherein the MAC operator comprises an arithmetic circuit which performs a calculation on data that is output from the first and second memory banks,
wherein the arithmetic circuit comprises:
a first multiplier configured to generate a first arithmetic data by performing a multiplication calculation on at least data, corresponding to a first element of the first matrix, output from the first memory bank and data, corresponding to a first element of the second matrix, output from the second memory bank;
a second multiplier configured to generate second arithmetic data by performing a multiplication calculation on data, corresponding to a second element of the first matrix, output from the first memory bank and data, corresponding to a second element of the second matrix, output from the second memory bank; and
at least one adder configured to add outputs of the first and second arithmetic data, and
wherein the MAC operator outputs the first and second arithmetic data to an output terminal of the arithmetic circuit based on the arithmetic operation signal.