Patent ID: 11862514
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A method of manufacturing an integrated circuit device, the method comprising:
forming a first lower wiring structure and a second lower wiring structure formed on a substrate;
forming an insulating barrier layer conformally covering an upper surface of the substrate and the first and second lower wiring structures;
forming a sacrificial pattern between the first and second lower wiring structures;
forming a capping layer covering an upper surface of the sacrificial pattern and having a width equal to that of the sacrificial pattern;
forming an air gap by removing the sacrificial pattern;
forming an etch stop layer conformally covering an upper surface of the second lower wiring structure, a side surface of the insulating barrier layer, an upper surface of the insulating barrier layer, and an upper surface of the capping layer;
forming an insulating layer covering the etch stop layer; and
forming an upper wiring structure penetrating the insulating layer, connected to an upper surface of the first lower wiring structure, and having a protruding portion covering a portion of an upper surface of the capping layer,
wherein a shortest distance between the first lower wiring structure and the second lower wiring structure closest thereto is less than a shortest distance between the protruding portion and the second lower wiring structure closest to the protruding portion.