Patent ID: 11899523
Assignee: APPLE INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 14:
15. A system, comprising:
a plurality of integrated circuit dies coupled together, wherein the integrated circuit dies include a first and a second system-on-a-chip (SOC) that respectively include at least a central processing unit (CPU) and a graphics processing unit (GPU);
wherein the first SOC is configured to synchronize a power state change of the first and second SOCs from a first power state to a second power state, and wherein to synchronize the power state change, the first SOC is configured to:
issue a transition request to the second SOC to transition from the first power state to the second power state;

wherein the second SOC is configured to:
receive the transition request from the first SOC;
transition the second SOC to the second power state; and
issue an acknowledgement to the first SOC that the second SOC has transitioned to the second power state; and

wherein the first SOC is configured to:
transition the first SOC from the first power state to the second power state.