Patent ID: 11915773
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A nonvolatile memory device comprising:
a memory cell array including a plurality of cell strings and a plurality of wordlines, each of the plurality of cell strings including memory cells, each of the plurality of wordlines connected to at least one of the memory cells, the plurality of cell strings being connected between a plurality of bitlines and a source line;
a voltage generator configured to generate a wordline voltage applied to the plurality of wordlines;
a voltage path circuit connected between the voltage generator and the memory cell array and configured to transfer the wordline voltage to the plurality of wordlines; and
a wordline defect detection circuit connected to a measurement node between the voltage generator and the voltage path circuit and configured to
measure a path leakage current of the voltage path circuit based on a measurement voltage of the measurement node to generate an offset value corresponding to the path leakage current in a compensation mode, and
determine, for each of the plurality of wordlines, whether a defect exists based on the offset value and the measurement voltage in a defect detection mode.