Patent ID: 11894085
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory device, comprising:
a plurality of memory sections; and
one or more components configured to: read a first set of bits stored in a test control mode register of the memory device;
identify a test mode, for performing a memory built-in self-test, based on the first set of bits;
read a second set of bits stored in a section identifier mode register of the memory device;
identify, based on the second set of bits indicating one or more memory sections of the plurality of memory sections, a subset of the plurality of the memory sections for which the memory built-in self-test is to be performed, the subset comprising the one or more memory sections; and
perform, based on the test mode, the memory built-in self-test for the one or more memory sections indicated by the second set of bits.