Patent ID: 11943983
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 17:
18. The display substrate according to claim 2, wherein the first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel each include: a light emitting element, an initialization signal line pattern, a reset signal line pattern, a gate line pattern, and a light emitting control signal line pattern, at least part of the initialization signal line pattern, at least part of the reset signal line pattern, at least part of the gate line pattern and at least part of the light emitting control signal line pattern extend along the first direction;
the first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel further each include: a first transistor, a second transistor, a driving transistor, a data writing transistor, a fifth transistor, a sixth transistor, a seventh transistor, and a storage capacitor;
in each sub-pixel, a gate electrode of the driving transistor is electrically connected to a second electrode of the first transistor, a first electrode of the driving transistor is electrically connected to a second electrode of the fifth transistor, a second electrode of the driving transistor is electrically connected to a first electrode of the first transistor;
a gate electrode of the first transistor is electrically connected to the gate line pattern;
a gate electrode of the second transistor is electrically connected to the reset signal line pattern, a first electrode of the second transistor is electrically connected to the initialization signal line pattern, and a second electrode of the second transistor is electrically connected to the gate electrode of the driving transistor;
a gate electrode of the data writing transistor is electrically connected to the gate line pattern, a first electrode of the data writing transistor is electrically connected to the data line pattern included in the sub-pixel, and a second electrode of the data writing transistor is electrically connected to the first electrode of the driving transistor;
a gate electrode of the fifth transistor is electrically connected to the light emitting control signal line pattern, and a first electrode of the fifth transistor is electrically connected to the power signal line pattern;
a gate electrode of the sixth transistor is electrically connected to the light emitting control signal line pattern, a first electrode of the sixth transistor is electrically connected to the second electrode of the driving transistor, and a second electrode of the sixth transistor is electrically connected to the light emitting element;
a gate electrode of the seventh transistor is electrically connected to a reset signal line pattern in an adjacent next sub-pixel along the second direction, and a first electrode of the seventh transistor is connected to an initialization signal line pattern in the adjacent next sub-pixel along the second direction, and a second electrode of the seventh transistor is electrically connected to the light emitting element;
a first electrode plate of the storage capacitor is multiplexed as the gate electrode of the driving transistor, and a second electrode plate of the storage capacitor is electrically connected to the power signal line pattern.