Patent ID: 11861239
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A device comprising:
a memory array comprising at least a first memory cell and a second memory cell and storing a coding data structure comprising a plurality of valley locations at bit value boundaries of a series of threshold voltage levels within the first memory cell and the second memory cell for each of a plurality of logical bits; and
control logic, operatively coupled with the memory array, the control logic to perform operations comprising:
receiving a read request to determine one or more logical bits, of the plurality of logical bits, from threshold voltage levels stored in a combination of the first memory cell and the second memory cell;
determining, using the coding data structure, the plurality of valley locations along the series of threshold voltage levels for each of the one or more logical bits; and
returning, in response to the read request, values of the one or more logical bits based on sensing the threshold voltage levels at the plurality of valley locations for each of the one or more logical bits.