Patent ID: 11968907
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 17:
18. A method of reading the magnetoresistive memory cell of claim 1, comprising:
applying a read voltage between the first electrode and the second electrode; and
detecting a read current flowing through the magnetic tunnel junction layer stack between the first electrode and the second electrode,
wherein:
the asymmetric magnetoresistance layer has a first layer magnetoresistance when a magnetization of the reference layer and a magnetization of the free layer are in a parallel state;
the asymmetric magnetoresistance layer has a second layer magnetoresistance when the magnetization of the reference layer and the magnetization of the free layer are in an antiparallel state;
a ratio of the second layer magnetoresistance to the first layer magnetoresistance is at least 1.10; and
the magnetroresistive memory cell utilizes a stray field of the free layer coupled to the asymmetric magnetoresistance layer to amplify a difference in the read current between the parallel state and the antiparallel state.