Patent ID: 11894276
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 10:
11. A method, comprising:
forming a plurality of first suspended layers in a first fin and a plurality of second suspended layers in a second fin;
forming a first interfacial layer wrapping around the first suspended layers in the first fin and a second interfacial layer wrapping around the second suspended layers in the second fin;
forming a first high-k dielectric layer wrapping around the first interfacial layer and a second high-k dielectric layer wrapping around the second interfacial layer;
depositing a metal layer wrapping around the first and second high-k dielectric layers;
removing the metal layer from the first high-k dielectric layer;
performing an annealing process, wherein during the annealing process, oxygen in an ambient environment is driven through the metal layer, the second high-k dielectric layer, and the second interfacial layer and arrives at an outer portion of the second suspended layers, such that the outer portion of the second suspended layers is converted to an oxide layer; and
depositing a first gate electrode layer wrapping around the first high-k dielectric layer and a second gate electrode layer wrapping around the second high-k dielectric layer.