Patent ID: 11910658
Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 0:
1. A display device, comprising:
a display region;
a non-display region surrounding the display region, wherein the display region comprises a main display region and an auxiliary region surrounding the main display region, the auxiliary region is disposed between the non-display region and the main display region, and the non-display region comprises a bending region connected to the auxiliary region;
an array substrate disposed in the display region and comprising a plurality of pixel units, a plurality of first trough holes, and a plurality of second trough holes, wherein the first trough holes and the second trough holes are disposed in the auxiliary region between the bending region and the main display region, and the second trough holes are disposed between two adjacent pixel units; and
an anode electrode disposed on the array substrate, wherein the first trough holes are correspondingly disposed in each of the pixel units and are disposed directly below the anode electrode,
wherein the array substrate comprises:
a base substrate extending from the display region to the non-display region;
a blocking layer disposed on the base substrate and extending from the display region to the non-display region;
a buffer layer disposed on the blocking layer and extending from the display region to the non-display region;
an active layer disposed on the buffer layer in the display region;
a first gate insulating layer covering the active layer and the buffer layer and extending from the display region to the non-display region;
a first gate layer covering the first gate insulating layer in the display region; a second gate insulating layer covering the first gate layer and the first gate insulating layer, and extending from the display region to the non-display region;
a second gate layer covering the second gate insulating layer in the display region;
a dielectric interlayer covering the second gate insulating layer and the second gate layer, and extending from the display region to the non-display region;
a source electrode and a drain electrode disposed on the dielectric interlayer in the display region and correspondingly connected to the active layer; and
a planarization layer covering the source electrode, the drain electrode, and the dielectric interlayer and extending from the display region to the non-display region, wherein the anode electrode is correspondingly disposed on the planarization layer and is correspondingly connected to the drain electrode;
wherein the first trough holes extend from the dielectric interlayer to a surface of the active layer, and the second trough holes extend from the dielectric interlayer to the blocking layer or to an inside of the buffer layer,
wherein the second trough holes are further disposed between one of the pixel units close to the main display region and the main display region, and disposed between one of the pixel units close to the bending region and the bending region, and
the first trough holes and the second trough holes are filled with an inorganic material adopted by the planarization layer.