Patent ID: 11961810
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 15:
16. A device comprising:
a metal trace mounted on a first substrate, the metal trace having a first width, the metal trace extending along a surface of the first substrate by a first length, the first length greater than the first width; and
a chip comprising:
a contact pad over a second substrate;
an insulating layer surrounding the contact pad;
a polyimide layer over the contact pad and the insulating layer;
an under bump metallurgy over the polyimide layer, the contact pad, and the insulating layer; and
a metal bump mounted over the second substrate and on the under bump metallurgy, the metal bump having a second width, the second width decreasing along a second direction extending from the second substrate to the first substrate, wherein the under bump metallurgy isolates the metal bump from the polyimide layer, and wherein the metal bump and the metal trace are physically and electrically coupled together without solder.