Patent ID: 11921419
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Optics (Instruments)
Classification: CPC G  H | IPC G  H

Claim 13:
14. A method of fabricating a semiconductor device, the method comprising:
forming a peripheral circuit structure on a substrate, the peripheral circuit structure comprising peripheral transistors and lower interconnection lines provided on the peripheral transistors, the substrate comprising a cell array region and a connection region;
forming a semiconductor layer on the peripheral circuit structure;
alternately stacking insulating layers and sacrificial layers on the semiconductor layer to form a stack;
patterning the stack on the connection region to form a staircase structure;
forming channel holes to penetrate the stack on the cell array region;
forming dummy holes to penetrate the staircase structure on the connection region;
forming vertical channel structures in the channel holes, respectively, each of the vertical channel structures comprising a vertical insulating pattern comprising a charge storing layer, a vertical semiconductor pattern connected to the semiconductor layer, and a gap-fill insulating pattern;
forming dummy structures in the dummy holes, respectively;
replacing the sacrificial layers with electrodes, respectively;
forming bit lines, each bit line of the bit lines being electrically connected to a respective one of the vertical channel structures; and
forming upper interconnection lines, each upper interconnection line of the upper interconnection lines being electrically connected to a respective one of the electrodes exposed through the staircase structure,
wherein the forming the channel holes comprises:
designing a layout defining the channel holes;
performing an optical proximity correction (OPC) operation on the designed layout; and
performing a photolithography process using a photomask which is manufactured with the layout corrected by the OPC operation,

wherein the OPC operation comprises:
generating a target pattern including a first edge, a second edge, a third edge, and a fourth edge;
performing a first OPC operation, based on the target pattern, to generate a first correction pattern;
measuring a first target error by comparing a first simulation image of the first correction pattern with the target pattern;
compensating each of the first to fourth edges of the target pattern, based on the first target error, to generate a retarget pattern; and
performing a second OPC operation, based on the retarget pattern, to generate a second correction pattern.