Patent ID: 11874787
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A compute platform comprising:
a plurality of central processing units (CPUs), each CPU associated with a respective socket and connected to at least one other CPU via a socket-to-socket interconnect;
a firmware storage device in which platform firmware is stored;
one or more controller hubs, each controller hub connected to a respective CPU and having a plurality of Input-Output (TO) interfaces, at least one controller hub configured to be implemented as an IO-expander under which the controller hub is used to expand the IO interfaces available to a CPU to which the controller hub is coupled; and
a platform control entity, coupled to each controller hub via a respective set of handshake wires,
wherein the platform is configured to control booting of each of the at least one controller hubs configured to be implemented as an IO-expander using handshake signals exchanged over the set of handshake wires coupling that controller hub to the platform control entity, wherein one of the plurality of CPUs is a legacy CPU that is not capable of booting on its own that is coupled to a first controller hub that is coupled to the firmware storage device, wherein the first controller hub is implemented as a legacy controller hub, wherein the platform is booted by accessing the platform firmware stored in the firmware storage device via the legacy controller hub and sending at least a portion of the platform firmware that is accessed to the legacy CPU.