Patent ID: 11950404
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 19:
20. A memory device, comprising:
a plurality of memory cells vertically stacked over a substrate; and
at least one supporter extending vertically in a direction that the memory cells are stacked,
wherein each of the memory cells includes:
a bit line oriented perpendicular to the substrate;
a capacitor horizontally spaced apart from the bit line;
an active layer horizontally oriented between the bit line and the capacitor; and
a word line positioned over at least one surface among an upper surface and a lower surface of the active layer and extending horizontally in a direction intersecting with the active layer,

wherein edge portions of the word lines of the memory cells are supported by the at least one supporter,
wherein the at least one supporter includes a plurality of dielectric pillars,
wherein the edge portion of the word line stack includes a first sidewall and a second sidewall which is parallel to the first sidewall,
wherein each of the first and second sidewalls of the word line stack includes a plurality of first recessed sidewalls and a plurality of second recessed sidewalls, and
wherein the plurality of dielectric pillars are spaced apart from each other along at least one recessed sidewall among the first recessed sidewalls and the second recessed sidewalls.