Patent ID: 11908775
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device comprising:
a semiconductor substrate having a first surface adjacent to an active layer;
a first insulating layer disposed on the first surface of the semiconductor substrate;
a second insulating layer disposed on the first insulating layer;
an etch stop structure interposed between the first insulating layer and the second insulating layer and comprising a plurality of etch stop layers;
a contact wiring pattern disposed inside the second insulating layer and surrounded by at least one etch stop layer of the plurality of etch stop layers; and
a through electrode structure configured to pass through the semiconductor substrate, the first insulating layer, and at least one etch stop layer of the plurality of etch stop layers in a vertical direction and contact the contact wiring pattern,
wherein an upper surface of the contact wiring pattern is higher than a lower surface of the etch stop structure, and is not higher than an upper surface of the etch stop structure.