Patent ID: 11901892
Assignee: MEDIATEK INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. The level shifter as claimed in claim 13, wherein:
the first protection circuit further comprises a first series of transistors;
the inverting output terminal is coupled to the first input transistor through the third series of transistors, the first voltage-drop circuit, and the first series of transistors;
the second protection circuit further comprises a second series of transistors;
the output terminal is coupled to the second input transistor through the fourth series of transistors, the second voltage-drop circuit, and the second series of transistors;
the first series of transistors each has a gate terminal biased by the nominal voltage when the input signal is in the high-level state, and, in response to the low-level state of the input signal, a higher transistor in the first series of transistors has connected gate and drain terminals; and
the second series of transistors each has a gate terminal biased by the nominal voltage when the input signal is in the low-level state, and, in response to the high-level state of the input signal, a higher transistor in the second series of transistors has connected gate and drain terminals.