Patent ID: 11923862
Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
Field: Telecommunications (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A transmission system comprising a transmission apparatus on the transmission side and a transmission apparatus on the reception side connected by a first transmission line and a second transmission line,
wherein the transmission apparatus on the transmission side includes
a transmission processor that performs a process of transmitting a first signal transmitted via the first transmission line and a process of transmitting a second signal having the same content as the first signal transmitted on the second transmission line; and
a transmission side clock generator configured to output a transmission side clock signal giving a processing timing to the transmission process, and
the transmission apparatus on the reception side includes
a first reception processor configured to receive the first signal transmitted on the first transmission line and perform a reception process on the first signal;
a second reception processor configured to receive the second signal transmitted on the second transmission line and perform a reception process on the second signal;
an output speed controller configured to control a speed at which the first signal on which the first reception processor has performed the reception process is output and a speed at which the second signal on which the second reception processor has performed the reception process is output;
a system switch configured to select and output any one of the first signal output by the first reception processor and the second signal output by the second reception processor;
an output processor configured to perform an output process for outputting the first signal or the second signal output by the system switch to another apparatus;
a reception side clock generator configured to output a reception side clock signal giving a processing timing to each of the first reception processor, the second reception processor, and the output processor;
a clock frequency control unit controller configured to adjust a frequency of the reception side clock signal giving the processing timing to the output processor; and
a frequency adjustment range calculator configured to calculate an adjustment range of the frequency at the clock frequency controller based on frequency deviation accuracy of the reception side clock generator, frequency deviation accuracy of the transmission side clock generator, and a prescribed value of a frequency deviation,
wherein the frequency adjustment range calculator is configured to
acquire the frequency deviation accuracy of the reception side clock generator measured at the transmission apparatus on the reception side and the frequency deviation accuracy of the transmission side clock generator measured at the transmission apparatus on the transmission side,
calculate a maximum value of a positive direction of the adjustment range by decreasing a maximum value of the acquired frequency deviation from a minimum value of a positive direction of the prescribed value of the frequency deviation, and
calculate a maximum value of a negative direction of the adjustment range by decreasing a minimum value of the acquired frequency deviation from a minimum value of a negative direction of the prescribed value of the frequency deviation, and
wherein each of the transmission processor, the transmission side clock generator, the first reception processor, the second reception processor, the output speed controller, the system switch, the output processor, the reception side clock generator, the clock frequency controller, and the frequency adjustment range calculator is implemented by:
i) computer executable instructions executed by at least one processor,
ii) at least one circuitry or
iii) a combination of computer executable instructions executed by at least one processor and at least one circuitry.