Patent ID: 11908758
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A semiconductor package comprising:
a dual stiffener including an upper stiffener and a lower stiffener;
an upper package including an upper package substrate, a system on chip (SoC) centrally mounted on an upper surface of the upper package substrate using an upper ball grid array (BGA), and the upper stiffener disposed along an outer edge of the upper package substrate;

a lower package substrate that centrally mounts the upper package using a second BGA and includes the lower stiffener disposed on an upper surface of the lower package substrate to surround the upper package substrate; and
a heat sink disposed on the upper package,
wherein the upper stiffener is a square-ring having a rectangular cross-section,
the lower stiffener includes a fence portion having a rectangular cross-section and a cover portion extending horizontally from an upper surface of the fence portion to contact an upper surface of the upper stiffener, and
the upper stiffener and the lower stiffener are laterally spaced apart.