Patent ID: 11894238
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A method comprising:
forming a first trench and a second trench in a first material layer disposed over a substrate, wherein the first trench extends along a first direction;
forming a planarization layer in the first trench and the second trench;
forming a first hard mask layer over the first material layer;
forming a third trench extending through the first hard mask layer to expose a first portion of the planarization layer,
forming a fourth trench extending through the first hard mask layer to expose a second portion of the planarization layer;
removing the first portion of the planarization layer to extend the third trench into the planarization layer and removing a second portion of the planarization layer to extend the fourth trench into the planarization layer thereby forming a patterned planarization layer, wherein the extended third trench extends along a second direction that is different than the first direction, wherein the extended third trench at least partially overlaps the first trench; and
removing a portion of the first material layer through the third trench.