Patent ID: 11867572
Assignee: STMICROELECTRON NTERNATIONAL N.V.
Field: Basic communication processes (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 9:
10. The temperature sensing circuit of claim 3, wherein the switched capacitor circuit further comprises:
a first switch circuit configured to selectively connect the first capacitor between the base-emitter voltage of the first bipolar junction transistor and a non-inverting input of the integrator, when the most recent bit of the bitstream is a logic zero and the switched capacitor circuit is cooperating with the integrator to perform sampling;
wherein the first switch circuit selectively connects the first capacitor between a common mode voltage and the non-inverting input of the integrator, when the most recent bit of the bitstream is a logic zero and the switched capacitor circuit is cooperating with the integrator to perform integration;
a second switch circuit configured to selectively connect the second capacitor between the base-emitter voltage of the second bipolar junction transistor and an inverting input of the integrator, when the most recent bit of the bitstream is a logic zero and the switched capacitor circuit is cooperating with the integrator to perform sampling;
wherein the second switch circuit selectively connects the second capacitor between the common mode voltage and the inverting input of the integrator, when the most recent bit of the bitstream is a logic zero and the switched capacitor circuit is cooperating with the integrator to perform integration;
a third switch circuit configured to selectively connect the third capacitor between ground and the non-inverting input of the integrator, when the most recent bit of the bitstream is a logic one and the switched capacitor circuit is cooperating with the integrator to perform sampling;
wherein the third switch circuit selectively connects the third capacitor between the common mode voltage and the non-inverting input of the integrator, when the most recent bit of the bitstream is a logic one and the switched capacitor circuit is cooperating with the integrator to perform integration;
a fourth switch circuit configured to selectively connect the fourth capacitor between the base-emitter voltage of the third bipolar junction transistor and the inverting input of the integrator, when the most recent bit of the bitstream is a logic one and the switched capacitor circuit is cooperating with the integrator to perform sampling; and
wherein the fourth switch circuit selectively connects the fourth capacitor between the common mode voltage and the inverting input of the integrator, when the most recent bit of the bitstream is a logic one and the switched capacitor circuit is cooperating with the integrator to perform integration.