Patent ID: 11894272
Assignee: FILNEX INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A method for manufacturing a semiconductor substrate comprising the steps of:
preparing a base substrate;
forming a first removal layer composed of AlxGa1-xAs (0.6<x≤0.8) on the base substrate;
forming a second removal layer, above the first removal layer, that is composed of AlyGa1-yAs (0.7<y≤1, y>x) and has a larger etching rate for a predetermined etching material than the etching rate of the first removal layer for the predetermined etching material;
forming a semiconductor epitaxial layer composed of AltGa1-tAs (0≤t≤1) above the second removal layer;
removing the second removal layer by performing etching using the predetermined etching material; and
bonding the semiconductor epitaxial layer to a destination substrate different from the base substrate after removing the second removal layer.