Patent ID: 11882038
Assignee: SERIALTEK, LLC
Field: Digital communication (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 13:
14. The data bus analysis system of claim 10, comprising further program instructions, based on being executed by the processing system, direct the processing system to at least:
determine at least transaction types for the transactions based at least in part on the header information determined for the first packets and further information detected for the second packets;
trigger one or more analysis or logging operations for the transactions based on the transaction types, wherein the transaction types each comprise one among a memory transaction, an input/output transaction, a configuration transaction, and an interrupt transaction; and
based on the transaction types indicating configuration transactions, establish at least a partially replicated configuration space indicating capabilities of the one or more endpoint device based on one or more configuration transactions detected using the correlations among the first packets and the second packets, wherein the transaction metadata comprises traffic history organized by transaction identifiers that establish the at least partially replicated configuration space.