Patent ID: 11882698
Assignee: KIOXIA CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A semiconductor memory device comprising:
a first insulating layer;
a plurality of bit lines extending in a first direction and arranged in a second direction intersecting the first direction, the plurality of bit lines including a first bit line;
a first contact plug coupled to a first surface of the first bit line in a third direction intersecting the first direction and the second direction; and
a second contact plug provided above the first surface of the first bit line in the third direction,
wherein the first bit line includes a first portion overlapping the first contact plug in the third direction, a second portion overlapping the second contact plug in the third direction, and a third portion not overlapping either the first contact plug or the second contact plug in the third direction,
a first thickness in the third direction of the first portion is smaller than a second thickness in the third direction of the third portion in the first bit line,
a third thickness in the third direction of the second portion is smaller than the second thickness in the first bit line,
a second bit line provided in the first insulating layer, extending in the first direction, and provided adjacent to the first bit line in the second direction,
wherein a thickness in the third direction of a portion of the second bit line that overlaps the first contact plug in the third direction is smaller than a thickness in the third direction of a portion of the second bit line that does not overlap the first contact plug in the third direction,
a third bit line provided in the first insulating layer, extending in the first direction, and provided on a side opposite to the second bit line with respect to the first bit line in the second direction, and
wherein a thickness in the third direction of a portion of the third bit line that overlaps the first contact plug in the third direction is smaller than a thickness in the third direction of a portion of the third bit line that does not overlap the first contact plug in the third direction.