Patent ID: 11906997
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Control (Instruments)
Classification: CPC G  H | IPC G  H

Claim 13:
14. A method comprising:
receiving a voltage reference input at a Low-Dropout voltage regulator (LDO);
receiving an Input/Output (IO) power at the LDO;
receiving a high-edge ground (HGND) from a power source; and
providing an output voltage from the LDO to a core design, wherein the output voltage is a difference between the IO power and the HGND, wherein providing the output voltage comprises:
in a first configuration, producing a source current to the core design; or
in a second configuration, receiving a sinking current from the core design,

tracking a second difference between the IO power and a core power to supply the voltage reference input to the LDO, wherein tracking the second difference comprises:
transforming core power information into a current through a core diode-connected Metal-Oxide Semiconductor Field Effect Transistor (MOSFET) and a resistor in series; and
generating the voltage reference input for the LIDO through a second diode-connected MOSFET and a second resistor between the IO power and the reference voltage input to the LDO.