Patent ID: 11862513
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A manufacturing method of a semiconductor structure, comprising:
providing a substrate;
forming a barrier layer on the substrate;
forming a sacrificial layer on the barrier layer;
forming an opening pattern over the sacrificial layer through a photolithography process;
etching the sacrificial layer according to the opening pattern by taking the barrier layer as an etch stop layer to form first trenches;
filling a medium layer material in the first trenches;
etching the sacrificial layer by taking the barrier layer as the etch stop layer to form second trenches;
filling a hard mask layer material in the second trenches; and
etching the medium layer material by taking the barrier layer as the etch stop layer to form a hard mask layer.