Patent ID: 11862714
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A semiconductor device, comprising:
an isolation insulating layer disposed over a substrate;
a first fin structure and a second fin structure, each having a bottom part and an upper part disposed over the substrate, the upper part protruding the isolation insulating layer and including a bottom portion and an upper portion disposed on the bottom portion;
a gate structure disposed over and covering the upper part of each of the first and second fin structures;
a source/drain structure including a source/drain epitaxial layer, wherein:
the bottom portion and the upper portion are continuous and made of a same material,
a largest width of the upper part of each of the first and second fin structures is located at a level above an interface between the upper part and the bottom part,
a portion having a minimum width of each of the first and second fin structures, which is located below a portion having the largest width, is covered by a gate dielectric layer, and
the gate dielectric layer is in contact with the isolation insulating layer.