Patent ID: 11962399
Assignee: QUALCOMM INCORPORATED
Field: Digital communication (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 22:
23. An apparatus for wireless communication, comprising:
one or more processors; and
one or more memories coupled with the one or more processors and that store processor-executable code that, when executed by the one or more processors, is configured to cause the apparatus to:
transmit, to a user equipment (UE), via a first bandwidth part (BWP), a downlink control information (DCI) transmission that activates a second BWP, the DCI transmission comprising a resource allocation bit field, wherein a size of the resource allocation bit field is based at least in part on a configuration of the first BWP;
select a value for the timing parameter associated with the second BWP and the size of the resource allocation bit field, wherein the value for the timing parameter is selected from a plurality of sets of timing parameters that define one or more potential values for the timing parameter, wherein the plurality of sets of timing parameters comprises a first set of timing parameters associated with the first BWP and a second set of timing parameters associated with the second BWP, and wherein the value for the timing parameter is associated with the second set of timing parameters; and
communicate with the UE via the second BWP in accordance with the value for the timing parameter.