Patent ID: 11907049
Assignee: CANON KABUSHIKI KAISHA
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. An information processing apparatus comprising:
a non-volatile memory that has a first portion including a code area configured to hold a program and a data area configured to hold data, wherein the code area includes a holding area; and
at least one processor that executes a program to:
acquire update data for the first portion, and
update the first portion by the acquired update data,

wherein the at least one processor executes a program in the non-volatile memory to delete a program held in an area different from a holding area of the code area and write update data before updating contents of the data area, and thereafter delete data held in the data area, and write update data, and thereafter delete a program held in the holding area of the code area and write update data.