Patent ID: 11863188
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. The flip-flop circuit of claim 6, wherein the selection circuit comprises:
a fifth P-type transistor having a gate terminal configured to receive the data signal, a source terminal connected to the fourth node, and a drain terminal connected to a sixth node;
a sixth P-type transistor having a gate terminal configured to receive the scan enable signal, a source terminal connected to the sixth node, and a drain terminal connected to the first node;
a fifth N-type transistor having a gate terminal configured to receive the inverted scan enable signal, a source terminal connected to a seventh node, and a drain terminal connected to the first node; and
a sixth N-type transistor having a gate terminal configured to receive the data signal, a source terminal connected to the fifth node, and a drain terminal connected to the seventh node,
wherein the sixth node and the seventh node are connected with each other via a conductive line.