Patent ID: 11950112
Assignee: ACER INCORPORATED
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 23:
24. The BFD method as claimed in claim 23, further comprising:
when the first indication is generated, the processor updates the first timer through a third calculation and when the second indication is generated, the processor updates the first timer through a fourth calculation, wherein the third calculation is associated with a module calculation and the fourth calculation is associated with a floor calculation, and
wherein the processor performs a first calculation for a first value of the first counter to generate a first calculation result, wherein when the first calculation result is above or equal to a first threshold, the processor determines that a beam failure occurs associated with the first BFD-RS set, and the processor performs a second calculation for a second value of the first counter to generate a second calculation result, wherein when the second calculation result is above or equal to a second threshold, the processor determines that a beam failure occurs is associated with a second BFD-RS set, wherein the first calculation is the floor calculation and the second calculation is the module calculation.