Patent ID: 11923318
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC B  H | IPC B  H

Claim 0:
1. A method of manufacturing a semiconductor package, comprising:
forming a backside redistribution structure on a carrier, comprising:
forming a first dielectric layer on the carrier; and
forming a redistribution circuit layer having a circuit pattern and a dummy pattern electrically insulated from the circuit pattern;

forming an encapsulated semiconductor device on the backside redistribution structure, wherein the encapsulated semiconductor device comprises an encapsulating material and a semiconductor device encapsulated by the encapsulating material, and the semiconductor device is overlapped with the dummy pattern from a top view of the semiconductor package;
forming a front side redistribution structure on the encapsulated semiconductor device, wherein the front side redistribution structure is electrically connected to the semiconductor device;
removing the carrier from the first dielectric layer;
performing a patterning process on the first dielectric layer to form a first patterned dielectric layer comprising a marking pattern opening to expose a part of the dummy pattern.