Patent ID: 11868283
Assignee: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 0:
1. A computer system for analyzing a graph, comprising:
a plurality of computer processor nodes interconnected together and residing on a microchip, such that each of the computer processor nodes includes a core processor, a cache memory, a secondary memory, and an atomic compute unit; and
one or more off-chip memory modules accessible to the plurality of computer processor nodes;
wherein data related to high-degree vertices of a graph are stored in the secondary memory of the plurality of computer processor nodes and data related to low-degree vertices of the graph are stored in the one or more off-chip memory modules, where the high-degree vertices are a subset of vertices in the graph and the low-degree vertices are the remainder of vertices in the graph, such that the high-degree vertices individually have more edges than the low-degree vertices;
atomic operations updating data stored at the high-degree vertices are performed by an atomic compute unit associated with the respective computer processor node where the data related to the high-degree vertices is stored, and atomic operations updating data stored at the low-degree vertices are performed by an atomic compute unit associated with the respective off-chip memory module where the data related to the low-degree vertices is stored.