Patent ID: 11887971
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A semiconductor package comprising:
a lower semiconductor package;
an upper semiconductor package on the lower semiconductor package; and
an inter-package connection member between the lower semiconductor package and the upper semiconductor package,
wherein the lower semiconductor package includes a first connection structure including a lower insulating layer, a first semiconductor chip including a body on the first connection structure, a first sealing layer covering the first connection structure and the first semiconductor chip, a second connection structure on the first sealing layer, and a third connection structure,
the second connection structure includes an upper insulating layer on an upper surface of the first sealing layer, an upper conductive pattern layer on an upper surface of the upper insulating layer, and an upper via penetrating an upper part of the upper insulating layer;
the third connection structure penetrates a lower part of the upper insulating layer and the first sealing layer, and connects between the upper conductive pattern layer and the first connection structure,
a height from the upper surface of the first connection structure to the upper surface of the first sealing layer is less than a height from the upper surface of the first connection structure to an upper surface of the second connection structure,
a lower surface of the third connection structure and an upper surface of the lower insulating layer are located on the same vertical level,
the lower surface of the third connection structure is located at a lower vertical level than a lower surface of the body of the semiconductor chip, and
an upper surface of the third connection structure is located at a higher vertical level than an upper surface of the body of the semiconductor chip.