Patent ID: 11943457
Assignee: SONY GROUP CORPORATION
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G  H | IPC H

Claim 7:
8. An information processing apparatus comprising
an inverse hierarchization unit configured to perform inverse hierarchization of attribute information about a point cloud representing a three-dimensional object, the attribute information having been hierarchized by recursively repeating, on a reference point, a process of classifying points of the point cloud into a prediction point that is a point at which a difference value between the attribute information and a predicted value is left, and the reference point that is a point at which the attribute information is referred to during derivation of the predicted value,
wherein, during the inverse hierarchization, the inverse hierarchization unit is further configured to derive the predicted value of the attribute information about the prediction point at each hierarchical level using the attribute information about the reference point and positional information at a resolution of a hierarchical level that is not a lowest hierarchical level of the point cloud, and derive the attribute information about the prediction point using the predicted value and the difference value, and
an inverse quantization unit configured to inversely quantize the difference value of each point of each hierarchical level of a plurality of hierarchical levels, using a quantization weight for each hierarchical level, the difference value having been quantized,
wherein the inverse quantization unit is further configured to inversely quantize the quantized difference value, using the quantization weight for each hierarchical level, the quantization weight for a respective hierarchical level of the plurality of hierarchical levels being set to a value greater than the quantization weight for hierarchical levels of the plurality of hierarchical levels lower than the respective hierarchical level, and
wherein the inverse hierarchization unit and the inverse quantization unit are each implemented via at least one processor.