Patent ID: 11955197
Assignee: ROBERT BOSCH GMBH
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The memory device as recited in claim 5, wherein for numbers u and/or v in the range from 1 to S−1, the controller is configured to:
perform a left shift, the controller being configured to prompt an application of the word line voltage on one of the word lines, to transfer the bit shift circuit into the 0th circuit state, subsequently to transfer the bit shift circuit into the uth circuit state, and terminate the application of the word line voltage; and/or
perform a right shift, the controller being configured to prompt an application of the word line voltage on one of the word lines, to transfer the bit shift circuit into the with circuit state, subsequently to transfer the bit shift circuit into the 0th circuit state, and terminate the application of the word line voltage.