Patent ID: 11899609
Assignee: NVIDIA CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 17:
18. The method of claim 17, further comprising:
comparing the shifted first set of bits with a stored pattern;
determining the shifted first set of bits does not correspond to the stored pattern based on comparing the shifted first set of bits with the stored pattern;
shifting the shifted first set of bits by an additional one or more UIs to receive a second shifted first set of bits responsive to determining the shifted first set of bits does not correspond to the stored pattern;
comparing the second shifted first set of bits with the stored pattern; and
determining the second shifted first set of bits is associated with the stored pattern, wherein the indication the one or more data lanes are synchronized with respect to the frame boundary is transmitted responsive to determining the second shifted first set of bits is associated with the stored pattern.