Patent ID: 11948803
Assignee: MODULIGHT OY
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method for passivating sidewalls of a patterned semiconductor wafer comprising at least one ridge, the method comprising:
depositing a first layer of a first dielectric material on a pattern surface of the patterned semiconductor wafer;
etching a portion of the first layer to remove the first layer from a top surface of the at least one ridge and obtain tapered portions of the first dielectric material along at least one sidewall of the at least one ridge;
depositing a second layer of a second dielectric material on the tapered portions and the patterned semiconductor wafer, wherein the top surface of the at least one ridge is covered only by the second layer;
depositing a photo-sensitive material on the second layer;
aligning a mask with the photo-sensitive material, wherein at least one portion of the photo-sensitive material corresponding to a top surface of the at least one ridge is unmasked, and a remaining portion of the photo-sensitive material is masked;
applying a developing solution on the photo-sensitive material and exposing the photo-sensitive material to a light source, to remove the at least one portion of the photo-sensitive material and leave only the second layer covering the top surface of the at least one ridge;
etching at least one portion of the second layer that is covering the top surface of the at least one ridge to expose at least one portion of the top surface of the at least one ridge; and
removing the photo-sensitive material, wherein the passivated sidewalls comprise the first layer covered by the second layer, wherein a thickness of the first layer is in a range of 400 to 2000 nanometers and a thickness of the second layer is in a range of 200-1000 nanometers.