Patent ID: 11868699
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. An integrated circuit comprising:
a first active region extending in a first direction, being in a substrate, and being located on a first level, the first active region including a first drain/source region and a second drain/source region;
a second active region extending in the first direction, being in the substrate, being located on the first level and being separated from the first active region in a second direction different from the first direction, the second active region including a third drain/source region;
a first insulating region over the first drain/source region;
a first contact extending in the second direction, overlapping the third drain/source region, being electrically coupled to the third drain/source region and being located on a second level different from the first level; and
a second contact extending in at least the second direction, overlapping the first insulating region and the first contact, the second contact being electrically insulated from the first drain/source region, and being electrically coupled to the third drain/source region, and being located on a third level different from the first level and the second level.