Patent ID: 11928316
Assignee: ZTE CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A terminal device, comprising a processor, a memory, and a communication bus; wherein
the communication bus is configured to implement connection communication between the processor and the memory; and
the processor is configured to execute one or more programs stored in the memory to perform steps of a stroke erasing method implemented in an electronic whiteboard, wherein the method comprises:
determining an intersecting stroke on the electronic whiteboard that intersects with an erasing region;
traversing each of collection points of the intersecting stroke to determine whether a line of connection between each two adjacent ones of the collection points intersects with the erasing region;
determining, in response to the line of connection intersecting with the erasing region, an approximate intersection point between the line of connection and the erasing region by means of midpoint recursion; and
splitting the intersecting stroke into segments according to the approximate intersection point, and drawing the segments not erased by the erasing region on the electronic whiteboard;
wherein the determining an approximate intersection point between the line of connection and the erasing region by means of midpoint recursion comprises:
in response to, of two points corresponding to the line of connection or a line segment of the line of connection, one point being within the erasing region, and the other point being outside the erasing region,
taking a midpoint of the line of connection or the line segment of the line of connection as the approximate intersection point in response to determining a length of the line of connection or the line segment of the line of connection to be less than or equal to m, m being less than the width of the erasing region.