Patent ID: 11909421
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G  Y | IPC G  H

Claim 18:
19. The MAC operator of claim 6, wherein each of the plurality of multipliers includes:
a mantissa multiplier configured to multiply an 11-bit first mantissa and an 11-bit second mantissa of each of the first and second output data of the floating-point format output from two of the plurality of data type converters;
a bit truncator configured to remove bits with an implicit bit for the 22-bit first intermediate mantissa multiplication data outputted from the mantissa multiplier to output 16-bit second intermediate mantissa multiplication date; and
a normalizer configured to perform a normalizing process for the 16-bit second intermediate mantissa multiplication date output from the bit truncator.