Patent ID: 11868694
Assignee: SYNOPSYS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. The non-transitory, tangible computer-readable media of claim 16, wherein the operations further comprise:
generating a divided clock of the clock for a second set of sequential elements of the plurality of sequential elements, wherein the frequency of the clock is divided by a factor of N, and wherein N is at least 2;
analyzing each of the second set of sequential elements of the plurality of sequential elements to determine an edge of a clock signal pattern of the divided clock associated with each of the second set of sequential elements causing an output change at corresponding one or more sequential elements of the second set of sequential elements; and
emulating the one or more discarded cycles of the clock signal pattern of the clock upon determining that the one or more discarded cycles include the edge of the clock signal pattern of the divided clock that causes at least one sequential element of the second set of sequential elements to change the output.