Patent ID: 11960857
Assignee: ACHRONIX SEMICONDUCTOR CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 17:
18. The computer-readable medium of claim 16, wherein:
the first ALU slice is configured to provide, as the output, the sum bits and the carry-out bit, in a first mode of operations; and
in a second mode of operation, the first ALU slice is configured to:
provide, as output, a first output bit based on the input portion of the first operand, the input portion of the second operand, and an assumed value of zero for the first carry-in bit, the first output bit being provided before the first carry-in bit is received as input;
provide, as output, a second output bit based on the input portion of the first operand, the input portion of the second operand, and an assumed value of one for the first carry-in bit, the second output bit being provided before the first carry-in bit is received as input.