Patent ID: 11942513
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 13:
14. A semiconductor structure, comprising:
a first semiconductor layer, disposed over a portion of a substrate;
a second semiconductor layer, stacked over the first semiconductor layer, and including a lower surface; and
a gate, disposed between the first semiconductor layer and the second semiconductor layer;
a spacer, disposed on a lateral side of the gate, and contacting the first semiconductor layer, wherein an interface between the spacer and the first semiconductor layer has a step configuration; and
a source/drain (S/D) region, disposed laterally adjacent to the gate, the first semiconductor layer, and the second semiconductor layer, wherein the S/D region is in direct contact with a portion of a bottom surface of the second semiconductor layer.