Patent ID: 11903195
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A semiconductor structure, comprising:
a stack structure comprising a plurality of conductor layers and a plurality of insulating layers stacking alternately along a direction perpendicular to a top surface of the stack structure; and
an array of semiconductor channels within a first region of the stack structure, wherein each semiconductor channel of the array of semiconductor channels penetrates through the stack structure, wherein:
the array of semiconductor channels comprises:
semiconductor channels in a first row and adjacent to a second region of the stack structure, wherein the second region is adjacent to the first region; and
semiconductor channels in one or more rows farther away from the second region than the semiconductor channels in the first row;

a distance L1 between a first semiconductor channel in the first row and a second semiconductor channel in a second row adjacent to the first row is greater than a distance L2 between the second semiconductor channel in the second row and a third semiconductor channel in a third row adjacent to the second row, wherein the second semiconductor channel is adjacent to the first semiconductor channel and the third semiconductor channel; and
the distance L2 is greater than a distance L3 between the third semiconductor channel and a fourth semiconductor channel in a fourth row adjacent to the third row, wherein the fourth semiconductor channel is adjacent to the third semiconductor channel.