Patent ID: 11908919
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A method of manufacturing a semiconductor device, comprising:
forming a stack of a first type and a second type epitaxial layers on a semiconductor substrate, the first type and second type epitaxial layers having different material compositions and the first type and second type epitaxial layers being alternatingly disposed in a vertical direction;
patterning the stack to form a fin structure;
forming a sacrificial gate structure over the fin structure;
removing at least the first type epitaxial layers from a source/drain (S/D) region of the fin structure, which is not covered by the sacrificial gate structure;
forming a first insulating layer on lateral ends of the first type epitaxial layers, wherein the first insulating layer includes carbon-containing compound;
forming a second insulating layer on the first insulating layer, wherein the second insulating layer includes oxide-containing compound;
after the second insulating layer is formed, forming an S/D epitaxial feature in contact with lateral ends of the second type epitaxial layers;
forming an S/D contact over the S/D epitaxial feature; and
forming a multilayer interconnection over the S/D contact, wherein the first and second insulating layers interpose the S/D epitaxial feature and the first type epitaxial layers, and
wherein the second insulating layer separates the first insulating layer from physically contacting the S/D epitaxial layer.