Patent ID: 11914706
Assignee: REALTEK SEMICONDUCTOR CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A circuit design method, configured to generate a circuit, the method comprising:
arranging a plurality of attack detection circuits around a specific circuit unit, wherein the specific circuit unit is in the circuit;
determining a number of a plurality of spare cells required by the circuit according to a number of the plurality of attack detection circuits; and
placing the plurality of spare cells in the circuit according to a number of the plurality of spare cells,
wherein the step of determining the number of the plurality of spare cells required by the circuit according to the number of the plurality of attack detection circuits comprises:
determining the number of the plurality of spare cells required by the circuit according to an area of the circuit and the number of the plurality of attack detection circuits, comprising:
determining a first number according to the area of the circuit;
obtaining a difference value by subtracting the number of the plurality of attack detection circuits from the first number; and
determining the number of the plurality of spare cells required by the circuit according to the difference value.