Patent ID: 11934706
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A storage device, comprising:
a non-volatile memory comprising a block including a plurality of pages and a plurality of flash management units (FMUs), wherein each of the pages includes one or more of the FMUs;
a volatile memory; and
a controller configured to store, in one of the FMUs, a starting logical address and a logical address range encompassing multiple ones of the FMUs of the block, and to accumulate logical addresses indicated by the starting logical address and the logical address range in the volatile memory in response to host write commands prior to storing the starting logical address and the logical address range in the one of the FMUs,
wherein the controller is further configured, in response to a data relocation command, to read the starting logical address and the logical address range from the one of the FMUs, to determine whether at least one logical address of the logical addresses indicated by the starting logical address and the logical address range is mapped to a current FMU in a logical-to-physical (L2P) mapping table, and to relocate data stored at the at least one logical address in response to the determination.