Patent ID: 11887923
Assignee: NEXTVPU (SHANGHAI) CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. The wiring structure of claim 14,
wherein no additional pad is provided between the array of the bump pads and intersecting first and second edges of the orthographic projection region;
wherein the second subset of the bump pads comprises:
a part of bump pads in at least one row of bump pads in the array, the at least one row of bump pads as a whole being farther away from the first edge than other rows in the array, and
a part of bump pads in at least one column of bump pads in the array, the at least one column of bump pads as a whole being closer to the second edge than other columns in the array; and
wherein the first subset of the bump pads comprises bump pads, other than those in the second subset, in the array of the bump pads.