Patent ID: 11949416
Assignee: SHENZHEN MICROBT ELECTRONICS TECHNOLOGY CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A composite logic gate circuit, comprising:
a simple logic gate circuit, a first PMOS transistor, and a first NMOS transistor;
wherein the simple logic gate circuit comprises a first logic gate circuit and an inverter circuit,
wherein the first logic gate circuit is configured to receive a first input signal and a second input signal, and to output a first output signal,
wherein the inverter circuit comprises a second PMOS transistor and a second NMOS transistor, a source of the second PMOS transistor is coupled to a power input terminal, a drain of the second PMOS transistor is coupled to a drain of the second NMOS transistor, a gate of the second PMOS transistor is configured to receive the first output signal, a source of the second NMOS transistor is coupled to a ground terminal, the drain of the second NMOS transistor is coupled to the drain of the second PMOS transistor, and a gate of the second NMOS transistor is configured to receive the first output signal,
wherein a source of the first PMOS transistor is coupled to the drains of the second PMOS transistor and the second NMOS transistor, a drain of the first PMOS transistor is coupled to a drain of the first NMOS transistor, and a gate of the first PMOS transistor is configured to receive a third input signal,
wherein a source of the first NMOS transistor is configured to receive the first output signal, the drain of the first NMOS transistor is coupled to the drain of the first PMOS transistor, and a gate of the first NMOS transistor is configured to receive the third input signal, and
wherein the simple logic gate circuit is an AND gate circuit or an OR gate circuit, and the first logic gate circuit is a NAND gate circuit or a NOR gate circuit correspondingly.