Patent ID: 11955442
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A structure comprising:
a first redistribution structure, the first redistribution structure comprising:
a plurality of redistribution layers, each of the plurality of redistribution layers comprising a metallization pattern and a dielectric layer, a first redistribution layer of the plurality of redistribution layers comprising a first dielectric layer and a first interconnecting die, the first interconnecting die comprising a substrate, an interconnect structure on the substrate, and die connectors on the interconnect structure, the die connectors being bonded to a metallization pattern of the first redistribution layer, the metallization pattern of the first redistribution layer comprising first conductive lines and first conductive vias, the first dielectric layer encapsulating the first interconnecting die; and
a first component within one of the plurality of redistribution layers, the first component being an integrated voltage regulator, an integrated passive device, or a static random-access-memory;
a core substrate coupled to a first side of the first redistribution structure using a first set of conductive connectors; and
an integrated circuit die coupled to a second side of the first redistribution structure using a second set of conductive connectors.