Patent ID: 11954023
Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A computing system configured to separate computational work that performs one or more specified memory accesses (“SMA work”) from computational work that does not perform any of the specified memory accesses (“NSMA work”), the computing system comprising:
a digital memory; and
a processor in operable communication with the digital memory;
the computing system configured by a run routine including processor instructions which upon execution by the processor perform NSMA work, the run routine also including an invocation of the SMA work;
the computing system also configured by a state machine which includes a state variable and at least three state structures, each state structure representing a respective state of the state machine and including a respective state code, each state code including a portion of the run routine, wherein at least three state structures respectively represent states designated here as state A, state B, and state C, and wherein state C has shared work code in that state A code is configured to change the state machine to state C and state B code is also configured to change the state machine to state C;
wherein the run routine is configured to cause execution of a selected state code based on the state variable, configured to cease execution when the state variable indicates a termination state of the state machine, and configured to switch execution to a different state code when the state variable indicates a change of state of the state machine.