Patent ID: 11936299
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A buck converter comprising:
a first transistor configured to receive a supply voltage; and
a second transistor connected to the first transistor, wherein the second transistor is configured to receive a reference voltage, and the second transistor comprises:
a gate structure over a substrate, wherein the substrate includes a channel region;
a source/drain (S/D) in the substrate adjacent to the gate structure;
a lightly doped drain (LDD) region adjacent to the S/D, wherein a dopant concentration in the LDD region is less than a dopant concentration in the S/D; and
a doping extension region adjacent the LDD region, wherein the doping extension region extends farther under the gate structure than the LDD region, and a maximum depth of the doping extension region is 10-times to 30-times greater than a maximum depth of the LDD.