Patent ID: 11887940
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 2:
3. An integrated circuit (IC) structure, comprising:
a package substrate having a first contact and a second contact on a surface and a conductive pathway electrically coupled to the second contact;
a die electrically coupled to the surface of the package substrate;
a conductive element having opposing first and second faces, wherein the first face of the conductive element has a recessed cavity, wherein the first face of the conductive element is electrically coupled to the package substrate via the first contact; and
a component embedded in the recessed cavity of the conductive element and having a first terminal end electrically coupled to the die via the second contact and the conductive pathway in the package substrate, wherein the component is positioned vertically within the cavity of the conductive element with the first terminal end facing towards the surface of the package substrate.