Patent ID: 11888332
Assignee: NAVITAS SEMICONDUCTOR LIMITED
Field: Semiconductors (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 0:
1. An electronic device, comprising:
a monolithic semiconductor substrate including at least one layer of gallium-nitride disposed on a layer of silicon;
a plurality of flip-chip bumps;
an under-voltage lock-out circuit formed on the monolithic semiconductor substrate;
a low-side circuit formed on the monolithic semiconductor substrate, the low-side circuit comprising:
a low-side transistor including a low-side transistor control gate, a low-side source, and a low-side drain; and
a low-side transistor driver, arranged to control a conductivity state of the low-side transistor according to a first input signal; and

a high-side circuit formed on the monolithic semiconductor substrate, the high-side circuit comprising:
a high-side transistor including a high-side transistor control gate, a high-side source, and a high-side drain; and
a high-side transistor driver arranged to control a conductivity state of the high-side transistor according to a second input signal;

wherein the low-side drain is electrically connected to the high-side source to form a half-bridge circuit.