Patent ID: 11938405
Assignee: ACER INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC A  G | IPC A  G

Claim 16:
17. The electronic device according to claim 13, wherein the action events comprise an i-th action event and an (i+1)-th action event, the absolute coordinates comprise an i-th absolute coordinate and an (i+1)-th absolute coordinate, 1≤i≤N−1, where N is a number of the action events, and the processor performs:
subtracting the time stamp of the i-th action event from the time stamp of the (i+1)-th action event to generate an i-th time difference value among a plurality of time difference values;
subtracting the i-th absolute coordinate from the (i+1)-th absolute coordinate to generate an i-th coordinate difference value among a plurality of coordinate difference values; and
dividing the i-th coordinate difference value by the i-th time difference value to generate an (i+1)-th speed vector among the speed vectors.