Patent ID: 11934887
Assignee: ZHEJIANG LAB
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 7:
8. The method according to claim 7, wherein for each of the plurality of the logic calculation sub-graphs, generating the distributing message comprises:
by the session control executor, for each of the plurality of the logic calculation sub-graphs, creating a sub graph executor for the logic calculation sub-graph;
determining corresponding relationships between sub graph executors, the logic calculation sub-graphs, and the slave nodes; and
for each of the sub graph executors, creating a device executor deployed on a slave node corresponding to the sub graph executor, generating a distributing message according to the device executor and the logic calculation sub-graph for the sub graph executor, and transmitting the distributing message to the slave node corresponding to the sub graph executor.