Patent ID: 11886738
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory system comprising:
a non-volatile memory arranged to store an N-dimensional error-correction code in which at least one of symbols constituting a code is protected by N component code groups (N is an integer of 2 or more);
a read information memory arranged to store read information to be read from the non-volatile memory;
a syndrome value memory arranged to store a syndrome value corresponding to each of M component codes (1≤i≤N, where ni is the number of component codes included in an i-dimensional component code group, where M is a sum of ni) calculated from the read information stored in the read information memory;
a correction information memory arranged to store, for the a-th component code (1≤a≤ni) of the i-dimensional component code group, a-th correction information indicating a location corrected by decoding processing of an a-th component code;
a reliability information memory arranged to store a-th reliability information indicating reliability of a decoded word obtained in the decoding processing of the a-th component code; and
a memory controller configured to:
determine the number of pieces of correction information, the number of pieces of correction information being the number of pieces of the a-th correction information for each of the M component codes according to a value based on the number of component codes included in the first to N-th dimensional component code groups;
determine a correction information address, the correction information address being an address on the correction information memory of the a-th correction information for each of the M component codes based on the number of pieces of the correction information;
calculate an a-th soft-input value, the a-th soft-input value being a soft-input value for the a-th component code based on the a-th correction information, the a-th reliability information, and a syndrome value of the a-th component code;
calculate a decoded word of the a-th component code, the a-th correction information, and the a-th reliability information by inputting the a-th soft-input value and executing the decoding processing of the a-th component code;

store the calculated a-th correction information and b-th correction information indicating a corrected location of a b-th component code (1≤b≤nj) in a j-th dimension (j≠i, 1≤j≤N) corrected by the decoding processing of the i-th component code in the correction information address of the correction information memory;
store the calculated a-th reliability information in the reliability information memory; and
output an output decoded word calculated from the read information, the correction information, and M pieces of the a-th reliability information.