Patent ID: 11900986
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 2:
3. The semiconductor memory device according to claim 2, wherein
the semiconductor memory device is configured to be able to execute a first read operation,
when one of the plurality of second wirings is assumed to be a fifth wiring,
in the first read operation,
a first voltage is applied to a second gate electrode opposed to the second semiconductor layer connected to the fifth wiring among the plurality of second gate electrodes, and a second voltage different from the first voltage is applied to at least one of other second gate electrodes, and
the second voltage is applied to a third gate electrode opposed to the third semiconductor layer connected to the fifth wiring among the plurality of third gate electrodes, and the first voltage is applied to at least one of other third gate electrodes.