Patent ID: 11900993
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H  Y | IPC G  H

Claim 1:
2. The semiconductor circuit according to claim 1, further comprising:
a second storage element including a fourth terminal, a fifth terminal, and a sixth terminal, the second storage element being configured to set a resistance state between the fourth terminal, the fifth terminal, and the sixth terminal to the first resistance state or the second resistance state in accordance with a direction of a current flowing between the fifth terminal and the sixth terminal;
a fourth transistor including a drain coupled to the second node, a source coupled to the fourth terminal of the second storage element, and a gate, the fourth transistor being configured to couple the second node to the fourth terminal of the second storage element by being turned on;
a fifth transistor including a gate coupled to a node of the first node and the second node that is different from the node to which the gate of the second transistor is coupled, a drain coupled to the fifth terminal of the second storage element, and a source, the fifth transistor being configured to apply the first voltage to the fifth terminal of the second storage element by being turned on; and
a sixth transistor including a gate coupled to a node of the first node and the second node that is different from the node to which the gate of the third transistor is coupled, a drain coupled to the fifth terminal of the second storage element, and a source, the sixth transistor being configured to apply the second voltage to the fifth terminal of the second storage element by being turned on.