Patent ID: 11908852
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A method of fabricating an integrated circuit, the method comprising:
fabricating gate-strips extending in a second direction perpendicular to a first direction, wherein a gate-strip overlaps an active zone extending in the first direction at a first intersection and forms a gate terminal of a first transistor;
fabricating conductive segments extending in the second direction, wherein a conductive segment overlaps the active zone at a second intersection and forms a channel connecting terminal of the first transistor, the channel connecting terminal including either a source terminal or a drain terminal;
fabricating a horizontal routing track conductively connected to a first one of the gate terminals or the channel connecting terminal of the first transistor, wherein the horizontal routing track extends in the first direction in a first metal layer; and
fabricating a backside routing track conductively connected to a second one of the gate terminals or the channel connecting terminal of the first transistor, wherein the backside routing track extends in the first direction in a backside metal layer, and wherein the backside metal layer and the first metal layer are formed at opposite sides of a semiconductor substrate.