Patent ID: 11876053
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A multi-chip package comprising:
a substrate having a first side, an opposing second side, and a third side that extends from the first side to the second side, the third side constituting a portion of an outside perimeter of the substrate;
a first die attached to the first side of the substrate;
a second die attached to the first side of the substrate; and
a bridge within an opening of the substrate, the bridge attached to the first die and to the second die, wherein the bridge creates a connection between the first die and the second die, wherein the bridge has a first side, a second side, a third side and a fourth side from a plan view perspective, the plan view perspective parallel with the first side of the substrate, wherein the first die overlaps the first side and second side of the bridge but not the third side and fourth side of the bridge from the plan view perspective, and wherein the second die overlaps the second side and third side of the bridge but not the first side and fourth side of the bridge from the plan view perspective.