Patent ID: 11954206
Assignee: INFINEON TECHNOLOGIES AG
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A device comprising:
a secured nonvolatile memory comprising one or more secured storage regions; and
a controller comprising one or more processing elements configured to:
implement a validation operation on a first portion of code stored in a first secured storage region of the secured nonvolatile memory, the validation operation comprising computing a validation value;
retrieve a second portion of code from a second secured storage region, the second portion of code comprising a pre-computed validation value, the first and second portion of code being associated with booting a processor;
implement a comparison operation based on a comparison of the validation value and the pre-computed validation value; and
generate a signal based on a result of the comparison operation, the signal being provided to the processor via an interface of the secured nonvolatile memory, and the signal enabling booting of the processor in response to a matching comparison operation performed on the computed validation value and the pre-computed validation value.