Patent ID: 11915363
Assignee: IMAGINATION TECHNOLOGIES LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A tiled-based rendering graphics processing system having a rendering space sub-divided into a plurality of tiles to which primitives can be associated, the tiled-based rendering graphics processing system comprising:
a tag buffer to implement a tag buffer stage of a rasterization phase, the tag buffer comprising:
a buffer configured to store, for each sample position of a tile of the plurality of tiles, an identifier that identifies a visible primitive fragment at that sample position; and
a look-up table configured to store an entry for each of one or more transformed primitive blocks that indicates whether the tag buffer has received information identifying a primitive fragment associated with that transformed primitive block;

wherein the tag buffer is configured to:
receive information identifying primitive fragments that have survived a depth test, each identified primitive fragment is associated with a transformed primitive block of the one or more transformed primitive blocks and a sample position of the tile;
for each identified primitive fragment, update the buffer to indicate that the identified primitive fragment is the visible primitive fragment at the associated sample position;
update the look-up table to indicate which transformed primitive blocks the identified primitive fragments are associated with;
flush contents of the buffer when one or more conditions are met; and
in response to flushing the contents of the buffer, compare the flushed contents of the buffer to the look-up table to thereby identify transformed primitive blocks that did not survive the tag buffer stage.