Patent ID: 11927981
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 12:
13. A dynamic voltage frequency scaling (DVFS) governor circuit comprising:
a processing device profiler circuit configured to:
receive parameters and a number of clock signals from an integrated circuit, and
calculate a workload, based on the number of clock signals and the parameters,

the parameters and the number of clock signals being counted based on data transmitted through a bus between a plurality of processing devices;
a main profiler circuit configured to receive the workload from the processing device profiler circuit and store the workload;
a controller circuit configured to determine an operation frequency and an operation voltage of a processing device, based on the workload; and
a processing device driver circuit configured to transmit the operation frequency and the operation voltage to a processing device, among the plurality of processing devices.