Patent ID: 11922989
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A memory system comprising:
at least one memory device; and
a memory controller configured to control the at least one memory device,
wherein the memory controller includes:
a buffer memory configured to store a first value, a second value, and a third value; and
a refresh circuit configured to count a rolling accumulated activations (RAA) value for each of a plurality of target rows and to issue a refresh management mode command based on the RAA value, the first value, the second value, and the third value,
wherein the first value, the second value, and the third value are transmitted from the at least one memory device during a booting operation, and
wherein the first value, the second value, and the third value are updated from the at least one memory device according to a register update bit value of the refresh management mode command.