Patent ID: 11875992
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device comprising:
a substrate;
a lower electrode on the substrate, the lower electrode including a first lower electrode pattern and a second lower electrode pattern that is on the first lower electrode pattern;
a first support pattern on a first portion of a sidewall of the first lower electrode pattern of the lower electrode;
a second support pattern on the first support pattern and on a second portion of the sidewall of the first lower electrode pattern of the lower electrode, wherein the first and second portions of the sidewall of the first lower electrode pattern of the lower electrode are spaced apart from each other in a first direction that is perpendicular to a top surface of the substrate;
a dielectric layer on the lower electrode; and
an upper electrode on the dielectric layer,
wherein the first lower electrode pattern of the lower electrode includes titanium nitride (TiN) or titanium silicon nitride (TiSiN),
wherein the second lower electrode pattern of the lower electrode includes niobium and oxygen,
wherein a third portion of the sidewall of the first lower electrode pattern of the lower electrode is between the first and second portions of the sidewall of the first lower electrode pattern of the lower electrode in the first direction, and
wherein the second lower electrode pattern of the lower electrode is on the third portion of the sidewall of the first lower electrode pattern of the lower electrode.