Patent ID: 11966541
Assignee: HKC CORPORATION LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 2:
3. The compensation circuit of claim 1, wherein the logic circuit comprises a further processing module, wherein the further processing module comprises a third inverter circuit, a second AND gate circuit, a third AND gate circuit, and an OR gate circuit, and wherein the third inverter circuit has an input terminal configured to receive the timing signal and an output terminal electrically coupled with a second terminal of the second AND gate circuit, the second AND gate circuit has a first terminal configured to receive the enable signal, the third AND gate circuit has a first terminal configured to receive the enable signal and a second terminal configured to receive the timing signal, and the OR gate circuit has a first terminal electrically coupled with an output terminal of the second AND gate circuit, a second terminal electrically coupled with an output terminal of the third AND gate circuit, and an output terminal configured to output the third selection signal to the selection circuit.