Patent ID: 11972809
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 14:
15. An apparatus comprising:
means for determining for a program iteration of a program operation on a word line whether a condition is met; and
in response to determining that the condition is met:
means for identifying one or more memory cells of the word line that are in an erased state that have a threshold voltage higher than an erase threshold voltage; and
means for performing the program iteration of the program operation, the program iteration including applying a first bitline inhibit voltage to one or more bitlines connected to the identified one or more memory cells and a second bitline inhibit voltage to one or more bitlines connected to one or more memory cells that are in the erased state that do not have a threshold voltage higher than the erase threshold voltage.