Patent ID: 11939216
Assignee: INFINEON TECHNOLOGIES AG
Field: Micro-structural and nano-technology (Chemistry)
Classification: CPC B  G | IPC B  G

Claim 0:
1. A method, comprising:
producing a semiconductor wafer, the semiconductor wafer comprising:
a plurality of microelectromechanical system (MEMS) semiconductor chips, wherein the plurality of MEMS semiconductor chips have MEMS structures arranged at a first main surface of the semiconductor wafer,
a first semiconductor material layer arranged at the first main surface, and
a second semiconductor material layer arranged under the first semiconductor material layer, wherein a doping of the first semiconductor material layer is greater than a doping of the second semiconductor material layer;

removing the first semiconductor material layer in a region between adjacent MEMS semiconductor chips; and
applying a stealth dicing process from the first main surface of the semiconductor wafer and between the adjacent MEMS semiconductor chips.