Patent ID: 11862701
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A semiconductor device, comprising:
a substrate;
a first transistor over the substrate, the first transistor including first channel layers and a first source/drain (S/D) feature adjoining active members of the first channel layers;
a second transistor over the first transistor, the second transistor including second channel layers and a second S/D feature adjoining active members of the second channel layers; and
an isolation layer disposed vertically between the first S/D feature and the second S/D feature,
wherein a number of the active members of the first channel layers is different from a number of the active members of the second channel layers, and wherein the isolation layer either separates a topmost one of the first channel layers from the first S/D feature or separates a bottommost one of the second channel layers from the second S/D feature.