Patent ID: 11895831
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. The manufacturing method for memory according to claim 7, wherein forming the first dielectric layer and the second dielectric layer comprises:
forming an initial first dielectric layer on the first side face and second side face of the active layer, and removing a part of the initial first dielectric layer on the second side face; and
forming an initial second dielectric layer on a surface of a remaining part of the initial first dielectric layer and the second side face;
wherein the remaining part of the initial first dielectric layer and the initial second dielectric layer covering the initial first dielectric layer are used as the first dielectric layer; and the initial second dielectric layer covering the second side face is used as the second dielectric layer.