Patent ID: 11929409
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A semiconductor device structure, comprising:
a first source/drain feature formed on a first fin structure, wherein the first source/drain feature comprises:
a first epitaxial layer having a first dopant concentration;
a second epitaxial layer having a second dopant concentration greater than the first dopant concentration;
a third epitaxial layer having a third dopant concentration greater than the second dopant concentration, wherein the third epitaxial layer is in contact with the second epitaxial layer, and the third epitaxial layer comprises a first center portion and a first edge portion that has a height higher than the first center portion;

a second source/drain feature formed on a second fin structure, wherein the second source/drain feature comprises:
a first epitaxial layer having a first dopant concentration;
a second epitaxial layer having a second dopant concentration greater than the first dopant concentration of the first epitaxial layer of the second source/drain feature; and
a third epitaxial layer in contact with the second epitaxial layer of the second source/drain feature, wherein the third epitaxial layer comprises a second center portion and a second edge portion that has a height different than the second center portion,

wherein the first and second fin structures are disposed in a first region of a substrate between a first gate structure and a second gate structure, and the first and second gate structures are separated from each other by a first lateral separation distance.