Patent ID: 11894272
Assignee: FILNEX INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor substrate comprising:
a base substrate;
a first removal layer that is provided on the base substrate and composed of AlxGa1-xAs (0.6<x≤0.8);
a second removal layer that is provided above the first removal layer and composed of AlyGa1-yAs (0.7<y≤1, y>x); and
a semiconductor epitaxial layer that is provided above the second removal layer and composed of AltGa1-tAs (0≤t≤1), wherein
an etching rate of the second removal layer for a predetermined etching material is larger than an etching rate of the first removal layer for the predetermined etching material, wherein
at least a portion of the first removal layer remains at the time when all of the second removal layer is removed by performing etching using the predetermined etching material.