Patent ID: 11893283
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. An apparatus comprising:
a first memory array implemented in a first layer of a memory device;
a second memory array implemented in the first layer of the memory device;
a first processing resource implemented in a second layer of the memory device under the first memory array and configured to perform a first process utilizing a first data value from the first memory array;
a comparator implemented in the second layer of the memory device and coupled to the first processing resource and a second processing resource and configured to provide a signal to the second processing resource based on a result of the first process; and
wherein the first processing resource comprises as a first artificial neural network; and

the second processing resource implemented in the second layer of the memory device under the second memory array and configured to perform a second process utilizing a second data value from the second memory array;
wherein the second processing resource is configured to perform the second process responsive to a receipt of the signal from the comparator; and
wherein the second processing resource comprises as a second artificial neural network; and
wherein the second process is initiated without a host device providing an additional command.