Patent ID: 11869982
Assignee: MONOLITHIC POWER SYSTEMS, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A method of forming a junction field effect transistor (JFET) comprising:
forming a mesa on a substrate, wherein the mesa includes a first layer with a first conductivity type, wherein the first layer is located over a second layer with a second conductivity type, and wherein the first and second conductivity types are opposite;
after forming the mesa, performing a tilted implantation of channel region dopants in the second layer to form a vertical channel region, wherein the vertical channel region has the first conductivity type;
after forming the mesa, performing a tilted implantation of channel control region dopants into a first side of the mesa to form a first portion of a first base region on a sidewall on the first side of the mesa and into a second side of the mesa to form a first portion of a second base region on a sidewall on the second side of the mesa, the first and second base regions having the second conductivity type,
wherein the vertical channel region is within the mesa between the first base region and the second base region, and wherein a second portion of the second base region is in the second layer between the vertical channel region and the first portion of the second base region.