Patent ID: 11916085
Assignee: HKC CORPORATION LIMITED
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. An array substrate, comprising: a base substrate and a plurality of first metal layers laminated on and directly contacting the base substrate, wherein,
the plurality of first metal layers are spaced apart from each other;
each of the plurality of first metal layers is provided with a respective first laminated portion and a respective second laminated portion;
the respective first laminated portion and the respective second laminated portion are arranged on and directly contact a side of each of the plurality of first metal layers away from the base substrate;
the respective first laminated portion comprises a first insulating layer, a second metal layer, a second insulating layer and a first conductive layer, wherein the first insulating layer, the second metal layer, the second insulating layer and the first conductive layer are successively laminated;
the respective first laminated portion is arranged with a plurality of first vias;
the respective second laminated portion comprises a third insulating layer and a second conductive layer laminated on and directly contacting the third insulating layer;
the respective second laminated portion is arranged with a plurality of second vias;
for each of the plurality of first metal layers, each of the plurality of first vias is connected to the first conductive layer and a corresponding one of the plurality of second vias, and each of the plurality of second vias is connected to the second conductive layer and a corresponding one of the plurality of first vias,
the plurality of first vias and the plurality of second vias are spaced apart from each other and are arranged alternately in a first direction;
the respective second laminated portion is extended to reach an edge of each of the plurality of first metal layers; and
a height of the respective first laminated portion is greater than a height of the respective second laminated portion, and a height different is generated between two sides of each of the plurality of second vias; and the first conductive layer is connected to the second conductive layer to allow each of the plurality of first metal layers to be conductive with the second metal layer.