Patent ID: 11916029
Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 3:
4. The semiconductor device according to claim 1, further comprising:
a gate; and
a gate insulating film, wherein
the semiconductor substrate has a second main surface opposite to the first main surface, a source region disposed in the first main surface, a drain region that constitutes the second main surface, a drift region disposed on the first main surface side of the drain region, and a body region that separates the drift region and the source region from each other,
the gate faces a portion of the body region between the drift region and the source region with the gate insulating film being interposed between the gate and the portion of the body region, and
the second aluminum electrode is electrically connected to the gate, and
the first aluminum electrode is electrically connected to the source region.