Patent ID: 11886352
Assignee: T-HEAD (SHANGHAI) SEMICONDUCTOR CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A system for accelerating Graph Neural Network (GNN) attribute access, comprising:
a memory configured to store attribute data of graph nodes in a graph; and
a GNN accelerator configured to:
receive a root node identifier corresponding to a node in the graph for GNN processing;
determine a plurality of node identifiers for a plurality of nodes in the graph according to locations of the plurality of nodes in the graph relative to the root node;
map the plurality of node identifiers respectively to physical memory addresses in a memory, wherein:
each of the physical memory addresses in the memory stores attribute data of the node identified by the corresponding node identifier, and
each of the physical memory addresses comprises a memory bank identifier of a memory bank, wherein each memory bank stores a plurality of rows, columns, or memory pages;

select, based on the memory bank identifiers of the physical memory addresses, a subset of the physical memory addresses that maximizes intra-memory-bank sequential memory access;
de-map the selected subset of the physical memory addresses into corresponding node identifiers to obtain one or more candidate node identifiers; and
sample one or more graph node identifiers at least from the one or more candidate node identifiers for the GNN processing.