Patent ID: 11961581
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. An assembly, comprising:
a stack comprising alternating dielectric levels and conductive levels;
channel material pillars extending through the stack; some of the channel material pillars being associated with a first sub-block and others of the channel material pillars being associated with a second sub-block;
memory cells along the channel material pillars;
an insulative level over the stack;
a select gate configuration over the insulative level; the select gate configuration including a first conductive gate structure associated with the first sub-block and a second conductive gate structure associated with the second sub-block, the first and second conductive gate structures being laterally spaced from one another by an intervening insulative region along a cross-section; the first conductive gate structure being along a first side of the intervening insulative region, and the second conductive gate structure being along a second side of the intervening insulative region; the second side being in opposing relation to the first side along the cross-section; and
wherein the first and second conductive gate structures have vertically-spaced conductive regions separated from one another by dielectric regions, and have vertically-extending conductive structures which electrically couple the vertically-spaced conductive regions to one another.