Patent ID: 11966718
Assignee: RENESAS ELECTRONICS CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. A non-transitory computer-readable recording medium that stores a program to be executed in a virtual developmental environment apparatus that includes a central processing unit and a memory, and performs vHILS (Virtual Hardware In the Loop Simulation) by simulating a MILS (Model In the Loop Simulation) model and jointly simulating a virtual ECU (Electronic Control Unit), the memory storing the MILS model that includes a controller block including an input port and an output port and a plant block to be controlled by the controller block, first setting information for identifying a controller block in the MILS mode, a program for realizing a function of the controller block to be used when executing a simulation of the virtual ECU, and second setting information describing a list of I/O (Input/Output) ports usable in the virtual ECU, the program performing a method comprising the steps of:
specifying a controller block in the MILS model based on the first setting information; arranging a bridge for connecting the input port and the output port and the I/O port of the virtual ECU the input port and the output port of the identified controller block; and
connecting the bridge and the I/O port of the virtual ECU based on the second setting information.