Patent ID: 11876127
Assignee: RENESAS ELECTRONICS CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. The method of manufacturing the semiconductor device according to claim 15,
wherein the first step and the second step includes:
a step of forming a first implantation layer for forming a P-type impurity implantation layer by an ion implantation method of doping with a P-type impurity to the second main surface of the silicon substrate;
a step of forming a second implantation layer for forming a first germanium implantation layer by an ion implantation method of doping with germanium to the second main surface of the silicon substrate; and then,

an annealing step of forming the p-type collector layer and the first dislocation suppressing layer by annealing to the second main surface of the silicon substrate to activate the P-type impurity implantation layer and the first germanium implantation layer.