Patent ID: 11936352
Assignee: APPLE INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. The method of claim 17, wherein selectively connecting each transistor of the plurality of transistors to the first output voltage terminal or the second output voltage terminal comprises:
during the first cycle:
connecting the first transistor of the first transistor pair to the first output voltage terminal and connecting the second transistor of the first transistor pair to the second output voltage terminal, and
connecting the first transistor of the second transistor pair to the first output voltage terminal and connecting the second transistor of the second transistor pair to the second output voltage terminal;

during the second cycle:
connecting the first transistor of the first transistor pair to the second output voltage terminal and connecting the second transistor of the first transistor pair to the first output voltage terminal, and
connecting the first transistor of the second transistor pair to the first output voltage terminal and connecting the second transistor of the second transistor pair to the second output voltage terminal; and

during the third cycle:
connecting the first transistor of the first transistor pair to the second output voltage terminal and connecting the second transistor of the first transistor pair to the first output voltage terminal, and
connecting the first transistor of the second transistor pair to the second output voltage terminal and connecting the second transistor of the second transistor pair to the first output voltage terminal.