Patent ID: 11901410
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 7:
8. A method comprising:
forming a multilayer structure over a substrate;
forming an opening in the multilayer structure and exposing a first layer of the multilayer structure along a sidewall of the opening;
forming a first source/drain structure adjacent the first layer;
forming a second source/drain structure over the first source/drain structure, the second source/drain structure comprising a greater percentage by volume germanium than the first source/drain structure, a portion of the second source/drain structure being located between a bottommost portion of the first source/drain structure and the substrate;
prior to the forming the first source/drain structure, depositing a dielectric material in the opening;
forming an inner spacer from the dielectric material, the inner spacer being between the first layer and a second layer of the multilayer structure; and
after the forming the first source/drain structure, removing the dielectric material at the bottom of the opening.