Patent ID: 11941402
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. A method, comprising:
storing, in an operand vector register in a vector processor, a list of elements;
storing, in a vector index register in the vector processor, a plurality of indices identifying respectively a plurality of elements among the list of elements stored in the operand vector register; and
during a vector operation:
generating, with a vector load-store unit, effective addresses of load and store operations;
for each respective index of the vector index register, adding the respective index to an effective address for accessing a corresponding position in the operand vector register; and
generating an output vector using an input vector and an arithmetic logic unit, the input vector having the plurality of elements identified by the plurality of indices stored in the vector index register.