Patent ID: 11942968
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. The receiver of claim 14, wherein the data recovery circuit includes:
a check value extractor configured to output a check value by extracting the specific bit from the second intermediate bit group;
a first data recovering logic configured to generate a first sub bit group by manipulating the first intermediate bit group according to a first scheme and generate a second sub bit group by manipulating the second intermediate bit group according to the first scheme, in response to the check value having a first logic level;
a second data recovering logic configured to generate a third sub bit group by manipulating the first intermediate bit group according to a second scheme and generate a fourth sub bit group by manipulating the second intermediate bit group according to the second scheme, in response to the check value having a second logic level different from the first logic level, wherein the second scheme is different from the first scheme;
a first multiplexer configured to output one of the first sub bit group and the third sub bit group as the first bit group, based on the check value; and
a second multiplexer configured to output one of the second sub bit group and the fourth sub bit group as the second bit group, based on the check value.