Patent ID: 11935795
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A method for forming a semiconductor device, comprising:
depositing a first dielectric layer on a first polysilicon layer in first transistor;
depositing a second polysilicon layer on the first dielectric layer at a first temperature;
patterning the first dielectric layer and the second polysilicon layer;
forming an epitaxial layer on the second polysilicon layer for a second transistor at a second temperature;
depositing a second dielectric layer over the epitaxial layer;
depositing a third polysilicon layer on the second dielectric layer;
patterning the third polysilicon layer to remove at least a portion of the third polysilicon layer;
patterning the epitaxial layer to remove at least a portion of the epitaxial layer on the second polysilicon layer; and
etching away the second polysilicon layer,
wherein the first temperature is in a range of 600 and 700 degree Celsius, wherein the second temperature is in a range of 650-950 degree Celsius, and wherein the second polysilicon layer is configured to protect the first polysilicon layer when the third polysilicon layer is patterned.