Patent ID: 11916009
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor package, comprising:
an interposer having a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces, wherein at least one sidewall of the sidewalls of the interposer is a stair-shaped sidewall, a partial inclined sidewall or a reverse stair-shaped sidewall;
semiconductor dies, disposed on the first surface of the interposer and electrically connected with the interposer;
a molding compound, disposed over the interposer and laterally encapsulating the semiconductor dies, wherein the molding compound laterally wraps around the interposer and a portion of the molding compound physically contacts the sidewalls of the interposer;
a circuit substrate, disposed below the interposer and electrically connected with semiconductor dies;
connectors, disposed between the second surface of the interposer and the circuit substrate; and
an underfill filled between the interposer, the circuit substrate and the connectors.