Patent ID: 11914714
Assignee: CANON KABUSHIKI KAISHA
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. An information processing apparatus comprising:
a first CPU;
a second CPU;
a first nonvolatile memory that stores a boot program to be executed by the first CPU at a time of start-up; and
a second nonvolatile memory that stores a first boot program and a second boot program for verifying a program,
wherein the first CPU determines whether or not a verification method indicating encryption is set in the first nonvolatile memory as a setting for verifying alteration of a program, and if the verification method has not been set, executes the first boot program, and writes the setting of the verification method to the second nonvolatile memory, and
if the verification method is set, the first CPU executes the second boot program in accordance with the setting, and when the processing of the second boot program is normally ended, the second CPU starts up the information processing apparatus.