Patent ID: 11861281
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A non-transitory computer-readable storage medium that stores computer program code which, when executed by at least one processor, causes the at least one processor to execute a plurality of tools for designing an integrated circuit (IC), the plurality of tools comprising:
a placing and routing tool that generates layout data and wire data corresponding to a net included in the IC by placing and routing standard cells defining the IC, the wire data including physical information of a wire implementing the net; and
a timing analysis tool that:
calculates a first wire delay based on a target value of the wire,
calculates a second wire delay based on process variation of the wire,
calculates a wire delay skew based on the first wire delay and the second wire delay, calculates a timing slack based on the wire delay skew, and
determines whether a timing violation occurs according to the timing slack,
wherein the physical information includes at least one of length information of the wire, width information of the wire, area information of the wire, space information of the wire, and shielding information of the wire, and
wherein the process variation includes one or more of a resistance variation, a capacitance variation, and a via variation due to a manufacturing process of the wire.