Patent ID: 11925016
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 12:
13. A memory array comprising strings of memory cells, comprising:
a conductor tier comprising conductor material;
laterally-spaced memory blocks individually comprising a first vertical stack comprising alternating insulative tiers and conductive tiers directly above the conductor tier, conducting material of a lowest of the conductive tiers being directly against the conductor material of the conductor tier, channel-material strings of memory cells extending through the insulative tiers and the conductive tiers;
intervening material laterally-between and longitudinally-along immediately-laterally-adjacent of the memory blocks;
the conducting material in the lowest conductive tier being directly against the channel material of individual of the channel-material strings; and
a second vertical stack laterally of the first vertical stack, the second vertical comprising:
alternating first insulative tiers and second insulative tiers, a lowest of the first insulative tiers being thicker than the first insulative tiers there-above, the first insulative tiers comprising first insulative material, the second insulative tiers comprising second insulative material of different composition from that of the first insulative tiers; and
the second insulative tier that is immediately-above the lowest first insulative tier comprising an upper insulative material and a lower material under the upper insulative material, the lower material being of different composition from that of the upper insulative material.