Patent ID: 11900991
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An integrated circuit, comprising:
a first data line group, comprising a plurality of local data lines arranged in an array;
a second data line group, comprising a plurality of complementary local data lines arranged in a second array, wherein the plurality of complementary local data lines and the plurality of local data lines respectively transmit signals having opposite phases; and
a plurality of read circuits, configured to read, in response to a read control signal, signals of the plurality of local data lines or the plurality of complementary local data lines during a read operation, wherein each of the plurality of read circuits is electrically connected to a local data line of the plurality of local data lines at a boundary of the first data line group or connected to a complementary local data line of the plurality of complementary local data lines at a boundary of the second data line group;
wherein the plurality of local data lines comprise a first local data line, a second local data line, a third local data line, and a fourth local data line arranged in sequence, the plurality of complementary local data lines comprise a second complementary local data line, a first complementary local data line, a fourth complementary local data line, and a third complementary local data line arranged in sequence, and the first local data line, the fourth local data line, the second complementary local data line, and the third complementary local data line are electrically connected to one of the plurality of read circuits, respectively; and
wherein the first local data line and the first complementary local data line, the second local data line and the second complementary local data line, the third local data line and the third complementary local data line, and the fourth local data line and the fourth complementary local data line each transmit signals having opposite phases.