Patent ID: 11923018
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. The semiconductor memory device of claim 1, wherein first, second and third verify voltages are used in at least one program loop of the plurality of program loops, the first verify voltage being at a lower voltage level than the second verify voltage and the second verify voltage being at a lower voltage level than the third verify voltage,
wherein the control logic is configured to control the peripheral circuit to apply the program voltage to the select word line that is connected to the selected memory cells, apply the first under drive voltage that is determined based on the first verify voltage, among the first, second and third verify voltages, to the select word line, and apply the first verify voltage to the select word line, and
wherein the first under drive voltage is at a lower voltage level than the first verify voltage.