Patent ID: 11914510
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A system comprising:
a 3-dimensional (3D) memory component; and
a processing device, operatively coupled with the 3D memory component, wherein the processing device is to perform operations comprising:
receiving data to be stored at the 3D memory component in response to a write operation;
identifying a first layer within a first logical unit and a second layer within a second logical unit of the 3D memory component based on randomly selecting layers from a plurality of layers of the 3D memory component;
determining a first location of the first layer of the 3D memory component at which to store a first portion of the data;
determining a second location of the second layer of the 3D memory component at which to store a second portion of the data;
causing the first portion of the data to be stored in first memory cells at the first location within the first layer; and
causing the second portion of the data to be stored in second memory cells at the second location within the second layer.