Patent ID: 11968837
Assignee: SUNRISE MEMORY CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 23:
24. An array of NOR memory strings, wherein each NOR memory string comprises:
a bit line having a length that extends along a first direction;
a source line, and
a plurality of memory cells formed along a first side and a second side of the bit line, the first and the second sides of the bit line being opposite each other along the length of the bit line, each memory cell comprising (i) a channel region adjacent to both the bit line and the source line; and (ii) a gate electrode having a length extending along a second direction substantially orthogonal to the first direction;
wherein (i) the gate electrodes of the memory cells along the first side of the bit line and the gate electrodes of the memory cells along the second side of the bit line are provided in a staggered configuration; (ii) the first conductive layer and the second conductive layer are separated from each other substantially uniformly by a distance along the first direction; and (iii) the array of NOR memory strings is formed above a planar surface of a substrate.