Patent ID: 11868208
Assignee: AMDOCS DEVELOPMENT LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. A system, comprising:
a non-transitory memory storing instructions; and
one or more processors in communication with the non-transitory memory that execute the instructions to:, detect an error output by a computer system during execution of code within the computer system, wherein the error is indicative of a defect within the code;
in response to detecting the error, receive information describing the defect;
process the information, using a first machine learning model, to predict a source of the defect, wherein the source is a part of the code in which the defect occurred;
process the information and an identifier of the source of the defect, using a second machine learning model, to predict one or more parameters for handling the defect, wherein the second machine learning model predicts the one or more parameters for handling the defect from among a plurality of classifications that include different microservices and different handling functions; and
cause one or more actions to be performed to resolve the defect, using the predicted one or more parameters for handling the defect.