Patent ID: 11960855
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An apparatus for performing deep learning operations, the apparatus comprising:
a systolic array comprising a plurality of multiplier accumulator (MAC) units; and
a control circuit configured to:
control an operation of a multiplexer connected to at least one MAC unit of the plurality of MAC units; and
control operations of the plurality of MAC units according to a plurality of operation modes,

wherein, for each of multiple MAC units of the plurality of MAC units, the multiplexer includes:
a second multiplexer connected to an output terminal of an accumulator of a corresponding MAC unit, the accumulator being separate from an adder of the corresponding MAC unit; and
a third multiplexer connected to output terminals of the multiple MAC units receiving output of the multiple MAC units as input; and

wherein a shift register is connected to the third multiplexer and receiving output of the third multiplexer as input.