Patent ID: 11948938
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A method of forming a semiconductor device, comprising:
patterning a top surface of a substrate to form a recess;
doping the substrate to form a source extension region in the substrate;
forming a gate stack in the recess after the doping, wherein the gate stack comprises a gate dielectric layer and a gate electrode overlying the gate dielectric layer, wherein a bottom surface of the gate electrode is recessed relative to the top surface of the substrate;
depositing a spacer layer covering the gate stack and the substrate, and further lining sidewalls of the gate electrode;
etching back the spacer layer to form a sidewall spacer structure comprising a first spacer segment and a second spacer segment bordering the gate electrode respectively on opposite sides of the gate electrode; and
doping the substrate with the first and second spacer segments in place to form a source region and a drain region respectively on the opposite sides of the gate electrode;
wherein the first and second spacer segments directly contact the top surface of the substrate from the gate dielectric layer respectively to the source and drain regions, wherein the doping to form the source extension region implants dopants into the substrate through a bottom of the recess and while the recess is exposed, wherein the gate dielectric layer has a sidewall facing away from the recess, wherein the first spacer segment is formed directly over and contacting a top edge of the sidewall, and wherein the top edge is offset from sidewalls of the first spacer segment.