Patent ID: 11901292
Assignee: nan
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. An electronic system, comprising:
a processor device operably connected to an input device and an output device; and
a memory device operably connected to the processor device and comprising:
a stack structure comprising conductive material and insulative material vertically alternating with the conductive material;
strings of memory cells vertically extending through the stack structure;
a source structure vertically underlying the stack structure and in electrical communication with the strings of memory cells;
digit lines vertically overlying the stack structure;
conductive contact structures vertically overlying the stack structure and coupling the strings of memory cells to the digit lines, the conductive contact structures individually comprising:
a first portion having a substantially uniform horizontal cross-sectional area across an entire vertical dimension thereof; and
a second portion underlying and unitary with the first portion and having a non-uniform horizontal cross-sectional area across an entire vertical dimension thereof; and

control logic circuitry vertically underlying the source structure and in electrical communication with the strings of memory cells.