Patent ID: 11881771
Assignee: NXP USA, INC.
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 8:
9. The controller of claim 1, wherein the controller circuit is configured to generate a rise deadtime setting signal in response to a first status signal, and a fall deadtime setting signal in response to a second status signal, and wherein the low-side delay circuit comprises:
a low-side ON delay circuit configured to receive the rise deadtime setting signal from the controller circuit and an inverted version of a PWM signal, and generate a low-side ON signal as a response;
a low-side OFF delay circuit configured to receive the fall deadtime setting signal from the controller circuit and the PWM signal, and generate a low-side OFF signal as a response; and
a low-side trigger circuit connected to the low-side ON delay circuit and the low-side OFF delay circuit, and configured to generate the low-side control signal based on the low-side ON signal and the low-side OFF signal.