Patent ID: 11908527
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A storage device comprising:
a memory device including a memory block including memory cells; and
a memory controller comprising an operation controller configured to output a read command and an address for the memory cells, and provide an open read command and the address to the memory device when a read operation performed by the memory device in response to the read command has failed,
wherein in response to the open read command, the memory device applies a pass voltage to adjacent word lines adjacent to a selected word line including the memory cells, discharges the pass voltage to a target pass voltage less than the pass voltage by a step voltage after a predetermined time elapses and, after a target read time elapses from when the pass voltage is discharged to the target pass voltage, obtains data stored in the memory cells through bit lines connected to the memory cells.