Patent ID: 11868307
Assignee: MOFFETT INTERNATIONAL CO., LIMITED
Field: nan (nan)
Classification: CPC nan | IPC G

Claim 13:
14. A Network-on-Chip (NoC) device, comprising:
a plurality of cores and a central processing unit (CPU), wherein each core comprises a plurality of processing entity (PE) clusters, and the plurality of cores and the CPU are respectively coupled to memories,
a data exchange interface for connecting a host device to an neural network (NN) accelerator,
an outer-layer NoC,
a middle-layer NoC, and
an inner-layer NoC,
wherein:
the outer-layer NoC comprises a bi-directional ring-shape data link connected to the data exchange interface and the memories, and is configured to transfer data between the host device and the memories,
the middle-layer NoC comprises a pair of uni-directional ring-shape data links connecting the plurality of cores, and is configured to transfer data among the plurality of cores; and
the inner-layer NoC is within each core and comprises a cross-bar network for casting weights and activations of neural networks from a global buffer of the core to a plurality of PE clusters within the core.