Patent ID: 11889695
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A device comprising:
an array of elevationally-extending transistors; and
a circuit structure adjacent and electrically coupled to the elevationally-extending transistors of the array, the circuit structure comprising:
a first stair step structure and an adjacent second stair step structure individually comprising vertically-alternating tiers comprising first and second opposing sets of conductive steps, the conductive steps being at least partially elevationally separated from one another by insulative material in each of the first and second stair step structures;
an elevationally-outer landing between the first stair step structure and the second stair step structure;
operative conductive vias in each of the first and second stair step structures, the operative conductive vias individually extending elevationally through one of the conductive steps at least to a bottom of the vertically-alternating tiers of the respective first or second stair step structure and which individually electrically couple to an electronic component below the vertically-alternating tiers of the respective first or second stair step structure;
first dummy structures in each of the first and second stair step structures, the first dummy structures individually extending elevationally through one of the conductive steps at least to the bottom of the vertically-alternating tiers of the respective first or second stair step structure; and
a second dummy structure extending elevationally through the landing.