Patent ID: 11895842
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 18:
19. A nonvolatile memory device comprising:
first metal pads disposed in a cell region;
second metal pads disposed in a peripheral region under the cell region wherein the peripheral region is vertically connected to the cell region by the first metal pads and the second metal pads;
a first sub memory plane;
a second sub memory plane disposed adjacent to the first sub memory plane in a row direction;
a first vertical contact region disposed in the cell region of the first sub memory plane, wherein the first vertical contact region is disposed closer to a first end portion of the cell region in a column direction than to a second end portion of the cell region;
a second vertical contact region disposed in the cell region of the second sub memory plane, wherein the second vertical contact region is disposed closer to the second end portion than to the first end portion of the cell region, wherein the second end portion is opposite to the first end portion in a column direction;
a first overhead region disposed in the cell region of the first sub memory plane and adjacent to the second vertical region in the row direction;
a second overhead region disposed in the cell region of the second sub memory plane and adjacent to the first vertical region in the row direction;
vertical contacts disposed in the first vertical contact region and the second contact region and extending in a vertical direction; and
cell channel structures disposed in a main region of the cell region, each cell channel structure including as string selection transistor, memory cells and a ground selection transistor.