Patent ID: 11895831
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 1:
2. The manufacturing method for memory according to claim 1, wherein forming the first dielectric layer and the second dielectric layer comprises:
forming an initial first dielectric layer on the surface of the exposed first side wall and the surface of the exposed second side wall of each of the word lines;
removing a part of the initial first dielectric layer on the second side wall; and
forming an initial second dielectric layer on a surface of a remaining part of the initial first dielectric layer and the surface of the exposed second side wall;
wherein the remaining part of the initial first dielectric layer and the initial second dielectric layer covering the initial first dielectric layer are used as the first dielectric layer; and the initial second dielectric layer covering the surface of the second side wall is used as the second dielectric layer.