Patent ID: 11907044
Assignee: INFINEON TECHNOLOGIES AG
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory device comprising:
a plurality of memory cells;
a plurality of evaluation elements, wherein each evaluation element of the plurality of evaluation elements is connectable with a memory cell of the memory device and is configured to evaluate a physical parameter, of the memory cell, comprising at least one of a voltage at the memory cell, a potential at the memory cell, a current through the memory cell or an electrical resistance of the memory cell;
an interconnection unit configured for:
at a first time, connecting the plurality of memory cells to a first assignment of evaluation elements in a first state; and
at a second time, connecting the plurality of memory cells to at least a second assignment of the evaluation elements in a second state, wherein in the second state, at least one memory cell of the plurality of memory cells is connected to a different evaluation element to which the at least one memory cell is not connected in the first state; and

an evaluation unit configured for:
controlling the interconnection unit to transition from (i) the first state in which the at least one memory cell is not connected to the different evaluation element to (ii) the second state in which the at least one memory cell is connected to the different evaluation element;
evaluating the plurality of memory cells in the first state, using the evaluation elements connected to the plurality of memory cells in accordance with the first assignment, to obtain a first evaluation result based on one or more first evaluations of one or more physical parameters of the plurality of memory cells; and
evaluating the plurality of memory cells in the second state, using the evaluation elements connected to the plurality of memory cells in accordance with the second assignment, to obtain a second evaluation result based on one or more second evaluations of one or more physical parameters of the plurality of memory cells.