Patent ID: 11877450
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A semiconductor memory device comprising:
a peripheral circuit structure including a peripheral circuit; and
a cell array structure including a first stacked structure including a first staircase portion extending in a first direction, a second stacked structure on the first stacked structure, the second stacked structure including a second staircase portion extending in the first direction, the second staircase portion at least partially overlapping the first staircase portion in a second direction, and a first contact plug and a second contact plug on the first staircase portion and the second staircase portion, the first contact plug and the second contact plug penetrating the first stacked structure and the second stacked structure and being connected to the peripheral circuit,
wherein the first contact plug is electrically connected to the first stacked structure and is not electrically connected to the second stacked structure,
the second contact plug is electrically connected to the second stacked structure, and is not electrically connected to the first stacked structure, and
the first contact plug and the second contact plug are alternately disposed in the first direction.