Patent ID: 11973127
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor structure, comprising:
a fin structure protruding from a substrate and extending along a first direction;
a gate structure formed across the fin structure and extending along a second direction different from the first direction;
an Arsenic-doped region formed in the fin structure;
a source/drain structure formed over the Arsenic-doped region, wherein the source/drain structure comprises a first region, a second region, and a third region having different concentrations of phosphorus and sequentially stacked along a third direction different from the first direction and the second direction;
a spacer formed on a sidewall of the source/drain structure, wherein the spacer overlaps the third region of the source/drain structure in the third direction, and a top surface of the spacer is lower than a top portion of the second region of the source/drain structure, and a bottom surface of the spacer is higher than a bottom portion of the second region of the source/drain structure; and
a contact formed over the source/drain structure, wherein the contact has a concave bottom shape in a cross-sectional view along the second direction,
wherein a bottommost portion of the Arsenic-doped region is lower than a bottommost portion of the source/drain structure.