Patent ID: 11900041
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A system comprising:
a processor; and
a memory accessible to the processor, the memory storing instructions that are executable by the processor to perform operations comprising:
identifying prospective zones for via placement in a cell, wherein each of the prospective zones correspond to different regions of via connectivity including a power rail connection region, an active connection region, and a poly connection region;
assigning different colors to each identified prospective zone by assigning a different color to each of the prospective zones that correspond to the different regions of via connectivity including a first color to the power rail connection region, a second color to the active connection region, and a third color to the poly connection region;
determining if a first zone-to-zone distance comprises a distance less than a same-mask distance, wherein a first zone-to-zone distance is a distance between a first identified zone for via placement and a second identified zone for via placement; and
in response to a determination that the first zone-to-zone distance comprises the distance less than the same-mask distance, assigning a shifted color sequence for one or more sections of the second identified zone for via placement.