Patent ID: 11901439
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A semiconductor device comprising:
a substrate;
a channel region on the substrate;
a gate structure on the channel region;
a source/drain region on the substrate adjacent the gate structure, wherein the source/drain region is in contact with the channel region; and
an inner spacer between the source/drain region and the gate structure, the inner spacer comprising:
a first inner spacer layer contacting the gate structure and the source/drain region;
a second inner spacer layer contacting the first inner spacer layer and the source/drain region; and
a third inner spacer layer contacting the second inner spacer layer and the source/drain region, wherein an atomic percentage of carbon in the first inner spacer layer is greater than an atomic percentage of carbon in the second inner spacer layer and the third inner spacer layer.