Patent ID: 11892972
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 0:
1. A method for synchronising processing in a multi-core processor, comprising:
receiving a command stream which comprises a plurality of commands including one or more wait commands and one or more setup commands, wherein each wait command has an associated state and one or more associated conditions;
sequentially processing each command in the command stream until a wait command is reached;
adding said wait command to a wait queue; and
checking the state associated with the wait command to be processed,
wherein if said state is a blocking state, further processing of commands in the command stream is paused until each of said wait command's associated conditions are met,
wherein if said state is a non-blocking state, a next command in the command stream is retrieved and processed, wherein when said next command is a setup command, processing of said next command comprises sending said setup command to one or more cores of the multi-core processor for implementation, and
wherein when all of said wait command's one or more associated conditions are met, said wait command is removed from the wait queue.