Patent ID: 11935895
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method for forming a semiconductor device structure, comprising:
forming a mask layer on a silicon-on-insulator (SOI) structure, wherein the mask layer is patterned to define a bulk silicon region and a SOI region;
forming a trench through a portion of a semiconductor layer and an insulator layer of the SOI structure using the patterned mask layer to expose a top surface of a silicon-containing substrate;
forming a first shallow trench isolation (STI) on sidewalls of the trench;
forming a bulk semiconductor layer in the trench, the bulk semiconductor layer being in contact with the first STI and the exposed top surface of the silicon-containing substrate;
forming a second STI in the semiconductor layer, the second STI surrounding the first STI;
forming a first gate structure and a second gate structure over the bulk semiconductor layer and the semiconductor layer, respectively; and
forming source/drain regions in the bulk semiconductor layer and the semiconductor layer at regions not covered by the first and second gate structure.