Patent ID: 11868786
Assignee: CADENCE DESIGN SYSTEMS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A system of accelerated modification of an emulation processor system, comprising:
a first emulation processor including one or more first registers and operable to load a first portion of processor instructions into the first registers, in response to a selection of a first programming mode associated with the first emulation processor;
a second emulation processor operatively coupled with the first emulation processor and including one or more second registers, the second emulation processor being operable to load a second portion of the processor instructions into the second registers, in response to a selection of a first programming mode associated with the second emulation processor;
a controller operatively coupled with the second emulation processor and operable to extract the second portion of the processor instructions from a first processor memory of the first emulation processor, in response to the selection of the first programming mode associated with the second emulation processor; and
a system processor operatively coupled with at least one of the first emulation processor and the second emulation processor, operable to load at least the first portion of the processor instructions into the first registers, in response to a selection of a second programming mode associated with the first emulation processor, and operable to load at least the second portion of the processor instructions into the registers of the second emulation processor, in response to a selection of a second programming mode associated with the second emulation processor.