Patent ID: 11908790
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method for forming a chip structure, comprising:
forming a conductive line over a substrate, wherein the conductive line has a bending portion, the bending portion has a first strip part and a second strip part, and the first strip part is not parallel to the second strip part in a top view of the conductive line;
forming a first passivation layer over the substrate and the conductive line;
forming a first conductive via structure, a second conductive via structure, and a conductive pad over the conductive line, wherein
the first conductive via structure and the second conductive via structure pass through the first passivation layer and are connected to the first strip part and the second strip part respectively, the conductive pad is over the first conductive via structure, the second conductive via structure, and the bending portion, the conductive pad is thicker than the first conductive via structure, and the first conductive via structure and the second conductive via structure are arranged along the first conductive line; and
forming a conductive pillar over the conductive pad.