Patent ID: 11908853
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 14:
15. An integrated circuit, comprising:
a cell layer including a first cell and a second cell separated by a non-zero distance;
a first metal layer over the cell layer, comprising:
a first conductive feature overlapping the first cell and having a lengthwise direction along a first direction; and
a second conductive feature overlapping the second cell and having a lengthwise direction along the first direction;

a second metal layer over the first metal layer, comprising a third conductive feature overlapping both the first and second cells and having a lengthwise direction along the first direction; and
a third metal layer between the first and second metal layers, wherein the third metal layer comprises a fourth conductive feature electrically connecting the first and third conductive features, and a fifth conductive feature electrically connecting the second and third conductive features.