Patent ID: 11915928
Assignee: KIOXIA CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. The semiconductor memory device according to claim 1, wherein
the plurality of interlayer insulating layers include a fifth interlayer insulating layer and a sixth interlayer insulating layer adjacent in the first direction, and
the plurality of conductive layers include a third conductive layer disposed between the fifth interlayer insulating layer and the sixth interlayer insulating layer, wherein
the third conductive layer includes:
a ninth region;
a tenth region disposed between the ninth region and the gate insulating film, and
an eleventh region disposed between the ninth region and the fifth interlayer insulating layer, wherein

the ninth region to the eleventh region contain a metal;
the ninth region does not contain silicon (Si) or has a lower silicon (Si) content than the silicon (Si) content in the third region,
the tenth region does not contain silicon (Si) or has a lower silicon (Si) content than the silicon (Si) content in the third region, and
the eleventh region does not contain silicon (Si) or has a lower silicon (Si) content than the silicon (Si) content in the third region.