Patent ID: 11916128
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of forming a semiconductor device, comprising:
providing an nFET structure and a pFET structure, each of the nFET and pFET structures including a semiconductor substrate and a gate trench;
depositing an interfacial layer in each gate trench;
depositing a first ferroelectric layer over the interfacial layer;
removing the first ferroelectric layer from the nFET structure;
depositing a metal oxide layer in each gate trench;
depositing a second ferroelectric layer over the metal oxide layer;
removing the second ferroelectric layer from the pFET structure; and
depositing a gate electrode in each gate trench.