Patent ID: 11955552
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A semiconductor device structure, comprising:
a source/drain feature comprising a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface;
a dielectric layer having a first surface and a second surface opposing the first surface, the first surface being a continuous surface in contact with the second surface of the source/drain feature, and the second surface of the dielectric layer being in contact with an interlayer dielectric;
a semiconductor layer having a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface, wherein the sidewall of the semiconductor layer is in contact with the sidewall of the source/drain feature;
a gate dielectric layer in contact with the continuous surface of the dielectric layer and the second surface of the semiconductor layer; and
a gate electrode layer surrounding a portion of the semiconductor layer.