Patent ID: 11899066
Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 0:
1. A computing device comprising:
a first reset domain comprising a test controller and a configurable test logic; and
a second reset domain comprising a subsystem to be measured by the configurable test logic, wherein the first reset domain is to:
enter a reset mode, and
after exiting the reset mode, receive configuration information that configures the configurable test logic,

wherein the test controller of the first reset domain is to:
maintain the second reset domain in a reset mode after the first reset domain has exited the reset mode of the first reset domain, and
responsive to the received configuration information for configuring the configurable test logic, provide a reset release indication to the second reset domain to allow the second reset domain to exit the reset mode of the second reset domain.