Patent ID: 11861046
Assignee: INFINEON TECHNOLOGIES AG
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A system, comprising:
a cryptographic accelerator to:
generate a first check value based on a payload received in a message, the first check value comprising a first cyclic redundancy check (CRC) value or a first message authentication code (MAC), and
provide the first check value to a first comparator and to a second comparator; the first comparator to:
receive the first check value from the cryptographic accelerator,
determine whether the first check value matches a second check value, the second check value being a check value received in the message and comprising a second CRC value or a second MAC, and
provide a first output indicating a first result indicating that the first check value matches the second check value or a second result indicating that the first check value does not match the second check value; the second comparator to:
receive the first check value from the cryptographic accelerator,
determine whether the first check value matches the second check value, and
provide a second output indicating the first result indicating that the first check value matches the second check value or the second result indicating that the first check value does not match the second check value; and

a processor to:
detect a hardware fault based on whether the first output and the second output indicate a same result, and
evaluate an authenticity of the message and a safety of the payload based on whether the first output and the second output both indicate the first result.