Patent ID: 11973027
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a substrate comprising source/drain (S/D) regions;
a gate structure on the substrate and between the S/D regions;
a dielectric structure covering the gate structure, the dielectric structure comprising a first dielectric layer and a second dielectric layer stacked over the first dielectric layer, wherein the gate structure is laterally surrounded by the first dielectric layer, and the first dielectric layer is in contact with sidewalls of the gate structure; and
a contact structure penetrating through the dielectric structure to connect to the S/D region, wherein the contact structure is spaced apart from the first dielectric layer of the dielectric structure by an air gap therebetween, and the S/D regions are exposed at a bottom of the air gap.