Patent ID: 11948899
Assignee: nan
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A manufacturing method of a semiconductor substrate structure, comprising:
forming a first group of circuit structure on a first temporary carrier board, wherein the first group of circuit structure comprises a plurality of first wiring layers and a plurality of first conductive connectors, and each of the first conductive connectors comprises a conductive cap;
forming a second group of circuit structure on a second temporary carrier board, wherein the second group of circuit structure comprises a plurality of second wiring layers and a plurality of second conductive connectors; and
bonding the first conductive connectors of the first group of circuit structure disposed on the first temporary carrier board to the second conductive connectors of the second group of circuit structure disposed on the second temporary carrier board to form electrical connection and form a multilayer redistribution structure.