Patent ID: 11948909
Assignee: QUALCOMM INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A package comprising:
a substrate; and
a stack of integrated devices coupled to the substrate through a first plurality of solder interconnects, wherein the stack of integrated devices comprises:
a first integrated device comprising a first plurality of interconnects;
a second plurality of solder interconnects coupled to the first plurality of interconnects;
a second integrated device comprising a second plurality of interconnects, wherein the second integrated device is coupled to the first integrated device through the second plurality of interconnects, the second plurality of solder interconnects and the first plurality of interconnects;
a polymer layer located between the first integrated device and the second integrated device;

a plurality of spacer balls located between the first integrated device and the second integrated device; and
an underfill at least partially surrounding the plurality of solder interconnects;
wherein a portion of the polymer layer at least partially surrounds the plurality of spacer balls and is laterally adjacent to the underfill and in direct contact with the underfill.