Patent ID: 11973153
Assignee: RAMBUS INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G  Y | IPC G  H

Claim 14:
15. A memory device comprising:
a command interface to receive a memory command from a memory controller associated with the memory device; and
an acknowledgment interface to generate and transmit a combined acknowledgment status packet to the memory controller over a shared acknowledgment link coupled between the memory controller and the memory device, wherein the acknowledgment link is shareable by a plurality of memory devices associated with the memory controller, wherein the combined acknowledgment status packet is formed from a logical combination of individual acknowledgment status packets corresponding to each of the plurality of memory devices, wherein each of the individual acknowledgment status packets comprises a plurality of fields, wherein each of the individual acknowledgement status packets comprises acknowledgment information associated with a corresponding memory device of the plurality of memory devices and stored in a respective designated field of the plurality of fields, and wherein a remainder of the plurality of fields in each individual acknowledgment status packet besides the respective designated field comprise default values, the acknowledgment information to indicate whether the command was successfully received by the corresponding memory device.