Patent ID: 11922030
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 9:
10. A controlling method of controlling a memory device including: a first nonvolatile memory die; a second nonvolatile memory die stacked above the first nonvolatile memory die; a third nonvolatile memory die; first, second, and third temperature sensors incorporated respectively in the first, second, and third nonvolatile memory dies; a first surface; a second surface located opposite to the first surface; and a plurality of terminals exposed on the first surface, wherein
the first nonvolatile memory die is stacked above the third nonvolatile memory die, and
the third nonvolatile memory die is closer to the first surface than the first and second nonvolatile memory dies,
the method comprises:
deciding not to read a temperature measured by the third temperature sensor, or not to compare the temperature with a threshold temperature, by learning in advance temperature tendencies of the first, second, and third nonvolatile memory dies in a period in which access to the first, second, and third nonvolatile memory dies is in progress;
measuring first, second, and third temperatures, using the first, second, and third temperature sensors;
reading a measurement of the first temperature and a measurement of the second temperature from the first nonvolatile memory die and the second nonvolatile memory die; and
when at least one of the measurement of the first temperature and the measurement of the second temperature is equal to or higher than the threshold temperature, reducing a frequency of issue of commands to the first, second, and third nonvolatile memory dies or a speed of access to the first, second, and third nonvolatile memory dies.