Patent ID: 11889529
Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Field: Digital communication (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 0:
1. An integrated circuit, comprising:
at least one input, which, in operation, inputs a signal, and
circuitry, which, in operation, controls:
receiving a signal that contains a preamble and a data field, the preamble including a common field and a user specific field; and
decoding at least a part of the data field based on the preamble,
wherein
a resource assignment subfield in the common field indicates a plurality of resource units (RUs) in a frequency domain, and the user specific field includes a plurality of user fields, each of the plurality of RUs being allocated to a user field or a group of user fields for multiuser-multiple input multiple output (MU-MIMO) transmission in the plurality of user fields, respectively, and
the ordering of the plurality of user fields in the user specific field is determined based on the resource assignment subfield such that the user field and the group of user fields in the plurality of the user fields are in order of increasing frequency of the respective allocated RUs.