Patent ID: 11923432
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 14:
15. A semiconductor device comprising:
a first nanostructure over a substrate;
a second nanostructure over the first nanostructure;
a gate electrode around the first nanostructure and the second nanostructure;
a gate dielectric layer between the gate electrode and the first nanostructure and between the gate electrode and the second nanostructure;
a source/drain region adjacent the first nanostructure and the second nanostructure; and
a first inner spacer between the gate electrode and the source/drain region, the first inner spacer being below the first nanostructure, the first inner spacer having a gradient of atomic percentage of oxygen from 30% to 60% measured from a first sidewall of the first inner spacer contacting the source/drain region into the first inner spacer.