Patent ID: 11869933
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A method of forming an integrated circuit, comprising, comprising:
forming a metal terminal over a semiconductor substrate, the metal terminal being separated from semiconductor substrate by a dielectric layer;
forming a p-type tank within the substrate, the p-type tank vertically bounded by an n-type buried layer and an n-type first well region, and laterally bounded by an n-type second well region, the p-type tank laterally extending beyond the metal terminal on all sides of the metal terminal;
forming a first junction diode between the p-type tank and the n-type first well region, the first junction diode having an anode-to-cathode direction oriented toward the metal terminal;
forming a second junction diode between the semiconductor substrate and the buried layer, the second junction diode having an anode-to-cathode direction oriented toward the metal terminal; and
forming a third junction diode between the tank and the buried layer, the third junction diode sharing an anode region with the first junction diode and sharing a cathode region with the second junction diode.