Patent ID: 11888022
Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
Field: Semiconductors (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 5:
6. A manufacturing method of the SOI lateral homogenization field high voltage power semiconductor device according to claim 1, comprising:
step 1: selecting an SOI epitaxial wafer;
step 2: obtaining the type II conductive drift region by implantation and diffusing on the SOI epitaxial wafer;
step 3: forming the trenches by etching through the buried dielectric layer;
step 4, forming the first dielectric oxide layer on a trench wall, depositing polysilicon and etching to the silicon plane;
step 5: forming the type II conductive well region by ion implantation of type II conductive impurities and diffusing;
step 6, forming the second dielectric oxide layer by thermally oxidizing, and forming the third dielectric oxide layer by depositing and etching;
step 7, forming the type I conductive well region by ion implantation of type I conductive impurities and diffusing;
step 8: forming the control gate polysilicon electrode by depositing the polysilicon and etching; and
step 9: forming the type I conductive source heavily doped region, the type II conductive source heavily doped region and the type II conductive drain heavily doped region by implantation and activation.