Patent ID: 11915784
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 5:
6. The memory chip according to claim 5, wherein the adjustment unit comprises:
N first resistors connected in series between the negative input terminal and the output terminal of the operational amplifier, wherein N is an integer greater than 1, and at least one second resistor, wherein the second resistor is connected between the negative input terminal and the ground terminal; and
M first switches, wherein the first switches each connect the output terminal of the adjustment unit and a terminal of a corresponding first resistor, and the first switches each are selectively turned on based on the control signal, to adjust the value of the equivalent resistance between the output terminal of the adjustment unit and the output terminal of the operational amplifier, wherein M is a positive integer less than or equal to N.