Patent ID: 11966785
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. A computer-implemented training method for training a machine learning model for controlling hardware resource configuration for a processing system comprising a plurality of processor cores; the method comprising:
for each of a plurality of workloads or groups of workloads selected as a selected workload or selected group of workloads, performing, by a computing system, a training operation comprising:
obtaining performance monitoring data indicative of processing performance for the selected workload or selected group of workloads processed in a plurality of different hardware resource configurations of the plurality of processor cores, the plurality of hardware resource configurations corresponding to different amounts of inter-core borrowing of hardware resources between the plurality of processor cores;
training the machine learning model to adapt model parameters for the machine learning model based on the performance monitoring data for the selected workload or selected group of workloads and the plurality of different hardware resource configurations, wherein the performance monitoring data used for training the machine learning model include at least a first of performance monitoring data corresponding to a first workload to be executed on a first processor core from the plurality of processor cores and a second set of performance corresponding to a second workload to be executed on a second processor core from the plurality of processor cores; and

recording in memory, by the computing system, trained model parameters for the machine learning model resulting from the training operation performed for the plurality of workloads or groups of workloads, wherein the trained model parameters comprise information indicating an amount of inter-core borrowing of hardware resources that is suitable for executing the first workload on the first processor core and the second workload on the second processor core,
wherein the computing system is included in the processing system or is separate from the processing system.