Patent ID: 11868209
Assignee: AMPERE COMPUTING LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A method of communication performed by a receiving device, the method comprising:
receiving a packet based on a communication protocol, the packet including a header and a payload, and the payload including data blocks and corresponding error check blocks, each one of the error check blocks sequentially following the corresponding one of the data blocks in the payload, wherein each one of the data blocks includes a flow control unit (flit) or a hardware component message;
prior to the packet being received completely, extracting one of the data blocks and the corresponding error check blocks from a received portion of the packet;
validating the one of the data blocks based on the corresponding error check block; and
storing the one of the data blocks in a buffer after the one of the data blocks is validated based on the corresponding error check block.