Patent ID: 11876489
Assignee: FALCOMM, INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A dual-drive based Doherty amplifier, comprising:
a power splitter;
a first power amplifier coupled to a first output of the power splitter; and
a second power amplifier that is coupled to a second output of the power splitter and that is in parallel with the first power amplifier,
wherein the second power amplifier receives a second output signal from the second output with a phase difference from a phase of a first output signal from the first output,
wherein at least one of the first power amplifier or the second power amplifier includes a dual-drive power amplifier core, and
wherein the dual-drive power amplifier core includes:
a core first output terminal Vout+ configured to be connected to a drain terminal of a first transistor;
a core second output terminal Vout− configured to be connected to a drain terminal of a second transistor; and
transmission line couplers including a first transmission line coupler comprising a transmission line section having a first end configured to receive a core first input signal Vin+, and a second transmission line coupler comprising a transmission line section having a first end configured to receive a core first input signal Vin−,
wherein the core first output terminal and the core second output terminal are configured to output an amplified differential signal corresponding to a difference between the core first input signal Vin+ and the core second input signal Vin−,
wherein the first transistor comprises first transistor M1 having an M1 gate terminal, the drain terminal comprising an M1 drain terminal, and an M1 source terminal,
wherein the second transistor comprises second transistor M2 having an M2 gate terminal, the drain terminal comprising M2 drain terminal, and an M2 source terminal,
wherein the first transmission line coupler further comprises a first transmission line section T1 having a first end and a second end, wherein the first end is grounded, and the second end is connected to the M1 source terminal,
wherein the transmission line section having the first end configured to receive the core first input signal Vin+ comprises a second transmission line section T2 of the first transmission line coupler, wherein the second transmission line section T2 further has a second end connected to the M2 gate terminal and coupled to the M1 drain terminal,
wherein the first transmission line section T1 is electromagnetically coupled with the second transmission line section T2,
wherein the second transmission line coupler further comprises a third transmission line section T3 having a first end and a second end, wherein the first end is grounded, and the second end is connected to the M2 source terminal,
wherein the transmission line section having the first end configured to receive the core first input signal Vin− comprises a fourth transmission line section T4, wherein the fourth transmission line section T4 further has a second end connected to the M1 gate terminal and coupled to the M2 drain terminal, and
wherein the third transmission line section T3 is electromagnetically coupled with the fourth transmission line section T4.