Patent ID: 11887353
Assignee: ZHEJIANG LAB
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The method according to claim 1, wherein the one or more constraint condition comprises that:

Si≥Cj−Msδij−Ml(2−xik−xjk),

Si≥Ci−Ms(1−δij)−Ml(2−xik−xjk),

wherein, i≠j, ∀i,j∈V, ∀k∈K, i∉Succ(j) and j∉Succ(i), represents that when two operators i and j without a sequential relationship in the directed acyclic graph are assigned on a computing device, one operator is executed by the computing device at a time, and Si represents a start time of computing task i; Sj represents a start time of computing task j; Ci represents a completion time of computing task i; Cj represents a completion time of computing task j.