Patent ID: 11935613
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A method comprising:
determining a first value of a reference clock delay (RD) cycle based on a comparison of results of a plurality of read transactions with a Double Data Rate (DDR) flash memory, each read transaction performed using values of a transmit clock delay and a receive clock delay of one set of parameters and a test value of the RD cycle, wherein the test value of the RD cycle is a different value in each of the plurality of read transactions and the first value of the RD cycle is set to a smallest value of the RD cycle that results in a successful read transaction with the DDR flash memory;
determining a second value of the RD cycle based on a comparison of results of a plurality of read transactions with the DDR flash memory, each read transaction performed using the values of the transmit clock delay and the receive clock delay of another set of parameters and a test value of the RD cycle, wherein the test value of the RD cycle is a different value in each of the plurality of read transactions and the second value of the RD cycle is set to the smallest value of the RD cycle that results in a successful read transaction with the DDR flash memory
determining largest and smallest successful values of the receive clock delay;
determining largest and smallest successful values of the transmit clock delay;
setting a first set of parameters for a Serial Peripheral Interface (SPI) coupled to the DDR flash memory, the first set of parameters comprising the largest successful value of the transmit clock delay, the largest successful value of the receive clock delay, and a first value of the RD cycle;
setting a second set of parameters for the SPI, the second set of parameters comprising the smallest successful value of the transmit clock delay, the smallest successful value of the receive clock delay, and a second value of the RD cycle;
selecting one of the first and second sets of parameters based on determining whether the first set of parameters results in successfully reading from the DDR flash memory over a larger range of operating temperatures of a device performing the method than the second set of parameters; and
programming the SPI using the selected one of the first and second sets of parameters.