Patent ID: 11887978
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 12:
13. A method comprising:
forming a first layer including a first backside metal rail and a second backside metal rail separated by a distance along a first direction;
forming a second layer above the first layer along a second direction perpendicular to the first direction, wherein the second layer includes a first active region of one or more first transistors and a second active region of one or more second transistors, wherein the first backside metal rail is electrically coupled to the first active region through a first via contact, wherein the second backside metal rail is electrically coupled to the second active region through a second via contact, wherein the first active region has a length along the first direction larger than four times the distance; and
forming a third layer above the second layer along the second direction, wherein the third layer includes a front side metal rail electrically coupled to the first active region through a third via contact.