Patent ID: 11908937
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. The semiconductor structure of claim 6, further including:
an interlevel dielectric layer encasing portions of the first and second sets of transistors;
first and second buried contacts within the interlevel dielectric layer;

the first buried contact electrically strapping the metal silicide contact wrapped around the merged source/drain regions comprising the first active region with a gate of one of the second set of transistors, the first buried contact extending partially within one of the shallow trench isolation regions; and
the second buried contact electrically strapping the metal silicide contact wrapped around the merged source/drain regions comprising the second active region with a gate of one of the first set of transistors, the second buried contact extending partially within the one of the shallow trench isolation regions.