Patent ID: 11881465
Assignee: KIOXIA CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 15:
16. A semiconductor storage device, comprising:
a first chip having a first semiconductor substrate on which a memory cell array and a plurality of high voltage transistors are formed, and a plurality of first bonding electrodes electrically connected to at least a portion of the plurality of high voltage transistors; and
a second chip having a second semiconductor substrate on which a plurality of low voltage transistors are formed and a plurality of second bonding electrodes electrically connected to at least a portion of the plurality of low voltage transistors, and bonded to the plurality of first bonding electrodes, wherein
the memory cell array includes a plurality of first conductive layers arranged in a first direction intersecting a surface of the first semiconductor substrate, and extending in a second direction intersecting the first direction, a plurality of semiconductor columns extending in the first direction and facing the plurality of first conductive layers, and a plurality of first charge storage films formed between the plurality of first conductive layers and each of the semiconductor columns,
the high voltage transistors and the low voltage transistors are transistors of a peripheral circuit for the memory cell array, and each transistor of the peripheral circuit to which more than 5V is supplied is a high voltage transistor that is formed on the first semiconductor substrate, and
a thickness of a gate insulating film in each of the low voltage transistors in the first direction is smaller than a thickness of a gate insulating film of any of the high voltage transistors in the first direction.