Patent ID: 11957070
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. The memory cell of claim 1, wherein the memory device comprises:
a bottom electrode;
a top electrode, disposed on the bottom electrode; and
a storage layer, disposed between the top electrode and the bottom electrode, wherein the top electrode is located between the storage layer and the connecting structure,
wherein a sidewall of the bottom electrode is substantially aligned with a sidewall of the storage layer, a sidewall of the top electrode and a sidewall of the connecting structure, and
wherein in a stacking direction of the memory device and the selector, a cross section of the bottom electrode, a cross section of the storage layer, a cross section of the top electrode and a cross section of the connecting structure comprise a strip-shape being substantially flat and planar to a plane perpendicular to the stacking direction.