Patent ID: 11914451
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. The apparatus of claim 7 wherein the third clamp circuit comprises:
a first transistor coupled to the second power node and the second internal power node, the first transistor configured to provide a voltage from the second power node to the second internal power node when activated;
a first diode-coupled transistor coupled to the second internal power node and a body of the first transistor;
a second diode-coupled transistor coupled to the second power node and the body of the first transistor;
a second transistor coupled to the body of the first transistor and the second power node, the second transistor configured to provide the second power voltage to the body of the first transistor when activated; and
a third transistor coupled to the body of the first transistor and the second internal power node, the third transistor configured to provide a voltage of the second internal power node to the body of the first transistor when activated.