Patent ID: 11887328
Assignee: VERGESENSE, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. The method of claim 17:
further comprising, for each sensor block in the set of sensor blocks during the setup period:
calculating a quantity of tiles extracted from the image based on the set of tiles;

wherein transmitting the set of tiles to the computer system for each sensor block in the set of sensor blocks comprises, for each sensor block in the set of sensor blocks, transmitting the set of tiles to the computer system:
in response to the quantity of tiles exceeding the threshold quantity of tiles; and
in response to the setup period intersecting the time window for tile transmission; and

further comprising, during the setup period, at the computer system:
assembling the set of tiles into a sparse image map of the region-of-interest in the set of regions-of-interest; and
interpolating a set of empty subregions in the sparse image map based on features in the set of tiles to generate the commissioning image.