Patent ID: 11923013
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 7:
8. The method according to claim 4, further comprises:
supplying a plurality of different program voltages to a second word line connected to the one of the second memory blocks during the second write sequence, wherein
said supplying the plurality of different program voltages to the second word line comprises supplying two or more of the different program voltages to the second word line with a third time interval while the first and second write sequences are being performed,
said supplying the plurality of different program voltages to the second word line comprises supplying two or more of the different program voltages to the second word line with a fourth time interval after the first write sequence is completed, and
the fourth time interval is shorter than the third time interval.