Patent ID: 11902170
Assignee: nan
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A switch, comprising:
an accounting-structure-establishing logic block to establish a hierarchical accounting structure to determine utilizations of different elements of a buffer on the switch, wherein the hierarchical accounting structure comprises one or more parent elements, and wherein each parent element is associated with one or more child elements;
a base-utilization-determination logic block to determine a base utilization of a child element based on an amount of buffer space allocated to the child element and an amount of buffer space used by the child element;
an adaptive-utilization-determination logic block to determine an adaptive utilization of the child element based at least on the base utilization of the child element and a congestion state of a corresponding parent element, wherein the adaptive-utilization-determination logic determines the adaptive utilization of the child element by performing a table lookup operation; and
an admission-check logic block to determine whether to store a packet associated with the child element in the buffer based on the adaptive utilization of the child element.