Patent ID: 11971776
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. A memory device comprising:
an interface to receive a signal at the memory device; and
a processor configured to execute instructions stored on one or more components in the memory device, which instructions, when executed by the processor, cause the memory device to perform operations, the operations comprising:
interpreting, using a standardized protocol in the received signal, presence of a trigger signal to dump an error log of the memory device to a non-volatile memory storage in the memory device; and
dumping the error log to the non-volatile memory storage of the memory device, in response to identifying the trigger signal in the received signal, including dumping a pre-defined application-specific integrated circuit registration address and a selected region of the non-volatile memory storage of the memory housing the error log into one single-level cell block of the memory device.