Patent ID: 11862570
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. A semiconductor package comprising:
a substrate including a first insulating layer, first conductive patterns in the first insulating layer, an upper passivation film, and first upper pads;
an interposer disposed on a top surface of the substrate and including a second insulating layer, second conductive patterns in the second insulating layer, first lower pads, and a lower passivation film which covers at least parts of the first lower pads; and
supporting members disposed between the substrate and the interposer, including solder parts which are in contact with a top surface of the first upper pads and a bottom surface of the first lower pads, and core parts which are disposed in the solder parts and include a different material from the solder parts,
wherein the upper passivation film and the first upper pads are formed on a top surface of the first insulating layer,
wherein the upper passivation film covers at least parts of the first upper pads so as to include a top surface that is at a higher vertical level in a direction perpendicular to the top surface of the substrate than top surfaces of the first upper pads,
wherein the lower passivation film and the first lower pads are formed on a bottom surface of the second insulating layer,
wherein a distance from the top surface of the substrate to a bottom surface of the interposer is 120 μm to 200 μm,
wherein a height of the core parts is 90 μm to 180 μm, and
wherein the supporting members do not electrically connect the first conductive patterns and the second conductive patterns.