Patent ID: 11966327
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory system comprising:
a nonvolatile memory that includes a plurality of memory areas including at least a first memory area and a second memory area different from the first memory area, each of the plurality of memory areas including a memory cell array; and
a memory controller configured to control the nonvolatile memory,
wherein
a read operation includes a first operation of reading data from the memory cell array and a second operation of transmitting at least a part of the read data from the nonvolatile memory to the memory controller, and
the memory controller is configured to, when executing the read operation in the first memory area and the read operation in the second memory area in parallel;
calculate a first total time period required for the first operation and the second operation in the first memory area, based on a first search result of a valid cluster to be read from the first memory area by the read operation;
calculate a second total time period required for the first operation and the second operation in the second memory area, based on a second search result of a valid cluster to be read from the second memory area by the read operation; and
determine priorities of the second operation in the first memory area and the second operation in the second memory area, based on a result of comparison between the first total time period required for the first operation and the second operation in the first memory area and the second total time period.