Patent ID: 11881266
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 19:
20. The method as set forth in claim 19, further including the steps of:
continuing floating the plurality of semi-circle bit lines at the bit line pre-charge voltage during the erase operation; and
driving the plurality of full circle bit lines from zero volts to an erase voltage during the erase operation and causing the semi-circle erase voltage on each of the plurality of semi-circle bit lines to increase due to the capacitive coupling between each of the plurality of semi-circle bit lines and at least one neighboring one of the plurality of full circle bit lines adjacent to each of the plurality of semi-circle bit lines, the semi-circle erase voltage being equal to the bit line pre-charge voltage plus the erase voltage.