Patent ID: 11949022
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An electronic system comprising:
supervisory circuitry to generate memory control commands; and
at least one memory, coupled to the supervisory circuitry, to respond to the memory control commands, the at least one memory comprising:
at least one source line over an upper surface of a substrate, the at least one source line having a vertical thickness and consisting of a heavily doped metallic silicide throughout the vertical thickness; and
two or more vertical NAND flash strings with select gates disposed over the source line, each of the two or more vertical NAND flash strings comprising insulating layers, conductive layers, and a pillar of semiconductor material extending through the insulating layers and conductive layers, and partially through one source line of the at least one source line, the pillar being in ohmic contact with the one source line.