Patent ID: 11908795
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A structure comprising:
a first through via over and electrically coupled to a first die;
a second die over the first die;
an encapsulant on sidewalls of the first die, the second die, and the first through via;
a first redistribution structure over the second die, the first through via, and the encapsulant, the first redistribution structure comprising:
a dielectric layer over the second die, the first through via, and the encapsulant;
a first via in the dielectric layer and on the first through via; and
a first metallization pattern on the first via, a sidewall of the first metallization pattern directly overlying the first through via,
wherein the first die is electrically coupled to the second die through the first through via and at least a portion of the first redistribution structure.