Patent ID: 11862698
Assignee: TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A method of manufacturing a semiconductor device, comprising:
forming a trench in a first semiconductor region of a first conductive type from a surface of the first semiconductor region in a first direction;
forming a first insulating portion on a surface of the trench;
forming a first conductive portion on the first insulating portion in the trench;
forming a second conductive portion in contact with the first conductive portion and having an impurity concentration lower than an impurity concentration of the first conductive portion, the first conductive portion being disposed between the first insulating portion and the second conductive portion in the first direction;
removing a part of the first insulating portion to expose a part of the second conductive portion and a part of an inner wall of the trench in a second direction crossing the first direction;
forming a second insulating portion by oxidizing a surface of the second conductive portion;
forming a third insulating portion by oxidizing the inner wall of the exposed trench;
forming a gate electrode between the second insulating portion and the third insulating portion;
forming a second semiconductor region of a second conductive type facing the gate electrode in the first semiconductor region, the third insulating portion interposed between the second semiconductor region and the gate electrode in the second direction; and
forming a third semiconductor region of the first conductive type between the surface and the second semiconductor region.