Patent ID: 11887955
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A semiconductor structure comprising a semiconductor die, wherein:
the semiconductor die comprises dielectric material layers embedding metal interconnect structures and a bump structure that includes a bonding bump portion and a bump via portion extending toward the metal interconnect structures, and further comprises a connection pad-and-via structure located between the bump via portion and the metal interconnect structures and comprising a connection via portion that vertically extends through a pad-level dielectric material layer and contacts one of the metal interconnect structures and comprising a pad portion contacting a horizontal surface of the pad-level dielectric material layer and contacting the bump via portion;
a solder material portion is attached to the bump structure; and
a vertical axis passing through a geometrical center of the solder material portion is laterally offset from a vertical axis passing through a geometrical center of the bump via portion.