Patent ID: 11949016
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A method of fabricating a semiconductor device, comprising:
providing a fin extending from a substrate;
forming a gate structure over the fin;
forming a source/drain feature within a source/drain region adjacent to the gate structure, wherein the source/drain feature includes a first epitaxial layer and a second epitaxial layer over the first epitaxial layer; and
doping the source/drain feature to provide a graded doping profile within the source/drain feature, wherein the graded doping profile is defined along a direction perpendicular to a top surface of the substrate;
wherein each of the first and second epitaxial layers include the graded doping profile, wherein the first epitaxial layer includes a graded carbon-doped layer, and wherein a first doping concentration of a bottom portion of the first epitaxial layer is greater than a second doping concentration of a top portion of the first epitaxial layer.