Patent ID: 11947999
Assignee: IMAGINATION TECHNOLOGIES LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 0:
1. A multithreaded single instruction multiple data (SIMD) microprocessor configured to execute a program divided into discrete phases of programming instructions by phase instructions, the phase instructions being provided at points in the program where resource requirements of the program change, the microprocessor configured such that a plurality of data instances can be processed by a single thread of programming instructions, the microprocessor comprising:
a scheduler for scheduling phases of the program to be executed on the microprocessor wherein the phase instructions allow the scheduler to schedule each phase of the program separately; and
a plurality of resources for executing a phase of programming instructions in the form of one or more threads issued by the scheduler;
wherein the scheduler is configured during scheduling of each phase of the program subsequent to a first phase to determine a number of threads and a number of data instances to be allocated to each of the determined number of threads for that phase of the program based on a maximum number of data instances allowed per thread and on a result of a preceding phase of the program.