Patent ID: 11901446
Assignee: UNITY POWER TECHNOLOGY LIMITED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A silicon carbide MOSFET device, comprising:
a) a silicon carbide substrate of a first dopant type;
b) a first silicon carbide layer of the first dopant type on top of the silicon carbide substrate, the first silicon carbide layer having lower doping than the silicon carbide substrate and defining a drift region;
c) a second silicon carbide layer of a second dopant type embedded in a top portion of the first silicon carbide layer; the second silicon carbide layer comprising a plurality of second portions that run substantially along a first direction;
d) a third silicon carbide layer of the first dopant type embedded in a top portion of the second silicon carbide layer; the third silicon carbide layer having higher doping than the first silicon carbide layer; the third silicon carbide layer comprising a plurality of third portions that run substantially along the first direction; and
e) a gate oxide layer overlapped to the first silicon carbide layer, the second silicon carbide layer and the third silicon carbide layer; and in touch with a polysilicon layer;
wherein, the device further comprises a fourth silicon carbide layer at least partially overlapping with the second silicon carbide layer along a direction normal to the silicon carbide substrate; the fourth silicon carbide layer, which has higher doping than the second silicon carbide layer, comprising a plurality of fourth portions that run substantially along a second direction perpendicular to the first direction; the first and second directions each being parallel to the silicon carbide substrate;
wherein the first dopant type is N and the second dopant type is P: the third silicon carbide layer being a N+ layer, and the third portions of the third silicon carbide layer being separated from each other along the second direction; the fourth silicon carbide layer being a P+ layer, and the fourth portions are P+ portions which are separated from each other along the first direction; and
wherein the second silicon carbide layer comprises a plurality of P-well regions separated from each other along the second direction.