Patent ID: 11942459
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A semiconductor device package comprising:
a first substrate having an electrical circuit;
a plurality of semiconductor dies stacked one on top of the other and positioned above the first substrate;
a plurality of bond wires electrically connected one to another and electrically coupling the plurality of semiconductor dies to one another and to the electrical circuit on the first substrate, the plurality of bond wires including a first bond wire having a first portion connected to a first semiconductor die of the plurality of semiconductor dies, a second portion connected to the electrical circuit of the first substrate, and an intermediate portion between the first portion and second portion;
a molding compound encapsulating the plurality of semiconductor dies, the first portion of the first bond wire, and second portion of the first bond wire, wherein the molding compound has top and side planar surfaces, the side planar surface being substantially perpendicular to the top planar surface;
wherein the intermediate portion of the first bond wire is exposed along the side planar surface of the molding compound; and
wherein the intermediate portion of the first bond wire is configured to contact a conductive component.