Patent ID: 11973083
Assignee: TSMC CHINA COMPANY, LIMITED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of making a semiconductor device, comprising:
surrounding a first bias pad with dielectric material;
adding dopants to a layer of semiconductor material over the first bias pad;
depositing a gate dielectric and a gate electrode material over a top surface of the layer of semiconductor material;
etching the gate dielectric and the gate electrode material to isolate a first gate electrode over the layer of semiconductor material;
depositing an inter layer dielectric (ILD) material over the first gate electrode and the layer of semiconductor material;
etching at least one bias contact opening down to the first bias pad;
filling the at least one bias contact opening with a bias contact material; and
electrically connecting at least one bias contact to an interconnect structure of the semiconductor device.