Patent ID: 11928415
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. A system, comprising:
a hard-to-six (HTF) design rule check (DRC) violation prediction platform comprising a memory and a processor, wherein the memory is configured to store data and processing instructions, and wherein the processor is configured to execute the processing instructions to cause the HTF DRC violation prediction platform to:
train a machine learning model with a plurality of electronic circuit placement layouts;
predict, by the machine learning model, fix rates of DRC violations of a new electronic circuit placement layout; and
identify HTF DRC violations based on the fix rates of the DRC violations of the new electronic circuit placement layout, wherein to identify the HTF DRC violations based on the fix rates of the DRC violations of the new electronic circuit placement layout the processor is configured to execute the processing instructions to cause the HTF DRC violation prediction platform to:
compare the fix rates of the DRC violations of the new electronic circuit placement layout to a threshold fix rate; and
determine that the fix rates of the DRC violations of the new electronic circuit placement layout are HTF DRC violations when the fix rates of the DRC violations of the new electronic circuit placement layout are below the threshold fix rate; and

an engineering change order (ECO) configured to fix the HTF DRC violations.