Patent ID: 11916031
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A method of forming a semiconductor package, the method comprising:
forming a first interconnect structure over a first substrate;
depositing a first dielectric layer over the first interconnect structure;
forming a first plurality of bond pads in the first dielectric layer, the first plurality of bond pads comprising a first ring of bond pads, a second ring of bond pads, and a third ring of bond pads, one of the first plurality of bond pads being a first distance from a centermost point of the first dielectric layer;
thinning the first substrate, thinning the first substrate resulting in the one of the first plurality of bond pads being a second distance from the centermost point of the first dielectric layer, the second distance being greater than the first distance;
placing an integrated circuit die on the first plurality of bond pads, the integrated circuit die comprising a second plurality of bond pads, one of the second plurality of bond pads being the second distance from the centermost point of the first dielectric layer; and
performing a thermal treatment to bond the second plurality of bond pads of the integrated circuit die to the first plurality of bond pads.