Patent ID: 11901294
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A semiconductor device, comprising:
a substrate having a top surface;
one or more transistors disposed above the top surface of the substrate;
one or more buried signal lines disposed in one or more corresponding first trenches in the substrate below the top surface of the substrate, at least one of the one or more buried signal lines being electrically coupled to the semiconductor device;
a metal layer disposed above the top surface of the substrate; and
one or more buried power rails in one or more corresponding second trenches in the substrate below the top surface of the substrate, a top surface of at least one buried power rail being coplanar with the top surface of the substrate, and a first buried power rail being coupled to a first predetermined electrical potential.