Patent ID: 11870448
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A phase locked loop (PLL) comprising:
a compensation circuit including:
a resistive element having a resistance responsive to a center frequency of a PLL bandwidth; and
a capacitor circuit coupled to the resistive element;

a transconductance circuit including:
a first current source having a first current source output, wherein the first current source is configured to provide a first current at the first current source output responsive to the center frequency; and
an error amplifier having a reference input, first and second amplifier inputs and an amplifier output, wherein the first amplifier input is coupled to the first current source output, the second amplifier input coupled to the capacitor circuit, the error amplifier having a transconductance responsive to the center frequency, and the error amplifier is configured to receive a signal at the second amplifier input responsive to the resistance and to a difference between a clock signal and a feedback signal; and

an oscillator having an oscillator input and an oscillator output, wherein the oscillator is configured to provide a signal at the oscillator output for generating the feedback signal.