Patent ID: 11892505
Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 12:
13. A method comprising:
transitioning from a functional mode of a processing system to a debug mode of the processing system after a debugger is coupled to the processing system, the processing system comprising a main and shadow processing cores operating in lockstep; and
during functional mode:
receiving functional inputs with a main functional core of the main processing system and with a shadow functional core of the shadow processing system,
processing the functional inputs in parallel with the main and shadow functional cores in synchrony with a core clock,
receiving debug data from the debugger in synchrony with a debug clock, the debug clock being asynchronous with the core clock,
synchronizing the debug data to the core clock and providing the synchronized debug data to a debug bus in synchrony with the core clock,

receiving the synchronized debug data from the debug bus with a main debug circuit of the main processing core and with a shadow debug circuit of the shadow processing core,
comparing outputs from the main and shadow functional cores and asserting an alarm signal when a discrepancy between the outputs from the main and shadow functional cores is detected, and
reacting to the assertion of the alarm signal.