Patent ID: 11942138
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. An operation method of a memory system, comprising:
providing, at a memory device, row-hammer data to set refresh rates for adjacent word lines of a target word line;
generating, at a memory controller, a plurality of sampling addresses by sampling an active address;
generating, at the memory controller, a plurality of counting values corresponding to the plurality of sampling addresses by comparing the plurality of sampling addresses with the active address and incrementing a counting value of the plurality of counting values for a match in the comparing of the plurality of sampling addresses with the active address;
calculating, at the memory controller and when there is the match between the plurality of sampling addresses and the active address, a plurality of adjacent addresses corresponding to and incrementally changed from the plurality of sampling addresses based on the plurality of counting values and the row-hammer data;
providing, at the memory controller, the plurality of adjacent addresses as a row-hammer address with a target refresh command; and
performing, at the memory device, a target refresh operation on one or more word lines corresponding to the row-hammer address according to the target refresh command.