Patent ID: 11861286
Assignee: SYNOPSYS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method, comprising:
for each defect in a set of defects, associating the defect with a defect attribute constructed from a set of computer-aided design (CAD) identifiers associated with polygons in an integrated circuit (IC) design that overlap with a defect area of the defect;
segregating, by a processor, the set of defects into defect groups based on the associated defect attributes, wherein segregating the set of defects into defect groups based on the associated defect attributes comprises using a machine learning (ML) clustering technique; and
using the defect groups to perform additional processing on the set of defects, wherein the additional processing comprises analyzing defects in a given defect group to identify a root cause for the defects in the given defect group.