Patent ID: 11935579
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 9:
10. A memory, comprising a command decoding module and a protection circuit, wherein the protection circuit comprises:
a first protection unit, wherein the first protection unit is configured to receive a first input signal and a control signal, and is configured to output a first output signal; and
a first element to be protected comprising a first P-type transistor, wherein a gate of the first P-type transistor is configured to receive the first output signal,
wherein when the chip enters a burn-in test, the first output signal is a high-level signal, and the command decoding module is configured to output the control signal,
wherein the command decoding module is configured to output the control signal which is the first level signal when receiving a start command for the burn-in test, and output the control signal which is the second level signal when receiving an end command for the burn-in test.