Patent ID: 11888731
Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC G  H

Claim 0:
1. A device, comprising: a memory storing instructions; and processing circuitry, wherein the instructions, when executed by the processing circuitry, cause the processing circuitry to perform operations comprising: receiving a packet comprising one or more labels from a second device over a network, wherein each of the one or more labels identifies a path through the network for the packet; detecting congestion on the network; generating a first copy of the packet; performing an action on the one or more labels of the first copy of the packet, wherein the action comprises at least one of: adding a first new label to the one or more labels, swapping one of the one or more labels with a second new label, and removing one of the one or more labels; generating, responsive to detecting the congestion, a second copy of the packet; adding congestion information into the second copy of the packet; performing the action on the second copy of the packet; and providing the first copy and the second copy including the congestion information to a third device over the network.