Patent ID: 11862605
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A semiconductor structure comprising:
a die structure comprising a first integrated circuit die;
a die stack bonded to the die structure, the die stack comprising a second integrated circuit die;
a heat dissipation structure bonded to the die structure adjacent the die stack, a top surface of the heat dissipation structure being substantially level with a top surface of the die stack, the heat dissipation structure comprising a stack of dummy structures, adjacent dummy structures being separate one from another by an insulating layer;
a base structure bonded to the die stack and the heat dissipation structure, the second integrated circuit die being interposed between the first integrated circuit die and the base structure; and
a first encapsulant interposed between the die stack and the heat dissipation structure.