Patent ID: 11870426
Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 1:
2. The semiconductor relay of claim 1,
wherein the output circuit includes a first output MOSFET and a second output MOSFET whose sources are connected in inverse series to each other,
the charging/discharging circuit includes a depletion-mode MOSFET and a third resistor connecting a gate and source of the depletion-mode MOSFET together, the charging/discharging circuit charges a gate of the first output MOSFET and a gate of the second output MOSFET using the voltage generated by the booster circuit to put the first output MOSFET and the second output MOSFET into a conductive state, so that an electrical continuity is established between the pair of output terminals, and
when no input signal is supplied, the charging/discharging circuit discharges the gate of the first output MOSFET and the gate of the second output MOSFET to put the first output MOSFET and the second output MOSFET into a non-conductive state, so that an open-circuit condition is created between the pair of output terminals.