Patent ID: 11861197
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. An information processing system comprising:
a host;
a memory system connected to the host in a communicable manner and, wherein
a non-volatile memory including a plurality of blocks, wherein
the host is configured to manage validity of data written in the non-volatile memory using a data map,
the data map includes a plurality of first fragment tables,
each of the first fragment tables stores first information and second information, the first information indicative of the validity of each data having a predetermined size written in a range of physical address in the non-volatile memory allocated to the first fragment table, the second information indicative of the validity of a plurality of data having the predetermined size in each of a predetermined number of entries, and
the host is configured to select a write destination block based on a size of write data requesting to the memory system to be written to the non-volatile memory.