Patent ID: 11860222
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 14:
15. An apparatus for testing crosstalk effect, comprising:
a processor; and
a memory for storing instructions executable by the processor;
wherein the processor is configured to:
obtain a test signal and an interference input signal;
input the test signal and the interference input signal into a crosstalk effect test circuit obtained by simulation, so as to obtain an interfered signal, wherein the crosstalk effect test circuit comprises a first circuit, N second circuits, and N capacitors, the first circuit is configured to simulate an interfered first signal circuit in an integrated circuit under test, an input end of the first circuit is configured to receive the test signal, and an output end of the first circuit is configured to output the interfered signal; the N second circuits are configured to simulate N second signal circuits that interfere with the first signal circuit in the integrated circuit under test, N is an integer greater than 0 and less than or equal to 5, an input end of each second circuit is configured to receive the interference input signal, and an output end of each second circuit is configured to output an interference signal; and one pole plate of each of the N capacitors is connected to the first circuit, the other pole plate of the capacitor is connected to the second circuit, and a capacitance value of the capacitor is determined according to a measured coupling capacitance value between the second signal circuit and the first signal circuit; and
determine that an excessive crosstalk effect exists in the integrated circuit under test when a rise time of the interfered signal or a fall time of the interfered signal is greater than a preset time threshold.