Patent ID: 11972806
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method of reading memory cells in a memory device, comprising the steps of:
preparing a memory block that includes a plurality of memory cells arranged in a plurality of word lines, the memory cells being programmed to multiple bits per memory cell, and the memory block including a voltage driver that is located on one side of the word lines;
separating the memory cells of a selected word line of the plurality of word lines into a first group of memory cells that located on a side of the word line are near the voltage driver and a second group of memory cells that are located on an opposite side of the word line from the voltage driver; and
reading the memory cells of the first group of memory cells using a first read mode and reading the memory cells of the second group using a second read mode that is different than the first read mode to reduce a fail bit count.