Patent ID: 11868616
Assignee: ATOMBEAM TECHNOLOGIES INC
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A system for low-distortion compaction of floating-point numbers, comprising:
a computing device comprising a processor, a memory, and a non-volatile data storage device;
a pre-encoder comprising a first plurality of programming instructions stored in the memory and operable on the processor, wherein the first plurality of programming instructions, when operating on the processor, causes the processor to:
receive a data set for encoding, the data set comprising one or more floating-point numbers;
scan the data set to identify the one or more floating-point numbers;
for each identified floating-point number in the data set:
pre-encode the floating-point number into a binary string representation;
replace the floating-point number with its binary string representation in the data set to create a pre-encoded data set;
create an index and logically link the binary string representation with the index, wherein the index indicates the binary string represents a floating-point number in the pre-encoded data set; and
send the pre-encoded data set to a data deconstruction engine; and

the data deconstruction engine comprising a second plurality of programming instructions stored in the memory and operable on the processor, wherein the second plurality of programming instructions, when operating on the processor, causes the processor to:
receive a pre-encoded data set;
deconstruct the pre-encoded data set into a plurality of sourceblocks; and
compact each of the plurality of sourceblocks by assigning a codeword to a reference code associated with each of the plurality of sourceblocks.