Patent ID: 11880591
Assignee: nan
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 16:
17. The method of claim 13, wherein determining the voltage level of the signal that occurs at the first clock phase further comprises:
comparing the signal that occurs at the first clock phase with a plurality of reference voltages, wherein modifying the signal sent to the second circuit is based at least in part on comparing the signal with the plurality of reference voltages, the method further comprising:
generating the first feedback signal based at least in part on comparing the signal that occurs at the first clock phase with the plurality of reference voltages; and
sending the first feedback signal to the second circuit based at least in part on generating the first feedback signal;
receiving, by a decoder, the first feedback signal; and
determining a symbol associated with the signal transmitted during the first clock phase based at least in part on the first feedback signal.