Patent ID: 11894059
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A memory system, comprising:
a memory device including plural non-volatile memory cells; and
a controller configured to receive a write command and write data from a host, determine a location in which the write data is stored in the memory device, and transfer the write data to the memory device,
wherein the memory device is configured to:
determine a program mode which causes a change of threshold voltages of the plural non-volatile memory cells, and
change a level of a pass voltage, which is applied to other non-volatile memory cells coupled to the plural non-volatile memory cells, from a first level to a second level which is higher than the first level or a setup time for changing a potential of a bit line coupled to the at least one non-volatile memory cell, according to the program mode, and
wherein the determining and the changing are performed during a data program operation of applying a plurality of program pulses to program the write data to the plural non-volatile memory cells.