Patent ID: 11916840
Assignee: QUALCOMM INCORPORATED
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A receiving device, comprising:
a memory;
a transceiver; and
one or more processors operatively coupled with the memory and the transceiver, the one or more processors configured to:
compute a current data rate;
determine that a data transmission is in a first state by a comparison of the current data rate to a threshold data rate;
temporarily suspend aggregation of received information relating to at least one received communication packet in response to a determination that the data transmission is in the first state;
compute a second current data rate;
determine that the data transmission is in a second state based on the second current data rate being less than the threshold data rate and the second current data rate remaining within a percentage range of a rate over an amount of time; and
transmit, in response to the data transmission being in the second state, at least one acknowledgement (ACK) to a sending device, the at least one ACK being based, at least in part, on the received information.