Patent ID: 11947486
Assignee: HITACHI ASTEMO, LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An electronic computing device, comprising:
a first computing resource configured to execute first instructions;
a second computing resource configured to execute second instructions; and
a third computing resource configured to manage execution of the second instructions on the second computing resource based on at least one instruction of the first instructions from the first computing resource, wherein:
the first computing resource is a first CPU,
the second computing resource is a second CPU or dedicated hardware,
the third computing resource is a third CPU,
each of the first CPU, the second CPU, and the third CPU includes a plurality of cores,
a core that manages execution of the second instructions by the second computing resource is selected by an operating system (OS), and
the OS selects a core that receives a completion notification at a start of data transfer between the second computing resource and the first computing resource and at a start of execution of the second instructions by the second computing resource.