Patent ID: 11870570
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Digital communication (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 15:
16. A signal receiving device comprising:
a clock recovery circuit configured to recover a clock signal from an input signal to generate a recovered clock signal;
a first sampler configured to extract a first sampling value from the input signal based on the recovered clock signal and a reference voltage;
a second sampler configured to extract a second sampling value from the input signal based on a first offset clock signal in which a first horizontal offset is applied to the recovered clock signal and a first offset voltage in which a first vertical offset is applied to the reference voltage;
a third sampler configured to extract a third sampling value from the input signal based on a second offset clock signal in which a second horizontal offset is applied to the recovered clock signal and a second offset voltage in which a second vertical offset is applied to the reference voltage; and
an output circuit configured to output a first error count signal by comparing the first sampling value with the second sampling value and output a second error count signal by comparing the first sampling value with the third sampling value.