Patent ID: 11862594
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A method of manufacturing a package structure, comprising:
providing a carrier;
forming a solder resist layer with a material comprising a filler on the carrier, wherein the solder resist layer is photosensitive;
disposing a semiconductor die and conductive pillars on the solder resist layer;
encapsulating the semiconductor die and the conductive pillars in the insulating encapsulation, and the conductive pillars penetrating through the insulating encapsulation;
forming a first redistribution circuit structure on the insulating encapsulation;
disposing first conductive elements over an outermost surface of the solder resist layer, the first conductive elements being electrically coupled to the conductive pillars, the conductive pillars being between the first redistribution circuit structure and the first conductive elements;
disposing second conductive elements on the first redistribution circuit structure, the second conductive elements being electrically coupled to the first redistribution circuit structure, and first redistribution circuit structure being between the insulating encapsulation and the second conductive elements; and
disposing at least one semiconductor device on the first redistribution circuit structure, the at least one semiconductor device being electrically coupled to the first redistribution circuit structure, wherein the second conductive elements and the at least one semiconductor device are disposed on a side of the first redistribution circuit structure.