Patent ID: 11862732
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A method for forming a semiconductor device structure, comprising:
providing a substrate having a first fin, wherein the first fin has a channel region and a source/drain (S/D) region;
forming a stack structure over the first fin, wherein the stack structure comprises a plurality of first semiconductor layers and a plurality of second semiconductor layers vertically stacked over the first fin;
removing a portion of the second semiconductor layers in the channel region, wherein a portion of the first semiconductor layers is remaining in the channel region;
forming a plurality of cladding layers over the remaining first semiconductor material layers in the channel region to form nanostructures, wherein each of the nanostructures has a dumbbell shape, a first cladding layer and a second cladding layer surround two adjacent nanostructures, and the first cladding layer is separated from the second cladding layer; and
forming a gate structure surrounding the nanostructures.