Patent ID: 11943913
Assignee: WINBOND ELECTRONICS CORP.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 2:
3. The method of manufacturing the semiconductor structure as claimed in claim 1, wherein an upper portion of sidewalls of the barrier material layer is exposed in the trench after the first work function material layer is recessed, and wherein forming the mask comprises:
conformably depositing a first dielectric material layer on a top surface and the upper portion of sidewalls of the barrier material layer, wherein the first dielectric material layer forms an opening in the trench;
filling the opening with a second dielectric material layer; and
removing a portion of the first dielectric material layer that is not covered by the second dielectric layer to form the mask,
wherein the mask comprises a portion of the second dielectric material layer that fills the opening and a remaining portion of the first dielectric material layer.