Patent ID: 11894317
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A package structure, comprising:
a wiring structure;
a first electronic device disposed over the wiring structure;
a second electronic device disposed over the wiring structure;
a stiff layer disposed in a gap between the first electronic device and the second electronic device; and
an underfill disposed between the stiff layer and the wiring structure;
wherein a first interface is formed between the underfill and the stiff layer, an elevation of the first interface is lower than an elevation of the first electronic device or an elevation of the second electronic device, and the first interface is spaced apart from the wiring structure, wherein the first electronic device and the second electronic device are spaced apart from the underfill by the stiff layer, wherein a first space is defined between the first electronic device and the wiring structure, the first electronic device includes a plurality of electrical contacts in the first space, wherein the stiff layer extends into the first space, and a portion of the stiff layer is disposed between adjacent two of the plurality of electrical contacts.