Patent ID: 11967037
Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Field: Computer technology (Electrical engineering)
Classification: CPC G  B | IPC B  G

Claim 4:
5. An apparatus comprising:
a memory;
a processor in electronic communication with the memory, wherein the processor is to:
perform a first registration of a three-dimensional (3D) object model with a scan based on a first minimum bounding box of the 3D object model and a second minimum bounding box of the scan to determine whether the first registration satisfies an alignment verification threshold that is at least 75%;
perform a second registration of the 3D object model with the scan in response to determining that the first registration does not satisfy the alignment verification threshold, wherein the second registration is randomized; and
determine a deformation of the scan relative to the 3D object model in response to determining that the second registration satisfies the alignment verification threshold.