Patent ID: 11888065
Assignee: LG DISPLAY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A thin film transistor array substrate comprising:
a substrate;
a first active layer disposed on the substrate, wherein the first active layer comprises a first channel region overlapping a first gate electrode and a first region and a second region which are made conductive and spaced apart from each other with the first channel region interposed therebetween;
a first gate insulating film disposed on the first active layer;
the first gate electrode disposed on the first gate insulating film to overlap a part of the first active layer;
a first insulating film disposed on the first gate electrode;
a second active layer disposed on the first insulating film to overlap the first active layer and the first gate electrode, wherein the second active layer comprises a second channel region overlapping a second gate electrode and a third region and a fourth region which are made conductive and spaced apart from each other with the second channel region interposed therebetween;
a second gate insulating film disposed on the second active layer; and
the second gate electrode disposed on the second gate insulating film to overlap a part of the second active layer,
wherein the first gate electrode and the second gate electrode overlap each other, wherein a part of at least one of the third region or the fourth region of the second active layer extends from a bottom surface of the at least one of the third region or the fourth region toward at least one of the first region or the second region of the first active layer to contact the at least one of the first region or the second region through a contact hole in the first insulating film.