Patent ID: 11887686
Assignee: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. An apparatus for predicting rowhammer attack vulnerability of one or more memory cells of a direct random access memory (DRAM) chip, the DRAM chip comprising a plurality of memory cells, the apparatus comprising at least one processor and at least one memory storing instructions that, with the at least one processor, configure the apparatus to:
for each memory cell of a subset of memory cells of the plurality of memory cells,
determine a leakage time t;
determine a resistance of intrinsic leakage RL based at least in part on the leakage time t;
determine an activation time of an adjacent aggressor row to flip a bit in the memory cell;
determine a resistance of coupling leaking RSW based at least in part on the activation time;
measure a toggling count; and

identify, based at least in part on one or more of the RSW, RL, or toggling count, whether the direct random memory access (DRAM) chip is vulnerable to a rowhammer attack.