Patent ID: 11929115
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 8:
9. A method for operating a memory device, wherein the memory device comprises a static random access memory (SRAM) cell configured to store complementary data at first and second storage nodes and a non-volatile memory cell comprising a first ferroelectric tunneling junction (FTJ) and a second FTJ selectively connected to the first and second storage nodes, and the method comprises:
pre-programming the first and second FTJs with a first polarization direction, wherein the first and second FTJs are disconnected from the SRAM cell during the pre-programming;
connecting the first and second FTJs to the first and second storages of the SRAM cell before the SRAM cell is switched to a shut down mode, such that one of the first and second FTJs is overwritten with a second polarization direction by one of the first and second storage nodes, and the complementary data is replicated to the non-volatile memory cell; and
charging one of the first and second storage nodes by one of the first and second FTJs after the SRAM cell is switched to an active mode from the shut down mode, so as to rewrite the complementary data to the SRAM cell.