Patent ID: 11929283
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A semiconductor device, comprising:
a gate structure on a substrate, the gate structure having a height HGS;
a source/drain region adjacent to the gate structure;
a dielectric film stack over the gate structure and the substrate, the dielectric film stack comprising
a first interlayer dielectric (ILD) over the substrate and the gate structure, the first ILD having a thickness HILD1;
a barrier layer over the first ILD; and
a second ILD over the barrier layer; and
a contact extending through the dielectric film stack and directly contacting the source/drain region, wherein
a top of the contact has a first diameter;
a bottom of the contact has a second diameter;
a portion of the contact extending through the barrier layer has a third diameter, wherein the first diameter is greater than the third diameter, and the first diameter is less than or equal to twice the third diameter; and
the gate structure height HGS is at least 95% of the first ILD thickness HILD1.