Patent ID: 11942551
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A semiconductor device comprising:
an active pattern including a lower pattern, and a sheet pattern spaced apart from the lower pattern in a first direction;
a gate structure on the lower pattern and including a gate electrode and a gate insulating layer that surrounds the sheet pattern, the gate electrode extending in a second direction perpendicular to the first direction; and
a source/drain pattern on the lower pattern and in contact with the gate insulating layer,
wherein the source/drain pattern includes:
a semiconductor liner layer including an outer sidewall in contact with the gate insulating layer and an inner sidewall opposite to the outer sidewall,
a first semiconductor insertion layer in contact with the semiconductor liner layer on the inner sidewall of the semiconductor liner layer,
a second semiconductor insertion layer on the first semiconductor insertion layer, and
a semiconductor filling layer on the second semiconductor insertion layer, and
wherein the first semiconductor insertion layer covers at least a portion of the inner sidewall of the semiconductor liner layer,
the second semiconductor insertion layer extends along at least a portion of a profile of the first semiconductor insertion layer,
a germanium fraction of the first semiconductor insertion layer is greater than a germanium fraction of the semiconductor liner layer and is less than a germanium fraction of the semiconductor filling layer, and
a germanium fraction of the second semiconductor insertion layer is less than the germanium fraction of the semiconductor liner layer and the germanium fraction of the first semiconductor insertion layer.