Patent ID: 11868221
Assignee: ADVANCED MICRO DEVICES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method for operating a cache using a cache controller in conjunction with a plurality of counters, comprising:
tracking performance events for a plurality of test sets of a cache, by the cache controller the performance events including a miss count for each test set, the tracking including decrementing all miss counts in response to at least one miss count arriving at a maximum value wherein the miss counts are stored in the counters;
detecting a replacement policy change trigger event associated with a test set of the plurality of test sets; and
in response to the replacement policy change trigger event, operating non-test sets of the cache according to a replacement policy associated with the test set, wherein the replacement policy is selected based on the miss counts for each test set.