Patent ID: 11942444
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a semiconductor substrate;
a dielectric layer formed over the semiconductor substrate, the dielectric layer having an upper surface; and
an interconnect structure disposed in the dielectric layer, the interconnect structure including:
at least one conductive element electrically coupled to circuitry in the semiconductor substrate, the at least one conductive element having an end surface,
a continuous region of a first insulating material at least partially between the at least one conductive element, the region having an uppermost surface coplanar with the end surface, and
a perimeter structure of a second insulating material surrounding the at least one conductive element and the region of the first insulating material, an uppermost surface of the perimeter structure being vertically offset from the end surface of the at least one conductive element or the upper surface of the dielectric layer.