Patent ID: 11887923
Assignee: NEXTVPU (SHANGHAI) CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. The wiring structure of claim 1,
wherein no additional pad is provided between the array of the bump pads and only a first edge of the orthographic projection region, and an additional pad is provided between the array of the bump pads and other edges, other than the first edge, of the orthographic projection region; and
wherein the layer of wiring meets a wiring width and wiring pitch specification, and comprises:
a first group of wiring, which leads, with a gap between the array of the bump pads and other edges of the orthographic projection region, a first group of signal pads in the subset of the signal pads out of the orthographic projection region, wherein at least a part of signal pads located in a row in the array that is farthest away from the first edge belongs to the first group of signal pads; and
a second group of wiring, which leads, with a gap between the array of the bump pads and the first edge of the orthographic projection region, remaining signal pads, other than the first group of signal pads, in the subset of the signal pads out of the orthographic projection region.