Patent ID: 11962500
Assignee: MICRON TECHNOLOGY, INC.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. An apparatus, comprising:
a controller of a multi-port storage system, wherein the controller is configured to, responsive to, and concurrent with, a reset of a particular port of the multi-port storage system:
cease outgoing communications from the multi-port storage system via the particular port;
process a first outstanding transaction received from a host associated with the particular port, wherein processing of the first outstanding transaction:
begins prior to the reset of the particular port;
completes subsequent to the reset of the particular port being completed; and
generates a first data packet destined for the host associated with the particular port; and
prevent the first data packet from being sent to the host associated with the particular port by rerouting the first data packet such that it is stored in a first in, first out (FIFO) buffer of the multi-port storage system rather than being sent to the host; and

wherein rerouting the first data packet from being sent to the host results in the host considering the reset to be completed sooner than if the first data packet had been sent to the host during the reset of the particular port.