Patent ID: 11862262
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A memory system, comprising:
a nonvolatile memory device including a plurality of memory blocks; and
a memory controller setting a target programming time so that a variation width of a writing speed of the memory system for a predetermined time satisfies a reference value, wherein:
at a power-on time of the memory system, when the memory controller transmits the target programming time to the nonvolatile memory device, the nonvolatile memory device stores the target programming time, and
when the memory controller transmits a program command for a word line to the nonvolatile memory device, the nonvolatile memory device confirms a programming time of the word line, and adjusts the programming time of the word line on the basis of the target programming time.