Patent ID: 11908921
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 17:
18. A structure, comprising:
a pair of epitaxial structures on a substrate;
vertically-stacked nanostructures between the pair of epitaxial structures, wherein the vertically-stacked nanostructures are in contact with the pair of epitaxial structures;
a gate structure surrounding first portions of the vertically-stacked nanostructures between the pair of epitaxial structures;
a first gate spacer above the vertically-stacked nanostructures and on sidewall surfaces of the gate structure, wherein the first gate spacer has a first density;
a second gate spacer on sidewall surfaces of the first gate spacer and in contact with the pair of epitaxial structures; and
spacer structures between second portions of the vertically-stacked nanostructures and interposed between the gate structure and sidewall portions of the pair of epitaxial structures, wherein the spacer structures comprise:
a spacer layer with a uniform thickness and having a second density different the first density; and
an air gap surrounded by the spacer layer and the sidewall portions of the pair of epitaxial structures.