Patent ID: 11941740
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. An apparatus, comprising:
a processor to include a plurality of shader cores to process a plurality of graphics primitives; and
a plurality of respective vertex buffers local to the respective plurality of shader cores, wherein the plurality of shader cores further to include a plurality of respective sliding window buffers, wherein the plurality of sliding window buffers are separate from the plurality of vertex buffers, and wherein the processor to:
initiate storage of shaded vertex content for a first plurality of vertices pertaining to the plurality of graphic primitives in a first vertex buffer of the plurality of vertex buffers; and
track most recently allocated vertex content for the plurality of graphics primitives at least in part via storage of a plurality of vertex identifier parameters for a second plurality of vertices pertaining to the plurality of graphic primitives in a first sliding window buffer of the plurality of sliding window buffers, wherein the second plurality of vertices comprises a subset of the first plurality of vertices.