Patent ID: 11914471
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G  H

Claim 0:
1. A system comprising:
a memory device comprising a plurality of zones for storing data, each zone of the plurality of zones having a parity cursor and a write cursor, a parity cursor of an individual zone comprising a value that indicates how much space of the individual zone from a beginning of the individual zone is already parity protected, a write cursor of the individual zone comprising a value that indicates where data was last written to in the individual zone; and
a processing device, operatively coupled to the memory device, configured to perform operations comprising:
receiving a request to write a set of user data to a select non-parity zone of the plurality of zones;
writing the set of user data to the select non-parity zone in response to the request;
updating a write cursor of the select non-parity zone based on the writing of the set of user data;
determining whether the write cursor of the select non-parity zone has a greater value than that of a parity cursor of the select non-parity zone; and
in response to the write cursor of the select non-parity zone having a greater value than that of the parity cursor of the select non-parity zone:
scanning at least a portion of the plurality of zones to find a predetermined number of non-parity zones that have parity cursors with a similar value and that respectively have an individual write cursor that is greater than an individual parity cursor;
generating error correction parity data for the predetermined number of non-parity zones based on the similar value of the parity cursors of the predetermined number of non-parity zones; and
storing the error correction parity data to a select parity zone of the plurality of zones.