Patent ID: 11901438
Assignee: ADEIA SEMICONDUCTOR SOLUTIONS LLC
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC B  H

Claim 12:
13. A semiconductor nanosheet device comprising:
epitaxial source-drain regions on opposite sides of a gate stack, each epitaxial source-drain region comprising a first side that faces the gate stack and an opposite second side;
a vertical stack of nanosheets each extending in a horizontal direction between the epitaxial source-drain regions, and each comprising end portions in contact with the epitaxial source-drain regions and a center portion that extends between the end portions, wherein the gate stack surrounds each of the center portions;
an outer spacer comprising at least a first portion disposed adjacent to a portion of the gate stack disposed above the uppermost nanosheet; and
pairs of inner spacers on opposite sides of the gate stack, each inner spacer disposed between and separating respective portions of the gate stack and the epitaxial source-drain regions, wherein:
the end portions of each nanosheet laterally extend further into the epitaxial source-drain regions than the adjacent pair of inner spacers disposed therebelow; and
a middle portion of each nanosheet is wider in the horizontal direction than a top portion and a bottom portion of the respective nanosheet.