Patent ID: 11941281
Assignee: NXP B.V.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A method, comprising:
receiving a request to read a value of a memory flag, wherein the memory flag includes a 2-bit value stored in a first memory cell and a second memory cell of an array of non-volatile memory cells;
reading a first value of the first memory cell;
reading a second value of the second memory cell;
determining the value of the memory flag based on the first value and the second value;
determining that the first value stored by the first memory cell indicates the first memory cell is in a first condition;
determining that the second value stored by the second memory cell indicates the second memory cell is in the first condition;
determining that the memory flag is in an unknown state;
identifying a weaker set memory cell of the first memory cell and the second memory cell; and
clearing the weaker set memory cell.