Patent ID: 11863170
Assignee: SYNOPSYS, INC.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A communications integrated circuit comprising:
an equalizer circuit connected to a port of the communications integrated circuit, the equalizer circuit comprising:
a main stage circuit comprising:
a main stage differential pair comprising a first transistor and a second transistor; and
a main stage degeneration resistance connected between a source electrode of the first transistor and a source electrode of the second transistor;

a replica stage circuit comprising: a replica stage differential pair comprising a third transistor and a fourth transistor, the replica stage differential pair matching the main stage differential pair,
the replica stage circuit having a parasitic capacitance matching a parasitic capacitance of the main stage circuit, the parasitic capacitance of the main stage circuit comprising a parasitic capacitance of the main stage degeneration resistance;

a plurality of equalizer inputs connected to:
a plurality of gate electrodes of the main stage differential pair; and
a plurality of gate electrodes of the replica stage differential pair; and

a plurality of equalizer outputs connected to:
a plurality of main stage outputs, comprising a main stage positive output and a main stage negative output, connected to a plurality of drain electrodes of the main stage differential pair; and
a plurality of replica stage outputs, comprising a replica stage positive output and a replica stage negative output, connected to a plurality of drain electrodes of the replica stage differential pair, the replica stage positive output being connected to the main stage negative output and the replica stage negative output being connected to the main stage positive output.