Patent ID: 11962275
Assignee: ON-BRIGHT ELECTRONICS (SHANGHAI) CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. A system for amplifying a first input signal to generate a first output signal, the system comprising:
a first integrator configured to receive the first input signal and generate a first integrated signal based at least in part on the first input signal;
a second integrator configured to receive the first integrated signal and generate a second integrated signal based at least in part on the first integrated signal;
a compensation capacitor coupled to the first integrator and the second integrator;
an OR gate configured to receive a first gate signal associated with the second integrated signal and a second gate signal associated with the second integrated signal, and generate a control signal based on the first gate signal and the second gate signal;
a switch coupled to the compensation capacitor and configured to receive the control signal associated with the second integrated signal;
a first resistor directly coupled to the switch; and
a signal generator configured to receive the second integrated signal and generate the first output signal;
wherein:
the first integrator includes a first operational amplifier including a first input terminal and a first output terminal; and
the second integrator includes a second operational amplifier including a second input terminal and a second output terminal;

wherein:
the switch is further coupled to the second input terminal of the second operational amplifier; and
the first resistor is further coupled to the second output terminal of the second operational amplifier;

wherein:
the first gate signal includes a first comparison signal associated with the second integrated signal;
the second gate signal includes the second comparison signal associated with the second integrated signal; and
the OR gate is configured to generate the control signal to close or open the switch based on at least information associated with the first comparison signal and the second comparison signal;

wherein:
if the control signal is at a first logic level, the switch is configured to be closed; and
if the control signal is at a second logic level, the switch is configured to be open.