Patent ID: 11900262
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. A method of processing a neural network model comprising an operation processing graph that comprises a plurality of operations and is partitioned into a plurality of modules, using an operation processor comprising an internal memory, the method comprising:
storing a first module input feature map in the internal memory;
obtaining a first branch output feature map by performing a first operation among the plurality of operations, based on the stored first module input feature map;
obtaining a second branch output feature map by performing a second operation among the plurality of operations, based on the stored first module input feature map; and
maintaining storage of the first module input feature map in the internal memory, while the first operation is performed,
wherein each of the plurality of modules comprises a plurality of branches,
wherein each branch of the plurality of branches corresponds to a memory area size from among a plurality of memory area sizes for processing the plurality of branches, and wherein operations included in each branch are independent from operations included in other branches from among the plurality of branches,
wherein the method further comprises determining a processing order of the plurality of branches, and
wherein the processing order arranges the plurality of branches such that the plurality of memory area sizes increase sequentially or such that the plurality of memory area sizes decrease sequentially.