Patent ID: 11929816
Assignee: INTEL CORPORATION
Field: Telecommunications (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An apparatus comprising:
memory circuitry; and
a processor comprising logic and circuitry configured to cause a beam tracking initiator wireless communication station (STA) to:
determine a beam tracking time limit based on a value in a beam tracking time limit field in a Directional Multi-Gigabit (DMG) capabilities element from a beam tracking responder STA;
transmit a Physical layer (PHY) Protocol Data Unit (PPDU) to the beam tracking responder STA, the PPDU comprising a beam tracking request; and
determine that the beam tracking request has failed, based on a determination that a Beam Refinement Protocol (BRP) frame comprising feedback is not received from the beam tracking responder STA within a time period, that is less than the beam tracking time limit, from the PPDU comprising the beam tracking request.