Patent ID: 11923771
Assignee: FUJI ELECTRIC CO., LTD.
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC G  H | IPC H

Claim 0:
1. A control circuit for controlling an output transistor for outputting power, comprising:
a ramp terminal connected to a ramp resistance;
a ramp waveform generation unit for generating a ramp waveform including a slope corresponding to a resistance value of the ramp resistance;
an output control unit for controlling at least one of an ON time or an OFF time of the output transistor based on a comparison result between the ramp waveform and a comparison voltage; and
a state detection unit for detecting a state of the ramp resistance connected to the ramp terminal,
wherein the output control unit turns the output transistor to an OFF state based on an output of the state detection unit regardless of the comparison result, when the state of the ramp resistance becomes a predetermined state,
wherein the state detection unit detects a ramp current flowing through the ramp terminal,
wherein the state detection unit has:
a mirror current generation unit for generating a mirror current of the ramp current; and
a comparison unit for comparing the mirror current with at least one of an upper allowable limit value and a lower allowable limit value of the mirror current,

wherein the comparison unit has:
a current subtracting unit for generating a differential current obtained by subtracting a reference current corresponding to the upper allowable limit value or the lower allowable limit value from the mirror current; and
a voltage comparison unit for comparing a differential voltage corresponding to the differential current with a reference voltage, and

wherein a current value of the reference current in the current subtracting unit is variable.