Patent ID: 11966298
Assignee: XI'AN UNIIC SEMICONDUCTORS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. An NVDIMM controller, the NVDIMM controller comprises a DDR controller and a NAND flash memory controller and is used to control an NVDIMM, the NVDIMM comprising a DRAM and a NAND flash memory, wherein the DRAM adopts Data Bus Inversion (DBI) mechanism, characterized in that, the NVDIMM controller further comprises:
a data backup module, which compares Data Queue (DQ)i with DQi−1 when DBIi is “1”, if the number of bits of DQi and DQi−1 with different values is greater than N/2, inverts the DQi and otherwise maintains the DQi and the DBIi unchanged, and which maintains the DQi and the DBIi unchanged when the DBIi is “0”, wherein N is an integer multiple of 8; and
a data restoration module, which judges the values of DQi and DBIi received from the NAND flash memory controller, if DBIi=0 and the number of “1”s in the DQi is less than or equal to N/2, inverts the DQi and rewrites the DBIi to “1”, and otherwise maintains the DQi and the DBIi unchanged.