Patent ID: 11955530
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of fabricating an integrated circuit comprising:
forming shallow trench isolation (STI) structures at a surface of a substrate, the substrate having a first conductivity type, the STI structures including a first STI structure and a second STI structure;
forming a well at the substrate surface, the well surrounding the STI structures, the well having an opposite second conductivity type and a first dopant concentration;
forming a first polysilicon gate structure over the well, a first portion of the first polysilicon gate structure extending over a first side of the first STI structure and a second portion of the first polysilicon gate structure extending over a first side of the second STI structure; and
forming contact regions at the substrate surface and within the well, the contact regions having a second dopant concentration that is greater than the first dopant concentration, the contact regions including a first contact region and a second contact region, the first contact region on an opposite second side of the first STI structure and the second contact region on an opposite second side of the second STI structure.