Patent ID: 11862679
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A semiconductor device, comprising:
a substrate including an active pattern;
a gate electrode running across the active pattern; and
a source/drain pattern adjacent to one side of the gate electrode and on an upper portion of the active pattern,
wherein:
the source/drain pattern includes:
a body part including a plurality of semiconductor patterns; and
a capping pattern on the body part,

the body part has a first facet, a second facet, a third facet, a fourth facet, a first corner edge defined where the first facet meets the second facet, a second corner edge defined where the second facet meets the third facet, and a third corner edge defined where the third facet meets the fourth facet,
the first and third corner edges protrude parallel to the substrate,
the second corner edge protrudes perpendicular to the substrate,
the capping pattern covers the second facet, the third facet and the second corner edge between the second and third facets,
the capping pattern exposes the first facet, the fourth facet, the first corner edge and the third corner edge,
the capping pattern includes a first segment on the second facet, a second segment on the third facet, and a third segment on the second corner edge,
the third segment is between the first segment and the second segment and connects the first and second segments to each other,
a maximum thickness of the first segment is greater than a maximum thickness of the third segment, and
a maximum thickness of the second segment is greater than the maximum thickness of the third segment.