Patent ID: 11894085
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 21:
22. A method, comprising:
reading, by a memory device, a first set of bits stored in a first mode register of the memory device;
identifying, by the memory device, a test mode, for performing a memory built-in self-test, based on the first set of bits;
identifying, by the memory device and based at least in part on a second set of bits indicating one or more memory sections of a plurality of memory sections of the memory device, a subset of the plurality of memory sections that are testable using the memory built-in self-test, the subset comprising the one or more memory sections;
performing, by the memory device and based on the test mode, the memory built-in self-test for the one or more memory sections indicated by the second set of bits; and
writing, by the memory device, to a third set of bits stored in a third mode register of the memory device based on a result of performing the memory built-in self-test.