Patent ID: 11955425
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 15:
16. A method comprising:
forming a gate structure extending along a first direction; and
forming an interconnect structure over the gate structure, wherein the forming the interconnect structure includes:
forming odd-numbered interconnect routing layers oriented along a second direction that is substantially perpendicular to the first direction,
forming even-numbered interconnect routing layers oriented along a third direction that is substantially parallel to the first direction, wherein a first of the odd-numbered interconnect routing layers has a first pitch (P1), a second of the odd-numbered interconnect routing layers has a second pitch (P3), and a fourth of the odd-numbered interconnect routing layer has a third pitch (P7), and
configuring the first pitch, the second pitch, and the third pitch, such that a ratio of the first pitch to the second pitch to the third pitch (P1:P3:P7) is 1:1:2.