Patent ID: 11881448
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor package structure, comprising:
a first package, comprising:
a first substrate having a first surface and a second surface opposite to the first surface;
an electronic component embedded in the first substrate;
a trace layer having an uppermost conductive layer embedded in the first substrate and exposed from the first surface of the first substrate, wherein the trace layer comprises a first portion within a vertical projection area of the electronic component and a second portion outside of the vertical projection area of the electronic component;
a first conductive structure embedded in the first substrate and connecting the second portion of the trace layer to the second surface of the first substrate; and
a dielectric layer contacting the first surface of the first substrate and exposing the first portion of the trace layer,
wherein the dielectric layer has an opening exposing the first portion of the trace layer, and the semiconductor package structure further comprises a solder extending into the opening.