Patent ID: 11862508
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method comprising:
forming a semiconductor fin over a substrate;
forming a dummy gate structure over the semiconductor fin;
forming spacers on opposite sidewalls of the dummy gate structure;
removing the dummy gate structure to form a trench between the spacers, the trench exposing the semiconductor fin;
performing an etching process on the semiconductor fin to extend the trench into the semiconductor fin;
filling the trench with a first dielectric material;
etching back the first dielectric material;
depositing a second dielectric material in the trench and over the first dielectric material, wherein the second dielectric material has a first seam within the trench; and
completely removing the first seam in the trench.