Patent ID: 11862256
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 19:
20. A non-volatile storage apparatus, comprising:
a plurality of planes of non-volatile memory cells; and
means, connected to the plurality of planes, for concurrently programming memory cells in multiple planes from an erased data state to a set of programmed data states including a first data state and a second data state such that the second data state is lower in threshold voltage than the first data state and the second data state is higher in threshold voltage than the erased data state, the means for concurrently programming comprises means for using completion of programming of a fastest plane to the first data state as a trigger to test for program failure of other planes to the second data state, the test for program failure of other planes to the second data state comprises determining if the memory cells of the other planes that are targeted for programming to the second data state have successfully completed verification of programming for the second data state.