Patent ID: 11910732
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 5:
6. A method of forming a resistive memory device, comprising:
forming an array of rail structures that extend along a first horizontal direction over a substrate, wherein each of the rail structures comprises at least one bit line;
forming a layer stack of a resistive memory material layer and a selector material layer over the array of rail structures; and
forming word lines that laterally extend along a second horizontal direction and are laterally spaced apart along the first horizontal direction over the layer stack, wherein each of the word lines includes a respective horizontally-extending portion that overlie the rail structures and a respective row of downward-protruding portions that protrude downward from the respective horizontally-extending portion,, wherein:
the word lines or at least a subset of the bit lines comprise a carbon-based conductive material containing hybridized carbon atoms in a hexagonal arrangement;
each rail structure within the array of rail structures comprises a vertical stack including a respective lower bit line, a respective inter-bit-line dielectric rail, and a respective upper bit line;
wherein one of the respective lower bit line and the respective upper bit line comprises the carbon-based conductive material; and
wherein another of the respective lower bit line and the respective upper bit line comprises a conductive material other than the carbon-based conductive material.