Patent ID: 11934700
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A storage device, comprising:
a memory including a data structure, wherein the data structure is associated with a submission queue; and
one or more processors coupled to the memory, the one or more processors, individually or in combination, configured to:
receive a first command for a fused operation from the submission queue,
store the first command in the data structure,
receive a second command from the submission queue,
determine whether the second command corresponds to the fused operation,
determine whether a first logical address range indicated in the first command is same as a second logical address range indicated in the second command,
store the second command in the data structure in response to determining that the second command corresponds to the fused operation and that the first logical address range and the second logical address range are the same, and
perform the fused operation in response to storing the second command.