Patent ID: 11953460
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Measurement (Instruments)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A method of forming an integrated circuit, comprising the steps of:
forming circuitry on or over a silicon substrate, the circuitry including top-level metal interconnects;
forming a primary passivation barrier over said top-level metal interconnects;
forming conductive vias through said primary passivation barrier to said top-level metal interconnects;
forming a capacitor above said primary passivation barrier and electrically coupling said capacitor through said conductive vias to said circuitry, said capacitor comprising interdigitated metal fingers with spaces therebetween;
forming a secondary passivation barrier over said capacitor; and,
forming a hygroscopic material layer over said secondary passivation barrier, wherein said capacitor is operable to exhibit a capacitance value responsive to moisture present in said hygroscopic material layer and said circuitry is operable to generate a signal responsive to said capacitance value.