Patent ID: 11915980
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A device comprising:
a fin structure disposed on a substrate;
a first gate structure disposed on the fin structure;
a second gate structure disposed on the fin structure and spaced apart from the first gate structure;
a dielectric isolation structure disposed on the substrate, the fin structure extending through the dielectric isolation structure;
a first interlayer dielectric layer interfacing with the first gate structure and the second gate structure;
a first material layer interfacing with the first gate structure and the first interlayer dielectric layer;
a second material layer interfacing with the first material layer, the second material being formed of a different material than the first material layer; and
a second interlayer dielectric layer disposed between the first gate structure and the second gate structure and extending through the second material layer, the first material layer, the first interlayer dielectric layer and a portion of the dielectric isolation structure, wherein the second interlayer dielectric layer is formed of a different material than the first interlayer dielectric layer, wherein the second interlayer dielectric layer includes a first portion extending between the first and second gate structures and a second portion extending over the first and second gate structure, and wherein the first portion of the second interlayer dielectric layer has a first width and the second portion of the second interlayer dielectric layer has a second width that is greater than the first width.