Patent ID: 11955422
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a substrate;
at least one dielectric layer pair in contact with the substrate, comprising a first dielectric layer and a second dielectric layer different from the first dielectric layer;
an interlayer dielectric (ILD) layer in contact with the at least one dielectric layer pair;
one or more capacitors each extending vertically through the ILD layer and in contact with the at least one dielectric layer pair;
a memory stack comprising a plurality of conductive/dielectric layer pairs each comprising a conductive layer and the first dielectric layer; and
a plurality of channel structures each extending vertically through the memory stack,
wherein the capacitors include a plurality of first contacts each extending vertically through the ILD layer and in contact with the at least one dielectric layer pair,
the plurality of first contacts are disposed in a peripheral region outside of the memory stack,
the memory stack comprises a staircase structure, and
the semiconductor device further comprises a plurality second contacts each in contact with a respective one of the conductive layers of the memory stack at the staircase structure.