Patent ID: 11942429
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A three-dimensional memory device comprising:
a vertical repetition of multiple instances of a unit layer stack, wherein the unit layer stack comprises, from bottom to top, a first-type insulating layer, a first-type electrically conductive layer comprising a first conductive barrier liner and a first conductive fill material layer, a second-type insulating layer, and a second-type electrically conductive layer comprising a second conductive fill material layer and a second conductive barrier liner;
memory openings vertically extending through the vertical repetition; and
memory opening fill structures located within the memory openings, wherein each of the memory opening fill structures comprises a respective vertical stack of memory elements;
wherein:
the first conductive fill material layer and the second conductive fill material layer are in direct contact with horizontal surfaces of the second-type insulating layer;
the first conductive barrier liner is in direct contact with a horizontal surface of the first-type insulating layer; and
the second conductive barrier liner is in direct contact with a horizontal surface of another first-type insulating layer of an adjacent unit layer stack.