Patent ID: 11901323
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A semiconductor package, comprising:
a first device comprising a plurality of conductive pillars, wherein surfaces of the conductive pillars respectively have planar portions and inclined portions physically connected to the planar portions, the planar portions are respectively disposed at first sidewalls of the conductive pillars, and the inclined portions are respectively disposed at second sidewalls of the conductive pillars, wherein a height of the first sidewalls is greater than a height of the second sidewalls;
a second device comprising a plurality of conductive pads; and
a plurality of solder regions respectively disposed between the conductive pillars and the conductive pads to bond the first device and the second device, wherein an amount of the solder regions on the first sidewalls of the conductive pillars is smaller than an amount of the solder regions on the second sidewalls of the conductive pillars.