Patent ID: 11914870
Assignee: CRYPTOGRAPHY RESEARCH, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A computer-implemented method comprising:
receiving, at a central processing unit (CPU), input data that is to be masked and written at a memory location within an external memory coupled to the CPU, wherein the memory location is addressable by a plurality of memory channels;
dynamically generating, within a boundary of the CPU, a mask value uniquely associated with a memory channel of the plurality of memory channels that is currently being used to address the memory location, wherein the mask value is a function of a memory address of the memory location and a unique seed value corresponding to the memory channel that is currently being used; and
prior to writing at the memory location within the external memory, modifying, within the boundary of the CPU, the input data by masking the input data with the dynamically generated mask value.