Patent ID: 11935598
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. A control method of a semiconductor storage device including:
providing a semiconductor storage device comprising: a first memory transistor; a first transistor electrically coupled to a gate electrode of the first memory transistor; a first voltage supply line electrically coupled to the gate electrode of the first memory transistor through the first transistor; a first signal supply line electrically coupled to a gate electrode of the first transistor; a first capacitor electrically coupled to the gate electrode of the first memory transistor without passing through the first transistor; and a first wiring coupled to a current path between the gate electrode of the first memory transistor and the first transistor via the first capacitor;
when writing the first memory transistor, at a first timing, presenting a voltage on the first voltage supply line as a first voltage, a voltage on the first signal supply line as a second voltage, and a voltage on the first wiring as a third voltage, respectively;
at a second timing after the first timing, decreasing the voltage on the first signal supply line from the second voltage to a fourth voltage lower than the second voltage; and
at a third timing after the second timing, increasing the voltage on the first wiring from the third voltage to a fifth voltage higher than the third voltage.