Patent ID: 11901230
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A manufacturing method of a semiconductor package, comprising:
sputtering a first barrier material on a substrate having through holes extending from a frontside surface to a backside surface of the substrate, wherein the first barrier material reaches the substrate from the direction of the frontside surface;
bonding a backside film to the backside surface of the substrate before depositing the first barrier material, whereby one end of the through holes is closed by the backside film;
sputtering a first seed material on the first barrier material, wherein the first seed material reaches the substrate from the direction of the frontside surface;
disposing a first conductive material on the sputtered first seed material after the backside film is bonded to the substrate, whereby the first conductive material is disposed in the through holes and over the frontside surface of the substrate to form patterned conductive traces;
removing the backside film after the first conductive material is deposited;
removing portions of the first barrier material in correspondence of the through holes from the side of the backside surface of the substrate, while other portions of the first barrier material remain on the frontside surface of the substrate and along sidewalls of the through holes; and
disposing a second conductive material to form routing patterns where the portions of the first barrier material have been removed.