Patent ID: 11954522
Assignee: BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 14:
15. An electronic device, comprising:
at least one processor; and
a memory, communicatively coupled to the at least one processor,
wherein the memory is configured to store instructions executed by the at least one processor, and when the instructions are executed by the at least one processor, the at least one processor is caused to execute the method for processing the tasks in parallel comprising:
determining at least one parallel computing graph of a target task, each of the at least one parallel computing graph comprising a plurality of operator tasks;
determining a parallel computing graph and an operator scheduling scheme based on a hardware execution cost of each operator task of each of the at least one parallel computing graph in a cluster, wherein the cluster comprises a plurality of nodes for executing the plurality of operator tasks, and each parallel computing graph corresponds to at least one operator scheduling scheme; and
scheduling and executing the plurality of operator tasks of the determined parallel computing graph in the cluster based on the determined parallel computing graph and the determined operator scheduling scheme;
wherein determining the parallel computing graph and the operator scheduling scheme based on the hardware execution cost of each operator task of each of the at least one parallel computing graph in the cluster comprises:
for each parallel computing graph and an initial operator scheduling scheme, determining the total execution cost of the parallel computing graph based on the hardware execution cost of each operator task;
screening a plurality of parallel computing graphs based on the total execution cost of each parallel computing graph to determine a candidate parallel computing graph;
for the candidate parallel computing graph, determining a plurality of candidate operator scheduling schemes by employing a heuristic algorithm;
for each group of the candidate parallel computing graph and the candidate operator scheduling scheme, determining a total execution cost of the group of the candidate parallel computing graph and the candidate operator scheduling scheme based on the hardware execution cost of each operator task; and
screening the plurality of candidate operator scheduling schemes for the candidate parallel computing graph based on the total execution cost of each group of the candidate parallel computing graph and the candidate operator scheduling scheme.