Patent ID: 11900986
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 7:
8. The semiconductor memory device according to claim 2, comprising
a second circuit connected to the third wiring and the fourth wiring, wherein
the second circuit includes:
a third input terminal to which third data is input; and
a fourth input terminal to which first data is input,

a third voltage is applied to the third wiring and a fourth voltage different from the third voltage is applied to the fourth wiring when the first data is in a first state and the third data is in the first state,
the fourth voltage is applied to the third wiring and the third voltage is applied to the fourth wiring when the first data is in a second state different from the first state and the third data is in the first state, and
the fourth voltage is applied to the third wiring and the fourth wiring when the third data is in the second state.