Patent ID: 11949000
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A semiconductor structure, comprising:
a semiconductor fin protruding from a substrate;
a metal gate structure disposed over the semiconductor fin, wherein the metal gate structure includes a gate dielectric layer, a work function metal layer disposed over the gate dielectric layer, and a bulk conductive layer disposed over the work function metal layer;
gate spacers disposed on sidewalls of the metal gate structure, wherein a top surface of each gate spacer is angled toward the semiconductor fin;
a dielectric layer disposed over the top surface of each gate spacer; and
a conductive feature disposed between the gate spacers to contact the metal gate structure, wherein a top surface of the conductive feature is above a top surface of the dielectric layer, and sidewalls of the conductive feature contact the dielectric layer.