Patent ID: 11862272
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 1:
2. The method of claim 1, wherein the region level comprises a free region and a restricted region,
wherein the according to the region level of the local region to be repaired, controlling repair of the fail bit by the any replacement GR circuit in place of the preliminary repair LR circuit, or controlling repair of the fail bit by the preliminary repair LR circuit comprises:
in response to the region level of the local region to be repaired being the free region, controlling repair of the fail bit by the any replacement GR circuit in place of the preliminary repair LR circuit; and
in response to the region level of the local region to be repaired being the restricted region, controlling repair of the fail bit by the preliminary repair LR circuit.