Patent ID: 11922321
Assignee: IMAGINATION TECHNOLOGIES LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 19:
20. A computing-based device to configure hardware to implement a Deep Neural Network (DNN), the computing-based device comprising:
at least one processor; and
memory coupled to the at least one processor, the memory comprising:
computer readable code that when executed by the at least one processor causes the at least one processor to:
(a) determine an output of a model of the DNN in response to training data, the model of the DNN comprising a quantisation block configured to transform a set of values input to a layer of the DNN prior to the model processing the set of values in accordance with the layer, the transformation of the set of values simulating quantisation of the set of values to a fixed point number format defined by one or more quantisation parameters;
(b) determine an error metric for the DNN, the error metric being a quantitative measure of an error in the determined output;
(c) determine a size metric for the DNN, the size metric being proportional to a size of the DNN based on the one or more quantisation parameters;
(d) back-propagate a derivative of the error metric to at least one of the one or more quantisation parameters to generate a gradient of the error metric for the at least one of the one or more quantisation parameters;
(e) determine a gradient of the size metric for the at least one of the one or more quantisation parameters;
(f) determine a final gradient for the at least one of the one or more quantisation parameters based on the gradient of the error metric and the gradient of the size metric for the at least one of the one or more quantisation parameters;
(g) adjust the at least one of the one or more quantisation parameters based on the final gradient for the at least one of the one or more quantisation parameters; and
(h) configure the hardware to implement the DNN using the at least one of the one or more adjusted quantisation parameters by configuring the hardware to receive and process the set of values in accordance with the at least one of the one or more adjusted quantisation parameters.