Patent ID: 11910671
Assignee: SHARP KABUSHIKI KAISHA
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A display device comprising:
a plurality of data signal lines;
a plurality of scanning signal lines;
a plurality of monitor control lines corresponding to the plurality of scanning signal lines on a one-to-one basis; and
pixel circuits of m rows×n columns (where m and n are integers of 2 or more) provided corresponding to intersections of the plurality of data signal lines and the plurality of scanning signal lines and including a display element, luminance of the display element being controlled by a current, and a drive transistor configured to control a current to be supplied to the display element, the display device having a function of detecting a characteristic of the drive transistor,
wherein the display device includes a data signal line drive circuit configured to apply a data signal to the plurality of data signal lines, a scanning signal line drive circuit configured to apply a scanning signal to the plurality of scanning signal lines, and a monitor control line drive circuit configured to apply a monitor control signal to the plurality of monitor control lines,
the data signal line drive circuit has a function of measuring a current flowing through each of the plurality of data signal lines, and
a pixel circuit in an i-th row and a j-th column (where i is an integer of 1 or more and m or less, and j is an integer of 1 or more and n or less) includes
the display element provided between a first power supply voltage line supplied with a first supply voltage and a second power supply voltage line supplied with a second supply voltage and including a first terminal and a second terminal connected to the second power supply voltage line,
the drive transistor including a control terminal, a first conduction terminal connected to the first power supply voltage line, and a second conduction terminal,
a writing control transistor including a control terminal connected to a scanning signal line in the i-th row, a first conduction terminal connected to a data signal line in the j-th column, and a second conduction terminal connected to the control terminal of the drive transistor, and
a monitor control transistor including a control terminal connected to a monitor control line in the i-th row, a first conduction terminal connected to the second conduction terminal of the drive transistor and a second conduction terminal connected to a data signal line in a (j+1)-th column.