Patent ID: 11947483
Assignee: XCONN TECHNOLOGIES HOLDINGS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A switch, comprising:
a plurality of ports through which transactions ingress and egress the switch;
a plurality of port logic modules coupled with the plurality of ports, each port logic module having core clock domain logic for a core clock domain specific to a corresponding port of the plurality of ports, wherein each port control logic module is further configured to combine a first number of port streams from the corresponding port to a second number of system streams and to separate the second number of system streams into the first number of port streams, wherein the second number of system streams includes a with data stream and a no data stream, the with data stream corresponding to transactions including a data payload, the no data stream corresponding to transactions free of a data payload, and wherein the port streams include cache streams and memory streams, the cache streams including a request stream, a plurality of response streams, and a data stream, the data stream being merged with a first memory stream having data payload into the with data stream, the request stream, the plurality of response streams, and a second memory stream not having the data payload being merged into the no data stream;
a memory including a plurality of banks; and
a switch fabric, wherein the memory and the switch fabric have a system clock domain, the core clock domain for each of the plurality of port logic modules being different from the system clock domain.