Patent ID: 11923859
Assignee: INTEL CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 10:
11. A method for generating a frequency estimate of an output signal, the method comprising:
determining a clock cycle count associated with the output signal, the clock cycle count based on a reference clock signal,
generating a cycle count based frequency estimation of the output signal using the clock cycle count, the cycle count based frequency estimation including an integer frequency component and a fractional frequency component;
generating a fractional frequency estimation of the output signal based on the reference clock signal and a plurality of time-to-digital conversion phase samples of the output signal; and
generating the frequency estimate of the output signal using the cycle count based frequency estimation within a range and a frequency error determined from the fractional frequency estimation, wherein the plurality of time-to-digital conversion phase samples and the cycle count based frequency estimation use a same number of reference clock cycles of the reference clock signal.