Patent ID: 11893240
Assignee: QUALCOMM INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. The method of claim 10, wherein the first IO includes a first pseudo channel data bus and the second IO includes a second pseudo channel data bus, the method further comprising:
transmitting data between the first pseudo channel data bus and the first pseudo channel via a first internal data bus having a larger bit width than the first pseudo channel data bus and communicatively connected to the first pseudo channel, and a second internal data bus having a same bit width as the first pseudo channel data bus and communicatively connected between a first portion of the first internal data bus and the first pseudo channel selection device; and
transmitting data between the second pseudo channel data bus and the first pseudo channel via the first internal data bus and a third internal data bus having a same bit width as the second pseudo channel data bus and communicatively connected between a second portion of the first internal data bus and the second pseudo channel selection device.