Patent ID: 11940888
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 9:
10. The method of claim 8, wherein:
the first VSM comprises a first electronic circuit configured to verify the digital signatures; and
the second VSM comprises a second electronic circuit configured to verify the digital signatures, wherein the second electronic circuit has a significantly different configuration from the first electronic circuit; and
wherein the method further comprises:
utilizing, by the processor circuitry, the first VSM and the second VSM to verify the digital signature;
causing, by the processor circuitry, the first VSM and the second VSM to operate simultaneously when verifying the digital signature; and
accepting, by the processor circuitry, the digital signature as valid if at least one of the first VSM and the second VSM determines that the digital signature is valid.