Patent ID: 11963362
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device comprising:
a peripheral circuit structure comprising a first substrate and circuit elements on the first substrate;
a memory cell structure comprising:
a second substrate on the first substrate;
gate electrodes spaced apart from each other and stacked in a first direction that is perpendicular to a surface of the second substrate;
channel structures extending through the gate electrodes in the first direction, each of the channel structures comprising a channel layer;
separation regions penetrating through the gate electrodes, extending in a second direction that is perpendicular to the first direction, and spaced apart from each other in a third direction that is perpendicular to the first direction and the second direction;
a first horizontal conductive layer, which is distinct from the gate electrodes, extending on the second substrate and in contact with the channel layer of each of the channel structures;
a horizontal insulating layer extending in parallel with the first horizontal conductive layer; and
a second horizontal conductive layer, which is distinct from the gate electrodes, on the first horizontal conductive layer and in contact with support regions of the second substrate, wherein the support regions are free of the first horizontal conductive layer and the horizontal insulating layer; and

a through-wiring region between first separation regions among the separation regions, the through-wiring region comprising an insulating region and through-contact plugs extending through the insulating region and through the second substrate in the first direction to electrically connect the memory cell structure and the peripheral circuit structure,
wherein first portions of the support regions extend along the first separation regions, and wherein the second horizontal conductive layer conformally extends on respective top surfaces and end portions of the horizontal insulating layer at opposing sides of the first separation regions, and contacts the first portions of the support regions between the respective end portions of the horizontal insulating layer.