Patent ID: 11862694
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 12:
13. A method of forming a semiconductor device, the method comprising:
depositing a first dielectric layer over a conductive feature;
forming an opening in the first dielectric layer to expose the conductive feature;
forming a dielectric liner along sidewalls of the opening;
forming a first metal layer in the opening over the conductive feature;
forming a second metal layer over the first metal layer, the second metal layer comprising a material different from the first metal layer;
implanting a first dopant into a portion of the first dielectric layer, a portion of the dielectric liner, and the second metal layer to form a doped dielectric layer, a doped dielectric liner and a doped metal portion, respectively, a volume of the doped dielectric layer is greater than a volume of the portion of the first dielectric layer, wherein at least a portion of the second metal layer is interposed between the doped metal portion and the first metal layer; and
planarizing the doped dielectric layer, the doped dielectric liner, and the doped metal portion.