Patent ID: 11929323
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 11:
12. A method of forming a microelectronic device, comprising:
forming a memory array wafer comprising:
doped semiconductive material overlying a base structure;
a stack structure above the doped semiconductive material and comprising a conductive material vertically interleaved with insulative material;
cell pillar structures individually comprising semiconductive material vertically extending completely through the stack structure and the doped semiconductive material and partially through the base structure;
digit lines above the stack structure; and
dielectric material above the digit lines;

forming a control circuitry wafer separate from the memory array wafer and comprising:
control logic circuitry; and
additional dielectric material above the control logic circuitry;

bonding the dielectric material of the memory array wafer to the additional dielectric material of the control circuitry wafer to form an assembly;
removing the base structure and portions of the cell pillar structures vertically extending into the base structure to expose the doped semiconductive material; and
forming a source structure from the doped semiconductive material after removing the base structure and the portions of the cell pillar structures, the source structure coupled to the cell pillar structures.