Patent ID: 11909670
Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC H

Claim 13:
14. A system comprising:
packet processing circuitry configured to process one or more ingress packets at a clock rate; and
processing circuitry configured to:
determine, for a time period within a thermal average period, an energy usage estimate for the packet processing circuitry;
determine, for the time period, a target clock rate for the packet processing circuitry based at least in part on the determined energy usage estimate to meet a target energy value that is averaged for the thermal average period; and
adjust, for the time period, the clock rate based at least in part on the target clock rate, wherein the adjust causes the packet processing circuitry to process the one or more ingress packets at the adjusted clock rate.