Patent ID: 11925016
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A memory array comprising strings of memory cells, comprising:
a conductor tier comprising conductor material;
laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers directly above the conductor tier, conducting material of a lowest of the conductive tiers being directly against the conductor material of the conductor tier, channel-material strings of memory cells extending through the insulative tiers and the conductive tiers;
intervening material laterally-between and longitudinally-along immediately-laterally-adjacent of the memory blocks;
the conducting material in the lowest conductive tier being directly against the channel material of individual of the channel-material strings; and
the insulative tier immediately-above the lowest conductive tier comprising an upper first insulative material and a lower second insulative material under the upper first insulative material, the lower second insulative material being of different composition from that of the upper first insulative material.