Patent ID: 11960854
Assignee: ADVANCED MICRO DEVICES, INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A multiply-accumulate circuit comprising:
a series of ripple counter units comprising:
a first ripple counter unit comprising a ripple counter having a first input coupled to receive a respective target signal, a second input coupled to receive a respective counter reset value, a third input coupled to receive a respective stop count value, and a counter output;
a series of additional ripple counter units comprising a ripple counter having a first input coupled to receive a respective target signal, a second input coupled to receive a respective counter reset value, a third input coupled to receive a respective stop count value, and a counter output; and an adder circuit coupled to receive the counter output and a sum from a prior adder circuit output in the series of ripple counter units and produce a sum therefrom at an output; and

wherein the ripple counter of each ripple counter unit is controlled by the respective stop count value to adjust a respective ripple counter sampling period with respect to a reference clock signal to scale the respective counter output.