Patent ID: 11894042
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 15:
16. The circuit for refreshing a row hammer of claim 14, wherein the second refresh state determination circuit comprises a third trigger, a fourth trigger and a sixth NOT gate,
wherein an input end of the third trigger is connected with an output end of the third trigger through the sixth NOT gate, and the output end of the third trigger is configured to output the first target state signal, and a clock end of the third trigger is respectively connected with the second clock signal and the second inverted clock signal,
wherein an input end of the fourth trigger is connected with the first target state signal, a clock end of the fourth trigger is respectively connected with the second clock signal and the second inverted clock signal, and an output end of the fourth trigger is configured to output the second target state signal,
wherein a reset end of the third trigger and a reset end of the fourth trigger are both connected with the reset signal.