Patent ID: 11927869
Assignee: JAPAN DISPLAY INC.
Field: Optics (Instruments)
Classification: CPC G  H | IPC G  H

Claim 1:
2. The semiconductor substrate according to claim 1, wherein
the one pixel further comprises a connection electrode and a pixel electrode,
the connection electrode is provided on the insulating layer and parallel to the signal lines,
the pixel electrode is connected to the connection electrode, wherein
the insulating layer includes a second opening that includes a pair of long sides and a pair of short sides in the one pixel,
the second opening is disposed spaced apart from the first opening in the first direction,
the long sides of the second opening are parallel to the second direction, and the short sides of the second opening are parallel to the first direction, and
the connection electrode is connected to the first semiconductor layer and the second semiconductor layer via the second opening.