Patent ID: 11933919
Assignee: MIXED-SIGNAL DEVICES INC.
Field: Measurement (Instruments)
Classification: CPC G  H | IPC G  H

Claim 4:
5. The direct frequency synthesizer of claim 1, wherein the analog signal is be specified in the following equation:, x
   ⁡
   (
   t
   )
  
  =
  
   sin
   ⁡
   (
   
    
     2
     ⁢
     
      π
      ⁡
      (
      
       
        f
        0
       
       +
       
        
         α
         2
        
        ⁢
        t
       
      
      )
     
    
    +
    
     θ
     0
    
   
   )
  
 

wherein:
f0: initial frequency of a chirp signal
α: frequency ramp rate of the chirp signal
θ0: initial phase of the chirp signal
wherein the chirp signal is generated digitally and converted to the analog signal with the high speed digital to analog converter (HS DAC), wherein a digital codeword xn can be specified in the following equation:, x
    n
   
   =
   
    
     x
     ⁡
     (
     
      t
      =
      
       nT
       s
      
     
     )
    
    =
    
     sin
     ⁡
     (
     
      θ
      n
     
     )
    
   
  
  ⁢
  

  
   
    θ
    n
   
   =
   
    {
    
     
      
       
        
         
          
           θ
           0
          
          ,
          
           n
           =
           0
          
         
        
       
       
        
         
          
           
            θ
            
             n
             -
             1
            
           
           +
           
            2
            ⁢
            π
            ⁢
            
             f
             
              n
              -
              1
             
            
           
           +
           
            π
            ⁢
            α
            ⁢
            
             T
             s
             2
            
           
          
          ,
          
           n
           >
           0
          
         
        
       
      
      ⁢
      

      
       f
       n
      
     
     =
     
      {
      
       
        
         
          
           
            f
            0
           
           ⁢
           
            T
            s
           
          
          ,
          
           n
           =
           0
          
         
        
       
       
        
         
          
           
            f
            
             n
             -
             1
            
           
           +
           
            α
            ⁢
            
             T
             s
             2
            
           
          
          ,
          
           n
           >
           0
          
         
        
       
      
     
    
   
  
 

wherein:
Ts: sample period of a HS DAC clock
fn: frequency at time t=nTs 
wherein, for non-stationary sample clock, digital codeword xn can be adjusted as follows:, x
    n
    ′
   
   =
   
    
     x
     ⁡
     (
     
      t
      =
      
       nT
       s
       ′
      
     
     )
    
    =
    
     sin
     ⁡
     (
     
      θ
      n
      ′
     
     )
    
   
  
  ⁢
  

  
   
    θ
    n
    ′
   
   =
   
    {
    
     
      
       
        
         
          
           θ
           0
          
          ,
          
           n
           =
           0
          
         
        
       
       
        
         
          
           
            θ
            
             n
             -
             1
            
            ′
           
           +
           
            2
            ⁢
            π
            ⁢
            
             f
             
              n
              -
              1
             
             ′
            
           
           +
           
            π
            ⁢
            
             
              α
              ⁡
              (
              
               
                T
                s
               
               +
               
                Δ
                ⁢
                
                 T
                 s
                
               
              
              )
             
             2
            
           
          
          ,
          
           n
           >
           0
          
         
        
       
      
      ⁢
      

      
       f
       n
       ′
      
     
     =
     
      {
      
       
        
         
          
           
            f
            0
           
           (
           
            
             T
             s
            
            +
            
             Δ
             ⁢
             
              T
              s
             
            
           
           )
          
          ,
          
           n
           =
           0
          
         
        
       
       
        
         
          
           
            f
            
             n
             -
             1
            
            ′
           
           +
           
            
             α
             ⁡
             (
             
              
               T
               s
              
              +
              
               Δ
               ⁢
               
                T
                s
               
              
             
             )
            
            2
           
          
          ,
          
           n
           >
           0
          
         
        
       
      
     
    
   
  
 

wherein:
Ts′: non-stationary sample period of the HS DAC clock (Ts′=Ts+ΔTs).