Patent ID: 11961778
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device package comprising:
a substrate having a top planar surface;
a first semiconductor die electrically connected to the top planar surface of the substrate, wherein the substrate and the first semiconductor die define at least a portion of a tunnel;
a first molding compound at least partially encapsulating the first semiconductor die and substantially filling the tunnel; and
a second molding compound formed on a top surface of the first molding compound, wherein the second molding compound is separate and distinct from the first molding compound,
wherein the first molding compound, when in a flowable state, has a viscosity that is lower than a viscosity of the second molding compound when the second molding compound is in a flowable state.