Patent ID: 11882647
Assignee: RAMBUS INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A method, comprising:
disposing a first set of conductors on a first layer and a second set of conductors on a second layer such that the first set of conductors and the second set of conductors are substantially aligned along a first direction and each conductor of the first set of conductors is opposed to a corresponding conductor of the second set of conductors along the first direction;
disposing a third conductor between the first layer and the second layer;
maintaining adjacent conductors of the first set of conductors at different voltages, the different voltages being selected from a first voltage and a second voltage;
maintaining adjacent conductors of the second set of conductors at different voltages, the different voltages being selected from the first voltage and the second voltage; and
maintaining the third conductor at the first voltage or the second voltage.