Patent ID: 11914931
Assignee: ANSYS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A non-transitory machine readable medium storing executable program instructions which when executed by a data processing system cause the data processing system to perform a method, the method comprising:
generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template comprising a plurality of tiles, and each template associated with location parameters to identify a corresponding portion of the IC partitioned according to the plurality of tiles of the template;
performing a thermal simulation for a corresponding portion of the IC identified by each respective template based on a time based sequence of power patterns of tiles of the respective template, the sequence of power patterns separately applied during a sequence of time durations, the thermal simulation determining a sequence of temperatures for the respective template at an end of each of the time durations, each power pattern corresponding to a set of power levels to separately power the tiles of the respective template, each power level selected for the respective template from a set of predefined power levels, the sequence of the power patterns determined for the respective template based on a transient power profile for the IC;
generating two or more sets of training data from results of thermal simulations performed, each set of training data generated based on whether a template used in generation of the set of training data identifies a portion of the IC located at corners of the IC, along a border of the IC, or within an interior of the IC; and
training neural networks based on the sets of training data generated via the thermal simulations performed, each neural network trained with a respective one of the sets of training data, the neural networks to predict a thermal behavior of a given tile of the IC based on whether the given tile of the IC is located at a corner of the IC, along the border of the IC, or within the interior of the IC.