Patent ID: 11961735
Assignee: TOKYO ELECTRON LIMITED
Field: Semiconductors (Electrical engineering)
Classification: CPC C  H | IPC C  H

Claim 16:
17. A method for processing a substrate, the method comprising:
performing a cyclic plasma process comprising a plurality of cycles, each cycle of the plurality of cycles comprising:
purging a plasma processing chamber comprising the substrate with a deposition gas comprising fluorine-free hydrocarbon, the substrate comprising a hard mask and an interlevel dielectric (ILD) layer patterned over a metal oxide etch stop layer (ESL) covering a metal line, the hard mask, the ILD layer, and the metal oxide ESL comprising an outer exposed surface;
performing an area-selective plasma deposition process by exposing the substrate to a first plasma generated from the deposition gas to deposit a polymeric film preferentially over the hard mask and the ILD layer relative to the metal oxide ESL;
after performing the area-selective plasma deposition process, purging the plasma processing chamber with an etch gas comprising fluorine; and
after purging the plasma processing chamber, performing an etching process by exposing the substrate to a second plasma generated from the etch gas to preferentially etch the metal oxide ESL relative to the hard mask and the ILD layer.