Patent ID: 11934876
Assignee: AMAZON TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. A computer-implemented method comprising:
determining a set of values that are to be stored on an integrated circuit device based on computer code;
constructing an interference graph that includes the set of values and a set of interferences that indicate which of the set of values are concurrently stored during execution of machine instructions on the integrated circuit device;
computing a number of possible placements in a memory of the integrated circuit device for each of the set of values;
computing a number of blocked placements in the memory for each of the set of values using the interference graph; and
assigning at least a portion of the set of values to a set of memory locations in the memory based on the number of possible placements and the number of blocked placements for each of the set of values, resulting in a set of memory location assignments.