Patent ID: 11961766
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A method, comprising:
forming first and second nanostructured layers on a substrate;
performing a first oxidation process to form first and second oxide layers of substantially equal thicknesses on the first and second nanostructured layers, respectively;
forming a dielectric layer with first and second dielectric portions on the first and second oxide layers, respectively;
forming first and second capping layers with different thicknesses on the first and second dielectric portions, respectively;
performing a second oxidation process on the first and second capping layers to grow the second oxide layer to a thicknesses greater than a thickness of the first oxide layer; and
forming a gate metal fill layer on the dielectric layer.