Patent ID: 11935895
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method for forming a semiconductor device structure, comprising:
forming a trench through a portion of a semiconductor layer, a portion of an insulator layer, and a portion of a silicon-containing substrate at a first region;
forming a first shallow trench isolation (STI) on sidewalls of the trench by sequentially forming a first layer, a second layer, a third layer, and a fourth layer in the trench, wherein the first layer is in contact with the semiconductor layer, the insulator layer, and the silicon-containing substrate;
forming a bulk semiconductor layer in the trench and on a top surface of the silicon-containing substrate;
forming a second shallow trench isolation (STI) at a second region surrounding the first region;
forming a first gate structure and a second gate structure at the first region and the second region, respectively; and
forming source/drain regions at the first and second regions not covered by the first and second gate structures.