Patent ID: 11935754
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A transistor comprising:
a first nanostructure over a semiconductor substrate;
a second nanostructure over the first nanostructure;
a gate dielectric surrounding the first nanostructure and the second nanostructure;
a gate electrode over the gate dielectric, wherein the gate electrode comprises:
a work function metal around the first nanostructure and the second nanostructure;
a barrier layer over the work function metal, the barrier layer comprising tungsten; and
a fill metal over the barrier layer, the fill metal comprising tungsten, wherein the fill metal has a higher concentration of fluorine than the barrier layer; and

a gate spacer on a sidewall of the gate electrode, wherein a bottom surface of the gate spacer contacts a top surface of the second nanostructure.