Patent ID: 11949626
Assignee: SUN PATENT TRUST
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An integrated circuit, comprising:
reception circuitry, which, in operation, controls a first reception of a first codeword with a first demodulation reference signal using a first orthogonal sequence and with a second demodulation reference signal using a second orthogonal sequence, wherein the first demodulation reference signal and the second demodulation reference signal are associated with different layers; and
transmission circuitry, which, in operation, controls a transmission of ACK/NACK information;
wherein the reception circuitry, responsive to the ACK/NACK information requesting retransmission of the first codeword, controls a second reception of the requested retransmission of the first codeword with a third demodulation reference signal using a third orthogonal sequence and with a fourth demodulation reference signal using a fourth orthogonal sequence, wherein the third orthogonal sequence and the fourth orthogonal sequence are associated with different layers;
wherein the third orthogonal sequence is the same as the fourth orthogonal sequence regardless of whether the first orthogonal sequence is the same as or is different from the second orthogonal sequence in the first reception.