Patent ID: 11901030
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory device, comprising:
a memory array, comprising a memory cell;
a reference voltage generator, configured to generate a reference voltage based on a threshold voltage of a select transistor of the memory cell; and
a driver circuit, coupled to the reference voltage generator, configured to generate at least one of a bit line voltage or a word line voltage according to the reference voltage, wherein the memory cell is driven by the at least one of the bit line voltage or the word line voltage,
wherein the reference voltage generator comprises:
a resistor, coupled between a gate terminal and a source terminal of the select transistor of the memory cell, configured to sense the threshold voltage of the select transistor through a current flowing through the resistor.