Patent ID: 11947831
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
receiving a request to perform a read operation on a segment of the memory device;
determining a program erase cycle count associated with the segment of the memory device;
determining a temperature offset value for the segment of the memory device based on a write temperature and a read temperature,
determining whether the temperature offset value satisfies a threshold criterion determined based on the program erase cycle count of the segment; and
responsive to determining that the temperature offset value satisfies the threshold criterion, performing a corrective read operation on the segment of the memory device, wherein a sense time parameter of the corrective read operation is modified according to the temperature offset value and the program erase cycle count.