Patent ID: 11923443
Assignee: TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device in which a plurality of IGBT regions and a plurality of diode regions are alternately set along a first direction, the semiconductor device comprising:
a first electrode;
a semiconductor portion provided on the first electrode, the semiconductor portion including:
a first conductivity type collector layer provided in the IGBT region and in contact with the first electrode;
a second conductivity type low-concentration cathode layer provided in the diode region and in contact with the first electrode;
a high-concentration cathode layer provided in the diode region, in contact with the first electrode, being of a second conductivity type, and having an impurity concentration higher than an impurity concentration of the low-concentration cathode layer;
a second conductivity type drift layer provided on the collector layer, on the low-concentration cathode layer, and on the high-concentration cathode layer;
a plurality of first conductivity type anode layers partially provided on the drift layer in the diode region;
a plurality of first conductivity type base layers partially provided on the drift layer in the IGBT region; and
a second conductivity type emitter layer provided on the base layer in the IGBT region,
when the diode region on a lower surface of the semiconductor portion is divided into three equal regions of a first peripheral region, a central region, and a second peripheral region along the first direction, an area ratio of the low-concentration cathode layer in the central region being higher than the area ratio of the low-concentration cathode layer in the first peripheral region and the second peripheral region;

a second electrode provided on the semiconductor portion in the IGBT region and the diode region and connected to the anode layer and the emitter layer;
a third electrode provided in the IGBT region and facing the emitter layer, the base layer, and the drift layer; and
an insulating film provided between the semiconductor portion and the third electrode.