Patent ID: 11947837
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A method of controlling a nonvolatile memory, the nonvolatile memory including a plurality of blocks, each of the plurality of blocks being a unit for a data erase operation and including a plurality of word lines, each of the plurality of word lines connecting a plurality of memory cells, said method comprising:
writing data to the nonvolatile memory using a multi-step program operation that includes at least a first-step program operation and a second-step program operation; wherein
the method further comprises:
receiving, from a host, a first write request that includes storage location information indicating a first location in a write buffer on a memory of the host as a transfer source of first data;
at a first timing, in response to the first write request, transferring the first data from the first location of the write buffer of the host to the nonvolatile memory by transmitting a transfer request to the host, the transfer request including the storage location information that indicates the first location of the write buffer on the memory of the host;
at a second timing after the first timing, programing the first data into the plurality of memory cells connected to a first word line of a write destination block by the first-step program operation;
at a third timing after the second timing, transferring second data from the write buffer of the host to the nonvolatile memory;
at a fourth timing after the third timing, programing the second data into the plurality of memory cells connected to a second word line of the write destination block by the first-step program operation, the second word line being different from the first word line;
at a fifth timing after the fourth timing, without receiving the first write request again, transferring the first data again from the first location of the write buffer of the host to the nonvolatile memory by transmitting, to the host again, the transfer request including the storage location information that indicates the first location of the write buffer on the memory of the host; and
at a sixth timing after the fifth timing, programing the first data into the plurality of memory cells connected to the first word line of the write destination block by the second-step program operation.