Patent ID: 11869563
Assignee: GLOBALFOUNDRIES DRESDEN MODULE ONE LIMITED LIABILITY COMPANY & KG
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. The memory structure of claim 11,
wherein the memory structure further comprises: a sense circuit connected to the bit-line and configured to sense a parameter on the bit-line and to output the data output signal based on the parameter,
wherein the specific voltage comprises the programming inhibit voltage when the data verification signal has a first value indicating that the currently stored multi-bit data value in the bitcell and represented by the data output signal is equivalent to the multi-bit data value to be stored in the bitcell and represented by the data input signal,
wherein the specific voltage comprises a specific programming assist voltage of the different programming assist voltages when the data verification signal has a second value, and
wherein the specific programming assist voltage is associated with a specific multi-bit data value represented by the data input signal.