Patent ID: 11862690
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of manufacturing a semiconductor device, the method comprising:
forming underlying structures comprising gate electrodes and source/drain epitaxial layers over a substrate;
forming one or more layers over the underlying structures;
forming a hard mask layer over the one or more layers;
forming one or more first resist layers over the hard mask layer;
forming a first photo resist pattern over the one or more first resist layers;
adjusting a width of the first photo resist pattern;
patterning the one or more first resist layers by using the first photo resist pattern as an etching mask, thereby forming a first mask pattern;
patterning the hard mask layer by using the first mask pattern, thereby forming a second hard mask pattern;
forming one or more second resist layers over the second hard mask pattern;
forming a third mask pattern by patterning the one or more second resist layers; and
patterning the one or more layers by using the third mask pattern and the second hard mask pattern as an etching mask, thereby forming a fourth mask pattern.