Patent ID: 11935845
Assignee: MIDEA GROUP CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. The semiconductor device according to claim 6, wherein the silicon substrate is a silicon-on-insulator substrate:
the P-type body region and the N-type buffer region are disposed on a surface of the N- type drift region away from the insulating layer;
the P-type source region is arranged around the N-type drift region;
the N-type source region is arranged on a surface of the P-type body region away from the insulating layer;
the P-type drain region is arranged on a surface of the N-type buffer region away from the insulating layer;
the medium layer is arranged on a side of the N-type drift region, the P-type source region, the N-type source region, the P-type body region, the N-type buffer region, and the P-type drain region away from the insulating layer;
the collector, the emitter, and the gate are disposed in the medium layer; and
the P-type source region and the N-type source region are connected to the emitter; the collector is connected to the P-type drain region; at least a part of the N-type drift region, P-type body region, P-type source region, N-type source region, N-type buffer region, and P-type drain region is made of the silicon substrate.