Patent ID: 11894304
Assignee: NANYA TECHNOLOGY CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a first lower plug and a second lower plug disposed over a semiconductor substrate;
a first landing pad disposed over a top surface and upper sidewalls of the first lower plug;
a first upper plug disposed over the first landing pad and electrically connected to the first lower plug, wherein a width of the first lower plug is greater than a width of the first upper plug; and
a dielectric layer disposed over the semiconductor substrate, wherein the first lower plug, the second lower plug, the first landing pad and the first upper plug are disposed in the dielectric layer, and wherein the dielectric layer comprises an air gap disposed between the first lower plug and the second lower plug;
wherein a bottom width of the first lower plug is greater than a top width of the first lower plug, and the top width of the first lower plug is greater than the width of the first upper plug.