Patent ID: 11862516
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor structure manufacturing method, comprising the following steps of:
providing a semiconductor substrate;
forming a first reaction layer on the semiconductor substrate;
forming a second reaction layer on the first reaction layer; and
thermally reacting at least a portion of the first reaction layer with at least a portion of the second reaction layer, to form an amorphous diffusion barrier layer;
wherein, a first portion of the second reaction layer thermally reacts with the first reaction layer, a second portion of the second reaction layer does not thermally react with the first reaction layer; and the method further comprises:
forming a conductive layer on the second portion, the second portion being an adhesion layer or a seed layer for the conductive layer;

wherein, before forming the conductive layer on the second portion, the method further comprises:
removing a portion of the second portion along a thickness direction; and

wherein a ratio of a thickness of the first reaction layer to a thickness of the second reaction layer ranges from 1:0.5 to 1:4.