Patent ID: 11893334
Assignee: TSMC NANJING COMPANY, LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method, comprising:
forming a first group of macros in a first region, wherein the first group of macros are aligned with a first boundary of a channel that is coupled thereto through pins of the first group of macros;
forming a number of a plurality of buffers in the channel, wherein the number of the plurality of buffers is associated with a predicted channel path for each one in the first group of macros, wherein the predicted channel path is between one of a plurality of standard cells and a corresponding one of the first group of macros;
forming a second group of macros in the first region to align with a second boundary of the channel that is coupled thereto through pins of the second group of macros, wherein the first and second groups of macros are coupled to a first register; and
forming a third group of macros in a second region different from the first region, wherein a first macro and a second macro that are in the third group of macros are aligned with the first and second boundaries of the channel respectively, wherein the third group of macros are coupled to a second register different from the first register.