Patent ID: 11967623
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. An electronic system comprising:
a main board;
a semiconductor device on the main board; and
a controller on the main board and electrically connected to the semiconductor device,
wherein the semiconductor device includes:
a substrate;
a plurality of gate stack structures on the substrate;
a plurality of separation structures that extend in a first direction on the substrate and separate the gate stack structures from each other; and
a plurality of vertical structures that penetrate the gate stack structures,

wherein each of the gate stack structures includes:
a plurality of electrodes and a plurality of cell dielectric layers that are alternately stacked, the electrodes including a plurality of upper electrodes;
a barrier layer that extends between the electrodes and the cell dielectric layers;
a separation dielectric pattern that extends in the first direction, the separation dielectric pattern penetrating the upper electrodes to separate each of the upper electrodes into pieces that are spaced apart from each other in a second direction that intersects the first direction; and
a plurality of capping patterns between the separation dielectric pattern and the upper electrodes,

wherein the capping patterns are on sidewalls of each of the upper electrodes,
wherein each of the capping patterns is on a sidewall of the barrier layer, and
wherein each of the capping patterns extends in a third direction perpendicular to a top surface of the substrate to cover the sidewall of the barrier layer and is spaced apart from other ones of the capping patterns in the third direction.