Patent ID: 11966272
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. The system of claim 4, wherein the power mode comprises:
the active power mode having an active power level;
the idle power mode having the first power level lower than the active power level and the first exit latency to return to the active power mode;
the deep idle power mode having the second power level lower than the first power level and the second exit latency to return to the active power mode higher than the first latency;
a sleep power mode having a third power level lower than the second power level and a third exit latency to return to the active power mode higher than the second exit latency; and
a powerdown power mode having a fourth power level lower than the third power level,
wherein the deep idle power mode is a different power mode than the sleep power mode,
wherein the powerdown power mode is different than the sleep power mode,
wherein VCC is maintained in the storage device in the deep idle power mode and disabled in the storage device in the sleep power mode, and
wherein at least one of VCCQ or VCCQ2, different than VCC, is maintained in the storage device in the deep idle power mode and the sleep power mode.