Patent ID: 11973029
Assignee: SUZHOU QING XIN FANG ELECTRONICS TECHNOLOGY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of fabricating an integrated circuit (IC) device, comprising:
vertically bonding a magnetic chip in a first layer of the IC device to a bonding pad of a lead frame;
vertically bonding at least one semiconductor chip in a second layer of the IC device to the magnetic chip in the first layer to form a multi-layer IC structure, the magnetic chip in the first layer being disposed between the bonding pad of the lead frame and the at least one semiconductor chip in the second layer;
connecting at least one terminal pad of the at least one semiconductor chip in the second layer to at least one terminal pad of the magnetic chip in the first layer, respectively;
connecting at least one terminal pad of the magnetic chip in the first layer to at least one lead of the lead frame, respectively; and
encapsulating the multi-layer IC structure and the bonding pad of the lead frame within a protective enclosure,
wherein the magnetic chip includes organic material, one or more copper conductor layers, and one or more magnetic material layers, and wherein the method further comprises:
performing one or more of bonding and laminating the organic material of the magnetic chip with the one or more copper conductor layers and the one or more magnetic material layers.