Patent ID: 11908903
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 7:
8. A method of fabricating a semiconductor structure, comprising:
forming a cladding layer adjacent a first side, a second side, a third side, and a fourth side of an active channel structure;
forming a recess by removing a portion of the cladding layer and a portion of the active channel structure such that after forming the recess the cladding layer is adjacent the first side, the second side, and the third side of the active channel structure, but not adjacent the fourth side of the active channel structure;
filling the recess with dielectric material; and
forming a gate structure around the active channel structure,
wherein forming the cladding layer comprises forming a layer of silicon germanium adjacent the first side, the second side, the third side, and the fourth side of the active channel structure.