Patent ID: 11900243
Assignee: LYNXI TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. The method according to claim 4, wherein the second route packet further comprises a second valid address corresponding to the third pulse sequence, wherein the second valid address is a transmitting address of a second reference pulse in the fourth pulse sequence, and
performing membrane potential integral operation on at least one third pulse sequence according to the corresponding synaptic weight matrix to obtain the corresponding membrane potential sequence comprises:
determining, according to the second valid address and the third pulse sequence, an address of a synaptic weight valid row in the synaptic weight matrix, and determining a synaptic weight of the valid row; and
performing membrane potential integral operation according to the synaptic weight of the valid row to determine the membrane potential sequence corresponding to the third pulse sequence.