Patent ID: 11886979
Assignee: PERCEIVE CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. The neural network inference circuit of claim 16, wherein the plurality of register cells are configurably grouped into a set of shift registers, wherein the input buffer configuration circuit shifts the first set of input values in the input buffer while loading the second set of input values into the input buffer by:
loading a first input value of the second set of input values into a first register cell of a particular one of the shift registers; and
shifting each of the input values of the first set of input values that are stored in the register cells of the particular shift register by one register cell within the particular shift register, wherein a first input value of the first set of input values that is initially stored in a last register cell of the shift register is shifted out of the input buffer.