Patent ID: 11881480
Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 13:
14. The method according to claim 13, wherein a process of forming the first nanostructure, the second nanostructure, the third nanostructure, and the fourth nanostructure includes:
removing the first sacrificial layer and the second sacrificial layer exposed by the first gate opening, forming a first groove between adjacent first nanowires to form the first nanostructure, and forming a second groove between adjacent second nanowires to form the second nanostructure; and
removing the third sacrificial layer and the fourth sacrificial layer exposed by the second gate opening, forming a third groove between adjacent third nanowires to form the third nanostructure, and forming a fourth groove between adjacent fourth nanowires to form the fourth nanostructure.