Patent ID: 11929016
Assignee: MACROBLOCK, INC.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A scan-type display apparatus comprising:
a light emitting diode (LED) array having a common anode configuration, and including
a plurality of scan lines,
a plurality of data lines, and
a plurality of LEDs arranged in a matrix that has a plurality of rows respectively corresponding to said scan lines and a plurality of columns respectively corresponding to said data lines,
with respect to each of said rows, anodes of said LEDs in said row being connected to said scan line that corresponds to said row,
with respect to each of said columns, cathodes of said LEDs in said column being connected to said data line that corresponds to said column; and

a scan driver including a plurality of scan driving circuits that respectively correspond to said scan lines, each of said scan driving circuits including
a voltage generator having an output terminal that is connected to said scan line corresponding to said scan driving circuit, and configured to output one of an input voltage and a clamp voltage at said output terminal of said voltage generator, and
a detector connected to said output terminal of said voltage generator to receive a voltage at said output terminal of said voltage generator, further receiving a detection timing signal, and generating a detection signal that indicates whether any one of said LEDs connected to said scan line corresponding to said scan driving circuit is short circuited based on the voltage at said output terminal of said voltage generator and the detection timing signal;
wherein, with respect to each of said scan driving circuits, said detector includes
a comparator having a first input terminal that is connected to said output terminal of said voltage generator to receive the voltage at said output terminal of said voltage generator, a second input terminal that receives a predetermined reference voltage, and an output terminal that provides a comparison signal, and
a logic gate having a first input terminal that is connected to said output terminal of said comparator to receive the comparison signal, a second input terminal that receives the detection timing signal, and an output terminal that provides the detection signal.