Patent ID: 11888028
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A semiconductor device, comprising:
an active pattern on a substrate;
a plurality of semiconductor patterns that are stacked on the active pattern and vertically spaced apart from each other;
a gate electrode on the plurality of semiconductor patterns, the gate electrode including a first portion in a space between adjacent ones of the semiconductor patterns and a second portion on the uppermost one of the semiconductor patterns;
a gate spacer on a side surface of the second portion of the gate electrode; and
a liner layer provided in the space and interposed between the first portion and the adjacent ones of the semiconductor patterns,
wherein the liner layer comprises a same semiconductor material as the semiconductor patterns,
wherein the liner layer includes a first region, which is interposed between the second portion and the uppermost semiconductor pattern, and a second region, which is interposed between the second portion and the gate spacer and contacts the gate spacer, and
wherein the first region and the second region have different crystalline structures from each other.