Patent ID: 11862453
Assignee: MARVELL ASIA PTE LTD
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of forming a metal gate transistor, the method comprising:
forming a semiconductor channel in a semiconductor substrate;
depositing a source electrode and a drain electrode on the semiconductor channel, the source electrode and the drain electrode being spaced apart to define a source-to-drain direction parallel to major plane of the semiconductor substrate;
providing dielectric spacers above the source electrode and the drain electrode, the dielectric spacers defining a gate void spanning the source electrode and the drain electrode;
depositing a portion of a dielectric layer on a bottom wall and portions of the dielectric layer on sidewalls of the gate void;
depositing a portion of a work-function metal layer on the portion of the dielectric layer on the bottom wall and portions of the work-function metal layer on the portions of the dielectric layer on the sidewalls;
etching away the portions of the work-function metal layer on the sidewalls leaving the portion of the work-function metal layer on the bottom wall to control work function between the semiconductor channel and a conductive metal gate material to be deposited;
filling the gate void above the portion of the work-function metal layer on the bottom wall, and between the portions of the dielectric layers on the sidewalls, with the conductive metal gate material, the conductive metal gate material directly contacting the portions of the dielectric layers on the sidewalls and directly contacting the portion of the work-function metal layer on the bottom wall; and
after depositing the portions of the dielectric layer on the bottom wall and the portions of the dielectric layer on the sidewalls, and after depositing the portion of the work-function metal layer on the dielectric layer on the bottom wall and portions of the work-function metal layer on the portions of the dielectric layer on the sidewalls, and before etching away portions of the work-function metal layer from the sidewalls, the method further comprising:
filling the gate void above the portion of the work-function metal layer on the bottom wall, and between the portions of the work-function metal layers on the sidewalls, with an initial deposit of the conductive metal gate material, and
etching away at least a portion of the initial deposit of the conductive metal gate material.