Patent ID: 11924090
Assignee: CISCO TECHNOLOGY, INC.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An apparatus comprising:
one or more physical network interfaces operative to send and receive packets in a network;
a memory;
a fast path packet processing unit performing hardware-based packet processing; and
a slow path packet processing unit performing processor-based packet processing based on programmed instructions,
wherein the fast path processing unit is operative to:
access the memory storing a packet comprising one or more packet headers, wherein at least one of the one or more headers comprises segment routing information, the segment routing information including at least Operations, Administration, and Maintenance (OAM) information, the OAM information including at least OAM signaling information;
acquire OAM information associated with the packet; and
responsive to the OAM signaling information in the segment routing information:
transfer the OAM information and processing of the packet to the slow path processing unit,
wherein the slow path processing unit is operative to apply one or more OAM processing operations on the packet.