Patent ID: 11901256
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A method of manufacturing a semiconductor device, comprising:
providing a wafer comprising a wafer substrate, an interconnect structure located on the wafer substrate and conductive vias connected to the interconnect structure, the interconnect structure being located between the wafer substrate and the conductive vias, and the wafer substrate comprising a first sub-portion, a second sub-portion and a third sub-portion connecting therebetween;
performing a first cutting step to form a first trench penetrating through the interconnect structure and further extending through the first sub-portion and the third sub-portion of the wafer substrate; and
performing a second cutting step to form a second trench penetrating through a second sub-portion of the wafer substrate so to form a semiconductor device comprising a substrate having a sidewall comprising a first planar sidewall of a first portion of the substrate, a second planar sidewall of a second portion of the substrate and a curved sidewall of a third portion of the substrate, wherein the first planar sidewall is connected to the second planar sidewall through the curved sidewall.