Patent ID: 11914933
Assignee: SIFIVE, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. The system of claim 8, wherein the design flow configuration data structure is part of a design parameters data structure, and the memory includes instructions executable by the processor to cause the system to:
access the design parameters data structure, wherein the design parameters data structure includes values of design parameters of an integrated circuit design;
responsive to a command identifying the design parameters data structure, generate a register-transfer level data structure for an integrated circuit based on the design parameters data structure;
responsive to the command identifying the design parameters data structure, generate a software development kit for the integrated circuit based on the register-transfer level data structure;
wherein the design flow is generated responsive to the command identifying the design parameters data structure;
wherein the output integrated circuit design data structure includes a physical design data structure for the integrated circuit that is generated, responsive to the command identifying the design parameters data structure, based on the register-transfer level data structure;
responsive to the command identifying the design parameters data structure, generate a test plan for the integrated circuit based on the design parameters data structure and acceptance criteria; and
responsive to the command identifying the design parameters data structure, invoke tests for the integrated circuit based on the test plan, the register-transfer level data structure, the software development kit, and the physical design data structure to obtain a set of test results.