Patent ID: 11956970
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 13:
14. The apparatus of claim 13, further comprising:
a third activation line of the first level aligned along the second direction and operable to activate a plurality of fifth transistors of the first level, each fifth transistor of the plurality of fifth transistors operable to couple a respective first digit line of a second set of first digit lines of the plurality of first digit lines with the first plate node; and
a fourth activation line of the second level aligned along the second direction and operable to activate a plurality of sixth transistors of the second level, each sixth transistor of the plurality of sixth transistors operable to couple a respective second digit line of a second set of second digit lines of the plurality of second digit lines with the second plate node.