Patent ID: 11963346
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. The method for manufacturing the semiconductor structure according to claim 12, wherein the sidewall structure and the isolation pattern structure are formed at the same time, forming the sidewall structure and the isolation pattern structure comprise:
forming a first sacrificial layer on sidewalls of the top dielectric layer, and forming a second sacrificial layer on sidewalls of the first dielectric layer;
forming a sidewall dielectric layer on sidewalls of the first sacrificial layer, and forming a second dielectric layer on sidewalls of the second sacrificial layer; and
removing the first sacrificial layer and the second sacrificial layer to form the first air gap and the second air gap;
wherein, the first air gap and the sidewall dielectric layer form the sidewall structure, the first dielectric layer, the second air gap and the second dielectric layer form the isolation pattern structure.