Patent ID: 11887657
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. The amplifier circuit according to claim 9, wherein the preprocessing circuit comprises:
a charge transistor, with one of a source or a drain coupled to the readout node or the complementary readout node, the other one of the source or the drain coupled to a node that provides the preset voltage, and a gate used for receiving the precharge signal, wherein
the charge transistor is configured to be turned on based on the precharge signal at the charging stage to precharge the bit line, the complementary bit line, the readout node, and the complementary readout node to the preset voltage; and
an equilibrium transistor, with one of a source or a drain coupled to the readout node, the other one of the source or the drain coupled to the complementary readout node, and a gate used for receiving the equilibrium signal, wherein
the equilibrium transistor is configured to be turned on based on the equilibrium signal at the equilibrium stage to synchronize the node voltage of the readout node and the node voltage of the complementary readout node.