Patent ID: 11870426
Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 3:
4. A capacitor-insulated semiconductor relay that maintains insulation between input and output in the semiconductor relay using capacitors, the semiconductor relay comprising:
a pair of input terminals;
an RC oscillation circuit connected to the pair of input terminals and configured to oscillate in response to an input signal to generate a first signal and a second signal that are inverse in phase to each other;
a waveform regulation circuit configured to receive the first signal and the second signal, and increase rise and fall times of the first signal, and rise and fall times of the second signal;
a booster circuit configured to receive signals outputted from the waveform regulation circuit to generate a predetermined voltage;
a charging/discharging circuit connected to the booster circuit;
an output circuit connected to the charging/discharging circuit; and
a pair of output terminals connected to the output circuit,
the booster circuit being a charge pump circuit having a first high dielectric strength capacitor and a second high dielectric strength capacitor connected in parallel to each other,
the RC oscillation circuit including a plurality of stages of inverters connected in series, and a feedback resistor and a feedback capacitor connected in parallel to the plurality of stages of inverters,
the waveform regulation circuit having a first circuit configured to increase the rise and fall times of the first signal, and a second circuit configured to increase the rise and fall times of the second signal,
the first high dielectric strength capacitor being configured to receive input of a signal outputted from the first circuit, the second high dielectric strength capacitor being configured to receive input of a signal outputted from the second circuit,
the output circuit being configured to be driven based on the voltage generated by the booster circuit,
the RC oscillation circuit, the waveform regulation circuit, and the charging/discharging circuit are located farther away from the output circuit than the first high dielectric strength capacitor and the second high dielectric strength capacitor, and
the RC oscillation circuit, the waveform regulation circuit, the booster circuit, and the charging/discharging circuit are integrated with one another into a semiconductor integrated circuit chip having an element isolation region.