Patent ID: 11972820
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. A method of operating non-volatile storage, comprising:
applying doses of programming to a selected data word line of a plurality of data word lines connected to multiple NAND strings that form a block having at least three sub-blocks, each NAND string includes memory cells in each of the three sub-blocks, the selected word line is in a selected sub-block, each NAND string includes a dummy memory cell;
inhibiting unselected NAND strings from programming by boosting channels of the unselected NAND strings in the selected sub-block from a positive pre-charge voltage to a boosted voltage;
performing program-verify between pairs of successive doses of programming;
pre-charging channels of the unselected NAND strings in the selected sub-block to the positive pre-charge voltage while lowering voltages at the end of program-verify by concurrently:
applying a pre-charging voltage to a source line connected to the NAND strings,
applying overdrive voltages to data word lines in a sub-block closer to the source line than the selected sub-block,
lowering voltages of data word lines on a side the selected word line that is further from the source line than the selected data word line, and
applying an overdrive voltage to a dummy word line between the selected sub-block and the sub-block closer to the source line than the selected sub-block, the dummy word line is connected to the dummy memory cells of the NAND strings;

after the pre-charging, lowering to a resting voltage the dummy word line between the selected sub-block and the sub-block closer to the source line; and
after the lowering the dummy word line to the resting voltage and prior to a next dose of programming, lowering to one or more resting voltages the data word lines in the sub-block closer to the source line than the selected sub-block.