Patent ID: 11973076
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. An ESD protection circuit, coupled between a first reference terminal and a second reference terminal, the electrostatic discharge protection circuit comprising:
a first voltage divider;
a second voltage divider;
a first trigger circuit, comprising a first terminal and a second terminal, wherein the first terminal is coupled to the first reference terminal, the second terminal is coupled to the second reference terminal via the first voltage divider;
a second trigger circuit, comprising a first terminal and a second terminal, wherein the first terminal is coupled to the second reference terminal, the second terminal is coupled to the first reference terminal via the second voltage divider, and the second trigger circuit and the first trigger circuit are in parallel connection;
a first discharge component, comprising a gate, a first source/drain and a second source/drain, wherein the gate is coupled between the first trigger circuit and the first voltage divider; and
a second discharge component, comprising a gate, a first source/drain and a second source/drain, wherein the gate is coupled between the second trigger circuit and the second voltage divider, and the first discharge component and the second are in series connection;
wherein the first trigger circuit comprises a third GaN based transistor comprising a first source/drain, a second source/drain and a gate, wherein the first source/drain and the second source/drain of the third GaN based transistor are coupled to the first terminal of the first trigger circuit, and the gate of the third GaN based transistor is coupled to the second terminal of the first trigger circuit.