Patent ID: 11947891
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 3:
4. The computer-implemented method of claim 1 further comprising:
detecting the first type of timing violation on a first group of signal paths connected to the local clock buffer;
determining the first metric for the first group of signal paths;
detecting the second type of timing violation on a second group of signal paths connected to the local clock buffer;
determining the second metric for the second group of signal paths;
accumulating the first metric for the first group of signal paths to generate a first overall metric;
accumulating the second metric for the second group of signal paths to generate a second overall metric;
comparing the first overall metric with the second overall metric; and
wherein determining whether to retain the generation of the first clock signal or to configure the local clock buffer to generate the second clock signal is further based on a result of the comparison of the first overall metric with the second overall metric.