Patent ID: 11875153
Assignee: NEXT SILICON LTD
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 23:
24. The system of claim 1, wherein the at least one reconfigurable processing grid further comprises at least one other context storage; and
wherein the at least one hardware processor is further configured for configuring the at least one reconfigurable processing grid for:
when execution of the at least one identified operation of the first thread completes:
storing at least one additional runtime context value of the first thread in the at least one other context storage;
further executing the first thread; and
while further executing the first thread:
while waiting for completion of further execution of at least one other identified operation of the plurality of operations of the first thread by at least one other identified logical element of the plurality of logical elements, executing the at least one other identified operation of another second thread of the plurality of threads by the at least one other identified logical element.