Patent ID: 11908833
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A method of manufacturing a semiconductor assembly, the method comprising:
providing a substrate;
stacking, over a first location on the substrate, a first plurality of semiconductor dies in a first stack, the first stack including an uppermost semiconductor die, wherein the first plurality of semiconductor dies are each attached by a first die attach film having a first thickness; and
stacking, over a second location on the substrate, a second plurality of semiconductor dies in a second stack,
wherein the second plurality of semiconductor dies are each attached by a second die attach film having a second thickness different than the first thickness,

wherein at least a portion of a semiconductor die of the second stack is superimposed above at least a portion of the uppermost semiconductor die of the first stack such that the semiconductor die of the second stack is not physically supported by the first stack.