Patent ID: 11908505
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 12:
13. The data processing device of claim 12, wherein:
the storage data I/O interface is adapted to store in each pair of data storage units in a respective pair of columns a respective pair of binary digits of three different combinations, one indicative of a binary “0,” one indicative of a binary “1,” and one indicative of a binary don't-care (“X”), thereby storing in each row of data storage units a set of values indicative of a stored binary digital pattern in which each digit is “0,” “1” or “X;” and
the search data input interface is adapted to supply to each pair of the INs associated with the respective pair of columns a respective pair of binary digits of three different combinations, one indicative of a binary “0,” one indicative of a binary “1,” and one indicative of a binary “X,” thereby supplying to all rows of data storage units a set of values indicative of a input binary digital pattern in which each digit is “0,” “1” or “X;” and
each of the MLs is adapted to supply at the output end a first signal indicative of a match between the stored binary digital pattern and the input binary digital pattern every digit in the input binary digital pattern and the respective digit in the stored binary digital pattern are identical to each other, or at least one of the two digits is an “X.”