Patent ID: 11934706
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A storage device, comprising:
a non-volatile memory comprising a block including a first page, a second page, first flash management units (FMUs), and second FMUs, wherein the first page includes the first FMUs and the second page includes the second FMUs;
a volatile memory; and
a controller configured to store, in one of the first FMUs, a starting logical address and a logical address range encompassing multiple ones of the first FMUs of the block, to accumulate first logical addresses indicated by the starting logical address and the logical address range in the volatile memory in response to host write commands prior to storing the starting logical address and the logical address range in the one of the first FMUs, and to store in one of the second FMUs, second logical addresses for multiple ones of the second FMUs of the block,
wherein the controller is further configured to read the starting logical address and the logical address range indicating the first logical addresses from the one of the first FMUs during a first data relocation, and to read the second logical addresses from the one of the second FMUs during a second data relocation.