Patent ID: 11914541
Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. A method, comprising:
identifying, by a processor of a computing device, a first device with a power savings mode in a first slot of an expansion interface;
identifying, by the processor, a second device without the power savings mode in a second slot of the expansion interface;
determining, by the processor, that the first device is compatible with a reset signal that controls the power savings mode and that the second device is not compatible with the reset signal that controls the power savings mode; and
disabling, by the processor, a power savings mode of the expansion interface in response to detecting the first device with the power savings mode in the first slot and the second device without the power savings mode in the second slot by preventing generation of the reset signal that controls the power savings mode.