Patent ID: 11942436
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A semiconductor device comprising:
a substrate;
electrical components in the substrate;
an interconnect structure over the substrate and electrically coupled to the electrical components, wherein the interconnect structure comprises first dielectric layers and conductive features in the first dielectric layers;
a first passivation layer over the interconnect structure;
a conductive pad over the first passivation layer, wherein a portion of the conductive pad extends through the first passivation layer and is electrically coupled to the interconnect structure; and
a second dielectric layer over the first passivation layer and the conductive pad, wherein a sidewall of the second dielectric layer is aligned with a respective sidewall of the first dielectric layers along a same line, wherein there is a lateral offset between the sidewall of the second dielectric layer and a sidewall of the first passivation layer closest to the sidewall of the second dielectric layer.