Patent ID: 11869956
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of fabricating an integrated circuit, the method comprising:
performing a first implant into a transistor region of a semiconductor substrate thereby producing an arsenic or antimony profile having a peak concentration at a first depth;
performing a second implant into the transistor region thereby producing a phosphorus profile having a peak concentration at a second depth greater than the first depth; and
performing a third implant into the transistor region thereby producing an argon profile having a peak concentration at a third depth that is greater than the first depth and about equal to the second depth,
wherein the second implant is a channel stop implant and the third implant is a channel stop dopant migration control implant, the method further comprising:
performing a fourth implant into the transistor region, the fourth implant being a well implant having a peak dopant concentration of phosphorus at a fourth depth that is greater than the second depth; and
performing a fifth implant into the transistor region, the fifth implant being a well implant dopant migration control implant of argon targeted to a fifth depth that is at or about the fourth depth.