Patent ID: 11901028
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 4:
5. The data transmission circuit according to claim 4, wherein the data conversion circuit comprises:
a first transmission subcircuit electrically connected to the first data line, the check circuit and the second data line and electrically connected to an output terminal of the status recognition subcircuit by means of a first phase inversion subcircuit, the first transmission subcircuit being configured to transmit the second data to the second data line when the comparison result is indicative of not exceeding the preset threshold, the preset threshold being half of the preset bit width; and
a second transmission subcircuit electrically connected to the second data line and the output terminal of the status recognition subcircuit and electrically connected to the first data line and the check circuit by means of a second phase inversion subcircuit, the second transmission subcircuit being configured to invert the second data and transmit the inverted second data to the second data line when the comparison result is indicative of exceeding the preset threshold.