Patent ID: 11864386
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 13:
14. A memory array, comprising:
vertically-alternating tiers of insulative material and memory cells, the memory cells individually comprising:
a transistor comprising first and second source/drain regions having a channel region there-between and a gate operatively proximate the channel region;
a capacitor comprising first and second electrodes having a capacitor insulator there-between, the first electrode being electrically coupled to the first source/drain region; and
horizontally-extending lines in individual of the memory cell tiers, individual of the second source/drain regions in the individual memory cell tiers being electrically coupled to individual of the horizontally-extending lines in the respective individual memory cell tier, the individual horizontally-extending lines comprising end-to-end-overlapping-interconnected ring-like structures.