Patent ID: 11955157
Assignee: INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. The PUF apparatus according to claim 8,
wherein the voltage line has a fourth voltage in an evaluation phase in which a FeFET pair of a PUF cell selected according to an address applied as a challenge among the plurality of PUF cells generates and outputs a response according to different threshold voltage states set in the enrollment phase,
wherein the ground line has the first voltage in the evaluation phase,
wherein, among an evaluation precharge phase and a response generation phase of the evaluation phase, in the evaluation precharge phase, the selected word line among the plurality of word lines has the first voltage, and in the response generation phase, has the fourth voltage, and
wherein the unselected word lines among the plurality of word lines have the first voltage in the evaluation phase.