Patent ID: 11875749
Assignee: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H  G | IPC G

Claim 5:
6. The display substrate according to claim 5, wherein the gate electrode of the second noise reduction transistor is electrically connected to the second clock signal line through a third connection wire, the third connection wire comprises a third sub-connection wire and a fourth sub-connection wire, the third sub-connection wire is connected to the gate electrode of the second noise reduction transistor and extends along the first direction, an orthographic projection of the third sub-connection wire on the base substrate and an orthographic projection of the active layer of the second noise reduction transistor on the base substrate are oppositely arranged side by side in the second direction, the fourth sub-connection wire is connected to the third sub-connection wire and the second clock signal line and extends along the second direction, and an orthographic projection of the fourth sub-connection wire on the base substrate is on a side of an orthographic projection of the active layer of the second noise reduction transistor on the base substrate away from an orthographic projection of the active layer of the first noise reduction transistor on the base substrate.