Patent ID: 11908800
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A semiconductor structure comprising:
an inter-metal dielectric layer;
a conductive line embedded in the inter-metal dielectric layer;
a passivation layer over the inter-metal dielectric layer and covering a portion of the conductive line;
a pad layer partially embedded in the passivation layer and over the conductive line; and
a barrier layer between the pad layer and the conductive line, wherein the barrier layer comprises:
a first layer in a nano-crystalline phase;
a second layer above the first layer and in a poly-crystalline phase;
a third layer above the second layer and in the nano-crystalline phase; and
a fourth layer above the third layer and in the poly-crystalline phase.