Patent ID: 11862610
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 4:
5. The method of claim 1, wherein:
each complementary die set comprises a second complementary die comprising a third pair of complementary-die sidewalls laterally extending along a fifth horizontal direction that is not parallel to the first horizontal direction, the second horizontal direction, the third horizontal direction, or the fourth horizontal direction, and comprising a fourth pair of complementary-die sidewalls laterally extending along a sixth horizontal direction that is perpendicular to the fifth horizontal direction;
each second complementary die is bonded to a respective one of the primary semiconductor dies through an array of metal bonding structures that comprises a rectangular array of solder balls bonded to a respective mating pair of metal pads or a rectangular array of solder material portions bonded to a respective pair of copper pillar bumps; and
the rectangular array of solder balls has a bump periodicity along the fifth horizontal direction and an additional bump periodicity along the sixth horizontal direction.