Patent ID: 11966817
Assignee: AMAZON TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A system, comprising:
one or more quantum hardware devices configured to:
implement, via lattice surgery, a merged surface and color quantum code comprising a plurality of qubits and a plurality of stabilizers; and

one or more computing devices configured to:
receive one or more stabilizer measurements of the merged surface and color quantum code;
identify, for a syndrome graph of the respective stabilizer measurements, one or more locations of non-trivial stabilizer measurement outcomes, wherein at least one location is within a quantum surface code portion of the merged surface and color quantum code;
map, via the one or more locations, a connectivity path, whose origin is at a first virtual stabilizer of the merged surface and color quantum code and whose terminus is at a second virtual stabilizer of the merged surface and color quantum code; and
perform an error correction onto one or more selected qubits of a given number of qubits located at the border of the quantum surface code portion and a quantum color code portion of the merged surface and color quantum code, the selected qubits comprising qubits located at the border and between the origin and the terminus of the connectivity path.