Patent ID: 11886349
Assignee: NXP USA, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. An N-partition execution system comprising: a remap address space controller (RASC) comprising: comparison logic configured to determine by the RASC whether a current execution context of a bus master external to the RASC allows a transaction received from the bus master to access an address space, wherein the comparison logic is configured to compare by the RASC an access type of the transaction to access types which are allowed by the current execution context to the address space; and remap logic configured by the RASC to selectively remap a physical address of the transaction to form a remapped physical address according to the current execution context based on a determination by the comparison logic of whether the current execution context allows the transaction to access the address space.