Patent ID: 11880669
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. A semiconductor apparatus comprising:
one or more substrates; and
logic coupled to the one or more substrates, wherein the logic is implemented at least partly in one or more of configurable logic or fixed-functionality hardware logic, the logic coupled to the one or more substrates to:
generate a first compiler output based on input code that includes dynamically typed variable information,
generate a second compiler output based on the input code, wherein the second compiler output is to include type check code to verify one or more type inferences associated with the first compiler output, and
execute the first compiler output and the second compiler output in parallel via different threads,
wherein the first compiler output is to further include fallback code to transition a computing system into an execution state that is independent of the one or more type inferences if a verification of the one or more type inferences by the second compiler output fails.