Patent ID: 11923259
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A package structure, comprising:
a package substrate;
a first semiconductor package and a second semiconductor package, electrically bonded to the package substrate;
an underfill material, disposed to fill a first space between the first semiconductor package and the package substrate and a second space between the second semiconductor package and the package substrate;
a gap filling structure, disposed over the package substrate and in a first gap laterally between the first semiconductor package and the second semiconductor package, wherein the gap filling structure is in contact with a sidewall of the first semiconductor package and a sidewall of the second semiconductor package face to each other and the underfill material, while without in contact with another sidewall of the first semiconductor package and another sidewall of the second semiconductor package face away from each other; and
a heat dissipation structure, disposed on the package substrate and attached to the first semiconductor package and the second semiconductor package through a thermal conductive layer.