Patent ID: 11893435
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 15:
16. The internal voltage generation circuit of claim 1, wherein the second contact switch includes:
a main switch including a first p-channel metal-oxide semiconductor (PMOS) transistor which has a source coupled to the contact voltage and a drain coupled to the second node;
an assist switch including a second PMOS transistor which has a source coupled to a gate of the main switch as a first internal node, a drain coupled to the contact voltage and a gate receiving an on-voltage associated with generating the control voltage;
a first delay circuit including a plurality of first inverters cascade-connected, the first delay circuit configured to operate based on the control voltage and configured to delay an assist switch power-down signal to generate the on-voltage;
a second delay circuit, connected to a second internal node, configured to operate based on the control voltage and configured to delay the first switching enable signal to provide the delayed first switching enable signal to the second internal node;
a second inverter connected between the first internal node and the second internal node;
a third inverter connected to the second inverter at a third internal node and connected between the third internal node and a ground voltage, the third inverter configured to invert the on-voltage to provide the inverted on-voltage to a fourth internal node;
a third PMOS transistor which has a source coupled to the third internal node, a gate coupled to the fourth internal node and a drain coupled to a fifth internal node;
an n-channel metal-oxide semiconductor (NMOS) capacitor coupled between the fifth internal node and the ground voltage;
a fourth PMOS transistor which has a drain coupled to the fifth internal node, a source coupled to a sixth internal node connected to the control voltage and a gate coupled to a seventh internal node;
a fourth inverter, connected between the sixth internal node and the ground voltage, configured to invert the on-voltage to provide the inverted on-voltage to the seventh internal node.