Patent ID: 11961821
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 14:
15. A method of making a memory device, comprising:
providing a package substrate having an upper surface with an upper surface area;
stacking a plurality of first semiconductor dies in a first shingled stack, each first semiconductor die of the plurality having a first length and a first width, the first shingled stack overlying a first area of the package substrate;
stacking a plurality of second semiconductor dies in a second shingled stack, each second semiconductor die of the plurality having a second length and a second width, the second shingled stack overlying a second area of the package substrate different from the first area; and
providing an encapsulant to at least partially encapsulate the package substrate, the first shingled stack and the second shingled stack,
wherein the first length is different than the second length and the second width.