Patent ID: 11899944
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. A method performed by a memory device, comprising:
receiving, from a host device, a command indicating that the memory device is to transition from a power state in which the memory device operates a volatile memory in a power mode for the volatile memory and a non-volatile memory in a power mode for the non-volatile memory, wherein the non-volatile memory comprises one or more clocks, one or more command and address buffers, and one or more memory banks;
transitioning, based at least in part on the command, the volatile memory from the power mode for the volatile memory to an idle power mode for the volatile memory that consumes more power than the power mode for the volatile memory; and
transitioning, based at least in part on the command, the non-volatile memory from the power mode for the non-volatile memory to a first idle power mode for the non-volatile memory that consumes more power than the power mode for the volatile memory and that consumes less power than a second idle power mode for the non-volatile memory, wherein the one or more clocks, the one or more command and address buffers, and the one or more memory banks are powered down in the first idle power mode, and wherein the one or more clocks and the one or more command and address buffers are powered up in the second idle power mode and the one or more memory banks are powered down in the second idle power mode.