Patent ID: 11862090
Assignee: LG DISPLAY CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A display device comprising:
a display panel including a plurality of pixels that are arranged in a plurality of pixel rows, a plurality of gate lines connected to the plurality of pixels, and a plurality of data lines connected to the plurality of pixels, the plurality of pixel rows including a first pixel row and a second pixel row that is after the first pixel row, wherein at least one pixel row is between the first pixel row and the second pixel row;
a gate driving circuit configured to output a plurality of gate signals to the plurality of pixels; and
a data driving circuit configured to output a plurality of data voltages to the plurality of pixels,
wherein a pixel included in the second pixel row includes:
a driving transistor including a first electrode connected to a first node, a gate electrode connected to a second node, and a second electrode connected to a third node, the driving transistor configured to supply a driving current to a light emitting device;
a first transistor that is electrically connected between the second node and the third node;
a second transistor that is electrically connected between the first node and a data line from the plurality of data lines that supplies a data voltage from the plurality of data voltages;
a third transistor that is electrically connected between the first node and a power line that supplies a high potential voltage;
a storage capacitor that comprises a first electrode and a second electrode, the first electrode of the storage capacitor connected to the power line that supplies the high potential voltage and the second electrode of the storage capacitor connected to the second node; and
a fourth transistor that is electrically connected between the second node and a voltage line that provides an initialization voltage, wherein the fourth transistor is configured to supply the initialization voltage to the gate electrode of the driving transistor at the second node responsive to a first scan signal that is also supplied to a pixel included in the first pixel row; and
a seventh transistor electrically connected between the first node and a second voltage line that supplies a bias voltage,

wherein the first transistor and the second transistor receive a second scan signal, and the second transistor is configured to apply the data voltage to the first electrode of the driving transistor at the first node responsive to the second scan signal, and the first transistor is configured to turn on such that the gate electrode and the second electrode of the driving transistor are electrically connected responsive to the second scan signal.