Patent ID: 11914887
Assignee: MACRONIX INTERNATIONAL CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 3:
4. The storage device according to claim 3, wherein M=3, N=3, a reading voltage of the one-time reading operation related to the corresponding first bit of each multi-level cell is between Vt(1,1,0) and Vt(0,1,0), reading voltages of the M reading operations related to the corresponding second bit of each multi-level cell are between Vt(1,1,1) and Vt(1,0,1), between Vt(1,0,0) and Vt(1,1,0), and between Vt(0,1,1) and Vt(0,0,1) respectively, and reading voltages of the N reading operations related to the corresponding third bit of each multi-level cell are between Vt(1,0,1) and Vt(1,0,0), between Vt(0,1,0) and Vt(0,1,1), and between Vt(0,0,1) and Vt(0,0,0) respectively.