Patent ID: 11930635
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 3:
4. The method of manufacturing the semiconductor structure according to claim 3, wherein forming the second sublayer of the non-metal conductive layer comprises:
forming a second sublayer of non-metal conductive material to fill the bitline contact hole and to cover a surface of the first hard mask layer; and
etching the second sublayer of non-metal conductive material based on the first hard mask layer until a height difference between a top of the first sublayer of non-metal conductive material and a top of the second sublayer of non-metal conductive material equals to a preset value, a retained second sublayer of non-metal conductive material serving as the second sublayer of the non-metal conductive layer.