Patent ID: 11956663
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A multi-link device (MLD), the MLD comprising processing circuitry coupled to storage, the processing circuitry configured to:
generate a first traffic indication map (TIM) comprising a first bitmap comprising a first indication that traffic is to be sent by a first access point (AP) device of the MLD to a first non-AP device of a second MLD during a beacon interval occurring after a beacon using a first communication link between the first AP device of the MLD and the first non-AP device of the second MLD;
generate a second TIM comprising a second bitmap comprising a second indication that no traffic is to be sent by a second AP device of the MLD to a second non-AP device of the second MLD during the beacon interval using a second communication link between the second AP device of the MLD and the second non-AP device of the second MLD;
cause to send, using the first AP device of the MLD and the first communication link, the beacon, the beacon comprising the first TIM and the second TIM; and
cause to send, using the first AP device of the MLD and the first communication link, a data frame to the first non-AP device of the second MLD during the beacon interval.