Patent ID: 11862241
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 33:
34. A method of driving a variable resistive memory device, the variable resistive memory device including a memory cell including a bit line, a resistive layer and a word line, a first hierarchical bit line structure selectively connected between the bit line and a first voltage terminal configured to provide a first voltage, a second hierarchical bit line structure connected between a second voltage terminal configured to provide a second voltage lower than the first voltage and the bit line, a first hierarchical word line structure connected between the word line and the second voltage terminal, and a second hierarchical word line structure connected between the word line and the first voltage terminal, the method comprising:
performing a memory operation of the memory cell by using a forward current that flows from the first hierarchical bit line structure to the first hierarchical word line structure through the memory cell;
forming discharge paths in the second hierarchical word line structure and the second hierarchical bit line structure after completing the memory operation of the memory cell with the forward current to discharge residual voltages in the bit line and the word line;
performing a memory operation of the memory cell by using a reverse current that flows from the second hierarchical word line structure to the second hierarchical bit line structure through the memory cell; and
forming discharge paths in the first hierarchical bit line structure and the first hierarchical word line structure after completing the memory operation of the memory cell with the reverse current to discharge residual voltages in the bit line and the word line.