Patent ID: 11948881
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 14:
15. A semiconductor structure, comprising:
a die;
a lower dielectric layer disposed over the die;
an upper dielectric layer disposed over the lower dielectric layer;
a first conductive trace in the lower dielectric layer and electrically connected to the die, wherein the first conductive trace comprises:
a first via portion disposed in the lower dielectric layer; and
a first land portion disposed in the upper dielectric layer; and

a second conductive trace in the upper dielectric layer and electrically connected to the first conductive trace, wherein the second conductive trace comprises:
a second via portion disposed in the upper dielectric layer; and
a second land portion disposed over the upper dielectric layer,

wherein a thickness of the upper dielectric layer and a thickness of the lower dielectric layer are substantially inverse with a Young's modulus of the upper dielectric layer and a Young's modulus of the lower dielectric layer.