Patent ID: 11901345
Assignee: SK HYNIX INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor package comprising:
a substrate;
a first sub-semiconductor package disposed over the substrate, the first sub-semiconductor package including a first buffer chip, a first memory chip, and a first molding layer filling a space between the first buffer chip and the first memory chip to be in direct contact with side surfaces of the first buffer chip and a first memory chip; and
a second memory chip disposed over the first sub-semiconductor package,
wherein the first buffer chip and the substrate are connected to each other using a first bonding wire, wherein the first buffer chip and the first memory chip are connected to each other using a first redistribution line, and
wherein the first buffer chip and the second memory chip are connected to each other using a second bonding wire.