Patent ID: 11864475
Assignee: MICRON TECHNOLOGY, INC.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 24:
25. A method, comprising:
forming a channel in a sidewall of a material stack, the channel being bounded by a first dielectric layer, a second dielectric layer; and a conductive layer of the material stack;
depositing, into the channel over the conductive layer and via a trench by the sidewall of the material stack, a first material associated with a first electrode;
depositing, into the channel over the first material and via the trench, a second material associated with a storage element, wherein a first side of the first material is covered by the second material and a first side of the second material is exposed to the trench based at least in part on depositing the second material;
forming, through the first material and the second material, a first opening that exposes a second side of the second material;
replacing, via the first opening and based at least in part on exposing the second side of the second material, the second material with a chalcogenide material to form the storage element, wherein a first side of the storage element is covered by a dielectric material and a second side of the storage element is exposed by the first opening;
forming a second opening in the dielectric material, wherein the first side of the storage element is exposed by the second opening; and
depositing, based at least in part on forming the second opening, a conductive material over an interior of the second opening and a first side of the storage element to form a second electrode.