Patent ID: 11955396
Assignee: YIBU SEMICONDUCTOR CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. A semiconductor packaging method, comprising:
providing a set of semiconductor devices and a carrier board, the set of semiconductor devices having respective active surfaces and opposing passive surfaces, connection terminals formed on the active surfaces, and first alignment solder parts formed on the passive surfaces, the carrier board having second alignment solder parts respectively corresponding to the first alignment solder parts, wherein one of a respective first alignment solder part and a corresponding second alignment solder part is a solder bump, and the other of the respective first alignment solder part and the corresponding second alignment solder part is a solder pad or a solder bump;
placing the set of semiconductor devices on the carrier board such that the first alignment solder parts contact respective ones of the second alignment solder parts;
forming alignment solder joints by soldering the first alignment solder parts to respective ones of the second alignment solder parts whereby the set of semiconductor devices are aligned and fixed to the carrier board, wherein at least the first or second alignment solder bumps are made of solder, and soldering is performed by melting or partially melting the solder and subsequently cooling the solder;
after forming the alignment solder joints, further aligning the set of semiconductor devices to the carrier board by: turning the set of semiconductor devices and the carrier board as a whole to enable the active surfaces to face downwards, melting or partially melting the solder in the alignment solder joints again to cause the alignment solder joints to be elongated by weight of corresponding semiconductor devices of the set of semiconductor devices, and subsequently cooling and solidifying the solder again while the active surfaces face downwards;
encapsulating the set of semiconductor device using a molding compound to form a molded package body on a side of the carrier board where the set of semiconductor device are disposed;
exposing the connection terminals from the molded package body; and
sequentially forming an interconnection layer and external terminals on a side of the molded package body where the connection terminals are exposed, wherein the connection terminals are electrically connected to the external terminals through the interconnection layer.