Patent ID: 11942436
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A semiconductor device comprising:
a substrate having electrical components;
an interconnect structure over the substrate and electrically coupled to the electrical components, wherein the interconnect structure comprises first dielectric layers and conductive features in the first dielectric layers, wherein a width of the first dielectric layers is a same as a width of the substrate;
a seal ring in the first dielectric layers adjacent to a first sidewall of the first dielectric layers;
a first passivation layer over the interconnect structure;
a conductive pad over the first passivation layer and electrically coupled to the interconnect structure; and
a second dielectric layer over the first passivation layer and the conductive pad, wherein a second sidewall of the second dielectric layer is aligned with the first sidewall of the first dielectric layers along a same vertical line, wherein a third sidewall of the first passivation layer closest to the second sidewall of the second dielectric layer is laterally spaced apart from the second sidewall of the second dielectric layer.