Patent ID: 11863188
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 2:
3. The flip-flop circuit of claim 2, wherein the first NOR circuit comprises:
a third P-type transistor having a gate terminal configured to receive the first control signal, a source terminal connected to the second node, and a drain terminal connected to a node configured to generate the second control signal;
a second N-type transistor having a gate terminal configured to receive the first control signal, a source terminal connected to a negative power node, and a drain terminal connected to the node configured to generate the second control signal; and
a third N-type transistor having a gate terminal connected to the first node, a source terminal connected to the negative power node, and a drain terminal connected to the node configured to generate the second control signal.