Patent ID: 11868813
Assignee: HT RESEARCH INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A computer system comprising:
a first execution pylon; and
a first fail-over pylon coupled to the first execution pylon through a first workgroup fail-over link, wherein the first fail-over pylon is configured to provide real time fail-over support to the first execution pylon, wherein the first fail-over pylon includes a first fail-over communication link,
wherein the first execution pylon comprises:
a first top control block;
a first mid-memory block coupled to the first top control block through a first plurality of first workgroup execution links; and
a first base attribute block coupled to the first mid-memory block through a first plurality of second workgroup execution links;

wherein the first base attribute block comprises:
a first first-type base block;
a plurality of second-type base blocks, each coupled to the first first-type base block through a first plurality of third workgroup execution links;
a plurality of third-type base blocks coupled to the plurality of second-type base block through a first plurality of fourth workgroup execution links so that the plurality of second-type base block are disposed between the first first-type base block and the plurality of third-type base blocks,
wherein one of the plurality of third-type base blocks is coupled to the first mid-memory block through the first plurality of second workgroup execution links.