Patent ID: 11953962
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 11:
12. A method comprising:
receiving, in a controller of a processor having a plurality of cores, a selection of an asymmetric multi-threading configuration of the processor in which at least one first core is enabled to operate in a multi-threaded mode and at least one second core is enabled to operate in a single-threaded mode;
communicating first configuration information from the controller to a first engine of the at least one first core to cause the first engine to configure the at least one first core for the multi-threaded mode;
communicating second configuration information from the controller to a first engine of the at least one second core to cause the first engine of the at least one second core to configure the at least one second core for the single-threaded mode; and
in response to determining that the processor has sufficient power and thermal headroom, enabling the at least one second core to operate at a second turbo mode frequency greater than a maximum turbo mode frequency at which the at least one first core can operate.