Patent ID: 11892955
Assignee: MICROCHIP TECHNOLOGY INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. The method of claim 1, comprising:
transmitting the plurality of CXL flits received at the physical layer of the CXL memory controller to the arbitration/multiplexing layer of the CXL memory controller;
identifying, at the arbitration/multiplexing layer of the CXL memory controller, one or more link layer memory read requests from the plurality of CXL flits;
transmitting the identified one or more link layer memory read requests to the link layer of the CXL memory controller;
performing a cyclic redundancy check (CRC) on each of the identified and transmitted one or more link layer memory read requests;
transmitting the link layer memory read requests that pass the CRC to the transaction/application layer of the CXL memory controller; and
discarding the link layer memory read requests that fail the CRC.