Patent ID: 11921564
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. A system comprising:
a processor comprising:
a central processing unit (CPU);
a power controller to control power consumption of the processor;
a plurality of intellectual property (IP) circuits, each of the IP circuits comprising at least one control and status register (CSR);
a port circuit coupled to the CPU, the power controller and the plurality of IP circuits, the port circuit to receive a configuration write from at least one of the CPU or the power controller;
a static random access memory (SRAM) coupled to the port circuit to store information of a plurality of CSRs, wherein the SRAM is to be provided with a retention voltage in a low power state; and
a configuration network to couple the port circuit to the plurality of IP circuits, wherein the port circuit is to send the configuration write concurrently for storage in the SRAM and in a first IP circuit of the plurality of IP circuits; and

a system memory coupled to the processor.