Patent ID: 11972548
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. An apparatus for defect analysis, comprising:
a memory;
one or more processors;
wherein the memory and the one or more processors are connected with each other; and
the memory stores computer-executable instructions for controlling the one or more processors to:
obtain a plurality of sets of defect point coordinates, a respective set of the plurality of sets of defect point coordinates comprising coordinates of defect points in a respective substrate of a plurality of substrates, the coordinates of defect points in the respective substrate being coordinates in an image coordinate system;
combine the plurality of sets of defect point coordinates according to the image coordinate system into a composite set of coordinates to generate a composite image;
perform a clustering analysis to classify defect points in the composite set in the composite image into a plurality of clusters;
determine a plurality of contours respectively of at least a plurality of selected clusters of the plurality of clusters, a respective one of the plurality of contours comprising a plurality of edge defect points in a respective one of the plurality of selected clusters;
apply a fitting algorithm to edge defect points of the plurality of selected clusters to generate a plurality of mask areas respectively corresponding to the plurality of selected clusters; and
generate a plurality of feature vectors respectively of the plurality of mask areas.