Patent ID: 11915758
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. A memory device comprising:
a first storage element to store a first data bit;
a second storage element to store a second data bit;
a first node configured to receive a selected one of a first voltage level and a third voltage level greater than the first voltage level;
a second node configured to receive a second voltage level greater than the third voltage level;
a data line selectively connected to the first storage element, the second storage element, and a string of series-connected memory cells;
a first transistor connected between the first node and the data line;
a second transistor connected between the second node and the data line; and
a controller configured to apply one of four voltage levels based on the first data bit and the second data bit to the data line during a programing operation of a selected memory cell of the string of series-connected memory cells connected to a selected access line.