Patent ID: 11929406
Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A method for manufacturing the semiconductor device of claim 1, comprising:
forming a first nitride-based semiconductor layer over a substrate;
forming a second nitride-based semiconductor layer on the first nitride-based semiconductor layer;
forming a gate electrode over the second nitride-based semiconductor layer;
forming a first passivation layer on the second nitride-based semiconductor layer to cover the gate electrode;
forming a first blanket field plate on the first passivation layer;
patterning the first blanket field plate to form a first field plate above the gate electrode using a wet etching process;
forming a second passivation layer on the first passivation layer to cover the first field plate;
forming a second blanket field plate on the second passivation layer; and
patterning the second blanket field plate to form a second field plate above the first field plate using a dry etching process.