Patent ID: 11862464
Assignee: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 13:
14. The method for manufacturing the three-dimensional semiconductor device according to claim 1, the method comprising steps of:
forming the second substrate in a configuration in which, each end thereof in one direction is in contact with a support material layer in planar view, and plural pairs of a first semiconductor layer and an eighth material layer are piled upwards in a vertical direction;
removing the eighth material layer after forming the three-dimensionally-shaped semiconductor layer;
forming a second gate insulating layer surrounding the first semiconductor layer of the three-dimensionally-shaped semiconductor layer;
forming a second gate conductor layer surrounding the second gate insulating layer;
removing the support material layer; and
forming each impurity layer containing donor or acceptor impurities in contact with each end of the first semiconductor layer in the one direction in planar view.