Patent ID: 11961792
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. A method of manufacturing a semiconductor package, the method comprising:
forming a first barrier conductive layer and a first seed layer sequentially on a release film attached to a carrier substrate;
forming a first mask pattern on the first seed layer, the first mask pattern having a first mask opening and including at least one separation mask pattern defined by the first mask opening;
forming a first conductive pattern and removing the first mask pattern, the first conductive pattern filling the first mask opening and defining at least one separation space corresponding to the at least one separation mask pattern;
forming a first insulating layer having a first opening on the first conductive pattern and the first seed layer, the first insulating layer vertically overlapping a portion of the first conductive pattern, and not overlapping other portions of the first conductive pattern and the separation space, and the first opening and the separation space communicating with each other;
forming a second barrier conductive layer and a second seed layer sequentially on the first conductive pattern, the first insulating layer, and the first seed layer;
forming a second mask pattern on the second seed layer, the second mask pattern having a second mask opening, and the second mask pattern not overlapping with each of the first opening and the separation space in a vertical direction;
forming a second conductive pattern filling the second mask opening, the first opening, and the separation space, and removing the second mask pattern;
forming a second insulating layer on the second conductive pattern, the second insulating layer having a second opening;
removing a portion of the second seed layer and a portion of the second barrier conductive layer not covered by the second conductive pattern;
removing the carrier substrate, the release film, the first barrier conductive layer, and the first seed layer;
removing the first conductive pattern, the first insulating layer having a recess area which is a space from which the first conductive pattern is removed;
removing a portion of the second barrier conductive layer, the portion of the second barrier conductive layer being not covered by the first insulating layer; and
forming a connection terminal on a portion of the second seed layer covering the second conductive pattern, the connection terminal filling a portion of the recess area.