Patent ID: 11948901
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a stack of layers comprising a common source layer, gate layers and insulating layers disposed on a substrate, the gate layers and insulating layers being stacked alternatingly;
an array of channel structures formed in an array region, a channel structure extending through the stack of layers forming a stack of transistors in a series configuration, the channel structure comprising a channel layer that is conductively connected with the common source layer, the common source layer extending over the array region and a staircase region; and
a contact structure disposed in the staircase region, the contact structure forming a conductive connection with the common source layer, the contact structure being in contact with the common source layer.