Patent ID: 11946972
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Field: Measurement (Instruments)
Classification: CPC G  B  H | IPC B  G  H

Claim 10:
11. A method, for monitoring interconnect lines, comprising:
transmitting, by a transmit block to a receive block, a first signal over a first interconnect line;
executing, by the transmit block, a first transmit logic operation on the first signal with respect to a second signal on at least one second interconnect line to generate a transmit signal;
receiving, by the transmit block, a receive signal resulting from a receive logic operation executed by the receive block on a received first signal on the first interconnect line with respect to a received second signal received on the at least one second interconnect line;
executing, by the transmit block, a second transmit logic operation on the transmit signal with respect to the receive signal;
generating, by the transmit block and based on the executing of the second transmit logic operation, a result signal;
receiving, by a third transmit logic and during a given clock period, the result signal;
determining, by the third transmit logic, whether a failure indication is present in the result signal during the given clock period;
determining, by the third transmit logic, whether an ignore signal is being received by the third transmit logic during the given clock period, and when the ignore signal is present, resetting the third transmit logic; and
generating, by the third transmit logic, a set/reset signal indicating whether, during the given clock period, the ignore signal is not present while the failure indication is present in the result signal.