Patent ID: 11895224
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Digital communication (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 11:
12. A method of operating a crypto processor, the method comprising:
controlling an operation mode of the crypto processor;
encrypting input data to plural lattice-based texts; and
generating a lattice-based text result for a homomorphic operation, selected among plural homomorphic operations based on the controlled operation mode, by operating plural multipliers in parallel with respect to coefficients of polynomials of the plural lattice-based texts and based on the controlled operation mode, including operating at least one first multiplier, of the plural multipliers, provided a first portion of the coefficients, operating at least one second multiplier, of the plural multipliers, provided a second portion of the coefficients, and selectively operating an adder provided some results of the operated plural multipliers dependent on the controlled operation mode,
wherein the adder is operated in response to the controlled operation mode being a first mode,
wherein a same coefficient is provided to each of the plural multipliers, for the operating the plural multipliers, in response to the controlled operation mode being a second mode, and
wherein different coefficients are provided to the plural multipliers, for the operating the plural multipliers, in response to the operation mode being a third mode.