Patent ID: 11886735
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An apparatus, comprising:
a memory system comprising a volatile memory device and a non-volatile memory device configured to store a logical-to-physical address mapping that includes a set of logical addresses; and
a controller coupled with the non-volatile memory device and configured to cause the apparatus to:
compare a first value of a first counter for the set of logical addresses to a first threshold value, the first counter configured to indicate a quantity of times the set of logical addresses has been read from the non-volatile memory device and written to the volatile memory device;
compare the first value of the first counter to a second threshold value that is based at least in part on a second value of a second counter for the set of logical addresses, the second counter configured to indicate a quantity of times the set of logical addresses of the logical-to-physical address mapping has been written to the non-volatile memory device from the volatile memory device;
select, from a plurality of types of data movement operations supported by the non-volatile memory device, a first type of data movement operation based at least in part on comparing the first value to the first threshold value and the second threshold value; and
perform the first type of data movement operation for data associated with the set of logical addresses based at least in part on the selection.