Patent ID: 11903205
Assignee: KIOXIA CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 8:
9. A method for reading data of a first memory cell transistor of a nonvolatile semiconductor memory device comprising:
turning on a first select transistor, the first select transistor being coupled between a first bit line and a first memory unit having the first memory cell transistor and a second memory cell transistor coupled in series, the first memory cell transistor and the second memory cell transistor being arranged in a first direction crossing a surface of a substrate;
turning off a second select transistor, the second select transistor being coupled between the first bit line and a second memory unit having a third memory cell transistor and a fourth memory cell transistor coupled in series, the third memory cell transistor and the fourth memory cell transistor being arranged in the first direction, a gate of the first memory cell transistor being coupled with a gate of the third memory cell transistor, a gate of the second memory cell transistor being coupled with a gate of the fourth memory cell transistor, a gate of the first select transistor not being coupled with a gate of the second select transistor; and
applying a read voltage to the gate of the first memory cell transistor for reading data of the first memory cell transistor and applying a pass voltage to the gate of the second memory cell transistor, the pass voltage being higher than the read voltage.