Patent ID: 11899530
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 14:
15. A system comprising:
a main memory; and
a multicore processor coupled to the main memory, the multicore processor comprising a plurality of cores, wherein at least one of the cores comprises:
a cache;
a plurality of general-purpose registers; and
a plurality of execution units, including an integer execution unit and a single instruction multiple data (SIMD) execution unit, wherein at least one of the plurality of execution units comprises circuitry to:
perform a cyclic redundancy check (CRC) operation in response to one or more instructions executed in a 64-bit mode of operation, wherein the circuitry is to perform the CRC operation based on one of a plurality of data sizes, including a data size of 8-bits, 16-bits, 32-bits, and 64-bits, and wherein the one or more instructions are to indicate the data size to be used.