Patent ID: 11870444
Assignee: PUFSECURITY CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 17:
18. The entropy source circuit of claim 13, wherein the input data control circuit comprises:
a first flip-flop, configured to control timing of transmitting the input data to the digital circuit according to a system clock;
a second flip-flop, configured to control timing of transmitting the start signal to the TDC according to the system clock; and
a first selector, coupled to the first flip-flop, configured to control whether to transmit updated input data to an input terminal of the first flip-flop according to the start signal;
a third flip-flop, configured to control timing of transmitting the reference data to the determination circuit according to the system clock; and
a second selector, coupled to the third flip-flop, configured to control whether to transmit updated reference data to an input terminal of the third flip-flop according to the start signal.