Patent ID: 11870394
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Field: Telecommunications (Electrical engineering)
Classification: CPC H | IPC H

Claim 3:
4. The demodulator according to claim 2, wherein
the second control signal generator includes an analog PLL (Phase Locked Loop) circuit, and is configured to generate an analog signal as the second control signal,
the frequency variable oscillator has a configuration in which the second input section includes a variable capacitive element as the capacitive element, and is configured to generate the oscillation signal on a basis of the first control signal that is analog and is inputted to the first input section, and the second control signal that is analog and is inputted to the second input section, and
the digital demodulation signal generator is configured to perform A/D conversion of the second control signal that is analog to generate a second control signal that is digital, and demodulate the digital modulation signal on a basis of a signal obtained by subtracting the second phase difference signal from the generated second control signal that is digital.