Patent ID: 11869593
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 10:
11. The device according to claim 1, wherein
the control circuit is further configured to:
start outputting a first voltage to the first word line via the second node in a first: verify operation on the memory cell to apply a lowest verify voltage to the memory cell; and
start outputting a second voltage to the first word line via the second node in a second verify operation on the memory cell to apply a highest verify voltage to the memory cell,

the control circuit is further configured to transmit a first signal to a control end of the first switch and transmit a second signal to a control end of the second switch,
a period during which the first voltage is output to the first word line includes a first period during which a voltage of the first signal is at a first level and a voltage of the second signal is at a second level and a second period which is after the first period and during which the voltage of the first signal is at a third level and the voltage of the second signal is at a fourth level,
the second level being lower than the fourth level if the first level is higher than the third level,
the second level being higher than the fourth level if the first level is lower than the third level, and
a period during which the second voltage is output to the first word line includes a third period during which the voltage of the first signal is at the third level and the voltage of the second signal is at the fourth level, and a fourth period which is after the third period and during which the voltage of the first signal is at the first level and the voltage of the second signal is at the second level.