Patent ID: 11916102
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 6:
7. A double-sided capacitor structure, comprising:
a base, the base comprising a substrate, a plurality of capacitor contacts located in the substrate, a stack structure located on a surface of the substrate and a plurality of capacitor holes running through the stack structure and exposing the capacitor contacts, the stack structure at least comprising a plurality of support layers stacked along a direction perpendicular to the substrate;
a first electrode layer, covering inner walls of the capacitor holes;
a first dielectric layer, covering sidewall surfaces and bottom wall surfaces of the first electrode layer facing the capacitor holes;
a second electrode layer, covering sidewall surfaces and bottom wall surfaces of the first dielectric layer facing the capacitor holes;
a first conductive filling layer, filled in a region surrounded by the second electrode layer;
a plurality of sub-auxiliary layers separate from each other, the sub-auxiliary layers covering a top surface of the stack structure, and each of the sub-auxiliary layers being at least overlapped with two capacitor holes;
a second dielectric layer, covering sidewall surfaces and top surfaces of the first electrode layer away from the capacitor holes as well as surfaces of the sub-auxiliary layers; and
a third electrode layer, covering a surface of the second dielectric layer.