Patent ID: 11870504
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Telecommunications (Electrical engineering)
Classification: CPC G  H | IPC H

Claim 15:
16. A translation device comprising:
a first input/output (I/O) circuit configured to transmit and receive a first signal based on a non-return to zero (NRZ) mode;
a second I/O circuit configured to transmit and receive a second signal based on a pulse amplitude modulation (PAM)-4 mode;
a translation circuit configured to translate the first signal into the second signal and to translate the second signal into the first signal;
a first termination circuit disposed between a first I/O pin and the first I/O circuit and configured to provide a first termination resistance; and
a second termination circuit disposed between a second 1/O pin and the second I/O circuit and configured to provide a second termination resistance,
wherein the first signal is received by the first I/O pin, translated into the second signal by the translation circuit and transmitted through the second I/O pin, and the second signal is received by the second I/O pin, translated into the first signal by the translation circuit, and transmitted through the first I/O pin,
wherein the first signal is an NRZ signal modulated based on the NRZ mode, and the second signal is a PAM-4 signal modulated based on the PAM-4 mode, and
wherein the translation circuit comprises:
an aligner configured to align sampled most significant bits and least significant bits in the PAM-4 signal based on a first internal clock signal having a first frequency to generate an aligned signal;
a serializer configured to serialize the aligned signal based on a second internal clock signal having a second frequency to generate a selected signal; and
a multiplexer configured to multiplex the selected signal based on a third internal clock signal having a third frequency.