Patent ID: 11871569
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 11:
12. A nonvolatile memory device comprising:
a substrate;
a channel structure extending in a direction perpendicular to the substrate;
a charge storage structure disposed to be in contact with the channel structure;
a cell electrode structure disposed to be in contact with the charge storage structure in a lateral direction;
a control electrode structure disposed over or below the cell electrode structure on the substrate, the control electrode structure including an interlayer dielectric layer and a control electrode layer;
a control dielectric layer disposed to be in contact with the control electrode structure; and
a control channel layer disposed adjacent to the control dielectric layer and electrically connected to the channel structure,
wherein the channel structure comprises a hole conduction layer and an electron conduction layer,
wherein the control channel layer is a portion of the electron conduction layer configured to extend along the control dielectric layer and the control channel layer excludes the hole conduction layer.