Patent ID: 11894336
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. The method according to claim 16, wherein the step of forming the first sub-layer comprises:
forming a seed material layer over the encapsulant, the die, and the plurality of conductive structures;
forming a photoresist layer over the seed material layer, wherein the photoresist layer comprises a plurality of openings exposing at least a portion of the seed material layer;
filling a conductive material into the plurality of openings of the photoresist layer to form a plurality of conductive patterns;
removing the photoresist layer and portions of the seed material layer underneath the photoresist layer to form the plurality of first conductive vias and the first alignment mark;
forming a dielectric material layer over the encapsulant, the die, and the plurality of conductive structures to encapsulate the plurality of first conductive vias and the first alignment mark; and
removing a portion of the dielectric material layer to form a dielectric layer exposing a top surface of the plurality of first conductive vias and a top surface of the first alignment mark.