Patent ID: 11908546
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A method of operating a computer system that includes system processing devices and a distributed shared memory that excludes the system processing devices, the method comprising:
determining, by the distributed shared memory, memory coherence state information resulting from memory access by the system processing devices and storing the memory coherence state information with the data in the distributed shared memory;
communicating packetized information among the system processing devices and multiple shared memory endpoints of the computing system using a packetized input/output (I/O) protocol;
initiating, by the distributed shared memory according to the packetized I/O protocol, sending of a packetized message including the stored memory coherence state information in response to an atomic request to access the memory coherence state information stored in the distributed shared memory, wherein the stored memory coherence state information for a memory word is accessed by the distributed shared memory remapping an address of the memory word received in the atomic memory request; and
tracking the memory coherence state information using the shared memory endpoints.