Patent ID: 11876528
Assignee: TSINGHUA UNIVERSITY
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. The analog-to-digital conversion circuit according to claim 11, wherein one terminal of each of the first shared capacitors of the shared conversion module is connected to the second conversion switch, the other terminal of the each of the capacitors is connected to one terminal of a set of first shared switches, and the other terminal of the set of first shared switches is respectively connected to one of the device voltage VDD, the ground GND, or a preset DC voltage,
wherein the shared conversion module outputting the (U+v)-th second analog signal based on the quantized margin signal and the v-th second control signal comprises:
controlling opened/closed states of a set of first shared switches connected to a v-th first shared capacitor based on the v-th second control signal, so that the other terminal of the v-th first shared capacitor is connected to the device voltage VDD or the ground GND, and the (U+v)-th second analog signal is output at one terminal of a v-th first shared capacitor.