Patent ID: 11914878
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A system comprising:
a memory sub-system comprising a plurality of memory components arranged to form a stackable cross-gridded array of a plurality of blocks of non-volatile memory cells; and
a processing device coupled to the plurality of memory components, the processing device to perform operations comprising:
determining a difference between a highest and a lowest health characteristic values of the plurality of blocks of non-volatile memory cells;
determining that the difference between the highest and lowest health characteristic values of the blocks of non-volatile memory cells is greater than a base wear leveling threshold but less than an upper wear leveling threshold, wherein the wear leveling threshold includes an average of health characteristic values of the blocks of non-volatile memory cells; and
performing a wear leveling operation to write data from a source block to a destination block.