Patent ID: 11929308
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of manufacturing a semiconductor package, comprising:
forming bond pads over a device side surface of a semiconductor die;
performing a plating process to form post connects having proximate ends on the bond pads, and extending away from the bond pad to distal ends;
forming solder bumps on the distal ends of the post connects;
flip chip mounting the semiconductor die to a die side surface of a package substrate by bringing the solder bumps on the distal ends of the post connects into cavities extending into the die side surface of the package substrate, wherein the distal ends of the post connects extends into the cavities on the package substrate; and
performing a thermal reflow to form solder joints between the post connects and the cavities in the package substrate.