Patent ID: 11862694
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A method comprising:
depositing a first dielectric layer over a conductive feature;
etching the first dielectric layer to form an opening exposing the conductive feature;
forming a dielectric liner in the opening, the dielectric liner lining sidewalls of the first dielectric layer;
forming a first metal portion in the opening over the conductive feature;
forming a second metal portion over the first metal portion and filling the opening, the second metal portion comprising a material different from the first metal portion, wherein the second metal portion protrudes above an upper surface of the first dielectric layer; and
performing an ion implantation on the first dielectric layer, the dielectric liner, and the second metal portion, wherein after performing the ion implantation at least an undoped portion of the second metal portion remains between a doped portion of the second metal portion and the first metal portion, the ion implantation causing the material of the first dielectric layer and the dielectric liner to expand in a direction towards the second metal portion.