Patent ID: 11916058
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 9:
10. An integrated circuit, comprising:
a first plurality of cell rows each having a first number of fin structures;
a second plurality of cell rows each having a second number, smaller than the first number, of fin structures; and
a plurality of bit cells in a multi-bit cell that have M bit cells each comprising an input stage cell in one of the first plurality of cell rows and a data cell in one of the second plurality of cell rows,
wherein an input stage cell of a first bit cell in the plurality of bit cells and an input stage cell of a (M/2+1)-th bit cell in the plurality of bit cells are included in the same cell row of the multi-bit cell, wherein M and N are positive integers, and N is smaller than M.