Patent ID: 11862584
Assignee: NXP USA, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method comprising:
providing a first high-k dielectric glass carrier substrate;
forming a first ceramic region in the first high-k dielectric glass carrier substrate which includes a defined waveguide area and which extends to a defined die attach area;
forming a plurality of conductive patterns on a first surface of the first high-k dielectric glass carrier substrate comprising:
a differential waveguide launcher disposed over the first ceramic region and formed with a radiating element connected to a pair of signal lines extending from the defined waveguide area to the defined die attach area,
a patterned array of one or more conductors disposed over the first ceramic region in a waveguide conductor ring positioned in the defined waveguide area to surround the radiating element on at least three sides;

forming an air cavity in the first ceramic region that is positioned in the defined waveguide area to be adjacent to the radiating element and surrounded on at least three sides by the patterned array of one or more conductors;
attaching a semiconductor die to the first high-k dielectric glass carrier substrate at the defined die attach area to make electrical connection to the differential waveguide launcher;
providing a second high-k dielectric glass carrier substrate having a top surface and a bottom surface, the second high-k dielectric glass carrier substrate comprising a second ceramic region in a defined waveguide area surrounded by a waveguide interface perimeter of one or more conductors that are positioned for alignment with the patterned array of one or more conductors; and
mounting the second high-k dielectric glass carrier substrate to the first high-k dielectric glass carrier substrate by affixing the bottom surface of the second high-k dielectric glass carrier substrate to the plurality of conductive patterns on the first surface of the first high-k dielectric glass carrier substrate so that the first ceramic region in the first high-k dielectric glass carrier substrate is aligned with the second ceramic region in the defined waveguide area.