Patent ID: 11877437
Assignee: SK HYNIX INC.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 18:
19. A semiconductor device, comprising:
bit lines that are spaced apart from each other by a line-shaped opening over a substrate;
bit line contact plugs that are positioned below the bit lines, respectively;
a plurality of plug isolation layers that divide the line-shaped opening into a plurality of contact openings;
storage node contact plugs that respectively fill the contact openings;
a first spacer structure that is disposed between the storage node contact plugs and the bit lines, and includes a stack of a first silicon nitride, a first low-k material, silicon oxide, and a second low-k material; and
a second spacer structure that is disposed between the bit line contact plugs and the storage node contact plugs, and includes a stack of a second silicon nitride, a third low-k material, and a third silicon nitride,
wherein the second silicon nitride extends from the first silicon nitride, and the third low-k material extends from the first low-k material.