Patent ID: 11901919
Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An integrated circuit, comprising:
a test circuit including:
a first memory configured to store digital reference data representing an analog reference signal;
a modulator configured to receive the digital reference data and to convert the digital reference data to single-bit data stream;
a second memory configured to receive the single-bit data stream from the modulator and to store the single-bit data stream; and
a finite-impulse response filter configured to receive the single-bit data stream from the second memory and to convert the single-bit data stream to an analog test signal; and

a continuous time delta sigma analog-to-digital converter coupled to the test circuit and including:
an input configured to receive the analog test signal from the test circuit;
conversion circuit configured to convert the analog test signal to digital test data; and
an output configured to output the digital test data, wherein the test circuit is configured to receive the digital test data from the continuous time delta sigma analog-to-digital converter and to assess a performance of the continuous time delta sigma analog-to-digital converter based on the digital test data.