Patent ID: 11869949
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A semiconductor device, comprising:
an insulating dielectric layer disposed on a semiconductor substrate
a gate structure, embedded in the insulating dielectric layer over the semiconductor substrate and extending in a first direction, wherein the gate structure includes a gate electrode and a gate dielectric layer surrounding the gate electrode;
source and drain terminals, embedded in the insulating dielectric layer over the semiconductor substrate and located respectively at opposite ends of the gate structure; and
a channel region, embedded in the insulating dielectric layer over the semiconductor substrate and located between the gate structure and the source and drain terminals, wherein the channel region wraps around the gate dielectric layer surrounding the gate electrode, and the channel region extends between the source and drain terminals.