Patent ID: 11863284
Assignee: KRATOS INTEGRAL HOLDINGS, LLC
Field: Telecommunications (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 19:
20. An apparatus for combining a plurality of downlink signals representative of a communication signal, the apparatus comprising:
a means for receiving samples of the plurality of downlink signals from a plurality of antenna feeds;
a means for generating first symbols for a first signal of the plurality of downlink signals based on performing a first timing recovery operation on first samples of the first signal;
a means for generating second symbols for a second signal of the plurality of downlink signals based on performing a second timing recovery operation on second samples of the second signal;
a means for generating time and phase offset information based on performing a correlator operation on the first and second symbols; and
a means for combining the first signal and the second signal based on (i) the first and second symbols, (ii) aligning timing and phase of the first symbols with the second symbols based on the time and phase offset information, and (iii) performing a weighted combiner operation that applies scaling to each of the first and second signals based on corresponding signal quality,
wherein at least one of the means for generating first symbols, the means for generating second symbols, the means for generating time and phase offset information, and the means for combining are performed in a plurality of processing blocks in one or more processors, wherein the first and second processing block operate in parallel.