Patent ID: 11935944
Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device comprising:
a plurality of circuits:
the plurality of circuits each comprising:
a first transistor comprising a channel formation region comprising an oxide semiconductor;
a second transistor comprising a channel formation region comprising silicon; and
a capacitor,
wherein a source or a drain of the first transistor is electrically connected to a gate of the second transistor, and
wherein the gate of the second transistor is electrically connected to the capacitor,

a first conductive layer;
an oxide semiconductor layer comprising a region over the first conductive layer;
a first insulating layer comprising a region over the oxide semiconductor layer;
a second conductive layer comprising a region over the first insulating layer; and
a second insulating layer comprising a region over the second conductive layer,
wherein the first conductive layer comprises a region functioning as one of a source electrode and a drain electrode of the first transistor,
wherein the oxide semiconductor layer comprises a region configured to function as the channel formation region of the first transistor,
wherein the first insulating layer comprises a region configured to function as a gate insulating layer of the first transistor,
wherein the second conductive layer comprises a region configured to function as a gate electrode of the first transistor,
wherein the oxide semiconductor layer is in contact with part of a top surface and a side surface of the first conductive layer,
wherein in a cross-sectional view of the first transistor along a channel length direction, the first insulating layer comprises an extended region extending beyond an end portion of the second conductive layer,
wherein the second insulating layer is an oxide insulating layer, and
wherein the second insulating layer comprises a region in contact with the top surface of the extended region of the first insulating layer, a region in contact with a side surface of the first insulating layer, a region in contact with a side surface of the oxide semiconductor layer, and a region in contact with the top surface of the first conductive layer.