Patent ID: 11909421
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G  Y | IPC G  H

Claim 21:
22. The MAC operator of claim 21, wherein the data type deconverter includes:
a second bit supplier configured to separate the 20-bit multiplication-accumulation data and output an 8-bit exponent and an 11-bit mantissa of the 20-bit multiplication-accumulation data;
a first 1:4 multiplexer configured to output an exponent of each of the first to fourth data types by modifying the 8-bit exponent transmitted from the second bit supplier; and
a second 1:4 multiplexer configured to output a mantissa of each of the first to fourth data types by modifying the 11-bit mantissa transmitted from the second bit supplier.