Patent ID: 11935798
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A method, comprising:
configuring a control circuit, included in a first die of a stacked semiconductor device, in a first configuration,
wherein the control circuit being in the first configuration causes a transistor in the first die to isolate the first die from a second die of the stacked semiconductor device;

performing a first electrical test of the first die while the first die is isolated from the second die,
wherein the first die is independently tested;

configuring the control circuit in a second configuration,
wherein the control circuit being in the second configuration causes:
the transistor to electrically connect the second die and the first die, and
circuits of the first die to be isolated from the second die; and

performing a second electrical test of the second die while the second die is electrically connected with the first die,
wherein the second die is independently tested.