Patent ID: 11949030
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. A method, comprising:
receiving a substrate;
forming a shallow trench isolation region that surrounds an active region in the substrate;
forming a doped region in the substrate;
forming an oxide layer over an upper surface of the substrate and over the shallow trench isolation region;
etching the substrate to form a trench or recess in the active region;
epitaxially growing a germanium layer to partially or entirely fill the trench or recess;
epitaxially growing a silicon cap layer to overlie the germanium layer, wherein the silicon cap layer is formed in situ in a cluster tool in which the germanium layer was grown without exposing the germanium layer to an ambient environment surrounding the cluster tool; and
forming a silicon germanium interface layer to overlie the germanium layer and before the silicon cap layer is formed, wherein the silicon germanium interface layer is formed in situ in the cluster tool in which the germanium layer was grown.