Patent ID: 11881451
Assignee: NANYA TECHNOLOGY CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. A semiconductor device, comprising:
a device substrate;
an interconnect part disposed over the device substrate, wherein the interconnect part comprises:
a lower redistribution layer electrically connected to the backside contact;
an upper redistribution layer disposed over the lower redistribution layer;
a first interconnect conductor and a second interconnect conductor extending in parallel between the lower redistribution layer and the upper redistribution layer, wherein the lower redistribution layer and the upper redistribution layer are electrically connected by the first interconnect conductor and the second interconnect conductor; and
a first passivation liner and a second passivation liner surrounding the first interconnect conductor and the second interconnect conductor, respectively;
a second source/drain structure disposed between the interconnect part and the device substrate,
a frontside contact disposed between the second source/drain structure and the device substrate, wherein the second source/drain structure is electrically connected to the device substrate through the frontside contact; and
a dielectric layer disposed between the device substrate and the interconnect part, wherein the first source/drain structure and the second source/drain structure are disposed in the dielectric layer, and wherein a portion of the second source/drain structure extends to cover a top surface of the dielectric layer.