Patent ID: 11901283
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 4:
5. A method, comprising:
forming a bottom electrode routing over a semiconductor substrate;
forming a capacitor structure over the bottom electrode routing, the capacitor structure comprising a bottom metal layer, a middle metal layer above the bottom metal layer, and a top metal layer above the middle metal layer, wherein when viewed in a plan view, the top metal layer has opposite straight edges extending along a first direction and opposite square wave-shaped edges connecting the opposite straight edges, the square wave-shaped edges each comprise alternating first and second segments extending along a second direction perpendicular to the first direction, and third segments each connecting adjacent two of the first and second segments, wherein the third segments extend along the first direction;
forming a top electrode routing over the capacitor structure;
forming a first metal via extending from the bottom electrode routing to the top electrode routing, the first metal via contacting the top and bottom metal layers and spaced apart from the middle metal layer; and
forming a second metal via extending from the bottom electrode routing to the top electrode routing, the second metal via contacting the middle metal layer and spaced apart from the bottom and top metal layers.