Patent ID: 11966329
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A non-transitory computer storage medium storing instructions which, when executed by a memory system having non-volatile media, a volatile memory, and a controller, cause the memory system to perform a method, the method comprising:
storing, in the non-volatile media having a quantity of memory units, an address map, the address map defining logical addresses in terms of physical addresses of the memory units in the non-volatile media;
loading a first portion of the address map in a volatile memory of the memory system;
loading a second portion of the address map in the memory of the host system;
processing requests from a host system to store data in the non-volatile media or retrieve data from the non-volatile media, the host system having a memory connected to the memory system via a communication channel;
in response to a first operation that uses a first logical address defined in the first portion of the address map in the volatile memory of the memory system, obtaining a first relevant address definition from the first portion of the address map stored in the volatile memory of the memory system;
completing the first operation using the first relevant address definition from the first portion;
in response to a second operation that uses a second logical address defined in the second portion of the memory of the host system, obtaining via the communication channel a second relevant address definition from the second portion of the address map stored in the memory of the host system;
completing the second operation using the second relevant address definition from the second portion;
changing or updating, during first operations involving logical addresses defined in the first portion of the address map stored in the volatile memory of the memory system, the second portion of the address map stored in the volatile memory of the memory system;
changing or updating, during second operations involving logical addresses defined in the second portion of the address map cached in the memory of the host system, the second portion of the address map cached in the memory of the host system;
receiving, at the cache manager a request to shut down the memory system;
in the non-volatile media of the memory system by the cache manager in response to the request, storing:
the first portion of the address map from the volatile memory of the memory system that has been changed or updated during the first operations, and
the second portion of the address map from the host system that has been changed or updated during the second operations;

wherein the memory of the host system is accessible to the controller at a speed greater than accessing the non-volatile media;
performing, in response to a first request associated with the first operations, a real time analysis of data stored in the memory of the memory system, wherein the data stored in the memory of the memory system comprises sensor data collected from a plurality of sensors, and wherein the plurality of sensors are real time sensors connected to the memory system;
determining, based on the real time analysis, a reduced data set responsive to the first request; and
communicating the reduced data set to the host system.