Patent ID: 11966633
Assignee: CADENCE DESIGN SYSTEMS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. A method for generating a control algorithm for a non-volatile memory (NVM) module, the method comprising:
parsing, by an NVM algorithm generator operating on a computing platform, a module design file characterizing a NVM module that controls repair operations to extract a set up and hold time for ports related to a strobe port of the NVM module;
generating a read algorithm for the control algorithm that includes an order of operations for assigning values to ports of the NVM module to assert a read condition of the strobe port of the NVM module, executing a memory read on the NVM module and setting values to the ports on the NVM module to assert a complement of a program condition of the strobe port on the NVM module; and
generating a program algorithm for the control algorithm that includes an order of operations for assigning values to ports of the NVM module to assert the program condition of the strobe port of the NVM module, executing a memory write on the NVM module and setting values to the ports on the NVM module to assert the complement of the program condition of the strobe port on the NVM module.