Patent ID: 11886744
Assignee: NVIDIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. An apparatus comprising at least one processor and at least one memory including computer program code, the at least one memory and the computer program code configured to, with the at least one processor, cause the apparatus to:
transmit a request to make one or more writes associated with an identification tag, the request comprising:
the identification tag,
the one or more writes,
a first instruction to make the one or more writes to one of a plurality of persistence levels of a memory,
a second instruction to respond with at least one first indication that at least one of the one or more writes associated with the identification tag have been written to the one of the plurality of persistence levels of the memory,
a third instruction to make the one or more writes associated with the identification tag visible, and
a fourth instruction to respond with at least one second indication that at least one of the one or more writes associated with the identification tag have reached a point of visibility; and

receive the at least one first indication that at least one of the one or more writes associated with the identification tag have been written to the one of the plurality of persistence levels of the memory.