Patent ID: 11881478
Assignee: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. A method for manufacturing a semiconductor device, comprising:
forming a group III nitride semiconductor heterostructure layer on a substrate having a first region,
implanting a first dopant in the first region of the substrate to form a first doped well;
implanting a second dopant in the group III nitride semiconductor heterostructure layer above the first region;
forming a via through the group III nitride semiconductor heterostructure layer till the first doped well;
at least partially filling the via to form an interconnect for electrically connecting the first doped well; and
implanting a third dopant into the first doped well to form a second doped well within the first doped well.