Patent ID: 11930674
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A method for preparing a display substrate, comprising:
forming an array structure layer and a light emitting structure layer sequentially on a silicon-based substrate in a display area, and forming a trace protection structure on a silicon-based substrate in a trace area between the display area and a binding area;
wherein the binding area is located on one side of the display area, a pad assembly is integrated in the silicon-based substrate in the binding area, and a minimum distance between an edge of an orthographic projection of the trace protection structure on the silicon-based substrate and an edge of an orthographic projection of an opening of the pad assembly on the silicon-based substrate is smaller than a maximum size of one subpixel.