Patent ID: 11947457
Assignee: APPLE INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A system comprising:
a plurality of coherent agents, wherein a given agent of the plurality of coherent agents comprises one or more caches to cache memory data; and
a memory controller coupled to one or more memory devices, wherein the memory controller includes a directory configured to track which of the plurality of coherent agents is caching copies of a plurality of cache blocks in the memory devices and states of the cached copies in the plurality of coherent agents, wherein
the directory supports at least the following states: owned, primary shared, and secondary shared; and

wherein, based on a first request for a first cache block by a first agent of the plurality of coherent agents, the memory controller is configured to:
read an entry corresponding to the first cache block from the directory, and
in response to a second coherent agent of the plurality of coherent agents having a cached copy of the first cache block in a primary shared state, issue a snoop to the second agent of the plurality of coherent agents, wherein the snoop indicates that the second agent is to transmit the first cache block to the first agent;
in response to none of the plurality of coherent agents having a cached copy of the first cache block in the primary shared state, issue a snoop to a coherent agent of the plurality of coherent agents that has a cached copy of the first cache block in a secondary shared state, wherein the snoop indicates to transmit the first cache block to the first agent.