Patent ID: 11968835
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A vertical type semiconductor device, comprising:
a substrate;
a stacked structure disposed on a semiconductor substrate and spaced apart an upper surface of the substrate that includes a plurality of insulation layers and a plurality of first conducive patterns that are alternately and repeatedly stacked;
a plurality of channel holes passing through the stacked structure, and extending into an upper inner portion of the substrate;
a blocking layer, a charge storage layer, a tunnel insulation layer and a channel layer sequentially stacked on a surface of each of the channel holes, and
wherein the blocking layer, the charge storage layer and the tunnel insulation layer include a cutting region between a bottom of the stacked structure and an upper surface the substrate; and
a polysilicon layer interposed between the stacked structure and the substrate and that fills a space between the bottom of the stacked structure and the upper surface the substrate, wherein the stacked structure is disposed on the polysilicon layer,
wherein a sidewall of each of the channel holes includes an inflection point where an inclination changes.