Patent ID: 11956476
Assignee: BYTEDANCE INC.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H | IPC H

Claim 4:
5. An apparatus for processing video data comprising a processor and a non-transitory memory with instructions thereon, wherein the instructions upon execution by the processor, cause the processor to:
perform a conversion between a video and a bitstream of the video according to a rule,
wherein the rule specifies that a first syntax element vps_num_ptls_minus1, which indicates a number of profile/tier/level (PTL) syntax structures in a video parameter set (VPS) associated with the video, is less than a first predetermined threshold,
wherein the first predetermined threshold is a total number of output layer sets associated with the VPS (TotalNumOlss), and
wherein the rule further specifies that a second syntax element vps_num_ols_timing_hrd_params_minus1, which indicates a number of parameters for an output layer set (OLS) hypothetical reference decoder (HRD) in the VPS, is less than a second predetermined threshold.