Patent ID: 11949416
Assignee: SHENZHEN MICROBT ELECTRONICS TECHNOLOGY CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 2:
3. The composite logic gate circuit according to claim 1, further comprising a second inverter circuit including a fourth PMOS transistor and a fourth NMOS transistor,
wherein a source of the fourth PMOS transistor is coupled to the power input terminal, a drain of the fourth PMOS transistor is coupled to a drain of the fourth NMOS transistor, and a gate of the fourth PMOS transistor is coupled to the drains of the first PMOS transistor and the first NMOS transistor,
a source of the fourth NMOS transistor is coupled to the ground terminal, the drain of the fourth NMOS transistor is coupled to the drain of the fourth PMOS transistor, and a gate of the fourth NMOS transistor is coupled to the drains of the first PMOS transistor and the first NMOS transistor.