Patent ID: 11955523
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A method of manufacturing a semiconductor device, the method comprising:
forming an active fin on a substrate, the active fin extending in a first direction;
forming a dummy gate structure to cover the active fin on a substrate, the dummy gate structure extending a second direction intersecting the first direction;
forming a pair of gate spacers on both sides of the dummy gate structure, the pair of gate spacers extending in the second direction;
removing the dummy structure to form a trench extending in the second direction between the pair of gate spacers;
forming a first gate insulating film between the pair of gate spacers and along an upper surface and a lateral surface of the active fin in the second direction;
forming a second gate insulating film on the first gate insulating film, the second gate insulating film having a first portion disposed on the first gate insulating film, and second and third portions extending from the first portion and along an inner sidewall of each of the pair of gate spacers, respectively, wherein a thickness of each of the second and third portions is less than a thickness of the first portion;
forming a first gate electrode on the first portion of the second gate insulating film between the pair of gate spacers, the first gate electrode having a fourth portion contacting the first portion of the second gate insulating film, and fifth and sixth portions contacting the second and third portions of the second gate insulating film, wherein a thickness (tb2) of each of the fifth and sixth portions of the first gate electrode is less than a thickness (tb1) of the fourth portion of the first gate electrode;
forming a second gate electrode on the first gate electrode; and on the fifth and sixth portions of the first gate electrode.