Patent ID: 11935942
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. A semiconductor device, comprising:
first and second gate structures formed on a fin;
source/drain regions formed within the fin;
a dielectric plug structure between the first gate structure and the second gate structure;
a silicon oxycarbide hard mask on the dielectric plug structure;
a first spacer in contact with a sidewall of the dielectric plug structure and with a sidewall of the silicon oxycarbide hard mask, wherein the first silicon nitride spacer and the hard mask comprise different materials;
a second spacer in contact with the first gate structure, wherein the second silicon nitride spacer and the silicon oxycarbide hard mask comprise different materials; and
an air gap formed between the first and second spacers.