Patent ID: 11960367
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A Peripheral Component Interconnect Express (PCIe) device, comprising:
a plurality of lanes comprising a plurality of ports;
a link controller setting a link including the plurality of lanes, wherein the link is set to have a link width that includes remaining lanes, except for a fail lane from among the plurality of lanes,
an EQ controller performing an equalization operation for determining a transmitter or receiver setting of each of the remaining lanes; and
an EQ information storage storing log information indicating a number of equalization operation attempts with respect to each of a plurality of EQ coefficients and storing error information about an error occurring in an L0 state with respect to each of the plurality of EQ coefficients, which includes a transmitter coefficient or a receiver coefficient,
wherein the EQ controller determines a final EQ coefficient using the log information and the error information.