Patent ID: 11916045
Assignee: MONOLITHIC 3D INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A semiconductor device, the device comprising:
a first substrate;
a first metal layer disposed over said first substrate;
a second metal layer disposed over said first metal layer;
a first level comprising a plurality of transistors, said first level disposed over said second metal layer,
wherein said plurality of transistors each comprise single crystal silicon;

a third metal layer disposed over said first level;
a fourth metal layer disposed over said third metal layer,
wherein said fourth metal layer is aligned to said first metal layer with a less than 200 nm alignment error; and

a via disposed through said first level,
wherein said via has a diameter of less than 450 nm,
wherein said fourth metal layer provides a global power distribution, and
wherein said device comprises at least one power supply circuit.