Patent ID: 11875846
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. The method of claim 12, wherein the device includes an integrated circuit package configured to enclose the memory cells and the logic circuit; the first read voltage, the second read voltage and the third read voltage are determined in response to a read command received from outside of the integrated circuit package; and the method further comprises:
applying, by a read circuit of the device, a respective read voltage on the memory cells to determine states of the memory cells when the memory cells are subjected to the respective read voltage;
wherein the hard bit data is determined via the read circuit applying the first read voltage;
wherein the soft bit data is determined via the read circuit applying the second read voltage to obtain first data and then the third read voltage to obtain second data; and
wherein the soft bit data is based on an exclusive or (XOR) of the first data and the second data.