Patent ID: 11862692
Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 20:
21. A transistor device, comprising:
a semiconductor substrate having a first surface;
a plurality of trenches in the semiconductor substrate and extending lengthwise in parallel with one another in a first direction parallel to the first surface such that each pair of adjacent trenches of the plurality of trenches confines a semiconductor mesa;
a field electrode and a gate electrode disposed in each of the plurality of trenches;
a final metallization layer above the semiconductor substrate;
a plurality of field plate contacts extending lengthwise in parallel with one another in the first direction and electrically connecting the final metallization layer to the field electrodes; and
a plurality of mesa contacts extending lengthwise in parallel with one another in the first direction and electrically connecting the final metallization layer to the semiconductor mesas,
wherein the plurality of field plate contacts are each divided along the length of the plurality of trenches into a plurality of field plate contact segments that are separated from one another,
wherein in a first area adjacent to an end of the plurality of trenches, a first line that runs perpendicular to the plurality of trenches intersects a first field plate contact segment of the plurality of field plate contacts,
wherein in a second area spaced inward from the first area, a second line that runs perpendicular to the plurality of trenches intersects a second field plate contact segment of the plurality of field plate contacts.