Patent ID: 11915967
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A method for manufacturing a semiconductor device, comprising:
providing a semiconductor substrate, the semiconductor substrate comprising a shallow trench and active areas isolated from the shallow trench;
forming an oxygen-containing layer on exposed outer surfaces of the shallow trench and the active areas;
filling a first sacrificial layer of a set height in the shallow trench comprising the oxygen-containing layer on a surface of the shallow trench, the set height being lower than heights of the active areas;
forming an etch stop layer on an upper surface of the first sacrificial layer and exposed outer surfaces of the oxygen-containing layer corresponding to the active areas;
removing the first sacrificial layer below the etch stop layer to form an air gap;
filling an isolation layer on the etch stop layer in the shallow trench to form a shallow trench isolation structure containing the air gap; and
etching the active areas and the shallow trench isolation structure to form wordline trenches, wherein bottoms of the wordline trenches in the shallow trench isolation structure are higher than the set height;
wherein the removing the first sacrificial layer below the etch stop layer to form an air gap comprises:
forming etching holes in the shallow trench, the etching holes penetrating through the etch stop layer; and
pouring an etchant into the first sacrificial layer through the etching holes, and wet etching the first sacrificial layer below the etch stop layer; and

wherein the forming etching holes in the shallow trench comprises:
filling a second sacrificial layer on the etch stop layer in the shallow trench, wherein, an upper surface of the second sacrificial layer is flush with upper surfaces of the active areas;
forming a patterned mask layer above the second sacrificial layer and the active areas, the patterned mask layer is formed with through holes exposing the second sacrificial layer in an edge region of the semiconductor substrate; and
etching, by using the patterned mask layer as a mask, the second sacrificial layer to form the etching holes in communication with the through holes; and
removing the patterned mask layer.