Patent ID: 11875448
Assignee: APPLE INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 13:
14. A non-transitory computer readable storage medium having stored thereon design information that specifies a design of at least a portion of a hardware integrated circuit in a format recognized by a semiconductor fabrication system that is configured to use the design information to produce the circuit according to the design, wherein the design information specifies that the circuit includes:
shader circuitry configured to execute a ray intersection instruction for a first single-instruction multiple-data (SIMD) group, wherein the ray intersection instruction indicates coordinate information for a set of rays in a graphics scene;
ray intersection circuitry configured to, in response to the ray intersect instruction:
traverse, in response to the ray intersection instruction, multiple nodes in a spatially-organized acceleration data structure, wherein nodes of the acceleration data structure indicate coordinates corresponding to bounding regions in the graphics scene and the traversal is based on bounding region intersection tests that determine whether rays intersect the bounding regions;
initiate, in response to reaching a first node that indicates a transformation, execution of a second SIMD group that includes multiple instructions to execute on the shader circuitry to transform origin coordinates of one or more rays in the set of rays from a first coordinate space to a second coordinate space;
store coordinates of the one or more rays in the set of rays, in the first coordinate space, prior to the transformation;
continue traversal of one or more nodes of the acceleration data structure based on transformation results from the shader circuitry, wherein the shader circuitry is configured to generate the transformation results based on execution of the second SIMD group; and
continue traversal, back through the first node and through one or more other nodes of the acceleration data structure, wherein the traversal through the one or more other nodes uses the stored coordinates in the first coordinate space of the one or more rays prior to the transformation;
subsequent to the continued traversal back through the first node, provide traversal result information to the shader circuitry as a result of the ray intersect instruction;

wherein the circuit is configured to perform one or more primitive intersection tests based on the traversal result information.