Patent ID: 11961944
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A manufacturing method of a semiconductor device, comprising:
forming transistors on a semiconductor substrate;
forming an interconnection structure over the transistors, wherein the interconnection structure comprises a stack of dielectric layers and conductive features spreading in the stack of dielectric layers;
using a sputtering apparatus to deposit a transparent conductive layer on the interconnection structure, wherein the transparent conductive layer is deposited while the semiconductor substrate is heated by a temperature control system connected to a workpiece holder holding the semiconductor substrate, such that the transparent conductive layer formed of a metal oxide material has two crystalline phases different with each other in terms of prefer growth plane and oxygen vacancy content; and
patterning the transparent conductive layer into an array of transparent conductive patterns.