Patent ID: 11935937
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 9:
10. A semiconductor device comprising:
a fin protruding above a substrate;
source/drain regions over the fin;
nanosheets between the source/drain regions;
a gate layer stack around the nanosheets, wherein the gate layer stack fills spaces between adjacent nanosheets, wherein the gate layer stack has a first number of sublayers at a first location between adjacent nanosheets, and has a second number of sublayers at a second location over a topmost nanosheet distal from the substrate, the first number being larger than the second number, wherein the gate layer stack has a first thickness at the first location and has a second thickness at the second location, the first thickness being about twice the second thickness; and
a gate electrode material around the gate layer stack.