Patent ID: 11936378
Assignee: NO.24 RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An interface circuit, comprising:
a programmable current array, used to generate a first current and a second current transmitted to a common mode and differential mode generation circuit according to an input code, and to generate a third current and a fourth current transmitted to a driving bias generation circuit according to the input code;
the common mode and differential mode generation circuit, connected to an output end of the programmable current array, used to generate a common mode voltage according to the first current, and to generate a high level voltage and a low level voltage according to the second current and the common mode voltage, wherein the difference between the high level voltage and the low level voltage is a differential mode voltage;
a driving bias generation circuit, connected to output ends of the programmable current array and the common mode and differential mode generation circuit, respectively, to simulate a load according to the third current and the fourth current, and to generate a bias voltage based on the load, the high level voltage, and the low level voltage;
an output driving circuit, connected to the bias voltage of the driving bias generation circuit, to convert an input signal into a differential signal in which a common mode voltage and a differential mode amplitude are configurable.