Patent ID: 11862468
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A method comprising:
forming a first fin and a second fin extending from a substrate;
forming a dummy dielectric on upper portions of the first fin and the second fin;
growing an epitaxial source/drain region in the first fin and the second fin, the epitaxial source/drain region adjacent the dummy dielectric;
removing the dummy dielectric from the first fin and the second fin, upper portions of the first fin and the second fin bending towards one another during the removing the dummy dielectric;
depositing a gate dielectric layer on the upper portions of the first fin and the second fin;
depositing a sacrificial layer on the gate dielectric layer, horizontal portions of the sacrificial layer having a first thickness, vertical portions of the sacrificial layer having a second thickness, the second thickness being up to 20% less than the first thickness, wherein depositing the sacrificial layer comprises performing a chemical vapor deposition process using a first precursor and a second precursor, the first precursor being a self-limiting source precursor for a material of the sacrificial layer, the second precursor being a self-reacting source precursor for the material of the sacrificial layer, wherein the self-reacting source precursor reacts with itself in the chemical vapor deposition process to form the material of the sacrificial layer, wherein the self-limiting source precursor does not react with itself in the chemical vapor deposition process;
after depositing the sacrificial layer, annealing the gate dielectric layer;
after annealing the gate dielectric layer, removing the sacrificial layer; and
after removing the sacrificial layer, forming a gate electrode layer on the gate dielectric layer.