Patent ID: 11954063
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 7:
8. A method comprising:
fetching an instruction from an instruction cache of a graphics processing unit (GPU), the instruction a single instruction multiple data (SIMD) instruction having multiple operands and configured to use a bfloat16 (BF16) number format, wherein the BF16 number format is a sixteen-bit floating point format having an eight-bit exponent, the GPU includes a shared memory coupled with the instruction cache and circuitry coupled with the shared memory and the instruction cache;
dispatching a warp of threads to a single instruction multiple thread (SIMT) multiprocessor of the GPU in response to the instruction, wherein the SIMT multiprocessor includes multiple texture units, a first core including hardware to accelerate matrix operations, and a second core configured to execute a thread of the instruction; and
processing the instruction on the second core using the multiple operands, wherein processing the instruction includes performing a multiply operation, performing an addition to a result of the multiply operation, and applying a rectified linear unit function to a result of the addition.