Patent ID: 11936351
Assignee: ON-BRIGHT ELECTRONICS (SHANGHAI) CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 22:
23. A method for error amplification and processing, the method comprising:
receiving a reference signal;
receiving a feedback signal;
generating, by a signal processing unit, a digital pulse signal, a frequency of the digital pulse signal being associated with a difference between the reference signal and the feedback signal;
receiving the digital pulse signal;
generating a counter output signal based on at least information associated with the digital pulse signal;
receiving the counter output signal; and
generating an output signal based on at least information associated with the counter output signal;
wherein the generating a digital pulse signal includes:
generating an amplification signal based on at least information associated with the reference signal and the feedback signal;
receiving, by a pulse generator the amplification signal; and
generating, by the pulse generator, the digital pulse signal based on at least information associated with the amplification signal;

wherein the receiving the amplification signal includes:
receiving the amplification signal by a current direction switch configured to determine a direction of the amplification signal, and
generating a current switch output signal based on information associated with the amplification signal;

wherein:
the current direction switch comprises an inverter, a first transistor, and a second transistor;
the inverter is configured to receive the amplification signal from the error amplifier; and
the first transistor is turned on or off based at least in part on the direction of the amplification signal;

wherein:
the second transistor is turned on or off based at least in part on the direction of the amplification signal;
the pulse generator further includes an addition pulse generator;
the addition pulse generator is configured to receive the current switch output signal and generate an addition pulse signal based at least in part on the current switch output signal; and
the addition pulse signal is a part of the digital pulse signal;

wherein:
the addition pulse generator includes a third transistor, a fourth transistor, a first capacitor, a first switch, a first comparator, and a first delay element;
the third transistor and the fourth transistor are configured to receive the current switch output signal and generate a first voltage signal based at least in part on the current switch output signal;
the first capacitor is configured to receive the first voltage signal;
the first comparator is configured to receive the first voltage signal and a first threshold signal and generate the addition pulse signal based at least in part on the first voltage signal and the first threshold signal;
the first delay element is configured to receive the addition pulse signal and generate a first switch signal based on at least information associated with the additional pulse signal; and
the first switch is configured to receive the first switch signal.