Patent ID: 11923315
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A manufacturing method of a semiconductor package, comprising:
encapsulating a pair of dies in an encapsulant;
alternately stacking dielectric layers and conductive layers on the encapsulated pair of dies, wherein the conductive layers are interposed between a lowermost dielectric layer of the dielectric layers closest to the pair of dies and an uppermost dielectric layer of the dielectric layers farthest from the pair of dies, and the conductive layers electrically interconnect the pair of dies; and
disposing a metallic material on the uppermost dielectric layer to form a conductive plate,
wherein the conductive plate extends over side surfaces of the pair of dies and the side surfaces of the pair of dies contact the encapsulant.