Patent ID: 11869825
Assignee: QORVO US, INC.
Field: nan (nan)
Classification: CPC nan | IPC H

Claim 10:
11. The method of claim 1 wherein:
each of the plurality of device dies includes the plurality of first bump structures and a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion;
the FEOL portion comprises the active layer, a contact layer, and isolation sections, wherein the active layer and the isolation sections reside over the contact layer, the isolation sections surround the active layer, and the active layer does not extend vertically beyond the isolation sections; and
the plurality of first bump structures is formed at a bottom surface of the BEOL portion of each of the plurality of device dies, wherein a combination of the bottom surface of each BEOL portion forms the bottom surface of the device wafer.