Patent ID: 11889615
Assignee: GRAPHCORE LIMITED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A method comprising:
forming computer circuitry in a first silicon substrate, the first silicon substrate having a self-supporting depth;
forming a plurality of distributed capacitance units in a second silicon substrate;
after forming computer circuitry in a first silicon substrate and forming a plurality of distributed capacitance units in a second silicon substrate, bonding a first surface of the first silicon substrate to a second surface of the second silicon substrate to create a stacked structure;
after bonding, thinning the second silicon substrate to a depth smaller than a depth of the first silicon substrate; and
disposing a plurality of supply voltage connector terminals on a third surface of the second substrate, wherein the third surface and the second surface are on opposite sides of the second substrate.