Patent ID: 11900874
Assignee: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 14:
15. The display substrate of claim 7, wherein
in a direction gradually far away from the base substrate, the display substrate successively comprises:
a semiconductor layer comprising: the first electrode, the second electrode and the active region of the driving transistor; the first electrode, the second electrode and the active region of the first transistor; the first electrode, the second electrode and the active region of the second transistor; the first electrode, the second electrode and the active region of the third transistor; the first electrode, the second electrode and the active region of the fourth transistor; the first electrode, the second electrode and the active region of the fifth transistor; the first electrode, the second electrode and the active region of the sixth transistor; the first electrode, the second electrode and the active region of the seventh transistor; the first electrode, the second electrode and the active region of the eighth transistor; and the first electrode of the voltage stabilizing capacitor; wherein the first electrode of the voltage stabilizing capacitor and the second electrode of the second transistor is coupled to each other as a single piece, and are made of a conductive semiconductor material;
a gate insulating layer;
a first gate layer comprising: the gate of the driving transistor, the gate of the first transistor, the gate of the second transistor, the gate of the third transistor, the gate of the fourth transistor, the gate of the fifth transistor, the gate of the sixth transistor, the gate of the seventh transistor, the gate of the eighth transistor, the first reset signal terminal, the second reset signal terminal, the control signal terminal and the first electrode of the storage capacitor;
a first interlayer insulating layer;
a second gate layer comprising the initialization signal terminal, the second electrode of the voltage stabilizing capacitor and the second electrode of the storage capacitor;
a second interlayer insulating layer;
a first source-drain layer comprising: the first power supply signal terminal, the data signal terminal, a first light emitting access structure and a voltage stabilizing connection structure; wherein the first power supply signal terminal is coupled to the second electrode of the storage capacitor through a via hole extending through the second interlayer insulation layer, and is coupled to the first electrode of the sixth transistor through a via hole extending through the gate insulating layer, the first interlayer insulating layer and the second interlayer insulating layer; the data signal terminal is coupled to the second electrode of the fifth transistor through a via hole extending through the gate insulating layer, the first interlayer insulating layer and the second interlayer insulating layer; the first light emitting access structure is coupled to the second electrode of the seventh transistor through a via hole extending through the gate insulating layer, the first interlayer insulating layer and the second interlayer insulating layer; and the voltage stabilizing connection structure is coupled to the second electrode of the storage capacitor through a via hole extending through the second interlayer insulating layer, and is coupled to the second electrode of the voltage stabilizing capacitor through a via hole extending through the second interlayer insulating layer;
a first planarization layer;
a second source-drain layer comprising an auxiliary conductive structure and a second light emitting access structure; wherein the auxiliary conductive structure overlaps with the first power supply signal terminal and is coupled to the first power supply signal terminal through a via hole extending through the first planarization layer; and the second light emitting access structure is coupled to the first light emitting access structure through a via hole extending through the first planarization layer;
a second planarization layer; and
the first electrode of the light emitting device, wherein the first electrode of the light emitting device is coupled to the second light emitting access structure through a via hole extending through the second planarization layer.