Patent ID: 11917826
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 13:
14. The semiconductor memory device according to claim 12, further comprising:
a plurality of fourth memory pillars, each fourth memory pillar penetrating the word lines in the third direction, the fourth memory pillars being arranged in the second direction at the first intervals and being connected with the first memory pillars via first connection portions, respectively; and
a plurality of fifth memory pillars, each fifth memory pillar penetrating the word lines in the third direction, the fifth memory pillars being arranged in the second direction at the first intervals and being connected with the second memory pillars via second connection portions, respectively,
wherein
the first connection portions extend in the first direction in parallel with the first bit lines, when viewed in the third direction, and
the second connection portions extend in the first direction in parallel with the second bit lines, when viewed in the third direction.