Patent ID: 11862721
Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a semiconductor substrate;
a first nitride-based semiconductor layer disposed over the semiconductor substrate;
a second nitride-based semiconductor layer disposed on the first nitride-based semiconductor layer and having a bandgap greater than a bandgap of the first nitride-based semiconductor layer, so as to form a heterojunction therebetween with a two-dimensional electron gas (2DEG) region;
a pair of source/drain (S/D) electrodes disposed over the second nitride-based semiconductor layer;
a gate electrode disposed over the second nitride-based semiconductor layer and between the S/D electrodes; and
a first passivation layer disposed over the second nitride-based semiconductor layer, the S/D electrodes, and the gate electrode, wherein edges of the first and second nitride-based semiconductor layers and the first passivation layer collectively form a stepped sidewall over the semiconductor substrate, and the stepped sidewall includes at least one laterally-extending portions with at least two riser portion connecting the at least one laterally-extending portion.