Patent ID: 11962675
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A device circuit comprising:
an accelerator circuit configured to generate a request and receive a response;
a packet transmitter configured to generate a plurality of transmission packets based on the request generated by the accelerator circuit, and to output the plurality of transmission packets, the plurality of transmission packets comprising information indicative of at least one of the plurality of transmission packets being a packet to be merged; and
a packet receiver configured to generate a merged packet by merging a plurality of extension packets from among a plurality of reception packets received from outside of the device circuit, the plurality of extension packets comprising information indicative of at least one of the plurality of extension packets being a packet to be merged,
wherein a sum of lengths of fields for processing the request is greater than a length of each of the plurality of transmission packets, and
wherein the packet transmitter is further configured to encode the plurality of transmission packets in different formats from each other such that the fields for the request are dispersed in the plurality of transmission packets.