Patent ID: 11961837
Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. An apparatus comprising:
a GaN-based substrate including GaN and AlGaN and including a dielectric layer;
a diamond layer section that is single- or poly-crystalline in nature; and
an integrated circuit that includes
a GaN-based field effect transistor (FET) integrated with a portion of the GaN-based substrate, and
a diamond FET integrated with a portion of the diamond layer section, the diamond FET being electrically coupled to the GaN-based FET by interconnects and situated over or against a surface region of the GaN-based substrate, the dielectric layer being formed on the diamond layer section and the dielectric layer to facilitate stability during operation of the integrated circuit at temperatures greater than 250° C. by at least one of: having a selected thickness to mitigate dielectric layer leakage current or breakdown of the dielectric layer; and being formed using a sufficiently-high deposition temperature of greater than 350° C.