Patent ID: 11889694
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 15:
16. A method of forming a memory die, comprising:
forming an alternating stack of insulating layers and spacer material layers over a substrate, wherein the spacer material layers are formed as, or are subsequently replaced with, electrically conductive layers, wherein the alternating stack laterally extends through a series of regions that comprises, in a spatial order along a first horizontal direction, a first contact region, a first memory array region, an auxiliary contact region, a second memory array region, and a second contact region;
forming arrays of memory openings located in the first memory array region and the second memory array region;
forming arrays of memory opening fill structures within the arrays of memory openings, wherein each of the memory opening fill structures comprises a respective vertical stack of memory elements, wherein the alternating stack comprises a lower layer stack including a first subset of the insulating layers and a first subset of the electrically conductive layers located underneath a horizontal plane, and an upper layer stack including a second subset of the insulating layers and a second subset of the electrically conductive layers located above the horizontal plane;
forming first contact via structures contacting a respective electrically conductive layer of the first subset of the electrically conductive layers in the first contact region and the second contact region; and
forming second contact via structures contacting a respective electrically conductive layer of the second subset of the electrically conductive layers in the auxiliary contact region.