Patent ID: 11923240
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 14:
15. A method of forming a semiconductor device, comprising:
providing a substrate;
forming a plurality of semiconductor nanosheets over the substrate; and
forming a gate stack wrapping each of the plurality of semiconductor nanosheets, wherein the forming the gate stack comprises:
forming a gate dielectric layer wrapping each of the plurality of semiconductor nanosheets;
forming a work function layer surrounding the gate dielectric layer;
forming a gate fill material surrounding the work function layer; and
forming a barrier layer between the work function layer and the gate fill material, wherein the barrier layer is located in an inner sheet region between two adjacent semiconductor nanosheets and in an outer sheet region other than the inner sheet region.