Patent ID: 11928077
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. A data storage device comprising:
a controller comprising:
a processor configured to control a read or write operation based on a command received from an external device; and
a data processing circuit configured to randomize input bit groups to output output bits including transformed bit groups based on a seed received from the processor and different polynomials; and
a nonvolatile memory configured to write the transformed bit groups ata memory region according to an address offset,
wherein the seed has a relationship to the address offset and the polynomials have different degrees which are integral multiples of a total number of input bits included in the input bit groups provided to the data processing circuit and the seed corresponding to each memory region having relationship to the address offset is fixed.