Patent ID: 11923015
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 9:
10. A semiconductor storage device, comprising:
a NAND-type memory cell array including a plurality of string units, each string unit having a plurality of strings each with a plurality of memory cells connected in series between a first select transistor and a second select transistor; and
a sequencer configured to perform an erase operation the NAND-type memory cell array, wherein
the sequencer is configured to adjust, for each of the plurality of strings in a string unit being erased, either an application time of a first voltage applied to a gate of the first select transistor of the respective strings in the erase operation or a voltage level of the first voltage applied to the gate of the first select transistor of the respective strings in the erase operation.