Patent ID: 11888026
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 12:
13. An integrated circuit device comprising:
a fin-type active region on a substrate and extending in a first horizontal direction;
a recess formed in the fin-type active region;
a pair of nanosheet stacks on a fin top of the fin-type active region, the pair of nanosheet stacks being separated from each other in the first horizontal direction with the recess formed therebetween;
a pair of gate lines on the fin-type active region, each gate line surrounding a corresponding one of the pair of nanosheet stacks, and extending in a second horizontal direction that is different from the first horizontal direction; and
a source/drain region in the recess and in contact with each one of the pair of nanosheet stacks,
wherein the source/drain region includes a lower main body layer and an upper main body layer, the lower and upper main body layers being sequentially stacked in the recess in the vertical direction,
wherein a top surface of the lower main body layer includes a pair of lower facets each declining toward the substrate as it extends in a direction from one of the pair of nanosheet stacks to a center of the source/drain region,
wherein the upper main body layer includes a bottom surface contacting the pair of lower facets and a top surface having an upper facet,
wherein with respect to a vertical cross section, each lower facet extends along a corresponding first line, the upper facet extends along a second line, and
wherein each first line and the second line intersect each other.