Patent ID: 11860222
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 9:
10. A circuit for testing crosstalk effect, comprising:
a first circuit, configured to simulate an interfered first signal circuit in an integrated circuit under test, wherein an input end of the first circuit is configured to receive a test signal, and an output end of the first circuit is configured to output an interfered signal;
N second circuits, configured to simulate N second signal circuits that interfere with the first signal circuit in the integrated circuit under test, wherein N is an integer greater than 0 and less than or equal to 5, an input end of each second circuit is configured to receive an interference input signal, and an output end of each second circuit is configured to output an interference signal; and
N capacitors, wherein one pole plate of each capacitor is connected to the first circuit, the other pole plate of the capacitor is connected to the second circuit, and a capacitance value of the capacitor is determined according to a measured coupling capacitance value between the second signal circuit and the first signal circuit.