Patent ID: 11934970
Assignee: NEC CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An abduction apparatus comprising:
at least one memory storing instructions; and
at least one processor configured to access the at least one memory and execute the instructions to:
calculate, with respect to each of a plurality of candidate hypotheses that are generated using observation information and knowledge information and that are each a directed non-cycling hypergraph in which first order predicate logic literals are nodes connected by edges that each express a relationship as to which literal is explained by which other literal using which inference rule, a probability that the candidate hypothesis holds true as an explanation of the observation information;
select, based on the probability calculated for each candidate hypothesis, one or more of the candidate hypotheses that hold true as the explanation;
select, for each of the one or more of the candidate hypotheses that have been selected, a reward value by referring to reward definition information in which a condition that the each of the one or more of the candidate hypotheses is associated with the reward value; and
generate output information to be output to an output device from any one of the probability of each of the one or more candidate hypotheses that have been selected, the reward value of each of the one or more candidate hypotheses that have been selected, the one or more candidate hypotheses that have been selected, and a combination of any of the probability of the probability of each of the one or more candidate hypotheses that have been selected, the reward value of each of the one or more candidate hypotheses that have been selected, the one or more candidate hypotheses that have been selected.