Patent ID: 11954057
Assignee: SIGMASENSE, LLC.
Field: Digital communication (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 5:
6. A non-transitory computer readable memory comprises:
a first storage section operable to store operational instructions that, when executed by a controller of a low voltage drive circuit and/or by a processing module of a host device, causes the controller and/or processing module to:
determine when three low voltage drive circuits are coupled to a wired bus for communication among the three low voltage drive sense circuits; and

a second storage section operable to store operational instructions that, when executed by the controller and/or by the processing module, causes the controller and/or processing module to:
allocate a first transmit frequency component for transmitting from a first low voltage drive circuit of the three low voltage drive circuit to a second low voltage drive circuit of the three low voltage drive circuit;
allocate a second transmit frequency component for transmitting from the first low voltage drive circuit to a third low voltage drive circuit of the three low voltage drive circuit;
allocate a third transmit frequency component for transmitting from the second low voltage drive circuit to the first low voltage drive circuit;
allocate a fourth transmit frequency component for transmitting from the second low voltage drive circuit to the third low voltage drive circuit;
allocate a fifth transmit frequency component for transmitting from the third low voltage drive circuit to the first low voltage drive circuit; and
allocate a sixth transmit frequency component for transmitting from the third low voltage drive circuit to the second low voltage drive circuit.