Patent ID: 11940492
Assignee: STMICROELECTRONICS S.R.L.
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 16:
17. A method, comprising:
applying test stimulus signals to at least one circuit under test, the test stimulus signals being produced in a set of test stimulus generators as a function of test stimulus information loaded in test stimulus registers in the set of test stimulus generators, wherein the test stimulus generators are linear-feedback shift registers configurable to include different numbers of types, each type having a different number of bits;
controlling loading of test stimulus information in the test stimulus registers of the test stimulus generators as a function of test programming information loaded in a respective control register in a set of control registers with a set of controllers, the test stimulus generators in the set of test stimulus generators being activated as a function of the test programming information loaded in the control registers in the set of control registers;
receiving, by a compressor circuit, plural sets of test outcome signals from the at least one circuit under test in response to the test stimulus signals being applied thereto with signature control circuitry, the signature control circuitry being separate from the set of controllers, the plural sets of test outcome signals passing through:
two gated via AND gates under control of respective enabling signals produced by one or more funnel configuration registers; and
an XOR gate coupled to respective outputs of the two gated via AND gates;

producing signature comparison signals from the test outcome signals received from the at least one circuit under test;
comparing the signature comparison signals produced from the test outcome signals received from the at least one circuit under test with respective programmable signature reference signals stored in a set of input signature registers; and
producing error signals in response to the signature comparison signals produced from the test outcome signals received from the at least one circuit under test failing to match with the respective programmable signature reference signals stored in the set of input signature registers.