Patent ID: 11868299
Assignee: SHANGHAI CAMBRICON INFORMATION TECHNOLOGY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. The data processing device of claim 10, wherein the transmission circuit further includes a dependency processing unit configured to determine whether there is an association between an sth data operation signal and an s−1th data operation signal before the sth data operation signal, where if there is an association relationship between the sth data operation signal and the s−1th data operation signal, the dependency processing unit is configured to cache the sth data operation signal in the instruction storage unit, and after the s−1th data operation signal is executed, fetch the sth data operation signal from the instruction storage unit and transfer the data to the instruction processing unit; wherein the determining whether there is a association between the sth data operation signals and the s−1th data operation signal includes:
fetching a first storage address interval of data required in the sth data operation signal according to the sth data operation signal, fetching a zeroth storage address interval of data required in the s−1th data operation signal according to the s−1th data operation signal, respectively; if the first storage address interval and the zeroth storage address interval have an overlapping area, determining that there is an association between the sth data operation signal and the s−1th data operation signal; and if the first storage address interval and the zeroth storage address interval do not have an overlapping area, determining that there is no association between the sth data operation signal and the s−1th data operation signal.