Patent ID: 11923257
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A computing device comprising:
a hybrid microelectronic substrate, comprising:
a low-density microelectronic substrate (LDMS) having a recess at a first surface, wherein the LDMS includes a first conductive pathway that extends to a bottom surface of the recess; and
a high-density microelectronic substrate (HDMS) in the recess and coupled to the bottom surface of the recess via solder interconnects, wherein the HDMS has a first surface and an opposing second surface, the first surface of the HDMS is between the second surface of the HDMS and the bottom surface of the recess, the HDMS has a first conductive contact at the first surface of the HDMS, the first conductive contact is coupled to the first conductive pathway via a solder interconnect, the HDMS includes a second conductive pathway, the HDMS has a second conductive contact at the second surface of the HDMS, the second conductive contact is coupled to the second conductive pathway, the HDMS includes a stack of layers of dielectric material, and the stack extends from the first surface of the HDMS to the second surface of the HDMS; and

a microelectronic device coupled to the second surface of the HDMS.