Patent ID: 11917206
Assignee: LENOVO (SINGAPORE) PTE. LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. The apparatus of claim 4, wherein to align at least one NAL unit of data, a plurality of NAL units of data, or a plurality of NAL unit data segments, the at least one processor is configured to cause the apparatus to map and enclose the alignment within one CBG, or mTB, or both, wherein the data spans multiple CBs with a last CB in the sequence formed as one of:
a sequence of data bits that completely utilize the size of the CB;
a sequence of data bits that partially utilize the size of the CB where free bits are utilized with a known fixed bit sequence; and
a sequence of data bits that partially utilize the size of the CB, where free bits are released to the PHY as additional resources for utilization.