Patent ID: 11908320
Assignee: HERE GLOBAL B.V.
Field: Control (Instruments)
Classification: CPC G  H | IPC G  H

Claim 12:
13. An apparatus comprising at least one processor and at least one non-transitory memory including computer program code instructions, the computer program code instructions configured to, when executed, cause the apparatus to:
for each of a plurality of time epochs, determine a representation of a turning speed in a downstream direction for traffic in each of a plurality of lanes of a link immediately upstream of a direction based traffic (DBT) intersection;
for each of the plurality of time epochs, determine a ratio of a first representation of the turning speed for traffic in a first lane of the link to a second representation of the turning speed for traffic in a second lane of the link;
determine a speed ratio for the DBT intersection based upon the ratios that are determined for each of the plurality of time epochs;
select one or more DBT intersections for DBT topology stranding based upon the speed ratio for the one or more DBT intersections;
obtain traffic information for the one or more DBT intersection;
define, based on the prioritized one or more DBT intersections, a route that provides lane level guidance to a driver or a vehicle indicating a lane of a link of a DBT intersection of which the vehicle should travel, the route indicating the traffic information;
provide to the driver or the vehicle via a user interface, the route; and provide the traffic information on a user interface.