Patent ID: 11886292
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 3:
4. The memory system of claim 2, wherein N is 8 and X is 3; the first encoding operation comprises a not exclusive OR (XNOR) operation or an exclusive OR (XOR) operation, the first encoding circuit is configured such that in the X-bit first binary number, the first check code at a lowest bit is XOR or XNOR of data at first, third, fifth and seventh bits of all the bytes, the first check code at a highest bit is XOR or XNOR of data at fourth, fifth, sixth and seventh bits of all the bytes, and the first check code at an intermediate bit is XOR or XNOR of data at second, third, sixth and seventh bits of all the bytes.