Patent ID: 11942866
Assignee: CYPRESS SEMICONDUCTOR CORPORATION
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 3:
4. The error amplifier of claim 1, further comprising an offset cancellation circuitry coupled to outputs of the first transconductance amplifier and the second transconductance amplifier, the offset cancellation circuitry to:
one of detect a first direct current (DC) voltage offset at an input of the first transconductance amplifier while in the constant voltage mode or a second DC voltage offset at an input of the second transconductance amplifier while in the constant current mode;
in response to detection of the first DC offset, sink a first equivalent current from the first transconductance amplifier to cancel the first DC voltage offset, wherein the first equivalent current corresponds to a programmable transconductance of the first transconductance amplifier; and
in response to detection of the second DC offset, sink a second equivalent current from the second transconductance amplifier to cancel the second DC voltage offset, wherein the second equivalent current corresponds to a programmable transconductance of the second transconductance amplifier.