Patent ID: 11955568
Assignee: MURATA MANUFACTURING CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A capacitor structure, comprising:
a silicon substrate having a trench structure formed therein;
a dielectric layer disposed over a surface of the trench structure, conformal to said surface of the trench structure; and
a filling layer disposed over the dielectric layer and into the trench structure, the filling layer comprising:
a conductive layer;
a polymer layer; and
a further conductive layer disposed over the polymer layer and into the trench structure,

wherein the conductive layer is disposed between the dielectric layer and the polymer layer,
wherein the further conductive layer is electrically connected to the conductive layer, and
wherein the thickness of the polymer layer is equal to the thickness of the dielectric layer multiplied by the ratio of the breakdown field of the material of the dielectric layer to the breakdown field of the material of the polymer layer.