Patent ID: 11967372
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. The apparatus of claim 1, further comprising:
a first tile comprising a first plurality of interleaved comb structures and a second plurality of interleaved comb structures, each interleaved comb structure comprising a first comb structure comprising a first plurality of word lines and a second comb structure comprising a second plurality of word lines, the first plurality of word lines being interleaved with the second plurality of word lines, the pillar coupled with a first word line of the first comb structure of the first plurality of interleaved comb structures and a second word line of the second comb structure of the first plurality of interleaved comb structures, wherein the first tile further comprises a first via positioned between the first plurality of interleaved comb structures and the second plurality of interleaved comb structures, the first via coupled with the first gate line and the second gate line.