Patent ID: 11881242
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 15:
16. A multi-gate ferroelectric gate Field Effect Transistor (FeFET) capable of storing four distinct threshold voltage (Vt) states, the FeFET comprising:
a source-drain conduction region;
a via coupled to the source-drain conduction region;
at least two capacitors separated from the source-drain region by the via, each of the at least two capacitors comprising:
a buffer layer,
a conductive gate terminal,
a dielectric ferroelectric layer arranged between the buffer layer and the conductive gate terminal, and
a non-ferroelectric gate oxide positioned between the conductive gate terminal and the substrate,
wherein each of the at least two capacitors has a respective unique switching E-field such that applying a predetermined signal to through the via stores a Vt of the four distinct Vt states.