Patent ID: 11948616
Assignee: BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 13:
14. The manufacturing method of a semiconductor structure according to claim 13, wherein the magnetic tunnel junction structure comprises: a fixed layer, a magnetic tunnel junction layer, and a free layer that are sequentially stacked from bottom to top;
the forming a magnetic tunnel junction structure and a top electrode on the bottom electrode comprises:
forming, on an upper surface of the bottom electrode, a fixed material layer, a magnetic tunnel junction material layer, a free material layer, and a top electrode material layer that are sequentially stacked from bottom to top; and
patterning the fixed material layer, the magnetic tunnel junction material layer, the free material layer, and the top electrode material layer that are sequentially stacked from bottom to top, to obtain a fixed layer, a magnetic tunnel junction layer, a free layer, and a top electrode that are sequentially stacked from bottom to top.