Patent ID: 11908533
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. An operation method of a memory device including a plurality of memory blocks and a leakage detecting circuit configured to detect a leakage current, the method comprising:
precharging a first current path with a first voltage;
floating the first current path from the first voltage to detect a first voltage variation corresponding to a first leakage current on the first current path;
storing the first voltage variation in a first capacitor of the leakage detecting circuit;
precharging the first current path and a second current path with the first voltage;
floating the first current path and the second current path from the first voltage to detect a second voltage variation corresponding to a sum of the first leakage current on the first current path and a second leakage current on the second current path; and
outputting, by the leakage detecting circuit, a first detection signal corresponding to the second leakage current based on the first voltage variation stored in the first capacitor and the second voltage variation,
wherein the leakage current includes the first leakage current and the second leakage current.