Patent ID: 11901187
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. A semiconductor device comprising:
a wafer comprising a non-edge portion and an edge portion around the non-edge portion;
a capacitor structure on the non-edge portion of the wafer; and
a supporting structure on the edge portion of the wafer,
wherein the capacitor structure includes an etch stop layer, an intermediate supporter layer apart from the etch stop layer in a vertical direction, an upper supporter layer apart from the intermediate supporter layer in the vertical direction, a plurality of lower electrodes penetrating through the etch stop layer, the intermediate supporter layer, and the upper supporter layer, a dielectric layer on the lower electrodes, and an upper electrode on the dielectric layer,
the supporting structure shares the etch stop layer, the intermediate supporter layer, and the upper supporter layer with the capacitor structure and further comprises an upper mold layer between the etch stop layer and the intermediate supporter layer, an upper mold layer between the intermediate supporter layer and the upper supporter layer, and a hard mask structure on the upper supporter layer,
the hard mask structure includes a first hard mask layer and a second hard mask layer sequentially stacked on the upper supporter layer,
one of the first hard mask layer and the second hard mask layer comprises a spin on hard mask (SOH) layer containing carbon (C), hydrogen (H), oxygen (O), and nitrogen (N), and
the other one of the first hard mask layer and the second hard mask layer comprises an SOH layer containing C, H, and O.