Patent ID: 11962318
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 19:
20. A device comprising:
a processor;
a memory coupled to the processor; and
an analog to digital converter (ADC) coupled to the processor and the memory, the ADC including:, a voltage to delay (VD) block configured to generate a delay signal responsive to a calibration signal;, a backend ADC coupled to the VD block, and configured to receive the delay signal, the backend ADC having a plurality of stages including a first stage; and, a calibration circuit coupled to the plurality of stages and the VD block, the calibration circuit configured to:
determine an error count of the first stage in response to the delay signal; and, store a delay value of the first stage for which the error count is minimum.