Patent ID: 11928588
Assignee: UIF (UNIVERSITY INDUSTRY FOUNDATION), YONSEI UNIVERSITY
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. The in-memory device according to claim 8, wherein
the multi-bit weight application unit stores the input data in the capacitor through an input voltage corresponding to the input signal applied to the plurality of multi-bit application nodes and when the bit weight is input by a predetermined switching operation, applies the bit weighted value to the input data in each multi-bit application node to output the weight applied value, and
the capacitors connected to the plurality of multi-bit application nodes have different capacitances or only some of the capacitors have the same capacitance and the multi-bit weight application unit applies the bit weight to the input data corresponding to the capacitance in each of the plurality of multi-bit application nodes to output the weight applied value.