Patent ID: 11901298
Assignee: RENESAS ELECTRONICS CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of manufacturing a semiconductor device comprising steps of:
(a) preparing a semiconductor chip having a first main surface, a second main surface on an opposite side of the first main surface, and a plurality of electrode pads exposed on the first main surface; and
(b) after the (a), connecting wires to the plurality of electrode pads, respectively,
wherein the plurality of electrode pads includes:
a plurality of first electrode pads which is electrically connected to a circuit included in the semiconductor chip and to which first wires are bonded in the (b); and
a second electrode pad to which a second wire is bonded in the (b), and

wherein the (b) includes steps of:
(b1) bonding the second wire to the second electrode pad by using a wire bonding apparatus and measuring a current or a voltage which controls an operation of the wire bonding apparatus at the time of bonding the second wire;
(b2) determining pass or fail of a machining operation by the wire bonding apparatus based on measured data obtained in the (Ill); and
(b3) sequentially bonding the first wires to the plurality of first electrode pads, respectively, by using the wire bonding apparatus.