Patent ID: 11955174
Assignee: ARISTA NETWORKS, INC.
Field: Digital communication (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 13:
14. A server rack for selectively connecting a plurality of processing nodes, said server rack comprising:
a plurality of servers;
a core comprising a memory lookup structure, the plurality of processing nodes, and a connection matrix, wherein the connection matrix; and
a connector panel connected to the plurality of servers and to the core to provide electrical paths between the plurality of servers and the plurality of processing nodes in the core,
the connection matrix connected to the memory lookup structure via a first data bus, the connection matrix connected to each of the processing nodes of the plurality of processing nodes via a respective data bus, the connection matrix selectively providing directly connected electrical paths between the memory lookup structure and any of the processing nodes in response to the connection matrix receiving control inputs,
wherein the connection matrix, in response to receiving first control inputs, establishes first electrical paths comprising:
an electrical path between the memory lookup structure and a first processing node among the plurality of processing nodes; and
an electrical path between a second processing node among of the plurality of processing nodes and one of the plurality of servers via the connector panel.