Patent ID: 11903034
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A non-transitory computer-readable storage medium that stores instructions for execution by processing circuitry of a user equipment (UE), the processing circuitry configured to perform a random access procedure comprising:
configuring the UE for transmission of a random access preamble (Msg1) in a physical random access channel (PRACH);
configuring the UE for reception of a random access response (RAR) message (Msg2) in response to transmission of the random access preamble (Msg1), the RAR message (Msg2) including an RAR uplink (UL) grant; and
configuring the UE for an initial transmission of a physical uplink shared channel (PUSCH) scheduled by the RAR UL grant,
wherein for PUSCH repetition Type A that is scheduled by the RAR UL grant, the processing circuitry is to configure the UE to repeat the initial transmission of the PUSCH over a number of slots based on a Msg3 PUSCH repetition number, and
wherein when the PUSCH repetition Type A that is scheduled by the RAR UL grant, the processing circuitry is configured to determine the Msg3 PUSCH repetition number from two most significant bits in a modulation and coding scheme (MCS) field of the RAR UL grant, the MCS for the PUSCH determined from least-significant bits in the MCS field, and
wherein when the PUSCH repetition Type A is scheduled by a downlink control information (DCI) format 0_1, the processing circuitry is to configure the UE to repeat the initial transmission of the PUSCH based on a PUSCH aggregation factor received via radio resource control (RRC) signalling.