Patent ID: 11894076
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A non-volatile memory device comprising:
a memory cell array including a plurality of memory cells coupled between a plurality of word lines and a plurality of bit lines;
a peripheral circuit suitable for:
performing a foggy operation including a first application operation of applying a first application voltage to a selected word line among the plurality of word lines and a first verification operation of applying a first verification voltage having a same level as or a higher level than a target threshold voltage to the selected word line, and
performing a fine operation including a second application operation of applying a second application voltage to the selected word line and a second verification operation of applying a second verification voltage having the same level as the target threshold voltage; and
a control logic circuit suitable for:
determining whether the foggy operation is completely performed according to whether a number of memory cells each having a threshold voltage higher than the first verification voltage is equal to or greater than a first predetermined number as a result of the first verification operation, and
determining whether the fine operation is completely performed according to whether a number of memory cells each having a threshold voltage lower than the second verification voltage is less than or equal to a second predetermined number as a result of the second verification operation.