Patent ID: 11908757
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. The chip package structure of claim 1, wherein:
the molding compound comprises a pair of lengthwise sidewalls laterally extending along a first horizontal direction and a pair of widthwise sidewalls laterally extending along a second horizontal direction;
the at least one cut region comprises four cut regions located outside, and in proximity to, four corners at which the pair of lengthwise sidewalls is adjoined to the pair of widthwise sidewalls;
a maximum lateral spacing among the four cut regions along the first horizontal direction is less than a length of the pair of lengthwise sidewalls along the first horizontal direction; and
a maximum lateral spacing among the four cut regions among the second horizontal direction is less than a length of the pair of widthwise sidewalls along the second horizontal direction.