Patent ID: 11935592
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A resistive memory device comprising:
a resistive memory cell connected between a first bit line and a first source line;
a reference cell including a reference resistor and connected between a second bit line and a second source line;
a write driver connected to the first bit line or the first source line, connected to the second bit line or the second source line, and configured to generate a write current for writing target data in the resistive memory cell;
a level shifter connected to a word line of the resistive memory cell and configured to receive a word line selection voltage and output a first voltage higher than a power supply voltage of the resistive memory device,
a word line driver including a first word line driver module connected to the first source line and a second word line driver module connected to the first bit line and configured to provide a second voltage higher than the first voltage to the word line of the resistive memory cell; and
a boosted capacitor having one end connected to the level shifter and the first word line driver module and another end connected to the second word line driver module,
wherein the write driver comprises a comparator configured to receive the write current, compare previous data written in the resistive memory cell with the target data by comparing a voltage of the first source line with a voltage of the second source line or compare a voltage of the first bit line with a voltage of the second bit line, and determine whether the target data is written in the resistive memory cell in accordance with a result of comparing the previous data with the target data.