Patent ID: 11957062
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 0:
1. A memory comprising:
a substrate; and
a storage area comprising a plurality of storage units disposed on the substrate, wherein each of the storage units comprises:
a transistor disposed on the substrate and comprising a drain; and
a magnetic tunnel junction (MTJ) storage element electrically coupled to the transistor, wherein the MTJ storage element comprises:
a bottom electrode electrically coupled to the drain using a conduction structure, wherein the conduction structure comprises at least two first conduction parts, and wherein each first conduction part comprises:
a first metal wire;
a second metal wire; and
a first via hole located between the first metal wire and the second metal wire, wherein the first via hole comprises a first connection passage and is directly coupled to the first metal wire and the second metal wire;

a top electrode; and
an MTJ disposed between the bottom electrode and the top electrode;

a plurality of wiring layers disposed between the transistor and the MTJ storage element, wherein the wiring layers comprise:
a first wiring layer;
a second wiring layer; and
two third wiring layers disposed between the first wiring layer and the second wiring layer; and

a dielectric layer filled between adjacent wiring layers of the wiring layers, wherein the first via hole penetrates the dielectric layer and the third wiring layers, and
wherein the first connection passage is isolated from metal wires at the third wiring layers.