Patent ID: 11909819
Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. An computer system, comprising:
processing circuitry;
forwarding hardware;
a logic block comprising:
a synchronization identifier-configuring block to configure, by a switch, a first synchronization identifier to indicate validated Internet Protocol (IP) binding information;
a first validating block to validate locally learned IP bindings of associated clients of the switch;
a BGP update message-managing block to receive a Border Gateway Protocol (BGP) update message associated with a first client, wherein the BGP update message includes a second synchronization identifier;
an extended communities path attribute-processing block to determine whether and that the switch supports processing based on the second synchronization identifier included in the BGP message;
a synchronization identifier-matching block to determine that the second synchronization identifier matches the first synchronization identifier;
a network layer reachability information-obtaining block to extract from the BGP update message reachability information, which includes media access control (MAC) and IP information associated with the first client;
a second validating block to validate, based on security policies, the MAC and IP information associated with the first client; and
a database managing block to add the validated MAC and IP information associated with the first client to a local IP binding database, thereby allowing synchronization of the validated MAC and IP information associated with the first client between the switch and other switches.