Patent ID: 11868272
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 11:
12. A device comprising:
a processor core; and
a cache coupled to the processor core that includes:
a cache controller coupled to the processor core;
a first cache storage coupled to the cache controller; and
a second cache storage coupled to the cache controller in parallel with the first cache storage;

wherein the cache controller is configured to:
receive a read operation from the processor core;
determine whether the read operation is associated with a read-miss in the first cache storage and whether the read operation is associated with a read-miss in the second cache storage in parallel;
based on the read operation being associated with a read-miss in the first cache storage, determine whether the read operation is associated with an eviction of a first set of data from the first cache storage;
based on the read operation being associated with an eviction of the first set of data, write the first set of data to the second cache storage; and
provide a second set of data as a response to the read operation.