Patent ID: 11881275
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A built-in self test (BIST) system for screening a memory array, the BIST system comprising:
a processor configured to execute instructions, including a read instruction directed to a memory cell of the memory array, wherein the memory cell has a nominal wordline voltage and the read instruction specifies a modulated wordline voltage that is different from the nominal wordline voltage;
an address/data generator configured to be controlled by the processor to generate, based on the instructions, a set of addresses and a set of test data that includes an expected value for the memory cell;
margin control circuitry configured to be controlled by the processor to provide the modulated wordline voltage to a wordline of the memory cell based on the read instruction;
a write/read control generator configured to be controlled by the processor to read the memory cell to obtain a cell value using the modulated wordline voltage; and
a comparator configured to compare the cell value to the expected value.