Patent ID: 11917811
Assignee: WINBOND ELECTRONICS CORP.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 16:
17. The method as claimed in claim 12, wherein forming the second insulating structure and forming the first connecting pad comprise:
forming a first material layer with non-uniform thickness on the bit line structure and the capacitor contact structure;
performing a first etching process to partially remove the first material layer and expose a top surface of the capacitor contact structure;
depositing a conductive material on the first material layer and the capacitor contact structure;
performing a planarization process so that a top surface of the first material layer is coplanar with a top surface of the conductive material, wherein
after the planarization process, the conductive material forms the first connecting pad, and the first connecting pad directly contacts the capacitor contact structure;
performing a second etching process to completely remove the first material layer and form an opening exposing a sidewall of the first connecting pad; and
forming the second insulating structure in the opening, wherein a material of the second insulating structure is different from a material of the first material layer.