Patent ID: 11950249
Assignee: QUALCOMM INCORPORATED
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. An apparatus comprising:
a transceiver; and
one or more processors coupled to the transceiver, wherein the one or more processors are configured, individually or in combination, to cause the apparatus to:
transmit, to a user equipment (UE), a first-stage scheduling grant;
transmit, to the UE, an additional first-stage scheduling grant, wherein the additional first-stage scheduling grant is associated with the first-stage scheduling grant;
transmit, to the UE, a second-stage scheduling grant including at least one of a start slot index (SSI) or a slot format indicator (SFI), wherein the second-stage scheduling grant corresponds to one of the first-stage scheduling grant or the additional first-stage scheduling grant; and
receive, from the UE, an uplink communication signal based on the second-stage scheduling grant and the one of the first-stage scheduling grant or the additional first-stage scheduling grant.