Patent ID: 11957013
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 2:
3. The display panel according to claim 2, wherein the driving layer comprises:
a gate insulating layer, being disposed on the channel region on a side of the silicon-based substrate;
a gate layer, being disposed on a side of the gate insulating layer away from the silicon-based substrate;
a first planarization layer, being disposed on a side of the silicon-based substrate and being configured to cover the gate insulating layer and the gate layer;
a first conductive layer, being disposed on a side of the first planarization layer away from the silicon-based substrate;
a dielectric layer, being provided on a side of the first planarization layer away from the silicon-based substrate and being configured to cover the first conductive layer;
a second conductive layer, being disposed on a side of the dielectric layer away from the silicon-based substrate; and
a second planarization layer, being disposed on a side of the dielectric layer away from the silicon-based substrate and being configured to cover the second conductive layer, and the first electrode layer being located on a side of the second planarization layer away from the silicon-based substrate.