Patent ID: 11960566
Assignee: AMAZON TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A non-transitory computer-readable medium having instructions stored therein that, when executed by the one or more processors, cause the one or more processors to perform operations comprising:
receiving, by a compiler, a padded input data element matrix that includes an input data element matrix at least partially surrounded by padding elements, wherein the input data element matrix stores input data elements;
receiving, by the compiler, a weight matrix that stores weight values to be used with the input data elements;
for each weight value from the weight values of the weight matrix:
determining, by the compiler, coordinates and dimensions for a multiplication matrix within the padded input data element matrix to be used with the weight value; and
reassigning, by the compiler, the coordinates and the dimensions for the multiplication matrix within the padded input data element matrix to exclude the padding elements; and

generating, by the compiler, compiled code to be executed by a computation engine having a systolic array having columns and rows of processing elements, the compiled code incorporating the reassigned coordinates and the reassigned dimensions;
wherein matrix multiplications using the reassigned coordinates and the reassigned dimensions are to be performed at the computation engine and based on executing the compiled code.