Patent ID: 11966348
Assignee: NVIDIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 0:
1. A method of driving a serial data bus with voltage signals corresponding to a series of data bits, the method comprising:
dividing the series of data bits into sequences of a number of bits, the number of bits based on a number of voltage levels, N, utilized in a PAM-N symbol;
encoding a first number of bits of each of the sequences onto the serial data bus as one of N discrete voltage levels (an N-level symbol), the first number of bits being the base-2 logarithm of N;
encoding a next number of bits of each of the sequences onto the data bus each as one of M discrete voltage levels (two M-level symbols), the next number of bits being log 2 [(N2)/2] and M being an integer equal to a ceiling function applied to a square root of [(N2)/2]; and
communicating the N-level symbol and the two M-level symbols on the serial data bus.