Patent ID: 11960355
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A method for controlling a memory system which includes a first memory, the method comprising:
receiving a first command from an external device and receiving a second command from the external device after receiving the first command, the first command including information of a time limit of an error correction to be executed in the memory system, the second command specifying to read data from the first memory;
selecting a mode among a first plurality of modes of error correction based on the time limit included in the received first command, the first plurality of modes of error correction being a plurality of kinds of error correction which the memory system is capable of performing;
reading the data from the first memory after receiving the second command;
performing, on the read data, an error correction corresponding to the selected mode; and
sending a response including unrecovered error to the external device based on a failure of the error correction on the read data.