Patent ID: 11928355
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. An apparatus for determining mismatch of a sense amplifier, the sense amplifier being connected to a first bit line and a second bit line, wherein the first bit line is located in a first memory cell, the second bit line is located in a second memory cell, and the apparatus for determining mismatch of the sense amplifier comprises:
one or more processors; and
a storage apparatus, configured to store one or more programs, wherein the one or more programs, when executed by the one or more processors, cause the one or more processors to execute operations of:
determining a first signal threshold on the first bit line when the first memory cell executes write and read operations;
determining a second signal threshold on the second bit line when the second memory cell executes write and read operations; and
determining, according to the first signal threshold and the second signal threshold, whether the sense amplifier is mismatched;
wherein determining the first signal threshold on the first bit line when the first memory cell executes write and read operations comprises:
writing same data into a plurality of memory cells of a memory where the first memory cell is located; and
setting data retention time as a first preset time, setting signal timing time as a second preset time, and determining the first signal threshold.