Patent ID: 11877479
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 10:
11. A display panel, comprising:
a base layer;
a first thin-film transistor comprising a silicon semiconductor pattern, a first gate electrode disposed on the silicon semiconductor pattern, and a first source electrode and a first drain electrode disposed on the silicon semiconductor pattern;
a second thin-film transistor comprising a second gate electrode, an oxide semiconductor pattern disposed on the second gate electrode and overlapping the second gate electrode, and a second source electrode and a second drain electrode disposed on the oxide semiconductor pattern;
a first inorganic layer disposed to overlap the first thin-film transistor and the second thin-film transistor in a thickness direction, and the first inorganic layer includes a first groove;
a second inorganic layer disposed between first thin-film transistor and the second thin-film transistor and the base layer, and the second inorganic layer includes a second groove;
an organic layer disposed on the first thin-film transistor and the second thin-film transistor;
a connection electrode disposed on the organic layer and connected to the first drain electrode through a contact hole; and
a metal pattern overlapping the oxide semiconductor pattern and formed by a single patterning process using a same mask with the connection electrode, wherein the connection electrode comprises a material that is different from that of the first source electrode and the first drain electrode, and
wherein the organic layer is disposed to be in contact with the portion of a top surface of the base layer at the first groove and the second groove.