Patent ID: 11908412
Assignee: HKC CORPORATION LIMITED
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A pixel driving circuit, having an operating phase comprising a sampling phase, a data writing phase, and a light-emitting phase, the pixel driving circuit comprising:
a scan line configured to provide a scanning voltage, wherein the scanning voltage is at a first level in the sampling phase and the light-emitting phase, and at a second level in the data writing phase, one of the first level and the second level is a high level, and another of the first level and the second level is a low level;
a data line configured to provide a data voltage, wherein the data voltage is at a high level in the sampling phase, and at a low level in the data writing phase and in the light-emitting phase;
a capacitor comprising a first capacitor-terminal and a second capacitor-terminal, wherein the first capacitor-terminal is electrically connected with the data line in both the sampling phase and the data writing phase;
a switch module, wherein
the switch module has one end electrically connected with the data line and another end electrically connected with the first capacitor-terminal,
the switch module is configured to be turned on in the sampling phase and the data writing phase, and turned off in the light-emitting phase, and
the switch module comprises a first switch, the first switch comprises a first control terminal, a first terminal, and a second terminal, the first terminal is electrically connected with the data line, and the second terminal is electrically connected with the first capacitor-terminal;

a driving transistor comprising a gate terminal, a source terminal, and a drain terminal, wherein the source terminal is electrically connected with the scan line, the gate terminal is electrically connected with the second capacitor-terminal, and the drain terminal is configured to be electrically connected with the gate terminal in the sampling phase and be disconnected from the gate terminal in the data writing phase; and
a first control signal line electrically connected with the first control terminal, wherein the first control signal line is configured to provide a first control voltage, the first control voltage is at a third level in the sampling phase and the data writing phase, the first control voltage is at a fourth level in the light-emitting phase, one of the third level and the fourth level is a high level, and another of the third level and the fourth level is a low level.