Patent ID: 11914716
Assignee: LATTICE SEMICONDUCTOR CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A secure programmable logic device (PLD) asset management system, comprising:
a secure PLD, wherein the secure PLD comprises a plurality of programmable logic blocks (PLBs) arranged in a PLD fabric of the secure PLD, and a configuration engine configured to program the PLD fabric according to a configuration image stored in a non-volatile memory (NVM) of the secure PLD and/or coupled through a configuration input/output (I/O) of the secure PLD to the configuration engine, wherein the secure PLD is configured to perform a computer-implemented method comprising:
receiving a secure PLD asset access request from the PLD fabric or an external system coupled to the secure PLD through the configuration I/O; and
performing a secure PLD asset update process corresponding to the secure PLD asset access request, wherein the performing the asset update process is based, at least in part, on a lock status associated with a secure PLD asset corresponding to the secure PLD asset access request.