Patent ID: 11928067
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 10:
11. A read operation method used in a semiconductor memory, wherein the semiconductor memory comprises a Data Queue (DQ) port and a memory bank, the read operation method comprising:
setting an initial state of a global bus to High;
reading read data from the memory bank;
determining whether to invert the read data according to number of bits of low data in the read data to output global bus data for transmission through the global bus and inversion flag data for transmission through an inversion flag signal line;
determining whether to invert the global bus data according to the inversion flag data to output cache data; and
performing parallel-to-serial conversion on the cache data to generate output data of the DQ port.