Patent ID: 11928465
Assignee: nan
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. The computing system of claim 10, wherein responsive to determining that the input value is outside the small value range, to calculate an evaluation of the elementary function using the reconfigurable inner stage performing the successive cumulative rotation recurrence, the successive cumulative rotation circuit is further to:
split the floating-point input value into a whole number part and a fractional number part;
convert the fractional number part into a fixed-point number;
calculate, using the successive cumulative rotation recurrences, the elementary function with respect to the fixed-point number to generate a fixed-point result;
convert the fixed-point result into a floating-point result; and
convert to a floating-point output using the floating-point result and the whole number part.