Patent ID: 11887512
Assignee: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. The display substratc according to claim 9, A display substrate, comprising:
a base substrate, comprising a pixel array region and a peripheral region,
a gate driving circuit, a plurality of power lines, a first signal line group, and a second signal line group, in the peripheral region and on at least one side of the base substrate,
wherein the gate driving circuit comprises a plurality of cascaded shift register units;
the plurality of power lines are configured to provide a plurality of power signals to the plurality of cascaded shift register units comprised in the gate driving circuit;
the first signal line group comprises at least one clock signal line, and the at least one clock signal line is configured to provide at least one clock signal to the plurality of cascaded shift register units comprised in the gate driving circuit;
the second signal line group comprises a trigger signal line, and the trigger signal line is configured to be connected to a first-stage shift register unit in the plurality of cascaded shift register units comprised in the gate driving circuit to provide a trigger signal to the first-stage shift register unit;
the gate driving circuit comprises at least one transistor, an extending direction of a channel of the at least one transistor is parallel to an extending direction of the at least one clock signal line, and the extending direction of the at least one clock signal line is a second direction;
the at least one clock signal comprises a first clock signal, the plurality of power signals comprise a first power signal, each of the plurality of cascaded shift register units comprises an input control circuit, an output circuit, and an input circuit, the input control circuit is configured to input the first power signal to the output circuit in response to the first clock signal, and the input circuit is configured to input an input signal to the output circuit in response to the first clock signal;
a control terminal of the input control circuit is configured to receive the first clock signal, the control terminal of the input control circuit comprises a main body portion, and an extending direction of the main body portion is in a straight line;
the input control circuit comprises a first transistor, and a gate electrode of the first transistor is the control terminal of the input control circuit;
the gate electrode of the first transistor comprises a first gate portion, and the first gate portion is the main body portion;
the extending direction of the main body portion is a first direction, and the first direction is perpendicular to the second direction;
the first transistor is configured as the at least one transistor, and an extending direction of a channel of the first transistor is a direction from a first electrode of the first transistor to a second electrode of the first transistor;
a distance between an orthographic projection of the first gate portion on the base substrate and an orthographic projection of the first electrode of the first transistor on the base substrate in the second direction is a first certain value, and a distance between the orthographic projection of the first gate portion on the base substrate and an orthographic projection of the second electrode of the first transistor on the base substrate in the second direction is a second certain value;
each of the plurality of cascaded shift register units further comprises a third wiring portion, and the third wiring portion extends along the first direction;
a first end of the third wiring portion is electrically connected to the first clock signal line providing the first clock signal, and a second end of the third wiring portion is electrically connected to the gate electrode of the first transistor; and
the third wiring portion is configured to transmit the first clock signal provided by the first clock signal line to the gate electrode of the first transistor.