Patent ID: 11875235
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 2:
3. The computing apparatus of claim 2, the instructions when executed by the processor, configure the apparatus to:
increase the overlap threshold responsive to a determination that the accuracy of the ML model is not less than or equal to the accuracy threshold;
determine whether additional ones of the plurality of MIDs overlap based on the increased overlap threshold;
collapse the additional overlapping ones of the plurality of MIDs into a one of the plurality of ECU labels to generate a second updated mapping between the plurality of MIDs and the plurality of ECU labels responsive to a determination that additional ones of the plurality of MIDs overlap based on the increased overlap threshold; and
train the ML model on the second updated mapping between the plurality of MIDs and the plurality of ECU labels.