Patent ID: 11941397
Assignee: AMAZON TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. A computer-implemented method comprising:
retrieving, by an execution unit of a processor, a set of machine instructions from an instruction queue of the processor; and
executing each of the machine instructions on the processor, wherein the set of machine instructions includes a fuse input instruction (FI), the fuse input instruction having a first FI input vector, a second FI input vector, and a FI select input to generate a first FI output vector and a second FI output vector,
wherein the fuse input instruction selects a portion of the first FI input vector and a portion of the second FI input vector based on the FI select input, sign extends the selected portion of the first FI input vector and the selected portion of the second FI input vector, and shuffles data elements of the sign extended portion of the first FI input vector with data elements of the sign extended portion of the second FI input vector to generate the first and second FI output vectors.