Patent ID: 11907573
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A SD Card, comprising:
a memory array;
a controller coupled to the memory array; and
a bus for transferring data between the memory array and a host device in communication with the SD Card,
wherein the controller is configured to:
determine a first duration of a host transfer between the memory array and the host device,
determine a second duration of a sector host transfer of a plurality of sector host transfers,
determine a throttle delay based on the first duration and the second duration,
perform one or more data transfer support operations based on the determined throttle delay,
determine a third duration of the one or more data transfer support operations performed during the host transfer,
determine an overhead time for the host transfer based on the first duration and the third duration,
determine an amount of time available for background operations based on the overhead time, and
perform background maintenance operations on the memory array during execution of a read command received from the host device and based on the amount of time available for background operations that is determined.