Patent ID: 11972819
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. The non-volatile storage apparatus of claim 1, further comprising:
a plurality of bit lines, the plurality of non-volatile memory cells are arranged as NAND strings to form a block having three sub-blocks, each NAND string includes memory cells in each of the three sub-blocks, the three sub-blocks include a top sub-block at a top end of the NAND strings and a bottom sub-block at a bottom end of the NAND strings as well as a middle sub-block between the top sub-block and the bottom sub-block, the bit lines are connected to the NAND strings on the first side of the selected word line and the control circuit;
a source line connected to the NAND strings on the first side of the selected word line and the control circuit.