Patent ID: 11928217
Assignee: CANON KABUSHIKI KAISHA
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An information processing apparatus comprising:
one or more processors; and
one or more memories including a first storage medium configured to hold a first boot code and a second storage medium configured to hold a second boot code that is used to restore the first boot code, the one or more memories storing instructions that, when executed by the one or more processors, cause the one or more processors to perform the functions of:
a first verification function configured to verify whether or not a first verification range setting region that specifies a verification range of the first boot code and a second verification range setting region that specifies a verification range of the second boot code have been altered;
a second verification function configured to, in a case where the first verification range setting region has not been altered, verify whether or not the first boot code has been altered;
a third verification function configured to, in a case where the first boot code has been altered and the second verification range setting region has not been altered, verify whether or not the second boot code has been altered; and
a restoration function configured to, in a case where the second boot code has not been altered, restore the first boot code using the second boot code, wherein
the first verification range setting region and the second verification range setting region are regions that are not rewritten after a start of the information processing apparatus.