Patent ID: 11922064
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 13:
14. The storage device of claim 11, wherein the second data input/output component further includes:
a third demultiplexer configured to output the training data, which is among the training data output from the plurality of third storage registers, in response to a corresponding third shift signal among third shift signals output from the plurality of third shift registers;
a fourth demultiplexer configured to output the training data, which is among the training data output from the plurality of fourth storage registers, in response to a corresponding fourth shift signal among fourth shift signals output from the plurality of fourth shift registers; and
a fifth demultiplexer configured to output the training data, which is output from the third demultiplexer, in response to the rising edge of the second data strobe signal or output the training data, which is output from the fourth demultiplexer, in response to the falling edge of the second data strobe signal.