Patent ID: 11962308
Assignee: M31 TECHNOLOGY CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 4:
5. The SAR ADC circuit of claim 4, wherein the comparator output comprises a first voltage signal and a second voltage signal; the data latch comprises:
a latching element, having a first input terminal, a second input terminal, a first output terminal and a second output terminal;
a first switch, selectively coupled between the first voltage signal and the first input terminal according to the first valid signal; and
a second switch, selectively coupled between the second voltage signal and the second input terminal according to the first valid signal;
wherein when the first valid signal is at a first logic level, each of the first switch and the second switch is turned on, and the latching element is configured to generate the data signal at the first output terminal and the second output terminal according to the first voltage signal and the second voltage signal; when the first valid signal is at a second logic level different from the first logic level, each of the first switch and the second switch is turned off, and the latching element is configured to latch respective voltage signals at the first input terminal and the second input terminal to generate the data signal at the first output terminal and the second output terminal.