Patent ID: 11870811
Assignee: VIRSEC SYSTEMS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC H

Claim 6:
7. The method of claim 1, wherein the one or more actions include at least one of:
scanning code sections of the one or more affected compute components for known malware;
at least one of statically and dynamically analyzing code sections of the one or more affected compute components for cache operations;
executing watcher processes that monitor and guard a range of shared memory accessed by the given CRUD operation;
validating the one or more affected compute components against a signature database containing file checksums for the one or more affected compute components;
validating code sections of the one or more affected compute components periodically against a cache of code sections using memory checksums;
validating the one or more affected compute components periodically against a cache of jump tables using memory checksums; and
applying one or more rule-based policies associated with the given CRUD operation.