Patent ID: 11949415
Assignee: NANJING INSTITUTE OF INTELLIGENT TECHNOLOGY
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 2:
3. The logic operation circuit for computation in memory according to claim 2, wherein the first inverter comprises a first field effect transistor and a second field effect transistor, and the second inverter comprises a third field effect transistor and a fourth field effect transistor;
the gate of the first field effect transistor and the gate of the second field effect transistor are both connected to the output terminal of the first NOR gate, the gate of the third field effect transistor and the gate of the fourth field effect transistor are both connected to the output terminal of the second NOR gate, the second electrode of the third field effect transistor and the first electrode of the fourth field effect transistor are both connected to the second output terminal, the second electrode of the first field effect transistor and the first electrode of the second field effect transistor are both connected to the first output terminal, the second electrode of the second field effect transistor and the second electrode of the fourth field effect transistor are both grounded, and the first electrode of the first field effect transistor and the first electrode of the third field effect transistor are both connected to a power supply.