Patent ID: 11893943
Assignee: CHONGQING BOE DISPLAY TECHNOLOGY CO.,LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. The gate driving circuit according to claim 11, wherein the second shift register unit comprises a fifteenth transistor to a twenty-fourth transistor, a fourth capacitor, and a fifth capacitor;
a control electrode of the fifteenth transistor is connected with a third clock signal line, a first electrode of the fifteenth transistor is connected with the second input terminal, and a second electrode of the fifteenth transistor is connected with a fourth control node; a control electrode of a sixteenth transistor is connected with the fourth control node, a first electrode of the sixteenth transistor is connected with the third clock signal line, and a second electrode of the sixteenth transistor is connected with a third control node; a control electrode of a seventeenth transistor is connected with the third clock signal line, a first electrode of the seventeenth transistor is connected with a second power line, and a second electrode of the seventeenth transistor is connected with the third control node; a control electrode of an eighteenth transistor is connected with the third control node, a first electrode of the eighteenth transistor is connected with a first power line, and a second electrode of the eighteenth transistor is connected with the fourth output terminal; a control electrode of a nineteenth transistor is connected with a second electrode of a twenty-second transistor, a first electrode of the nineteenth transistor is connected with a fourth clock signal line, and a second electrode of the nineteenth transistor is connected with the fourth output terminal; a control electrode of a twentieth transistor is connected with the third control node, a first electrode of the twentieth transistor is connected with the first power line, and a second electrode of the twentieth transistor is connected with a first electrode of a twenty-first transistor; a control electrode of the twenty-first transistor is connected with the fourth clock signal line, and a second electrode of the twenty-first transistor is connected with the fourth control node; a control electrode of the twenty-second transistor is connected with the second power line, a first electrode of the twenty-second transistor is connected with the fourth control node, and the second electrode of the twenty-second transistor is connected with the control electrode of the nineteenth transistor; a control electrode of a twenty-third transistor is connected with the fourth output terminal, a first electrode of the twenty-third transistor is connected with the second power line, and a second electrode of the twenty-third transistor is connected with the fifth output terminal; a control electrode of the twenty-fourth transistor is connected with the fourth output terminal, a first electrode of the twenty-fourth transistor is connected with the first power line, and a second electrode of the twenty-fourth transistor is connected with the fifth output terminal; a first electrode of the fourth capacitor is connected with the control electrode of the eighteenth transistor, and a second electrode of the fourth capacitor is connected with the first power line; and a first electrode of the fifth capacitor is connected with the control electrode of the nineteenth transistor, and a second electrode of the fifth capacitor is connected with the fourth output terminal.