Patent ID: 11907753
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A device comprising:
a first cache memory configured to store a set of entries;
a cache controller coupled to the first cache memory;
a second cache memory coupled to the cache controller, wherein:
the second cache memory has a set of address regions that includes a first address region that is associated with the set of entries; and
the second cache memory is configured to store a set of data in the first address region; and

a configuration register coupled to the cache controller and configured to store a set of configuration values that includes a respective configuration value for each address region of the set of address regions, wherein a first configuration value of the set of configuration values is associated with the first address region;
wherein the cache controller is configured to:
receive a read request associated with the set of data;
retrieve the set of data from the second cache memory;
provide the set of data;
determine whether to store the set of data in the first cache memory based on the first configuration value;
determine a change in the first configuration value such that the first configuration value indicates not to store entries associated with the first address region in the first cache memory; and
based on the change, evict the set of entries from the first cache memory.