Patent ID: 11928364
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory system, comprising:
a non-volatile memory; and
a memory controller configured to:
queue write commands received from a host; and
when first and second write commands are queued,

wherein the first write command is an instruction to write first write data associated with a first stream and the second write command is an instruction to write second write data associated with a second stream, repeatedly perform a sequence of a first operation of acquiring a predetermined amount of the first write data from the host and then transmitting the predetermined amount of the first write data to the non-volatile memory, and a second operation of acquiring the predetermined amount of the second write data from the host and then transmitting the predetermined amount of the second write data to the non-volatile memory,
wherein the second operation in the sequence is started after completion of the first operation in the sequence.