Patent ID: 11860781
Assignee: AMAZON TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. An integrated circuit (IC) device, comprising:
a requesting agent configured to issue memory write transactions;
a write-back (WB) cache memory coupled to the requesting agent via an interconnect fabric; and
a write cleaner circuit coupled to the interconnect fabric, the write cleaner circuit configured to:
determine that a memory write transaction from the requesting agent to access a memory location triggers a clean request; and
generate the clean request to the WB cache memory based on the memory write transaction,

wherein the WB cache memory is configured to, in response to receiving the clean request:
request a system memory to update the memory location, and
update a status of a cache line corresponding to the memory location from dirty to clean.