Patent ID: 11960987
Assignee: GUOBIAO ZHANG
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 2:
3. The 3-D processor according to claim 2, wherein:
a first number of the back-end-of-line (BEOL) layers of said first die is larger than a second number of the BEOL layers of said second die; or,
a third number of the address-line layers of said first die is at least twice as much as a fourth number of the interconnect layers of said second die; or,
a fifth number of the memory cells on each memory string in said first die is at least twice as much as a sixth number of the interconnect layers of said second die; or,
a seventh number of the interconnect layers in the substrate circuit of said first die is smaller than an eighth number of the interconnect layers of said second die; or,
the interconnect material used in said second die has a lower resistivity than the interconnect material used the substrate circuit of said first die.