Patent ID: 11934688
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. An apparatus, comprising:
one or more memory devices; and
a controller for the one or more memory devices, the controller configured to cause the apparatus to:
read data from a set of memory cells within the one or more memory devices using a plurality of read thresholds, each memory cell of the set of memory cells configured to store two or more bits;
increment each counter of a plurality of counters based at least in part on reading the data using the plurality of read thresholds, wherein each counter indicates a respective quantity of bits of the data corresponding to a first logic value;
adjust one or more read thresholds of the plurality of read thresholds based at least in part on the plurality of counters; and
read the data from the set of memory cells after adjusting the one or more read thresholds of the plurality of read thresholds.