Patent ID: 11962313
Assignee: ATI TECHNOLOGIES ULC
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An oscillator circuit comprising:
a first delay line having a signal input, a supply input for receiving a first voltage, and an output that transmits a first delayed signal at a first delay proportional to the first voltage;
a second delay line having a signal input, a supply input for receiving a second voltage, and an output that transmits a second delayed signal at a second delay proportional to the second voltage;
an edge detector having two inputs connected to the respective outputs of the first and second delay lines and generating an output clock based on a relationship between the first delayed signal and the second delayed signal, the output clock applied to the signal inputs of the first and second delay lines, the output clock exhibiting a voltage dependent frequency performance curve having a slope dependent at least on the second delay and a delay characteristic of the edge detector; and
wherein at least one of the first delay line, the second delay line, and the edge detector are operable to adjust the slope by altering the delay characteristic of the edge detector relative to at least one of the first and second delays and compensate for a change in frequency of the oscillator circuit due to the slope adjustment.