Patent ID: 11942422
Assignee: nan
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 1:
2. The method of claim 1, wherein forming a horizontally alternating sequence of dielectric spacer structures and dielectric liner structures within horizontal boundaries of the trench comprises:
forming a first dielectric spacer structure within the trench;
forming a first dielectric liner structure within the trench and horizontally inward of the first dielectric spacer structure, the first dielectric liner structure physically contacting at least one of the insulative structures of the preliminary stack structure;
forming a second dielectric spacer structure within the trench and horizontally inward of the first dielectric liner structure; and
forming a second dielectric liner structure within the trench and horizontally inward of the second dielectric spacer structure, the second dielectric liner structure physically contacting at least one other of the insulative structures at a relatively lower vertical position within the preliminary stack structure than the at least one of the insulative structures.