Patent ID: 11923413
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 5:
6. A semiconductor structure, comprising:
a substrate;
nanostructures formed over the substrate;
inner spacers sandwiched between the nanostructures;
a gate structure surrounding the nanostructures;
a source/drain structure attached to the nanostructures, wherein the inner spacers laterally sandwiched between the source/drain structure and the gate structure; and
a contact vertically extending into the source/drain structure such that a portion of the source/drain structure is laterally sandwiched by the contact and the inner spacer,
wherein a bottom surface of the contact is lower than a top surface of a top most one of the nanostructures.