Patent ID: 11947471
Assignee: RAMBUS INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A method of operating a memory module, comprising:
in response to a first verify operation performed by a first memory device determining a first attempted write failed in a manner that causes loss of data, storing, in a first internal write retry buffer of the first memory device, a first entry;
in response to a second verify operation performed by a second memory device determining a second attempted write failed in a manner that causes loss of data, storing, in a second internal write retry buffer of the second memory device, a second entry;
in response to a command from a memory controller, retrying, by the first memory device, the first attempted write using the first entry;
in response to the command from the memory controller, retrying, by the second memory device, the second attempted write using the second entry; and
outputting, by the first memory device, a first indicator that indicates whether the first internal write retry buffer meets a threshold criteria associated with an amount of unused entries in the first internal write retry buffer.