Patent ID: 11888495
Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. An analog-to-digital conversion system comprising:
a analog demultiplexer circuit, comprising:
a clock distribution circuit configured to output first clock signals and second clock signals complementary thereto;
a first track-and-hold circuit configured to hold analog input signals in synchronization with the first clock signals; and
a second track-and-hold circuit configured to hold the analog input signals in synchronization with the second clock signals;

a first analog-to-digital converter configured to convert a first analog output signal output from the first track-and-hold circuit of the analog demultiplexer circuit into a first digital signal;
a second analog-to-digital converter configured to convert a second analog output signal output from the second track-and-hold circuit of the analog demultiplexer circuit into a second digital signal;
a first addition circuit configured to add a first output signal of the first analog-to-digital converter and a second output signal of the second analog-to-digital converter;
a subtraction circuit configured to subtract the second output signal of the second analog-to-digital converter from the first output signal of the first analog-to-digital converter;
a folding processor configured to execute a folding processing of a third output signal of the subtraction circuit with a frequency of ½ of the first clock signals as a boundary; and
a second addition circuit configured to add a fourth output signal of the first addition circuit and a sixth output signal of the folding processor.