Patent ID: 11935875
Assignee: INFINEON TECHNOLOGIES AG
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A power semiconductor module arrangement comprising:
a power electronics substrate comprising a dielectric layer, and a first metallization layer disposed on an upper surface of the dielectric layer, the first metallization layer being structured to comprise a first DC voltage pad, a second DC voltage pad, a first load pad, and a second load pad;
wherein the first DC voltage pad comprises a central section, a first outer span, and a second outer span, the first and second outer spans each extending from opposite ends of the central section towards a first edge side of the power electronics substrate,
wherein the second DC voltage pad and the first load pad are arranged between the first and second outer spans in a first direction,
wherein the second DC voltage pad and the first load pad are arranged between the central section and a first edge side of the power electronics substrate in a second direction that is perpendicular to the first direction,
wherein the second load pad is arranged between the first DC voltage pad and a second edge side of the power electronics substrate in the second direction, the second edge side being opposite from the first side,
wherein the first and second outer spans of the first DC voltage pad are symmetric relative to an axis of symmetry that extends in the in the second direction, and
wherein a geometry of the second load pad is asymmetric relative to the axis of symmetry.