Patent ID: 11869877
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. The bonded assembly of claim 13, wherein:
the memory die comprises a three-dimensional memory array that includes an alternating stack of insulating layers and electrically conductive layers, memory openings vertically extending through the alternating stack, memory opening fill structures located in the memory openings and comprising a respective vertical stack of memory elements and a respective vertical semiconductor channel; and
the logic die comprises a control circuit configured control operation of the three-dimensional memory array, the control circuit comprising word line drivers that apply word line control voltages to the electrically conductive layers and bit line drivers that apply bit line control voltages to bit lines which are electrically connected to end portions of a respective subset of the vertical semiconductor channels.