Patent ID: 11901228
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A method comprising:
forming a first conductive feature in a first dielectric layer, a top surface of the first conductive feature being above a top surface of the first dielectric layer, forming the first conductive feature comprising:
forming a conductive material in the first dielectric layer; and
forming a capping layer over the conductive material;

depositing a blocking layer along the top surface of the first conductive feature, a molecule of the blocking layer comprising a hydrophilic head group and a hydrophobic tail group;
depositing a low-k dielectric layer along the top surface of the first dielectric layer, a top surface of the low-k dielectric layer being above the top surface of the first conductive feature;
depositing a high-k dielectric layer over the low-k dielectric layer;
removing the blocking layer;
forming a second dielectric layer over the high-k dielectric layer;
etching an opening in the second dielectric layer to expose the first conductive feature; and
forming a second conductive feature in the opening.