Patent ID: 11941294
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A method of operating a memory controller including a command queue in which commands to be performed by a memory device are stored, the method comprising:
sequentially providing the commands stored in the command queue to the memory device;
determining a delay amount of time for output of a suspend command that instructs suspension of an operation depending on a number of read commands stored in the command queue when a read request is input thereto from a host while the memory device is performing the operation in response to each of the provided commands;
providing, after the delay amount of time has elapsed, the memory device with the suspend command; and
providing, after the suspend command has been provided to the memory device, the memory device with the read commands stored in the command queue,
wherein a length of the delay amount of time depends on the number of read commands.