Patent ID: 11889686
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 0:
1. A method for fabricating semiconductor device, comprising:
characterizing an etch process that is used to etch channel holes and dummy channel holes in a stack of alternating sacrificial gate layers and insulating layers upon a substrate of a semiconductor device, the channel holes being in a core region and the dummy channel holes being in a staircase region, the stack of alternating sacrificial gate layers and insulating layers extending from the core region into in the staircase region of a stair-step form; and
determining a first shape for defining the dummy channel holes in a layout based on the characterization of the etch process, the first shape being different from a second shape for defining the channel holes;
wherein the determining the first shape includes:
determining a capsule shape and a bone shape for the dummy channel holes that are different from a circle shape of the channel holes,
determining a capsule shape and an arc shape for the dummy channel holes that are different from a circle shape of the channel holes,
determining a bone shape for the dummy channel holes that is different from a circle shape of the channel holes,
determining an arc shape for the dummy channel holes that is different from a circle shape of the channel holes,
or
determining a rectangle shape for the dummy channel holes that is different from a circle shape of the channel holes, wherein three of the dummy channel holes are arranged around a contact structure on three sides of a hexagonal pattern with regard to the contact structure, the three sides separated from one another.