Patent ID: 11923360
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method for forming a semiconductor device, comprising:
forming a pair of semiconductor fins extending upwardly from a substrate to have a trench therebetween;
forming a dummy fin structure in the trench between the pair of semiconductor fins;
depositing a metal oxide layer over the dummy fin structure in the trench at a first temperature lower than a first crystallization temperature of the metal oxide layer;
depositing a silicon-containing metal oxide layer over the metal oxide layer in the trench at a second temperature lower than the first crystallization temperature of the metal oxide layer;
performing a planarization process on the metal oxide layer and the silicon-containing metal oxide layer to expose the pair of semiconductor fins;
annealing the metal oxide layer at a third temperature higher than the first crystallization temperature of the metal oxide layer and lower than a second crystallization temperature of the silicon-containing metal oxide layer;
forming a gate structure extending across the pair of semiconductor fins; and
forming a plurality of source/drain structures above the pair of semiconductor fins and on either side of the gate structure.