Patent ID: 11869789
Assignee: TOKYO ELECTRON LIMITED
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 16:
17. A substrate processing method used in a substrate processing apparatus that includes:
a carrier block on which a carrier configured to store a substrate is placed;
a first processing block including a first lower processing block and a first upper processing block and configured to deliver the substrate to and from the carrier block, the first lower processing block and the first upper processing block being stacked one above another, wherein the first processing block includes a plurality of layers, which are stacked one above another, and a first main transfer mechanism shared by each of the plurality of layers of the first processing block to transfer the substrate, and wherein each of the plurality of layers of the first processing block is provided with a processing module configured to process the substrate;
a second processing block including a second lower processing block and a second upper processing block, which are adjacent, in a left-right direction, to the first lower processing block and the first upper processing block, respectively, and are stacked one above another, wherein the second processing block includes a plurality of layers, which are stacked one above another, and a second main transfer mechanism, which is different from the first main transfer mechanism, shared by each of the plurality of layers of the second processing block to transfer the substrate; and
a relay block including a lifting and transferring mechanism configured to deliver the substrate between the second lower processing block and the second upper processing block, wherein the relay block is located adjacent to the second processing block at a side opposite to a side at which the first processing block is located adjacent to the second processing block in the left-right direction,
the method comprising:
transferring the substrate by each of the first main transfer mechanism and the second main transfer mechanism such that one of an upper processing block configured with the first upper processing block and the second upper processing block and a lower processing block configured with the first lower processing block and the second lower processing block forms an outward path through which the substrate is transferred from the carrier block to the relay block and the other one of the upper processing block and the lower processing block forms a return path through which the substrate is transferred from the relay block to the carrier block;
transferring the substrate such that the outward path or the return path is formed by a first shuttle, which is different from the first main transfer mechanism and the second main transfer mechanism, provided in the first processing block in a bypass transfer path forming block which is one of the upper processing block and the lower processing block together with the second main transfer mechanism;
transferring the substrate such that the outward path or the return path is formed by a second shuttle, which is different from the first main transfer mechanism device, the second main transfer mechanism, and the first shuttle, provided in the second processing block in the bypass transfer path forming block together with the first main transfer mechanism;
transferring, with respect to the bypass transfer path forming block, the substrate to a downstream-side block by the second main transfer mechanism of the second processing block and first shuttle; and
transferring, with respect to the bypass transfer path forming block, the substrate to a downstream-side block by the first main transfer mechanism of the first processing block and the second shuttle,
wherein the bypass transfer path forming block includes a plurality of layers, which are stacked one above another, and each of the plurality of layers of the bypass transfer path forming block is provided with a processing module configured to process the substrate.