Patent ID: 11956963
Assignee: SK HYNIX INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A method of driving a 3-dimensional NAND flash memory device comprising a semiconductor channel layer vertically extending over a substrate; an information storage film vertically extending along a sidewall of the semiconductor channel layer; control gates surrounding at least a portion of the semiconductor channel layer with the information storage film that is disposed between the control gates and the semiconductor channel layer; and an interlayer insulating film separating the control gates from each other in a vertical direction perpendicular to a top surface of the substrate, the method comprising:
forming a fixed charge region in a portion of the information storage film under the control gates and in a portion of the information storage film between the control gates by forming a first electric field between the control gates and the semiconductor channel layer; and
eliminating the fixed charge region formed in the portion of the information storage film under the control gates by forming a second electric field having a polarity opposite to that of the first electric field and having a strength smaller than that of the first electric field between the control gates and the semiconductor channel layer,
wherein the 3-dimensional NAND flash memory device further comprises a work function control layer disposed between the interlayer insulating film and each of the control gates in the vertical direction, the work function control layer having a work function that is smaller than that of the control gates, the work function control layer being disposed on sidewalls of the control gates, and
wherein the work function control layer is disposed to contact each of top and bottom surfaces of each of the control gates.