Patent ID: 11956431
Assignee: BEIJING BYTEDANCE NETWORK TECHNOLOGY CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. The video processing apparatus of claim 16, the instructions, when executed by a processor, further causes the processor to:
determine a context coding mode used for the bitstream based on a position of a neighboring block with respect to a largest coding unit (LCU) row of the video block
wherein the neighboring block is considered unavailable due to being in a different LCU row, and wherein the context coding mode uses a single context for coding a syntax element; or the neighboring block is considered unavailable due to being in a different LCU row, and wherein the context coding mode uses bypass coding for coding a syntax element, and
wherein the syntax element is one of: alf_ctb_flag, qt_split_cu_flag, mtt_split_cu_flag, mtt_split_cu_flag, cu_skip_flag, amvr_mode, merge_subblock_flag, merge_triangle_flag, inter_affine_flag, cu_skip_flag, pred_mode_flag, pcm_flag, intra_luma_ref_idx, intra_luma_mpm_flag, intra_luma_mpm_idx, intra_luma_mpm_remainder, intra_chroma_pred_mode, merge flag, inter_pred_idc, inter_affine_flag, cu_affine_type_flag, ref_idx_l0, mvp_l0_flag, ref_idx_l1_mvp_l1_flag, amvr_flag, amvr_4pel_flag, gbi_idx, cu_cbf, mmvd_flag, or mmvd_merge_flag.