Patent ID: 11942040
Assignee: SHARP KABUSHIKI KAISHA
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. The display device according to claim 1, wherein
the scanning lines of the plurality of types include a write control line, a first initialization control line, and a second initialization control line,
the plurality of scanning drive circuits include a write control circuit, a first initialization control circuit, and a second initialization control circuit,
the display unit includes a plurality of pixel circuits, each connected to the write control line, the first initialization control line, and the second initialization control line,
each of the pixel circuits includes:
a display element provided between a first power supply line and a second power supply line and having a first terminal on a side of the first power supply line and a second terminal on a side of the second power supply line, and configured to be driven by current, the first power supply line being configured to supply a high-level power supply voltage and the second power supply line being configured to supply a low-level power supply voltage;
a drive transistor having a control terminal, a first conductive terminal, and a second conductive terminal, and provided in series with the display element;
a capacitor having one terminal connected to the control terminal of the drive transistor, and another terminal connected to the first power supply line;
a write control transistor having a control terminal connected to the write control line; a first conductive terminal connected to a data signal line configured to supply a data signal; and a second conductive terminal connected to the first conductive terminal of the drive transistor;
a threshold voltage compensation transistor having a control terminal connected to the write control line; a first conductive terminal connected to the second conductive terminal of the drive transistor; and a second conductive terminal connected to the control terminal of the drive transistor;
a first initialization transistor having a control terminal connected to the first initialization control line; a first conductive terminal connected to the control terminal of the drive transistor; and a second conductive terminal connected to an initialization power supply line configured to supply an initialization voltage; and
a second initialization transistor having a control terminal connected to the second initialization control line; a first conductive terminal connected to the first terminal of the display element; and a second conductive terminal connected to the initialization power supply line,

the write control line disposed in the high-load region is driven by the write control circuit,
the first initialization control line disposed in the high-load region is driven by the first initialization control circuit,
the second initialization control line disposed in the high-load region is driven by the second initialization control circuit, and
the write control line disposed in the low-load region, the first initialization control line disposed in the low-load region, and the second initialization control line disposed in the low-load region are driven by any one of the write control circuit, the first initialization control circuit, and the second initialization control circuit.