Patent ID: 11948654
Assignee: META PLATFORMS TECHNOLOGIES, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A method repairing memory on an SoC having a plurality of subsystems, the method comprising:
in response to a first activation event, signaling, by an always-on subsystem of the plurality of subsystems, a first subsystem of the plurality of subsystems to initiate repair operations on a first memory;
in response to a second activation event occurring after the first event, signaling, by the always-on subsystem, a second subsystem of the plurality of subsystems to initiate repair operations on a second memory; and
at least one of:
in response to activation of the first subsystem, retrieving, by a System Test and Repair (STAR) memory system (SMS) server of the always-on subsystem, a repair signature for the first memory and transmitting, by the SMS server, the repair signature to an SMS sub-server of the first subsystem, wherein the SMS sub-server initiates repair operations for the first memory; or
in response to detection that power is to be removed from the first subsystem, maintaining power to a retention flop after power has been removed from the first subsystem, wherein a bit to which the retention flop corresponds is unpowered after power is removed from the first subsystem.