Patent ID: 11973127
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A semiconductor structure, comprising:
a fin structure protruding from a substrate;
an isolation structure formed around the fin structure;
a gate structure formed across the fin structure and extending over the isolation structure;
a source/drain structure formed over the fin structure, wherein the source/drain structure has a slope sidewall;
a first spacer layer formed over and in contact with the slope sidewall of the source/drain structure;
a second spacer layer formed over the first spacer layer and laterally spaced apart from the source/drain structure;
a contact formed over the source/drain structure, wherein an edge portion of the contact is thicker than a middle portion of the contact; and
an Arsenic-doped region sandwiched between the fin structure and a bottommost portion of the source/drain structure.