Patent ID: 11892508
Assignee: REALTEK SEMICONDUCTOR CORPORATION
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 13:
14. A joint test action group (JTAG) transmission system comprising:
a slave unit comprising:
a test access port (TAP) circuit comprising a data input terminal, a clock terminal, a mode selection terminal, and a test data register set
a memory; and
a memory interface controller coupled to the test access port circuit and the memory, and configured to store data transmitted from the test access port circuit to the memory; and

a host unit coupled to the data input terminal, the clock terminal, and the mode selection terminal, and configured to transmit a download instruction set to the test access port circuit to have the test access port circuit select the test data register set, and have the test access port circuit enter a data shift status to receive a data package through the test data register set;
wherein:
the data package comprises an address, at least one piece of write data, and a checking code; and
during a process of receiving the data package, the test access port circuit remains in the data shift status to continuously receive the address and the at least one piece of write data in the data package.