Patent ID: 11909384
Assignee: GAN SYSTEMS INC.
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A power semiconductor switching device comprising:
a high-side switch and a low-side switch connected in series in a half-bridge configuration, between a high voltage DC bus and a low voltage DC bus, the high side switch being connected to the low side switch at a switching node, wherein:
the high-side switch is a normally-off switch wherein a first normally-on GaN transistor switch (Q1) is connected in series with a normally-off Si MOSFET switch (M1), the source of Q1 being connected to the drain of M1; and
the low side switch is a normally-on switch, comprising a second normally-on GaN transistor switch (Q2);
and
a half-bridge driver circuit comprising:
a high-side driver for directly driving a gate of Q1;
a low-side driver for directly driving a gate of Q2;
wherein the high-side driver and the low-side driver are driven by PWM input signals INH and INL respectively; and

a control circuit for driving M1, wherein the control circuit comprises a gate driver for providing an enable (control) signal for directly driving the gate of M1 in response to a gate input signal PGOOD,
the control circuit having a voltage sense input Vsen from a voltage sense terminal connected to a node between the source of Q1 and the drain of M1,
circuitry for receiving an undervoltage lock-out (UVLO) signal, and determining a power status and operational mode for M1,
circuitry for comparing the voltage sense input Vsen to a reference overcurrent protection (OCP) limit voltage VOCP_limit, wherein said enable signal provides that
M1 is OFF during start-up until UVLO is off;
M1 is ON for normal operation;
M1 is turned-off during a fault condition if UVLO is turned-on;
and
if OCP is triggered, M1 is ON and Q1 and Q2 are turned-off.