Patent ID: 11942460
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. A semiconductor device comprising:
a package substrate having a front side;
a first semiconductor die on a central portion of the front side of the package substrate and having a first longitudinal footprint and an upper surface at a first height above the front side of the package substrate;
a stack of second semiconductor dies on top of the first semiconductor die, wherein the stack of second semiconductor dies has a second longitudinal footprint larger than the first longitudinal footprint of the first semiconductor die; and
a plurality of capacitors on the front side of the package substrate and at least partially underneath the stack of second semiconductor dies, wherein:
each capacitor in the plurality of capacitors has a first surface contacting the front side of the package substrate and a second surface opposite the first surface of the capacitor, wherein the second surface is at a second height equal to the first height such that the second surface contacts a lower surface of the stack of second semiconductor dies to at least partially support the stack of second semiconductor dies, and
each capacitor in the plurality of capacitors is at least partially encased in an encapsulant material, the encapsulant material having a top surface at a third height above the front side of the package substrate equal to the first height, wherein the top surface of the encapsulant material is in contact with a bottom second die of the stack of second semiconductor dies.