Patent ID: 11960127
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 7:
8. A semiconductor package, comprising:
an interconnection structure;
a semiconductor die connected to one side of the interconnection structure;
a device layer disposed at an opposite side of the interconnection structure with respect to the semiconductor die, the device layer comprising:
a base layer;
an optical device;
a mode coupler located at an edge of the semiconductor package, wherein the mode coupler is configured to receive light of at least one wavelength; and
a waveguide configured to transmit the light from the mode coupler to the optical device,

an insulator layer, disposed at an opposite side of the device layer with respect to the interconnection structure;
a buffer layer, disposed on the insulator layer;
bonding vias extending through the base layer of the device layer and the interconnection structure along a first direction;
connective terminals, disposed on the buffer layer, wherein the bonding vias electrically connect the semiconductor die to the connective terminals, the bonding vias are spaced apart from the insulator layer by the connective terminals, and ends of the bonding vias are in contact with the connective terminals; and
an etch stop layer disposed between the insulator layer and the base layer of the device layer, wherein a top surface of the etch stop layer is in contact with the insulator layer and the connective terminal.