Patent ID: 11955095
Assignee: LAPIS TECHNOLOGY CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. The output circuit according to claim 1,
wherein the fourth voltage control circuit includes
a second load element comprising a first NMOS transistor and a second NMOS transistor and connected between the source or the drain of the first NMOS transistor switch and the back gate of the first NMOS transistor switch,
a second current source that sets a value of a current that flows through the second load element, and
a second back gate control switch that applies the reference power supply voltage to the back gate of the first NMOS transistor switch when the second back gate control switch is turned on and stops application of the reference power supply voltage to the back gate of the first NMOS transistor switch when the second back gate control switch is turned off,
wherein, when the first NMOS transistor switch is controlled such that the first NMOS transistor switch is brought into an on state, the second load element receives the voltage of the source or the drain of the first NMOS transistor switch as the third voltage, outputs a voltage obtained by shifting the level of the third voltage by a voltage difference based on the value of the current that flows through the second load element as the fourth voltage, and supplies the fourth voltage to the back gate of the first NMOS transistor switch, and
wherein, when the first NMOS transistor switch is controlled such that the first NMOS transistor switch is brought into an off state, the second back gate control switch is turned on, and the reference power supply voltage is supplied to the back gate of the first NMOS transistor switch.