Patent ID: 11880684
Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. The system according to claim 8, wherein the memory comprises a vector data memory, an instruction memory, and a scalar data memory; and the register comprises a vector register and a scalar register; the loading the data from the memory to a corresponding register on the basis of the instruction comprises: determining a number of single vector operations on the basis of environmental parameters; loading the number of the single vector operations of the vector data to the vector register according to a vector loading instruction in the instruction;
the processor is further configured to perform the following steps when executing the computer-readable instruction: determining, by the convolution control unit, the environmental parameters on the basis of a register configuration instruction in the instruction, wherein the environmental parameters comprise a vector effective bit width, a number of vector registers in each group, a register bit width, and a number of vectors that need to be operated currently; and
the step of determining the number of the single vector operations on the basis of the environmental parameters comprises: determining a maximum number of vectors that are allowed to be operated according to the register bit width, the vector effective bit width, and the number of the vector registers in each group, and determining a smaller value of the maximum number of the vectors that are allowed to be operated and the number of the vectors that need to be operated currently as a number of the single vector operations.