Patent ID: 11967972
Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method of operating an analog-to-digital converter (ADC) circuit to generate a digital output signal, the method comprising:
receiving an analog input signal at a summing node of a sigma-delta (SD) ADC circuit, wherein the SD ADC circuit includes an integrator circuit having an amplifier circuit and a chop switch coupled to an input of the amplifier circuit;
receiving, using the integrator circuit, an output of the summing node;
generating a variable frequency chop signal and operating the chop switch at the variable frequency chop signal;
receiving, via sample rate converter circuit, a first digital output signal of the SD ADC circuit at a first sample rate and generating a second digital output signal at a second sample rate; and
processing and decimating, via a digital filter circuit including a decimator, the second digital output signal and generating a filtered digital output signal.