Patent ID: 11914887
Assignee: MACRONIX INTERNATIONAL CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. The data accessing method according to claim 15, wherein M=4, N=5, P=5, and the data accessing method further comprises:
setting a reading voltage to be between Vt(1,1,0,1) and Vt(0,1,0,1) to perform the one-time reading operation related to the corresponding first bit of each of the multi-level cells;
setting reading voltages to be between Vt(1,1,0,0) and Vt(1,0,0,0), between Vt(1,0,0,1) and Vt(1,1,0,1), between Vt(0,1,0,1) and Vt(0,0,0,1), and between Vt(0,0,1,1) and Vt(0,1,1,1) respectively to perform the M reading operations related to the corresponding second bit of each of the multi-level cells;
setting reading voltages to be between Vt(1,1,1,0) and Vt(1,1,0,0), between Vt(1,0,0,0) and Vt(1,0,1,0), between Vt(1,0,1,1) and Vt(1,0,0,1), between Vt(0,0,0,0) and Vt (0,0,1,0), and between Vt(0,1,1,0) and Vt(0,1,0,0) respectively to perform the N reading operations related to the corresponding third bit of each of the multi-level cells; and
setting reading voltages to be between Vt(1,1,1,1) and Vt(1,1,1,0), between Vt(1,0,1,0) and Vt(1,0,1,1), between Vt(0,0,0,1) and Vt(0,0,0,0), between Vt(0,0,1,0) and Vt (0,0,1,1) and between Vt(0,1,1,1) and Vt(0,1,1,0) respectively to perform the P reading operations related to the corresponding fourth bit of each of the multi-level cells.