Patent ID: 11925035
Assignee: WINBOND ELECTRONICS CORP.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC H

Claim 0:
1. A system architecture for hybrid random access memory in a system-on-chip, comprising:
a computing unit;
a hybrid register coupled to said computing unit;
multiple magnetoresistive random access memory (MRAM) blocks, wherein each of said MRAM blocks comprises multiple MRAM cells coupled to a MRAM controller, and said MRAM controller is coupled to said hybrid register; and
multiple resistive random-access memory (ReRAM) blocks, wherein each of said ReRAM blocks comprises multiple ReRAM cells coupled to a ReRAM controller, and said ReRAM controller is coupled to said hybrid register;
wherein said ReRAM cells and said MRAM cells are on the same semiconductor substrate.