Patent ID: 11862611
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A semiconductor die assembly, comprising:
a support substrate;
a base semiconductor die on the support substrate;
two or more semiconductor dies stacked on the base semiconductor die;
a molded wall having parallel vertical surfaces on opposing sides of the stack of two or more semiconductor dies which at least partially define a cavity spaced apart from the stacked two or more semiconductor dies, wherein (1) the stacked two or more semiconductor dies is received in the cavity and spaced apart from the molded material and (2) the molded material extends upward from the support substrate;
a thermal transfer lid having a first portion over and directly attached to a top portion of the molded material and a second portion extending from the first portion, wherein
the second portion of the thermal transfer lid is attached to the base semiconductor die and the thermal transfer lid at least partially defines an upper boundary for the cavity,
the second portion of the thermal transfer lid is attached to a peripheral region of the first die located on the bottom of the stack, and
the peripheral region extends beyond the stack of two or more semiconductor dies in the stack.