Patent ID: 11948829
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A static random access memory (SRAM) cell, comprising:
a substrate comprising a first-type well region and a second-type well region interfaced with the first-type well region at an interface, a doping polarity of the first-type well region being different from a doping polarity of the second-type well region;
a first fin and a second fin disposed over the first-type well region;
a third fin and a fourth fin disposed over the second-type well region, wherein the second fin is disposed between the first fin and the third fin;
a first gate structure intersecting both the first fin and the second fin;
a second gate structure intersecting both the third fin and the fourth fin, the second gate structure being spaced apart from the first gate structure;
a fin isolation feature extending from the first fin to the third fin, wherein the fin isolation feature comprises a first sidewall surface and a second sidewall surface opposite the first sidewall surface, wherein, in a top view, the second fin is in direct contact with the fin isolation feature; and
a well isolation feature below the fin isolation feature, extending into the substrate, and spanning over the interface, wherein the well isolation feature comprises a third sidewall surface and a fourth sidewall surface opposite the third sidewall surface, and a distance between the first sidewall surface and the third sidewall surface is different than a distance between the second sidewall surface and the fourth sidewall surface.