Patent ID: 11923251
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  C | IPC C  H

Claim 10:
11. An integrated circuit device comprising:
a first semiconductor fin and a second semiconductor fin;
a first Fin Field-Effect Transistor (FinFET) comprising:
a first gate stack on the first semiconductor fin;
an inhibitor film overlapping the first gate stack, wherein the inhibitor film comprises fluorocarbon;
a gate spacer contacting the first gate stack;
a first source/drain region on a side of the first gate stack, wherein the first source/drain region comprises:
a second sidewall contacting the gate spacer; and
a third sidewall opposing to the second sidewall;

a dielectric region contacting the third sidewall of the first source/drain region; and
a second FinFET comprising a second gate stack on the second semiconductor fin, wherein the second FinFET comprises a second source/drain region, wherein the first source/drain region and the second source/drain region are in contact with opposite sidewalls of the dielectric region.