Patent ID: 11929325
Assignee: QUALCOMM INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. The semiconductor device of claim 6, wherein the routing layer is a first routing layer, wherein the semiconductor device further comprises a second routing layer adjacent to the first routing layer, the second routing layer comprising a third track set comprising a plurality of third tracks, a width of at least one third track being a third width, wherein the plurality of first tracks and the plurality of second tracks of the first routing layer are oriented in a first direction, wherein the plurality of third tracks of the second routing layer are oriented in a second direction different from the first direction, wherein the semiconductor device further comprises: one or more first-third vias electrically coupling one or more first tracks with one or more third tracks at one or more first-third intersections, or one or more second-third vias electrically coupling one or more second tracks with one or more third tracks at one or more second-third intersections, or both, and wherein a cross-sectional area of at least one first-third via is proportional to an area defined by the first and third widths and a cross-sectional area of at least one second-third via is proportional to an area defined by the second and third widths.