Patent ID: 11924319
Assignee: NEC PLATFORMS, LTD.
Field: Telecommunications (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 7:
8. A time synchronization system comprising:
a time master device and a time slave device, wherein
the time slave device comprises:
a frequency synchronizer generating frequency control information synchronized with a frequency of a synchronous Ethernet (registered trademark) signal received from a time master device;
a time synchronizer generating time control information synchronized with a time based on a time packet received from the time master device; and
a time synchronization signal generator generating a time synchronization signal based on the generated frequency control information and the generated time control information,

the frequency synchronizer includes a frequency synchronizing PLL (Phase Locked Loop) including a first digital controlled oscillator outputting the frequency control information,
the time synchronizer includes a time synchronizing PLL including a second digital controlled oscillator outputting the time control information,
the first digital controlled oscillator and the second digital controlled oscillator perform numerical calculation processing to generate the frequency control information that is numerical information and the time control information that is numerical information, respectively,
the time synchronization signal generator generates the time synchronization signal based on an addition value obtained by adding the frequency control information and the time control information, and
the frequency synchronizing PLL and the time synchronizing PLL constitute a high-pass filter for removing a low frequency component of the synchronous Ethernet signal.