Patent ID: 11937476
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 19:
20. The display device of claim 18, wherein the circuit array layer further comprises:
a first power line configured to electrically connect the plurality of pixel drivers to the first power supply line;
a scan write line configured to transmit a scan write signal to the plurality of pixel drivers;
a scan control line configured to transmit a scan control signal to the plurality of pixel drivers;
a scan initialization line configured to transmit a scan initialization signal to the plurality of pixel drivers;
an emission control line configured to transmit an emission control signal to the plurality of pixel drivers;
a bias control line configured to transmit a bias control signal to the plurality of pixel drivers;
a gate initialization voltage line configured to transmit a first initialization voltage to the plurality of pixel drivers; and
an anode initialization voltage line configured to transmit a second initialization voltage to the plurality of pixel drivers,
wherein anode electrodes of the plurality of light emitting elements are respectively connected to the plurality of pixel drivers, and
cathode electrodes of the plurality of light emitting elements are electrically connected to the second power supply line,
wherein one pixel driver of the plurality of pixel drivers comprises:
a first transistor configured to generate a driving current for driving the light emitting element based on a data signal through one of the data lines;
a second transistor disposed between the one data line and a first electrode of the first transistor, and configured to transmit the data signal through the one data line to the first electrode of the first transistor based on the scan write signal;
a third electrode disposed between a gate electrode of the first transistor and a second electrode of the first transistor, and configured to connect the gate electrode of the first transistor to the second electrode of the first transistor based on the scan control signal;
a fourth transistor disposed between the gate initialization voltage line and the gate electrode of the first transistor, and configured to transmit the first initialization voltage to the gate electrode of the first transistor based on the scan initialization signal;
a fifth transistor disposed between the first power line and the first electrode of the first transistor and configured to transmit the first power to the first electrode of the first transistor based on the emission control signal;
a sixth transistor disposed between the anode electrode of one of the light emitting elements and the second electrode of the first transistor, and configured to connect the second electrode of the first transistor to the anode electrode of the one light emitting element based on the emission control signal;
a seventh transistor disposed between the anode initialization voltage line and a second electrode of the sixth transistor, and configured to transmit the second initialization voltage to the second electrode of the sixth transistor based on the bias control signal; and
an eighth transistor disposed between the bias line and the first electrode of the first transistor, and configured to transmit the bias voltage to the first electrode of the first transistor based on the bias control signal,
wherein the scan write line, the scan control line, the scan initialization line, the emission control line, and the bias control line extend in the first direction and are included in the first conductive layer,
a channel, a first electrode, and a second electrode of each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor are included in the semiconductor layer,
the gate electrode of the first transistor is included in the first conductive layer,
the gate electrode of the second transistor and the gate electrode of the third transistor are different parts of the scan write line,
the gate electrode of the fourth transistor is a part of the scan initialization line,
the gate electrode of the fifth transistor and the gate electrode of the sixth transistor are different parts of the emission control line, and
the gate electrode of the seventh transistor and the gate electrode of the eighth transistor are different parts of the bias control line, and
wherein the first power line comprises:
a first power sub-line included in the second conductive layer and extending in the first direction; and
a first power main line included in the third conductive layer, extending in the second direction, and electrically connected to the first power sub-line and the first power additional line.