Patent ID: 11917822
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A three-dimensional (3D) semiconductor memory device, comprising:
a peripheral logic structure on a semiconductor substrate;
a horizontal semiconductor layer on the peripheral logic structure, the horizontal semiconductor layer comprising a cell array region and a connection region electrically connected to the cell array region;
electrode structures, each of the electrode structures comprising a plurality of electrodes stacked on the horizontal semiconductor layer in the cell array region and the connection region, the electrode structures, as viewed in a plan view, extending in a first direction and being spaced apart from each other by separation regions in a second direction perpendicular to the first direction, the first and second directions defining a plane that is parallel to an upper surface of the semiconductor substrate, wherein the plurality of electrodes in each of the electrode structures, as viewed in a cross-sectional view, are stacked on the semiconductor substrate in a third direction perpendicular to the first and second directions;
at least one contact region comprising a through wiring structure electrically connecting the electrode structures to the peripheral logic structure in the connection region; and
ground select gate electrodes comprising lowermost electrodes among the plurality of electrodes of the electrode structures in the cell array region and the connection region,
wherein at least one ground select gate cutting region overlaps the at least one contact region on a level of the ground select gate electrodes in the third direction, as viewed in a plan view, and electrically isolates the ground select gate electrodes from each other;
wherein the separation regions comprise first and second portions that are spaced apart from the at least one contact region in the second direction, and
wherein the first and second portions of the separation regions are in parallel with each other in a straight line shape in the first direction.