Patent ID: 11869822
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A semiconductor package, comprising:
a substrate;
a die package disposed on the substrate, wherein the die package comprising a plurality of semiconductor dies and an encapsulating material surrounding the plurality of semiconductor dies and disposed between the plurality of semiconductor dies; and
a plurality of heat dissipation films respectively disposed on and jointly covering upper surfaces of the plurality of semiconductor dies, wherein a plurality of trenches are respectively extended between each two of the plurality of the heat dissipation films; and
a cover lid disposed on the substrate and in contact with the plurality of heat dissipation films, wherein the upper surfaces of the plurality of semiconductor dies are exposed from the encapsulating material, and a top surface of the encapsulating material faces the cover lid and is exposed from the plurality of trenches.