Patent ID: 11886911
Assignee: EMC IP HOLDING COMPANY LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. An apparatus comprising:
at least one processing device comprising a processor coupled to a memory;
said at least one processing device being configured:
to associate different classes of service with respective threads of one or more applications executing on at least one of a plurality of processing cores of a storage system;
to configure different sets of prioritized thread queues for respective ones of the different classes of service;
to enqueue particular ones of the threads associated with particular ones of the classes of service in corresponding ones of the prioritized thread queues; and
to implement different dequeuing policies for selecting particular ones of the enqueued threads from the different sets of prioritized thread queues based at least in part on the different classes of service;
wherein configuring different sets of prioritized thread queues for respective ones of the different classes of service comprises:
determining a number of priority classes;
determining a number of selection indexes for respective ones of the priority classes; and
establishing a particular number of prioritized thread queues based at least in part on the number of priority classes and the number of selection indexes.