Patent ID: 11860498
Assignee: HKC CORPORATION LIMITED
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 19:
20. The method of claim 19, wherein providing the first substrate and forming on the first substrate the plurality of first driving transistors and the plurality of second driving transistors, to form the first substrate assembly comprises:
forming on the first substrate a plurality of first gates, a plurality of second gates, and an insulating layer, wherein the insulating layer covers the plurality of first gates and the plurality of second gates on the first substrate;
forming on the insulating layer a plurality of first active layers, a plurality of second active layers, a plurality of first sources, a plurality of second sources, a plurality of first drains, a plurality of second drains, and a passivation layer, wherein the passivation layer covers the plurality of first active layers, the plurality of second active layers, the plurality of first sources, the plurality of second sources, the plurality of first drains, and the plurality of second drains on the insulating layer;
forming a color resist layer and a planarization layer sequentially on a surface of the passivation layer away from the insulating layer; and
defining a plurality of via holes which penetrate the planarization layer and the color resist layer and extend into the passivation layer, to make the plurality of first drains and the plurality of second drains expose from the passivation layer and forming a plurality of pixel electrodes, wherein the plurality of pixel electrodes extend into the plurality of via holes from a surface of the planarization layer away from the color resist layer and are electrically connected with the plurality of first drains and the plurality of second drains.