Patent ID: 11899969
Assignee: AMAZON TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 3:
4. An integrated circuit configured to:
receive, from a requester device, a first write transaction followed by a second write transaction, wherein the first write transaction and the second write transaction are to be executed by one or more completer devices that are coupled to the requester device through an interconnect fabric;
assign a first group identifier (ID) to the first write transaction;
determine that the second write transaction depends on the first write transaction;
assign the first group ID to the second write transaction in response to determining that the second write transaction depends on the first write transaction; and
forward the first write transaction followed by the second write transaction to the interconnect fabric for routing, wherein the interconnect fabric is configured to route transactions such that transactions assigned to a same group ID are executed in order.