Patent ID: 11894332
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A device comprising:
a substrate comprising:
first pads in a core area of the substrate;
second pads in a corner area of the substrate; and
third pads in other areas in the substrate except the core area and the corner area; and

a chip comprising bumps, each of the bumps having a substantially same width as the first pads and the second pads, the bumps having a larger width than the third pads, a first subset of the bumps connected to the first pads of the substrate, a second subset of the bumps connected to the second pads of the substrate, a third subset of the bumps connected to the third pads of the substrate.