Patent ID: 11869618
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. A system comprising:
a memory device; and
a sequencer component, operatively coupled with the memory device, to perform operations comprising:
receiving, by the sequencer component residing in a first package comprising the memory device, unencoded data from a controller residing in a second package that is different than the first package including the sequencer component, wherein the sequencer component is configured to encode the unencoded data into a code word;
performing an error correction operation on the unencoded data received from the controller, wherein the error correction operation encodes the unencoded data with additional data to generate the code word;
performing, by the sequencer component a decoding operation on the code word, wherein the code word includes a first error that cannot be decoded by the decoding operation and a second error that is corrected by the decoding operation; and
causing a performance of a second error correction operation to decode the code word to correct the first error.