Patent ID: 11864393
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 18:
19. The method of claim 18, wherein said forming the plurality of data storage elements and the stepwise structure comprises:
alternatingly depositing a plurality of electrode layers and interlayer dielectric (ILD) layers over the interconnect structure;
forming a via through the plurality of electrode layers and ILD layers;
depositing a dielectric layer over an inner wall and a bottom wall of the via;
removing the dielectric layer on the bottom wall of the via to expose a conductive pattern of the interconnect structure, the conductive pattern electrically coupled to the first source/drain of the first transistor;
filling a conductive material into the via; and
patterning the plurality of electrode layers and ILD layers to obtain the stepwise structure.