Patent ID: 11960409
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A non-transitory computer-readable memory storing instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
receiving a first request to store a first data referenced by a first logical block address (LBA) associated with a first zone of a logical address space of a memory device, wherein the memory device comprises a plurality of physical memory blocks (PMBs);
obtaining a version identifier of the first zone, wherein the version identifier of the first zone characterizes a number of times the first zone has been invalidated, wherein invalidating the first zone comprises invalidating multiple LBAs of the first zone;
selecting, in view of the version identifier of the first zone, a first PMB of the plurality of PMBs;
mapping the first LBA associated with the first zone to the first PMB; and
storing, by the processing device, the first data in the first PMB.