Patent ID: 11922101
Assignee: SIFIVE, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A system comprising:
a memory; and
a processor, wherein the memory includes instructions executable by the processor to cause the system to:
receive a design parameters data structure, wherein the design parameters data structure includes values of design parameters of an integrated circuit design;
automatically generate a register-transfer level data structure and a physical design data structure for an integrated circuit based on the design parameters data structure, wherein the physical design data structure encodes a layout of the integrated circuit;
automatically generate a test plan for an integrated circuit based on the design parameters data structure; and
automatically invoke tests for the integrated circuit based on the test plan, the register-transfer level data structure, and the physical design data structure to obtain a set of test results.