Patent ID: 11899574
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A method comprising:
receive a first write request;
responsive to receiving the first write request, compare an amount of data to be written in the first write request to a threshold amount of data;
responsive to a determination that the amount of data to be written in the first write request exceeds the threshold amount of data, storing a mapping between a physical and logical address corresponding to the first write request in a first cache, the first cache configured to store, in a volatile memory, contiguous portions of a logical-to-physical mapping table indexed by logical block address;
receiving a second write request;
responsive to receiving the second write request, compare an amount of data to be written in the second write request to the threshold amount of data;
responsive to a determination that the amount of data to be written in the second write request does not exceed the threshold amount of data, storing a mapping between a physical and logical address corresponding to the second write request in a second cache, the second cache configured to store, in a volatile memory, non-contiguous portions of the logical-to-physical mapping table indexed by logical block address;
determine if the second cache is full; and
in response to a determination that the second cache is full:
determine if a first logical block address of the second cache is present in the first cache;
in response to a determination that the first logical block address of the second cache is present in the first cache:
store a first physical address associated with the first logical block address of the second cache with the first logical block address in the first cache; and
mark a record with the first logical block address in the second cache as invalid.