Patent ID: 11907628
Assignee: GRAPHCORE LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. A computer design verification system comprising:
a parsing module configured to
receive test outputs from a plurality of testing tools,
generate from the test data outputs, test data objects, each test data object comprising a plurality of fields, each field having a field descriptor and a test value derived from the test outputs, and
store the test data objects in a test data structure having a corresponding set of fields, each field having a field descriptor corresponding to the field descriptor of the test data object and configured to receive the test value associated with that field; and
a signoff module holding a plurality of signoff objects, each comprising a plurality of fields, each field having a field descriptor and at least some of the fields populated with a signoff expression, each signoff object associated with a severity level indicative of the severity of a condition represented by the signoff object,
wherein the signoff module is configured to receive the test data objects from the parsing module and to compare at least one test value in the test data objects with at least one signoff expression in the signoff objects to determine if a signoff object matches the test data object, and in the case that it is determined that a signoff object matches the test data object, associating the severity level of the signoff object with the test data object.