Patent ID: 11923439
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A semiconductor structure, comprising:
a substrate;
a fin structure disposed over the substrate and having a first lattice constant, wherein the fin structure comprises a first portion and a second portion;
a recess structure within the first portion of the fin structure, wherein the recess structure comprises a bottom surface and an inner sidewall surface;
a gate region comprising a dielectric layer;
a channel region below the gate region and between the recess structure and another recess structure, wherein the dielectric layer of the gate region protrudes into the channel region;
a dopant diffusion enhancement layer having a second lattice constant and lining the bottom and inner sidewall surfaces of the recess structure; and
an epitaxial semiconductor layer having a third lattice constant and disposed on the dopant diffusion enhancement layer.