Patent ID: 11907091
Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. The method of claim 15, wherein the computing device also includes (iv) a plurality of (N-2)-level caches, and in which each (N-1)-level cache is associated with two or more of the plurality of (N-2)-level caches, and the (N-1)-level cache is configured as a backing store for the two or more (N-2)-level caches, the method also comprising:
causing one or more (N-2)-level CCP transitions between the two or more (N-2)-level caches to be logged into the replayable trace of the entity, the (N-2)-level CCP transitions resulting from the particular cache location being accessed by the two or more of the plurality of processing units.