Patent ID: 11869169
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The electronic device of claim 5, wherein the processor is further configured to:
in order to determine the regularized polyphase kernel for each polyphase kernel having a fractional weight phase:
identify a fractional vector that is a vector from an integer weight center to a fractional weight center of the polyphase kernel,
determine whether a magnitude of a projection of a primary axis of the polyphase kernel onto the fractional vector is less than a magnitude of the fractional vector,
determine, based on the magnitude of the projection being less than the magnitude of the fractional vector, the regularized primary axis as an expansion of the primary axis such that a magnitude of the regularized primary axis is equal to the magnitude of the fractional vector, and
determine the regularized secondary axis such that a ratio of the regularized secondary axis to the regularized primary axis is equal to a ratio of the primary axis to a secondary axis of the polyphase kernel; and

in order to normalize the coefficients of the regularized polyphase kernels:
group the coefficients of each regularized polyphase kernel into a number of disjoint sets corresponding to a number of phases in which the regularized polyphase kernel can overlap a Bayer pattern, and
normalize the coefficients for each disjoint set of the regularized polyphase kernel to obtain the normalized coefficients for the regularized polyphase kernel.