Patent ID: 11923840
Assignee: NXP B.V.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 5:
6. The circuit of claim 3,
wherein the compensation transistor comprises (i) a source terminal coupled to a ground terminal, (ii) a gate terminal configured to receive the first bias voltage, and (iii) a drain terminal,
wherein the first resistor is coupled between the source terminal and the drain terminal of the compensation transistor,
wherein the detection transistor comprises (i) a source terminal coupled to the first resistor and the drain terminal of the compensation transistor, (ii) a gate terminal configured to receive the first supply voltage, and (iii) a drain terminal, and
wherein the protection transistor comprises (i) a source terminal coupled to the drain terminal of the detection transistor, (ii) a gate terminal configured to receive the second bias voltage, and (iii) a drain terminal configured to receive the target current.