Patent ID: 11935822
Assignee: IBIDEN CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A method of manufacturing a wiring substrate, comprising:
preparing a laminate comprising a conductor layer and a resin insulating layer laminated on the conductor layer;
forming a hole in the resin insulating layer such that the hole is connected to the conductor layer;
forming a plating resist on the resin insulating layer such that the plating resist has a pad opening formed therein and connected to the hole;
filling the hole and the pad opening with a conductor such that a via conductor is formed in the hole and a conductor pad is formed in the pad opening;
forming a resist layer on the conductor pad such that the resist layer has a post opening formed therein and connected to the conductor pad; and
filling the post opening with a conductor such that a metal post is formed in the post opening and directly on a surface of the conductor pad and is reduced in diameter from a base end side connected to the conductor pad toward an opposite side with respect to the base end side,
wherein the forming of the plating resist includes forming the pad opening such that the pad opening has a center that is shifted from a center of the hole in a predetermined direction, and the forming of resist layer includes forming the post opening such that the post opening has a center that is shifted from a center of the conductor pad in the predetermined direction and is formed over the via conductor and overlapping with a central axis of the via conductor and the via conductor is positioned below the post opening and overlapping with the central axis of the post opening.