Patent ID: 11923267
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. An integrated circuit (IC) device assembly, comprising:
a package substrate;
an IC die having a first side electrically coupled to the package substrate through a plurality of first interconnects, and a second side comprising a plurality of metallic lands; and
a heat spreader coupled to the second side of the IC die through a plurality of second interconnects comprising a solder alloy, wherein individual ones of the plurality of second interconnects are in contact with corresponding ones of the plurality of metallic lands, wherein:
the IC die is a first IC die and the assembly further comprises a second IC die laterally adjacent to the first IC die;
the first IC die has a first die thickness, and the second IC die has a second die thickness, greater than the first die thickness
a first of the plurality of metallic lands is on the first IC die, and a second of the plurality of metallic lands is on the second IC die;
a first of the plurality of second interconnects is coupled to the first of the plurality of metallic lands, and a second of the plurality of second interconnects is coupled to the second of the plurality of metallic lands; and

a first z-height equal to a thickness of the first of the plurality of metallic lands summed with a thickness of the first of the plurality of second interconnects is greater than a second z-height equal to a thickness of the second of the plurality of metallic lands summed with a thickness of the second of the plurality of second interconnects.