Patent ID: 11923315
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor package, comprising:
a pair of dies, disposed side by side, each die including a contact pad;
a redistribution structure, disposed on the pair of dies and electrically connecting the pair of dies, wherein the redistribution structure comprises a lowermost dielectric layer, an uppermost dielectric layer, and a redistribution conductive layer, the lowermost dielectric layer is closer to the pair of dies, the redistribution conductive layer extends between the lowermost dielectric layer and the uppermost dielectric layer, and the uppermost dielectric layer is furthest from the pair of dies; and
a conductive plate, electrically connected to the contact pads of the pair of dies,
wherein the conductive plate extends over the uppermost dielectric layer of the redistribution structure and over the pair of dies, and
a vertical projection of the conductive plate falls on spans of the pair of dies.