Patent ID: 11894383
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC B  H

Claim 11:
12. A method of manufacturing a semiconductor structure, comprising:
receiving a substrate;
forming a fin structure over the substrate, wherein the fin structure includes a lower portion and an upper portion over the lower portion, the lower portion defines a first active layer, and the upper portion defines a second active layer;
forming a plurality of first source/drain structures, disposed in the first active layer;
forming a plurality of second source/drain structures, disposed in the second active layer and aligned with the plurality of first source/drain structures respectively;
forming a first gate structure, disposed around or over the first active layer and between the plurality of the first source/drain structures, and separated from the second active layer;
forming a second gate structure, continuously disposed across the first active layer and the second active layer, and disposed between the plurality of first source/drain structures in the first active layer and between the plurality of second source/drain structures in the second active layer; and
forming a third gate structure, disposed around or over the second active layer between the plurality of the second source/drain structures, and separated from the first active layer.