Patent ID: 11947239
Assignee: CISCO TECHNOLOGY, INC.
Field: Optics (Instruments)
Classification: CPC G | IPC G

Claim 16:
17. The driver circuit of claim 16, wherein each buffer of the plurality of buffers, comprises:
a first adjustable gain inverter electrically connected to a first input node that is configured to receive the first input and to a first intermediate node;
a first fixed gain inverter that is electrically connected in parallel with the first adjustable gain inverter to the first input node and to the first intermediate node;
a second adjustable gain inverter electrically connected to a second input node that is configured to receive the second input and to a second intermediate node;
a second fixed gain inverter connected in parallel with the second adjustable gain inverter;
a first cross-coupled inverter that has an input connected to the first input node and an output connected to the second input node;
a second cross-coupled inverter connected in parallel with the first cross-coupled inverter and having an output connected to the first input node and an input connected to the second input node;
a first inductor connected between the first intermediate node and a first output node;
a second inductor connected between the second intermediate node and a second output node;
a first boost segment; and
a second boost segment.