Patent ID: 11900861
Assignee: LG DISPLAY CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. The display device of claim 1,
wherein each of the main pixel and the redundancy pixel comprises a driving transistor, a first switching transistor, a second switching transistor, an emission control transistor, a first initializing transistor and a second initializing transistor,
wherein in the first switching transistor, a data voltage is input to a first electrode of the first switching transistor, a second electrode of the first switching transistor is connected to a first node, and a first input terminal is connected to a gate electrode of the first switching transistor,
wherein in the driving transistor, a pixel-high voltage is applied to a first electrode of the driving switching transistor, a second electrode of the driving switching transistor is connected to a third node, and a gate electrode of the driving switching transistor is connected to a second node,
when in the second switching transistor, a first electrode of the second switching transistor is connected to the third node, a second electrode of the second switching transistor is connected to the second node, and a gate electrode of the second switching transistor is connected to the first input terminal,
wherein in the emission control transistor, a first electrode of the emission control transistor is connected to the third node, a second electrode of the emission control transistor is connected to a light emitting diode (LED), and a gate electrode of the emission control transistor is connected to the third input terminal,
wherein in the first initializing transistor, an initializing voltage is applied to a first electrode of the first initializing transistor, a second electrode of the first initializing transistor is connected to the third node, and a gate electrode of the first initializing transistor is connected to the second input terminal, and
wherein in the second initializing transistor, the initializing voltage is applied to a first electrode of the second initializing transistor, a second electrode of the second initializing transistor is connected to the first node and the third input terminal is connected to a gate electrode of the second initializing transistor.