Patent ID: 11910613
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A semiconductor memory device, comprising:
a mold structure including a plurality of wordlines, which are sequentially stacked on a front side of a substrate, and a string selection line and a stopper line, which are sequentially stacked on the plurality of wordlines;
a first channel structure extending in a vertical direction, which intersects the front side of the substrate, to penetrate the mold structure;
a string separation structure extending in a first direction, which intersects the vertical direction, to cut the string selection line and the stopper line, the string separation structure at least partially overlapping with the first channel structure;
a bitline extending in a second direction, which intersects the vertical direction and the first direction, on the mold structure;
a first bitline contact connecting the first channel structure and the bitline;
a block separation structure extending in the first direction to cut the mold structure; and
a protective structure interposed between the block separation structure and the stopper line, and not between the block separation structure and the string selection line and not between the block separation structure and the plurality of wordlines,
wherein the first bitline contact is shifted from a center of the first channel structure in a direction away from the string separation structure, and
wherein the protective structure has a lowermost surface located at a depth above the string selection line, and the block separation structure directly contacts the string selection line and the plurality of word lines below the protective structure.