Patent ID: 11960344
Assignee: RAMBUS INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 19:
20. A memory control component comprising:
a data signaling interface to transmit:
(i) data to an integrated-circuit memory device via a data link during active-mode operation of the memory control component, the data to be stored within a core storage array of the integrated-circuit memory device, and
(ii) a timing calibration pattern to the integrated-circuit memory device via the data link during a calibration-mode operation of the memory control component, the timing calibration pattern to be sampled within the memory device to generate calibration pattern samples that are transmitted to the memory control component via a calibration signaling link without storage within the core storage array; and

a calibration signaling interface dedicated to receiving the calibration pattern samples transmitted via the calibration signaling link.