Patent ID: 11916707
Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. An architecture for a class D modulator, comprising:
a digital input line configured to receive a digital input signal, wherein the digital input line is split into a first parallel line and a second parallel line;
a first digital-to-analog converter (DAC) coupled to the first parallel line, the first DAC configured to receive the digital input signal and convert the digital input signal to an analog input signal;
a first analog summer configured to subtract an analog feedback signal from the analog input signal and generate a first analog summer output;
a loop filter configured to receive the first analog summer output and produce a filtered analog output;
a signal processing module coupled to the second parallel line, the signal processing module configured to receive the digital input signal and a quantized signal and generate a processed signal;
a second digital-to-analog converter (DAC) configured to convert the processed signal to an analog processed signal;
a second analog summer configured to add the analog processed signal to the filtered analog output; and
a quantizer configured to quantize a second summer output and generate the quantized signal.