Patent ID: 11887860
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An integrated circuit comprising:
a first semiconductor fin of a plurality of semiconductor fins;
a second semiconductor fin of the plurality of semiconductor fins, the second semiconductor fin neighboring the first semiconductor fin with no intervening fins or fin stubs therebetween, wherein a first trough having a first width is located between the first semiconductor fin and the second semiconductor fin, when viewed along an axis parallel to the plurality of semiconductor fins, and the first width is taken at a height that is approximately midway between a bottom and a top of the first trough;
a third semiconductor fin of the plurality of semiconductor fins, the third semiconductor fin neighboring the second semiconductor fin with no intervening fins or fin stubs therebetween, wherein a second trough having a second width is located between the second semiconductor fin and the third semiconductor fin, such that the first width of the first trough is more than two times greater than the second width of the second trough, when viewed along the axis paraelle to the plurality of semicondcutor fins, and the second width is taken at a height that is approximately midway between a bottom and a top of the second trough;
a fourth semiconductor fin of the plurality of semiconductor fins, the fourth semiconductor fin neighboring the third semiconductor fin with no intervening fins or fin stub therebetween, wherein a third trough having a third width is location between the third semiconductor fin and the fourth semiconductor fin, such that the third width of the third trough is less than the first width and greater than the second width, when viewed along the axis parallel to the plurality of semiconductor fins, and the third width is taken at a height that is approximately midway between a bottom and a top of the third trough; and
a fifth semiconductor fin of the plurality of semiconductor fins, the fifth semiconductor fin neighboring the fourth semiconductor fin with no intervening fins or fin stubs therebetween, wherein a fourth trough having a fourth width the same as the second width is located between the fourth semiconductor fin and the fifth semiconductor fin, when viewed along the axis parallel to the plurality of semiconductor fins, the fourth taken at a height that is approximately midway between a bottom and a top of the fourth trough.