Patent ID: 11928414
Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 6:
7. The pin line-out design method for the chip according to claim 6, wherein the pin line-out design method for the chip further comprises:
performing a simulation on a circuit board designed with anti-pads to obtain an actual via hole impedance of the circuit board;
determining whether the actual via hole impedance meets the via hole impedance requirement of the chip; and
when the actual via hole impedance does not meet the via hole impedance requirement of the chip, adjusting a number of the anti-pads and/or sizes of the anti-pads on the circuit board, and returning to the step of performing the simulation on the circuit board designed with the anti-pads until the actual via hole impedance of the circuit board meets the via hole impedance requirement of the chip.