Patent ID: 11901891
Assignee: KEPLER COMPUTING INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 15:
16. A system comprising:
a memory to store one or more instructions;
a processor circuitry to execute the one or more instructions; and
a communication device to allow the processor circuitry to communicate with another device, wherein the processor circuitry includes a consensus circuitry which comprises:
a first input;
a second input; and
a consensus circuitry coupled to the first input and the second input, wherein the consensus circuitry is to generate a consensus output which is indicative of a consensus of the first input and the second input, wherein the consensus circuitry comprises a gate to receive the first input, the second input, and a third input, wherein the third input is coupled to an output of the gate which is the consensus output, and wherein the gate comprises:
a first capacitor having a first terminal coupled to the first input, and a second terminal coupled to a summing node, wherein the first capacitor includes a first ferroelectric material;
a second capacitor having a third terminal coupled to the second input, and a fourth terminal coupled to the summing node, wherein the second capacitor includes a second ferroelectric material; and
a third capacitor having a fifth terminal coupled to the third input, and a sixth terminal coupled to the summing node, wherein the third capacitor includes a third ferroelectric material, and wherein the first capacitor, the second capacitor, and the third capacitor are planar stacked capacitors.