Patent ID: 11923019
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A memory system, comprising:
an array of memory cells; and
control circuitry associated with control code, wherein the control code causes the control circuitry to perform:
a programming operation, by one or more read/write circuits, for a set of memory cells of the array of memory cells to store a set of bits in the set of memory cells; and
verify operations, by one or more sense amplifiers, for the set of memory cells, wherein the verify operations comprise:
a first verify operation for the set of memory cells based on memory cell voltages for the set of memory cells and a verify high voltage threshold, wherein the programming operation is determined to be completed if at least one of the memory cell voltages satisfy the verify high voltage threshold; and
subsequent to the first verify operation, an application of a bit line voltage to a memory cell of the set of memory cells based on a memory cell voltage associated with the memory cell and a target voltage threshold, wherein the bit line voltage is applied to the memory cell if the memory cell voltage associated with the memory cell fails to satisfy the target voltage threshold.