Patent ID: 11925023
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A three-dimensional semiconductor device, comprising:
a first stacked structure on a substrate, the first stacked structure including first horizontal layers and first insulating layers alternately stacked on the substrate, and each of the first horizontal layers including a first pad at an end portion thereof;
a second stacked structure on the first stacked structure, the second stacked structure including second horizontal layers and second insulating layers alternately stacked on the first stacked structure, and each of the second horizontal layers including a second pad at an end portion thereof; and
a vertical channel structure penetrating the first stacked structure and the second stacked structure,
wherein the first pads of the first horizontal layers form a first staircase of the first stacked structure in a first direction,
wherein the second pads of the second horizontal layers form a second staircase of the second stacked structure in the first direction,
wherein the first pad of an uppermost one of the first horizontal layers is spaced apart from the vertical channel structure by a first length, and
wherein the second pad of a lowermost one of the second horizontal layers is spaced apart from the vertical channel structure by a second length, the second length being greater than the first length.