Patent ID: 11914022
Assignee: AYDEE KAY LLC
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 0:
1. An integrated circuit that comprises:
a chirp generator configured to provide a chirp signal having linearly-ramped chirp intervals;
a shift frequency generator configured to provide shift frequency signals having different shift frequencies during each of multiple segments in each chirp interval; and
a modulator configured to provide a segmented chirp signal based at least in part on the chirp signal and the shift frequency signals, the segmented chirp signal having multiple linearly-ramped chirp segments in each chirp interval, wherein the multiple linearly-ramped chirp segments in the segmented chirp signal comprise a saw-tooth pattern, and
wherein a delay between adjacent linearly-ramped chirp segments is less than a sample period in a digital domain in the integrated circuit.