Patent ID: 11966299
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. The method according to claim 10, wherein in response to the storage component being a bus and interface PCIe type, the user terminal further comprises a clock selector and a fourth MUX; and the method further comprises:
sending, by the main controller, a fourth signal switching instruction to the clock selector, and sending a fifth signal switching instruction to the fourth MUX in response to receiving the data backup instruction;
receiving, by the clock selector, the fourth signal switching instruction, and connecting an eighth signal input end to a fourth signal output end according to the fourth signal switching instruction;
receiving, by the fourth MUX, the fifth signal switching instruction;
connecting a tenth signal input end to a fifth signal output end according to the fifth signal switching instruction; and
receiving, by the storage component, a clock signal sent by the debugging device, to implement clock synchronization between the storage component and the debugging device.