Patent ID: 11967383
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A non-volatile storage apparatus, comprising:
a plurality of non-volatile memory cells arranged in multiple planes; and
a control circuit connected to the multiple planes, the control circuit is configured to perform a programming process to concurrently program data into the multiple planes including performing a first portion of the programming process concurrently for the multiple planes and performing a second portion of the programming process concurrently for the multiple planes, the second portion of the programming process is performed after the first portion of the programming process such that the second portion of the programming process completes programming for the programming process, the control circuit is configured to identify a slow plane of the multiple planes based on the first portion of the programming process and increase the speed of programming for the slow plane relative to another plane of the multiple planes that is concurrently experiencing programming during the second portion of the programming process, the slow plane includes non-volatile memory cells that program slower than non-volatile memory cells of another plane.