Patent ID: 11887211
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. A non-transitory computer-readable medium to store computer-readable code for fabrication of an apparatus comprising:
texture mapping circuitry to perform texture mapping operations using texels defined by textures represented using at least one texture image stored in a memory system;
a texture cache comprising a plurality of banks of cache storage to cache texels for processing in the texture mapping operations; and
texture cache access control circuitry to control access to cached texels corresponding to a given chunk of texels of a given texture image according to a selected bank mapping selected from among a plurality of bank mappings supported by the texture cache access control circuitry, each bank mapping corresponding to a different mapping of the respective texels within the given chunk of texels to the plurality of banks of cache storage of the texture cache; and
in at least one operating mode, the texture cache access control circuitry is configured to select the selected bank mapping for the given chunk of texels of the given texture image depending on:
at least one of a first chunk position coordinate and a second chunk position coordinate associated with the given chunk of texels, where the first chunk position coordinate is indicative of a position of the given chunk of texels within the given texture image with respect to a first texture axis, and the second chunk position coordinate is indicative of a position of the given chunk of texels within the given texture image with respect to a second texture axis; and
at least one further texture attribute associated with the given texture image.