Patent ID: 11901189
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A method for forming a semiconductor structure, comprising:
etching a dielectric layer on a substrate to form a plurality of trenches, the plurality of trenches including a plurality of first trenches in a first region and at least one second trench in a second region, the first region having a pattern density greater than the second region;
depositing a spin-on coating (SOC) layer comprising a precursor polymer on the substrate, the SOC layer filling the plurality of trenches, a first portion of the SOC layer overlying the plurality of first trenches having a first thickness and a second portion of the SOC layer overlying the at least one second trench having a second thickness, the first thickness being greater than the second thickness; and
performing a two-step thermal treatment process to the SOC layer, wherein a first thermal treatment step in the two-step thermal treatment process is conducted at a first temperature below a cross-linking temperature of the SOC layer to cause flow of the SOC layer, and a second thermal treatment step in the two-step thermal treatment process is conducted at a second temperature to cause cross-linking of the precursor polymer,
wherein the first thermal treatment step is performed under an inert atmosphere with an oxygen level less than 5%, and the second thermal treatment step is performed under an ambient atmosphere with an oxygen level greater than 20%.