Patent ID: 11886359
Assignee: D-MATRIX CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. The device of claim 11 further comprising an aggregate of transformer devices, the transformer devices comprising a plurality of transformers each of which is stacked in a layer by layer configuration;
wherein each of the plurality of transformers is configured within one or more DIMC devices such that each of the transformers comprises a plurality of matrix multipliers including query key value (QKV) matrices configured for an attention layer of a transformer followed by three fully connected matrices (FC);
wherein the DMIC device is configured to accelerate the transformer and further comprises a dot product of QKT followed by a softmax (QKT/square root (dk))V; and
wherein each of the slices includes a single input multiple data (SIMD) device configured to accelerate a computing process of the softmax.