Patent ID: 11929759
Assignee: AMS INTERNATIONAL AG
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. The DAC according to claim 3, wherein in the first switching block receiving the multi-bit word,
a further detector is configured to detect multi-bit words representing even integers, which are larger than the minimum and smaller than the maximum integer within the range of integers,
a ditherer determines by random to split a multi-bit word detected by the further detector into two portions of equal or unequal value, respectively, and
in case that the ditherer determined unequal splitting, the adder is configured to add a unit to one of the two preliminary sub-portions and a subtractor is configured to subtract the unit from the other preliminary sub-portion, wherein the selector determines the respective preliminary sub-portions based on the sign of the weight accumulator.