Patent ID: 11955445
Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A method of forming a microelectronic assembly, comprising:
forming a first through substrate via (TSV) provided within a first substrate having a first upper surface, the first TSV extending into the first substrate;
forming a first metal contact pad and a second metal contact pad in the first upper surface, the first metal contact pad aligned with and in electrical communication with the first TSV, the second metal contact pad not aligned with any TSV in the first substrate; and
providing a first recess of the first metal contact pad relative to the first upper surface;
providing a second recess of the second metal contact pad relative to the first upper surface, wherein the first recess is recessed to a greater degree than the second recess; and
preparing the first upper surface, first metal contact pad and second metal contact pad for direct hybrid bonding to form a first bonding surface.