Patent ID: 11929289
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. The semiconductor device of claim 18, further comprising;
a first etch stop layer on a sidewall of the first spacer;
a first lower insulating layer on a sidewall of the first etch stop layer;
a second etch stop layer on a sidewall of the second spacer;
a second lower insulating layer on a sidewall of the second etch stop layer; and
wherein the upper surfaces of the first gate dielectric layer, the second gate dielectric layer, the first gate electrode, the second gate electrode, the first spacer, and the second spacer and upper surfaces of the first etch stop layer, the second etch stop layer, the first lower insulating layer, and the second lower insulating layer are coplanar.