Patent ID: 11908487
Assignee: KABUSHIKI KAISHA TOSHIBA
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A signal processing apparatus comprising:
an acquisition unit configured to acquire M detection signals output from M detector devices (M is an integer equal to or greater than 2) having N-fold symmetry integer equal to or greater than 2), each of the M detector devices detecting an original signal generated from K signal sources (K is an integer equal to or greater than 2) having the N-fold symmetry; and
an application unit configured to apply a trained neural network to M input vectors corresponding to the M detection signals and output K output vectors,
wherein a same parameter is set to, of a plurality of weights included in a weight matrix of the trained neural network, weights that are commutative based on the N-fold symmetry.