Patent ID: 11935847
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A semiconductor package, comprising:
a connection structure having a first surface and a second surface opposing the first surface, and comprising one or more redistribution layers;
one or more passive components disposed on the first surface of the connection structure, and electrically connected to the one or more redistribution layers of the connection structure;
a semiconductor chip disposed on the first surface of the connection structure, and electrically connected to the one or more redistribution layers of the connection structure;
an encapsulant disposed on the first surface of the connection structure and covering at least a portion of the semiconductor chip;
an antenna substrate disposed on the encapsulant and comprising one or more wiring layers, at least a portion of the one or more wiring layers comprising an antenna pattern; and
a through via penetrating at least a portion of each of the connection structure, the encapsulant, and the antenna substrate,
wherein a surface of the semiconductor chip to which connection pads and the one or more redistribution layers are connected faces the first surface of the connection structure in a first direction,
wherein a surface of the one or more passive components to which electrodes and the one or more redistribution layers are connected faces the first surface of the connection structure in the first direction,
wherein the surface of the semiconductor chip is farther in the first direction than the surface of the one or more passive components,
wherein the semiconductor package further comprises an additional encapsulant disposed on the first surface of the connection structure and covering at least a portion of the one or more passive components,
wherein the additional encapsulant is spaced apart from a side surface of the semiconductor chip,
wherein a portion of the additional encapsulant is on a side surface of the one or more passive components that faces towards the side surface of the semiconductor chip, and
wherein the encapsulant fills between the portion of the additional encapsulant, on the side surface of the one or more passive components, and the side surface of the semiconductor chip.