Patent ID: 11930639
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. A three-dimensional semiconductor memory device, comprising:
a peripheral circuit structure on a substrate;
horizontal semiconductor patterns disposed on the peripheral circuit structure, the horizontal semiconductor patterns spaced apart from each other in a first direction parallel to a top surface of the substrate;
penetrating insulating patterns provided adjacent to corresponding ones of the horizontal semiconductor patterns, the penetrating insulating patterns spaced apart from each other in a second direction crossing the first direction between the horizontal semiconductor patterns, each of the penetrating insulating patterns connected to the horizontal semiconductor patterns in the first direction; and
separation structures vertically extending higher than top surfaces of the horizontal semiconductor patterns, the separation structures disposed between the penetrating insulating patterns and between the horizontal semiconductor patterns, each of the separation structures are spaced apart from each other in the first direction and connected to corresponding penetrating insulating patterns in the second direction,
wherein, when viewed in a plan view, each of the horizontal semiconductor patterns is isolated by corresponding ones of the penetrating insulating patterns and the separation structures such that the horizontal semiconductor patterns are separated from each other, and
wherein each penetrating insulating pattern is in contact with a side surface of at least one corresponding one of the horizontal semiconductor patterns.