Patent ID: 11901189
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 16:
17. A method for forming a semiconductor structure, comprising:
depositing a dielectric layer over a substrate, the dielectric layer having a planar top surface;
forming trenches in the dielectric layer, the trenches comprises a first set of the trenches in a first region of the substrate and a second set of the trenches in a second region of the substrate, the first set of the trenches having a first pattern density, and the second set of the trenches having a second pattern density less than the first pattern density;
depositing a bottom layer comprising a cross-linkable precursor polymer over the substrate, the bottom layer filing in spaces between the trenches and having a non-planar top surface, wherein a top surface of a first portion of the bottom layer over the first set of the trenches is located above a top surface of a second portion of the bottom layer over the second set of the trenches;
heating the bottom layer at a first temperature and under a first atmosphere with a first oxygen level of less than 5% to reduce a height difference between the top surface of the first portion of the bottom layer and the top surface of the second portion of the bottom layer;
heating the bottom layer at a second temperature and under a second atmosphere with a second oxygen level of greater than 20% to crosslink the cross-linkable precursor polymer, thereby forming a crosslinked bottom layer;
depositing a middle layer over the crosslinked bottom layer; and
forming a photoresist layer over the middle layer.