Patent ID: 11864384
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 15:
16. A method for fabricating a nonvolatile memory device, the method comprising:
forming a first sacrificial pattern and an insulating pattern alternately stacked on a substrate;
forming a second sacrificial pattern on the first sacrificial pattern and the insulating pattern;
forming a first cutting line which divides the second sacrificial pattern into a first sub sacrificial pattern and a second sub sacrificial pattern;
forming a third sacrificial pattern on the first and second sub sacrificial patterns and the first cutting line;
forming a second cutting line which divides the third sacrificial pattern into a third sub sacrificial pattern and a fourth sub sacrificial pattern;
forming first to third channel structures which penetrate the first to fourth sub sacrificial patterns and the insulating pattern, and are connected to the substrate;
forming first and second word line cutting regions which penetrate the first to fourth sub sacrificial patterns and the insulating pattern, and are spaced apart from each other with the first to fourth sub sacrificial patterns interposed therebetween;
replacing the first sacrificial pattern and the first to fourth sub sacrificial patterns with a plurality of conductive patterns, using the first and second word line cutting regions; and
forming a bit line on the plurality of conductive patterns to be connected to the first to third channel structures.