Patent ID: 11886725
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A computer-implemented method comprising:
setting, in a memory, a memory buffer that includes contiguous memory blocks;
obtaining a decision tree comprising nodes including split nodes and leaf nodes, wherein the split nodes include at least two child nodes ordered according to a likelihood of accessing one of the at least two child nodes after accessing an included split node;
mapping the nodes of the decision tree onto respective blocks of the memory blocks, the memory blocks storing attributes of the mapped nodes, wherein the mapping is performed according to a depth-first search order, wherein the split nodes and included child nodes are mapped onto successive blocks of the memory blocks, wherein the ordered child nodes of an included split node are mapped onto successive blocks of the memory blocks;
executing the nodes of the decision tree by processing the attributes of the nodes as accessed from the memory according to an order of the memory blocks in the memory buffer; and
returning an inference result based on an outcome of executing the nodes.