Patent ID: 11909421
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G  Y | IPC G  H

Claim 7:
8. The MAC operator of claim 7, wherein the first 4:1 demultiplexer is configured to:
generate an 8-bit exponent obtained by adding upper three ‘0’ bits to the 5-bit exponent of the 16-bit input data input to the first input terminal,
generate an 8-bit exponent obtained by adding upper two ‘0’ bits to the 6-bit exponent of the 16-bit input data input to the second input terminal, and
generate an 8-bit exponent obtained by adding upper one ‘0’ bit to the 7-bit exponent of the 16-bit input data input to the third input terminal.