Patent ID: 11871589
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. An apparatus comprising:
a first pillar extending in a direction perpendicular to a substrate;
a second pillar extending in the direction perpendicular to the substrate;
a third pillar extending in the direction perpendicular to the substrate;
a first memory cell including a first material located in a first level of the apparatus, the first material coupled to the first and third pillars;
a second memory cell including a first additional material located in the first level, the first additional material coupled to the second and third pillars; and
a conductive region located in a level of the apparatus, the conductive region being separated from the first pillar by a first dielectric, separated from the second pillar by a second dielectric, and separated from the third pillar by a third dielectric, the first, second, and third dielectrics being located in the second level.