Patent ID: 11929438
Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  C  Y | IPC C  H

Claim 9:
10. A transistor comprising:
an oxide semiconductor layer; and
a source electrode or a drain electrode in contact with the oxide semiconductor layer,
wherein the oxide semiconductor layer comprises a plurality of first regions and a second region,
wherein each region of the plurality of first regions comprises an element M,
wherein the element M is one or more of Al, Si, Y, B, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu,
wherein the second region includes indium,
wherein an atomic ratio of indium to the element M in the second region is greater than an atomic ratio of indium to the element M in the first region, and
wherein the plurality of first regions and the second region are arranged in a mosaic pattern.