Patent ID: 11967544
Assignee: STMICROELECTRONICS S.R.L.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A method, comprising:
using a clamping tool for applying a pressure force directly to a first area of each electrically-conductive lead of a plurality of electrically-conductive leads that are separate from a die pad to which a semiconductor die is mounted;
while said pressure force is applied, using a welding tool that is separate from the clamping tool for performing a wirebonding between the semiconductor die and a second area of each electrically-conductive lead that is laterally offset from the first area;
wherein applying the pressure force comprises pressing a first curved surface of the clamping tool against a mutually cooperating second curved surface at the first area of each electrically-conductive lead.