Patent ID: 11876135
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 8:
9. A semiconductor structure comprising:
a dielectric substrate; and
a transistor having a channel layer, a gate disposed over at least two sides of the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer, wherein the channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate, and further wherein the epitaxial source/drain structure includes:
a first epitaxial sidewall and a second epitaxial sidewall, wherein the first epitaxial sidewall and the second epitaxial sidewall each have a first dopant concentration, and
an epitaxial layer disposed between the first epitaxial sidewall and the second epitaxial sidewall, wherein the epitaxial layer physically contacts the dielectric substrate and the epitaxial layer has a second dopant concentration that is greater than the first dopant concentration.