Patent ID: 11894067
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. The method as set forth in claim 18, wherein each one of the strings has at least one drain-side select gate transistor on a drain-side of the one of the strings connected to one of a plurality of bit lines and coupled to the memory cells of the one of the strings, the read frequency metric is a transistor threshold voltage of the at least one drain-side select gate transistor of at least one of the strings, the method further includes the steps of:
checking the transistor threshold voltage of the at least one drain-side select gate transistor of at least one of the strings in response to the random number being the preselected one of the plurality of numbers;
determining whether the transistor threshold voltage of the at least one drain-side select gate transistor of at least one of the strings is less than a drain voltage threshold;
concluding the memory apparatus is ready for the next read and returning to receiving the read request associated with one of the plurality of read operations in response to the transistor threshold voltage of the at least one drain-side select gate transistor of at least one of the strings not being less than the drain voltage threshold; and
relocating the data of the one of the plurality of blocks in response to the transistor threshold voltage of the at least one drain-side select gate transistor of at least one of the strings being less than the drain voltage threshold.