Patent ID: 11934281
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 19:
20. The method of claim 17, wherein
the memory device further comprises an input/output (I/O) circuit;
the I/O circuit comprises a write multiplexer (MUX) array and a read MUX array coupled to each group of banks, respectively;
the write MUX array comprises P write sub-arrays applied in series;
the read MUX array comprises P read sub-arrays applied in series; and
directing the P×N pieces of data comprises:
directing, through the P write sub-arrays, the P×N pieces of data to the P×N working banks, respectively; and
directing, through the P read sub-arrays, the P×N pieces of data from the P×N working banks, respectively.