Patent ID: 11928018
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. The apparatus of claim 13, wherein:
a first value of the plurality of bits indicates that the first error management procedure and the second error management procedure identified the set of data as error-free,
a second value of the plurality of bits indicates that the first error management procedure detected a first error in the set of data and the second error management procedure identified the set of data as error-free,
a third value of the plurality of bits indicates that the first error management procedure identified the set of data as error-free and the second error management procedure detected a second error in the set of data, and
a fourth value of the plurality of bits indicates that the first error management procedure and the second error management procedure detected errors in the set of data.