Patent ID: 11877441
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 0:
1. A memory, comprising a substrate, on which is disposed a separation layer, in which are arranged plural bitlines spaced apart from one another, wherein the plural bitlines are arranged along a first direction, and each bitline is S-shaped, wherein
each bitline includes plural first bitline structures and plural second bitline structures spaced apart from one another and sequentially connected to one another, the first bitline structures extend along a second direction, the second direction is inclined relative to the first direction, the second bitline structures extend along a third direction, the third direction is inclined relative to the first direction, and a direction of inclination of the third direction relative to the first direction is opposite to a direction of inclination of the second direction relative to the first direction.