Patent ID: 11915771
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An apparatus, comprising:
a memory device;
a controller coupled with the memory device, the controller configured to be coupled with a host device and to perform mapping between logical addresses received from the host device and physical addresses of the memory device;
a first voltage detector having a first configuration and a second voltage detector having a second configuration, the first voltage detector and the second voltage detector coupled with the memory device and configured to monitor one or more supply voltages of the memory device and determine whether the one or more supply voltages satisfy respective ranges based at least in part on monitoring the one or more supply voltages; and
a health engine coupled with the first voltage detector, the second voltage detector, and the controller, the health engine configured to initiate, based at least in part on determining that a supply voltage of the one or more supply voltages exceeds an upper operating point of the respective range, a safe mode of at least one of the controller or the memory device.