Patent ID: 11881456
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor package, comprising:
a package substrate;
an interposer disposed on the package substrate;
a first semiconductor device mounted on the interposer;
a second semiconductor device mounted on the interposer adjacent to the first semiconductor device;
a molding member disposed on the interposer; and
a capping structure disposed on the molding member,
wherein the molding member includes a first molding portion disposed between the first semiconductor device and the second semiconductor device, a second molding portion disposed between the first semiconductor device and the capping structure, and a third molding portion disposed between the capping structure and the interposer, and
wherein the third molding portion extends from a lower region of the second molding portion,
wherein a lower end of the capping structure contacts an upper surface of the third molding portion, and
wherein the upper surface of the third molding portion is at a lower level than an upper surface of the second molding portion.