Patent ID: 11960406
Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. A processor configured to make a logging decision based on accessing an identification of memory addresses for which the processor is instructed to omit logging, the processor comprising:
one or more processing units;
a cache; and
control logic that configures the processor to at least:
during execution of a thread corresponding to a process that executes at the one or more processing units, detect a memory access by an executable instruction that executes as part of the thread, the memory access being targeted at a particular memory address within a memory space for the process;
based at least on detecting the memory access, determine if the processor has been instructed to omit logging of accesses to the particular memory address into a trace corresponding to the process, including checking one or more data structures that identify at least one range of memory addresses within the memory space for the process whose values are reconstructable or predictable from a data source that is separate from the trace, accesses to which the processor is instructed to omit logging during execution of the process at the one or more processing units; and
in response to determining if the processor has been instructed to omit logging of accesses to the particular memory address,
based at least on having determined that the processor has been instructed to omit logging of accesses to the particular memory address, omit logging the memory access when using the cache to process the memory access; or
based at least on it being determined that the processor has not been instructed to omit logging of accesses to the particular memory address, log the memory access into the trace when using the cache to process the memory access.