Patent ID: 11907720
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. A data processing method, comprising:
indicating, using mode bit storage circuitry, whether each of a plurality of registers is in a data mode or a metadata mode, wherein each of the registers has data bits to store data, and metadata bits to store metadata, and wherein when one of the registers operates in the metadata mode, the metadata bits and the data bits are valid, and when the one of the registers operates in the data mode, the data bits are valid and the metadata bits are invalid;
responding to a memory operation that is a load operation by:
determining whether an element in the one or more given elements is of a data type or a combined type;
loading the element into the data bits of one of the registers and setting the mode bit storage circuitry to indicate that the one of the registers is in the data mode when the element is of the data type; and,
loading the element into the data bits and the metadata bits of one of the registers when the element is of the combined type.