Patent ID: 11894357
Assignee: SJ SEMICONDUCTOR(JIANGYIN) CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 3:
4. A System-in-Package (SiP) structure for a light emitting diode (LED) chip, comprising:
a heat sink structure;
a first chip, formed on the heat sink structure;
a connecting pillar structure, formed on the first chip to electrically lead out the first chip;
a first packaging layer, formed on the first chip, wherein the first packaging layer covers the connecting pillar structure, and wherein the first chip, the connecting pillar structure, and the first packaging layer constitute a first-chip initial packaging structure;
a second packaging layer, formed on the heat sink structure, and covering the first-chip initial packaging structure;
a rewiring layer, formed on the second packaging layer and the first-chip initial packaging structure, wherein the rewiring layer is electrically connected to the connecting pillar structure;
an LED chip, formed on a side of the rewiring layer away from the first-chip initial packaging structure;
a printed circuit board (PCB), electrically connected by a metal lead wire to a side of the rewiring layer with the LED chip formed thereon;
a third packaging layer, formed at least around the LED chip;
wherein an upper surface of the first packaging layer is flush with an upper surface of the second packaging layer, and wherein the first packaging layer exposes the connecting pillar structure, wherein a plurality of metal bumps are formed between the LED chip and the rewiring layer to electrically connect the LED chip and the rewiring layer, and wherein the third packaging layer is further formed among the plurality of metal bumps at a bottom of the LED chip.