Patent ID: 11923427
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A semiconductor device, comprising:
a semiconductor substrate having a drain region, a source region and a channel region between the drain region and the source region;
a control gate over the channel region of the semiconductor substrate;
a select gate over the channel region of the semiconductor substrate and separated from the control gate, wherein the select gate has a first part and a second part, the first part is between the control gate and the second part, and a bottom surface of the second part is higher than a bottom surface of the first part;
a charge trapping structure between the control gate and the semiconductor substrate; and
a dielectric structure between the select gate and the semiconductor substrate, wherein the dielectric structure has a thickness that increases as a distance from the charge trapping structure increases, a portion of the dielectric structure directly below the second part of the select gate comprises a first dielectric layer and a second dielectric layer over the first dielectric layer, and the second dielectric layer comprises oxide.