Patent ID: 11868331
Assignee: nan
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. The system of claim 16, wherein:
the machine-readable instructions that, when executed by the processor, control the system to compact the first data table include machine-readable instructions include machine-readable instructions that, when executed by the processor, control the system to maintain the order of the first-table keys of the matched first-table rows;
the machine-readable instructions that, when executed by the processor, control the system to compact the compacted first data table include machine-readable instructions that, when executed by the processor, control the system to maintain the order of the first-table keys of the twice-matched first-table rows; and
the machine-readable instructions that, when executed by the processor, control the system to compact the reordered second data table include machine-readable instructions that, when executed by the processor, control the system to maintain the order of the second-table keys of the twice-matched second-table rows.