Patent ID: 11914521
Assignee: APPLE INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An apparatus comprising:
a cache memory configured to receive access requests from a plurality of agents, wherein a given request from a given agent of the plurality of agents specifies an identification value associated with that agent; and
a cache controller coupled to the cache memory, wherein the cache controller is configured to:
store indications of current allocations of the cache memory to individual ones of the plurality of agents;
track requests to the cache memory based on identification values specified in the requests; and
determine whether to update allocations of the cache memory to the individual ones of the plurality of agents based on tracked requests, wherein, in determining whether to update allocations, the cache controller is configured to determine weighting values, based on accesses to a system memory, by the individual ones of the plurality of agents;

wherein the cache controller includes a plurality of counters configured to, for a first time interval, count cache access requests for ones of the plurality of agents associated with a first subset of a plurality of data set identifiers, and, for a second time interval, count cache access requests for ones of the plurality of agents associated with a second subset of the plurality of data set identifiers.