Patent ID: 11922069
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 21:
22. A non-transitory computer-readable medium storing code comprising instructions which, when executed by a processor of a memory device, cause the memory device to:
identify a first set of blocks of a memory and a second set of blocks of the memory, wherein the memory comprises a plurality of planes that each comprise a plurality of blocks, wherein each block of the plurality of blocks includes a plurality of non-volatile memory cells, and wherein the second set of blocks is associated with the first set of blocks, and wherein a quantity of blocks included in the second set of blocks is greater than a quantity of blocks included in the first set of blocks;
receive, from a host device, one or more commands for writing first data to the memory in a first mode;
write, in the first mode, a first portion of the first data to the first set of blocks and a second portion of the first data to a first subset of blocks of the second set of blocks based at least in part on receiving the one or more commands from the host device; and
write, in a second mode, a third portion of the first data to a second subset of blocks of the second set of blocks based at least in part on receiving the one or more commands from the host device.