Patent ID: 11922178
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 15:
16. A method of loading data into an accelerator, the method comprising:
loading, by executing instructions with first processor circuitry, compressed machine learning parameter data into a cache accessible by a processor engine, the loaded data including first operable data;
identifying, by executing instructions with the first processor circuitry, that second operable data is present in the loaded data in the cache;
decompressing, with the processor engine, the first operable data into first decompressed data;
executing, with the processor engine, a first machine learning operation using the first decompressed data;
decompressing, with the processor engine, the second operable data into second decompressed data, the identification of the second operable data based on a comparison of bits in a sparsity bitmap to bits in the first decompressed data and the second decompressed data; and
executing, with the processor engine, a second machine learning operation using the second decompressed data.