Patent ID: 11922996
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 8:
9. A system comprising:
a host;
a conductive line;
a semiconductor device coupled to the host by the conductive line, the semiconductor device including a calibration circuit configured to set an impedance of an external terminal of the semiconductor device to a specified value, the calibration circuit comprising:
a model pull-up driver comprising a first transistor,
a model pull-down driver comprising a second transistor;
a pull-up driver calibration circuit configured to determine a first body voltage to apply to the first transistor to set a first drain current to a first value; and
a pull-down driver calibration circuit configured to determine a second body voltage to apply to the second transistor to set a second drain current to a second value, wherein the first and second drain currents cause the impedance to approach the specified value.