Patent ID: 11887668
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A method comprising:
identifying a set of memory cells to be programmed during a program operation;
causing, during a first time period of the program operation, a ramping wordline voltage to be applied to a set of wordlines associated with the set of memory cells;
causing, during the first time period, a disconnection of a set of pillars associated with the set of memory cells from a voltage supply and ground voltage, wherein each pillar corresponds to a programming level of a set of programming levels; and
causing, during a second time period of the program operation, a set of programming pulses to be applied to the set of memory cells, wherein each programming pulse of the set of programming pulses programs each programming level of the set of programming levels associated with the identified set of memory cells.