Patent ID: 11875727
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The gate driving circuit of claim 5, wherein i=j=4, K=8, the K clock signals comprise a first clock signal, a second clock signal, a third clock signal, a fourth clock signal, a fifth clock signal, a sixth clock signal, a seventh clock signal and an eighth clock signal, and each group of shift registers comprises:
a first stage shift register having a clock signal terminal connected to receive the first clock signal, and a first control signal terminal connected to receive the fifth clock signal;
a second stage shift register having a clock signal terminal connected to receive the second clock signal, and a first control signal terminal connected to receive the sixth clock signal;
a third stage shift register having a clock signal terminal connected to receive the third clock signal, and a first control signal terminal connected to receive the seventh clock signal;
a fourth stage shift register having a clock signal terminal connected to receive the fourth clock signal, and a first control signal terminal connected to receive the eighth clock signal;
a fifth stage shift register having a clock signal terminal connected to receive the fifth clock signal, and a first control signal terminal connected to receive the first clock signal;
a sixth stage shift register having a clock signal terminal connected to receive the sixth clock signal, and a first control signal terminal connected to receive the second clock signal;
a seventh stage shift register having a clock signal terminal connected to receive the seventh clock signal, and a first control signal terminal connected to receive the third clock signal; and
an eighth stage shift register having a clock signal terminal connected to receive the eighth clock signal, and a first control signal terminal connected to receive the fourth clock signal.