Patent ID: 11954332
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. A storage device, comprising:
a processor; and
a non-transitory memory coupled to the processor and storing programming instructions for execution by the processor, the programming instructions instruct the processor to:
receive an IO request, wherein the IO request comprises an execution time, and the execution time is used to instruct the storage device to complete processing the IO request before the execution time expires;
execute the IO request based on the execution time of the IO request;
determining a type of the IO request;
wherein there are three types of the IO requests: a first type is an IO request generated externally by the server including the following types of an IO request generated by responding to an operation of a user by a host and an IO request corresponding to a value-added service of the server including snapshooting, cloning, replication being active-active and backup; a second type is an IO request correspond to a key service in the server including reading and writing of metadata; and a third type is an IO request corresponding to an array background task including cache brushing, hard disk reconstruction, and garbage collection;
determining the execution time of the IO request based on the type of the IO request
wherein the storage device comprises a plurality of storage areas, each storage area comprises at least one storage block, the IO request is a write request, and when determining the storage block accessed by the IO request, the programming instructions further instructs the processor to:
select a storage area in which no erase operation is performed from the plurality of storage areas; and
determine, based on the selected storage area, the storage block accessed by the IO request, and
wherein each storage block comprises a plurality of sub-blocks, the sub-block is a minimum unit on which the erase operation is performed, each storage area comprises a read+write mode and a read+erase mode, and when the storage area is used to write data, the storage area is set to the read+write mode; when the storage area is used to perform the erase operation, the storage area is set to the read+erase mode; and when selecting the storage area in which no erase operation is performed from the plurality of storage areas, the programming instructions further instructs the processor to:
select a storage area in the read+write mode from the plurality of storage areas;
determine whether a quantity of idle sub-blocks in the selected storage area is less than a threshold; and
when the quantity of idle sub-blocks in the storage area selected by the selection module is not less than the threshold, use the selected storage area in the read+write mode as the storage area in which no erase operation is performed.