Patent ID: 11955165
Assignee: RAMBUS INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A memory module comprising:
a module substrate having a first module data port, a second module data port, and a third module data port;
first and second memory components each having redundant and interconnected first and second memory-component data interfaces with respective first and second memory-component data ports;
a first memory-component substrate having a first signal trace extending from the first module data port through the first memory-component substrate, a second signal trace extending between the second module data port and the first memory-component data port of the first memory component, the second signal trace forming a first point-to-point connection from the second module data port to the first memory-component data port of the first memory component, and a third signal trace extending between the third module data port and the second memory-component data port of the first memory component; and
a second memory-component substrate having a fourth signal trace extending between the first signal trace of the first memory-component substrate and the first memory-component data port of the second memory component, the first and fourth signal traces forming a second point-to-point connection from the first module data port to the first memory-component data port of the second memory component, and a fifth signal trace extending between the third signal trace of the first memory-component substrate and the second memory-component data port of the second memory component.