Patent ID: 11894275
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A device comprising:
a first fin structure disposed over a substrate, the first fin structure including:
a first semiconductor material layer;
a first dielectric layer disposed on the first semiconductor material layer;
a second semiconductor material layer disposed on the first dielectric layer; and

a second fin structure disposed over the substrate, the second fin structure including a third semiconductor material layer;
a first capping layer disposed directly on the third semiconductor material layer of the second fin structure;
a second capping layer disposed directly on the first dielectric layer of the first fin structure;
a first gate dielectric layer disposed directly on the first capping layer that is disposed directly on the third semiconductor material layer of the second fin structure; and
a first gate electrode layer disposed directly on the first gate dielectric layer.