Patent ID: 11955332
Assignee: APPLIED MATERIALS, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A processing system, comprising:
a first processing chamber;
a second processing chamber;
a third processing chamber;
a fourth processing chamber; and
a system controller configured to cause the processing system to:
pre-clean a surface of a substrate in the first processing chamber;
deposit a high-κ gate dielectric layer on the substrate in the second processing chamber; and
perform a plasma nitridation process in the third processing chamber, to insert nitrogen atoms in the deposited high-κ gate dielectric layer; and
subsequent to the plasma nitridation process, perform a post-nitridation anneal and re-oxidation process, in the fourth processing chamber, to passivate the remaining chemical bonds in the plasma nitridated high-κ gate dielectric layer and thermally oxidize the substrate, the post-nitridation anneal and re-oxidation process comprises annealing the high-κ gate dielectric layer in an oxygen (O2), nitrous oxide (N2O), and H2 ambient at a temperature of between 400° C. and 900° C.