Patent ID: 11862634
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A semiconductor structure, comprising:
first silicon-containing layers, second silicon-containing layers, third silicon-containing layers, and fourth silicon-containing layers vertically suspended over a substrate and laterally spaced apart from each other, wherein the first silicon-containing layers and the second silicon-containing layers are narrower than the third silicon-containing layers and the fourth silicon-containing layers;
first source/drain features, second source/drain features, third source/drain features, and fourth source/drain features attaching to opposite sides of the first silicon-containing layers, the second silicon-containing layers, the third silicon-containing layers, and the fourth silicon-containing layers, respectively,
wherein the first source/drain features are merged with the second source/drain features while the third source/drain features are spaced apart from the fourth source/drain features.