Patent ID: 11894063
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 7:
8. A semiconductor memory device comprising:
a substrate;
a plurality of first conductive layers arranged in a first direction intersecting with a surface of the substrate;
a second conductive layer disposed at a position overlapping with the plurality of first conductive layers viewed from the first direction;
a third conductive layer disposed at a position overlapping with the plurality of first conductive layers viewed from the first direction, the third conductive layer being arranged with the second conductive layer in a second direction intersecting with the first direction;
a first semiconductor column extending in the first direction and opposed to the plurality of first conductive layers and the second conductive layer;
a first electric charge accumulating layer disposed between the plurality of first conductive layers and the first semiconductor column;
a second semiconductor column extending in the first direction and opposed to the plurality of first conductive layers and the third conductive layer;
a second electric charge accumulating layer disposed between the plurality of first conductive layers and the second semiconductor column;
a fourth conductive layer disposed between the second conductive layer and the third conductive layer, the fourth conductive layer extending in a third direction intersecting with the first direction and the second direction;
a first insulating layer disposed between the second conductive layer and the fourth conductive layer; and
a second insulating layer disposed between the third conductive layer and the fourth conductive layer, wherein
the fourth conductive layer has a length in the first direction larger than a length of the second conductive layer in the first direction and a length of the third conductive layer in the first direction.