Patent ID: 11894073
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 14:
15. The method as set forth in claim 14, wherein the plurality of word lines and a plurality of dielectric layers extend horizontally and overlay one another in an alternating fashion in a stack, the strings extend vertically through the stack, the memory cells connected in series between at least one drain-side select gate transistor on a drain-side of each of the strings and connected to one of the plurality of bit lines and at least one source-side select gate transistor on a source-side of each of the strings and connected to a source line, the at least one edge word line being disposed vertically above the plurality of other data word lines, wherein, among the plurality of word lines, the at least one edge word line is nearest to the at least one drain-side select gate transistor.