Patent ID: 11882729
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. The method according to claim 11, wherein the display substrate further includes a power line and a sensing signal line that are electrically connected to the pixel driving circuit; the first source is electrically connected to the power line; the pixel driving circuit further includes a third transistor, and the third transistor includes a third gate, a third semiconductor active pattern, and a third drain; the third semiconductor active pattern includes a third channel portion, a third source portion and a third drain portion, and electrical conductivities of the third source portion and the third drain portion are greater than an electrical conductivity of the third channel portion; the third source portion and the third storage electrode are connected to each other, and are of an integral structure; and the third drain is in contact with the third drain portion, and is electrically connected to the sensing signal line;
the first transistor and the third transistor are located at both sides of the first storage capacitor in an extension direction of the sensing signal line; and for third gates of third transistors located in any row of sub-pixels, portions of the gate line connected to second transistors in an adjacent row of sub-pixels closest to the third transistors in the row of sub-pixels serve as the third gates of the third transistors; and
forming the pixel driving circuit further includes: simultaneously forming the third semiconductor active pattern in a process of forming the second semiconductor active pattern;
the method further comprises:
simultaneously forming the third drain, the power line, and the sensing signal line in a process of forming the data line.