Patent ID: 11914540
Assignee: LEMON INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. A data processing method, applied to an on-chip integrated circuit, wherein the on-chip integrated circuit comprises: a processor circuit and an accelerator circuit, wherein the processor circuit comprises a processor and a data storage area, and the processor is connected to the data storage area through a first bus arranged in the processor circuit, the accelerator circuit comprises an accelerator and a second bus, the accelerator is connected to the second bus, the second bus is bridged with the first bus, wherein the data storage area is one of a plurality of data storage areas included in the processor circuit, the processor circuit further comprises a plurality of first bridge points, and there is a one-to-one correspondence between the data storage areas and the first bridge points, the accelerator circuit further comprises a plurality of second bridge points, and there is a one-to-one correspondence between the first bridge points and the second bridge points, and each of the second bridge points is connected to a corresponding first bridge point through the second bus,
wherein the data processing method comprises:
determining, in response to receiving a data processing request, an address of data to be processed corresponding to the data processing request;
sending the address to the accelerator circuit;
accessing, by the accelerator through the second bus in the accelerator circuit, the data storage area to obtain the data to be processed from the data storage area; and, transmitting, by the accelerator circuit, a calculation result of the accelerator to the data storage area through the second bus in the accelerator circuit.