Patent ID: 11901422
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A semiconductor device, comprising:
a source/drain region in a fin-type active pattern;
a gate structure adjacent to the source/drain region, the gate structure including sidewall spacers on opposite sidewalls thereof;
a silicon oxide layer on the source/drain region and the gate structure;
a shared contact plug penetrating through the silicon oxide layer, the shared contact plug including:
a first lower portion connected to the source/drain region,
a second lower portion connected to the gate structure, a bottom of the second lower portion having a flat area and is at a level higher than a bottom of the first lower portion, and
an upper portion connected to upper surfaces of the first lower portion and the second lower portion; and

a silicon nitride film surrounding a sidewall of the first lower portion,
wherein the silicon oxide layer includes a first portion between the silicon nitride film and a corresponding one of the sidewall spacers of the gate structure.