Patent ID: 11862637
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. The integrated circuit device of claim 6, wherein the plurality of gates are poly gates, the integrated circuit device further comprising:
a VSS power rail;
a second active area extending in the first direction, wherein the plurality of poly gates contact the second active area;
a first NMOS transistor including the second active area and the first poly gate, the first NMOS transistor having the first VT;
a second NMOS transistor including the second active area and the second poly gate, the second NMOS transistor having the second VT; and
an NMOS tie-off transistor positioned between the first NMOS transistor and the second NMOS transistor, the NMOS tie-off transistor including the first active area and the third poly gate, wherein the third poly gate is connected to the VSS power rail, and wherein the third poly gate includes a cut poly between the first and second active areas.