Patent ID: 11916062
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A microelectronic device, comprising:
a protected line;
a reference line separate from the protected line;
an active field effect transistor (FET) having a drain coupled to the protected line, a source coupled to the reference line, and a gate;
an electrostatic discharge (ESD) trigger circuit coupled to the gate of the active FET, wherein the ESD trigger circuit includes an ESD trigger high-pass filter coupled between the protected line and the reference line, the ESD trigger high-pass filter having an ESD trigger output line coupled to the gate of the active FET, the ESD trigger high-pass filter being configured to turn on the active FET when a first overvoltage transient occurs on the protected line, the first overvoltage transient being characteristic of an ESD event;
a gate control circuit coupled to the gate of the active FET, the gate control circuit including an active FET shunt transistor having a drain coupled to the gate of the active FET, a source coupled to the reference line, and a gate; and
a transient detection circuit having a high bandwidth detector, an ESD detector, and an output driver, wherein:
the high bandwidth detector includes a blocking capacitor coupled between the protected line and the output driver, wherein the blocking capacitor is configured to provide an ENABLE signal to the output driver when the first overvoltage transient occurs on the protected line;
the ESD detector includes a input high-pass filter and an voltage discriminator, the input high-pass filter being coupled to the voltage discriminator, the input high-pass filter being configured to apply a sufficient potential to the voltage discriminator to activate the voltage discriminator when the first overvoltage transient occurs on the protected line, the voltage discriminator having a first output line coupled to the output driver and a second output line coupled to the output driver, the voltage discriminator being configured to provide a potential to the output driver that is close to a potential of the reference line when triggered by the input high-pass filter; and
the output driver includes an output FET, a low-pass filter, and an output node, the output FET having a drain coupled to the protected line, a source coupled to the low-pass filter, and a gate coupled to the blocking capacitor of the high bandwidth detector and to the second output line of the voltage discriminator, the low-pass filter being coupled between the source of the output FET and the reference line, low pass the low-pass filter being coupled to the output node, the output node being coupled to the gate of the active FET shunt transistor of the gate control circuit and to the first output line of the voltage discriminator, wherein the ENABLE signal is implemented as a voltage sufficient to turn on the output FET of the output driver.