Patent ID: 11862294
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 16:
17. An apparatus comprising:
a printed circuit board comprising a first set of traces coupled to a first command and address bus and a second set of traces coupled to a second command and address bus, wherein the printed circuit board further comprises a clock signal splitter circuit configured to receive the clock signal via a first leg and to contemporaneously route the clock signal via a second leg and a third leg that is connected in parallel with the second leg;
a first register clock driver circuit configured to receive the clock signal from the second leg and first command and address information from the first command and address bus, wherein the first register clock driver circuit is further configured to provide the first subchannel command and address information responsive to the clock signal;
a second register clock driver circuit configured to receive the clock signal from the third leg and second command and address information from the second command and address bus, wherein the second register clock driver circuit is further configured to provide the second subchannel command and address information responsive to the clock signal.