Patent ID: 11901321
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 16:
17. A storage device comprising:
a nonvolatile memory (NVM) device comprising NVM cells; and
a memory controller configured to control the NVM device,
wherein the NVM device comprises:
a first chip including
a peripheral circuit region comprising a control logic circuit configured to control operation modes of the NVM device, and
a control circuit region comprising a memory management unit (MMU) included in the memory controller and configured to set and change operation conditions of the NVM device, the peripheral circuit region and the control circuit region being on a first surface of a first substrate of the first chip; and

a second chip including three-dimensional (3D) arrays of the NVM cells, the 3D arrays are on a first surface of a second substrate of the second chip, and the second chip being vertically stacked on the first chip so that the first surface of the first substrate is bonded with the first surface of the second substrate, and

wherein the control logic circuit is adjacent to the MMU and is connected to the MMU.