Patent ID: 11863300
Assignee: GENERAL ELECTRIC COMPANY
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A system comprising:
one or more processors configured to determine clock drifts and clock variances of plural nodes in a time-sensitive Ethernet network, the one or more processors also configured to determine an eigenvalue centrality metric based on a location of one or more of the nodes in the time-sensitive network,
wherein the one or more processors are configured to dynamically allocate a guard band to one or more of the nodes to prevent communication of one or more Ethernet frames through the one or more nodes during the guard band in a time sensitive network schedule of the Ethernet network, the one or more processors configured to dynamically allocate the guard band based on the clock drifts, the clock variances, and the eigenvalue centrality metric.