Patent ID: 11868244
Assignee: QUALCOMM INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. The method of claim 1, further comprising:
in response to receiving a cache line write request for the first cache line:
compressing the first cache line to obtain a first updated cache line of a first size;
in accordance with a determination that the first size is equal to or less than a first predetermined size of the candidate compressed cache line, writing the first updated cache line to the candidate compressed cache line;
in accordance with a determination that the first size is more than the first predetermined size and equal to or less than a second predetermined size of the candidate compressed cache line, performing a read-modify-write operation on the candidate compressed cache line based on the first updated cache line; and
in accordance with a determination that the first size is more than the second predetermined size of the candidate compressed cache line, performing a read-modify-write operation on the candidate compressed cache line and a read-modify-write operation on an overflow block of the plurality of overflow blocks, based on the first updated cache line.