Patent ID: 11863195
Assignee: PIXART IMAGING INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 3:
4. The ADC device of claim 3, wherein the DLL control circuit 1252 comprises:
a first flip-flop, coupled to an output of a last flip-flop of the plurality of flip-flops, having a clock input coupled to the clock signal generated by the oscillator circuit, having a reset input coupled to the reset signal, and having an output for generating a first guard signal;
a second flip-flop, coupled to an output of the first flip-flop, having a clock input coupled to the clock signal generated by the oscillator circuit, having a reset input coupled to the reset signal, and having an output for generating a second guard signal; and
an up/down counter, coupled to the reset signal, the first guard signal, and the second guard signal, for comparing the reset signal with the first guard signal to generate a first decision signal, comparing the reset signal with the second guard signal to generate a second decision signal, generating the control signal to control the delay generated by the delay unit of the oscillator circuit according to the first decision signal and the second decision signal.