Patent ID: 11887536
Assignee: LG DISPLAY CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A pixel circuit comprising:
a driving element comprising a first electrode electrically connected to a first node to which a pixel driving voltage is applied, a gate electrode electrically connected to a second node, and a second electrode electrically connected to a third node;
a light-emitting element comprising an anode electrode electrically connected to a fourth node and a cathode electrode to which a low-potential power supply voltage is applied;
a first switch element comprising a first electrode to which an initialization voltage is applied, a gate electrode to which an initialization pulse is applied, and a second electrode electrically connected to the second node, the first switch element is configured to supply the initialization voltage to the second node in response to the initialization pulse;
a second switch element comprising a first electrode electrically connected to the third node or the fourth node, a gate electrode to which a sensing pulse is applied, and a second electrode to which a reference voltage is applied, the second switch element is configured to supply the reference voltage to the third node or the fourth node in response to the sensing pulse;
a third switch element comprising a first electrode to which a data voltage is applied, a gate electrode to which a scan pulse is applied, and a second electrode electrically connected to the second node, the third switch element is configured to supply the data voltage to the second node in response to the scan pulse; and
a fourth switch element comprising a first electrode electrically connected to the third node, a gate electrode to which a first emission control pulse is applied, and a second electrode electrically connected to the fourth node, the fourth switch element is configured to connect the third node to the fourth node in response to the first emission control pulse; wherein the fourth switch is disabled during a time period in which at least one of the first or second switch is enabled and is enabled during a time period when both of the first and second switches are disabled.