Patent ID: 11903190
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A three-dimensional memory device comprising a memory die that includes:
an alternating stack of insulating layers and electrically conductive layers;
memory openings vertically extending through the alternating stack;
memory opening fill structures located in the memory openings, wherein each of the memory opening fill structures comprises a memory film and two vertical semiconductor channels, and the memory openings and the memory opening fill structures are arranged in rows that laterally extend along a first horizontal direction and are laterally spaced from each other along a second horizontal direction; and
drain-select-level dielectric isolation structures extending through each row of the memory opening fill structures at least at a level of a topmost one of the electrically conductive layers;
wherein:
each of the drain-select-level dielectric isolation structures has a uniform width along the second horizontal direction and contacts bottom surfaces of a respective row of the drain regions that is arranged along the first horizontal direction; and
each of the memory opening fill structures comprises a dielectric core contacting inner sidewalls of the two vertical semiconductor channels and contacting a pair of lengthwise sidewalls and a bottom surface of a respective one of the drain-select-level dielectric isolation structures.