Patent ID: 11886749
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A memory system, comprising:
one or more memory devices; and
a controller coupled with the one or more memory devices, the controller configured to:
transmit, to a queue associated with the one or more memory devices, a first access command associated with a first access operation of the one or more memory devices;
receive, from the queue, an interrupt associated with an indication of completion of the first access operation on the one or more memory devices based at least in part on the first access command; and
process, for transmission to a host system, the indication of completion of the first access operation on the one or more memory devices according to a polling mode based at least in part on receiving the interrupt associated with the indication of completion of the first access operation on the one or more memory devices.