Patent ID: 11928411
Assignee: QUALCOMM INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. A system, comprising:
at least one memory having executable instructions stored thereon; and
one or more processors configured to execute the executable instructions to cause the system to:
receive a plurality of test cases for an integrated circuit, each respective test case of the plurality of test cases identifying a set of operating conditions and fabrication properties for the integrated circuit;

generate an embedding data set from the plurality of test cases, wherein a respective embedding for a respective test case of the plurality of test cases comprises a mapping of the respective test case into a multidimensional space;
generate, based on a clustering model and the embedding data set, a plurality of test case clusters;
select a plurality of critical test cases for testing the integrated circuit based on the plurality of test case clusters, each respective test case in the plurality of critical test cases corresponding to a centroid of a respective test case cluster; and
time the integrated circuit based on the plurality of critical test cases and a hard macro defining the integrated circuit;

wherein:
each test case in the plurality of test cases is associated with a timing analysis; and
in order to generate the embedding data set from the plurality of test cases, the one or more processors are configured to:
generate a set of latent space representations of encodings for the plurality of test cases using a first neural network;
predict, using a second neural network, a timing analysis for a second set of test cases based on the timing analysis associated with each test case in the plurality of test cases; and
generate, for each respective test case in the plurality of test cases, an embedding in a global test case embedding space based on a latent space representation of an encoding for the respective test case and predicted timing analysis for the respective test case, wherein the global test case embedding space is configured to generate co-located embeddings for test cases with similar predicted timing analyses.