Patent ID: 11879940
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A method, comprising:
receiving a signal that indicates a number of pulses to test a memory, wherein the memory includes an error checking and correction (ECC) memory array and a data memory array, and the ECC memory array stores an ECC bit that corresponds to data that is stored in the data memory array;
generating an automatic test pattern generator (ATPG) mode signal for a call, the ATPG mode signal indicating whether a first data or a second data is output from a cell; and
selecting between a clocked logic array that receives the first data and a memory array that receives the second data in response to the ATPG mode signal, the ATPG mode signal causes an output from the clocked logic array to be routed from the memory in a first mode and an output of the memory array to be routed from the memory in a second mode.