Patent ID: 11923448
Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 2:
3. The semiconductor device of claim 2, further comprising:
third and fourth device areas that are each electrically isolated from the second device area and each extend to the upper surface;
a third region of type III-V semiconductor material that is formed on the upper surface over the third device area and is laterally electrically insulated from the second region of type III-V semiconductor material;
a fourth region of type III-V semiconductor material that is formed on the upper surface over the fourth device area and is laterally electrically insulated from the second region of type III-V semiconductor material;
third and fourth high-electron mobility transistors integrally formed respectively in the third and fourth regions of type III-V semiconductor material; and
fifth and sixth high-electron mobility transistors integrally formed respectively in the second region of type III-V semiconductor material,
wherein the third, fourth, fifth and sixth high-electron mobility transistors each comprise source and drain terminals and are configured to control a conductive connection between the respective source and drain terminals,
wherein the third and fifth high-electron mobility transistors are connected in series with the source of the third high-electron mobility transistor connected to the drain of the fifth high-electron mobility transistor, and
wherein the fourth and sixth high-electron mobility transistors are connected in series with the source of the fourth high-electron mobility transistor connected to the drain of the sixth high-electron mobility transistor.