Patent ID: 11869820
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. A method of fabricating a packaged device, comprising:
forming an integrated circuit (IC), comprising:
forming a substrate including circuitry configured for a function, the circuitry including at least one stress sensitive circuit portion, with at least a portion of nodes in the circuitry electrically coupled to bond pads provided by a top metal layer, wherein there are bonding features on the bond pads;
forming a continuous metal wall that is ring-shaped positioned above the top metal layer that is not electrically coupled to the circuitry;
wherein the stress sensitive circuit portion is positioned with at least a majority of its area within an inner area of the substrate that is framed by the continuous metal wall to provide a cavity;

providing a leadframe including leads or lead terminals;
wherein the stress sensitive circuit portion comprises an environmental sensor for sensing a physical parameter, and wherein the leadframe has opening configured so that the stress sensitive circuit portion is exposed to an environment;
wherein the bonding features are bonded to the leads or to the lead terminals; and
covering the IC with a mold compound, wherein at least a portion of the mold compound is excluded from being inside the continuous metal wall.