Patent ID: 11966718
Assignee: RENESAS ELECTRONICS CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A method executed in a virtual developmental environment apparatus comprising a central processing unit and a memory executing a simulation of a MILS (Model In the Loop Simulation) model and a simulation of a virtual ECU (Electronic Control Unit) perform vHILS (Virtual Hardware In the Loop Simulation) in cooperation, the method comprising the steps of:
storing, in the memory, the MILS model including controller block that includes an input port and an output port and a plant block to be controlled by the controller block, first setting information for specifying a controller block in MILS model, a program for realizing a function of the controller block to be used when executing a simulation of the virtual ECU, and second setting information describing a list of I/O (Input/Output) ports usable in the virtual ECU are stored;
specifying a controller block in MILS model based on the first setting information;
arranging a bridge for connecting the input port and the output port and the I/O port of the virtual ECU on the input port and the output port of the identified controller block; and connecting the I/O ports of the bridge and the virtual ECU based on the second setting information.