Patent ID: 11935966
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A transistor device, comprising:
a first source/drain region and a second source/drain region extending in an upward direction;
a gate insulator layer;
a channel layer electrically connected to the first and second source/drain regions and laterally disposed on the gate insulator layer;
a gate electrode laterally covered by the gate insulator layer and isolated from the channel layer by the gate insulator layer; and
a UV-attenuating layer disposed over the first and second source/drain regions, the gate electrode, the gate insulator layer, and the channel layer to protect the channel layer from characteristic degradation caused by UV light and act as an intermetal dielectric layer for forming a source/drain via contact therein, the UV-attenuating layer being in direct contact with the channel layer.