Patent ID: 11876119
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 16:
17. A method of forming a semiconductor device, comprising:
forming a channel layer over a substrate;
forming an isolation feature over the substrate;
forming a gate structure over the isolation feature and engaging the channel layer;
forming a dielectric feature over the isolation feature and on a sidewall of the gate structure, wherein the channel layer, the gate structure, and the dielectric feature are at a frontside of the semiconductor device, and the substrate is at a backside of the semiconductor device;
thinning the substrate from the backside of the semiconductor device to expose a bottom surface of the isolation feature;
etching the isolation feature to form a trench exposing a bottom surface of the dielectric feature; and
depositing a dielectric layer in the trench.