Patent ID: 11881467
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A semiconductor package comprising:
a first semiconductor chip having a first active surface on which a first connection pad is disposed;
a second semiconductor chip, disposed around the first semiconductor chip, having a second active surface on which a second connection pad is disposed;
a first connection structure including a first insulating layer disposed on the first and second active surfaces, a first redistribution layer disposed on a lower surface of the first insulating layer, and first connection vias penetrating through the first insulating layer, electrically connecting the first redistribution layer to the first and second connection pads;
an interconnection bridge disposed on the first connection structure and connected to the first redistribution layer to electrically connect the first and second connection pads to each other; and
a second connection structure including a second insulating layer disposed on the lower surface of the first insulating layer to cover the first redistribution layer and the interconnection bridge, a second redistribution layer disposed on a lower surface of the second insulating layer, and second connection vias penetrating through the second insulating layer and electrically connecting the first and second redistribution layers to each other,
in a plan view, the interconnection bridge overlaps at least a portion of each of the first and second semiconductor chips,
wherein the first and second connection vias are tapered in a direction toward the first and second connection pads, and
wherein the second connection vias contact the first redistribution layer at a level lower than the lower surface of the first insulating layer.