Patent ID: 11957061
Assignee: WINBOND ELECTRONICS CORP.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a substrate;
a first dielectric layer disposed on the substrate, the first dielectric layer around a first metal interconnection;
a second dielectric layer disposed on the first dielectric layer, the second dielectric layer around a via and a second metal interconnection, the second metal interconnection directly contacting the first metal interconnection; and
a third dielectric layer disposed on the second dielectric layer, the third dielectric layer around a first magnetic tunneling junction (MTJ) structure and a third metal interconnection, wherein the third metal interconnection directly contacts top surfaces of the first MTJ structure and the second metal interconnection, and the first MTJ structure directly contacts the via.