Patent ID: 11915743
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 9:
10. The method of claim 1, further comprising:
coupling an output of a first transmission gate to the first bit line;
coupling a first clock input of the first transmission gate to the word line to receive the clock signal;
coupling a second clock input of the first transmission gate to receive a complement of the clock signal;
coupling an input terminal of the first transmission gate to receive a data input signal;
coupling an output of a second transmission gate to the second bit line;
coupling a first clock input of the second transmission gate to the word line to receive the clock signal;
coupling a second clock input of the second transmission gate to receive the complement of the clock signal;
coupling an input terminal of the second transmission gate to receive a complement of the data input signal.