Patent ID: 11948842
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A device, comprising:
a substrate including silicon;
semiconductor fins over the substrate;
a dielectric liner layer on sidewalls of the semiconductor fins;
an etch stop layer over the substrate and laterally between a first one and a second one of the semiconductor fins;
an isolation structure over the etch stop layer, wherein the semiconductor fins extend above a top surface of the isolation structure;
a high-k metal gate structure over the isolation structure, the dielectric liner layer, and the semiconductor fins; and
a dielectric feature penetrating through the high-k metal gate structure and reaching into the isolation structure, wherein the etch stop layer includes a material different than that of the isolation structure, wherein a combination of the isolation structure and the dielectric feature extend laterally from a first portion of the dielectric liner layer on the first one of the semiconductor fins to a second portion of the dielectric line layer on the second one of the semiconductor fins.