Patent ID: 11901256
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A semiconductor package, comprising:
a circuit structure;
a semiconductor device, located on and electrically connected to the circuit structure, and comprising:
a substrate having a first portion, a second portion and a third portion connecting the first portion and the second portion, wherein a vertical size of the first portion of the substrate is greater than a vertical size of the second portion of the substrate along the stacking direction of the first portion, the second portion and the third portion;
an interconnect structure, located on the first portion of the substrate; and
conductive vias, located on the interconnect structure, wherein the interconnect structure is located between the conductive vias and the substrate; and

an insulating material, located between the semiconductor device and the circuit structure, wherein the insulating material further extends onto the first portion of the substrate.