Patent ID: 11934684
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A data storage device, comprising:
a memory; and
a controller coupled to the memory, the controller comprising a host interface module (HIM), one or more non-volatile memory (NVM) express (NVMe) modules, one or more aggregated queue depth (QD) modules, and a QD limiter, the controller configured to:
determine a bandwidth allocation percentage for one or more tenants, wherein each of the one or more tenants has at least a read bandwidth and a write bandwidth; and
allocate a maximum data transfer size (MDTS) for each of the one or more tenants based on an aggregated queue depth (QD) setting for each of the one or more tenants based on the bandwidth allocation percentage for the one or more tenants using the one or more aggregated QD modules.