Patent ID: 11949421
Assignee: SYNOPSYS, INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. The method of claim 6, wherein, during the calibration process, the method further includes:
determining an amount of duty-cycle adjustment to be continuously applied to the single-ended clock signal in dependence upon detected duty cycles of the differential output clock signals;
generating the duty-cycle continuous control signal in dependence upon the determined amount of duty-cycle adjustment to be continuously applied to the single-ended clock signal;
determining an amount of duty cycle second control signal adjustment to be applied to the differential clock signals in dependence upon detected duty cycles of the differential output clock signals during the calibration; and
generating the duty cycle second control signal in dependence upon the determined amount of duty-cycle second adjustment during the calibration to be applied as a fixed amount while the continuously applied amount of duty-cycle adjustment applied to the single-ended clock signal is varied.