Patent ID: 11929134
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 20:
21. A method, comprising:
reading one or more bits, associated with a memory built-in self-test for a memory device, that are stored in a mode register of the memory device;
identifying, based on the one or more bits, whether the memory built-in self-test is enabled for one or more memory sections of a plurality of memory sections associated with the memory device or whether the memory built-in self-test is disabled for all memory sections of the plurality of memory sections associated with the memory device; and
setting a control signal bit of the memory device to a first value and initiating the memory built-in self-test for a subset of the plurality of memory sections associated with the memory device based on identifying that the memory built-in self-test is enabled for the one or more memory sections of the plurality of memory sections associated with the memory device,
wherein the control signal bit of the memory device indicates a status of the memory built-in self-test while the memory built-in self-test is enabled for the one or more memory sections of the plurality of memory sections associated with the memory device, and indicates a status of a data masking function or a data inversion function of the memory device while the memory built-in self-test is disabled for all memory sections of the plurality of memory sections associated with the memory device.