Patent ID: 11892865
Assignee: EXCELIO TECHNOLOGY (SHENZHEN) CO., LTD.
Field: Control (Instruments)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A mixed signal control circuit for eliminating a degenerate metastable state of a bandgap reference circuit, comprising: a start-up circuit, a mirror current unit, a self-biased bandgap reference temperature compensation loop circuit, an output circuit and a degenerate state elimination circuit, wherein:
the degenerate state elimination circuit includes a non-volatile memory cell, a digital-to-analog conversion module and a delay switch unit, wherein the non-volatile memory cell has stored preset binary data, which corresponds to a voltage value set by a key node in the self-biased bandgap reference temperature compensation loop circuit,
an input terminal of the digital-to-analog conversion module is connected to a clock signal module and the non-volatile memory cell, and is configured to convert the binary data stored in the non-volatile memory cell into an analog signal, which is outputted as a transmission signal through the delay switch unit and connected to a node that needs to be clamped by a voltage in the self-biased bandgap reference temperature compensation loop circuit; at the same time, an output identification signal outputted by the digital-to-analog conversion module is connected to a delay signal input terminal of the delay switch unit, wherein the output identification signal maintains a low-level state before the digital-to-analog conversion module completes the conversion from the binary data to the analog voltage signal, and is set to a logic high-level after the digital-to-analog conversion module completes the digital-to-analog conversion, and
an initial state of the delay switch unit is a turned-on state, when the output identification signal of the digital-to-analog conversion module reaches a control gate of the delay switch unit after a certain delay, the delay switch unit is turned off; when the circuit starts, the delay switch unit is in the initial turned-on state, a system reads the data in the non-volatile memory cell, and generates a clamping voltage value through the digital-to-analog conversion module, which is connected to the clamping node in the self-biased bandgap reference circuit; driven by the voltage of the clamping node, a differential amplifier in the self-biased bandgap reference temperature compensation loop circuit directly enters a design-required DC operating point, and establishes a feedback loop with effective error correction capability; when the establishment process completes, the delay switch unit is turned off; and the degenerate state elimination circuit completes its task and no longer affects the bandgap reference circuit, thereby preventing the bandgap reference circuit from falling into the degenerate metastable state due to the limitations of loop bandwidth and loop gain during start-up process.