Patent ID: 11954585
Assignee: ZJU-HANGZHOU GLOBAL SCIENTIFIC AND TECHNOLOGICAL INNOVATION CENTER
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A multi-mode array structure for in-memory computing, comprising:
an array of memory cells, function lines corresponding to all the memory cells measured by rows in the array of memory cells, and complementary function lines and bit lines (BL) corresponding to all the memory cells measured by columns in the array of memory cells, wherein
the memory cell is configured to match a search state of a search signal input from a corresponding complementary function line with a stored data bit in the memory cell, and output a matching result to the corresponding function line, thereby enabling a ternary content addressable memory (TCAM) function;
the memory cell is configured to calculate an analogue signal or a pulse signal input from a corresponding function line with a neural network weight value set in the memory cell, and output a calculation result to a corresponding bit line (BL), thereby enabling a corresponding convolutional neural network (CNN) or spiking neural network (SNN) operation;
when the ternary content addressable memory (TCAM) function is performed, a differential amplifier is in an off state, a corresponding stored data bit in the memory cell is one of 0, 1, and X, and an input search signal corresponds to a search state of being 0 or 1;
when the stored data bit in the memory cell connected to the corresponding function line in all the memory cells measured by rows is X, an output of the corresponding function line is a higher level; when the stored data bit in the memory cell connected to the corresponding function line in all the memory cells measured by rows is 0 or 1, and the stored data bit is consistent with the search state corresponding to the search signal, the output of the corresponding function line is the higher level; when the data bit, connected to the corresponding function line, stored in at least one memory cell in all the memory cells measured by rows is 0 or 1, and the stored data bit is inconsistent with the search state corresponding to the search signal, the output of the corresponding function line is a lower level.