Patent ID: 11894376
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A method of fabricating an integrated circuit device, the method comprising:
forming a fin-type active region on the substrate;
forming a plurality of source/drain regions on the fin-type active region;
forming an insulating structure covering the fin-type active region and the plurality of source/drain regions, the insulating structure defining a plurality of gate spaces;
forming a gate stack structure in a first gate space among the plurality of gate spaces, the gate stack structure comprising a first work function metal-containing layer; and
forming an isolation stack structure in a second gate space among the plurality of gate spaces that is adjacent the first gate space, the isolation stack structure comprising a second work function metal-containing layer, wherein the second work function metal-containing layer comprises a same material as the first work function metal-containing layer and has a different thickness from the first work function metal-containing layer.