Patent ID: 11968914
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 7:
8. A memory device, comprising:
a dielectric fin structure;
a first resistive material structure comprising a first vertical portion extending vertically and in parallel to a first sidewall of the dielectric fin structure, and first horizontal portion extending horizontally away from the dielectric fin structure in a first direction;
a second resistive material structure comprising a second vertical portion extending vertically and in parallel to a second sidewall of the dielectric fin structure, the second sidewall being opposite the first sidewall, and wherein the second resistive material structure further comprises a second horizontal portion extending horizontally away from the dielectric fin structure in a second direction opposite the first direction;
a first electrode coupled to respective bottom surfaces of the first and second horizontal portions;
a second electrode coupled to the first vertical portion of the first resistive material structure; and
a third electrode coupled to the second vertical portion of the second resistive material structure.