Patent ID: 11949500
Assignee: STMICROELECTRONICS S.R.L.
Field: Telecommunications (Electrical engineering)
Classification: CPC G  H | IPC H

Claim 11:
12. A system, comprising:
a first secondary sensor device including a first secondary slave circuit;
a second secondary sensor device including a second secondary slave circuit;
a primary sensor device including:
a first secondary master circuit coupled to the first secondary slave circuit;
a second secondary master circuit coupled to the second secondary slave circuit; and
a primary slave circuit; and

a control device including a primary master circuit coupled to the primary slave circuit and the first and second secondary master circuits, wherein:
the primary master circuit outputs a primary clock signal to the primary slave circuit and to the first and second secondary slave circuits;
the first secondary master circuit generates a first secondary clock signal having a clock signal to the first secondary sensor device; and
the second secondary master circuit generates a second secondary clock signal having a frequency lower than the frequency of the primary clock signal.