Patent ID: 11943816
Assignee: QUALCOMM INCORPORATED
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 25:
26. The apparatus of claim 25, wherein the instructions are further executable by the processor to cause the apparatus to:
transmit, based at least in part on receiving the random access preamble on the first receive beam, the first random access response message to the UE on a first transmit beam corresponding to the first synchronization signal block; and
transmit, based at least in part on receiving the random access preamble on the second receive beam, a second random access response message to the second UE on a second transmit beam corresponding to the second synchronization signal block, wherein the second synchronization signal block is the same as the first synchronization signal block, or the second synchronization signal block is different from the first synchronization signal block.