Patent ID: 11915786
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A memory device, comprising:
an array of memory cells comprising a plurality of columns of memory cells;
a plurality of bit lines respectively coupled to the plurality of columns of memory cells;
a current control circuit comprising a first transistor and coupled to the plurality of bit lines to control a discharge current in a discharge operation, wherein the discharge operation discharges a charge on the plurality of bit lines; and
a discharge enable circuit connected between the current control circuit and a ground voltage source, a first terminal of the first transistor being in direct connection with one of the bit lines, a second terminal of the first transistor being in direct connection with the discharge enable circuit, and a third terminal of the first transistor being in connection with a reference current generator,
wherein:
in the discharge operation, the first transistor is turned on by the reference current generator, and a discharge current of the plurality of bit lines sequentially flows from the plurality of bit lines to the first transistor, the discharge enable circuit and the ground voltage source, the reference current generator collaborating with the first transistor to establish a current mirror, and the discharge current matching, through the current mirror, a reference current provided by the reference current generator.