Patent ID: 11935603
Assignee: INFINEON TECHNOLOGIES AG
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A system, comprising:
an array of non-volatile memory cells arranged in rows to be selected by word lines and columns to be selected, for writing and reading as a NOR flash memory;
a plurality of reference word lines comprising first reference word lines and second reference word lines, each to select corresponding supplemental non-volatile memory cells;
a plurality of sense amplifiers selectably coupled to the supplemental non-volatile memory cells of the plurality of reference word lines, and, via bit lines, to the non-volatile memory cells of the array; and
a controller, to:
write system data to selected supplemental non-volatile memory cells of the first reference word lines;
read the system data, through the sense amplifiers comparing the selected supplemental non-volatile memory cells of the first reference word lines and selected reference non-volatile memory cells of the second reference word lines; and
determine a status of erasure of the non-volatile memory cells of the array, based on such reading the system data.