Patent ID: 11881771
Assignee: NXP USA, INC.
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A controller for a half-bridge power circuit comprising a high-side switch and a low-side switch, wherein the high-side switch and the low-side switch are series connected between a power supply and ground, and a half-bridge node between the high-side switch and the low-side switch provides a half-bridge voltage; wherein the controller comprises:
a measurement circuit configured to be connected to the half-bridge node, wherein the measurement circuit is configured to measure the half-bridge voltage, and generate a multi-bit status signal indicative of the measured half-bridge voltage;
a controller circuit connected to the measurement circuit and configured to receive the status signal therefrom, wherein the controller circuit is configured to generate at least a delay control signal based on the status signal and generate a rise deadtime setting signal as the delay control signal in response to the status signal;
a high-side delay circuit connected to the controller circuit to receive the delay control signal, wherein the high-side delay circuit is configured to provide a high-side control signal in response to the delay control signal, to switch on/off the high-side switch, wherein the high-side delay circuit comprises:
a high-side ON delay circuit configured to receive the rise deadtime setting signal from the controller circuit, and generate a high-side ON signal as a response;
a high-side buffer circuit configured to receive an inverted version of a PWM signal, and generate a high-side OFF signal in response to the inverted version of the PWM signal; and
a high-side trigger circuit connected to the high-side ON delay circuit and the high-side buffer circuit, and configured to generate the high-side control signal based on the high-side ON signal and the high-side OFF signal; and

a low-side delay circuit connected to the controller circuit to receive the delay control signal, wherein the low-side delay circuit is configured to provide a low-side control signal in response to the delay control signal, to switch on/off the low-side switch.