Patent ID: 11928507
Assignee: INVENSENSE, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. The method of claim 15, the method further comprising:
generating, by an event priority manager of the FIFO component, the predefined sequence according to at least one of a temporal order and a predefined priority ranking of the one or more events;
pushing, by the event priority manager, the one or more events to an event FIFO component of the FIFO component according to the predefined sequence;
storing, by the event FIFO component the one or more pushed events according to the predefined sequence, to form one or more stored events; and
when the DSP component is idle:
reading, by an event read controller of the FIFO component, at least one event among the one or more stored events in the event FIFO component according to the predefined sequence; and
sending, by the event read controller, the at least one event to the function enable generator.