Patent ID: 11862676
Assignee: CHINA RESOURCES MICROELECTRONICS (CHONGQING) CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A method for preparing semiconductor device, comprising:
forming a drift region with a first conductivity type, forming a first trench in the drift region, and forming a dielectric layer on the inner wall of the first trench;
doping dopants with a second conductivity type into the drift region at the bottom of the first trench through the first trench to form an extension region surrounding the bottom wall of the first trench;
filling the first trench with a first conductive structure;
simultaneously etching the first conductive structure inside the first trench and the drift regions on both sides of the first trench, removing the first conductive structure at the top of the first trench and retaining the first conductive structure at the bottom of the first trench; at the same time, forming second trenches on both sides of the first trench;
filling the dielectric layer in the first trench and the second trench at the same time;
simultaneously etching and removing part of the dielectric layer on the top of the first trench and the top of the second trench, retaining part of the dielectric layer on the first conductive structure and at the bottom of the second trench;
simultaneously forming the dielectric layer on the exposed sidewalls of the first trench and the second trench, and then filling a conductive material into the first trench and the second trench at the same time to form a second conductive structure at the top of the first trench and a third conductive structure inside the second trench, respectively;
doping the drift region with dopants with the second conductivity type, forming body regions on both sides of the first trench and the second trench, doping the body regions with dopants with the first conductivity type and dopants with the second conductivity type to form a first doped region and a second doped region, respectively; and
forming a gate electrically connected to the second conductive structure and the third conductive structure, a first electrode electrically connected to the first doped region and the second doped region, and leading out a second electrode by a second electrode lead-out region contacting the drift region.