Patent ID: 11923036
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. A memory device, comprising:
a memory array;
a sense amplifier connected to the memory array;
a trimming register connected to an output of the sense amplifier;
a first bit cell of the memory array configured to store a first bit of trimming information for the sense amplifier;
a second bit cell of the memory array configured to store a complement of the first bit of the trimming information for the sense amplifier;
wherein the sense amplifier is configured to read the trimming information and the complement of the trimming information from the first and second bit cells and store the trimming in formation in the trimming register in a first mode; and
wherein the sense amplifier is configured to read user data from the memory array in a second mode.