Patent ID: 11966299
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A user terminal, wherein the user terminal comprises:
a storage component,
an input/output (I/O) controller,
a main controller,
a first configuration channel (CC) controller,
a first multiplexer (MUX),
a second MUX,
a third MUX, and
a first interface,
wherein:
the first CC controller being connected to each of the first interface and a first signal selection input end of the first MUX, and being configured to send a first signal switching instruction to the first MUX in response to a debugging device being connected to the first interface of the user terminal being detected;
a first signal input end of the first MUX being connected to the I/O controller, a second signal input end of the first MUX being connected to the main controller, and a first signal output end of the first MUX being connected to the first interface;
the first MUX being configured to connect the second signal input end to the first signal output end in response to the first signal switching instruction being received, so that the main controller receives, through the first interface, a data backup instruction sent by the debugging device;
the main controller being connected to each of a second signal selection input end of the second MUX and a third signal selection input end of the third MUX, and being configured to send a second signal switching instruction to the second MUX in response to the data backup instruction being received, and send a third signal switching instruction to the third MUX;
a third signal input end of the second MUX being connected to the I/O controller, a fourth signal input end of the second MUX being connected to a sixth signal input end of the third MUX, and a second signal output end of the second MUX being connected to the storage component;
the second MUX being configured to connect the fourth signal input end to the second signal output end in response to the second signal switching instruction being received;
a fifth signal input end of the third MUX being connected to the I/O controller, and a third signal output end of the third MUX being connected to the first interface;
the third MUX being configured to connect the sixth signal input end to the third signal output end in response to the third signal switching instruction being received; and
the storage component being configured to receive an I/O instruction sent by the debugging device in response to the fourth signal input end of the second MUX being connected to the second signal output end of the second MUX and the sixth signal input end of the third MUX being connected to the third signal output end of the third MUX, and the storage component being configured to perform data backup processing according to the I/O instruction.