Patent ID: 11877441
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 11:
12. The method of fabricating a memory according to claim 11, wherein the step of depositing a first layer of polysilicon in each concave hole to form a bitline contact plunger includes:
depositing the first layer of polysilicon in each concave hole, the first layer of polysilicon being fully filled in the concave hole and covering the separation layer that remains; and
removing part of the first layer of polysilicon, wherein the first layer of polysilicon that remains is located in the concave hole, a top surface of the first layer of polysilicon that remains is lower than a top surface of the separation layer, and the first layer of polysilicon that remains in the concave hole forms the bitline contact plunger.