Patent ID: 11935624
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 13:
14. A device comprising:
multi-layer stack over a semiconductor substrate, the multi-layer stack comprising alternating layers of a first material and a second material, a first layer of the multi-layer stack extending a first length in a first direction, each next layer in the multi-layer stack, preceding from a top of the multi-layer stack to a bottom of the multi-layer stack, extending a next length in the first direction, the next length being greater than the length of the immediately preceding layer of the multi-layer stack;
an inter-metal dielectric (IMD) over the multi-layer stack;
a plurality of word lines in the multi-layer stack;
a memory film in the multi-layer stack adjacent the plurality of word lines;
a first oxide semiconductor (OS) layer over the memory film;
a first conductive contact extending to a first depth in the multi-layer stack and electrically contacting a first word line;
a second conductive contact extending a second depth into the multi-layer stack and electrically contacting a second word line; and
a first conductive line over the IMD, the first conductive contact, and the second conductive contact, wherein the first conductive line electrically couples the first conductive contact to the second conductive contact.