Patent ID: 11923194
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a semiconductor substrate having a first lattice constant;
a dopant blocking layer disposed over the semiconductor substrate, wherein the dopant blocking layer has a second lattice constant different from the first lattice constant;
a buffer layer disposed over the dopant blocking layer, wherein the buffer layer has a third lattice constant different from the second lattice constant;
a plurality of channel members suspended over the buffer layer, wherein a top surface of the buffer layer is vertically spaced apart from a bottommost one of the plurality of channel members;
an epitaxial feature abutting the plurality of channel members, wherein a bottom portion of the epitaxial feature is below the top surface of the buffer layer; and
a gate structure wrapping each of the plurality of channel members.