Patent ID: 11868740
Assignee: POSTECH RESEARCH AND BUSINESS DEVELOPMENT FOUNDATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 2:
3. The circuit of claim 2, further comprising:
a negative ternary inverter (NTI);
a fifth BFA;
a sixth BFA;
a fourth BHA;
a seventh BFA configured to receive a sum output signal of the fifth BFA, a sum output signal of the sixth BFA, and a sum output signal of the fourth BHA;
an eighth BFA configured to receive a carry output signal of the fifth BFA, a carry output signal of the sixth BFA, and a carry output signal of the fourth BHA;
a fifth BHA configured to receive a carry output signal of the seventh BFA and a sum output signal of the eighth BFA; and
a sixth BHA configured to receive a carry output signal of the fifth BHA and a carry output signal of the eighth BFA.