Patent ID: 11947512
Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. An apparatus, comprising:
a device including at least one memory having processor-executable code stored therein, and at least one processor that is adapted to execute the processor-executable code, wherein the processor-executable code includes processor-executable instructions that, in response to execution, enable the device to perform actions, including:
providing an inverted index that includes a plurality of posting lists and metadata, wherein the inverted index indicates compression settings that are associated with the plurality of posting lists;
at plurality of periodic scheduled times, performing a regeneration on the inverted index, the regeneration including:
decompressing the inverted index, wherein the decompressing uses the compression settings indicated by the inverted index; and
altering compression settings that are used during a next periodic scheduled time of the plurality of periodic scheduled times, such that at least a first posting list of the plurality of posting lists uses a different compression setting than a second posting list of the plurality of posting lists.