Patent ID: 11889676
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. The method for manufacturing the capacitor according to claim 1, wherein the forming a first hard mask layer having a first pattern in the central area on the substrate to be etched comprises:
forming the first hard mask layer and a first isolation side wall pattern in a first direction on the first hard mask layer;
forming a second isolation layer on the first isolation side wall pattern, exposing a portion, for dies in the central area, of the second isolation layer through a photoetching process, etching the second isolation layer, to form a second isolation side wall pattern in a second direction, and retaining a portion, for the dies in the edge area, of the second isolation layer; and
forming the first pattern at a position where the first isolation side wall pattern and the second isolation side wall pattern are not overlapped, using the first isolation side wall pattern and the second isolation side wall pattern as masks to etch, transferring the first pattern to the first hard mask layer, and forming the first hard mask layer having the first pattern in the central area.