Patent ID: 11888037
Assignee: HITACHI ENERGY LTD
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. A method for manufacturing the power semiconductor device of claim 1, the method comprising:
forming the dielectric layer on the first main side of the wide-bandgap semiconductor layer;
forming a first metal layer on the dielectric layer;
forming the field plate by patterning the first metal layer and the dielectric layer to expose the portion of the first main side of the wide-bandgap semiconductor layer in the termination region; and
anisotropically etching the wide-bandgap semiconductor layer using the patterned first metal layer as at least part of an etching mask in areas where the field plate exposes the first portion of the first main side of the wide-bandgap semiconductor layer in the termination region to form the first recess in the wide-bandgap semiconductor layer in the termination region.