Patent ID: 11923849
Assignee: QUALCOMM INCORPORATED
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 20:
21. The divide-by-N frequency divider of claim 20, wherein the plurality of N latches comprises a first latch, a second latch, a fourth latch and a third latch, and wherein the plurality of 2N logic gates comprises
a first logic gate having its output terminal coupled to a reset terminal of the first latch;
a second logic gate having its output terminal coupled to a set terminal of the first latch;
a third logic gate having its output terminal coupled to a reset terminal of the second latch;
a fourth logic gate having its output terminal coupled to a set terminal of the second latch;
a fifth logic gate having its output terminal coupled to a reset terminal of the third latch;
a sixth logic gate having its output terminal coupled to a set terminal of the third latch;
a seventh logic gate having its output terminal coupled to a reset terminal of the fourth latch; and
an eighth logic gate having its output terminal coupled to a set terminal of the fourth latch.