Patent ID: 11862681
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A semiconductor device, comprising:
a substrate;
first and second fin structures disposed on the substrate;
first and second nanostructured channel regions disposed on the first and second fin structures, respectively;
first and second gate dielectric layers surrounding the first and second nanostructured channel regions, respectively;
an aluminum-based (Al-based) work function metal layer disposed on the first gate dielectric layer;
a silicon-based (Si-based) capping layer disposed on the Al-based work function metal layer;
a first aluminum-free (Al-free) work function metal layer disposed on the second gate dielectric layer;
a second Al-free work function metal layer disposed on the Si-based capping layer, respectively; and
first and second gate metal fill layers disposed on the first and second Al-free work function metal layers.