Patent ID: 11922011
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
responsive to receiving a request from a host system to program a data item to one or more memory devices, performing one or more operations to program the data item to a first set of physical management units (MUs) associated with a first portion of one or more memory devices of a memory sub-system and a second set of physical MUs associated with a second portion of the one or more memory devices, wherein the first portion comprises memory cells of a first type and the second portion comprises memory cells of a second type, wherein the first set of physical MUs is associated with a first physical address of the one or more memory devices, and wherein the second set of physical MUs is associated with a second physical address of the one or more memory devices;
generating, in a virtual MU data structure, a mapping that associates the first physical address of the one or more memory devices with a set of virtual MUs associated with the one or more memory devices, wherein the set of virtual MUs correspond to one or more block stripes of the memory sub-system;
adding an entry associated with the data item to a logical-to-physical (L2P) table associated with the one or more memory devices, wherein the entry comprises an identifier associated with the set of virtual MUs;
detecting that programming the data item to a second set of physical MUs by the one or more operations is completed, and
responsive to the detecting, updating the mapping of the virtual MU data structure to associate the set of virtual MUs with the second physical address.