Patent ID: 11861227
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. A method for operating a storage device including a non-volatile memory and a multi-core processor including at least two cores, the method comprising:
receiving, by a host interface of the storage device, a first memory command from a host for requesting the non-volatile memory to perform a predetermined memory operation;
generating, by a task scheduler of the storage device, a first task and a second task based on the first memory command;
checking an execution time of the first task by the task scheduler;
selecting, by the task scheduler, a first core from among the at least two cores having a shortest execution time based on execution times of the at least two cores;
increasing, by the task scheduler, the execution time of the first core by the execution time of the first task to update the execution times;
issuing, by the task scheduler the first task to the first core;
selecting, by the task scheduler, a second core from among the at least two cores having a shortest execution time based on the updated execution times; and
issuing, by the task scheduler, the second task to the first core when the second task is dependent on the first task and otherwise issuing the second task to the second core.