Patent ID: 11875872
Assignee: GIGA-BYTE TECHNOLOGY CO.,LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A computer device, comprising:
a memory module having a serial presence detect (SPD) module;
a processor coupled to the memory module; and
a basic input output system (BIOS) coupled to the processor and storing a first extreme memory profile (XMP), wherein
when the processor performs the BIOS so that the computer device displays a user interface (UI), the BIOS displays a first overclocking option corresponding to the first XMP in a selection list of the UI, wherein
when the BIOS receives a selection request corresponding to the first overclocking option of the selection list, the BIOS reads a plurality of first memory setting parameters corresponding to the first XMP, and configures the memory module according to the plurality of first memory setting parameters,
wherein the first overclocking option displayed in the selection list comprises displaying a part of the plurality of first memory setting parameters, and the part of the plurality of first memory setting parameters comprises a memory particle type, a memory operating frequency, a column address strobe or signal (CAS) latency, a synchronous dynamic random access memory (SDRAM) row address strobe or signal (RAS) to CAS delay time, an SDRAM row precharge delay time, an SDRAM active to precharge delay time, and a memory operating voltage.