Patent ID: 11921702
Assignee: ATLASSIAN US, INC.
Field: IT methods for management (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. The system of claim 12, wherein the sequences of instructions, when executed, further cause the one or more processors to:
identify a third adjacent issue having a third rank value that is successively lower than the first rank value and a fourth adjacent issue having a fourth rank value that is successively higher than the second rank value;
analyze a third congestion condition of the predefined memory space with respect to the first rank value and the third rank value;
in response to the third congestion condition satisfying the selection criteria, add the third adjacent issue to the cluster of issues;
analyze a fourth congestion condition of the predefined memory space with respect to the second rank value and the fourth rank value;
in response to the fourth congestion condition satisfying the selection criteria, adding the fourth adjacent issue to the cluster of issues; and
in response to determining that the selection termination criteria has been met in respect of the third congestion condition or the fourth congestion condition, flag the cluster of issues as having the local congestion of issues.