Patent ID: 11948926
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A device comprising:
a first package comprising:
a processor device;
a first memory device connected to the processor device by direct bonds;
a first dielectric layer laterally surrounding the first memory device; and
a first redistribution structure over the first dielectric layer and the first memory device, the first redistribution structure connected to the first memory device, a sidewall of the first redistribution structure being laterally coterminous with a sidewall of the first dielectric layer and a sidewall of the processor device;

an encapsulant laterally surrounding the first package, the encapsulant contacting the sidewall of the first redistribution structure, the sidewall of the first dielectric layer, and the sidewall of the processor device; and
a second redistribution structure over the encapsulant, the second redistribution structure connected to the first redistribution structure.