Patent ID: 11967967
Assignee: NXP B.V.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. A circuit comprising:
a digital circuit including a digital output for producing a series of digital signal values;
a first data path from the digital output, the first data path including an analog delay circuit, the first data path for producing a first analog delay signal from the digital output the digital circuit;
a second data path from the digital output, the second data path including a digital delay circuit and a digital to analog converter for producing a second analog delay signal from the digital output of the digital circuit;
an analog circuit output for producing an analog output signal having values over time corresponding to the digital signal values of the series, wherein the first analog delay signal and the second analog delay signal are used to adjust an analog output signal value of the analog output signal that is produced by the analog circuit output if the first analog delay signal is different from the second analog delay signal.