Patent ID: 11923338
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A structure comprising:
a first device comprising:
a first semiconductor substrate;
a first plurality of dielectric layers underlying the first semiconductor substrate; and
a first plurality of conductive features in the first plurality of dielectric layers;

a second device underlying, and bonding to, the first device, the second device comprising:
a second semiconductor substrate;
a second plurality of dielectric layers; and
a second plurality of conductive features in the second plurality of dielectric layers, wherein the second plurality of conductive features comprise a conductive feature; and

a first interconnect structure penetrating through the first device and extending into the second device, wherein the first interconnect structure stops on, and contacts, the conductive feature in the second device, wherein the first interconnect structure has a stepped profile such that one or more horizontal surfaces exist within the first interconnect structure, with a topmost horizontal surface among the one or more horizontal surfaces contacting a topmost surface of the first plurality of dielectric layers to form a horizontal interface, and the topmost surface of the first plurality of dielectric layers further contacts the first semiconductor substrate.