Patent ID: 11862538
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor chip package, comprising:
a conductive terminal;
a die pad comprising a top side and a recess extending from the top side, wherein the die pad is downset relative to the conductive terminal;
a tie bar extending from the die pad, the tie bar including a portion in a different plane compared to a plane along a surface of the die pad;
a semiconductor die positioned within the recess, wherein the semiconductor die has an outer perimeter;
a solder fillet engaged within the recess and with the outer perimeter of the semiconductor die;
a wire bond coupled to the semiconductor die and the conductive terminal; and
a mold compound covering the conductive terminal, the wire bond, the die pad, and the semiconductor die.