Patent ID: 11881267
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 11:
12. The semiconductor memory device according to claim 9, wherein
the semiconductor layer includes:
a first region extending in the first direction and opposed to the plurality of first gate electrodes; and
a second region extending in the first direction and opposed to the plurality of second gate electrodes, wherein

when:
an end portion on a substrate side in the first direction of the first region is assumed to be a first end portion;
an end portion on a side opposite to the substrate in the first direction of the first region is assumed to be a second end portion;
an end portion on the substrate side in the first direction of the second region is assumed to be a third end portion;
an end portion on a side opposite to the substrate in the first direction of the second region is assumed to be a fourth end portion;
a width in a second direction intersecting with the first direction of the first end portion is assumed to be a first width;
a width in the second direction of the second end portion is assumed to be a second width;
a width in the second direction of the third end portion is assumed to be a third width; and
a width in the second direction of the fourth end portion is assumed to be a fourth width, wherein

the second width and the fourth width differ from the first width and the third width, respectively.