Patent ID: 11914716
Assignee: LATTICE SEMICONDUCTOR CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 8:
9. The secure PLD asset management system of claim 1, further comprising:
the external system, wherein the external system comprises a processor and a memory and is configured to be coupled to the secure PLD through the configuration input/output (I/O) of the secure PLD, wherein the memory comprises machine-readable instructions which when executed by the processor of the external system are adapted to cause the external system to:
provide a secure PLD asset unlock request, corresponding to the secure PLD asset, to the secure PLD over the configuration I/O;
provide a configuration image for the PLD fabric to the secure PLD over the configuration I/O during the performing the secure PLD asset update process; and
provide a secure PLD lock request, corresponding to the secure PLD asset, to the secure PLD over the configuration I/O.