Patent ID: 11861451
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. The method of claim 11, further comprising: after obtaining the position of the respective chip in each sub-positioning image,
obtaining, based on the position of the respective chip in each sub-positioning image, a two-dimensional code image in the sub-positioning image, wherein the two-dimensional code image is configured to cover only the position of the respective chip; and
wherein obtaining the chip position information of the image to be positioned based on the position of the respective chip in each sub-positioning image and the position of each sub-positioning image in the image to be positioned comprises:
obtaining the chip position information of the image to be positioned based on a plurality of two-dimensional code images in the plurality of sub-positioning images, wherein the chip position information comprises the plurality of two-dimensional code images and positions of the plurality of two-dimensional code images in the image to be positioned.