Patent ID: 11935577
Assignee: FARADAY TECHNOLOGY CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. A signal processing method, comprising:
using a first clock signal to sample a plurality of data to generate a plurality of first sampled data, respectively;
using a second clock signal to sample the plurality of first sampled data to generate a plurality of second sampled data, respectively;
selecting one of a first signal and a second signal to generate a first multiplexer output, wherein the first signal and the second signal are obtained from part of the plurality of second sampled data;
selecting one of a third signal and a fourth signal to generate a second multiplexer output, wherein the third signal and the fourth signal are obtained from another part of the plurality of second sampled data wherein the third signal or the fourth signal is different from any one of the first signal and the second signal, and the part of the plurality of second sampled data is different from the another part of the plurality of second sampled data;
using a third clock signal to sample the first multiplexer output signal and the second multiplexer output signal to generate a plurality of third sampled data, respectively; and
alternatively selecting one of the plurality of third sampled data to generate an output signal.