Patent ID: 11934266
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A method, comprising:
selecting, by a processor, a first set of memory cells of a memory device, wherein the first set of memory cells are configured to store a first number of bits per memory cell;
determining whether a data integrity metric value satisfies an integrity threshold criterion;
responsive to determining that the data integrity metric value satisfies the integrity threshold criterion, selecting a second set of memory cells of the memory device, wherein the second set of memory cells are configured to use the first number of bits per memory cell; and
copying data from the first set of memory cells and the second set of memory cells to a third set of memory cells of the memory device, wherein the third set of memory cells are configured to store a second number of bits per memory cell, wherein the second number of bits per memory cells is greater than the first number of bits per memory cell.