Patent ID: 11961772
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G  Y | IPC G  H

Claim 4:
5. An apparatus for automatically, processing wafers, comprising:
a controller, which is configured to control several wafers to operate on a primary path, and the primary path is a path for forming semiconductor structures on the surfaces of the wafers;
a determining circuit, which is configured to determine whether there is a need for detecting defects of the wafers, and if yes, automatically switch an operating path of the wafers to a secondary path;
a detector, which is connected with the determining circuit the detector is configured to divide the wafers in the same batch into several sub-batches and one parent batch according to special processing conditions of the wafers on the primary path before the defects of the wafers are scanned, wherein each of the sub-batches comprises several wafers extracted from a plurality of wafers subjected to the same special processing condition, and the parent batch is composed of wafers except for the wafers forming all the sub-batches in the same batch; and
an input device, which is configured for a user to set several detecting conditions in one-to-one correspondence to special processing conditions of the several sub-batches;
the detector is configured to scan the defects of all the wafers in each of the sub-batches according to respective detecting conditions corresponding to each of the sub-batches in the secondary path, and acquire a sub-batch defect scanning pattern of each of the sub-batches, and analyze each of the sub-batch defect patterns to acquire defect-related information of each of the sub-batches; and
a processor, which is connected with the detector and configured to determine whether the detect detection on the wafers is finished or not, and if yes, automatically switch the operating path of the wafers to the primary path.