Patent ID: 11886721
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. The system for adjusting the memory of claim 7, wherein the first acquisition circuit comprises:
a first acquisition sub-circuit, configured to acquire a first mapping relationship between the temperature of the transistor and the actual time at which the data is written into the memory;
a second acquisition sub-circuit, configured to acquire a second mapping relationship between the gate voltage of the transistor and the actual time at which the data is written into the memory; and
a third acquisition sub-circuit, configured to, based on the first mapping relationship and the second mapping relationship, acquire the mapping relationship between the temperature of the transistor, the gate voltage of the transistor, and the actual time at which the data is written into the memory.