Patent ID: 11935825
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. An integrated circuit (IC) structure comprising:
a fin structure that extends along a substrate in a first direction;
a first gate structure that overlies the fin structure and extends in a second direction perpendicular to the first direction;
a second gate structure that overlies the fin structure and extends in the second direction;
a contact that extends in the second direction between the first and second gate structures and parallel to the substrate above the fin structure;
a via overlying and electrically connected to the contact; and
an isolation layer stacked directly on the fin structure and below the contact that is stacked directly on the isolation layer and configured to electrically isolate the contact from the fin structure,
wherein
each of the first gate structure, the second gate structure, and the contact extends a same distance above the substrate in a third direction perpendicular to each of the first direction and the second direction,
the contact comprises a first portion aligned with the via, the isolation layer, and the fin structure in the third direction and a second portion adjacent to the first portion in the second direction,
the second portion includes a volume aligned with the isolation layer in the second direction and contacting the isolation layer along a plane perpendicular to the second direction,
the first and second portions have respective first and second thicknesses in the third direction, and
the second thickness is greater than the first thickness.