Patent ID: 11967383
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 19:
20. A non-volatile storage apparatus, comprising:
a plurality of planes of non-volatile memory cells, the non-volatile memory cells are arranged in vertical NAND strings, each plane comprises bit lines and word lines connected to non-volatile memory cells, the non-volatile memory cells are arranged in blocks, each plane comprises multiple blocks connected to a same set of bit lines, each block comprises multiple NAND strings connected to a same set of word lines; and
means, connected to the plurality of planes, for performing a programming process that concurrently programs a set of data into non-volatile memory cells arranged in multiple planes of the plurality of planes by:
concurrently performing a first portion of the programming process for the non-volatile memory cells arranged in multiple planes, the programming process includes applying program voltage pulses to the non-volatile memory cells;
completing the first portion of the programming process by non-volatile memory cells in multiple planes that are targeted to a first set of data states successfully completing programming for the set of data;
identifying a slow plane of the multiple planes based on the first portion of the programming process, the slow plane includes non-volatile memory cells that experience smallest change in threshold voltage per program voltage pulse as compared to non-volatile memory cells of other planes of the plurality of planes;
increasing speed of programming for the slow plane relative to another plane of the multiple planes that is concurrently experiencing programming; and
concurrently performing a second portion of the programming process that only programs non-volatile memory cells in multiple planes that are targeted to a last data state, the last data state is higher in threshold voltage than the first set of data states.