Patent ID: 11942942
Assignee: HONG KONG APPLIED SCIENCE AND TECHNOLOGY RESEARCH INSTITUTE CO., LTD
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A transient-response level shifter comprising:
a first oneshot for generating a first pulse in response to a falling-edge transition of a switch-control input;
a second oneshot for generating a second pulse in response to a rising-edge transition of the switch-control input;
a first voltage-tolerant transistor having a gate driven by the first pulse from the first oneshot and a source connected to a first node and a drain connected to a third node;
a first sensing transistor having a gate and a drain connected to the third node and a source connected to a boosted node;
a second voltage-tolerant transistor having a gate driven by the second pulse from the second oneshot and a source connected to a second node and a drain connected to a fourth node;
a second sensing transistor having a gate and a drain connected to the fourth node and a source connected to the boosted node;
a first p-channel output transistor, having a gate receiving the third node and a source connected to the boosted node, with a drain driving an inverted output;
a second p-channel output transistor, having a gate receiving the fourth node and a source connected to the boosted node, with a drain driving an output;
a first p-channel mirror transistor, having a gate receiving the third node and a source connected to the boosted node, with a drain driving a first mirror node;
a second p-channel mirror transistor, having a gate receiving the fourth node and a source connected to the boosted node, with a drain driving a second mirror node;
a first n-channel mirror transistor, having a gate and a drain driving the first mirror node, and a source connected to a floating ground node;
a second n-channel mirror transistor, having a gate and a drain driving the second mirror node, and a source connected to the floating ground node;
a first n-channel cross-coupled transistor, having a gate receiving the second mirror node, and a drain driving the inverted output, and a source connected to the floating ground node;
a second n-channel cross-coupled transistor, having a gate receiving the first mirror node, and a drain driving the output, and a source connected to the floating ground node;
a bistable latch receiving the output and receiving the inverted output, the bistable latch for latching the output and the inverted output;
wherein the bistable latch is each powered by the boosted node and the floating ground node.