Patent ID: 11907724
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A computer-implemented method comprising:
assigning a first group of one or more units of an instruction pipeline of a processor as a frontend group;
assigning a second group of the one or more units of the instruction pipeline of the processor as a backend group;
performing a frontend logout to transfer one or more trace records from the first group to a trace controller during an in-memory trace of an instruction after the first group completes processing;
performing a backend logout to transfer one or more trace records from the second group to the trace controller during the in-memory trace of the instruction after the second group completes processing;
starting a next instruction in the first group of the instruction pipeline before the backend logout completes; and
fetching and dispatching a subsequent instruction after the next instruction based on completion of the frontend logout of the next instruction and determining that the one or more trace records from the second group are empty.