Patent ID: 11874776
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A method comprising:
storing data in memory; and
executing an instruction, at execution circuitry of a processor, to program an inline memory expansion logic and a host memory encryption logic with one or more cryptographic keys,
wherein the inline memory expansion logic encrypts the data to be written to the memory and decrypts encrypted data to be read from the memory, wherein the memory is coupled to the processor via an interconnect endpoint of a system fabric, wherein the memory is accessed in a block mode, wherein, for a received block mode transaction in the block mode, the inline memory expansion logic encrypts the data or decrypts the encrypted data based at least in part on a block size of the received block mode transaction and a tweak, wherein the tweak is based at least in part on an address of the received block mode transaction or a nonce associated with the received block mode transaction.