Patent ID: 11888963
Assignee: CYPRESS SEMICONDUCTOR CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 5:
6. The wireless device of claim 4, wherein the re-timer engine comprises:
a register to store a re-timer value of the plurality of re-timer values;
a summer to add the fractional conversion ratio to the re-timer value to determine a fractional re-timer value;
a comparator to compare the fractional re-timer value to a predetermined negative decimal value; and
a switch to cause a one value to be added to the fractional re-timer value to generate a positive re-timer value in response to the fractional re-timer value becoming less than or equal to the predetermined negative decimal value; and
wherein the comparator is to trigger a removal command to the pseudo clock generator in response to the one value being added.