Patent ID: 11942484
Assignee: JAPAN DISPLAY INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G  Y | IPC G  H

Claim 0:
1. An electronic device comprising:
a substrate;
a silicon nitride film formed on the substrate;
a first silicon oxide film formed on the silicon nitride film;
a block insulating layer including oxide on the first silicon oxide film;
a metal oxide semiconductor layer formed on the block insulating layer;
a second silicon oxide film covering the metal oxide semiconductor layer;
a gate electrode formed between the substrate and the silicon nitride film, and facing the metal oxide semiconductor layer, and
a terminal that passes through the silicon nitride film, the first silicon oxide film, and the block insulating layer and that is electrically connected to the gate electrode, wherein
a thickness of the second silicon oxide film is larger than a thickness of the first silicon oxide film,
the thickness of the second silicon oxide film is larger than a thickness of the silicon nitride film,
a first thickness of the block insulating layer is a thickness of a position overlapping the metal oxide semiconductor layer,
a second thickness of the block insulating layer is a thickness of a position not overlapping the metal oxide semiconductor layer, and
the first thickness is larger than the second thickness.