Patent ID: 11948626
Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 16:
17. The semiconductor device according to claim 10, further comprising a second memory cell, a second local bit line, a second correction circuit, a second global bit line, a fifth transistor, a sixth transistor, and a seventh transistor,
wherein the driver circuit comprises a sense amplifier electrically connected to a first bit line and a second bit line which are configured to be a bit line pair,
wherein the second memory cell is electrically connected to the second local bit line,
wherein the second local bit line is electrically connected to the second correction circuit,
wherein the second correction circuit is electrically connected to the second global bit line,
wherein the fifth transistor is configured to control a conduction state between the first bit line and the first global bit line,
wherein the sixth transistor is configured to control a conduction state between the second bit line and the second global bit line, and
wherein the seventh transistor is configured to control a conduction state between the first global bit line and the second global bit line.