Patent ID: 11894275
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A device comprising:
a first fin structure disposed over a substrate, the first fin structure including:
a first portion formed of a first semiconductor material; and
a second portion formed of a second semiconductor material, the second semiconductor material being different than the first semiconductor material; and

a second fin structure disposed over the substrate and spaced apart from the first fin structure;
a first dielectric layer extending from the first fin structure to the second fin structure;
a first capping layer disposed directly on at least one of the first portion and the second portion of the first fin structure;
a second capping layer disposed on the first capping layer and physically contacting the first dielectric layer;
a gate dielectric layer disposed directly on the first capping layer;
a gate electrode layer disposed on the gate dielectric layer; and
a second dielectric layer disposed directly on the second capping layer, wherein the gate dielectric layer is further disposed directly on the second dielectric layer.