Patent ID: 11972820
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 19:
20. A non-volatile storage apparatus, comprising:
a plurality of non-volatile memory cells arranged as NAND strings to form a block having at least three sub-blocks, each NAND string includes memory cells in each of the three sub-blocks, each NAND string includes a dummy memory cell;
a plurality of data word lines connected to the NAND strings;
a dummy word line connected to the dummy memory cells of the NAND strings;
a plurality of bit lines connected to the NAND strings;
a source line connected to the NAND strings; and
a control circuit connected to the data word lines, dummy word line, bit lines and source line;
the control circuit is configured to program memory cells connected to a selected data word line by applying a series of program voltage pulses to the selected data word line and boosting channels of unselected NAND strings, the control circuit is configured to perform program-verify between the program voltage pulses, the control circuit includes a means for pre-charging channels of unselected NAND strings in a selected sub-block prior to a next program voltage pulse from a source line while lowering voltages at the end of program-verify by applying overdrive voltages to data word lines in a sub-block closer to the source line than the selected sub-block and lowering to a resting voltage a dummy word line between the selected sub-block and the sub-block closer to the source line prior to lowering to the resting voltage the data word lines in the sub-block closer to the source line.