Patent ID: 11953988
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A method, comprising:
receiving, at a memory device comprising a memory array, a read command from a host device external to the memory device;
reading first data and an error control code corresponding to the first data from the memory array to an error control circuit via a first data path and to a buffer via a second data path which bypasses the error control circuit based at least in part on the read command;
identifying, by the error control circuit, an error in the first data based at least in part on performing an error correction operation on the first data using the error control code;
outputting, by the buffer, the first data corresponding to the error control code and comprising the error to the host device concurrent with performing at least a portion of the error correction operation using the error control code; and
outputting an indicator of the error to the host device based at least in part on the error correction operation identifying the error in the first data.