Patent ID: 11923969
Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 16:
17. A computer implemented method of synchronizing clocks in a system, comprising:
linking a network of nodes each comprising a clock so as to share information between the nodes, each of the clocks implemented in hardware in a device;
executing, in one or more computers connected to the network, an algorithm that learns a skew of each of the clocks from the information so as to determine one or more corrective actions, and
applying the corrective actions to one or more of clocks to synchronize the clocks to a common clock rate; and
wherein the algorithm learns the skew and synchronizes the clocks to the common clock using a hybrid state-feedback comprising:
communicating the information between the nodes at communication event times;
using the information to estimate the skew of each of the clocks between the communication event times; and
at one or more of the communication event times, adjusting a clock rate of one or more of the clocks using the skew so that the clocks are synchronized to the common clock rate.