Patent ID: 11875859
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. The memory device of claim 7, wherein the first threshold voltage level is higher than the second threshold voltage level, and wherein applying the pair of voltage levels representative of the value of the particular digit of the input data to the control gates of the particular pair of series-connected memory cells comprises the control circuitry being configured to:
apply a first voltage level to the control gate of the first memory cell and apply a second voltage level, different than the first voltage level, to the control gate of the second memory cell in response to the particular digit of the input data having the first data value; and
apply the second voltage level to the control gate of the first memory cell and apply the first voltage level to the control gate of the second memory cell in response to the particular digit of the input data having the second data value;
wherein the first voltage level is configured to activate a memory cell having the second threshold voltage level and to deactivate a memory cell having the first threshold voltage level; and
wherein the second voltage level is configured to activate a memory cell having the first threshold voltage level and to activate a memory cell having the second threshold voltage level.