Patent ID: 11863190
Assignee: nan
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 4:
5. The compound sequential circuit of claim 3, wherein each flip-flop of the plurality of flip-flops comprises a plurality of electrical relationship:
wherein a first electrical relationship of the plurality of electrical relationships is when the first differential sub-circuit is activated, the second differential sub-circuit is deactivated, the first keeper sub-circuit is deactivated, and the second keeper sub-circuit is deactivated;
wherein a second electrical relationship of the plurality of electrical relationships is when the second differential sub-circuit is activated, the first differential sub-circuit is deactivated, the first keeper sub-circuit is deactivated, and the second keeper sub-circuit is deactivated;
wherein a third electrical relationship of the plurality of electrical relationships is when the first keeper sub-circuit is activated, the second keeper sub-circuit is deactivated, the first differential sub-circuit is deactivated, the second differential sub-circuit is deactivated, and a first pull-down transistor of the first buffer is deactivated;
wherein a fourth electrical relationship of the plurality of electrical relationships is when the second keeper sub-circuit is activated, the first keeper sub-circuit is deactivated, the first differential sub-circuit is deactivated, and the second differential sub-circuit is deactivated, and a second pull-down transistor of the second buffer is deactivated;
wherein a fifth electrical relationship of the plurality of electrical relationships is when the first differential sub-circuit of the latch is activated when the main clock signal is at the first level, and when the second differential sub-circuit of the latch is activated when the main clock signal is at the first level;
wherein a sixth electrical relationship of the plurality of electrical relationships is when the first keeper sub-circuit is activated when the main clock signal is at the second level, and when the second keeper sub-circuit is activated only when the main clock signal is at the second level; and
wherein a seventh electrical relationship of the plurality of electrical relationships is when the second output of the latch is the inverted polarity of the first output of the latch.