Patent ID: 11972800
Assignee: EMEMORY TECHNOLOGY INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. The non-volatile memory cell array as claimed in claim 5, wherein while a read action is performed, the program source line receives a second voltage less than the first voltage, the first program word line receives the second voltage, the first program bit line receives the second voltage, the read source line receives the second voltage, the first read word line receives the second voltage, and the first read bit line receives a ground voltage, so that the first non-volatile memory cell generates a read current, wherein if the read current is higher than a reference current, the first non-volatile memory cell is in a first storage state, wherein if the read current is lower than the reference current, the first non-volatile memory cell is in a second storage state.