Patent ID: 11940934
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: nan (nan)
Classification: CPC nan | IPC G

Claim 8:
9. A method, comprising:
identifying a first data batch in a second tier storage of an accelerator based at least in part on data placement information from a host regarding the first data batch, the second tier storage of the accelerator including a second capacity and a second latency, the second tier storage storing a data model including the first data batch and a second data batch;
transferring the first data batch from the second tier storage of the accelerator to a first tier storage of the accelerator over a bus, the first tier storage of the accelerator including a first capacity and a first latency, the second capacity larger than the first capacity, the second latency being slower than the first latency; and
executing instructions on the first data batch in a circuit of the accelerator to produce a first processed data batch,
wherein the circuit including one or more cores, and
wherein the circuit is configured to execute the instructions on the data model using the first data batch and the second data batch.