Patent ID: 11923374
Assignee: MONOLITHIC 3D INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, the device comprising:
a first silicon layer comprising a first single crystal silicon layer;
a plurality of first transistors each comprising a single-crystal channel;
a first metal layer disposed over said plurality of first transistors;
a second metal layer disposed over said first metal layer;
a third metal layer disposed over said second metal layer;
a second level comprising a plurality of second transistors, said second level is disposed over said third metal layer;
a fourth metal layer disposed over said second level;
a fifth metal layer disposed over said fourth metal layer;
a via disposed through said second level,
wherein at least one of said plurality of second transistors comprises a metal gate,
wherein processing of said second transistors comprises use of Atomic Layer Deposition (“ALD”), and
wherein an average thickness of said fifth metal layer is greater than an average thickness of said third metal layer by at least 50%; and

a third level comprising a second single crystal silicon layer,
wherein said third level is disposed over said fifth metal layer.