Patent ID: 11923410
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 6:
7. An integrated circuit comprising:
a semiconductor fin comprising
an upper fin portion of a first semiconductor material, the upper fin portion having a body portion, a source region extending laterally from a first side of the body portion, and a drain region extending laterally from a second side of the body portion, with the body portion between the source region and the drain region, the body portion having a bottommost surface, and
a lower fin portion of a second semiconductor material, the lower fin portion having a fin stub with laterally opposed sidewalls extending upwardly towards the upper fin portion;
a gate structure in direct contact with the body portion, the gate structure defining a channel region in the body portion;
a first insulator structure below the source region and having a first insulator top surface in contact with a portion of a bottom surface of the source region laterally adjacent to the channel region, the first insulator structure having an uppermost surface above the bottommost surface of the body portion; and
a second insulator structure below the drain region and having a second insulator top surface in contact with a portion of a bottom surface of the drain region laterally adjacent to the channel region, the second insulator structure having an uppermost surface above the bottommost surface of the body portion;
wherein the fin stub is between the first insulator and the second insulator with a first one of the laterally opposed sidewalls in contact with a sidewall of the first insulator structure and a second one of the laterally opposed sidewalls in contact with an entirety of a portion of a bottom surface of the drain region laterally adjacent to the channel region.