Patent ID: 11916152
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of forming an integrated circuit, comprising:
forming a guard ring in a semiconductor layer over a substrate, the guard ring having a first conductivity type, the guard ring including a first guard ring segment and a second guard ring segment;
forming a barrier region in the semiconductor layer, the barrier region having a second conductivity type, opposite from the first conductivity type, the barrier region extending between and touching the first guard ring segment and the second guard ring segment;
forming a well region having the second conductivity type surrounded by the guard ring;
forming a drift region having the second conductivity type in the semiconductor layer and extending from the barrier region to the well region; and
forming a metal-containing layer that has a Schottky barrier with the barrier region.