Patent ID: 11972799
Assignee: WINBOND ELECTRONICS CORP.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. The filament forming method of the resistive memory unit according to claim 8, wherein in a case that the read current in the second saturating state is latched as the saturating read current and determines that the rate of increase of the saturating read current is not less than the first threshold value, the filament forming method further comprises:
applying a third bias voltage to the resistive memory unit for a number of times, and performing the second stage forming procedure again until the read current of the resistive memory unit reaches a third saturating state, latching the read current in the third saturating state as the saturating read current, and determining again whether or not the rate of increase of the saturating read current is less than the first threshold value, in which the third bias voltage is obtained by increasing the gate voltage and decreasing the drain voltage relative to the second bias voltage.