Patent ID: 11955369
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, the semiconductor device comprising:
a substrate comprising one or more gates, one or more gate spacers and one or more s/d (source/drain) epis;
a double diffusion break located between a first gate and a second of the one or more gates on the substrate;
a plurality of dielectric liners disposed at a bottom portion of the double diffusion break, wherein the plurality of dielectric liners further comprises, a first dielectric liner and a second dielectric liner
and wherein the first dielectric liner further comprises a low temperature oxide material and the second dielectric liner further comprises CESL (contact etch stop layer) SiN material;

a local interconnect disposed on the plurality of dielectric liner; and
a dielectric fill material disposed on the local interconnect.