Patent ID: 11971823
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. A processor-implemented method of a fetcher that includes a first reuse buffer and a second reuse buffer, the method comprising:
loading, by a loader of a fetcher, input data of an input feature map stored in a memory in loading units according to a loading order;
allocating, by a buffer controller of the fetcher, an address of the first reuse buffer or the second reuse buffer rotationally to the loaded input data according to the loading order, and storing the loaded input data in the allocated address; and
transmitting, by each of a plurality of senders, to an executer respective input data corresponding to output data of respective convolution operations among input data stored in the first reuse buffer or the second reuse buffer,
wherein portions of the transmitted respective input data overlap, and
wherein the loading comprises loading remaining input data, other than input data overlapping input data loaded in a previous clock, among input data corresponding to output data on which a convolution operation is to be performed.