Patent ID: 11922220
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. The semiconductor apparatus of claim 15, wherein the logic coupled to the one or more substrates is to:
receive a trigger agent for invoking a second function of the plurality of functions, the second function being executed subsequent to a function of the plurality of functions being currently executed;
provide feedback to the trigger agent to indicate readiness for the invocation of the second function;
in response to a multi-tenant function of the plurality of function being a multi-tenant accelerated function, initiate one or more versions of the multi-tenant function;
provide synchronization among execution actions associated with the executing of the plurality of functions, the execution actions being distributed among a plurality of computing devices and/or containers associated with the plurality of functions; and
trigger the invocation of the second function in response to a criterion being met.