Patent ID: 11948639
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 17:
18. A method comprising:
forming a stack comprising vertically-alternating first tiers and second tiers, two of the first tiers having different vertical thicknesses relative one another;
forming first conductive material in void space in the two first tiers, the first conductive material in a vertical cross-section filling the first tier of the two first tiers that has a smaller of the different vertical thicknesses, the first conductive material in the vertical cross-section less-than-filling the first tier of the two first tiers that has a larger of the different vertical thicknesses;
isotropically etching the first conductive material from the first tier having the larger vertical thickness in the vertical cross-section to leave the first conductive material in the first tier having the smaller vertical thickness in the vertical cross-section; and
after the isotropically etching, forming second conductive material in the first tier having the larger vertical thickness in the vertical cross-section.