Patent ID: 11880714
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. One or more storage devices or storage disks comprising first instructions to cause at least one processor to, at least:
determine first device type property information of a first accelerator of a first device;
determine second device type property information of a second accelerator of a second device;
partition second instructions into a first portion and a second portion, the partitioning capable of being based on (a) a first latency associated with processing the first portion of the second instructions with the first accelerator of the first device, (b) a second latency associated with processing the second portion of the second instructions with the second accelerator of the second device, (c) the first device type property information of the first accelerator of the first device, and (d) the second device type property information of the second accelerator of the second device; and
cause transmission of at least one of the first portion or the second portion of the second instructions based on the partitioning.