Patent ID: 11881467
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor package comprising:
a first connection structure having a first surface and a second surface, opposing the first surface, and including a first insulating layer, a first redistribution layer disposed on a lower surface of the first insulating layer, and a first connection via penetrating through the first insulating layer and electrically connected to the first redistribution layer;
a first semiconductor chip, disposed on the first surface of the first connection structure, having a first connection pad in contact with the first connection via;
second and third semiconductor chips, disposed on both sides of the first semiconductor chip on the first surface of the first connection structure, having second and third connection pads in contact with the first connection via, respectively;
a first interconnection bridge disposed on the second surface of the first connection structure to overlap at least a portion of each of the first semiconductor chip and the second semiconductor chip in a direction perpendicular to the second surface, and electrically connected to the first redistribution layer to connect the first and second connection pads to each other;
a second interconnection bridge disposed on the second surface of the first connection structure to overlap at least a portion of each of the first semiconductor chip and the third semiconductor chip in the direction perpendicular to the second surface, and electrically connected to the first redistribution layer to connect the first and third connection pads to each other; and
a second connection structure, disposed on the second surface of the first connection structure, and including a second insulating layer surrounding the first and second interconnection bridges, a second redistribution layer disposed on the second insulating layer, and a second connection via penetrating through the second insulating layer, the second connection via electrically connecting the first redistribution layer and the second redistribution layer,
wherein the first and second connection vias are tapered in a direction toward the first and second connection pads, and
wherein the second insulating layer contacts the lower surface of the first insulating layer, and side and lower surfaces of the first redistribution layer.