Patent ID: 11941797
Assignee: BATTELLE MEMORIAL INSTITUTE
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A computer-implemented method for inspecting ICs, the computer-implemented method comprising:
receiving, by a controller, one or more images of a Device Under Test (DUT) from one or more imaging devices;
detecting, by the controller, observed features in the one or more images and producing a first synthetic representation of a part design of the DUT that includes the observed features;
inferring, by the controller, a presence of one or more first unobserved features, wherein the one or more first unobserved features are inferred using a mapping and inference model (MIM); and
adding, by the controller, the one or more first unobserved features to the first synthetic representation of the part design of the DUT.