Patent ID: 11860659
Assignee: SK HYNIX INC.
Field: Control (Instruments)
Classification: CPC G | IPC G

Claim 8:
9. An LDO linear regulator, comprising:
a pass transistor coupled between an input terminal and an output terminal;
an error amplifier suitable for amplifying and outputting a difference between a feedback voltage corresponding to an output voltage of the output terminal and a predetermined reference voltage;
a buffer coupled between the error amplifier and the pass transistor;
a first compensation circuit coupled to an output node of the error amplifier and including a first transistor having a resistance which is in inverse proportion to a load current; and
a second compensation circuit including a second transistor which is coupled in parallel to a bias current source of the buffer so as to supply a current proportional to a square of the load current to the bias current source of the buffer,
wherein an equivalent resistance of an output node of the buffer is in inverse proportion to the load current based on a current flowing through the second transistor.