Patent ID: 11967393
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 0:
1. A semiconductor device, comprising:
a clock gating circuit configured to output a gated clock signal based on a clock signal, transitions of the clock signal being enable from being output in the gated clock signal in response to a clock enable signal having an enable value and being disabled from being output in the gated clock signal in response to the clock enable signal having a disable value; and
a control circuit that comprises:
a polling module configured to operate based on the clock signal and set the clock enable signal to the disable value in response to a disable control, and set the clock enable signal to the enable value in response to a wakeup control; and
a processing core configured to operate based on the gated clock signal, the processing core providing the disable control to the polling module during an operation.