Patent ID: 11954120
Assignee: nan
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 6:
7. The method of claim 4, the method further comprising:
verifying that an input border group comprising all directional borders of all polygons in said group of matching input geometric objects and an output border group comprising all directional borders of all polygons in said group of matching output geometric objects are identical or are identical after applying any of Op.3, 4 and 5 one or more times:
Op.3: replacing a directional border in said input border group or in said output border group with sub-borders;
Op.4: merging a plural number of directional borders in said input border groups or in said output border group that consist of all child borders of a border into a directional border comprising said border and direction information consistent with the directions of said plural number of directional borders; and
Op.5: removing two directional borders from said input border groups or from said output border group when they have opposite direction information and same border.