Patent ID: 11908797
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. An integrated circuit device comprising:
a substrate comprising a plurality of active regions apart from each other, the plurality of active regions comprising a first active region and a second active region adjacent to the first active region;
a bit line connected to the first active region and comprising a lower conductive layer and an upper conductive layer stacked on the substrate in a vertical direction;
an insulating capping pattern on the bit line;
a contact plug adjacent to the bit line in a horizontal direction, the contact plug being connected to the second active region; and
a spacer structure between the bit line and the contact plug,
wherein the spacer structure comprises a main insulating spacer comprising an extended portion opposite the upper conductive layer, the extended portion protruding toward the upper conductive layer compared to a portion of the main insulating spacer opposite the lower conductive layer,
wherein the extended portion of the main insulating spacer fills an undercut space corresponding to a sidewall of the upper conductive layer and a bottom surface of the insulating capping pattern, and
wherein the extended portion of the main insulating spacer and the portion of the main insulating spacer opposite the lower conductive portion form a continuous portion of a common material.