Patent ID: 11907744
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. A device comprising:
an input circuit to receive incoming work submissions from a processor, at least some of the incoming work submissions comprising quality of service (QoS) information including a quality class (QC) value and a quality priority (QP) value;
a first queue coupled to the input circuit, the first queue associated with a first QC value;
a second queue coupled to the input circuit, the second queue associated with a second QC value, wherein the input circuit is to store an incoming work submission into one of the first queue and the second queue based at least in part on the QC value of the incoming work submission; and
a priority circuit coupled to the first queue and the second queue, wherein the priority circuit is to select a first incoming work submission stored in the first queue to provide to one of a plurality of destinations based at least in part on the QP value of the first incoming work submission, the first incoming work submission associated with a first process.