Patent ID: 11908503
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A nonvolatile memory device, comprising:
an array of magnetic memory cells;
a control logic circuit having a voltage generator therein, which is configured to generate a gate voltage;
a row decoder connected by word lines to the array of magnetic memory cells, and having a word line driver driven therein, which is responsive to the gate voltage;
a column decoder connected by bit lines and source lines to the array of magnetic memory cells; and
a write driver having a write voltage generating circuit therein, which is configured to output a write voltage, in response to: (i) a reference voltage generated using a replica magnetic memory cell, and (ii) a feedback voltage generated using a magnetic memory cell in which a write operation is to be performed, said write voltage generating circuit comprising a voltage divider configured to adjust a size of the feedback voltage using a level switch, and said write driver configured to transfer the write voltage to a bit line selected by the column decoder during the write operation.