Patent ID: 11930483
Assignee: QUALCOMM INCORPORATED
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. An apparatus for wireless communication at a user equipment (UE), comprising:
one or more processors,
memory in electronic communication with the one or more processors, and
instructions stored in the memory and executable by the one or more processors to cause the apparatus to:
receive a first downlink control information message in a downlink control channel, the first downlink control information message scheduling first resources of a downlink shared channel for a second downlink control information message;
receive the second downlink control information message based at least in part on a first, UE-specific scrambling sequence, wherein receiving the second downlink control information message comprises receiving a set of coded bits in the first resources of the downlink shared channel the second downlink control information message scheduling second resources of the downlink shared channel for a data message;
demultiplex the set of coded bits to obtain a first subset of the set of coded bits and a second subset of the set of coded bits;
descramble the first subset of the set of coded bits using the first, UE-specific scrambling sequence to obtain the second downlink control information message and the second subset of the set of coded bits using a second scrambling sequence to obtain a third downlink control information message based at least in part on performing the demultiplexing; and
receive the data message in the second resources scheduled by the second downlink control information message.