Patent ID: 11949019
Assignee: ZINITE CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 20:
21. A thin film transistor comprising:
a substrate;
an insulating layer formed on the substrate;
a source;
a drain formed on the insulating layer and vertically spaced from the source;
an n-type semiconductor material formed on the insulating layer and extending between the source and the drain;
a source-channel interfacial member electrically connecting at least the source to the n-type semiconductor material;
a gate dielectric layer formed over the n-type semiconductor material;
a gate formed over the dielectric layer; and
a second insulating layer and wherein the drain is formed on the insulating layer, the second insulating layer is formed on the drain, the second insulating layer forming a vertical hollow having an inner surface extending upward from the drain, the second insulating layer forming a vertical hollow extending upward from the drain and having an inner surface, the n-type semiconductor material forming a layer on the inner surface of the vertical hollow and the drain, the gate dielectric layer forming a layer on the n-type semiconductor and the gate being formed on the gate dielectric layer, the source and the source-channel interfacial material being formed on top of the second insulating layer such that the source-channel interfacial member electrically connects the source to the n-type semiconductor material and wherein, when the transistor is in an on state current can flow from the source to the drain through the source-channel interfacial member and through a channel formed in the n-type semiconductor material.