Patent ID: 11893271
Assignee: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The computing-in-memory circuit according to claim 5, wherein the first gating circuit comprises a storage control switch, a computation control switch, and N column gating switches;
one end of the storage control switch is connected to the output terminal of the first voltage supply circuit, and another end of the storage control switch is connected to one end of the computation control switch and one end of each of the N column gating switches, and a control end of the storage control switch receives a first control signal;
another end of the computation control switch is connected to the first input terminal of the readout circuit, and a control end of the computation control switch receives a second control signal;
another end of each column gating switch is correspondingly connected to one first bit line, a control end of each column gating switch correspondingly receives one column gating signal.