Patent ID: 11916568
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. A telecommunications receiver circuit configured for receiving an input signal, wherein said telecommunications receiver circuit comprises:
a signal conditioning circuit;
a sampling circuit connected to the signal conditioning circuit; and
a digital signal processor connected to the sampling circuit;
wherein the sampling circuit comprises:
a time-based analog-to-digital converter; and
a hierarchical time step generator comprising:
a first level comprising a time step generator configured to generate first level clock signals in response to receiving said reference clock signal;
a second level comprising a phase interpolator circuit configured to generate multiple second level clock signals between each of said multiple first level clock signals; and
a third level comprising a device sampling phase generator configured to generate said multiphase clock signals using a set of time staggered multi-phase phase locked loops synchronized to each of said second level clock signals.