Patent ID: 11936865
Assignee: BYTEDANCE INC.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. An apparatus for processing video data comprising a processor and a non-transitory memory with instructions thereon, wherein the instructions upon execution by the processor, cause the processor to:
perform a conversion between a video block of a video and a bitstream of the video,
wherein the video block uses a low frequency non-separable transform for the conversion,
wherein the bitstream conforms to a format rule that specifies that a first syntax element is included at a sequence level for the bitstream,
wherein the first syntax element is indicative of whether explicit scaling matrices is enabled for blocks coded with the low frequency non-separable transform;
wherein the format rule further specifies that a third syntax element is included in a slice header in the bitstream a to control a scaling process applied to transform coefficients or non-transform coefficients, and
wherein whether the first syntax element is included in a sequence parameter set (SPS) depending on a value of a second syntax element included in the SPS, wherein the first syntax element is sps_scaling_matrix_for_lfnst_disabled_flag and the second syntax element is sps_lfnst_enabled_flag.