Patent ID: 11869601
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 10:
11. A method of controlling a memory device,
the memory device including:
a nonvolatile first memory including a first storage area;
a nonvolatile second memory including a second storage area;
a first data latch group used for input and output of data to and from the first memory;
a second data latch group used for input and output of the data to and from the second memory;
a third data latch group in which stored data is maintained when the data is read from the first memory; and
a fourth data latch group in which stored data is maintained when the data is read from the second memory, and

the method comprising:
storing management information in the third and fourth data latch groups when or before executing a read process for the data from the first and second memories, the management information being in a third memory and used for reading the data; and
executing the read process.