Patent ID: 11864368
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A static random access memory (SRAM) cell comprising:
a substrate having a first p-well, a second p-well, and an n-well interposing the first p- well and the second p-well;
a first semiconductor fin over the first p-well;
a fifth semiconductor fin over the n-well;
a first gate structure extending across the first and fifth semiconductor fins to form a first write-port pull-down transistor with the first semiconductor fin and a second write- port pull-up transistor with the fifth semiconductor fin, wherein a channel region of the first write-port pull-down transistor has a p-type doping concentration higher than a doping concentration of a channel region of the second write-port pull-up transistor;
a second write-port pull-down transistor over the second p-well, wherein a channel region of the second write-port pull-down transistor has a p-type doping concentration lower than the p-type doping concentration of the channel region of the first write-port pull- down transistor;
a fourth semiconductor fin spaced from the fifth semiconductor fin in part by the first semiconductor fin, wherein the first gate structure extends across the fourth semiconductor fin and forms a read-port pull-down transistor with the fourth semiconductor fin, and a channel region of the read-port pull-down transistor has a p-type doping concentration lower than the p-type doping concentration of the channel region of the second write-port pull-down transistor; and
a fourth gate structure extending across the first semiconductor fin and forming a first write-port pass-gate transistor with the first semiconductor fin, wherein a channel region of the first write-port pass-gate transistor has a p-type doping concentration lower than the p-type doping concentration of the channel region of the first write-port pull-down transistor.