Patent ID: 11940891
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 10:
11. An integrated circuit comprising:
one or more serial data communication terminals;
peripheral device interface circuitry configured to communicate with a microcontroller using a serial communication protocol, wherein the peripheral device interface circuitry is further configured to intermittently receive input serial data frames from the microcontroller via at least one of the one or more serial data communication terminals using the serial communication protocol, and to intermittently send output serial data frames to the microcontroller via at least one of the one or more serial data communication terminals using the serial communication protocol;
one or more registers accessible by the peripheral device interface circuitry, with the one or more registers including a serial data output register adapted to store data for inclusion in the output serial data frames, including one or more status bits representing communication status data, one or more data bits representing peripheral device data, and at least one fault bit; and
wherein the peripheral device interface circuitry is configured to generate each output serial data frame using data stored in the serial data output register, in which the output serial data frame includes the one or more status bits and the one or more data bits serially followed by at least one cyclic redundancy check (CRC) bit, which is serially followed by a fault bit, wherein the fault bit indicates whether a fault is detected during sending of the output serial data frame, and the fault bit is followed by a redundancy bit providing a redundant indication of whether a fault is detected.