Patent ID: 11961567
Assignee: PUFSECURITY CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. The key storage device of claim 4,
wherein the first inverter further comprises a third output transistor having a third threshold voltage, and comprising a first terminal coupled to a first supply voltage, a second terminal coupled to the first node, and a control terminal configured to receive the first setting voltage;
wherein the second inverter further comprises a fourth output transistor having a fourth threshold voltage, and comprising a first terminal coupled to the first supply voltage, a second terminal coupled to the second node and a control terminal configured to receive the second setting voltage;
wherein the first output transistor comprises a first terminal coupled to the first node, a second terminal coupled to a second supply voltage, and a control terminal configured to receive the first setting voltage;
wherein a difference between the first supply voltage and the first setting voltage is equal to a first voltage difference, and a difference between the first setting voltage and the second supply voltage is equal to a second voltage difference,
wherein a difference between the first voltage difference and an absolute value of the third threshold voltage is smaller than a difference between the second voltage difference and the absolute value of the first threshold voltage.