Patent ID: 11934706
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A storage device, comprising:
a non-volatile memory comprising a block including a plurality of pages and a plurality of flash management units (FMUs), wherein each of the pages includes one or more of the FMUs;
a volatile memory; and
a controller configured to store, in one of the FMUs, logical addresses for multiple ones of the FMUs of the block, and to accumulate the logical addresses in the volatile memory in response to host write commands prior to storing the logical addresses in the one of the FMUs,
wherein the controller is further configured, in response to a data relocation command, to read the logical addresses from the one of the FMUs, to determine at least one of the logical addresses read from the block is mapped to a current FMU in a logical-to-physical (L2P) mapping table, and to relocate data stored at the at least one of the logical addresses in response to the determination.