Patent ID: 11964730
Assignee: SRAM, LLC
Field: Transport (Mechanical engineering)
Classification: CPC B  H  G | IPC B  G  H

Claim 6:
7. The coordinator device of claim 5, wherein the user input is a first user input, the input element is a first input element, the signal is a first signal, and the device type is a first device type,
wherein the second controller device is configured to generate a second signal in response to a second user input at an input element of the second controller device, the input element of the second controller device being a second input element,
wherein the processor is further configured to receive, via the communication interface and the first wireless network, the second signal generated in response to the second user input at the second input element from the second controller device, after the first signal is received from the first controller device, the second signal including data identifying a second device type and data identifying the second input element, the second device type being associated with the second controller device, and
wherein the memory is further configured to cache the data identifying the second device type and the data identifying the second input element.