Patent ID: 11861012
Assignee: MACRONIX INTERNATIONAL CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 19:
20. A method for maintaining integrity in a data image during operations of semiconductor memory, the method comprising:
storing, in a plurality of non-volatile registers, address information of a first copy boot code and at least one redundant copy boot code stored in a memory array;
keeping, in a non-volatile storage area, a plurality of hash digests for the first copy boot code and at least one redundant copy boot code;
posting, to an input/output interface to an I/O data unit, internal status register states; and
examining, by logic circuitry, integrity of the first copy boot code stored in the memory array by:
performing a first tier integrity check of the first copy boot code and a second tier integrity check of the first copy boot code using a message hashing algorithm;
comparing a hash calculation of the first copy boot code and a stored hash calculation as determined and as stored in the non-volatile storage area holding the plurality of hash digests; and
providing as output one selected from the first copy boot code and the redundant copy boot code in accordance with an integrity examination result; and

alerting a host that the first copy boot code or the redundant copy boot code as selected experienced an integrity examination fault whenever a discrepancy between the hash calculation and the stored hash calculation is detected.