Patent ID: 11923253
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A device, comprising:
a semiconductor fin disposed extending from a semiconductor substrate;
a first transistor having a first gate structure over the semiconductor fin;
a second transistor having a second gate structure over the semiconductor fin; and
a dielectric structure between the first gate structure and the second gate structure,
wherein the dielectric structure extends to at least a level of a top surface of the first gate structure and a top surface of the second gate structure; and
wherein the dielectric structure has a width increasing from a bottom position of the dielectric structure in the semiconductor fin to a first position higher than the bottom position of the dielectric structure and in the semiconductor fin, and wherein a width of the first gate structure is less than the width of the dielectric structure in the semiconductor fin at the first position.