Patent ID: 11916101
Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H  B | IPC B  H

Claim 19:
20. A method of manufacturing the capacitive device according to claim 1, the method comprising the following steps:
a) an anodisation step of a metallic layer with a first thickness, starting from a front face of the metallic layer and over a second thickness less than the first thickness, and that will form an oxide layer;
b) an etching step of the oxide layer formed in step a);
c) a step of growth of a network of nanowires or nanotube bundles,
step a) being executed such that an exposed face of the metallic layer after step b) is textured, the texture being materialized by a network of concave cavities with average depth P and average lateral dimension D, the average depth P and the average lateral dimension D being adjusted such that the network of nanowires or nanotube bundles initiates in a concave cavity and extends from the concave cavity from a base towards a free end substantially perpendicular to the metallic layer;
d) a definition step of a capacitive zone that comprises forming a stack of a first dielectric layer and a second dielectric layer covering the network of nanowires or nanotube bundles, and forming a first through-opening in the stack, the first through-opening opening delimiting a contact zone;
e) a formation step of a continuous capacitive stack covering the metallic layer and the network of nanowires or nanotube bundles from the base to the free end in a conforming manner, the continuous capacitive stack comprising an upper conducting layer and an insulating layer insulating the upper conducting layer from the network of nanowires or nanotube bundles and the metallic layer,
the upper conducting layer encapsulating the network of nanowires or nanotube bundles and the insulating layer in the capacitive zone, whereas in a lower contact zone different from the capacitive zone the continuous capacitive stack leaves the free end exposed, and the insulating layer encapsulates the upper conducting layer; and
f) forming the upper electrode in the capacitive zone; and
g) forming a lower electrode in the lower contact zone.