Patent ID: 11860775
Assignee: SILICON MOTION, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 2:
3. The method of claim 1, wherein the routing engine comprises:
a first static random access memory (SRAM), arranged operably to: allocate space for a status queue and an activation queue, wherein the status queue is used for the processing unit to store the operation settings and the front-end parameter set of the first data-programming transaction; and
a first controller, coupled to the first SRAM,
the method comprising:
popping, by the first controller, the operation settings and the front-end parameter set of the first data-programming transaction out of the status queue;
determining, by the first controller, whether the front-end processing stage needs to be activated for the first data-programming transaction according to the operation settings;
driving, by the first controller, the host I/F to obtain the first data from a host side and store the first data in the first designated address of the RAM through the shared bus architecture according to the front-end parameter set when determining that the front-end processing stage needs to be activated for the first data-programming transaction; and
storing, by the first controller, the activation message for the first data-programming transaction in the activation queue when the front-end process stage, or a portion of the front-end process stage for the first data-programming transaction has been completed.