Patent ID: 11871565
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 12:
13. The method according to claim 1, further comprising:
forming a channel structure including a channel layer and a gate dielectric structure in a combined via that includes the first via, the second via, and the third via, the channel structure including a first portion, a second portion, and a third portion in the first via, the second via, and the third via, respectively; and
forming first gate structures, second gate structures, and third gate structures by replacing the first gate layers, the second gate layers, and the third gate layers with a gate metal material, respectively, the first portion, the second portion, and the third portion of the channel structure and the corresponding first gate structures, the second gate structures, and the third gate structures forming a first substring of transistors, a second substring of transistors, and a third substring of transistors of a string of transistors, respectively.