Patent ID: 11882687
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device comprising:
an active pattern on a substrate;
a gate structure in an upper portion of the active pattern;
a bit line structure on the active pattern, the bit line structure including a conductive structure and a capping pattern that are stacked;
a spacer structure on a sidewall of the bit line structure;
a contact plug structure on the active pattern, the contact plug structure contacting the spacer structure;
an insulating interlayer structure partially penetrating through upper portions of the contact plug structure, the spacer structure and the bit line structure; and
a capacitor on the contact plug structure,
wherein,
the spacer structure includes an air spacer,
the insulating interlayer structure includes,
a first insulating interlayer, and
a second insulating interlayer on the first insulating interlayer, the second insulating interlayer including an insulation material different from materials included in the first insulating interlayer,

a lower surface of the second insulating interlayer covers a top of the air spacer, and
a lowermost surface of the first insulating interlayer is higher than a lowermost surface of the second insulating interlayer.