Patent ID: 11915972
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 7:
8. A method comprising:
providing a transistor structure;
forming a front-side interconnect structure on a front-side of the transistor structure; and
forming a backside interconnect structure on a backside of the transistor structure, wherein forming the backside interconnect structure comprises:
forming a backside via on and electrically coupled to a first source/drain region of the transistor structure;
forming a first conductive line on and electrically coupled to the backside via;
forming a first dielectric spacer on a side surface of the first conductive line; and
sealing an air gap adjacent the first dielectric spacer, wherein a side surface of the first dielectric spacer and a side surface of the first conductive line define boundaries of the air gap.