Patent ID: 11876516
Assignee: SYNOPSYS, INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 2:
3. The level shifter circuit of claim 1, wherein the first current mirror comprises:
a third transistor coupled between the power terminal and a fourth transistor,
the fourth transistor coupled between the third transistor and the ground terminal, and
a fifth transistor coupled between the power terminal and a drain terminal of the first transistor;, wherein the second current mirror comprises:
a sixth transistor coupled between the power terminal and a seventh transistor,
the seventh transistor coupled between the sixth transistor and the ground terminal, and
an eighth transistor coupled between the power terminal and a drain terminal of the second transistor; and wherein
a gate terminal of the third transistor is coupled to a drain terminal of the third transistor and to a gate terminal of the fifth transistor and a gate terminal of the sixth transistor is coupled to a drain terminal of the sixth transistor and to a gate terminal of the eighth transistor.