Patent ID: 11870362
Assignee: WUXI CHIPOWN MICROELECTRONICS CO., LTD.
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 2:
3. The synchronous rectification control circuit according to claim 2, wherein the first-stage sub-circuit comprises a first comparator, a first inverter, a first NMOS transistor, a first current source, a first capacitor, a fourth comparator and a first D flip-flop,
wherein the first comparator has a first input terminal which is the first input terminal of the first-stage sub-circuit, a second input terminal which is the second input terminal of the first-stage sub-circuit, and an output terminal coupled to an input terminal of the first inverter, the first control terminal of the first transmission gate circuit, and the second control terminal of the second transmission gate circuit;
the first inverter has an output terminal coupled to a gate of the first NMOS transistor, the second control terminal of the first transmission gate circuit, and the first control terminal of the second transmission gate circuit;
the first NMOS transistor has a drain coupled to a second terminal of the first current source, a first terminal of the first capacitor, and a second input terminal of the fourth comparator, and a source grounded;
the first capacitor has a second terminal grounded;
the first current source has a first terminal provided with a preset power supply voltage;
the fourth comparator has a first input terminal provided with a second reference voltage, and an output terminal configured to generate a first turn-on enable sub-signal; and
the first D flip-flop has a clock signal input terminal coupled to the output terminal of the fourth comparator, a D terminal provided with a preset signal, and a Q terminal coupled to the output terminal of the first stage sub-circuit, wherein the first turn-on enable sub-signal is output via the Q terminal to obtain the turn-on enable signal.