Patent ID: 11861368
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. An apparatus comprising:
processing circuitry having a plurality of execution states for execution of instructions;
branch history storage to store branch history information indicative of at least one branch property for a sequence of branches;
prediction circuitry to determine a prediction for controlling execution of at least one instruction by the processing circuitry, where the prediction circuitry is configured to determine a first type of prediction based at least on a first prediction table storing prediction information looked up based on at least a first portion of the branch history information corresponding to a first predetermined number of branches; and
prediction control circuitry to:
in response to detecting an execution state switch of the processing circuitry from a first execution state to a second execution state more privileged than the first execution state, disable use of the first prediction table in determining the first type of prediction; and
in response to detecting that a number of branches causing an update to the branch history storage since the execution state switch is greater than or equal to the first predetermined number, re-enable use of the first prediction table in determining the first type of prediction;

wherein the prediction circuitry is configured to determine a second type of prediction depending on at least a portion of the branch history information; and
wherein following the execution state switch, the prediction control circuitry is configured to enable use of said at least a portion of the branch history information for determining the second type of prediction, even when use of the first prediction table for determining the first type of prediction is disabled.