Patent ID: 11963361
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. An integrated circuit device, comprising:
a substrate having a cell region, a peripheral circuit region, and an interconnection region between the cell region and the peripheral circuit region; and
a plurality of stacks sequentially stacked on the substrate, wherein:
each stack among the plurality of stacks includes a cell stack structure that has a plurality of insulating layers and a plurality of word line structures alternately stacked on the substrate in the cell region and the interconnection region,
a stack among the plurality of stacks includes a dummy stack structure,
the dummy stack structure is located at a same vertical level as one of the cell stack structures, except for a cell stack structure of a bottom stack among the plurality of stacks,
the dummy stack structure is separate from the cell stack structures, and
the dummy stack structure has a plurality of dummy insulating layers and a plurality of dummy support layers alternately stacked in the peripheral circuit region.