Patent ID: 11869421
Assignee: JAPAN DISPLAY INC.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A display device comprising:
a base;
a plurality of pixels arranged in a matrix on the base;
a power supply line connected to each of the pixels; and
a power supply line drive circuit connected to the power supply line,
the pixels each comprising:
a pixel circuit disposed on the base, and
a display element including a lower electrode connected to the pixel circuit, an upper electrode disposed to oppose the lower electrode and an organic layer including a light-emitting layer disposed between the lower electrode and the upper electrode,
the upper electrode being connected to the power supply line that provides a predetermined potential to the upper electrode, and
the power supply line drive circuit supplying, to the power supply line, a first signal that provides a first potential to the upper electrode during a light-emitting period in which the light-emitting layer emits light, and supplying, to the power supply line, a second signal that provides a second potential different from the first potential to the upper electrode during a non-light-emitting period in which the light-emitting layer does not emit light, wherein
the upper electrode and the power supply line are arranged in each of columns of the pixels,
the power supply line drive circuit supplies the first signal to the power supply line sequentially in a time-division manner during the light-emitting period, and supplies the second signal to the power supply line sequentially in a time-division manner during the non-light-emitting period,
the pixel each include a first subpixel which emits red light, a second subpixel which emits green light, and a third subpixel which emits blue light,
the power supply line is arranged between two pixels adjacent to each other and in a portion that is adjacent to other subpixels of a circumference of each of the first, second, and third subpixels included in each pixel, and is not arranged in a portion that is not adjacent to the other subpixels of the circumference of each of the first, second, and third subpixels included in each pixel, and
the power supply line is disposed on an insulating layer, which covers an end portion of the lower electrode and is arranged to partition the pixels and the first, second, and third subpixels included in each pixel, from each other.