Patent ID: 11935878
Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method for manufacturing a package structure, comprising:
providing a carrier board;
providing at least one die on the carrier board, wherein the at least one die has a top surface, a bottom surface, and a side surface and the at least one die comprises:
a substrate comprising a base, a buried layer disposed on the base, and a seed layer disposed on the buried layer;
a semiconductor layer disposed on the substrate;
a gate structure disposed on the semiconductor layer;
a source structure and a drain structure disposed on opposite sides of the gate structure;
at least one dielectric layer covering the gate structure, the source structure, and the drain structure; and
at least one pad disposed on the at least one dielectric layer and penetrating through the at least one dielectric layer to electrically contact with the gate structure, the source structure or the drain structure; and
forming a protective layer to cover at least a portion of the side surface of the at least one die,
wherein the seed layer is located between the buried layer and the semiconductor layer, and the protective layer covers a side surface of the seed layer and exposes the buried layer and the base.