Patent ID: 11935613
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. The method of claim 17, wherein:
the largest and smallest successful values of the receive clock delay are final largest and smallest successful values of the receive clock delay and determining the final largest and smallest successful values of the receive clock delay comprise:
determining first largest and smallest successful values of the receive clock delay at a first value of a transmit clock delay and determining second largest and smallest successful values of the receive clock delay at a second value of the transmit clock delay; and
setting the final largest value of the receive clock delay to a larger of the first and second largest values of the receive clock delay and setting the final smallest value of the receive clock delay to a smaller of the first and second smallest values of the receive clock delay; and

the largest and smallest successful values of the transmit clock delay are final largest and smallest successful values of the transmit clock delay and determining the final largest and smallest successful values of the transmit clock delay comprise:
determining first largest and smallest successful values of the transmit clock delay at a first value of a receive clock delay and determining second largest and smallest successful values of the transmit clock delay at a second value of the receive clock delay; and
setting the final largest value of the transmit clock delay to a larger of the first and second largest values of the transmit clock delay and setting the final smallest value of the transmit clock delay to a smaller of the first and second smallest values of the transmit clock delay.