Patent ID: 11875845
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. A memory device comprising:
a plurality of memory cells;
a peripheral circuit configured to perform a plurality of program loops including a program voltage apply operation of applying a program voltage to selected memory cells among the plurality of memory cells and a verify operation of verifying program states of the selected memory cells; and
a program operation controller configured to control the peripheral circuit to program data in the selected memory cells according to the plurality of program loops,
wherein the program operation controller controls the peripheral circuit to verify program states of memory cells programmed to any one program state among a plurality of program states distinguished based on a plurality of threshold voltages among the selected memory cells in the verify operation, apply a predetermined lowest program voltage to the selected memory cells after the verify operation on the plurality of program states passes, and verify an erase state of memory cells programmed to an erase state among the selected memory cells.