Patent ID: 11862632
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A semiconductor device, comprising:
a first gate electrode structure disposed in a first region of a substrate, and including a first gate insulating layer, a first metallic gate electrode, and a first polysilicon electrode sequentially stacked on the substrate;
a first spacer structure including a first spacer and a second spacer on side walls of the first gate electrode structure, the first spacer being disposed between the second spacer and the first polysilicon electrode and spaced apart from an upper face of the first metallic gate electrode;
a second gate electrode structure disposed in a second region of the substrate, and including a second gate insulating layer, a second metallic gate electrode, and a second polysilicon electrode sequentially stacked on the substrate; and
a second spacer structure including a third spacer and a fourth spacer disposed on side walls of the second gate electrode structure, the third spacer being disposed between the fourth spacer and the second polysilicon electrode and being in contact with an upper face of the second metallic gate electrode,
wherein a height of the first gate electrode structure is greater than a height of the second gate electrode structure, and
wherein a width of the first metallic gate electrode is equal to a width of the first polysilicon electrode at a lowermost part of the first spacer.