Patent ID: 11922990
Assignee: nan
Field: Computer technology (Electrical engineering)
Classification: CPC G  H  Y | IPC G  H

Claim 0:
1. A memory system, comprising:
a power supply configured to provide a supply voltage to a memory device,
the memory device including:
one or more external inputs configured to receive the supply voltage;
a voltage regulator configured to receive the supply voltage from the one or more external inputs and to output an output voltage;
one or more memories configured to receive the output voltage from the voltage regulator;
one or more external outputs configured to receive the output voltage from the voltage regulator and to supply the output voltage to one or more connected devices; and

the one or more connected devices, wherein the one or more connected devices are configured to receive the output voltage from the one or more external outputs and do not receive the supply voltage from the power supply,
wherein the voltage regulator comprises a power management integrated circuit (PMIC) that includes one or more registers configured to store information corresponding to the output voltage, wherein the output voltage comprises a plurality of output voltages, and wherein the information comprises a first order in which the plurality of output voltages are powered up, first delays corresponding to the first order, a second order in which the plurality of output voltages are powered down, and second delays corresponding to the second order.