Patent ID: 11881854
Assignee: UPI SEMICONDUCTOR CORP.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 9:
10. The level shifter circuit according to claim 1, wherein the driving device receives a pulse width modulation signal and generates a driving signal, and the driving device further comprises:
a logic unit receiving the pulse width modulation signal and generates a logic output signal;
a driving signal level shifter circuit coupled to the logic unit, receiving the logic output signal, and converting the logic output signal from a low voltage domain into a high voltage domain;
a first driver coupled to the driving signal level shifter circuit, and generating the driving signal according to the logic output signal in the high voltage domain; and
the level shifter circuit coupled between the first driver and the logic unit, obtaining the high-voltage signal according to the driving signal, and converting the high-voltage signal into the low-voltage signal.