Patent ID: 11955484
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A method of manufacturing a semiconductor device, comprising:
providing a semiconductor substrate having a first region and a second region;
patterning the semiconductor substrate to form a plurality of trenches in the semiconductor substrate, a first semiconductor fin between the trenches in the first region, and a second semiconductor fin between the trenches in the second region, wherein a dopant of the first semiconductor fin and the second semiconductor fin comprises boron, BF2, phosphorus, arsenic, or a combination thereof, a dopant concentration within the first semiconductor fin is less than a dopant concentration within the second semiconductor fin;
forming a plurality of insulators in the trenches;
forming a plurality of dummy gate stacks over a portion of the first semiconductor fin and a portion of the second semiconductor fin;
forming a first S/D over another portion of the first semiconductor fin and forming a second S/D over another portion of the second semiconductor fin exposed by the plurality of dummy gate stacks;
removing portions of the plurality of dummy gate stacks to expose a middle portion of the first semiconductor fin and a middle portion of the second semiconductor fin;
forming a photoresist layer to cover the middle portion of the first semiconductor fin and to expose the middle portion of the second semiconductor fin;
removing part of the middle portion of the second semiconductor fin;
removing the photoresist layer; and
forming a gate dielectric material and a gate electrode material over the exposed portion of the first semiconductor fin and the exposed portion of the second semiconductor fin to form a plurality of gate stacks.