Patent ID: 11934942
Assignee: REBELLIONS INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A neural processing device comprising processing circuitry comprising:
a plurality of processing engine groups;
a first memory shared by the plurality of engine groups; and
a first interconnection configured to transmit data between the first memory and the plurality of processing engine groups,
wherein the processing circuitry is configured to provide hardware resource to the plurality of processing engine groups,
at least one of the plurality of processing engine groups comprises:
a plurality of processing engines, each of the plurality of processing engines comprising an array of a plurality of processing elements interconnected by a mesh style network, the processing elements being reconfigurable;
a second memory shared by the plurality of processing engines;
a second interconnection configured to transmit data between the second memory and the plurality of processing engines; and
a compiler stack configured to quantize a deep learning graph to generate a binary code based on a preset calculation code; and
wherein the compiler stack comprises a first compiler configured to compile operations of the plurality of processing engines and a second compiler configured to compile operations of the first memory, the first interconnection and the at least one of the plurality of processing engine groups, and
wherein the first compiler is further configured to determine a dimension of the plurality of processing engines and perform, on a circuit, optimization scheduling of the plurality of processing engines.