Patent ID: 11900262
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. The neural network system of claim 1, wherein the plurality of branches share a first input node and a first output node,
wherein each of the plurality of branches receives the first module input feature map,
wherein the plurality of branches comprises a first branch comprising the first operation, and a second branch comprising the second operation, and
wherein the operation processor is further configured to:
obtain the first branch output feature map by performing the first operation comprised in the first branch, using a first remaining area of the internal memory that excludes a first area of the internal memory, in which the first module input feature map is stored; and
store the obtained first branch output feature map in a second area of the internal memory;
obtain the second branch output feature map by performing the second operation comprised in the second branch, using a second remaining area of the internal memory that excludes the first area and the second area in which the first branch output feature map is stored; and
store the obtained second branch output feature map in a third area of the internal memory.