Patent ID: 11901425
Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A non-volatile memory device, comprising:
a substrate having an active region;
a source region in the active region;
a drain region in the active region and adjacent to the source region, the drain region and the source region define a channel region therebetween;
a floating gate over the active region, the floating gate comprises:
a device section over the channel region;
a plurality of coupling sections entirely over the drain region; and
a connecting section between the device section and the plurality of coupling sections;

a device well in the active region under the device section and the connecting section of the floating gate, wherein the device well has a first dopant concentration; and
a coupling well in the active region and adjacent to the device well under the plurality of coupling sections of the floating gate, wherein the coupling well has a second dopant concentration lower than the first dopant concentration.