Patent ID: 11888731
Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC G  H

Claim 7:
8. A device, comprising: a memory storing instructions; and processing circuitry, wherein the instructions, when executed by the processing circuitry, cause the processing circuitry to perform operations comprising: receiving, from a second device over a network: a first packet comprising one or more labels each of which identifies a path through the network for the first packet, and a second packet comprising the one or more labels and congestion information; performing an action on each of the first packet and the second packet, wherein the action comprises at least one of: adding a first new label to the one or more labels, swapping one of the one or more labels with a second new label, and removing one of the one or more labels; providing the first packet and the second packet having had the action performed thereon to a third device over the network; generating a third packet having a modified version of the congestion information and another label different from the one or more labels; and providing the third packet to the second device over the network.