Patent ID: 11955447
Assignee: ADVANCED MICRO DEVICES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A method of fabricating a semiconductor device having stepped conductive pillars, the method comprising:
providing a semiconductor chip substrate including an interconnect layer, a conductive pad disposed on a final dielectric layer of the interconnect layer, and a passivation layer through which the conductive pad is at least partially exposed;
fabricating an under-bump metallization layer over an exposed portion of the conductive pad;
fabricating a first portion of a conductive pillar over the conductive pad, wherein the first portion of the conductive pillar has a first width; and
fabricating a second portion of the conductive pillar on the first portion, wherein the second portion has a second width that is smaller than the first width.