Patent ID: 11902168
Assignee: CISCO TECHNOLOGY, INC.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A system comprising:
a processor; and
a non-transitory computer-readable media storing instructions that, when executed by the processor, causes the processor to perform operations comprising:
receiving a policy, the policy defining whether date packets are sent over a first multiplexed channel and a second multiplexed channel based at least on part on applications from which data packets are generated, wherein:
the first multiplexed channel has a first priority;
the second multiplexed channel has a second priority, and
the first priority is defined as being of a higher priority relative to the second priority;

routing the data packets over the first multiplexed channel and the second multiplexed channel based at least in part on the policy;
adding the data packets transmitted over the first multiplexed channel and the second multiplexed channel to a queue; and

processing, at the queue, the data packets transmitted via the first multiplexed channel prior to processing the data packets transmitted via the second multiplexed channel based at least in part on the policy, the policy further defining processing the data packets with the queue based at least in part on:
a first mean sojourn time and a first average number of data packets for high priority (HP) data packets sent via the first multiplexed channel; and
a second mean sojourn time and a second average number of data packets for low priority (LP) data packets sent via the second multiplexed channel.