Patent ID: 11881771
Assignee: NXP USA, INC.
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 2:
3. The controller of claim 1, wherein the low-side delay circuit comprises:
a low-side OFF delay circuit configured to receive the rise deadtime setting signal from the controller circuit, and generate a low-side OFF signal as a response;
a low-side ON delay circuit configured to receive the inverted version of the PWM signal, and generate a low-side ON signal in response to the inverted version of the PWM signal; and
a low-side trigger circuit connected to the low-side OFF delay circuit and the low-side ON delay circuit, and configured to generate the low-side control signal based on the low-side OFF signal and the low-side ON signal;
wherein the controller further comprises a low-side driver circuit connected to the low-side delay circuit to receive the low-side control signal, wherein the low-side driver circuit is configured to generate a low-side driver signal in response to the low-side control signal, and provide the low-side driver signal to control the low-side switch.