Patent ID: 11894063
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 1:
2. The semiconductor memory device according to claim 1, wherein
each of outer peripheral surfaces of the plurality of first semiconductor columns included in one first semiconductor column row closest to the plurality of second semiconductor column rows among the plurality of first semiconductor column rows include:
a first region opposed to the second conductive layer; and
a second region opposed to the fourth conductive layer without via the second conductive layer, and

each of outer peripheral surfaces of the plurality of second semiconductor columns included in one second semiconductor column row closest to the plurality of first semiconductor column rows among the plurality of second semiconductor column rows include:
a third region opposed to the third conductive layer; and
a fourth region opposed to the fourth conductive layer without via the third conductive layer.