Patent ID: 11881173
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A display module, comprising a display, a display driver circuit, and at least one driver group, wherein
the display comprises M rows of sub pixels arranged in a matrix form, and a pixel circuit of each sub pixel comprises a first compensation transistor, a second compensation transistor, a voltage modulation transistor, a driver transistor, a first reset transistor, a first capacitor, and a light-emitting component, wherein M≥2, and M is a positive integer;
for an Nth pixel circuit of the pixel circuits, a first electrode of the first compensation transistor is coupled to a second electrode of the second compensation transistor and a second electrode of the voltage modulation transistor, a second electrode of the first compensation transistor is coupled to a gate of the driver transistor, and a first end of the first capacitor is coupled to a first electrode of the first reset transistor; a first electrode of the second compensation transistor is coupled to a second electrode of the driver transistor and an anode of the light-emitting component, and a gate of the first compensation transistor and a gate of the second compensation transistor are configured to receive a same gating signal N; a first electrode of the voltage modulation transistor is coupled to a second electrode of the first reset transistor, a second end of the first capacitor is configured to couple to a first power voltage input end; a first electrode of the driver transistor is configured to couple to the first power voltage input end or a data voltage output port of the display driver circuit; a gate of the first reset transistor is can receive a gating signal N−1; and a cathode of the light-emitting component is configured to couple to a second power voltage input end, wherein 2≤N≤M, and N is a positive integer;
the first electrode is a source and the second electrode is a drain, or the first electrode is a drain and the second electrode is a source;
each driver group comprises M gating circuits; the Nth gating circuit in the driver group is coupled to the second electrode of the first reset transistor in a pixel circuit of an Nth row of sub pixels and the first electrode of the voltage modulation transistor in the pixel circuit of the Nth row of sub pixels; the Nth gating circuit is further coupled to the display driver circuit, and is configured to: receive a first initial voltage Vinit1 and a second initial voltage Vinit2 from the display driver circuit, output the second initial voltage Vinit2 to the second electrode of the first reset transistor and the first electrode of the voltage modulation transistor when the pixel circuit is in a reset phase and a data voltage writing phase, and output the first initial voltage Vinit1 to the second electrode of the first reset transistor and the first electrode of the voltage modulation transistor when the pixel circuit is in a light-emitting phase; and the first initial voltage Vinit1 meets at least one of the following conditions: Vinit1>Vinit2 and Vinit1>(ELVSS+Voled), wherein ELVSS is a voltage output by the second power voltage input end, and Voled is a voltage drop of the light-emitting component; and
the reset phase is a phase in which the first reset transistor is conducted, the data voltage writing phase is a phase in which the data voltage is applied to the first electrode of the driver transistor, and the light-emitting phase is a phase in which the light-emitting component emits light.