Patent ID: 11937197
Assignee: QUALCOMM INCORPORATED
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 24:
25. An apparatus for wireless communication at a user equipment (UE), comprising:
at least one processor; and
memory coupled with the at least one processor, the memory storing instructions executable by the at least one processor to cause the UE to:
receive, from an access network entity and in a first bandwidth region associated with a first bandwidth, a first type of synchronization signal block comprising one or more broadcast signals, one or more first synchronization signals, and one or more second synchronization signals;
receive, in a second bandwidth region associated with a second bandwidth at least partially different from the first bandwidth, a second type of synchronization signal block that comprises a first subset of signals of the first type of synchronization signal block and excludes a second subset of signals of the first type of synchronization signal block; and
perform a management procedure for a communication link between the UE and the access network entity based at least in part on receiving the second type of synchronization signal block.