Patent ID: 11880590
Assignee: INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. The method of claim 13, wherein the memory module command set includes an opcode parameter, a vector size parameter, a vector position parameter, an immediate value parameter, and a destination parameter, and
wherein the opcode parameter indicates a command of the offloaded kernel, the vector size parameter indicates a correlation between an amount of data inputs and outputs of a DRAM cache line combined with the memory controller and an amount of data inputs and outputs of the data array, the vector position parameter indicates a position of data utilized by a current command in the data array, the immediate value parameter indicates a partial data value of the data array retrieved from the memory module, and the destination parameter indicates an identification number of an allocated register.