Patent ID: 11955097
Assignee: SHARP DISPLAY TECHNOLOGY CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. The shift register according to claim 1, wherein
the unit circuit further includes a stabilization circuit for controlling a potential of the second control node, the stabilization circuit including a stabilization node and a stabilization transistor having a control terminal connected to the stabilization node, a first conducting terminal connected to the second control node, and a second conducting terminal that is supplied with an OFF-level potential,
a potential of the stabilization node is maintained at an ON level in a period during which a potential of the first control node is supposed to be maintained at an OFF level, and
the potential of the stabilization node is maintained at an OFF level in a period during which the potential of the first control node is supposed to be maintained at an ON level.