Patent ID: 11876026
Assignee: MEDTRONIC, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of forming an integrated circuit package, comprising:
disposing a cavity through a glass core layer between a first major surface and a second major surface of the glass core layer;
disposing a carrier layer on the glass core layer over the cavity;
disposing a die within the cavity of the glass core layer;
disposing a dielectric layer on the first major surface of the glass core layer and over the cavity such that the glass core layer is between the dielectric layer and the carrier layer;
disposing a first patterned conductive layer on the dielectric layer;
removing the carrier layer from the glass core layer;
disposing a second patterned conductive layer adjacent the second major surface of the glass core layer;
disposing a second dielectric layer between the second patterned conductive layer and the second major surface of the glass core layer; and
electrically connecting the die to at least one of the first and second patterned conductive layers.