Patent ID: 11877441
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 15:
16. The method of fabricating; a memory according to claim 15, wherein, after forming the third medium layer, the method further comprises:
forming a third layer of polysilicon on the third medium layer, the third layer of polysilicon being, fully filled in the node plunger slot and covering the protective layer; and
removing part of the third layer of polysilicon, wherein the third layer of polysilicon that remains forms plural node contact plungers, each node contact plunger is electrically connected to a top end of the corresponding active region, and the node contact plungers and the bitline contact plungers correspond to one another on a one-by-one basis on a direction perpendicular to the substrate.