Patent ID: 11862644
Assignee: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
Field: Optics (Instruments)
Classification: CPC G  H | IPC G  H

Claim 8:
9. An array substrate, comprising a plurality of data lines, a plurality of scan lines, a plurality of clock signal lines, and a plurality of pixel units formed by the data lines and the scan lines horizontally and vertically crossing each other, wherein the data lines are disposed between two adjacent columns of the pixel units, the scan lines are disposed between two adjacent rows of the pixel units, the clock signal lines in an opening area of the pixel units are disposed in a plurality of orthographic projection areas of a plurality of trunk electrodes, are parallel to the data lines, and are disposed on a different layer from pixel electrodes;
wherein the array substrate comprises a substrate, and a first metal layer, a first insulating layer, a second metal layer, a second insulating layer, and a planarization layer, which are sequentially stacked on the substrate;
wherein the clock signal lines are disposed in the first metal layer, and the first metal layer is disconnected into two disconnected parts for the clock signal lines passing through; voids are horizontally defined between the two disconnected parts and the clock signal lines; and the first insulating layer is disposed on the first metal layer and the clock signal lines, and disposed in the voids; and
wherein two through holes are defined in the first insulating layer, and disposed on two disconnected parts of the first metal layer respectively; a metal oxide is provided on the first insulating layer and filled in the two through holes to connect the two disconnected parts of the first metal layer.