Patent ID: 11869517
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 5:
6. The downmixed signal calculation apparatus according to claim 5, wherein the at least one processor is further configured to execute the computer-executable instructions to:
calculate a compensated downmixed signal in the current frame based on a first frequency-domain signal in the current frame and the downmix compensation factor of the current frame, wherein the first frequency-domain signal is a left channel frequency-domain signal in the current frame or a right channel frequency-domain signal in the current frame; and calculate the first downmixed signal in the current frame based on the second downmixed signal in the current frame and the compensated downmixed signal in the current frame; or
calculate a compensated downmixed signal in a subframe i of the current frame based on a second frequency-domain signal in the subframe i of the current frame and a downmix compensation factor of the subframe i of the current frame, wherein the second frequency-domain signal is a left channel frequency-domain signal in the subframe i of the current frame or a right channel frequency-domain signal in the subframe i of the current frame; and calculate a first downmixed signal in the subframe i of the current frame based on a second downmixed signal in the subframe i of the current frame and the compensated downmixed signal in the subframe i of the current frame, wherein the current frame comprises P subframes, and the first downmixed signal in the current frame comprises the first downmixed signal in the subframe i of the current frame, wherein both P and i are integers, P≥2, and i∈[0, P−1].