Patent ID: 11948631
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 4:
5. A memory device, comprising:
a memory cell array comprising a plurality of memory cells, each of the plurality of memory cells having a switch element and a data storage element connected to the switch element and containing a phase-change material; and
a memory controller for inputting a read current to the plurality of memory cells, sequentially detecting first read voltages and second read voltages from the plurality of memory cells, and comparing the first read voltage of a first memory cell of the plurality of memory cells to the second read voltage of the first memory cell to determine a state of the first memory cell,
wherein after the memory controller detects the second read voltage, the memory controller inputs a write current for setting the state of the first memory cell as a set state to the first memory cell when the first memory cell is determined to be in the set state.