Patent ID: 11955389
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A structure comprising:
a semiconductor substrate;
a plurality of P-type Metal-Oxide-Semiconductor (PMOS) devices formed at a surface of the semiconductor substrate, wherein the plurality of PMOS devices comprise a row of PMOS devices aligned as a row, and wherein the row of PMOS devices are interconnected in parallel to act as a single PMOS device; and
an n-type guard region adjacent to the plurality of PMOS devices, wherein the n-type guard region comprises portions on two sides of the row, and wherein the n-type guard region comprises:
a first portion on a first side of the plurality of PMOS devices, wherein the first portion is elongated and has a first lengthwise direction parallel to a row direction of the row.