Patent ID: 11899589
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 14:
15. A device comprising:
a memory controller;
an interconnect interface;
a device coherency agent configured to maintain coherency between a first memory coupled to the memory controller and a second memory accessible to the device using the interconnect interface; and
bias management logic configured to:
monitor a first access, by a first apparatus, of a page of the first memory;
monitor a second access, by a second apparatus, of the page of the first memory;
modify, based on the first access and the second access, an indication;
determine, based on the indication, an access pattern of the page of the first memory; and
select a coherency bias for the page of the first memory based on the access pattern.