Patent ID: 11888786
Assignee: QUALCOMM INCORPORATED
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. An apparatus for wireless communication, comprising:
one or more processors;
one or more memories each coupled with at least one of the one or more processors; and
instructions stored in the one or more memories, individually or in combination, and operable, when executed by the one or more processors, individually or in combination, to cause the apparatus to:
receive, from a base station, a configuration of a first bandwidth part (BWP) and a second BWP, wherein the first BWP is associated with a first bandwidth and a first slot format dedicated for the first BWP;
receive downlink control information (DCI) from the base station; and
switch the first BWP to the second BWP, wherein:
the first bandwidth is switched to a second bandwidth,
the first slot format is switched to a second slot format, or
the first bandwidth is switched to the second bandwidth and the first slot format is switched to the second slot format,

and wherein:
the DCI indicates the second BWP for the switching, and the DCI further indicates whether to maintain the first slot format for the second BWP, or
the configuration is a radio resource control (RRC) reconfiguration that indicates the second BWP for the switching, and the RRC reconfiguration further indicates whether to maintain the first slot format for the second BWP.