Patent ID: 11889216
Assignee: DV2JS INNOVATION LLP.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A CMOS image sensor system using multi-step voltage gain enhancement for pixel-embedded signal amplification, comprises:
a processor; and
a memory communicatively coupled to the processor, wherein the memory stores processor instructions, which on execution, causes the CMOS image sensor to:
activate ROW1 of the CMOS image sensor by resetting a plurality of switches SRST, SH1 and SH2 to charge nodes PD1, PD2, SD1, and SD2 to a pre-set voltage potential and VRST respectively;
switch the plurality of switches OFF SRST, SH1 and SH2 for integration of photo-generated charges at node PD1 for producing a corresponding photo generated signal;
sample the photo generated signal by transferring the said signal to a gate of source follower SF1, to produce an amplified photo generated signal;
double sample the amplified photo generated signal in column to remove any pixel offset variation to produce a resultant voltage signal;
activate ROW2 of the CMOS image sensor by resetting the plurality of switches SRST, SH1 and SH2 to charge nodes PD1, PD2, SD1, and SD2 to the pre-set voltage potential and VRST respectively;
switch the plurality of switches OFF SRST, SH1 and SH2 for integration of photo-generated charges at node PD2 for producing a corresponding photo generated signal;
sample the photo generated signal by transferring the said signal to a gate of source follower SF2, to produce an amplified photo generated signal;
double sample the amplified photo generated signal in column for removing any pixel offset variation to implement multiple steps of gain on the resultant voltage signal; and
convert the resultant voltage to digital bits to obtain an output signal of with enhanced gain.