Patent ID: 11901035
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 14:
15. A system for controlling temperatures in a memory, the system comprising:
a high bandwidth memory (HBM) including core dies arranged in a stack, each core die including banks, and each bank including memory cells, the HBM further including:
a first sensing unit configured to sense a first temperature corresponding to at least a first transistor in a corresponding at least a first one of the memory cells; and
a second sensing unit configured to sense a second temperature corresponding to at least a second transistor in a corresponding at least a second one of the memory cells; and

a differentiated dynamic voltage and frequency scaling (DDVFS) device configured to perform the following:
for a first set of one or more of the memory cells which includes the first memory cell, controlling a temperature of the first set by adjusting one or more first transistor-temperature-affecting (TTA) parameters of the first set based on the first temperature; and
for a second set of one or more of the memory cells which includes the second memory cell, controlling a temperature of the second set by adjusting one or more second TTA parameters of the second set based on the second temperature.