Patent ID: 11915006
Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method for pipeline processing of instructions, comprising:
acquiring a target instruction set;
acquiring a target prediction result, wherein the target prediction result is a result obtained by predicting a jump mode of the target instruction set;
performing pipeline processing on the target instruction set according to the target prediction result; and
in response to determining a pipeline flushing request is received, and in response, correspondingly saving the target instruction set and a corresponding pipeline processing result, so as to perform pipeline processing on the target instruction set again on the basis of the pipeline processing result, wherein after the correspondingly saving the target instruction set and the corresponding pipeline processing result, the method further comprises:
acquiring a to-be-run instruction set;
in response to determining the to-be-run instruction set is coincident with the target instruction set; and
in response to the to-be-run instruction set being coincident with the target instruction set, performing pipeline processing on the to-be-run instruction set according to the corresponding pipeline processing result; or
in response to the to-be-run instruction set not being coincident with the target instruction set, directly performing pipeline processing on the to-be-run instruction set;
wherein the correspondingly saving the target instruction set and the corresponding pipeline processing result comprises:
in response to the pipeline flushing request being received, using unexecuted instructions in the target instruction set as first-class instructions, and using instructions other than the first-class instructions in the target instruction set as second-class instructions;
acquiring decoding results of the first-class instructions, and correspondingly saving the first-class instructions and the decoding results; and
acquiring execution results of the second-class instructions, correspondingly saving the second-class instructions and the execution results; and
the performing pipeline processing on the to-be-run instruction set according to the corresponding pipeline processing result comprises:
for instructions coincident with the first-class instructions in the to-be-run instruction set, directly performing pipeline processing on the decoding results starting from an execute stage of a pipeline architecture; and
for instructions coincident with the second-class instructions in the to-be-run instruction set, directly performing pipeline processing on the execution results starting from a memory operation stage of the pipeline architecture.