Patent ID: 11894486
Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. A method of manufacturing a semiconductor device, comprising:
forming a gate electrode including copper over a substrate;
forming a first insulating layer over the gate electrode;
forming an oxide semiconductor layer over the first insulating layer;
performing a first heat treatment at a temperature equal to or higher than 350° C. and equal to or lower than 700° C.;
forming a source electrode and a drain electrode after the first heat treatment;
forming a second insulating layer over and in contact with the source electrode, the drain electrode and a portion of the oxide semiconductor layer; and
performing a second heat treatment after forming the second insulating layer,
wherein the first insulating layer includes silicon nitride and silicon oxide over the silicon nitride, and
wherein the second insulating layer includes silicon oxide and silicon nitride over the silicon oxide.