Patent ID: 11886708
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. An apparatus, comprising:
not-and (NAND) memory cells; and
a memory controller coupled with the NAND memory cells and operable to cause the apparatus to:
initialize the apparatus during a system boot procedure, the apparatus supporting a first mode that includes a first set of capabilities and a second mode that includes the first set of capabilities and one or more additional capabilities;
operate the apparatus according to the first mode after initializing the apparatus, wherein operating the apparatus according to the first mode comprises delaying an action associated with the one or more additional capabilities; and
operate the apparatus according to the second mode after the system boot procedure is complete, wherein operating the apparatus according to the second mode comprises performing the delayed action.