Patent ID: 11888468
Assignee: PSEMI CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 19:
20. The voltage distribution-balanced stack of claim 19, further comprising:
a first endnode at a top of the stack of series coupled FET transistors;
a second endnode at a bottom of the stack of series coupled FET transistors;
a plurality of internal nodes between pairs of adjacent transistors of the stack of series coupled FET transistors; and
at least one compensation capacitor coupled across: i) the first endnode and at least one node of the plurality of internal nodes, ii) at least two nodes of the plurality of internal nodes, iii) at least one node of the plurality of internal nodes and the second endnode, iv) the first endnode and the second endnode, or v) at least one of the plurality of internal nodes and ground.