Patent ID: 11862519
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 4:
5. A method for manufacturing an integrated circuit device, the method comprising:
forming a first semiconductor fin and a second semiconductor fin over a semiconductor substrate;
recessing a first portion of the first semiconductor fin such that a top surface of the recessed first portion of the first semiconductor fin is lower than a top surface of a first portion of the second semiconductor fin; and
forming a first epitaxial feature on the recessed first portion of the first semiconductor fin and a second epitaxial feature on the first portion of the second semiconductor fin, such that the first epitaxial feature and the second epitaxial feature are merged, and a size of the first epitaxial feature is greater than a size of the second epitaxial feature.