Patent ID: 11901408
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. An integrated circuit (IC) device, comprising:
a substrate;
a source/drain (S/D) feature disposed on the substrate;
a contact plug disposed over the S/D feature and electrically coupled to the S/D feature;
a gate stack disposed on the substrate adjacent to the contact plug;
an air gap disposed between the contact plug and the gate stack; and
a seal layer covering the air gap, and
wherein an interface between the seal layer and the air gap is higher than a top surface of the gate stack, wherein the S/D feature is exposed to the air gap, and wherein the gate stack includes a gate electrode layer and a spacer that interfaces with the gate electrode layer, wherein both the spacer and an upper portion of the gate electrode layer are exposed to the air gap.