Patent ID: 11869950
Assignee: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G  B | IPC G  H

Claim 16:
17. A method for fabricating a steep-slope field-effect transistor, the method comprising:
forming a source, a channel region, and a drain on a substrate;
forming a gate insulating film on an upper portion of the channel region;
forming a floating gate on an upper portion of the gate insulating film;
forming a transition layer on an upper portion of the floating gate; and
forming a control gate on an upper portion of the transition layer,
wherein the forming of the control gate includes:
forming an inter-layer dielectric on an upper portion of the transition layer;
etching the inter-layer dielectric to expose a portion of the upper portion of the transition layer; and
forming the control gate on an upper portion of the exposed transition layer.