Patent ID: 11903183
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 16:
17. A memory device having arrays of vertically stacked memory cells, having multiple multi-direction conductive lines, comprising:
a vertical stack of layers formed from repeating iterations of a group of layers,
the group of layers comprising: a first dielectric material layer, a semiconductor material layer, and a second dielectric material layer, the second dielectric material layer having a conductive line formed in a horizontal plane therein; and
the vertical stack of layers having multiple multi-direction horizontal conductive lines formed therein, wherein each of the horizontal conductive lines has a first portion extending in a first horizontal direction and a second portion extending in a second horizontal direction at an angle to the first horizontal direction and wherein the second portions are laterally spaced to allow for vertical interconnections to be attached to the second portions.