Patent ID: 11935120
Assignee: LIQUID-MARKETS GMBH
Field: Digital communication (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 10:
11. A method comprising:
receiving, by way of a network interface of a field programmable gate array (FPGA) based matching engine, data packets containing proposed transactions, wherein the proposed transactions are respectively associated with transaction subjects, and wherein the network interface identifies network addresses in initial sequences of bits in each of the data packets in parallel to receiving respective further sequences of bits in each of the data packets;
receiving, by way of transaction validation circuitry of the FPGA based matching engine, the proposed transactions from the network interface;
validating, by way of the transaction validation circuitry, the proposed transactions based on their identified network addresses, their related information from state memory, and policies to be applied to the proposed transactions, wherein the transaction validation circuitry is further configured to discard any data packets containing proposed transactions that do not conform to the policies; and
matching, by way of matching algorithm circuitry of the FPGA based matching engine, pairs of pending transactions according to pre-determined criteria, wherein the pending transactions are proposed transactions that were validated and stored in one or more tables of pending transaction memory, wherein the matching algorithm circuitry is subject to a 50-300 nanosecond random delay when matching the pairs of the pending transactions.