Patent ID: 11960409
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A method comprising:
receiving, by a processing device operatively coupled with a memory device that comprises a plurality of physical memory blocks (PMBs), a first request to store a first data referenced by a first logical block address (LBA) associated with a first zone of a logical address space of the memory device;
obtaining, by the processing device, a version identifier of the first zone, wherein the version identifier of the first zone characterizes a number of times the first zone has been invalidated, wherein invalidating the first zone comprises invalidating multiple LBAs of the first zone;
selecting, by the processing device, in view of the version identifier of the first zone, a first PMB of the plurality of PMBs;
mapping, by the processing device, the first LBA associated with the first zone to the first PMB; and
storing, by the processing device, the first data in the first PMB.