Patent ID: 11929677
Assignee: PSEMI CORPORATION
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 4:
5. The controller of claim 1, further including:
(a) a clock signal selector, coupled to the clock signal input of the counter and configured to be coupled to a first clock signal and to a second clock signal, the second clock signal having a higher frequency than the first clock signal; and
(b) an under-regulation detector circuit including a first input for receiving at least one feedback voltage, a second input coupled to an under-regulation reference voltage, and an output coupled to the clock selector signal indicating an under-regulation condition if the at least one feedback voltage is less than the under-regulation reference voltage;
wherein the clock signal selector couples the second clock signal to the clock signal input of the counter in response to an under-regulation condition, and otherwise couples the first clock signal to the clock signal input of the counter.