Patent ID: 11936394
Assignee: MARVELL ASIA PTE LTD
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. The circuit of claim 1, wherein:
the first RO is used to reset and enable the second RO;
the second RO is used to reset and enable the first RO;
the first RO includes a first plurality of inverting gates formed in a first ring;
the first RO is coupled to a first multiplexer;
the first multiplexer is coupled to a first counter configured to generate a first done signal;
the first RO, first multiplexer, and first counter, in combination, are configured to count a first target number of inversions propagated along the first plurality of inverting gates, the first multiplexer configured to select a given first inverting gate of the plurality of first inverting gates based on a first control word, the given first inverting gate selected to trigger the first counter;
the second RO includes a second plurality of inverting gates formed in a second ring;
the second RO is coupled to a second multiplexer;
the second multiplexer is coupled to a second counter configured to generate a second done signal;
the second RO, second multiplexer, and second counter are configured, in combination, to count a second target number of inversions propagated along the second plurality of inverting gates, the second multiplexer configured to select a given second inverting gate of the plurality of second inverting gates based on a second control word, the second inverting gate selected to trigger the second counter.