Patent ID: 11901408
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A device comprising:
a source/drain feature disposed on a substrate, the source/drain feature including a silicide feature;
a gate stack disposed on the substrate and associated with the source/drain feature, the gate stack extending to a first height above the substrate;
an etch stop layer disposed on the gate stack and extending to the source/drain feature such that the etch stop layer interfaces with the source/drain feature;
a first interlayer dielectric layer disposed over the substrate;
a contact feature extending through the first interlayer dielectric layer to the silicide feature;
a nitride layer disposed directly on and extending along a sidewall of the contact feature; and
an air gap disposed between the gate stack and the contact feature, the air gap extending to a second height above the substrate that is greater than the first height of the gate stack, and wherein the etch stop layer, the nitride layer and the first interlayer dielectric layer are exposed to the air gap, wherein the etch stop layer is disposed between the source/drain feature and the air gap thereby preventing the source/drain feature from being exposed to the air gap.