Patent ID: 11916830
Assignee: LG ELECTRONICS INC.
Field: Digital communication (Electrical engineering)
Classification: CPC H  Y | IPC H

Claim 15:
16. An apparatus comprising one or more memories and one or more processors operatively coupled to the one or more memories, the apparatus comprising:
wherein the one or more processors controls the apparatus to:
receive configuration information related to a phase tracking reference signal (PTRS);
receive downlink control information (DCI) including a transmission configuration indication (TCI) field and an antenna port field,
wherein one or more TCI states are mapped to a codepoint of the TCI field of the DCI based on an activation command,
wherein the antenna port field includes information related to at least one demodulation reference signal (DMRS) port, and
wherein a number of PTRS ports is based on at least one of i) a number of TCI states configured based on the code point, ii) a number of at least one code division multiplexing (CDM) group related to the at least one DMRS port determined based on the antenna port field, and iii) a configured value of a maximum number of PTRS ports; and
receive the PTRS based on the number of PTRS ports,
wherein an entry related to (i) the at least one DMRS port among all DMRS ports and (ii) a number of CDM group(s) without data among all CDM groups is configured based on the antenna port field of the DCI,
wherein the all DMRS ports are indexed by port indices, respectively, and
wherein the all CDM groups are indexed by CDM group indices, respectively.