Patent ID: 11907680
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. The MAC operator of claim 4, wherein the maximum exponent output circuit includes:
comparators/selectors of a beginning stage that receive two different exponent upper bits among the exponent upper bits to output an exponent upper bit having a greater value;
comparators/selectors of an intermediate stage that receive the exponent upper bits output from two different comparators/selectors among the comparators/selectors of the beginning stage to output an exponent upper bit having a greater value; and
a comparator/selector of a last stage that receives the exponent upper bits output from the two comparators/selectors of the intermediate stage to output an exponent upper bit having a greater value as the first maximum exponent upper data.