Patent ID: 11948638
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 21:
22. The apparatus of claim 20, further comprising:
a pillar selector driver coupled with a first conductive line associated with a first set of pillar selectors of the plurality of sets of pillar selectors,
wherein the pillar selector driver is configured to:
bias, during the first duration, the second duration, and the third duration, the first conductive line to a fourth voltage to activate the first set of pillar selectors,

wherein the first subset of the first tier of memory cells and the second subset of the first tier of memory cells are coupled with a first subset of pillars of the plurality of pillars that are coupled with the first set of pillar selectors, and
wherein the at least one memory cell of the first subset of the first tier of memory cells thresholds and is written to the first logic state and the at least one memory cell of the second subset of the first tier of memory cells thresholds and is written to the second logic state based at least in part on biasing the first conductive line to the fourth voltage.