Patent ID: 11901344
Assignee: NANYA TECHNOLOGY CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A manufacturing method of a semiconductor package, comprising:
providing a semiconductor die, wherein the semiconductor die comprises a semiconductor substrate, an interconnection layer and a through semiconductor via, the interconnection layer is disposed on an active surface of the semiconductor substrate, the through semiconductor via penetrates the semiconductor substrate from a back surface of the semiconductor substrate to the active surface of the semiconductor substrate;
laterally encapsulating the semiconductor die with an encapsulant;
forming a through encapsulant via penetrating through the encapsulant;
attaching the semiconductor die onto a first carrier before forming the encapsulant, wherein the back surface of the semiconductor substrate faces toward the first carrier, and the active surface of the semiconductor substrate faces away from the first carrier;
after forming the encapsulant and the through encapsulant via, attaching a second carrier to surfaces of the encapsulant, the semiconductor die and the through encapsulant via that face away from the first carrier;
detaching the first carrier after forming the encapsulant and the through encapsulant via;
forming a back redistribution structure over the back surface of the semiconductor substrate and a back surface of the encapsulant, wherein the back redistribution structure is electrically connected with the through semiconductor via and the through encapsulant via;
forming back electrical connectors over the back redistribution structure, wherein the back electrical connectors are electrically connected with the back redistribution structure; and
detaching the second carrier.