Patent ID: 11923200
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An integrated circuit comprising:
a gate structure over a substrate; and
a first silicon-containing material structure in a recess adjacent to the gate structure, wherein the first silicon-containing material structure comprises:
a first layer having an uppermost surface below a top surface of the substrate and a bottommost surface in direct contact with the substrate;
a second layer over the first layer, wherein an entirety of the second layer is above the top surface of the substrate, a first region of the second layer closer to the gate structure is thinner than a second region of the second layer farther from the gate structure, thickness is measured in a direction perpendicular to the top surface of the substrate, and a width, measured perpendicular to the thickness, of the second layer is equal to a width of the first layer; and
a third layer between the first layer and the second layer, wherein at least a portion of the third layer is below the top surface of the substrate.