Patent ID: 11868773
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 13:
14. A method for processing instructions in a processor, the method comprising:
writing information from a first instruction of a compare immediate-conditional branch instruction sequence into an entry of a compare register;
writing, in response to the first instruction not being executed before a compare immediate instruction of the compare immediate-conditional branch instruction sequence is dispatched, a compare immediate field of the compare immediate instruction into the entry of the compare register;
writing, in response to dispatching a conditional branch instruction of the compare immediate-conditional branch instruction sequence, an inferred compare result value into the entry in the compare register;
writing a writeback result of the first instruction into a data field in the entry in the compare register without executing the compare immediate instruction or the conditional branch instruction of the compare immediate-conditional branch instruction sequence;
comparing the writeback result of the first instruction written into the data field in the entry in the compare register to the immediate field of the compare immediate instruction written into the entry in the compare register to generate a computed compare result value; and
comparing the computed compare result value to the inferred compare result value stored in the entry in the compare register;
flushing, in response to the computed compare result value not matching the inferred compare result value, instructions in the processor.