Patent ID: 11935613
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. The device of claim 1, wherein the processor is configured to execute the instructions stored in the memory to, based on a determination that the first value of the RD cycle is equal to the second value of the RD cycle:
program the SPI to the first value of the RD cycle; and
program the SPI to a selected value of the transmit clock delay between the smallest successful value of the transmit clock delay and the largest successful value of the transmit clock delay, and a selected value of the receive clock delay between the smallest successful value of the receive clock delay and the largest successful value of the receive clock delay, wherein the selected value of the transmit clock delay and the selected value of the receive clock delay are selected based on an expected operating temperature of the device.