Patent ID: 11887677
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 8:
9. A memory device, comprising:
an array of memory cells arranged in a plurality of word lines;
a controller configured to program the memory cells of a selected word line of the plurality of word lines in a plurality of program-verify iterations, during a verify portion at least one of the program-verify iterations, the controller being further configured to:
determine a threshold voltage of at least one memory cell of the selected word line relative to a first verify low voltage VL1, a second verify low voltage VL2, and a verify high voltage VH associated with a data state being programmed; and
to determine the threshold voltage of the at least one memory cell, the controller is configured to maintain a count of program-verify iterations since the at least one memory cell passed a verify high voltage of a previously programmed data state or is configured to discharge a sense node through a channel including the at least one memory cell and compare a discharge time to predetermined sense times associated with the first and second verify low voltages and with the verify high voltage.