Patent ID: 11906598
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 5:
6. The testing system of claim 4, wherein the gain stage comprises:
a first resistor, having a first terminal for receiving an inverting input signal of the differential input signal;
a plurality of first circuit stages, coupled to a second terminal of the first resistor, for generating an non-inverting output signal of the differential output signal according to the inverting input signal of the differential input signal;
a second resistor, having a first terminal for receiving an non-inverting input signal of the differential input signal; and
a plurality of second circuit stages, coupled to a second terminal of the second resistor, for generating an inverting output signal of the differential output signal according to the non-inverting input signal of the differential input signal.