Patent ID: 11928768
Assignee: IMAGINATION TECHNOLOGIES LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 3:
4. The method according to claim 3, wherein the initial patch is sub-divided into a left sub-patch and a right sub-patch;
selecting one of the sub-patches formed by sub-division of the initial patch based on one or more stored values comprises: selecting one of the left and right sub-patches formed by sub-division of the initial patch based on one or more stored values; and
repeating the selecting and tessellating until all the sub-patches formed by sub-division of the initial patch have been tessellated until there is no further sub-division of those sub-patches comprises: subsequently tessellating the other of the left and right sub-patches formed by sub-division of the initial patch until there is no further sub-division.