Patent ID: 11862732
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 15:
16. A method for forming a semiconductor device structure, comprising:
forming a first fin, wherein the first fin has a channel region and a source/drain (S/D) region;
forming a stack structure over the first fin, wherein the stack structure comprises a first semiconductor layer and a second semiconductor layer vertically stacked over the first fin;
removing a portion of the second semiconductor layer in the channel region, wherein a portion of the first semiconductor layer is remaining in the channel region;
forming a cladding layer over the remaining first semiconductor material layer in the channel region to form a first nanostructure, wherein the first nanostructure comprises a central portion and an edge portion, and the central portion and the edge portion have different shapes; and
forming a gate dielectric layer surrounding the first nanostructure, wherein a portion of the gate dielectric layer has a hexagonal shape, and a portion of the gate dielectric layer has a quadrilateral shape.