Patent ID: 11907114
Assignee: SMART IOPS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. The data storage system of claim 4, wherein the one or more controllers are further configured to:
receive a second read command during the remapping process;
determine that the second read command is for reading from the second logical address location of the first logical block, wherein the receiving of the second read command occurs:
after the initiating of the remapping process of the first logical block; and
before the writing of the third data to the second one of the second plurality of physical address locations of the remapped block;

read fourth data from the second physical address location of the mapped block;
receive a third read command during the remapping process;
determine that the third read command is for reading from the second logical address location of the first logical block, wherein the receiving of the third read command occurs after the writing of the third data to the second one of the second plurality of physical address locations of the remapped block; and
read the third data from the second one of the second plurality of physical address locations of the remapped block.