Patent ID: 11971736
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Control (Instruments)
Classification: CPC G | IPC G

Claim 16:
17. An apparatus comprising:
a memory die comprising:
a current mirror driver circuit coupled to a power supply bus and comprising a first driver device configured to provide a first bias voltage, and a second driver device configured to provide a second bias voltage different from the first bias voltage, the first driver device and the second driver device conducting a first current; and
a memory array comprising a plurality of sub-arrays, each sub array comprising a corresponding first mirror device coupled to the first bias voltage, and a corresponding second mirror device coupled to the second bias voltage and to the power supply bus, the first mirror device and second mirror device conducting a corresponding second current,
wherein the corresponding second currents of each of the plurality of sub-arrays are substantially equal independent of resistance in the power supply bus.