Patent ID: 11880356
Assignee: GRAVIC, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A method of performing transaction processing in a system, the system including a plurality of processors, each processor executing a plurality of transactions, the method comprising:
(a) receiving at two of the processors requests to process the same subset of the plurality of transactions;
(b) each of the two processors executing each of the requests to process the same subset of the plurality of transactions;
(c) each of the two processors creating local indicia from the outcome of each transaction in the same subset of the plurality of transactions;
(d) each of the two processors assigning a transaction tag to each of the local indicia, wherein the same transaction tag is assigned by each of the two processors executing the same transaction;
(e) queuing the local indicia and the respectively assigned transaction tags from each of the two processors;
(f) detecting when queued transaction tags from the two processors match each other;
(g) comparing the local indicia associated with the matching transaction tags to each other; and
(h) taking a remediation action when the local indicia associated with matching transaction tags do not match each other.