Patent ID: 11935806
Assignee: NICHIA CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device comprising:
a plurality of semiconductor elements;
a submount having a first surface on which the plurality of semiconductor elements are mounted, a second surface located on a side opposite the first surface, and a plurality of lateral surfaces located between the first surface and the second surface, wherein the plurality of lateral surfaces include a first lateral surface, a second lateral surface opposite the first lateral surface, a third lateral surface extending between the first and second lateral surfaces, and a fourth lateral surface extending between the first and second lateral surfaces opposite the third lateral surface, and wherein the submount comprises:
a groove located at the second surface, the groove having a first overall end located at the first lateral surface and a second overall end located at the third lateral surface,
a heat dissipation portion located at the second surface, and
an electrode pattern located at the first surface, the electrode pattern comprising a plurality of electrode pattern portions;

a package substrate on which the submount is mounted;
a first joint member that physically joins the heat dissipation portion to the package substrate; and
a plurality of connection portions located on the first lateral surface, wherein each connection portion electrically connects a respective one of the electrode pattern portions to the package substrate; wherein:
the heat dissipation portion and the plurality of connection portions are separated by the groove and are electrically insulated from each other.