Patent ID: 11881508
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method of fabricating a semiconductor device, the method comprising:
patterning a substrate to form active patterns;
forming a device isolation layer to fill a trench between the active patterns;
forming a sacrificial pattern crossing the active patterns;
forming an interlayer insulating layer on the sacrificial pattern; and
replacing the sacrificial pattern into a gate electrode,
wherein:
forming the device isolation layer includes:
forming a preliminary insulating layer on the substrate to fill the trench;
injecting a light species into the preliminary insulating layer by performing a first ion implantation process; and
performing a wet annealing process on the preliminary insulating layer,

forming the interlayer insulating layer includes:
forming a preliminary insulating layer on the sacrificial pattern,
injecting the light species into the preliminary insulating layer by performing a second ion implantation process, and
performing a wet annealing process on the preliminary insulating layer,

the first and second ion implantation processes are each performed at a temperature of 200° C. to 600° C., and
the light species includes H, He, C, N, O, Ar, Kr, or Xe.