Patent ID: 11950424
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A method of manufacturing a semiconductor device having a first region and a second region, comprising:
forming a gate dielectric layer on a substrate in the second region;
forming a gate electrode material layer on the gate dielectric layer;
forming a first dielectric layer on the substrate in the first region;
forming a second dielectric layer on the substrate in the first region;
forming a first gate electrode on the second dielectric layer;
forming a protective layer to cover the first gate electrode, a lateral surface of the second dielectric layer, a lateral surface of the first dielectric layer, and the gate electrode material layer;
forming a mask layer to cover the protective layer and to cover a portion of the gate electrode material layer;
patterning the gate electrode material layer to form a second gate electrode on the gate dielectric layer by the mask layer;
removing the mask layer to expose the protective layer; and
removing the protective layer on the second gate electrode.