Patent ID: 11871584
Assignee: KEPLER COMPUTING INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 17:
18. A device comprising:
a first region comprising:
a first conductive interconnect within a first dielectric in a first level;
a second level above the first level, the second level comprising:
an electrode structure on at least a portion of the first conductive interconnect, the electrode structure comprising:
a first conductive hydrogen barrier layer; and
a first conductive fill material adjacent to the first conductive hydrogen barrier layer;

an insulator layer laterally surrounding the electrode structure;
a memory device on least a portion of the electrode structure, the memory device comprising a ferroelectric material or a paraelectric material;
a second dielectric comprising an amorphous greater than 90% film density hydrogen barrier material, wherein the memory device is directly adjacent to and embedded within the second dielectric; and
a via electrode comprising:
a second conductive hydrogen barrier layer comprising a first lateral portion on the memory device and first substantially vertical portions directly adjacent to the second dielectric;
a second conductive fill material; and
a first liner layer directly between the second conductive hydrogen barrier layer and the second conductive fill material; and

a second region adjacent to the first region, the second region comprising:
a second conductive interconnect within the first level;
a via structure on the second conductive interconnect, the via structure within the second level;
a metal line within a third level, the metal line in contact with the via structure; and
a third dielectric comprising a less than 90% film density material on the insulator layer, wherein the via structure and the metal line are laterally surrounded by the third dielectric, the third dielectric laterally adjacent to and in contact with the second dielectric, wherein the third dielectric laterally extends on an uppermost surface of the second dielectric;

wherein the first region further comprises:
a contact electrode structure on the via electrode, the contact electrode structure comprising:
a third conductive hydrogen barrier layer comprising a lateral portion on the via electrode and vertical portions adjacent to the third dielectric;
a third conductive fill material; and
a second liner layer directly between the second conductive hydrogen barrier layer and the third conductive fill material.