Patent ID: 11968914
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: nan (nan)
Classification: CPC H | IPC H

Claim 0:
1. A memory device, comprising:
a substrate; a dielectric fin structure disposed above the substrate and extending upwardly from the substrate;
a first resistive material structure disposed adjacent a first side of the dielectric fin structure, the first resistive material comprising a first vertical portion disposed along a first sidewall of the dielectric fin structure and a first horizontal portion that extends parallel to a top surface of the surface and away from the dielectric fin structure in a first direction; and
a second resistive material structure disposed adjacent a second side of the dielectric fin structure, the second side being opposite the first side, the second resistive material comprising a second vertical portion disposed along a second sidewall of the dielectric fin structure and a second horizontal portion that extends parallel to the top surface of the surface and away from the dielectric fin structure in a second direction opposite the first direction.