Patent ID: 11887926
Assignee: KIOXIA CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. The semiconductor storage device according to claim 11, wherein
the memory cell array further includes a contact region between the first memory hole region and the penetrating contact region,
the memory cell array further comprises:
a plurality of second contacts extending in the first direction in the contact region, the plurality of second contacts being electrically connected to the plurality of first conductive layers, respectively; and
first and second inter-block structures that extend in the first and second directions, and between which the first memory hole region and the contact region are located, wherein a distance between the first and second inter-block structures in the third direction at the first memory hole region is less than a distance between the first and second inter-block structures in the third direction at the contact region.