Patent ID: 11955423
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A method of forming a semiconductor device, the method comprising:
forming a first conductive line and a second conductive line over a semiconductor substrate;
forming a first passivation layer over the first conductive line and the second conductive line, wherein the first passivation layer extends along sidewalls of the first conductive line and the second conductive line;
forming a second passivation layer over the first passivation layer;
after forming the first passivation layer and the second passivation layer, forming a first under-bump metallurgy (UBM) structure over the first conductive line, the first UBM structure extending through the first passivation layer and the second passivation layer and being electrically coupled to the first conductive line; and
after forming the first passivation layer and the second passivation layer, forming a second UBM structure over the second conductive line, the second UBM structure extending at least partially through the second passivation layer, the second UBM structure being electrically isolated from the second conductive line by at least a portion of the first passivation layer.