Patent ID: 11973020
Assignee: QUALCOMM INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. An apparatus comprising:
a first top contact;
a second top contact, adjacent the first top contact;
a first mesa disposed below the first top contact;
a second mesa disposed below the second top contact, wherein the first mesa and the second mesa comprise dielectric material;
a first plate of a metal-insulator-metal (MIM) capacitor disposed below the first top contact and electrically coupled to the first top contact;
a first insulator of the MIM capacitor disposed on the first plate;
a second plate of the MIM capacitor disposed on the first insulator and electrically coupled to the second top contact;
a second insulator of the MIM capacitor disposed on the second plate;
a third plate of the MIM capacitor disposed on the second insulator and electrically coupled to the first top contact; and
a second MIM capacitor, wherein the second MIM capacitor has a second plate disposed between a first plate and a third plate and wherein the second plate is coupled to the second top contact.