Patent ID: 11875748
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 2:
3. The gate driving circuit of claim 1, wherein the signal writing circuit comprises a first transistor; the first control circuit comprises a second transistor and a third transistor; the second control circuit comprises a fourth transistor, a fifth transistor, a sixth transistor, and a first capacitor; the signal output circuit comprises a seventh transistor, an eighth transistor, and a second capacitor,
a control electrode of the first transistor is coupled to the first clock signal terminal, a first electrode of the first transistor is coupled to the signal input terminal, and a second electrode of the first transistor is coupled to the first node;
a control electrode of the second transistor is coupled to the first node, a first electrode of the second transistor is coupled to the first clock signal terminal, and a second electrode of the second transistor is coupled to the second node;
a control electrode of the third transistor is coupled to the first clock signal terminal, a first electrode of the third transistor is coupled to the first power supply terminal, and a second electrode of the third transistor is coupled to the second node;
a control electrode of the fourth transistor is coupled to the second node, a first electrode of the fourth transistor is coupled to the second clock signal terminal, and a second electrode of the fourth transistor is coupled to a first electrode of the fifth transistor;
a control electrode of the fifth transistor is coupled to the second clock signal terminal, and a second electrode of the fifth transistor is coupled to the third node;
a control electrode of the sixth transistor is coupled to the first node, a first electrode of the sixth transistor is coupled to the second power supply terminal, and a second electrode of the sixth transistor is coupled to the third node;
a first electrode of the first capacitor is coupled to the second node, and a second electrode of the first capacitor is coupled to the second electrode of the fourth transistor;
a control electrode of the seventh transistor is coupled to the third node, a first electrode of the seventh transistor is coupled to the second power supply terminal, and a second electrode of the seventh transistor is coupled to the signal output terminal;
a control electrode of the eighth transistor is coupled to the first node, a first electrode of the eighth transistor is coupled to the first power supply terminal, and a second electrode of the eighth transistor is coupled to the signal output terminal;
a first electrode of the second capacitor is coupled to the third node, and a second electrode of the third capacitor is coupled to the second power supply terminal.