Patent ID: 11929321
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A method for forming a semiconductor device structure, comprising:
forming a first gate electrode layer and a first source/drain contact over a substrate;
forming a first metal via to connect the first gate electrode layer, and a second metal via to connect the first source/drain contact;
forming an organic film including amphiphilic-like molecules as a metal inhibition layer over the first gate electrode layer and the first source/drain contact, wherein the organic film exposes a top surface of the first metal via and a top surface of the second metal via; and
growing a first metal feature with a convex top surface from the exposed top surface of the first metal via and a second metal feature with a convex top surface from the exposed top surface of the second metal via by a deposition process using the metal inhibition layer.