Patent ID: 11862503
Assignee: MONOLITHIC 3D INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H  B | IPC G  H

Claim 14:
15. A method for producing a 3D semiconductor device, the method comprising:
providing a first level, said first level comprising a first single crystal layer;
forming a first metal layer on top of said first level;
forming a second metal layer on top of said first metal layer;
forming at least one second level disposed on top of or above said second metal layer;
performing a first lithography step on said second level;
forming at least one third level disposed on top of or above said second level; and then
performing a second lithography step on said third level;
performing a first set of additional processing steps to form a plurality of first memory cells within said second level and a plurality of second memory cells within said third level,
wherein said additional processing steps comprise deposition processes and etch processes,
wherein each of said plurality of first memory cells comprises at least one second transistor, and
wherein each of said plurality of second memory cells comprises at least one third transistor; and then

performing a deposition step that simultaneously deposits gate electrodes for both said at least one second transistor and said at least one third transistor,
wherein said gate electrodes comprise metal,

forming a third metal layer disposed on top of said third level; and
forming a through layer via (TLV) connecting said third metal layer to said second metal layer.