Patent ID: 11948486
Assignee: FINDEACHIP INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 2:
3. The integrated circuit according to claim 2,
wherein the first data signal according to a write-type communication protocol between the microcontroller unit and the serial interface includes:
a first register addressing packet that includes a first start bit indicating the start of a signal, a first adjacent bit that follows the first start bit and indicates a value opposite to a value of the first start bit, a first type indication bit that follows the first adjacent bit and indicates that the first data signal is a write-type among a read-type and the write-type, a first command area that follows the first type indication bit and corresponds to a plurality of consecutive bits indicating register address information on a target register of the first data signal among registers of the integrated circuit, and a first stop bit that follows the first command area and indicates the stop of the signal; and
a register data packet that includes a third start bit that follows the first stop bit of the first register addressing packet and indicates the start of a signal, a data area that follows the third start bit and corresponds to a plurality of consecutive bits indicating register data information to be provided to the target register, and a third stop bit that follows the data area and indicates the stop of the signal, and
the truesum feedback controller performs an analysis for calculating the number of bits having ‘1’ among the plurality of consecutive bits in the first command area of the first register addressing packet and the data area of the register data packet as the truesum result value.