Patent ID: 11862587
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A method of manufacturing a semiconductor package structure, the method comprising:
providing a first semiconductor device having an active surface;
forming a plurality of conductive elements over the active surface of first semiconductor device;
bonding a second semiconductor device to the active surface of the first semiconductor device, wherein the conductive elements are disposed outside the second semiconductor device;
forming a redistribution structure in electrical connection with the first semiconductor device via the conductive elements, wherein the second semiconductor device is disposed between the first semiconductor device and the redistribution structure; and
providing an interposer surrounding the first semiconductor device and the second semiconductor device, wherein the first semiconductor device includes a digital processing device, and the second semiconductor device includes a decoupling capacitor, further comprising providing a third semiconductor device on the redistribution structure, wherein the third semiconductor device includes a memory device.