Patent ID: 11937465
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 13:
14. The array substrate according to claim 13, wherein
each of the data writing circuit, the light emission reset circuit and the light emission control circuit comprises at least one of the transistors, the transistor of the data writing circuit is defined as a data writing transistor, the transistor of the light emission reset circuit is defined as a light emission reset transistor, the transistor of the light emission control circuit is defined as a light emission control transistor, the light emission control circuit comprises at least two light emission control transistors being a first light emission control transistor and a second light emission control transistor, and the storage circuit comprises a storage capacitor;
a first terminal of the data writing transistor is coupled to the data signal input terminal, a gate of the data writing transistor is coupled to the scan signal input terminal, and a second terminal of the data writing transistor is coupled to the first terminal of the driving circuit;
a first terminal of the storage capacitor is coupled to the first power voltage terminal, a second terminal of the storage capacitor is coupled to the control terminal of the driving circuit, and the storage capacitor is configured to store a voltage difference between the first power voltage terminal and the control terminal of the driving circuit;
a first terminal of the first light emission control transistor is coupled to the first power voltage terminal, a gate of the first light emission control transistor is coupled to the light emission control signal input terminal, and a second terminal of the first light emission control transistor is coupled to the first terminal of the driving circuit;
a first terminal of the second light emission control transistor is coupled to the second terminal of the driving circuit, a gate of the second light emission control transistor is coupled to the light emission control signal input terminal, and a second terminal of the second light emission control transistor is coupled to a first terminal of the light emission device; and
a first terminal of the light emission reset transistor is coupled to the light emission reset voltage terminal, a gate of the light emission reset transistor is coupled to the light emission reset control signal input terminal, and a second terminal of the light emission reset transistor is coupled to a first terminal of the light emission device.