Patent ID: 11900996
Assignee: GLOBALFOUNDRIES U.S. INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A memory structure comprising:
a first voltage boost line;
a first wordline;
a second voltage boost line, wherein the first wordline is between and parallel to the first voltage boost line and the second voltage boost line;
a cell supply line;
a third voltage boost line, where the cell supply line is between and parallel to the second voltage boost line and the third voltage boost line;
a second wordline;
a fourth voltage boost line, wherein the second wordline is between and parallel to the third voltage boost line and the fourth voltage boost line; and
a voltage boost circuit connected to the first voltage boost line, the first wordline, the second voltage boost line, the third voltage boost line, the second wordline, and the fourth voltage boost line.