Patent ID: 11907059
Assignee: PHISON ELECTRONICS CORP.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A memory control circuit unit, configured to control a memory storage device, wherein the memory storage device comprises a rewritable non-volatile memory module, and the memory control circuit unit comprises:
a host interface configured to be coupled to a host system;
a memory interface configured to be coupled to the rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of super-physical units, the super-physical units comprise at least two physical erasing units, and the at least two physical erasing units belong to different operation units and each of the physical erasing units comprises a plurality of physical programming units; and
a memory management circuit coupled to the host interface and the memory interface,
wherein the memory management circuit is further configured to read data stored in a first super-physical unit without a corresponding RAID ECC code when the memory storage device is powered on again and detected as an abnormal power loss to obtain first data,
wherein the first super-physical unit is a last super-physical unit to which data is written before the abnormal power loss occurs, and
the memory management circuit is further configured to copy the first data to a second super-physical unit,
wherein before the operation of reading the data stored in the first super-physical unit without the corresponding RAID ECC code to obtain the first data, the memory management circuit is further configured to: scan the first super-physical unit to obtain an amount of written data of the first super-physical unit when the memory storage device is powered on again and detected as the abnormal power loss; determine whether the amount of written data is greater than a first threshold value; and read all data stored in the first super-physical unit to obtain second data, and copy the second data to the second super-physical unit in response to the amount of written data not being greater than the first threshold value.