Patent ID: 11888026
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. An integrated circuit device comprising:
a fin-type active region on a substrate and extending in a first horizontal direction;
at least one nanosheet separated from a fin top of the fin-type active region in a vertical direction and having a bottom surface facing the fin top of the fin-type active region;
a gate line on the fin-type active region, surrounding the at least one nanosheet, and extending in a second horizontal direction that is different from the first horizontal direction; and
a source/drain region on the fin-type active region, adjacent to the gate line, and in contact with the at least one nanosheet,
wherein the source/drain region includes a lower main body layer and an upper main body layer, the lower and upper main body layers being sequentially stacked on the fin-type active region in the vertical direction,
wherein a top surface of the lower main body layer includes a lower facet declining toward the substrate as it extends in a direction from the at least one nanosheet to a center of the source/drain region,
wherein the upper main body layer includes a bottom surface contacting the lower facet of the top surface of the lower main body layer, and a top surface having an upper facet,
wherein with respect to a vertical cross section, the lower facet extends along a first line, the upper facet extends along a second line, and
wherein the first line and the second line intersect each other.