Patent ID: 11972814
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A memory device, comprising:
a plurality of memory cells, the plurality of memory cells including a first set of memory cells in a first set of planes or a first physical block and a second set of memory cells in a second set of planes or a second physical block; and
programming means in communication with the memory cells for programming the memory cells of the first and second sets of memory cells to respective final threshold voltages associated with a plurality of programmed data states in a first programming pass and then a second programming pass,
in the first programming pass, the programming means being configured to program the memory cells in a plurality of program-verify iterations, each program-verify iteration including application of a programming pulse to a control gate of a selected word line, the program-verify iterations also including verify operations to check the threshold voltages of the memory cells being programmed,
for the first set of memory cells, the verify operations including verifying a first set of checkpoint data states of the first set of memory cells, wherein the first set of checkpoint data states is a first subset of the plurality of programmed data states, and skipping verification of remaining programmed data states of the first set of memory cells, and
for the second set of memory cells, the verify operations including verifying a second set of checkpoint data states of the second set of memory cells, wherein the second set of checkpoint data states is a second subset of the plurality of programmed data states that is different than the first set of checkpoint data states, and skipping verification of remaining programmed data states of the second set of memory cells, and
in the second programming pass, the programming means being configured to verify the first and second sets of memory cells at all of the plurality of programmed data states.