Patent ID: 11916123
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 10:
11. A semiconductor device, comprising:
a multi-channel active pattern;
a gate structure which intersects the multi-channel active pattern and includes a gate electrode, on the multi-channel active pattern;
a source/drain pattern placed on both sides of the gate structure, on the multi-channel active pattern;
wherein the source/drain pattern includes a silicon-germanium liner which defines a liner recess and is in contact with the multi-channel active pattern, and a filling semiconductor pattern which fills the liner recess on the silicon-germanium liner;
wherein the silicon-germanium liner includes doped carbon;
wherein the filling semiconductor pattern includes silicon doped with an n-type first impurity;
wherein the source/drain pattern further includes an insertion liner pattern, which extends between the silicon-germanium liner and the filling semiconductor pattern, and extends along a profile of the liner recess; and
wherein the insertion liner pattern includes silicon doped with an n-type second impurity different from the first impurity.