Patent ID: 11899532
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. The apparatus of claim 2, wherein the one or more controllers is further configured to cause the apparatus to:
determine the latency threshold based at least in part on the timeout duration, wherein, to determine the latency threshold, the one or more controllers are further configured to cause the apparatus to:
determine average times for completing the boot sequence based at least in part on combinations of the read latency, the error rate, or the quantity of bits configured to be output by the respective memory cells of the set of memory cells; and
select, based at least in part on the average times for completing the boot sequence, a combination of the latency threshold, the error threshold, the data level threshold, wherein the combination corresponds to an average time of the average times that is less than the timeout duration.