Patent ID: 11967955
Assignee: SAMBANOVA SYSTEMS, INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. The integrated circuit of claim 17, the clocked storage element further comprising:
a first clocked pull-up current path consisting of two p-channel transistors between the first latch output data node and a VDD supply line and a first clocked pull-down current path consisting of two n-channel transistors between the first latch output data node and a VSS supply line;
a second clocked pull-up current path consisting of two p-channel transistors between the second latch output data node and the VDD supply line, and a second clocked pull-down current path consisting of two n-channel transistors between the second latch output data node and a VSS supply line; and
a clocked feedback path from second latch output data node to gates of both an n-channel transistor and a p-channel transistor of the second latch.