Patent ID: 11941294
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A storage device, comprising:
a memory device configured to perform an operation in response to an input command; and
a memory controller configured to:
receive a request from a host,
generate a command corresponding to the request,
store the generated command in a command queue,
control the command queue to provide the memory device sequentially with commands stored in the command queue, as the input command,
determine, when a read request is input thereto from the host while the memory device is performing an operation in response to each of the commands, a delay amount of time for output of a suspend command that instructs suspension of the operation based on a number of read commands stored in the command queue, and
provide, after the delay amount of time has elapsed, the memory device with the suspend command,
wherein a length of the delay amount of time depends on the number of read commands.