Patent ID: 11947239
Assignee: CISCO TECHNOLOGY, INC.
Field: Optics (Instruments)
Classification: CPC G | IPC G

Claim 15:
16. A driver circuit, comprising:
a plurality of buffers arranged in series, wherein a given buffer of the plurality of buffers is configured to accept a first input and a second input, and to produce a first output and a second output,
wherein when the given buffer is not a last buffer in the series:
a first boost segment includes a first non-inverting amplifier having an output connected to a first input node and an input connected to a first output node and a second boost segment includes a second non-inverting amplifier having an output connected to a second input node and an input connected to a second output node; and

wherein when the given buffer is the last buffer in the series:
the first boost segment includes a first inverting amplifier having an input and an output connected to the first input node and the second boost segment includes a second inverting amplifier having an input and an output connected to the second input node.