Patent ID: 11937234
Assignee: ZTE CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. A terminal, comprising:
a processor and a memory storing processor-executable instructions which, when executed by the processor, are configured to:
receive first signaling and second signaling,
wherein the first signaling comprises a transmission configuration indication (TCI) state, and the second signaling is configured for triggering a first reference signal indicated in the TCI state; and
determine, according to the first signaling, a target channel or a target signal scheduled by the first signaling,
wherein a target channel or a target signal scheduled by the first signaling uses quasi-co-location (QCL) information corresponding to the first reference signal transmitted before a first symbol or QCL information corresponding to the second signaling transmitted before a first symbol,, wherein the first symbol comprises at least one of:
a first time domain symbol occupied by the first signaling;
a first time domain symbol occupied by a physical channel where the first signaling is located;
an N1-th time domain symbol before the target channel or the target signal scheduled by the first signaling, wherein N1 is a positive integer;
an N2-th time domain symbol before the first signaling, wherein N2 is a positive integer; or
an N2-th time domain symbol before a physical channel where the first signaling is located, wherein N2 is a positive integer.