Patent ID: 11901442
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A semiconductor device comprising:
a first semiconductor fin and a second semiconductor fin disposed over a semiconductor substrate and extending in a first direction, each of the first and second semiconductor fins including a channel region and a bottom region on which the channel region is disposed;
a liner dielectric layer disposed on side walls of the bottom region of each of the first and second semiconductor fins;
an isolation insulating layer from which the channel region of the first and second semiconductor fins protrudes and in which the bottom region of the first and second semiconductor fins is embedded; and
a first gate structure disposed over the channel region of the first semiconductor fin and a second gate structure disposed over the channel region of the second semiconductor fin, wherein:
a cap semiconductor layer is an epitaxially formed layer and disposed on the channel region of each of the first and second semiconductor fins, and
a top of the liner dielectric layer is only partially covered by the cap semiconductor layer at each of the first and second semiconductor fins.