Patent ID: 11860786
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. The system of claim 1, further comprising:
wherein when the configurable data bit is in the first state, the logic circuit is configured to:
provide commands to a second command bus for accessing the first cache, when the execution type is the non-speculative execution of instructions; and
provide commands to the second command bus for accessing the second cache, when the execution type is the speculative execution of instructions; and

wherein when the configurable data bit is in the second state, the logic circuit is configured to:
provide commands to the second command bus for accessing the second cache, when the execution type is the non-speculative execution of instructions; and
provide commands to the second command bus for accessing the first cache, when the execution type is the speculative execution of instructions.