Patent ID: 11922274
Assignee: INTEL CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC G  H  B | IPC G  H

Claim 12:
13. A method of fabricating a quantum dot device, the method comprising:
providing a quantum well stack structure comprising a quantum well stack that includes a quantum dot formation region;
providing a plurality of gates extending to the quantum dot formation region, wherein the plurality of gates includes a first gate coupled to a first doped region, a second gate coupled to a second doped region, and a third gate coupled to a third doped region, the third gate being between the first gate and the second gate; and
providing an insulating material over the quantum well stack, the insulating material comprising a first trench extending toward the quantum well stack and a second trench extending toward the quantum well stack, wherein the second trench intersects the first trench, and wherein a gate metal of the third gate has a first portion that is at least partially in the first trench and has a second portion that is at least partially in the second trench.