Patent ID: 11934481
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. A matrix multiplier, comprising:
an operation circuit, wherein the operation circuit comprises operation units of X rows and Y columns; and
a controller connected to the operation circuit, wherein the controller is configured to perform the following actions:
first dividing a first matrix into blocks in a unit of a sub-block whose size is X * L; and
second dividing a second matrix into blocks in a unit of a sub-block whose size is L * Y; wherein
the controller is further configured to perform the following action:
inputting sub-blocks of the first matrix r and sub-blocks of the second matrix into the operation units of X rows and Y columns, so as to perform matrix multiplication operation between sub-blocks of the first matrix and sub-blocks of the second matrix and wherein:
if either the first or the second dividing cannot be done exactly by an integer value, filling at least one matrix value with the number 0.