Patent ID: 11972292
Assignee: XCONN TECHNOLOGIES HOLDINGS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 11:
12. A method, comprising:
receiving a packet in a port of a plurality of ports through which the packet ingresses and egresses a switch, the packet being divisible into a plurality of packet segments; and
allocating memory segments in a memory including a plurality of banks such that a beginning packet segment of the packet is stored in a selected bank of the plurality of banks and each subsequent packet segment in the packet is stored in order in a next adjacent bank of the plurality of banks, wherein the allocating of the memory segments in the memory comprises:
storing the beginning packet segment to the selected bank;
locking the next adjacent bank for a next packet segment, wherein the locking of the next adjacent bank includes preventing a beginning segment for a new packet from being stored in the same cycle at the next adjacent bank; and
storing the next packet segment in the next adjacent bank.