Patent ID: 11917806
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. The method of manufacturing a semiconductor structure according to claim 1, wherein after the step of removing a part of the first dielectric layer and a part of the gate oxide layer to expose the top surface of each of the active pillars, and before the step of forming a contact layer on the top surface of each of the active pillars, the method of manufacturing a semiconductor structure further comprises:
forming an initial metal layer on a top surface of the retained first dielectric layer and on the top surface of each of the active pillars;
removing a part of the initial metal layer and retaining the initial metal layer located on the top surface of each of the active pillars, to form a metal layer; and
performing high-temperature tempering process on the metal layer to form the contact layer.