Patent ID: 11899064
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Measurement (Instruments)
Classification: CPC G | IPC G

Claim 16:
17. A device, comprising:
a first die; and
a second die, at least one of the first die and second die including interconnections between the first die and the second die, wherein
each of the first and second dies comprises a plurality of latches, including a respective latch corresponding to each one of the interconnections,
a scan path comprises a closed loop comprising each of said plurality of latches in the first and second dies, and wherein the scan path goes consecutively through a first latch in the first die, a second latch in the second die a third latch in the second die, and a fourth latch in the first die,
the first and fourth latches in the first die are adjacent to each other, and
the second and third latches in the second die are adjacent to each other.