Patent ID: 11893419
Assignee: APPLE INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. A method comprising:
receiving an indication that a process is to be performed at a non-blocking accelerator from a processor at an interface register of a plurality of interface registers for a plurality of non-blocking accelerators;
in response to the indication, causing the non-blocking accelerator to enter an idle state;
in the idle state, receiving a run indication from the processor, wherein the run indication indicates that the process at the non-blocking accelerator is to be started, wherein the indication comprises a value in a run register of the plurality of interface registers;
based at least in part on the run indication, entering a busy state and beginning the process in the non-blocking accelerator while the processor is configured to perform other processing while the process is completed;
in the busy state, causing the non-blocking accelerator to change from the busy state to the idle state and to raise a completion indication of the plurality of interface registers to indicate that the process has been completed; and
causing a second process to be started in a blocking hardware accelerator, wherein the blocking accelerator aids in the second process without using the plurality of interface registers other than an accelerator identifier register.