Patent ID: 11901238
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A semiconductor device structure, comprising:
a source/drain feature over a substrate;
a contact over the source/drain feature;
a dielectric layer over the contact;
a via through the dielectric layer and over the contact, wherein the via comprises a plurality of grains; and
an inhibition layer along grain boundaries of the grains of the via, wherein a first material of the via is different than a second material of the inhibition layer, and the inhibition layer includes a first portion laterally sandwiched between a first grain and a second grain of the plurality of grains and a second portion vertically sandwiched between the first grain and a third grain of the plurality of grains.