Patent ID: 11869579
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 17:
18. The page buffer circuit of claim 17, wherein
each of the plurality of page buffers is configured perform a second refresh operation that, in the case where the inverted data in the storage node represent the second state, stores the data representing the first state in the storage node, and
to perform the second refresh operation that stores the data representing the first state in the storage node,
the precharge circuit is configured to precharge the sensing node to the power supply voltage in response to the load signal,
the read transistor is configured to turn on in response to the read signal,
the storage transistor is configured to be turned off by the second voltage corresponding to the second state of the inverted data of the storage node to provide the turned-off storage transistor,
the ground voltage is not provided to the sensing node by the turned-off storage transistor such that the sensing node is configured to maintain the power supply voltage corresponding to the data having the first state,
the write transistor is configured to turn on in response to the write signal to provide the turned-on write transistor, and
the turned-on write transistor connects the sensing node to the storage node such that the data representing the first state are stored in the storage node by the charge sharing between the storage node and the sensing node.