Patent ID: 11894863
Assignee: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 5:
6. An apparatus for generating a decoding position control signal for decoding using polar codes, the apparatus comprising:
a processor; and
a memory storing instructions executable by the processor;
wherein the processor is configured to:
generate a decoding tree obtained by forming a plurality of nodes in a hierarchical structure for a polar-encoded codeword;
decode the codeword using a successive cancellation (SC) decoding technique;
generate a control signal through a preset operation relationship based on a position of a bit returned during re-decoding among the decoded codeword; and
wherein the processor is further configured to:
perform re-decoding at the position of the bit returned during re-decoding based on the control signal, and
generate the control signal based on a first bit string indicating the position of the bit returned during the re-decoding, and a second bit string calculated through the preset operation relationship with the first bit string,
wherein the first bit string and the second bit string are expressed in a binary system having a log2N number of bit places (where N is a codeword length of the codeword),
wherein the apparatus further comprises an adder and an exclusive-OR (XOR) operator, and
wherein in the preset operation relationship, the second bit string is output by adding the first bit string and 2's complement of 1 using the adder, and performing an exclusive-OR operation of the first bit string and a result of the addition using the XOR operator.