Patent ID: 11942404
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. A system, comprising:
a central processing unit (CPU); and
at least one memory device connected to the CPU, the at least one memory device comprising:
a device substrate comprising a semiconductor material and bond pads coupled with an active surface of the device substrate;
a package substrate secured to the device substrate, the package substrate configured to route signals to and from the bond pads; and
a ball grid array supported on, and electrically connected to, the package substrate, the ball grid array comprising an odd number of columns, such that the ball grid array comprises a central column having equal numbers of other columns on opposite sides of the central column;

wherein each ball of the ball grid array positioned and configured to carry a clock signal or a strobe signal is located in the central column of the ball grid array;
wherein a total number of balls in the ball grid array is between about 115 and about 120.