Patent ID: 11907301
Assignee: ARM LIMITED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 15:
16. An apparatus comprising:
processing circuitry to perform an operation based on information specified in a control table stored in a memory system, the control table comprising a plurality of entries each specifying a first limit address and one of a second limit address and a size, for identifying limits of a corresponding address region of variable size within an address space, where the plurality of entries are arranged in the control table in order of the first limit address; and
table lookup circuitry to perform a binary search procedure to identify whether the control table comprises an entry corresponding to a query address, the binary search procedure comprising a plurality of search window narrowing steps for narrowing a current search window of candidate entries of the control table to a narrower search window comprising fewer candidate entries; in which:
in a given search window narrowing step, the table lookup circuitry is configured to narrow the current search window based on a comparison of the query address against the first limit address of a selected candidate entry of the current search window, independent of said one of the second limit address and the size of the selected candidate entry; and
following a final search window narrowing step which narrows the current search window to a single candidate entry of the control table, the table lookup circuitry is configured to determine that said single candidate entry is the entry corresponding to the query address when the query address is within the corresponding address region defined by the first limit address and said one of the second limit address and the size of said single candidate entry;
the apparatus comprising entry storage to store at least one entry,
where the entry storage comprises one of:
an entry cache to cache at least one entry of the control table previously obtained from the memory system; and
static register storage to store at least one further entry configurable by a static entry parameter configuration operation, each further entry specifying control information for a corresponding address region of variable size within the address space, for which limits are identified by a first limit address and one of a second limit address and a size,

in which the table lookup circuitry is configured to limit the current search window for an initial search window narrowing step of the binary search procedure based on information derived from said at least one entry stored in the entry storage.