Patent ID: 11967594
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 8:
9. A semiconductor device structure, comprising:
a first field effect transistor, comprising:
a first source/drain epitaxial feature; and
a second source/drain epitaxial feature;

a second field effect transistor disposed over the first field effect transistor, wherein the second field effect transistor comprises:
a third source/drain epitaxial feature disposed over the first source/drain epitaxial feature; and
a fourth source/drain epitaxial feature disposed over the second source/drain epitaxial feature;

a dielectric material disposed between the first source/drain epitaxial feature and the third source/drain epitaxial feature; and
a liner surrounding more than one surface of the dielectric material, wherein the liner is U-shaped.