Patent ID: 11966741
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 16:
17. The apparatus of claim 1, wherein the execution queue further comprises:
a first priority queue configured to store one or more thread identifiers, of the plurality of thread identifiers, for one or more first priority execution threads; and
a second priority queue configured to store one or more thread identifiers, of the plurality of thread identifiers, for one or more second priority execution threads; and wherein the control logic and thread selection circuit further comprises:
thread selection control circuitry coupled to the execution queue, the thread selection control circuitry configured to select a first thread identifier, of the one or more thread identifiers for the one or more first priority execution threads, from the first priority queue at a first frequency, and to select a second thread identifier, of the one or more thread identifiers for the one or more second priority execution threads from the second priority queue at a second frequency, for instruction execution by the processor core, the second frequency lower than the first frequency.