Patent ID: 11925025
Assignee: RENESAS ELECTRONICS CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 4:
5. A semiconductor device comprising a memory cell and a switch circuit formed on a semiconductor substrate,
wherein the switch circuit is disposed outside the memory cell and electrically connected to the memory cell,
wherein the memory cell includes a plurality of transistors including a first transistor,
wherein the switch circuit comprises a second transistor electrically connected to the first transistor,
wherein the first transistor includes:
a first word gate formed on a first gate insulating film; and
a second word gate formed on a second gate insulating film having a thickness thicker than the first gate insulating film,
wherein the second transistor includes:
a second word gate formed on a third gate insulating film; and
a second coupling gate formed on a fourth gate insulating film having a thickness thicker than the third gate insulating film,
wherein the first transistor includes a first source electrode electrically connected to a second source electrode of the second transistor, and
wherein the semiconductor device further comprises:
a first driver circuit configured to supply a first voltage with the first word gate;
a second driver circuit configured to supply a second voltage with the second word gate;
a third driver circuit configured to supply a third voltage higher than the first voltage with the first coupling gate; and
a fourth driver circuit configured to supply a fourth voltage higher than the second voltage with the second coupling gate.