Patent ID: 11948840
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A method, comprising:
forming a plurality of fins over a substrate, the plurality of fins comprising a first fin, a second fin, and a dielectric fin;
forming an isolation region interposed between the first fin and the second fin, the isolation region being interposed between the dielectric fin and the substrate;
depositing a semiconductor material, depositing the semiconductor material comprising forming a first semiconductor layer over the first fin, a second semiconductor layer over the second fin, and a third semiconductor layer over the dielectric fin, wherein the first fin is free of the second semiconductor layer and the third semiconductor layer, wherein the second fin is free of the first semiconductor layer and the third semiconductor layer, and wherein the dielectric fin is free of the first semiconductor layer and the second semiconductor layer;
forming an oxide layer over the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer; and
forming a gate structure over the oxide layer.