Patent ID: 11874768
Assignee: XILINX, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 16:
17. The method of claim 10, further comprising:
implementing the input-output circuit, emulator circuit, and translator circuit in programmable logic circuitry of a system-on-chip that includes a processor subsystem and a programmable logic subsystem having the programmable logic circuitry and look-up table (LUT) RAM that is a storage circuit of the plurality of storage circuits, wherein the processor subsystem includes one or more instruction processors and an on-chip memory circuit that is a storage circuit of the plurality of storage circuits; and
wherein the mapping includes:
mapping a first subset of addresses of the flash memory device to addresses of the LUT RAM, and
mapping a second subset of addresses of the flash memory device to addresses of the on-chip memory circuit.