Patent ID: 11894336
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 18:
19. The method according to claim 16, wherein the step of forming the second sub-layer comprises:
forming a seed material layer over the first-sub layer;
forming a first photoresist layer over the seed material layer, wherein the first photoresist layer comprises a plurality of first openings exposing at least a portion of the seed material layer;
filling a first conductive material into the plurality of first openings of the first photoresist layer to form a plurality of first conductive patterns;
removing the first photoresist layer;
forming a second photoresist layer over the seed material layer and the plurality of first conductive patterns, wherein the second photoresist layer comprises a plurality of second openings exposing at least a portion of the plurality of first conductive patterns;
filling a second conductive material into the plurality of second openings of the second photoresist layer to form a plurality of second conductive patterns;
removing the second photoresist layer and portions of the seed material layer exposed by the plurality of first conductive patterns to form the plurality of routing patterns, the plurality of second conductive vias, and the second alignment mark, wherein the plurality of second conductive vias is disposed on the plurality of routing patterns;
forming a dielectric material layer over the first-sub layer to encapsulate the plurality of routing patterns, the plurality of second conductive vias, and the second alignment mark; and
removing a portion of the dielectric material layer to form a dielectric layer exposing a top surface of the plurality of second conductive vias and a top surface of the second alignment mark.