Patent ID: 11861171
Assignee: XILINX, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A system, comprising:
a first multi-port random-access memory (RAM) configured to store an instruction table, wherein the instruction table specifies a regular expression for application to a data stream;
a second multi-port RAM configured to store a capture table, wherein the capture table specifies capture entries that are decodable for tracking position information for a sequence of one or more characters of the data stream matching a capture sub-expression of the regular expression;
one or more regular expression engine circuits each configured to process the data stream to determine match states by tracking active states for the regular expression and priorities for the active states by, at least in part, storing the active states of the regular expression in a plurality of priority first-in-first-out (FIFO) memories in decreasing priority order; and
one or more capture engine circuits each configured to operate in coordination with a selected regular expression engine circuit to determine one or more characters of the data stream that match the capture sub-expression based on the active state being tracked by the regular expression engine circuit and decoding the capture entries of the capture table.