Patent ID: 11908952
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC B  H

Claim 8:
9. A semiconductor device, comprising:
a substrate;
a channel on the substrate;
a gate electrode on the channel, the gate electrode extending in a first direction;
source/drain structures on opposing sides of the gate electrode, the source/drain structures each comprising a first epitaxial layer, a second epitaxial layer on the first epitaxial layer, and a third epitaxial layer on the second epitaxial layer; and
spacers on side surfaces of the gate electrode, the spacers being in contact with the third epitaxial layer,
wherein the first epitaxial layer surrounds a bottom surface and side surfaces of the second epitaxial layer,
wherein the side surfaces of the second epitaxial layer comprise first portions that are inclined so that a width of the second epitaxial layer decreases toward the substrate, second portions that are curved downwardly from upper portions of the first epitaxial layer and are connected to upper ends of the first portions, third portions curved from lower ends of the first portions,
wherein a first width of the second epitaxial layer between the second portions is greater than a second width of a portion of the first epitaxial layer contacting the first portions of the second epitaxial layer on each of the side surfaces of the second epitaxial layer,
wherein at least one of the source/drain structures comprises an upper portion having a convex shape protruding upwardly to a level higher than an upper surface of the channel,
wherein the at least one of the source/drain structures comprises a middle portion below the upper portion,
wherein a width of the upper portion in a second direction perpendicular to the first direction is smaller than a width of the middle portion in the second direction,
wherein the third epitaxial layer comprises a convex upper surface.