Patent ID: 11868741
Assignee: REBELLIONS INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A processing element, included in a neural processor, the processing element, comprises:
a weight register configured to store a weight;
an input activation register configured to store input activation;
a flexible multiplier, comprising:
a first multiplier of a first precision;
a second multiplier of the first precision; and
digit aligning circuit, configured to generate result data by performing a multiplication operation of the weight and the input activation by using the first multiplier or using both the first multiplier and the second multiplier in response to a calculation mode signal,
wherein the first multiplier generates a first partial multiplication group using the multiplication operation of the weight and the input activation wherein the first partial multiplication has a first digit, the second multiplier generates a second partial multiplication group using the multiplication operation of the weight and the input activation wherein the second partial multiplication has a second digit different from the first digit, the second multiplier generates a third partial multiplication group that has the first digit, and the digit aligning circuit generates a first aligned partial multiplication group including the first partial multiplication group and the third partial multiplication group and a second aligned partial multiplication group including the second partial multiplication group when the calculation mode is a first mode signal associated with a second precision greater than the first precision; and

a saturating adder configured to generate a partial sum by using the result data.