Patent ID: 11917196
Assignee: BYTEDANCE (HK) LIMITED
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. An apparatus for processing video data comprising a processor and a non-transitory memory with instructions thereon, wherein the instructions upon execution by the processor, cause the processor to:
maintain, for a conversion between a video region comprising one or more video blocks and a bitstream of the video region, a frequency table,
perform the conversion based on the frequency table,
wherein an initialization process is invoked for the frequency table before processing a first video block in the video region,
wherein a coordinate of a top-left sample of the first video block is (x, y),
wherein (x % W1==0 && y % (H1>>1)==0), where W1 denotes a width of the video region comprising the first video block, H1 denotes a height of the video region and % denotes a module operation, or
wherein (x % W2==0 && y % H2==0), where W2 denotes a width of the video region comprising the first video block, H2 denotes a height of the video region and % denotes a module operation,

wherein the one or more video blocks are processed in an order, and the frequency table includes information about frequencies of one or more intra prediction modes used for processing previous video blocks in the one or more video blocks,
wherein the frequencies indicate occurrences of the one or more intra prediction modes.