Patent ID: 11876516
Assignee: SYNOPSYS, INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. The level shifter circuit of claim 12, wherein the first current mirror or the second current mirror further comprise:
a third p-type transistor coupled between the power terminal and the first n-type transistor;
a fourth p-type transistor coupled between the power terminal and a drain of the first p-type transistor, wherein a gate of the fourth p-type transistor is coupled to the gate of the third p-type transistor;
a fifth p-type transistor coupled between the power terminal and the second-n-type transistor; and
a sixth p-type transistor coupled between the power terminal and a drain of the second p-type transistor, wherein the gate of the sixth p-type transistor is coupled to the gate of the fifth p-type transistor.