Patent ID: 11929392
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A semiconductor device comprising:
a substrate;
a lower electrode in a hole that extends in a vertical direction on the substrate;
a plurality of supporting layers that are on a side wall of the lower electrode and are configured to support the lower electrode;
a dielectric layer on an upper surface of the lower electrode, the side wall of the lower electrode, and each of the plurality of supporting layers; and
an upper electrode on the dielectric layer,
wherein the lower electrode comprises an undoped region and a doped region,
wherein the doped region of the lower electrode is between the undoped region of the lower electrode and the upper surface of the lower electrode and is between the undoped region and the side wall of the lower electrode,
wherein at least one of the plurality of supporting layers contacts the doped region of the lower electrode and does not contact the undoped region of the lower electrode,
wherein the lower electrode comprises silicon or metal nitride, and
wherein the dielectric layer comprises hafnium oxide, zirconium oxide, aluminum oxide, or titanium oxide.