Patent ID: 11868624
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 0:
1. A storage device comprising:
a memory device including Replay Protected Memory Block (RPMB) regions; and
a memory controller configured to:
read target data from the RPMB regions in response to a first security read request including a first RPMB message and received from a host;
provide the target data to the host as a first response corresponding to the first security read request;
generate a device authentication code based on a key shared with the host and the target data while providing the target data to the host; and
provide a second response including a second RPMB message, which includes the device authentication code, to the host in response to a second security read request received from the host,
wherein each of the first RPMB message and the second RPMB message includes at least one of fields of stuff bytes, Message Authentication Code (MAC), data, nonce, write counter, address, block count, result and message type.