Patent ID: 11862286
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 9:
10. The data transmission circuit of claim 9, wherein the data conversion circuit comprises:
a third transmission circuit, electrically connected to the data bus and the global data line and electrically connected to an output terminal of the comparison circuit through a third inverter circuit, and configured to transmit the second data to the data bus in response to the comparison result indicating that the number of different bits does not exceed the preset threshold; and
a fourth transmission circuit, electrically connected to the data bus and the output terminal of the comparison circuit and electrically connected to the global data line through a fourth inverter circuit, and configured to invert the second data and transmit the inverted second data to the data bus in response to the comparison result indicating that the number of bits exceeds the preset threshold.