Patent ID: 11869807
Assignee: APPLIED MATERIALS, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. The processor-implemented method of claim 12, wherein the via metallization layer and the first metallization layer are separated by an etch stop layer, the etch stop layer and the hard mask layer independently comprising one or more of titanium nitride (TiN), titanium (Ti), tantalum (Ta), or tantalum nitride (TaN), aluminum oxide (Al2O3), titanium oxide (TiO2), silicon nitride (SiN), or silicon carbonitride (SiCN), and wherein the via metallization layer and the first metallization layer independently comprise one or more of copper (Cu), ruthenium (Ru), nickel (Ni), cobalt (Co), chromium (Cr), iron (Fe), manganese (Mn), titanium (Ti), aluminum (Al), hafnium (Hf), tantalum (Ta), tungsten (W), vanadium (V), molybdenum (Mo), palladium (Pd), gold (Au), silver (Ag), platinum (Pt), indium (In), tin (Sn), lead (Pb), antimony (Sb), bismuth (Bi), zinc (Zn), or cadmium (Cd).