Patent ID: 11960608
Assignee: INFINEON TECHNOLOGIES AG
Field: Digital communication (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 10:
11. A secure booting circuit for verification of initiation of a boot sequence for an electronic device, comprising:
a move engine configured to read verification data from a non-volatile memory circuit storing memory content and an error correction code corresponding to the memory content, the verification data is determined based on verification data configuration and including the error correction code and not including all of the memory content;
an interface component with an input connected to a secure memory and configured to read a reference data from the secure memory, the reference data including encrypted expected error correction code, an expected erase/write count, and an expected selective subset of the memory content;
an encryption module coupled to the move engine and configured to receive the verification data from the move engine and encrypt the verification data to generate a digest; and
a verification circuit coupled to the encryption module and the interface component and configured to verify the digest based on the reference data and to provide a verification signal indicating whether the boot sequence passes the verification.