Patent ID: 11973039
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A semiconductor device package, comprising:
a first redistribution layer (RDL);
a semiconductor die disposed over the first RDL and having an active surface facing the first RDL;
a first conductive element disposed between the active surface of the semiconductor die and the first RDL and electrically connecting the active surface of the semiconductor die to the first RDL;
a second conductive element disposed adjacent to a lateral side of the semiconductor die;
an encapsulant encapsulating the semiconductor die, the first conductive element, and the second conductive element, wherein a bottom surface of the encapsulant is substantially level with a bottom surface of the first conductive element; and
a patterned conductive layer over a top surface opposite to the bottom surface of the encapsulant, wherein the patterned conductive layer has a width increasing toward a backside surface opposite to the active surface of the semiconductor die.