Patent ID: 11916128
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A method of making a semiconductor structure, comprising:
providing a semiconductor substrate having an nFET structure with a first channel region within a first gate trench and a pFET structure with a second channel region within a second gate trench;
forming a first gate stack in the first gate trench, the first gate stack includes
a first interfacial layer over the first channel region,
a first metal oxide layer over the first interfacial layer, the first metal oxide layer having a first chemical composition,
a first ferroelectric layer over the first metal oxide layer, the first ferroelectric layer having a second chemical composition different than the first chemical composition, and
a first gate electrode over the first ferroelectric layer; and

forming a second gate stack in the second gate trench, the second gate stack includes
a second interfacial layer over the second channel region;
a second ferroelectric layer over the second interfacial layer, the second ferroelectric layer having the second chemical composition;
a second metal oxide layer over the second ferroelectric layer, the second metal oxide layer having the first chemical composition; and
a second gate electrode over the second metal oxide layer.