Patent ID: 11972001
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 7:
8. An apparatus comprising:
at least one memory;
machine readable instructions; and
an accelerator; and
processor circuitry to at least one of instantiate or execute the machine readable instructions to:
access data representative of a request to decrypt an encrypted workload associated with a tenant identifier; and
route encrypted data associated with the request to the accelerator; and

the accelerator to:
access a first accelerator key from a secure server, the first accelerator key generated by the secure server after the request, the first accelerator key selected from a plurality of accelerator keys based on the tenant identifier;
decrypt a shared key utilizing the first accelerator key; and
process the encrypted workload using the shared key.