Patent ID: 11881271
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A non-volatile storage apparatus, comprising:
a block of non-volatile memory cells arranged as NAND strings, the block includes multiple sub-blocks and a plurality of word lines connected to NAND strings of all sub-blocks of the block; and
a control circuit connected to the block and configured to read data from a plurality non-volatile memory cells, which are connected to a selected word line and in a plurality of NAND strings of a selected sub-block, by discharging channels of the plurality NAND strings, and subsequently sensing the plurality of non-volatile memory cells while disconnecting NAND strings of the unselected sub-blocks of the block from bit lines and one or more source lines
wherein the control circuit is configured to:
increase a voltage of the selected word line from a first initial voltage to a first peak voltage and subsequently decrease the voltage of the selected word line to a first intermediate voltage,
increase voltages of a first set of unselected word lines nearby the selected word line from respective second initial voltages to respective second peak voltages and subsequently decrease the voltages of the first set of unselected word lines to respective second intermediate voltages,
increase voltages of a second set of unselected word lines nearby the selected word line from respective third initial voltages to respective third peak voltages and subsequently decrease the voltages of the second set of unselected word lines to respective third intermediate voltages, the third intermediate voltages are higher in voltage magnitude than the second intermediate voltages, the second intermediate voltages are higher in voltage magnitude than the first intermediate voltage, the first set of unselected word lines are positioned closer to the selected word line than the second set of unselected word lines,
increase voltages of unselected word lines not in the first set of unselected word lines or the second set of unselected word lines to respective pass gate voltages, and
sense the plurality of non-volatile memory cells by increasing the voltage of the selected word line from the first intermediate voltage to a read compare voltage, increasing voltages of the first set of unselected word lines and the second set of unselected word lines to respective pass gate voltages, and sensing the plurality non-volatile memory cells.