Patent ID: 11935788
Assignee: WINBOND ELECTRONICS CORP.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A manufacturing method of a semiconductor device, comprising:
providing a semiconductor wafer having die regions and a scribe lane region surrounding each of the die regions; and
performing a singulation process to the semiconductor wafer for forming semiconductor dies separated from one another, wherein each of the semiconductor dies is formed in one of the die regions, and the singulation process comprises:
a first cutting step for forming first openings in the semiconductor wafer by etching the semiconductor wafer, wherein each of the first openings is formed in the scribe lane region, and a portion of the semiconductor wafer is located between each of the first openings and a back surface of the semiconductor wafer in a thickness direction of the semiconductor wafer;
a thinning step performed to the semiconductor wafer after the first cutting step, wherein the portion of the semiconductor wafer located between each of the first openings and the back surface of the semiconductor wafer is removed by the thinning step and each of the first openings penetrates through the semiconductor wafer after the thinning step; and
a second cutting step performed after the thinning step for forming second openings, wherein each of the second openings penetrates through the semiconductor wafer for separating the semiconductor dies, the second openings are formed by removing a part of the semiconductor wafer in the second cutting step, and a width of each of the second openings is greater than a width of each of the first openings.