Patent ID: 11908852
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An integrated circuit comprising:
a semiconductor substrate;
a first transistor having a first terminal, a second terminal, and a third terminal;
a horizontal routing track extending in a first direction as a one-dimensional horizontal routing track in a first metal layer;
a via connector conductively connecting the horizontal routing track to the first terminal of the first transistor;
a backside routing track extending in the first direction as a one-dimensional backside routing track in a backside metal layer, wherein the backside metal layer and the first metal layer are formed at opposite sides of the semiconductor substrate;
a backside via connector conductively connecting the backside routing track to the second terminal of the first transistor;
wherein either the first terminal or the second terminal is a gate terminal of the first transistor; and
a first gate-strip, extending in a second direction perpendicular to the first direction, overlapping a channel region of the first transistor and forming the gate terminal of the first transistor;
a first conductive segment, extending in the second direction, overlapping a source region of the first transistor and forming a source terminal of the first transistor; and
a second conductive segment, extending in the second direction, overlapping a drain region of the first transistor and forming a drain terminal of the first transistor.