Patent ID: 11882686
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method for forming a capacitor, comprising:
providing a substrate with an electric contact portion;
forming a supporting layer and a sacrificial layer which are alternately laminated on a surface of the substrate, wherein the topmost layer is a supporting layer;
forming a capacitor hole penetrating through the supporting layer and the sacrificial layer and exposing the electric contact portion;
forming a bottom electrode layer covering an inner surface of the capacitor hole, in which the bottom electrode layer connects to the electric contact portion;
forming a protective layer covering a surface of the bottom electrode layer;
removing the sacrificial layer, during which the bottom electrode layer being protected by the protective layer;
removing the protective layer; and
sequentially forming a capacitor dielectric layer and a top electrode layer on an inner surface and an outer surface of the bottom electrode layer and a surface of the supporting layer, and
wherein the removing the sacrificial layer comprises:
forming a hard mask layer on a surface of a top supporting layer;
patterning the hard mask layer to form a patterned hard mask layer;
etching the top supporting layer to form an etching window that exposes a top sacrificial layer by taking the patterned hard mask layer as a mask:
removing the top sacrificial layer along the etching window by a wet etching process; and
sequentially etching a lower supporting layer and removing a lower sacrificial layer until all sacrificial layers are removed.