Patent ID: 11868119
Assignee: TOKYO ELECTRON LIMITED
Field: Control (Instruments)
Classification: CPC G | IPC G

Claim 0:
1. A method of characterizing a fabrication process for manufacturing a semiconductor wafer, the fabrication process comprising at least one process step, the at least one process step being associated with a plurality of process variables, the method comprising:
performing a design of experiment process for the at least one process step, wherein the plurality of process variables are changed for a plurality of design of experiment semiconductor wafers;
obtaining design of experiment wafer measurements of a first characteristic from the plurality of design of experiment semiconductor wafers wherein each of the design of experiment wafer measurements is associated with a spatial location on a design of experiment semiconductor wafer from which the design of experiment wafer measurement is obtained;
creating a design of experiment process step fingerprint from the obtained design of experiment wafer measurements for each of the plurality of design of experiment semiconductor wafers to provide a plurality of design of experiment process step fingerprints;
creating a process model of the at least one process step utilizing the plurality of design of experiment process step fingerprints;
performing the at least one process step on a production semiconductor wafer;
obtaining production wafer measurements of the first characteristic of the production semiconductor wafer wherein each of the production wafer measurements is associated with a spatial location on the production semiconductor wafer from which the production wafer measurement is obtained;
creating a production semiconductor wafer process step fingerprint from the obtained production semiconductor wafer measurements;
calculating a modeled fingerprint for the production semiconductor wafer utilizing the process model of the at least one process step;
calculating a difference between the modeled fingerprint and the production semiconductor wafer process step fingerprint; and
detecting a faulty process variable of the at least one process step utilizing the calculated difference between the modeled fingerprint and the production semiconductor wafer process step fingerprint.