Patent ID: 11954329
Assignee: PHISON ELECTRONICS CORP.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A memory management method, configured for a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of dies, each of the plurality of dies comprises a plurality of planes, each of the plurality of planes comprises a plurality of physical erasing units, a sum of a number of the plurality of planes comprised in the rewritable non-volatile memory module is a first number, and the memory management method comprises:
grouping the plurality of physical erasing units into a plurality of management units,
wherein each of the plurality of physical erasing units comprised in each of the plurality of management units respectively belongs to a plurality of different planes, and each of the plurality of management units has a second number of the plurality of physical erasing units,
wherein the second number is less than the first number.