Patent ID: 11915756
Assignee: KIOXIA CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A nonvolatile semiconductor memory device, comprising:
a memory string including a plurality of nonvolatile memory cells for data storage which are capable of storing multi-bit data connected in series,
a first dummy cell which is not used for data storage provided at at least a first end of the memory string,
select transistors connected to both ends of the memory string respectively,
word lines connected to control gate electrodes of the memory cells for data storage;
a first dummy word line connected to a control gate electrode of the first dummy cell;
a bit line connected to the first end of the memory string;
a source line connected to a second end of the memory string; and
a control circuit configured to perform an erasing operation by applying an erasing voltage to the memory string,
wherein before a pre-program operation before an erasing operation to the nonvolatile memory cell, the control circuit measures threshold voltages of the plurality of nonvolatile memory cells.