Patent ID: 11862665
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A method of forming a semiconductor structure comprising a MIM capacitor, comprising:
forming a dielectric layer over a substrate;
forming conductive features in the dielectric layer;
forming a first dielectric structure on the dielectric layer and the conductive features;
forming a stacking structure comprising alternately stacked conductive layers and insulating layers on the first dielectric structure;
shaping the stacking structure to form the MIM capacitor with a ladder structure;
forming a second dielectric structure to cover the MIM capacitor;
forming contact vias and conductive lines in the second dielectric structure, wherein the contact vias connect the MIM capacitor to the conductive lines running over the contact vias; and
forming conductive plugs penetrating through the first and second dielectric structures and electrically connected to the conductive lines, wherein the conductive plugs are laterally spaced apart from the MIM capacitor, and extend from above the MIM capacitor to further below a bottom side of the MIM capacitor.