Patent ID: 11881278
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 3:
4. The method of claim 2, further comprising: after determining the first redundant circuit assigning result according to the first test data and before executing the second test item and acquiring the second test data,
acquiring first accumulated fail bit position data, wherein the first accumulated fail bit position data comprises a sum of the position data of the fail bits acquired during execution of respective test items; and
acquiring a first redundant circuit assigning accumulated result, wherein the first redundant circuit assigning accumulated result comprises: a sum of the numbers of assigned local redundant circuits and a sum of position data of the assigned local redundant circuits, after execution of respective test items; and a sum of numbers of the assigned global redundant circuits and a sum of position data of the assigned global redundant circuits, after execution of respective test items.