Patent ID: 11956950
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 2:
3. A memory array comprising strings of memory cells, comprising:
laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers, channel-material strings of memory cells extending through the insulative tiers and the conductive tiers, the conductive tiers comprising metal;
metal silicide directly against and longitudinally-along the metal of individual of the conductive tiers longitudinally-along opposing sides of individual of the memory blocks;
intervening material laterally-between and longitudinally-along immediately-laterally-adjacent of the memory blocks; and
the metal silicide in the conductive tiers projects downwardly into the immediately-lower insulative tier laterally-between the memory blocks.