Patent ID: 11961772
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G  Y | IPC G  H

Claim 0:
1. A method for automatically processing wafers, comprising:
providing several wafers, wherein the wafers operate on a primary path, and the primary path is a path for forming semiconductor structures on the surfaces of the wafers;
dividing the wafers in the same batch into several sub-batches and one parent batch according to special processing conditions of the wafers on the primary path, wherein each of the sub-batches comprises several wafers extracted from a plurality of wafers subjected to the same special processing condition, and the parent batch is composed of wafers except for the wafers forming all the sub-batches in the same batch;
determining whether there is a need for detecting defects of the wafers, and if yes, automatically switching an operating path of the wafers to a secondary path;
setting several detecting conditions in one-to-one correspondence to special processing conditions of the several sub-batches in the secondary path;
scanning the defects of all the wafers in each of the sub-batches according to respective detecting conditions corresponding to each of the sub-batches;
acquiring a sub-batch defect scanning pattern of each of the sub-batches;
analyzing each of the sub-batch defect patterns to acquire defect-related information of each of the sub-batches; and
determining whether the defect detection on the wafers is finished or not, and if yes, automatically switching the operating path of the wafers to the primary path.