Patent ID: 11917677
Assignee: INTEL CORPORATION
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 8:
9. A non-transitory computer-readable medium storing computer-executable instructions which when executed by one or more processors result in performing operations comprising:
identifying, by a multi-link device (MLD), a first backoff count associated with a first enhanced distributed channel access function (EDCAF) for a first communication link used by the MLD;
identifying, by the MLD, a second backoff count associated with a second EDCAF for a second communication link used by the MLD, the first backoff count less than the second backoff count;
determining, by the MLD, a time period after that the first backoff count reaches zero and during which to refrain from transmitting using the first communication link, the time period based on the second backoff count;
determining, by the MLD, that the first communication link transitioned from an idle state to a busy state during the time period; and
transmitting, by the MLD, a frame based on the first communication link transitioning to the busy state during the time period.