Patent ID: 11862236
Assignee: RAMBUS INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 10:
11. An integrated-circuit memory component:
a programmable register to store a configuration value specifies at least one of a first operating mode or a second operating mode;
a page buffer;
a command/address interface to receive a first command/address value that specifies a memory read access;
a fixed-width data interface; and
control circuitry that:
in response to the first command/address value and specification of the first operating mode, decodes a first column address constituted by N bits of the first command/address value to retrieve a first quantity of data from a first one of 2N independently accessible columns of the page buffer and outputs the first quantity of data via the fixed-width data interface over Q successive data output intervals;
in response to the first command/address value and specification of the second operating mode, decodes a second column address constituted by M bits of the first command/address value to retrieve a second quantity of data from a first one of 2M independently accessible columns of the page buffer and outputs the second quantity of data via the fixed-width data interface over R successive data output intervals, where M is smaller than N, the second quantity of data exceeds the first quantity of data, and R is greater than Q.