Patent ID: 11935804
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method comprising:
forming a back-side redistribution structure over a first substrate;
forming a first opening in the back-side redistribution structure to expose a metallization pattern of the back-side redistribution structure;
depositing a seed layer in the first opening and over the back-side redistribution structure;
forming a first portion of a through-via on the seed layer;
forming a second portion of the through-via on the first portion of the through-via; and
forming a third portion of the through-via on the second portion of the through-via, wherein forming the first portion of the through-via comprises a first plating process during which the first substrate is submerged in a plating solution and a bottom surface of the first substrate is level, and wherein forming the third portion of the through-via comprises a second plating process during which the first substrate is submerged in the plating solution and the bottom surface of the first substrate is not level.