Patent ID: 11869969
Assignee: HUNAN SANAN SEMICONDUCTOR CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 7:
8. The semiconductor device of claim 7, wherein each of said gate electrode units includes:
a gate oxide layer which is formed on said epitaxial layer and extends between said two adjacent ones of said unit cells to cover a portion of each of said source region of said unit cells;
a gate electrode layer which is formed on said gate oxide layer; and
a first dielectric layer which is formed on said gate electrode layer and isolates said gate electrode unit and said source electrode unit;
wherein said gate zone includes a doped region which is disposed in said epitaxial layer and is directly connected to said well contact region of at least one of said unit cells,
wherein the semiconductor device further includes:
a second dielectric layer which is formed on said doped region of said gate zone;
a gate-extending layer which is formed on said second dielectric layer on said gate zone, and
a metal layer which is formed on said gate-extending layer,
wherein said second dielectric layer on said gate zone is connected to said gate oxide layer of each of said gate electrode units,
wherein said gate-extending layer on said gate zone is connected to said gate electrode layer of each of said gate electrode units, and
wherein said metal layer is separated from said source electrode layer.