Patent ID: 11949416
Assignee: SHENZHEN MICROBT ELECTRONICS TECHNOLOGY CO., LTD.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 4:
5. The composite logic gate circuit according to claim 1, wherein the first logic gate circuit is a NOR gate circuit, the NOR gate circuit comprises:
a seventh PMOS transistor, a seventh NMOS transistor, an eighth PMOS transistor, and an eighth NMOS transistor,
wherein a source of the seventh PMOS transistor is coupled to the power input terminal, a drain of the seventh PMOS transistor is coupled to a source of the eighth PMOS transistor, and a gate of the seventh PMOS transistor is configured to receive the first input signal,
wherein the source of the eighth PMOS transistor is coupled to the drain of the seventh PMOS transistor, a drain of the eighth PMOS transistor is coupled to drains of the seventh NMOS transistor and the eighth NMOS transistor, and a gate of the eighth PMOS transistor is configured to receive the second input signal,
wherein a source of the seventh NMOS transistor is coupled to the ground terminal, the drain of the seventh NMOS transistor is coupled to the drains of the eighth PMOS transistor and the eighth NMOS transistor, and a gate of the seventh NMOS transistor is configured to receive the first input signal,
wherein a source of the eighth NMOS transistor is coupled to the ground terminal, the drain of the eighth NMOS transistor is coupled to the drains of the seventh NMOS transistor and the eighth PMOS transistor, and a gate of the eighth NMOS transistor is configured to receive the second input signal,
wherein a node where the drains of the eighth PMOS transistor, the seventh NMOS transistor, and the eighth NMOS transistor are coupled to each other is configured to output the first output signal.