Patent ID: 11861374
Assignee: CRYPTOGRAPHY RESEARCH, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 8:
9. A root of trust (RoT) device, comprising:
an RoT memory;
a cryptography engine;
a direct memory access (DMA) engine; and
an RoT processor to perform steps comprising:
receiving from a host memory of a host device, a command table transfer signal;
responsive to the command table transfer signal, causing the DMA engine to transfer a command table from the host memory to the RoT memory, the command table comprising a sequence of commands for batch execution;
executing the sequence of commands in the command table, wherein executing each command comprises:
causing the DMA engine to copy an address table from the host memory to a DMA memory of the DMA engine, the address table identifying source addresses for input data blocks and destination addresses for output data blocks;
causing the DMA engine to copy the input data blocks identified by the source addresses in the address table from the host memory to the RoT memory;
causing the cryptography engine to encrypt or decrypt the input data blocks to generate the output data blocks in the RoT memory;
causing the DMA engine to copy the output data blocks from the RoT memory to the destination addresses in the host memory; and
updating status information associated with the command table in the RoT memory to generate an updated command table; and

following execution of the sequence of commands, causing the DMA engine to copy the status information to the host memory of the host device.