Patent ID: 11942145
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 15:
16. A non-transitory computer-readable medium having instructions stored thereon that, when executed by a computing device, causes the computing device to perform operations comprising:
placing static random access memory (SRAM) cells in a memory cell region, wherein the SRAM cells comprise gate all-around field effect transistors (GAA FETs);
placing a well pick-up region and a first power supply routing region along a first side of the memory cell region, wherein the well pick-up region is electrically coupled to n-wells and p-wells of the gate all-around field effect transistors, and wherein the first power supply routing region comprises first interconnects for a power supply voltage and a ground supply voltage electrically coupled to a first plurality of the GAA FETs; and
placing a second power supply routing region and a bitline jumper routing region along a second side of the memory cell region, wherein the second power supply routing region comprises second interconnects for the power supply voltage and the ground supply voltage electrically coupled to a second plurality of the GAA FETs, and wherein the bitline jumper routing region comprises third interconnects electrically coupled to bitlines of the memory cells.