Patent ID: 11862173
Assignee: APPLE INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  Y | IPC G

Claim 9:
10. A method comprising:
during a time that a memory controller and one or more processors in an integrated circuit are powered down, receiving a plurality of audio samples in a first circuit within the integrated circuit, wherein the plurality of audio samples are generated by an audio coder/decoder (codec) coupled to a plurality of audio input devices and coupled to the integrated circuit;
detecting, by the first circuit, a predetermined pattern in the audio samples from the audio codec;
causing the memory controller and the one or more processors to power up responsive to detecting the predetermined pattern;
buffering the audio samples that match the predetermined pattern and subsequently-received samples until the memory controller is available to write audio samples to a memory; and
deactivating one or more of the plurality of audio input devices during the time that the memory controller and the one or more processors are powered down, wherein the audio samples during the time are sampled from active ones of the plurality of audio input devices.