Patent ID: 11893283
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. An apparatus, comprising:
a memory array configured to store data and to function synchronously with a clock signal received from a host device;
a processing resource, implemented in hardware, coupled to the memory array and configured to:
execute a first process utilizing the data stored by the memory array responsive to a receipt of a signal by the apparatus, wherein the first process comprises a first layer of an artificial neural network;
determine asynchronously, without reference to a plurality of clock signals including the clock signal of the host device, that a result of the first process is greater than a threshold value; and
execute a second process, comprising logical operations, on the data responsive to the determination that the result of the first process is greater than the threshold value,. wherein the second process comprises a second layer of the artificial neural network;

wherein the second process is initiated without the host device providing an additional command.