Patent ID: 11860656
Assignee: LITE-ON SINGAPORE PTE LTD
Field: Basic communication processes (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 7:
8. The low-dropout voltage regulator according to claim 1, wherein the differential amplifier pair includes a current source, a first differential transistor, a second differential transistor, a third differential transistor, and a fourth differential transistor, wherein the first differential transistor includes a first terminal, a second terminal, and a third terminal, wherein the second differential transistor includes a first terminal, a second terminal, and a third terminal, wherein the third differential transistor includes a first terminal, a second terminal, and a third terminal, wherein the fourth differential transistor includes a first terminal, a second terminal, and a third terminal, wherein the current source is electrically connected to the first terminal of the first differential transistor and the first terminal of the third differential transistor, the second terminal of the first differential transistor is electrically connected to a reference voltage, and the third terminal of the first differential transistor is electrically connected to the first terminal of the second differential transistor, wherein the first terminal of the second differential transistor is electrically connected to the second terminal of the second differential transistor, the second terminal of the second differential transistor is electrically connected to the second terminal of the fourth differential transistor, and the third terminal of the second differential transistor is electrically connected to a ground potential, wherein the second terminal of the third differential transistor is set as the feedback terminal of the differential amplifier pair and is electrically connected to the feedback circuit, the third terminal of the third differential transistor is electrically connected to the first terminal of the fourth differential transistor and the input terminal of the secondary amplification circuit, and the third terminal of the fourth differential transistor is electrically connected to the ground potential.