Patent ID: 11929351
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 16:
17. The system of claim 15, further comprising:
a plurality of die pads disposed on the integrated circuit;
a first plurality of conductive wires comprising first ends and second ends, wherein the first ends of the first plurality of conductive wires are bonded to a first subset of the plurality of die pads, and wherein the second ends of the first plurality of conductive wires are bonded to the first plurality of wire bond pads of the inner layer that is exposed via the open area associated with the primary layer; and
a second plurality of conductive wires comprising first ends and second ends, wherein the first ends of the second plurality of conductive wires are bonded to a second subset of the plurality of die pads, and wherein the second ends of the second plurality of conductive wires are bonded to the second plurality of wire bond pads disposed on the first surface of the primary layer.