Patent ID: 11870437
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 10:
11. The output driving circuit according to claim 8, wherein the pull-down output unit comprises one third transistor or a plurality of third transistors arranged in parallel, the third transistor comprising a first terminal, a second terminal and a control terminal; the pull-down compensation unit comprises one fourth transistor or a plurality of fourth transistors arranged in parallel, the fourth transistor comprising a first terminal, a second terminal and a control terminal; the first terminals of the third transistor and the fourth transistor are grounded, the second terminals of the third transistor and the fourth transistor are connected to the signal output terminal, the control terminal of the third transistor is connected to the signal input terminal, and the control terminal of the fourth transistor is connected to a pull-down pulse signal generation circuit.