Patent ID: 11963348
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method of making an integrated circuit read only memory (ROM) structure, comprising:
forming a ROM transistor by
implanting an active area in a substrate to define a channel, a source region, and a drain region;
depositing a gate electrode over the channel;
removing a portion of the gate electrode and an underlying portion of the channel to form a trench separating a first portion of the active area and a second portion of the active area;
depositing a dielectric material to fill the trench and form a trench isolation structure to isolate the first portion of the active area from the second portion of the active area;
depositing a conductive line over at least one of the source region and the drain region;
adding dopants to the source region and the drain region of the active area;
forming a plurality of contacts comprising a gate electrode contact, a source region contact, and a drain region contact; and
depositing a power rail, a bit line, and at least one word line of the integrated circuit over the contacts.