Patent ID: 11972804
Assignee: SANDISK TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 18:
19. An apparatus, comprising:
a memory block including an array of memory cells;
a controlling means for detecting vulnerability to cross-temperature in communication with the memory cells, the controlling means configured to:
erase the memory cells of the memory block,
program the memory cells in a programming operation that does not include verify,
determine a first natural threshold voltage (nVt) distribution of a first word line,
calculate a first nVt width of the first nVt distribution,
determine a second nVt distribution of a second word line,
calculate a second nVt width of the second nVt distribution,
compare a difference between the first nVt width and the second nVt width to a threshold, and
identify the memory block as being vulnerable to cross-temperature read errors in response to the nVt width exceeding the threshold.