Patent ID: 11869627
Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 10:
11. The semiconductor device according to claim 8,
wherein the second control circuit comprises a fourth transistor, a fifth transistor, a sixth transistor, and a seventh transistor,
wherein a gate of the fourth transistor is electrically connected to a local bit line which is configured to transmit a signal between the second control circuit and the memory circuit,
wherein the fifth transistor is configured to control a conducting state between the gate of the fourth transistor and one of a source and a drain of the fourth transistor,
wherein the sixth transistor is configured to control a conducting state between the other of the source and the drain of the fourth transistor and a wiring supplied with a potential for allowing current to flow through the fourth transistor, and
wherein the seventh transistor is configured to control a conducting state between the one of the source and the drain of the fourth transistor and the global bit line.