Patent ID: 11903179
Assignee: NANYA TECHNOLOGY CORPORATION
Field: nan (nan)
Classification: CPC H | IPC H

Claim 8:
9. A method of manufacturing a semiconductor structure, comprising:
providing a semiconductor substrate comprising an active region and an isolation structure;
forming a contact structure on the active region of the semiconductor substrate;
forming a dielectric spacer on opposite sides of the contact structure;
forming a conductive element on the isolation structure of the semiconductor substrate, wherein the dielectric spacer has a concave surface facing the conductive element;
forming a buffer material on the semiconductor substrate;
forming a patterned mask layer on the buffer material, the patterned mask layer exposing a first region of the semiconductor substrate;
removing a portion of the buffer material according to the patterned mask layer to form a buffer layer exposing the first region of the semiconductor substrate; and
removing the patterned mask layer.