Patent ID: 11925026
Assignee: BESANG, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 22:
23. The 3D NVM module of claim 16, further comprising:
word lines stretching in said word-line direction;
wherein:
each of said word lines is coupled to said control gate of said vertical transistors that are formed along a respective line stretching in said word-line direction;
said memory control circuit is configured to bias said vertical transistors in said 3D NVM by selecting some of said word lines, some of said conductive lines, and some of said metal lines, while unselecting a remainder of said word lines, a remainder of said conductive lines, and a remainder of said metal lines;
said some of said word lines, said some of said conductive lines, and said some of metal lines are coupled to a first group of said vertical transistors;
a first high bias is applied to said some of said word lines;
a low bias is applied to either of said some of said conductive lines and said some of said metal lines;
a second high bias is applied to said some of said conductive lines or said some of said metal lines to which said low bias is not applied;
a first intermediate bias is applied to both said remainder of said conductive lines and said remainder of said metal lines;
a second intermediate bias is applied to said remainder of said word lines; and
said first intermediate bias and said second intermediate bias are higher than said low bias and lower than said first high bias or said second high bias.