Patent ID: 11942957
Assignee: ANALOG DEVICES, INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 19:
20. One or more computer-readable media having instructions stored thereon, wherein the instructions, when executed by one or more processors on-chip with a time-interleaved analog-to-digital converter having sub-analog-to-digital converters (subADCs) to sample an analog input signal in a time-interleaved manner, are to cause the one or more processors to perform the following:
trigger a capture a first data block of first output samples of a first subADC of the subADCs;
evaluate whether one or more of the first output samples meet an amplitude condition;
estimate a first power based on at least some of the first output samples of the first data block;
evaluate whether the first power meets a power condition;
qualify, by a qualifier, whether first data block is suitable for interleaving gain error extraction;
determine to proceed with extraction of a first interleaving gain error based on a memory storing a number of previous qualifier results from the qualifier; and
estimate the first interleaving gain error based the first power and a second power estimated based on second output samples of a second subADC of the subADCs.