Patent ID: 11921646
Assignee: INTEL CORPORATION
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A method comprising:
maintaining, by a translation agent of a host system, a host permission table (HPT) that associates a page permission entry with each physical page of a plurality of physical pages of a memory of the host system and one or more contexts of one or more devices coupled to the host system on a per-bus, per-device, per-port, per-function, or per-process basis;
receiving, by the translation agent, a translated request from a device of the one or more devices via a host-to-device link, wherein the translated request specifies a memory operation and a physical address within a memory of the host system associated with the memory operation;
determining, by the translation agent, page access permissions assigned to a context of the device for a physical page of the memory within which the physical address resides by locating the page permission entry corresponding to the context of the device and the physical page within the HPT;
when the page access permissions permit the memory operation, then allowing, by the translation agent, the memory operation to proceed; and
when the page access permissions do not permit the memory operation, then blocking, by the translation agent, the memory operation.