Patent ID: 11973130
Assignee: X-FAB FRANCE SAS
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 20:
21. A semiconductor device comprising:
a semiconductor substrate having a first region, a second region and a third region;
a first dielectric layer on the first region;
a second dielectric layer on the second region;
a ONO stack on the third region;
on each of the first, second and third regions, at least one gate structure;
a TEOS spacer portion adjacent each gate structure of the second and third regions; and
a SiN spacer portion adjacent each of the gate structures of the first region and on each of the TEOS spacer portions of the second and third regions, wherein a part of the ONO stack extends laterally from under the at least one gate structure on the third region.