Patent ID: 11923407
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 4:
5. A method comprising:
forming an opening through a first dielectric material, a second dielectric material, and a third dielectric material, the second dielectric material being between the first and third dielectric materials;
forming a first recess in the first dielectric material;
forming a second recess in the third dielectric material;
forming a first memory cell structure in the first recess;
forming a second memory cell structure in the second recess;
forming a first gate adjacent the first memory cell structure;
forming a second gate adjacent the second memory cell structure; and
forming a void between the first and second gates, wherein forming the first and second memory cell structures includes forming a dielectric material in each of the first and second recesses, and forming an additional dielectric material in each of the first and second recesses, wherein the additional dielectric material in the first recess is adjacent the dielectric material in the first recess, and the additional dielectric material in the second recess is adjacent the dielectric material in the second recess, and wherein the first gate is adjacent the dielectric material in the first recess, and the second gate is adjacent the dielectric material in the second recess.