Patent ID: 11862538
Assignee: TEXAS INSTRUMENTS INCORPORATED
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 13:
14. A semiconductor chip package, comprising:
a plurality of conductive terminals, wherein each conductive terminal of the plurality of conductive terminals comprises an uppermost surface;
a die pad comprising a top side and a recess extending into the die pad from the top side to a terminal surface, wherein the top side of the die pad is positioned lower than the uppermost surface of each conductive terminal of the plurality of conductive terminals;
a semiconductor die positioned within the recess, wherein the semiconductor die has an outer perimeter; and
a solder fillet engaged within the recess and with the outer perimeter of the semiconductor die such that the solder fillet extends from the terminal surface to a point along the outer perimeter that is spaced from 1 millimeter (mm) to 2.5 mm from the terminal surface.