Patent ID: 11920932
Assignee: NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGY
Field: Measurement (Instruments)
Classification: CPC B  G | IPC B  G

Claim 1:
2. The wafer-level assembly method according to claim 1, wherein
step 2 further comprises:
step 21, applying glue on the fixed cylinder, aligning and placing the plurality of glass substrates on the wafer fixture to fix the plurality of glass substrates on the wafer fixture;
step 22, before the glue is cured, aligning the at least two through glass substrate alignment holes on the each glass substrate with fixture positioning holes on the wafer fixture, and inserting the alignment pin to align the plurality of glass substrates; and
step 23, after the plurality of glass substrates are mounted on the wafer fixture, applying the pressure on the plurality of glass substrates toward one side of the wafer fixture by using the flat plate with holes to completely fix and attach the plurality of glass substrates to the wafer fixture.