Patent ID: 11929279
Assignee: SK HYNIX INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 11:
12. A method for fabricating a semiconductor device, the method comprising:
forming a trench defining an active region in a substrate;
performing a first pretreatment in which a native oxide formed on the trench is replaced with a solid salt and the solid salt is sublimated to expose a surface of the trench;
forming a first polysilicon liner over the trench;
performing a post-treatment to remove a contaminant formed on the first polysilicon liner;
performing a second pretreatment in which a native oxide formed on the first polysilicon liner is replaced with a solid salt and the solid salt is sublimated to expose a surface of the first poly silicon liner;
forming a second polysilicon liner over the first polysilicon liner; and
forming a device isolation layer filing the trench over the second polysilicon liner.