Patent ID: 11875871
Assignee: APPLE INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 18:
19. A memory controller comprising:
a control circuit comprising a command register; and
a plurality of channel control circuits coupled to the control circuit, wherein:
a given channel control circuit of the plurality of channel control circuits is configure to perform one or more memory calibrations on a respective channel of a plurality of channels to one or more memory devices controlled by the memory controller,
the given channel control circuit is configured to selectively perform the one or more memory calibrations based on a command programmed into command register,
the command is programmed based a charge state of an energy source that supplies energy to an electronic device including the memory controller, and
the charge state is indicative of available energy that the energy source is capable of supplying to the electronic device.