Patent ID: 11928410
Assignee: CADENCE DESIGN SYSTEMS, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 5:
6. A method comprising:
accessing, by one or more processors of a machine, a circuit design stored in memory, the circuit design comprising one or more design components and a plurality of segments each segment comprising a region of the circuit design;
receiving, by the one or more processors, one or snore indications of a user interaction with the circuit design;
identifying, by the one or more processors, a design component of the circuit design associated with the user interaction;
receiving from a user, by the one or more processors, a request for behavioral analysis of a property of the design component of the circuit design;
in response to the request:
performing, by the one or more processors, structural analysis of the circuit design to identify a segment of the plurality of segments that at least one affects the property or is affected by the property; and
determining, by the one or more processors, the segment as being a design region of interest;

identifying, by the one or more processors, a behavior within the segment for performing at least one verification test;
compiling, by the one or more processors, the segment without compiling a remainder of the circuit design; and
providing, by the one or more processors, one or more performance indicators for display to the user, the one or more performance indicators corresponding to the behavior within the segment based on the segment as compiled.