Patent ID: 11895819
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 17:
18. A structure comprising:
a semiconductor substrate; and
a first transistor comprising:
a first gate stack over the semiconductor substrate;
a first gate spacer on a sidewall of the first gate stack; and
a first semiconductor region aside of the first gate stack, wherein the first semiconductor region comprises silicon germanium;
a first p-type doped region in the first semiconductor region, wherein the first p-type doped region has a p-type dopant concentration higher than p-type concentrations of portions of the first semiconductor region on opposing sides of the first p-typed doped region; and
a first source/drain silicide region over and contacting the first p-type doped region, wherein the first source/drain silicide region has substantially a same width as the first p-type doped region.