Patent ID: 11908914
Assignee: APPLIED MATERIALS, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A method of forming a semiconductor structure, the method comprising:
patterning a substrate to form a first opening, the substrate comprising an n transistor and a p transistor, the first opening over the n transistor;
pre-cleaning the substrate;
depositing a titanium silicide (TiSi) layer on the n transistor by plasma-enhanced chemical vapor deposition (PECVD);
filling the first opening with a first gapfill material;
forming a mask layer on a top surface of the n transistor;
patterning the substrate to form a second opening over the p transistor;
forming a molybdenum silicide (MoSi) layer on the p transistor;
annealing the semiconductor structure; and
filling the second opening with a second gapfill material.