Patent ID: 11948486
Assignee: FINDEACHIP INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 4:
5. The integrated circuit according to claim 2,
wherein the first data signal according to a read-type communication protocol between the microcontroller unit and the serial interface includes:
a second register addressing packet that includes a second start bit indicating the start of a signal, a second adjacent bit that follows the second start bit and indicates a value opposite to a value of the second start bit, a second type indication bit that follows the second adjacent bit and indicates that the second data signal is a read-type among the read-type and a write-type, a second command area that follows the second type indication bit and corresponds to a plurality of consecutive bits indicating register address information on a target register of the second data signal among registers of the integrated circuit, and a second stop bit that follows the second command area and indicates the stop of the signal, and
the truesum feedback controller performs an analysis for calculating the number of bits having ‘1’ among the plurality of consecutive bits in the second command area of the second register addressing packet as the truesum result value.