Patent ID: 11966380
Assignee: SYMPHONY COMMUNICATION SERVICES HOLDINGS LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 9:
10. A system comprising:
one or more computer processors and one or more hardware storage devices storing instructions that are operable, when executed by the one or more computer processors, to cause the one or more computer processors to perform operations comprising:
initializing a plurality of obfuscated portions to random bit values such that a sum of two of the plurality of obfuscated portions is zero;
distributing bits of a data item among the plurality of obfuscated portions,
wherein each of the plurality of obfuscated portions includes a subset of content of the data item,
wherein the data item and the plurality of obfuscated portions comprise bit matrices in which each matrix element is a bit, and
wherein the bit matrices of the data item and the plurality of obfuscated portions are equal in size; and

distributing the obfuscated portions from a source computer to a plurality of servers,
wherein each of the servers stores a respective obfuscated portion from the plurality of obfuscated portions, and
wherein the source computer and the plurality of servers are configured to communicate using a set of parallel request-response operations.