Patent ID: 11923027
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. An apparatus, comprising:
one or more memory arrays;
an interface operable for coupling with a host device; and
one or more controllers coupled with the one or more memory arrays and the interface, the one or more controllers operable to cause the apparatus to:
set a field of a register with a first value;
determine whether to set the field of the register with a second value based at least in part on whether the one or more controllers have decoded a read command from the host device; and
transmit, using the interface, an indication of a value of the field of the register based at least in part on a signal from the host device, wherein the indication of the value of the field of the register is based at least in part on whether the one or more controllers have decoded the read command from the host device.