Patent ID: 11923859
Assignee: INTEL CORPORATION
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 0:
1. An apparatus to generate a frequency estimate of an output signal, the apparatus comprising:
a reference signal generator configured to generate a reference clock signal; and
frequency estimation circuitry configured to:
generate a cycle count based frequency estimation of the output signal based on the reference clock signal and a clock cycle count of the output signal;
generate a fractional frequency estimation of the output signal based on the reference clock signal and a plurality of time-to-digital conversion phase samples of the output signal; and
generate the frequency estimate of the output signal using the cycle count based frequency estimation within a range and a frequency error determined from the fractional frequency estimation,
wherein the plurality of time-to-digital conversion phase samples and the cycle count based frequency estimation use a same number of reference clock cycles of the reference clock signal.