Patent ID: 11949010
Assignee: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTD
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A method for manufacturing a metal-oxide-semiconductor device, the method comprising:
a) providing a base layer;
b) forming a source region extending from a top surface of the base layer to internal portion of the base layer and having a first doping type;
c) forming a gate structure located on the top surface of the base layer and at least exposing the source region;
d) forming a semiconductor layer located on the top surface of the base layer and having the first doping type, wherein a bottom surface of the semiconductor layer is in direct contact with the top surface of the base layer with no layers therebetween; and
e) wherein the semiconductor layer is used as a partial withstand voltage region of the device, the source region is located at a first side of the gate structure, the semiconductor layer is located at a second side of the gate structure, and the first and second sides of the gate structure are opposite to each other.