Patent ID: 11928362
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 2:
3. The fuse latch of the semiconductor device according to claim 1, further comprising:
a first line disposed at an end of the fourth active region in the second direction, and configured to supply the data in the second direction;
a second line disposed at an end of the first active region in the second direction, and configured to supply the data in the second direction;
a first power-supply line disposed at an end of the second and third active regions in the second direction, and configured to supply a power-supply voltage;
a second power-supply line disposed at an other end of the first active region in the second direction, and configured to supply a ground voltage;
a third power-supply line disposed at an other end of the fourth active region in the second direction, and configured to supply the ground voltage in the second direction; and
a fourth power-supply line disposed at an end of the fifth active region in the second direction, and configured to supply the ground voltage.