Patent ID: 11940914
Assignee: QUALCOMM INCORPORATED
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 29:
30. An apparatus for performing a partial cache collapse procedure, comprising:
means for counting a number of cache lines that satisfy an eviction criteria based on a deterministic cache eviction policy in each cache way of a group of cache ways;
means for selecting at least one cache way from the group for collapse, based on its corresponding number of cache lines that satisfy the eviction criteria, wherein the means for selecting comprise one or more of:
means for selecting, for collapse, one cache way having a highest number of cache lines that satisfy the eviction criteria, or
means for selecting multiple cache ways having highest numbers of cache lines that satisfy the eviction criteria; and

means for performing the partial cache collapse procedure based on the at least one cache way selected from the group for collapse.