Patent ID: 11887673
Assignee: SK HYNIX INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 9:
10. A memory device comprising:
a plurality of memory cells connected to a word line;
an operation controller configured to perform a program operation that stores multi-page data, each including a plurality of bits in the plurality of memory cells, and configured to perform a read operation that obtains the multi-page data that is stored in the plurality of memory cells, the program operation including a first program step and a second program step, the multi-page data including a plurality of logical pages; and
a read voltage controller configured to control the operation controller to determine whether a program step Is performed up to the first program step or the second program step on the plurality of memory cells based on the number of 0s or 1s that are included in sensing data that is obtained by sensing data that is stored in the plurality of memory cells by using a second read voltage, in response to a read command that provides instruction to read a logical page among the plurality of logical pages, and configured to sense the data that is stored in the plurality of memory cells by using a first read voltage with a voltage that is lower than the second read voltage when a program step of the plurality of memory cells is the first program step.