Patent ID: 11876064
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A method of manufacturing a semiconductor structure, comprising:
providing a semiconductor substrate, and forming a metal pad on the semiconductor substrate;
forming a bump on the metal pad; and
forming a solder layer and a metal barrier layer on a side of the bump away from the metal pad;
wherein the metal barrier layer comprises a storage cavity, wherein a side wall of the metal barrier layer is provided with an opening, wherein the opening connects to the storage cavity, wherein the solder layer is disposed in the storage cavity, and wherein one surface of the solder layer away from the bump protrudes from the storage cavity; and
wherein the solder layer comprises a first solder layer and a second solder layer, wherein a method forming the first solder layer and the second solder layer comprises:
forming the first solder layer on a side of the bump away from the metal pad; and
forming the metal barrier layer on the first solder layer and the bumps; and
forming the second solder layer in the storage cavity.