Patent ID: 11874543
Assignee: SHARP DISPLAY TECHNOLOGY CORPORATION
Field: Optics (Instruments)
Classification: CPC G | IPC G

Claim 14:
15. A liquid crystal display device including a panel substrate provided with a display region including a plurality of pixel electrodes, the liquid crystal display device comprising:
a plurality of pixel transistors that is provided in a region outside the display region and corresponds to the plurality of pixel electrodes in a one-to-one manner;
a plurality of pixel wiring lines configured to respectively connect the plurality of pixel electrodes to the plurality of pixel transistors;
an input pad group provided on the panel substrate and to which a drive signal group for driving the plurality of pixel transistors is input;
a drive circuit configured to drive the plurality of pixel transistors based on the drive signal group; and
a sampling circuit including the plurality of pixel transistors,
wherein, in a region on the panel substrate, the plurality of pixel transistors is provided only in a first region other than a region between the input pad group and the display region,
in the region on the panel substrate, the drive circuit is provided in a second region other than the region between the input pad group and the display region such that the plurality of pixel transistors is disposed in a region between the drive circuit and the display region,
the drive circuit includes a shift register constituted by a plurality of unit circuits connected in series,
the plurality of unit circuits outputs, as a plurality of timing signals, a plurality of output signals that becomes active sequentially,
capturing of a plurality of data signals included in the drive signal group is performed based on the plurality of timing signals,
the plurality of pixel transistors is grouped with one group being formed by K pixel transistors of the plurality of pixel transistors, K being an integer of 2 or more,
each of the plurality of pixel transistors includes a control terminal to which a corresponding timing signal is provided, a first conduction terminal to which a corresponding data signal is provided, and a second conduction terminal connected to a corresponding pixel wiring line,
the same timing signal is provided to the control terminals of the K pixel transistors forming the same group, and
mutually different data signals are provided to the first conduction terminals of the K pixel transistors forming the same group.