Patent ID: 11877482
Assignee: HEFEI BOE JOINT TECHNOLOGY CO., LTD.
Field: Audio-visual technology (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 1:
2. The display substrate according to claim 1, wherein a first electrode of the data writing transistor is located at a third side of a gate line of the plurality of gate lines corresponding to the sub-pixel row where the data writing transistor is located; the second electrode of the data writing transistor is located at a fourth side of the gate line of the plurality of gate lines corresponding to the sub-pixel row where the data writing transistor is located; the third side and the fourth side are opposite along the extension direction of the plurality of data lines; an orthographic projection of a channel portion of the data writing transistor to the base substrate is located within an orthographic projection of the gate line of the plurality of gate lines corresponding to the sub-pixel row where the data writing transistor is located, to the base substrate;
a first electrode of the sensing transistor is located at a third side of a gate line of the plurality of gate lines corresponding to a next sub-pixel row adjacent the sensing transistor;
a second electrode of the sensing transistor is located at a fourth side of the gate line of the plurality of gate lines corresponding to the next sub-pixel row adjacent the sensing transistor; an orthographic projection of a channel portion of the sensing transistor to the base substrate is located with an orthographic projection of the gate line of the plurality of gate lines corresponding to the next sub-pixel row adjacent the sensing transistor to the base substrate;
each of the plurality of gate lines is simultaneously reused as the gate electrodes of various data writing transistors in the corresponding sub-pixel row, and the gate electrodes of the sensing transistors in a preceding sub-pixel row adjacent the corresponding sub-pixel row.