Patent ID: 11901891
Assignee: KEPLER COMPUTING INC.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H  G | IPC H

Claim 4:
5. The apparatus of claim 1, wherein the gate comprises:
a first metal layer that extends along an x-plane;
a second metal layer that extends along the x-plane, wherein the second metal layer is above the first metal layer;
a first via that extends along a y-plane, wherein the y-plane is orthogonal to the x-plane, and wherein the first via couples the first metal layer with the second metal layer;
a second via that extends along the y-plane, wherein the second via couples the second metal layer, and wherein the second via is above the first via;
a first pedestal on the first metal layer, wherein the first pedestal is laterally offset from the first via;
a second pedestal on the second metal layer, wherein the second pedestal is laterally offset from the second via;
a second summing node coupled to the first via;
a first input line that extends along a z-plane, wherein the z-plane is orthogonal to the x-plane and the y-plane, and wherein the first input line is coupled to the first input; and
a second input line extending along the z-plane, wherein the second input line is coupled to the second input.