Patent ID: 11881280
Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 9:
10. A method, comprising:
generating an output voltage with a charge pump;
generating, with a slew rate generator, a sense current indicative of a slew rate of the output voltage, wherein the sense current generator includes:
a first transistor having a source terminal coupled to ground, a gate terminal, and a drain terminal coupled to the gate terminal;
a plurality of sense capacitors each having a first terminal coupled to an output terminal of the charge pump and a second terminal; and
a plurality of switches each coupled between the second terminal of a respective sense capacitor and the drain terminal of the first transistor and configured to enable the corresponding sense capacitor to participate in generating the sense current;
a second transistor having a source terminal coupled to ground, a gate terminal coupled to the gate terminal of the first transistor, and a drain terminal;

generating a reference current with a reference current generator coupled between a high supply voltage and a drain terminal of the second transistor;
generating, with a clock generator, a clock signal with a frequency based on the difference current, wherein generating the clock signal includes:
receiving, with an input of a current controlled oscillator directly coupled to the drain terminal of the second transistor, a difference current corresponding, to a difference between the reference current and the sense current;
generating, with the current controlled oscillator, an oscillating signal with a frequency based on the difference current; and
shifting a level of the oscillating signal with a level shifter; and

providing the clock signal to the charge pump.