Patent ID: 11908505
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 0:
1. A data processing device, comprising:
a plurality of memory cells, each including a first and second data storage units, each adapted to store one binary bit, each of the data storage units having a first end and a second end and including a serial combination of a single-transistor memory element and an input switching transistor, the serial combination being connected between the first end and second end,
the first end of the first data storage unit of each one of the plurality of memory cells being switchably connected to the first end of the second data storage unit of the same memory cell, and
the first end of the second data storage unit of each one of the plurality of memory cells being switchably connected to the first end of the first data storage unit of a different one of the plurality of memory cells.