Patent ID: 11860669
Assignee: SILICON MOTION, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 12:
13. The apparatus of claim 12, wherein the processing unit is arranged operably to receive a host write command from the host side through the host I/F; in response to the host write command requesting to program first data belonging to the first logical partition type, drive the flash I/F to program the first data into a current block in the first region; in response to the host write command requesting to program second data belonging to the second logical partition type and the host write command is a random write command, drive the flash I/F to program the second data into a current block in the first region; and in response to the host write command requesting to program third data belonging to the second logical partition type and the host write command is a continuous write command, drive the flash I/F to program the third data into a current block in the second region.