Patent ID: 11887889
Assignee: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTD
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A semiconductor device, comprising:
a) a lower metal layer having a first region and a second region that are isolated from each other;
b) an interlayer dielectric layer located on an upper surface of the lower metal layer;
c) a through hole extending from an upper surface of the interlayer dielectric layer to the lower metal layer to expose the upper surface of the lower metal layer;
d) a first conductive layer covering a bottom part and sidewall parts of the through hole, and the upper surface of the interlayer dielectric layer;
e) a first dielectric layer covering the first conductive layer above the first region of the lower metal layer;
f) a first metal filling the through hole; and
g) an upper metal layer located above the upper surface of the interlayer dielectric layer, wherein above the first region of the lower metal layer, the upper metal layer is in contact with the first metal and the first dielectric layer.