Patent ID: 11972828
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 3:
4. The repair circuit of claim 3, wherein the comparison circuit comprises:
a plurality of XNOR gates, wherein a number of the plurality of XNOR gates is the same as a number of the signals at the remaining bits other than the target number of bits in the row address, a first input terminal of each of the plurality of XNOR gates receives a respective one of the signals at the remaining bits other than the target number of bits in the row address, a second input terminal of the each XNOR gate receives a corresponding bit of the fuse address, and an output terminal of the each XNOR gate outputs a respective one of the plurality of comparison results.