Patent ID: 11934812
Assignee: RIVIAN IP HOLDINGS, LLC
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 7:
8. A system for overloading a function, the system comprising:
memory comprising a memory partition,
processing circuitry coupled to the memory configured to:
compile a first image comprising first assembler code defining a first version of the function stored at a first memory address,
compile a second image comprising second assembler code defining a second version of the function stored at a second memory address, and
generate a stitched super-image by
placing the first assembler code and the second assembler code into the memory partition, wherein the second assembler code is adjusted to not conflict with the first assembler code, and
generating a table that is used to selectively call either one of the first version of the function and the second version of the function.