Patent ID: 11973077
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC H

Claim 0:
1. A device, comprising:
a transistor comprising:
a gate structure;
a channel layer surrounded by the gate structure; and
a first source/drain structure and a second source/drain structure connected to the channel layer;

a backside via under and connected to the first source/drain structure and comprising:
a first portion;
a second portion between the first portion and the first source/drain structure; and
a third portion tapering from the first portion to the second portion in a cross-sectional view; and

a pair of sidewall spacers on opposite sidewalls of the second portion of the backside via but not on opposite sidewalls of the first portion of the backside via.