Patent ID: 11894336
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 15:
16. A manufacturing method of an integrated fan-out (InFO) package having an active region and a border region surrounding the active region, comprising:
forming a first redistribution structure;
forming a plurality of conductive structures on the first redistribution structure;
placing a die between the plurality of conductive structures;
laterally encapsulating the die and the plurality of conductive structures by an encapsulant; and
forming a second redistribution structure over the encapsulant, comprising:
forming a first sub-layer over the encapsulant, the die, and the plurality of conductive structures, wherein the first sub-layer comprises a plurality of first conductive vias and a first alignment mark, the plurality of first conductive vias is located in the active region and the first alignment mark is located in the border region, and the first alignment mark is physically in contact with the encapsulant; and
forming a second sub-layer over the first sub-layer, wherein the second sub-layer comprises a plurality of routing patterns, a plurality of second conductive vias, and a second alignment mark, the plurality of routing patterns and the plurality of second conductive vias are located in the active region and the second alignment mark is located in the border region, the first alignment mark and the second alignment mark are vertically offset from each other in the same border region, and the border region is devoid of the die, the plurality of routing patterns, the plurality of first conductive vias, and the plurality of second conductive vias.