Patent ID: 11935582
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 1:
2. The detection method according to claim 1, wherein there are a plurality of the first bit lines, the second bit line being a first bit line next to the first bit line in a current operation, and the performing a reverse write operation on the first memory cell and the second memory cell comprises:
performing the reverse write operation on the first memory cell and the second memory cell connected to a plurality of groups of first bit lines in a first order, each of the plurality of groups of first bit lines comprising a first number of first bit lines adjacent to each other, the first order being determined according to sequence numbers of bit lines in the plurality of groups of first bit lines from small to large; and
the performing write operations on memory cells connected to the second bit line, the first word line and the second word line comprises:
performing the reverse write operation on the first memory cell and the second memory cell connected to the second bit line, the second bit line being one of the plurality of first bit lines.