Patent ID: 11892904
Assignee: BMC SOFTWARE, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G  H

Claim 17:
18. A system comprising:
at least one memory including instructions; and
at least one processor that is operably coupled to the at least one memory and that is arranged and configured to execute instructions that, when executed, cause the at least one processor to:
determine a plurality of events within a network;
determine, from the plurality of events, a plurality of causal event pairs within a multi-layer small world graph that includes a plurality of layers in which a lowest layer includes the plurality of events, an intervening layer includes an intervening subset of the plurality of events, and a highest layer includes a highest subset of the intervening subset, wherein the lowest layer includes lowest causal connections between causal event pairs of the plurality of events, the intervening layer includes intervening causal connections between causal event pairs of the intervening subset of events, and the highest layer includes a highest causal connection between a causal event pair of the highest subset, and further wherein the highest causal connection subsumes at least two of the intervening causal connections and each of the intervening causal connections subsumes at least two of the lowest causal connections;
generate an arborescence graph from the plurality of causal event pairs within the multi-layer small world graph;
generate a cluster tree of candidate event clusters from the arborescence graph; and
select an event cluster from the candidate event clusters to thereby identify a situation within the network.