Patent ID: 11935791
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H  B | IPC B  H

Claim 12:
13. A semiconductor device, comprising:
first semiconductor wires disposed over and vertically arranged over a substrate;
a first gate structure wrapping around the first semiconductor wires;
a first end fin structure disposed over the substrate and including first semiconductor layers and second semiconductor layers alternately stacked;
a first source/drain epitaxial layer disposed between the first semiconductor wires and the first gate structure, and the first edge fin structure;
second semiconductor wires disposed over and vertically arranged over the substrate;
a second gate structure wrapping around the second semiconductor wires; and
a second source/drain epitaxial layer disposed between the first gate structure and the first semiconductor wires, and the second gate structure and the second semiconductor wires,
wherein a volume of the first source/drain epitaxial layer is smaller than a volume of the second source/drain epitaxial layer.