Patent ID: 11955399
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 12:
13. A semiconductor package comprising:
a package substrate;
an interposer located over an upper surface of the package substrate and electrically connected with the package substrate;
a logic chip located over an upper surface of the interposer and electrically connected with the interposer;
a memory chip located over the upper surface of the interposer and electrically connected with the interposer; and
a heat sink including a first lower surface making thermal contact with the upper surface of the memory chip, and a second lower surface extended downwardly from the first lower surface and making thermal contact with the upper surface of the logic chip to dissipate heat in the memory chip and the logic chip,
wherein the heat sink is a one-piece and has a substantially flat upper surface without any recessed portion thereon.