Patent ID: 11910600
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 2:
3. The three-dimensional nonvolatile memory device of claim 1, further comprising a support layer arranged under the stacking structure on the first substrate and extending in parallel to the upper surface of the first substrate,
wherein the edge cell area comprises a first edge cell area adjacent to the through-via wiring area and a second edge cell area adjacent to an outermost portion of the cell area in the second direction,
the edge separation insulating layer comprises a first edge separation insulating layer in the first edge cell area and a second edge separation insulating layer in the second edge cell area,
at least one material layer under the support layer and extending in parallel to the upper surface of the first substrate is arranged in the edge cell area,
a lower surface of the first edge separation insulating layer is lower than the upper surface of the first substrate, and
the at least one material layer comprises a horizontal layer in contact with a side wall multi-insulating layer of the vertical structure and thin-film insulating layers on upper and lower surfaces of the horizontal layer.