Patent ID: 11869577
Assignee: MICRON TECHNOLOGY, INC.
Field: Computer technology (Electrical engineering)
Classification: CPC G  H | IPC G

Claim 8:
9. A method, comprising:
applying a first voltage to an electrode coupled with a first word line plate and a second word line plate, the first word line plate comprising a plurality of first word lines and the second word line plate comprising a plurality of second word lines;
applying a second voltage to a first pillar extending through a stack of materials comprising the first word line plate and the second word line plate, the first pillar coupled with a first memory cell coupled between the first pillar and a first word line of the plurality of first word lines;
applying a third voltage to a second pillar extending through the stack of materials, the second pillar coupled with a second memory cell coupled between the second pillar and a second word line of the plurality of second word lines; and
accessing the first memory cell and the second memory cell based at least in part on applying the first voltage, the second voltage, and the third voltage.