Patent ID: 11871465
Assignee: ASUSTEK COMPUTER INC.
Field: Digital communication (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A first UE (User Equipment), comprising:
a processor; and a memory operatively coupled to the processor, wherein the processor is configured to execute a program code to: establish a Sidelink (SL) Data Radio Bearer (DRB) for transmission to a second UE directly or via a relay UE, wherein a configuration of the SL DRB is identified by a configuration index, and the SL DRB is mapped to a SL Radio Link Control (RLC) channel established between the first UE and the second UE or between the first UE and the relay UE, and wherein the SL RLC channel is identified by a logical channel identity (LCID);
cipher, using at least the LCID as input to ciphering algorithm, a sidelink packet to be sent to the second UE via the relay UE on the SL DRB if the SL DRB is established for transmission to the second UE directly; and
cipher, using at least the configuration index as input to ciphering algorithm, the sidelink packet to be sent to the second UE on the SL DRB if the SL DRB is established for transmission to the second UE via the relay UE.