Patent ID: 11956954
Assignee: MICRON TECHNOLOGY, INC.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 10:
11. A method of forming an electronic device, comprising:
forming pillar regions extending vertically through a stack of alternating dielectric materials and nitride materials;
removing portions of the nitride materials of the stack adjacent to the pillar regions to form recessed regions of the nitride materials;
forming an oxide material comprising a single material composition within the pillar regions, the oxide material laterally adjacent to and directly physically contacting the dielectric materials of the stack and within the recessed regions of the nitride materials;
forming a charge storage material laterally adjacent to and directly physically contacting the oxide material, the charge storage material comprising charge confinement regions of storage nodes within the pillar regions and in horizontal alignment with the nitride materials of the stack;
removing additional portions of the nitride materials of the stack to form cell openings between the dielectric materials of the stack; and
forming conductive materials in the cell openings to form a stack of alternating dielectric materials and conductive materials arranged in tiers, each of the tiers including a dielectric material and a conductive material vertically neighboring the dielectric material, a height of the charge confinement regions in a vertical direction less than a height of a respective, laterally adjacent conductive material of the conductive stack in the vertical direction.