Patent ID: 11937426
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 14:
15. A method for forming a semiconductor structure, comprising:
forming a first columnar structure and a second columnar structure bordering and separated by a recess, wherein the first and second columnar structures have I-shaped profiles in a cross-sectional plane;
depositing a conductive layer in the recess and overlying the first and second columnar structures;
performing a planarization into the conductive layer to clear the conductive layer from atop the first and second columnar structures and to form a gate electrode in the recess;
performing an etch into the first columnar structure to form a pair of openings exposing a common sidewall; and
filling the pair of openings respectively with a pair of source/drain electrodes.