Patent ID: 11880708
Assignee: VITESCO TECHNOLOGIES GMBH
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 16:
17. A computer, equipped with a plurality of processing units and a shared memory (M), which detects a disappearance of a child processing task from an operating environment of the computer, the computer configured to:
execute a recurring parent processing task (TM);
at each occurrence of the parent task (TM), record an execution date of the parent task (TM) into the shared memory (M) of the computer;
trigger an occurrence of the child task (TF) on each occurrence of the parent task (TM), the child task (TF) recording an execution date of the child task (TM) into the shared memory (M);
evaluate a parent duration (DTMi) elapsed between an execution date of a last occurrence (TMi) of the parent task (TM), and an execution date of a penultimate occurrence (TMi−1) of the parent task (TM);
evaluate a child duration (DTFi) elapsed between an execution date of a last occurrence (TFi) of the child task (TF) triggered by the parent task (TM), and an execution date of a penultimate occurrence (TFi−1) of the child task (TF);
compare the parent duration (DTMi) and the child duration (DTFi); and
when the child duration (DTFi) is longer than the parent duration (DTMi), generate an alarm that the child task (TF) has disappeared in order to execute countermeasures to correct for the disappeared child task.