Patent ID: 11942551
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 6:
7. A semiconductor device comprising:
an active pattern including a lower pattern extending in a first direction and a plurality of sheet patterns spaced apart from the lower pattern in a second direction perpendicular to the first direction;
a plurality of gate structures on the lower pattern to be spaced apart from each other in the first direction and including a gate electrode and a gate insulating layer, the gate electrode and the gate insulating layer surrounding the plurality of sheet patterns;
a source/drain recess between an adjacent pair of the plurality of gate structures; and
a source/drain pattern on the lower pattern in the source/drain recess and in contact with the sheet pattern,
wherein the source/drain pattern includes:
a semiconductor liner layer that extends along the source/drain recess, is in contact with the gate insulating layer, and includes silicon-germanium,
a first semiconductor insertion layer on the semiconductor liner layer,
a semiconductor filling layer including silicon-germanium on the first semiconductor insertion layer, and
a semiconductor capping layer including silicon on the semiconductor filling layer, and
wherein a germanium fraction of the first semiconductor insertion layer is less than a germanium fraction of the semiconductor liner layer and a germanium fraction of the semiconductor filling layer.