Patent ID: 11881771
Assignee: NXP USA, INC.
Field: Electrical machinery, apparatus, energy (Electrical engineering)
Classification: CPC H  G | IPC G  H

Claim 5:
6. The controller of claim 4, wherein the high-side delay circuit comprises:
a high-side OFF delay circuit configured to receive the fall deadtime setting signal from the controller circuit, and generate a high-side OFF signal as a response;
a high-side ON delay circuit configured to receive the PWM signal, and generate a high-side ON signal in response to the PWM signal; and
a high-side trigger circuit connected to the high-side OFF delay circuit and the high-side ON delay circuit, and configured to generate the high-side control signal based on the high-side OFF signal and the high-side ON signal;
and wherein the controller further comprises a high-side driver circuit connected to the high-side delay circuit to receive the high-side control signal, wherein the high-side driver circuit is configured to generate a high-side driver signal in response to the high-side control signal, and provide the high-side driver signal to the high-side switch.