Patent ID: 11972952
Assignee: LAM RESEARCH CORPORATION
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 9:
10. A method comprising:
providing a partially fabricated three-dimensional (3-D) NAND structure having a central vertical structure having a plurality of openings on opposing sidewalls of the central vertical structure, the plurality of openings leading to wordline features separated by oxide layers, the wordline features to be filled with a tungsten-containing material;
exposing the 3-D NAND structure to multiple deposition cycles, wherein each deposition cycle comprises sequentially delivering a dose of hydrogen (H2) and a dose of a tungsten precursor to deposit a bulk tungsten film in the wordline features; and
forming a tungsten-containing cap layer on the opposing sidewalls of the central vertical structure including on the filled wordline features and the oxide layers.