Patent ID: 11868276
Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Field: Computer technology (Electrical engineering)
Classification: CPC G | IPC G

Claim 0:
1. A computing device comprising:
a non-volatile memory;
a communication interface connected to the non-volatile memory to control access to the non-volatile memory; and
a processor connected to the communication interface, wherein the processor is to:
upon booting of the computing device, disable write access to the non-volatile memory via the communication interface;
in response to a trigger of a system management mode (SMM), verify all processor threads have been pulled into the SMM;
in response to a successful verification, enable write access to the non-volatile memory via the communication interface; and
upon exiting the SMM, disable write access to the non-volatile memory via the communication interface.