Patent ID: 11973075
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Field: Semiconductors (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. An integrated circuit device, comprising:
a semiconductor body having a front side, a back side, a first P-doped region, a first N-doped region, a second P-doped region, and a second N-doped region;
a protected circuit; and
an ESD protection device comprising
a first PN diode comprising a first PN junction, a first front side P-terminal, and a back side N-terminal, wherein the first PN junction is formed by the first P-doped region and the first N-doped region , the first front side P-terminal is provided by a heavily P-doped portion of the first P-doped region that is by the front side, and the back side N-terminal is provided by a heavily N-doped portion of the first N-doped region that is by the back side;
a second PN diode comprising a second PN junction, a front side N-terminal, and a back side P-terminal, wherein the second PN junction is formed by the second P-doped region and the second N-doped region , the front side N-terminal is provided by a heavily N-doped portion of the second N-doped region that is by the front side, and the back side P-terminal is provided by a heavily P-doped portion of the second P-doped region that is by the back side;

a first metal contact plug directly over and coupling with the first front side P-terminal; and
a second metal contact plug directly over and coupling with the front side N-terminal;
wherein the ESD protection device provides ESD protection for the protected circuit; and
the first PN diode comprises a second front side P-terminal, wherein the first front side P-terminal and the second front side P-terminal are on opposite sides of a gate structure that is on the front side, and the first front side P-terminal and the second front side P-terminal are both connected to a wire in a metal interconnect structure on the front side.