Patent ID: 11894926
Assignee: KANDOU LABS, S.A.
Field: Basic communication processes (Electrical engineering)
Classification: CPC H | IPC H

Claim 0:
1. A method comprising:
obtaining a set of information bits;
sequentially allocating data bytes of the set of information bits to respective forward error correction (FEC) encoders of a plurality of parallel FEC encoders to generate a plurality of parallel FEC-encoded data bytes;
providing, in a first interleaved order, a first set of FEC-encoded data bytes obtained from the plurality of parallel FEC-encoded data bytes to respective transport channels of a plurality of transport channels of an analog physical layer (PHY) circuit for parallel transmission during a plurality of signaling intervals; and
providing, in a second interleaved order, a second set of FEC-encoded data bytes obtained from the plurality of parallel FEC-encoded data bytes to respective transport channels of the plurality of transport channels for parallel transmission during a subsequent plurality of signaling intervals.